2011-09-06 21:05:41 +02:00
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/*
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%atmel_license%
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*/
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2011-05-31 23:09:42 +02:00
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/**
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* \file
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*
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* Implementation of Timer Counter (TC).
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*
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*/
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/*------------------------------------------------------------------------------
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* Headers
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*------------------------------------------------------------------------------*/
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#include "chip.h"
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#include <assert.h>
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/*------------------------------------------------------------------------------
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* Global functions
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*------------------------------------------------------------------------------*/
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/**
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* \brief Configures a Timer Counter Channel
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*
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* Configures a Timer Counter to operate in the given mode. Timer is stopped
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* after configuration and must be restarted with TC_Start(). All the
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* interrupts of the timer are also disabled.
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*
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* \param pTc Pointer to a Tc instance.
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* \param channel Channel number.
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* \param mode Operating mode (TC_CMR value).
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*/
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extern void TC_Configure( Tc *pTc, uint32_t dwChannel, uint32_t dwMode )
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{
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TcChannel* pTcCh ;
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assert( dwChannel < (sizeof( pTc->TC_CHANNEL )/sizeof( pTc->TC_CHANNEL[0] )) ) ;
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pTcCh = pTc->TC_CHANNEL+dwChannel ;
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/* Disable TC clock */
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pTcCh->TC_CCR = TC_CCR_CLKDIS ;
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/* Disable interrupts */
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pTcCh->TC_IDR = 0xFFFFFFFF ;
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/* Clear status register */
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pTcCh->TC_SR ;
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/* Set mode */
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pTcCh->TC_CMR = dwMode ;
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}
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/**
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* \brief Reset and Start the TC Channel
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*
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* Enables the timer clock and performs a software reset to start the counting.
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*
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* \param pTc Pointer to a Tc instance.
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* \param dwChannel Channel number.
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*/
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extern void TC_Start( Tc *pTc, uint32_t dwChannel )
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{
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TcChannel* pTcCh ;
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assert( dwChannel < (sizeof( pTc->TC_CHANNEL )/sizeof( pTc->TC_CHANNEL[0] )) ) ;
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pTcCh = pTc->TC_CHANNEL+dwChannel ;
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pTcCh->TC_CCR = TC_CCR_CLKEN | TC_CCR_SWTRG ;
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}
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/**
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* \brief Stop TC Channel
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*
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* Disables the timer clock, stopping the counting.
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*
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* \param pTc Pointer to a Tc instance.
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* \param dwChannel Channel number.
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*/
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extern void TC_Stop(Tc *pTc, uint32_t dwChannel )
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{
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TcChannel* pTcCh ;
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assert( dwChannel < (sizeof( pTc->TC_CHANNEL )/sizeof( pTc->TC_CHANNEL[0] )) ) ;
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pTcCh = pTc->TC_CHANNEL+dwChannel ;
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pTcCh->TC_CCR = TC_CCR_CLKDIS ;
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}
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/**
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* \brief Find best MCK divisor
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*
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* Finds the best MCK divisor given the timer frequency and MCK. The result
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* is guaranteed to satisfy the following equation:
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* \code
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* (MCK / (DIV * 65536)) <= freq <= (MCK / DIV)
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* \endcode
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* with DIV being the highest possible value.
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*
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* \param dwFreq Desired timer frequency.
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* \param dwMCk Master clock frequency.
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* \param dwDiv Divisor value.
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* \param dwTcClks TCCLKS field value for divisor.
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* \param dwBoardMCK Board clock frequency.
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*
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* \return 1 if a proper divisor has been found, otherwise 0.
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*/
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extern uint32_t TC_FindMckDivisor( uint32_t dwFreq, uint32_t dwMCk, uint32_t *dwDiv, uint32_t *dwTcClks, uint32_t dwBoardMCK )
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{
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const uint32_t adwDivisors[5] = { 2, 8, 32, 128, dwBoardMCK / 32768 } ;
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uint32_t dwIndex = 0 ;
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/* Satisfy lower bound */
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while ( dwFreq < ((dwMCk / adwDivisors[dwIndex]) / 65536) )
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{
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dwIndex++ ;
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/* If no divisor can be found, return 0 */
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if ( dwIndex == (sizeof( adwDivisors )/sizeof( adwDivisors[0] )) )
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{
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return 0 ;
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}
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}
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/* Try to maximize DIV while satisfying upper bound */
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while ( dwIndex < 4 )
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{
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if ( dwFreq > (dwMCk / adwDivisors[dwIndex + 1]) )
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{
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break ;
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}
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dwIndex++ ;
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}
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/* Store results */
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if ( dwDiv )
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{
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*dwDiv = adwDivisors[dwIndex] ;
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}
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if ( dwTcClks )
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{
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*dwTcClks = dwIndex ;
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}
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return 1 ;
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}
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