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https://github.com/arduino/Arduino.git
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206 lines
6.1 KiB
Plaintext
206 lines
6.1 KiB
Plaintext
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/* Linker script for ARM Simulator (VFP)
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*
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* Version: Sourcery G++ Lite 2011.03-42
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* Support: https://support.codesourcery.com/GNUToolchain/
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*
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* Copyright (c) 2007, 2008, 2009, 2010 CodeSourcery, Inc.
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*
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* The authors hereby grant permission to use, copy, modify, distribute,
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* and license this software and its documentation for any purpose, provided
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* that existing copyright notices are retained in all copies and that this
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* notice is included verbatim in any distributions. No written agreement,
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* license, or royalty fee is required for any of the authorized uses.
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* Modifications to this software may be copyrighted by their authors
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* and need not follow the licensing terms described here, provided that
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* the new terms are clearly indicated on the first page of each file where
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* they apply.
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*/
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OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
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ENTRY(__cs3_reset)
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SEARCH_DIR(.)
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GROUP(-lgcc -lc -lcs3 -lcs3unhosted -lcs3arm)
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MEMORY
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{
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ram (rwx) : ORIGIN = 0x0, LENGTH = 128M
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}
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/* These force the linker to search for particular symbols from
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* the start of the link process and thus ensure the user's
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* overrides are picked up
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*/
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EXTERN(__cs3_reset __cs3_reset_generic_vfp)
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EXTERN(__cs3_start_asm __cs3_start_asm_sim)
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/* Bring in the interrupt routines & vector */
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INCLUDE arm-names.inc
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EXTERN(__cs3_interrupt_vector_arm)
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EXTERN(__cs3_start_c main __cs3_stack __cs3_heap_end)
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/* Provide fall-back values */
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PROVIDE(__cs3_heap_start = _end);
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PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram);
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PROVIDE(__cs3_region_num = (__cs3_regions_end - __cs3_regions) / 20);
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PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram);
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SECTIONS
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{
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.text :
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{
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CREATE_OBJECT_SYMBOLS
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__cs3_region_start_ram = .;
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_ftext = .;
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*(.cs3.region-head.ram)
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ASSERT (. == __cs3_region_start_ram, ".cs3.region-head.ram not permitted");
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__cs3_interrupt_vector = __cs3_interrupt_vector_arm;
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*(.cs3.interrupt_vector)
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/* Make sure we pulled in an interrupt vector. */
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ASSERT (. != __cs3_interrupt_vector_arm, "No interrupt vector");
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PROVIDE(__cs3_reset = __cs3_reset_generic_vfp);
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*(.cs3.reset)
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__cs3_start_asm_sim = DEFINED(__cs3_start_asm) ? __cs3_start_asm : __cs3_start_asm_sim;
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*(.text.cs3.init)
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*(.text .text.* .gnu.linkonce.t.*)
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*(.plt)
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*(.gnu.warning)
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*(.glue_7t) *(.glue_7) *(.vfp11_veneer)
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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*(.gcc_except_table)
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} >ram
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.eh_frame_hdr : ALIGN (4)
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{
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KEEP (*(.eh_frame_hdr))
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} >ram
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.eh_frame : ALIGN (4)
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{
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KEEP (*(.eh_frame))
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} >ram
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/* .ARM.exidx is sorted, so has to go in its own output section. */
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PROVIDE_HIDDEN (__exidx_start = .);
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.ARM.exidx :
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{
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*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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} >ram
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PROVIDE_HIDDEN (__exidx_end = .);
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.rodata : ALIGN (4)
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{
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*(.rodata .rodata.* .gnu.linkonce.r.*)
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. = ALIGN(4);
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KEEP(*(.init))
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. = ALIGN(4);
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__preinit_array_start = .;
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KEEP (*(.preinit_array))
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__preinit_array_end = .;
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. = ALIGN(4);
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__init_array_start = .;
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KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array))
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__init_array_end = .;
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. = ALIGN(4);
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KEEP(*(.fini))
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. = ALIGN(4);
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__fini_array_start = .;
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KEEP (*(.fini_array))
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KEEP (*(SORT(.fini_array.*)))
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__fini_array_end = .;
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. = ALIGN(0x4);
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KEEP (*crtbegin.o(.ctors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
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KEEP (*(SORT(.ctors.*)))
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KEEP (*crtend.o(.ctors))
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. = ALIGN(0x4);
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KEEP (*crtbegin.o(.dtors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*crtend.o(.dtors))
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. = ALIGN(4);
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__cs3_regions = .;
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LONG (0)
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LONG (__cs3_region_init_ram)
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LONG (__cs3_region_start_ram)
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LONG (__cs3_region_init_size_ram)
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LONG (__cs3_region_zero_size_ram)
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__cs3_regions_end = .;
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. = ALIGN (8);
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_etext = .;
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} >ram
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ASSERT (!(__cs3_region_init_ram & 7), "__cs3_region_init_ram not aligned")
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ASSERT (!(__cs3_region_start_ram & 7), "__cs3_region_start_ram not aligned")
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ASSERT (!(__cs3_region_init_size_ram & 7), "__cs3_region_init_size_ram not aligned")
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ASSERT (!(__cs3_region_zero_size_ram & 7), "__cs3_region_zero_size_ram not aligned")
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.data : ALIGN (8)
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{
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KEEP(*(.jcr))
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*(.got.plt) *(.got)
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*(.shdata)
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*(.data .data.* .gnu.linkonce.d.*)
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. = ALIGN (8);
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*(.ram)
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. = ALIGN (8);
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_edata = .;
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} >ram
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.bss : ALIGN (8)
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{
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*(.shbss)
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*(.bss .bss.* .gnu.linkonce.b.*)
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*(COMMON)
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. = ALIGN (8);
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*(.ram.b .bss.ram)
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. = ALIGN (8);
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_end = .;
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__end = .;
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} >ram
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__cs3_region_init_ram = __cs3_region_start_ram;
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__cs3_region_init_size_ram = _edata - __cs3_region_start_ram;
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__cs3_region_zero_size_ram = _end - _edata;
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/* Default to 1M of heap */
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__cs3_region_size_ram = ALIGN (1024) - __cs3_region_start_ram + 1M;
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.stab 0 (NOLOAD) : { *(.stab) }
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.stabstr 0 (NOLOAD) : { *(.stabstr) }
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/* DWARF debug sections.
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* Symbols in the DWARF debugging sections are relative to
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* the beginning of the section so we begin them at 0.
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*/
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/* DWARF 1 */
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.debug 0 : { *(.debug) }
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.line 0 : { *(.line) }
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/* GNU DWARF 1 extensions */
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.debug_srcinfo 0 : { *(.debug_srcinfo) }
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.debug_sfnames 0 : { *(.debug_sfnames) }
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/* DWARF 1.1 and DWARF 2 */
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.debug_aranges 0 : { *(.debug_aranges) }
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.debug_pubnames 0 : { *(.debug_pubnames) }
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/* DWARF 2 */
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.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
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.debug_abbrev 0 : { *(.debug_abbrev) }
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.debug_line 0 : { *(.debug_line) }
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.debug_frame 0 : { *(.debug_frame) }
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.debug_str 0 : { *(.debug_str) }
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.debug_loc 0 : { *(.debug_loc) }
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.debug_macinfo 0 : { *(.debug_macinfo) }
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/* DWARF 2.1 */
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.debug_ranges 0 : { *(.debug_ranges) }
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/* SGI/MIPS DWARF 2 extensions */
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.debug_weaknames 0 : { *(.debug_weaknames) }
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.debug_funcnames 0 : { *(.debug_funcnames) }
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.debug_typenames 0 : { *(.debug_typenames) }
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.debug_varnames 0 : { *(.debug_varnames) }
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.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
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.ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
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/DISCARD/ : { *(.note.GNU-stack) }
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}
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/* checksum: 0b8282c56e21b093479dee7c */
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