2011-09-06 21:05:41 +02:00
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/* $asf_license$ */
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2011-09-05 22:59:49 +02:00
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#ifndef _SAM3U_SUPC_INSTANCE_
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#define _SAM3U_SUPC_INSTANCE_
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/* ========== Register definition for SUPC peripheral ========== */
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2011-09-06 21:05:41 +02:00
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#ifdef __ASSEMBLY__
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#define REG_SUPC_CR (0x400E1210U) /**< \brief (SUPC) Supply Controller Control Register */
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#define REG_SUPC_SMMR (0x400E1214U) /**< \brief (SUPC) Supply Controller Supply Monitor Mode Register */
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#define REG_SUPC_MR (0x400E1218U) /**< \brief (SUPC) Supply Controller Mode Register */
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#define REG_SUPC_WUMR (0x400E121CU) /**< \brief (SUPC) Supply Controller Wake Up Mode Register */
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#define REG_SUPC_WUIR (0x400E1220U) /**< \brief (SUPC) Supply Controller Wake Up Inputs Register */
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#define REG_SUPC_SR (0x400E1224U) /**< \brief (SUPC) Supply Controller Status Register */
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#else
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#define REG_SUPC_CR (*(WoReg*)0x400E1210U) /**< \brief (SUPC) Supply Controller Control Register */
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#define REG_SUPC_SMMR (*(RwReg*)0x400E1214U) /**< \brief (SUPC) Supply Controller Supply Monitor Mode Register */
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#define REG_SUPC_MR (*(RwReg*)0x400E1218U) /**< \brief (SUPC) Supply Controller Mode Register */
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#define REG_SUPC_WUMR (*(RwReg*)0x400E121CU) /**< \brief (SUPC) Supply Controller Wake Up Mode Register */
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#define REG_SUPC_WUIR (*(RwReg*)0x400E1220U) /**< \brief (SUPC) Supply Controller Wake Up Inputs Register */
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#define REG_SUPC_SR (*(RoReg*)0x400E1224U) /**< \brief (SUPC) Supply Controller Status Register */
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#endif /* __ASSEMBLY__ */
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2011-09-05 22:59:49 +02:00
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#endif /* _SAM3U_SUPC_INSTANCE_ */
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