2011-09-06 21:05:41 +02:00
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/* $asf_license$ */
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2011-09-05 22:59:49 +02:00
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#ifndef _SAM3XA_TRNG_INSTANCE_
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#define _SAM3XA_TRNG_INSTANCE_
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/* ========== Register definition for TRNG peripheral ========== */
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2011-09-06 21:05:41 +02:00
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#ifdef __ASSEMBLY__
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#define REG_TRNG_CR (0x400BC000U) /**< \brief (TRNG) Control Register */
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#define REG_TRNG_IER (0x400BC010U) /**< \brief (TRNG) Interrupt Enable Register */
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#define REG_TRNG_IDR (0x400BC014U) /**< \brief (TRNG) Interrupt Disable Register */
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#define REG_TRNG_IMR (0x400BC018U) /**< \brief (TRNG) Interrupt Mask Register */
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#define REG_TRNG_ISR (0x400BC01CU) /**< \brief (TRNG) Interrupt Status Register */
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#define REG_TRNG_ODATA (0x400BC050U) /**< \brief (TRNG) Output Data Register */
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#else
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#define REG_TRNG_CR (*(WoReg*)0x400BC000U) /**< \brief (TRNG) Control Register */
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#define REG_TRNG_IER (*(WoReg*)0x400BC010U) /**< \brief (TRNG) Interrupt Enable Register */
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#define REG_TRNG_IDR (*(WoReg*)0x400BC014U) /**< \brief (TRNG) Interrupt Disable Register */
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#define REG_TRNG_IMR (*(RoReg*)0x400BC018U) /**< \brief (TRNG) Interrupt Mask Register */
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#define REG_TRNG_ISR (*(RoReg*)0x400BC01CU) /**< \brief (TRNG) Interrupt Status Register */
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#define REG_TRNG_ODATA (*(RoReg*)0x400BC050U) /**< \brief (TRNG) Output Data Register */
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#endif /* __ASSEMBLY__ */
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2011-09-05 22:59:49 +02:00
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#endif /* _SAM3XA_TRNG_INSTANCE_ */
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