From 5e97168fbccf5287845c0eb7fd25c89588cda6cd Mon Sep 17 00:00:00 2001 From: Cristian Maglie Date: Mon, 5 Jan 2015 15:24:30 +0100 Subject: [PATCH 1/3] sam: USART modes now fails if used on UART --- .../arduino/sam/cores/arduino/UARTClass.cpp | 11 ++- .../arduino/sam/cores/arduino/UARTClass.h | 37 +++++++--- .../arduino/sam/cores/arduino/USARTClass.cpp | 4 +- .../arduino/sam/cores/arduino/USARTClass.h | 71 +++++++++++-------- 4 files changed, 78 insertions(+), 45 deletions(-) diff --git a/hardware/arduino/sam/cores/arduino/UARTClass.cpp b/hardware/arduino/sam/cores/arduino/UARTClass.cpp index 22ec20abb..c81af2cac 100644 --- a/hardware/arduino/sam/cores/arduino/UARTClass.cpp +++ b/hardware/arduino/sam/cores/arduino/UARTClass.cpp @@ -37,10 +37,15 @@ UARTClass::UARTClass( Uart *pUart, IRQn_Type dwIrq, uint32_t dwId, RingBuffer *p void UARTClass::begin( const uint32_t dwBaudRate ) { - begin( dwBaudRate, UART_MR_PAR_NO | UART_MR_CHMODE_NORMAL ); + begin(dwBaudRate, Mode_8N1); } -void UARTClass::begin( const uint32_t dwBaudRate, const uint32_t config ) +void UARTClass::begin(const uint32_t dwBaudRate, const UARTModes config) +{ + init(dwBaudRate, static_cast(config)); +} + +void UARTClass::init(const uint32_t dwBaudRate, const uint32_t config) { // Configure PMC pmc_enable_periph_clk( _dwId ); @@ -52,7 +57,7 @@ void UARTClass::begin( const uint32_t dwBaudRate, const uint32_t config ) _pUart->UART_CR = UART_CR_RSTRX | UART_CR_RSTTX | UART_CR_RXDIS | UART_CR_TXDIS; // Configure mode - _pUart->UART_MR = config; + _pUart->UART_MR = config | US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHMODE_NORMAL; // Configure baudrate (asynchronous, no oversampling) _pUart->UART_BRGR = (SystemCoreClock / dwBaudRate) >> 4; diff --git a/hardware/arduino/sam/cores/arduino/UARTClass.h b/hardware/arduino/sam/cores/arduino/UARTClass.h index 1bc223d80..45dc5197d 100644 --- a/hardware/arduino/sam/cores/arduino/UARTClass.h +++ b/hardware/arduino/sam/cores/arduino/UARTClass.h @@ -25,22 +25,28 @@ // Includes Atmel CMSIS #include +#define SERIAL_8N1 UARTClass::Mode_8N1 +#define SERIAL_8N2 UARTClass::Mode_8N2 +#define SERIAL_8E1 UARTClass::Mode_8E1 +#define SERIAL_8E2 UARTClass::Mode_8E2 +#define SERIAL_8O1 UARTClass::Mode_8O1 +#define SERIAL_8O2 UARTClass::Mode_8O2 + class UARTClass : public HardwareSerial { - protected: - RingBuffer *_rx_buffer; - RingBuffer *_tx_buffer; - - protected: - Uart* _pUart; - IRQn_Type _dwIrq; - uint32_t _dwId; - public: + enum UARTModes { + Mode_8N1 = US_MR_CHRL_8_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT, + Mode_8N2 = US_MR_CHRL_8_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT, + Mode_8E1 = US_MR_CHRL_8_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT, + Mode_8E2 = US_MR_CHRL_8_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT, + Mode_8O1 = US_MR_CHRL_8_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT, + Mode_8O2 = US_MR_CHRL_8_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT, + }; UARTClass(Uart* pUart, IRQn_Type dwIrq, uint32_t dwId, RingBuffer* pRx_buffer, RingBuffer* pTx_buffer); void begin(const uint32_t dwBaudRate); - void begin(const uint32_t dwBaudRate, const uint32_t config); + void begin(const uint32_t dwBaudRate, const UARTModes config); void end(void); int available(void); int availableForWrite(void); @@ -56,6 +62,17 @@ class UARTClass : public HardwareSerial void IrqHandler(void); operator bool() { return true; }; // UART always active + + protected: + void init(const uint32_t dwBaudRate, const uint32_t config); + + RingBuffer *_rx_buffer; + RingBuffer *_tx_buffer; + + Uart* _pUart; + IRQn_Type _dwIrq; + uint32_t _dwId; + }; #endif // _UART_CLASS_ diff --git a/hardware/arduino/sam/cores/arduino/USARTClass.cpp b/hardware/arduino/sam/cores/arduino/USARTClass.cpp index 9fcfa30a6..428ac39ed 100644 --- a/hardware/arduino/sam/cores/arduino/USARTClass.cpp +++ b/hardware/arduino/sam/cores/arduino/USARTClass.cpp @@ -32,8 +32,8 @@ USARTClass::USARTClass( Usart* pUsart, IRQn_Type dwIrq, uint32_t dwId, RingBuffe // Public Methods ////////////////////////////////////////////////////////////// -void USARTClass::begin( const uint32_t dwBaudRate, const uint32_t config ) +void USARTClass::begin( const uint32_t dwBaudRate, const USARTModes config ) { - UARTClass::begin(dwBaudRate, config); + UARTClass::init(dwBaudRate, static_cast(config)); } diff --git a/hardware/arduino/sam/cores/arduino/USARTClass.h b/hardware/arduino/sam/cores/arduino/USARTClass.h index 235f54910..27152318c 100644 --- a/hardware/arduino/sam/cores/arduino/USARTClass.h +++ b/hardware/arduino/sam/cores/arduino/USARTClass.h @@ -26,35 +26,24 @@ #include // Define config for Serial.begin(baud, config); -#define SERIAL_5N1 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_5_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT | US_MR_CHMODE_NORMAL) -#define SERIAL_6N1 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_6_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT | US_MR_CHMODE_NORMAL) -#define SERIAL_7N1 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_7_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT | US_MR_CHMODE_NORMAL) -#define SERIAL_8N1 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_8_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT | US_MR_CHMODE_NORMAL) - -#define SERIAL_5N2 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_5_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT | US_MR_CHMODE_NORMAL) -#define SERIAL_6N2 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_6_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT | US_MR_CHMODE_NORMAL) -#define SERIAL_7N2 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_7_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT | US_MR_CHMODE_NORMAL) -#define SERIAL_8N2 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_8_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT | US_MR_CHMODE_NORMAL) - -#define SERIAL_5E1 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_5_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT | US_MR_CHMODE_NORMAL) -#define SERIAL_6E1 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_6_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT | US_MR_CHMODE_NORMAL) -#define SERIAL_7E1 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_7_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT | US_MR_CHMODE_NORMAL) -#define SERIAL_8E1 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_8_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT | US_MR_CHMODE_NORMAL) - -#define SERIAL_5E2 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_5_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT | US_MR_CHMODE_NORMAL) -#define SERIAL_6E2 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_6_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT | US_MR_CHMODE_NORMAL) -#define SERIAL_7E2 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_7_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT | US_MR_CHMODE_NORMAL) -#define SERIAL_8E2 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_8_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT | US_MR_CHMODE_NORMAL) - -#define SERIAL_5O1 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_5_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT | US_MR_CHMODE_NORMAL) -#define SERIAL_6O1 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_6_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT | US_MR_CHMODE_NORMAL) -#define SERIAL_7O1 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_7_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT | US_MR_CHMODE_NORMAL) -#define SERIAL_8O1 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_8_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT | US_MR_CHMODE_NORMAL) - -#define SERIAL_5O2 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_5_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT | US_MR_CHMODE_NORMAL) -#define SERIAL_6O2 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_6_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT | US_MR_CHMODE_NORMAL) -#define SERIAL_7O2 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_7_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT | US_MR_CHMODE_NORMAL) -#define SERIAL_8O2 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_8_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT | US_MR_CHMODE_NORMAL) +#define SERIAL_5N1 USARTClass::Mode_5N1 +#define SERIAL_6N1 USARTClass::Mode_6N1 +#define SERIAL_7N1 USARTClass::Mode_7N1 +#define SERIAL_5N2 USARTClass::Mode_5N2 +#define SERIAL_6N2 USARTClass::Mode_6N2 +#define SERIAL_7N2 USARTClass::Mode_7N2 +#define SERIAL_5E1 USARTClass::Mode_5E1 +#define SERIAL_6E1 USARTClass::Mode_6E1 +#define SERIAL_7E1 USARTClass::Mode_7E1 +#define SERIAL_5E2 USARTClass::Mode_5E2 +#define SERIAL_6E2 USARTClass::Mode_6E2 +#define SERIAL_7E2 USARTClass::Mode_7E2 +#define SERIAL_5O1 USARTClass::Mode_5O1 +#define SERIAL_6O1 USARTClass::Mode_6O1 +#define SERIAL_7O1 USARTClass::Mode_7O1 +#define SERIAL_5O2 USARTClass::Mode_5O2 +#define SERIAL_6O2 USARTClass::Mode_6O2 +#define SERIAL_7O2 USARTClass::Mode_7O2 class USARTClass : public UARTClass { @@ -62,9 +51,31 @@ class USARTClass : public UARTClass Usart* _pUsart; public: + // 8 bit modes are inherited from UARTClass + enum USARTModes { + Mode_5N1 = US_MR_CHRL_5_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT, + Mode_6N1 = US_MR_CHRL_6_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT, + Mode_7N1 = US_MR_CHRL_7_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT, + Mode_5N2 = US_MR_CHRL_5_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT, + Mode_6N2 = US_MR_CHRL_6_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT, + Mode_7N2 = US_MR_CHRL_7_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT, + Mode_5E1 = US_MR_CHRL_5_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT, + Mode_6E1 = US_MR_CHRL_6_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT, + Mode_7E1 = US_MR_CHRL_7_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT, + Mode_5E2 = US_MR_CHRL_5_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT, + Mode_6E2 = US_MR_CHRL_6_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT, + Mode_7E2 = US_MR_CHRL_7_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT, + Mode_5O1 = US_MR_CHRL_5_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT, + Mode_6O1 = US_MR_CHRL_6_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT, + Mode_7O1 = US_MR_CHRL_7_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT, + Mode_5O2 = US_MR_CHRL_5_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT, + Mode_6O2 = US_MR_CHRL_6_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT, + Mode_7O2 = US_MR_CHRL_7_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT, + }; + USARTClass( Usart* pUsart, IRQn_Type dwIrq, uint32_t dwId, RingBuffer* pRx_buffer, RingBuffer* pTx_buffer ); - void begin( const uint32_t dwBaudRate , const uint32_t config ); + void begin( const uint32_t dwBaudRate , const USARTModes config ); using UARTClass::begin; // Needed only for polymorphic methods }; From 7e9cf6d612099a67c0856be04c7d7027fda970e9 Mon Sep 17 00:00:00 2001 From: Chris Date: Fri, 9 Jan 2015 20:25:09 +0000 Subject: [PATCH 2/3] sam: updated UART/USART modes --- .../arduino/sam/cores/arduino/UARTClass.cpp | 2 +- .../arduino/sam/cores/arduino/UARTClass.h | 17 ++++---- .../arduino/sam/cores/arduino/USARTClass.h | 39 ++++++++++++++++++- 3 files changed, 46 insertions(+), 12 deletions(-) diff --git a/hardware/arduino/sam/cores/arduino/UARTClass.cpp b/hardware/arduino/sam/cores/arduino/UARTClass.cpp index c81af2cac..93db26272 100644 --- a/hardware/arduino/sam/cores/arduino/UARTClass.cpp +++ b/hardware/arduino/sam/cores/arduino/UARTClass.cpp @@ -57,7 +57,7 @@ void UARTClass::init(const uint32_t dwBaudRate, const uint32_t config) _pUart->UART_CR = UART_CR_RSTRX | UART_CR_RSTTX | UART_CR_RXDIS | UART_CR_TXDIS; // Configure mode - _pUart->UART_MR = config | US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHMODE_NORMAL; + _pUart->UART_MR = (config & 0x00000E00) | UART_MR_CHMODE_NORMAL; // Configure baudrate (asynchronous, no oversampling) _pUart->UART_BRGR = (SystemCoreClock / dwBaudRate) >> 4; diff --git a/hardware/arduino/sam/cores/arduino/UARTClass.h b/hardware/arduino/sam/cores/arduino/UARTClass.h index 45dc5197d..d86d04dc4 100644 --- a/hardware/arduino/sam/cores/arduino/UARTClass.h +++ b/hardware/arduino/sam/cores/arduino/UARTClass.h @@ -26,22 +26,21 @@ #include #define SERIAL_8N1 UARTClass::Mode_8N1 -#define SERIAL_8N2 UARTClass::Mode_8N2 #define SERIAL_8E1 UARTClass::Mode_8E1 -#define SERIAL_8E2 UARTClass::Mode_8E2 #define SERIAL_8O1 UARTClass::Mode_8O1 -#define SERIAL_8O2 UARTClass::Mode_8O2 +#define SERIAL_8M1 UARTClass::Mode_8M1 +#define SERIAL_8S1 UARTClass::Mode_8S1 + class UARTClass : public HardwareSerial { public: enum UARTModes { - Mode_8N1 = US_MR_CHRL_8_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT, - Mode_8N2 = US_MR_CHRL_8_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT, - Mode_8E1 = US_MR_CHRL_8_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT, - Mode_8E2 = US_MR_CHRL_8_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT, - Mode_8O1 = US_MR_CHRL_8_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT, - Mode_8O2 = US_MR_CHRL_8_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT, + Mode_8N1 = US_MR_CHRL_8_BIT | US_MR_NBSTOP_1_BIT | UART_MR_PAR_NO, + Mode_8E1 = US_MR_CHRL_8_BIT | US_MR_NBSTOP_1_BIT | UART_MR_PAR_EVEN, + Mode_8O1 = US_MR_CHRL_8_BIT | US_MR_NBSTOP_1_BIT | UART_MR_PAR_ODD, + Mode_8M1 = US_MR_CHRL_8_BIT | US_MR_NBSTOP_1_BIT | UART_MR_PAR_MARK, + Mode_8S1 = US_MR_CHRL_8_BIT | US_MR_NBSTOP_1_BIT | UART_MR_PAR_SPACE, }; UARTClass(Uart* pUart, IRQn_Type dwIrq, uint32_t dwId, RingBuffer* pRx_buffer, RingBuffer* pTx_buffer); diff --git a/hardware/arduino/sam/cores/arduino/USARTClass.h b/hardware/arduino/sam/cores/arduino/USARTClass.h index 27152318c..899488016 100644 --- a/hardware/arduino/sam/cores/arduino/USARTClass.h +++ b/hardware/arduino/sam/cores/arduino/USARTClass.h @@ -32,18 +32,36 @@ #define SERIAL_5N2 USARTClass::Mode_5N2 #define SERIAL_6N2 USARTClass::Mode_6N2 #define SERIAL_7N2 USARTClass::Mode_7N2 +#define SERIAL_8N2 USARTClass::Mode_8N2 #define SERIAL_5E1 USARTClass::Mode_5E1 #define SERIAL_6E1 USARTClass::Mode_6E1 #define SERIAL_7E1 USARTClass::Mode_7E1 #define SERIAL_5E2 USARTClass::Mode_5E2 #define SERIAL_6E2 USARTClass::Mode_6E2 #define SERIAL_7E2 USARTClass::Mode_7E2 +#define SERIAL_8E2 USARTClass::Mode_8E2 #define SERIAL_5O1 USARTClass::Mode_5O1 #define SERIAL_6O1 USARTClass::Mode_6O1 #define SERIAL_7O1 USARTClass::Mode_7O1 #define SERIAL_5O2 USARTClass::Mode_5O2 #define SERIAL_6O2 USARTClass::Mode_6O2 #define SERIAL_7O2 USARTClass::Mode_7O2 +#define SERIAL_8O2 USARTClass::Mode_8O2 +#define SERIAL_5M1 USARTClass::Mode_5M1 +#define SERIAL_6M1 USARTClass::Mode_6M1 +#define SERIAL_7M1 USARTClass::Mode_7M1 +#define SERIAL_5M2 USARTClass::Mode_5M2 +#define SERIAL_6M2 USARTClass::Mode_6M2 +#define SERIAL_7M2 USARTClass::Mode_7M2 +#define SERIAL_8M2 USARTClass::Mode_8M2 +#define SERIAL_5S1 USARTClass::Mode_5S1 +#define SERIAL_6S1 USARTClass::Mode_6S1 +#define SERIAL_7S1 USARTClass::Mode_7S1 +#define SERIAL_5S2 USARTClass::Mode_5S2 +#define SERIAL_6S2 USARTClass::Mode_6S2 +#define SERIAL_7S2 USARTClass::Mode_7S2 +#define SERIAL_8S2 USARTClass::Mode_8S2 + class USARTClass : public UARTClass { @@ -59,19 +77,36 @@ class USARTClass : public UARTClass Mode_5N2 = US_MR_CHRL_5_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT, Mode_6N2 = US_MR_CHRL_6_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT, Mode_7N2 = US_MR_CHRL_7_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT, + Mode_8N2 = US_MR_CHRL_8_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT, Mode_5E1 = US_MR_CHRL_5_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT, Mode_6E1 = US_MR_CHRL_6_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT, Mode_7E1 = US_MR_CHRL_7_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT, Mode_5E2 = US_MR_CHRL_5_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT, Mode_6E2 = US_MR_CHRL_6_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT, Mode_7E2 = US_MR_CHRL_7_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT, - Mode_5O1 = US_MR_CHRL_5_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT, + Mode_8E2 = US_MR_CHRL_8_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT, + Mode_5O1 = US_MR_CHRL_5_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT, Mode_6O1 = US_MR_CHRL_6_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT, Mode_7O1 = US_MR_CHRL_7_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT, Mode_5O2 = US_MR_CHRL_5_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT, Mode_6O2 = US_MR_CHRL_6_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT, Mode_7O2 = US_MR_CHRL_7_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT, - }; + Mode_8O2 = US_MR_CHRL_8_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT, + Mode_5M1 = US_MR_CHRL_5_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_1_BIT, + Mode_6M1 = US_MR_CHRL_6_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_1_BIT, + Mode_7M1 = US_MR_CHRL_7_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_1_BIT, + Mode_5M2 = US_MR_CHRL_5_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT, + Mode_6M2 = US_MR_CHRL_6_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT, + Mode_7M2 = US_MR_CHRL_7_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT, + Mode_8M2 = US_MR_CHRL_8_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT, + Mode_5S1 = US_MR_CHRL_5_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_1_BIT, + Mode_6S1 = US_MR_CHRL_6_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_1_BIT, + Mode_7S1 = US_MR_CHRL_7_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_1_BIT, + Mode_5S2 = US_MR_CHRL_5_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT, + Mode_6S2 = US_MR_CHRL_6_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT, + Mode_7S2 = US_MR_CHRL_7_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT, + Mode_8S2 = US_MR_CHRL_8_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT, + }; USARTClass( Usart* pUsart, IRQn_Type dwIrq, uint32_t dwId, RingBuffer* pRx_buffer, RingBuffer* pTx_buffer ); From 00f23d3aad7fa30e6e4b08ebd13333d87c1a65c8 Mon Sep 17 00:00:00 2001 From: Cristian Maglie Date: Wed, 14 Jan 2015 00:08:59 +0100 Subject: [PATCH 3/3] sam: Fixed initialization of UART/USART mode register --- .../arduino/sam/cores/arduino/UARTClass.cpp | 9 +- .../arduino/sam/cores/arduino/UARTClass.h | 4 +- .../arduino/sam/cores/arduino/USARTClass.cpp | 18 +++- .../arduino/sam/cores/arduino/USARTClass.h | 91 ++++++++++--------- 4 files changed, 69 insertions(+), 53 deletions(-) diff --git a/hardware/arduino/sam/cores/arduino/UARTClass.cpp b/hardware/arduino/sam/cores/arduino/UARTClass.cpp index 93db26272..f8b80e970 100644 --- a/hardware/arduino/sam/cores/arduino/UARTClass.cpp +++ b/hardware/arduino/sam/cores/arduino/UARTClass.cpp @@ -35,17 +35,18 @@ UARTClass::UARTClass( Uart *pUart, IRQn_Type dwIrq, uint32_t dwId, RingBuffer *p // Public Methods ////////////////////////////////////////////////////////////// -void UARTClass::begin( const uint32_t dwBaudRate ) +void UARTClass::begin(const uint32_t dwBaudRate) { begin(dwBaudRate, Mode_8N1); } void UARTClass::begin(const uint32_t dwBaudRate, const UARTModes config) { - init(dwBaudRate, static_cast(config)); + uint32_t modeReg = static_cast(config) & 0x00000E00; + init(dwBaudRate, modeReg | UART_MR_CHMODE_NORMAL); } -void UARTClass::init(const uint32_t dwBaudRate, const uint32_t config) +void UARTClass::init(const uint32_t dwBaudRate, const uint32_t modeReg) { // Configure PMC pmc_enable_periph_clk( _dwId ); @@ -57,7 +58,7 @@ void UARTClass::init(const uint32_t dwBaudRate, const uint32_t config) _pUart->UART_CR = UART_CR_RSTRX | UART_CR_RSTTX | UART_CR_RXDIS | UART_CR_TXDIS; // Configure mode - _pUart->UART_MR = (config & 0x00000E00) | UART_MR_CHMODE_NORMAL; + _pUart->UART_MR = modeReg; // Configure baudrate (asynchronous, no oversampling) _pUart->UART_BRGR = (SystemCoreClock / dwBaudRate) >> 4; diff --git a/hardware/arduino/sam/cores/arduino/UARTClass.h b/hardware/arduino/sam/cores/arduino/UARTClass.h index d86d04dc4..3747d8beb 100644 --- a/hardware/arduino/sam/cores/arduino/UARTClass.h +++ b/hardware/arduino/sam/cores/arduino/UARTClass.h @@ -39,8 +39,8 @@ class UARTClass : public HardwareSerial Mode_8N1 = US_MR_CHRL_8_BIT | US_MR_NBSTOP_1_BIT | UART_MR_PAR_NO, Mode_8E1 = US_MR_CHRL_8_BIT | US_MR_NBSTOP_1_BIT | UART_MR_PAR_EVEN, Mode_8O1 = US_MR_CHRL_8_BIT | US_MR_NBSTOP_1_BIT | UART_MR_PAR_ODD, - Mode_8M1 = US_MR_CHRL_8_BIT | US_MR_NBSTOP_1_BIT | UART_MR_PAR_MARK, - Mode_8S1 = US_MR_CHRL_8_BIT | US_MR_NBSTOP_1_BIT | UART_MR_PAR_SPACE, + Mode_8M1 = US_MR_CHRL_8_BIT | US_MR_NBSTOP_1_BIT | UART_MR_PAR_MARK, + Mode_8S1 = US_MR_CHRL_8_BIT | US_MR_NBSTOP_1_BIT | UART_MR_PAR_SPACE, }; UARTClass(Uart* pUart, IRQn_Type dwIrq, uint32_t dwId, RingBuffer* pRx_buffer, RingBuffer* pTx_buffer); diff --git a/hardware/arduino/sam/cores/arduino/USARTClass.cpp b/hardware/arduino/sam/cores/arduino/USARTClass.cpp index 428ac39ed..10a6d175c 100644 --- a/hardware/arduino/sam/cores/arduino/USARTClass.cpp +++ b/hardware/arduino/sam/cores/arduino/USARTClass.cpp @@ -32,8 +32,22 @@ USARTClass::USARTClass( Usart* pUsart, IRQn_Type dwIrq, uint32_t dwId, RingBuffe // Public Methods ////////////////////////////////////////////////////////////// -void USARTClass::begin( const uint32_t dwBaudRate, const USARTModes config ) +void USARTClass::begin(const uint32_t dwBaudRate) { - UARTClass::init(dwBaudRate, static_cast(config)); + begin(dwBaudRate, Mode_8N1); +} + +void USARTClass::begin(const uint32_t dwBaudRate, const UARTModes config) +{ + uint32_t modeReg = static_cast(config); + modeReg |= US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHMODE_NORMAL; + init(dwBaudRate, modeReg); +} + +void USARTClass::begin(const uint32_t dwBaudRate, const USARTModes config) +{ + uint32_t modeReg = static_cast(config); + modeReg |= US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHMODE_NORMAL; + init(dwBaudRate, modeReg); } diff --git a/hardware/arduino/sam/cores/arduino/USARTClass.h b/hardware/arduino/sam/cores/arduino/USARTClass.h index 899488016..5d5704990 100644 --- a/hardware/arduino/sam/cores/arduino/USARTClass.h +++ b/hardware/arduino/sam/cores/arduino/USARTClass.h @@ -65,53 +65,54 @@ class USARTClass : public UARTClass { + public: + // 8x1 bit modes are inherited from UARTClass + enum USARTModes { + Mode_5N1 = US_MR_CHRL_5_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT, + Mode_6N1 = US_MR_CHRL_6_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT, + Mode_7N1 = US_MR_CHRL_7_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT, + Mode_5N2 = US_MR_CHRL_5_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT, + Mode_6N2 = US_MR_CHRL_6_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT, + Mode_7N2 = US_MR_CHRL_7_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT, + Mode_8N2 = US_MR_CHRL_8_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT, + Mode_5E1 = US_MR_CHRL_5_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT, + Mode_6E1 = US_MR_CHRL_6_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT, + Mode_7E1 = US_MR_CHRL_7_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT, + Mode_5E2 = US_MR_CHRL_5_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT, + Mode_6E2 = US_MR_CHRL_6_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT, + Mode_7E2 = US_MR_CHRL_7_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT, + Mode_8E2 = US_MR_CHRL_8_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT, + Mode_5O1 = US_MR_CHRL_5_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT, + Mode_6O1 = US_MR_CHRL_6_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT, + Mode_7O1 = US_MR_CHRL_7_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT, + Mode_5O2 = US_MR_CHRL_5_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT, + Mode_6O2 = US_MR_CHRL_6_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT, + Mode_7O2 = US_MR_CHRL_7_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT, + Mode_8O2 = US_MR_CHRL_8_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT, + Mode_5M1 = US_MR_CHRL_5_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_1_BIT, + Mode_6M1 = US_MR_CHRL_6_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_1_BIT, + Mode_7M1 = US_MR_CHRL_7_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_1_BIT, + Mode_5M2 = US_MR_CHRL_5_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT, + Mode_6M2 = US_MR_CHRL_6_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT, + Mode_7M2 = US_MR_CHRL_7_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT, + Mode_8M2 = US_MR_CHRL_8_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT, + Mode_5S1 = US_MR_CHRL_5_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_1_BIT, + Mode_6S1 = US_MR_CHRL_6_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_1_BIT, + Mode_7S1 = US_MR_CHRL_7_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_1_BIT, + Mode_5S2 = US_MR_CHRL_5_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT, + Mode_6S2 = US_MR_CHRL_6_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT, + Mode_7S2 = US_MR_CHRL_7_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT, + Mode_8S2 = US_MR_CHRL_8_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT, + }; + + USARTClass(Usart* pUsart, IRQn_Type dwIrq, uint32_t dwId, RingBuffer* pRx_buffer, RingBuffer* pTx_buffer); + + void begin(const uint32_t dwBaudRate); + void begin(const uint32_t dwBaudRate, const USARTModes config); + void begin(const uint32_t dwBaudRate, const UARTModes config); + protected: Usart* _pUsart; - - public: - // 8 bit modes are inherited from UARTClass - enum USARTModes { - Mode_5N1 = US_MR_CHRL_5_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT, - Mode_6N1 = US_MR_CHRL_6_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT, - Mode_7N1 = US_MR_CHRL_7_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT, - Mode_5N2 = US_MR_CHRL_5_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT, - Mode_6N2 = US_MR_CHRL_6_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT, - Mode_7N2 = US_MR_CHRL_7_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT, - Mode_8N2 = US_MR_CHRL_8_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT, - Mode_5E1 = US_MR_CHRL_5_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT, - Mode_6E1 = US_MR_CHRL_6_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT, - Mode_7E1 = US_MR_CHRL_7_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT, - Mode_5E2 = US_MR_CHRL_5_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT, - Mode_6E2 = US_MR_CHRL_6_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT, - Mode_7E2 = US_MR_CHRL_7_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT, - Mode_8E2 = US_MR_CHRL_8_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT, - Mode_5O1 = US_MR_CHRL_5_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT, - Mode_6O1 = US_MR_CHRL_6_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT, - Mode_7O1 = US_MR_CHRL_7_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT, - Mode_5O2 = US_MR_CHRL_5_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT, - Mode_6O2 = US_MR_CHRL_6_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT, - Mode_7O2 = US_MR_CHRL_7_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT, - Mode_8O2 = US_MR_CHRL_8_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT, - Mode_5M1 = US_MR_CHRL_5_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_1_BIT, - Mode_6M1 = US_MR_CHRL_6_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_1_BIT, - Mode_7M1 = US_MR_CHRL_7_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_1_BIT, - Mode_5M2 = US_MR_CHRL_5_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT, - Mode_6M2 = US_MR_CHRL_6_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT, - Mode_7M2 = US_MR_CHRL_7_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT, - Mode_8M2 = US_MR_CHRL_8_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT, - Mode_5S1 = US_MR_CHRL_5_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_1_BIT, - Mode_6S1 = US_MR_CHRL_6_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_1_BIT, - Mode_7S1 = US_MR_CHRL_7_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_1_BIT, - Mode_5S2 = US_MR_CHRL_5_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT, - Mode_6S2 = US_MR_CHRL_6_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT, - Mode_7S2 = US_MR_CHRL_7_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT, - Mode_8S2 = US_MR_CHRL_8_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT, - }; - - USARTClass( Usart* pUsart, IRQn_Type dwIrq, uint32_t dwId, RingBuffer* pRx_buffer, RingBuffer* pTx_buffer ); - - void begin( const uint32_t dwBaudRate , const USARTModes config ); - using UARTClass::begin; // Needed only for polymorphic methods }; #endif // _USART_CLASS_