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Code Issues Releases Activity

implement Wire.end() for SAM core

Browse Source 
also moved common reset and disable code in libsam TWI_ConfigureMaster
and TWI_ConfigureSlave functions to new TWI_Disable function, which is
used in TwoWire::end()
This commit is contained in:
Sandeep Mistry 2015-08-26 15:13:59 -04:00
parent f5c1084f5f
commit 2737305f54
6 changed files with 68 additions and 51 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
hardware/arduino/sam/libraries/Wire/Wire.cpp
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@ -126,6 +126,10 @@ void TwoWire::begin(int address) {
begin((uint8_t) address); begin((uint8_t) address);
} }
void TwoWire::end(void) {
TWI_Disable(twi);
}
void TwoWire::setClock(uint32_t frequency) { void TwoWire::setClock(uint32_t frequency) {
twiClock = frequency; twiClock = frequency;
TWI_SetClock(twi, twiClock, VARIANT_MCK); TWI_SetClock(twi, twiClock, VARIANT_MCK);

4
hardware/arduino/sam/libraries/Wire/Wire.h
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@ -29,12 +29,16 @@
#define BUFFER_LENGTH 32 #define BUFFER_LENGTH 32
// WIRE_HAS_END means Wire has end()
#define WIRE_HAS_END 1
class TwoWire : public Stream { class TwoWire : public Stream {
public: public:
TwoWire(Twi *twi, void(*begin_cb)(void)); TwoWire(Twi *twi, void(*begin_cb)(void));
void begin(); void begin();
void begin(uint8_t); void begin(uint8_t);
void begin(int); void begin(int);
void end();
void setClock(uint32_t); void setClock(uint32_t);
void beginTransmission(uint8_t); void beginTransmission(uint8_t);
void beginTransmission(int); void beginTransmission(int);

2
hardware/arduino/sam/system/libsam/include/twi.h
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@ -71,6 +71,8 @@ extern void TWI_SetClock( Twi *pTwi, uint32_t dwTwCk, uint32_t dwMCk );
extern void TWI_ConfigureSlave(Twi *pTwi, uint8_t slaveAddress); extern void TWI_ConfigureSlave(Twi *pTwi, uint8_t slaveAddress);
extern void TWI_Disable(Twi *pTwi);
extern void TWI_Stop(Twi *pTwi); extern void TWI_Stop(Twi *pTwi);
extern void TWI_StartRead( extern void TWI_StartRead(

38
hardware/arduino/sam/system/libsam/source/twi.c
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@ -100,13 +100,8 @@ void TWI_ConfigureMaster( Twi* pTwi, uint32_t dwTwCk, uint32_t dwMCk )
/* SVEN: TWI Slave Mode Enabled */ /* SVEN: TWI Slave Mode Enabled */
pTwi->TWI_CR = TWI_CR_SVEN ; pTwi->TWI_CR = TWI_CR_SVEN ;
/* Reset the TWI */
pTwi->TWI_CR = TWI_CR_SWRST ;
pTwi->TWI_RHR ;
/* TWI Slave Mode Disabled, TWI Master Mode Disabled. */ TWI_Disable(pTwi);
pTwi->TWI_CR = TWI_CR_SVDIS ;
pTwi->TWI_CR = TWI_CR_MSDIS ;
/* Set master mode */ /* Set master mode */
pTwi->TWI_CR = TWI_CR_MSEN ; pTwi->TWI_CR = TWI_CR_MSEN ;
@ -156,15 +151,7 @@ void TWI_ConfigureSlave(Twi *pTwi, uint8_t slaveAddress)
{ {
uint32_t i; uint32_t i;
/* TWI software reset */ TWI_Disable(pTwi);
pTwi->TWI_CR = TWI_CR_SWRST;
pTwi->TWI_RHR;
/* Wait at least 10 ms */
for (i=0; i < 1000000; i++);
/* TWI Slave Mode Disabled, TWI Master Mode Disabled*/
pTwi->TWI_CR = TWI_CR_SVDIS | TWI_CR_MSDIS;
/* Configure slave address. */ /* Configure slave address. */
pTwi->TWI_SMR = 0; pTwi->TWI_SMR = 0;
@ -178,6 +165,27 @@ void TWI_ConfigureSlave(Twi *pTwi, uint8_t slaveAddress)
assert( (pTwi->TWI_CR & TWI_CR_SVDIS)!= TWI_CR_SVDIS ) ; assert( (pTwi->TWI_CR & TWI_CR_SVDIS)!= TWI_CR_SVDIS ) ;
} }
/**
* \brief Disables the TWI.
* \param pTwi Pointer to an Twi instance.
*/
void TWI_Disable(Twi *pTwi)
{
assert( pTwi ) ;
uint32_t i;
/* TWI software reset */
pTwi->TWI_CR = TWI_CR_SWRST;
pTwi->TWI_RHR;
/* Wait at least 10 ms */
for (i=0; i < 1000000; i++);
/* TWI Slave Mode Disabled, TWI Master Mode Disabled*/
pTwi->TWI_CR = TWI_CR_SVDIS | TWI_CR_MSDIS;
}
/** /**
* \brief Sends a STOP condition on the TWI. * \brief Sends a STOP condition on the TWI.
* \param pTwi Pointer to an Twi instance. * \param pTwi Pointer to an Twi instance.

BIN
hardware/arduino/sam/variants/arduino_due_x/libsam_sam3x8e_gcc_rel.a
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Binary file not shown.

71
hardware/arduino/sam/variants/arduino_due_x/libsam_sam3x8e_gcc_rel.a.txt
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@ -72,7 +72,6 @@ pmc.o:
00000000 T pmc_switch_udpck_to_upllck 00000000 T pmc_switch_udpck_to_upllck
pwmc.o: pwmc.o:
00000000 r C.9.8054
00000000 t FindClockConfiguration 00000000 t FindClockConfiguration
00000000 T PWMC_ConfigureChannel 00000000 T PWMC_ConfigureChannel
00000000 T PWMC_ConfigureChannelExt 00000000 T PWMC_ConfigureChannelExt
@ -100,14 +99,14 @@ pwmc.o:
00000000 T PWMC_SetSyncChannelUpdateUnlock 00000000 T PWMC_SetSyncChannelUpdateUnlock
00000000 T PWMC_WriteBuffer 00000000 T PWMC_WriteBuffer
U __assert_func U __assert_func
00000000 r __func__.6635 00000000 r __func__.6793
00000000 r __func__.6646 00000000 r __func__.6804
00000000 r __func__.6661 00000000 r __func__.6819
00000000 r __func__.6672 00000000 r __func__.6830
00000000 r __func__.6683 00000000 r __func__.6841
00000000 r __func__.6690 00000000 r __func__.6848
00000000 r __func__.6774 00000000 r __func__.6932
00000000 r __func__.6780 00000000 r __func__.6938
rtc.o: rtc.o:
00000000 T RTC_ClearSCCR 00000000 T RTC_ClearSCCR
@ -123,9 +122,9 @@ rtc.o:
00000000 T RTC_SetTime 00000000 T RTC_SetTime
00000000 T RTC_SetTimeAlarm 00000000 T RTC_SetTimeAlarm
U __assert_func U __assert_func
00000000 r __func__.6632 00000000 r __func__.6790
00000000 r __func__.6641 00000000 r __func__.6799
00000000 r __func__.6646 00000000 r __func__.6804
rtt.o: rtt.o:
00000000 T RTT_EnableIT 00000000 T RTT_EnableIT
@ -134,8 +133,8 @@ rtt.o:
00000000 T RTT_SetAlarm 00000000 T RTT_SetAlarm
00000000 T RTT_SetPrescaler 00000000 T RTT_SetPrescaler
U __assert_func U __assert_func
00000000 r __func__.6639 00000000 r __func__.6797
00000000 r __func__.6647 00000000 r __func__.6805
spi.o: spi.o:
00000000 T SPI_Configure 00000000 T SPI_Configure
@ -161,9 +160,9 @@ tc.o:
00000000 T TC_Start 00000000 T TC_Start
00000000 T TC_Stop 00000000 T TC_Stop
U __assert_func U __assert_func
00000000 r __func__.6634 00000000 r __func__.6792
00000000 r __func__.6640 00000000 r __func__.6798
00000000 r __func__.6646 00000000 r __func__.6804
timetick.o: timetick.o:
00000000 T GetTickCount 00000000 T GetTickCount
@ -178,6 +177,7 @@ twi.o:
00000000 T TWI_ByteSent 00000000 T TWI_ByteSent
00000000 T TWI_ConfigureMaster 00000000 T TWI_ConfigureMaster
00000000 T TWI_ConfigureSlave 00000000 T TWI_ConfigureSlave
00000000 T TWI_Disable
00000000 T TWI_DisableIt 00000000 T TWI_DisableIt
00000000 T TWI_EnableIt 00000000 T TWI_EnableIt
00000000 T TWI_GetMaskedStatus 00000000 T TWI_GetMaskedStatus
@ -191,19 +191,20 @@ twi.o:
00000000 T TWI_TransferComplete 00000000 T TWI_TransferComplete
00000000 T TWI_WriteByte 00000000 T TWI_WriteByte
U __assert_func U __assert_func
00000000 r __func__.7004 00000000 r __func__.7151
00000000 r __func__.7010 00000000 r __func__.7157
00000000 r __func__.7028 00000000 r __func__.7172
00000000 r __func__.7032 00000000 r __func__.7176
00000000 r __func__.7039 00000000 r __func__.7184
00000000 r __func__.7043 00000000 r __func__.7191
00000000 r __func__.7048 00000000 r __func__.7195
00000000 r __func__.7056 00000000 r __func__.7200
00000000 r __func__.7070 00000000 r __func__.7208
00000000 r __func__.7075 00000000 r __func__.7222
00000000 r __func__.7079 00000000 r __func__.7227
00000000 r __func__.7084 00000000 r __func__.7231
00000000 r __func__.7088 00000000 r __func__.7236
00000000 r __func__.7240
usart.o: usart.o:
00000000 T USART_Configure 00000000 T USART_Configure
@ -222,7 +223,7 @@ usart.o:
00000000 T USART_Write 00000000 T USART_Write
00000000 T USART_WriteBuffer 00000000 T USART_WriteBuffer
U __assert_func U __assert_func
00000000 r __func__.6928 00000000 r __func__.7068
wdt.o: wdt.o:
00000000 T WDT_Disable 00000000 T WDT_Disable
@ -300,7 +301,6 @@ startup_sam3xa.o:
U main U main
adc.o: adc.o:
00000000 r C.0.8146
00000000 T adc_configure_power_save 00000000 T adc_configure_power_save
00000000 T adc_configure_sequence 00000000 T adc_configure_sequence
00000000 T adc_configure_timing 00000000 T adc_configure_timing
@ -485,12 +485,12 @@ efc.o:
00000000 T efc_get_wait_state 00000000 T efc_get_wait_state
00000000 T efc_init 00000000 T efc_init
00000000 T efc_perform_command 00000000 T efc_perform_command
00000070 T efc_perform_fcr 0000006c T efc_perform_fcr
00000000 T efc_perform_read_sequence 00000000 T efc_perform_read_sequence
00000000 T efc_set_flash_access_mode 00000000 T efc_set_flash_access_mode
00000000 T efc_set_wait_state 00000000 T efc_set_wait_state
0000006c T efc_write_fmr 00000068 T efc_write_fmr
00000000 b iap_perform_command.6909 00000000 b iap_perform_command.7049
gpbr.o: gpbr.o:
00000000 T gpbr_read 00000000 T gpbr_read
@ -568,7 +568,6 @@ emac.o:
00000000 T emac_phy_write 00000000 T emac_phy_write
00000000 t emac_reset_rx_mem 00000000 t emac_reset_rx_mem
00000000 t emac_reset_tx_mem 00000000 t emac_reset_tx_mem
00000000 t emac_wait_phy.clone.1
00000000 b gs_rx_desc 00000000 b gs_rx_desc
00000000 b gs_tx_callback 00000000 b gs_tx_callback
00000000 b gs_tx_desc 00000000 b gs_tx_desc