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mirror of https://github.com/arduino/Arduino.git synced 2025-02-27 21:54:30 +01:00

Merge branch 'due_wire_setClock' into ide-1.5.x

This commit is contained in:
Cristian Maglie 2014-07-06 00:38:06 +02:00
commit 4068eec351
7 changed files with 60 additions and 39 deletions

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@ -95,8 +95,7 @@ static inline bool TWI_STATUS_NACK(uint32_t status) {
TwoWire::TwoWire(Twi *_twi, void(*_beginCb)(void)) : TwoWire::TwoWire(Twi *_twi, void(*_beginCb)(void)) :
twi(_twi), rxBufferIndex(0), rxBufferLength(0), txAddress(0), twi(_twi), rxBufferIndex(0), rxBufferLength(0), txAddress(0),
txBufferLength(0), srvBufferIndex(0), srvBufferLength(0), status( txBufferLength(0), srvBufferIndex(0), srvBufferLength(0), status(
UNINITIALIZED), onBeginCallback(_beginCb) { UNINITIALIZED), onBeginCallback(_beginCb), twiClock(TWI_CLOCK) {
// Empty
} }
void TwoWire::begin(void) { void TwoWire::begin(void) {
@ -106,7 +105,7 @@ void TwoWire::begin(void) {
// Disable PDC channel // Disable PDC channel
twi->TWI_PTCR = UART_PTCR_RXTDIS | UART_PTCR_TXTDIS; twi->TWI_PTCR = UART_PTCR_RXTDIS | UART_PTCR_TXTDIS;
TWI_ConfigureMaster(twi, TWI_CLOCK, VARIANT_MCK); TWI_ConfigureMaster(twi, twiClock, VARIANT_MCK);
status = MASTER_IDLE; status = MASTER_IDLE;
} }
@ -127,6 +126,11 @@ void TwoWire::begin(int address) {
begin((uint8_t) address); begin((uint8_t) address);
} }
void TwoWire::setClock(uint32_t frequency) {
twiClock = frequency;
TWI_SetClock(twi, twiClock, VARIANT_MCK);
}
uint8_t TwoWire::requestFrom(uint8_t address, uint8_t quantity, uint8_t sendStop) { uint8_t TwoWire::requestFrom(uint8_t address, uint8_t quantity, uint8_t sendStop) {
if (quantity > BUFFER_LENGTH) if (quantity > BUFFER_LENGTH)
quantity = BUFFER_LENGTH; quantity = BUFFER_LENGTH;

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@ -35,6 +35,7 @@ public:
void begin(); void begin();
void begin(uint8_t); void begin(uint8_t);
void begin(int); void begin(int);
void setClock(uint32_t);
void beginTransmission(uint8_t); void beginTransmission(uint8_t);
void beginTransmission(int); void beginTransmission(int);
uint8_t endTransmission(void); uint8_t endTransmission(void);
@ -100,6 +101,7 @@ private:
// TWI clock frequency // TWI clock frequency
static const uint32_t TWI_CLOCK = 100000; static const uint32_t TWI_CLOCK = 100000;
uint32_t twiClock;
// Timeouts ( // Timeouts (
static const uint32_t RECV_TIMEOUT = 100000; static const uint32_t RECV_TIMEOUT = 100000;

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@ -11,6 +11,7 @@
####################################### #######################################
begin KEYWORD2 begin KEYWORD2
setClock KEYWORD2
beginTransmission KEYWORD2 beginTransmission KEYWORD2
endTransmission KEYWORD2 endTransmission KEYWORD2
requestFrom KEYWORD2 requestFrom KEYWORD2

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@ -67,6 +67,8 @@
extern void TWI_ConfigureMaster(Twi *pTwi, uint32_t twck, uint32_t mck); extern void TWI_ConfigureMaster(Twi *pTwi, uint32_t twck, uint32_t mck);
extern void TWI_SetClock( Twi *pTwi, uint32_t dwTwCk, uint32_t dwMCk );
extern void TWI_ConfigureSlave(Twi *pTwi, uint8_t slaveAddress); extern void TWI_ConfigureSlave(Twi *pTwi, uint8_t slaveAddress);
extern void TWI_Stop(Twi *pTwi); extern void TWI_Stop(Twi *pTwi);

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@ -96,10 +96,6 @@
*/ */
void TWI_ConfigureMaster( Twi* pTwi, uint32_t dwTwCk, uint32_t dwMCk ) void TWI_ConfigureMaster( Twi* pTwi, uint32_t dwTwCk, uint32_t dwMCk )
{ {
uint32_t dwCkDiv = 0 ;
uint32_t dwClDiv ;
uint32_t dwOk = 0 ;
assert( pTwi ) ; assert( pTwi ) ;
/* SVEN: TWI Slave Mode Enabled */ /* SVEN: TWI Slave Mode Enabled */
@ -115,6 +111,19 @@ void TWI_ConfigureMaster( Twi* pTwi, uint32_t dwTwCk, uint32_t dwMCk )
/* Set master mode */ /* Set master mode */
pTwi->TWI_CR = TWI_CR_MSEN ; pTwi->TWI_CR = TWI_CR_MSEN ;
/* Configure clock */
TWI_SetClock(pTwi, dwTwCk, dwMCk);
}
void TWI_SetClock( Twi *pTwi, uint32_t dwTwCk, uint32_t dwMCk )
{
assert( pTwi ) ;
uint32_t dwCkDiv = 0 ;
uint32_t dwClDiv ;
uint32_t dwOk = 0 ;
/* Configure clock */ /* Configure clock */
while ( !dwOk ) while ( !dwOk )
{ {
@ -137,6 +146,7 @@ void TWI_ConfigureMaster( Twi* pTwi, uint32_t dwTwCk, uint32_t dwMCk )
pTwi->TWI_CWGR = (dwCkDiv << 16) | (dwClDiv << 8) | dwClDiv ; pTwi->TWI_CWGR = (dwCkDiv << 16) | (dwClDiv << 8) | dwClDiv ;
} }
/** /**
* \brief Configures a TWI peripheral to operate in slave mode. * \brief Configures a TWI peripheral to operate in slave mode.
* \param pTwi Pointer to an Twi instance. * \param pTwi Pointer to an Twi instance.

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@ -72,7 +72,7 @@ pmc.o:
00000000 T pmc_switch_udpck_to_upllck 00000000 T pmc_switch_udpck_to_upllck
pwmc.o: pwmc.o:
00000000 r C.9.8049 00000000 r C.9.8054
00000000 t FindClockConfiguration 00000000 t FindClockConfiguration
00000000 T PWMC_ConfigureChannel 00000000 T PWMC_ConfigureChannel
00000000 T PWMC_ConfigureChannelExt 00000000 T PWMC_ConfigureChannelExt
@ -100,14 +100,14 @@ pwmc.o:
00000000 T PWMC_SetSyncChannelUpdateUnlock 00000000 T PWMC_SetSyncChannelUpdateUnlock
00000000 T PWMC_WriteBuffer 00000000 T PWMC_WriteBuffer
U __assert_func U __assert_func
00000000 r __func__.6631 00000000 r __func__.6635
00000000 r __func__.6642 00000000 r __func__.6646
00000000 r __func__.6657 00000000 r __func__.6661
00000000 r __func__.6668 00000000 r __func__.6672
00000000 r __func__.6679 00000000 r __func__.6683
00000000 r __func__.6686 00000000 r __func__.6690
00000000 r __func__.6770 00000000 r __func__.6774
00000000 r __func__.6776 00000000 r __func__.6780
rtc.o: rtc.o:
00000000 T RTC_ClearSCCR 00000000 T RTC_ClearSCCR
@ -123,9 +123,9 @@ rtc.o:
00000000 T RTC_SetTime 00000000 T RTC_SetTime
00000000 T RTC_SetTimeAlarm 00000000 T RTC_SetTimeAlarm
U __assert_func U __assert_func
00000000 r __func__.6628 00000000 r __func__.6632
00000000 r __func__.6637 00000000 r __func__.6641
00000000 r __func__.6642 00000000 r __func__.6646
rtt.o: rtt.o:
00000000 T RTT_EnableIT 00000000 T RTT_EnableIT
@ -134,8 +134,8 @@ rtt.o:
00000000 T RTT_SetAlarm 00000000 T RTT_SetAlarm
00000000 T RTT_SetPrescaler 00000000 T RTT_SetPrescaler
U __assert_func U __assert_func
00000000 r __func__.6635 00000000 r __func__.6639
00000000 r __func__.6643 00000000 r __func__.6647
spi.o: spi.o:
00000000 T SPI_Configure 00000000 T SPI_Configure
@ -161,9 +161,9 @@ tc.o:
00000000 T TC_Start 00000000 T TC_Start
00000000 T TC_Stop 00000000 T TC_Stop
U __assert_func U __assert_func
00000000 r __func__.6630 00000000 r __func__.6634
00000000 r __func__.6636 00000000 r __func__.6640
00000000 r __func__.6642 00000000 r __func__.6646
timetick.o: timetick.o:
00000000 T GetTickCount 00000000 T GetTickCount
@ -184,24 +184,26 @@ twi.o:
00000000 T TWI_GetStatus 00000000 T TWI_GetStatus
00000000 T TWI_ReadByte 00000000 T TWI_ReadByte
00000000 T TWI_SendSTOPCondition 00000000 T TWI_SendSTOPCondition
00000000 T TWI_SetClock
00000000 T TWI_StartRead 00000000 T TWI_StartRead
00000000 T TWI_StartWrite 00000000 T TWI_StartWrite
00000000 T TWI_Stop 00000000 T TWI_Stop
00000000 T TWI_TransferComplete 00000000 T TWI_TransferComplete
00000000 T TWI_WriteByte 00000000 T TWI_WriteByte
U __assert_func U __assert_func
00000000 r __func__.7003 00000000 r __func__.7004
00000000 r __func__.7018 00000000 r __func__.7010
00000000 r __func__.7022 00000000 r __func__.7028
00000000 r __func__.7029 00000000 r __func__.7032
00000000 r __func__.7033 00000000 r __func__.7039
00000000 r __func__.7038 00000000 r __func__.7043
00000000 r __func__.7046 00000000 r __func__.7048
00000000 r __func__.7060 00000000 r __func__.7056
00000000 r __func__.7065 00000000 r __func__.7070
00000000 r __func__.7069 00000000 r __func__.7075
00000000 r __func__.7074 00000000 r __func__.7079
00000000 r __func__.7078 00000000 r __func__.7084
00000000 r __func__.7088
usart.o: usart.o:
00000000 T USART_Configure 00000000 T USART_Configure
@ -220,7 +222,7 @@ usart.o:
00000000 T USART_Write 00000000 T USART_Write
00000000 T USART_WriteBuffer 00000000 T USART_WriteBuffer
U __assert_func U __assert_func
00000000 r __func__.6924 00000000 r __func__.6928
wdt.o: wdt.o:
00000000 T WDT_Disable 00000000 T WDT_Disable
@ -298,7 +300,7 @@ startup_sam3xa.o:
U main U main
adc.o: adc.o:
00000000 r C.0.8141 00000000 r C.0.8146
00000000 T adc_configure_power_save 00000000 T adc_configure_power_save
00000000 T adc_configure_sequence 00000000 T adc_configure_sequence
00000000 T adc_configure_timing 00000000 T adc_configure_timing
@ -488,7 +490,7 @@ efc.o:
00000000 T efc_set_flash_access_mode 00000000 T efc_set_flash_access_mode
00000000 T efc_set_wait_state 00000000 T efc_set_wait_state
0000006c T efc_write_fmr 0000006c T efc_write_fmr
00000000 b iap_perform_command.6905 00000000 b iap_perform_command.6909
gpbr.o: gpbr.o:
00000000 T gpbr_read 00000000 T gpbr_read