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[SAM] added missing interrupt files for libsam
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Thibault RICHARD
parent
8c1f9af9f5
commit
4658ab7468
165
hardware/arduino/sam/system/libsam/include/interrupt_sam_nvic.h
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165
hardware/arduino/sam/system/libsam/include/interrupt_sam_nvic.h
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/**
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* \file
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*
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* \brief Global interrupt management for SAM3 and SAM4 (NVIC based)
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*
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* Copyright (c) 2012 Atmel Corporation. All rights reserved.
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*
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* \asf_license_start
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. The name of Atmel may not be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* 4. This software may only be redistributed and used in connection with an
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* Atmel microcontroller product.
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*
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* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* \asf_license_stop
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*
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*/
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#ifndef UTILS_INTERRUPT_INTERRUPT_H
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#define UTILS_INTERRUPT_INTERRUPT_H
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#include "../chip.h"
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/**
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* \weakgroup interrupt_group
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*
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* @{
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*/
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/**
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* \name Interrupt Service Routine definition
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*
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* @{
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*/
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/**
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* \brief Define service routine
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*
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* \note For NVIC devices the interrupt service routines are predefined to
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* add to vector table in binary generation, so there is no service
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* register at run time. The routine collections are in exceptions.h.
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*
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* Usage:
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* \code
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* ISR(foo_irq_handler)
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* {
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* // Function definition
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* ...
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* }
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* \endcode
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*
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* \param func Name for the function.
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*/
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# define ISR(func) \
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void func (void)
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/**
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* \brief Initialize interrupt vectors
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*
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* For NVIC the interrupt vectors are put in vector table. So nothing
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* to do to initialize them, except defined the vector function with
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* right name.
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*
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* This must be called prior to \ref irq_register_handler.
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*/
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# define irq_initialize_vectors() \
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do { \
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} while(0)
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/**
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* \brief Register handler for interrupt
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*
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* For NVIC the interrupt vectors are put in vector table. So nothing
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* to do to register them, except defined the vector function with
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* right name.
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*
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* Usage:
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* \code
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* irq_initialize_vectors();
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* irq_register_handler(foo_irq_handler);
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* \endcode
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*
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* \note The function \a func must be defined with the \ref ISR macro.
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* \note The functions prototypes can be found in the device exception header
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* files (exceptions.h).
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*/
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# define irq_register_handler(...) \
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do { \
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} while(0)
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//@}
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# define cpu_irq_enable() \
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do { \
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g_interrupt_enabled = 1; \
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__DMB(); \
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__enable_irq(); \
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} while (0)
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# define cpu_irq_disable() \
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do { \
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__disable_irq(); \
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__DMB(); \
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g_interrupt_enabled = 0; \
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} while (0)
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typedef uint32_t irqflags_t;
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extern int g_interrupt_enabled;
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static inline irqflags_t cpu_irq_save(void)
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{
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irqflags_t flags = g_interrupt_enabled;
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cpu_irq_disable();
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return flags;
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}
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static inline int cpu_irq_is_enabled_flags(irqflags_t flags)
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{
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return (flags);
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}
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static inline void cpu_irq_restore(irqflags_t flags)
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{
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if (cpu_irq_is_enabled_flags(flags))
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cpu_irq_enable();
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}
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#define cpu_irq_is_enabled() g_interrupt_enabled
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/**
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* \weakgroup interrupt_deprecated_group
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* @{
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*/
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#define Enable_global_interrupt() cpu_irq_enable()
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#define Disable_global_interrupt() cpu_irq_disable()
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#define Is_global_interrupt_enabled() cpu_irq_is_enabled()
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//@}
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//@}
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#endif /* UTILS_INTERRUPT_INTERRUPT_H */
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@ -0,0 +1,45 @@
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/**
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* \file
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*
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* \brief Global interrupt management for SAM3 and SAM4 (NVIC based)
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*
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* Copyright (c) 2012 Atmel Corporation. All rights reserved.
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*
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* \asf_license_start
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
|
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. The name of Atmel may not be used to endorse or promote products derived
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* from this software without specific prior written permission.
|
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*
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* 4. This software may only be redistributed and used in connection with an
|
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* Atmel microcontroller product.
|
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*
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* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* \asf_license_stop
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*
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*/
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#include "interrupt_sam_nvic.h"
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//! Global NVIC interrupt enable status (by default it's enabled)
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int g_interrupt_enabled = 1;
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