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sam: USART modes now fails if used on UART
This commit is contained in:
Cristian Maglie
parent
0dbd35a70e
commit
5e97168fbc
@ -37,10 +37,15 @@ UARTClass::UARTClass( Uart *pUart, IRQn_Type dwIrq, uint32_t dwId, RingBuffer *p
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void UARTClass::begin( const uint32_t dwBaudRate )
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{
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begin( dwBaudRate, UART_MR_PAR_NO | UART_MR_CHMODE_NORMAL );
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begin(dwBaudRate, Mode_8N1);
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}
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void UARTClass::begin( const uint32_t dwBaudRate, const uint32_t config )
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void UARTClass::begin(const uint32_t dwBaudRate, const UARTModes config)
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{
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init(dwBaudRate, static_cast<uint32_t>(config));
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}
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void UARTClass::init(const uint32_t dwBaudRate, const uint32_t config)
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{
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// Configure PMC
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pmc_enable_periph_clk( _dwId );
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@ -52,7 +57,7 @@ void UARTClass::begin( const uint32_t dwBaudRate, const uint32_t config )
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_pUart->UART_CR = UART_CR_RSTRX | UART_CR_RSTTX | UART_CR_RXDIS | UART_CR_TXDIS;
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// Configure mode
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_pUart->UART_MR = config;
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_pUart->UART_MR = config | US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHMODE_NORMAL;
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// Configure baudrate (asynchronous, no oversampling)
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_pUart->UART_BRGR = (SystemCoreClock / dwBaudRate) >> 4;
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@ -25,22 +25,28 @@
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// Includes Atmel CMSIS
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#include <chip.h>
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#define SERIAL_8N1 UARTClass::Mode_8N1
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#define SERIAL_8N2 UARTClass::Mode_8N2
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#define SERIAL_8E1 UARTClass::Mode_8E1
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#define SERIAL_8E2 UARTClass::Mode_8E2
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#define SERIAL_8O1 UARTClass::Mode_8O1
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#define SERIAL_8O2 UARTClass::Mode_8O2
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class UARTClass : public HardwareSerial
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{
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protected:
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RingBuffer *_rx_buffer;
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RingBuffer *_tx_buffer;
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protected:
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Uart* _pUart;
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IRQn_Type _dwIrq;
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uint32_t _dwId;
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public:
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enum UARTModes {
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Mode_8N1 = US_MR_CHRL_8_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT,
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Mode_8N2 = US_MR_CHRL_8_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT,
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Mode_8E1 = US_MR_CHRL_8_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT,
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Mode_8E2 = US_MR_CHRL_8_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT,
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Mode_8O1 = US_MR_CHRL_8_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT,
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Mode_8O2 = US_MR_CHRL_8_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT,
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};
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UARTClass(Uart* pUart, IRQn_Type dwIrq, uint32_t dwId, RingBuffer* pRx_buffer, RingBuffer* pTx_buffer);
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void begin(const uint32_t dwBaudRate);
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void begin(const uint32_t dwBaudRate, const uint32_t config);
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void begin(const uint32_t dwBaudRate, const UARTModes config);
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void end(void);
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int available(void);
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int availableForWrite(void);
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@ -56,6 +62,17 @@ class UARTClass : public HardwareSerial
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void IrqHandler(void);
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operator bool() { return true; }; // UART always active
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protected:
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void init(const uint32_t dwBaudRate, const uint32_t config);
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RingBuffer *_rx_buffer;
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RingBuffer *_tx_buffer;
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Uart* _pUart;
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IRQn_Type _dwIrq;
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uint32_t _dwId;
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};
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#endif // _UART_CLASS_
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@ -32,8 +32,8 @@ USARTClass::USARTClass( Usart* pUsart, IRQn_Type dwIrq, uint32_t dwId, RingBuffe
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// Public Methods //////////////////////////////////////////////////////////////
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void USARTClass::begin( const uint32_t dwBaudRate, const uint32_t config )
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void USARTClass::begin( const uint32_t dwBaudRate, const USARTModes config )
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{
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UARTClass::begin(dwBaudRate, config);
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UARTClass::init(dwBaudRate, static_cast<uint32_t>(config));
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}
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@ -26,35 +26,24 @@
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#include <chip.h>
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// Define config for Serial.begin(baud, config);
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#define SERIAL_5N1 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_5_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT | US_MR_CHMODE_NORMAL)
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#define SERIAL_6N1 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_6_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT | US_MR_CHMODE_NORMAL)
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#define SERIAL_7N1 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_7_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT | US_MR_CHMODE_NORMAL)
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#define SERIAL_8N1 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_8_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT | US_MR_CHMODE_NORMAL)
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#define SERIAL_5N2 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_5_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT | US_MR_CHMODE_NORMAL)
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#define SERIAL_6N2 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_6_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT | US_MR_CHMODE_NORMAL)
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#define SERIAL_7N2 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_7_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT | US_MR_CHMODE_NORMAL)
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#define SERIAL_8N2 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_8_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT | US_MR_CHMODE_NORMAL)
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#define SERIAL_5E1 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_5_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT | US_MR_CHMODE_NORMAL)
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#define SERIAL_6E1 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_6_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT | US_MR_CHMODE_NORMAL)
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#define SERIAL_7E1 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_7_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT | US_MR_CHMODE_NORMAL)
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#define SERIAL_8E1 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_8_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT | US_MR_CHMODE_NORMAL)
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#define SERIAL_5E2 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_5_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT | US_MR_CHMODE_NORMAL)
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#define SERIAL_6E2 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_6_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT | US_MR_CHMODE_NORMAL)
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#define SERIAL_7E2 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_7_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT | US_MR_CHMODE_NORMAL)
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#define SERIAL_8E2 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_8_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT | US_MR_CHMODE_NORMAL)
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#define SERIAL_5O1 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_5_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT | US_MR_CHMODE_NORMAL)
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#define SERIAL_6O1 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_6_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT | US_MR_CHMODE_NORMAL)
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#define SERIAL_7O1 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_7_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT | US_MR_CHMODE_NORMAL)
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#define SERIAL_8O1 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_8_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT | US_MR_CHMODE_NORMAL)
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#define SERIAL_5O2 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_5_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT | US_MR_CHMODE_NORMAL)
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#define SERIAL_6O2 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_6_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT | US_MR_CHMODE_NORMAL)
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#define SERIAL_7O2 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_7_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT | US_MR_CHMODE_NORMAL)
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#define SERIAL_8O2 (US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHRL_8_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT | US_MR_CHMODE_NORMAL)
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#define SERIAL_5N1 USARTClass::Mode_5N1
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#define SERIAL_6N1 USARTClass::Mode_6N1
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#define SERIAL_7N1 USARTClass::Mode_7N1
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#define SERIAL_5N2 USARTClass::Mode_5N2
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#define SERIAL_6N2 USARTClass::Mode_6N2
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#define SERIAL_7N2 USARTClass::Mode_7N2
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#define SERIAL_5E1 USARTClass::Mode_5E1
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#define SERIAL_6E1 USARTClass::Mode_6E1
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#define SERIAL_7E1 USARTClass::Mode_7E1
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#define SERIAL_5E2 USARTClass::Mode_5E2
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#define SERIAL_6E2 USARTClass::Mode_6E2
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#define SERIAL_7E2 USARTClass::Mode_7E2
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#define SERIAL_5O1 USARTClass::Mode_5O1
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#define SERIAL_6O1 USARTClass::Mode_6O1
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#define SERIAL_7O1 USARTClass::Mode_7O1
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#define SERIAL_5O2 USARTClass::Mode_5O2
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#define SERIAL_6O2 USARTClass::Mode_6O2
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#define SERIAL_7O2 USARTClass::Mode_7O2
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class USARTClass : public UARTClass
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{
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@ -62,9 +51,31 @@ class USARTClass : public UARTClass
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Usart* _pUsart;
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public:
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// 8 bit modes are inherited from UARTClass
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enum USARTModes {
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Mode_5N1 = US_MR_CHRL_5_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT,
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Mode_6N1 = US_MR_CHRL_6_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT,
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Mode_7N1 = US_MR_CHRL_7_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT,
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Mode_5N2 = US_MR_CHRL_5_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT,
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Mode_6N2 = US_MR_CHRL_6_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT,
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Mode_7N2 = US_MR_CHRL_7_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT,
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Mode_5E1 = US_MR_CHRL_5_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT,
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Mode_6E1 = US_MR_CHRL_6_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT,
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Mode_7E1 = US_MR_CHRL_7_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT,
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Mode_5E2 = US_MR_CHRL_5_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT,
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Mode_6E2 = US_MR_CHRL_6_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT,
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Mode_7E2 = US_MR_CHRL_7_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT,
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Mode_5O1 = US_MR_CHRL_5_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT,
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Mode_6O1 = US_MR_CHRL_6_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT,
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Mode_7O1 = US_MR_CHRL_7_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT,
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Mode_5O2 = US_MR_CHRL_5_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT,
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Mode_6O2 = US_MR_CHRL_6_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT,
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Mode_7O2 = US_MR_CHRL_7_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT,
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};
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USARTClass( Usart* pUsart, IRQn_Type dwIrq, uint32_t dwId, RingBuffer* pRx_buffer, RingBuffer* pTx_buffer );
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void begin( const uint32_t dwBaudRate , const uint32_t config );
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void begin( const uint32_t dwBaudRate , const USARTModes config );
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using UARTClass::begin; // Needed only for polymorphic methods
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};
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