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Code Issues Releases Activity

[sam] fixing ADC, taken from ASF, checked and tested verified

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This commit is contained in:
Thibault RICHARD 2012-04-11 19:30:13 +02:00
parent 0832334a71
commit 6ae6a0eaf2
11 changed files with 1490 additions and 2607 deletions
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73
hardware/arduino/sam/cores/sam/wiring_analog.c
View File

@ -16,9 +16,7 @@
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
//#include "wiring_private.h"
#include "Arduino.h"
#include "variant.h"
#ifdef __cplusplus
extern "C" {
@ -59,11 +57,12 @@ uint32_t analogRead(uint32_t ulPin)
// Start the ADC
adc_start( ADC );
// Wait for end of conversion
while ((adc_get_status(ADC) & (1<<ulChannel)) == 0);
// Wait for end of conversion
while ((adc_get_status(ADC) & ADC_SR_DRDY) != ADC_SR_DRDY)
;
// Read the value
ulValue=adc_get_value( ADC, ulChannel );
// Read the value
ulValue = adc_get_latest_value(ADC);
// Disable the corresponding channel
adc_disable_channel( ADC, ulChannel );
@ -82,22 +81,23 @@ uint32_t analogRead(uint32_t ulPin)
case ADC14 :
case ADC15 :
// Enable the corresponding channel
adc12_enable_channel( ADC12B, ulChannel );
adc12b_enable_channel( ADC12B, ulChannel );
// Start the ADC12B
adc12_start( ADC12B );
adc12b_start( ADC12B );
// Wait for end of conversion
while ((adc12_get_status(ADC12B) & (1<<(ulChannel))) == 0);
// Wait for end of conversion
while ((adc12b_get_status(ADC12B) & ADC12B_SR_DRDY) != ADC12B_SR_DRDY)
;
// Read the value
ulValue=adc12_get_value( ADC12B, ulChannel );
// Read the value
ulValue = adc12b_get_latest_value(ADC12B);
// Stop the ADC12B
// adc12_stop( ADC12B ) ; // never do adc12_stop() else we have to reconfigure the ADC12B each time
// Disable the corresponding channel
adc12_disable_channel( ADC12B, ulChannel );
adc12b_disable_channel( ADC12B, ulChannel );
break;
// Compiler could yell because we don't handle DAC pins
@ -122,29 +122,29 @@ uint32_t analogRead(uint32_t ulPin)
case ADC8 :
case ADC9 :
case ADC10 :
case ADC11 : // Enable the corresponding channel
adc_enable_channel( ADC, ulChannel );
case ADC11 :
// Enable the corresponding channel
adc_enable_channel( ADC, ulChannel );
// Start the ADC
adc_start( ADC );
// Start the ADC
adc_start( ADC );
// Wait for end of conversion
while ((adc_get_status(ADC) & (1<<ulChannel)) == 0);
// Wait for end of conversion
while ((adc_get_status(ADC) & ADC_ISR_DRDY) != ADC_ISR_DRDY)
;
// Read the value
ulValue=adc_get_value( ADC, ulChannel );
// Read the value
ulValue = adc_get_latest_value(ADC);
// Disable the corresponding channel
adc_disable_channel( ADC, ulChannel );
// Stop the ADC
// adc_stop( ADC ) ; // never do adc_stop() else we have to reconfigure the ADC each time
break;
// Disable the corresponding channel
adc_disable_channel(ADC, ulChannel);
break;
// Compiler could yell because we don't handle DAC pins
default :
ulValue=0;
break;
ulValue=0;
break;
}
#endif
@ -153,27 +153,24 @@ uint32_t analogRead(uint32_t ulPin)
static void TC_SetRA(Tc *tc, uint32_t chan, uint32_t v )
{
TcChannel* ch = tc->TC_CHANNEL+chan;
ch->TC_RA = v;
tc->TC_CHANNEL[chan].TC_RA = v;
}
static void TC_SetRB(Tc *tc, uint32_t chan, uint32_t v )
{
TcChannel* ch = &tc->TC_CHANNEL+chan;
ch->TC_RB = v;
tc->TC_CHANNEL[chan].TC_RB = v;
}
static void TC_SetRC(Tc *tc, uint32_t chan, uint32_t v )
{
TcChannel* ch = &tc->TC_CHANNEL+chan;
ch->TC_RC = v;
tc->TC_CHANNEL[chan].TC_RC = v;
}
static uint8_t PWMEnabled = 0;
static uint8_t pinEnabled[PINS_COUNT];
static uint8_t TCChanEnabled[] = {0, 0, 0};
void analogOutputInit() {
void analogOutputInit(void) {
uint8_t i;
for (i=0; i<PINS_COUNT; i++)
pinEnabled[i] = 0;
@ -224,8 +221,8 @@ void analogWrite(uint32_t ulPin, uint32_t ulValue) {
// Setup Timer for this pin
ETCChannel channel = g_APinDescription[ulPin].ulTCChannel;
static const channelToChNo[] = { 0, 0, 1, 1, 2, 2 };
static const channelToAB[] = { 1, 0, 1, 0, 1, 0 };
static const uint32_t channelToChNo[] = { 0, 0, 1, 1, 2, 2 };
static const uint32_t channelToAB[] = { 1, 0, 1, 0, 1, 0 };
uint32_t chNo = channelToChNo[channel];
uint32_t chA = channelToAB[channel];

1
hardware/arduino/sam/cores/sam/wiring_analog.h
View File

@ -56,6 +56,7 @@ extern void analogWrite( uint32_t ulPin, uint32_t ulValue ) ;
*/
extern uint32_t analogRead( uint32_t ulPin ) ;
extern void analogOutputInit( void ) ;
#ifdef __cplusplus
}

339
hardware/arduino/sam/system/libsam/include/adc.h
View File

@ -1,139 +1,260 @@
/*! \file *********************************************************************
/**
* \file
*
* \brief API for SAM3 Analog-to-Digital Converter (ADC/ADC12B) controller.
* \brief Analog-to-Digital Converter (ADC/ADC12B) driver for SAM.
*
* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011, Atmel Corporation
* Copyright (c) 2011 Atmel Corporation. All rights reserved.
*
* All rights reserved.
* \asf_license_start
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* - Compiler: IAR EWARM and CodeSourcery GCC for ARM
* - Supported devices: All SAM devices with a Analog-to-Digital Converter can be used.
* - AppNote:
* \asf_license_stop
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.com/
*
*******************************************************************************/
*/
#ifndef ADC_H_INCLUDED
#define ADC_H_INCLUDED
#include "../chip.h"
#define ADC_FREQ_MAX 5000000
#define ADC_STARTUP 20
/// @cond 0
/**INDENT-OFF**/
#ifdef __cplusplus
extern "C" {
#endif
/**INDENT-ON**/
/// @endcond
#define ADC12_FREQ_MAX 20000000
#define ADC12_FREQ_MIN 1000000
#define ADC12_STARTUP_NORM 40
#define ADC12_STARTUP_FAST 12
/* The max adc sample freq definition*/
#define ADC_FREQ_MAX 20000000
/* The min adc sample freq definition*/
#define ADC_FREQ_MIN 1000000
/* The normal adc startup time*/
#define ADC_STARTUP_NORM 40
/* The fast adc startup time*/
#define ADC_STARTUP_FAST 12
/* Definitions for ADC resolution */
typedef enum _adc_resolution_t {
#if SAM3N_SERIES || SAM3U_SERIES
ADC_8_BITS = ADC_MR_LOWRES_BITS_8, /* ADC 8-bit resolution */
#endif /* SAM3N_SERIES || SAM3U_SERIES */
ADC_10_BITS = ADC_MR_LOWRES_BITS_10, /* ADC 10-bit resolution */
#if SAM3S_SERIES || SAM3XA_SERIES
ADC_12_BITS = ADC_MR_LOWRES_BITS_12, /* ADC 12-bit resolution */
#endif /* SAM3S_SERIES || SAM3XA_SERIES */
ADC_NONE
} adc_resolution_t;
#if SAM3U_SERIES
typedef enum _adc12_resolution_t {
ADC12_10_BITS = ADC12B_MR_LOWRES_BITS_10, /* ADC 10-bit resolution */
ADC12_12_BITS = ADC12B_MR_LOWRES_BITS_12 /* ADC 12-bit resolution */
} adc12_resolution_t;
#endif /* SAM3U_SERIES */
#if SAM3S_SERIES || SAM4S_SERIES || SAM3XA_SERIES
enum adc_resolution_t {
ADC_10_BITS = ADC_MR_LOWRES_BITS_10, /* ADC 10-bit resolution */
ADC_12_BITS = ADC_MR_LOWRES_BITS_12 /* ADC 12-bit resolution */
};
#elif SAM3N_SERIES
enum adc_resolution_t {
ADC_8_BITS = ADC_MR_LOWRES_BITS_8, /* ADC 8-bit resolution */
ADC_10_BITS = ADC_MR_LOWRES_BITS_10 /* ADC 10-bit resolution */
} ;
#elif SAM3U_SERIES
enum adc_resolution_t {
ADC_8_BITS = ADC_MR_LOWRES_BITS_8, /* ADC 8-bit resolution */
ADC_10_BITS = ADC12B_MR_LOWRES_BITS_10, /* ADC 10-bit resolution */
ADC_12_BITS = ADC12B_MR_LOWRES_BITS_12 /* ADC 12-bit resolution */
} ;
#endif
/* Definitions for ADC trigger */
typedef enum _adc_trigger_t {
ADC_TRIG_SW = ADC_MR_TRGEN_DIS, /* Starting a conversion is only possible by software. */
ADC_TRIG_EXT = ((ADC_MR_TRGSEL_ADC_TRIG0 <<ADC_MR_TRGSEL_Pos) & ADC_MR_TRGSEL_Msk) | ADC_MR_TRGEN, /* External trigger */
ADC_TRIG_TIO_CH_0 = (ADC_MR_TRGSEL_ADC_TRIG1 & ADC_MR_TRGSEL_Msk) | ADC_MR_TRGEN, /* TIO Output of the Timer Counter Channel 0 */
ADC_TRIG_TIO_CH_1 = (ADC_MR_TRGSEL_ADC_TRIG2 & ADC_MR_TRGSEL_Msk) | ADC_MR_TRGEN, /* TIO Output of the Timer Counter Channel 1 */
ADC_TRIG_TIO_CH_2 = (ADC_MR_TRGSEL_ADC_TRIG3 & ADC_MR_TRGSEL_Msk) | ADC_MR_TRGEN, /* TIO Output of the Timer Counter Channel 2 */
#if SAM3S_SERIES || SAM3XA_SERIES || SAM3U_SERIES
ADC_TRIG_PWM_EVENT_LINE_0 = (ADC_MR_TRGSEL_ADC_TRIG4 & ADC_MR_TRGSEL_Msk) | ADC_MR_TRGEN, /* PWM Event Line 0 */
ADC_TRIG_PWM_EVENT_LINE_1 = (ADC_MR_TRGSEL_ADC_TRIG5 & ADC_MR_TRGSEL_Msk) | ADC_MR_TRGEN /* PWM Event Line 1 */
#endif
} adc_trigger_t;
enum adc_trigger_t {
ADC_TRIG_SW = ADC_MR_TRGEN_DIS, /* Starting a conversion is only possible by software. */
ADC_TRIG_EXT = ((ADC_MR_TRGSEL_ADC_TRIG0 << ADC_MR_TRGSEL_Pos) &
ADC_MR_TRGSEL_Msk) | ADC_MR_TRGEN, /* External trigger */
ADC_TRIG_TIO_CH_0 = (ADC_MR_TRGSEL_ADC_TRIG1 & ADC_MR_TRGSEL_Msk) |
ADC_MR_TRGEN, /* TIO Output of the Timer Counter Channel 0 */
ADC_TRIG_TIO_CH_1 = (ADC_MR_TRGSEL_ADC_TRIG2 & ADC_MR_TRGSEL_Msk) |
ADC_MR_TRGEN, /* TIO Output of the Timer Counter Channel 1 */
ADC_TRIG_TIO_CH_2 = (ADC_MR_TRGSEL_ADC_TRIG3 & ADC_MR_TRGSEL_Msk) |
ADC_MR_TRGEN, /* TIO Output of the Timer Counter Channel 2 */
#if SAM3S_SERIES || SAM4S_SERIES || SAM3XA_SERIES || SAM3U_SERIES
ADC_TRIG_PWM_EVENT_LINE_0 = (ADC_MR_TRGSEL_ADC_TRIG4 & ADC_MR_TRGSEL_Msk) |
ADC_MR_TRGEN, /* PWM Event Line 0 */
ADC_TRIG_PWM_EVENT_LINE_1 = (ADC_MR_TRGSEL_ADC_TRIG5 & ADC_MR_TRGSEL_Msk) |
ADC_MR_TRGEN /* PWM Event Line 1 */
#endif
} ;
#if SAM3S_SERIES || SAM4S_SERIES || SAM3N_SERIES || SAM3XA_SERIES
/* Definitions for ADC channel number */
typedef enum _adc_channel_num_t {
ADC_CHANNEL_0 = 0,
ADC_CHANNEL_1 = 1,
ADC_CHANNEL_2 = 2,
ADC_CHANNEL_3 = 3,
ADC_CHANNEL_4 = 4,
ADC_CHANNEL_5 = 5,
ADC_CHANNEL_6 = 6,
ADC_CHANNEL_7 = 7,
#if SAM3S_SERIES || SAM3N_SERIES || SAM3XA_SERIES
ADC_CHANNEL_8 = 8,
ADC_CHANNEL_9 = 9,
ADC_CHANNEL_10 = 10,
ADC_CHANNEL_11 = 11,
ADC_CHANNEL_12 = 12,
ADC_CHANNEL_13 = 13,
ADC_CHANNEL_14 = 14,
ADC_TEMPERATURE_SENSOR = 15,
ADC_ALL_CHANNEL = 0xffff
enum adc_channel_num_t {
ADC_CHANNEL_0 = 0,
ADC_CHANNEL_1 = 1,
ADC_CHANNEL_2 = 2,
ADC_CHANNEL_3 = 3,
ADC_CHANNEL_4 = 4,
ADC_CHANNEL_5 = 5,
ADC_CHANNEL_6 = 6,
ADC_CHANNEL_7 = 7,
ADC_CHANNEL_8 = 8,
ADC_CHANNEL_9 = 9,
ADC_CHANNEL_10 = 10,
ADC_CHANNEL_11 = 11,
ADC_CHANNEL_12 = 12,
ADC_CHANNEL_13 = 13,
ADC_CHANNEL_14 = 14,
ADC_TEMPERATURE_SENSOR = 15,
} ;
#elif SAM3U_SERIES
ADC_ALL_CHANNEL = 0xff
#endif /* SAM3U_SERIES */
} adc_channel_num_t;
typedef enum _adc_gainvalue_t {
ADC_GAINVALUE_0 = 0,
ADC_GAINVALUE_1 = 1,
ADC_GAINVALUE_2 = 2,
ADC_GAINVALUE_3 = 3
} adc_gainvalue_t ;
#if SAM3S_SERIES || SAM3XA_SERIES
typedef enum {
ADC_SETTLING_TIME_0 = ADC_MR_SETTLING_AST3,
ADC_SETTLING_TIME_1 = ADC_MR_SETTLING_AST5,
ADC_SETTLING_TIME_2 = ADC_MR_SETTLING_AST9,
ADC_SETTLING_TIME_3 = ADC_MR_SETTLING_AST17
}adc_settling_time_t;
/* Definitions for ADC channel number */
enum adc_channel_num_t {
ADC_CHANNEL_0 = 0,
ADC_CHANNEL_1 = 1,
ADC_CHANNEL_2 = 2,
ADC_CHANNEL_3 = 3,
ADC_CHANNEL_4 = 4,
ADC_CHANNEL_5 = 5,
ADC_CHANNEL_6 = 6,
ADC_CHANNEL_7 = 7,
} ;
#endif
/* Definitions for ADC gain value */
enum adc_gainvalue_t{
ADC_GAINVALUE_0 = 0,
ADC_GAINVALUE_1 = 1,
ADC_GAINVALUE_2 = 2,
ADC_GAINVALUE_3 = 3
};
/* Definitions for ADC analog settling time */
#if SAM3S_SERIES || SAM4S_SERIES || SAM3XA_SERIES
enum adc_settling_time_t{
ADC_SETTLING_TIME_0 = ADC_MR_SETTLING_AST3,
ADC_SETTLING_TIME_1 = ADC_MR_SETTLING_AST5,
ADC_SETTLING_TIME_2 = ADC_MR_SETTLING_AST9,
ADC_SETTLING_TIME_3 = ADC_MR_SETTLING_AST17
};
#endif
#if SAM3S_SERIES || SAM3N_SERIES || SAM3XA_SERIES
#include "adc_sam3snxa.h"
#if SAM3S_SERIES || SAM4S_SERIES || SAM3N_SERIES || SAM3XA_SERIES
uint32_t adc_init(Adc *p_adc, const uint32_t ul_mck,
const uint32_t ul_adc_clock, const uint8_t uc_startup);
void adc_configure_trigger(Adc *p_adc, const enum adc_trigger_t trigger,
const uint8_t uc_freerun);
void adc_configure_power_save(Adc *p_adc, const uint8_t uc_sleep, const uint8_t uc_fwup);
void adc_configure_sequence(Adc *p_adc, const enum adc_channel_num_t ch_list[],
const uint8_t uc_num);
void adc_enable_tag(Adc *p_adc);
void adc_disable_tag(Adc *p_adc);
enum adc_channel_num_t adc_get_tag(const Adc *p_adc);
void adc_start_sequencer(Adc *p_adc);
void adc_stop_sequencer(Adc *p_adc);
void adc_set_comparison_mode(Adc *p_adc, const uint8_t uc_mode);
uint32_t adc_get_comparison_mode(const Adc *p_adc);
void adc_set_comparison_window(Adc *p_adc, const uint16_t us_low_threshold,
const uint16_t us_high_threshold);
void adc_set_comparison_channel(Adc *p_adc, const enum adc_channel_num_t channel);
void adc_set_writeprotect(Adc *p_adc, const uint32_t ul_enable);
uint32_t adc_get_writeprotect_status(const Adc *p_adc);
void adc_check(Adc* p_adc, const uint32_t ul_mck);
uint32_t adc_get_overrun_status(const Adc *p_adc);
#elif SAM3U_SERIES
#include "adc10_sam3u.h"
#include "adc12_sam3u.h"
uint32_t adc_init(Adc * p_adc, const uint32_t ul_mck, const uint32_t ul_adc_clock,
const uint32_t ul_startuptime);
void adc_configure_trigger(Adc *p_adc, const enum adc_trigger_t trigger);
void adc_configure_power_save(Adc *p_adc, const uint8_t uc_sleep);
#endif
#endif /* #ifndef ADC_H_INCLUDED */
void adc_set_resolution(Adc *p_adc, const enum adc_resolution_t resolution);
void adc_start(Adc *p_adc);
void adc_stop(Adc *p_adc);
void adc_enable_channel(Adc *p_adc, const enum adc_channel_num_t adc_ch);
void adc_disable_channel(Adc *p_adc, const enum adc_channel_num_t adc_ch);
void adc_enable_all_channel(Adc *p_adc);
void adc_disable_all_channel(Adc *p_adc);
uint32_t adc_get_channel_status(const Adc *p_adc, const enum adc_channel_num_t adc_ch);
uint32_t adc_get_channel_value(const Adc *p_adc,const enum adc_channel_num_t adc_ch);
uint32_t adc_get_latest_value(const Adc *p_adc);
uint32_t adc_get_actual_adc_clock(const Adc *p_adc, const uint32_t ul_mck);
void adc_enable_interrupt(Adc *p_adc, const uint32_t ul_source);
void adc_disable_interrupt(Adc *p_adc, const uint32_t ul_source);
uint32_t adc_get_status(const Adc *p_adc);
uint32_t adc_get_interrupt_mask(const Adc *p_adc);
Pdc *adc_get_pdc_base(const Adc *p_adc);
#if SAM3S_SERIES || SAM4S_SERIES || SAM3XA_SERIES
void adc_configure_timing(Adc *p_adc, const uint8_t uc_tracking,
const enum adc_settling_time_t settling, const uint8_t uc_transfer);
void adc_enable_anch( Adc *p_adc );
void adc_disable_anch( Adc *p_adc );
void adc_enable_channel_differential_input(Adc *p_adc, const enum adc_channel_num_t channel);
void adc_disable_channel_differential_input(Adc *p_adc, const enum adc_channel_num_t channel);
void adc_enable_channel_input_offset(Adc *p_adc, const enum adc_channel_num_t channel);
void adc_disable_channel_input_offset(Adc *p_adc, const enum adc_channel_num_t channel);
void adc_set_channel_input_gain(Adc *p_adc, const enum adc_channel_num_t channel,
const enum adc_gainvalue_t uc_gain);
void adc_set_bias_current(Adc *p_adc, const uint8_t uc_ibctl);
void adc_enable_ts(Adc *p_adc);
void adc_disable_ts(Adc *p_adc);
#elif SAM3N_SERIES
void adc_configure_timing(Adc *p_adc, const uint8_t uc_tracking);
#elif SAM3U_SERIES
void adc_configure_timing(Adc *p_adc, const uint32_t ul_sh);
#endif
#if SAM3SD8_SERIES || SAM4S_SERIES
void adc_set_calibmode(Adc *p_adc);
#endif
#if SAM3U_SERIES
uint32_t adc12b_init(Adc12b *p_adc, const uint32_t ul_mck, const uint32_t ul_adc_clock,
const uint32_t ul_startuptime, const uint32_t ul_offmode_startuptime);
void adc12b_set_resolution(Adc12b *p_adc, const enum adc_resolution_t resolution);
void adc12b_configure_trigger(Adc12b *p_adc, const enum adc_trigger_t trigger);
void adc12b_configure_power_save(Adc12b *p_adc, const uint8_t uc_sleep, const uint8_t uc_offmode);
void adc12b_configure_timing(Adc12b *p_adc, const uint32_t ul_sh);
void adc12b_start(Adc12b *p_adc);
void adc12b_stop(Adc12b *p_adc);
void adc12b_enable_channel(Adc12b *p_adc, const enum adc_channel_num_t adc_ch);
void adc12b_disable_channel(Adc12b *p_adc, const enum adc_channel_num_t adc_ch);
void adc12b_enable_all_channel(Adc12b *p_adc);
void adc12b_disable_all_channel(Adc12b *p_adc);
uint32_t adc12b_get_channel_status(const Adc12b *p_adc,const enum adc_channel_num_t adc_ch);
uint32_t adc12b_get_channel_value(const Adc12b *p_adc, const enum adc_channel_num_t adc_ch);
uint32_t adc12b_get_latest_value(const Adc12b *p_adc);
void adc12b_enable_differential_input(Adc12b *p_adc);
void adc12b_disable_differential_input(Adc12b *p_adc);
void adc12b_enable_input_offset(Adc12b *p_adc);
void adc12b_disable_input_offset(Adc12b *p_adc);
void adc12b_set_input_gain(Adc12b *p_adc, const enum adc_gainvalue_t uc_gain);
uint32_t adc12b_get_actual_adc_clock(const Adc12b *p_adc, const uint32_t ul_mck);
void adc12b_enable_interrupt(Adc12b *p_adc, const uint32_t ul_source);
void adc12b_disable_interrupt(Adc12b *p_adc, const uint32_t ul_source);
uint32_t adc12b_get_interrupt_mask(const Adc12b *p_adc);
uint32_t adc12b_get_status(const Adc12b *p_adc);
void adc12b_set_bias_current(Adc12b *p_adc, const uint8_t uc_ibctl);
Pdc *adc12b_get_pdc_base(const Adc12b *p_adc);
#endif
/// @cond 0
/**INDENT-OFF**/
#ifdef __cplusplus
}
#endif
/**INDENT-ON**/
/// @endcond
#endif /* ADC_H_INCLUDED */

285
hardware/arduino/sam/system/libsam/include/adc10_sam3u.h
View File

@ -1,285 +0,0 @@
/*! \file *********************************************************************
*
* \brief API for SAM3 Analog-to-Digital Converter (ADC/ADC12B) controller.
*
* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* - Compiler: IAR EWARM and CodeSourcery GCC for ARM
* - Supported devices: All SAM devices with a Analog-to-Digital Converter can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.com/
*
*******************************************************************************/
#ifndef ADC10_SAM3U_H_INCLUDED
#define ADC10_SAM3U_H_INCLUDED
#include "../chip.h"
/// @cond 0
/**INDENT-OFF**/
#ifdef __cplusplus
extern "C" {
#endif
/**INDENT-ON**/
/// @endcond
#if SAM3U_SERIES
/**
* \brief Initializes the given ADC with the specified ADC clock and startup time.
*
* \param p_adc Pointer to an ADC instance.
* \param dw_mck Main clock of the device (value in Hz).
* \param dw_adc_clock Analog-to-Digital conversion clock (value in Hz).
* \param uc_startup ADC start up time value(value in us). Please refer to the product datasheet for details.
* \param ul_offmode_startuptime ADC off mode startup Time value(value in us). Please refer to the product datasheet for details.
*
* \retval 0 The initialization operation succeeds.
* \retval others The initialization operation fails.
*/
extern uint32_t adc_init(Adc *p_adc, uint32_t ul_mck, uint32_t ul_adc_clock, uint32_t ul_startuptime);
/**
* \brief Configures conversion resolution.
*
* \param p_adc Pointer to an ADC instance.
* \param resolution ADC resolution.
*
*/
extern void adc_set_resolution(Adc *p_adc, adc_resolution_t resolution);
/**
* \brief Configures conversion trigger and free run mode.
*
* \param p_adc Pointer to an ADC instance.
* \param trigger Conversion trigger.
*
*/
extern void adc_configure_trigger(Adc *p_adc, adc_trigger_t trigger);
/**
* \brief Configures ADC power saving mode.
*
* \param p_adc Pointer to an ADC instance.
* \param uc_sleep ADC_MR_SLEEP_NORMAL keeps the ADC Core and reference voltage circuitry ON between conversions
* ADC_MR_SLEEP_SLEEP keeps the ADC Core and reference voltage circuitry OFF between conversions
* \param uc_offmode 0 Standby Mode (if Sleep Bit = 1)
* 1 Off Mode
*
*/
extern void adc_configure_power_save(Adc *p_adc, uint8_t uc_sleep, uint8_t uc_offmode);
/**
* \brief Configures conversion sequence.
*
* \param p_adc Pointer to an ADC instance.
* \param ch_list Channel sequence list.
* \param number Number of channels in the list.
*
*/
extern void adc_configure_sequence(Adc *p_adc, adc_channel_num_t ch_list[], uint8_t uc_num);
/**
* \brief Configures ADC timing.
*
* \param p_adc Pointer to an ADC instance.
* \param ul_sh ADC sample and hold time = uc_sh / ADC clock.
*
*/
extern void adc_configure_timing(Adc *p_adc, uint32_t ul_sh);
/**
* \brief Enables ADC interrupt(s).
*
* \param p_adc Pointer to an ADC instance.
* \param dw_source Interrupt(s) to be enabled.
*
*/
extern void adc_enable_interrupt(Adc *p_adc, uint32_t ul_source);
/**
* \brief Disables ADC interrupt(s).
*
* \param p_adc Pointer to an ADC instance.
* \param dw_source Interrupt(s) to be disabled.
*
*/
extern void adc_disable_interrupt(Adc *p_adc, uint32_t ul_source);
/**
* \brief Reads ADC interrupt status.
*
* \param p_adc Pointer to an ADC instance.
*
* \retval ADC interrupt status.
*/
extern uint32_t adc_get_interrupt_status(Adc *p_adc);
/** \brief Read ADC interrupt mask.
*
* \param p_uart pointer to a UART instance.
*
* \return The interrupt mask value.
*/
extern uint32_t adc_get_interrupt_mask(Adc *p_adc);
/**
* \brief Reads overrun status.
*
* \param p_adc Pointer to an ADC instance.
*
* \retval ADC overrun status.
*/
extern uint32_t adc_check_ovr(Adc *p_adc, adc_channel_num_t adc_ch);
/**
* \brief enable analog change.
*
* note it allows different analog settings for each channel,
*
* \param pAdc Pointer to an Adc instance.
*/
extern void adc_enable_anch( Adc *pAdc );
/**
* \brief disable analog change.
*
* note DIFF0, GAIN0 and OFF0 are used for all channels.
*
* \param pAdc Pointer to an Adc instance.
*/
extern void adc_disable_anch( Adc *pAdc );
/**
* \brief Starts analog-to-digital conversion.
*
* \note If one of the hardware event is selected as ADC trigger, this function can NOT start analog to digital conversion.
*
* \param p_adc Pointer to an ADC instance.
*
*/
extern void adc_start( Adc *p_adc ) ;
/**
* \brief Stop analog-to-digital conversion.
* \param p_adc Pointer to an ADC instance.
*
*/
extern void adc_stop( Adc *p_adc ) ;
/**
* \brief Enables the specified ADC channel.
*
* \param p_adc Pointer to an ADC instance.
* \param adc_ch ADC channel number.
*
*/
extern void adc_enable_channel(Adc *p_adc, adc_channel_num_t adc_ch);
/**
* \brief Disables the specified ADC channel.
*
* \param p_adc Pointer to an ADC instance.
* \param adc_ch ADC channel number.
*
*/
extern void adc_disable_channel(Adc *p_adc, adc_channel_num_t adc_ch);
/**
* \brief Reads the ADC channel status.
*
* \param p_adc Pointer to an ADC instance.
* \param adc_ch ADC channel number.
*
* \retval 1 means the specified channel is enabled.
* 0 means the specified channel is disabled.
*/
extern uint32_t adc_get_channel_status(Adc *p_adc, adc_channel_num_t adc_ch);
/**
* \brief Reads the ADC status.
*
* \param p_adc Pointer to an ADC instance.
*
* \retval ADC status register content.
*/
extern uint32_t adc_get_status(Adc *p_adc);
/**
* \brief Reads the ADC result data of the specified channel.
*
* \param p_adc Pointer to an ADC instance.
* \param adc_ch ADC channel number.
*
* \retval ADC data of the specified channel.
*/
extern uint32_t adc_get_value(Adc *p_adc, adc_channel_num_t adc_ch);
/**
* \brief Reads the last ADC result data.
*
* \param p_adc Pointer to an ADC instance.
*
* \retval ADC data.
*/
extern uint32_t adc_get_latest_value(Adc *p_adc);
/**
* \brief Returns the actual ADC clock.
*
* \param p_adc Pointer to an ADC instance.
* \param ul_mck Main clock of the device (value in Hz).
*
* \retval 0 The actual ADC clock (value in Hz).
*/
extern uint32_t adc_get_actual_adc_clock(Adc *p_adc, uint32_t ul_mck);
#endif /* SAM3U_SERIES */
/**
* \brief Gets PDC registers base address.
*
* \param p_adc Pointer to an ADC instance.
*
* \retval PDC registers base for PDC driver to access.
*/
extern Pdc *adc_get_pdc_base(Adc *p_adc);
/// @cond 0
/**INDENT-OFF**/
#ifdef __cplusplus
}
#endif /* __cplusplus */
/**INDENT-ON**/
/// @endcond
#endif /* #ifndef ADC10_SAM3U_H_INCLUDED */

266
hardware/arduino/sam/system/libsam/include/adc12_sam3u.h
View File

@ -1,266 +0,0 @@
/*! \file *********************************************************************
*
* \brief API for SAM3 Analog-to-Digital Converter (ADC/ADC12B) controller.
*
* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* - Compiler: IAR EWARM and CodeSourcery GCC for ARM
* - Supported devices: All SAM devices with a Analog-to-Digital Converter can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.com/
*
*******************************************************************************/
#ifndef ADC12_H_INCLUDED
#define ADC12_H_INCLUDED
#include "../chip.h"
/**
* \brief Initializes the given ADC with the specified ADC clock and startup time.
*
* \param p_adc Pointer to an ADC instance.
* \param dw_mck Main clock of the device (value in Hz).
* \param dw_adc_clock Analog-to-Digital conversion clock (value in Hz).
* \param uc_startup ADC start up time value(value in us). Please refer to the product datasheet for details.
* \param ul_offmode_startuptime ADC off mode startup Time value(value in us). Please refer to the product datasheet for details.
*
* \retval 0 The initialization operation succeeds.
* \retval others The initialization operation fails.
*/
extern uint32_t adc12_init(Adc12b *p_adc, uint32_t ul_mck, uint32_t ul_adc_clock, uint32_t ul_startuptime, uint32_t ul_offmode_startuptime);
/**
* \brief Configures conversion resolution.
*
* \param p_adc Pointer to an ADC instance.
* \param resolution ADC resolution.
*/
extern void adc12_set_resolution(Adc12b *p_adc, adc_resolution_t resolution);
/**
* \brief Configures conversion trigger and free run mode.
*
* \param p_adc Pointer to an ADC instance.
* \param trigger Conversion trigger.
*/
extern void adc12_configure_trigger(Adc12b *p_adc, adc_trigger_t trigger);
/**
* \brief Configures ADC power saving mode.
*
* \param p_adc Pointer to an ADC instance.
* \param uc_sleep ADC_MR_SLEEP_NORMAL keeps the ADC Core and reference voltage circuitry ON between conversions
* ADC_MR_SLEEP_SLEEP keeps the ADC Core and reference voltage circuitry OFF between conversions
* \param uc_offmode 0 Standby Mode (if Sleep Bit = 1)
* 1 Off Mode
*/
extern void adc12_configure_power_save(Adc12b *p_adc, uint8_t uc_sleep, uint8_t uc_offmode);
/**
* \brief Configures ADC timing.
*
* \param p_adc Pointer to an ADC instance.
* \param ul_sh ADC sample and hold time = uc_sh / ADC clock.
*/
extern void adc12_configure_timing(Adc12b *p_adc, uint32_t ul_sh);
/**
* \brief Starts analog-to-digital conversion.
*
* \note If one of the hardware event is selected as ADC trigger, this function can NOT start analog to digital conversion.
*
* \param p_adc Pointer to an ADC instance.
*/
extern void adc12_start(Adc12b *p_adc);
/**
* \brief Stop analog-to-digital conversion.
* \param p_adc Pointer to an ADC instance.
*/
extern void adc12_stop(Adc12b *p_adc);
/**
* \brief Enables the specified ADC channel.
*
* \param p_adc Pointer to an ADC instance.
* \param adc_ch ADC channel number.
*/
extern void adc12_enable_channel(Adc12b *p_adc, adc_channel_num_t adc_ch);
/**
* \brief Disables the specified ADC channel.
*
* \param p_adc Pointer to an ADC instance.
* \param adc_ch ADC channel number.
*/
extern void adc12_disable_channel(Adc12b *p_adc, adc_channel_num_t adc_ch);
/**
* \brief Reads the ADC channel status.
*
* \param p_adc Pointer to an ADC instance.
* \param adc_ch ADC channel number.
*
* \retval 1 means the specified channel is enabled.
* 0 means the specified channel is disabled.
*/
extern uint32_t adc12_get_channel_status(Adc12b *p_adc, adc_channel_num_t adc_ch);
/**
* \brief Reads the ADC status.
*
* \param p_adc Pointer to an ADC instance.
*
* \retval ADC status register content.
*/
extern uint32_t adc12_get_status(Adc12b *p_adc);
/**
* \brief Reads the ADC result data of the specified channel.
*
* \param p_adc Pointer to an ADC instance.
* \param adc_ch ADC channel number.
*
* \retval ADC data of the specified channel.
*/
extern uint32_t adc12_get_value(Adc12b *p_adc, adc_channel_num_t adc_ch);
/**
* \brief Reads the last ADC result data.
*
* \param p_adc Pointer to an ADC instance.
*
* \retval ADC data.
*/
extern uint32_t adc12_get_latest_value(Adc12b *p_adc);
/**
* \brief Enables differential input for the specified channel.
*
* \param p_adc Pointer to an ADC instance.
*/
extern void adc12_enable_differential_input(Adc12b *p_adc);
/**
* \brief Disables differential input for the specified channel.
*
* \param p_adc Pointer to an ADC instance.
*
*/
extern void adc12_disable_differential_input(Adc12b *p_adc);
/**
* \brief Enables analog signal offset for the specified channel.
*
* \param p_adc Pointer to an ADC instance.
*
*/
extern void adc12_enable_input_offset(Adc12b *p_adc);
/**
* \brief Disables analog signal offset for the specified channel.
*
* \param p_adc Pointer to an ADC instance.
*
*/
extern void adc12_disable_input_offset(Adc12b *p_adc);
/**
* \brief Configures input gain for the specified channel.
*
* \param p_adc Pointer to an ADC instance.
* \param gain Gain value for the input.
*
*/
extern void adc12_set_input_gain(Adc12b *p_adc, adc_gainvalue_t uc_gain);
/**
* \brief Returns the actual ADC clock.
*
* \param p_adc Pointer to an ADC instance.
* \param ul_mck Main clock of the device (value in Hz).
*
* \retval 0 The actual ADC clock (value in Hz).
*/
extern uint32_t adc12_get_actual_adc_clock(Adc12b *p_adc, uint32_t ul_mck);
/**
* \brief Enables ADC interrupt(s).
*
* \param p_adc Pointer to an ADC instance.
* \param dw_source Interrupt(s) to be enabled.
*
*/
extern void adc12_enable_interrupt(Adc12b *p_adc, uint32_t ul_source);
/**
* \brief Disables ADC interrupt(s).
*
* \param p_adc Pointer to an ADC instance.
* \param dw_source Interrupt(s) to be disabled.
*/
extern void adc12_disable_interrupt(Adc12b *p_adc, uint32_t ul_source);
/** \brief Read ADC interrupt mask.
*
* \param p_uart pointer to a UART instance.
*
* \return The interrupt mask value.
*/
extern uint32_t adc12_get_interrupt_mask(Adc12b *p_adc);
/**
* \brief Reads ADC interrupt status.
*
* \param p_adc Pointer to an ADC instance.
*
* \retval ADC interrupt status.
*/
extern uint32_t adc12_get_interrupt_status(Adc12b *p_adc);
/**
* \brief Reads overrun status.
*
* \param p_adc Pointer to an ADC instance.
*
* \retval ADC overrun status.
*/
extern uint32_t adc12_check_ovr(Adc12b *p_adc,adc_channel_num_t adc_ch);
/**
* \brief Adapts performance versus power consumption.
*
* \note Please refer to ADC Characteristics in the product datasheet for the details.
*
* \param p_adc Pointer to an ADC instance.
* \param ibctl ADC Bias current control.
*
*/
extern void adc12_set_bias_current(Adc12b *p_adc, uint8_t uc_ibctl);
/**
* \brief Gets PDC registers base address.
*
* \param p_adc Pointer to an ADC instance.
*
* \retval PDC registers base for PDC driver to access.
*/
extern Pdc *adc12_get_pdc_base(Adc12b *p_adc);
#endif // ADC12_H_INCLUDED

505
hardware/arduino/sam/system/libsam/include/adc_sam3snxa.h
View File

@ -1,505 +0,0 @@
/*! \file *********************************************************************
*
* \brief API for SAM3 Analog-to-Digital Converter (ADC/ADC12B) controller.
*
* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* - Compiler: IAR EWARM and CodeSourcery GCC for ARM
* - Supported devices: All SAM devices with a Analog-to-Digital Converter can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.com/
*
*******************************************************************************/
#ifndef ADC_SAM3SNXA_H_INCLUDED
#define ADC_SAM3SNXA_H_INCLUDED
#include "../chip.h"
/// @cond 0
/**INDENT-OFF**/
#ifdef __cplusplus
extern "C" {
#endif
/**INDENT-ON**/
/// @endcond
#if SAM3S_SERIES || SAM3N_SERIES || SAM3XA_SERIES
/**
* \brief Initializes the given ADC with the specified ADC clock and startup time.
*
* \param p_adc Pointer to an ADC instance.
* \param dw_mck Main clock of the device (value in Hz).
* \param dw_adc_clock Analog-to-Digital conversion clock (value in Hz).
* \param uc_startup ADC start up time. Please refer to the product datasheet for details.
*
* \retval 0 The initialization operation succeeds.
* \retval others The initialization operation fails.
*/
uint32_t adc_init(Adc *p_adc, uint32_t ul_mck, uint32_t ul_adc_clock, uint8_t uc_startup) ;
/**
* \brief Configures conversion resolution.
*
* \param p_adc Pointer to an ADC instance.
* \param resolution ADC resolution.
*
*/
extern void adc_set_resolution(Adc *p_adc, adc_resolution_t resolution);
/**
* \brief Configures conversion trigger and free run mode.
*
* \param p_adc Pointer to an ADC instance.
* \param trigger Conversion trigger.
* \param uc_freerun ADC_MR_FREERUN_ON enables freerun mode
* ADC_MR_FREERUN_OFF disables freerun mode
*
*/
extern void adc_configure_trigger(Adc *p_adc, adc_trigger_t trigger, uint8_t uc_freerun);
/**
* \brief Configures ADC power saving mode.
*
* \param p_adc Pointer to an ADC instance.
* \param uc_sleep ADC_MR_SLEEP_NORMAL keeps the ADC Core and reference voltage circuitry ON between conversions
* ADC_MR_SLEEP_SLEEP keeps the ADC Core and reference voltage circuitry OFF between conversions
* \param uc_fwup ADC_MR_FWUP_OFF configures sleep mode as uc_sleep setting
* ADC_MR_FWUP_ON keeps voltage reference ON and ADC Core OFF between conversions
*
*/
extern void adc_configure_power_save(Adc *p_adc, uint8_t uc_sleep, uint8_t uc_fwup);
/**
* \brief Configures conversion sequence.
*
* \param p_adc Pointer to an ADC instance.
* \param ch_list Channel sequence list.
* \param number Number of channels in the list.
*
*/
extern void adc_configure_sequence(Adc *p_adc, adc_channel_num_t ch_list[], uint8_t uc_num);
#if SAM3S_SERIES || SAM3XA_SERIES
/**
* \brief Configures ADC timing.
*
* \param p_adc Pointer to an ADC instance.
* \param uc_tracking ADC tracking time = uc_tracking / ADC clock.
* \param uc_settling Analog settling time = (uc_settling + 1) / ADC clock.
* \param uc_transfer Data transfer time = (uc_transfer * 2 + 3) / ADC clock.
*
*/
extern void adc_configure_timing(Adc *p_adc, uint8_t uc_tracking, adc_settling_time_t settling, uint8_t uc_transfer);
#elif SAM3N_SERIES
/**
* \brief Configures ADC timing.
*
* \param p_adc Pointer to an ADC instance.
* \param uc_tracking ADC tracking time = uc_tracking / ADC clock.
*
*/
extern void adc_configure_timing(Adc *p_adc, uint8_t uc_tracking);
#endif
#if SAM3S_SERIES || SAM3XA_SERIES
/**
* \brief enable analog change.
*
* note it allows different analog settings for each channel,
*
* \param pAdc Pointer to an Adc instance.
*/
extern void adc_enable_anch( Adc *pAdc );
/**
* \brief disable analog change.
*
* note DIFF0, GAIN0 and OFF0 are used for all channels.
*
* \param pAdc Pointer to an Adc instance.
*/
extern void adc_disable_anch( Adc *pAdc );
#endif
/**
* \brief Starts analog-to-digital conversion.
*
* \note If one of the hardware event is selected as ADC trigger, this function can NOT start analog to digital conversion.
*
* \param p_adc Pointer to an ADC instance.
*
*/
extern void adc_start( Adc *p_adc ) ;
/**
* \brief Stop analog-to-digital conversion.
* \param p_adc Pointer to an ADC instance.
*
*/
extern void adc_stop( Adc *p_adc ) ;
/**
* \brief Enables the specified ADC channel.
*
* \param p_adc Pointer to an ADC instance.
* \param adc_ch ADC channel number.
*
*/
extern void adc_enable_channel( Adc *p_adc, adc_channel_num_t adc_ch ) ;
/**
* \brief Disables the specified ADC channel.
*
* \param p_adc Pointer to an ADC instance.
* \param adc_ch ADC channel number.
*
*/
extern void adc_disable_channel( Adc *p_adc, adc_channel_num_t adc_ch ) ;
/**
* \brief Reads the ADC channel status.
*
* \param p_adc Pointer to an ADC instance.
* \param adc_ch ADC channel number.
*
* \retval 1 means the specified channel is enabled.
* 0 means the specified channel is disabled.
*/
extern uint32_t adc_get_channel_status(Adc *p_adc, adc_channel_num_t adc_ch);
/**
* \brief Reads the ADC status.
*
* \param p_adc Pointer to an ADC instance.
*
* \retval ADC status register content.
*/
extern uint32_t adc_get_status(Adc *p_adc);
/**
* \brief Reads the ADC overrun status.
*
* \param p_adc Pointer to an ADC instance.
*
* \retval ADC ovverrun status register content.
*/
extern uint32_t adc_get_overrun_status(Adc *p_adc);
/**
* \brief Reads the ADC result data of the specified channel.
*
* \param p_adc Pointer to an ADC instance.
* \param adc_ch ADC channel number.
*
* \retval ADC data of the specified channel.
*/
extern uint32_t adc_get_value(Adc *p_adc, adc_channel_num_t adc_ch);
/**
* \brief Reads the last ADC result data.
*
* \param p_adc Pointer to an ADC instance.
*
* \retval ADC data.
*/
extern uint32_t adc_get_latest_value(Adc *p_adc);
/**
* \brief Enables TAG option so that the number of the last converted channel can be indicated.
*
* \param p_adc Pointer to an ADC instance.
*
*/
extern void adc_enable_tag(Adc *p_adc);
/**
* \brief Disables TAG option.
*
* \param p_adc Pointer to an ADC instance.
*
*/
extern void adc_disable_tag(Adc *p_adc);
/**
* \brief Indicates the last converted channel.
*
* \note If TAG option is NOT enabled before, an incorrect channel number is returned.
*
* \param p_adc Pointer to an ADC instance.
*
* \retval The last converted channel number.
*/
extern adc_channel_num_t adc_get_tag(Adc *p_adc);
/**
* \brief Enables conversion sequencer.
*
* \param p_adc Pointer to an ADC instance.
*
*/
extern void adc_start_sequencer(Adc *p_adc);
/**
* \brief Disables conversion sequencer.
*
* \param p_adc Pointer to an ADC instance.
*
*/
extern void adc_stop_sequencer(Adc *p_adc);
/**
* \brief Configures comparsion mode.
*
* \param p_adc Pointer to an ADC instance.
* \param mode ADC comparsion mode.
*
*/
extern void adc_set_comparison_mode(Adc *p_adc, uint8_t uc_mode);
/**
* \brief get comparsion mode.
*
* \param p_adc Pointer to an ADC instance.
* \param mode ADC comparsion mode.
*
* \retval compare mode value.
*/
extern uint32_t adc_get_comparison_mode(Adc *p_adc);
/**
* \brief Configures ADC compare window.
*
* \param p_adc Pointer to an ADC instance.
* \param w_low_threshold Low threshold of compare window.
* \param w_high_threshold High threshold of compare window.
*
*/
extern void adc_set_comparsion_window(Adc *p_adc, uint16_t us_low_threshold, uint16_t us_high_threshold);
/**
* \brief Configures comparison selected channel.
*
* \param p_adc Pointer to an ADC instance.
* \param channel Comparison selected channel.
*
*/
extern void adc_set_comparison_channel(Adc *p_adc, adc_channel_num_t channel);
#if SAM3S_SERIES || SAM3XA_SERIES
/**
* \brief Enables differential input for the specified channel.
*
* \param p_adc Pointer to an ADC instance.
* \param channel Channel number.
*
*/
extern void adc_enable_differential_input(Adc *p_adc, adc_channel_num_t channel);
/**
* \brief Disables differential input for the specified channel.
*
* \param p_adc Pointer to an ADC instance.
* \param channel Channel number.
*
*/
extern void adc_disable_differential_input(Adc *p_adc, adc_channel_num_t channel);
/**
* \brief Enables analog signal offset for the specified channel.
*
* \param p_adc Pointer to an ADC instance.
* \param channel Channel number.
*
*/
extern void adc_enable_input_offset(Adc *p_adc, adc_channel_num_t channel);
/**
* \brief Disables analog signal offset for the specified channel.
*
* \param p_adc Pointer to an ADC instance.
* \param channel Channel number.
*
*/
extern void adc_disable_input_offset(Adc *p_adc, adc_channel_num_t channel);
/**
* \brief Configures input gain for the specified channel.
*
* \param p_adc Pointer to an ADC instance.
* \param channel Channel number.
* \param gain Gain value for the input.
*
*/
extern void adc_set_input_gain(Adc *p_adc, adc_channel_num_t channel, adc_gainvalue_t uc_gain);
#endif
#if SAM3SD8_SERIES
/**
* \brief set adc auto calibration mode.
*
* \param p_adc Pointer to an ADC instance.
*
*/
extern void adc_set_calibmode(Adc *p_adc);
#endif
/**
* \brief Returns the actual ADC clock.
*
* \param p_adc Pointer to an ADC instance.
* \param ul_mck Main clock of the device (value in Hz).
*
* \retval 0 The actual ADC clock (value in Hz).
*/
extern uint32_t adc_get_actual_adc_clock(Adc *p_adc, uint32_t ul_mck);
/**
* \brief Enables ADC interrupt(s).
*
* \param p_adc Pointer to an ADC instance.
* \param dw_source Interrupt(s) to be enabled.
*
*/
extern void adc_enable_interrupt(Adc *p_adc, uint32_t ul_source);
/**
* \brief Disables ADC interrupt(s).
*
* \param p_adc Pointer to an ADC instance.
* \param dw_source Interrupt(s) to be disabled.
*
*/
extern void adc_disable_interrupt(Adc *p_adc, uint32_t ul_source);
/**
* \brief Reads ADC interrupt status.
*
* \param p_adc Pointer to an ADC instance.
*
* \retval ADC interrupt status.
*/
extern uint32_t adc_get_interrupt_status(Adc *p_adc);
/** \brief Read ADC interrupt mask.
*
* \param p_uart pointer to a UART instance.
*
* \return The interrupt mask value.
*/
extern uint32_t adc_get_interrupt_mask(Adc *p_adc);
/**
* \brief Reads overrun status.
*
* \param p_adc Pointer to an ADC instance.
*
* \retval ADC overrun status.
*/
extern uint32_t adc_check_ovr(Adc *p_adc, adc_channel_num_t adc_ch);
#if SAM3S_SERIES || SAM3XA_SERIES
/**
* \brief Adapts performance versus power consumption.
*
* \note Please refer to ADC Characteristics in the product datasheet for the details.
*
* \param p_adc Pointer to an ADC instance.
* \param ibctl ADC Bias current control.
*
*/
extern void adc_set_bias_current(Adc *p_adc, uint8_t uc_ibctl);
#endif
#if SAM3S_SERIES || SAM3XA_SERIES
/**
* \brief turn on temperature sensor.
*
* \param p_adc Pointer to an ADC instance.
*
*/
extern void adc_enable_ts(Adc *p_adc);
/**
* \brief turn off temperature sensor.
*
* \param p_adc Pointer to an ADC instance.
*
*/
extern void adc_disable_ts(Adc *p_adc);
#endif
/**
* \brief Enables or disables write protection of ADC registers.
*
* \param p_adc Pointer to an ADC instance.
* \param dw_eanble 1 to eanble, 0 to disable.
*/
extern void adc_set_writeprotect(Adc *p_adc, uint32_t ul_enable);
/**
* \brief Indicates write protect status.
*
* \param p_adc Pointer to an ADC instance.
*
* \return 0 if the peripheral is not protected, or 16-bit Write Protect Violation Status.
*/
extern uint32_t adc_get_writeprotect_status(Adc *p_adc);
/**
* \brief Checks ADC configurations.
*
* \param p_adc Pointer to an ADC instance.
* \param dw_mck Main clock of the device (value in Hz).
*/
extern void adc_check(Adc* p_adc, uint32_t ul_mck);
/**
* \brief Gets PDC registers base address.
*
* \param p_adc Pointer to an ADC instance.
*
* \retval PDC registers base for PDC driver to access.
*/
extern Pdc *adc_get_pdc_base(Adc *p_adc);
/// @cond 0
/**INDENT-OFF**/
#ifdef __cplusplus
}
#endif /* __cplusplus */
/**INDENT-ON**/
/// @endcond
#endif /* SAM3S_SERIES || SAM3N_SERIES || SAM3XA_SERIES */
#endif /* #ifndef ADC_SAM3SNXA_H_INCLUDED */

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hardware/arduino/sam/system/libsam/source/adc.c Normal file
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/**
* \file
*
* \brief Analog-to-Digital Converter (ADC/ADC12B) driver for SAM.
*
* Copyright (c) 2011 - 2012 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
#include "../chip.h"
/// @cond 0
/**INDENT-OFF**/
#ifdef __cplusplus
extern "C" {
#endif
/**INDENT-ON**/
/// @endcond
/**
* \defgroup sam_drivers_adc_group Analog-to-digital Converter (ADC)
*
* Driver for the Analog-to-digital Converter. This driver provides access to the main
* features of the ADC controller.
*
* @{
*/
#if SAM3S_SERIES || SAM4S_SERIES || SAM3N_SERIES || SAM3XA_SERIES
/**
* \brief Initialize the given ADC with the specified ADC clock and startup time.
*
* \param p_adc Pointer to an ADC instance.
* \param ul_mck Main clock of the device (value in Hz).
* \param ul_adc_clock Analog-to-Digital conversion clock (value in Hz).
* \param uc_startup ADC start up time. Please refer to the product datasheet
* for details.
*
* \return 0 on success.
*/
uint32_t adc_init(Adc *p_adc, const uint32_t ul_mck,
const uint32_t ul_adc_clock, const uint8_t uc_startup)
{
uint32_t ul_prescal;
/* Reset the controller. */
p_adc->ADC_CR = ADC_CR_SWRST;
/* Reset Mode Register. */
p_adc->ADC_MR = 0;
/* Reset PDC transfer. */
p_adc->ADC_PTCR = (ADC_PTCR_RXTDIS | ADC_PTCR_TXTDIS);
p_adc->ADC_RCR = 0;
p_adc->ADC_RNCR = 0;
ul_prescal = ul_mck / (2 * ul_adc_clock) - 1;
p_adc->ADC_MR |= ADC_MR_PRESCAL(ul_prescal) |
((uc_startup << ADC_MR_STARTUP_Pos) &
ADC_MR_STARTUP_Msk);
return 0;
}
#elif SAM3U_SERIES
/**
* \brief Initialize the given ADC with the specified ADC clock and startup time.
*
* \param p_adc Pointer to an ADC instance.
* \param ul_mck Main clock of the device (value in Hz).
* \param ul_adc_clock Analog-to-Digital conversion clock (in Hz).
* \param ul_startuptime ADC startup time value (value in us).
* Please refer to the product datasheet for details.
* \param ul_offmode_startuptime ADC off mode startup time value (in us).
* Please refer to the product datasheet for details.
*
* \return 0 on success.
*/
uint32_t adc_init(Adc *p_adc, const uint32_t ul_mck, const uint32_t ul_adc_clock,
const uint32_t ul_startuptime)
{
uint32_t ul_prescal, ul_startup;
p_adc->ADC_CR = ADC_CR_SWRST;
/* Reset Mode Register. */
p_adc->ADC_MR = 0;
/* Reset PDC transfer. */
p_adc->ADC_PTCR = (ADC_PTCR_RXTDIS | ADC_PTCR_TXTDIS);
p_adc->ADC_RCR = 0;
p_adc->ADC_RNCR = 0;
ul_prescal = ul_mck / (2 * ul_adc_clock) - 1;
ul_startup = ((ul_adc_clock / 1000000) * ul_startuptime / 8) - 1;
p_adc->ADC_MR |= ADC_MR_PRESCAL(ul_prescal) |
((ul_startup << ADC_MR_STARTUP_Pos) &
ADC_MR_STARTUP_Msk);
return 0;
}
#endif
/**
* \brief Configure the conversion resolution.
*
* \param p_adc Pointer to an ADC instance.
* \param resolution ADC resolution.
*
*/
void adc_set_resolution(Adc *p_adc,const enum adc_resolution_t resolution)
{
p_adc->ADC_MR |= (resolution << 4) & ADC_MR_LOWRES;
}
#if SAM3S_SERIES || SAM4S_SERIES || SAM3N_SERIES || SAM3XA_SERIES
/**
* \brief Configure conversion trigger and free run mode.
*
* \param p_adc Pointer to an ADC instance.
* \param trigger Conversion trigger.
* \param uc_freerun ADC_MR_FREERUN_ON enables freerun mode,
* ADC_MR_FREERUN_OFF disables freerun mode.
*
*/
void adc_configure_trigger(Adc *p_adc, const enum adc_trigger_t trigger,
uint8_t uc_freerun)
{
p_adc->ADC_MR |= trigger | ((uc_freerun << 7) & ADC_MR_FREERUN);
}
#elif SAM3U_SERIES
/**
* \brief Configure conversion trigger and free run mode.
*
* \param p_adc Pointer to an ADC instance.
* \param trigger Conversion trigger.
*/
void adc_configure_trigger(Adc *p_adc, const enum adc_trigger_t trigger)
{
p_adc->ADC_MR |= trigger;
}
#endif
#if SAM3S_SERIES || SAM4S_SERIES || SAM3N_SERIES || SAM3XA_SERIES
/**
* \brief Configures ADC power saving mode.
*
* \param p_adc Pointer to an ADC instance.
* \param uc_sleep ADC_MR_SLEEP_NORMAL keeps the ADC Core and reference voltage
* circuitry ON between conversions.
* ADC_MR_SLEEP_SLEEP keeps the ADC Core and reference voltage circuitry OFF
* between conversions.
* \param uc_fwup ADC_MR_FWUP_OFF configures sleep mode as uc_sleep setting,
* ADC_MR_FWUP_ON keeps voltage reference ON and ADC Core OFF between conversions.
*/
void adc_configure_power_save(Adc *p_adc, const uint8_t uc_sleep, const uint8_t uc_fwup)
{
p_adc->ADC_MR |= (((uc_sleep << 5) & ADC_MR_SLEEP) |
((uc_fwup << 6) & ADC_MR_FWUP));
}
#elif SAM3U_SERIES
/**
* \brief Configure ADC power saving mode.
*
* \param p_adc Pointer to an ADC instance.
* \param uc_sleep ADC_MR_SLEEP_NORMAL keeps the ADC Core and reference
* voltage circuitry ON between conversions.
* ADC_MR_SLEEP_SLEEP keeps the ADC Core and reference voltage circuitry
* OFF between conversions.
* \param uc_offmode 0 for Standby Mode (if Sleep Bit = 1), 1 for Off Mode.
*/
void adc_configure_power_save(Adc *p_adc, const uint8_t uc_sleep)
{
p_adc->ADC_MR |= ((uc_sleep << 5) & ADC_MR_SLEEP);
}
#endif
#if SAM3S_SERIES || SAM4S_SERIES || SAM3N_SERIES || SAM3XA_SERIES
/**
* \brief Configure conversion sequence.
*
* \param p_adc Pointer to an ADC instance.
* \param ch_list Channel sequence list.
* \param number Number of channels in the list.
*/
void adc_configure_sequence(Adc *p_adc, const enum adc_channel_num_t ch_list[],
uint8_t uc_num)
{
uint8_t uc_counter;
if (uc_num < 8) {
for (uc_counter = 0; uc_counter < uc_num; uc_counter++) {
p_adc->ADC_SEQR1 |=
ch_list[uc_counter] << (4 * uc_counter);
}
} else {
for (uc_counter = 0; uc_counter < 8; uc_counter++) {
p_adc->ADC_SEQR1 |=
ch_list[uc_counter] << (4 * uc_counter);
}
for (uc_counter = 0; uc_counter < uc_num - 8; uc_counter++) {
p_adc->ADC_SEQR2 |=
ch_list[uc_counter] << (4 * uc_counter);
}
}
}
#endif
#if SAM3S_SERIES || SAM4S_SERIES || SAM3XA_SERIES
/**
* \brief Configure ADC timing.
*
* \param p_adc Pointer to an ADC instance.
* \param uc_tracking ADC tracking time = uc_tracking / ADC clock.
* \param uc_settling Analog settling time = (uc_settling + 1) / ADC clock.
* \param uc_transfer Data transfer time = (uc_transfer * 2 + 3) / ADC clock.
*/
void adc_configure_timing(Adc *p_adc, const uint8_t uc_tracking,
const enum adc_settling_time_t settling,const uint8_t uc_transfer)
{
p_adc->ADC_MR |= ADC_MR_TRANSFER(uc_transfer)
| settling | ADC_MR_TRACKTIM(uc_tracking);
}
#elif SAM3N_SERIES
/**
* \brief Configure ADC timing.
*
* \param p_adc Pointer to an ADC instance.
* \param uc_tracking ADC tracking time = uc_tracking / ADC clock.
*/
void adc_configure_timing(Adc *p_adc, const uint8_t uc_tracking)
{
p_adc->ADC_MR |= ADC_MR_TRACKTIM(uc_tracking);
}
#elif SAM3U_SERIES
/**
* \brief Configure ADC timing.
*
* \param p_adc Pointer to an ADC instance.
* \param ul_sh ADC sample and hold time = uc_sh / ADC clock.
*/
void adc_configure_timing(Adc *p_adc, const uint32_t ul_sh)
{
p_adc->ADC_MR |= ADC_MR_SHTIM(ul_sh);
}
#endif
#if SAM3S_SERIES || SAM4S_SERIES || SAM3XA_SERIES
/**
* \brief Enable analog change.
*
* \note It allows different analog settings for each channel.
*
* \param p_Adc Pointer to an ADC instance.
*/
void adc_enable_anch(Adc *p_adc)
{
p_adc->ADC_MR |= ADC_MR_ANACH;
}
#endif
#if SAM3S_SERIES || SAM4S_SERIES || SAM3XA_SERIES
/**
* \brief Disable analog change.
*
* \note DIFF0, GAIN0 and OFF0 are used for all channels.
*
* \param p_Adc Pointer to an ADC instance.
*/
void adc_disable_anch(Adc *p_adc)
{
p_adc->ADC_MR &= ~ADC_MR_ANACH;
}
#endif
/**
* \brief Start analog-to-digital conversion.
*
* \note If one of the hardware event is selected as ADC trigger,
* this function can NOT start analog to digital conversion.
*
* \param p_adc Pointer to an ADC instance.
*/
void adc_start(Adc *p_adc)
{
p_adc->ADC_CR = ADC_CR_START;
}
/**
* \brief Stop analog-to-digital conversion.
*
* \param p_adc Pointer to an ADC instance.
*/
void adc_stop(Adc *p_adc)
{
p_adc->ADC_CR = ADC_CR_SWRST;
}
/**
* \brief Enable the specified ADC channel.
*
* \param p_adc Pointer to an ADC instance.
* \param adc_ch ADC channel number.
*/
void adc_enable_channel(Adc *p_adc, const enum adc_channel_num_t adc_ch)
{
p_adc->ADC_CHER = 1 << adc_ch;
}
/**
* \brief Enable all ADC channels.
*
* \param p_adc Pointer to an ADC instance.
*/
void adc_enable_all_channel(Adc *p_adc)
{
#if SAM3S_SERIES || SAM4S_SERIES || SAM3N_SERIES || SAM3XA_SERIES
p_adc->ADC_CHER = 0xFFFF;
#elif SAM3U_SERIES
p_adc->ADC_CHER = 0xFF;
#endif
}
/**
* \brief Disable the specified ADC channel.
*
* \param p_adc Pointer to an ADC instance.
* \param adc_ch ADC channel number.
*/
void adc_disable_channel(Adc *p_adc, const enum adc_channel_num_t adc_ch)
{
p_adc->ADC_CHDR = 1 << adc_ch;
}
/**
* \brief Disable all ADC channel.
*
* \param p_adc Pointer to an ADC instance.
*/
void adc_disable_all_channel(Adc *p_adc)
{
#if SAM3S_SERIES || SAM4S_SERIES || SAM3N_SERIES || SAM3XA_SERIES
p_adc->ADC_CHDR = 0xFFFF;
#elif SAM3U_SERIES
p_adc->ADC_CHDR = 0xFF;
#endif
}
/**
* \brief Read the ADC channel status.
*
* \param p_adc Pointer to an ADC instance.
* \param adc_ch ADC channel number.
*
* \retval 1 if channel is enabled.
* \retval 0 if channel is disabled.
*/
uint32_t adc_get_channel_status(const Adc *p_adc, const enum adc_channel_num_t adc_ch)
{
return p_adc->ADC_CHSR & (1 << adc_ch);
}
/**
* \brief Read the ADC result data of the specified channel.
*
* \param p_adc Pointer to an ADC instance.
* \param adc_ch ADC channel number.
*
* \return ADC value of the specified channel.
*/
uint32_t adc_get_channel_value(const Adc *p_adc, const enum adc_channel_num_t adc_ch)
{
uint32_t ul_data = 0;
if (15 >= adc_ch) {
ul_data = *(p_adc->ADC_CDR + adc_ch);
}
return ul_data;
}
/**
* \brief Read the last ADC result data.
*
* \param p_adc Pointer to an ADC instance.
*
* \return ADC latest value.
*/
uint32_t adc_get_latest_value(const Adc *p_adc)
{
return p_adc->ADC_LCDR;
}
#if SAM3S_SERIES || SAM4S_SERIES || SAM3N_SERIES || SAM3XA_SERIES
/**
* \brief Enable TAG option so that the number of the last converted channel
* can be indicated.
*
* \param p_adc Pointer to an ADC instance.
*/
void adc_enable_tag(Adc *p_adc)
{
p_adc->ADC_EMR |= ADC_EMR_TAG;
}
#endif
#if SAM3S_SERIES || SAM4S_SERIES || SAM3N_SERIES || SAM3XA_SERIES
/**
* \brief Disable TAG option.
*
* \param p_adc Pointer to an ADC instance.
*/
void adc_disable_tag(Adc *p_adc)
{
p_adc->ADC_EMR &= ~ADC_EMR_TAG;
}
#endif
#if SAM3S_SERIES || SAM4S_SERIES || SAM3N_SERIES || SAM3XA_SERIES
/**
* \brief Indicate the last converted channel.
*
* \note If TAG option is NOT enabled before, an incorrect channel
* number is returned.
*
* \param p_adc Pointer to an ADC instance.
*
* \return The last converted channel number.
*/
enum adc_channel_num_t adc_get_tag(const Adc *p_adc)
{
return (p_adc->ADC_LCDR & ADC_LCDR_CHNB_Msk) >> ADC_LCDR_CHNB_Pos;
}
#endif
#if SAM3S_SERIES || SAM4S_SERIES || SAM3N_SERIES || SAM3XA_SERIES
/**
* \brief Enable conversion sequencer.
*
* \param p_adc Pointer to an ADC instance.
*/
void adc_start_sequencer(Adc *p_adc)
{
p_adc->ADC_MR |= ADC_MR_USEQ;
}
#endif
#if SAM3S_SERIES || SAM4S_SERIES || SAM3N_SERIES || SAM3XA_SERIES
/**
* \brief Disable conversion sequencer.
*
* \param p_adc Pointer to an ADC instance.
*/
void adc_stop_sequencer(Adc *p_adc)
{
p_adc->ADC_MR &= ~ADC_MR_USEQ;
}
#endif
#if SAM3S_SERIES || SAM4S_SERIES || SAM3N_SERIES || SAM3XA_SERIES
/**
* \brief Configure comparison mode.
*
* \param p_adc Pointer to an ADC instance.
* \param uc_mode ADC comparison mode.
*/
void adc_set_comparison_mode(Adc *p_adc, const uint8_t uc_mode)
{
p_adc->ADC_EMR &= (uint32_t) ~ (ADC_EMR_CMPMODE_Msk);
p_adc->ADC_EMR |= (uc_mode & ADC_EMR_CMPMODE_Msk);
}
#endif
#if SAM3S_SERIES || SAM4S_SERIES || SAM3N_SERIES || SAM3XA_SERIES
/**
* \brief Get comparison mode.
*
* \param p_adc Pointer to an ADC instance.
*
* \retval Compare mode value.
*/
uint32_t adc_get_comparison_mode(const Adc *p_adc)
{
return p_adc->ADC_EMR & ADC_EMR_CMPMODE_Msk;
}
#endif
#if SAM3S_SERIES || SAM4S_SERIES || SAM3N_SERIES || SAM3XA_SERIES
/**
* \brief Configure ADC compare window.
*
* \param p_adc Pointer to an ADC instance.
* \param w_low_threshold Low threshold of compare window.
* \param w_high_threshold High threshold of compare window.
*/
void adc_set_comparison_window(Adc *p_adc, const uint16_t us_low_threshold,
const uint16_t us_high_threshold)
{
p_adc->ADC_CWR = ADC_CWR_LOWTHRES(us_low_threshold) |
ADC_CWR_HIGHTHRES(us_high_threshold);
}
#endif
#if SAM3S_SERIES || SAM4S_SERIES || SAM3N_SERIES || SAM3XA_SERIES
/**
* \brief Configure comparison selected channel.
*
* \param p_adc Pointer to an ADC instance.
* \param channel ADC channel number.
*/
void adc_set_comparison_channel(Adc *p_adc, const enum adc_channel_num_t channel)
{
if (channel < 16) {
p_adc->ADC_EMR &= (uint32_t) ~ (ADC_EMR_CMPALL);
p_adc->ADC_EMR &= (uint32_t) ~ (ADC_EMR_CMPSEL_Msk);
p_adc->ADC_EMR |= (channel << ADC_EMR_CMPSEL_Pos);
} else {
p_adc->ADC_EMR |= ADC_EMR_CMPALL;
}
}
#endif
#if SAM3S_SERIES || SAM4S_SERIES || SAM3XA_SERIES
/**
* \brief Enable differential input for the specified channel.
*
* \param p_adc Pointer to an ADC instance.
* \param channel ADC channel number.
*/
void adc_enable_channel_differential_input(Adc *p_adc, const enum adc_channel_num_t channel)
{
p_adc->ADC_COR |= 0x01u << (16 + channel);
}
#endif
#if SAM3S_SERIES || SAM4S_SERIES || SAM3XA_SERIES
/**
* \brief Disable differential input for the specified channel.
*
* \param p_adc Pointer to an ADC instance.
* \param channel ADC channel number.
*/
void adc_disable_channel_differential_input(Adc *p_adc, const enum adc_channel_num_t channel)
{
uint32_t ul_temp;
ul_temp = p_adc->ADC_COR;
p_adc->ADC_COR &= 0xfffeffffu << channel;
p_adc->ADC_COR |= ul_temp;
}
#endif
#if SAM3S_SERIES || SAM4S_SERIES || SAM3XA_SERIES
/**
* \brief Enable analog signal offset for the specified channel.
*
* \param p_adc Pointer to an ADC instance.
* \param channel ADC channel number.
*/
void adc_enable_channel_input_offset(Adc *p_adc, const enum adc_channel_num_t channel)
{
p_adc->ADC_COR |= 0x01u << channel;
}
#endif
#if SAM3S_SERIES || SAM4S_SERIES || SAM3XA_SERIES
/**
* \brief Disable analog signal offset for the specified channel.
*
* \param p_adc Pointer to an ADC instance.
* \param channel ADC channel number.
*/
void adc_disable_channel_input_offset(Adc *p_adc, const enum adc_channel_num_t channel)
{
uint32_t ul_temp;
ul_temp = p_adc->ADC_COR;
p_adc->ADC_COR &= (0xfffffffeu << channel);
p_adc->ADC_COR |= ul_temp;
}
#endif
#if SAM3S_SERIES || SAM4S_SERIES || SAM3XA_SERIES
/**
* \brief Configure input gain for the specified channel.
*
* \param p_adc Pointer to an ADC instance.
* \param channel ADC channel number.
* \param gain Gain value for the input.
*/
void adc_set_channel_input_gain(Adc *p_adc, const enum adc_channel_num_t channel,
const enum adc_gainvalue_t gain)
{
p_adc->ADC_CGR |= (0x03u << (2 * channel)) & (gain << (2 * channel));
}
#endif
#if SAM3SD8_SERIES || SAM4S_SERIES
/**
* \brief Set ADC auto calibration mode.
*
* \param p_adc Pointer to an ADC instance.
*/
void adc_set_calibmode(Adc * p_adc)
{
p_adc->ADC_CR |= ADC_CR_AUTOCAL;
}
#endif
/**
* \brief Return the actual ADC clock.
*
* \param p_adc Pointer to an ADC instance.
* \param ul_mck Main clock of the device (in Hz).
*
* \return The actual ADC clock (in Hz).
*/
uint32_t adc_get_actual_adc_clock(const Adc *p_adc, const uint32_t ul_mck)
{
uint32_t ul_adcfreq;
uint32_t ul_prescal;
/* ADCClock = MCK / ( (PRESCAL+1) * 2 ) */
ul_prescal = ((p_adc->ADC_MR & ADC_MR_PRESCAL_Msk) >> ADC_MR_PRESCAL_Pos);
ul_adcfreq = ul_mck / ((ul_prescal + 1) * 2);
return ul_adcfreq;
}
/**
* \brief Enable ADC interrupts.
*
* \param p_adc Pointer to an ADC instance.
* \param ul_source Interrupts to be enabled.
*/
void adc_enable_interrupt(Adc *p_adc, const uint32_t ul_source)
{
p_adc->ADC_IER = ul_source;
}
/**
* \brief Disable ADC interrupts.
*
* \param p_adc Pointer to an ADC instance.
* \param ul_source Interrupts to be disabled.
*/
void adc_disable_interrupt(Adc *p_adc, const uint32_t ul_source)
{
p_adc->ADC_IDR = ul_source;
}
#if SAM3S_SERIES || SAM4S_SERIES || SAM3N_SERIES || SAM3XA_SERIES
/**
* \brief Get ADC interrupt and overrun error status.
*
* \param p_adc Pointer to an ADC instance.
*
* \return ADC status structure.
*/
uint32_t adc_get_status(const Adc *p_adc)
{
return p_adc->ADC_ISR;
}
/**
* \brief Get ADC interrupt and overrun error status.
*
* \param p_adc Pointer to an ADC instance.
*
* \return ADC status structure.
*/
uint32_t adc_get_overrun_status(const Adc *p_adc)
{
return p_adc->ADC_OVER;
}
#elif SAM3U_SERIES
/**
* \brief Read ADC interrupt and overrun error status.
*
* \param p_adc Pointer to an ADC instance.
*
* \retval ADC status structure.
*/
uint32_t adc_get_status(const Adc *p_adc)
{
return p_adc->ADC_SR;
}
#endif
/**
* \brief Read ADC interrupt mask.
*
* \param p_adc Pointer to an ADC instance.
*
* \return The interrupt mask value.
*/
uint32_t adc_get_interrupt_mask(const Adc *p_adc)
{
return p_adc->ADC_IMR;
}
#if SAM3S_SERIES || SAM4S_SERIES || SAM3XA_SERIES
/**
* \brief Adapt performance versus power consumption.
*
* \note Please refer to ADC Characteristics in the product datasheet
* for more details.
*
* \param p_adc Pointer to an ADC instance.
* \param ibctl ADC Bias current control.
*/
void adc_set_bias_current(Adc *p_adc, const uint8_t uc_ibctl)
{
p_adc->ADC_ACR |= ADC_ACR_IBCTL(uc_ibctl);
}
#endif
#if SAM3S_SERIES || SAM4S_SERIES || SAM3XA_SERIES
/**
* \brief Turn on temperature sensor.
*
* \param p_adc Pointer to an ADC instance.
*/
void adc_enable_ts(Adc *p_adc)
{
p_adc->ADC_ACR |= ADC_ACR_TSON;
}
#endif
#if SAM3S_SERIES || SAM4S_SERIES || SAM3XA_SERIES
/**
* \brief Turn off temperature sensor.
*
* \param p_adc Pointer to an ADC instance.
*/
void adc_disable_ts(Adc *p_adc)
{
p_adc->ADC_ACR &= ~ADC_ACR_TSON;
}
#endif
#if SAM3S_SERIES || SAM4S_SERIES || SAM3N_SERIES || SAM3XA_SERIES
/**
* \brief Enable or disable write protection of ADC registers.
*
* \param p_adc Pointer to an ADC instance.
* \param ul_enable 1 to enable, 0 to disable.
*/
void adc_set_writeprotect(Adc *p_adc, const uint32_t ul_enable)
{
p_adc->ADC_WPMR |= ADC_WPMR_WPKEY(ul_enable);
}
#endif
#if SAM3S_SERIES || SAM4S_SERIES || SAM3N_SERIES || SAM3XA_SERIES
/**
* \brief Indicate write protect status.
*
* \param p_adc Pointer to an ADC instance.
*
* \return 0 if the peripheral is not protected, or 16-bit write protect
* violation Status.
*/
uint32_t adc_get_writeprotect_status(const Adc *p_adc)
{
return p_adc->ADC_WPSR & ADC_WPSR_WPVS;
}
#endif
#if 0
/**
* \brief calcul_startup
*/
static uint32_t calcul_startup(const uint32_t ul_startup)
{
uint32_t ul_startup_value = 0;
if (ul_startup == 0)
ul_startup_value = 0;
else if (ul_startup == 1)
ul_startup_value = 8;
else if (ul_startup == 2)
ul_startup_value = 16;
else if (ul_startup == 3)
ul_startup_value = 24;
else if (ul_startup == 4)
ul_startup_value = 64;
else if (ul_startup == 5)
ul_startup_value = 80;
else if (ul_startup == 6)
ul_startup_value = 96;
else if (ul_startup == 7)
ul_startup_value = 112;
else if (ul_startup == 8)
ul_startup_value = 512;
else if (ul_startup == 9)
ul_startup_value = 576;
else if (ul_startup == 10)
ul_startup_value = 640;
else if (ul_startup == 11)
ul_startup_value = 704;
else if (ul_startup == 12)
ul_startup_value = 768;
else if (ul_startup == 13)
ul_startup_value = 832;
else if (ul_startup == 14)
ul_startup_value = 896;
else if (ul_startup == 15)
ul_startup_value = 960;
return ul_startup_value;
}
/**
* \brief Check ADC configurations.
*
* \param p_adc Pointer to an ADC instance.
* \param ul_mck Main clock of the device (in Hz).
*/
void adc_check(Adc *p_adc, const uint32_t ul_mck)
{
uint32_t ul_adcfreq;
uint32_t ul_prescal;
uint32_t ul_startup;
/* ADCClock = MCK / ( (PRESCAL+1) * 2 ) */
ul_prescal = ((p_adc->ADC_MR & ADC_MR_PRESCAL_Msk) >>
ADC_MR_PRESCAL_Pos);
ul_adcfreq = ul_mck / ((ul_prescal + 1) * 2);
printf("ADC clock frequency = %d Hz\r\n", (int)ul_adcfreq);
if (ul_adcfreq < ADC_FREQ_MIN) {
printf("adc frequency too low (out of specification: %d Hz)\r\n",
(int)ADC_FREQ_MIN);
}
if (ul_adcfreq > ADC_FREQ_MAX) {
printf("adc frequency too high (out of specification: %d Hz)\r\n",
(int)ADC_FREQ_MAX);
}
ul_startup = ((p_adc->ADC_MR & ADC_MR_STARTUP_Msk) >>
ADC_MR_STARTUP_Pos);
if (!(p_adc->ADC_MR & ADC_MR_SLEEP_SLEEP)) {
/* 40ms */
if (ADC_STARTUP_NORM * ul_adcfreq / 1000000 >
calcul_startup(ul_startup)) {
printf("Startup time too small: %d, programmed: %d\r\n",
(int)(ADC_STARTUP_NORM * ul_adcfreq /
1000000),
(int)calcul_startup(ul_startup));
}
} else {
if (p_adc->ADC_MR & ADC_MR_FREERUN_ON) {
puts("FreeRun forbidden in sleep mode\r");
}
if (!(p_adc->ADC_MR & ADC_MR_FWUP_ON)) {
/* Sleep 40ms */
if (ADC_STARTUP_NORM * ul_adcfreq / 1000000 >
calcul_startup(ul_startup)) {
printf("Startup time too small: %d, programmed: %d\r\n",
(int)(ADC_STARTUP_NORM * ul_adcfreq / 1000000),
(int)(calcul_startup(ul_startup)));
}
} else {
if (p_adc->ADC_MR & ADC_MR_FWUP_ON) {
/* Fast Wake Up Sleep Mode: 12ms */
if (ADC_STARTUP_FAST * ul_adcfreq / 1000000 >
calcul_startup(ul_startup)) {
printf("Startup time too small: %d, programmed: %d\r\n",
(int)(ADC_STARTUP_NORM * ul_adcfreq / 1000000),
(int)(calcul_startup(ul_startup)));
}
}
}
}
}
#endif
/**
* \brief Get PDC registers base address.
*
* \param p_adc Pointer to an ADC instance.
*
* \return ADC PDC register base address.
*/
Pdc *adc_get_pdc_base(const Adc *p_adc)
{
return PDC_ADC;
}
//@}
/// @cond 0
/**INDENT-OFF**/
#ifdef __cplusplus
}
#endif
/**INDENT-ON**/
/// @endcond

329
hardware/arduino/sam/system/libsam/source/adc10_sam3u.c
View File

@ -1,329 +0,0 @@
/*! \file *********************************************************************
*
* \brief API for SAM3 Analog-to-Digital Converter (ADC/ADC12B) controller.
*
* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* - Compiler: IAR EWARM and CodeSourcery GCC for ARM
* - Supported devices: All SAM devices with a Analog-to-Digital Converter can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.com/
*
*******************************************************************************/
#include "../chip.h"
/// @cond 0
/**INDENT-OFF**/
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/**INDENT-ON**/
/// @endcond
#if SAM3U_SERIES
/**
* \brief Initializes the given ADC with the specified ADC clock and startup time.
*
* \param p_adc Pointer to an ADC instance.
* \param dw_mck Main clock of the device (value in Hz).
* \param dw_adc_clock Analog-to-Digital conversion clock (value in Hz).
* \param ul_startuptime ADC start up time value(value in us). Please refer to the product datasheet for details.
* \param ul_offmode_startuptime ADC off mode startup Time value(value in us). Please refer to the product datasheet for details.
*
* \retval 0 The initialization operation succeeds.
* \retval others The initialization operation fails.
*/
uint32_t adc_init(Adc *p_adc, uint32_t ul_mck, uint32_t ul_adc_clock, uint32_t ul_startuptime)
{
p_adc->ADC_CR = ADC_CR_SWRST;
/* Reset Mode Register */
p_adc->ADC_MR = 0;
/* Reset PDC transfer */
p_adc->ADC_PTCR = (ADC_PTCR_RXTDIS | ADC_PTCR_TXTDIS);
p_adc->ADC_RCR = 0;
p_adc->ADC_RNCR = 0;
uint32_t prescal = ul_mck/(2 * ul_adc_clock) - 1;
// check for rounding errors
if ( (ul_mck/((prescal+1)*2)) > ul_adc_clock ) {
prescal++;
ul_adc_clock = ul_mck/((prescal+1)*2);
}
uint32_t startup = ((ul_adc_clock/1000000) * ul_startuptime / 8) - 1;
p_adc->ADC_MR |= ADC_MR_PRESCAL(prescal) | ADC_MR_STARTUP(startup);
return 0;
}
/**
* \brief Configures conversion resolution.
*
* \param p_adc Pointer to an ADC instance.
* \param resolution ADC resolution.
*/
void adc_set_resolution(Adc *p_adc, adc_resolution_t resolution)
{
p_adc->ADC_MR |= (resolution<<4) & ADC_MR_LOWRES;
}
/**
* \brief Configures conversion trigger and free run mode.
*
* \param p_adc Pointer to an ADC instance.
* \param trigger Conversion trigger.
*/
void adc_configure_trigger(Adc *p_adc, adc_trigger_t trigger)
{
p_adc->ADC_MR |= trigger;
}
/**
* \brief Configures ADC power saving mode.
*
* \param p_adc Pointer to an ADC instance.
* \param uc_sleep ADC_MR_SLEEP_NORMAL keeps the ADC Core and reference voltage circuitry ON between conversions
* ADC_MR_SLEEP_SLEEP keeps the ADC Core and reference voltage circuitry OFF between conversions
* \param uc_offmode 0 Standby Mode (if Sleep Bit = 1)
* 1 Off Mode
*/
void adc_configure_power_save(Adc *p_adc, uint8_t uc_sleep, uint8_t uc_offmode)
{
p_adc->ADC_MR |= ((uc_sleep<<5) & ADC_MR_SLEEP) ;
}
/**
* \brief Configures ADC timing.
*
* \param p_adc Pointer to an ADC instance.
* \param ul_sh ADC sample and hold time = uc_sh / ADC clock.
*/
void adc_configure_timing(Adc *p_adc, uint32_t ul_sh)
{
p_adc->ADC_MR |= ADC_MR_SHTIM( ul_sh ) ;
}
/**
* \brief Starts analog-to-digital conversion.
*
* \note If one of the hardware event is selected as ADC trigger, this function can NOT start analog to digital conversion.
*
* \param p_adc Pointer to an ADC instance.
*/
void adc_start(Adc *p_adc)
{
p_adc->ADC_CR = ADC_CR_START;
}
/**
* \brief Stop analog-to-digital conversion.
* \param p_adc Pointer to an ADC instance.
*/
void adc_stop(Adc *p_adc)
{
p_adc->ADC_CR = ADC_CR_SWRST;
}
/**
* \brief Enables the specified ADC channel.
*
* \param p_adc Pointer to an ADC instance.
* \param adc_ch ADC channel number.
*/
void adc_enable_channel(Adc *p_adc, adc_channel_num_t adc_ch)
{
p_adc->ADC_CHER = 1 << adc_ch;
}
/**
* \brief Disables the specified ADC channel.
*
* \param p_adc Pointer to an ADC instance.
* \param adc_ch ADC channel number.
*/
void adc_disable_channel(Adc *p_adc, adc_channel_num_t adc_ch)
{
p_adc->ADC_CHDR = 1 << adc_ch;
}
/**
* \brief Reads the ADC channel status.
*
* \param p_adc Pointer to an ADC instance.
* \param adc_ch ADC channel number.
*
* \retval 1 means the specified channel is enabled.
* 0 means the specified channel is disabled.
*/
uint32_t adc_get_channel_status(Adc *p_adc, adc_channel_num_t adc_ch)
{
return p_adc->ADC_CHSR & (1 << adc_ch);
}
/**
* \brief Reads the ADC status.
*
* \param p_adc Pointer to an ADC instance.
*
* \retval ADC status register content.
*/
uint32_t adc_get_status(Adc *p_adc)
{
return p_adc->ADC_SR;
}
/**
* \brief Reads the ADC result data of the specified channel.
*
* \param p_adc Pointer to an ADC instance.
* \param adc_ch ADC channel number.
*
* \retval ADC data of the specified channel.
*/
uint32_t adc_get_value(Adc *p_adc, adc_channel_num_t adc_ch)
{
uint32_t dwData = 0;
if ( 15 >= adc_ch )
{
dwData=*(p_adc->ADC_CDR+adc_ch) ;
}
return dwData ;
}
/**
* \brief Reads the last ADC result data.
*
* \param p_adc Pointer to an ADC instance.
*
* \retval ADC data.
*/
uint32_t adc_get_latest_value(Adc *p_adc)
{
return p_adc->ADC_LCDR;
}
/**
* \brief Returns the actual ADC clock.
*
* \param p_adc Pointer to an ADC instance.
* \param ul_mck Main clock of the device (value in Hz).
*
* \retval 0 The actual ADC clock (value in Hz).
*/
uint32_t adc_get_actual_adc_clock(Adc *p_adc, uint32_t ul_mck)
{
uint32_t ul_adcfreq;
uint32_t ul_prescal;
/* ADCClock = MCK / ( (PRESCAL+1) * 2 ) */
ul_prescal = (( p_adc->ADC_MR & ADC_MR_PRESCAL_Msk) >> ADC_MR_PRESCAL_Pos);
ul_adcfreq = ul_mck / ((ul_prescal+1)*2);
return ul_adcfreq;
}
/**
* \brief Enables ADC interrupt(s).
*
* \param p_adc Pointer to an ADC instance.
* \param dw_source Interrupt(s) to be enabled.
*/
void adc_enable_interrupt(Adc *p_adc, uint32_t ul_source)
{
p_adc->ADC_IER = ul_source;
}
/**
* \brief Disables ADC interrupt(s).
*
* \param p_adc Pointer to an ADC instance.
* \param dw_source Interrupt(s) to be disabled.
*/
void adc_disable_interrupt(Adc *p_adc, uint32_t ul_source)
{
p_adc->ADC_IDR = ul_source;
}
/**
* \brief Reads ADC interrupt mask.
*
* \param p_adc Pointer to an ADC instance.
*
* \retval ADC interrupt status.
*/
uint32_t adc_get_interrupt_status(Adc *p_adc)
{
return p_adc->ADC_SR ;
}
/** \brief Read ADC interrupt mask.
*
* \param p_uart pointer to a UART instance.
*
* \return The interrupt mask value.
*/
uint32_t adc_get_interrupt_mask(Adc *p_adc)
{
return p_adc->ADC_IMR;
}
/**
* \brief Reads overrun status.
*
* \param p_adc Pointer to an ADC instance.
*
* \retval ADC overrun status.
*/
uint32_t adc_check_ovr(Adc *p_adc,adc_channel_num_t adc_ch)
{
return p_adc->ADC_SR & (0x01u << (adc_ch+8));
}
/**
* \brief Gets PDC registers base address.
*
* \param p_adc Pointer to an ADC instance.
*
* \retval PDC registers base for PDC driver to access.
*/
Pdc *adc_get_pdc_base(Adc *p_adc)
{
return PDC_ADC;
}
/// @cond 0
/**INDENT-OFF**/
#ifdef __cplusplus
}
#endif /* __cplusplus */
/**INDENT-ON**/
/// @endcond
#endif /* SAM3U_SERIES */

552
hardware/arduino/sam/system/libsam/source/adc12_sam3u.c
View File

@ -1,42 +1,43 @@
/*! \file *********************************************************************
/**
* \file
*
* \brief API for SAM3 Analog-to-Digital Converter (ADC/ADC12B) controller.
* \brief Analog-to-Digital Converter (ADC/ADC12B) driver for SAM.
*
* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011, Atmel Corporation
* Copyright (c) 2011 - 2012 Atmel Corporation. All rights reserved.
*
* All rights reserved.
* \asf_license_start
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* - Compiler: IAR EWARM and CodeSourcery GCC for ARM
* - Supported devices: All SAM devices with a Analog-to-Digital Converter can be used.
* - AppNote:
* \asf_license_stop
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.com/
*
*******************************************************************************/
*/
#include "../chip.h"
@ -44,334 +45,367 @@
/**INDENT-OFF**/
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif
/**INDENT-ON**/
/// @endcond
/**
* \defgroup sam_drivers_adc_group Analog-to-digital Converter (ADC)
*
* Driver for the Analog-to-digital Converter. This driver provides access to the main
* features of the ADC controller.
*
* @{
*/
#if SAM3U_SERIES
/**
* \brief Initializes the given ADC with the specified ADC clock and startup time.
* \brief Initialize the given ADC with the specified ADC clock and startup time.
*
* \param p_adc Pointer to an ADC instance.
* \param dw_mck Main clock of the device (value in Hz).
* \param dw_adc_clock Analog-to-Digital conversion clock (value in Hz).
* \param ul_startuptime ADC start up time value(value in us). Please refer to the product datasheet for details.
* \param ul_offmode_startuptime ADC off mode startup Time value(value in us). Please refer to the product datasheet for details.
* \param p_adc Pointer to an ADC instance.
* \param ul_mck Main clock of the device (in Hz).
* \param ul_adc_clock Analog-to-Digital conversion clock (in Hz).
* \param ul_startuptime ADC startup time value (value in us).
* Please refer to the product datasheet for more details.
* \param ul_offmode_startuptime ADC off mode startup time value (value in us).
* Please refer to the product datasheet for more details.
*
* \retval 0 The initialization operation succeeds.
* \retval others The initialization operation fails.
* \return 0 on success.
*/
uint32_t adc12_init(Adc12b *p_adc, uint32_t ul_mck, uint32_t ul_adc_clock, uint32_t ul_startuptime, uint32_t ul_offmode_startuptime)
uint32_t adc12b_init(Adc12b *p_adc, const uint32_t ul_mck, const uint32_t ul_adc_clock,
const uint32_t ul_startuptime, const uint32_t ul_offmode_startuptime)
{
p_adc->ADC12B_CR = ADC12B_CR_SWRST;
/* Reset Mode Register */
p_adc->ADC12B_MR = 0;
/* Reset PDC transfer */
p_adc->ADC12B_PTCR = (ADC12B_PTCR_RXTDIS | ADC12B_PTCR_TXTDIS);
p_adc->ADC12B_RCR = 0;
p_adc->ADC12B_RNCR = 0;
uint32_t prescal = ul_mck/(2 * ul_adc_clock) - 1;
// check for rounding errors
if ( (ul_mck/((prescal+1)*2)) > ul_adc_clock ) {
prescal++;
ul_adc_clock = ul_mck/((prescal+1)*2);
}
uint32_t startup = ((ul_adc_clock/1000000) * ul_startuptime / 8) - 1;
p_adc->ADC12B_MR |= ADC12B_MR_PRESCAL(prescal) | ADC12B_MR_STARTUP(startup);
uint32_t ul_prescal, ul_startup, ul_offmode;
p_adc->ADC12B_CR = ADC12B_CR_SWRST;
uint32_t offmode = ((ul_adc_clock/1000000) * ul_offmode_startuptime / 8) - 1;
p_adc->ADC12B_EMR |= ADC12B_EMR_OFF_MODE_STARTUP_TIME(offmode);
return 0;
}
/**
* \brief Configures conversion resolution.
*
* \param p_adc Pointer to an ADC instance.
* \param resolution ADC resolution.
*/
void adc12_set_resolution(Adc12b *p_adc, adc_resolution_t resolution)
{
p_adc->ADC12B_MR |= (resolution<<4) & ADC12B_MR_LOWRES;
}
/**
* \brief Configures conversion trigger and free run mode.
*
* \param p_adc Pointer to an ADC instance.
* \param trigger Conversion trigger.
*/
void adc12_configure_trigger(Adc12b *p_adc, adc_trigger_t trigger)
{
p_adc->ADC12B_MR |= trigger;
}
/**
* \brief Configures ADC power saving mode.
*
* \param p_adc Pointer to an ADC instance.
* \param uc_sleep ADC_MR_SLEEP_NORMAL keeps the ADC Core and reference voltage circuitry ON between conversions
* ADC_MR_SLEEP_SLEEP keeps the ADC Core and reference voltage circuitry OFF between conversions
* \param uc_offmode 0 Standby Mode (if Sleep Bit = 1)
* 1 Off Mode
*/
void adc12_configure_power_save(Adc12b *p_adc, uint8_t uc_sleep, uint8_t uc_offmode)
{
p_adc->ADC12B_MR |= ((uc_sleep<<5) & ADC12B_MR_SLEEP) ;
p_adc->ADC12B_EMR |= uc_offmode;
}
/**
* \brief Configures ADC timing.
*
* \param p_adc Pointer to an ADC instance.
* \param ul_sh ADC sample and hold time = uc_sh / ADC clock.
*
*/
void adc12_configure_timing(Adc12b *p_adc, uint32_t ul_sh)
{
p_adc->ADC12B_MR |= ADC12B_MR_SHTIM( ul_sh ) ;
}
/**
* \brief Starts analog-to-digital conversion.
*
* \note If one of the hardware event is selected as ADC trigger, this function can NOT start analog to digital conversion.
*
* \param p_adc Pointer to an ADC instance.
*/
void adc12_start(Adc12b *p_adc)
{
p_adc->ADC12B_CR = ADC12B_CR_START;
}
/**
* \brief Stop analog-to-digital conversion.
* \param p_adc Pointer to an ADC instance.
*/
void adc12_stop(Adc12b *p_adc)
{
p_adc->ADC12B_CR = ADC12B_CR_SWRST;
}
/**
* \brief Enables the specified ADC channel.
*
* \param p_adc Pointer to an ADC instance.
* \param adc_ch ADC channel number.
*/
void adc12_enable_channel(Adc12b *p_adc, adc_channel_num_t adc_ch)
{
p_adc->ADC12B_CHER = 1 << adc_ch;
/* Reset Mode Register */
p_adc->ADC12B_MR = 0;
/* Reset PDC transfer */
p_adc->ADC12B_PTCR = (ADC12B_PTCR_RXTDIS | ADC12B_PTCR_TXTDIS);
p_adc->ADC12B_RCR = 0;
p_adc->ADC12B_RNCR = 0;
ul_prescal = ul_mck / (2 * ul_adc_clock) - 1;
ul_startup = ((ul_adc_clock / 1000000) * ul_startuptime / 8) - 1;
ul_offmode = ((ul_adc_clock / 1000000) * ul_offmode_startuptime / 8) -
1;
p_adc->ADC12B_MR |=
ADC12B_MR_PRESCAL(ul_prescal) | ((ul_startup <<
ADC12B_MR_STARTUP_Pos) &
ADC12B_MR_STARTUP_Msk);
p_adc->ADC12B_EMR |= (ul_offmode << 16) & (0xffu << 16);
return 0;
}
/**
* \brief Disables the specified ADC channel.
* \brief Configure conversion resolution.
*
* \param p_adc Pointer to an ADC instance.
* \param adc_ch ADC channel number.
* \param p_adc Pointer to an ADC instance.
* \param resolution ADC resolution.
*/
void adc12_disable_channel(Adc12b *p_adc, adc_channel_num_t adc_ch)
void adc12b_set_resolution(Adc12b *p_adc, const enum adc_resolution_t resolution)
{
p_adc->ADC12B_CHDR = 1 << adc_ch;
p_adc->ADC12B_MR |= (resolution << 4) & ADC12B_MR_LOWRES;
}
/**
* \brief Reads the ADC channel status.
* \brief Configure conversion trigger and free run mode.
*
* \param p_adc Pointer to an ADC instance.
* \param adc_ch ADC channel number.
*
* \retval 1 means the specified channel is enabled.
* 0 means the specified channel is disabled.
* \param p_adc Pointer to an ADC instance.
* \param trigger Conversion trigger.
*/
uint32_t adc12_get_channel_status(Adc12b *p_adc, adc_channel_num_t adc_ch)
void adc12b_configure_trigger(Adc12b *p_adc, const enum adc_trigger_t trigger)
{
return p_adc->ADC12B_CHSR & (1 << adc_ch);
p_adc->ADC12B_MR |= trigger;
}
/**
* \brief Reads the ADC status.
* \brief Configure ADC power saving mode.
*
* \param p_adc Pointer to an ADC instance.
*
* \retval ADC status register content.
* \param p_adc Pointer to an ADC instance.
* \param uc_sleep ADC_MR_SLEEP_NORMAL keeps the ADC Core and reference
* voltage circuitry ON between conversions.
* ADC_MR_SLEEP_SLEEP keeps the ADC Core and reference voltage circuitry
* OFF between conversions.
* \param uc_offmode 0 Standby Mode (if Sleep Bit = 1), 1 Off Mode.
*/
uint32_t adc12_get_status(Adc12b *p_adc)
void adc12b_configure_power_save(Adc12b *p_adc, const uint8_t uc_sleep,
uint8_t uc_offmode)
{
return p_adc->ADC12B_SR;
p_adc->ADC12B_MR |= ((uc_sleep << 5) & ADC12B_MR_SLEEP);
p_adc->ADC12B_EMR |= uc_offmode;
}
/**
* \brief Reads the ADC result data of the specified channel.
* \brief Configure ADC timing.
*
* \param p_adc Pointer to an ADC instance.
* \param adc_ch ADC channel number.
*
* \retval ADC data of the specified channel.
* \param p_adc Pointer to an ADC instance.
* \param ul_sh ADC sample and hold time = uc_sh / ADC clock.
*/
uint32_t adc12_get_value(Adc12b *p_adc, adc_channel_num_t adc_ch)
void adc12b_configure_timing(Adc12b *p_adc, const uint32_t ul_sh)
{
uint32_t dwData = 0;
if ( 15 >= adc_ch )
{
dwData=*(p_adc->ADC12B_CDR+adc_ch) ;
}
return dwData ;
p_adc->ADC12B_MR |= ADC12B_MR_SHTIM(ul_sh);
}
/**
* \brief Reads the last ADC result data.
* \brief Start ADC conversion.
*
* \param p_adc Pointer to an ADC instance.
* \note If one of the hardware event is selected as ADC trigger,
* this function can NOT start ADC conversion.
*
* \retval ADC data.
* \param p_adc Pointer to an ADC instance.
*/
uint32_t adc12_get_latest_value(Adc12b *p_adc)
void adc12b_start(Adc12b *p_adc)
{
return p_adc->ADC12B_LCDR;
}
/**
* \brief Enables differential input for all channels.
*
* \param p_adc Pointer to an ADC instance.
*/
void adc12_enable_differential_input(Adc12b *p_adc)
{
p_adc->ADC12B_ACR |= (0x01u << 16);
p_adc->ADC12B_CR = ADC12B_CR_START;
}
/**
* \brief Disables differential input for the specified channel.
*
* \param p_adc Pointer to an ADC instance.
* \brief Stop ADC conversion.
* \param p_adc Pointer to an ADC instance.
*/
void adc12_disable_differential_input(Adc12b*p_adc)
void adc12b_stop(Adc12b *p_adc)
{
p_adc->ADC12B_ACR &= (0x01u << 16);
p_adc->ADC12B_CR = ADC12B_CR_SWRST;
}
/**
* \brief Enables analog signal offset for the specified channel.
* \brief Enable the specified ADC channel.
*
* \param p_adc Pointer to an ADC instance.
* \param p_adc Pointer to an ADC instance.
* \param adc_ch ADC channel number.
*/
void adc12_enable_input_offset(Adc12b *p_adc)
void adc12b_enable_channel(Adc12b *p_adc, const enum adc_channel_num_t adc_ch)
{
p_adc->ADC12B_ACR |= (0x01u << 17);
p_adc->ADC12B_CHER = 1 << adc_ch;
}
/**
* \brief Disables analog signal offset for the specified channel.
* \brief Enable all ADC channels.
*
* \param p_adc Pointer to an ADC instance.
* \param p_adc Pointer to an ADC instance.
*/
void adc12_disable_input_offset(Adc12b *p_adc)
void adc12b_enable_all_channel(Adc12b *p_adc)
{
p_adc->ADC12B_ACR &= (0x01u << 17);
}
/**
* \brief Configures input gain for the specified channel.
*
* \param p_adc Pointer to an ADC instance.
* \param gain Gain value for the input.
*/
void adc12_set_input_gain(Adc12b *p_adc, adc_gainvalue_t gain)
{
p_adc->ADC12B_ACR |= (0x03u & gain);
}
uint32_t adc12_get_actual_adc_clock(Adc12b *p_adc, uint32_t ul_mck)
{
uint32_t ul_adcfreq;
uint32_t ul_prescal;
/* ADCClock = MCK / ( (PRESCAL+1) * 2 ) */
ul_prescal = (( p_adc->ADC12B_MR & ADC12B_MR_PRESCAL_Msk) >> ADC12B_MR_PRESCAL_Pos);
ul_adcfreq = ul_mck / ((ul_prescal+1)*2);
return ul_adcfreq;
}
/**
* \brief Enables ADC interrupt(s).
*
* \param p_adc Pointer to an ADC instance.
* \param dw_source Interrupt(s) to be enabled.
*/
void adc12_enable_interrupt(Adc12b *p_adc, uint32_t ul_source)
{
p_adc->ADC12B_IER = ul_source;
p_adc->ADC12B_CHER = 0xFF;
}
/**
* \brief Disables ADC interrupt(s).
* \brief Disable the specified ADC channel.
*
* \param p_adc Pointer to an ADC instance.
* \param dw_source Interrupt(s) to be disabled.
* \param p_adc Pointer to an ADC instance.
* \param adc_ch ADC channel number.
*/
void adc12_disable_interrupt(Adc12b *p_adc, uint32_t ul_source)
void adc12b_disable_channel(Adc12b *p_adc, const enum adc_channel_num_t adc_ch)
{
p_adc->ADC12B_IDR = ul_source;
p_adc->ADC12B_CHDR = 1 << adc_ch;
}
/**
* \brief Disable all ADC channel.
*
* \param p_adc Pointer to an ADC instance.
*/
void adc12b_disable_all_channel(Adc12b *p_adc)
{
p_adc->ADC12B_CHDR = 0xFF;
}
/**
* \brief Read the ADC channel status.
*
* \param p_adc Pointer to an ADC instance.
* \param adc_ch ADC channel number.
*
* \retval 1 if channel is enabled.
* \retval 0 if channel is disabled.
*/
uint32_t adc12b_get_channel_status(const Adc12b *p_adc, const enum adc_channel_num_t adc_ch)
{
return p_adc->ADC12B_CHSR & (1 << adc_ch);
}
/**
* \brief Read the ADC result data of the specified channel.
*
* \param p_adc Pointer to an ADC instance.
* \param adc_ch ADC channel number.
*
* \return ADC value of the specified channel.
*/
uint32_t adc12b_get_channel_value(const Adc12b *p_adc,const enum adc_channel_num_t adc_ch)
{
uint32_t dwData = 0;
if (15 >= adc_ch) {
dwData = *(p_adc->ADC12B_CDR + adc_ch);
}
return dwData;
}
/**
* \brief Read the last ADC result data.
*
* \param p_adc Pointer to an ADC instance.
*
* \return ADC latest value.
*/
uint32_t adc12b_get_latest_value(const Adc12b *p_adc)
{
return p_adc->ADC12B_LCDR;
}
/**
* \brief Enable differential input for all channels.
*
* \param p_adc Pointer to an ADC instance.
*/
void adc12b_enable_differential_input(Adc12b *p_adc)
{
p_adc->ADC12B_ACR |= (0x01u << 16);
}
/**
* \brief Disable differential input for the specified channel.
*
* \param p_adc Pointer to an ADC instance.
*/
void adc12b_disable_differential_input(Adc12b *p_adc)
{
p_adc->ADC12B_ACR &= (0x01u << 16);
}
/**
* \brief Enable analog signal offset for the specified channel.
*
* \param p_adc Pointer to an ADC instance.
*/
void adc12b_enable_input_offset(Adc12b *p_adc)
{
p_adc->ADC12B_ACR |= (0x01u << 17);
}
/**
* \brief Disable analog signal offset for the specified channel.
*
* \param p_adc Pointer to an ADC instance.
*/
void adc12b_disable_input_offset(Adc12b *p_adc)
{
p_adc->ADC12B_ACR &= (0x01u << 17);
}
/**
* \brief Configure input gain for the specified channel.
*
* \param p_adc Pointer to an ADC instance.
* \param gain Gain value for the input.
*/
void adc12b_set_input_gain(Adc12b *p_adc, const enum adc_gainvalue_t gain)
{
p_adc->ADC12B_ACR |= (0x03u & gain);
}
/**
* \brief Return the actual ADC clock.
*
* \param p_adc Pointer to an ADC instance.
* \param ul_mck Main clock of the device (in Hz).
*
* \retval 0 The actual ADC clock (in Hz).
*/
uint32_t adc12b_get_actual_adc_clock(const Adc12b *p_adc, const uint32_t ul_mck)
{
uint32_t ul_adcfreq;
uint32_t ul_prescal;
/* ADCClock = MCK / ( (PRESCAL+1) * 2 ) */
ul_prescal = ((p_adc->ADC12B_MR & ADC12B_MR_PRESCAL_Msk) >>
ADC12B_MR_PRESCAL_Pos);
ul_adcfreq = ul_mck / ((ul_prescal + 1) * 2);
return ul_adcfreq;
}
/**
* \brief Enable ADC interrupts.
*
* \param p_adc Pointer to an ADC instance.
* \param ul_source Interrupts to be enabled.
*/
void adc12b_enable_interrupt(Adc12b *p_adc, const uint32_t ul_source)
{
p_adc->ADC12B_IER = ul_source;
}
/**
* \brief Disable ADC interrupts.
*
* \param p_adc Pointer to an ADC instance.
* \param ul_source Interrupts to be disabled.
*/
void adc12b_disable_interrupt(Adc12b *p_adc, const uint32_t ul_source)
{
p_adc->ADC12B_IDR = ul_source;
}
/** \brief Read ADC interrupt mask.
*
* \param p_uart pointer to a UART instance.
* \param p_adc Pointer to an ADC instance.
*
* \return The interrupt mask value.
* \return The interrupt mask value.
*/
uint32_t adc12_get_interrupt_mask(Adc12b *p_adc)
uint32_t adc12b_get_interrupt_mask(const Adc12b *p_adc)
{
return p_adc->ADC12B_IMR;
}
/**
* \brief Reads ADC interrupt status.
* \brief Read ADC interrupt status.
*
* \param p_adc Pointer to an ADC instance.
* \param p_adc Pointer to an ADC instance.
*
* \retval ADC interrupt status.
*/
uint32_t adc12_get_interrupt_status(Adc12b *p_adc)
uint32_t adc12b_get_status(const Adc12b *p_adc)
{
return p_adc->ADC12B_SR ;
return p_adc->ADC12B_SR;
}
/**
* \brief Reads overrun status.
* \brief Adapt performance versus power consumption.
*
* \param p_adc Pointer to an ADC instance.
* \note Please refer to ADC Characteristics in the product datasheet
* for more details.
*
* \retval ADC overrun status.
* \param p_adc Pointer to an ADC instance.
* \param uc_ibctl ADC Bias current control.
*/
uint32_t adc12_check_ovr(Adc12b *p_adc,adc_channel_num_t adc_ch)
void adc12b_set_bias_current(Adc12b *p_adc, const uint8_t uc_ibctl)
{
return p_adc->ADC12B_SR & (0x01u << (adc_ch+8));
p_adc->ADC12B_ACR |= ADC12B_ACR_IBCTL(uc_ibctl);
}
/**
* \brief Adapts performance versus power consumption.
* \brief Get PDC registers base address.
*
* \note Please refer to ADC Characteristics in the product datasheet for the details.
* \param p_adc Pointer to an ADC instance.
*
* \param p_adc Pointer to an ADC instance.
* \param ibctl ADC Bias current control.
* \return ADC PDC register base address.
*/
void adc12_set_bias_current(Adc12b *p_adc, uint8_t uc_ibctl)
Pdc *adc12b_get_pdc_base(const Adc12b *p_adc)
{
p_adc->ADC12B_ACR |= ADC12B_ACR_IBCTL(uc_ibctl);
}
/**
* \brief Gets PDC registers base address.
*
* \param p_adc Pointer to an ADC instance.
*
* \retval PDC registers base for PDC driver to access.
*/
Pdc *adc12_get_pdc_base(Adc12b *p_adc)
{
return PDC_ADC12B;
return PDC_ADC12B;
}
#endif
//@}
/// @cond 0
/**INDENT-OFF**/
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif
/**INDENT-ON**/
/// @endcond
#endif /* SAM3U_SERIES */

804
hardware/arduino/sam/system/libsam/source/adc_sam3snxa.c
View File

@ -1,804 +0,0 @@
/*! \file *********************************************************************
*
* \brief API for SAM3 Analog-to-Digital Converter (ADC/ADC12B) controller.
*
* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2011, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* - Compiler: IAR EWARM and CodeSourcery GCC for ARM
* - Supported devices: All SAM devices with a Analog-to-Digital Converter can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.com/
*
*******************************************************************************/
#include "../chip.h"
/// @cond 0
/**INDENT-OFF**/
#ifdef __cplusplus
extern "C" {
#endif
/**INDENT-ON**/
/// @endcond
#if SAM3S_SERIES || SAM3N_SERIES || SAM3XA_SERIES
/**
* \brief Initializes the given ADC with the specified ADC clock and startup time.
*
* \param p_adc Pointer to an ADC instance.
* \param dw_mck Main clock of the device (value in Hz).
* \param dw_adc_clock Analog-to-Digital conversion clock (value in Hz).
* \param uc_startup ADC start up time. Please refer to the product datasheet for details.
*
* \retval 0 The initialization operation succeeds.
* \retval others The initialization operation fails.
*/
uint32_t adc_init(Adc *p_adc, uint32_t ul_mck, uint32_t ul_adc_clock, uint8_t uc_startup)
{
uint32_t ul_prescal;
/* Reset the controller */
p_adc->ADC_CR = ADC_CR_SWRST;
/* Reset Mode Register */
p_adc->ADC_MR = 0;
/* Reset PDC transfer */
p_adc->ADC_PTCR = (ADC_PTCR_RXTDIS | ADC_PTCR_TXTDIS);
p_adc->ADC_RCR = 0;
p_adc->ADC_RNCR = 0;
ul_prescal = ul_mck/(2 * ul_adc_clock) - 1;
p_adc->ADC_MR |= ADC_MR_PRESCAL( ul_prescal ) | ( (uc_startup<<ADC_MR_STARTUP_Pos) & ADC_MR_STARTUP_Msk);
return 0;
}
/**
* \brief Configures conversion resolution.
*
* \param p_adc Pointer to an ADC instance.
* \param resolution ADC resolution.
*
*/
void adc_set_resolution(Adc *p_adc, adc_resolution_t resolution)
{
p_adc->ADC_MR |= (resolution<<4) & ADC_MR_LOWRES;
}
/**
* \brief Configures conversion trigger and free run mode.
*
* \param p_adc Pointer to an ADC instance.
* \param trigger Conversion trigger.
* \param uc_freerun ADC_MR_FREERUN_ON enables freerun mode
* ADC_MR_FREERUN_OFF disables freerun mode
*
*/
void adc_configure_trigger(Adc *p_adc, adc_trigger_t trigger, uint8_t uc_freerun)
{
p_adc->ADC_MR |= trigger | ((uc_freerun<<7) & ADC_MR_FREERUN);
}
/**
* \brief Configures ADC power saving mode.
*
* \param p_adc Pointer to an ADC instance.
* \param uc_sleep ADC_MR_SLEEP_NORMAL keeps the ADC Core and reference voltage circuitry ON between conversions
* ADC_MR_SLEEP_SLEEP keeps the ADC Core and reference voltage circuitry OFF between conversions
* \param uc_fwup ADC_MR_FWUP_OFF configures sleep mode as uc_sleep setting
* ADC_MR_FWUP_ON keeps voltage reference ON and ADC Core OFF between conversions
*
*/
void adc_configure_power_save(Adc *p_adc, uint8_t uc_sleep, uint8_t uc_fwup)
{
p_adc->ADC_MR |= ( ((uc_sleep<<5) & ADC_MR_SLEEP) | ((uc_fwup<<6) & ADC_MR_FWUP) );
}
/**
* \brief Configures conversion sequence.
*
* \param p_adc Pointer to an ADC instance.
* \param ch_list Channel sequence list.
* \param number Number of channels in the list.
*
*/
void adc_configure_sequence(Adc *p_adc, adc_channel_num_t ch_list[], uint8_t uc_num)
{
uint8_t uc_counter;
if(uc_num < 8)
{
for(uc_counter=0;uc_counter < uc_num;uc_counter++)
{
p_adc->ADC_SEQR1 |= ch_list[uc_counter] << (4*uc_counter);
}
}
else
{
for(uc_counter=0;uc_counter < 8;uc_counter++)
{
p_adc->ADC_SEQR1 |= ch_list[uc_counter] << (4*uc_counter);
}
for(uc_counter=0;uc_counter < uc_num-8;uc_counter++)
{
p_adc->ADC_SEQR2 |= ch_list[uc_counter] << (4*uc_counter);
}
}
}
#if SAM3S_SERIES || SAM3XA_SERIES
/**
* \brief Configures ADC timing.
*
* \param p_adc Pointer to an ADC instance.
* \param uc_tracking ADC tracking time = uc_tracking / ADC clock.
* \param uc_settling Analog settling time = (uc_settling + 1) / ADC clock.
* \param uc_transfer Data transfer time = (uc_transfer * 2 + 3) / ADC clock.
*
*/
void adc_configure_timing(Adc *p_adc, uint8_t uc_tracking, adc_settling_time_t settling, uint8_t uc_transfer)
{
p_adc->ADC_MR |= ADC_MR_TRANSFER( uc_transfer )
| settling
| ADC_MR_TRACKTIM( uc_tracking ) ;
}
#elif SAM3N_SERIES
/**
* \brief Configures ADC timing.
*
* \param p_adc Pointer to an ADC instance.
* \param uc_tracking ADC tracking time = uc_tracking / ADC clock.
*
*/
void adc_configure_timing(Adc *p_adc, uint8_t uc_tracking)
{
p_adc->ADC_MR |= ADC_MR_TRACKTIM( uc_tracking ) ;
}
#endif
#if SAM3S_SERIES || SAM3XA_SERIES
/**
* \brief enable analog change.
*
* note it allows different analog settings for each channel,
*
* \param pAdc Pointer to an Adc instance.
*/
void adc_enable_anch( Adc *pAdc )
{
pAdc->ADC_MR |= ADC_MR_ANACH;
}
#endif
#if SAM3S_SERIES || SAM3XA_SERIES
/**
* \brief disable analog change.
*
* note DIFF0, GAIN0 and OFF0 are used for all channels.
*
* \param pAdc Pointer to an Adc instance.
*/
void adc_disable_anch( Adc *pAdc )
{
pAdc->ADC_MR &= ~ADC_MR_ANACH;
}
#endif
/**
* \brief Starts analog-to-digital conversion.
*
* \note If one of the hardware event is selected as ADC trigger, this function can NOT start analog to digital conversion.
*
* \param p_adc Pointer to an ADC instance.
*
*/
void adc_start(Adc *p_adc)
{
p_adc->ADC_CR = ADC_CR_START;
}
/**
* \brief Stop analog-to-digital conversion.
* \param p_adc Pointer to an ADC instance.
*
*/
void adc_stop(Adc *p_adc)
{
p_adc->ADC_CR = ADC_CR_SWRST;
}
/**
* \brief Enables the specified ADC channel.
*
* \param p_adc Pointer to an ADC instance.
* \param adc_ch ADC channel number.
*
*/
void adc_enable_channel(Adc *p_adc, adc_channel_num_t adc_ch)
{
p_adc->ADC_CHER = 1 << adc_ch;
}
/**
* \brief Disables the specified ADC channel.
*
* \param p_adc Pointer to an ADC instance.
* \param adc_ch ADC channel number.
*
*/
void adc_disable_channel(Adc *p_adc, adc_channel_num_t adc_ch)
{
p_adc->ADC_CHDR = 1 << adc_ch;
}
/**
* \brief Reads the ADC channel status.
*
* \param p_adc Pointer to an ADC instance.
* \param adc_ch ADC channel number.
*
* \retval 1 means the specified channel is enabled.
* 0 means the specified channel is disabled.
*/
uint32_t adc_get_channel_status(Adc *p_adc, adc_channel_num_t adc_ch)
{
return p_adc->ADC_CHSR & (1 << adc_ch);
}
/**
* \brief Reads the ADC status.
*
* \param p_adc Pointer to an ADC instance.
*
* \retval ADC status register content.
*/
uint32_t adc_get_status(Adc *p_adc)
{
return p_adc->ADC_ISR;
}
/**
* \brief Reads the ADC overrun status.
*
* \param p_adc Pointer to an ADC instance.
*
* \retval ADC overrun status register content.
*/
uint32_t adc_get_overrun_status(Adc *p_adc)
{
return p_adc->ADC_OVER;
}
/**
* \brief Reads the ADC result data of the specified channel.
*
* \param p_adc Pointer to an ADC instance.
* \param adc_ch ADC channel number.
*
* \retval ADC data of the specified channel.
*/
uint32_t adc_get_value(Adc *p_adc, adc_channel_num_t adc_ch)
{
uint32_t dwData = 0;
if ( 15 >= adc_ch )
{
dwData=*(p_adc->ADC_CDR+adc_ch) ;
}
return dwData ;
}
/**
* \brief Reads the last ADC result data.
*
* \param p_adc Pointer to an ADC instance.
*
* \retval ADC data.
*/
uint32_t adc_get_latest_value(Adc *p_adc)
{
return p_adc->ADC_LCDR;
}
/**
* \brief Enables TAG option so that the number of the last converted channel can be indicated.
*
* \param p_adc Pointer to an ADC instance.
*
*/
void adc_enable_tag(Adc *p_adc)
{
p_adc->ADC_EMR |= ADC_EMR_TAG;
}
/**
* \brief Disables TAG option.
*
* \param p_adc Pointer to an ADC instance.
*
*/
void adc_disable_tag(Adc *p_adc)
{
p_adc->ADC_EMR &= ~ADC_EMR_TAG;
}
/**
* \brief Indicates the last converted channel.
*
* \note If TAG option is NOT enabled before, an incorrect channel number is returned.
*
* \param p_adc Pointer to an ADC instance.
*
* \retval The last converted channel number.
*/
adc_channel_num_t adc_get_tag(Adc *p_adc)
{
return (p_adc->ADC_LCDR & ADC_LCDR_CHNB_Msk) >> ADC_LCDR_CHNB_Pos;
}
/**
* \brief Enables conversion sequencer.
*
* \param p_adc Pointer to an ADC instance.
*
*/
void adc_start_sequencer(Adc *p_adc)
{
p_adc->ADC_MR |= ADC_MR_USEQ;
}
/**
* \brief Disables conversion sequencer.
*
* \param p_adc Pointer to an ADC instance.
*
*/
void adc_stop_sequencer(Adc *p_adc)
{
p_adc->ADC_MR &= ~ADC_MR_USEQ;
}
/**
* \brief Configures comparsion mode.
*
* \param p_adc Pointer to an ADC instance.
* \param mode ADC comparsion mode.
*
*/
void adc_set_comparison_mode(Adc *p_adc, uint8_t uc_mode)
{
p_adc->ADC_EMR &= (uint32_t)~(ADC_EMR_CMPMODE_Msk);
p_adc->ADC_EMR |= (uc_mode & ADC_EMR_CMPMODE_Msk);
}
/**
* \brief get comparsion mode.
*
* \param p_adc Pointer to an ADC instance.
* \param mode ADC comparsion mode.
*
* \retval compare mode value.
*/
uint32_t adc_get_comparison_mode(Adc *p_adc)
{
return p_adc->ADC_EMR & ADC_EMR_CMPMODE_Msk;
}
/**
* \brief Configures ADC compare window.
*
* \param p_adc Pointer to an ADC instance.
* \param w_low_threshold Low threshold of compare window.
* \param w_high_threshold High threshold of compare window.
*
*/
void adc_set_comparsion_window(Adc *p_adc, uint16_t us_low_threshold, uint16_t us_high_threshold)
{
p_adc->ADC_CWR = ADC_CWR_LOWTHRES(us_low_threshold) | ADC_CWR_HIGHTHRES(us_high_threshold);
}
/**
* \brief Configures comparison selected channel.
*
* \param p_adc Pointer to an ADC instance.
* \param channel Comparison selected channel.
*
*/
void adc_set_comparison_channel(Adc *p_adc, adc_channel_num_t channel)
{
if ( channel < 16 )
{
p_adc->ADC_EMR &= (uint32_t)~(ADC_EMR_CMPALL);
p_adc->ADC_EMR &= (uint32_t)~(ADC_EMR_CMPSEL_Msk);
p_adc->ADC_EMR |= (channel << ADC_EMR_CMPSEL_Pos);
}
else
{
p_adc->ADC_EMR |= ADC_EMR_CMPALL;
}
}
#if SAM3S_SERIES || SAM3XA_SERIES
/**
* \brief Enables differential input for the specified channel.
*
* \param p_adc Pointer to an ADC instance.
* \param channel Channel number.
*
*/
void adc_enable_differential_input(Adc *p_adc, adc_channel_num_t channel)
{
p_adc->ADC_COR |= 0x01u << (16+ channel);
}
/**
* \brief Disables differential input for the specified channel.
*
* \param p_adc Pointer to an ADC instance.
* \param channel Channel number.
*
*/
void adc_disable_differential_input(Adc *p_adc, adc_channel_num_t channel)
{
uint32_t ul_temp;
ul_temp = p_adc->ADC_COR;
p_adc->ADC_COR &= 0xfffeffffu << channel;
p_adc->ADC_COR |= ul_temp;
}
/**
* \brief Enables analog signal offset for the specified channel.
*
* \param p_adc Pointer to an ADC instance.
* \param channel Channel number.
*
*/
void adc_enable_input_offset(Adc *p_adc, adc_channel_num_t channel)
{
p_adc->ADC_COR |= 0x01u << channel;
}
/**
* \brief Disables analog signal offset for the specified channel.
*
* \param p_adc Pointer to an ADC instance.
* \param channel Channel number.
*
*/
void adc_disable_input_offset(Adc *p_adc, adc_channel_num_t channel)
{
uint32_t ul_temp;
ul_temp = p_adc->ADC_COR;
p_adc->ADC_COR &= (0xfffffffeu << channel);
p_adc->ADC_COR |= ul_temp;
}
/**
* \brief Configures input gain for the specified channel.
*
* \param p_adc Pointer to an ADC instance.
* \param channel Channel number.
* \param gain Gain value for the input.
*
*/
void adc_set_input_gain(Adc *p_adc, adc_channel_num_t channel, adc_gainvalue_t gain)
{
p_adc->ADC_CGR |= (0x03u << (2*channel)) & (gain << (2*channel));
}
#endif /* SAM3S_SERIES || SAM3XA_SERIES */
#if SAM3SD8_SERIES
/**
* \brief set adc auto calibration mode.
*
* \param p_adc Pointer to an ADC instance.
*
*/
void adc_set_calibmode(Adc *p_adc)
{
p_adc->ADC_CR |= ADC_CR_AUTOCAL;
}
#endif /* SAM3SD8_SERIES */
/**
* \brief Returns the actual ADC clock.
*
* \param p_adc Pointer to an ADC instance.
* \param ul_mck Main clock of the device (value in Hz).
*
* \retval 0 The actual ADC clock (value in Hz).
*/
uint32_t adc_get_actual_adc_clock(Adc *p_adc, uint32_t ul_mck)
{
uint32_t ul_adcfreq;
uint32_t ul_prescal;
/* ADCClock = MCK / ( (PRESCAL+1) * 2 ) */
ul_prescal = (( p_adc->ADC_MR & ADC_MR_PRESCAL_Msk) >> ADC_MR_PRESCAL_Pos);
ul_adcfreq = ul_mck / ((ul_prescal+1)*2);
return ul_adcfreq;
}
/**
* \brief Enables ADC interrupt(s).
*
* \param p_adc Pointer to an ADC instance.
* \param dw_source Interrupt(s) to be enabled.
*
*/
void adc_enable_interrupt(Adc *p_adc, uint32_t ul_source)
{
p_adc->ADC_IER = ul_source;
}
/**
* \brief Disables ADC interrupt(s).
*
* \param p_adc Pointer to an ADC instance.
* \param dw_source Interrupt(s) to be disabled.
*
*/
void adc_disable_interrupt(Adc *p_adc, uint32_t ul_source)
{
p_adc->ADC_IDR = ul_source;
}
/**
* \brief Reads ADC interrupt status.
*
* \param p_adc Pointer to an ADC instance.
*
* \retval ADC interrupt status.
*/
uint32_t adc_get_interrupt_status(Adc *p_adc)
{
return p_adc->ADC_ISR ;
}
/** \brief Read ADC interrupt mask.
*
* \param p_uart pointer to a UART instance.
*
* \return The interrupt mask value.
*/
uint32_t adc_get_interrupt_mask(Adc *p_adc)
{
return p_adc->ADC_IMR;
}
/**
* \brief Reads overrun status.
*
* \param p_adc Pointer to an ADC instance.
*
* \retval ADC overrun status.
*/
uint32_t adc_check_ovr(Adc *p_adc,adc_channel_num_t adc_ch)
{
return p_adc->ADC_OVER & (0x01u << adc_ch);
}
#if SAM3S_SERIES || SAM3XA_SERIES
/**
* \brief Adapts performance versus power consumption.
*
* \note Please refer to ADC Characteristics in the product datasheet for the details.
*
* \param p_adc Pointer to an ADC instance.
* \param ibctl ADC Bias current control.
*
*/
void adc_set_bias_current(Adc *p_adc, uint8_t uc_ibctl)
{
p_adc->ADC_ACR |= ADC_ACR_IBCTL(uc_ibctl);
}
#endif
#if SAM3S_SERIES || SAM3XA_SERIES
/**
* \brief turn on temperature sensor.
*
* \param p_adc Pointer to an ADC instance.
*
*/
void adc_enable_ts(Adc *p_adc)
{
p_adc->ADC_ACR |= ADC_ACR_TSON;
}
#endif
#if SAM3S_SERIES || SAM3XA_SERIES
/**
* \brief turn off temperature sensor.
*
* \param p_adc Pointer to an ADC instance.
*
*/
void adc_disable_ts(Adc *p_adc)
{
p_adc->ADC_ACR &= ~ADC_ACR_TSON;
}
#endif
/**
* \brief Enables or disables write protection of ADC registers.
*
* \param p_adc Pointer to an ADC instance.
* \param dw_eanble 1 to eanble, 0 to disable.
*/
void adc_set_writeprotect(Adc *p_adc, uint32_t ul_enable)
{
p_adc->ADC_WPMR |= ADC_WPMR_WPKEY(ul_enable);
}
/**
* \brief Indicates write protect status.
*
* \param p_adc Pointer to an ADC instance.
*
* \return 0 if the peripheral is not protected, or 16-bit Write Protect Violation Status.
*/
uint32_t adc_get_writeprotect_status(Adc *p_adc)
{
return p_adc->ADC_WPSR & ADC_WPSR_WPVS;
}
#if 0
/**
* \brief calcul_startup
*/
static uint32_t calcul_startup( uint32_t ul_startup )
{
uint32_t ul_startup_value=0;
if( ul_startup == 0 )
ul_startup_value = 0;
else if( ul_startup == 1 )
ul_startup_value = 8;
else if( ul_startup == 2 )
ul_startup_value = 16;
else if( ul_startup == 3 )
ul_startup_value = 24;
else if( ul_startup == 4 )
ul_startup_value = 64;
else if( ul_startup == 5 )
ul_startup_value = 80;
else if( ul_startup == 6 )
ul_startup_value = 96;
else if( ul_startup == 7 )
ul_startup_value = 112;
else if( ul_startup == 8 )
ul_startup_value = 512;
else if( ul_startup == 9 )
ul_startup_value = 576;
else if( ul_startup == 10 )
ul_startup_value = 640;
else if( ul_startup == 11 )
ul_startup_value = 704;
else if( ul_startup == 12 )
ul_startup_value = 768;
else if( ul_startup == 13 )
ul_startup_value = 832;
else if( ul_startup == 14 )
ul_startup_value = 896;
else if( ul_startup == 15 )
ul_startup_value = 960;
return ul_startup_value;
}
/**
* \brief Checks ADC configurations.
*
* \param p_adc Pointer to an ADC instance.
* \param dw_mck Main clock of the device (value in Hz).
*/
void adc_check(Adc* p_adc, uint32_t ul_mck)
{
uint32_t ul_adcfreq;
uint32_t ul_prescal;
uint32_t ul_startup;
/* ADCClock = MCK / ( (PRESCAL+1) * 2 ) */
ul_prescal = (( p_adc->ADC_MR & ADC_MR_PRESCAL_Msk) >> ADC_MR_PRESCAL_Pos);
ul_adcfreq = ul_mck / ((ul_prescal+1)*2);
printf("ADC clock frequency = %d Hz\r\n", (int)ul_adcfreq );
if( ul_adcfreq < ADC_FREQ_MIN )
{
printf("adc frequency too low (out of specification: %d Hz)\r\n", (int)ADC_FREQ_MIN);
}
if( ul_adcfreq > ADC_FREQ_MAX )
{
printf("adc frequency too high (out of specification: %d Hz)\r\n", (int)ADC_FREQ_MAX);
}
ul_startup = (( p_adc->ADC_MR & ADC_MR_STARTUP_Msk) >> ADC_MR_STARTUP_Pos);
if( !(p_adc->ADC_MR & ADC_MR_SLEEP_SLEEP) )
{
/* 40ms */
if( ADC_STARTUP_NORM * ul_adcfreq / 1000000 > calcul_startup(ul_startup) )
{
printf("Startup time too small: %d, programmed: %d\r\n", (int)(ADC_STARTUP_NORM * ul_adcfreq / 1000000), (int)calcul_startup(ul_startup));
}
}
else
{
if(p_adc->ADC_MR & ADC_MR_FREERUN_ON)
{
printf("FreeRun forbidden in sleep mode\n\r");
}
if( !(p_adc->ADC_MR & ADC_MR_FWUP_ON) )
{
/* Sleep 40ms */
if( ADC_STARTUP_NORM * ul_adcfreq / 1000000 > calcul_startup(ul_startup) )
{
printf("Startup time too small: %d, programmed: %d\r\n", (int)(ADC_STARTUP_NORM * ul_adcfreq / 1000000), (int)(calcul_startup(ul_startup)));
}
}
else
{
if( p_adc->ADC_MR & ADC_MR_FWUP_ON )
{
/* Fast Wake Up Sleep Mode: 12ms */
if( ADC_STARTUP_FAST * ul_adcfreq / 1000000 > calcul_startup(ul_startup) )
{
printf("Startup time too small: %d, programmed: %d\r\n", (int)(ADC_STARTUP_NORM * ul_adcfreq / 1000000), (int)(calcul_startup(ul_startup)));
}
}
}
}
}
#endif /* 0 */
/**
* \brief Gets PDC registers base address.
*
* \param p_adc Pointer to an ADC instance.
*
* \retval PDC registers base for PDC driver to access.
*/
Pdc *adc_get_pdc_base(Adc *p_adc)
{
return PDC_ADC;
}
/// @cond 0
/**INDENT-OFF**/
#ifdef __cplusplus
}
#endif
/**INDENT-ON**/
/// @endcond
#endif /* SAM3S_SERIES || SAM3N_SERIES || SAM3XA_SERIES */

18
hardware/arduino/sam/variants/arduino_due_x/variant.cpp
View File

@ -314,9 +314,6 @@ void USART2_Handler( void )
extern "C" {
#endif
// Should be made in a better way...
extern void analogOutputInit(void);
/**
*
*/
@ -358,20 +355,17 @@ extern void init( void )
g_APinDescription[PINS_USART2].ulPin,
g_APinDescription[PINS_USART2].ulPinConfiguration);
/*
// Initialize 10bit Analog Controller
PMC_EnablePeripheral( ID_ADC ) ;
adc_init( ADC, SystemCoreClock, ADC_FREQ_MAX, ADC_STARTUP ) ;
// adc_configure_timing( ADC, 15 ) ;
adc_configure_timing(ADC, 0, ADC_SETTLING_TIME_3, 1);
// adc_configure_trigger( ADC, ADC_TRIG_SW ) ;
adc_configure_trigger(ADC, ADC_TRIG_SW, 0); // Disable hardware trigger.
adc_disable_interrupt( ADC, 0xFFFFFFFF ) ; // Disable all adc interrupt.
adc_disable_channel( ADC, ADC_ALL_CHANNEL ) ;
adc_init( ADC, SystemCoreClock, ADC_FREQ_MAX, ADC_STARTUP_FAST ) ;
adc_configure_timing(ADC, 0, ADC_SETTLING_TIME_3, 1);
adc_configure_trigger(ADC, ADC_TRIG_SW, 0); // Disable hardware trigger.
adc_disable_interrupt( ADC, 0xFFFFFFFF ) ; // Disable all ADC interrupts.
adc_disable_all_channel( ADC ) ;
// Initialize analogOutput module
analogOutputInit();
*/
}
#ifdef __cplusplus
}