diff --git a/build/linux/work/arduino b/build/linux/work/arduino deleted file mode 100755 index d371e768a..000000000 --- a/build/linux/work/arduino +++ /dev/null @@ -1,22 +0,0 @@ -#!/bin/sh - -APPDIR="$(dirname -- $(readlink -f -- "${0}") )" - -cd $APPDIR - -for LIB in \ - java/lib/rt.jar \ - java/lib/tools.jar \ - lib/*.jar \ - ; -do - CLASSPATH="${CLASSPATH}:${LIB}" -done -export CLASSPATH - -LD_LIBRARY_PATH=`pwd`/lib${LD_LIBRARY_PATH:+:$LD_LIBRARY_PATH} -export LD_LIBRARY_PATH - -export PATH="${APPDIR}/java/bin:${PATH}" - -java -Dswing.defaultlaf=com.sun.java.swing.plaf.gtk.GTKLookAndFeel processing.app.Base diff --git a/build/linux/work/examples/01.Basics/AnalogReadSerial/AnalogReadSerial.ino b/build/linux/work/examples/01.Basics/AnalogReadSerial/AnalogReadSerial.ino deleted file mode 100644 index 2ba6fa73b..000000000 --- a/build/linux/work/examples/01.Basics/AnalogReadSerial/AnalogReadSerial.ino +++ /dev/null @@ -1,15 +0,0 @@ -/* - AnalogReadSerial - Reads an analog input on pin 0, prints the result to the serial monitor - - This example code is in the public domain. - */ - -void setup() { - Serial.begin(9600); -} - -void loop() { - int sensorValue = analogRead(A0); - Serial.println(sensorValue); -} diff --git a/build/linux/work/examples/01.Basics/BareMinimum/BareMinimum.ino b/build/linux/work/examples/01.Basics/BareMinimum/BareMinimum.ino deleted file mode 100644 index c9c84ceca..000000000 --- a/build/linux/work/examples/01.Basics/BareMinimum/BareMinimum.ino +++ /dev/null @@ -1,9 +0,0 @@ -void setup() { - // put your setup code here, to run once: - -} - -void loop() { - // put your main code here, to run repeatedly: - -} diff --git a/build/linux/work/examples/01.Basics/Blink/Blink.ino b/build/linux/work/examples/01.Basics/Blink/Blink.ino deleted file mode 100644 index 1953c3908..000000000 --- a/build/linux/work/examples/01.Basics/Blink/Blink.ino +++ /dev/null @@ -1,19 +0,0 @@ -/* - Blink - Turns on an LED on for one second, then off for one second, repeatedly. - - This example code is in the public domain. - */ - -void setup() { - // initialize the digital pin as an output. - // Pin 13 has an LED connected on most Arduino boards: - pinMode(13, OUTPUT); -} - -void loop() { - digitalWrite(13, HIGH); // set the LED on - delay(1000); // wait for a second - digitalWrite(13, LOW); // set the LED off - delay(1000); // wait for a second -} diff --git a/build/linux/work/examples/01.Basics/DigitalReadSerial/DigitalReadSerial.ino b/build/linux/work/examples/01.Basics/DigitalReadSerial/DigitalReadSerial.ino deleted file mode 100644 index 68e4dc966..000000000 --- a/build/linux/work/examples/01.Basics/DigitalReadSerial/DigitalReadSerial.ino +++ /dev/null @@ -1,19 +0,0 @@ -/* - DigitalReadSerial - Reads a digital input on pin 2, prints the result to the serial monitor - - This example code is in the public domain. - */ - -void setup() { - Serial.begin(9600); - pinMode(2, INPUT); -} - -void loop() { - int sensorValue = digitalRead(2); - Serial.println(sensorValue); -} - - - diff --git a/build/linux/work/examples/01.Basics/Fade/Fade.ino b/build/linux/work/examples/01.Basics/Fade/Fade.ino deleted file mode 100644 index b47bf4307..000000000 --- a/build/linux/work/examples/01.Basics/Fade/Fade.ino +++ /dev/null @@ -1,31 +0,0 @@ -/* - Fade - - This example shows how to fade an LED on pin 9 - using the analogWrite() function. - - This example code is in the public domain. - - */ -int brightness = 0; // how bright the LED is -int fadeAmount = 5; // how many points to fade the LED by - -void setup() { - // declare pin 9 to be an output: - pinMode(9, OUTPUT); -} - -void loop() { - // set the brightness of pin 9: - analogWrite(9, brightness); - - // change the brightness for next time through the loop: - brightness = brightness + fadeAmount; - - // reverse the direction of the fading at the ends of the fade: - if (brightness == 0 || brightness == 255) { - fadeAmount = -fadeAmount ; - } - // wait for 30 milliseconds to see the dimming effect - delay(30); -} diff --git a/build/linux/work/examples/02.Digital/BlinkWithoutDelay/BlinkWithoutDelay.ino b/build/linux/work/examples/02.Digital/BlinkWithoutDelay/BlinkWithoutDelay.ino deleted file mode 100644 index 014357191..000000000 --- a/build/linux/work/examples/02.Digital/BlinkWithoutDelay/BlinkWithoutDelay.ino +++ /dev/null @@ -1,65 +0,0 @@ -/* Blink without Delay - - Turns on and off a light emitting diode(LED) connected to a digital - pin, without using the delay() function. This means that other code - can run at the same time without being interrupted by the LED code. - - The circuit: - * LED attached from pin 13 to ground. - * Note: on most Arduinos, there is already an LED on the board - that's attached to pin 13, so no hardware is needed for this example. - - - created 2005 - by David A. Mellis - modified 8 Feb 2010 - by Paul Stoffregen - - This example code is in the public domain. - - - http://www.arduino.cc/en/Tutorial/BlinkWithoutDelay - */ - -// constants won't change. Used here to -// set pin numbers: -const int ledPin = 13; // the number of the LED pin - -// Variables will change: -int ledState = LOW; // ledState used to set the LED -long previousMillis = 0; // will store last time LED was updated - -// the follow variables is a long because the time, measured in miliseconds, -// will quickly become a bigger number than can be stored in an int. -long interval = 1000; // interval at which to blink (milliseconds) - -void setup() { - // set the digital pin as output: - pinMode(ledPin, OUTPUT); -} - -void loop() -{ - // here is where you'd put code that needs to be running all the time. - - // check to see if it's time to blink the LED; that is, if the - // difference between the current time and last time you blinked - // the LED is bigger than the interval at which you want to - // blink the LED. - unsigned long currentMillis = millis(); - - if(currentMillis - previousMillis > interval) { - // save the last time you blinked the LED - previousMillis = currentMillis; - - // if the LED is off turn it on and vice-versa: - if (ledState == LOW) - ledState = HIGH; - else - ledState = LOW; - - // set the LED with the ledState of the variable: - digitalWrite(ledPin, ledState); - } -} - diff --git a/build/linux/work/examples/02.Digital/Button/Button.ino b/build/linux/work/examples/02.Digital/Button/Button.ino deleted file mode 100644 index e019fca31..000000000 --- a/build/linux/work/examples/02.Digital/Button/Button.ino +++ /dev/null @@ -1,56 +0,0 @@ -/* - Button - - Turns on and off a light emitting diode(LED) connected to digital - pin 13, when pressing a pushbutton attached to pin 2. - - - The circuit: - * LED attached from pin 13 to ground - * pushbutton attached to pin 2 from +5V - * 10K resistor attached to pin 2 from ground - - * Note: on most Arduinos there is already an LED on the board - attached to pin 13. - - - created 2005 - by DojoDave - modified 30 Aug 2011 - by Tom Igoe - - This example code is in the public domain. - - http://www.arduino.cc/en/Tutorial/Button - */ - -// constants won't change. They're used here to -// set pin numbers: -const int buttonPin = 2; // the number of the pushbutton pin -const int ledPin = 13; // the number of the LED pin - -// variables will change: -int buttonState = 0; // variable for reading the pushbutton status - -void setup() { - // initialize the LED pin as an output: - pinMode(ledPin, OUTPUT); - // initialize the pushbutton pin as an input: - pinMode(buttonPin, INPUT); -} - -void loop(){ - // read the state of the pushbutton value: - buttonState = digitalRead(buttonPin); - - // check if the pushbutton is pressed. - // if it is, the buttonState is HIGH: - if (buttonState == HIGH) { - // turn LED on: - digitalWrite(ledPin, HIGH); - } - else { - // turn LED off: - digitalWrite(ledPin, LOW); - } -} \ No newline at end of file diff --git a/build/linux/work/examples/02.Digital/Debounce/Debounce.ino b/build/linux/work/examples/02.Digital/Debounce/Debounce.ino deleted file mode 100644 index 89416b269..000000000 --- a/build/linux/work/examples/02.Digital/Debounce/Debounce.ino +++ /dev/null @@ -1,75 +0,0 @@ -/* - Debounce - - Each time the input pin goes from LOW to HIGH (e.g. because of a push-button - press), the output pin is toggled from LOW to HIGH or HIGH to LOW. There's - a minimum delay between toggles to debounce the circuit (i.e. to ignore - noise). - - The circuit: - * LED attached from pin 13 to ground - * pushbutton attached from pin 2 to +5V - * 10K resistor attached from pin 2 to ground - - * Note: On most Arduino boards, there is already an LED on the board - connected to pin 13, so you don't need any extra components for this example. - - - created 21 November 2006 - by David A. Mellis - modified 30 Aug 2011 - by Limor Fried - -This example code is in the public domain. - - http://www.arduino.cc/en/Tutorial/Debounce - */ - -// constants won't change. They're used here to -// set pin numbers: -const int buttonPin = 2; // the number of the pushbutton pin -const int ledPin = 13; // the number of the LED pin - -// Variables will change: -int ledState = HIGH; // the current state of the output pin -int buttonState; // the current reading from the input pin -int lastButtonState = LOW; // the previous reading from the input pin - -// the following variables are long's because the time, measured in miliseconds, -// will quickly become a bigger number than can be stored in an int. -long lastDebounceTime = 0; // the last time the output pin was toggled -long debounceDelay = 50; // the debounce time; increase if the output flickers - -void setup() { - pinMode(buttonPin, INPUT); - pinMode(ledPin, OUTPUT); -} - -void loop() { - // read the state of the switch into a local variable: - int reading = digitalRead(buttonPin); - - // check to see if you just pressed the button - // (i.e. the input went from LOW to HIGH), and you've waited - // long enough since the last press to ignore any noise: - - // If the switch changed, due to noise or pressing: - if (reading != lastButtonState) { - // reset the debouncing timer - lastDebounceTime = millis(); - } - - if ((millis() - lastDebounceTime) > debounceDelay) { - // whatever the reading is at, it's been there for longer - // than the debounce delay, so take it as the actual current state: - buttonState = reading; - } - - // set the LED using the state of the button: - digitalWrite(ledPin, buttonState); - - // save the reading. Next time through the loop, - // it'll be the lastButtonState: - lastButtonState = reading; -} - diff --git a/build/linux/work/examples/02.Digital/DigitalIputPullup/DigitalIputPullup.ino b/build/linux/work/examples/02.Digital/DigitalIputPullup/DigitalIputPullup.ino deleted file mode 100644 index 6f540e9ff..000000000 --- a/build/linux/work/examples/02.Digital/DigitalIputPullup/DigitalIputPullup.ino +++ /dev/null @@ -1,52 +0,0 @@ -/* - Input Pullup Serial - - This example demonstrates the use of pinMode(INPUT_PULLUP). It reads a - digital input on pin 2 and prints the results to the serial monitor. - - The circuit: - * Momentary switch attached from pin 2 to ground - * Built-in LED on pin 13 - - Unlike pinMode(INPUT), there is no pull-down resistor necessary. An internal - 20K-ohm resistor is pulled to 5V. This configuration causes the input to - read HIGH when the switch is open, and LOW when it is closed. - - created 14 March 2012 - by Scott Fitzgerald - - http://www.arduino.cc/en/Tutorial/InputPullupSerial - - This example code is in the public domain - - */ - -void setup(){ - //start serial connection - Serial.begin(9600); - //configure pin2 as an input and enable the internal pull-up resistor - pinMode(2, INPUT_PULLUP); - pinMode(13, OUTPUT); - -} - -void loop(){ - //read the pushbutton value into a variable - int sensorVal = digitalRead(2); - //print out the value of the pushbutton - Serial.println(sensorVal); - - // Keep in mind the pullup means the pushbutton's - // logic is inverted. It goes HIGH when it's open, - // and LOW when it's pressed. Turn on pin 13 when the - // button's pressed, and off when it's not: - if (sensorVal == HIGH) { - digitalWrite(13, LOW); - } - else { - digitalWrite(13, HIGH); - } -} - - - diff --git a/build/linux/work/examples/02.Digital/StateChangeDetection/StateChangeDetection.ino b/build/linux/work/examples/02.Digital/StateChangeDetection/StateChangeDetection.ino deleted file mode 100644 index 30bb3c405..000000000 --- a/build/linux/work/examples/02.Digital/StateChangeDetection/StateChangeDetection.ino +++ /dev/null @@ -1,92 +0,0 @@ -/* - State change detection (edge detection) - - Often, you don't need to know the state of a digital input all the time, - but you just need to know when the input changes from one state to another. - For example, you want to know when a button goes from OFF to ON. This is called - state change detection, or edge detection. - - This example shows how to detect when a button or button changes from off to on - and on to off. - - The circuit: - * pushbutton attached to pin 2 from +5V - * 10K resistor attached to pin 2 from ground - * LED attached from pin 13 to ground (or use the built-in LED on - most Arduino boards) - - created 27 Sep 2005 - modified 30 Aug 2011 - by Tom Igoe - -This example code is in the public domain. - - http://arduino.cc/en/Tutorial/ButtonStateChange - - */ - -// this constant won't change: -const int buttonPin = 2; // the pin that the pushbutton is attached to -const int ledPin = 13; // the pin that the LED is attached to - -// Variables will change: -int buttonPushCounter = 0; // counter for the number of button presses -int buttonState = 0; // current state of the button -int lastButtonState = 0; // previous state of the button - -void setup() { - // initialize the button pin as a input: - pinMode(buttonPin, INPUT); - // initialize the LED as an output: - pinMode(ledPin, OUTPUT); - // initialize serial communication: - Serial.begin(9600); -} - - -void loop() { - // read the pushbutton input pin: - buttonState = digitalRead(buttonPin); - - // compare the buttonState to its previous state - if (buttonState != lastButtonState) { - // if the state has changed, increment the counter - if (buttonState == HIGH) { - // if the current state is HIGH then the button - // wend from off to on: - buttonPushCounter++; - Serial.println("on"); - Serial.print("number of button pushes: "); - Serial.println(buttonPushCounter); - } - else { - // if the current state is LOW then the button - // wend from on to off: - Serial.println("off"); - } - } - // save the current state as the last state, - //for next time through the loop - lastButtonState = buttonState; - - - // turns on the LED every four button pushes by - // checking the modulo of the button push counter. - // the modulo function gives you the remainder of - // the division of two numbers: - if (buttonPushCounter % 4 == 0) { - digitalWrite(ledPin, HIGH); - } else { - digitalWrite(ledPin, LOW); - } - -} - - - - - - - - - diff --git a/build/linux/work/examples/02.Digital/toneKeyboard/pitches.h b/build/linux/work/examples/02.Digital/toneKeyboard/pitches.h deleted file mode 100644 index 55c7d54e6..000000000 --- a/build/linux/work/examples/02.Digital/toneKeyboard/pitches.h +++ /dev/null @@ -1,95 +0,0 @@ -/************************************************* - * Public Constants - *************************************************/ - -#define NOTE_B0 31 -#define NOTE_C1 33 -#define NOTE_CS1 35 -#define NOTE_D1 37 -#define NOTE_DS1 39 -#define NOTE_E1 41 -#define NOTE_F1 44 -#define NOTE_FS1 46 -#define NOTE_G1 49 -#define NOTE_GS1 52 -#define NOTE_A1 55 -#define NOTE_AS1 58 -#define NOTE_B1 62 -#define NOTE_C2 65 -#define NOTE_CS2 69 -#define NOTE_D2 73 -#define NOTE_DS2 78 -#define NOTE_E2 82 -#define NOTE_F2 87 -#define NOTE_FS2 93 -#define NOTE_G2 98 -#define NOTE_GS2 104 -#define NOTE_A2 110 -#define NOTE_AS2 117 -#define NOTE_B2 123 -#define NOTE_C3 131 -#define NOTE_CS3 139 -#define NOTE_D3 147 -#define NOTE_DS3 156 -#define NOTE_E3 165 -#define NOTE_F3 175 -#define NOTE_FS3 185 -#define NOTE_G3 196 -#define NOTE_GS3 208 -#define NOTE_A3 220 -#define NOTE_AS3 233 -#define NOTE_B3 247 -#define NOTE_C4 262 -#define NOTE_CS4 277 -#define NOTE_D4 294 -#define NOTE_DS4 311 -#define NOTE_E4 330 -#define NOTE_F4 349 -#define NOTE_FS4 370 -#define NOTE_G4 392 -#define NOTE_GS4 415 -#define NOTE_A4 440 -#define NOTE_AS4 466 -#define NOTE_B4 494 -#define NOTE_C5 523 -#define NOTE_CS5 554 -#define NOTE_D5 587 -#define NOTE_DS5 622 -#define NOTE_E5 659 -#define NOTE_F5 698 -#define NOTE_FS5 740 -#define NOTE_G5 784 -#define NOTE_GS5 831 -#define NOTE_A5 880 -#define NOTE_AS5 932 -#define NOTE_B5 988 -#define NOTE_C6 1047 -#define NOTE_CS6 1109 -#define NOTE_D6 1175 -#define NOTE_DS6 1245 -#define NOTE_E6 1319 -#define NOTE_F6 1397 -#define NOTE_FS6 1480 -#define NOTE_G6 1568 -#define NOTE_GS6 1661 -#define NOTE_A6 1760 -#define NOTE_AS6 1865 -#define NOTE_B6 1976 -#define NOTE_C7 2093 -#define NOTE_CS7 2217 -#define NOTE_D7 2349 -#define NOTE_DS7 2489 -#define NOTE_E7 2637 -#define NOTE_F7 2794 -#define NOTE_FS7 2960 -#define NOTE_G7 3136 -#define NOTE_GS7 3322 -#define NOTE_A7 3520 -#define NOTE_AS7 3729 -#define NOTE_B7 3951 -#define NOTE_C8 4186 -#define NOTE_CS8 4435 -#define NOTE_D8 4699 -#define NOTE_DS8 4978 - - diff --git a/build/linux/work/examples/02.Digital/toneKeyboard/toneKeyboard.ino b/build/linux/work/examples/02.Digital/toneKeyboard/toneKeyboard.ino deleted file mode 100644 index 9decdd752..000000000 --- a/build/linux/work/examples/02.Digital/toneKeyboard/toneKeyboard.ino +++ /dev/null @@ -1,45 +0,0 @@ -/* - keyboard - - Plays a pitch that changes based on a changing analog input - - circuit: - * 3 force-sensing resistors from +5V to analog in 0 through 5 - * 3 10K resistors from analog in 0 through 5 to ground - * 8-ohm speaker on digital pin 8 - - created 21 Jan 2010 - modified 30 Aug 2011 - by Tom Igoe - -This example code is in the public domain. - - http://arduino.cc/en/Tutorial/Tone3 - - */ - -#include "pitches.h" - -const int threshold = 10; // minimum reading of the sensors that generates a note - -// notes to play, corresponding to the 3 sensors: -int notes[] = { - NOTE_A4, NOTE_B4,NOTE_C3 }; - -void setup() { - -} - -void loop() { - for (int thisSensor = 0; thisSensor < 3; thisSensor++) { - // get a sensor reading: - int sensorReading = analogRead(thisSensor); - - // if the sensor is pressed hard enough: - if (sensorReading > threshold) { - // play the note corresponding to this sensor: - tone(8, notes[thisSensor], 20); - } - } - Serial.println(); -} diff --git a/build/linux/work/examples/02.Digital/toneMelody/pitches.h b/build/linux/work/examples/02.Digital/toneMelody/pitches.h deleted file mode 100644 index 55c7d54e6..000000000 --- a/build/linux/work/examples/02.Digital/toneMelody/pitches.h +++ /dev/null @@ -1,95 +0,0 @@ -/************************************************* - * Public Constants - *************************************************/ - -#define NOTE_B0 31 -#define NOTE_C1 33 -#define NOTE_CS1 35 -#define NOTE_D1 37 -#define NOTE_DS1 39 -#define NOTE_E1 41 -#define NOTE_F1 44 -#define NOTE_FS1 46 -#define NOTE_G1 49 -#define NOTE_GS1 52 -#define NOTE_A1 55 -#define NOTE_AS1 58 -#define NOTE_B1 62 -#define NOTE_C2 65 -#define NOTE_CS2 69 -#define NOTE_D2 73 -#define NOTE_DS2 78 -#define NOTE_E2 82 -#define NOTE_F2 87 -#define NOTE_FS2 93 -#define NOTE_G2 98 -#define NOTE_GS2 104 -#define NOTE_A2 110 -#define NOTE_AS2 117 -#define NOTE_B2 123 -#define NOTE_C3 131 -#define NOTE_CS3 139 -#define NOTE_D3 147 -#define NOTE_DS3 156 -#define NOTE_E3 165 -#define NOTE_F3 175 -#define NOTE_FS3 185 -#define NOTE_G3 196 -#define NOTE_GS3 208 -#define NOTE_A3 220 -#define NOTE_AS3 233 -#define NOTE_B3 247 -#define NOTE_C4 262 -#define NOTE_CS4 277 -#define NOTE_D4 294 -#define NOTE_DS4 311 -#define NOTE_E4 330 -#define NOTE_F4 349 -#define NOTE_FS4 370 -#define NOTE_G4 392 -#define NOTE_GS4 415 -#define NOTE_A4 440 -#define NOTE_AS4 466 -#define NOTE_B4 494 -#define NOTE_C5 523 -#define NOTE_CS5 554 -#define NOTE_D5 587 -#define NOTE_DS5 622 -#define NOTE_E5 659 -#define NOTE_F5 698 -#define NOTE_FS5 740 -#define NOTE_G5 784 -#define NOTE_GS5 831 -#define NOTE_A5 880 -#define NOTE_AS5 932 -#define NOTE_B5 988 -#define NOTE_C6 1047 -#define NOTE_CS6 1109 -#define NOTE_D6 1175 -#define NOTE_DS6 1245 -#define NOTE_E6 1319 -#define NOTE_F6 1397 -#define NOTE_FS6 1480 -#define NOTE_G6 1568 -#define NOTE_GS6 1661 -#define NOTE_A6 1760 -#define NOTE_AS6 1865 -#define NOTE_B6 1976 -#define NOTE_C7 2093 -#define NOTE_CS7 2217 -#define NOTE_D7 2349 -#define NOTE_DS7 2489 -#define NOTE_E7 2637 -#define NOTE_F7 2794 -#define NOTE_FS7 2960 -#define NOTE_G7 3136 -#define NOTE_GS7 3322 -#define NOTE_A7 3520 -#define NOTE_AS7 3729 -#define NOTE_B7 3951 -#define NOTE_C8 4186 -#define NOTE_CS8 4435 -#define NOTE_D8 4699 -#define NOTE_DS8 4978 - - diff --git a/build/linux/work/examples/02.Digital/toneMelody/toneMelody.ino b/build/linux/work/examples/02.Digital/toneMelody/toneMelody.ino deleted file mode 100644 index 8593ab770..000000000 --- a/build/linux/work/examples/02.Digital/toneMelody/toneMelody.ino +++ /dev/null @@ -1,49 +0,0 @@ -/* - Melody - - Plays a melody - - circuit: - * 8-ohm speaker on digital pin 8 - - created 21 Jan 2010 - modified 30 Aug 2011 - by Tom Igoe - -This example code is in the public domain. - - http://arduino.cc/en/Tutorial/Tone - - */ - #include "pitches.h" - -// notes in the melody: -int melody[] = { - NOTE_C4, NOTE_G3,NOTE_G3, NOTE_A3, NOTE_G3,0, NOTE_B3, NOTE_C4}; - -// note durations: 4 = quarter note, 8 = eighth note, etc.: -int noteDurations[] = { - 4, 8, 8, 4,4,4,4,4 }; - -void setup() { - // iterate over the notes of the melody: - for (int thisNote = 0; thisNote < 8; thisNote++) { - - // to calculate the note duration, take one second - // divided by the note type. - //e.g. quarter note = 1000 / 4, eighth note = 1000/8, etc. - int noteDuration = 1000/noteDurations[thisNote]; - tone(8, melody[thisNote],noteDuration); - - // to distinguish the notes, set a minimum time between them. - // the note's duration + 30% seems to work well: - int pauseBetweenNotes = noteDuration * 1.30; - delay(pauseBetweenNotes); - // stop the tone playing: - noTone(8); - } -} - -void loop() { - // no need to repeat the melody. -} diff --git a/build/linux/work/examples/02.Digital/toneMultiple/pitches.h b/build/linux/work/examples/02.Digital/toneMultiple/pitches.h deleted file mode 100644 index 55c7d54e6..000000000 --- a/build/linux/work/examples/02.Digital/toneMultiple/pitches.h +++ /dev/null @@ -1,95 +0,0 @@ -/************************************************* - * Public Constants - *************************************************/ - -#define NOTE_B0 31 -#define NOTE_C1 33 -#define NOTE_CS1 35 -#define NOTE_D1 37 -#define NOTE_DS1 39 -#define NOTE_E1 41 -#define NOTE_F1 44 -#define NOTE_FS1 46 -#define NOTE_G1 49 -#define NOTE_GS1 52 -#define NOTE_A1 55 -#define NOTE_AS1 58 -#define NOTE_B1 62 -#define NOTE_C2 65 -#define NOTE_CS2 69 -#define NOTE_D2 73 -#define NOTE_DS2 78 -#define NOTE_E2 82 -#define NOTE_F2 87 -#define NOTE_FS2 93 -#define NOTE_G2 98 -#define NOTE_GS2 104 -#define NOTE_A2 110 -#define NOTE_AS2 117 -#define NOTE_B2 123 -#define NOTE_C3 131 -#define NOTE_CS3 139 -#define NOTE_D3 147 -#define NOTE_DS3 156 -#define NOTE_E3 165 -#define NOTE_F3 175 -#define NOTE_FS3 185 -#define NOTE_G3 196 -#define NOTE_GS3 208 -#define NOTE_A3 220 -#define NOTE_AS3 233 -#define NOTE_B3 247 -#define NOTE_C4 262 -#define NOTE_CS4 277 -#define NOTE_D4 294 -#define NOTE_DS4 311 -#define NOTE_E4 330 -#define NOTE_F4 349 -#define NOTE_FS4 370 -#define NOTE_G4 392 -#define NOTE_GS4 415 -#define NOTE_A4 440 -#define NOTE_AS4 466 -#define NOTE_B4 494 -#define NOTE_C5 523 -#define NOTE_CS5 554 -#define NOTE_D5 587 -#define NOTE_DS5 622 -#define NOTE_E5 659 -#define NOTE_F5 698 -#define NOTE_FS5 740 -#define NOTE_G5 784 -#define NOTE_GS5 831 -#define NOTE_A5 880 -#define NOTE_AS5 932 -#define NOTE_B5 988 -#define NOTE_C6 1047 -#define NOTE_CS6 1109 -#define NOTE_D6 1175 -#define NOTE_DS6 1245 -#define NOTE_E6 1319 -#define NOTE_F6 1397 -#define NOTE_FS6 1480 -#define NOTE_G6 1568 -#define NOTE_GS6 1661 -#define NOTE_A6 1760 -#define NOTE_AS6 1865 -#define NOTE_B6 1976 -#define NOTE_C7 2093 -#define NOTE_CS7 2217 -#define NOTE_D7 2349 -#define NOTE_DS7 2489 -#define NOTE_E7 2637 -#define NOTE_F7 2794 -#define NOTE_FS7 2960 -#define NOTE_G7 3136 -#define NOTE_GS7 3322 -#define NOTE_A7 3520 -#define NOTE_AS7 3729 -#define NOTE_B7 3951 -#define NOTE_C8 4186 -#define NOTE_CS8 4435 -#define NOTE_D8 4699 -#define NOTE_DS8 4978 - - diff --git a/build/linux/work/examples/02.Digital/toneMultiple/toneMultiple.ino b/build/linux/work/examples/02.Digital/toneMultiple/toneMultiple.ino deleted file mode 100644 index 52a06df52..000000000 --- a/build/linux/work/examples/02.Digital/toneMultiple/toneMultiple.ino +++ /dev/null @@ -1,42 +0,0 @@ -/* - Multiple tone player - - Plays multiple tones on multiple pins in sequence - - circuit: - * 3 8-ohm speaker on digital pins 6, 7, and 11 - - created 8 March 2010 - by Tom Igoe - based on a snippet from Greg Borenstein - -This example code is in the public domain. - - http://arduino.cc/en/Tutorial/Tone4 - - */ - -void setup() { - -} - -void loop() { - // turn off tone function for pin 11: - noTone(11); - // play a note on pin 6 for 200 ms: - tone(6, 440, 200); - delay(200); - - // turn off tone function for pin 6: - noTone(6); - // play a note on pin 7 for 500 ms: - tone(7, 494, 500); - delay(500); - - // turn off tone function for pin 7: - noTone(7); - // play a note on pin 11 for 500 ms: - tone(11, 523, 300); - delay(300); - -} diff --git a/build/linux/work/examples/02.Digital/tonePitchFollower/tonePitchFollower.ino b/build/linux/work/examples/02.Digital/tonePitchFollower/tonePitchFollower.ino deleted file mode 100644 index beb28b2bd..000000000 --- a/build/linux/work/examples/02.Digital/tonePitchFollower/tonePitchFollower.ino +++ /dev/null @@ -1,46 +0,0 @@ -/* - Pitch follower - - Plays a pitch that changes based on a changing analog input - - circuit: - * 8-ohm speaker on digital pin 8 - * photoresistor on analog 0 to 5V - * 4.7K resistor on analog 0 to ground - - created 21 Jan 2010 - modified 30 Aug 2011 - by Tom Igoe - -This example code is in the public domain. - - http://arduino.cc/en/Tutorial/Tone2 - - */ - - -void setup() { - // initialize serial communications (for debugging only): - Serial.begin(9600); -} - -void loop() { - // read the sensor: - int sensorReading = analogRead(A0); - // print the sensor reading so you know its range - Serial.println(sensorReading); - // map the pitch to the range of the analog input. - // change the minimum and maximum input numbers below - // depending on the range your sensor's giving: - int thisPitch = map(sensorReading, 400, 1000, 100, 1000); - - // play the pitch: - tone(9, thisPitch, 10); - -} - - - - - - diff --git a/build/linux/work/examples/03.Analog/AnalogInOutSerial/AnalogInOutSerial.ino b/build/linux/work/examples/03.Analog/AnalogInOutSerial/AnalogInOutSerial.ino deleted file mode 100644 index e142f690e..000000000 --- a/build/linux/work/examples/03.Analog/AnalogInOutSerial/AnalogInOutSerial.ino +++ /dev/null @@ -1,53 +0,0 @@ -/* - Analog input, analog output, serial output - - Reads an analog input pin, maps the result to a range from 0 to 255 - and uses the result to set the pulsewidth modulation (PWM) of an output pin. - Also prints the results to the serial monitor. - - The circuit: - * potentiometer connected to analog pin 0. - Center pin of the potentiometer goes to the analog pin. - side pins of the potentiometer go to +5V and ground - * LED connected from digital pin 9 to ground - - created 29 Dec. 2008 - modified 30 Aug 2011 - by Tom Igoe - - This example code is in the public domain. - - */ - -// These constants won't change. They're used to give names -// to the pins used: -const int analogInPin = A0; // Analog input pin that the potentiometer is attached to -const int analogOutPin = 9; // Analog output pin that the LED is attached to - -int sensorValue = 0; // value read from the pot -int outputValue = 0; // value output to the PWM (analog out) - -void setup() { - // initialize serial communications at 9600 bps: - Serial.begin(9600); -} - -void loop() { - // read the analog in value: - sensorValue = analogRead(analogInPin); - // map it to the range of the analog out: - outputValue = map(sensorValue, 0, 1023, 0, 255); - // change the analog out value: - analogWrite(analogOutPin, outputValue); - - // print the results to the serial monitor: - Serial.print("sensor = " ); - Serial.print(sensorValue); - Serial.print("\t output = "); - Serial.println(outputValue); - - // wait 10 milliseconds before the next loop - // for the analog-to-digital converter to settle - // after the last reading: - delay(10); -} diff --git a/build/linux/work/examples/03.Analog/AnalogInput/AnalogInput.ino b/build/linux/work/examples/03.Analog/AnalogInput/AnalogInput.ino deleted file mode 100644 index 5d685883b..000000000 --- a/build/linux/work/examples/03.Analog/AnalogInput/AnalogInput.ino +++ /dev/null @@ -1,50 +0,0 @@ -/* - Analog Input - Demonstrates analog input by reading an analog sensor on analog pin 0 and - turning on and off a light emitting diode(LED) connected to digital pin 13. - The amount of time the LED will be on and off depends on - the value obtained by analogRead(). - - The circuit: - * Potentiometer attached to analog input 0 - * center pin of the potentiometer to the analog pin - * one side pin (either one) to ground - * the other side pin to +5V - * LED anode (long leg) attached to digital output 13 - * LED cathode (short leg) attached to ground - - * Note: because most Arduinos have a built-in LED attached - to pin 13 on the board, the LED is optional. - - - Created by David Cuartielles - modified 30 Aug 2011 - By Tom Igoe - - This example code is in the public domain. - - http://arduino.cc/en/Tutorial/AnalogInput - - */ - -int sensorPin = A0; // select the input pin for the potentiometer -int ledPin = 13; // select the pin for the LED -int sensorValue = 0; // variable to store the value coming from the sensor - -void setup() { - // declare the ledPin as an OUTPUT: - pinMode(ledPin, OUTPUT); -} - -void loop() { - // read the value from the sensor: - sensorValue = analogRead(sensorPin); - // turn the ledPin on - digitalWrite(ledPin, HIGH); - // stop the program for milliseconds: - delay(sensorValue); - // turn the ledPin off: - digitalWrite(ledPin, LOW); - // stop the program for for milliseconds: - delay(sensorValue); -} \ No newline at end of file diff --git a/build/linux/work/examples/03.Analog/AnalogWriteMega/AnalogWriteMega.ino b/build/linux/work/examples/03.Analog/AnalogWriteMega/AnalogWriteMega.ino deleted file mode 100644 index 04e50c86c..000000000 --- a/build/linux/work/examples/03.Analog/AnalogWriteMega/AnalogWriteMega.ino +++ /dev/null @@ -1,45 +0,0 @@ -/* - Mega analogWrite() test - - This sketch fades LEDs up and down one at a time on digital pins 2 through 13. - This sketch was written for the Arduino Mega, and will not work on previous boards. - - The circuit: - * LEDs attached from pins 2 through 13 to ground. - - created 8 Feb 2009 - by Tom Igoe - - This example code is in the public domain. - - */ -// These constants won't change. They're used to give names -// to the pins used: -const int lowestPin = 2; -const int highestPin = 13; - - -void setup() { - // set pins 2 through 13 as outputs: - for (int thisPin =lowestPin; thisPin <= highestPin; thisPin++) { - pinMode(thisPin, OUTPUT); - } -} - -void loop() { - // iterate over the pins: - for (int thisPin =lowestPin; thisPin <= highestPin; thisPin++) { - // fade the LED on thisPin from off to brightest: - for (int brightness = 0; brightness < 255; brightness++) { - analogWrite(thisPin, brightness); - delay(2); - } - // fade the LED on thisPin from brithstest to off: - for (int brightness = 255; brightness >= 0; brightness--) { - analogWrite(thisPin, brightness); - delay(2); - } - // pause between LEDs: - delay(100); - } -} diff --git a/build/linux/work/examples/03.Analog/Calibration/Calibration.ino b/build/linux/work/examples/03.Analog/Calibration/Calibration.ino deleted file mode 100644 index c3f88fdf0..000000000 --- a/build/linux/work/examples/03.Analog/Calibration/Calibration.ino +++ /dev/null @@ -1,75 +0,0 @@ -/* - Calibration - - Demonstrates one technique for calibrating sensor input. The - sensor readings during the first five seconds of the sketch - execution define the minimum and maximum of expected values - attached to the sensor pin. - - The sensor minimum and maximum initial values may seem backwards. - Initially, you set the minimum high and listen for anything - lower, saving it as the new minimum. Likewise, you set the - maximum low and listen for anything higher as the new maximum. - - The circuit: - * Analog sensor (potentiometer will do) attached to analog input 0 - * LED attached from digital pin 9 to ground - - created 29 Oct 2008 - By David A Mellis - modified 30 Aug 2011 - By Tom Igoe - - http://arduino.cc/en/Tutorial/Calibration - - This example code is in the public domain. - - */ - -// These constants won't change: -const int sensorPin = A0; // pin that the sensor is attached to -const int ledPin = 9; // pin that the LED is attached to - -// variables: -int sensorValue = 0; // the sensor value -int sensorMin = 1023; // minimum sensor value -int sensorMax = 0; // maximum sensor value - - -void setup() { - // turn on LED to signal the start of the calibration period: - pinMode(13, OUTPUT); - digitalWrite(13, HIGH); - - // calibrate during the first five seconds - while (millis() < 5000) { - sensorValue = analogRead(sensorPin); - - // record the maximum sensor value - if (sensorValue > sensorMax) { - sensorMax = sensorValue; - } - - // record the minimum sensor value - if (sensorValue < sensorMin) { - sensorMin = sensorValue; - } - } - - // signal the end of the calibration period - digitalWrite(13, LOW); -} - -void loop() { - // read the sensor: - sensorValue = analogRead(sensorPin); - - // apply the calibration to the sensor reading - sensorValue = map(sensorValue, sensorMin, sensorMax, 0, 255); - - // in case the sensor value is outside the range seen during calibration - sensorValue = constrain(sensorValue, 0, 255); - - // fade the LED using the calibrated value: - analogWrite(ledPin, sensorValue); -} diff --git a/build/linux/work/examples/03.Analog/Fading/Fading.ino b/build/linux/work/examples/03.Analog/Fading/Fading.ino deleted file mode 100644 index 858d3616c..000000000 --- a/build/linux/work/examples/03.Analog/Fading/Fading.ino +++ /dev/null @@ -1,45 +0,0 @@ -/* - Fading - - This example shows how to fade an LED using the analogWrite() function. - - The circuit: - * LED attached from digital pin 9 to ground. - - Created 1 Nov 2008 - By David A. Mellis - modified 30 Aug 2011 - By Tom Igoe - - http://arduino.cc/en/Tutorial/Fading - - This example code is in the public domain. - - */ - - -int ledPin = 9; // LED connected to digital pin 9 - -void setup() { - // nothing happens in setup -} - -void loop() { - // fade in from min to max in increments of 5 points: - for(int fadeValue = 0 ; fadeValue <= 255; fadeValue +=5) { - // sets the value (range from 0 to 255): - analogWrite(ledPin, fadeValue); - // wait for 30 milliseconds to see the dimming effect - delay(30); - } - - // fade out from max to min in increments of 5 points: - for(int fadeValue = 255 ; fadeValue >= 0; fadeValue -=5) { - // sets the value (range from 0 to 255): - analogWrite(ledPin, fadeValue); - // wait for 30 milliseconds to see the dimming effect - delay(30); - } -} - - diff --git a/build/linux/work/examples/03.Analog/Smoothing/Smoothing.ino b/build/linux/work/examples/03.Analog/Smoothing/Smoothing.ino deleted file mode 100644 index e33a0dd16..000000000 --- a/build/linux/work/examples/03.Analog/Smoothing/Smoothing.ino +++ /dev/null @@ -1,67 +0,0 @@ -/* - - Smoothing - - Reads repeatedly from an analog input, calculating a running average - and printing it to the computer. Keeps ten readings in an array and - continually averages them. - - The circuit: - * Analog sensor (potentiometer will do) attached to analog input 0 - - Created 22 April 2007 - modified 30 Aug 2011 - By David A. Mellis - - http://www.arduino.cc/en/Tutorial/Smoothing - - This example code is in the public domain. - - -*/ - - -// Define the number of samples to keep track of. The higher the number, -// the more the readings will be smoothed, but the slower the output will -// respond to the input. Using a constant rather than a normal variable lets -// use this value to determine the size of the readings array. -const int numReadings = 10; - -int readings[numReadings]; // the readings from the analog input -int index = 0; // the index of the current reading -int total = 0; // the running total -int average = 0; // the average - -int inputPin = A0; - -void setup() -{ - // initialize serial communication with computer: - Serial.begin(9600); - // initialize all the readings to 0: - for (int thisReading = 0; thisReading < numReadings; thisReading++) - readings[thisReading] = 0; -} - -void loop() { - // subtract the last reading: - total= total - readings[index]; - // read from the sensor: - readings[index] = analogRead(inputPin); - // add the reading to the total: - total= total + readings[index]; - // advance to the next position in the array: - index = index + 1; - - // if we're at the end of the array... - if (index >= numReadings) - // ...wrap around to the beginning: - index = 0; - - // calculate the average: - average = total / numReadings; - // send it to the computer as ASCII digits - Serial.println(average); -} - - diff --git a/build/linux/work/examples/04.Communication/ASCIITable/ASCIITable.ino b/build/linux/work/examples/04.Communication/ASCIITable/ASCIITable.ino deleted file mode 100644 index e993c2137..000000000 --- a/build/linux/work/examples/04.Communication/ASCIITable/ASCIITable.ino +++ /dev/null @@ -1,77 +0,0 @@ -/* - ASCII table - - Prints out byte values in all possible formats: - * as raw binary values - * as ASCII-encoded decimal, hex, octal, and binary values - - For more on ASCII, see http://www.asciitable.com and http://en.wikipedia.org/wiki/ASCII - - The circuit: No external hardware needed. - - created 2006 - by Nicholas Zambetti - modified 2 Apr 2012 - by Tom Igoe - - This example code is in the public domain. - - - - */ -void setup() { - //Initialize serial and wait for port to open: - Serial.begin(9600); - // this check is only needed on the Leonardo: - while (!Serial) ; - - // prints title with ending line break - Serial.println("ASCII Table ~ Character Map"); -} - -// first visible ASCIIcharacter '!' is number 33: -int thisByte = 33; -// you can also write ASCII characters in single quotes. -// for example. '!' is the same as 33, so you could also use this: -//int thisByte = '!'; - -void loop() { - // prints value unaltered, i.e. the raw binary version of the - // byte. The serial monitor interprets all bytes as - // ASCII, so 33, the first number, will show up as '!' - Serial.write(thisByte); - - Serial.print(", dec: "); - // prints value as string as an ASCII-encoded decimal (base 10). - // Decimal is the default format for Serial.print() and Serial.println(), - // so no modifier is needed: - Serial.print(thisByte); - // But you can declare the modifier for decimal if you want to. - //this also works if you uncomment it: - - // Serial.print(thisByte, DEC); - - - Serial.print(", hex: "); - // prints value as string in hexadecimal (base 16): - Serial.print(thisByte, HEX); - - Serial.print(", oct: "); - // prints value as string in octal (base 8); - Serial.print(thisByte, OCT); - - Serial.print(", bin: "); - // prints value as string in binary (base 2) - // also prints ending line break: - Serial.println(thisByte, BIN); - - // if printed last visible character '~' or 126, stop: - if(thisByte == 126) { // you could also use if (thisByte == '~') { - // This loop loops forever and does nothing - while(true) { - continue; - } - } - // go on to the next character - thisByte++; -} diff --git a/build/linux/work/examples/04.Communication/Dimmer/Dimmer.ino b/build/linux/work/examples/04.Communication/Dimmer/Dimmer.ino deleted file mode 100644 index 78849c2c9..000000000 --- a/build/linux/work/examples/04.Communication/Dimmer/Dimmer.ino +++ /dev/null @@ -1,112 +0,0 @@ -/* - Dimmer - - Demonstrates the sending data from the computer to the Arduino board, - in this case to control the brightness of an LED. The data is sent - in individual bytes, each of which ranges from 0 to 255. Arduino - reads these bytes and uses them to set the brightness of the LED. - - The circuit: - LED attached from digital pin 9 to ground. - Serial connection to Processing, Max/MSP, or another serial application - - created 2006 - by David A. Mellis - modified 30 Aug 2011 - by Tom Igoe and Scott Fitzgerald - - This example code is in the public domain. - - http://www.arduino.cc/en/Tutorial/Dimmer - - */ - -const int ledPin = 9; // the pin that the LED is attached to - -void setup() -{ - // initialize the serial communication: - Serial.begin(9600); - // initialize the ledPin as an output: - pinMode(ledPin, OUTPUT); -} - -void loop() { - byte brightness; - - // check if data has been sent from the computer: - if (Serial.available()) { - // read the most recent byte (which will be from 0 to 255): - brightness = Serial.read(); - // set the brightness of the LED: - analogWrite(ledPin, brightness); - } -} - -/* Processing code for this example - // Dimmer - sends bytes over a serial port - // by David A. Mellis - //This example code is in the public domain. - - import processing.serial.*; - Serial port; - - void setup() { - size(256, 150); - - println("Available serial ports:"); - println(Serial.list()); - - // Uses the first port in this list (number 0). Change this to - // select the port corresponding to your Arduino board. The last - // parameter (e.g. 9600) is the speed of the communication. It - // has to correspond to the value passed to Serial.begin() in your - // Arduino sketch. - port = new Serial(this, Serial.list()[0], 9600); - - // If you know the name of the port used by the Arduino board, you - // can specify it directly like this. - //port = new Serial(this, "COM1", 9600); - } - - void draw() { - // draw a gradient from black to white - for (int i = 0; i < 256; i++) { - stroke(i); - line(i, 0, i, 150); - } - - // write the current X-position of the mouse to the serial port as - // a single byte - port.write(mouseX); - } - */ - -/* Max/MSP v5 patch for this example - -----------begin_max5_patcher---------- -1008.3ocuXszaiaCD9r8uhA5rqAeHIa0aAMaAVf1S6hdoYQAsDiL6JQZHQ2M -YWr+2KeX4vjnjXKKkKhhiGQ9MeyCNz+X9rnMp63sQvuB+MLa1OlOalSjUvrC -ymEUytKuh05TKJWUWyk5nE9eSyuS6jesvHu4F4MxOuUzB6X57sPKWVzBLXiP -xZtGj6q2vafaaT0.BzJfjj.p8ZPukazsQvpfcpFs8mXR3plh8BoBxURIOWyK -rxspZ0YI.eTCEh5Vqp+wGtFXZMKe6CZc3yWZwTdCmYW.BBkdiby8v0r+ST.W -sD9SdUkn8FYspPbqvnBNFtZWiUyLmleJWo0vuKzeuj2vpJLaWA7YiE7wREui -FpDFDp1KcbAFcP5sJoVxp4NB5Jq40ougIDxJt1wo3GDZHiNocKhiIExx+owv -AdOEAksDs.RRrOoww1Arc.9RvN2J9tamwjkcqknvAE0l+8WnjHqreNet8whK -z6mukIK4d+Xknv3jstvJs8EirMMhxsZIusET25jXbX8xczIl5xPVxhPcTGFu -xNDu9rXtUCg37g9Q8Yc+EuofIYmg8QdkPCrOnXsaHwYs3rWx9PGsO+pqueG2 -uNQBqWFh1X7qQG+3.VHcHrfO1nyR2TlqpTM9MDsLKNCQVz6KO.+Sfc5j1Ykj -jzkn2jwNDRP7LVb3d9LtoWBAOnvB92Le6yRmZ4UF7YpQhiFi7A5Ka8zXhKdA -4r9TRGG7V4COiSbAJKdXrWNhhF0hNUh7uBa4Mba0l7JUK+omjDMwkSn95Izr -TOwkdp7W.oPRmNRQsiKeu4j3CkfVgt.NYPEYqMGvvJ48vIlPiyzrIuZskWIS -xGJPcmPiWOfLodybH3wjPbMYwlbFIMNHPHFOtLBNaLSa9sGk1TxMzCX5KTa6 -WIH2ocxSdngM0QPqFRxyPHFsprrhGc9Gy9xoBjz0NWdR2yW9DUa2F85jG2v9 -FgTO4Q8qiC7fzzQNpmNpsY3BrYPVJBMJQ1uVmoItRhw9NrVGO3NMNzYZ+zS7 -3WTvTOnUydG5kHMKLqAOjTe7fN2bGSxOZDkMrBrGQ9J1gONBEy0k4gVo8qHc -cxmfxVihWz6a3yqY9NazzUYkua9UnynadOtogW.JfsVGRVNEbWF8I+eHtcwJ -+wLXqZeSdWLo+FQF6731Tva0BISKTx.cLwmgJsUTTvkg1YsnXmxDge.CDR7x -D6YmX6fMznaF7kdczmJXwm.XSOOrdoHhNA7GMiZYLZZR.+4lconMaJP6JOZ8 -ftCs1YWHZI3o.sIXezX5ihMSuXzZtk3ai1mXRSczoCS32hAydeyXNEu5SHyS -xqZqbd3ZLdera1iPqYxOm++v7SUSz ------------end_max5_patcher----------- - */ diff --git a/build/linux/work/examples/04.Communication/Graph/Graph.ino b/build/linux/work/examples/04.Communication/Graph/Graph.ino deleted file mode 100644 index 92256ab00..000000000 --- a/build/linux/work/examples/04.Communication/Graph/Graph.ino +++ /dev/null @@ -1,149 +0,0 @@ -/* - Graph - - A simple example of communication from the Arduino board to the computer: - the value of analog input 0 is sent out the serial port. We call this "serial" - communication because the connection appears to both the Arduino and the - computer as a serial port, even though it may actually use - a USB cable. Bytes are sent one after another (serially) from the Arduino - to the computer. - - You can use the Arduino serial monitor to view the sent data, or it can - be read by Processing, PD, Max/MSP, or any other program capable of reading - data from a serial port. The Processing code below graphs the data received - so you can see the value of the analog input changing over time. - - The circuit: - Any analog input sensor is attached to analog in pin 0. - - created 2006 - by David A. Mellis - modified 30 Aug 2011 - by Tom Igoe and Scott Fitzgerald - - This example code is in the public domain. - - http://www.arduino.cc/en/Tutorial/Graph - */ - -void setup() { - // initialize the serial communication: - Serial.begin(9600); -} - -void loop() { - // send the value of analog input 0: - Serial.println(analogRead(A0)); - // wait a bit for the analog-to-digital converter - // to stabilize after the last reading: - delay(10); -} - -/* Processing code for this example - - // Graphing sketch - - - // This program takes ASCII-encoded strings - // from the serial port at 9600 baud and graphs them. It expects values in the - // range 0 to 1023, followed by a newline, or newline and carriage return - - // Created 20 Apr 2005 - // Updated 18 Jan 2008 - // by Tom Igoe - // This example code is in the public domain. - - import processing.serial.*; - - Serial myPort; // The serial port - int xPos = 1; // horizontal position of the graph - - void setup () { - // set the window size: - size(400, 300); - - // List all the available serial ports - println(Serial.list()); - // I know that the first port in the serial list on my mac - // is always my Arduino, so I open Serial.list()[0]. - // Open whatever port is the one you're using. - myPort = new Serial(this, Serial.list()[0], 9600); - // don't generate a serialEvent() unless you get a newline character: - myPort.bufferUntil('\n'); - // set inital background: - background(0); - } - void draw () { - // everything happens in the serialEvent() - } - - void serialEvent (Serial myPort) { - // get the ASCII string: - String inString = myPort.readStringUntil('\n'); - - if (inString != null) { - // trim off any whitespace: - inString = trim(inString); - // convert to an int and map to the screen height: - float inByte = float(inString); - inByte = map(inByte, 0, 1023, 0, height); - - // draw the line: - stroke(127,34,255); - line(xPos, height, xPos, height - inByte); - - // at the edge of the screen, go back to the beginning: - if (xPos >= width) { - xPos = 0; - background(0); - } - else { - // increment the horizontal position: - xPos++; - } - } - } - - */ - -/* Max/MSP v5 patch for this example - ----------begin_max5_patcher---------- -1591.3oc0YszbaaCD9r7uBL5RalQUAO3CvdyS5zVenWZxs5NcfHgjPCIfJIT -RTxj+6AOHkoTDooroUs0AQPR73a+1cwtK3WtZxzEpOwqlB9YveAlL4KWMYh6 -Q1GLo99ISKXeJMmU451zTUQAWpmNy+NM+SZ2y+sR1l02JuU9t0hJvFlNcMPy -dOuBv.U5Rgb0LPpRpYBooM3529latArTUVvzZdFPtsXAuDrrTU.f.sBffXxL -vGE50lIHkUVJXq3fRtdaoDvjYfbgjujaFJSCzq4.tLaN.bi1tJefWpqbO0uz -1IjIABoluxrJ1guxh2JfPO2B5zRNyBCLDFcqbwNvuv9fHCb8bvevyyEU2JKT -YhkBSWPAfq2TZ6YhqmuMUo0feUn+rYpY4YtY+cFw3lUJdCMYAapZqzwUHX8S -crjAd+SIOU6UBAwIygy.Q1+HAA1KH6EveWOFQlitUK92ehfal9kFhUxJ3tWc -sgpxadigWExbt1o7Ps5dk3yttivyg20W0VcSmg1G90qtx92rAZbH4ez.ruy1 -nhmaDPidE07J+5n2sg6E6oKXxUSmc20o6E3SPRDbrkXnPGUYE.i5nCNB9TxQ -jG.G0kCTZtH88f07Rt0ZMMWUw8VvbKVAaTk6GyoraPdZff7rQTejBN54lgyv -HE0Ft7AvIvvgvIwO23jBdUkYOuSvIFSiNcjFhiSsUBwsUCh1AgfNSBAeNDBZ -DIDqY.f8.YjfjV1HAn9XDTxyNFYatVTkKx3kcK9GraZpI5jv7GOx+Z37Xh82 -LSKHIDmDXaESoXRngIZQDKVkpxUkMCyXCQhcCK1z.G457gi3TzMz4RFD515F -G3bIQQwcP3SOF0zlkGhiCBQ1kOHHFFlXaEBQIQnCwv9QF1LxPZ.A4jR5cyQs -vbvHMJsLll01We+rE2LazX6zYmCraRrsPFwKg1ANBZFY.IAihr8Ox.aH0oAL -hB8nQVw0FSJiZeunOykbT6t3r.NP8.iL+bnwNiXuVMNJH9H9YCm89CFXPBER -bz422p8.O4dg6kRxdyjDqRwMIHTbT3QFLskxJ8tbmQK4tm0XGeZWF7wKKtYY -aTAF.XPNFaaQBinQMJ4QLF0aNHF0JtYuHSxoUZfZY6.UU2ejJTb8lQw8Fo5k -Rv6e2PI+fOM71o2ecY1VgTYdCSxxUqLokuYq9jYJi6lxPgD2NIPePLB0mwbG -YA9Rgxdiu1k5xiLlSU6JVnx6wzg3sYHwTesB8Z5D7RiGZpXyvDNJY.DQX3.H -hvmcUN4bP1yCkhpTle2P37jtBsKrLWcMScEmltOPv22ZfAqQAdKr9HzATQwZ -q18PrUGt6Tst2XMCRUfGuhXs6ccn23YloomMqcTiC5iMGPsHsHRWhWFlaenV -XcqwgCQiGGJzptyS2ZMODBz6fGza0bzmXBj7+DA94bvpR01MffAlueO7HwcI -pWCwmzJdvi9ILgflLAFmyXB6O7ML0YbD26lenmcGxjVsZUN+A6pUK7AtTrPg -M+eRYG0qD9j4I7eEbco8Xh6WcO.or9XDC6UCiewbXHkh6xm5LiPEkzpJDRTu -mEB44Fgz4NCtJvX.SM1vo2SlTCZGAe7GZu6ahdRyzFOhYZ+mbVVSYptBw.K1 -tboIkatIA7c1cTKD1u.honLYV04VkluHsXe0szv9pQCE9Ro3jaVB1o15pz2X -zYoBvO5KXCAe0LCYJybE8ZODf4fV8t9qW0zYxq.YJfTosj1bv0xc.SaC0+AV -9V9L.KKyV3SyTcRtmzi6rO.O16USvts4B5xe9EymDvebK0eMfW6+NIsNlE2m -eqRyJ0utRq13+RjmqYKN1e.4d61jjdsauXe3.2p6jgi9hsNIv97CoyJ01xzl -c3ZhUCtSHx3UZgjoEJYqNY+hYs5zZQVFW19L3JDYaTlMLqAAt1G2yXlnFg9a -53L1FJVcv.cOX0dh7mCVGCLce7GFcQwDdH5Ta3nyAS0pQbHxegr+tGIZORgM -RnMj5vGl1Fs16drnk7Tf1XOLgv1n0d2iEsCxR.eQsNOZ4FGF7whofgfI3kES -1kCeOX5L2rifbdu0A9ae2X.V33B1Z+.Bj1FrP5iFrCYCG5EUWSG.hhunHJd. -HJ5hhnng3h9HPj4lud02.1bxGw. ------------end_max5_patcher----------- - - */ diff --git a/build/linux/work/examples/04.Communication/MIDI/Midi.ino b/build/linux/work/examples/04.Communication/MIDI/Midi.ino deleted file mode 100644 index a10548673..000000000 --- a/build/linux/work/examples/04.Communication/MIDI/Midi.ino +++ /dev/null @@ -1,49 +0,0 @@ -/* - MIDI note player - - This sketch shows how to use the serial transmit pin (pin 1) to send MIDI note data. - If this circuit is connected to a MIDI synth, it will play - the notes F#-0 (0x1E) to F#-5 (0x5A) in sequence. - - - The circuit: - * digital in 1 connected to MIDI jack pin 5 - * MIDI jack pin 2 connected to ground - * MIDI jack pin 4 connected to +5V through 220-ohm resistor - Attach a MIDI cable to the jack, then to a MIDI synth, and play music. - - created 13 Jun 2006 - modified 30 Aug 2011 - by Tom Igoe - - This example code is in the public domain. - - http://www.arduino.cc/en/Tutorial/MIDI - - */ - -void setup() { - // Set MIDI baud rate: - Serial.begin(31250); -} - -void loop() { - // play notes from F#-0 (0x1E) to F#-5 (0x5A): - for (int note = 0x1E; note < 0x5A; note ++) { - //Note on channel 1 (0x90), some note value (note), middle velocity (0x45): - noteOn(0x90, note, 0x45); - delay(100); - //Note on channel 1 (0x90), some note value (note), silent velocity (0x00): - noteOn(0x90, note, 0x00); - delay(100); - } -} - -// plays a MIDI note. Doesn't check to see that -// cmd is greater than 127, or that data values are less than 127: -void noteOn(int cmd, int pitch, int velocity) { - Serial.write(cmd); - Serial.write(pitch); - Serial.write(velocity); -} - diff --git a/build/linux/work/examples/04.Communication/MultiSerialMega/MultiSerialMega.ino b/build/linux/work/examples/04.Communication/MultiSerialMega/MultiSerialMega.ino deleted file mode 100644 index 684e305bb..000000000 --- a/build/linux/work/examples/04.Communication/MultiSerialMega/MultiSerialMega.ino +++ /dev/null @@ -1,33 +0,0 @@ -/* - Mega multple serial test - - Receives from the main serial port, sends to the others. - Receives from serial port 1, sends to the main serial (Serial 0). - - This example works only on the Arduino Mega - - The circuit: - * Any serial device attached to Serial port 1 - * Serial monitor open on Serial port 0: - - created 30 Dec. 2008 - by Tom Igoe - - This example code is in the public domain. - - */ - - -void setup() { - // initialize both serial ports: - Serial.begin(9600); - Serial1.begin(9600); -} - -void loop() { - // read from port 1, send to port 0: - if (Serial1.available()) { - int inByte = Serial1.read(); - Serial.write(inByte); - } -} diff --git a/build/linux/work/examples/04.Communication/PhysicalPixel/PhysicalPixel.ino b/build/linux/work/examples/04.Communication/PhysicalPixel/PhysicalPixel.ino deleted file mode 100644 index 7ac8231a6..000000000 --- a/build/linux/work/examples/04.Communication/PhysicalPixel/PhysicalPixel.ino +++ /dev/null @@ -1,170 +0,0 @@ -/* - Physical Pixel - - An example of using the Arduino board to receive data from the - computer. In this case, the Arduino boards turns on an LED when - it receives the character 'H', and turns off the LED when it - receives the character 'L'. - - The data can be sent from the Arduino serial monitor, or another - program like Processing (see code below), Flash (via a serial-net - proxy), PD, or Max/MSP. - - The circuit: - * LED connected from digital pin 13 to ground - - created 2006 - by David A. Mellis - modified 30 Aug 2011 - by Tom Igoe and Scott Fitzgerald - - This example code is in the public domain. - - http://www.arduino.cc/en/Tutorial/PhysicalPixel - */ - -const int ledPin = 13; // the pin that the LED is attached to -int incomingByte; // a variable to read incoming serial data into - -void setup() { - // initialize serial communication: - Serial.begin(9600); - // initialize the LED pin as an output: - pinMode(ledPin, OUTPUT); -} - -void loop() { - // see if there's incoming serial data: - if (Serial.available() > 0) { - // read the oldest byte in the serial buffer: - incomingByte = Serial.read(); - // if it's a capital H (ASCII 72), turn on the LED: - if (incomingByte == 'H') { - digitalWrite(ledPin, HIGH); - } - // if it's an L (ASCII 76) turn off the LED: - if (incomingByte == 'L') { - digitalWrite(ledPin, LOW); - } - } -} - -/* Processing code for this example - - // mouseover serial - - // Demonstrates how to send data to the Arduino I/O board, in order to - // turn ON a light if the mouse is over a square and turn it off - // if the mouse is not. - - // created 2003-4 - // based on examples by Casey Reas and Hernando Barragan - // modified 30 Aug 2011 - // by Tom Igoe - // This example code is in the public domain. - - - - import processing.serial.*; - - float boxX; - float boxY; - int boxSize = 20; - boolean mouseOverBox = false; - - Serial port; - - void setup() { - size(200, 200); - boxX = width/2.0; - boxY = height/2.0; - rectMode(RADIUS); - - // List all the available serial ports in the output pane. - // You will need to choose the port that the Arduino board is - // connected to from this list. The first port in the list is - // port #0 and the third port in the list is port #2. - println(Serial.list()); - - // Open the port that the Arduino board is connected to (in this case #0) - // Make sure to open the port at the same speed Arduino is using (9600bps) - port = new Serial(this, Serial.list()[0], 9600); - - } - - void draw() - { - background(0); - - // Test if the cursor is over the box - if (mouseX > boxX-boxSize && mouseX < boxX+boxSize && - mouseY > boxY-boxSize && mouseY < boxY+boxSize) { - mouseOverBox = true; - // draw a line around the box and change its color: - stroke(255); - fill(153); - // send an 'H' to indicate mouse is over square: - port.write('H'); - } - else { - // return the box to it's inactive state: - stroke(153); - fill(153); - // send an 'L' to turn the LED off: - port.write('L'); - mouseOverBox = false; - } - - // Draw the box - rect(boxX, boxY, boxSize, boxSize); - } - - - */ - -/* -Max/MSP version 5 patch to run with this example: - -----------begin_max5_patcher---------- -1672.3oc2ZszaaiCD9ryuBBebQVCQRYao8xhf1cQCPVfBzh8RRQ.sDsM2HSZ -HQmlzh9eu7gjsjsEk7y0oWjiHoHm4aluYHGlueUmtiDuPy5B9Cv8fNc99Uc5 -XZR2Pm726zcF4knDRlYXciDylQ4xtWa6SReQZZ+iSeMiEQR.ej8BM4A9C7OO -kkAlSjQSAYTdbFfvA27o2c6sfO.Doqd6NfXgDHmRUCKkolg4hT06BfbQJGH3 -5Qd2e8d.QJIQSow5tzebZ7BFW.FIHow8.2JAQpVIIYByxo9KIMkSjL9D0BRT -sbGHZJIkDoZOSMuQT.8YZ5qpgGI3locF4IpQRzq2nDF+odZMIJkRjpEF44M3 -A9nWAum7LKFbSOv+PSRXYOvmIhYiYpg.8A2LOUOxPyH+TjPJA+MS9sIzTRRr -QP9rXF31IBZAHpVHkHrfaPRHLuUCzoj9GSoQRqIB52y6Z.tu8o4EX+fddfuj -+MrXiwPL5+9cXwrOVvkbxLpomazHbQO7EyX7DpzXYgkFdF6algCQpkX4XUlo -hA6oa7GWck9w0Gnmy6RXQOoQeCfWwlzsdnHLTq8n9PCHLv7Cxa6PAN3RCKjh -ISRVZ+sSl704Tqt0kocE9R8J+P+RJOZ4ysp6gN0vppBbOTEN8qp0YCq5bq47 -PUwfA5e766z7NbGMuncw7VgNRSyQhbnPMGrDsGaFSvKM5NcWoIVdZn44.eOi -9DTRUT.7jDQzSTiF4UzXLc7tLGh4T9pwaFQkGUGIiOOkpBSJUwGsBd40krHQ -9XEvwq2V6eLIhV6GuzP7uzzXBmzsXPSRYwBtVLp7s5lKVv6UN2VW7xRtYDbx -7s7wRgHYDI8YVFaTBshkP49R3rYpH3RlUhTQmK5jMadJyF3cYaTNQMGSyhRE -IIUlJaOOukdhoOyhnekEKmZlqU3UkLrk7bpPrpztKBVUR1uorLddk6xIOqNt -lBOroRrNVFJGLrDxudpET4kzkstNp2lzuUHVMgk5TDZx9GWumnoQTbhXsEtF -tzCcM+z0QKXsngCUtTOEIN0SX2iHTTIIz968.Kf.uhfzUCUuAd3UKd.OKt.N -HTynxTQyjpQD9jlwEXeKQxfHCBahUge6RprSa2V4m3aYOMyaP6gah2Yf1zbD -jVwZVGFZHHxINFxpjr5CiTS9JiZn6e6nTlXQZTAFj6QCppQwzL0AxVtoi6WE -QXsANkEGWMEuwNvhmKTnat7A9RqLq6pXuEwY6xM5xRraoTiurj51J1vKLzFs -CvM7HI14Mpje6YRxHOSieTsJpvJORjxT1nERK6s7YTN7sr6rylNwf5zMiHI4 -meZ4rTYt2PpVettZERbjJ6PjfqN2loPSrUcusH01CegsGEE5467rnCdqT1ES -QxtCvFq.cvGz+BaAHXKzRSfP+2Jf.KCvj5ZLJRAhwi+SWHvPyN3vXiaPn6JR -3eoA.0TkFhTvpsDMIrL20nAkCI4EoYfSHAuiPBdmJRyd.IynYYjIzMvjOTKf -3DLvnvRLDLpWeEOYXMfAZqfQ0.qsnlUdmA33t8CNJ7MZEb.u7fiZHLYzDkJp -R7CqEVLGN75U+1JXxFUY.xEEBcRCqhOEkz2bENEWnh4pbh0wY25EefbD6EmW -UA6Ip8wFLyuFXx+Wrp8m6iff1B86W7bqJO9+mx8er4E3.abCLrYdA16sBuHx -vKT6BlpIGQIhL55W7oicf3ayv3ixQCm4aQuY1HZUPQWY+cASx2WZ3f1fICuz -vj5R5ZbM1y8gXYN4dIXaYGq4NhQvS5MmcDADy+S.j8CQ78vk7Q7gtPDX3kFh -3NGaAsYBUAO.8N1U4WKycxbQdrWxJdXd10gNIO+hkUMmm.CZwknu7JbNUYUq -0sOsTsI1QudDtjw0t+xZ85wWZd80tMCiiMADNX4UzrcSeK23su87IANqmA7j -tiRzoXi2YRh67ldAk79gPmTe3YKuoY0qdEDV3X8xylCJMTN45JIakB7uY8XW -uVr3PO8wWwEoTW8lsfraX7ZqzZDDXCRqNkztHsGCYpIDDAOqxDpMVUMKcOrp -942acPvx2NPocMC1wQZ8glRn3myTykVaEUNLoEeJjVaAevA4EAZnsNgkeyO+ -3rEZB7f0DTazDcQTNmdt8aACGi1QOWnMmd+.6YjMHH19OB5gKsMF877x8wsJ -hN97JSnSfLUXGUoj6ujWXd6Pk1SAC+Pkogm.tZ.1lX1qL.pe6PE11DPeMMZ2 -.P0K+3peBt3NskC ------------end_max5_patcher----------- - - - */ diff --git a/build/linux/work/examples/04.Communication/SerialCallResponse/SerialCallResponse.ino b/build/linux/work/examples/04.Communication/SerialCallResponse/SerialCallResponse.ino deleted file mode 100644 index e15031e8b..000000000 --- a/build/linux/work/examples/04.Communication/SerialCallResponse/SerialCallResponse.ino +++ /dev/null @@ -1,211 +0,0 @@ -/* - Serial Call and Response - Language: Wiring/Arduino - - This program sends an ASCII A (byte of value 65) on startup - and repeats that until it gets some data in. - Then it waits for a byte in the serial port, and - sends three sensor values whenever it gets a byte in. - - Thanks to Greg Shakar and Scott Fitzgerald for the improvements - - The circuit: - * potentiometers attached to analog inputs 0 and 1 - * pushbutton attached to digital I/O 2 - - Created 26 Sept. 2005 - by Tom Igoe - modified 30 Aug 2011 - by Tom Igoe and Scott Fitzgerald - - This example code is in the public domain. - - http://www.arduino.cc/en/Tutorial/SerialCallResponse - - */ - -int firstSensor = 0; // first analog sensor -int secondSensor = 0; // second analog sensor -int thirdSensor = 0; // digital sensor -int inByte = 0; // incoming serial byte - -void setup() -{ - // start serial port at 9600 bps: - Serial.begin(9600); - pinMode(2, INPUT); // digital sensor is on digital pin 2 - establishContact(); // send a byte to establish contact until receiver responds -} - -void loop() -{ - // if we get a valid byte, read analog ins: - if (Serial.available() > 0) { - // get incoming byte: - inByte = Serial.read(); - // read first analog input, divide by 4 to make the range 0-255: - firstSensor = analogRead(A0)/4; - // delay 10ms to let the ADC recover: - delay(10); - // read second analog input, divide by 4 to make the range 0-255: - secondSensor = analogRead(1)/4; - // read switch, map it to 0 or 255L - thirdSensor = map(digitalRead(2), 0, 1, 0, 255); - // send sensor values: - Serial.write(firstSensor); - Serial.write(secondSensor); - Serial.write(thirdSensor); - } -} - -void establishContact() { - while (Serial.available() <= 0) { - Serial.print('A'); // send a capital A - delay(300); - } -} - -/* -Processing sketch to run with this example: - -// This example code is in the public domain. - -import processing.serial.*; - -int bgcolor; // Background color -int fgcolor; // Fill color -Serial myPort; // The serial port -int[] serialInArray = new int[3]; // Where we'll put what we receive -int serialCount = 0; // A count of how many bytes we receive -int xpos, ypos; // Starting position of the ball -boolean firstContact = false; // Whether we've heard from the microcontroller - -void setup() { - size(256, 256); // Stage size - noStroke(); // No border on the next thing drawn - - // Set the starting position of the ball (middle of the stage) - xpos = width/2; - ypos = height/2; - - // Print a list of the serial ports, for debugging purposes: - println(Serial.list()); - - // I know that the first port in the serial list on my mac - // is always my FTDI adaptor, so I open Serial.list()[0]. - // On Windows machines, this generally opens COM1. - // Open whatever port is the one you're using. - String portName = Serial.list()[0]; - myPort = new Serial(this, portName, 9600); -} - -void draw() { - background(bgcolor); - fill(fgcolor); - // Draw the shape - ellipse(xpos, ypos, 20, 20); -} - -void serialEvent(Serial myPort) { - // read a byte from the serial port: - int inByte = myPort.read(); - // if this is the first byte received, and it's an A, - // clear the serial buffer and note that you've - // had first contact from the microcontroller. - // Otherwise, add the incoming byte to the array: - if (firstContact == false) { - if (inByte == 'A') { - myPort.clear(); // clear the serial port buffer - firstContact = true; // you've had first contact from the microcontroller - myPort.write('A'); // ask for more - } - } - else { - // Add the latest byte from the serial port to array: - serialInArray[serialCount] = inByte; - serialCount++; - - // If we have 3 bytes: - if (serialCount > 2 ) { - xpos = serialInArray[0]; - ypos = serialInArray[1]; - fgcolor = serialInArray[2]; - - // print the values (for debugging purposes only): - println(xpos + "\t" + ypos + "\t" + fgcolor); - - // Send a capital A to request new sensor readings: - myPort.write('A'); - // Reset serialCount: - serialCount = 0; - } - } -} -*/ - -/* -Max/MSP version 5 patch to run with this example: - -----------begin_max5_patcher---------- -2569.3oc2as0jiZqD9YO+Jzw09PRc75BIAX671TaUop8gy4gLoNmG1YqsjAY -rxhAGPLW1T4+dZIAd.aCFeiEuYqXFABQqu9qa0Rp0ec2fgyiegmND8KnOgFL -3utav.8sT2XPd4ACWwdwKjkpq1vU7zTV.e3Hyyj7Wj5665Tbq3LYHWJecM2z -tCGh9b9iVyjdKEQAeIg6IMOkRmM1ZDx10UcgRF6LBgmN1Zy6H70se77+38yJ -9DKhijQrU5Ovv6SDrvhmDksRDAedsvRJU8Tw2zUGSfuyl5ZjUckwpa922cm5 -mQsDLh3OCx0NXQJODgqENlyhBFNpkvBchFVzfCwZ+vh60DVHm.r3EuZEORtC -t7.WISnOvBCe+uwSWGGkxQnGidL5AdjeJhgl+pjifuNRtjiRMUecbhbDhE4i -R3LnVTcsRQhnwHzCfXhVDmvChyfZ3EGFmLB8x53Tyq7J7Wn3EPS6IR7B4nrT -.n0M+SrvLnYR3xrjHtOZQR7ps+tiMh2+MVx+EzuuTjhz5JDzSy.KAn5Lir5y -eR3AhdjtTL7SBB5SpO8VMIBZjfXsPDC2GpCCojIP1L89EFIC45f9o6e3Ce7i -n6+YUCmJYIxr0iA4.ZvuxUxwyLgo+ajDUCLR8AizsLfnQn7l.8LbW9SfXIjv -qAZdzJ.1P9LIartS5AvqDvArM590I.ayZ1iQyeE8fWrTh9Ug7aA7DVnuFW+c -.q9XP7F+.ghHtGnBzJZLtdhsskshK6PLV85BXmZL3cNRlM9XX1VWPlsLQD.n -C5m.Mwmje9mUpDOE4RDrT99P9BIPMidBdUAP5AV08ggFdSB6YEWPgoqShg2Q -yOeV.OeIa8ZPSNmq32n+C6Efq9m.kETcfimb96Xz+WotkJtYgTrPjvA9Onn2 -gE.bNV5WQ2m3mIhh0LmRs0d0lz5UlDiWJGKGs1jXtTixz8lQalvEQBIHVvGM -UqlBXJONOqQZi2BvfjosuWrWPiTOngmXo8oatfoZPiZWCnYeq.ZdK4desvWD -GXYdBQtmLvk1iCu+wgJ12bdfHBLF.QNyioLGTVCKjJGSFPW8vUYQBySUtKWw -70t0f+bdXr2WQoKy.i.+3miNZJqsqA8czvNgRajxR6aneMQbrF.XkqDMzaFo -6wgmV.YDrNjCWaC.4psvwypAfH6Ef9e7DeVDauPDcePjUcAkUVN4I4.SNx.s -gHTMjVJvSJU6ACeq23nGfYlsoKYYT1khiBv6.Ekhq6SVE2zmu3XZiXvO8a0W -WiJ+Tslhn0f+YvFRSv296xxBkeY+fS0muf4wq8kqQULXXPhvONRIFUdW0sK9 -f.Gvn6cJK45ZDwVumWVFGGNmk7jHULOjWQS.rYVjXE39TJLRDDWQwCEqVmHL -VratGOhAswxTuj3vvJMk4IOsmmXB95YgubotsdCupL8lRLmJ1YUteiS2opQ2 -hjf4.H4T7+kqT81b0Fw+DGSrPZRyro5Bk7Kssom8jxeuZ8OUa3+6ZDhG6LyA -OcR0Wb6oHMnvok4OFcs.VK0+NOHkjCoF5ryrCBot2zPZkwF1cFoJVZy.ZwLS -2YFp0xYsLwvXtXlBOA2..6TK.ukep5FYsgQW2C5R6FzcMChIw5RvXMF+4DV7 -TqCBnzSFPsOE.sinq+afR0HPpG03PV+UHm1GFKImLVR9QGKycj1ZnDe6BkMM -vDDVMKYDZMCvrXXtMn2gQuifdGE8N6KhgewExAGpx5ldnJs7b1rRmIpUKNmN -taHqauXRSqETZfYU5IEy7U0fC6cfAlT137vnwrenQCp0QgFtV8Tzv74FdfQ5 -HSGSg+y1dj9uaWWF2pXs1ZIKNht7aScTs1L0LKLcuQ878iEowYIdE58h.dPU -6S97ToHZybo+zaNH2phKE99Um4pFtE9qiAJUt.h9bqzdGsb6zV41s+I231H2 -S5WxMts3shPQ5OxM4XjaZuQtUCt1d415FTtw8K4d1wf23aP4lzqvaWq1J2N8 -K+fsUtc6W768LL3sgbO46gbmeSnCX1tjT1Sb+u.eFHDwuvjxDw7LoIDrxaex -4uaBM9vCsYFAgwyYg4asylVoRauiTscac2aHwkYmzrpcWyJOsi8NkCb995N8 -sLYptT1wYxMRpL8udeCYxzAQjolDBf51BDw4FAQToB.LfJ9DS2MCjju8ylcV -rVHwtuAIx3ffP9YyGLoKhY8JpsySabC1u1pWqSS8hM6RrcqTuV2PoyXCo2Y6 -xmwbduYKMroMAL1S6aIzXnmesc+PQpT08KtpLBF0xbrXV9pz3t4x9vC5rivT -v9xo2kpTPLrQq8Qsydvwjze1js23fJcSmiNWRveuxj0mXga7OsuEl1jTWtlt -sIGdqqaiut85SJIixVMmmbHEu1tuIkus6jRnfiaiJ+aJcOoAcusILPWyfbGP -2Os+o7anaianaSlRZc2lX8CKmmZWFFZlySH8OR+EBFJFfKGFbZDF5g190LhX -Vzao5wgvnRWZAR4XxF37zsrVnZ10EpnWNn5agnfj3r0HZ8QR2xnGrMAMNA23 -.HG+3njuSrHHdZnKBbnCeFgZWr0XSbU4YgEooXqoVWyLZldIym7PAXpsjmvU -oMtWXbJe6iRSCCGQMo4MYlgzX03Anh3dyjj8U.EUh3dLXxz7T51oMXxj9FlT -2IOTSMNwUiI2xwvRn6jfnU.Dbea550AH5SYF6TONl1k3H13lPDbu67XVmYyG -pX1DvA3Aolut5joTx1Isov5yWzJCIgXMoQim9lsyYtvcDhwzHOPNRwu6kUf+ -9rvc+4JtLI9sjcrlAUaQ2rXfTmlTwXxMi6.8Yr3z7FjuBlFRuYY7q0a.8lY4 -L0F7LzLWKqyZ0sx4KTrloLswU6EeUOHeWx02323L+Buhhn0YRz7rEKTmm4m3 -IuBFXnUhPv6I2KNxO8nO8iTy4IKeo.sZ5vOhuYNwnlAXTGna0gztokIwrj.X -WCLfabXDbmECl9qWMO8Lvw16+cNnry9dWIsNpYKuUl.kpzNa2892p6czPsUj -bnsPlbONQhByHUkxwTr5B0d5lRmov51BYcVmBeTbKDIpS2JSUxFwZjIxrtWl -tzTehEUwrbLqlH1rP5UKkmgyDplCpKctFLSZQOYKqpCawfmYRR+7oXYuoz4h -6VsQZmzstbZCWvw9z74XN+h1NlSrdkRTmxnqtTW37zoas9IsxgNoakIRakIb -24QpshDoyDI21.Szt0w8V1g0jNmS6TYBa2VGHGAcpXHByvG1jYaJ0INIrNM2 -cj7kmjtozYJsaoJuLCuctHXaFDaqHw5GbPqN0klNltCF3WG65uMy4gP6dYhb -H9T2RmZ07HNRmD4tzv4KbOAuozkHpxCQzvc7LLZiSBR25jffuBy5IWORw5KE -CagO+YWiuFKOA0VOzDY5zRRqtz4Jszqgz5ZjVWqxRqpTWXei6VWyXx0d4nfB -+8c+C81VE7B ------------end_max5_patcher----------- - - -*/ diff --git a/build/linux/work/examples/04.Communication/SerialCallResponseASCII/SerialCallResponseASCII.ino b/build/linux/work/examples/04.Communication/SerialCallResponseASCII/SerialCallResponseASCII.ino deleted file mode 100644 index 2c4f3cd88..000000000 --- a/build/linux/work/examples/04.Communication/SerialCallResponseASCII/SerialCallResponseASCII.ino +++ /dev/null @@ -1,228 +0,0 @@ -/* - Serial Call and Response in ASCII - Language: Wiring/Arduino - - This program sends an ASCII A (byte of value 65) on startup - and repeats that until it gets some data in. - Then it waits for a byte in the serial port, and - sends three ASCII-encoded, comma-separated sensor values, - truncated by a linefeed and carriage return, - whenever it gets a byte in. - - Thanks to Greg Shakar and Scott Fitzgerald for the improvements - - The circuit: - * potentiometers attached to analog inputs 0 and 1 - * pushbutton attached to digital I/O 2 - - - - Created 26 Sept. 2005 - by Tom Igoe - modified 2 Apr 2012 - by Tom Igoe and Scott Fitzgerald - - This example code is in the public domain. - - http://www.arduino.cc/en/Tutorial/SerialCallResponseASCII - - */ - -int firstSensor = 0; // first analog sensor -int secondSensor = 0; // second analog sensor -int thirdSensor = 0; // digital sensor -int inByte = 0; // incoming serial byte - -void setup() -{ - // start serial port at 9600 bps and wait for port to open: - Serial.begin(9600); - // this check is only needed on the Leonardo: - while (!Serial) ; - ; - - pinMode(2, INPUT); // digital sensor is on digital pin 2 - establishContact(); // send a byte to establish contact until receiver responds -} - -void loop() -{ - // if we get a valid byte, read analog ins: - if (Serial.available() > 0) { - // get incoming byte: - inByte = Serial.read(); - // read first analog input: - firstSensor = analogRead(A0); - // read second analog input: - secondSensor = analogRead(A1); - // read switch, map it to 0 or 255L - thirdSensor = map(digitalRead(2), 0, 1, 0, 255); - // send sensor values: - Serial.print(firstSensor); - Serial.print(","); - Serial.print(secondSensor); - Serial.print(","); - Serial.println(thirdSensor); - } -} - -void establishContact() { - while (Serial.available() <= 0) { - Serial.println("0,0,0"); // send an initial string - delay(300); - } -} - - -/* -Processing code to run with this example: - -// This example code is in the public domain. - -import processing.serial.*; // import the Processing serial library -Serial myPort; // The serial port - -float bgcolor; // Background color -float fgcolor; // Fill color -float xpos, ypos; // Starting position of the ball - -void setup() { - size(640,480); - - // List all the available serial ports - println(Serial.list()); - - // I know that the first port in the serial list on my mac - // is always my Arduino module, so I open Serial.list()[0]. - // Change the 0 to the appropriate number of the serial port - // that your microcontroller is attached to. - myPort = new Serial(this, Serial.list()[0], 9600); - - // read bytes into a buffer until you get a linefeed (ASCII 10): - myPort.bufferUntil('\n'); - - // draw with smooth edges: - smooth(); -} - -void draw() { - background(bgcolor); - fill(fgcolor); - // Draw the shape - ellipse(xpos, ypos, 20, 20); -} - -// serialEvent method is run automatically by the Processing applet -// whenever the buffer reaches the byte value set in the bufferUntil() -// method in the setup(): - -void serialEvent(Serial myPort) { - // read the serial buffer: - String myString = myPort.readStringUntil('\n'); - // if you got any bytes other than the linefeed: - myString = trim(myString); - - // split the string at the commas - // and convert the sections into integers: - int sensors[] = int(split(myString, ',')); - - // print out the values you got: - for (int sensorNum = 0; sensorNum < sensors.length; sensorNum++) { - print("Sensor " + sensorNum + ": " + sensors[sensorNum] + "\t"); - } - // add a linefeed after all the sensor values are printed: - println(); - if (sensors.length > 1) { - xpos = map(sensors[0], 0,1023,0,width); - ypos = map(sensors[1], 0,1023,0,height); - fgcolor = sensors[2]; - } - // send a byte to ask for more data: - myPort.write("A"); - } - -*/ - -/* - -Max/MSP version 5 patch to run with this example: - -----------begin_max5_patcher---------- -3365.3oc4bk0iiaiD9Y2+J3JLOrAq6Fhj5LOscRP.lGxtCxDr6CYBFHaQaqL -xRNRzcOcBx+8s3grkZac31Vr8jMASKScPU7qNXUTUw+3lIVyx+LqzB80neFM -YxebyjIxSINwDc6IVqi977znR4sYMOe8ZVF2Zp5Zb1m4pyuJOujghPkrhjnT -zl7BNZQQ9ZDeURIBdlsUOyh7LdYxuyDOGlbms9zYaWmjkx3x2Cd+Iy2xqNa0 -stIhOeUR1xOVvlyUTuuqOzSHRfs7fspEz.8K5GJIVRn4y90ao90okrn0RZw5 -dAkaItvedyMh+LcffRF6QnaO.SzPQnmsM5eFskmmugkgrOebfzNNPbbDibJU -hCXG2tvArSEsn5b9SaXptwJQviQVV6drKCRslUVFsjcn3SJH8bJ.C4n.Ctcf -gRjhDTaO4gPI7DbbbgfaEWtz.RKhNR7XVT1xSASrOYLITJrfUG75VVwqULQR -mlAWRyihOUXAepvhiGsNrX2ErPbtFfkMELvzRrzp6nBM9Dk5CUJq3G1IzDXL -snsuz4WR3r054+rduzb86jPHxZp3OyxyWK92seS5VFX+lu5128c2e6s3c2w9 -K7C4wr0G47hG38OkMe2k99jB12m9zsgem+2b66e261CFMYCz1YCdJ7WaLiX2 -oHJE2qU9FV5EWWiIlU5MZi3vnJ+pANhxagvfNwMxq8r.bz7TVTw3pQqkgHRa -dNzNQDZqHhhPMCr.JsEFQJQgIjt8kz40VJo.dwrKjoeRufBNTZrwizInztyB -igWks.LhvOJeBLfmd4jVlmmlWnFJXABXeWPnMNzS7Ka8uv0.ki4htxQK2.0b -nNcAj9u1BWI77nSA8nlB8TBfNdcgdAcNwmY.veOEsDzP2b9A2P5GTTg031oQ -bmqAUyRVJP7HrMBSOekyN7ThXqfDao7le2g3X2su7S2ezTwE64NtAE6Js93D -HQGJ4N21CJN701TDHyfvipZTEb3JssP6z1hWuxJWZXoskdSE2B5aiRSu8GYk -axyJYn6e+2912h9P1GxdO3ScIJBM6IvKAfXQ7Ur5qR2TTD36cAKBtKp94XYP -vLwSQhWoXI81DUDwYwHTR1TDuXa1bYyYOA8aZRFaAiEeG5sx9NCtedIZQdAa -Y9VnqkF8mh97l7R065I3Wn7EvyNOo.bbDssD3CR55gHHtoRfZ3aKxf2fdEDa -Pv2gjiq+UNm80neRr5hRVIBvIHNvR31iTCxX1CIygwblrEDKFq.Ihy.d0OqK -QPmrLWRD4v4EwhfDzDPaJXaghxPdtn+tBht+qDcbIOpfucyc.c.c3mXB53wn -D03WQIhNXZEvHYEYZT9dzivYYO.jUBGdLPhFsFfMTbDO5N4fbNvWDHM1Ac+l -BQjdgeHCf82OOmyQeeB+2WxJhRik35OAX0aWly9P11MwxGihQ+6477YLwih2 -o7HXYyAdiT9ASGy0k0QY3UpP45nVTx.uiqR4ZYD8EdQxR.0P+cfC8y7e4qDr -p4Bgtjkq32lxV.gckm8.7nIfpDHsceZpRdpH5QgLh.q2TjCOiTt8wD35qjAu -hlwDx8neH5yfL7uAhx.KELmokquC8eEhAxUDuhJVjTv.8BP.3.oCPVLp7Sn6 -Kh2ljkKknp0WGkYNp7Rhx7nGQNKpi9PKSW3YHtYAKIKgCcJLZKkrokfneoT0 -Bosh.JpQR89EGEzHiIngUt4SUGv5EtwoEPywLf17Ur4epxFECjxlmjnsvAl5 -.gLA9Hj+lwVljImFXaVBXzGzHDJDK3BaVJbu4UEVRWGEKs3A+bVZ97OgJWsE -zChyeL6UPp0wWEo.VYHpximVX.Ti7kg1f9fkvZhD8USB9Aqi5Zi8KILqio6R -knfudQ98Te+ivVPgSdku9Orh3nrcQJJI.VgFXzHC7HIohY6JA4jZj6DKv1Ys -SOo1iHfyeUExn6zcmBrFVTuCl.VAdHo54CUmDXR2TcwJTPw70qquZ1HmfZN3 -ArykBIVVbMgpIVwrEmReH9Le6ueaUft09Sy6LIaCLC.nkJ0ed96MZaJ+iGWh -n40WDMm05C2BeZh0xhj37LAYz3YEmt5EJr6qzbpS4x6HKZyQdXddd5rnBACY -VJqAiFTVhxRVCFn4IJJB7no5hIq2TjnLHr6brrHnOVUNuHOMsQWotxCG4JJ2 -9dLIluR1W6wqFes65RY0Uiab9NCS64q1zxY.H4V8u52TCFH9N2PWbfesqerv -VZW+t0vWTg2hcs2u310il6fUBvuNM1tpdW1CmTYSTqxMV.qs3+MOjRzPpREv -MrWH06pARaL0ygQRKjRaGP2M4aqS.29xvzp3o5yTgUG7TQWi6.Kc6DKacIYZ -e1Iyftah.Wdr6QhsC.14kJrpz60xpXclvzE.SeoBqlEP+GH7KBHe4Z8MjTc5 -GHIcBj0Wr4+uCK0FPGLThutfxtlXR9MOmh1DATUND8D5MXzaHn2PQuww7SUo -09qNP5cpJ6qlopjidq1PD6WLh3KVOasL2g9v97UeJ3zj7phsV77eA.FXRcMv -9Qiv+RiFT6SBM7ruNPC0a15zcMytmI7HA2Qg+ywYp72CCTZXptug79PGEK8S -KQgIIMw0ONVTlusXdEnWEACpIAFyJ4IY6hk9m2SqO6FWkDG2LxU0ZKDuIG3m -6R.pAw8NY516KT519KS51anzsHliqH5VXEdXzM4KT5FBAAgudn6fgR2WWx2C -mtoWW1SHmBcSudna7oP2jqG518.0sVna+qK4D2gh2dWWzMcnzs8Ejt0mr5Cf -XUF8.K9ivqA726iQbdQxrsbkKXM95LG6qHLde5gNuXee4iko4yhR0eloc8h0 -M6QhKyGpydjqII0WCNjtO8qZKeib8uBRlw+1sWhLvpqRuQGWlKd.Hh6U.hHR -1.vhpQPEpusJMZ5JuzbMW9nyyWtLcWNKdl0bklwS1UJKcLDo8v3u3r2w0LfN -GUcFD609pHMLsG07vrRdOb.0jhSfwSDyz4wmfPuSuIkQ.VuVKd6Nbzhpn8Lv -MMoTVHWUG2W8tWxhQxyEkNtEurRQvinxQGxy+XAMPC2WXsKW+iDbgRmpGhRo -iZ0s6pRoees+B9cALXqK7nFnxYWhBtpKE9.RswmqWmL9936cT2siCumLp7dc -dVNLdefk4F13QcXSB8G7vlX+EnLO00evx7DxqiPuAfgpDSTCCtcBCuR59sLi -31r5o5wkXi8vsWbxSU9k5D3rUfJrOfp0ClB7zU.lMBOp0+kda+fnbwpmpV80 -q9uZMQsSS.IrUrBY1XK2UPddsqLpVg0oT3tMZfNKIJhm0q.nH2TcLIlniNY2 -VMT2XxEdqFpsBETlEti5ZU4DVaTqlOtsREDatZErMYjusgLxRFWVoZkbQ8MT -SPobbkTv57KXHaJUDqq1EmQuoRgUKPAgT82ix6wFawY9s0LdQ9EYwH5evWMC -R2UPLwn6FPsYLPkG8ip0.s+GpEqRUorsZMf9paM3GYQwUp8IYa1xQy1tXgnb -PefU7jnLzWmjBlGXyyyhKMeQhoS4FsABkUi1pQLrgJrNkETQ8vJpw0wMVOer -x9RP+6pT3K7Dphw6rsbd9toOWkTkFS0dQUeiK7wvA5NbXVdQrptm1clkGtoW -3GDPnthe43a6FD7rM8hZkCzgEmNVAOOuVhNNGXGybmcoYPDKh8ihr39cmV7z -4fBRsAf8cjo09Se6UG9pMRMW+9WTeha26KES6+q5T0oKyxAZPH9VeLpXMMFK -MJLq5iEI.oJBLu8Ufm.OZ77fOQ1Rn34+P1W+kPXrawJ7qhXkOUMireP+hUgz -+BKVI63l4SoRJ644ofVV6f7SPrNA6SOkVxMARijz4v7R334jvAR9mDM4zCMQ -MJIQaj1LsASglGlr6ilLKN4ZO.ZBaaTZxe.jD08zHIhuiHwD7v5HCB105LI1 -fAPr9FE9bF.EEXTJBODgLmSjgpXgtjPYBmnXuxVWBhkbgIVM4o+9n0ZctDKd -Hpulc1.5P31Dr4oo9lN.a1oCFDuidhldItTUBXo2ze8105bmnfN.p08DoVGa -o1qiCtlUYYqyjZ8HCAaMK+dH.njtIlyiDxPoIr4noAiSFzKoAI76ZVZxcHzj -yKSgTsEm53Enxxs5snpsA.8cJaYhILbMqSTtCwIT2SzWcJUNwuCtNBJactl6 -F.wFd8ow38BmsvSI4Q205b8XNXDX1mK.ND23cLqe7CI9Uri4iy+RSSUgG5p+ -HIpz3nQKZUBfJEBksNW2AcFp8b7I6NnNwkbbb10xHTqsY8b.OBxBZWnopDbs -BOIm+BGfGCsIpqTxkZqhBPSshVmK0RGCp0OPE7taMpU15boVxUnkJ7PVQRyZ -PmNnvjLbn5zqPZZHV6nFdYVFhSeT5UHMYV8Nr2HrbTNZCrNXoAV8xrHZctyg -MDIM7IxUE6mpR5SM8u1pqn0kvKf9roQ8N0YETQVpJnPOhptBazRteTK1KOcT -a+8meDTjfQXFCepaMuunggpQRiV5jcsxuB+C9dg27m27+.7QBpFG ------------end_max5_patcher----------- - -*/ diff --git a/build/linux/work/examples/04.Communication/SerialEvent/SerialEvent.ino b/build/linux/work/examples/04.Communication/SerialEvent/SerialEvent.ino deleted file mode 100644 index 11de7adfb..000000000 --- a/build/linux/work/examples/04.Communication/SerialEvent/SerialEvent.ino +++ /dev/null @@ -1,60 +0,0 @@ -/* - Serial Event example - - When new serial data arrives, this sketch adds it to a String. - When a newline is received, the loop prints the string and - clears it. - - A good test for this is to try it with a GPS receiver - that sends out NMEA 0183 sentences. - - Created 9 May 2011 - by Tom Igoe - - This example code is in the public domain. - - http://www.arduino.cc/en/Tutorial/SerialEvent - - */ - -String inputString = ""; // a string to hold incoming data -boolean stringComplete = false; // whether the string is complete - -void setup() { - // initialize serial: - Serial.begin(9600); - // reserve 200 bytes for the inputString: - inputString.reserve(200); -} - -void loop() { - // print the string when a newline arrives: - if (stringComplete) { - Serial.println(inputString); - // clear the string: - inputString = ""; - stringComplete = false; - } -} - -/* - SerialEvent occurs whenever a new data comes in the - hardware serial RX. This routine is run between each - time loop() runs, so using delay inside loop can delay - response. Multiple bytes of data may be available. - */ -void serialEvent() { - while (Serial.available()) { - // get the new byte: - char inChar = (char)Serial.read(); - // add it to the inputString: - inputString += inChar; - // if the incoming character is a newline, set a flag - // so the main loop can do something about it: - if (inChar == '\n') { - stringComplete = true; - } - } -} - - diff --git a/build/linux/work/examples/04.Communication/VirtualColorMixer/VirtualColorMixer.ino b/build/linux/work/examples/04.Communication/VirtualColorMixer/VirtualColorMixer.ino deleted file mode 100644 index 39e4b5761..000000000 --- a/build/linux/work/examples/04.Communication/VirtualColorMixer/VirtualColorMixer.ino +++ /dev/null @@ -1,130 +0,0 @@ -/* - This example reads three analog sensors (potentiometers are easiest) - and sends their values serially. The Processing and Max/MSP programs at the bottom - take those three values and use them to change the background color of the screen. - - The circuit: - * potentiometers attached to analog inputs 0, 1, and 2 - - http://www.arduino.cc/en/Tutorial/VirtualColorMixer - - created 2 Dec 2006 - by David A. Mellis - modified 30 Aug 2011 - by Tom Igoe and Scott Fitzgerald - - This example code is in the public domain. - */ - -const int redPin = A0; // sensor to control red color -const int greenPin = A1; // sensor to control green color -const int bluePin = A2; // sensor to control blue color - -void setup() -{ - Serial.begin(9600); -} - -void loop() -{ - Serial.print(analogRead(redPin)); - Serial.print(","); - Serial.print(analogRead(greenPin)); - Serial.print(","); - Serial.println(analogRead(bluePin)); -} - -/* Processing code for this example - -// This example code is in the public domain. - - import processing.serial.*; - - float redValue = 0; // red value - float greenValue = 0; // green value - float blueValue = 0; // blue value - - Serial myPort; - - void setup() { - size(200, 200); - - // List all the available serial ports - println(Serial.list()); - // I know that the first port in the serial list on my mac - // is always my Arduino, so I open Serial.list()[0]. - // Open whatever port is the one you're using. - myPort = new Serial(this, Serial.list()[0], 9600); - // don't generate a serialEvent() unless you get a newline character: - myPort.bufferUntil('\n'); - } - - void draw() { - // set the background color with the color values: - background(redValue, greenValue, blueValue); - } - - void serialEvent(Serial myPort) { - // get the ASCII string: - String inString = myPort.readStringUntil('\n'); - - if (inString != null) { - // trim off any whitespace: - inString = trim(inString); - // split the string on the commas and convert the - // resulting substrings into an integer array: - float[] colors = float(split(inString, ",")); - // if the array has at least three elements, you know - // you got the whole thing. Put the numbers in the - // color variables: - if (colors.length >=3) { - // map them to the range 0-255: - redValue = map(colors[0], 0, 1023, 0, 255); - greenValue = map(colors[1], 0, 1023, 0, 255); - blueValue = map(colors[2], 0, 1023, 0, 255); - } - } - } - */ - -/* Max/MSP patch for this example - - ----------begin_max5_patcher---------- -1512.3oc4Z00aaaCE8YmeED9ktB35xOjrj1aAsXX4g8xZQeYoXfVh1gqRjdT -TsIsn+2K+PJUovVVJ1VMdCAvxThV7bO7b48dIyWtXxzkxaYkSA+J3u.Sl7kK -lLwcK6MlT2dxzB5so4zRW2lJXeRt7elNy+HM6Vs61uDDzbOYkNmo02sg4euS -4BSede8S2P0o2vEq+aEKU66PPP7b3LPHDauPvyCmAvv4v6+M7L2XXF2WfCaF -lURgVPKbCxzKUbZdySDUEbgABN.ia08R9mccGYGn66qGutNir27qWbg8iY+7 -HDRx.Hjf+OPHCQgPdpQHoxhBlwB+QF4cbkthlCRk4REnfeKScs3ZwaugWBbj -.PS+.qDPAkZkgPlY5oPS4By2A5aTLFv9pounjsgpnZVF3x27pqtBrRpJnZaa -C3WxTkfUJYA.BzR.BhIy.ehquw7dSoJCsrlATLckR.nhLPNWvVwL+Vp1LHL. -SjMG.tRaG7OxT5R2c8Hx9B8.wLCxVaGI6qnpj45Ug84kL+6YIM8CqUxJyycF -7bqsBRULGvwfWyRMyovElat7NvqoejaLm4f+fkmyKuVTHy3q3ldhB.WtQY6Z -x0BSOeSpTqA+FW+Yy3SyybH3sFy8p0RVCmaMpTyX6HdDZ2JsPbfSogbBMueH -JLd6RMBdfRMzPjZvimuWIK2XgFA.ZmtfKoh0Sm88qc6OF4bDQ3P6kEtF6xej -.OkjD4H5OllyS+.3FlhY0so4xRlWqyrXErQpt+2rsnXgQNZHZgmMVzEofW7T -S4zORQtgIdDbRHrObRzSMNofUVZVcbKbhQZrSOo934TqRHIN2ncr7BF8TKR1 -tHDqL.PejLRRPKMR.pKFAkbtDa+UOvsYsIFH0DYsTCjqZ66T1CmGeDILLpSm -myk0SdkOKh5LUr4GbWwRYdW7fm.BvDmzHnSdH3biGpSbxxDNJoGDAD1ChH7L -I0DaloOTBLvkO7zPs5HJnKNoGAXbol5eytUhfyiSfnjE1uAq+Fp0a+wygGwR -q3ZI8.psJpkpJnyPzwmXBj7Sh.+bNvVZxlcKAm0OYHIxcIjzEKdRChgO5UMf -LkMPNN0MfiS7Ev6TYQct.F5IWcCZ4504rGsiVswGWWSYyma01QcZgmL+f+sf -oU18Hn6o6dXkMkFF14TL9rIAWE+6wvGV.p.TPqz3HK5L+VxYxl4UmBKEjr.B -6zinuKI3C+D2Y7azIM6N7QL6t+jQyZxymK1ToAKqVsxjlGyjz2c1kTK3180h -kJEYkacWpv6lyp2VJTjWK47wHA6fyBOWxH9pUf6jUtZkLpNKW.9EeUBH3ymY -XSQlaqGrkQMGzp20adYSmIOGjIABo1xZyAWJtCX9tg6+HMuhMCPyx76ao+Us -UxmzUE79H8d2ZB1m1ztbnOa1mGeAq0awyK8a9UqBUc6pZolpzurTK232e5gp -aInVw8QIIcpaiNSJfY4Z+92Cs+Mc+mgg2cEsvGlLY6V+1kMuioxnB5VM+fsY -9vSu4WI1PMBGXye6KXvNuzmZTh7U9h5j6vvASdngPdgOFxycNL6ia1axUMmT -JIzebXcQCn3SKMf+4QCMmOZung+6xBCPLfwO8ngcEI52YJ1y7mx3CN9xKUYU -bg7Y1yXjlKW6SrZnguQdsSfOSSDItqv2jwJFjavc1vO7OigyBr2+gDYorRk1 -HXZpVFfu2FxXkZtfp4RQqNkX5y2sya3YYL2iavWAOaizH+pw.Ibg8f1I9h3Z -2B79sNeOHvBOtfEalWsvyu0KMf015.AaROvZ7vv5AhnndfHLbTgjcCK1KlHv -gOk5B26OqrXjcJ005.QqCHn8fVTxnxfj93SfQiJlv8YV0VT9fVUwOOhSV3uD -eeqCUClbBPa.j3vWDoMZssNTzRNEnE6gYPXazZaMF921syaLWyAeBXvCESA8 -ASi6Zyw8.RQi65J8ZsNx3ho93OhGWENtWpowepae4YhCFeLErOLENtXJrOSc -iadi39rf4hwc8xdhHz3gn3dBI7iDRlFe8huAfIZhq ------------end_max5_patcher----------- - - - */ diff --git a/build/linux/work/examples/05.Control/Arrays/Arrays.ino b/build/linux/work/examples/05.Control/Arrays/Arrays.ino deleted file mode 100644 index f5154770c..000000000 --- a/build/linux/work/examples/05.Control/Arrays/Arrays.ino +++ /dev/null @@ -1,57 +0,0 @@ -/* - Arrays - - Demonstrates the use of an array to hold pin numbers - in order to iterate over the pins in a sequence. - Lights multiple LEDs in sequence, then in reverse. - - Unlike the For Loop tutorial, where the pins have to be - contiguous, here the pins can be in any random order. - - The circuit: - * LEDs from pins 2 through 7 to ground - - created 2006 - by David A. Mellis - modified 30 Aug 2011 - by Tom Igoe - -This example code is in the public domain. - - http://www.arduino.cc/en/Tutorial/Array - */ - -int timer = 100; // The higher the number, the slower the timing. -int ledPins[] = { - 2, 7, 4, 6, 5, 3 }; // an array of pin numbers to which LEDs are attached -int pinCount = 6; // the number of pins (i.e. the length of the array) - -void setup() { - int thisPin; - // the array elements are numbered from 0 to (pinCount - 1). - // use a for loop to initialize each pin as an output: - for (int thisPin = 0; thisPin < pinCount; thisPin++) { - pinMode(ledPins[thisPin], OUTPUT); - } -} - -void loop() { - // loop from the lowest pin to the highest: - for (int thisPin = 0; thisPin < pinCount; thisPin++) { - // turn the pin on: - digitalWrite(ledPins[thisPin], HIGH); - delay(timer); - // turn the pin off: - digitalWrite(ledPins[thisPin], LOW); - - } - - // loop from the highest pin to the lowest: - for (int thisPin = pinCount - 1; thisPin >= 0; thisPin--) { - // turn the pin on: - digitalWrite(ledPins[thisPin], HIGH); - delay(timer); - // turn the pin off: - digitalWrite(ledPins[thisPin], LOW); - } -} diff --git a/build/linux/work/examples/05.Control/ForLoopIteration/ForLoopIteration.ino b/build/linux/work/examples/05.Control/ForLoopIteration/ForLoopIteration.ino deleted file mode 100644 index d9ce32b8f..000000000 --- a/build/linux/work/examples/05.Control/ForLoopIteration/ForLoopIteration.ino +++ /dev/null @@ -1,47 +0,0 @@ -/* - For Loop Iteration - - Demonstrates the use of a for() loop. - Lights multiple LEDs in sequence, then in reverse. - - The circuit: - * LEDs from pins 2 through 7 to ground - - created 2006 - by David A. Mellis - modified 30 Aug 2011 - by Tom Igoe - -This example code is in the public domain. - - http://www.arduino.cc/en/Tutorial/ForLoop - */ - -int timer = 100; // The higher the number, the slower the timing. - -void setup() { - // use a for loop to initialize each pin as an output: - for (int thisPin = 2; thisPin < 8; thisPin++) { - pinMode(thisPin, OUTPUT); - } -} - -void loop() { - // loop from the lowest pin to the highest: - for (int thisPin = 2; thisPin < 8; thisPin++) { - // turn the pin on: - digitalWrite(thisPin, HIGH); - delay(timer); - // turn the pin off: - digitalWrite(thisPin, LOW); - } - - // loop from the highest pin to the lowest: - for (int thisPin = 7; thisPin >= 2; thisPin--) { - // turn the pin on: - digitalWrite(thisPin, HIGH); - delay(timer); - // turn the pin off: - digitalWrite(thisPin, LOW); - } -} diff --git a/build/linux/work/examples/05.Control/IfStatementConditional/IfStatementConditional.ino b/build/linux/work/examples/05.Control/IfStatementConditional/IfStatementConditional.ino deleted file mode 100644 index 8346f2cbb..000000000 --- a/build/linux/work/examples/05.Control/IfStatementConditional/IfStatementConditional.ino +++ /dev/null @@ -1,56 +0,0 @@ -/* - Conditionals - If statement - - This example demonstrates the use of if() statements. - It reads the state of a potentiometer (an analog input) and turns on an LED - only if the LED goes above a certain threshold level. It prints the analog value - regardless of the level. - - The circuit: - * potentiometer connected to analog pin 0. - Center pin of the potentiometer goes to the analog pin. - side pins of the potentiometer go to +5V and ground - * LED connected from digital pin 13 to ground - - * Note: On most Arduino boards, there is already an LED on the board - connected to pin 13, so you don't need any extra components for this example. - - created 17 Jan 2009 - modified 30 Aug 2011 - by Tom Igoe - -This example code is in the public domain. - -http://arduino.cc/en/Tutorial/IfStatement - - */ - -// These constants won't change: -const int analogPin = A0; // pin that the sensor is attached to -const int ledPin = 13; // pin that the LED is attached to -const int threshold = 400; // an arbitrary threshold level that's in the range of the analog input - -void setup() { - // initialize the LED pin as an output: - pinMode(ledPin, OUTPUT); - // initialize serial communications: - Serial.begin(9600); -} - -void loop() { - // read the value of the potentiometer: - int analogValue = analogRead(analogPin); - - // if the analog value is high enough, turn on the LED: - if (analogValue > threshold) { - digitalWrite(ledPin, HIGH); - } - else { - digitalWrite(ledPin,LOW); - } - - // print the analog value: - Serial.println(analogValue); - -} - diff --git a/build/linux/work/examples/05.Control/WhileStatementConditional/WhileStatementConditional.ino b/build/linux/work/examples/05.Control/WhileStatementConditional/WhileStatementConditional.ino deleted file mode 100644 index 9cffeef22..000000000 --- a/build/linux/work/examples/05.Control/WhileStatementConditional/WhileStatementConditional.ino +++ /dev/null @@ -1,88 +0,0 @@ -/* - Conditionals - while statement - - This example demonstrates the use of while() statements. - - While the pushbutton is pressed, the sketch runs the calibration routine. - The sensor readings during the while loop define the minimum and maximum - of expected values from the photo resistor. - - This is a variation on the calibrate example. - - The circuit: - * photo resistor connected from +5V to analog in pin 0 - * 10K resistor connected from ground to analog in pin 0 - * LED connected from digital pin 9 to ground through 220 ohm resistor - * pushbutton attached from pin 2 to +5V - * 10K resistor attached from pin 2 to ground - - created 17 Jan 2009 - modified 30 Aug 2011 - by Tom Igoe - - This example code is in the public domain. - - http://arduino.cc/en/Tutorial/WhileLoop - - */ - - -// These constants won't change: -const int sensorPin = A2; // pin that the sensor is attached to -const int ledPin = 9; // pin that the LED is attached to -const int indicatorLedPin = 13; // pin that the built-in LED is attached to -const int buttonPin = 2; // pin that the button is attached to - - -// These variables will change: -int sensorMin = 1023; // minimum sensor value -int sensorMax = 0; // maximum sensor value -int sensorValue = 0; // the sensor value - - -void setup() { - // set the LED pins as outputs and the switch pin as input: - pinMode(indicatorLedPin, OUTPUT); - pinMode (ledPin, OUTPUT); - pinMode (buttonPin, INPUT); -} - -void loop() { - // while the button is pressed, take calibration readings: - while (digitalRead(buttonPin) == HIGH) { - calibrate(); - } - // signal the end of the calibration period - digitalWrite(indicatorLedPin, LOW); - - // read the sensor: - sensorValue = analogRead(sensorPin); - - // apply the calibration to the sensor reading - sensorValue = map(sensorValue, sensorMin, sensorMax, 0, 255); - - // in case the sensor value is outside the range seen during calibration - sensorValue = constrain(sensorValue, 0, 255); - - // fade the LED using the calibrated value: - analogWrite(ledPin, sensorValue); -} - -void calibrate() { - // turn on the indicator LED to indicate that calibration is happening: - digitalWrite(indicatorLedPin, HIGH); - // read the sensor: - sensorValue = analogRead(sensorPin); - - // record the maximum sensor value - if (sensorValue > sensorMax) { - sensorMax = sensorValue; - } - - // record the minimum sensor value - if (sensorValue < sensorMin) { - sensorMin = sensorValue; - } -} - - diff --git a/build/linux/work/examples/05.Control/switchCase/switchCase.ino b/build/linux/work/examples/05.Control/switchCase/switchCase.ino deleted file mode 100644 index 87eb3f340..000000000 --- a/build/linux/work/examples/05.Control/switchCase/switchCase.ino +++ /dev/null @@ -1,62 +0,0 @@ -/* - Switch statement - - Demonstrates the use of a switch statement. The switch - statement allows you to choose from among a set of discrete values - of a variable. It's like a series of if statements. - - To see this sketch in action, but the board and sensor in a well-lit - room, open the serial monitor, and and move your hand gradually - down over the sensor. - - The circuit: - * photoresistor from analog in 0 to +5V - * 10K resistor from analog in 0 to ground - - created 1 Jul 2009 - modified 30 Aug 2011 - by Tom Igoe - - This example code is in the public domain. - - http://www.arduino.cc/en/Tutorial/SwitchCase - */ - -// these constants won't change: -const int sensorMin = 0; // sensor minimum, discovered through experiment -const int sensorMax = 600; // sensor maximum, discovered through experiment - -void setup() { - // initialize serial communication: - Serial.begin(9600); -} - -void loop() { - // read the sensor: - int sensorReading = analogRead(A0); - // map the sensor range to a range of four options: - int range = map(sensorReading, sensorMin, sensorMax, 0, 3); - - // do something different depending on the - // range value: - switch (range) { - case 0: // your hand is on the sensor - Serial.println("dark"); - break; - case 1: // your hand is close to the sensor - Serial.println("dim"); - break; - case 2: // your hand is a few inches from the sensor - Serial.println("medium"); - break; - case 3: // your hand is nowhere near the sensor - Serial.println("bright"); - break; - } - -} - - - - - diff --git a/build/linux/work/examples/05.Control/switchCase2/switchCase2.ino b/build/linux/work/examples/05.Control/switchCase2/switchCase2.ino deleted file mode 100644 index b6d78865a..000000000 --- a/build/linux/work/examples/05.Control/switchCase2/switchCase2.ino +++ /dev/null @@ -1,66 +0,0 @@ -/* - Switch statement with serial input - - Demonstrates the use of a switch statement. The switch - statement allows you to choose from among a set of discrete values - of a variable. It's like a series of if statements. - - To see this sketch in action, open the Serial monitor and send any character. - The characters a, b, c, d, and e, will turn on LEDs. Any other character will turn - the LEDs off. - - The circuit: - * 5 LEDs attached to digital pins 2 through 6 through 220-ohm resistors - - created 1 Jul 2009 - by Tom Igoe - -This example code is in the public domain. - - http://www.arduino.cc/en/Tutorial/SwitchCase2 - */ - -void setup() { - // initialize serial communication: - Serial.begin(9600); - // initialize the LED pins: - for (int thisPin = 2; thisPin < 7; thisPin++) { - pinMode(thisPin, OUTPUT); - } -} - -void loop() { - // read the sensor: - if (Serial.available() > 0) { - int inByte = Serial.read(); - // do something different depending on the character received. - // The switch statement expects single number values for each case; - // in this exmaple, though, you're using single quotes to tell - // the controller to get the ASCII value for the character. For - // example 'a' = 97, 'b' = 98, and so forth: - - switch (inByte) { - case 'a': - digitalWrite(2, HIGH); - break; - case 'b': - digitalWrite(3, HIGH); - break; - case 'c': - digitalWrite(4, HIGH); - break; - case 'd': - digitalWrite(5, HIGH); - break; - case 'e': - digitalWrite(6, HIGH); - break; - default: - // turn all the LEDs off: - for (int thisPin = 2; thisPin < 7; thisPin++) { - digitalWrite(thisPin, LOW); - } - } - } -} - diff --git a/build/linux/work/examples/06.Sensors/ADXL3xx/ADXL3xx.ino b/build/linux/work/examples/06.Sensors/ADXL3xx/ADXL3xx.ino deleted file mode 100644 index a55cc016a..000000000 --- a/build/linux/work/examples/06.Sensors/ADXL3xx/ADXL3xx.ino +++ /dev/null @@ -1,64 +0,0 @@ - -/* - ADXL3xx - - Reads an Analog Devices ADXL3xx accelerometer and communicates the - acceleration to the computer. The pins used are designed to be easily - compatible with the breakout boards from Sparkfun, available from: - http://www.sparkfun.com/commerce/categories.php?c=80 - - http://www.arduino.cc/en/Tutorial/ADXL3xx - - The circuit: - analog 0: accelerometer self test - analog 1: z-axis - analog 2: y-axis - analog 3: x-axis - analog 4: ground - analog 5: vcc - - created 2 Jul 2008 - by David A. Mellis - modified 30 Aug 2011 - by Tom Igoe - - This example code is in the public domain. - -*/ - -// these constants describe the pins. They won't change: -const int groundpin = 18; // analog input pin 4 -- ground -const int powerpin = 19; // analog input pin 5 -- voltage -const int xpin = A3; // x-axis of the accelerometer -const int ypin = A2; // y-axis -const int zpin = A1; // z-axis (only on 3-axis models) - -void setup() -{ - // initialize the serial communications: - Serial.begin(9600); - - // Provide ground and power by using the analog inputs as normal - // digital pins. This makes it possible to directly connect the - // breakout board to the Arduino. If you use the normal 5V and - // GND pins on the Arduino, you can remove these lines. - pinMode(groundpin, OUTPUT); - pinMode(powerpin, OUTPUT); - digitalWrite(groundpin, LOW); - digitalWrite(powerpin, HIGH); -} - -void loop() -{ - // print the sensor values: - Serial.print(analogRead(xpin)); - // print a tab between values: - Serial.print("\t"); - Serial.print(analogRead(ypin)); - // print a tab between values: - Serial.print("\t"); - Serial.print(analogRead(zpin)); - Serial.println(); - // delay before next reading: - delay(100); -} diff --git a/build/linux/work/examples/06.Sensors/Knock/Knock.ino b/build/linux/work/examples/06.Sensors/Knock/Knock.ino deleted file mode 100644 index 6f8c2c55a..000000000 --- a/build/linux/work/examples/06.Sensors/Knock/Knock.ino +++ /dev/null @@ -1,55 +0,0 @@ -/* Knock Sensor - - This sketch reads a piezo element to detect a knocking sound. - It reads an analog pin and compares the result to a set threshold. - If the result is greater than the threshold, it writes - "knock" to the serial port, and toggles the LED on pin 13. - - The circuit: - * + connection of the piezo attached to analog in 0 - * - connection of the piezo attached to ground - * 1-megohm resistor attached from analog in 0 to ground - - http://www.arduino.cc/en/Tutorial/Knock - - created 25 Mar 2007 - by David Cuartielles - modified 30 Aug 2011 - by Tom Igoe - - This example code is in the public domain. - - */ - - -// these constants won't change: -const int ledPin = 13; // led connected to digital pin 13 -const int knockSensor = A0; // the piezo is connected to analog pin 0 -const int threshold = 100; // threshold value to decide when the detected sound is a knock or not - - -// these variables will change: -int sensorReading = 0; // variable to store the value read from the sensor pin -int ledState = LOW; // variable used to store the last LED status, to toggle the light - -void setup() { - pinMode(ledPin, OUTPUT); // declare the ledPin as as OUTPUT - Serial.begin(9600); // use the serial port -} - -void loop() { - // read the sensor and store it in the variable sensorReading: - sensorReading = analogRead(knockSensor); - - // if the sensor reading is greater than the threshold: - if (sensorReading >= threshold) { - // toggle the status of the ledPin: - ledState = !ledState; - // update the LED pin itself: - digitalWrite(ledPin, ledState); - // send the string "Knock!" back to the computer, followed by newline - Serial.println("Knock!"); - } - delay(100); // delay to avoid overloading the serial port buffer -} - diff --git a/build/linux/work/examples/06.Sensors/Memsic2125/Memsic2125.ino b/build/linux/work/examples/06.Sensors/Memsic2125/Memsic2125.ino deleted file mode 100644 index 974ccb52f..000000000 --- a/build/linux/work/examples/06.Sensors/Memsic2125/Memsic2125.ino +++ /dev/null @@ -1,63 +0,0 @@ -/* - Memsic2125 - - Read the Memsic 2125 two-axis accelerometer. Converts the - pulses output by the 2125 into milli-g's (1/1000 of earth's - gravity) and prints them over the serial connection to the - computer. - - The circuit: - * X output of accelerometer to digital pin 2 - * Y output of accelerometer to digital pin 3 - * +V of accelerometer to +5V - * GND of accelerometer to ground - - http://www.arduino.cc/en/Tutorial/Memsic2125 - - created 6 Nov 2008 - by David A. Mellis - modified 30 Aug 2011 - by Tom Igoe - - This example code is in the public domain. - - */ - -// these constants won't change: -const int xPin = 2; // X output of the accelerometer -const int yPin = 3; // Y output of the accelerometer - -void setup() { - // initialize serial communications: - Serial.begin(9600); - // initialize the pins connected to the accelerometer - // as inputs: - pinMode(xPin, INPUT); - pinMode(yPin, INPUT); -} - -void loop() { - // variables to read the pulse widths: - int pulseX, pulseY; - // variables to contain the resulting accelerations - int accelerationX, accelerationY; - - // read pulse from x- and y-axes: - pulseX = pulseIn(xPin,HIGH); - pulseY = pulseIn(yPin,HIGH); - - // convert the pulse width into acceleration - // accelerationX and accelerationY are in milli-g's: - // earth's gravity is 1000 milli-g's, or 1g. - accelerationX = ((pulseX / 10) - 500) * 8; - accelerationY = ((pulseY / 10) - 500) * 8; - - // print the acceleration - Serial.print(accelerationX); - // print a tab character: - Serial.print("\t"); - Serial.print(accelerationY); - Serial.println(); - - delay(100); -} diff --git a/build/linux/work/examples/06.Sensors/Ping/Ping.ino b/build/linux/work/examples/06.Sensors/Ping/Ping.ino deleted file mode 100644 index 5de46d603..000000000 --- a/build/linux/work/examples/06.Sensors/Ping/Ping.ino +++ /dev/null @@ -1,84 +0,0 @@ -/* Ping))) Sensor - - This sketch reads a PING))) ultrasonic rangefinder and returns the - distance to the closest object in range. To do this, it sends a pulse - to the sensor to initiate a reading, then listens for a pulse - to return. The length of the returning pulse is proportional to - the distance of the object from the sensor. - - The circuit: - * +V connection of the PING))) attached to +5V - * GND connection of the PING))) attached to ground - * SIG connection of the PING))) attached to digital pin 7 - - http://www.arduino.cc/en/Tutorial/Ping - - created 3 Nov 2008 - by David A. Mellis - modified 30 Aug 2011 - by Tom Igoe - - This example code is in the public domain. - - */ - -// this constant won't change. It's the pin number -// of the sensor's output: -const int pingPin = 7; - -void setup() { - // initialize serial communication: - Serial.begin(9600); -} - -void loop() -{ - // establish variables for duration of the ping, - // and the distance result in inches and centimeters: - long duration, inches, cm; - - // The PING))) is triggered by a HIGH pulse of 2 or more microseconds. - // Give a short LOW pulse beforehand to ensure a clean HIGH pulse: - pinMode(pingPin, OUTPUT); - digitalWrite(pingPin, LOW); - delayMicroseconds(2); - digitalWrite(pingPin, HIGH); - delayMicroseconds(5); - digitalWrite(pingPin, LOW); - - // The same pin is used to read the signal from the PING))): a HIGH - // pulse whose duration is the time (in microseconds) from the sending - // of the ping to the reception of its echo off of an object. - pinMode(pingPin, INPUT); - duration = pulseIn(pingPin, HIGH); - - // convert the time into a distance - inches = microsecondsToInches(duration); - cm = microsecondsToCentimeters(duration); - - Serial.print(inches); - Serial.print("in, "); - Serial.print(cm); - Serial.print("cm"); - Serial.println(); - - delay(100); -} - -long microsecondsToInches(long microseconds) -{ - // According to Parallax's datasheet for the PING))), there are - // 73.746 microseconds per inch (i.e. sound travels at 1130 feet per - // second). This gives the distance travelled by the ping, outbound - // and return, so we divide by 2 to get the distance of the obstacle. - // See: http://www.parallax.com/dl/docs/prod/acc/28015-PING-v1.3.pdf - return microseconds / 74 / 2; -} - -long microsecondsToCentimeters(long microseconds) -{ - // The speed of sound is 340 m/s or 29 microseconds per centimeter. - // The ping travels out and back, so to find the distance of the - // object we take half of the distance travelled. - return microseconds / 29 / 2; -} diff --git a/build/linux/work/examples/07.Display/RowColumnScanning/RowColumnScanning.ino b/build/linux/work/examples/07.Display/RowColumnScanning/RowColumnScanning.ino deleted file mode 100644 index 6be347295..000000000 --- a/build/linux/work/examples/07.Display/RowColumnScanning/RowColumnScanning.ino +++ /dev/null @@ -1,114 +0,0 @@ -/* - Row-Column Scanning an 8x8 LED matrix with X-Y input - - This example controls an 8x8 LED matrix using two analog inputs - - created 27 May 2009 - modified 30 Aug 2011 - by Tom Igoe - - This example works for the Lumex LDM-24488NI Matrix. See - http://sigma.octopart.com/140413/datasheet/Lumex-LDM-24488NI.pdf - for the pin connections - - For other LED cathode column matrixes, you should only need to change - the pin numbers in the row[] and column[] arrays - - rows are the anodes - cols are the cathodes - --------- - - Pin numbers: - Matrix: - * Digital pins 2 through 13, - * analog pins 2 through 5 used as digital 16 through 19 - Potentiometers: - * center pins are attached to analog pins 0 and 1, respectively - * side pins attached to +5V and ground, respectively. - - This example code is in the public domain. - - http://www.arduino.cc/en/Tutorial/RowColumnScanning - - see also http://www.tigoe.net/pcomp/code/category/arduinowiring/514 for more - */ - - -// 2-dimensional array of row pin numbers: -const int row[8] = { - 2,7,19,5,13,18,12,16 }; - -// 2-dimensional array of column pin numbers: -const int col[8] = { - 6,11,10,3,17,4,8,9 }; - -// 2-dimensional array of pixels: -int pixels[8][8]; - -// cursor position: -int x = 5; -int y = 5; - -void setup() { - Serial.begin(9600); - // initialize the I/O pins as outputs: - - // iterate over the pins: - for (int thisPin = 0; thisPin < 8; thisPin++) { - // initialize the output pins: - pinMode(col[thisPin], OUTPUT); - pinMode(row[thisPin], OUTPUT); - // take the col pins (i.e. the cathodes) high to ensure that - // the LEDS are off: - digitalWrite(col[thisPin], HIGH); - } - - // initialize the pixel matrix: - for (int x = 0; x < 8; x++) { - for (int y = 0; y < 8; y++) { - pixels[x][y] = HIGH; - } - } -} - -void loop() { - // read input: - readSensors(); - - // draw the screen: - refreshScreen(); -} - -void readSensors() { - // turn off the last position: - pixels[x][y] = HIGH; - // read the sensors for X and Y values: - x = 7 - map(analogRead(A0), 0, 1023, 0, 7); - y = map(analogRead(A1), 0, 1023, 0, 7); - // set the new pixel position low so that the LED will turn on - // in the next screen refresh: - pixels[x][y] = LOW; - -} - -void refreshScreen() { - // iterate over the rows (anodes): - for (int thisRow = 0; thisRow < 8; thisRow++) { - // take the row pin (anode) high: - digitalWrite(row[thisRow], HIGH); - // iterate over the cols (cathodes): - for (int thisCol = 0; thisCol < 8; thisCol++) { - // get the state of the current pixel; - int thisPixel = pixels[thisRow][thisCol]; - // when the row is HIGH and the col is LOW, - // the LED where they meet turns on: - digitalWrite(col[thisCol], thisPixel); - // turn the pixel off: - if (thisPixel == LOW) { - digitalWrite(col[thisCol], HIGH); - } - } - // take the row pin low to turn off the whole row: - digitalWrite(row[thisRow], LOW); - } -} diff --git a/build/linux/work/examples/07.Display/barGraph/barGraph.ino b/build/linux/work/examples/07.Display/barGraph/barGraph.ino deleted file mode 100644 index 646cd4744..000000000 --- a/build/linux/work/examples/07.Display/barGraph/barGraph.ino +++ /dev/null @@ -1,60 +0,0 @@ -/* - LED bar graph - - Turns on a series of LEDs based on the value of an analog sensor. - This is a simple way to make a bar graph display. Though this graph - uses 10 LEDs, you can use any number by changing the LED count - and the pins in the array. - - This method can be used to control any series of digital outputs that - depends on an analog input. - - The circuit: - * LEDs from pins 2 through 11 to ground - - created 4 Sep 2010 - by Tom Igoe - - This example code is in the public domain. - - http://www.arduino.cc/en/Tutorial/BarGraph - */ - - -// these constants won't change: -const int analogPin = A0; // the pin that the potentiometer is attached to -const int ledCount = 10; // the number of LEDs in the bar graph - -int ledPins[] = { - 2, 3, 4, 5, 6, 7,8,9,10,11 }; // an array of pin numbers to which LEDs are attached - - -void setup() { - // loop over the pin array and set them all to output: - for (int thisLed = 0; thisLed < ledCount; thisLed++) { - pinMode(ledPins[thisLed], OUTPUT); - } -} - -void loop() { - // read the potentiometer: - int sensorReading = analogRead(analogPin); - // map the result to a range from 0 to the number of LEDs: - int ledLevel = map(sensorReading, 0, 1023, 0, ledCount); - - // loop over the LED array: - for (int thisLed = 0; thisLed < ledCount; thisLed++) { - // if the array element's index is less than ledLevel, - // turn the pin for this element on: - if (thisLed < ledLevel) { - digitalWrite(ledPins[thisLed], HIGH); - } - // turn off all pins higher than the ledLevel: - else { - digitalWrite(ledPins[thisLed], LOW); - } - } -} - - - diff --git a/build/linux/work/examples/08.Strings/CharacterAnalysis/.CharacterAnalysis.ino.swp b/build/linux/work/examples/08.Strings/CharacterAnalysis/.CharacterAnalysis.ino.swp deleted file mode 100644 index 0f8c4f40c..000000000 Binary files a/build/linux/work/examples/08.Strings/CharacterAnalysis/.CharacterAnalysis.ino.swp and /dev/null differ diff --git a/build/linux/work/examples/08.Strings/CharacterAnalysis/CharacterAnalysis.ino b/build/linux/work/examples/08.Strings/CharacterAnalysis/CharacterAnalysis.ino deleted file mode 100644 index 414d4628f..000000000 --- a/build/linux/work/examples/08.Strings/CharacterAnalysis/CharacterAnalysis.ino +++ /dev/null @@ -1,84 +0,0 @@ -/* - Character analysis operators - - Examples using the character analysis operators. - Send any byte and the sketch will tell you about it. - - created 29 Nov 2010 - modified 2 Apr 2012 - by Tom Igoe - - This example code is in the public domain. - */ - -void setup() { - // Open serial communications and wait for port to open: - Serial.begin(9600); - // this check is only needed on the Leonardo: - while (!Serial) { - ; // wait for serial port to connect. Needed fo Leonardo only - } - - // send an intro: - Serial.println("send any byte and I'll tell you everything I can about it"); - Serial.println(); -} - -void loop() { - // get any incoming bytes: - if (Serial.available() > 0) { - int thisChar = Serial.read(); - - // say what was sent: - Serial.print("You sent me: \'"); - Serial.write(thisChar); - Serial.print("\' ASCII Value: "); - Serial.println(thisChar); - - // analyze what was sent: - if(isAlphaNumeric(thisChar)) { - Serial.println("it's alphanumeric"); - } - if(isAlpha(thisChar)) { - Serial.println("it's alphabetic"); - } - if(isAscii(thisChar)) { - Serial.println("it's ASCII"); - } - if(isWhitespace(thisChar)) { - Serial.println("it's whitespace"); - } - if(isControl(thisChar)) { - Serial.println("it's a control character"); - } - if(isDigit(thisChar)) { - Serial.println("it's a numeric digit"); - } - if(isGraph(thisChar)) { - Serial.println("it's a printable character that's not whitespace"); - } - if(isLowerCase(thisChar)) { - Serial.println("it's lower case"); - } - if(isPrintable(thisChar)) { - Serial.println("it's printable"); - } - if(isPunct(thisChar)) { - Serial.println("it's punctuation"); - } - if(isSpace(thisChar)) { - Serial.println("it's a space character"); - } - if(isUpperCase(thisChar)) { - Serial.println("it's upper case"); - } - if (isHexadecimalDigit(thisChar)) { - Serial.println("it's a valid hexadecimaldigit (i.e. 0 - 9, a - F, or A - F)"); - } - - // add some space and ask for another byte: - Serial.println(); - Serial.println("Give me another byte:"); - Serial.println(); - } -} diff --git a/build/linux/work/examples/08.Strings/StringAdditionOperator/StringAdditionOperator.ino b/build/linux/work/examples/08.Strings/StringAdditionOperator/StringAdditionOperator.ino deleted file mode 100644 index a1a79e6aa..000000000 --- a/build/linux/work/examples/08.Strings/StringAdditionOperator/StringAdditionOperator.ino +++ /dev/null @@ -1,68 +0,0 @@ -/* - Adding Strings together - - Examples of how to add strings together - You can also add several different data types to string, as shown here: - - created 27 July 2010 - modified 2 Apr 2012 - by Tom Igoe - - http://arduino.cc/en/Tutorial/StringAdditionOperator - - This example code is in the public domain. - */ - -// declare three strings: -String stringOne, stringTwo, stringThree; - -void setup() { - // initialize serial and wait for port to open: - Serial.begin(9600); - // this check is only needed on the Leonardo: - while (!Serial) { - ; // wait for serial port to connect. Needed fo Leonardo only - } - - stringOne = String("stringThree = "); - stringTwo = String("this string"); - stringThree = String (); - Serial.println("\n\nAdding strings together (concatenation):"); - Serial.println(); -} - -void loop() { - // adding a constant integer to a string: - stringThree = stringOne + 123; - Serial.println(stringThree); // prints "stringThree = 123" - - // adding a constant long interger to a string: - stringThree = stringOne + 123456789; - Serial.println(stringThree); // prints " You added 123456789" - - // adding a constant character to a string: - stringThree = stringOne + 'A'; - Serial.println(stringThree); // prints "You added A" - - // adding a constant string to a string: - stringThree = stringOne + "abc"; - Serial.println(stringThree); // prints "You added abc" - - stringThree = stringOne + stringTwo; - Serial.println(stringThree); // prints "You added this string" - - // adding a variable integer to a string: - int sensorValue = analogRead(A0); - stringOne = "Sensor value: "; - stringThree = stringOne + sensorValue; - Serial.println(stringThree); // prints "Sensor Value: 401" or whatever value analogRead(A0) has - - // adding a variable long integer to a string: - long currentTime = millis(); - stringOne="millis() value: "; - stringThree = stringOne + millis(); - Serial.println(stringThree); // prints "The millis: 345345" or whatever value currentTime has - - // do nothing while true: - while(true); -} diff --git a/build/linux/work/examples/08.Strings/StringAppendOperator/StringAppendOperator.ino b/build/linux/work/examples/08.Strings/StringAppendOperator/StringAppendOperator.ino deleted file mode 100644 index 1776c06f2..000000000 --- a/build/linux/work/examples/08.Strings/StringAppendOperator/StringAppendOperator.ino +++ /dev/null @@ -1,70 +0,0 @@ -/* - Appending to Strings using the += operator and concat() - - Examples of how to append different data types to strings - - created 27 July 2010 - modified 2 Apr 2012 - by Tom Igoe - - http://arduino.cc/en/Tutorial/StringAppendOperator - - This example code is in the public domain. - */ -String stringOne, stringTwo; - -void setup() { - // Open serial communications and wait for port to open: - Serial.begin(9600); - // this check is only needed on the Leonardo: - while (!Serial) ; - ; - - stringOne = String("Sensor "); - stringTwo = String("value"); - Serial.println("\n\nAppending to a string:"); -} - -void loop() { - Serial.println(stringOne); // prints "Sensor " - - // adding a string to a string: - stringOne += stringTwo; - Serial.println(stringOne); // prints "Sensor value" - - // adding a constant string to a string: - stringOne += " for input "; - Serial.println(stringOne); // prints "Sensor value for input" - - // adding a constant character to a string: - stringOne += 'A'; - Serial.println(stringOne); // prints "Sensor value for input A" - - // adding a constant integer to a string: - stringOne += 0; - Serial.println(stringOne); // prints "Sensor value for input A0" - - // adding a constant string to a string: - stringOne += ": "; - Serial.println(stringOne); // prints "Sensor value for input" - - // adding a variable integer to a string: - stringOne += analogRead(A0); - Serial.println(stringOne); // prints "Sensor value for input A0: 456" or whatever analogRead(A0) is - - Serial.println("\n\nchanging the Strings' values"); - stringOne = "A long integer: "; - stringTwo = "The millis(): "; - - // adding a constant long integer to a string: - stringOne += 123456789; - Serial.println(stringOne); // prints "A long integer: 123456789" - - // using concat() to add a long variable to a string: - stringTwo.concat(millis()); - Serial.println(stringTwo); // prints "The millis(): 43534" or whatever the value of the millis() is - - // do nothing while true: - while(true); -} - diff --git a/build/linux/work/examples/08.Strings/StringCaseChanges/StringCaseChanges.ino b/build/linux/work/examples/08.Strings/StringCaseChanges/StringCaseChanges.ino deleted file mode 100644 index cdccb53c4..000000000 --- a/build/linux/work/examples/08.Strings/StringCaseChanges/StringCaseChanges.ino +++ /dev/null @@ -1,41 +0,0 @@ -/* - String Case changes - - Examples of how to change the case of a string - - created 27 July 2010 - modified 2 Apr 2012 - by Tom Igoe - - http://arduino.cc/en/Tutorial/StringCaseChanges - - This example code is in the public domain. - */ - -void setup() { - // Open serial communications and wait for port to open: - Serial.begin(9600); - // this check is only needed on the Leonardo: - while (!Serial) ; - ; - - Serial.println("\n\nString case changes:"); -} - -void loop() { - // toUpperCase() changes all letters to upper case: - String stringOne = ""; - Serial.println(stringOne); - stringOne.toUpperCase(); - Serial.println(stringOne); - - // toLowerCase() changes all letters to lower case: - String stringTwo = ""; - Serial.println(stringTwo); - stringTwo.toLowerCase(); - Serial.println(stringTwo); - - - // do nothing while true: - while(true); -} diff --git a/build/linux/work/examples/08.Strings/StringCharacters/StringCharacters.ino b/build/linux/work/examples/08.Strings/StringCharacters/StringCharacters.ino deleted file mode 100644 index d7d27e7bc..000000000 --- a/build/linux/work/examples/08.Strings/StringCharacters/StringCharacters.ino +++ /dev/null @@ -1,44 +0,0 @@ -/* - String charAt() and setCharAt() - - Examples of how to get and set characters of a String - - created 27 July 2010 - modified 2 Apr 2012 - by Tom Igoe - - http://arduino.cc/en/Tutorial/StringCharacters - - This example code is in the public domain. - */ - -void setup() { - // Open serial communications and wait for port to open: - Serial.begin(9600); - // this check is only needed on the Leonardo: - while (!Serial) ; - ; - - Serial.println("\n\nString charAt() and setCharAt():"); -} - -void loop() { - // make a string to report a sensor reading: - String reportString = "SensorReading: 456"; - Serial.println(reportString); - - // the reading's most significant digit is at position 15 in the reportString: - char mostSignificantDigit = reportString.charAt(15); - Serial.println("Most significant digit of the sensor reading is: " + mostSignificantDigit); - - // add blank space: - Serial.println(); - - // you can alo set the character of a string. Change the : to a = character - reportString.setCharAt(13, '='); - Serial.println(reportString); - - // do nothing while true: - while(true); -} - diff --git a/build/linux/work/examples/08.Strings/StringComparisonOperators/StringComparisonOperators.ino b/build/linux/work/examples/08.Strings/StringComparisonOperators/StringComparisonOperators.ino deleted file mode 100644 index 742a6ad94..000000000 --- a/build/linux/work/examples/08.Strings/StringComparisonOperators/StringComparisonOperators.ino +++ /dev/null @@ -1,129 +0,0 @@ -/* - Comparing Strings - - Examples of how to compare strings using the comparison operators - - created 27 July 2010 - modified 2 Apr 2012 - by Tom Igoe - - http://arduino.cc/en/Tutorial/StringComparisonOperators - - This example code is in the public domain. - */ - -String stringOne, stringTwo; - -void setup() { - // Open serial communications and wait for port to open: - Serial.begin(9600); - // this check is only needed on the Leonardo: - while (!Serial) ; - ; - - stringOne = String("this"); - stringTwo = String("that"); - Serial.println("\n\nComparing Strings:"); - -} - -void loop() { - // two strings equal: - if (stringOne == "this") { - Serial.println("StringOne == \"this\""); - } - // two strings not equal: - if (stringOne != stringTwo) { - Serial.println(stringOne + " =! " + stringTwo); - } - - // two strings not equal (case sensitivity matters): - stringOne = "This"; - stringTwo = "this"; - if (stringOne != stringTwo) { - Serial.println(stringOne + " =! " + stringTwo); - } - // you can also use equals() to see if two strings are the same: - if (stringOne.equals(stringTwo)) { - Serial.println(stringOne + " equals " + stringTwo); - } - else { - Serial.println(stringOne + " does not equal " + stringTwo); - } - - // or perhaps you want to ignore case: - if (stringOne.equalsIgnoreCase(stringTwo)) { - Serial.println(stringOne + " equals (ignoring case) " + stringTwo); - } - else { - Serial.println(stringOne + " does not equal (ignoring case) " + stringTwo); - } - - // a numeric string compared to the number it represents: - stringOne = "1"; - int numberOne = 1; - if (stringOne.toInt() == numberOne) { - Serial.println(stringOne + " = " + numberOne); - } - - - - // two numeric strings compared: - stringOne = "2"; - stringTwo = "1"; - if (stringOne >= stringTwo) { - Serial.println(stringOne + " >= " + stringTwo); - } - - // comparison operators can be used to compare strings for alphabetic sorting too: - stringOne = String("Brown"); - if (stringOne < "Charles") { - Serial.println(stringOne + " < Charles"); - } - - if (stringOne > "Adams") { - Serial.println(stringOne + " > Adams"); - } - - if (stringOne <= "Browne") { - Serial.println(stringOne + " <= Browne"); - } - - - if (stringOne >= "Brow") { - Serial.println(stringOne + " >= Brow"); - } - - // the compareTo() operator also allows you to compare strings - // it evaluates on the first character that's different. - // if the first character of the string you're comparing to - // comes first in alphanumeric order, then compareTo() is greater than 0: - stringOne = "Cucumber"; - stringTwo = "Cucuracha"; - if (stringOne.compareTo(stringTwo) < 0 ) { - Serial.println(stringOne + " comes before " + stringTwo); - } - else { - Serial.println(stringOne + " comes after " + stringTwo); - } - - delay(10000); // because the next part is a loop: - - // compareTo() is handy when you've got strings with numbers in them too: - - while (true) { - stringOne = "Sensor: "; - stringTwo= "Sensor: "; - - stringOne += analogRead(A0); - stringTwo += analogRead(A5); - - if (stringOne.compareTo(stringTwo) < 0 ) { - Serial.println(stringOne + " comes before " + stringTwo); - } - else { - Serial.println(stringOne + " comes after " + stringTwo); - - } - } -} diff --git a/build/linux/work/examples/08.Strings/StringConstructors/StringConstructors.ino b/build/linux/work/examples/08.Strings/StringConstructors/StringConstructors.ino deleted file mode 100644 index aa67c5aa2..000000000 --- a/build/linux/work/examples/08.Strings/StringConstructors/StringConstructors.ino +++ /dev/null @@ -1,70 +0,0 @@ -/* - String constructors - - Examples of how to create strings from other data types - - created 27 July 2010 - modified 30 Aug 2011 - by Tom Igoe - - http://arduino.cc/en/Tutorial/StringConstructors - - This example code is in the public domain. - */ - -void setup() { - // Open serial communications and wait for port to open: - Serial.begin(9600); - // this check is only needed on the Leonardo: - while (!Serial) ; - ; - - Serial.println("\n\nString Constructors:"); -} - -void loop() { - // using a constant String: - String stringOne = "Hello String"; - Serial.println(stringOne); // prints "Hello String" - - // converting a constant char into a String: - stringOne = String('a'); - Serial.println(stringOne); // prints "a" - - // converting a constant string into a String object: - String stringTwo = String("This is a string"); - Serial.println(stringTwo); // prints "This is a string" - - // concatenating two strings: - stringOne = String(stringTwo + " with more"); - // prints "This is a string with more": - Serial.println(stringOne); - - // using a constant integer: - stringOne = String(13); - Serial.println(stringOne); // prints "13" - - // using an int and a base: - stringOne = String(analogRead(A0), DEC); - // prints "453" or whatever the value of analogRead(A0) is - Serial.println(stringOne); - - // using an int and a base (hexadecimal): - stringOne = String(45, HEX); - // prints "2d", which is the hexadecimal version of decimal 45: - Serial.println(stringOne); - - // using an int and a base (binary) - stringOne = String(255, BIN); - // prints "11111111" which is the binary value of 255 - Serial.println(stringOne); - - // using a long and a base: - stringOne = String(millis(), DEC); - // prints "123456" or whatever the value of millis() is: - Serial.println(stringOne); - - // do nothing while true: - while(true); - -} diff --git a/build/linux/work/examples/08.Strings/StringIndexOf/StringIndexOf.ino b/build/linux/work/examples/08.Strings/StringIndexOf/StringIndexOf.ino deleted file mode 100644 index 76d0d1bf6..000000000 --- a/build/linux/work/examples/08.Strings/StringIndexOf/StringIndexOf.ino +++ /dev/null @@ -1,65 +0,0 @@ -/* - String indexOf() and lastIndexOf() functions - - Examples of how to evaluate, look for, and replace characters in a String - - created 27 July 2010 - modified 2 Apr 2012 - by Tom Igoe - - http://arduino.cc/en/Tutorial/StringIndexOf - - This example code is in the public domain. - */ - -void setup() { - // Open serial communications and wait for port to open: - Serial.begin(9600); - // this check is only needed on the Leonardo: - while (!Serial) ; - ; - - Serial.println("\n\nString indexOf() and lastIndexOf() functions:"); - -} - -void loop() { - // indexOf() returns the position (i.e. index) of a particular character - // in a string. For example, if you were parsing HTML tags, you could use it: - String stringOne = ""; - int firstClosingBracket = stringOne.indexOf('>'); - Serial.println("The index of > in the string " + stringOne + " is " + firstClosingBracket); - - stringOne = ""; - int secondOpeningBracket = firstClosingBracket + 1; - int secondClosingBracket = stringOne.indexOf('>', secondOpeningBracket ); - Serial.println("The index of the second > in the string " + stringOne + " is " + secondClosingBracket); - - // you can also use indexOf() to search for Strings: - stringOne = ""; - int bodyTag = stringOne.indexOf(""); - Serial.println("The index of the body tag in the string " + stringOne + " is " + bodyTag); - - stringOne = "
  • item
  • item
  • item
"; - int firstListItem = stringOne.indexOf("
  • "); - int secondListItem = stringOne.indexOf("item", firstListItem + 1 ); - Serial.println("The index of the second list item in the string " + stringOne + " is " + secondClosingBracket); - - // lastIndexOf() gives you the last occurrence of a character or string: - int lastOpeningBracket = stringOne.lastIndexOf('<'); - Serial.println("The index of the last < in the string " + stringOne + " is " + lastOpeningBracket); - - int lastListItem = stringOne.lastIndexOf("
  • "); - Serial.println("The index of the last list item in the string " + stringOne + " is " + lastListItem); - - - // lastIndexOf() can also search for a string: - stringOne = "

    Lorem ipsum dolor sit amet

    Ipsem

    Quod

    "; - int lastParagraph = stringOne.lastIndexOf(" 0) { - char inChar = Serial.read(); - txtMsg += inChar; - } - - // print the message and a notice if it's changed: - if (txtMsg.length() != lastStringLength) { - Serial.println(txtMsg); - Serial.println(txtMsg.length()); - // if the String's longer than 140 characters, complain: - if (txtMsg.length() < 140) { - Serial.println("That's a perfectly acceptable text message"); - } - else { - Serial.println("That's too long for a text message."); - } - // note the length for next time through the loop: - lastStringLength = txtMsg.length(); - } -} diff --git a/build/linux/work/examples/08.Strings/StringLengthTrim/StringLengthTrim.ino b/build/linux/work/examples/08.Strings/StringLengthTrim/StringLengthTrim.ino deleted file mode 100644 index 42ffb5a0d..000000000 --- a/build/linux/work/examples/08.Strings/StringLengthTrim/StringLengthTrim.ino +++ /dev/null @@ -1,40 +0,0 @@ -/* - String length() and trim() - - Examples of how to use length() and trim() in a String - - created 27 July 2010 - modified 2 Apr 2012 - by Tom Igoe - - http://arduino.cc/en/Tutorial/StringLengthTrim - - This example code is in the public domain. - */ - -void setup() { - // Open serial communications and wait for port to open: - Serial.begin(9600); - // this check is only needed on the Leonardo: - while (!Serial) ; - ; - - Serial.println("\n\nString length() and trim():"); -} - -void loop() { - // here's a String with empty spaces at the end (called white space): - String stringOne = "Hello! "; - Serial.print(stringOne); - Serial.print("<--- end of string. Length: "); - Serial.println(stringOne.length()); - - // trim the white space off the string: - stringOne.trim(); - Serial.print(stringOne); - Serial.print("<--- end of trimmed string. Length: "); - Serial.println(stringOne.length()); - - // do nothing while true: - while(true); -} diff --git a/build/linux/work/examples/08.Strings/StringReplace/.swp b/build/linux/work/examples/08.Strings/StringReplace/.swp deleted file mode 100644 index 45798ea67..000000000 Binary files a/build/linux/work/examples/08.Strings/StringReplace/.swp and /dev/null differ diff --git a/build/linux/work/examples/08.Strings/StringReplace/StringReplace.ino b/build/linux/work/examples/08.Strings/StringReplace/StringReplace.ino deleted file mode 100644 index cf41527c7..000000000 --- a/build/linux/work/examples/08.Strings/StringReplace/StringReplace.ino +++ /dev/null @@ -1,48 +0,0 @@ -/* - String replace() - - Examples of how to replace characters or substrings of a string - - created 27 July 2010 - modified 2 Apr 2012 - by Tom Igoe - - http://arduino.cc/en/Tutorial/StringReplace - - This example code is in the public domain. - */ - -void setup() { - // Open serial communications and wait for port to open: - Serial.begin(9600); - // this check is only needed on the Leonardo: - while (!Serial) ; - ; - - Serial.println("\n\nString replace:\n"); -} - -void loop() { - String stringOne = ""; - Serial.println(stringOne); - // replace() changes all instances of one substring with another: - // first, make a copy of th original string: - String stringTwo = stringOne; - // then perform the replacements: - stringTwo.replace("<", " 0) { - int inChar = Serial.read(); - if (isDigit(inChar)) { - // convert the incoming byte to a char - // and add it to the string: - inString += (char)inChar; - } - // if you get a newline, print the string, - // then the string's value: - if (inChar == '\n') { - Serial.print("Value:"); - Serial.println(inString.toInt()); - Serial.print("String: "); - Serial.println(inString); - // clear the string for new input: - inString = ""; - } - } -} - diff --git a/build/linux/work/examples/08.Strings/StringToIntRGB/StringToIntRGB.ino b/build/linux/work/examples/08.Strings/StringToIntRGB/StringToIntRGB.ino deleted file mode 100644 index 289209877..000000000 --- a/build/linux/work/examples/08.Strings/StringToIntRGB/StringToIntRGB.ino +++ /dev/null @@ -1,235 +0,0 @@ -/* - Serial RGB controller - - Reads a serial input string looking for three comma-separated - integers with a newline at the end. Values should be between - 0 and 255. The sketch uses those values to set the color - of an RGB LED attached to pins 9 - 11. - - The circuit: - * Common-anode RGB LED cathodes attached to pins 9 - 11 - * LED anode connected to pin 13 - - To turn on any given channel, set the pin LOW. - To turn off, set the pin HIGH. The higher the analogWrite level, - the lower the brightness. - - created 29 Nov 2010 - by Tom Igoe - - This example code is in the public domain. - */ - -String inString = ""; // string to hold input -int currentColor = 0; -int red, green, blue = 0; - -void setup() { - // Open serial communications and wait for port to open: - Serial.begin(9600); - // this check is only needed on the Leonardo: - while (!Serial) ; - ; - - Serial.println("\n\nString toInt() RGB:"); - // set LED cathode pins as outputs: - pinMode(9, OUTPUT); - pinMode(10, OUTPUT); - pinMode(11, OUTPUT); - // turn on pin 13 to power the LEDs: - pinMode(13, OUTPUT); - digitalWrite(13, HIGH); -} - -void loop() { - int inChar; - - // Read serial input: - if (Serial.available() > 0) { - inChar = Serial.read(); - } - - if (isDigit(inChar)) { - // convert the incoming byte to a char - // and add it to the string: - inString += (char)inChar; - } - - // if you get a comma, convert to a number, - // set the appropriate color, and increment - // the color counter: - if (inChar == ',') { - // do something different for each value of currentColor: - switch (currentColor) { - case 0: // 0 = red - red = inString.toInt(); - // clear the string for new input: - inString = ""; - break; - case 1: // 1 = green: - green = inString.toInt(); - // clear the string for new input: - inString = ""; - break; - } - currentColor++; - } - // if you get a newline, you know you've got - // the last color, i.e. blue: - if (inChar == '\n') { - blue = inString.toInt(); - - // set the levels of the LED. - // subtract value from 255 because a higher - // analogWrite level means a dimmer LED, since - // you're raising the level on the anode: - analogWrite(11, 255 - red); - analogWrite(9, 255 - green); - analogWrite(10, 255 - blue); - - // print the colors: - Serial.print("Red: "); - Serial.print(red); - Serial.print(", Green: "); - Serial.print(green); - Serial.print(", Blue: "); - Serial.println(blue); - - // clear the string for new input: - inString = ""; - // reset the color counter: - currentColor = 0; - - } - -} - - -/* -Here's a Processing sketch that will draw a color wheel and send a serial - string with the color you click on: - - // Subtractive Color Wheel with Serial - // Based on a Processing example by Ira Greenberg. - // Serial output added by Tom Igoe - // - // The primaries are red, yellow, and blue. The secondaries are green, - // purple, and orange. The tertiaries are yellow-orange, red-orange, - // red-purple, blue-purple, blue-green, and yellow-green. - // - // Create a shade or tint of the subtractive color wheel using - // SHADE or TINT parameters. - - // Updated 29 November 2010. - - - - import processing.serial.*; - - int segs = 12; - int steps = 6; - float rotAdjust = TWO_PI / segs / 2; - float radius; - float segWidth; - float interval = TWO_PI / segs; - - Serial myPort; - - void setup() { - size(200, 200); - background(127); - smooth(); - ellipseMode(RADIUS); - noStroke(); - // make the diameter 90% of the sketch area - radius = min(width, height) * 0.45; - segWidth = radius / steps; - - // swap which line is commented out to draw the other version - // drawTintWheel(); - drawShadeWheel(); - // open the first serial port in your computer's list - myPort = new Serial(this, Serial.list()[0], 9600); - } - - - void drawShadeWheel() { - for (int j = 0; j < steps; j++) { - color[] cols = { - color(255-(255/steps)*j, 255-(255/steps)*j, 0), - color(255-(255/steps)*j, (255/1.5)-((255/1.5)/steps)*j, 0), - color(255-(255/steps)*j, (255/2)-((255/2)/steps)*j, 0), - color(255-(255/steps)*j, (255/2.5)-((255/2.5)/steps)*j, 0), - color(255-(255/steps)*j, 0, 0), - color(255-(255/steps)*j, 0, (255/2)-((255/2)/steps)*j), - color(255-(255/steps)*j, 0, 255-(255/steps)*j), - color((255/2)-((255/2)/steps)*j, 0, 255-(255/steps)*j), - color(0, 0, 255-(255/steps)*j), - color(0, 255-(255/steps)*j, (255/2.5)-((255/2.5)/steps)*j), - color(0, 255-(255/steps)*j, 0), - color((255/2)-((255/2)/steps)*j, 255-(255/steps)*j, 0) - }; - for (int i = 0; i < segs; i++) { - fill(cols[i]); - arc(width/2, height/2, radius, radius, - interval*i+rotAdjust, interval*(i+1)+rotAdjust); - } - radius -= segWidth; - } - } - - - void drawTintWheel() { - for (int j = 0; j < steps; j++) { - color[] cols = { - color((255/steps)*j, (255/steps)*j, 0), - color((255/steps)*j, ((255/1.5)/steps)*j, 0), - color((255/steps)*j, ((255/2)/steps)*j, 0), - color((255/steps)*j, ((255/2.5)/steps)*j, 0), - color((255/steps)*j, 0, 0), - color((255/steps)*j, 0, ((255/2)/steps)*j), - color((255/steps)*j, 0, (255/steps)*j), - color(((255/2)/steps)*j, 0, (255/steps)*j), - color(0, 0, (255/steps)*j), - color(0, (255/steps)*j, ((255/2.5)/steps)*j), - color(0, (255/steps)*j, 0), - color(((255/2)/steps)*j, (255/steps)*j, 0) - }; - for (int i = 0; i < segs; i++) { - fill(cols[i]); - arc(width/2, height/2, radius, radius, - interval*i+rotAdjust, interval*(i+1)+rotAdjust); - } - radius -= segWidth; - } - } - - void draw() { - // nothing happens here - } - - void mouseReleased() { - // get the color of the mouse position's pixel: - color targetColor = get(mouseX, mouseY); - // get the component values: - int r = int(red(targetColor)); - int g = int(green(targetColor)); - int b = int(blue(targetColor)); - // make a comma-separated string: - String colorString = r + "," + g + "," + b + "\n"; - // send it out the serial port: - myPort.write(colorString ); - } - - - */ - - - - - - - - - - diff --git a/build/linux/work/examples/09. USB (Leonardo only)/Keyboard/KeyboardLogout/KeyboardLogout.ino b/build/linux/work/examples/09. USB (Leonardo only)/Keyboard/KeyboardLogout/KeyboardLogout.ino deleted file mode 100644 index adb502a34..000000000 --- a/build/linux/work/examples/09. USB (Leonardo only)/Keyboard/KeyboardLogout/KeyboardLogout.ino +++ /dev/null @@ -1,95 +0,0 @@ -/* - Keyboard logout - - This sketch demonstrates the Keyboard library. - - When you connect pin 2 to ground, it performs a logout. - It uses keyboard combinations to do this, as follows: - - On Windows, CTRL-ALT-DEL followed by ALT-l - On Ubuntu, CTRL-ALT-DEL, and ENTER - On OSX, CMD-SHIFT-q - - To wake: Spacebar. - - Circuit: - * Arduino Leonardo - * wire to connect D2 to ground. - - created 6 Mar 2012 - modified 27 Mar 2012 - by Tom Igoe - - This example is in the public domain - - http://www.arduino.cc/en/Tutorial/KeyboardLogout - */ - -#define OSX 0 -#define WINDOWS 1 -#define UBUNTU 2 - -// change this to match your platform: -int platform = OSX; - -void setup() { - // make pin 2 an input and turn on the - // pullup resistor so it goes high unless - // connected to ground: - pinMode(2, INPUT_PULLUP); - Keyboard.begin(); -} - -void loop() { - while (digitalRead(2) == HIGH) { - // do nothing until pin 2 goes low - delay(500); - } - delay(1000); - - switch (platform) { - case OSX: - Keyboard.press(KEY_LEFT_GUI); - // Shift-Q logs out: - Keyboard.press(KEY_LEFT_SHIFT); - Keyboard.press('Q'); - delay(100); - Keyboard.releaseAll(); - // enter: - Keyboard.write(KEY_RETURN); - break; - case WINDOWS: - // CTRL-ALT-DEL: - Keyboard.press(KEY_LEFT_CTRL); - Keyboard.press(KEY_LEFT_ALT); - Keyboard.press(KEY_DELETE); - delay(100); - Keyboard.releaseAll(); - //ALT-s: - delay(2000); - Keyboard.press(KEY_LEFT_ALT); - Keyboard.press('l'); - Keyboard.releaseAll(); - break; - case UBUNTU: - // CTRL-ALT-DEL: - Keyboard.press(KEY_LEFT_CTRL); - Keyboard.press(KEY_LEFT_ALT); - Keyboard.press(KEY_DELETE); - delay(1000); - Keyboard.releaseAll(); - // Enter to confirm logout: - Keyboard.write(KEY_RETURN); - break; - } -// do nothing: - while(true); -} - - - - - - - - diff --git a/build/linux/work/examples/09. USB (Leonardo only)/Keyboard/KeyboardMessage/KeyboardMessage.ino b/build/linux/work/examples/09. USB (Leonardo only)/Keyboard/KeyboardMessage/KeyboardMessage.ino deleted file mode 100644 index 6b226b558..000000000 --- a/build/linux/work/examples/09. USB (Leonardo only)/Keyboard/KeyboardMessage/KeyboardMessage.ino +++ /dev/null @@ -1,47 +0,0 @@ -/* - Keyboard Button test - - Sends a text string when a button is pressed. - - The circuit: - * pushbutton attached from pin 2 to +5V - * 10-kilohm resistor attached from pin 4 to ground - - created 24 Oct 2011 - modified 27 Mar 2012 - by Tom Igoe - - This example code is in the public domain. - - http://www.arduino.cc/en/Tutorial/KeyboardButton - */ - -const int buttonPin = 2; // input pin for pushbutton -int previousButtonState = HIGH; // for checking the state of a pushButton -int counter = 0; // button push counter - -void setup() { - // make the pushButton pin an input: - pinMode(buttonPin, INPUT); - // initialize control over the keyboard: - Keyboard.begin(); -} - -void loop() { - // read the pushbutton: - int buttonState = digitalRead(buttonPin); - // if the button state has changed, - if ((buttonState != previousButtonState) - // and it's currently pressed: - && (buttonState == HIGH)) { - // increment the button counter - counter++; - // type out a message - Keyboard.print("You pressed the button "); - Keyboard.print(counter); - Keyboard.println(" times."); - } - // save the current button state for comparison next time: - previousButtonState = buttonState; -} - diff --git a/build/linux/work/examples/09. USB (Leonardo only)/Keyboard/KeyboardReprogram/KeyboardReprogram.ino b/build/linux/work/examples/09. USB (Leonardo only)/Keyboard/KeyboardReprogram/KeyboardReprogram.ino deleted file mode 100644 index 07529bf90..000000000 --- a/build/linux/work/examples/09. USB (Leonardo only)/Keyboard/KeyboardReprogram/KeyboardReprogram.ino +++ /dev/null @@ -1,95 +0,0 @@ -/* - Arduino Programs Blink - - This sketch demonstrates the Keyboard library. - - When you connect pin 2 to ground, it creates a new - window with a key combination (CTRL-N), - then types in the Blink sketch, then auto-formats the text - using another key combination (CTRL-T), then - uploads the sketch to the currently selected Arduino using - a final key combination (CTRL-U). - - Circuit: - * Arduino Leonardo - * wire to connect D2 to ground. - - created 5 Mar 2012 - modified 29 Mar 2012 - by Tom Igoe - - This example is in the public domain - - http://www.arduino.cc/en/Tutorial/KeyboardReprogram - */ - -// use this option for OSX. -// Comment it out if using Windows or Linux: -char ctrlKey = KEY_LEFT_GUI; -// use this option for Windows and Linux. -// leave commented out if using OSX: -// char ctrlKey = KEY_LEFT_CTRL; - - -void setup() { - // make pin 2 an input and turn on the - // pullup resistor so it goes high unless - // connected to ground: - pinMode(2, INPUT_PULLUP); - // initialize control over the keyboard: - Keyboard.begin(); -} - -void loop() { - while (digitalRead(2) == HIGH) { - // do nothing until pin 2 goes low - delay(500); - } - delay(1000); - // new document: - Keyboard.press(ctrlKey); - Keyboard.press('n'); - delay(100); - Keyboard.releaseAll(); - // wait for new window to open: - delay(1000); - - // Type out "blink": - Keyboard.println("void setup() {"); - Keyboard.println("pinMode(13, OUTPUT);"); - Keyboard.println("}"); - Keyboard.println(); - Keyboard.println("void loop() {"); - Keyboard.println("digitalWrite(13, HIGH);"); - Keyboard.print("delay(3000);"); - // 3000 ms is too long. Delete it: - for (int keystrokes=0; keystrokes < 6; keystrokes++) { - delay(500); - Keyboard.write(KEY_BACKSPACE); - } - // make it 1000 instead: - Keyboard.println("1000);"); - Keyboard.println("digitalWrite(13, LOW);"); - Keyboard.println("delay(1000);"); - Keyboard.println("}"); - // tidy up: - Keyboard.press(ctrlKey); - Keyboard.press('t'); - delay(100); - Keyboard.releaseAll(); - delay(3000); - // upload code: - Keyboard.press(ctrlKey); - Keyboard.press('u'); - delay(100); - Keyboard.releaseAll(); - - // wait for the sweet oblivion of reprogramming: - while(true); -} - - - - - - diff --git a/build/linux/work/examples/09. USB (Leonardo only)/Keyboard/KeyboardSerial/KeyboardSerial.ino b/build/linux/work/examples/09. USB (Leonardo only)/Keyboard/KeyboardSerial/KeyboardSerial.ino deleted file mode 100644 index 7ee7f7ad7..000000000 --- a/build/linux/work/examples/09. USB (Leonardo only)/Keyboard/KeyboardSerial/KeyboardSerial.ino +++ /dev/null @@ -1,36 +0,0 @@ -/* - Keyboard test - - Reads a byte from the serial port, sends a keystroke back. - The sent keystroke is one higher than what's received, e.g. - if you send a, you get b, send A you get B, and so forth. - - The circuit: - * none - - created 21 Oct 2011 - modified 27 Mar 2012 - by Tom Igoe - -This example code is in the public domain. - - http://www.arduino.cc/en/Tutorial/KeyboardSerial - */ - -void setup() { - // open the serial port: -Serial.begin(9600); - // initialize control over the keyboard: - Keyboard.begin(); -} - -void loop() { - // check for incoming serial data: - if (Serial.available() > 0) { - // read incoming serial data: - char inChar = Serial.read(); - // Type the next ASCII value from what you received: - Keyboard.write(inChar+1); - } -} - diff --git a/build/linux/work/examples/09. USB (Leonardo only)/KeyboardAndMouseControl/KeyboardAndMouseControl.ino b/build/linux/work/examples/09. USB (Leonardo only)/KeyboardAndMouseControl/KeyboardAndMouseControl.ino deleted file mode 100644 index bdd722ca2..000000000 --- a/build/linux/work/examples/09. USB (Leonardo only)/KeyboardAndMouseControl/KeyboardAndMouseControl.ino +++ /dev/null @@ -1,94 +0,0 @@ - -/* - KeyboardAndMouseControl - - Controls the mouse from five pushbuttons on an Arduino Leonardo. - - Hardware: - * 5 pushbuttons attached to D2, D3, D4, D5, D6 - - - The mouse movement is always relative. This sketch reads - four pushbuttons, and uses them to set the movement of the mouse. - - WARNING: When you use the Mouse.move() command, the Arduino takes - over your mouse! Make sure you have control before you use the mouse commands. - - created 15 Mar 2012 - modified 27 Mar 2012 - by Tom Igoe - - this code is in the public domain - - */ - -// set pin numbers for the five buttons: - -// set pin numbers for the five buttons: -const int upButton = 2; -const int downButton = 3; -const int leftButton = 4; -const int rightButton = 5; -const int mouseButton = 6; - -void setup() { // initialize the buttons' inputs: - pinMode(upButton, INPUT); - pinMode(downButton, INPUT); - pinMode(leftButton, INPUT); - pinMode(rightButton, INPUT); - pinMode(mouseButton, INPUT); - - Serial.begin(9600); - // initialize mouse control: - Mouse.begin(); - Keyboard.begin(); -} - -void loop() { - // use serial input to control the mouse: - if (Serial.available() > 0) { - char inChar = Serial.read(); - - switch (inChar) { - case 'u': - // move mouse up - Mouse.move(0, -40); - break; - case 'd': - // move mouse down - Mouse.move(0, 40); - break; - case 'l': - // move mouse left - Mouse.move(-40, 0); - break; - case 'r': - // move mouse right - Mouse.move(40, 0); - break; - case 'm': - // move mouse right - Mouse.click(MOUSE_LEFT); - break; - } - } - - // use the pushbuttons to control the keyboard: - if (digitalRead(upButton) == HIGH) { - Keyboard.write('u'); - } - if (digitalRead(downButton) == HIGH) { - Keyboard.write('d'); - } - if (digitalRead(leftButton) == HIGH) { - Keyboard.write('l'); - } - if (digitalRead(rightButton) == HIGH) { - Keyboard.write('r'); - } - if (digitalRead(mouseButton) == HIGH) { - Keyboard.write('m'); - } - -} - diff --git a/build/linux/work/examples/09. USB (Leonardo only)/Mouse/ButtonMouseControl/ButtonMouseControl.ino b/build/linux/work/examples/09. USB (Leonardo only)/Mouse/ButtonMouseControl/ButtonMouseControl.ino deleted file mode 100644 index 6dcaf5cdd..000000000 --- a/build/linux/work/examples/09. USB (Leonardo only)/Mouse/ButtonMouseControl/ButtonMouseControl.ino +++ /dev/null @@ -1,81 +0,0 @@ - -/* - ButtonMouseControl - - Controls the mouse from five pushbuttons on an Arduino Leonardo. - - Hardware: - * 5 pushbuttons attached to D2, D3, D4, D5, D6 - - - The mouse movement is always relative. This sketch reads - four pushbuttons, and uses them to set the movement of the mouse. - - WARNING: When you use the Mouse.move() command, the Arduino takes - over your mouse! Make sure you have control before you use the mouse commands. - - created 15 Mar 2012 - modified 27 Mar 2012 - by Tom Igoe - - this code is in the public domain - - */ - -// set pin numbers for the five buttons: -const int upButton = 2; -const int downButton = 3; -const int leftButton = 4; -const int rightButton = 5; -const int mouseButton = 6; - -int range = 5; // output range of X or Y movement; affects movement speed -int responseDelay = 10; // response delay of the mouse, in ms - - -void setup() { - // initialize the buttons' inputs: - pinMode(upButton, INPUT); - pinMode(downButton, INPUT); - pinMode(leftButton, INPUT); - pinMode(rightButton, INPUT); - pinMode(mouseButton, INPUT); - // initialize mouse control: - Mouse.begin(); -} - -void loop() { - // read the buttons: - int upState = digitalRead(upButton); - int downState = digitalRead(downButton); - int rightState = digitalRead(rightButton); - int leftState = digitalRead(leftButton); - int clickState = digitalRead(mouseButton); - - // calculate the movement distance based on the button states: - int xDistance = (leftState - rightState)*range; - int yDistance = (upState - downState)*range; - - // if X or Y is non-zero, move: - if ((xDistance != 0) || (yDistance != 0)) { - Mouse.move(xDistance, yDistance, 0); - } - - // if the mouse button is pressed: - if (clickState == HIGH) { - // if the mouse is not pressed, press it: - if (!Mouse.isPressed(MOUSE_LEFT)) { - Mouse.press(MOUSE_LEFT); - } - } - // else the mouse button is not pressed: - else { - // if the mouse is pressed, release it: - if (Mouse.isPressed(MOUSE_LEFT)) { - Mouse.release(MOUSE_LEFT); - } - } - - // a delay so the mouse doesn't move too fast: - delay(responseDelay); -} diff --git a/build/linux/work/examples/09. USB (Leonardo only)/Mouse/JoystickMouseControl/JoystickMouseControl.ino b/build/linux/work/examples/09. USB (Leonardo only)/Mouse/JoystickMouseControl/JoystickMouseControl.ino deleted file mode 100644 index 5f69c707b..000000000 --- a/build/linux/work/examples/09. USB (Leonardo only)/Mouse/JoystickMouseControl/JoystickMouseControl.ino +++ /dev/null @@ -1,121 +0,0 @@ -/* - JoystickMouseControl - - Controls the mouse from a joystick on an Arduino Leonardo. - Uses a pushbutton to turn on and off mouse control, and - a second pushbutton to click the left mouse button - - Hardware: - * 2-axis joystick connected to pins A0 and A1 - * pushbuttons connected to pin D2 and D3 - - The mouse movement is always relative. This sketch reads - two analog inputs that range from 0 to 1023 (or less on either end) - and translates them into ranges of -6 to 6. - The sketch assumes that the joystick resting values are around the - middle of the range, but that they vary within a threshold. - - WARNING: When you use the Mouse.move() command, the Arduino takes - over your mouse! Make sure you have control before you use the command. - This sketch includes a pushbutton to toggle the mouse control state, so - you can turn on and off mouse control. - - created 15 Sept 2011 - updated 28 Mar 2012 - by Tom Igoe - - this code is in the public domain - - */ - -// set pin numbers for switch, joystick axes, and LED: -const int switchPin = 2; // switch to turn on and off mouse control -const int mouseButton = 3; // input pin for the mouse pushButton -const int xAxis = A0; // joystick X axis -const int yAxis = A1; // joystick Y axis -const int ledPin = 5; // Mouse control LED - -// parameters for reading the joystick: -int range = 12; // output range of X or Y movement -int responseDelay = 5; // response delay of the mouse, in ms -int threshold = range/4; // resting threshold -int center = range/2; // resting position value - -boolean mouseIsActive = false; // whether or not to control the mouse -int lastSwitchState = LOW; // previous switch state - -void setup() { - pinMode(switchPin, INPUT); // the switch pin - pinMode(ledPin, OUTPUT); // the LED pin - // take control of the mouse: - Mouse.begin(); -} - -void loop() { - // read the switch: - int switchState = digitalRead(switchPin); - // if it's changed and it's high, toggle the mouse state: - if (switchState != lastSwitchState) { - if (switchState == HIGH) { - mouseIsActive = !mouseIsActive; - // turn on LED to indicate mouse state: - digitalWrite(ledPin, mouseIsActive); - } - } - // save switch state for next comparison: - lastSwitchState = switchState; - - // read and scale the two axes: - int xReading = readAxis(A0); - int yReading = readAxis(A1); - - // if the mouse control state is active, move the mouse: - if (mouseIsActive) { - Mouse.move(xReading, yReading, 0); - } - - // read the mouse button and click or not click: - // if the mouse button is pressed: - if (digitalRead(mouseButton) == HIGH) { - // if the mouse is not pressed, press it: - if (!Mouse.isPressed(MOUSE_LEFT)) { - Mouse.press(MOUSE_LEFT); - } - } - // else the mouse button is not pressed: - else { - // if the mouse is pressed, release it: - if (Mouse.isPressed(MOUSE_LEFT)) { - Mouse.release(MOUSE_LEFT); - } - } - - delay(responseDelay); -} - -/* - reads an axis (0 or 1 for x or y) and scales the - analog input range to a range from 0 to - */ - -int readAxis(int thisAxis) { - // read the analog input: - int reading = analogRead(thisAxis); - - // map the reading from the analog input range to the output range: - reading = map(reading, 0, 1023, 0, range); - - // if the output reading is outside from the - // rest position threshold, use it: - int distance = reading - center; - - if (abs(distance) < threshold) { - distance = 0; - } - - // return the distance for this axis: - return distance; -} - - - diff --git a/build/linux/work/examples/ArduinoISP/ArduinoISP.ino b/build/linux/work/examples/ArduinoISP/ArduinoISP.ino deleted file mode 100644 index 9ed0bc7df..000000000 --- a/build/linux/work/examples/ArduinoISP/ArduinoISP.ino +++ /dev/null @@ -1,554 +0,0 @@ -// ArduinoISP version 04m3 -// Copyright (c) 2008-2011 Randall Bohn -// If you require a license, see -// http://www.opensource.org/licenses/bsd-license.php -// -// This sketch turns the Arduino into a AVRISP -// using the following arduino pins: -// -// pin name: not-mega: mega(1280 and 2560) -// slave reset: 10: 53 -// MOSI: 11: 51 -// MISO: 12: 50 -// SCK: 13: 52 -// -// Put an LED (with resistor) on the following pins: -// 9: Heartbeat - shows the programmer is running -// 8: Error - Lights up if something goes wrong (use red if that makes sense) -// 7: Programming - In communication with the slave -// -// 23 July 2011 Randall Bohn -// -Address Arduino issue 509 :: Portability of ArduinoISP -// http://code.google.com/p/arduino/issues/detail?id=509 -// -// October 2010 by Randall Bohn -// - Write to EEPROM > 256 bytes -// - Better use of LEDs: -// -- Flash LED_PMODE on each flash commit -// -- Flash LED_PMODE while writing EEPROM (both give visual feedback of writing progress) -// - Light LED_ERR whenever we hit a STK_NOSYNC. Turn it off when back in sync. -// - Use pins_arduino.h (should also work on Arduino Mega) -// -// October 2009 by David A. Mellis -// - Added support for the read signature command -// -// February 2009 by Randall Bohn -// - Added support for writing to EEPROM (what took so long?) -// Windows users should consider WinAVR's avrdude instead of the -// avrdude included with Arduino software. -// -// January 2008 by Randall Bohn -// - Thanks to Amplificar for helping me with the STK500 protocol -// - The AVRISP/STK500 (mk I) protocol is used in the arduino bootloader -// - The SPI functions herein were developed for the AVR910_ARD programmer -// - More information at http://code.google.com/p/mega-isp - -#include "pins_arduino.h" -#define RESET SS - -#define LED_HB 9 -#define LED_ERR 8 -#define LED_PMODE 7 -#define PROG_FLICKER true - -#define HWVER 2 -#define SWMAJ 1 -#define SWMIN 18 - -// STK Definitions -#define STK_OK 0x10 -#define STK_FAILED 0x11 -#define STK_UNKNOWN 0x12 -#define STK_INSYNC 0x14 -#define STK_NOSYNC 0x15 -#define CRC_EOP 0x20 //ok it is a space... - -void pulse(int pin, int times); - -void setup() { - Serial.begin(19200); - pinMode(LED_PMODE, OUTPUT); - pulse(LED_PMODE, 2); - pinMode(LED_ERR, OUTPUT); - pulse(LED_ERR, 2); - pinMode(LED_HB, OUTPUT); - pulse(LED_HB, 2); -} - -int error=0; -int pmode=0; -// address for reading and writing, set by 'U' command -int here; -uint8_t buff[256]; // global block storage - -#define beget16(addr) (*addr * 256 + *(addr+1) ) -typedef struct param { - uint8_t devicecode; - uint8_t revision; - uint8_t progtype; - uint8_t parmode; - uint8_t polling; - uint8_t selftimed; - uint8_t lockbytes; - uint8_t fusebytes; - int flashpoll; - int eeprompoll; - int pagesize; - int eepromsize; - int flashsize; -} -parameter; - -parameter param; - -// this provides a heartbeat on pin 9, so you can tell the software is running. -uint8_t hbval=128; -int8_t hbdelta=8; -void heartbeat() { - if (hbval > 192) hbdelta = -hbdelta; - if (hbval < 32) hbdelta = -hbdelta; - hbval += hbdelta; - analogWrite(LED_HB, hbval); - delay(20); -} - - -void loop(void) { - // is pmode active? - if (pmode) digitalWrite(LED_PMODE, HIGH); - else digitalWrite(LED_PMODE, LOW); - // is there an error? - if (error) digitalWrite(LED_ERR, HIGH); - else digitalWrite(LED_ERR, LOW); - - // light the heartbeat LED - heartbeat(); - if (Serial.available()) { - avrisp(); - } -} - -uint8_t getch() { - while(!Serial.available()); - return Serial.read(); -} -void fill(int n) { - for (int x = 0; x < n; x++) { - buff[x] = getch(); - } -} - -#define PTIME 30 -void pulse(int pin, int times) { - do { - digitalWrite(pin, HIGH); - delay(PTIME); - digitalWrite(pin, LOW); - delay(PTIME); - } - while (times--); -} - -void prog_lamp(int state) { - if (PROG_FLICKER) - digitalWrite(LED_PMODE, state); -} - -void spi_init() { - uint8_t x; - SPCR = 0x53; - x=SPSR; - x=SPDR; -} - -void spi_wait() { - do { - } - while (!(SPSR & (1 << SPIF))); -} - -uint8_t spi_send(uint8_t b) { - uint8_t reply; - SPDR=b; - spi_wait(); - reply = SPDR; - return reply; -} - -uint8_t spi_transaction(uint8_t a, uint8_t b, uint8_t c, uint8_t d) { - uint8_t n; - spi_send(a); - n=spi_send(b); - //if (n != a) error = -1; - n=spi_send(c); - return spi_send(d); -} - -void empty_reply() { - if (CRC_EOP == getch()) { - Serial.print((char)STK_INSYNC); - Serial.print((char)STK_OK); - } - else { - error++; - Serial.print((char)STK_NOSYNC); - } -} - -void breply(uint8_t b) { - if (CRC_EOP == getch()) { - Serial.print((char)STK_INSYNC); - Serial.print((char)b); - Serial.print((char)STK_OK); - } - else { - error++; - Serial.print((char)STK_NOSYNC); - } -} - -void get_version(uint8_t c) { - switch(c) { - case 0x80: - breply(HWVER); - break; - case 0x81: - breply(SWMAJ); - break; - case 0x82: - breply(SWMIN); - break; - case 0x93: - breply('S'); // serial programmer - break; - default: - breply(0); - } -} - -void set_parameters() { - // call this after reading paramter packet into buff[] - param.devicecode = buff[0]; - param.revision = buff[1]; - param.progtype = buff[2]; - param.parmode = buff[3]; - param.polling = buff[4]; - param.selftimed = buff[5]; - param.lockbytes = buff[6]; - param.fusebytes = buff[7]; - param.flashpoll = buff[8]; - // ignore buff[9] (= buff[8]) - // following are 16 bits (big endian) - param.eeprompoll = beget16(&buff[10]); - param.pagesize = beget16(&buff[12]); - param.eepromsize = beget16(&buff[14]); - - // 32 bits flashsize (big endian) - param.flashsize = buff[16] * 0x01000000 - + buff[17] * 0x00010000 - + buff[18] * 0x00000100 - + buff[19]; - -} - -void start_pmode() { - spi_init(); - // following delays may not work on all targets... - pinMode(RESET, OUTPUT); - digitalWrite(RESET, HIGH); - pinMode(SCK, OUTPUT); - digitalWrite(SCK, LOW); - delay(50); - digitalWrite(RESET, LOW); - delay(50); - pinMode(MISO, INPUT); - pinMode(MOSI, OUTPUT); - spi_transaction(0xAC, 0x53, 0x00, 0x00); - pmode = 1; -} - -void end_pmode() { - pinMode(MISO, INPUT); - pinMode(MOSI, INPUT); - pinMode(SCK, INPUT); - pinMode(RESET, INPUT); - pmode = 0; -} - -void universal() { - int w; - uint8_t ch; - - fill(4); - ch = spi_transaction(buff[0], buff[1], buff[2], buff[3]); - breply(ch); -} - -void flash(uint8_t hilo, int addr, uint8_t data) { - spi_transaction(0x40+8*hilo, - addr>>8 & 0xFF, - addr & 0xFF, - data); -} -void commit(int addr) { - if (PROG_FLICKER) prog_lamp(LOW); - spi_transaction(0x4C, (addr >> 8) & 0xFF, addr & 0xFF, 0); - if (PROG_FLICKER) { - delay(PTIME); - prog_lamp(HIGH); - } -} - -//#define _current_page(x) (here & 0xFFFFE0) -int current_page(int addr) { - if (param.pagesize == 32) return here & 0xFFFFFFF0; - if (param.pagesize == 64) return here & 0xFFFFFFE0; - if (param.pagesize == 128) return here & 0xFFFFFFC0; - if (param.pagesize == 256) return here & 0xFFFFFF80; - return here; -} - - -void write_flash(int length) { - fill(length); - if (CRC_EOP == getch()) { - Serial.print((char) STK_INSYNC); - Serial.print((char) write_flash_pages(length)); - } - else { - error++; - Serial.print((char) STK_NOSYNC); - } -} - -uint8_t write_flash_pages(int length) { - int x = 0; - int page = current_page(here); - while (x < length) { - if (page != current_page(here)) { - commit(page); - page = current_page(here); - } - flash(LOW, here, buff[x++]); - flash(HIGH, here, buff[x++]); - here++; - } - - commit(page); - - return STK_OK; -} - -#define EECHUNK (32) -uint8_t write_eeprom(int length) { - // here is a word address, get the byte address - int start = here * 2; - int remaining = length; - if (length > param.eepromsize) { - error++; - return STK_FAILED; - } - while (remaining > EECHUNK) { - write_eeprom_chunk(start, EECHUNK); - start += EECHUNK; - remaining -= EECHUNK; - } - write_eeprom_chunk(start, remaining); - return STK_OK; -} -// write (length) bytes, (start) is a byte address -uint8_t write_eeprom_chunk(int start, int length) { - // this writes byte-by-byte, - // page writing may be faster (4 bytes at a time) - fill(length); - prog_lamp(LOW); - for (int x = 0; x < length; x++) { - int addr = start+x; - spi_transaction(0xC0, (addr>>8) & 0xFF, addr & 0xFF, buff[x]); - delay(45); - } - prog_lamp(HIGH); - return STK_OK; -} - -void program_page() { - char result = (char) STK_FAILED; - int length = 256 * getch(); - length += getch(); - char memtype = getch(); - // flash memory @here, (length) bytes - if (memtype == 'F') { - write_flash(length); - return; - } - if (memtype == 'E') { - result = (char)write_eeprom(length); - if (CRC_EOP == getch()) { - Serial.print((char) STK_INSYNC); - Serial.print(result); - } - else { - error++; - Serial.print((char) STK_NOSYNC); - } - return; - } - Serial.print((char)STK_FAILED); - return; -} - -uint8_t flash_read(uint8_t hilo, int addr) { - return spi_transaction(0x20 + hilo * 8, - (addr >> 8) & 0xFF, - addr & 0xFF, - 0); -} - -char flash_read_page(int length) { - for (int x = 0; x < length; x+=2) { - uint8_t low = flash_read(LOW, here); - Serial.print((char) low); - uint8_t high = flash_read(HIGH, here); - Serial.print((char) high); - here++; - } - return STK_OK; -} - -char eeprom_read_page(int length) { - // here again we have a word address - int start = here * 2; - for (int x = 0; x < length; x++) { - int addr = start + x; - uint8_t ee = spi_transaction(0xA0, (addr >> 8) & 0xFF, addr & 0xFF, 0xFF); - Serial.print((char) ee); - } - return STK_OK; -} - -void read_page() { - char result = (char)STK_FAILED; - int length = 256 * getch(); - length += getch(); - char memtype = getch(); - if (CRC_EOP != getch()) { - error++; - Serial.print((char) STK_NOSYNC); - return; - } - Serial.print((char) STK_INSYNC); - if (memtype == 'F') result = flash_read_page(length); - if (memtype == 'E') result = eeprom_read_page(length); - Serial.print(result); - return; -} - -void read_signature() { - if (CRC_EOP != getch()) { - error++; - Serial.print((char) STK_NOSYNC); - return; - } - Serial.print((char) STK_INSYNC); - uint8_t high = spi_transaction(0x30, 0x00, 0x00, 0x00); - Serial.print((char) high); - uint8_t middle = spi_transaction(0x30, 0x00, 0x01, 0x00); - Serial.print((char) middle); - uint8_t low = spi_transaction(0x30, 0x00, 0x02, 0x00); - Serial.print((char) low); - Serial.print((char) STK_OK); -} -////////////////////////////////////////// -////////////////////////////////////////// - - -//////////////////////////////////// -//////////////////////////////////// -int avrisp() { - uint8_t data, low, high; - uint8_t ch = getch(); - switch (ch) { - case '0': // signon - error = 0; - empty_reply(); - break; - case '1': - if (getch() == CRC_EOP) { - Serial.print((char) STK_INSYNC); - Serial.print("AVR ISP"); - Serial.print((char) STK_OK); - } - break; - case 'A': - get_version(getch()); - break; - case 'B': - fill(20); - set_parameters(); - empty_reply(); - break; - case 'E': // extended parameters - ignore for now - fill(5); - empty_reply(); - break; - - case 'P': - start_pmode(); - empty_reply(); - break; - case 'U': // set address (word) - here = getch(); - here += 256 * getch(); - empty_reply(); - break; - - case 0x60: //STK_PROG_FLASH - low = getch(); - high = getch(); - empty_reply(); - break; - case 0x61: //STK_PROG_DATA - data = getch(); - empty_reply(); - break; - - case 0x64: //STK_PROG_PAGE - program_page(); - break; - - case 0x74: //STK_READ_PAGE 't' - read_page(); - break; - - case 'V': //0x56 - universal(); - break; - case 'Q': //0x51 - error=0; - end_pmode(); - empty_reply(); - break; - - case 0x75: //STK_READ_SIGN 'u' - read_signature(); - break; - - // expecting a command, not CRC_EOP - // this is how we can get back in sync - case CRC_EOP: - error++; - Serial.print((char) STK_NOSYNC); - break; - - // anything else we will return STK_UNKNOWN - default: - error++; - if (CRC_EOP == getch()) - Serial.print((char)STK_UNKNOWN); - else - Serial.print((char)STK_NOSYNC); - } -} - - - diff --git a/build/linux/work/hardware/arduino/boards.txt b/build/linux/work/hardware/arduino/boards.txt deleted file mode 100644 index 710ae275d..000000000 --- a/build/linux/work/hardware/arduino/boards.txt +++ /dev/null @@ -1,477 +0,0 @@ -# See: http://code.google.com/p/arduino/wiki/Platforms - -############################################################## - -uno.name=Arduino Uno -uno.upload.protocol=arduino -uno.upload.maximum_size=32256 -uno.upload.speed=115200 -uno.bootloader.low_fuses=0xff -uno.bootloader.high_fuses=0xde -uno.bootloader.extended_fuses=0x05 -uno.bootloader.path=optiboot -uno.bootloader.file=optiboot_atmega328.hex -uno.bootloader.unlock_bits=0x3F -uno.bootloader.lock_bits=0x0F -uno.build.mcu=atmega328p -uno.build.f_cpu=16000000L -uno.build.core=arduino -uno.build.variant=standard - -############################################################## - -atmega328.name=Arduino Duemilanove w/ ATmega328 - -atmega328.upload.protocol=arduino -atmega328.upload.maximum_size=30720 -atmega328.upload.speed=57600 - -atmega328.bootloader.low_fuses=0xFF -atmega328.bootloader.high_fuses=0xDA -atmega328.bootloader.extended_fuses=0x05 -atmega328.bootloader.path=atmega -atmega328.bootloader.file=ATmegaBOOT_168_atmega328.hex -atmega328.bootloader.unlock_bits=0x3F -atmega328.bootloader.lock_bits=0x0F - -atmega328.build.mcu=atmega328p -atmega328.build.f_cpu=16000000L -atmega328.build.core=arduino -atmega328.build.variant=standard - -############################################################## - -diecimila.name=Arduino Diecimila or Duemilanove w/ ATmega168 - -diecimila.upload.protocol=arduino -diecimila.upload.maximum_size=14336 -diecimila.upload.speed=19200 - -diecimila.bootloader.low_fuses=0xff -diecimila.bootloader.high_fuses=0xdd -diecimila.bootloader.extended_fuses=0x00 -diecimila.bootloader.path=atmega -diecimila.bootloader.file=ATmegaBOOT_168_diecimila.hex -diecimila.bootloader.unlock_bits=0x3F -diecimila.bootloader.lock_bits=0x0F - -diecimila.build.mcu=atmega168 -diecimila.build.f_cpu=16000000L -diecimila.build.core=arduino -diecimila.build.variant=standard - -############################################################## - -nano328.name=Arduino Nano w/ ATmega328 - -nano328.upload.protocol=arduino -nano328.upload.maximum_size=30720 -nano328.upload.speed=57600 - -nano328.bootloader.low_fuses=0xFF -nano328.bootloader.high_fuses=0xDA -nano328.bootloader.extended_fuses=0x05 -nano328.bootloader.path=atmega -nano328.bootloader.file=ATmegaBOOT_168_atmega328.hex -nano328.bootloader.unlock_bits=0x3F -nano328.bootloader.lock_bits=0x0F - -nano328.build.mcu=atmega328p -nano328.build.f_cpu=16000000L -nano328.build.core=arduino -nano328.build.variant=eightanaloginputs - -############################################################## - -nano.name=Arduino Nano w/ ATmega168 - -nano.upload.protocol=arduino -nano.upload.maximum_size=14336 -nano.upload.speed=19200 - -nano.bootloader.low_fuses=0xff -nano.bootloader.high_fuses=0xdd -nano.bootloader.extended_fuses=0x00 -nano.bootloader.path=atmega -nano.bootloader.file=ATmegaBOOT_168_diecimila.hex -nano.bootloader.unlock_bits=0x3F -nano.bootloader.lock_bits=0x0F - -nano.build.mcu=atmega168 -nano.build.f_cpu=16000000L -nano.build.core=arduino -nano.build.variant=eightanaloginputs - -############################################################## - -mega2560.name=Arduino Mega 2560 or Mega ADK - -mega2560.upload.protocol=stk500v2 -mega2560.upload.maximum_size=258048 -mega2560.upload.speed=115200 - -mega2560.bootloader.low_fuses=0xFF -mega2560.bootloader.high_fuses=0xD8 -mega2560.bootloader.extended_fuses=0xFD -mega2560.bootloader.path=stk500v2 -mega2560.bootloader.file=stk500boot_v2_mega2560.hex -mega2560.bootloader.unlock_bits=0x3F -mega2560.bootloader.lock_bits=0x0F - -mega2560.build.mcu=atmega2560 -mega2560.build.f_cpu=16000000L -mega2560.build.core=arduino -mega2560.build.variant=mega - -############################################################## - -mega.name=Arduino Mega (ATmega1280) - -mega.upload.protocol=arduino -mega.upload.maximum_size=126976 -mega.upload.speed=57600 - -mega.bootloader.low_fuses=0xFF -mega.bootloader.high_fuses=0xDA -mega.bootloader.extended_fuses=0xF5 -mega.bootloader.path=atmega -mega.bootloader.file=ATmegaBOOT_168_atmega1280.hex -mega.bootloader.unlock_bits=0x3F -mega.bootloader.lock_bits=0x0F - -mega.build.mcu=atmega1280 -mega.build.f_cpu=16000000L -mega.build.core=arduino -mega.build.variant=mega - -############################################################## - -leonardo.name=Arduino Leonardo -leonardo.upload.protocol=avr109 -leonardo.upload.maximum_size=28672 -leonardo.upload.speed=57600 -leonardo.upload.disable_flushing=true -leonardo.bootloader.low_fuses=0xff -leonardo.bootloader.high_fuses=0xd8 -leonardo.bootloader.extended_fuses=0xcb -leonardo.bootloader.path=caterina -leonardo.bootloader.file=Caterina.hex -leonardo.bootloader.unlock_bits=0x3F -leonardo.bootloader.lock_bits=0x2F -leonardo.build.mcu=atmega32u4 -leonardo.build.f_cpu=16000000L -leonardo.build.core=arduino -leonardo.build.variant=leonardo - -############################################################## - -#micro.name=Arduino Micro -#micro.upload.protocol=arduino -#micro.upload.maximum_size=30720 -#micro.upload.speed=1200 -#micro.bootloader.low_fuses=0xde -#micro.bootloader.high_fuses=0xda -#micro.bootloader.extended_fuses=0xcb -#micro.bootloader.path=caterina -#micro.bootloader.file=Caterina-Micro.hex -#micro.bootloader.unlock_bits=0x3F -#micro.bootloader.lock_bits=0x2F -#micro.build.mcu=atmega32u4 -#micro.build.f_cpu=16000000L -#micro.build.core=arduino -#micro.build.variant=micro - -############################################################## - -mini328.name=Arduino Mini w/ ATmega328 - -mini328.upload.protocol=arduino -mini328.upload.maximum_size=28672 -mini328.upload.speed=115200 - -mini328.bootloader.low_fuses=0xff -mini328.bootloader.high_fuses=0xd8 -mini328.bootloader.extended_fuses=0x05 -mini328.bootloader.path=optiboot -mini328.bootloader.file=optiboot_atmega328-Mini.hex -mini328.bootloader.unlock_bits=0x3F -mini328.bootloader.lock_bits=0x0F - -mini328.build.mcu=atmega328p -mini328.build.f_cpu=16000000L -mini328.build.core=arduino -mini328.build.variant=eightanaloginputs - -############################################################## - -mini.name=Arduino Mini w/ ATmega168 - -mini.upload.protocol=arduino -mini.upload.maximum_size=14336 -mini.upload.speed=19200 - -mini.bootloader.low_fuses=0xff -mini.bootloader.high_fuses=0xdd -mini.bootloader.extended_fuses=0x00 -mini.bootloader.path=atmega -mini.bootloader.file=ATmegaBOOT_168_ng.hex -mini.bootloader.unlock_bits=0x3F -mini.bootloader.lock_bits=0x0F - -mini.build.mcu=atmega168 -mini.build.f_cpu=16000000L -mini.build.core=arduino -mini.build.variant=eightanaloginputs - -############################################################## - -ethernet.name=Arduino Ethernet - -ethernet.upload.protocol=arduino -ethernet.upload.maximum_size=32256 -ethernet.upload.speed=115200 - -ethernet.bootloader.low_fuses=0xff -ethernet.bootloader.high_fuses=0xde -ethernet.bootloader.extended_fuses=0x05 -ethernet.bootloader.path=optiboot -ethernet.bootloader.file=optiboot_atmega328.hex -ethernet.bootloader.unlock_bits=0x3F -ethernet.bootloader.lock_bits=0x0F - -ethernet.build.variant=standard -ethernet.build.mcu=atmega328p -ethernet.build.f_cpu=16000000L -ethernet.build.core=arduino - -############################################################## - -fio.name=Arduino Fio - -fio.upload.protocol=arduino -fio.upload.maximum_size=30720 -fio.upload.speed=57600 - -fio.bootloader.low_fuses=0xFF -fio.bootloader.high_fuses=0xDA -fio.bootloader.extended_fuses=0x05 -fio.bootloader.path=arduino:atmega -fio.bootloader.file=ATmegaBOOT_168_atmega328_pro_8MHz.hex -fio.bootloader.unlock_bits=0x3F -fio.bootloader.lock_bits=0x0F - -fio.build.mcu=atmega328p -fio.build.f_cpu=8000000L -fio.build.core=arduino -fio.build.variant=eightanaloginputs - -############################################################## - -bt328.name=Arduino BT w/ ATmega328 - -bt328.upload.protocol=arduino -bt328.upload.maximum_size=28672 -bt328.upload.speed=19200 -bt328.upload.disable_flushing=true - -bt328.bootloader.low_fuses=0xff -bt328.bootloader.high_fuses=0xd8 -bt328.bootloader.extended_fuses=0x05 -bt328.bootloader.path=bt -bt328.bootloader.file=ATmegaBOOT_168_atmega328_bt.hex -bt328.bootloader.unlock_bits=0x3F -bt328.bootloader.lock_bits=0x0F - -bt328.build.mcu=atmega328p -bt328.build.f_cpu=16000000L -bt328.build.core=arduino -bt328.build.variant=eightanaloginputs - -############################################################## - -bt.name=Arduino BT w/ ATmega168 - -bt.upload.protocol=arduino -bt.upload.maximum_size=14336 -bt.upload.speed=19200 -bt.upload.disable_flushing=true - -bt.bootloader.low_fuses=0xff -bt.bootloader.high_fuses=0xdd -bt.bootloader.extended_fuses=0x00 -bt.bootloader.path=bt -bt.bootloader.file=ATmegaBOOT_168.hex -bt.bootloader.unlock_bits=0x3F -bt.bootloader.lock_bits=0x0F - -bt.build.mcu=atmega168 -bt.build.f_cpu=16000000L -bt.build.core=arduino -bt.build.variant=eightanaloginputs - -############################################################## - -lilypad328.name=LilyPad Arduino w/ ATmega328 - -lilypad328.upload.protocol=arduino -lilypad328.upload.maximum_size=30720 -lilypad328.upload.speed=57600 - -lilypad328.bootloader.low_fuses=0xFF -lilypad328.bootloader.high_fuses=0xDA -lilypad328.bootloader.extended_fuses=0x05 -lilypad328.bootloader.path=atmega -lilypad328.bootloader.file=ATmegaBOOT_168_atmega328_pro_8MHz.hex -lilypad328.bootloader.unlock_bits=0x3F -lilypad328.bootloader.lock_bits=0x0F - -lilypad328.build.mcu=atmega328p -lilypad328.build.f_cpu=8000000L -lilypad328.build.core=arduino -lilypad328.build.variant=standard - -############################################################## - -lilypad.name=LilyPad Arduino w/ ATmega168 - -lilypad.upload.protocol=arduino -lilypad.upload.maximum_size=14336 -lilypad.upload.speed=19200 - -lilypad.bootloader.low_fuses=0xe2 -lilypad.bootloader.high_fuses=0xdd -lilypad.bootloader.extended_fuses=0x00 -lilypad.bootloader.path=lilypad -lilypad.bootloader.file=LilyPadBOOT_168.hex -lilypad.bootloader.unlock_bits=0x3F -lilypad.bootloader.lock_bits=0x0F - -lilypad.build.mcu=atmega168 -lilypad.build.f_cpu=8000000L -lilypad.build.core=arduino -lilypad.build.variant=standard - -############################################################## - -pro5v328.name=Arduino Pro or Pro Mini (5V, 16 MHz) w/ ATmega328 - -pro5v328.upload.protocol=arduino -pro5v328.upload.maximum_size=30720 -pro5v328.upload.speed=57600 - -pro5v328.bootloader.low_fuses=0xFF -pro5v328.bootloader.high_fuses=0xDA -pro5v328.bootloader.extended_fuses=0x05 -pro5v328.bootloader.path=atmega -pro5v328.bootloader.file=ATmegaBOOT_168_atmega328.hex -pro5v328.bootloader.unlock_bits=0x3F -pro5v328.bootloader.lock_bits=0x0F - -pro5v328.build.mcu=atmega328p -pro5v328.build.f_cpu=16000000L -pro5v328.build.core=arduino -pro5v328.build.variant=standard - -############################################################## - -pro5v.name=Arduino Pro or Pro Mini (5V, 16 MHz) w/ ATmega168 - -pro5v.upload.protocol=arduino -pro5v.upload.maximum_size=14336 -pro5v.upload.speed=19200 - -pro5v.bootloader.low_fuses=0xff -pro5v.bootloader.high_fuses=0xdd -pro5v.bootloader.extended_fuses=0x00 -pro5v.bootloader.path=atmega -pro5v.bootloader.file=ATmegaBOOT_168_diecimila.hex -pro5v.bootloader.unlock_bits=0x3F -pro5v.bootloader.lock_bits=0x0F - -pro5v.build.mcu=atmega168 -pro5v.build.f_cpu=16000000L -pro5v.build.core=arduino -pro5v.build.variant=standard - -############################################################## - -pro328.name=Arduino Pro or Pro Mini (3.3V, 8 MHz) w/ ATmega328 - -pro328.upload.protocol=arduino -pro328.upload.maximum_size=30720 -pro328.upload.speed=57600 - -pro328.bootloader.low_fuses=0xFF -pro328.bootloader.high_fuses=0xDA -pro328.bootloader.extended_fuses=0x05 -pro328.bootloader.path=atmega -pro328.bootloader.file=ATmegaBOOT_168_atmega328_pro_8MHz.hex -pro328.bootloader.unlock_bits=0x3F -pro328.bootloader.lock_bits=0x0F - -pro328.build.mcu=atmega328p -pro328.build.f_cpu=8000000L -pro328.build.core=arduino -pro328.build.variant=standard - -############################################################## - -pro.name=Arduino Pro or Pro Mini (3.3V, 8 MHz) w/ ATmega168 - -pro.upload.protocol=arduino -pro.upload.maximum_size=14336 -pro.upload.speed=19200 - -pro.bootloader.low_fuses=0xc6 -pro.bootloader.high_fuses=0xdd -pro.bootloader.extended_fuses=0x00 -pro.bootloader.path=atmega -pro.bootloader.file=ATmegaBOOT_168_pro_8MHz.hex -pro.bootloader.unlock_bits=0x3F -pro.bootloader.lock_bits=0x0F - -pro.build.mcu=atmega168 -pro.build.f_cpu=8000000L -pro.build.core=arduino -pro.build.variant=standard - -############################################################## - -atmega168.name=Arduino NG or older w/ ATmega168 - -atmega168.upload.protocol=arduino -atmega168.upload.maximum_size=14336 -atmega168.upload.speed=19200 - -atmega168.bootloader.low_fuses=0xff -atmega168.bootloader.high_fuses=0xdd -atmega168.bootloader.extended_fuses=0x00 -atmega168.bootloader.path=atmega -atmega168.bootloader.file=ATmegaBOOT_168_ng.hex -atmega168.bootloader.unlock_bits=0x3F -atmega168.bootloader.lock_bits=0x0F - -atmega168.build.mcu=atmega168 -atmega168.build.f_cpu=16000000L -atmega168.build.core=arduino -atmega168.build.variant=standard - -############################################################## - -atmega8.name=Arduino NG or older w/ ATmega8 - -atmega8.upload.protocol=arduino -atmega8.upload.maximum_size=7168 -atmega8.upload.speed=19200 - -atmega8.bootloader.low_fuses=0xdf -atmega8.bootloader.high_fuses=0xca -atmega8.bootloader.path=atmega8 -atmega8.bootloader.file=ATmegaBOOT.hex -atmega8.bootloader.unlock_bits=0x3F -atmega8.bootloader.lock_bits=0x0F - -atmega8.build.mcu=atmega8 -atmega8.build.f_cpu=16000000L -atmega8.build.core=arduino -atmega8.build.variant=standard diff --git a/build/linux/work/hardware/arduino/bootloaders/atmega/ATmegaBOOT_168.c b/build/linux/work/hardware/arduino/bootloaders/atmega/ATmegaBOOT_168.c deleted file mode 100644 index 2b9fefa26..000000000 --- a/build/linux/work/hardware/arduino/bootloaders/atmega/ATmegaBOOT_168.c +++ /dev/null @@ -1,1054 +0,0 @@ -/**********************************************************/ -/* Serial Bootloader for Atmel megaAVR Controllers */ -/* */ -/* tested with ATmega8, ATmega128 and ATmega168 */ -/* should work with other mega's, see code for details */ -/* */ -/* ATmegaBOOT.c */ -/* */ -/* */ -/* 20090308: integrated Mega changes into main bootloader */ -/* source by D. Mellis */ -/* 20080930: hacked for Arduino Mega (with the 1280 */ -/* processor, backwards compatible) */ -/* by D. Cuartielles */ -/* 20070626: hacked for Arduino Diecimila (which auto- */ -/* resets when a USB connection is made to it) */ -/* by D. Mellis */ -/* 20060802: hacked for Arduino by D. Cuartielles */ -/* based on a previous hack by D. Mellis */ -/* and D. Cuartielles */ -/* */ -/* Monitor and debug functions were added to the original */ -/* code by Dr. Erik Lins, chip45.com. (See below) */ -/* */ -/* Thanks to Karl Pitrich for fixing a bootloader pin */ -/* problem and more informative LED blinking! */ -/* */ -/* For the latest version see: */ -/* http://www.chip45.com/ */ -/* */ -/* ------------------------------------------------------ */ -/* */ -/* based on stk500boot.c */ -/* Copyright (c) 2003, Jason P. Kyle */ -/* All rights reserved. */ -/* see avr1.org for original file and information */ -/* */ -/* This program is free software; you can redistribute it */ -/* and/or modify it under the terms of the GNU General */ -/* Public License as published by the Free Software */ -/* Foundation; either version 2 of the License, or */ -/* (at your option) any later version. */ -/* */ -/* This program is distributed in the hope that it will */ -/* be useful, but WITHOUT ANY WARRANTY; without even the */ -/* implied warranty of MERCHANTABILITY or FITNESS FOR A */ -/* PARTICULAR PURPOSE. See the GNU General Public */ -/* License for more details. */ -/* */ -/* You should have received a copy of the GNU General */ -/* Public License along with this program; if not, write */ -/* to the Free Software Foundation, Inc., */ -/* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -/* */ -/* Licence can be viewed at */ -/* http://www.fsf.org/licenses/gpl.txt */ -/* */ -/* Target = Atmel AVR m128,m64,m32,m16,m8,m162,m163,m169, */ -/* m8515,m8535. ATmega161 has a very small boot block so */ -/* isn't supported. */ -/* */ -/* Tested with m168 */ -/**********************************************************/ - -/* $Id$ */ - - -/* some includes */ -#include -#include -#include -#include -#include -#include - -/* the current avr-libc eeprom functions do not support the ATmega168 */ -/* own eeprom write/read functions are used instead */ -#if !defined(__AVR_ATmega168__) || !defined(__AVR_ATmega328P__) -#include -#endif - -/* Use the F_CPU defined in Makefile */ - -/* 20060803: hacked by DojoCorp */ -/* 20070626: hacked by David A. Mellis to decrease waiting time for auto-reset */ -/* set the waiting time for the bootloader */ -/* get this from the Makefile instead */ -/* #define MAX_TIME_COUNT (F_CPU>>4) */ - -/* 20070707: hacked by David A. Mellis - after this many errors give up and launch application */ -#define MAX_ERROR_COUNT 5 - -/* set the UART baud rate */ -/* 20060803: hacked by DojoCorp */ -//#define BAUD_RATE 115200 -#ifndef BAUD_RATE -#define BAUD_RATE 19200 -#endif - - -/* SW_MAJOR and MINOR needs to be updated from time to time to avoid warning message from AVR Studio */ -/* never allow AVR Studio to do an update !!!! */ -#define HW_VER 0x02 -#define SW_MAJOR 0x01 -#define SW_MINOR 0x10 - - -/* Adjust to suit whatever pin your hardware uses to enter the bootloader */ -/* ATmega128 has two UARTS so two pins are used to enter bootloader and select UART */ -/* ATmega1280 has four UARTS, but for Arduino Mega, we will only use RXD0 to get code */ -/* BL0... means UART0, BL1... means UART1 */ -#ifdef __AVR_ATmega128__ -#define BL_DDR DDRF -#define BL_PORT PORTF -#define BL_PIN PINF -#define BL0 PINF7 -#define BL1 PINF6 -#elif defined __AVR_ATmega1280__ -/* we just don't do anything for the MEGA and enter bootloader on reset anyway*/ -#else -/* other ATmegas have only one UART, so only one pin is defined to enter bootloader */ -#define BL_DDR DDRD -#define BL_PORT PORTD -#define BL_PIN PIND -#define BL PIND6 -#endif - - -/* onboard LED is used to indicate, that the bootloader was entered (3x flashing) */ -/* if monitor functions are included, LED goes on after monitor was entered */ -#if defined __AVR_ATmega128__ || defined __AVR_ATmega1280__ -/* Onboard LED is connected to pin PB7 (e.g. Crumb128, PROBOmega128, Savvy128, Arduino Mega) */ -#define LED_DDR DDRB -#define LED_PORT PORTB -#define LED_PIN PINB -#define LED PINB7 -#else -/* Onboard LED is connected to pin PB5 in Arduino NG, Diecimila, and Duomilanuove */ -/* other boards like e.g. Crumb8, Crumb168 are using PB2 */ -#define LED_DDR DDRB -#define LED_PORT PORTB -#define LED_PIN PINB -#define LED PINB5 -#endif - - -/* monitor functions will only be compiled when using ATmega128, due to bootblock size constraints */ -#if defined(__AVR_ATmega128__) || defined(__AVR_ATmega1280__) -#define MONITOR 1 -#endif - - -/* define various device id's */ -/* manufacturer byte is always the same */ -#define SIG1 0x1E // Yep, Atmel is the only manufacturer of AVR micros. Single source :( - -#if defined __AVR_ATmega1280__ -#define SIG2 0x97 -#define SIG3 0x03 -#define PAGE_SIZE 0x80U //128 words - -#elif defined __AVR_ATmega1281__ -#define SIG2 0x97 -#define SIG3 0x04 -#define PAGE_SIZE 0x80U //128 words - -#elif defined __AVR_ATmega128__ -#define SIG2 0x97 -#define SIG3 0x02 -#define PAGE_SIZE 0x80U //128 words - -#elif defined __AVR_ATmega64__ -#define SIG2 0x96 -#define SIG3 0x02 -#define PAGE_SIZE 0x80U //128 words - -#elif defined __AVR_ATmega32__ -#define SIG2 0x95 -#define SIG3 0x02 -#define PAGE_SIZE 0x40U //64 words - -#elif defined __AVR_ATmega16__ -#define SIG2 0x94 -#define SIG3 0x03 -#define PAGE_SIZE 0x40U //64 words - -#elif defined __AVR_ATmega8__ -#define SIG2 0x93 -#define SIG3 0x07 -#define PAGE_SIZE 0x20U //32 words - -#elif defined __AVR_ATmega88__ -#define SIG2 0x93 -#define SIG3 0x0a -#define PAGE_SIZE 0x20U //32 words - -#elif defined __AVR_ATmega168__ -#define SIG2 0x94 -#define SIG3 0x06 -#define PAGE_SIZE 0x40U //64 words - -#elif defined __AVR_ATmega328P__ -#define SIG2 0x95 -#define SIG3 0x0F -#define PAGE_SIZE 0x40U //64 words - -#elif defined __AVR_ATmega162__ -#define SIG2 0x94 -#define SIG3 0x04 -#define PAGE_SIZE 0x40U //64 words - -#elif defined __AVR_ATmega163__ -#define SIG2 0x94 -#define SIG3 0x02 -#define PAGE_SIZE 0x40U //64 words - -#elif defined __AVR_ATmega169__ -#define SIG2 0x94 -#define SIG3 0x05 -#define PAGE_SIZE 0x40U //64 words - -#elif defined __AVR_ATmega8515__ -#define SIG2 0x93 -#define SIG3 0x06 -#define PAGE_SIZE 0x20U //32 words - -#elif defined __AVR_ATmega8535__ -#define SIG2 0x93 -#define SIG3 0x08 -#define PAGE_SIZE 0x20U //32 words -#endif - - -/* function prototypes */ -void putch(char); -char getch(void); -void getNch(uint8_t); -void byte_response(uint8_t); -void nothing_response(void); -char gethex(void); -void puthex(char); -void flash_led(uint8_t); - -/* some variables */ -union address_union { - uint16_t word; - uint8_t byte[2]; -} address; - -union length_union { - uint16_t word; - uint8_t byte[2]; -} length; - -struct flags_struct { - unsigned eeprom : 1; - unsigned rampz : 1; -} flags; - -uint8_t buff[256]; -uint8_t address_high; - -uint8_t pagesz=0x80; - -uint8_t i; -uint8_t bootuart = 0; - -uint8_t error_count = 0; - -void (*app_start)(void) = 0x0000; - - -/* main program starts here */ -int main(void) -{ - uint8_t ch,ch2; - uint16_t w; - -#ifdef WATCHDOG_MODS - ch = MCUSR; - MCUSR = 0; - - WDTCSR |= _BV(WDCE) | _BV(WDE); - WDTCSR = 0; - - // Check if the WDT was used to reset, in which case we dont bootload and skip straight to the code. woot. - if (! (ch & _BV(EXTRF))) // if its a not an external reset... - app_start(); // skip bootloader -#else - asm volatile("nop\n\t"); -#endif - - /* set pin direction for bootloader pin and enable pullup */ - /* for ATmega128, two pins need to be initialized */ -#ifdef __AVR_ATmega128__ - BL_DDR &= ~_BV(BL0); - BL_DDR &= ~_BV(BL1); - BL_PORT |= _BV(BL0); - BL_PORT |= _BV(BL1); -#else - /* We run the bootloader regardless of the state of this pin. Thus, don't - put it in a different state than the other pins. --DAM, 070709 - This also applies to Arduino Mega -- DC, 080930 - BL_DDR &= ~_BV(BL); - BL_PORT |= _BV(BL); - */ -#endif - - -#ifdef __AVR_ATmega128__ - /* check which UART should be used for booting */ - if(bit_is_clear(BL_PIN, BL0)) { - bootuart = 1; - } - else if(bit_is_clear(BL_PIN, BL1)) { - bootuart = 2; - } -#endif - -#if defined __AVR_ATmega1280__ - /* the mega1280 chip has four serial ports ... we could eventually use any of them, or not? */ - /* however, we don't wanna confuse people, to avoid making a mess, we will stick to RXD0, TXD0 */ - bootuart = 1; -#endif - - /* check if flash is programmed already, if not start bootloader anyway */ - if(pgm_read_byte_near(0x0000) != 0xFF) { - -#ifdef __AVR_ATmega128__ - /* no UART was selected, start application */ - if(!bootuart) { - app_start(); - } -#else - /* check if bootloader pin is set low */ - /* we don't start this part neither for the m8, nor m168 */ - //if(bit_is_set(BL_PIN, BL)) { - // app_start(); - // } -#endif - } - -#ifdef __AVR_ATmega128__ - /* no bootuart was selected, default to uart 0 */ - if(!bootuart) { - bootuart = 1; - } -#endif - - - /* initialize UART(s) depending on CPU defined */ -#if defined(__AVR_ATmega128__) || defined(__AVR_ATmega1280__) - if(bootuart == 1) { - UBRR0L = (uint8_t)(F_CPU/(BAUD_RATE*16L)-1); - UBRR0H = (F_CPU/(BAUD_RATE*16L)-1) >> 8; - UCSR0A = 0x00; - UCSR0C = 0x06; - UCSR0B = _BV(TXEN0)|_BV(RXEN0); - } - if(bootuart == 2) { - UBRR1L = (uint8_t)(F_CPU/(BAUD_RATE*16L)-1); - UBRR1H = (F_CPU/(BAUD_RATE*16L)-1) >> 8; - UCSR1A = 0x00; - UCSR1C = 0x06; - UCSR1B = _BV(TXEN1)|_BV(RXEN1); - } -#elif defined __AVR_ATmega163__ - UBRR = (uint8_t)(F_CPU/(BAUD_RATE*16L)-1); - UBRRHI = (F_CPU/(BAUD_RATE*16L)-1) >> 8; - UCSRA = 0x00; - UCSRB = _BV(TXEN)|_BV(RXEN); -#elif defined(__AVR_ATmega168__) || defined(__AVR_ATmega328P__) - -#ifdef DOUBLE_SPEED - UCSR0A = (1<> 8; -#else - UBRR0L = (uint8_t)(F_CPU/(BAUD_RATE*16L)-1); - UBRR0H = (F_CPU/(BAUD_RATE*16L)-1) >> 8; -#endif - - UCSR0B = (1<>8; // set baud rate - UBRRL = (((F_CPU/BAUD_RATE)/16)-1); - UCSRB = (1<> 8; - UCSRA = 0x00; - UCSRC = 0x06; - UCSRB = _BV(TXEN)|_BV(RXEN); -#endif - -#if defined __AVR_ATmega1280__ - /* Enable internal pull-up resistor on pin D0 (RX), in order - to supress line noise that prevents the bootloader from - timing out (DAM: 20070509) */ - /* feature added to the Arduino Mega --DC: 080930 */ - DDRE &= ~_BV(PINE0); - PORTE |= _BV(PINE0); -#endif - - - /* set LED pin as output */ - LED_DDR |= _BV(LED); - - - /* flash onboard LED to signal entering of bootloader */ -#if defined(__AVR_ATmega128__) || defined(__AVR_ATmega1280__) - // 4x for UART0, 5x for UART1 - flash_led(NUM_LED_FLASHES + bootuart); -#else - flash_led(NUM_LED_FLASHES); -#endif - - /* 20050803: by DojoCorp, this is one of the parts provoking the - system to stop listening, cancelled from the original */ - //putch('\0'); - - /* forever loop */ - for (;;) { - - /* get character from UART */ - ch = getch(); - - /* A bunch of if...else if... gives smaller code than switch...case ! */ - - /* Hello is anyone home ? */ - if(ch=='0') { - nothing_response(); - } - - - /* Request programmer ID */ - /* Not using PROGMEM string due to boot block in m128 being beyond 64kB boundry */ - /* Would need to selectively manipulate RAMPZ, and it's only 9 characters anyway so who cares. */ - else if(ch=='1') { - if (getch() == ' ') { - putch(0x14); - putch('A'); - putch('V'); - putch('R'); - putch(' '); - putch('I'); - putch('S'); - putch('P'); - putch(0x10); - } else { - if (++error_count == MAX_ERROR_COUNT) - app_start(); - } - } - - - /* AVR ISP/STK500 board commands DON'T CARE so default nothing_response */ - else if(ch=='@') { - ch2 = getch(); - if (ch2>0x85) getch(); - nothing_response(); - } - - - /* AVR ISP/STK500 board requests */ - else if(ch=='A') { - ch2 = getch(); - if(ch2==0x80) byte_response(HW_VER); // Hardware version - else if(ch2==0x81) byte_response(SW_MAJOR); // Software major version - else if(ch2==0x82) byte_response(SW_MINOR); // Software minor version - else if(ch2==0x98) byte_response(0x03); // Unknown but seems to be required by avr studio 3.56 - else byte_response(0x00); // Covers various unnecessary responses we don't care about - } - - - /* Device Parameters DON'T CARE, DEVICE IS FIXED */ - else if(ch=='B') { - getNch(20); - nothing_response(); - } - - - /* Parallel programming stuff DON'T CARE */ - else if(ch=='E') { - getNch(5); - nothing_response(); - } - - - /* P: Enter programming mode */ - /* R: Erase device, don't care as we will erase one page at a time anyway. */ - else if(ch=='P' || ch=='R') { - nothing_response(); - } - - - /* Leave programming mode */ - else if(ch=='Q') { - nothing_response(); -#ifdef WATCHDOG_MODS - // autoreset via watchdog (sneaky!) - WDTCSR = _BV(WDE); - while (1); // 16 ms -#endif - } - - - /* Set address, little endian. EEPROM in bytes, FLASH in words */ - /* Perhaps extra address bytes may be added in future to support > 128kB FLASH. */ - /* This might explain why little endian was used here, big endian used everywhere else. */ - else if(ch=='U') { - address.byte[0] = getch(); - address.byte[1] = getch(); - nothing_response(); - } - - - /* Universal SPI programming command, disabled. Would be used for fuses and lock bits. */ - else if(ch=='V') { - if (getch() == 0x30) { - getch(); - ch = getch(); - getch(); - if (ch == 0) { - byte_response(SIG1); - } else if (ch == 1) { - byte_response(SIG2); - } else { - byte_response(SIG3); - } - } else { - getNch(3); - byte_response(0x00); - } - } - - - /* Write memory, length is big endian and is in bytes */ - else if(ch=='d') { - length.byte[1] = getch(); - length.byte[0] = getch(); - flags.eeprom = 0; - if (getch() == 'E') flags.eeprom = 1; - for (w=0;w127) address_high = 0x01; //Only possible with m128, m256 will need 3rd address byte. FIXME - else address_high = 0x00; -#if defined(__AVR_ATmega128__) || defined(__AVR_ATmega1280__) || defined(__AVR_ATmega1281__) - RAMPZ = address_high; -#endif - address.word = address.word << 1; //address * 2 -> byte location - /* if ((length.byte[0] & 0x01) == 0x01) length.word++; //Even up an odd number of bytes */ - if ((length.byte[0] & 0x01)) length.word++; //Even up an odd number of bytes - cli(); //Disable interrupts, just to be sure -#if defined(__AVR_ATmega1280__) || defined(__AVR_ATmega1281__) - while(bit_is_set(EECR,EEPE)); //Wait for previous EEPROM writes to complete -#else - while(bit_is_set(EECR,EEWE)); //Wait for previous EEPROM writes to complete -#endif - asm volatile( - "clr r17 \n\t" //page_word_count - "lds r30,address \n\t" //Address of FLASH location (in bytes) - "lds r31,address+1 \n\t" - "ldi r28,lo8(buff) \n\t" //Start of buffer array in RAM - "ldi r29,hi8(buff) \n\t" - "lds r24,length \n\t" //Length of data to be written (in bytes) - "lds r25,length+1 \n\t" - "length_loop: \n\t" //Main loop, repeat for number of words in block - "cpi r17,0x00 \n\t" //If page_word_count=0 then erase page - "brne no_page_erase \n\t" - "wait_spm1: \n\t" - "lds r16,%0 \n\t" //Wait for previous spm to complete - "andi r16,1 \n\t" - "cpi r16,1 \n\t" - "breq wait_spm1 \n\t" - "ldi r16,0x03 \n\t" //Erase page pointed to by Z - "sts %0,r16 \n\t" - "spm \n\t" -#ifdef __AVR_ATmega163__ - ".word 0xFFFF \n\t" - "nop \n\t" -#endif - "wait_spm2: \n\t" - "lds r16,%0 \n\t" //Wait for previous spm to complete - "andi r16,1 \n\t" - "cpi r16,1 \n\t" - "breq wait_spm2 \n\t" - - "ldi r16,0x11 \n\t" //Re-enable RWW section - "sts %0,r16 \n\t" - "spm \n\t" -#ifdef __AVR_ATmega163__ - ".word 0xFFFF \n\t" - "nop \n\t" -#endif - "no_page_erase: \n\t" - "ld r0,Y+ \n\t" //Write 2 bytes into page buffer - "ld r1,Y+ \n\t" - - "wait_spm3: \n\t" - "lds r16,%0 \n\t" //Wait for previous spm to complete - "andi r16,1 \n\t" - "cpi r16,1 \n\t" - "breq wait_spm3 \n\t" - "ldi r16,0x01 \n\t" //Load r0,r1 into FLASH page buffer - "sts %0,r16 \n\t" - "spm \n\t" - - "inc r17 \n\t" //page_word_count++ - "cpi r17,%1 \n\t" - "brlo same_page \n\t" //Still same page in FLASH - "write_page: \n\t" - "clr r17 \n\t" //New page, write current one first - "wait_spm4: \n\t" - "lds r16,%0 \n\t" //Wait for previous spm to complete - "andi r16,1 \n\t" - "cpi r16,1 \n\t" - "breq wait_spm4 \n\t" -#ifdef __AVR_ATmega163__ - "andi r30,0x80 \n\t" // m163 requires Z6:Z1 to be zero during page write -#endif - "ldi r16,0x05 \n\t" //Write page pointed to by Z - "sts %0,r16 \n\t" - "spm \n\t" -#ifdef __AVR_ATmega163__ - ".word 0xFFFF \n\t" - "nop \n\t" - "ori r30,0x7E \n\t" // recover Z6:Z1 state after page write (had to be zero during write) -#endif - "wait_spm5: \n\t" - "lds r16,%0 \n\t" //Wait for previous spm to complete - "andi r16,1 \n\t" - "cpi r16,1 \n\t" - "breq wait_spm5 \n\t" - "ldi r16,0x11 \n\t" //Re-enable RWW section - "sts %0,r16 \n\t" - "spm \n\t" -#ifdef __AVR_ATmega163__ - ".word 0xFFFF \n\t" - "nop \n\t" -#endif - "same_page: \n\t" - "adiw r30,2 \n\t" //Next word in FLASH - "sbiw r24,2 \n\t" //length-2 - "breq final_write \n\t" //Finished - "rjmp length_loop \n\t" - "final_write: \n\t" - "cpi r17,0 \n\t" - "breq block_done \n\t" - "adiw r24,2 \n\t" //length+2, fool above check on length after short page write - "rjmp write_page \n\t" - "block_done: \n\t" - "clr __zero_reg__ \n\t" //restore zero register -#if defined __AVR_ATmega168__ || __AVR_ATmega328P__ || __AVR_ATmega128__ || __AVR_ATmega1280__ || __AVR_ATmega1281__ - : "=m" (SPMCSR) : "M" (PAGE_SIZE) : "r0","r16","r17","r24","r25","r28","r29","r30","r31" -#else - : "=m" (SPMCR) : "M" (PAGE_SIZE) : "r0","r16","r17","r24","r25","r28","r29","r30","r31" -#endif - ); - /* Should really add a wait for RWW section to be enabled, don't actually need it since we never */ - /* exit the bootloader without a power cycle anyhow */ - } - putch(0x14); - putch(0x10); - } else { - if (++error_count == MAX_ERROR_COUNT) - app_start(); - } - } - - - /* Read memory block mode, length is big endian. */ - else if(ch=='t') { - length.byte[1] = getch(); - length.byte[0] = getch(); -#if defined(__AVR_ATmega128__) || defined(__AVR_ATmega1280__) - if (address.word>0x7FFF) flags.rampz = 1; // No go with m256, FIXME - else flags.rampz = 0; -#endif - address.word = address.word << 1; // address * 2 -> byte location - if (getch() == 'E') flags.eeprom = 1; - else flags.eeprom = 0; - if (getch() == ' ') { // Command terminator - putch(0x14); - for (w=0;w < length.word;w++) { // Can handle odd and even lengths okay - if (flags.eeprom) { // Byte access EEPROM read -#if defined(__AVR_ATmega168__) || defined(__AVR_ATmega328P__) - while(EECR & (1<= 'a') { - return (a - 'a' + 0x0a); - } else if(a >= '0') { - return(a - '0'); - } - return a; -} - - -char gethex(void) { - return (gethexnib() << 4) + gethexnib(); -} - - -void puthex(char ch) { - char ah; - - ah = ch >> 4; - if(ah >= 0x0a) { - ah = ah - 0x0a + 'a'; - } else { - ah += '0'; - } - - ch &= 0x0f; - if(ch >= 0x0a) { - ch = ch - 0x0a + 'a'; - } else { - ch += '0'; - } - - putch(ah); - putch(ch); -} - - -void putch(char ch) -{ -#if defined(__AVR_ATmega128__) || defined(__AVR_ATmega1280__) - if(bootuart == 1) { - while (!(UCSR0A & _BV(UDRE0))); - UDR0 = ch; - } - else if (bootuart == 2) { - while (!(UCSR1A & _BV(UDRE1))); - UDR1 = ch; - } -#elif defined(__AVR_ATmega168__) || defined(__AVR_ATmega328P__) - while (!(UCSR0A & _BV(UDRE0))); - UDR0 = ch; -#else - /* m8,16,32,169,8515,8535,163 */ - while (!(UCSRA & _BV(UDRE))); - UDR = ch; -#endif -} - - -char getch(void) -{ -#if defined(__AVR_ATmega128__) || defined(__AVR_ATmega1280__) - uint32_t count = 0; - if(bootuart == 1) { - while(!(UCSR0A & _BV(RXC0))) { - /* 20060803 DojoCorp:: Addon coming from the previous Bootloader*/ - /* HACKME:: here is a good place to count times*/ - count++; - if (count > MAX_TIME_COUNT) - app_start(); - } - - return UDR0; - } - else if(bootuart == 2) { - while(!(UCSR1A & _BV(RXC1))) { - /* 20060803 DojoCorp:: Addon coming from the previous Bootloader*/ - /* HACKME:: here is a good place to count times*/ - count++; - if (count > MAX_TIME_COUNT) - app_start(); - } - - return UDR1; - } - return 0; -#elif defined(__AVR_ATmega168__) || defined(__AVR_ATmega328P__) - uint32_t count = 0; - while(!(UCSR0A & _BV(RXC0))){ - /* 20060803 DojoCorp:: Addon coming from the previous Bootloader*/ - /* HACKME:: here is a good place to count times*/ - count++; - if (count > MAX_TIME_COUNT) - app_start(); - } - return UDR0; -#else - /* m8,16,32,169,8515,8535,163 */ - uint32_t count = 0; - while(!(UCSRA & _BV(RXC))){ - /* 20060803 DojoCorp:: Addon coming from the previous Bootloader*/ - /* HACKME:: here is a good place to count times*/ - count++; - if (count > MAX_TIME_COUNT) - app_start(); - } - return UDR; -#endif -} - - -void getNch(uint8_t count) -{ - while(count--) { -#if defined(__AVR_ATmega128__) || defined(__AVR_ATmega1280__) - if(bootuart == 1) { - while(!(UCSR0A & _BV(RXC0))); - UDR0; - } - else if(bootuart == 2) { - while(!(UCSR1A & _BV(RXC1))); - UDR1; - } -#elif defined(__AVR_ATmega168__) || defined(__AVR_ATmega328P__) - getch(); -#else - /* m8,16,32,169,8515,8535,163 */ - /* 20060803 DojoCorp:: Addon coming from the previous Bootloader*/ - //while(!(UCSRA & _BV(RXC))); - //UDR; - getch(); // need to handle time out -#endif - } -} - - -void byte_response(uint8_t val) -{ - if (getch() == ' ') { - putch(0x14); - putch(val); - putch(0x10); - } else { - if (++error_count == MAX_ERROR_COUNT) - app_start(); - } -} - - -void nothing_response(void) -{ - if (getch() == ' ') { - putch(0x14); - putch(0x10); - } else { - if (++error_count == MAX_ERROR_COUNT) - app_start(); - } -} - -void flash_led(uint8_t count) -{ - while (count--) { - LED_PORT |= _BV(LED); - _delay_ms(100); - LED_PORT &= ~_BV(LED); - _delay_ms(100); - } -} - - -/* end of file ATmegaBOOT.c */ diff --git a/build/linux/work/hardware/arduino/bootloaders/atmega/ATmegaBOOT_168_atmega1280.hex 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changed... -PROGRAM = ATmegaBOOT_168 - -# enter the parameters for the avrdude isp tool -ISPTOOL = stk500v2 -ISPPORT = usb -ISPSPEED = -b 115200 - -MCU_TARGET = atmega168 -LDSECTION = --section-start=.text=0x3800 - -# the efuse should really be 0xf8; since, however, only the lower -# three bits of that byte are used on the atmega168, avrdude gets -# confused if you specify 1's for the higher bits, see: -# http://tinker.it/now/2007/02/24/the-tale-of-avrdude-atmega168-and-extended-bits-fuses/ -# -# similarly, the lock bits should be 0xff instead of 0x3f (to -# unlock the bootloader section) and 0xcf instead of 0x0f (to -# lock it), but since the high two bits of the lock byte are -# unused, avrdude would get confused. - -ISPFUSES = avrdude -c $(ISPTOOL) -p $(MCU_TARGET) -P $(ISPPORT) $(ISPSPEED) \ --e -u -U lock:w:0x3f:m -U efuse:w:0x$(EFUSE):m -U hfuse:w:0x$(HFUSE):m -U lfuse:w:0x$(LFUSE):m -ISPFLASH = avrdude -c $(ISPTOOL) -p $(MCU_TARGET) -P $(ISPPORT) $(ISPSPEED) \ --U flash:w:$(PROGRAM)_$(TARGET).hex -U lock:w:0x0f:m - -STK500 = "C:\Program Files\Atmel\AVR Tools\STK500\Stk500.exe" -STK500-1 = $(STK500) -e -d$(MCU_TARGET) -pf -vf -if$(PROGRAM)_$(TARGET).hex \ --lFF -LFF -f$(HFUSE)$(LFUSE) -EF8 -ms -q -cUSB -I200kHz -s -wt -STK500-2 = $(STK500) -d$(MCU_TARGET) -ms -q -lCF -LCF -cUSB -I200kHz -s -wt - - -OBJ = $(PROGRAM).o -OPTIMIZE = -O2 - -DEFS = -LIBS = - -CC = avr-gcc - -# Override is only needed by avr-lib build system. - -override CFLAGS = -g -Wall $(OPTIMIZE) -mmcu=$(MCU_TARGET) -DF_CPU=$(AVR_FREQ) $(DEFS) -override LDFLAGS = -Wl,$(LDSECTION) -#override LDFLAGS = -Wl,-Map,$(PROGRAM).map,$(LDSECTION) - -OBJCOPY = avr-objcopy -OBJDUMP = avr-objdump - -all: - -lilypad: TARGET = lilypad -lilypad: CFLAGS += '-DMAX_TIME_COUNT=F_CPU>>1' '-DNUM_LED_FLASHES=3' -lilypad: AVR_FREQ = 8000000L -lilypad: $(PROGRAM)_lilypad.hex - -lilypad_isp: lilypad -lilypad_isp: TARGET = lilypad -lilypad_isp: HFUSE = DD -lilypad_isp: LFUSE = E2 -lilypad_isp: EFUSE = 00 -lilypad_isp: isp - -lilypad_resonator: TARGET = lilypad_resonator -lilypad_resonator: CFLAGS += '-DMAX_TIME_COUNT=F_CPU>>4' '-DNUM_LED_FLASHES=3' -lilypad_resonator: AVR_FREQ = 8000000L -lilypad_resonator: $(PROGRAM)_lilypad_resonator.hex - -lilypad_resonator_isp: lilypad_resonator -lilypad_resonator_isp: TARGET = lilypad_resonator -lilypad_resonator_isp: HFUSE = DD -lilypad_resonator_isp: LFUSE = C6 -lilypad_resonator_isp: EFUSE = 00 -lilypad_resonator_isp: isp - -pro8: TARGET = pro_8MHz -pro8: CFLAGS += '-DMAX_TIME_COUNT=F_CPU>>4' '-DNUM_LED_FLASHES=1' '-DWATCHDOG_MODS' -pro8: AVR_FREQ = 8000000L -pro8: $(PROGRAM)_pro_8MHz.hex - -pro8_isp: pro8 -pro8_isp: TARGET = pro_8MHz -pro8_isp: HFUSE = DD -pro8_isp: LFUSE = C6 -pro8_isp: EFUSE = 00 -pro8_isp: isp - -pro16: TARGET = pro_16MHz -pro16: CFLAGS += '-DMAX_TIME_COUNT=F_CPU>>4' '-DNUM_LED_FLASHES=1' '-DWATCHDOG_MODS' -pro16: AVR_FREQ = 16000000L -pro16: $(PROGRAM)_pro_16MHz.hex - -pro16_isp: pro16 -pro16_isp: TARGET = pro_16MHz -pro16_isp: HFUSE = DD -pro16_isp: LFUSE = C6 -pro16_isp: EFUSE = 00 -pro16_isp: isp - -pro20: TARGET = pro_20mhz -pro20: CFLAGS += '-DMAX_TIME_COUNT=F_CPU>>4' '-DNUM_LED_FLASHES=1' '-DWATCHDOG_MODS' -pro20: AVR_FREQ = 20000000L -pro20: $(PROGRAM)_pro_20mhz.hex - -pro20_isp: pro20 -pro20_isp: TARGET = pro_20mhz -pro20_isp: HFUSE = DD -pro20_isp: LFUSE = C6 -pro20_isp: EFUSE = 00 -pro20_isp: isp - -diecimila: TARGET = diecimila -diecimila: CFLAGS += '-DMAX_TIME_COUNT=F_CPU>>4' '-DNUM_LED_FLASHES=1' -diecimila: AVR_FREQ = 16000000L -diecimila: $(PROGRAM)_diecimila.hex - -diecimila_isp: diecimila -diecimila_isp: TARGET = diecimila -diecimila_isp: HFUSE = DD -diecimila_isp: LFUSE = FF -diecimila_isp: EFUSE = 00 -diecimila_isp: isp - -ng: TARGET = ng -ng: CFLAGS += '-DMAX_TIME_COUNT=F_CPU>>1' '-DNUM_LED_FLASHES=3' -ng: AVR_FREQ = 16000000L -ng: $(PROGRAM)_ng.hex - -ng_isp: ng -ng_isp: TARGET = ng -ng_isp: HFUSE = DD -ng_isp: LFUSE = FF -ng_isp: EFUSE = 00 -ng_isp: isp - -atmega328: TARGET = atmega328 -atmega328: MCU_TARGET = atmega328p -atmega328: CFLAGS += '-DMAX_TIME_COUNT=F_CPU>>4' '-DNUM_LED_FLASHES=1' -DBAUD_RATE=57600 -atmega328: AVR_FREQ = 16000000L -atmega328: LDSECTION = --section-start=.text=0x7800 -atmega328: $(PROGRAM)_atmega328.hex - -atmega328_isp: atmega328 -atmega328_isp: TARGET = atmega328 -atmega328_isp: MCU_TARGET = atmega328p -atmega328_isp: HFUSE = DA -atmega328_isp: LFUSE = FF -atmega328_isp: EFUSE = 05 -atmega328_isp: isp - -atmega328_pro8: TARGET = atmega328_pro_8MHz -atmega328_pro8: MCU_TARGET = atmega328p -atmega328_pro8: CFLAGS += '-DMAX_TIME_COUNT=F_CPU>>4' '-DNUM_LED_FLASHES=1' -DBAUD_RATE=57600 -DDOUBLE_SPEED -atmega328_pro8: AVR_FREQ = 8000000L -atmega328_pro8: LDSECTION = --section-start=.text=0x7800 -atmega328_pro8: $(PROGRAM)_atmega328_pro_8MHz.hex - -atmega328_pro8_isp: atmega328_pro8 -atmega328_pro8_isp: TARGET = atmega328_pro_8MHz -atmega328_pro8_isp: MCU_TARGET = atmega328p -atmega328_pro8_isp: HFUSE = DA -atmega328_pro8_isp: LFUSE = FF -atmega328_pro8_isp: EFUSE = 05 -atmega328_pro8_isp: isp - -mega: TARGET = atmega1280 -mega: MCU_TARGET = atmega1280 -mega: CFLAGS += '-DMAX_TIME_COUNT=F_CPU>>4' '-DNUM_LED_FLASHES=0' -DBAUD_RATE=57600 -mega: AVR_FREQ = 16000000L -mega: LDSECTION = --section-start=.text=0x1F000 -mega: $(PROGRAM)_atmega1280.hex - -mega_isp: mega -mega_isp: TARGET = atmega1280 -mega_isp: MCU_TARGET = atmega1280 -mega_isp: HFUSE = DA -mega_isp: LFUSE = FF -mega_isp: EFUSE = F5 -mega_isp: isp - -isp: $(TARGET) - $(ISPFUSES) - $(ISPFLASH) - -isp-stk500: $(PROGRAM)_$(TARGET).hex - $(STK500-1) - $(STK500-2) - -%.elf: $(OBJ) - $(CC) $(CFLAGS) $(LDFLAGS) -o $@ $^ $(LIBS) - -clean: - rm -rf *.o *.elf *.lst *.map *.sym *.lss *.eep *.srec *.bin *.hex - -%.lst: %.elf - $(OBJDUMP) -h -S $< > $@ - -%.hex: %.elf - $(OBJCOPY) -j .text -j .data -O ihex $< $@ - -%.srec: %.elf - $(OBJCOPY) -j .text -j .data -O srec $< $@ - -%.bin: %.elf - $(OBJCOPY) -j .text -j .data -O binary $< $@ - diff --git a/build/linux/work/hardware/arduino/bootloaders/atmega8/ATmegaBOOT.c b/build/linux/work/hardware/arduino/bootloaders/atmega8/ATmegaBOOT.c deleted file mode 100644 index 17977e676..000000000 --- a/build/linux/work/hardware/arduino/bootloaders/atmega8/ATmegaBOOT.c +++ /dev/null @@ -1,507 +0,0 @@ -/**********************************************************/ -/* Serial Bootloader for Atmel mega8 AVR Controller */ -/* */ -/* ATmegaBOOT.c */ -/* */ -/* Copyright (c) 2003, Jason P. Kyle */ -/* */ -/* Hacked by DojoCorp - ZGZ - MMX - IVR */ -/* Hacked by David A. Mellis */ -/* */ -/* This program is free software; you can redistribute it */ -/* and/or modify it under the terms of the GNU General */ -/* Public License as published by the Free Software */ -/* Foundation; either version 2 of the License, or */ -/* (at your option) any later version. */ -/* */ -/* This program is distributed in the hope that it will */ -/* be useful, but WITHOUT ANY WARRANTY; without even the */ -/* implied warranty of MERCHANTABILITY or FITNESS FOR A */ -/* PARTICULAR PURPOSE. See the GNU General Public */ -/* License for more details. */ -/* */ -/* You should have received a copy of the GNU General */ -/* Public License along with this program; if not, write */ -/* to the Free Software Foundation, Inc., */ -/* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -/* */ -/* Licence can be viewed at */ -/* http://www.fsf.org/licenses/gpl.txt */ -/* */ -/* Target = Atmel AVR m8 */ -/**********************************************************/ - -#include -#include -#include -#include -#include -#include - -//#define F_CPU 16000000 - -/* We, Malmoitians, like slow interaction - * therefore the slow baud rate ;-) - */ -//#define BAUD_RATE 9600 - -/* 6.000.000 is more or less 8 seconds at the - * speed configured here - */ -//#define MAX_TIME_COUNT 6000000 -#define MAX_TIME_COUNT (F_CPU>>1) -///#define MAX_TIME_COUNT_MORATORY 1600000 - -/* SW_MAJOR and MINOR needs to be updated from time to time to avoid warning message from AVR Studio */ -#define HW_VER 0x02 -#define SW_MAJOR 0x01 -#define SW_MINOR 0x12 - -// AVR-GCC compiler compatibility -// avr-gcc compiler v3.1.x and older doesn't support outb() and inb() -// if necessary, convert outb and inb to outp and inp -#ifndef outb - #define outb(sfr,val) (_SFR_BYTE(sfr) = (val)) -#endif -#ifndef inb - #define inb(sfr) _SFR_BYTE(sfr) -#endif - -/* defines for future compatibility */ -#ifndef cbi - #define cbi(sfr, bit) (_SFR_BYTE(sfr) &= ~_BV(bit)) -#endif -#ifndef sbi - #define sbi(sfr, bit) (_SFR_BYTE(sfr) |= _BV(bit)) -#endif - -/* Adjust to suit whatever pin your hardware uses to enter the bootloader */ -#define eeprom_rb(addr) eeprom_read_byte ((uint8_t *)(addr)) -#define eeprom_rw(addr) eeprom_read_word ((uint16_t *)(addr)) -#define eeprom_wb(addr, val) eeprom_write_byte ((uint8_t *)(addr), (uint8_t)(val)) - -/* Onboard LED is connected to pin PB5 */ -#define LED_DDR DDRB -#define LED_PORT PORTB -#define LED_PIN PINB -#define LED PINB5 - - -#define SIG1 0x1E // Yep, Atmel is the only manufacturer of AVR micros. Single source :( -#define SIG2 0x93 -#define SIG3 0x07 -#define PAGE_SIZE 0x20U //32 words - - -void putch(char); -char getch(void); -void getNch(uint8_t); -void byte_response(uint8_t); -void nothing_response(void); - -union address_union { - uint16_t word; - uint8_t byte[2]; -} address; - -union length_union { - uint16_t word; - uint8_t byte[2]; -} length; - -struct flags_struct { - unsigned eeprom : 1; - unsigned rampz : 1; -} flags; - -uint8_t buff[256]; -//uint8_t address_high; - -uint8_t pagesz=0x80; - -uint8_t i; -//uint8_t bootuart0=0,bootuart1=0; - - -void (*app_start)(void) = 0x0000; - -int main(void) -{ - uint8_t ch,ch2; - uint16_t w; - - //cbi(BL_DDR,BL); - //sbi(BL_PORT,BL); - - asm volatile("nop\n\t"); - - /* check if flash is programmed already, if not start bootloader anyway */ - //if(pgm_read_byte_near(0x0000) != 0xFF) { - - /* check if bootloader pin is set low */ - //if(bit_is_set(BL_PIN,BL)) app_start(); - //} - - /* initialize UART(s) depending on CPU defined */ - /* m8 */ - UBRRH = (((F_CPU/BAUD_RATE)/16)-1)>>8; // set baud rate - UBRRL = (((F_CPU/BAUD_RATE)/16)-1); - UCSRB = (1<> 8; - //UCSRA = 0x00; - //UCSRC = 0x86; - //UCSRB = _BV(TXEN)|_BV(RXEN); - - - /* this was giving uisp problems, so I removed it; without it, the boot - works on with uisp and avrdude on the mac (at least). */ - //putch('\0'); - - //uint32_t l; - //uint32_t time_count; - //time_count=0; - - /* set LED pin as output */ - sbi(LED_DDR,LED); - for (i = 0; i < 16; i++) { - outb(LED_PORT, inb(LED_PORT) ^ _BV(LED)); - _delay_loop_2(0); - } - - //for (l=0; l<40000000; l++) - //outb(LED_PORT, inb(LED_PORT) ^= _BV(LED)); - - /* flash onboard LED three times to signal entering of bootloader */ - //for(i=0; i<3; ++i) { - //for(l=0; l<40000000; ++l); - //sbi(LED_PORT,LED); - //for(l=0; l<40000000; ++l); - //cbi(LED_PORT,LED); - //} - - /* see comment at previous call to putch() */ - //putch('\0'); // this line is needed for the synchronization of the programmer - - /* forever */ - for (;;) { - //if((inb(UCSRA) & _BV(RXC))){ - /* get character from UART */ - ch = getch(); - - /* A bunch of if...else if... gives smaller code than switch...case ! */ - - /* Hello is anyone home ? */ - if(ch=='0') { - nothing_response(); - } - - /* Request programmer ID */ - /* Not using PROGMEM string due to boot block in m128 being beyond 64kB boundry */ - /* Would need to selectively manipulate RAMPZ, and it's only 9 characters anyway so who cares. */ - else if(ch=='1') { - if (getch() == ' ') { - putch(0x14); - putch('A'); - putch('V'); - putch('R'); - putch(' '); - putch('I'); - putch('S'); - putch('P'); - putch(0x10); - } - } - - /* AVR ISP/STK500 board commands DON'T CARE so default nothing_response */ - else if(ch=='@') { - ch2 = getch(); - if (ch2>0x85) getch(); - nothing_response(); - } - - /* AVR ISP/STK500 board requests */ - else if(ch=='A') { - ch2 = getch(); - if(ch2==0x80) byte_response(HW_VER); // Hardware version - else if(ch2==0x81) byte_response(SW_MAJOR); // Software major version - else if(ch2==0x82) byte_response(SW_MINOR); // Software minor version - //else if(ch2==0x98) byte_response(0x03); // Unknown but seems to be required by avr studio 3.56 - else byte_response(0x00); // Covers various unnecessary responses we don't care about - } - - /* Device Parameters DON'T CARE, DEVICE IS FIXED */ - else if(ch=='B') { - getNch(20); - nothing_response(); - } - - /* Parallel programming stuff DON'T CARE */ - else if(ch=='E') { - getNch(5); - nothing_response(); - } - - /* Enter programming mode */ - else if(ch=='P') { - nothing_response(); - // FIXME: modified only here by DojoCorp, Mumbai, India, 20050626 - //time_count=0; // exted the delay once entered prog.mode - } - - /* Leave programming mode */ - else if(ch=='Q') { - nothing_response(); - //time_count=MAX_TIME_COUNT_MORATORY; // once the programming is done, - // we should start the application - // but uisp has problems with this, - // therefore we just change the times - // and give the programmer 1 sec to react - } - - /* Erase device, don't care as we will erase one page at a time anyway. */ - else if(ch=='R') { - nothing_response(); - } - - /* Set address, little endian. EEPROM in bytes, FLASH in words */ - /* Perhaps extra address bytes may be added in future to support > 128kB FLASH. */ - /* This might explain why little endian was used here, big endian used everywhere else. */ - else if(ch=='U') { - address.byte[0] = getch(); - address.byte[1] = getch(); - nothing_response(); - } - - /* Universal SPI programming command, disabled. Would be used for fuses and lock bits. */ - else if(ch=='V') { - getNch(4); - byte_response(0x00); - } - - /* Write memory, length is big endian and is in bytes */ - else if(ch=='d') { - length.byte[1] = getch(); - length.byte[0] = getch(); - flags.eeprom = 0; - if (getch() == 'E') flags.eeprom = 1; - for (w=0;w127) address_high = 0x01; //Only possible with m128, m256 will need 3rd address byte. FIXME - //else address_high = 0x00; - - //address.word = address.word << 1; //address * 2 -> byte location - //if ((length.byte[0] & 0x01)) length.word++; //Even up an odd number of bytes - cli(); //Disable interrupts, just to be sure - while(bit_is_set(EECR,EEWE)); //Wait for previous EEPROM writes to complete - asm volatile( - "clr r17 \n\t" //page_word_count - "lds r30,address \n\t" //Address of FLASH location (in words) - "lds r31,address+1 \n\t" - "lsl r30 \n\t" //address * 2 -> byte location - "rol r31 \n\t" - "ldi r28,lo8(buff) \n\t" //Start of buffer array in RAM - "ldi r29,hi8(buff) \n\t" - "lds r24,length \n\t" //Length of data to be written (in bytes) - "lds r25,length+1 \n\t" - "sbrs r24,0 \n\t" //Even up an odd number of bytes - "rjmp length_loop \n\t" - "adiw r24,1 \n\t" - "length_loop: \n\t" //Main loop, repeat for number of words in block - "cpi r17,0x00 \n\t" //If page_word_count=0 then erase page - "brne no_page_erase \n\t" - "rcall wait_spm \n\t" -// "wait_spm1: \n\t" -// "lds r16,%0 \n\t" //Wait for previous spm to complete -// "andi r16,1 \n\t" -// "cpi r16,1 \n\t" -// "breq wait_spm1 \n\t" - "ldi r16,0x03 \n\t" //Erase page pointed to by Z - "sts %0,r16 \n\t" - "spm \n\t" - "rcall wait_spm \n\t" -// "wait_spm2: \n\t" -// "lds r16,%0 \n\t" //Wait for previous spm to complete -// "andi r16,1 \n\t" -// "cpi r16,1 \n\t" -// "breq wait_spm2 \n\t" - "ldi r16,0x11 \n\t" //Re-enable RWW section - "sts %0,r16 \n\t" - "spm \n\t" - "no_page_erase: \n\t" - "ld r0,Y+ \n\t" //Write 2 bytes into page buffer - "ld r1,Y+ \n\t" - - "rcall wait_spm \n\t" -// "wait_spm3: \n\t" -// "lds r16,%0 \n\t" //Wait for previous spm to complete -// "andi r16,1 \n\t" -// "cpi r16,1 \n\t" -// "breq wait_spm3 \n\t" - "ldi r16,0x01 \n\t" //Load r0,r1 into FLASH page buffer - "sts %0,r16 \n\t" - "spm \n\t" - - "inc r17 \n\t" //page_word_count++ - "cpi r17,%1 \n\t" - "brlo same_page \n\t" //Still same page in FLASH - "write_page: \n\t" - "clr r17 \n\t" //New page, write current one first - "rcall wait_spm \n\t" -// "wait_spm4: \n\t" -// "lds r16,%0 \n\t" //Wait for previous spm to complete -// "andi r16,1 \n\t" -// "cpi r16,1 \n\t" -// "breq wait_spm4 \n\t" - "ldi r16,0x05 \n\t" //Write page pointed to by Z - "sts %0,r16 \n\t" - "spm \n\t" - "rcall wait_spm \n\t" -// "wait_spm5: \n\t" -// "lds r16,%0 \n\t" //Wait for previous spm to complete -// "andi r16,1 \n\t" -// "cpi r16,1 \n\t" -// "breq wait_spm5 \n\t" - "ldi r16,0x11 \n\t" //Re-enable RWW section - "sts %0,r16 \n\t" - "spm \n\t" - "same_page: \n\t" - "adiw r30,2 \n\t" //Next word in FLASH - "sbiw r24,2 \n\t" //length-2 - "breq final_write \n\t" //Finished - "rjmp length_loop \n\t" - - "wait_spm: \n\t" - "lds r16,%0 \n\t" //Wait for previous spm to complete - "andi r16,1 \n\t" - "cpi r16,1 \n\t" - "breq wait_spm \n\t" - "ret \n\t" - - "final_write: \n\t" - "cpi r17,0 \n\t" - "breq block_done \n\t" - "adiw r24,2 \n\t" //length+2, fool above check on length after short page write - "rjmp write_page \n\t" - "block_done: \n\t" - "clr __zero_reg__ \n\t" //restore zero register - : "=m" (SPMCR) : "M" (PAGE_SIZE) : "r0","r16","r17","r24","r25","r28","r29","r30","r31"); - - /* Should really add a wait for RWW section to be enabled, don't actually need it since we never */ - /* exit the bootloader without a power cycle anyhow */ - } - putch(0x14); - putch(0x10); - } - } - - /* Read memory block mode, length is big endian. */ - else if(ch=='t') { - length.byte[1] = getch(); - length.byte[0] = getch(); - if (getch() == 'E') flags.eeprom = 1; - else { - flags.eeprom = 0; - address.word = address.word << 1; // address * 2 -> byte location - } - if (getch() == ' ') { // Command terminator - putch(0x14); - for (w=0;w < length.word;w++) { // Can handle odd and even lengths okay - if (flags.eeprom) { // Byte access EEPROM read - putch(eeprom_rb(address.word)); - address.word++; - } else { - if (!flags.rampz) putch(pgm_read_byte_near(address.word)); - address.word++; - } - } - putch(0x10); - } - } - - /* Get device signature bytes */ - else if(ch=='u') { - if (getch() == ' ') { - putch(0x14); - putch(SIG1); - putch(SIG2); - putch(SIG3); - putch(0x10); - } - } - - /* Read oscillator calibration byte */ - else if(ch=='v') { - byte_response(0x00); - } -// } else { -// time_count++; -// if (time_count>=MAX_TIME_COUNT) { -// app_start(); -// } -// } - } /* end of forever loop */ -} - -void putch(char ch) -{ - /* m8 */ - while (!(inb(UCSRA) & _BV(UDRE))); - outb(UDR,ch); -} - -char getch(void) -{ - /* m8 */ - uint32_t count = 0; - while(!(inb(UCSRA) & _BV(RXC))) { - /* HACKME:: here is a good place to count times*/ - count++; - if (count > MAX_TIME_COUNT) - app_start(); - } - return (inb(UDR)); -} - -void getNch(uint8_t count) -{ - uint8_t i; - for(i=0;i $@ - -size: $(PROGRAM).hex - $(SIZE) $^ - -# Rules for building the .text rom images - -text: hex bin srec - -hex: $(PROGRAM).hex -bin: $(PROGRAM).bin -srec: $(PROGRAM).srec - -%.hex: %.elf - $(OBJCOPY) -j .text -j .data -O ihex $< $@ - -%.srec: %.elf - $(OBJCOPY) -j .text -j .data -O srec $< $@ - -%.bin: %.elf - $(OBJCOPY) -j .text -j .data -O binary $< $@ diff --git a/build/linux/work/hardware/arduino/bootloaders/bt/ATmegaBOOT_168.c b/build/linux/work/hardware/arduino/bootloaders/bt/ATmegaBOOT_168.c deleted file mode 100644 index c73eefa14..000000000 --- a/build/linux/work/hardware/arduino/bootloaders/bt/ATmegaBOOT_168.c +++ /dev/null @@ -1,1038 +0,0 @@ -/**********************************************************/ -/* Serial Bootloader for Atmel megaAVR Controllers */ -/* */ -/* tested with ATmega8, ATmega128 and ATmega168 */ -/* should work with other mega's, see code for details */ -/* */ -/* ATmegaBOOT.c */ -/* */ -/* build: 050815 */ -/* date : 15.08.2005 */ -/* */ -/* 20060802: hacked for Arduino by D. Cuartielles */ -/* based on a previous hack by D. Mellis */ -/* and D. Cuartielles */ -/* */ -/* Monitor and debug functions were added to the original */ -/* code by Dr. Erik Lins, chip45.com. (See below) */ -/* */ -/* Thanks to Karl Pitrich for fixing a bootloader pin */ -/* problem and more informative LED blinking! */ -/* */ -/* For the latest version see: */ -/* http://www.chip45.com/ */ -/* */ -/* ------------------------------------------------------ */ -/* */ -/* based on stk500boot.c */ -/* Copyright (c) 2003, Jason P. Kyle */ -/* All rights reserved. */ -/* see avr1.org for original file and information */ -/* */ -/* This program is free software; you can redistribute it */ -/* and/or modify it under the terms of the GNU General */ -/* Public License as published by the Free Software */ -/* Foundation; either version 2 of the License, or */ -/* (at your option) any later version. */ -/* */ -/* This program is distributed in the hope that it will */ -/* be useful, but WITHOUT ANY WARRANTY; without even the */ -/* implied warranty of MERCHANTABILITY or FITNESS FOR A */ -/* PARTICULAR PURPOSE. See the GNU General Public */ -/* License for more details. */ -/* */ -/* You should have received a copy of the GNU General */ -/* Public License along with this program; if not, write */ -/* to the Free Software Foundation, Inc., */ -/* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -/* */ -/* Licence can be viewed at */ -/* http://www.fsf.org/licenses/gpl.txt */ -/* */ -/* Target = Atmel AVR m128,m64,m32,m16,m8,m162,m163,m169, */ -/* m8515,m8535. ATmega161 has a very small boot block so */ -/* isn't supported. */ -/* */ -/* Tested with m128,m8,m163 - feel free to let me know */ -/* how/if it works for you. */ -/* */ -/**********************************************************/ - - -/* some includes */ -#include -#include -#include -#include -#include - - -#define set_output(sfr, bit) (_SFR_BYTE(sfr) |= _BV(bit)) -#define set_input(sfr, bit) (_SFR_BYTE(sfr) &= ~_BV(bit)) - - -#define high(sfr, bit) (_SFR_BYTE(sfr) |= _BV(bit)) -#define low(sfr, bit) (_SFR_BYTE(sfr) &= ~_BV(bit)) - - - - -/* the current avr-libc eeprom functions do not support the ATmega168 */ -/* own eeprom write/read functions are used instead */ -#if !defined(__AVR_ATmega168__) || !defined(__AVR_ATmega328P__) -#include -#endif - -/* define F_CPU according to AVR_FREQ set in Makefile */ -/* Is there a better way to pass such a parameter from Makefile to source code ? */ - -#define F_CPU 16000000L - -#include - - -/* 20060803: hacked by DojoCorp */ -/* set the waiting time for the bootloader */ -#define MAX_TIME_COUNT (F_CPU>>1) - -/* set the UART baud rate */ -/* 20060803: hacked by DojoCorp */ -#define BAUD_RATE 115200 - - -/* SW_MAJOR and MINOR needs to be updated from time to time to avoid warning message from AVR Studio */ -/* never allow AVR Studio to do an update !!!! */ -#define HW_VER 0x02 -#define SW_MAJOR 0x01 -#define SW_MINOR 0x0f - - -/* Adjust to suit whatever pin your hardware uses to enter the bootloader */ -/* ATmega128 has two UARTS so two pins are used to enter bootloader and select UART */ -/* BL0... means UART0, BL1... means UART1 */ -#ifdef __AVR_ATmega128__ -#define BL_DDR DDRF -#define BL_PORT PORTF -#define BL_PIN PINF -#define BL0 PINF7 -#define BL1 PINF6 -#else -/* other ATmegas have only one UART, so only one pin is defined to enter bootloader */ -#define BL_DDR DDRD -#define BL_PORT PORTD -#define BL_PIN PIND -#define BL PIND6 -#endif - - -/* onboard LED is used to indicate, that the bootloader was entered (3x flashing) */ -/* if monitor functions are included, LED goes on after monitor was entered */ -#ifdef __AVR_ATmega128__ -/* Onboard LED is connected to pin PB7 (e.g. Crumb128, PROBOmega128, Savvy128) */ -#define LED_DDR DDRB -#define LED_PORT PORTB -#define LED_PIN PINB -#define LED PINB7 -#else -/* Onboard LED is connected to pin PB2 (e.g. Crumb8, Crumb168) */ -#define LED_DDR DDRB -#define LED_PORT PORTB -#define LED_PIN PINB -/* 20060803: hacked by DojoCorp, LED pin is B5 in Arduino */ -/* #define LED PINB2 */ -#define LED PINB5 -#endif - - -/* monitor functions will only be compiled when using ATmega128, due to bootblock size constraints */ -#ifdef __AVR_ATmega128__ -#define MONITOR -#endif - - -/* define various device id's */ -/* manufacturer byte is always the same */ -#define SIG1 0x1E // Yep, Atmel is the only manufacturer of AVR micros. Single source :( - -#if defined __AVR_ATmega128__ -#define SIG2 0x97 -#define SIG3 0x02 -#define PAGE_SIZE 0x80U //128 words - -#elif defined __AVR_ATmega64__ -#define SIG2 0x96 -#define SIG3 0x02 -#define PAGE_SIZE 0x80U //128 words - -#elif defined __AVR_ATmega32__ -#define SIG2 0x95 -#define SIG3 0x02 -#define PAGE_SIZE 0x40U //64 words - -#elif defined __AVR_ATmega16__ -#define SIG2 0x94 -#define SIG3 0x03 -#define PAGE_SIZE 0x40U //64 words - -#elif defined __AVR_ATmega8__ -#define SIG2 0x93 -#define SIG3 0x07 -#define PAGE_SIZE 0x20U //32 words - -#elif defined __AVR_ATmega88__ -#define SIG2 0x93 -#define SIG3 0x0a -#define PAGE_SIZE 0x20U //32 words - -#elif defined __AVR_ATmega168__ -#define SIG2 0x94 -#define SIG3 0x06 -#define PAGE_SIZE 0x40U //64 words - -#elif defined __AVR_ATmega328P__ -#define SIG2 0x95 -#define SIG3 0x0F -#define PAGE_SIZE 0x40U //64 words - -#elif defined __AVR_ATmega162__ -#define SIG2 0x94 -#define SIG3 0x04 -#define PAGE_SIZE 0x40U //64 words - -#elif defined __AVR_ATmega163__ -#define SIG2 0x94 -#define SIG3 0x02 -#define PAGE_SIZE 0x40U //64 words - -#elif defined __AVR_ATmega169__ -#define SIG2 0x94 -#define SIG3 0x05 -#define PAGE_SIZE 0x40U //64 words - -#elif defined __AVR_ATmega8515__ -#define SIG2 0x93 -#define SIG3 0x06 -#define PAGE_SIZE 0x20U //32 words - -#elif defined __AVR_ATmega8535__ -#define SIG2 0x93 -#define SIG3 0x08 -#define PAGE_SIZE 0x20U //32 words -#endif - - -/* function prototypes */ -void putch(char); -char getch(void); -void getNch(uint8_t); -void byte_response(uint8_t); -void nothing_response(void); -char gethex(void); -void puthex(char); -void flash_led(uint8_t); - -/* some variables */ -union address_union { - uint16_t word; - uint8_t byte[2]; -} address; - -union length_union { - uint16_t word; - uint8_t byte[2]; -} length; - -struct flags_struct { - unsigned eeprom : 1; - unsigned rampz : 1; -} flags; - -uint8_t buff[256]; -uint8_t address_high; - -uint8_t pagesz=0x80; - -uint8_t i; -uint8_t bootuart = 0; - -void (*app_start)(void) = 0x0000; - - -/* main program starts here */ -int main(void) -{ - uint8_t ch,ch2; - uint16_t w; - - asm volatile("nop\n\t"); - - /* set pin direction for bootloader pin and enable pullup */ - /* for ATmega128, two pins need to be initialized */ -#ifdef __AVR_ATmega128__ - BL_DDR &= ~_BV(BL0); - BL_DDR &= ~_BV(BL1); - BL_PORT |= _BV(BL0); - BL_PORT |= _BV(BL1); -#else - BL_DDR &= ~_BV(BL); - BL_PORT |= _BV(BL); -#endif - - -#ifdef __AVR_ATmega128__ - /* check which UART should be used for booting */ - if(bit_is_clear(BL_PIN, BL0)) { - bootuart = 1; - } - else if(bit_is_clear(BL_PIN, BL1)) { - bootuart = 2; - } -#endif - - /* check if flash is programmed already, if not start bootloader anyway */ - if(pgm_read_byte_near(0x0000) != 0xFF) { - -#ifdef __AVR_ATmega128__ - /* no UART was selected, start application */ - if(!bootuart) { - app_start(); - } -#else - /* check if bootloader pin is set low */ - /* we don't start this part neither for the m8, nor m168 */ - //if(bit_is_set(BL_PIN, BL)) { - // app_start(); - // } -#endif - } - -#ifdef __AVR_ATmega128__ - /* no bootuart was selected, default to uart 0 */ - if(!bootuart) { - bootuart = 1; - } -#endif - - - /* initialize UART(s) depending on CPU defined */ -#ifdef __AVR_ATmega128__ - if(bootuart == 1) { - UBRR0L = (uint8_t)(F_CPU/(BAUD_RATE*16L)-1); - UBRR0H = (F_CPU/(BAUD_RATE*16L)-1) >> 8; - UCSR0A = 0x00; - UCSR0C = 0x06; - UCSR0B = _BV(TXEN0)|_BV(RXEN0); - } - if(bootuart == 2) { - UBRR1L = (uint8_t)(F_CPU/(BAUD_RATE*16L)-1); - UBRR1H = (F_CPU/(BAUD_RATE*16L)-1) >> 8; - UCSR1A = 0x00; - UCSR1C = 0x06; - UCSR1B = _BV(TXEN1)|_BV(RXEN1); - } -#elif defined __AVR_ATmega163__ - UBRR = (uint8_t)(F_CPU/(BAUD_RATE*16L)-1); - UBRRHI = (F_CPU/(BAUD_RATE*16L)-1) >> 8; - UCSRA = 0x00; - UCSRB = _BV(TXEN)|_BV(RXEN); -#elif defined(__AVR_ATmega168__) || defined(__AVR_ATmega328P__) - - UBRR0H = ((F_CPU / 16 + BAUD_RATE / 2) / BAUD_RATE - 1) >> 8; - UBRR0L = ((F_CPU / 16 + BAUD_RATE / 2) / BAUD_RATE - 1); - - - //UBRR0L = (uint8_t)(F_CPU/(BAUD_RATE*16L)-1); - //UBRR0H = (F_CPU/(BAUD_RATE*16L)-1) >> 8; - UCSR0B = (1<>8; // set baud rate - UBRRL = (((F_CPU/BAUD_RATE)/16)-1); - UCSRB = (1<> 8; - UCSRA = 0x00; - UCSRC = 0x06; - UCSRB = _BV(TXEN)|_BV(RXEN); -#endif - - /* set LED pin as output */ - LED_DDR |= _BV(LED); - - - - set_output(DDRD,PIND7); - high(PORTD,PD7); - for (i = 0; i < 16; i++) { - - _delay_loop_2(0); - } - - - low(PORTD,PD7); - - - /* flash onboard LED to signal entering of bootloader */ -#ifdef __AVR_ATmega128__ - // 4x for UART0, 5x for UART1 - flash_led(3 + bootuart); -#else - flash_led(3); -#endif - - /* 20050803: by DojoCorp, this is one of the parts provoking the - system to stop listening, cancelled from the original */ - //putch('\0'); - - - //message("SET BT PAGEMODE 3 2000 1"); -putch('S'); -putch('E'); -putch('T'); -putch(' '); -putch('B'); -putch('T'); -putch(' '); -putch('P'); -putch('A'); -putch('G'); -putch('E'); -putch('M'); -putch('O'); -putch('D'); -putch('E'); -putch(' '); -putch('3'); -putch(' '); -putch('2'); -putch('0'); -putch('0'); -putch('0'); -putch(' '); -putch('1'); -putch(0x0D); - - - //put_s("SET BT ROLE 0 f 7d00"); - putch('S'); - putch('E'); - putch('T'); - putch(' '); - putch('B'); - putch('T'); - putch(' '); - putch('R'); - putch('O'); - putch('L'); - putch('E'); - putch(' '); - putch('0'); - putch(' '); - putch('f'); - putch(' '); - putch('7'); - putch('d'); - putch('0'); - putch('0'); - putch(0x0D); - - - - - - - /* forever loop */ - for (;;) { - - /* get character from UART */ - ch = getch(); - - /* A bunch of if...else if... gives smaller code than switch...case ! */ - - /* Hello is anyone home ? */ - if(ch=='0') { - nothing_response(); - } - - - /* Request programmer ID */ - /* Not using PROGMEM string due to boot block in m128 being beyond 64kB boundry */ - /* Would need to selectively manipulate RAMPZ, and it's only 9 characters anyway so who cares. */ - else if(ch=='1') { - if (getch() == ' ') { - putch(0x14); - putch('A'); - putch('V'); - putch('R'); - putch(' '); - putch('I'); - putch('S'); - putch('P'); - putch(0x10); - } - } - - - /* AVR ISP/STK500 board commands DON'T CARE so default nothing_response */ - else if(ch=='@') { - ch2 = getch(); - if (ch2>0x85) getch(); - nothing_response(); - } - - - /* AVR ISP/STK500 board requests */ - else if(ch=='A') { - ch2 = getch(); - if(ch2==0x80) byte_response(HW_VER); // Hardware version - else if(ch2==0x81) byte_response(SW_MAJOR); // Software major version - else if(ch2==0x82) byte_response(SW_MINOR); // Software minor version - else if(ch2==0x98) byte_response(0x03); // Unknown but seems to be required by avr studio 3.56 - else byte_response(0x00); // Covers various unnecessary responses we don't care about - } - - - /* Device Parameters DON'T CARE, DEVICE IS FIXED */ - else if(ch=='B') { - getNch(20); - nothing_response(); - } - - - /* Parallel programming stuff DON'T CARE */ - else if(ch=='E') { - getNch(5); - nothing_response(); - } - - - /* Enter programming mode */ - else if(ch=='P') { - nothing_response(); - } - - - /* Leave programming mode */ - else if(ch=='Q') { - nothing_response(); - } - - - /* Erase device, don't care as we will erase one page at a time anyway. */ - else if(ch=='R') { - nothing_response(); - } - - - /* Set address, little endian. EEPROM in bytes, FLASH in words */ - /* Perhaps extra address bytes may be added in future to support > 128kB FLASH. */ - /* This might explain why little endian was used here, big endian used everywhere else. */ - else if(ch=='U') { - address.byte[0] = getch(); - address.byte[1] = getch(); - nothing_response(); - } - - - /* Universal SPI programming command, disabled. Would be used for fuses and lock bits. */ - else if(ch=='V') { - getNch(4); - byte_response(0x00); - } - - - /* Write memory, length is big endian and is in bytes */ - else if(ch=='d') { - length.byte[1] = getch(); - length.byte[0] = getch(); - flags.eeprom = 0; - if (getch() == 'E') flags.eeprom = 1; - for (w=0;w127) address_high = 0x01; //Only possible with m128, m256 will need 3rd address byte. FIXME - else address_high = 0x00; -#ifdef __AVR_ATmega128__ - RAMPZ = address_high; -#endif - address.word = address.word << 1; //address * 2 -> byte location - /* if ((length.byte[0] & 0x01) == 0x01) length.word++; //Even up an odd number of bytes */ - if ((length.byte[0] & 0x01)) length.word++; //Even up an odd number of bytes - cli(); //Disable interrupts, just to be sure - // HACKME: EEPE used to be EEWE - while(bit_is_set(EECR,EEPE)); //Wait for previous EEPROM writes to complete - asm volatile( - "clr r17 \n\t" //page_word_count - "lds r30,address \n\t" //Address of FLASH location (in bytes) - "lds r31,address+1 \n\t" - "ldi r28,lo8(buff) \n\t" //Start of buffer array in RAM - "ldi r29,hi8(buff) \n\t" - "lds r24,length \n\t" //Length of data to be written (in bytes) - "lds r25,length+1 \n\t" - "length_loop: \n\t" //Main loop, repeat for number of words in block - "cpi r17,0x00 \n\t" //If page_word_count=0 then erase page - "brne no_page_erase \n\t" - "wait_spm1: \n\t" - "lds r16,%0 \n\t" //Wait for previous spm to complete - "andi r16,1 \n\t" - "cpi r16,1 \n\t" - "breq wait_spm1 \n\t" - "ldi r16,0x03 \n\t" //Erase page pointed to by Z - "sts %0,r16 \n\t" - "spm \n\t" -#ifdef __AVR_ATmega163__ - ".word 0xFFFF \n\t" - "nop \n\t" -#endif - "wait_spm2: \n\t" - "lds r16,%0 \n\t" //Wait for previous spm to complete - "andi r16,1 \n\t" - "cpi r16,1 \n\t" - "breq wait_spm2 \n\t" - - "ldi r16,0x11 \n\t" //Re-enable RWW section - "sts %0,r16 \n\t" - "spm \n\t" -#ifdef __AVR_ATmega163__ - ".word 0xFFFF \n\t" - "nop \n\t" -#endif - "no_page_erase: \n\t" - "ld r0,Y+ \n\t" //Write 2 bytes into page buffer - "ld r1,Y+ \n\t" - - "wait_spm3: \n\t" - "lds r16,%0 \n\t" //Wait for previous spm to complete - "andi r16,1 \n\t" - "cpi r16,1 \n\t" - "breq wait_spm3 \n\t" - "ldi r16,0x01 \n\t" //Load r0,r1 into FLASH page buffer - "sts %0,r16 \n\t" - "spm \n\t" - - "inc r17 \n\t" //page_word_count++ - "cpi r17,%1 \n\t" - "brlo same_page \n\t" //Still same page in FLASH - "write_page: \n\t" - "clr r17 \n\t" //New page, write current one first - "wait_spm4: \n\t" - "lds r16,%0 \n\t" //Wait for previous spm to complete - "andi r16,1 \n\t" - "cpi r16,1 \n\t" - "breq wait_spm4 \n\t" -#ifdef __AVR_ATmega163__ - "andi r30,0x80 \n\t" // m163 requires Z6:Z1 to be zero during page write -#endif - "ldi r16,0x05 \n\t" //Write page pointed to by Z - "sts %0,r16 \n\t" - "spm \n\t" -#ifdef __AVR_ATmega163__ - ".word 0xFFFF \n\t" - "nop \n\t" - "ori r30,0x7E \n\t" // recover Z6:Z1 state after page write (had to be zero during write) -#endif - "wait_spm5: \n\t" - "lds r16,%0 \n\t" //Wait for previous spm to complete - "andi r16,1 \n\t" - "cpi r16,1 \n\t" - "breq wait_spm5 \n\t" - "ldi r16,0x11 \n\t" //Re-enable RWW section - "sts %0,r16 \n\t" - "spm \n\t" -#ifdef __AVR_ATmega163__ - ".word 0xFFFF \n\t" - "nop \n\t" -#endif - "same_page: \n\t" - "adiw r30,2 \n\t" //Next word in FLASH - "sbiw r24,2 \n\t" //length-2 - "breq final_write \n\t" //Finished - "rjmp length_loop \n\t" - "final_write: \n\t" - "cpi r17,0 \n\t" - "breq block_done \n\t" - "adiw r24,2 \n\t" //length+2, fool above check on length after short page write - "rjmp write_page \n\t" - "block_done: \n\t" - "clr __zero_reg__ \n\t" //restore zero register -#if defined __AVR_ATmega168__ || __AVR_ATmega328P__ - : "=m" (SPMCSR) : "M" (PAGE_SIZE) : "r0","r16","r17","r24","r25","r28","r29","r30","r31" -#else - : "=m" (SPMCR) : "M" (PAGE_SIZE) : "r0","r16","r17","r24","r25","r28","r29","r30","r31" -#endif - ); - /* Should really add a wait for RWW section to be enabled, don't actually need it since we never */ - /* exit the bootloader without a power cycle anyhow */ - } - putch(0x14); - putch(0x10); - } - } - - - /* Read memory block mode, length is big endian. */ - else if(ch=='t') { - length.byte[1] = getch(); - length.byte[0] = getch(); -#if defined __AVR_ATmega128__ - if (address.word>0x7FFF) flags.rampz = 1; // No go with m256, FIXME - else flags.rampz = 0; -#endif - if (getch() == 'E') flags.eeprom = 1; - else { - flags.eeprom = 0; - address.word = address.word << 1; // address * 2 -> byte location - } - if (getch() == ' ') { // Command terminator - putch(0x14); - for (w=0;w < length.word;w++) { // Can handle odd and even lengths okay - if (flags.eeprom) { // Byte access EEPROM read -#if defined __AVR_ATmega168__ || __AVR_ATmega328P__ - while(EECR & (1<= 'a') { - ah = ah - 'a' + 0x0a; - } else if(ah >= '0') { - ah -= '0'; - } - if(al >= 'a') { - al = al - 'a' + 0x0a; - } else if(al >= '0') { - al -= '0'; - } - return (ah << 4) + al; -} - - -void puthex(char ch) { - char ah,al; - - ah = (ch & 0xf0) >> 4; - if(ah >= 0x0a) { - ah = ah - 0x0a + 'a'; - } else { - ah += '0'; - } - al = (ch & 0x0f); - if(al >= 0x0a) { - al = al - 0x0a + 'a'; - } else { - al += '0'; - } - putch(ah); - putch(al); -} - - -void putch(char ch) -{ -#ifdef __AVR_ATmega128__ - if(bootuart == 1) { - while (!(UCSR0A & _BV(UDRE0))); - UDR0 = ch; - } - else if (bootuart == 2) { - while (!(UCSR1A & _BV(UDRE1))); - UDR1 = ch; - } -#elif defined (__AVR_ATmega168__) || defined(__AVR_ATmega328P__) - while (!(UCSR0A & _BV(UDRE0))); - UDR0 = ch; -#else - /* m8,16,32,169,8515,8535,163 */ - while (!(UCSRA & _BV(UDRE))); - UDR = ch; -#endif -} - - -char getch(void) -{ -#ifdef __AVR_ATmega128__ - if(bootuart == 1) { - while(!(UCSR0A & _BV(RXC0))); - return UDR0; - } - else if(bootuart == 2) { - while(!(UCSR1A & _BV(RXC1))); - return UDR1; - } - return 0; -#elif defined (__AVR_ATmega168__) || defined(__AVR_ATmega328P__) - uint32_t count = 0; - while(!(UCSR0A & _BV(RXC0))){ - /* 20060803 DojoCorp:: Addon coming from the previous Bootloader*/ - /* HACKME:: here is a good place to count times*/ - count++; - if (count > MAX_TIME_COUNT) - app_start(); - } - return UDR0; -#else - /* m8,16,32,169,8515,8535,163 */ - uint32_t count = 0; - while(!(UCSRA & _BV(RXC))){ - /* 20060803 DojoCorp:: Addon coming from the previous Bootloader*/ - /* HACKME:: here is a good place to count times*/ - count++; - if (count > MAX_TIME_COUNT) - app_start(); - } - return UDR; -#endif -} - - -void getNch(uint8_t count) -{ - uint8_t i; - for(i=0;i $@ - -%.hex: %.elf - $(OBJCOPY) -j .text -j .data -O ihex $< $@ - -%.srec: %.elf - $(OBJCOPY) -j .text -j .data -O srec $< $@ - -%.bin: %.elf - $(OBJCOPY) -j .text -j .data -O binary $< $@ - diff --git a/build/linux/work/hardware/arduino/bootloaders/caterina/Caterina.c b/build/linux/work/hardware/arduino/bootloaders/caterina/Caterina.c deleted file mode 100644 index 0cb9590d5..000000000 --- a/build/linux/work/hardware/arduino/bootloaders/caterina/Caterina.c +++ /dev/null @@ -1,710 +0,0 @@ -/* - LUFA Library - Copyright (C) Dean Camera, 2011. - - dean [at] fourwalledcubicle [dot] com - www.lufa-lib.org -*/ - -/* - Copyright 2011 Dean Camera (dean [at] fourwalledcubicle [dot] com) - - Permission to use, copy, modify, distribute, and sell this - software and its documentation for any purpose is hereby granted - without fee, provided that the above copyright notice appear in - all copies and that both that the copyright notice and this - permission notice and warranty disclaimer appear in supporting - documentation, and that the name of the author not be used in - advertising or publicity pertaining to distribution of the - software without specific, written prior permission. - - The author disclaim all warranties with regard to this - software, including all implied warranties of merchantability - and fitness. In no event shall the author be liable for any - special, indirect or consequential damages or any damages - whatsoever resulting from loss of use, data or profits, whether - in an action of contract, negligence or other tortious action, - arising out of or in connection with the use or performance of - this software. -*/ - -/** \file - * - * Main source file for the CDC class bootloader. This file contains the complete bootloader logic. - */ - -#define INCLUDE_FROM_CATERINA_C -#include "Caterina.h" - -/** Contains the current baud rate and other settings of the first virtual serial port. This must be retained as some - * operating systems will not open the port unless the settings can be set successfully. - */ -static CDC_LineEncoding_t LineEncoding = { .BaudRateBPS = 0, - .CharFormat = CDC_LINEENCODING_OneStopBit, - .ParityType = CDC_PARITY_None, - .DataBits = 8 }; - -/** Current address counter. This stores the current address of the FLASH or EEPROM as set by the host, - * and is used when reading or writing to the AVRs memory (either FLASH or EEPROM depending on the issued - * command.) - */ -static uint32_t CurrAddress; - -/** Flag to indicate if the bootloader should be running, or should exit and allow the application code to run - * via a watchdog reset. When cleared the bootloader will exit, starting the watchdog and entering an infinite - * loop until the AVR restarts and the application runs. - */ -static bool RunBootloader = true; - -/* Pulse generation counters to keep track of the time remaining for each pulse type */ -#define TX_RX_LED_PULSE_PERIOD 100 -uint16_t TxLEDPulse = 0; // time remaining for Tx LED pulse -uint16_t RxLEDPulse = 0; // time remaining for Rx LED pulse - -/* Bootloader timeout timer */ -#define TIMEOUT_PERIOD 8000 -uint16_t Timeout = 0; - -uint16_t bootKey = 0x7777; -volatile uint16_t *const bootKeyPtr = (volatile uint16_t *)0x0A00; - -void StartSketch(void) -{ - cli(); - - /* Undo TIMER1 setup and clear the count before running the sketch */ - TIMSK1 = 0; - TCCR1B = 0; - TCNT1H = 0; // 16-bit write to TCNT1 requires high byte be written first - TCNT1L = 0; - - /* Relocate the interrupt vector table to the application section */ - MCUCR = (1 << IVCE); - MCUCR = 0; - - L_LED_OFF(); - TX_LED_OFF(); - RX_LED_OFF(); - - /* jump to beginning of application space */ - __asm__ volatile("jmp 0x0000"); -} - -/* Breathing animation on L LED indicates bootloader is running */ -uint16_t LLEDPulse; -void LEDPulse(void) -{ - LLEDPulse++; - uint8_t p = LLEDPulse >> 8; - if (p > 127) - p = 254-p; - p += p; - if (((uint8_t)LLEDPulse) > p) - L_LED_OFF(); - else - L_LED_ON(); -} - -/** Main program entry point. This routine configures the hardware required by the bootloader, then continuously - * runs the bootloader processing routine until instructed to soft-exit, or hard-reset via the watchdog to start - * the loaded application code. - */ -int main(void) -{ - /* Watchdog may be configured with a 15 ms period so must disable it before doing anything else */ - wdt_disable(); - - /* Check the reason for the reset and act accordingly */ - uint8_t mcusr_state = MCUSR; // store the initial state of the Status register - MCUSR = 0; // clear all reset flags - // After a power-on reset skip the bootloader and jump straight to sketch - // if one exists. - if (mcusr_state & (1< TIMEOUT_PERIOD) - RunBootloader = false; - - LEDPulse(); - } - - /* Disconnect from the host - USB interface will be reset later along with the AVR */ - USB_Detach(); - - /* Jump to beginning of application space to run the sketch - do not reset */ - StartSketch(); -} - -/** Configures all hardware required for the bootloader. */ -void SetupHardware(void) -{ - /* Disable watchdog if enabled by bootloader/fuses */ - MCUSR &= ~(1 << WDRF); - wdt_disable(); - - /* Disable clock division */ - clock_prescale_set(clock_div_1); - - /* Relocate the interrupt vector table to the bootloader section */ - MCUCR = (1 << IVCE); - MCUCR = (1 << IVSEL); - - LED_SETUP(); - CPU_PRESCALE(0); - L_LED_OFF(); - TX_LED_OFF(); - RX_LED_OFF(); - - /* Initialize TIMER1 to handle bootloader timeout and LED tasks. - * With 16 MHz clock and 1/64 prescaler, timer 1 is clocked at 250 kHz - * Our chosen compare match generates an interrupt every 1 ms. - * This interrupt is disabled selectively when doing memory reading, erasing, - * or writing since SPM has tight timing requirements. - */ - OCR1AH = 0; - OCR1AL = 250; - TIMSK1 = (1 << OCIE1A); // enable timer 1 output compare A match interrupt - TCCR1B = ((1 << CS11) | (1 << CS10)); // 1/64 prescaler on timer 1 input - - /* Initialize USB Subsystem */ - USB_Init(); -} - -//uint16_t ctr = 0; -ISR(TIMER1_COMPA_vect, ISR_BLOCK) -{ - /* Reset counter */ - TCNT1H = 0; - TCNT1L = 0; - - /* Check whether the TX or RX LED one-shot period has elapsed. if so, turn off the LED */ - if (TxLEDPulse && !(--TxLEDPulse)) - TX_LED_OFF(); - if (RxLEDPulse && !(--RxLEDPulse)) - RX_LED_OFF(); - - if (pgm_read_word(0) != 0xFFFF) - Timeout++; -} - -/** Event handler for the USB_ConfigurationChanged event. This configures the device's endpoints ready - * to relay data to and from the attached USB host. - */ -void EVENT_USB_Device_ConfigurationChanged(void) -{ - /* Setup CDC Notification, Rx and Tx Endpoints */ - Endpoint_ConfigureEndpoint(CDC_NOTIFICATION_EPNUM, EP_TYPE_INTERRUPT, - ENDPOINT_DIR_IN, CDC_NOTIFICATION_EPSIZE, - ENDPOINT_BANK_SINGLE); - - Endpoint_ConfigureEndpoint(CDC_TX_EPNUM, EP_TYPE_BULK, - ENDPOINT_DIR_IN, CDC_TXRX_EPSIZE, - ENDPOINT_BANK_SINGLE); - - Endpoint_ConfigureEndpoint(CDC_RX_EPNUM, EP_TYPE_BULK, - ENDPOINT_DIR_OUT, CDC_TXRX_EPSIZE, - ENDPOINT_BANK_SINGLE); -} - -/** Event handler for the USB_ControlRequest event. This is used to catch and process control requests sent to - * the device from the USB host before passing along unhandled control requests to the library for processing - * internally. - */ -void EVENT_USB_Device_ControlRequest(void) -{ - /* Ignore any requests that aren't directed to the CDC interface */ - if ((USB_ControlRequest.bmRequestType & (CONTROL_REQTYPE_TYPE | CONTROL_REQTYPE_RECIPIENT)) != - (REQTYPE_CLASS | REQREC_INTERFACE)) - { - return; - } - - /* Process CDC specific control requests */ - switch (USB_ControlRequest.bRequest) - { - case CDC_REQ_GetLineEncoding: - if (USB_ControlRequest.bmRequestType == (REQDIR_DEVICETOHOST | REQTYPE_CLASS | REQREC_INTERFACE)) - { - Endpoint_ClearSETUP(); - - /* Write the line coding data to the control endpoint */ - Endpoint_Write_Control_Stream_LE(&LineEncoding, sizeof(CDC_LineEncoding_t)); - Endpoint_ClearOUT(); - } - - break; - case CDC_REQ_SetLineEncoding: - if (USB_ControlRequest.bmRequestType == (REQDIR_HOSTTODEVICE | REQTYPE_CLASS | REQREC_INTERFACE)) - { - Endpoint_ClearSETUP(); - - /* Read the line coding data in from the host into the global struct */ - Endpoint_Read_Control_Stream_LE(&LineEncoding, sizeof(CDC_LineEncoding_t)); - Endpoint_ClearIN(); - } - - break; - } -} - -#if !defined(NO_BLOCK_SUPPORT) -/** Reads or writes a block of EEPROM or FLASH memory to or from the appropriate CDC data endpoint, depending - * on the AVR910 protocol command issued. - * - * \param[in] Command Single character AVR910 protocol command indicating what memory operation to perform - */ -static void ReadWriteMemoryBlock(const uint8_t Command) -{ - uint16_t BlockSize; - char MemoryType; - - bool HighByte = false; - uint8_t LowByte = 0; - - BlockSize = (FetchNextCommandByte() << 8); - BlockSize |= FetchNextCommandByte(); - - MemoryType = FetchNextCommandByte(); - - if ((MemoryType != 'E') && (MemoryType != 'F')) - { - /* Send error byte back to the host */ - WriteNextResponseByte('?'); - - return; - } - - /* Disable timer 1 interrupt - can't afford to process nonessential interrupts - * while doing SPM tasks */ - TIMSK1 = 0; - - /* Check if command is to read memory */ - if (Command == 'g') - { - /* Re-enable RWW section */ - boot_rww_enable(); - - while (BlockSize--) - { - if (MemoryType == 'F') - { - /* Read the next FLASH byte from the current FLASH page */ - #if (FLASHEND > 0xFFFF) - WriteNextResponseByte(pgm_read_byte_far(CurrAddress | HighByte)); - #else - WriteNextResponseByte(pgm_read_byte(CurrAddress | HighByte)); - #endif - - /* If both bytes in current word have been read, increment the address counter */ - if (HighByte) - CurrAddress += 2; - - HighByte = !HighByte; - } - else - { - /* Read the next EEPROM byte into the endpoint */ - WriteNextResponseByte(eeprom_read_byte((uint8_t*)(intptr_t)(CurrAddress >> 1))); - - /* Increment the address counter after use */ - CurrAddress += 2; - } - } - } - else - { - uint32_t PageStartAddress = CurrAddress; - - if (MemoryType == 'F') - { - boot_page_erase(PageStartAddress); - boot_spm_busy_wait(); - } - - while (BlockSize--) - { - if (MemoryType == 'F') - { - /* If both bytes in current word have been written, increment the address counter */ - if (HighByte) - { - /* Write the next FLASH word to the current FLASH page */ - boot_page_fill(CurrAddress, ((FetchNextCommandByte() << 8) | LowByte)); - - /* Increment the address counter after use */ - CurrAddress += 2; - } - else - { - LowByte = FetchNextCommandByte(); - } - - HighByte = !HighByte; - } - else - { - /* Write the next EEPROM byte from the endpoint */ - eeprom_write_byte((uint8_t*)((intptr_t)(CurrAddress >> 1)), FetchNextCommandByte()); - - /* Increment the address counter after use */ - CurrAddress += 2; - } - } - - /* If in FLASH programming mode, commit the page after writing */ - if (MemoryType == 'F') - { - /* Commit the flash page to memory */ - boot_page_write(PageStartAddress); - - /* Wait until write operation has completed */ - boot_spm_busy_wait(); - } - - /* Send response byte back to the host */ - WriteNextResponseByte('\r'); - } - - /* Re-enable timer 1 interrupt disabled earlier in this routine */ - TIMSK1 = (1 << OCIE1A); -} -#endif - -/** Retrieves the next byte from the host in the CDC data OUT endpoint, and clears the endpoint bank if needed - * to allow reception of the next data packet from the host. - * - * \return Next received byte from the host in the CDC data OUT endpoint - */ -static uint8_t FetchNextCommandByte(void) -{ - /* Select the OUT endpoint so that the next data byte can be read */ - Endpoint_SelectEndpoint(CDC_RX_EPNUM); - - /* If OUT endpoint empty, clear it and wait for the next packet from the host */ - while (!(Endpoint_IsReadWriteAllowed())) - { - Endpoint_ClearOUT(); - - while (!(Endpoint_IsOUTReceived())) - { - if (USB_DeviceState == DEVICE_STATE_Unattached) - return 0; - } - } - - /* Fetch the next byte from the OUT endpoint */ - return Endpoint_Read_8(); -} - -/** Writes the next response byte to the CDC data IN endpoint, and sends the endpoint back if needed to free up the - * bank when full ready for the next byte in the packet to the host. - * - * \param[in] Response Next response byte to send to the host - */ -static void WriteNextResponseByte(const uint8_t Response) -{ - /* Select the IN endpoint so that the next data byte can be written */ - Endpoint_SelectEndpoint(CDC_TX_EPNUM); - - /* If IN endpoint full, clear it and wait until ready for the next packet to the host */ - if (!(Endpoint_IsReadWriteAllowed())) - { - Endpoint_ClearIN(); - - while (!(Endpoint_IsINReady())) - { - if (USB_DeviceState == DEVICE_STATE_Unattached) - return; - } - } - - /* Write the next byte to the IN endpoint */ - Endpoint_Write_8(Response); - - TX_LED_ON(); - TxLEDPulse = TX_RX_LED_PULSE_PERIOD; -} - -#define STK_OK 0x10 -#define STK_INSYNC 0x14 // ' ' -#define CRC_EOP 0x20 // 'SPACE' -#define STK_GET_SYNC 0x30 // '0' - -#define STK_GET_PARAMETER 0x41 // 'A' -#define STK_SET_DEVICE 0x42 // 'B' -#define STK_SET_DEVICE_EXT 0x45 // 'E' -#define STK_LOAD_ADDRESS 0x55 // 'U' -#define STK_UNIVERSAL 0x56 // 'V' -#define STK_PROG_PAGE 0x64 // 'd' -#define STK_READ_PAGE 0x74 // 't' -#define STK_READ_SIGN 0x75 // 'u' - -/** Task to read in AVR910 commands from the CDC data OUT endpoint, process them, perform the required actions - * and send the appropriate response back to the host. - */ -void CDC_Task(void) -{ - /* Select the OUT endpoint */ - Endpoint_SelectEndpoint(CDC_RX_EPNUM); - - /* Check if endpoint has a command in it sent from the host */ - if (!(Endpoint_IsOUTReceived())) - return; - - RX_LED_ON(); - RxLEDPulse = TX_RX_LED_PULSE_PERIOD; - - /* Read in the bootloader command (first byte sent from host) */ - uint8_t Command = FetchNextCommandByte(); - - if (Command == 'E') - { - /* We nearly run out the bootloader timeout clock, - * leaving just a few hundred milliseconds so the - * bootloder has time to respond and service any - * subsequent requests */ - Timeout = TIMEOUT_PERIOD - 500; - - /* Re-enable RWW section - must be done here in case - * user has disabled verification on upload. */ - boot_rww_enable_safe(); - - // Send confirmation byte back to the host - WriteNextResponseByte('\r'); - } - else if (Command == 'T') - { - FetchNextCommandByte(); - - // Send confirmation byte back to the host - WriteNextResponseByte('\r'); - } - else if ((Command == 'L') || (Command == 'P')) - { - // Send confirmation byte back to the host - WriteNextResponseByte('\r'); - } - else if (Command == 't') - { - // Return ATMEGA128 part code - this is only to allow AVRProg to use the bootloader - WriteNextResponseByte(0x44); - WriteNextResponseByte(0x00); - } - else if (Command == 'a') - { - // Indicate auto-address increment is supported - WriteNextResponseByte('Y'); - } - else if (Command == 'A') - { - // Set the current address to that given by the host - CurrAddress = (FetchNextCommandByte() << 9); - CurrAddress |= (FetchNextCommandByte() << 1); - - // Send confirmation byte back to the host - WriteNextResponseByte('\r'); - } - else if (Command == 'p') - { - // Indicate serial programmer back to the host - WriteNextResponseByte('S'); - } - else if (Command == 'S') - { - // Write the 7-byte software identifier to the endpoint - for (uint8_t CurrByte = 0; CurrByte < 7; CurrByte++) - WriteNextResponseByte(SOFTWARE_IDENTIFIER[CurrByte]); - } - else if (Command == 'V') - { - WriteNextResponseByte('0' + BOOTLOADER_VERSION_MAJOR); - WriteNextResponseByte('0' + BOOTLOADER_VERSION_MINOR); - } - else if (Command == 's') - { - WriteNextResponseByte(AVR_SIGNATURE_3); - WriteNextResponseByte(AVR_SIGNATURE_2); - WriteNextResponseByte(AVR_SIGNATURE_1); - } - else if (Command == 'e') - { - // Clear the application section of flash - for (uint32_t CurrFlashAddress = 0; CurrFlashAddress < BOOT_START_ADDR; CurrFlashAddress += SPM_PAGESIZE) - { - boot_page_erase(CurrFlashAddress); - boot_spm_busy_wait(); - boot_page_write(CurrFlashAddress); - boot_spm_busy_wait(); - } - - // Send confirmation byte back to the host - WriteNextResponseByte('\r'); - } - #if !defined(NO_LOCK_BYTE_WRITE_SUPPORT) - else if (Command == 'l') - { - // Set the lock bits to those given by the host - boot_lock_bits_set(FetchNextCommandByte()); - - // Send confirmation byte back to the host - WriteNextResponseByte('\r'); - } - #endif - else if (Command == 'r') - { - WriteNextResponseByte(boot_lock_fuse_bits_get(GET_LOCK_BITS)); - } - else if (Command == 'F') - { - WriteNextResponseByte(boot_lock_fuse_bits_get(GET_LOW_FUSE_BITS)); - } - else if (Command == 'N') - { - WriteNextResponseByte(boot_lock_fuse_bits_get(GET_HIGH_FUSE_BITS)); - } - else if (Command == 'Q') - { - WriteNextResponseByte(boot_lock_fuse_bits_get(GET_EXTENDED_FUSE_BITS)); - } - #if !defined(NO_BLOCK_SUPPORT) - else if (Command == 'b') - { - WriteNextResponseByte('Y'); - - // Send block size to the host - WriteNextResponseByte(SPM_PAGESIZE >> 8); - WriteNextResponseByte(SPM_PAGESIZE & 0xFF); - } - else if ((Command == 'B') || (Command == 'g')) - { - // Keep resetting the timeout counter if we're receiving self-programming instructions - Timeout = 0; - // Delegate the block write/read to a separate function for clarity - ReadWriteMemoryBlock(Command); - } - #endif - #if !defined(NO_FLASH_BYTE_SUPPORT) - else if (Command == 'C') - { - // Write the high byte to the current flash page - boot_page_fill(CurrAddress, FetchNextCommandByte()); - - // Send confirmation byte back to the host - WriteNextResponseByte('\r'); - } - else if (Command == 'c') - { - // Write the low byte to the current flash page - boot_page_fill(CurrAddress | 0x01, FetchNextCommandByte()); - - // Increment the address - CurrAddress += 2; - - // Send confirmation byte back to the host - WriteNextResponseByte('\r'); - } - else if (Command == 'm') - { - // Commit the flash page to memory - boot_page_write(CurrAddress); - - // Wait until write operation has completed - boot_spm_busy_wait(); - - // Send confirmation byte back to the host - WriteNextResponseByte('\r'); - } - else if (Command == 'R') - { - #if (FLASHEND > 0xFFFF) - uint16_t ProgramWord = pgm_read_word_far(CurrAddress); - #else - uint16_t ProgramWord = pgm_read_word(CurrAddress); - #endif - - WriteNextResponseByte(ProgramWord >> 8); - WriteNextResponseByte(ProgramWord & 0xFF); - } - #endif - #if !defined(NO_EEPROM_BYTE_SUPPORT) - else if (Command == 'D') - { - // Read the byte from the endpoint and write it to the EEPROM - eeprom_write_byte((uint8_t*)((intptr_t)(CurrAddress >> 1)), FetchNextCommandByte()); - - // Increment the address after use - CurrAddress += 2; - - // Send confirmation byte back to the host - WriteNextResponseByte('\r'); - } - else if (Command == 'd') - { - // Read the EEPROM byte and write it to the endpoint - WriteNextResponseByte(eeprom_read_byte((uint8_t*)((intptr_t)(CurrAddress >> 1)))); - - // Increment the address after use - CurrAddress += 2; - } - #endif - else if (Command != 27) - { - // Unknown (non-sync) command, return fail code - WriteNextResponseByte('?'); - } - - - /* Select the IN endpoint */ - Endpoint_SelectEndpoint(CDC_TX_EPNUM); - - /* Remember if the endpoint is completely full before clearing it */ - bool IsEndpointFull = !(Endpoint_IsReadWriteAllowed()); - - /* Send the endpoint data to the host */ - Endpoint_ClearIN(); - - /* If a full endpoint's worth of data was sent, we need to send an empty packet afterwards to signal end of transfer */ - if (IsEndpointFull) - { - while (!(Endpoint_IsINReady())) - { - if (USB_DeviceState == DEVICE_STATE_Unattached) - return; - } - - Endpoint_ClearIN(); - } - - /* Wait until the data has been sent to the host */ - while (!(Endpoint_IsINReady())) - { - if (USB_DeviceState == DEVICE_STATE_Unattached) - return; - } - - /* Select the OUT endpoint */ - Endpoint_SelectEndpoint(CDC_RX_EPNUM); - - /* Acknowledge the command from the host */ - Endpoint_ClearOUT(); -} - diff --git a/build/linux/work/hardware/arduino/bootloaders/caterina/Caterina.h b/build/linux/work/hardware/arduino/bootloaders/caterina/Caterina.h deleted file mode 100644 index f8251d483..000000000 --- a/build/linux/work/hardware/arduino/bootloaders/caterina/Caterina.h +++ /dev/null @@ -1,99 +0,0 @@ -/* - LUFA Library - Copyright (C) Dean Camera, 2011. - - dean [at] fourwalledcubicle [dot] com - www.lufa-lib.org -*/ - -/* - Copyright 2011 Dean Camera (dean [at] fourwalledcubicle [dot] com) - - Permission to use, copy, modify, distribute, and sell this - software and its documentation for any purpose is hereby granted - without fee, provided that the above copyright notice appear in - all copies and that both that the copyright notice and this - permission notice and warranty disclaimer appear in supporting - documentation, and that the name of the author not be used in - advertising or publicity pertaining to distribution of the - software without specific, written prior permission. - - The author disclaim all warranties with regard to this - software, including all implied warranties of merchantability - and fitness. In no event shall the author be liable for any - special, indirect or consequential damages or any damages - whatsoever resulting from loss of use, data or profits, whether - in an action of contract, negligence or other tortious action, - arising out of or in connection with the use or performance of - this software. -*/ - -/** \file - * - * Header file for BootloaderCDC.c. - */ - -#ifndef _CDC_H_ -#define _CDC_H_ - - /* Includes: */ - #include - #include - #include - #include - #include - #include - #include - - #include "Descriptors.h" - - #include - /* Macros: */ - /** Version major of the CDC bootloader. */ - #define BOOTLOADER_VERSION_MAJOR 0x01 - - /** Version minor of the CDC bootloader. */ - #define BOOTLOADER_VERSION_MINOR 0x00 - - /** Hardware version major of the CDC bootloader. */ - #define BOOTLOADER_HWVERSION_MAJOR 0x01 - - /** Hardware version minor of the CDC bootloader. */ - #define BOOTLOADER_HWVERSION_MINOR 0x00 - - /** Eight character bootloader firmware identifier reported to the host when requested */ - #define SOFTWARE_IDENTIFIER "CATERINA" - - #define CPU_PRESCALE(n) (CLKPR = 0x80, CLKPR = (n)) - #define LED_SETUP() DDRC |= (1<<7); DDRB |= (1<<0); DDRD |= (1<<5); - #define L_LED_OFF() PORTC &= ~(1<<7) - #define L_LED_ON() PORTC |= (1<<7) - #define L_LED_TOGGLE() PORTC ^= (1<<7) - #define TX_LED_OFF() PORTD |= (1<<5) - #define TX_LED_ON() PORTD &= ~(1<<5) - #define RX_LED_OFF() PORTB |= (1<<0) - #define RX_LED_ON() PORTB &= ~(1<<0) - - /* Type Defines: */ - /** Type define for a non-returning pointer to the start of the loaded application in flash memory. */ - typedef void (*AppPtr_t)(void) ATTR_NO_RETURN; - - /* Function Prototypes: */ - void StartSketch(void); - void LEDPulse(void); - - void CDC_Task(void); - void SetupHardware(void); - - void EVENT_USB_Device_ConfigurationChanged(void); - - #if defined(INCLUDE_FROM_CATERINA_C) || defined(__DOXYGEN__) - #if !defined(NO_BLOCK_SUPPORT) - static void ReadWriteMemoryBlock(const uint8_t Command); - #endif - static uint8_t FetchNextCommandByte(void); - static void WriteNextResponseByte(const uint8_t Response); - #endif - -#endif - diff --git a/build/linux/work/hardware/arduino/bootloaders/caterina/Caterina.hex b/build/linux/work/hardware/arduino/bootloaders/caterina/Caterina.hex deleted file mode 100644 index b3e1ed6af..000000000 --- a/build/linux/work/hardware/arduino/bootloaders/caterina/Caterina.hex +++ /dev/null @@ -1,256 +0,0 @@ -:1070000055C000006EC000006CC000006AC00000E7 -:1070100068C0000066C0000064C0000062C00000DC -:1070200060C000005EC00000F1C400005AC0000053 -:1070300058C0000056C0000054C0000052C00000FC -:1070400050C0000078C000004CC000004AC00000E2 -:1070500048C0000046C0000044C0000042C000001C -:1070600040C000003EC000003CC000003AC000002C -:1070700038C0000036C0000034C0000032C000003C -:1070800030C000002EC000002CC000002AC000004C -:1070900028C0000026C0000024C0000022C000005C -:1070A00020C000001EC000001CC0000011241FBE34 -:1070B000CFEFDAE0DEBFCDBF11E0A0E0B1E0E0E36A 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-:00000001FF diff --git a/build/linux/work/hardware/arduino/bootloaders/caterina/Descriptors.c b/build/linux/work/hardware/arduino/bootloaders/caterina/Descriptors.c deleted file mode 100644 index f1756e228..000000000 --- a/build/linux/work/hardware/arduino/bootloaders/caterina/Descriptors.c +++ /dev/null @@ -1,265 +0,0 @@ -/* - LUFA Library - Copyright (C) Dean Camera, 2011. - - dean [at] fourwalledcubicle [dot] com - www.lufa-lib.org -*/ - -/* - Copyright 2011 Dean Camera (dean [at] fourwalledcubicle [dot] com) - - Permission to use, copy, modify, distribute, and sell this - software and its documentation for any purpose is hereby granted - without fee, provided that the above copyright notice appear in - all copies and that both that the copyright notice and this - permission notice and warranty disclaimer appear in supporting - documentation, and that the name of the author not be used in - advertising or publicity pertaining to distribution of the - software without specific, written prior permission. - - The author disclaim all warranties with regard to this - software, including all implied warranties of merchantability - and fitness. In no event shall the author be liable for any - special, indirect or consequential damages or any damages - whatsoever resulting from loss of use, data or profits, whether - in an action of contract, negligence or other tortious action, - arising out of or in connection with the use or performance of - this software. -*/ - -/** \file - * - * USB Device Descriptors, for library use when in USB device mode. Descriptors are special - * computer-readable structures which the host requests upon device enumeration, to determine - * the device's capabilities and functions. - */ - -#include "Descriptors.h" - -/** Device descriptor structure. This descriptor, located in SRAM memory, describes the overall - * device characteristics, including the supported USB version, control endpoint size and the - * number of device configurations. The descriptor is read out by the USB host when the enumeration - * process begins. - */ -const USB_Descriptor_Device_t DeviceDescriptor = -{ - .Header = {.Size = sizeof(USB_Descriptor_Device_t), .Type = DTYPE_Device}, - - .USBSpecification = VERSION_BCD(01.10), - .Class = CDC_CSCP_CDCClass, - .SubClass = CDC_CSCP_NoSpecificSubclass, - .Protocol = CDC_CSCP_NoSpecificProtocol, - - .Endpoint0Size = FIXED_CONTROL_ENDPOINT_SIZE, - - .VendorID = 0x2341, - .ProductID = 0x0701, - .ReleaseNumber = VERSION_BCD(00.01), - - .ManufacturerStrIndex = 0x02, - .ProductStrIndex = 0x01, - .SerialNumStrIndex = NO_DESCRIPTOR, - - .NumberOfConfigurations = FIXED_NUM_CONFIGURATIONS -}; - -/** Configuration descriptor structure. This descriptor, located in SRAM memory, describes the usage - * of the device in one of its supported configurations, including information about any device interfaces - * and endpoints. The descriptor is read out by the USB host during the enumeration process when selecting - * a configuration so that the host may correctly communicate with the USB device. - */ -const USB_Descriptor_Configuration_t ConfigurationDescriptor = -{ - .Config = - { - .Header = {.Size = sizeof(USB_Descriptor_Configuration_Header_t), .Type = DTYPE_Configuration}, - - .TotalConfigurationSize = sizeof(USB_Descriptor_Configuration_t), - .TotalInterfaces = 2, - - .ConfigurationNumber = 1, - .ConfigurationStrIndex = NO_DESCRIPTOR, - - .ConfigAttributes = USB_CONFIG_ATTR_BUSPOWERED, - - .MaxPowerConsumption = USB_CONFIG_POWER_MA(100) - }, - - .CDC_CCI_Interface = - { - .Header = {.Size = sizeof(USB_Descriptor_Interface_t), .Type = DTYPE_Interface}, - - .InterfaceNumber = 0, - .AlternateSetting = 0, - - .TotalEndpoints = 1, - - .Class = CDC_CSCP_CDCClass, - .SubClass = CDC_CSCP_ACMSubclass, - .Protocol = CDC_CSCP_ATCommandProtocol, - - .InterfaceStrIndex = NO_DESCRIPTOR - }, - - .CDC_Functional_Header = - { - .Header = {.Size = sizeof(USB_CDC_Descriptor_FunctionalHeader_t), .Type = DTYPE_CSInterface}, - .Subtype = 0x00, - - .CDCSpecification = VERSION_BCD(01.10), - }, - - .CDC_Functional_ACM = - { - .Header = {.Size = sizeof(USB_CDC_Descriptor_FunctionalACM_t), .Type = DTYPE_CSInterface}, - .Subtype = 0x02, - - .Capabilities = 0x04, - }, - - .CDC_Functional_Union = - { - .Header = {.Size = sizeof(USB_CDC_Descriptor_FunctionalUnion_t), .Type = DTYPE_CSInterface}, - .Subtype = 0x06, - - .MasterInterfaceNumber = 0, - .SlaveInterfaceNumber = 1, - }, - - .CDC_NotificationEndpoint = - { - .Header = {.Size = sizeof(USB_Descriptor_Endpoint_t), .Type = DTYPE_Endpoint}, - - .EndpointAddress = (ENDPOINT_DIR_IN | CDC_NOTIFICATION_EPNUM), - .Attributes = (EP_TYPE_INTERRUPT | ENDPOINT_ATTR_NO_SYNC | ENDPOINT_USAGE_DATA), - .EndpointSize = CDC_NOTIFICATION_EPSIZE, - .PollingIntervalMS = 0xFF - }, - - .CDC_DCI_Interface = - { - .Header = {.Size = sizeof(USB_Descriptor_Interface_t), .Type = DTYPE_Interface}, - - .InterfaceNumber = 1, - .AlternateSetting = 0, - - .TotalEndpoints = 2, - - .Class = CDC_CSCP_CDCDataClass, - .SubClass = CDC_CSCP_NoDataSubclass, - .Protocol = CDC_CSCP_NoDataProtocol, - - .InterfaceStrIndex = NO_DESCRIPTOR - }, - - .CDC_DataOutEndpoint = - { - .Header = {.Size = sizeof(USB_Descriptor_Endpoint_t), .Type = DTYPE_Endpoint}, - - .EndpointAddress = (ENDPOINT_DIR_OUT | CDC_RX_EPNUM), - .Attributes = (EP_TYPE_BULK | ENDPOINT_ATTR_NO_SYNC | ENDPOINT_USAGE_DATA), - .EndpointSize = CDC_TXRX_EPSIZE, - .PollingIntervalMS = 0x01 - }, - - .CDC_DataInEndpoint = - { - .Header = {.Size = sizeof(USB_Descriptor_Endpoint_t), .Type = DTYPE_Endpoint}, - - .EndpointAddress = (ENDPOINT_DIR_IN | CDC_TX_EPNUM), - .Attributes = (EP_TYPE_BULK | ENDPOINT_ATTR_NO_SYNC | ENDPOINT_USAGE_DATA), - .EndpointSize = CDC_TXRX_EPSIZE, - .PollingIntervalMS = 0x01 - } -}; - -/** Language descriptor structure. This descriptor, located in SRAM memory, is returned when the host requests - * the string descriptor with index 0 (the first index). It is actually an array of 16-bit integers, which indicate - * via the language ID table available at USB.org what languages the device supports for its string descriptors. - */ -const USB_Descriptor_String_t LanguageString = -{ - .Header = {.Size = USB_STRING_LEN(1), .Type = DTYPE_String}, - - .UnicodeString = {LANGUAGE_ID_ENG} -}; - -/** Product descriptor string. This is a Unicode string containing the product's details in human readable form, - * and is read out upon request by the host when the appropriate string ID is requested, listed in the Device - * Descriptor. - */ -const USB_Descriptor_String_t ProductString = -{ - .Header = {.Size = USB_STRING_LEN(16), .Type = DTYPE_String}, - - .UnicodeString = L"Arduino Leonardo" -}; -/* -const USB_Descriptor_String_t SerialNumString = -{ - .Header = {.Size = USB_STRING_LEN(12), .Type = DTYPE_String}, - - .UnicodeString = L"000000001452" -}; -*/ -const USB_Descriptor_String_t ManufNameString = -{ - .Header = {.Size = USB_STRING_LEN(11), .Type = DTYPE_String}, - - .UnicodeString = L"Arduino LLC" -}; - -/** This function is called by the library when in device mode, and must be overridden (see LUFA library "USB Descriptors" - * documentation) by the application code so that the address and size of a requested descriptor can be given - * to the USB library. When the device receives a Get Descriptor request on the control endpoint, this function - * is called so that the descriptor details can be passed back and the appropriate descriptor sent back to the - * USB host. - */ -uint16_t CALLBACK_USB_GetDescriptor(const uint16_t wValue, - const uint8_t wIndex, - const void** const DescriptorAddress) -{ - const uint8_t DescriptorType = (wValue >> 8); - const uint8_t DescriptorNumber = (wValue & 0xFF); - - const void* Address = NULL; - uint16_t Size = NO_DESCRIPTOR; - - switch (DescriptorType) - { - case DTYPE_Device: - Address = &DeviceDescriptor; - Size = sizeof(USB_Descriptor_Device_t); - break; - case DTYPE_Configuration: - Address = &ConfigurationDescriptor; - Size = sizeof(USB_Descriptor_Configuration_t); - break; - case DTYPE_String: - if (!(DescriptorNumber)) - { - Address = &LanguageString; - Size = LanguageString.Header.Size; - } - else if (DescriptorNumber == DeviceDescriptor.ProductStrIndex) - { - Address = &ProductString; - Size = ProductString.Header.Size; -// } else if (DescriptorNumber == DeviceDescriptor.SerialNumStrIndex) -// { -// Address = &SerialNumString; -// Size = SerialNumString.Header.Size; - } else if (DescriptorNumber == DeviceDescriptor.ManufacturerStrIndex) - { - Address = &ManufNameString; - Size = ManufNameString.Header.Size; - } - - break; - } - - *DescriptorAddress = Address; - return Size; -} - diff --git a/build/linux/work/hardware/arduino/bootloaders/caterina/Descriptors.h b/build/linux/work/hardware/arduino/bootloaders/caterina/Descriptors.h deleted file mode 100644 index 94091aef0..000000000 --- a/build/linux/work/hardware/arduino/bootloaders/caterina/Descriptors.h +++ /dev/null @@ -1,139 +0,0 @@ -/* - LUFA Library - Copyright (C) Dean Camera, 2011. - - dean [at] fourwalledcubicle [dot] com - www.lufa-lib.org -*/ - -/* - Copyright 2011 Dean Camera (dean [at] fourwalledcubicle [dot] com) - - Permission to use, copy, modify, distribute, and sell this - software and its documentation for any purpose is hereby granted - without fee, provided that the above copyright notice appear in - all copies and that both that the copyright notice and this - permission notice and warranty disclaimer appear in supporting - documentation, and that the name of the author not be used in - advertising or publicity pertaining to distribution of the - software without specific, written prior permission. - - The author disclaim all warranties with regard to this - software, including all implied warranties of merchantability - and fitness. In no event shall the author be liable for any - special, indirect or consequential damages or any damages - whatsoever resulting from loss of use, data or profits, whether - in an action of contract, negligence or other tortious action, - arising out of or in connection with the use or performance of - this software. -*/ - -/** \file - * - * Header file for Descriptors.c. - */ - -#ifndef _DESCRIPTORS_H_ -#define _DESCRIPTORS_H_ - - /* Includes: */ - #include - - /* Macros: */ - #if defined(__AVR_AT90USB1287__) - #define AVR_SIGNATURE_1 0x1E - #define AVR_SIGNATURE_2 0x97 - #define AVR_SIGNATURE_3 0x82 - #elif defined(__AVR_AT90USB647__) - #define AVR_SIGNATURE_1 0x1E - #define AVR_SIGNATURE_2 0x96 - #define AVR_SIGNATURE_3 0x82 - #elif defined(__AVR_AT90USB1286__) - #define AVR_SIGNATURE_1 0x1E - #define AVR_SIGNATURE_2 0x97 - #define AVR_SIGNATURE_3 0x82 - #elif defined(__AVR_AT90USB646__) - #define AVR_SIGNATURE_1 0x1E - #define AVR_SIGNATURE_2 0x96 - #define AVR_SIGNATURE_3 0x82 - #elif defined(__AVR_ATmega32U6__) - #define AVR_SIGNATURE_1 0x1E - #define AVR_SIGNATURE_2 0x95 - #define AVR_SIGNATURE_3 0x88 - #elif defined(__AVR_ATmega32U4__) - #define AVR_SIGNATURE_1 0x1E - #define AVR_SIGNATURE_2 0x95 - #define AVR_SIGNATURE_3 0x87 - #elif defined(__AVR_ATmega16U4__) - #define AVR_SIGNATURE_1 0x1E - #define AVR_SIGNATURE_2 0x94 - #define AVR_SIGNATURE_3 0x88 - #elif defined(__AVR_ATmega32U2__) - #define AVR_SIGNATURE_1 0x1E - #define AVR_SIGNATURE_2 0x95 - #define AVR_SIGNATURE_3 0x8A - #elif defined(__AVR_ATmega16U2__) - #define AVR_SIGNATURE_1 0x1E - #define AVR_SIGNATURE_2 0x94 - #define AVR_SIGNATURE_3 0x89 - #elif defined(__AVR_AT90USB162__) - #define AVR_SIGNATURE_1 0x1E - #define AVR_SIGNATURE_2 0x94 - #define AVR_SIGNATURE_3 0x82 - #elif defined(__AVR_ATmega8U2__) - #define AVR_SIGNATURE_1 0x1E - #define AVR_SIGNATURE_2 0x93 - #define AVR_SIGNATURE_3 0x89 - #elif defined(__AVR_AT90USB82__) - #define AVR_SIGNATURE_1 0x1E - #define AVR_SIGNATURE_2 0x94 - #define AVR_SIGNATURE_3 0x82 - #else - #error The selected AVR part is not currently supported by this bootloader. - #endif - - /** Endpoint number for the CDC control interface event notification endpoint. */ - #define CDC_NOTIFICATION_EPNUM 2 - - /** Endpoint number for the CDC data interface TX (data IN) endpoint. */ - #define CDC_TX_EPNUM 3 - - /** Endpoint number for the CDC data interface RX (data OUT) endpoint. */ - #define CDC_RX_EPNUM 4 - - /** Size of the CDC data interface TX and RX data endpoint banks, in bytes. */ - #define CDC_TXRX_EPSIZE 16 - - /** Size of the CDC control interface notification endpoint bank, in bytes. */ - #define CDC_NOTIFICATION_EPSIZE 8 - - /* Type Defines: */ - /** Type define for the device configuration descriptor structure. This must be defined in the - * application code, as the configuration descriptor contains several sub-descriptors which - * vary between devices, and which describe the device's usage to the host. - */ - typedef struct - { - USB_Descriptor_Configuration_Header_t Config; - - // CDC Control Interface - USB_Descriptor_Interface_t CDC_CCI_Interface; - USB_CDC_Descriptor_FunctionalHeader_t CDC_Functional_Header; - USB_CDC_Descriptor_FunctionalACM_t CDC_Functional_ACM; - USB_CDC_Descriptor_FunctionalUnion_t CDC_Functional_Union; - USB_Descriptor_Endpoint_t CDC_NotificationEndpoint; - - // CDC Data Interface - USB_Descriptor_Interface_t CDC_DCI_Interface; - USB_Descriptor_Endpoint_t CDC_DataOutEndpoint; - USB_Descriptor_Endpoint_t CDC_DataInEndpoint; - } USB_Descriptor_Configuration_t; - - /* Function Prototypes: */ - uint16_t CALLBACK_USB_GetDescriptor(const uint16_t wValue, - const uint8_t wIndex, - const void** const DescriptorAddress) - ATTR_WARN_UNUSED_RESULT ATTR_NON_NULL_PTR_ARG(3); - -#endif - diff --git a/build/linux/work/hardware/arduino/bootloaders/caterina/Makefile b/build/linux/work/hardware/arduino/bootloaders/caterina/Makefile deleted file mode 100644 index ef583bc62..000000000 --- a/build/linux/work/hardware/arduino/bootloaders/caterina/Makefile +++ /dev/null @@ -1,717 +0,0 @@ -# Hey Emacs, this is a -*- makefile -*- -#---------------------------------------------------------------------------- -# WinAVR Makefile Template written by Eric B. Weddington, Jrg Wunsch, et al. -# >> Modified for use with the LUFA project. << -# -# Released to the Public Domain -# -# Additional material for this makefile was written by: -# Peter Fleury -# Tim Henigan -# Colin O'Flynn -# Reiner Patommel -# Markus Pfaff -# Sander Pool -# Frederik Rouleau -# Carlos Lamas -# Dean Camera -# Opendous Inc. -# Denver Gingerich -# -#---------------------------------------------------------------------------- -# On command line: -# -# make all = Make software. -# -# make clean = Clean out built project files. -# -# make coff = Convert ELF to AVR COFF. -# -# make extcoff = Convert ELF to AVR Extended COFF. -# -# make program = Download the hex file to the device, using avrdude. -# Please customize the avrdude settings below first! -# -# make doxygen = Generate DoxyGen documentation for the project (must have -# DoxyGen installed) -# -# make debug = Start either simulavr or avarice as specified for debugging, -# with avr-gdb or avr-insight as the front end for debugging. -# -# make filename.s = Just compile filename.c into the assembler code only. -# -# make filename.i = Create a preprocessed source file for use in submitting -# bug reports to the GCC project. -# -# To rebuild project do "make clean" then "make all". -#---------------------------------------------------------------------------- - - -# MCU name -MCU = atmega32u4 - - -# Target architecture (see library "Board Types" documentation). -ARCH = AVR8 - - -# Target board (see library "Board Types" documentation, NONE for projects not requiring -# LUFA board drivers). If USER is selected, put custom board drivers in a directory called -# "Board" inside the application directory. -BOARD = USER - - -# Processor frequency. -# This will define a symbol, F_CPU, in all source code files equal to the -# processor frequency in Hz. You can then use this symbol in your source code to -# calculate timings. Do NOT tack on a 'UL' at the end, this will be done -# automatically to create a 32-bit value in your source code. -# -# This will be an integer division of F_USB below, as it is sourced by -# F_USB after it has run through any CPU prescalers. Note that this value -# does not *change* the processor frequency - it should merely be updated to -# reflect the processor speed set externally so that the code can use accurate -# software delays. -F_CPU = 16000000 - - -# Input clock frequency. -# This will define a symbol, F_USB, in all source code files equal to the -# input clock frequency (before any prescaling is performed) in Hz. This value may -# differ from F_CPU if prescaling is used on the latter, and is required as the -# raw input clock is fed directly to the PLL sections of the AVR for high speed -# clock generation for the USB and other AVR subsections. Do NOT tack on a 'UL' -# at the end, this will be done automatically to create a 32-bit value in your -# source code. -# -# If no clock division is performed on the input clock inside the AVR (via the -# CPU clock adjust registers or the clock division fuses), this will be equal to F_CPU. -F_USB = $(F_CPU) - - -# Starting byte address of the bootloader, as a byte address - computed via the formula -# BOOT_START = ((FLASH_SIZE_KB - BOOT_SECTION_SIZE_KB) * 1024) -# -# Note that the bootloader size and start address given in AVRStudio is in words and not -# bytes, and so will need to be doubled to obtain the byte address needed by AVR-GCC. -FLASH_SIZE_KB = 32 -BOOT_SECTION_SIZE_KB = 4 -BOOT_START = 0x$(shell echo "obase=16; ($(FLASH_SIZE_KB) - $(BOOT_SECTION_SIZE_KB)) * 1024" | bc) - - -# Output format. (can be srec, ihex, binary) -FORMAT = ihex - - -# Target file name (without extension). -TARGET = Caterina - - -# Object files directory -# To put object files in current directory, use a dot (.), do NOT make -# this an empty or blank macro! -OBJDIR = . - - -# Path to the LUFA library -LUFA_PATH = ../../../../../LUFA-111009 - - -# LUFA library compile-time options and predefined tokens -LUFA_OPTS = -D USB_DEVICE_ONLY -LUFA_OPTS += -D DEVICE_STATE_AS_GPIOR=0 -LUFA_OPTS += -D ORDERED_EP_CONFIG -LUFA_OPTS += -D FIXED_CONTROL_ENDPOINT_SIZE=8 -LUFA_OPTS += -D FIXED_NUM_CONFIGURATIONS=1 -LUFA_OPTS += -D USE_RAM_DESCRIPTORS -LUFA_OPTS += -D USE_STATIC_OPTIONS="(USB_DEVICE_OPT_FULLSPEED | USB_OPT_REG_ENABLED | USB_OPT_AUTO_PLL)" -LUFA_OPTS += -D NO_INTERNAL_SERIAL -LUFA_OPTS += -D NO_DEVICE_SELF_POWER -LUFA_OPTS += -D NO_DEVICE_REMOTE_WAKEUP -LUFA_OPTS += -D NO_SOF_EVENTS - -#LUFA_OPTS += -D NO_BLOCK_SUPPORT -#LUFA_OPTS += -D NO_EEPROM_BYTE_SUPPORT -#LUFA_OPTS += -D NO_FLASH_BYTE_SUPPORT -LUFA_OPTS += -D NO_LOCK_BYTE_WRITE_SUPPORT - - -# Create the LUFA source path variables by including the LUFA root makefile -include $(LUFA_PATH)/LUFA/makefile - - -# List C source files here. (C dependencies are automatically generated.) -SRC = $(TARGET).c \ - Descriptors.c \ - $(LUFA_SRC_USB) \ - - -# List C++ source files here. (C dependencies are automatically generated.) -CPPSRC = - - -# List Assembler source files here. -# Make them always end in a capital .S. Files ending in a lowercase .s -# will not be considered source files but generated files (assembler -# output from the compiler), and will be deleted upon "make clean"! -# Even though the DOS/Win* filesystem matches both .s and .S the same, -# it will preserve the spelling of the filenames, and gcc itself does -# care about how the name is spelled on its command-line. -ASRC = - - -# Optimization level, can be [0, 1, 2, 3, s]. -# 0 = turn off optimization. s = optimize for size. -# (Note: 3 is not always the best optimization level. See avr-libc FAQ.) -OPT = s - - -# Debugging format. -# Native formats for AVR-GCC's -g are dwarf-2 [default] or stabs. -# AVR Studio 4.10 requires dwarf-2. -# AVR [Extended] COFF format requires stabs, plus an avr-objcopy run. -DEBUG = dwarf-2 - - -# List any extra directories to look for include files here. -# Each directory must be seperated by a space. -# Use forward slashes for directory separators. -# For a directory that has spaces, enclose it in quotes. -EXTRAINCDIRS = $(LUFA_PATH)/ - - -# Compiler flag to set the C Standard level. -# c89 = "ANSI" C -# gnu89 = c89 plus GCC extensions -# c99 = ISO C99 standard (not yet fully implemented) -# gnu99 = c99 plus GCC extensions -CSTANDARD = -std=c99 - - -# Place -D or -U options here for C sources -CDEFS = -DF_CPU=$(F_CPU)UL -CDEFS += -DF_USB=$(F_USB)UL -CDEFS += -DBOARD=BOARD_$(BOARD) -DARCH=ARCH_$(ARCH) -CDEFS += -DBOOT_START_ADDR=$(BOOT_START)UL -CDEFS += $(LUFA_OPTS) - - -# Place -D or -U options here for ASM sources -ADEFS = -DF_CPU=$(F_CPU) -ADEFS += -DF_USB=$(F_USB)UL -ADEFS += -DBOARD=BOARD_$(BOARD) -ADEFS += -DBOOT_START_ADDR=$(BOOT_START)UL -ADEFS += $(LUFA_OPTS) - - -# Place -D or -U options here for C++ sources -CPPDEFS = -DF_CPU=$(F_CPU)UL -CPPDEFS += -DF_USB=$(F_USB)UL -CPPDEFS += -DBOARD=BOARD_$(BOARD) -CPPDEFS += -DBOOT_START_ADDR=$(BOOT_START)UL -CPPDEFS += $(LUFA_OPTS) -#CPPDEFS += -D__STDC_LIMIT_MACROS -#CPPDEFS += -D__STDC_CONSTANT_MACROS - - - -#---------------- Compiler Options C ---------------- -# -g*: generate debugging information -# -O*: optimization level -# -f...: tuning, see GCC manual and avr-libc documentation -# -Wall...: warning level -# -Wa,...: tell GCC to pass this to the assembler. -# -adhlns...: create assembler listing -CFLAGS = -g$(DEBUG) -CFLAGS += $(CDEFS) -CFLAGS += -O$(OPT) -CFLAGS += -funsigned-char -CFLAGS += -funsigned-bitfields -CFLAGS += -ffunction-sections -CFLAGS += -fno-inline-small-functions -CFLAGS += -fpack-struct -CFLAGS += -fshort-enums -CFLAGS += -fno-strict-aliasing -CFLAGS += -Wall -CFLAGS += -Wstrict-prototypes -#CFLAGS += -mshort-calls -#CFLAGS += -fno-unit-at-a-time -#CFLAGS += -Wundef -#CFLAGS += -Wunreachable-code -#CFLAGS += -Wsign-compare -CFLAGS += -Wa,-adhlns=$(<:%.c=$(OBJDIR)/%.lst) -CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS)) -CFLAGS += $(CSTANDARD) - - -#---------------- Compiler Options C++ ---------------- -# -g*: generate debugging information -# -O*: optimization level -# -f...: tuning, see GCC manual and avr-libc documentation -# -Wall...: warning level -# -Wa,...: tell GCC to pass this to the assembler. -# -adhlns...: create assembler listing -CPPFLAGS = -g$(DEBUG) -CPPFLAGS += $(CPPDEFS) -CPPFLAGS += -O$(OPT) -CPPFLAGS += -funsigned-char -CPPFLAGS += -funsigned-bitfields -CPPFLAGS += -fpack-struct -CPPFLAGS += -fshort-enums -CPPFLAGS += -fno-exceptions -CPPFLAGS += -Wall -CPPFLAGS += -Wundef -#CPPFLAGS += -mshort-calls -#CPPFLAGS += -fno-unit-at-a-time -#CPPFLAGS += -Wstrict-prototypes -#CPPFLAGS += -Wunreachable-code -#CPPFLAGS += -Wsign-compare -CPPFLAGS += -Wa,-adhlns=$(<:%.cpp=$(OBJDIR)/%.lst) -CPPFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS)) -#CPPFLAGS += $(CSTANDARD) - - -#---------------- Assembler Options ---------------- -# -Wa,...: tell GCC to pass this to the assembler. -# -adhlns: create listing -# -gstabs: have the assembler create line number information; note that -# for use in COFF files, additional information about filenames -# and function names needs to be present in the assembler source -# files -- see avr-libc docs [FIXME: not yet described there] -# -listing-cont-lines: Sets the maximum number of continuation lines of hex -# dump that will be displayed for a given single line of source input. -ASFLAGS = $(ADEFS) -Wa,-adhlns=$(<:%.S=$(OBJDIR)/%.lst),-gstabs,--listing-cont-lines=100 - - -#---------------- Library Options ---------------- -# Minimalistic printf version -PRINTF_LIB_MIN = -Wl,-u,vfprintf -lprintf_min - -# Floating point printf version (requires MATH_LIB = -lm below) -PRINTF_LIB_FLOAT = -Wl,-u,vfprintf -lprintf_flt - -# If this is left blank, then it will use the Standard printf version. -PRINTF_LIB = -#PRINTF_LIB = $(PRINTF_LIB_MIN) -#PRINTF_LIB = $(PRINTF_LIB_FLOAT) - - -# Minimalistic scanf version -SCANF_LIB_MIN = -Wl,-u,vfscanf -lscanf_min - -# Floating point + %[ scanf version (requires MATH_LIB = -lm below) -SCANF_LIB_FLOAT = -Wl,-u,vfscanf -lscanf_flt - -# If this is left blank, then it will use the Standard scanf version. -SCANF_LIB = -#SCANF_LIB = $(SCANF_LIB_MIN) -#SCANF_LIB = $(SCANF_LIB_FLOAT) - - -MATH_LIB = -lm - - -# List any extra directories to look for libraries here. -# Each directory must be seperated by a space. -# Use forward slashes for directory separators. -# For a directory that has spaces, enclose it in quotes. -EXTRALIBDIRS = - - - -#---------------- External Memory Options ---------------- - -# 64 KB of external RAM, starting after internal RAM (ATmega128!), -# used for variables (.data/.bss) and heap (malloc()). -#EXTMEMOPTS = -Wl,-Tdata=0x801100,--defsym=__heap_end=0x80ffff - -# 64 KB of external RAM, starting after internal RAM (ATmega128!), -# only used for heap (malloc()). -#EXTMEMOPTS = -Wl,--section-start,.data=0x801100,--defsym=__heap_end=0x80ffff - -EXTMEMOPTS = - - - -#---------------- Linker Options ---------------- -# -Wl,...: tell GCC to pass this to linker. -# -Map: create map file -# --cref: add cross reference to map file -LDFLAGS = -Wl,-Map=$(TARGET).map,--cref -LDFLAGS += -Wl,--section-start=.text=$(BOOT_START) -LDFLAGS += -Wl,--relax -LDFLAGS += -Wl,--gc-sections -LDFLAGS += $(EXTMEMOPTS) -LDFLAGS += $(patsubst %,-L%,$(EXTRALIBDIRS)) -LDFLAGS += $(PRINTF_LIB) $(SCANF_LIB) $(MATH_LIB) -#LDFLAGS += -T linker_script.x - - - -#---------------- Programming Options (avrdude) ---------------- - -# Programming hardware -# Type: avrdude -c ? -# to get a full listing. -# -AVRDUDE_PROGRAMMER = avrispmkII - -# com1 = serial port. Use lpt1 to connect to parallel port. -AVRDUDE_PORT = usb - -AVRDUDE_WRITE_FLASH = -U flash:w:$(TARGET).hex -#AVRDUDE_WRITE_EEPROM = -U eeprom:w:$(TARGET).eep - - -# Uncomment the following if you want avrdude's erase cycle counter. -# Note that this counter needs to be initialized first using -Yn, -# see avrdude manual. -#AVRDUDE_ERASE_COUNTER = -y - -# Uncomment the following if you do /not/ wish a verification to be -# performed after programming the device. -#AVRDUDE_NO_VERIFY = -V - -# Increase verbosity level. Please use this when submitting bug -# reports about avrdude. See -# to submit bug reports. -#AVRDUDE_VERBOSE = -v -v - -AVRDUDE_FLAGS = -p $(MCU) -P $(AVRDUDE_PORT) -c $(AVRDUDE_PROGRAMMER) -AVRDUDE_FLAGS += $(AVRDUDE_NO_VERIFY) -AVRDUDE_FLAGS += $(AVRDUDE_VERBOSE) -AVRDUDE_FLAGS += $(AVRDUDE_ERASE_COUNTER) - - - -#---------------- Debugging Options ---------------- - -# For simulavr only - target MCU frequency. -DEBUG_MFREQ = $(F_CPU) - -# Set the DEBUG_UI to either gdb or insight. -# DEBUG_UI = gdb -DEBUG_UI = insight - -# Set the debugging back-end to either avarice, simulavr. -DEBUG_BACKEND = avarice -#DEBUG_BACKEND = simulavr - -# GDB Init Filename. -GDBINIT_FILE = __avr_gdbinit - -# When using avarice settings for the JTAG -JTAG_DEV = /dev/com1 - -# Debugging port used to communicate between GDB / avarice / simulavr. -DEBUG_PORT = 4242 - -# Debugging host used to communicate between GDB / avarice / simulavr, normally -# just set to localhost unless doing some sort of crazy debugging when -# avarice is running on a different computer. -DEBUG_HOST = localhost - - - -#============================================================================ - - -# Define programs and commands. -SHELL = sh -CC = avr-gcc -OBJCOPY = avr-objcopy -OBJDUMP = avr-objdump -SIZE = avr-size -AR = avr-ar rcs -NM = avr-nm -AVRDUDE = /Applications/avrdude -C /Applications/avrdude.conf -B 1 -REMOVE = rm -f -REMOVEDIR = rm -rf -COPY = cp -WINSHELL = cmd - - -# Define Messages -# English -MSG_ERRORS_NONE = Errors: none -MSG_BEGIN = -------- begin -------- -MSG_END = -------- end -------- -MSG_SIZE_BEFORE = Size before: -MSG_SIZE_AFTER = Size after: -MSG_COFF = Converting to AVR COFF: -MSG_EXTENDED_COFF = Converting to AVR Extended COFF: -MSG_FLASH = Creating load file for Flash: -MSG_EEPROM = Creating load file for EEPROM: -MSG_EXTENDED_LISTING = Creating Extended Listing: -MSG_SYMBOL_TABLE = Creating Symbol Table: -MSG_LINKING = Linking: -MSG_COMPILING = Compiling C: -MSG_COMPILING_CPP = Compiling C++: -MSG_ASSEMBLING = Assembling: -MSG_CLEANING = Cleaning project: -MSG_CREATING_LIBRARY = Creating library: - - - - -# Define all object files. -OBJ = $(SRC:%.c=$(OBJDIR)/%.o) $(CPPSRC:%.cpp=$(OBJDIR)/%.o) $(ASRC:%.S=$(OBJDIR)/%.o) - -# Define all listing files. -LST = $(SRC:%.c=$(OBJDIR)/%.lst) $(CPPSRC:%.cpp=$(OBJDIR)/%.lst) $(ASRC:%.S=$(OBJDIR)/%.lst) - - -# Compiler flags to generate dependency files. -GENDEPFLAGS = -MMD -MP -MF .dep/$(@F).d - - -# Combine all necessary flags and optional flags. -# Add target processor to flags. -ALL_CFLAGS = -mmcu=$(MCU) -I. $(CFLAGS) $(GENDEPFLAGS) -ALL_CPPFLAGS = -mmcu=$(MCU) -I. -x c++ $(CPPFLAGS) $(GENDEPFLAGS) -ALL_ASFLAGS = -mmcu=$(MCU) -I. -x assembler-with-cpp $(ASFLAGS) - - - - - -# Default target. -all: begin gccversion sizebefore build sizeafter end - -# Change the build target to build a HEX file or a library. -build: elf hex eep lss sym -#build: lib - - -elf: $(TARGET).elf -hex: $(TARGET).hex -eep: $(TARGET).eep -lss: $(TARGET).lss -sym: $(TARGET).sym -LIBNAME=lib$(TARGET).a -lib: $(LIBNAME) - - - -# Eye candy. -# AVR Studio 3.x does not check make's exit code but relies on -# the following magic strings to be generated by the compile job. -begin: - @echo - @echo $(MSG_BEGIN) - -end: - @echo $(MSG_END) - @echo - - -# Display size of file. -HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex -ELFSIZE = $(SIZE) $(MCU_FLAG) $(FORMAT_FLAG) $(TARGET).elf -MCU_FLAG = $(shell $(SIZE) --help | grep -- --mcu > /dev/null && echo --mcu=$(MCU) ) -FORMAT_FLAG = $(shell $(SIZE) --help | grep -- --format=.*avr > /dev/null && echo --format=avr ) - - -sizebefore: - @if test -f $(TARGET).elf; then echo; echo $(MSG_SIZE_BEFORE); $(ELFSIZE); \ - 2>/dev/null; echo; fi - -sizeafter: - @if test -f $(TARGET).elf; then echo; echo $(MSG_SIZE_AFTER); $(ELFSIZE); \ - 2>/dev/null; echo; fi - - - -# Display compiler version information. -gccversion : - @$(CC) --version - - -# Program the device. -program: $(TARGET).hex $(TARGET).eep - $(AVRDUDE) $(AVRDUDE_FLAGS) $(AVRDUDE_WRITE_FLASH) $(AVRDUDE_WRITE_EEPROM) - - -# Generate avr-gdb config/init file which does the following: -# define the reset signal, load the target file, connect to target, and set -# a breakpoint at main(). -gdb-config: - @$(REMOVE) $(GDBINIT_FILE) - @echo define reset >> $(GDBINIT_FILE) - @echo SIGNAL SIGHUP >> $(GDBINIT_FILE) - @echo end >> $(GDBINIT_FILE) - @echo file $(TARGET).elf >> $(GDBINIT_FILE) - @echo target remote $(DEBUG_HOST):$(DEBUG_PORT) >> $(GDBINIT_FILE) -ifeq ($(DEBUG_BACKEND),simulavr) - @echo load >> $(GDBINIT_FILE) -endif - @echo break main >> $(GDBINIT_FILE) - -debug: gdb-config $(TARGET).elf -ifeq ($(DEBUG_BACKEND), avarice) - @echo Starting AVaRICE - Press enter when "waiting to connect" message displays. - @$(WINSHELL) /c start avarice --jtag $(JTAG_DEV) --erase --program --file \ - $(TARGET).elf $(DEBUG_HOST):$(DEBUG_PORT) - @$(WINSHELL) /c pause - -else - @$(WINSHELL) /c start simulavr --gdbserver --device $(MCU) --clock-freq \ - $(DEBUG_MFREQ) --port $(DEBUG_PORT) -endif - @$(WINSHELL) /c start avr-$(DEBUG_UI) --command=$(GDBINIT_FILE) - - - - -# Convert ELF to COFF for use in debugging / simulating in AVR Studio or VMLAB. -COFFCONVERT = $(OBJCOPY) --debugging -COFFCONVERT += --change-section-address .data-0x800000 -COFFCONVERT += --change-section-address .bss-0x800000 -COFFCONVERT += --change-section-address .noinit-0x800000 -COFFCONVERT += --change-section-address .eeprom-0x810000 - - - -coff: $(TARGET).elf - @echo - @echo $(MSG_COFF) $(TARGET).cof - $(COFFCONVERT) -O coff-avr $< $(TARGET).cof - - -extcoff: $(TARGET).elf - @echo - @echo $(MSG_EXTENDED_COFF) $(TARGET).cof - $(COFFCONVERT) -O coff-ext-avr $< $(TARGET).cof - - - -# Create final output files (.hex, .eep) from ELF output file. -%.hex: %.elf - @echo - @echo $(MSG_FLASH) $@ - $(OBJCOPY) -O $(FORMAT) -R .eeprom -R .fuse -R .lock $< $@ - -%.eep: %.elf - @echo - @echo $(MSG_EEPROM) $@ - -$(OBJCOPY) -j .eeprom --set-section-flags=.eeprom="alloc,load" \ - --change-section-lma .eeprom=0 --no-change-warnings -O $(FORMAT) $< $@ || exit 0 - -# Create extended listing file from ELF output file. -%.lss: %.elf - @echo - @echo $(MSG_EXTENDED_LISTING) $@ - $(OBJDUMP) -h -S -z $< > $@ - -# Create a symbol table from ELF output file. -%.sym: %.elf - @echo - @echo $(MSG_SYMBOL_TABLE) $@ - $(NM) -n $< > $@ - - - -# Create library from object files. -.SECONDARY : $(TARGET).a -.PRECIOUS : $(OBJ) -%.a: $(OBJ) - @echo - @echo $(MSG_CREATING_LIBRARY) $@ - $(AR) $@ $(OBJ) - - -# Link: create ELF output file from object files. -.SECONDARY : $(TARGET).elf -.PRECIOUS : $(OBJ) -%.elf: $(OBJ) - @echo - @echo $(MSG_LINKING) $@ - $(CC) $(ALL_CFLAGS) $^ --output $@ $(LDFLAGS) - - -# Compile: create object files from C source files. -$(OBJDIR)/%.o : %.c - @echo - @echo $(MSG_COMPILING) $< - $(CC) -c $(ALL_CFLAGS) $< -o $@ - - -# Compile: create object files from C++ source files. -$(OBJDIR)/%.o : %.cpp - @echo - @echo $(MSG_COMPILING_CPP) $< - $(CC) -c $(ALL_CPPFLAGS) $< -o $@ - - -# Compile: create assembler files from C source files. -%.s : %.c - $(CC) -S $(ALL_CFLAGS) $< -o $@ - - -# Compile: create assembler files from C++ source files. -%.s : %.cpp - $(CC) -S $(ALL_CPPFLAGS) $< -o $@ - - -# Assemble: create object files from assembler source files. -$(OBJDIR)/%.o : %.S - @echo - @echo $(MSG_ASSEMBLING) $< - $(CC) -c $(ALL_ASFLAGS) $< -o $@ - - -# Create preprocessed source for use in sending a bug report. -%.i : %.c - $(CC) -E -mmcu=$(MCU) -I. $(CFLAGS) $< -o $@ - - -# Target: clean project. -clean: begin clean_list end - -clean_list : - @echo - @echo $(MSG_CLEANING) - $(REMOVE) $(TARGET).hex - $(REMOVE) $(TARGET).eep - $(REMOVE) $(TARGET).cof - $(REMOVE) $(TARGET).elf - $(REMOVE) $(TARGET).map - $(REMOVE) $(TARGET).sym - $(REMOVE) $(TARGET).lss - $(REMOVE) $(SRC:%.c=$(OBJDIR)/%.o) $(CPPSRC:%.cpp=$(OBJDIR)/%.o) $(ASRC:%.S=$(OBJDIR)/%.o) - $(REMOVE) $(SRC:%.c=$(OBJDIR)/%.lst) $(CPPSRC:%.cpp=$(OBJDIR)/%.lst) $(ASRC:%.S=$(OBJDIR)/%.lst) - $(REMOVE) $(SRC:.c=.s) - $(REMOVE) $(SRC:.c=.d) - $(REMOVE) $(SRC:.c=.i) - $(REMOVEDIR) .dep - -doxygen: - @echo Generating Project Documentation \($(TARGET)\)... - @doxygen Doxygen.conf - @echo Documentation Generation Complete. - -clean_doxygen: - rm -rf Documentation - -checksource: - @for f in $(SRC) $(CPPSRC) $(ASRC); do \ - if [ -f $$f ]; then \ - echo "Found Source File: $$f" ; \ - else \ - echo "Source File Not Found: $$f" ; \ - fi; done - - -# Create object files directory -$(shell mkdir $(OBJDIR) 2>/dev/null) - - -# Include the dependency files. --include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*) - - -# Listing of phony targets. -.PHONY : all begin finish end sizebefore sizeafter gccversion \ -build elf hex eep lss sym coff extcoff doxygen clean \ -clean_list clean_doxygen program debug gdb-config checksource - diff --git a/build/linux/work/hardware/arduino/bootloaders/lilypad/LilyPadBOOT_168.hex b/build/linux/work/hardware/arduino/bootloaders/lilypad/LilyPadBOOT_168.hex deleted file mode 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-:103EB0001295107F100F812F992787FD90951F91E4 -:103EC0000F9108951F93282F992787FD9095807F44 -:103ED00090709595879595958795959587959595E6 -:103EE00087958A304CF0982F995A822F8F708A309C -:103EF0004CF0182F195A08C0982F905D822F8F70A0 -:103F00008A30BCF7182F105D892F0E94E41C812F86 -:083F10000E94E41C1F910895BA -:023F1800800027 -:0400000300003800C1 -:00000001FF diff --git a/build/linux/work/hardware/arduino/bootloaders/lilypad/src/ATmegaBOOT.c b/build/linux/work/hardware/arduino/bootloaders/lilypad/src/ATmegaBOOT.c deleted file mode 100644 index 915bc57f2..000000000 --- a/build/linux/work/hardware/arduino/bootloaders/lilypad/src/ATmegaBOOT.c +++ /dev/null @@ -1,979 +0,0 @@ -/**********************************************************/ -/* Serial Bootloader for Atmel megaAVR Controllers */ -/* */ -/* tested with ATmega8, ATmega128 and ATmega168 */ -/* should work with other mega's, see code for details */ -/* */ -/* ATmegaBOOT.c */ -/* */ -/* 20070626: hacked for Arduino Diecimila (which auto- */ -/* resets when a USB connection is made to it) */ -/* by D. Mellis */ -/* 20060802: hacked for Arduino by D. Cuartielles */ -/* based on a previous hack by D. Mellis */ -/* and D. Cuartielles */ -/* */ -/* Monitor and debug functions were added to the original */ -/* code by Dr. Erik Lins, chip45.com. (See below) */ -/* */ -/* Thanks to Karl Pitrich for fixing a bootloader pin */ -/* problem and more informative LED blinking! */ -/* */ -/* For the latest version see: */ -/* http://www.chip45.com/ */ -/* */ -/* ------------------------------------------------------ */ -/* */ -/* based on stk500boot.c */ -/* Copyright (c) 2003, Jason P. Kyle */ -/* All rights reserved. */ -/* see avr1.org for original file and information */ -/* */ -/* This program is free software; you can redistribute it */ -/* and/or modify it under the terms of the GNU General */ -/* Public License as published by the Free Software */ -/* Foundation; either version 2 of the License, or */ -/* (at your option) any later version. */ -/* */ -/* This program is distributed in the hope that it will */ -/* be useful, but WITHOUT ANY WARRANTY; without even the */ -/* implied warranty of MERCHANTABILITY or FITNESS FOR A */ -/* PARTICULAR PURPOSE. See the GNU General Public */ -/* License for more details. */ -/* */ -/* You should have received a copy of the GNU General */ -/* Public License along with this program; if not, write */ -/* to the Free Software Foundation, Inc., */ -/* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -/* */ -/* Licence can be viewed at */ -/* http://www.fsf.org/licenses/gpl.txt */ -/* */ -/* Target = Atmel AVR m128,m64,m32,m16,m8,m162,m163,m169, */ -/* m8515,m8535. ATmega161 has a very small boot block so */ -/* isn't supported. */ -/* */ -/* Tested with m168 */ -/**********************************************************/ - -/* $Id$ */ - - -/* some includes */ -#include -#include -#include -#include -#include - - -/* the current avr-libc eeprom functions do not support the ATmega168 */ -/* own eeprom write/read functions are used instead */ -#ifndef __AVR_ATmega168__ -#include -#endif - -/* Use the F_CPU defined in Makefile */ - -/* 20060803: hacked by DojoCorp */ -/* 20070626: hacked by David A. Mellis to decrease waiting time for auto-reset */ -/* set the waiting time for the bootloader */ -/* get this from the Makefile instead */ -/* #define MAX_TIME_COUNT (F_CPU>>4) */ - -/* 20070707: hacked by David A. Mellis - after this many errors give up and launch application */ -#define MAX_ERROR_COUNT 5 - -/* set the UART baud rate */ -/* 20060803: hacked by DojoCorp */ -//#define BAUD_RATE 115200 -#define BAUD_RATE 19200 - - -/* SW_MAJOR and MINOR needs to be updated from time to time to avoid warning message from AVR Studio */ -/* never allow AVR Studio to do an update !!!! */ -#define HW_VER 0x02 -#define SW_MAJOR 0x01 -#define SW_MINOR 0x10 - - -/* Adjust to suit whatever pin your hardware uses to enter the bootloader */ -/* ATmega128 has two UARTS so two pins are used to enter bootloader and select UART */ -/* BL0... means UART0, BL1... means UART1 */ -#ifdef __AVR_ATmega128__ -#define BL_DDR DDRF -#define BL_PORT PORTF -#define BL_PIN PINF -#define BL0 PINF7 -#define BL1 PINF6 -#else -/* other ATmegas have only one UART, so only one pin is defined to enter bootloader */ -#define BL_DDR DDRD -#define BL_PORT PORTD -#define BL_PIN PIND -#define BL PIND6 -#endif - - -/* onboard LED is used to indicate, that the bootloader was entered (3x flashing) */ -/* if monitor functions are included, LED goes on after monitor was entered */ -#ifdef __AVR_ATmega128__ -/* Onboard LED is connected to pin PB7 (e.g. Crumb128, PROBOmega128, Savvy128) */ -#define LED_DDR DDRB -#define LED_PORT PORTB -#define LED_PIN PINB -#define LED PINB7 -#else -/* Onboard LED is connected to pin PB2 (e.g. Crumb8, Crumb168) */ -#define LED_DDR DDRB -#define LED_PORT PORTB -#define LED_PIN PINB -/* 20060803: hacked by DojoCorp, LED pin is B5 in Arduino */ -/* #define LED PINB2 */ -#define LED PINB5 -#endif - - -/* monitor functions will only be compiled when using ATmega128, due to bootblock size constraints */ -#ifdef __AVR_ATmega128__ -#define MONITOR -#endif - - -/* define various device id's */ -/* manufacturer byte is always the same */ -#define SIG1 0x1E // Yep, Atmel is the only manufacturer of AVR micros. Single source :( - -#if defined __AVR_ATmega128__ -#define SIG2 0x97 -#define SIG3 0x02 -#define PAGE_SIZE 0x80U //128 words - -#elif defined __AVR_ATmega64__ -#define SIG2 0x96 -#define SIG3 0x02 -#define PAGE_SIZE 0x80U //128 words - -#elif defined __AVR_ATmega32__ -#define SIG2 0x95 -#define SIG3 0x02 -#define PAGE_SIZE 0x40U //64 words - -#elif defined __AVR_ATmega16__ -#define SIG2 0x94 -#define SIG3 0x03 -#define PAGE_SIZE 0x40U //64 words - -#elif defined __AVR_ATmega8__ -#define SIG2 0x93 -#define SIG3 0x07 -#define PAGE_SIZE 0x20U //32 words - -#elif defined __AVR_ATmega88__ -#define SIG2 0x93 -#define SIG3 0x0a -#define PAGE_SIZE 0x20U //32 words - -#elif defined __AVR_ATmega168__ -#define SIG2 0x94 -#define SIG3 0x06 -#define PAGE_SIZE 0x40U //64 words - -#elif defined __AVR_ATmega162__ -#define SIG2 0x94 -#define SIG3 0x04 -#define PAGE_SIZE 0x40U //64 words - -#elif defined __AVR_ATmega163__ -#define SIG2 0x94 -#define SIG3 0x02 -#define PAGE_SIZE 0x40U //64 words - -#elif defined __AVR_ATmega169__ -#define SIG2 0x94 -#define SIG3 0x05 -#define PAGE_SIZE 0x40U //64 words - -#elif defined __AVR_ATmega8515__ -#define SIG2 0x93 -#define SIG3 0x06 -#define PAGE_SIZE 0x20U //32 words - -#elif defined __AVR_ATmega8535__ -#define SIG2 0x93 -#define SIG3 0x08 -#define PAGE_SIZE 0x20U //32 words -#endif - - -/* function prototypes */ -void putch(char); -char getch(void); -void getNch(uint8_t); -void byte_response(uint8_t); -void nothing_response(void); -char gethex(void); -void puthex(char); -void flash_led(uint8_t); - -/* some variables */ -union address_union { - uint16_t word; - uint8_t byte[2]; -} address; - -union length_union { - uint16_t word; - uint8_t byte[2]; -} length; - -struct flags_struct { - unsigned eeprom : 1; - unsigned rampz : 1; -} flags; - -uint8_t buff[256]; -uint8_t address_high; - -uint8_t pagesz=0x80; - -uint8_t i; -uint8_t bootuart = 0; - -uint8_t error_count = 0; - -void (*app_start)(void) = 0x0000; - - -/* main program starts here */ -int main(void) -{ - uint8_t ch,ch2; - uint16_t w; - - asm volatile("nop\n\t"); - - /* set pin direction for bootloader pin and enable pullup */ - /* for ATmega128, two pins need to be initialized */ -#ifdef __AVR_ATmega128__ - BL_DDR &= ~_BV(BL0); - BL_DDR &= ~_BV(BL1); - BL_PORT |= _BV(BL0); - BL_PORT |= _BV(BL1); -#else - /* We run the bootloader regardless of the state of this pin. Thus, don't - put it in a different state than the other pins. --DAM, 070709 - BL_DDR &= ~_BV(BL); - BL_PORT |= _BV(BL); - */ -#endif - - -#ifdef __AVR_ATmega128__ - /* check which UART should be used for booting */ - if(bit_is_clear(BL_PIN, BL0)) { - bootuart = 1; - } - else if(bit_is_clear(BL_PIN, BL1)) { - bootuart = 2; - } -#endif - - /* check if flash is programmed already, if not start bootloader anyway */ - if(pgm_read_byte_near(0x0000) != 0xFF) { - -#ifdef __AVR_ATmega128__ - /* no UART was selected, start application */ - if(!bootuart) { - app_start(); - } -#else - /* check if bootloader pin is set low */ - /* we don't start this part neither for the m8, nor m168 */ - //if(bit_is_set(BL_PIN, BL)) { - // app_start(); - // } -#endif - } - -#ifdef __AVR_ATmega128__ - /* no bootuart was selected, default to uart 0 */ - if(!bootuart) { - bootuart = 1; - } -#endif - - - /* initialize UART(s) depending on CPU defined */ -#ifdef __AVR_ATmega128__ - if(bootuart == 1) { - UBRR0L = (uint8_t)(F_CPU/(BAUD_RATE*16L)-1); - UBRR0H = (F_CPU/(BAUD_RATE*16L)-1) >> 8; - UCSR0A = 0x00; - UCSR0C = 0x06; - UCSR0B = _BV(TXEN0)|_BV(RXEN0); - } - if(bootuart == 2) { - UBRR1L = (uint8_t)(F_CPU/(BAUD_RATE*16L)-1); - UBRR1H = (F_CPU/(BAUD_RATE*16L)-1) >> 8; - UCSR1A = 0x00; - UCSR1C = 0x06; - UCSR1B = _BV(TXEN1)|_BV(RXEN1); - } -#elif defined __AVR_ATmega163__ - UBRR = (uint8_t)(F_CPU/(BAUD_RATE*16L)-1); - UBRRHI = (F_CPU/(BAUD_RATE*16L)-1) >> 8; - UCSRA = 0x00; - UCSRB = _BV(TXEN)|_BV(RXEN); -#elif defined __AVR_ATmega168__ - UBRR0L = (uint8_t)(F_CPU/(BAUD_RATE*16L)-1); - UBRR0H = (F_CPU/(BAUD_RATE*16L)-1) >> 8; - UCSR0B = (1<>8; // set baud rate - UBRRL = (((F_CPU/BAUD_RATE)/16)-1); - UCSRB = (1<> 8; - UCSRA = 0x00; - UCSRC = 0x06; - UCSRB = _BV(TXEN)|_BV(RXEN); -#endif - - /* set LED pin as output */ - LED_DDR |= _BV(LED); - - - /* flash onboard LED to signal entering of bootloader */ -#ifdef __AVR_ATmega128__ - // 4x for UART0, 5x for UART1 - flash_led(NUM_LED_FLASHES + bootuart); -#else - flash_led(NUM_LED_FLASHES); -#endif - - /* 20050803: by DojoCorp, this is one of the parts provoking the - system to stop listening, cancelled from the original */ - //putch('\0'); - - - /* forever loop */ - for (;;) { - - /* get character from UART */ - ch = getch(); - - /* A bunch of if...else if... gives smaller code than switch...case ! */ - - /* Hello is anyone home ? */ - if(ch=='0') { - nothing_response(); - } - - - /* Request programmer ID */ - /* Not using PROGMEM string due to boot block in m128 being beyond 64kB boundry */ - /* Would need to selectively manipulate RAMPZ, and it's only 9 characters anyway so who cares. */ - else if(ch=='1') { - if (getch() == ' ') { - putch(0x14); - putch('A'); - putch('V'); - putch('R'); - putch(' '); - putch('I'); - putch('S'); - putch('P'); - putch(0x10); - } else { - if (++error_count == MAX_ERROR_COUNT) - app_start(); - } - } - - - /* AVR ISP/STK500 board commands DON'T CARE so default nothing_response */ - else if(ch=='@') { - ch2 = getch(); - if (ch2>0x85) getch(); - nothing_response(); - } - - - /* AVR ISP/STK500 board requests */ - else if(ch=='A') { - ch2 = getch(); - if(ch2==0x80) byte_response(HW_VER); // Hardware version - else if(ch2==0x81) byte_response(SW_MAJOR); // Software major version - else if(ch2==0x82) byte_response(SW_MINOR); // Software minor version - else if(ch2==0x98) byte_response(0x03); // Unknown but seems to be required by avr studio 3.56 - else byte_response(0x00); // Covers various unnecessary responses we don't care about - } - - - /* Device Parameters DON'T CARE, DEVICE IS FIXED */ - else if(ch=='B') { - getNch(20); - nothing_response(); - } - - - /* Parallel programming stuff DON'T CARE */ - else if(ch=='E') { - getNch(5); - nothing_response(); - } - - - /* Enter programming mode */ - else if(ch=='P') { - nothing_response(); - } - - - /* Leave programming mode */ - else if(ch=='Q') { - nothing_response(); - } - - - /* Erase device, don't care as we will erase one page at a time anyway. */ - else if(ch=='R') { - nothing_response(); - } - - - /* Set address, little endian. EEPROM in bytes, FLASH in words */ - /* Perhaps extra address bytes may be added in future to support > 128kB FLASH. */ - /* This might explain why little endian was used here, big endian used everywhere else. */ - else if(ch=='U') { - address.byte[0] = getch(); - address.byte[1] = getch(); - nothing_response(); - } - - - /* Universal SPI programming command, disabled. Would be used for fuses and lock bits. */ - else if(ch=='V') { - getNch(4); - byte_response(0x00); - } - - - /* Write memory, length is big endian and is in bytes */ - else if(ch=='d') { - length.byte[1] = getch(); - length.byte[0] = getch(); - flags.eeprom = 0; - if (getch() == 'E') flags.eeprom = 1; - for (w=0;w127) address_high = 0x01; //Only possible with m128, m256 will need 3rd address byte. FIXME - else address_high = 0x00; -#ifdef __AVR_ATmega128__ - RAMPZ = address_high; -#endif - address.word = address.word << 1; //address * 2 -> byte location - /* if ((length.byte[0] & 0x01) == 0x01) length.word++; //Even up an odd number of bytes */ - if ((length.byte[0] & 0x01)) length.word++; //Even up an odd number of bytes - cli(); //Disable interrupts, just to be sure - // HACKME: EEPE used to be EEWE - while(bit_is_set(EECR,EEPE)); //Wait for previous EEPROM writes to complete - asm volatile( - "clr r17 \n\t" //page_word_count - "lds r30,address \n\t" //Address of FLASH location (in bytes) - "lds r31,address+1 \n\t" - "ldi r28,lo8(buff) \n\t" //Start of buffer array in RAM - "ldi r29,hi8(buff) \n\t" - "lds r24,length \n\t" //Length of data to be written (in bytes) - "lds r25,length+1 \n\t" - "length_loop: \n\t" //Main loop, repeat for number of words in block - "cpi r17,0x00 \n\t" //If page_word_count=0 then erase page - "brne no_page_erase \n\t" - "wait_spm1: \n\t" - "lds r16,%0 \n\t" //Wait for previous spm to complete - "andi r16,1 \n\t" - "cpi r16,1 \n\t" - "breq wait_spm1 \n\t" - "ldi r16,0x03 \n\t" //Erase page pointed to by Z - "sts %0,r16 \n\t" - "spm \n\t" -#ifdef __AVR_ATmega163__ - ".word 0xFFFF \n\t" - "nop \n\t" -#endif - "wait_spm2: \n\t" - "lds r16,%0 \n\t" //Wait for previous spm to complete - "andi r16,1 \n\t" - "cpi r16,1 \n\t" - "breq wait_spm2 \n\t" - - "ldi r16,0x11 \n\t" //Re-enable RWW section - "sts %0,r16 \n\t" - "spm \n\t" -#ifdef __AVR_ATmega163__ - ".word 0xFFFF \n\t" - "nop \n\t" -#endif - "no_page_erase: \n\t" - "ld r0,Y+ \n\t" //Write 2 bytes into page buffer - "ld r1,Y+ \n\t" - - "wait_spm3: \n\t" - "lds r16,%0 \n\t" //Wait for previous spm to complete - "andi r16,1 \n\t" - "cpi r16,1 \n\t" - "breq wait_spm3 \n\t" - "ldi r16,0x01 \n\t" //Load r0,r1 into FLASH page buffer - "sts %0,r16 \n\t" - "spm \n\t" - - "inc r17 \n\t" //page_word_count++ - "cpi r17,%1 \n\t" - "brlo same_page \n\t" //Still same page in FLASH - "write_page: \n\t" - "clr r17 \n\t" //New page, write current one first - "wait_spm4: \n\t" - "lds r16,%0 \n\t" //Wait for previous spm to complete - "andi r16,1 \n\t" - "cpi r16,1 \n\t" - "breq wait_spm4 \n\t" -#ifdef __AVR_ATmega163__ - "andi r30,0x80 \n\t" // m163 requires Z6:Z1 to be zero during page write -#endif - "ldi r16,0x05 \n\t" //Write page pointed to by Z - "sts %0,r16 \n\t" - "spm \n\t" -#ifdef __AVR_ATmega163__ - ".word 0xFFFF \n\t" - "nop \n\t" - "ori r30,0x7E \n\t" // recover Z6:Z1 state after page write (had to be zero during write) -#endif - "wait_spm5: \n\t" - "lds r16,%0 \n\t" //Wait for previous spm to complete - "andi r16,1 \n\t" - "cpi r16,1 \n\t" - "breq wait_spm5 \n\t" - "ldi r16,0x11 \n\t" //Re-enable RWW section - "sts %0,r16 \n\t" - "spm \n\t" -#ifdef __AVR_ATmega163__ - ".word 0xFFFF \n\t" - "nop \n\t" -#endif - "same_page: \n\t" - "adiw r30,2 \n\t" //Next word in FLASH - "sbiw r24,2 \n\t" //length-2 - "breq final_write \n\t" //Finished - "rjmp length_loop \n\t" - "final_write: \n\t" - "cpi r17,0 \n\t" - "breq block_done \n\t" - "adiw r24,2 \n\t" //length+2, fool above check on length after short page write - "rjmp write_page \n\t" - "block_done: \n\t" - "clr __zero_reg__ \n\t" //restore zero register -#if defined __AVR_ATmega168__ - : "=m" (SPMCSR) : "M" (PAGE_SIZE) : "r0","r16","r17","r24","r25","r28","r29","r30","r31" -#else - : "=m" (SPMCR) : "M" (PAGE_SIZE) : "r0","r16","r17","r24","r25","r28","r29","r30","r31" -#endif - ); - /* Should really add a wait for RWW section to be enabled, don't actually need it since we never */ - /* exit the bootloader without a power cycle anyhow */ - } - putch(0x14); - putch(0x10); - } else { - if (++error_count == MAX_ERROR_COUNT) - app_start(); - } - } - - - /* Read memory block mode, length is big endian. */ - else if(ch=='t') { - length.byte[1] = getch(); - length.byte[0] = getch(); -#if defined __AVR_ATmega128__ - if (address.word>0x7FFF) flags.rampz = 1; // No go with m256, FIXME - else flags.rampz = 0; -#endif - if (getch() == 'E') flags.eeprom = 1; - else { - flags.eeprom = 0; - address.word = address.word << 1; // address * 2 -> byte location - } - if (getch() == ' ') { // Command terminator - putch(0x14); - for (w=0;w < length.word;w++) { // Can handle odd and even lengths okay - if (flags.eeprom) { // Byte access EEPROM read -#ifdef __AVR_ATmega168__ - while(EECR & (1<= 'a') { - ah = ah - 'a' + 0x0a; - } else if(ah >= '0') { - ah -= '0'; - } - if(al >= 'a') { - al = al - 'a' + 0x0a; - } else if(al >= '0') { - al -= '0'; - } - return (ah << 4) + al; -} - - -void puthex(char ch) { - char ah,al; - - ah = (ch & 0xf0) >> 4; - if(ah >= 0x0a) { - ah = ah - 0x0a + 'a'; - } else { - ah += '0'; - } - al = (ch & 0x0f); - if(al >= 0x0a) { - al = al - 0x0a + 'a'; - } else { - al += '0'; - } - putch(ah); - putch(al); -} - - -void putch(char ch) -{ -#ifdef __AVR_ATmega128__ - if(bootuart == 1) { - while (!(UCSR0A & _BV(UDRE0))); - UDR0 = ch; - } - else if (bootuart == 2) { - while (!(UCSR1A & _BV(UDRE1))); - UDR1 = ch; - } -#elif defined __AVR_ATmega168__ - while (!(UCSR0A & _BV(UDRE0))); - UDR0 = ch; -#else - /* m8,16,32,169,8515,8535,163 */ - while (!(UCSRA & _BV(UDRE))); - UDR = ch; -#endif -} - - -char getch(void) -{ -#ifdef __AVR_ATmega128__ - if(bootuart == 1) { - while(!(UCSR0A & _BV(RXC0))); - return UDR0; - } - else if(bootuart == 2) { - while(!(UCSR1A & _BV(RXC1))); - return UDR1; - } - return 0; -#elif defined __AVR_ATmega168__ - uint32_t count = 0; - while(!(UCSR0A & _BV(RXC0))){ - /* 20060803 DojoCorp:: Addon coming from the previous Bootloader*/ - /* HACKME:: here is a good place to count times*/ - count++; - if (count > MAX_TIME_COUNT) - app_start(); - } - return UDR0; -#else - /* m8,16,32,169,8515,8535,163 */ - uint32_t count = 0; - while(!(UCSRA & _BV(RXC))){ - /* 20060803 DojoCorp:: Addon coming from the previous Bootloader*/ - /* HACKME:: here is a good place to count times*/ - count++; - if (count > MAX_TIME_COUNT) - app_start(); - } - return UDR; -#endif -} - - -void getNch(uint8_t count) -{ - uint8_t i; - for(i=0;i $@ - -%.srec: %.elf - $(OBJCOPY) -j .text -j .data -O srec $< $@ - -%.bin: %.elf - $(OBJCOPY) -j .text -j .data -O binary $< $@ - -clean: - rm -rf *.o *.elf *.lst *.map *.sym *.lss *.eep *.srec *.bin *.hex - -install: - avrdude -p m168 -c stk500v2 -P /dev/cu.USA19H1b1P1.1 -e -u -U lock:w:0x3f:m -U efuse:w:0x00:m -U hfuse:w:0xdd:m -U lfuse:w:0xe2:m - avrdude -p m168 -c stk500v2 -P /dev/cu.USA19H1b1P1.1 -e -u -U flash:w:ATmegaBOOT_168.hex -U lock:w:0x0f:m diff --git a/build/linux/work/hardware/arduino/bootloaders/optiboot/Makefile b/build/linux/work/hardware/arduino/bootloaders/optiboot/Makefile deleted file mode 100644 index b9f3ed5a4..000000000 --- a/build/linux/work/hardware/arduino/bootloaders/optiboot/Makefile +++ /dev/null @@ -1,451 +0,0 @@ -# Makefile for ATmegaBOOT -# E.Lins, 18.7.2005 -# $Id$ -# -# Instructions -# -# To make bootloader .hex file: -# make diecimila -# make lilypad -# make ng -# etc... -# -# To burn bootloader .hex file: -# make diecimila_isp -# make lilypad_isp -# make ng_isp -# etc... - -# program name should not be changed... -PROGRAM = optiboot - -# The default behavior is to build using tools that are in the users -# current path variables, but we can also build using an installed -# Arduino user IDE setup, or the Arduino source tree. -# Uncomment this next lines to build within the arduino environment, -# using the arduino-included avrgcc toolset (mac and pc) -# ENV ?= arduino -# ENV ?= arduinodev -# OS ?= macosx -# OS ?= windows - - -# enter the parameters for the avrdude isp tool -ISPTOOL = stk500v2 -ISPPORT = usb -ISPSPEED = -b 115200 - -MCU_TARGET = atmega168 -LDSECTIONS = -Wl,--section-start=.text=0x3e00 -Wl,--section-start=.version=0x3ffe - -# Build environments -# Start of some ugly makefile-isms to allow optiboot to be built -# in several different environments. See the README.TXT file for -# details. - -# default -fixpath = $(1) - -ifeq ($(ENV), arduino) -# For Arduino, we assume that we're connected to the optiboot directory -# included with the arduino distribution, which means that the full set -# of avr-tools are "right up there" in standard places. -TOOLROOT = ../../../tools -GCCROOT = $(TOOLROOT)/avr/bin/ -AVRDUDE_CONF = -C$(TOOLROOT)/avr/etc/avrdude.conf - -ifeq ($(OS), windows) -# On windows, SOME of the tool paths will need to have backslashes instead -# of forward slashes (because they use windows cmd.exe for execution instead -# of a unix/mingw shell?) We also have to ensure that a consistent shell -# is used even if a unix shell is installed (ie as part of WINAVR) -fixpath = $(subst /,\,$1) -SHELL = cmd.exe -endif - -else ifeq ($(ENV), arduinodev) -# Arduino IDE source code environment. Use the unpacked compilers created -# by the build (you'll need to do "ant build" first.) -ifeq ($(OS), macosx) -TOOLROOT = ../../../../build/macosx/work/Arduino.app/Contents/Resources/Java/hardware/tools -endif -ifeq ($(OS), windows) -TOOLROOT = ../../../../build/windows/work/hardware/tools -endif - -GCCROOT = $(TOOLROOT)/avr/bin/ -AVRDUDE_CONF = -C$(TOOLROOT)/avr/etc/avrdude.conf - -else -GCCROOT = -AVRDUDE_CONF = -endif -# -# End of build environment code. - - -# the efuse should really be 0xf8; since, however, only the lower -# three bits of that byte are used on the atmega168, avrdude gets -# confused if you specify 1's for the higher bits, see: -# http://tinker.it/now/2007/02/24/the-tale-of-avrdude-atmega168-and-extended-bits-fuses/ -# -# similarly, the lock bits should be 0xff instead of 0x3f (to -# unlock the bootloader section) and 0xcf instead of 0x2f (to -# lock it), but since the high two bits of the lock byte are -# unused, avrdude would get confused. - -ISPFUSES = $(GCCROOT)avrdude $(AVRDUDE_CONF) -c $(ISPTOOL) \ - -p $(MCU_TARGET) -P $(ISPPORT) $(ISPSPEED) \ - -e -u -U lock:w:0x3f:m -U efuse:w:0x$(EFUSE):m \ - -U hfuse:w:0x$(HFUSE):m -U lfuse:w:0x$(LFUSE):m -ISPFLASH = $(GCCROOT)avrdude $(AVRDUDE_CONF) -c $(ISPTOOL) \ - -p $(MCU_TARGET) -P $(ISPPORT) $(ISPSPEED) \ - -U flash:w:$(PROGRAM)_$(TARGET).hex -U lock:w:0x2f:m - -STK500 = "C:\Program Files\Atmel\AVR Tools\STK500\Stk500.exe" -STK500-1 = $(STK500) -e -d$(MCU_TARGET) -pf -vf -if$(PROGRAM)_$(TARGET).hex \ --lFF -LFF -f$(HFUSE)$(LFUSE) -EF8 -ms -q -cUSB -I200kHz -s -wt -STK500-2 = $(STK500) -d$(MCU_TARGET) -ms -q -lCF -LCF -cUSB -I200kHz -s -wt - -OBJ = $(PROGRAM).o -OPTIMIZE = -Os -fno-inline-small-functions -fno-split-wide-types -mshort-calls - -DEFS = -LIBS = - -CC = $(GCCROOT)avr-gcc - -# Override is only needed by avr-lib build system. - -override CFLAGS = -g -Wall $(OPTIMIZE) -mmcu=$(MCU_TARGET) -DF_CPU=$(AVR_FREQ) $(DEFS) -override LDFLAGS = $(LDSECTIONS) -Wl,--relax -Wl,--gc-sections -nostartfiles -nostdlib - -OBJCOPY = $(GCCROOT)avr-objcopy -OBJDUMP = $(call fixpath,$(GCCROOT)avr-objdump) - -SIZE = $(GCCROOT)avr-size - -# Test platforms -# Virtual boot block test -virboot328: TARGET = atmega328 -virboot328: MCU_TARGET = atmega328p -virboot328: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200' '-DVIRTUAL_BOOT' -virboot328: AVR_FREQ = 16000000L -virboot328: LDSECTIONS = -Wl,--section-start=.text=0x7e00 -Wl,--section-start=.version=0x7ffe -virboot328: $(PROGRAM)_atmega328.hex -virboot328: $(PROGRAM)_atmega328.lst - -# 20MHz clocked platforms -# -# These are capable of 230400 baud, or 115200 baud on PC (Arduino Avrdude issue) -# - -pro20: TARGET = pro_20mhz -pro20: MCU_TARGET = atmega168 -pro20: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200' -pro20: AVR_FREQ = 20000000L -pro20: $(PROGRAM)_pro_20mhz.hex -pro20: $(PROGRAM)_pro_20mhz.lst - -pro20_isp: pro20 -pro20_isp: TARGET = pro_20mhz -# 2.7V brownout -pro20_isp: HFUSE = DD -# Full swing xtal (20MHz) 258CK/14CK+4.1ms -pro20_isp: LFUSE = C6 -# 512 byte boot -pro20_isp: EFUSE = 04 -pro20_isp: isp - -# 16MHz clocked platforms -# -# These are capable of 230400 baud, or 115200 baud on PC (Arduino Avrdude issue) -# - -pro16: TARGET = pro_16MHz -pro16: MCU_TARGET = atmega168 -pro16: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200' -pro16: AVR_FREQ = 16000000L -pro16: $(PROGRAM)_pro_16MHz.hex -pro16: $(PROGRAM)_pro_16MHz.lst - -pro16_isp: pro16 -pro16_isp: TARGET = pro_16MHz -# 2.7V brownout -pro16_isp: HFUSE = DD -# Full swing xtal (20MHz) 258CK/14CK+4.1ms -pro16_isp: LFUSE = C6 -# 512 byte boot -pro16_isp: EFUSE = 04 -pro16_isp: isp - -# Diecimila, Duemilanove with m168, and NG use identical bootloaders -# Call it "atmega168" for generality and clarity, keep "diecimila" for -# backward compatibility of makefile -# -atmega168: TARGET = atmega168 -atmega168: MCU_TARGET = atmega168 -atmega168: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200' -atmega168: AVR_FREQ = 16000000L -atmega168: $(PROGRAM)_atmega168.hex -atmega168: $(PROGRAM)_atmega168.lst - -atmega168_isp: atmega168 -atmega168_isp: TARGET = atmega168 -# 2.7V brownout -atmega168_isp: HFUSE = DD -# Low power xtal (16MHz) 16KCK/14CK+65ms -atmega168_isp: LFUSE = FF -# 512 byte boot -atmega168_isp: EFUSE = 04 -atmega168_isp: isp - -diecimila: TARGET = diecimila -diecimila: MCU_TARGET = atmega168 -diecimila: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200' -diecimila: AVR_FREQ = 16000000L -diecimila: $(PROGRAM)_diecimila.hex -diecimila: $(PROGRAM)_diecimila.lst - -diecimila_isp: diecimila -diecimila_isp: TARGET = diecimila -# 2.7V brownout -diecimila_isp: HFUSE = DD -# Low power xtal (16MHz) 16KCK/14CK+65ms -diecimila_isp: LFUSE = FF -# 512 byte boot -diecimila_isp: EFUSE = 04 -diecimila_isp: isp - -atmega328: TARGET = atmega328 -atmega328: MCU_TARGET = atmega328p -atmega328: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200' -atmega328: AVR_FREQ = 16000000L -atmega328: LDSECTIONS = -Wl,--section-start=.text=0x7e00 -Wl,--section-start=.version=0x7ffe -atmega328: $(PROGRAM)_atmega328.hex -atmega328: $(PROGRAM)_atmega328.lst - -atmega328_isp: atmega328 -atmega328_isp: TARGET = atmega328 -atmega328_isp: MCU_TARGET = atmega328p -# 512 byte boot, SPIEN -atmega328_isp: HFUSE = DE -# Low power xtal (16MHz) 16KCK/14CK+65ms -atmega328_isp: LFUSE = FF -# 2.7V brownout -atmega328_isp: EFUSE = 05 -atmega328_isp: isp - -# Sanguino has a minimum boot size of 1024 bytes, so enable extra functions -# -sanguino: TARGET = atmega644p -sanguino: MCU_TARGET = atmega644p -sanguino: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200' '-DBIGBOOT' -sanguino: AVR_FREQ = 16000000L -sanguino: LDSECTIONS = -Wl,--section-start=.text=0xfc00 -sanguino: $(PROGRAM)_atmega644p.hex -sanguino: $(PROGRAM)_atmega644p.lst - -sanguino_isp: sanguino -sanguino_isp: TARGET = atmega644p -sanguino_isp: MCU_TARGET = atmega644p -# 1024 byte boot -sanguino_isp: HFUSE = DE -# Low power xtal (16MHz) 16KCK/14CK+65ms -sanguino_isp: LFUSE = FF -# 2.7V brownout -sanguino_isp: EFUSE = 05 -sanguino_isp: isp - -# Mega has a minimum boot size of 1024 bytes, so enable extra functions -#mega: TARGET = atmega1280 -mega: MCU_TARGET = atmega1280 -mega: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200' '-DBIGBOOT' -mega: AVR_FREQ = 16000000L -mega: LDSECTIONS = -Wl,--section-start=.text=0x1fc00 -mega: $(PROGRAM)_atmega1280.hex -mega: $(PROGRAM)_atmega1280.lst - -mega_isp: mega -mega_isp: TARGET = atmega1280 -mega_isp: MCU_TARGET = atmega1280 -# 1024 byte boot -mega_isp: HFUSE = DE -# Low power xtal (16MHz) 16KCK/14CK+65ms -mega_isp: LFUSE = FF -# 2.7V brownout -mega_isp: EFUSE = 05 -mega_isp: isp - -# ATmega8 -# -atmega8: TARGET = atmega8 -atmega8: MCU_TARGET = atmega8 -atmega8: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200' -atmega8: AVR_FREQ = 16000000L -atmega8: LDSECTIONS = -Wl,--section-start=.text=0x1e00 -Wl,--section-start=.version=0x1ffe -atmega8: $(PROGRAM)_atmega8.hex -atmega8: $(PROGRAM)_atmega8.lst - -atmega8_isp: atmega8 -atmega8_isp: TARGET = atmega8 -atmega8_isp: MCU_TARGET = atmega8 -# SPIEN, CKOPT, Bootsize=512B -atmega8_isp: HFUSE = CC -# 2.7V brownout, Low power xtal (16MHz) 16KCK/14CK+65ms -atmega8_isp: LFUSE = BF -atmega8_isp: isp - -# ATmega88 -# -atmega88: TARGET = atmega88 -atmega88: MCU_TARGET = atmega88 -atmega88: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200' -atmega88: AVR_FREQ = 16000000L -atmega88: LDSECTIONS = -Wl,--section-start=.text=0x1e00 -Wl,--section-start=.version=0x1ffe -atmega88: $(PROGRAM)_atmega88.hex -atmega88: $(PROGRAM)_atmega88.lst - -atmega88_isp: atmega88 -atmega88_isp: TARGET = atmega88 -atmega88_isp: MCU_TARGET = atmega88 -# 2.7V brownout -atmega88_isp: HFUSE = DD -# Low power xtal (16MHz) 16KCK/14CK+65ms -atemga88_isp: LFUSE = FF -# 512 byte boot -atmega88_isp: EFUSE = 04 -atmega88_isp: isp - - -# 8MHz clocked platforms -# -# These are capable of 115200 baud -# - -lilypad: TARGET = lilypad -lilypad: MCU_TARGET = atmega168 -lilypad: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200' -lilypad: AVR_FREQ = 8000000L -lilypad: $(PROGRAM)_lilypad.hex -lilypad: $(PROGRAM)_lilypad.lst - -lilypad_isp: lilypad -lilypad_isp: TARGET = lilypad -# 2.7V brownout -lilypad_isp: HFUSE = DD -# Internal 8MHz osc (8MHz) Slow rising power -lilypad_isp: LFUSE = E2 -# 512 byte boot -lilypad_isp: EFUSE = 04 -lilypad_isp: isp - -lilypad_resonator: TARGET = lilypad_resonator -lilypad_resonator: MCU_TARGET = atmega168 -lilypad_resonator: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200' -lilypad_resonator: AVR_FREQ = 8000000L -lilypad_resonator: $(PROGRAM)_lilypad_resonator.hex -lilypad_resonator: $(PROGRAM)_lilypad_resonator.lst - -lilypad_resonator_isp: lilypad_resonator -lilypad_resonator_isp: TARGET = lilypad_resonator -# 2.7V brownout -lilypad_resonator_isp: HFUSE = DD -# Full swing xtal (20MHz) 258CK/14CK+4.1ms -lilypad_resonator_isp: LFUSE = C6 -# 512 byte boot -lilypad_resonator_isp: EFUSE = 04 -lilypad_resonator_isp: isp - -pro8: TARGET = pro_8MHz -pro8: MCU_TARGET = atmega168 -pro8: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200' -pro8: AVR_FREQ = 8000000L -pro8: $(PROGRAM)_pro_8MHz.hex -pro8: $(PROGRAM)_pro_8MHz.lst - -pro8_isp: pro8 -pro8_isp: TARGET = pro_8MHz -# 2.7V brownout -pro8_isp: HFUSE = DD -# Full swing xtal (20MHz) 258CK/14CK+4.1ms -pro8_isp: LFUSE = C6 -# 512 byte boot -pro8_isp: EFUSE = 04 -pro8_isp: isp - -atmega328_pro8: TARGET = atmega328_pro_8MHz -atmega328_pro8: MCU_TARGET = atmega328p -atmega328_pro8: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200' -atmega328_pro8: AVR_FREQ = 8000000L -atmega328_pro8: LDSECTIONS = -Wl,--section-start=.text=0x7e00 -Wl,--section-start=.version=0x7ffe -atmega328_pro8: $(PROGRAM)_atmega328_pro_8MHz.hex -atmega328_pro8: $(PROGRAM)_atmega328_pro_8MHz.lst - -atmega328_pro8_isp: atmega328_pro8 -atmega328_pro8_isp: TARGET = atmega328_pro_8MHz -atmega328_pro8_isp: MCU_TARGET = atmega328p -# 512 byte boot, SPIEN -atmega328_pro8_isp: HFUSE = DE -# Low power xtal (16MHz) 16KCK/14CK+65ms -atmega328_pro8_isp: LFUSE = FF -# 2.7V brownout -atmega328_pro8_isp: EFUSE = 05 -atmega328_pro8_isp: isp - -# 1MHz clocked platforms -# -# These are capable of 9600 baud -# - -luminet: TARGET = luminet -luminet: MCU_TARGET = attiny84 -luminet: CFLAGS += '-DLED_START_FLASHES=3' '-DSOFT_UART' '-DBAUD_RATE=9600' -luminet: CFLAGS += '-DVIRTUAL_BOOT_PARTITION' -luminet: AVR_FREQ = 1000000L -luminet: LDSECTIONS = -Wl,--section-start=.text=0x1d00 -Wl,--section-start=.version=0x1efe -luminet: $(PROGRAM)_luminet.hex -luminet: $(PROGRAM)_luminet.lst - -luminet_isp: luminet -luminet_isp: TARGET = luminet -luminet_isp: MCU_TARGET = attiny84 -# Brownout disabled -luminet_isp: HFUSE = DF -# 1MHz internal oscillator, slowly rising power -luminet_isp: LFUSE = 62 -# Self-programming enable -luminet_isp: EFUSE = FE -luminet_isp: isp - -# -# Generic build instructions -# -# - -isp: $(TARGET) - $(ISPFUSES) - $(ISPFLASH) - -isp-stk500: $(PROGRAM)_$(TARGET).hex - $(STK500-1) - $(STK500-2) - -%.elf: $(OBJ) - $(CC) $(CFLAGS) $(LDFLAGS) -o $@ $^ $(LIBS) - $(SIZE) $@ - -clean: - rm -rf *.o *.elf *.lst *.map *.sym *.lss *.eep *.srec *.bin *.hex - -%.lst: %.elf - $(OBJDUMP) -h -S $< > $@ - -%.hex: %.elf - $(OBJCOPY) -j .text -j .data -j .version --set-section-flags .version=alloc,load -O ihex $< $@ - -%.srec: %.elf - $(OBJCOPY) -j .text -j .data -j .version --set-section-flags .version=alloc,load -O srec $< $@ - -%.bin: %.elf - $(OBJCOPY) -j .text -j .data -j .version --set-section-flags .version=alloc,load -O binary $< $@ diff --git a/build/linux/work/hardware/arduino/bootloaders/optiboot/README.TXT b/build/linux/work/hardware/arduino/bootloaders/optiboot/README.TXT deleted file mode 100644 index cd79cd953..000000000 --- a/build/linux/work/hardware/arduino/bootloaders/optiboot/README.TXT +++ /dev/null @@ -1,81 +0,0 @@ -This directory contains the Optiboot small bootloader for AVR -microcontrollers, somewhat modified specifically for the Arduino -environment. - -Optiboot is more fully described here: http://code.google.com/p/optiboot/ -and is the work of Peter Knight (aka Cathedrow), building on work of Jason P -Kyle, Spiff, and Ladyada. Arduino-specific modification are by Bill -Westfield (aka WestfW) - -Arduino-specific issues are tracked as part of the Arduino project -at http://code.google.com/p/arduino - - ------------------------------------------------------------- -Building optiboot for Arduino. - -Production builds of optiboot for Arduino are done on a Mac in "unix mode" -using CrossPack-AVR-20100115. CrossPack tracks WINAVR (for windows), which -is just a package of avr-gcc and related utilities, so similar builds should -work on Windows or Linux systems. - -One of the Arduino-specific changes is modifications to the makefile to -allow building optiboot using only the tools installed as part of the -Arduino environment, or the Arduino source development tree. All three -build procedures should yield identical binaries (.hex files) (although -this may change if compiler versions drift apart between CrossPack and -the Arduino IDE.) - - -Building Optiboot in the Arduino IDE Install. - -Work in the .../hardware/arduino/bootloaders/optiboot/ and use the -"omake " command, which just generates a command that uses -the arduino-included "make" utility with a command like: - make OS=windows ENV=arduino -or make OS=macosx ENV=arduino -On windows, this assumes you're using the windows command shell. If -you're using a cygwin or mingw shell, or have one of those in your -path, the build will probably break due to slash vs backslash issues. -On a Mac, if you have the developer tools installed, you can use the -Apple-supplied version of make. -The makefile uses relative paths ("../../../tools/" and such) to find -the programs it needs, so you need to work in the existing optiboot -directory (or something created at the same "level") for it to work. - - -Building Optiboot in the Arduino Source Development Install. - -In this case, there is no special shell script, and you're assumed to -have "make" installed somewhere in your path. -Build the Arduino source ("ant build") to unpack the tools into the -expected directory. -Work in Arduino/hardware/arduino/bootloaders/optiboot and use - make OS=windows ENV=arduinodev -or make OS=macosx ENV=arduinodev - - -Programming Chips Using the _isp Targets - -The CPU targets have corresponding ISP targets that will actuall -program the bootloader into a chip. "atmega328_isp" for the atmega328, -for example. These will set the fuses and lock bits as appropriate as -well as uploading the bootloader code. - -The makefiles default to using a USB programmer, but you can use -a serial programmer like ArduinoISP by changing the appropriate -variables when you invoke make: - - make ISPTOOL=stk500v1 ISPPORT=/dev/tty.usbserial-A20e1eAN \ - ISPSPEED=-b19200 atmega328_isp - -The "atmega8_isp" target does not currently work, because the mega8 -doesn't have the "extended" fuse that the generic ISP target wants to -pass on to avrdude. You'll need to run avrdude manually. - - -Standard Targets - -I've reduced the pre-built and source-version-controlled targets -(.hex and .lst files included in the git repository) to just the -three basic 16MHz targets: atmega8, atmega16, atmega328. diff --git a/build/linux/work/hardware/arduino/bootloaders/optiboot/boot.h b/build/linux/work/hardware/arduino/bootloaders/optiboot/boot.h deleted file mode 100644 index 2639cd859..000000000 --- a/build/linux/work/hardware/arduino/bootloaders/optiboot/boot.h +++ /dev/null @@ -1,848 +0,0 @@ -/* Modified to use out for SPM access -** Peter Knight, Optiboot project http://optiboot.googlecode.com -** -** Todo: Tidy up -** -** "_short" routines execute 1 cycle faster and use 1 less word of flash -** by using "out" instruction instead of "sts". -** -** Additional elpm variants that trust the value of RAMPZ -*/ - -/* Copyright (c) 2002, 2003, 2004, 2005, 2006, 2007 Eric B. Weddington - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: boot.h,v 1.27.2.3 2008/09/30 13:58:48 arcanum Exp $ */ - -#ifndef _AVR_BOOT_H_ -#define _AVR_BOOT_H_ 1 - -/** \file */ -/** \defgroup avr_boot : Bootloader Support Utilities - \code - #include - #include - \endcode - - The macros in this module provide a C language interface to the - bootloader support functionality of certain AVR processors. These - macros are designed to work with all sizes of flash memory. - - Global interrupts are not automatically disabled for these macros. It - is left up to the programmer to do this. See the code example below. - Also see the processor datasheet for caveats on having global interrupts - enabled during writing of the Flash. - - \note Not all AVR processors provide bootloader support. See your - processor datasheet to see if it provides bootloader support. - - \todo From email with Marek: On smaller devices (all except ATmega64/128), - __SPM_REG is in the I/O space, accessible with the shorter "in" and "out" - instructions - since the boot loader has a limited size, this could be an - important optimization. - - \par API Usage Example - The following code shows typical usage of the boot API. - - \code - #include - #include - #include - - void boot_program_page (uint32_t page, uint8_t *buf) - { - uint16_t i; - uint8_t sreg; - - // Disable interrupts. - - sreg = SREG; - cli(); - - eeprom_busy_wait (); - - boot_page_erase (page); - boot_spm_busy_wait (); // Wait until the memory is erased. - - for (i=0; i -#include -#include -#include - -/* Check for SPM Control Register in processor. */ -#if defined (SPMCSR) -# define __SPM_REG SPMCSR -#elif defined (SPMCR) -# define __SPM_REG SPMCR -#else -# error AVR processor does not provide bootloader support! -#endif - - -/* Check for SPM Enable bit. */ -#if defined(SPMEN) -# define __SPM_ENABLE SPMEN -#elif defined(SELFPRGEN) -# define __SPM_ENABLE SELFPRGEN -#else -# error Cannot find SPM Enable bit definition! -#endif - -/** \ingroup avr_boot - \def BOOTLOADER_SECTION - - Used to declare a function or variable to be placed into a - new section called .bootloader. This section and its contents - can then be relocated to any address (such as the bootloader - NRWW area) at link-time. */ - -#define BOOTLOADER_SECTION __attribute__ ((section (".bootloader"))) - -/* Create common bit definitions. */ -#ifdef ASB -#define __COMMON_ASB ASB -#else -#define __COMMON_ASB RWWSB -#endif - -#ifdef ASRE -#define __COMMON_ASRE ASRE -#else -#define __COMMON_ASRE RWWSRE -#endif - -/* Define the bit positions of the Boot Lock Bits. */ - -#define BLB12 5 -#define BLB11 4 -#define BLB02 3 -#define BLB01 2 - -/** \ingroup avr_boot - \def boot_spm_interrupt_enable() - Enable the SPM interrupt. */ - -#define boot_spm_interrupt_enable() (__SPM_REG |= (uint8_t)_BV(SPMIE)) - -/** \ingroup avr_boot - \def boot_spm_interrupt_disable() - Disable the SPM interrupt. */ - -#define boot_spm_interrupt_disable() (__SPM_REG &= (uint8_t)~_BV(SPMIE)) - -/** \ingroup avr_boot - \def boot_is_spm_interrupt() - Check if the SPM interrupt is enabled. */ - -#define boot_is_spm_interrupt() (__SPM_REG & (uint8_t)_BV(SPMIE)) - -/** \ingroup avr_boot - \def boot_rww_busy() - Check if the RWW section is busy. */ - -#define boot_rww_busy() (__SPM_REG & (uint8_t)_BV(__COMMON_ASB)) - -/** \ingroup avr_boot - \def boot_spm_busy() - Check if the SPM instruction is busy. */ - -#define boot_spm_busy() (__SPM_REG & (uint8_t)_BV(__SPM_ENABLE)) - -/** \ingroup avr_boot - \def boot_spm_busy_wait() - Wait while the SPM instruction is busy. */ - -#define boot_spm_busy_wait() do{}while(boot_spm_busy()) - -#define __BOOT_PAGE_ERASE (_BV(__SPM_ENABLE) | _BV(PGERS)) -#define __BOOT_PAGE_WRITE (_BV(__SPM_ENABLE) | _BV(PGWRT)) -#define __BOOT_PAGE_FILL _BV(__SPM_ENABLE) -#define __BOOT_RWW_ENABLE (_BV(__SPM_ENABLE) | _BV(__COMMON_ASRE)) -#define __BOOT_LOCK_BITS_SET (_BV(__SPM_ENABLE) | _BV(BLBSET)) - -#define __boot_page_fill_short(address, data) \ -(__extension__({ \ - __asm__ __volatile__ \ - ( \ - "movw r0, %3\n\t" \ - "out %0, %1\n\t" \ - "spm\n\t" \ - "clr r1\n\t" \ - : \ - : "i" (_SFR_IO_ADDR(__SPM_REG)), \ - "r" ((uint8_t)__BOOT_PAGE_FILL), \ - "z" ((uint16_t)address), \ - "r" ((uint16_t)data) \ - : "r0" \ - ); \ -})) - -#define __boot_page_fill_normal(address, data) \ -(__extension__({ \ - __asm__ __volatile__ \ - ( \ - "movw r0, %3\n\t" \ - "sts %0, %1\n\t" \ - "spm\n\t" \ - "clr r1\n\t" \ - : \ - : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ - "r" ((uint8_t)__BOOT_PAGE_FILL), \ - "z" ((uint16_t)address), \ - "r" ((uint16_t)data) \ - : "r0" \ - ); \ -})) - -#define __boot_page_fill_alternate(address, data)\ -(__extension__({ \ - __asm__ __volatile__ \ - ( \ - "movw r0, %3\n\t" \ - "sts %0, %1\n\t" \ - "spm\n\t" \ - ".word 0xffff\n\t" \ - "nop\n\t" \ - "clr r1\n\t" \ - : \ - : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ - "r" ((uint8_t)__BOOT_PAGE_FILL), \ - "z" ((uint16_t)address), \ - "r" ((uint16_t)data) \ - : "r0" \ - ); \ -})) - -#define __boot_page_fill_extended(address, data) \ -(__extension__({ \ - __asm__ __volatile__ \ - ( \ - "movw r0, %4\n\t" \ - "movw r30, %A3\n\t" \ - "sts %1, %C3\n\t" \ - "sts %0, %2\n\t" \ - "spm\n\t" \ - "clr r1\n\t" \ - : \ - : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ - "i" (_SFR_MEM_ADDR(RAMPZ)), \ - "r" ((uint8_t)__BOOT_PAGE_FILL), \ - "r" ((uint32_t)address), \ - "r" ((uint16_t)data) \ - : "r0", "r30", "r31" \ - ); \ -})) - -#define __boot_page_fill_extended_short(address, data) \ -(__extension__({ \ - __asm__ __volatile__ \ - ( \ - "movw r0, %4\n\t" \ - "movw r30, %A3\n\t" \ - "out %1, %C3\n\t" \ - "out %0, %2\n\t" \ - "spm\n\t" \ - "clr r1\n\t" \ - : \ - : "i" (_SFR_IO_ADDR(__SPM_REG)), \ - "i" (_SFR_IO_ADDR(RAMPZ)), \ - "r" ((uint8_t)__BOOT_PAGE_FILL), \ - "r" ((uint32_t)address), \ - "r" ((uint16_t)data) \ - : "r0", "r30", "r31" \ - ); \ -})) - -#define __boot_page_erase_short(address) \ -(__extension__({ \ - __asm__ __volatile__ \ - ( \ - "out %0, %1\n\t" \ - "spm\n\t" \ - : \ - : "i" (_SFR_IO_ADDR(__SPM_REG)), \ - "r" ((uint8_t)__BOOT_PAGE_ERASE), \ - "z" ((uint16_t)address) \ - ); \ -})) - - -#define __boot_page_erase_normal(address) \ -(__extension__({ \ - __asm__ __volatile__ \ - ( \ - "sts %0, %1\n\t" \ - "spm\n\t" \ - : \ - : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ - "r" ((uint8_t)__BOOT_PAGE_ERASE), \ - "z" ((uint16_t)address) \ - ); \ -})) - -#define __boot_page_erase_alternate(address) \ -(__extension__({ \ - __asm__ __volatile__ \ - ( \ - "sts %0, %1\n\t" \ - "spm\n\t" \ - ".word 0xffff\n\t" \ - "nop\n\t" \ - : \ - : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ - "r" ((uint8_t)__BOOT_PAGE_ERASE), \ - "z" ((uint16_t)address) \ - ); \ -})) - -#define __boot_page_erase_extended(address) \ -(__extension__({ \ - __asm__ __volatile__ \ - ( \ - "movw r30, %A3\n\t" \ - "sts %1, %C3\n\t" \ - "sts %0, %2\n\t" \ - "spm\n\t" \ - : \ - : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ - "i" (_SFR_MEM_ADDR(RAMPZ)), \ - "r" ((uint8_t)__BOOT_PAGE_ERASE), \ - "r" ((uint32_t)address) \ - : "r30", "r31" \ - ); \ -})) -#define __boot_page_erase_extended_short(address) \ -(__extension__({ \ - __asm__ __volatile__ \ - ( \ - "movw r30, %A3\n\t" \ - "out %1, %C3\n\t" \ - "out %0, %2\n\t" \ - "spm\n\t" \ - : \ - : "i" (_SFR_IO_ADDR(__SPM_REG)), \ - "i" (_SFR_IO_ADDR(RAMPZ)), \ - "r" ((uint8_t)__BOOT_PAGE_ERASE), \ - "r" ((uint32_t)address) \ - : "r30", "r31" \ - ); \ -})) - -#define __boot_page_write_short(address) \ -(__extension__({ \ - __asm__ __volatile__ \ - ( \ - "out %0, %1\n\t" \ - "spm\n\t" \ - : \ - : "i" (_SFR_IO_ADDR(__SPM_REG)), \ - "r" ((uint8_t)__BOOT_PAGE_WRITE), \ - "z" ((uint16_t)address) \ - ); \ -})) - -#define __boot_page_write_normal(address) \ -(__extension__({ \ - __asm__ __volatile__ \ - ( \ - "sts %0, %1\n\t" \ - "spm\n\t" \ - : \ - : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ - "r" ((uint8_t)__BOOT_PAGE_WRITE), \ - "z" ((uint16_t)address) \ - ); \ -})) - -#define __boot_page_write_alternate(address) \ -(__extension__({ \ - __asm__ __volatile__ \ - ( \ - "sts %0, %1\n\t" \ - "spm\n\t" \ - ".word 0xffff\n\t" \ - "nop\n\t" \ - : \ - : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ - "r" ((uint8_t)__BOOT_PAGE_WRITE), \ - "z" ((uint16_t)address) \ - ); \ -})) - -#define __boot_page_write_extended(address) \ -(__extension__({ \ - __asm__ __volatile__ \ - ( \ - "movw r30, %A3\n\t" \ - "sts %1, %C3\n\t" \ - "sts %0, %2\n\t" \ - "spm\n\t" \ - : \ - : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ - "i" (_SFR_MEM_ADDR(RAMPZ)), \ - "r" ((uint8_t)__BOOT_PAGE_WRITE), \ - "r" ((uint32_t)address) \ - : "r30", "r31" \ - ); \ -})) -#define __boot_page_write_extended_short(address) \ -(__extension__({ \ - __asm__ __volatile__ \ - ( \ - "movw r30, %A3\n\t" \ - "out %1, %C3\n\t" \ - "out %0, %2\n\t" \ - "spm\n\t" \ - : \ - : "i" (_SFR_IO_ADDR(__SPM_REG)), \ - "i" (_SFR_IO_ADDR(RAMPZ)), \ - "r" ((uint8_t)__BOOT_PAGE_WRITE), \ - "r" ((uint32_t)address) \ - : "r30", "r31" \ - ); \ -})) - -#define __boot_rww_enable_short() \ -(__extension__({ \ - __asm__ __volatile__ \ - ( \ - "out %0, %1\n\t" \ - "spm\n\t" \ - : \ - : "i" (_SFR_IO_ADDR(__SPM_REG)), \ - "r" ((uint8_t)__BOOT_RWW_ENABLE) \ - ); \ -})) - -#define __boot_rww_enable() \ -(__extension__({ \ - __asm__ __volatile__ \ - ( \ - "sts %0, %1\n\t" \ - "spm\n\t" \ - : \ - : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ - "r" ((uint8_t)__BOOT_RWW_ENABLE) \ - ); \ -})) - -#define __boot_rww_enable_alternate() \ -(__extension__({ \ - __asm__ __volatile__ \ - ( \ - "sts %0, %1\n\t" \ - "spm\n\t" \ - ".word 0xffff\n\t" \ - "nop\n\t" \ - : \ - : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ - "r" ((uint8_t)__BOOT_RWW_ENABLE) \ - ); \ -})) - -/* From the mega16/mega128 data sheets (maybe others): - - Bits by SPM To set the Boot Loader Lock bits, write the desired data to - R0, write "X0001001" to SPMCR and execute SPM within four clock cycles - after writing SPMCR. The only accessible Lock bits are the Boot Lock bits - that may prevent the Application and Boot Loader section from any - software update by the MCU. - - If bits 5..2 in R0 are cleared (zero), the corresponding Boot Lock bit - will be programmed if an SPM instruction is executed within four cycles - after BLBSET and SPMEN (or SELFPRGEN) are set in SPMCR. The Z-pointer is - don't care during this operation, but for future compatibility it is - recommended to load the Z-pointer with $0001 (same as used for reading the - Lock bits). For future compatibility It is also recommended to set bits 7, - 6, 1, and 0 in R0 to 1 when writing the Lock bits. When programming the - Lock bits the entire Flash can be read during the operation. */ - -#define __boot_lock_bits_set_short(lock_bits) \ -(__extension__({ \ - uint8_t value = (uint8_t)(~(lock_bits)); \ - __asm__ __volatile__ \ - ( \ - "ldi r30, 1\n\t" \ - "ldi r31, 0\n\t" \ - "mov r0, %2\n\t" \ - "out %0, %1\n\t" \ - "spm\n\t" \ - : \ - : "i" (_SFR_IO_ADDR(__SPM_REG)), \ - "r" ((uint8_t)__BOOT_LOCK_BITS_SET), \ - "r" (value) \ - : "r0", "r30", "r31" \ - ); \ -})) - -#define __boot_lock_bits_set(lock_bits) \ -(__extension__({ \ - uint8_t value = (uint8_t)(~(lock_bits)); \ - __asm__ __volatile__ \ - ( \ - "ldi r30, 1\n\t" \ - "ldi r31, 0\n\t" \ - "mov r0, %2\n\t" \ - "sts %0, %1\n\t" \ - "spm\n\t" \ - : \ - : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ - "r" ((uint8_t)__BOOT_LOCK_BITS_SET), \ - "r" (value) \ - : "r0", "r30", "r31" \ - ); \ -})) - -#define __boot_lock_bits_set_alternate(lock_bits) \ -(__extension__({ \ - uint8_t value = (uint8_t)(~(lock_bits)); \ - __asm__ __volatile__ \ - ( \ - "ldi r30, 1\n\t" \ - "ldi r31, 0\n\t" \ - "mov r0, %2\n\t" \ - "sts %0, %1\n\t" \ - "spm\n\t" \ - ".word 0xffff\n\t" \ - "nop\n\t" \ - : \ - : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ - "r" ((uint8_t)__BOOT_LOCK_BITS_SET), \ - "r" (value) \ - : "r0", "r30", "r31" \ - ); \ -})) - -/* - Reading lock and fuse bits: - - Similarly to writing the lock bits above, set BLBSET and SPMEN (or - SELFPRGEN) bits in __SPMREG, and then (within four clock cycles) issue an - LPM instruction. - - Z address: contents: - 0x0000 low fuse bits - 0x0001 lock bits - 0x0002 extended fuse bits - 0x0003 high fuse bits - - Sounds confusing, doesn't it? - - Unlike the macros in pgmspace.h, no need to care for non-enhanced - cores here as these old cores do not provide SPM support anyway. - */ - -/** \ingroup avr_boot - \def GET_LOW_FUSE_BITS - address to read the low fuse bits, using boot_lock_fuse_bits_get - */ -#define GET_LOW_FUSE_BITS (0x0000) -/** \ingroup avr_boot - \def GET_LOCK_BITS - address to read the lock bits, using boot_lock_fuse_bits_get - */ -#define GET_LOCK_BITS (0x0001) -/** \ingroup avr_boot - \def GET_EXTENDED_FUSE_BITS - address to read the extended fuse bits, using boot_lock_fuse_bits_get - */ -#define GET_EXTENDED_FUSE_BITS (0x0002) -/** \ingroup avr_boot - \def GET_HIGH_FUSE_BITS - address to read the high fuse bits, using boot_lock_fuse_bits_get - */ -#define GET_HIGH_FUSE_BITS (0x0003) - -/** \ingroup avr_boot - \def boot_lock_fuse_bits_get(address) - - Read the lock or fuse bits at \c address. - - Parameter \c address can be any of GET_LOW_FUSE_BITS, - GET_LOCK_BITS, GET_EXTENDED_FUSE_BITS, or GET_HIGH_FUSE_BITS. - - \note The lock and fuse bits returned are the physical values, - i.e. a bit returned as 0 means the corresponding fuse or lock bit - is programmed. - */ -#define boot_lock_fuse_bits_get_short(address) \ -(__extension__({ \ - uint8_t __result; \ - __asm__ __volatile__ \ - ( \ - "ldi r30, %3\n\t" \ - "ldi r31, 0\n\t" \ - "out %1, %2\n\t" \ - "lpm %0, Z\n\t" \ - : "=r" (__result) \ - : "i" (_SFR_IO_ADDR(__SPM_REG)), \ - "r" ((uint8_t)__BOOT_LOCK_BITS_SET), \ - "M" (address) \ - : "r0", "r30", "r31" \ - ); \ - __result; \ -})) - -#define boot_lock_fuse_bits_get(address) \ -(__extension__({ \ - uint8_t __result; \ - __asm__ __volatile__ \ - ( \ - "ldi r30, %3\n\t" \ - "ldi r31, 0\n\t" \ - "sts %1, %2\n\t" \ - "lpm %0, Z\n\t" \ - : "=r" (__result) \ - : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ - "r" ((uint8_t)__BOOT_LOCK_BITS_SET), \ - "M" (address) \ - : "r0", "r30", "r31" \ - ); \ - __result; \ -})) - -/** \ingroup avr_boot - \def boot_signature_byte_get(address) - - Read the Signature Row byte at \c address. For some MCU types, - this function can also retrieve the factory-stored oscillator - calibration bytes. - - Parameter \c address can be 0-0x1f as documented by the datasheet. - \note The values are MCU type dependent. -*/ - -#define __BOOT_SIGROW_READ (_BV(__SPM_ENABLE) | _BV(SIGRD)) - -#define boot_signature_byte_get_short(addr) \ -(__extension__({ \ - uint16_t __addr16 = (uint16_t)(addr); \ - uint8_t __result; \ - __asm__ __volatile__ \ - ( \ - "out %1, %2\n\t" \ - "lpm %0, Z" "\n\t" \ - : "=r" (__result) \ - : "i" (_SFR_IO_ADDR(__SPM_REG)), \ - "r" ((uint8_t) __BOOT_SIGROW_READ), \ - "z" (__addr16) \ - ); \ - __result; \ -})) - -#define boot_signature_byte_get(addr) \ -(__extension__({ \ - uint16_t __addr16 = (uint16_t)(addr); \ - uint8_t __result; \ - __asm__ __volatile__ \ - ( \ - "sts %1, %2\n\t" \ - "lpm %0, Z" "\n\t" \ - : "=r" (__result) \ - : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ - "r" ((uint8_t) __BOOT_SIGROW_READ), \ - "z" (__addr16) \ - ); \ - __result; \ -})) - -/** \ingroup avr_boot - \def boot_page_fill(address, data) - - Fill the bootloader temporary page buffer for flash - address with data word. - - \note The address is a byte address. The data is a word. The AVR - writes data to the buffer a word at a time, but addresses the buffer - per byte! So, increment your address by 2 between calls, and send 2 - data bytes in a word format! The LSB of the data is written to the lower - address; the MSB of the data is written to the higher address.*/ - -/** \ingroup avr_boot - \def boot_page_erase(address) - - Erase the flash page that contains address. - - \note address is a byte address in flash, not a word address. */ - -/** \ingroup avr_boot - \def boot_page_write(address) - - Write the bootloader temporary page buffer - to flash page that contains address. - - \note address is a byte address in flash, not a word address. */ - -/** \ingroup avr_boot - \def boot_rww_enable() - - Enable the Read-While-Write memory section. */ - -/** \ingroup avr_boot - \def boot_lock_bits_set(lock_bits) - - Set the bootloader lock bits. - - \param lock_bits A mask of which Boot Loader Lock Bits to set. - - \note In this context, a 'set bit' will be written to a zero value. - Note also that only BLBxx bits can be programmed by this command. - - For example, to disallow the SPM instruction from writing to the Boot - Loader memory section of flash, you would use this macro as such: - - \code - boot_lock_bits_set (_BV (BLB11)); - \endcode - - \note Like any lock bits, the Boot Loader Lock Bits, once set, - cannot be cleared again except by a chip erase which will in turn - also erase the boot loader itself. */ - -/* Normal versions of the macros use 16-bit addresses. - Extended versions of the macros use 32-bit addresses. - Alternate versions of the macros use 16-bit addresses and require special - instruction sequences after LPM. - - FLASHEND is defined in the ioXXXX.h file. - USHRT_MAX is defined in . */ - -#if defined(__AVR_ATmega161__) || defined(__AVR_ATmega163__) \ - || defined(__AVR_ATmega323__) - -/* Alternate: ATmega161/163/323 and 16 bit address */ -#define boot_page_fill(address, data) __boot_page_fill_alternate(address, data) -#define boot_page_erase(address) __boot_page_erase_alternate(address) -#define boot_page_write(address) __boot_page_write_alternate(address) -#define boot_rww_enable() __boot_rww_enable_alternate() -#define boot_lock_bits_set(lock_bits) __boot_lock_bits_set_alternate(lock_bits) - -#elif (FLASHEND > USHRT_MAX) - -/* Extended: >16 bit address */ -#define boot_page_fill(address, data) __boot_page_fill_extended_short(address, data) -#define boot_page_erase(address) __boot_page_erase_extended_short(address) -#define boot_page_write(address) __boot_page_write_extended_short(address) -#define boot_rww_enable() __boot_rww_enable_short() -#define boot_lock_bits_set(lock_bits) __boot_lock_bits_set_short(lock_bits) - -#else - -/* Normal: 16 bit address */ -#define boot_page_fill(address, data) __boot_page_fill_short(address, data) -#define boot_page_erase(address) __boot_page_erase_short(address) -#define boot_page_write(address) __boot_page_write_short(address) -#define boot_rww_enable() __boot_rww_enable_short() -#define boot_lock_bits_set(lock_bits) __boot_lock_bits_set_short(lock_bits) - -#endif - -/** \ingroup avr_boot - - Same as boot_page_fill() except it waits for eeprom and spm operations to - complete before filling the page. */ - -#define boot_page_fill_safe(address, data) \ -do { \ - boot_spm_busy_wait(); \ - eeprom_busy_wait(); \ - boot_page_fill(address, data); \ -} while (0) - -/** \ingroup avr_boot - - Same as boot_page_erase() except it waits for eeprom and spm operations to - complete before erasing the page. */ - -#define boot_page_erase_safe(address) \ -do { \ - boot_spm_busy_wait(); \ - eeprom_busy_wait(); \ - boot_page_erase (address); \ -} while (0) - -/** \ingroup avr_boot - - Same as boot_page_write() except it waits for eeprom and spm operations to - complete before writing the page. */ - -#define boot_page_write_safe(address) \ -do { \ - boot_spm_busy_wait(); \ - eeprom_busy_wait(); \ - boot_page_write (address); \ -} while (0) - -/** \ingroup avr_boot - - Same as boot_rww_enable() except waits for eeprom and spm operations to - complete before enabling the RWW mameory. */ - -#define boot_rww_enable_safe() \ -do { \ - boot_spm_busy_wait(); \ - eeprom_busy_wait(); \ - boot_rww_enable(); \ -} while (0) - -/** \ingroup avr_boot - - Same as boot_lock_bits_set() except waits for eeprom and spm operations to - complete before setting the lock bits. */ - -#define boot_lock_bits_set_safe(lock_bits) \ -do { \ - boot_spm_busy_wait(); \ - eeprom_busy_wait(); \ - boot_lock_bits_set (lock_bits); \ -} while (0) - -#endif /* _AVR_BOOT_H_ */ diff --git a/build/linux/work/hardware/arduino/bootloaders/optiboot/makeall b/build/linux/work/hardware/arduino/bootloaders/optiboot/makeall deleted file mode 100644 index f076bc7f5..000000000 --- a/build/linux/work/hardware/arduino/bootloaders/optiboot/makeall +++ /dev/null @@ -1,20 +0,0 @@ -#!/bin/bash -make clean -# -# The "big three" standard bootloaders. -make atmega8 -make atmega168 -make atmega328 -# -# additional buildable platforms of -# somewhat questionable support level -make lilypad -make lilypad_resonator -make pro8 -make pro16 -make pro20 -make atmega328_pro8 -make sanguino -make mega -make atmega88 -make luminet diff --git a/build/linux/work/hardware/arduino/bootloaders/optiboot/omake b/build/linux/work/hardware/arduino/bootloaders/optiboot/omake deleted file mode 100644 index cc7c6bc29..000000000 --- a/build/linux/work/hardware/arduino/bootloaders/optiboot/omake +++ /dev/null @@ -1,2 +0,0 @@ -echo ../../../tools/avr/bin/make OS=macosx ENV=arduino $* -../../../tools/avr/bin/make OS=macosx ENV=arduino $* diff --git a/build/linux/work/hardware/arduino/bootloaders/optiboot/omake.bat b/build/linux/work/hardware/arduino/bootloaders/optiboot/omake.bat deleted file mode 100644 index f6815dacc..000000000 --- a/build/linux/work/hardware/arduino/bootloaders/optiboot/omake.bat +++ /dev/null @@ -1 +0,0 @@ -..\..\..\tools\avr\utils\bin\make OS=windows ENV=arduino %* diff --git a/build/linux/work/hardware/arduino/bootloaders/optiboot/optiboot.c b/build/linux/work/hardware/arduino/bootloaders/optiboot/optiboot.c deleted file mode 100644 index d499d85e8..000000000 --- a/build/linux/work/hardware/arduino/bootloaders/optiboot/optiboot.c +++ /dev/null @@ -1,672 +0,0 @@ -/**********************************************************/ -/* Optiboot bootloader for Arduino */ -/* */ -/* http://optiboot.googlecode.com */ -/* */ -/* Arduino-maintained version : See README.TXT */ -/* http://code.google.com/p/arduino/ */ -/* */ -/* Heavily optimised bootloader that is faster and */ -/* smaller than the Arduino standard bootloader */ -/* */ -/* Enhancements: */ -/* Fits in 512 bytes, saving 1.5K of code space */ -/* Background page erasing speeds up programming */ -/* Higher baud rate speeds up programming */ -/* Written almost entirely in C */ -/* Customisable timeout with accurate timeconstant */ -/* Optional virtual UART. No hardware UART required. */ -/* Optional virtual boot partition for devices without. */ -/* */ -/* What you lose: */ -/* Implements a skeleton STK500 protocol which is */ -/* missing several features including EEPROM */ -/* programming and non-page-aligned writes */ -/* High baud rate breaks compatibility with standard */ -/* Arduino flash settings */ -/* */ -/* Fully supported: */ -/* ATmega168 based devices (Diecimila etc) */ -/* ATmega328P based devices (Duemilanove etc) */ -/* */ -/* Alpha test */ -/* ATmega1280 based devices (Arduino Mega) */ -/* */ -/* Work in progress: */ -/* ATmega644P based devices (Sanguino) */ -/* ATtiny84 based devices (Luminet) */ -/* */ -/* Does not support: */ -/* USB based devices (eg. Teensy) */ -/* */ -/* Assumptions: */ -/* The code makes several assumptions that reduce the */ -/* code size. They are all true after a hardware reset, */ -/* but may not be true if the bootloader is called by */ -/* other means or on other hardware. */ -/* No interrupts can occur */ -/* UART and Timer 1 are set to their reset state */ -/* SP points to RAMEND */ -/* */ -/* Code builds on code, libraries and optimisations from: */ -/* stk500boot.c by Jason P. Kyle */ -/* Arduino bootloader http://arduino.cc */ -/* Spiff's 1K bootloader http://spiffie.org/know/arduino_1k_bootloader/bootloader.shtml */ -/* avr-libc project http://nongnu.org/avr-libc */ -/* Adaboot http://www.ladyada.net/library/arduino/bootloader.html */ -/* AVR305 Atmel Application Note */ -/* */ -/* This program is free software; you can redistribute it */ -/* and/or modify it under the terms of the GNU General */ -/* Public License as published by the Free Software */ -/* Foundation; either version 2 of the License, or */ -/* (at your option) any later version. */ -/* */ -/* This program is distributed in the hope that it will */ -/* be useful, but WITHOUT ANY WARRANTY; without even the */ -/* implied warranty of MERCHANTABILITY or FITNESS FOR A */ -/* PARTICULAR PURPOSE. See the GNU General Public */ -/* License for more details. */ -/* */ -/* You should have received a copy of the GNU General */ -/* Public License along with this program; if not, write */ -/* to the Free Software Foundation, Inc., */ -/* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -/* */ -/* Licence can be viewed at */ -/* http://www.fsf.org/licenses/gpl.txt */ -/* */ -/**********************************************************/ - - -/**********************************************************/ -/* */ -/* Optional defines: */ -/* */ -/**********************************************************/ -/* */ -/* BIG_BOOT: */ -/* Build a 1k bootloader, not 512 bytes. This turns on */ -/* extra functionality. */ -/* */ -/* BAUD_RATE: */ -/* Set bootloader baud rate. */ -/* */ -/* LUDICROUS_SPEED: */ -/* 230400 baud :-) */ -/* */ -/* SOFT_UART: */ -/* Use AVR305 soft-UART instead of hardware UART. */ -/* */ -/* LED_START_FLASHES: */ -/* Number of LED flashes on bootup. */ -/* */ -/* LED_DATA_FLASH: */ -/* Flash LED when transferring data. For boards without */ -/* TX or RX LEDs, or for people who like blinky lights. */ -/* */ -/* SUPPORT_EEPROM: */ -/* Support reading and writing from EEPROM. This is not */ -/* used by Arduino, so off by default. */ -/* */ -/* TIMEOUT_MS: */ -/* Bootloader timeout period, in milliseconds. */ -/* 500,1000,2000,4000,8000 supported. */ -/* */ -/**********************************************************/ - -/**********************************************************/ -/* Version Numbers! */ -/* */ -/* Arduino Optiboot now includes this Version number in */ -/* the source and object code. */ -/* */ -/* Version 3 was released as zip from the optiboot */ -/* repository and was distributed with Arduino 0022. */ -/* Version 4 starts with the arduino repository commit */ -/* that brought the arduino repository up-to-date with */ -/* the optiboot source tree changes since v3. */ -/* */ -/**********************************************************/ - -/**********************************************************/ -/* Edit History: */ -/* */ -/* 4.4 WestfW: add initialization of address to keep */ -/* the compiler happy. Change SC'ed targets. */ -/* Return the SW version via READ PARAM */ -/* 4.3 WestfW: catch framing errors in getch(), so that */ -/* AVRISP works without HW kludges. */ -/* http://code.google.com/p/arduino/issues/detail?id=368n*/ -/* 4.2 WestfW: reduce code size, fix timeouts, change */ -/* verifySpace to use WDT instead of appstart */ -/* 4.1 WestfW: put version number in binary. */ -/**********************************************************/ - -#define OPTIBOOT_MAJVER 4 -#define OPTIBOOT_MINVER 4 - -#define MAKESTR(a) #a -#define MAKEVER(a, b) MAKESTR(a*256+b) - -asm(" .section .version\n" - "optiboot_version: .word " MAKEVER(OPTIBOOT_MAJVER, OPTIBOOT_MINVER) "\n" - " .section .text\n"); - -#include -#include -#include - -// uses sts instructions, but this version uses out instructions -// This saves cycles and program memory. -#include "boot.h" - - -// We don't use as those routines have interrupt overhead we don't need. - -#include "pin_defs.h" -#include "stk500.h" - -#ifndef LED_START_FLASHES -#define LED_START_FLASHES 0 -#endif - -#ifdef LUDICROUS_SPEED -#define BAUD_RATE 230400L -#endif - -/* set the UART baud rate defaults */ -#ifndef BAUD_RATE -#if F_CPU >= 8000000L -#define BAUD_RATE 115200L // Highest rate Avrdude win32 will support -#elsif F_CPU >= 1000000L -#define BAUD_RATE 9600L // 19200 also supported, but with significant error -#elsif F_CPU >= 128000L -#define BAUD_RATE 4800L // Good for 128kHz internal RC -#else -#define BAUD_RATE 1200L // Good even at 32768Hz -#endif -#endif - -/* Switch in soft UART for hard baud rates */ -#if (F_CPU/BAUD_RATE) > 280 // > 57600 for 16MHz -#ifndef SOFT_UART -#define SOFT_UART -#endif -#endif - -/* Watchdog settings */ -#define WATCHDOG_OFF (0) -#define WATCHDOG_16MS (_BV(WDE)) -#define WATCHDOG_32MS (_BV(WDP0) | _BV(WDE)) -#define WATCHDOG_64MS (_BV(WDP1) | _BV(WDE)) -#define WATCHDOG_125MS (_BV(WDP1) | _BV(WDP0) | _BV(WDE)) -#define WATCHDOG_250MS (_BV(WDP2) | _BV(WDE)) -#define WATCHDOG_500MS (_BV(WDP2) | _BV(WDP0) | _BV(WDE)) -#define WATCHDOG_1S (_BV(WDP2) | _BV(WDP1) | _BV(WDE)) -#define WATCHDOG_2S (_BV(WDP2) | _BV(WDP1) | _BV(WDP0) | _BV(WDE)) -#ifndef __AVR_ATmega8__ -#define WATCHDOG_4S (_BV(WDP3) | _BV(WDE)) -#define WATCHDOG_8S (_BV(WDP3) | _BV(WDP0) | _BV(WDE)) -#endif - -/* Function Prototypes */ -/* The main function is in init9, which removes the interrupt vector table */ -/* we don't need. It is also 'naked', which means the compiler does not */ -/* generate any entry or exit code itself. */ -int main(void) __attribute__ ((naked)) __attribute__ ((section (".init9"))); -void putch(char); -uint8_t getch(void); -static inline void getNch(uint8_t); /* "static inline" is a compiler hint to reduce code size */ -void verifySpace(); -static inline void flash_led(uint8_t); -uint8_t getLen(); -static inline void watchdogReset(); -void watchdogConfig(uint8_t x); -#ifdef SOFT_UART -void uartDelay() __attribute__ ((naked)); -#endif -void appStart() __attribute__ ((naked)); - -#if defined(__AVR_ATmega168__) -#define RAMSTART (0x100) -#define NRWWSTART (0x3800) -#elif defined(__AVR_ATmega328P__) -#define RAMSTART (0x100) -#define NRWWSTART (0x7000) -#elif defined (__AVR_ATmega644P__) -#define RAMSTART (0x100) -#define NRWWSTART (0xE000) -#elif defined(__AVR_ATtiny84__) -#define RAMSTART (0x100) -#define NRWWSTART (0x0000) -#elif defined(__AVR_ATmega1280__) -#define RAMSTART (0x200) -#define NRWWSTART (0xE000) -#elif defined(__AVR_ATmega8__) || defined(__AVR_ATmega88__) -#define RAMSTART (0x100) -#define NRWWSTART (0x1800) -#endif - -/* C zero initialises all global variables. However, that requires */ -/* These definitions are NOT zero initialised, but that doesn't matter */ -/* This allows us to drop the zero init code, saving us memory */ -#define buff ((uint8_t*)(RAMSTART)) -#ifdef VIRTUAL_BOOT_PARTITION -#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4)) -#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6)) -#endif - -/* main program starts here */ -int main(void) { - uint8_t ch; - - /* - * Making these local and in registers prevents the need for initializing - * them, and also saves space because code no longer stores to memory. - * (initializing address keeps the compiler happy, but isn't really - * necessary, and uses 4 bytes of flash.) - */ - register uint16_t address = 0; - register uint8_t length; - - // After the zero init loop, this is the first code to run. - // - // This code makes the following assumptions: - // No interrupts will execute - // SP points to RAMEND - // r1 contains zero - // - // If not, uncomment the following instructions: - // cli(); - asm volatile ("clr __zero_reg__"); -#ifdef __AVR_ATmega8__ - SP=RAMEND; // This is done by hardware reset -#endif - - // Adaboot no-wait mod - ch = MCUSR; - MCUSR = 0; - if (!(ch & _BV(EXTRF))) appStart(); - -#if LED_START_FLASHES > 0 - // Set up Timer 1 for timeout counter - TCCR1B = _BV(CS12) | _BV(CS10); // div 1024 -#endif -#ifndef SOFT_UART -#ifdef __AVR_ATmega8__ - UCSRA = _BV(U2X); //Double speed mode USART - UCSRB = _BV(RXEN) | _BV(TXEN); // enable Rx & Tx - UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); // config USART; 8N1 - UBRRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); -#else - UCSR0A = _BV(U2X0); //Double speed mode USART0 - UCSR0B = _BV(RXEN0) | _BV(TXEN0); - UCSR0C = _BV(UCSZ00) | _BV(UCSZ01); - UBRR0L = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); -#endif -#endif - - // Set up watchdog to trigger after 500ms - watchdogConfig(WATCHDOG_1S); - - /* Set LED pin as output */ - LED_DDR |= _BV(LED); - -#ifdef SOFT_UART - /* Set TX pin as output */ - UART_DDR |= _BV(UART_TX_BIT); -#endif - -#if LED_START_FLASHES > 0 - /* Flash onboard LED to signal entering of bootloader */ - flash_led(LED_START_FLASHES * 2); -#endif - - /* Forever loop */ - for (;;) { - /* get character from UART */ - ch = getch(); - - if(ch == STK_GET_PARAMETER) { - unsigned char which = getch(); - verifySpace(); - if (which == 0x82) { - /* - * Send optiboot version as "minor SW version" - */ - putch(OPTIBOOT_MINVER); - } else if (which == 0x81) { - putch(OPTIBOOT_MAJVER); - } else { - /* - * GET PARAMETER returns a generic 0x03 reply for - * other parameters - enough to keep Avrdude happy - */ - putch(0x03); - } - } - else if(ch == STK_SET_DEVICE) { - // SET DEVICE is ignored - getNch(20); - } - else if(ch == STK_SET_DEVICE_EXT) { - // SET DEVICE EXT is ignored - getNch(5); - } - else if(ch == STK_LOAD_ADDRESS) { - // LOAD ADDRESS - uint16_t newAddress; - newAddress = getch(); - newAddress = (newAddress & 0xff) | (getch() << 8); -#ifdef RAMPZ - // Transfer top bit to RAMPZ - RAMPZ = (newAddress & 0x8000) ? 1 : 0; -#endif - newAddress += newAddress; // Convert from word address to byte address - address = newAddress; - verifySpace(); - } - else if(ch == STK_UNIVERSAL) { - // UNIVERSAL command is ignored - getNch(4); - putch(0x00); - } - /* Write memory, length is big endian and is in bytes */ - else if(ch == STK_PROG_PAGE) { - // PROGRAM PAGE - we support flash programming only, not EEPROM - uint8_t *bufPtr; - uint16_t addrPtr; - - getch(); /* getlen() */ - length = getch(); - getch(); - - // If we are in RWW section, immediately start page erase - if (address < NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address); - - // While that is going on, read in page contents - bufPtr = buff; - do *bufPtr++ = getch(); - while (--length); - - // If we are in NRWW section, page erase has to be delayed until now. - // Todo: Take RAMPZ into account - if (address >= NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address); - - // Read command terminator, start reply - verifySpace(); - - // If only a partial page is to be programmed, the erase might not be complete. - // So check that here - boot_spm_busy_wait(); - -#ifdef VIRTUAL_BOOT_PARTITION - if ((uint16_t)(void*)address == 0) { - // This is the reset vector page. We need to live-patch the code so the - // bootloader runs. - // - // Move RESET vector to WDT vector - uint16_t vect = buff[0] | (buff[1]<<8); - rstVect = vect; - wdtVect = buff[8] | (buff[9]<<8); - vect -= 4; // Instruction is a relative jump (rjmp), so recalculate. - buff[8] = vect & 0xff; - buff[9] = vect >> 8; - - // Add jump to bootloader at RESET vector - buff[0] = 0x7f; - buff[1] = 0xce; // rjmp 0x1d00 instruction - } -#endif - - // Copy buffer into programming buffer - bufPtr = buff; - addrPtr = (uint16_t)(void*)address; - ch = SPM_PAGESIZE / 2; - do { - uint16_t a; - a = *bufPtr++; - a |= (*bufPtr++) << 8; - __boot_page_fill_short((uint16_t)(void*)addrPtr,a); - addrPtr += 2; - } while (--ch); - - // Write from programming buffer - __boot_page_write_short((uint16_t)(void*)address); - boot_spm_busy_wait(); - -#if defined(RWWSRE) - // Reenable read access to flash - boot_rww_enable(); -#endif - - } - /* Read memory block mode, length is big endian. */ - else if(ch == STK_READ_PAGE) { - // READ PAGE - we only read flash - getch(); /* getlen() */ - length = getch(); - getch(); - - verifySpace(); -#ifdef VIRTUAL_BOOT_PARTITION - do { - // Undo vector patch in bottom page so verify passes - if (address == 0) ch=rstVect & 0xff; - else if (address == 1) ch=rstVect >> 8; - else if (address == 8) ch=wdtVect & 0xff; - else if (address == 9) ch=wdtVect >> 8; - else ch = pgm_read_byte_near(address); - address++; - putch(ch); - } while (--length); -#else -#ifdef __AVR_ATmega1280__ -// do putch(pgm_read_byte_near(address++)); -// while (--length); - do { - uint8_t result; - __asm__ ("elpm %0,Z\n":"=r"(result):"z"(address)); - putch(result); - address++; - } - while (--length); -#else - do putch(pgm_read_byte_near(address++)); - while (--length); -#endif -#endif - } - - /* Get device signature bytes */ - else if(ch == STK_READ_SIGN) { - // READ SIGN - return what Avrdude wants to hear - verifySpace(); - putch(SIGNATURE_0); - putch(SIGNATURE_1); - putch(SIGNATURE_2); - } - else if (ch == 'Q') { - // Adaboot no-wait mod - watchdogConfig(WATCHDOG_16MS); - verifySpace(); - } - else { - // This covers the response to commands like STK_ENTER_PROGMODE - verifySpace(); - } - putch(STK_OK); - } -} - -void putch(char ch) { -#ifndef SOFT_UART - while (!(UCSR0A & _BV(UDRE0))); - UDR0 = ch; -#else - __asm__ __volatile__ ( - " com %[ch]\n" // ones complement, carry set - " sec\n" - "1: brcc 2f\n" - " cbi %[uartPort],%[uartBit]\n" - " rjmp 3f\n" - "2: sbi %[uartPort],%[uartBit]\n" - " nop\n" - "3: rcall uartDelay\n" - " rcall uartDelay\n" - " lsr %[ch]\n" - " dec %[bitcnt]\n" - " brne 1b\n" - : - : - [bitcnt] "d" (10), - [ch] "r" (ch), - [uartPort] "I" (_SFR_IO_ADDR(UART_PORT)), - [uartBit] "I" (UART_TX_BIT) - : - "r25" - ); -#endif -} - -uint8_t getch(void) { - uint8_t ch; - -#ifdef LED_DATA_FLASH -#ifdef __AVR_ATmega8__ - LED_PORT ^= _BV(LED); -#else - LED_PIN |= _BV(LED); -#endif -#endif - -#ifdef SOFT_UART - __asm__ __volatile__ ( - "1: sbic %[uartPin],%[uartBit]\n" // Wait for start edge - " rjmp 1b\n" - " rcall uartDelay\n" // Get to middle of start bit - "2: rcall uartDelay\n" // Wait 1 bit period - " rcall uartDelay\n" // Wait 1 bit period - " clc\n" - " sbic %[uartPin],%[uartBit]\n" - " sec\n" - " dec %[bitCnt]\n" - " breq 3f\n" - " ror %[ch]\n" - " rjmp 2b\n" - "3:\n" - : - [ch] "=r" (ch) - : - [bitCnt] "d" (9), - [uartPin] "I" (_SFR_IO_ADDR(UART_PIN)), - [uartBit] "I" (UART_RX_BIT) - : - "r25" -); -#else - while(!(UCSR0A & _BV(RXC0))) - ; - if (!(UCSR0A & _BV(FE0))) { - /* - * A Framing Error indicates (probably) that something is talking - * to us at the wrong bit rate. Assume that this is because it - * expects to be talking to the application, and DON'T reset the - * watchdog. This should cause the bootloader to abort and run - * the application "soon", if it keeps happening. (Note that we - * don't care that an invalid char is returned...) - */ - watchdogReset(); - } - - ch = UDR0; -#endif - -#ifdef LED_DATA_FLASH -#ifdef __AVR_ATmega8__ - LED_PORT ^= _BV(LED); -#else - LED_PIN |= _BV(LED); -#endif -#endif - - return ch; -} - -#ifdef SOFT_UART -// AVR350 equation: #define UART_B_VALUE (((F_CPU/BAUD_RATE)-23)/6) -// Adding 3 to numerator simulates nearest rounding for more accurate baud rates -#define UART_B_VALUE (((F_CPU/BAUD_RATE)-20)/6) -#if UART_B_VALUE > 255 -#error Baud rate too slow for soft UART -#endif - -void uartDelay() { - __asm__ __volatile__ ( - "ldi r25,%[count]\n" - "1:dec r25\n" - "brne 1b\n" - "ret\n" - ::[count] "M" (UART_B_VALUE) - ); -} -#endif - -void getNch(uint8_t count) { - do getch(); while (--count); - verifySpace(); -} - -void verifySpace() { - if (getch() != CRC_EOP) { - watchdogConfig(WATCHDOG_16MS); // shorten WD timeout - while (1) // and busy-loop so that WD causes - ; // a reset and app start. - } - putch(STK_INSYNC); -} - -#if LED_START_FLASHES > 0 -void flash_led(uint8_t count) { - do { - TCNT1 = -(F_CPU/(1024*16)); - TIFR1 = _BV(TOV1); - while(!(TIFR1 & _BV(TOV1))); -#ifdef __AVR_ATmega8__ - LED_PORT ^= _BV(LED); -#else - LED_PIN |= _BV(LED); -#endif - watchdogReset(); - } while (--count); -} -#endif - -// Watchdog functions. These are only safe with interrupts turned off. -void watchdogReset() { - __asm__ __volatile__ ( - "wdr\n" - ); -} - -void watchdogConfig(uint8_t x) { - WDTCSR = _BV(WDCE) | _BV(WDE); - WDTCSR = x; -} - -void appStart() { - watchdogConfig(WATCHDOG_OFF); - __asm__ __volatile__ ( -#ifdef VIRTUAL_BOOT_PARTITION - // Jump to WDT vector - "ldi r30,4\n" - "clr r31\n" -#else - // Jump to RST vector - "clr r30\n" - "clr r31\n" -#endif - "ijmp\n" - ); -} diff --git a/build/linux/work/hardware/arduino/bootloaders/optiboot/optiboot_atmega168.hex b/build/linux/work/hardware/arduino/bootloaders/optiboot/optiboot_atmega168.hex deleted file mode 100644 index c2f2b5b53..000000000 --- a/build/linux/work/hardware/arduino/bootloaders/optiboot/optiboot_atmega168.hex +++ /dev/null @@ -1,35 +0,0 @@ -:103E0000112484B714BE81FFF0D085E08093810037 -:103E100082E08093C00088E18093C10086E08093B7 -:103E2000C20080E18093C4008EE0C9D0259A86E06C -:103E300020E33CEF91E0309385002093840096BB13 -:103E4000B09BFECF1D9AA8958150A9F7CC24DD2404 -:103E500088248394B5E0AB2EA1E19A2EF3E0BF2E27 -:103E6000A2D0813461F49FD0082FAFD0023811F076 -:103E7000013811F484E001C083E08DD089C0823420 -:103E800011F484E103C0853419F485E0A6D080C024 -:103E9000853579F488D0E82EFF2485D0082F10E0EE -:103EA000102F00270E291F29000F111F8ED0680127 -:103EB0006FC0863521F484E090D080E0DECF843678 -:103EC00009F040C070D06FD0082F6DD080E0C816C8 -:103ED00088E3D80618F4F601B7BEE895C0E0D1E053 -:103EE00062D089930C17E1F7F0E0CF16F8E3DF0614 -:103EF00018F0F601B7BEE89568D007B600FCFDCF14 -:103F0000A601A0E0B1E02C9130E011968C911197C0 -:103F100090E0982F8827822B932B1296FA010C01A0 -:103F200087BEE89511244E5F5F4FF1E0A038BF07D0 -:103F300051F7F601A7BEE89507B600FCFDCF97BE86 -:103F4000E89526C08437B1F42ED02DD0F82E2BD092 -:103F50003CD0F601EF2C8F010F5F1F4F84911BD0D7 -:103F6000EA94F801C1F70894C11CD11CFA94CF0C53 -:103F7000D11C0EC0853739F428D08EE10CD084E9ED -:103F80000AD086E07ACF813511F488E018D01DD0B0 -:103F900080E101D065CF982F8091C00085FFFCCFD4 -:103FA0009093C60008958091C00087FFFCCF809158 -:103FB000C00084FD01C0A8958091C6000895E0E688 -:103FC000F0E098E1908380830895EDDF803219F06E -:103FD00088E0F5DFFFCF84E1DECF1F93182FE3DF0A -:103FE0001150E9F7F2DF1F91089580E0E8DFEE2736 -:043FF000FF2709940A -:023FFE000404B9 -:0400000300003E00BB -:00000001FF diff --git a/build/linux/work/hardware/arduino/bootloaders/optiboot/optiboot_atmega168.lst b/build/linux/work/hardware/arduino/bootloaders/optiboot/optiboot_atmega168.lst deleted file mode 100644 index 06316dbba..000000000 --- a/build/linux/work/hardware/arduino/bootloaders/optiboot/optiboot_atmega168.lst +++ /dev/null @@ -1,598 +0,0 @@ - -optiboot_atmega168.elf: file format elf32-avr - -Sections: -Idx Name Size VMA LMA File off Algn - 0 .text 000001f4 00003e00 00003e00 00000054 2**1 - CONTENTS, ALLOC, LOAD, READONLY, CODE - 1 .version 00000002 00003ffe 00003ffe 00000248 2**0 - CONTENTS, READONLY - 2 .debug_aranges 00000028 00000000 00000000 0000024a 2**0 - CONTENTS, READONLY, DEBUGGING - 3 .debug_pubnames 0000005f 00000000 00000000 00000272 2**0 - CONTENTS, READONLY, DEBUGGING - 4 .debug_info 000002a8 00000000 00000000 000002d1 2**0 - CONTENTS, READONLY, DEBUGGING - 5 .debug_abbrev 00000178 00000000 00000000 00000579 2**0 - CONTENTS, READONLY, DEBUGGING - 6 .debug_line 00000488 00000000 00000000 000006f1 2**0 - CONTENTS, READONLY, DEBUGGING - 7 .debug_frame 00000080 00000000 00000000 00000b7c 2**2 - CONTENTS, READONLY, DEBUGGING - 8 .debug_str 0000014f 00000000 00000000 00000bfc 2**0 - CONTENTS, READONLY, DEBUGGING - 9 .debug_loc 000002d8 00000000 00000000 00000d4b 2**0 - CONTENTS, READONLY, DEBUGGING - 10 .debug_ranges 00000078 00000000 00000000 00001023 2**0 - CONTENTS, READONLY, DEBUGGING - -Disassembly of section .text: - -00003e00
    : -#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4)) -#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6)) -#endif - -/* main program starts here */ -int main(void) { - 3e00: 11 24 eor r1, r1 -#ifdef __AVR_ATmega8__ - SP=RAMEND; // This is done by hardware reset -#endif - - // Adaboot no-wait mod - ch = MCUSR; - 3e02: 84 b7 in r24, 0x34 ; 52 - MCUSR = 0; - 3e04: 14 be out 0x34, r1 ; 52 - if (!(ch & _BV(EXTRF))) appStart(); - 3e06: 81 ff sbrs r24, 1 - 3e08: f0 d0 rcall .+480 ; 0x3fea - -#if LED_START_FLASHES > 0 - // Set up Timer 1 for timeout counter - TCCR1B = _BV(CS12) | _BV(CS10); // div 1024 - 3e0a: 85 e0 ldi r24, 0x05 ; 5 - 3e0c: 80 93 81 00 sts 0x0081, r24 - UCSRA = _BV(U2X); //Double speed mode USART - UCSRB = _BV(RXEN) | _BV(TXEN); // enable Rx & Tx - UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); // config USART; 8N1 - UBRRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); -#else - UCSR0A = _BV(U2X0); //Double speed mode USART0 - 3e10: 82 e0 ldi r24, 0x02 ; 2 - 3e12: 80 93 c0 00 sts 0x00C0, r24 - UCSR0B = _BV(RXEN0) | _BV(TXEN0); - 3e16: 88 e1 ldi r24, 0x18 ; 24 - 3e18: 80 93 c1 00 sts 0x00C1, r24 - UCSR0C = _BV(UCSZ00) | _BV(UCSZ01); - 3e1c: 86 e0 ldi r24, 0x06 ; 6 - 3e1e: 80 93 c2 00 sts 0x00C2, r24 - UBRR0L = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); - 3e22: 80 e1 ldi r24, 0x10 ; 16 - 3e24: 80 93 c4 00 sts 0x00C4, r24 -#endif -#endif - - // Set up watchdog to trigger after 500ms - watchdogConfig(WATCHDOG_1S); - 3e28: 8e e0 ldi r24, 0x0E ; 14 - 3e2a: c9 d0 rcall .+402 ; 0x3fbe - - /* Set LED pin as output */ - LED_DDR |= _BV(LED); - 3e2c: 25 9a sbi 0x04, 5 ; 4 - 3e2e: 86 e0 ldi r24, 0x06 ; 6 -} - -#if LED_START_FLASHES > 0 -void flash_led(uint8_t count) { - do { - TCNT1 = -(F_CPU/(1024*16)); - 3e30: 20 e3 ldi r18, 0x30 ; 48 - 3e32: 3c ef ldi r19, 0xFC ; 252 - TIFR1 = _BV(TOV1); - 3e34: 91 e0 ldi r25, 0x01 ; 1 -} - -#if LED_START_FLASHES > 0 -void flash_led(uint8_t count) { - do { - TCNT1 = -(F_CPU/(1024*16)); - 3e36: 30 93 85 00 sts 0x0085, r19 - 3e3a: 20 93 84 00 sts 0x0084, r18 - TIFR1 = _BV(TOV1); - 3e3e: 96 bb out 0x16, r25 ; 22 - while(!(TIFR1 & _BV(TOV1))); - 3e40: b0 9b sbis 0x16, 0 ; 22 - 3e42: fe cf rjmp .-4 ; 0x3e40 -#ifdef __AVR_ATmega8__ - LED_PORT ^= _BV(LED); -#else - LED_PIN |= _BV(LED); - 3e44: 1d 9a sbi 0x03, 5 ; 3 -} -#endif - -// Watchdog functions. These are only safe with interrupts turned off. -void watchdogReset() { - __asm__ __volatile__ ( - 3e46: a8 95 wdr - LED_PORT ^= _BV(LED); -#else - LED_PIN |= _BV(LED); -#endif - watchdogReset(); - } while (--count); - 3e48: 81 50 subi r24, 0x01 ; 1 - 3e4a: a9 f7 brne .-22 ; 0x3e36 - 3e4c: cc 24 eor r12, r12 - 3e4e: dd 24 eor r13, r13 - ch = SPM_PAGESIZE / 2; - do { - uint16_t a; - a = *bufPtr++; - a |= (*bufPtr++) << 8; - __boot_page_fill_short((uint16_t)(void*)addrPtr,a); - 3e50: 88 24 eor r8, r8 - 3e52: 83 94 inc r8 - addrPtr += 2; - } while (--ch); - - // Write from programming buffer - __boot_page_write_short((uint16_t)(void*)address); - 3e54: b5 e0 ldi r27, 0x05 ; 5 - 3e56: ab 2e mov r10, r27 - boot_spm_busy_wait(); - -#if defined(RWWSRE) - // Reenable read access to flash - boot_rww_enable(); - 3e58: a1 e1 ldi r26, 0x11 ; 17 - 3e5a: 9a 2e mov r9, r26 - do *bufPtr++ = getch(); - while (--length); - - // If we are in NRWW section, page erase has to be delayed until now. - // Todo: Take RAMPZ into account - if (address >= NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address); - 3e5c: f3 e0 ldi r31, 0x03 ; 3 - 3e5e: bf 2e mov r11, r31 -#endif - - /* Forever loop */ - for (;;) { - /* get character from UART */ - ch = getch(); - 3e60: a2 d0 rcall .+324 ; 0x3fa6 - - if(ch == STK_GET_PARAMETER) { - 3e62: 81 34 cpi r24, 0x41 ; 65 - 3e64: 61 f4 brne .+24 ; 0x3e7e - unsigned char which = getch(); - 3e66: 9f d0 rcall .+318 ; 0x3fa6 - 3e68: 08 2f mov r16, r24 - verifySpace(); - 3e6a: af d0 rcall .+350 ; 0x3fca - if (which == 0x82) { - 3e6c: 02 38 cpi r16, 0x82 ; 130 - 3e6e: 11 f0 breq .+4 ; 0x3e74 - /* - * Send optiboot version as "minor SW version" - */ - putch(OPTIBOOT_MINVER); - } else if (which == 0x81) { - 3e70: 01 38 cpi r16, 0x81 ; 129 - 3e72: 11 f4 brne .+4 ; 0x3e78 - putch(OPTIBOOT_MAJVER); - 3e74: 84 e0 ldi r24, 0x04 ; 4 - 3e76: 01 c0 rjmp .+2 ; 0x3e7a - } else { - /* - * GET PARAMETER returns a generic 0x03 reply for - * other parameters - enough to keep Avrdude happy - */ - putch(0x03); - 3e78: 83 e0 ldi r24, 0x03 ; 3 - 3e7a: 8d d0 rcall .+282 ; 0x3f96 - 3e7c: 89 c0 rjmp .+274 ; 0x3f90 - } - } - else if(ch == STK_SET_DEVICE) { - 3e7e: 82 34 cpi r24, 0x42 ; 66 - 3e80: 11 f4 brne .+4 ; 0x3e86 - // SET DEVICE is ignored - getNch(20); - 3e82: 84 e1 ldi r24, 0x14 ; 20 - 3e84: 03 c0 rjmp .+6 ; 0x3e8c - } - else if(ch == STK_SET_DEVICE_EXT) { - 3e86: 85 34 cpi r24, 0x45 ; 69 - 3e88: 19 f4 brne .+6 ; 0x3e90 - // SET DEVICE EXT is ignored - getNch(5); - 3e8a: 85 e0 ldi r24, 0x05 ; 5 - 3e8c: a6 d0 rcall .+332 ; 0x3fda - 3e8e: 80 c0 rjmp .+256 ; 0x3f90 - } - else if(ch == STK_LOAD_ADDRESS) { - 3e90: 85 35 cpi r24, 0x55 ; 85 - 3e92: 79 f4 brne .+30 ; 0x3eb2 - // LOAD ADDRESS - uint16_t newAddress; - newAddress = getch(); - 3e94: 88 d0 rcall .+272 ; 0x3fa6 - newAddress = (newAddress & 0xff) | (getch() << 8); - 3e96: e8 2e mov r14, r24 - 3e98: ff 24 eor r15, r15 - 3e9a: 85 d0 rcall .+266 ; 0x3fa6 - 3e9c: 08 2f mov r16, r24 - 3e9e: 10 e0 ldi r17, 0x00 ; 0 - 3ea0: 10 2f mov r17, r16 - 3ea2: 00 27 eor r16, r16 - 3ea4: 0e 29 or r16, r14 - 3ea6: 1f 29 or r17, r15 -#ifdef RAMPZ - // Transfer top bit to RAMPZ - RAMPZ = (newAddress & 0x8000) ? 1 : 0; -#endif - newAddress += newAddress; // Convert from word address to byte address - 3ea8: 00 0f add r16, r16 - 3eaa: 11 1f adc r17, r17 - address = newAddress; - verifySpace(); - 3eac: 8e d0 rcall .+284 ; 0x3fca - 3eae: 68 01 movw r12, r16 - 3eb0: 6f c0 rjmp .+222 ; 0x3f90 - } - else if(ch == STK_UNIVERSAL) { - 3eb2: 86 35 cpi r24, 0x56 ; 86 - 3eb4: 21 f4 brne .+8 ; 0x3ebe - // UNIVERSAL command is ignored - getNch(4); - 3eb6: 84 e0 ldi r24, 0x04 ; 4 - 3eb8: 90 d0 rcall .+288 ; 0x3fda - putch(0x00); - 3eba: 80 e0 ldi r24, 0x00 ; 0 - 3ebc: de cf rjmp .-68 ; 0x3e7a - } - /* Write memory, length is big endian and is in bytes */ - else if(ch == STK_PROG_PAGE) { - 3ebe: 84 36 cpi r24, 0x64 ; 100 - 3ec0: 09 f0 breq .+2 ; 0x3ec4 - 3ec2: 40 c0 rjmp .+128 ; 0x3f44 - // PROGRAM PAGE - we support flash programming only, not EEPROM - uint8_t *bufPtr; - uint16_t addrPtr; - - getch(); /* getlen() */ - 3ec4: 70 d0 rcall .+224 ; 0x3fa6 - length = getch(); - 3ec6: 6f d0 rcall .+222 ; 0x3fa6 - 3ec8: 08 2f mov r16, r24 - getch(); - 3eca: 6d d0 rcall .+218 ; 0x3fa6 - - // If we are in RWW section, immediately start page erase - if (address < NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address); - 3ecc: 80 e0 ldi r24, 0x00 ; 0 - 3ece: c8 16 cp r12, r24 - 3ed0: 88 e3 ldi r24, 0x38 ; 56 - 3ed2: d8 06 cpc r13, r24 - 3ed4: 18 f4 brcc .+6 ; 0x3edc - 3ed6: f6 01 movw r30, r12 - 3ed8: b7 be out 0x37, r11 ; 55 - 3eda: e8 95 spm - 3edc: c0 e0 ldi r28, 0x00 ; 0 - 3ede: d1 e0 ldi r29, 0x01 ; 1 - - // While that is going on, read in page contents - bufPtr = buff; - do *bufPtr++ = getch(); - 3ee0: 62 d0 rcall .+196 ; 0x3fa6 - 3ee2: 89 93 st Y+, r24 - while (--length); - 3ee4: 0c 17 cp r16, r28 - 3ee6: e1 f7 brne .-8 ; 0x3ee0 - - // If we are in NRWW section, page erase has to be delayed until now. - // Todo: Take RAMPZ into account - if (address >= NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address); - 3ee8: f0 e0 ldi r31, 0x00 ; 0 - 3eea: cf 16 cp r12, r31 - 3eec: f8 e3 ldi r31, 0x38 ; 56 - 3eee: df 06 cpc r13, r31 - 3ef0: 18 f0 brcs .+6 ; 0x3ef8 - 3ef2: f6 01 movw r30, r12 - 3ef4: b7 be out 0x37, r11 ; 55 - 3ef6: e8 95 spm - - // Read command terminator, start reply - verifySpace(); - 3ef8: 68 d0 rcall .+208 ; 0x3fca - - // If only a partial page is to be programmed, the erase might not be complete. - // So check that here - boot_spm_busy_wait(); - 3efa: 07 b6 in r0, 0x37 ; 55 - 3efc: 00 fc sbrc r0, 0 - 3efe: fd cf rjmp .-6 ; 0x3efa - 3f00: a6 01 movw r20, r12 - 3f02: a0 e0 ldi r26, 0x00 ; 0 - 3f04: b1 e0 ldi r27, 0x01 ; 1 - bufPtr = buff; - addrPtr = (uint16_t)(void*)address; - ch = SPM_PAGESIZE / 2; - do { - uint16_t a; - a = *bufPtr++; - 3f06: 2c 91 ld r18, X - 3f08: 30 e0 ldi r19, 0x00 ; 0 - a |= (*bufPtr++) << 8; - 3f0a: 11 96 adiw r26, 0x01 ; 1 - 3f0c: 8c 91 ld r24, X - 3f0e: 11 97 sbiw r26, 0x01 ; 1 - 3f10: 90 e0 ldi r25, 0x00 ; 0 - 3f12: 98 2f mov r25, r24 - 3f14: 88 27 eor r24, r24 - 3f16: 82 2b or r24, r18 - 3f18: 93 2b or r25, r19 -#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4)) -#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6)) -#endif - -/* main program starts here */ -int main(void) { - 3f1a: 12 96 adiw r26, 0x02 ; 2 - ch = SPM_PAGESIZE / 2; - do { - uint16_t a; - a = *bufPtr++; - a |= (*bufPtr++) << 8; - __boot_page_fill_short((uint16_t)(void*)addrPtr,a); - 3f1c: fa 01 movw r30, r20 - 3f1e: 0c 01 movw r0, r24 - 3f20: 87 be out 0x37, r8 ; 55 - 3f22: e8 95 spm - 3f24: 11 24 eor r1, r1 - addrPtr += 2; - 3f26: 4e 5f subi r20, 0xFE ; 254 - 3f28: 5f 4f sbci r21, 0xFF ; 255 - } while (--ch); - 3f2a: f1 e0 ldi r31, 0x01 ; 1 - 3f2c: a0 38 cpi r26, 0x80 ; 128 - 3f2e: bf 07 cpc r27, r31 - 3f30: 51 f7 brne .-44 ; 0x3f06 - - // Write from programming buffer - __boot_page_write_short((uint16_t)(void*)address); - 3f32: f6 01 movw r30, r12 - 3f34: a7 be out 0x37, r10 ; 55 - 3f36: e8 95 spm - boot_spm_busy_wait(); - 3f38: 07 b6 in r0, 0x37 ; 55 - 3f3a: 00 fc sbrc r0, 0 - 3f3c: fd cf rjmp .-6 ; 0x3f38 - -#if defined(RWWSRE) - // Reenable read access to flash - boot_rww_enable(); - 3f3e: 97 be out 0x37, r9 ; 55 - 3f40: e8 95 spm - 3f42: 26 c0 rjmp .+76 ; 0x3f90 -#endif - - } - /* Read memory block mode, length is big endian. */ - else if(ch == STK_READ_PAGE) { - 3f44: 84 37 cpi r24, 0x74 ; 116 - 3f46: b1 f4 brne .+44 ; 0x3f74 - // READ PAGE - we only read flash - getch(); /* getlen() */ - 3f48: 2e d0 rcall .+92 ; 0x3fa6 - length = getch(); - 3f4a: 2d d0 rcall .+90 ; 0x3fa6 - 3f4c: f8 2e mov r15, r24 - getch(); - 3f4e: 2b d0 rcall .+86 ; 0x3fa6 - - verifySpace(); - 3f50: 3c d0 rcall .+120 ; 0x3fca - 3f52: f6 01 movw r30, r12 - 3f54: ef 2c mov r14, r15 - putch(result); - address++; - } - while (--length); -#else - do putch(pgm_read_byte_near(address++)); - 3f56: 8f 01 movw r16, r30 - 3f58: 0f 5f subi r16, 0xFF ; 255 - 3f5a: 1f 4f sbci r17, 0xFF ; 255 - 3f5c: 84 91 lpm r24, Z+ - 3f5e: 1b d0 rcall .+54 ; 0x3f96 - while (--length); - 3f60: ea 94 dec r14 - 3f62: f8 01 movw r30, r16 - 3f64: c1 f7 brne .-16 ; 0x3f56 -#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4)) -#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6)) -#endif - -/* main program starts here */ -int main(void) { - 3f66: 08 94 sec - 3f68: c1 1c adc r12, r1 - 3f6a: d1 1c adc r13, r1 - 3f6c: fa 94 dec r15 - 3f6e: cf 0c add r12, r15 - 3f70: d1 1c adc r13, r1 - 3f72: 0e c0 rjmp .+28 ; 0x3f90 -#endif -#endif - } - - /* Get device signature bytes */ - else if(ch == STK_READ_SIGN) { - 3f74: 85 37 cpi r24, 0x75 ; 117 - 3f76: 39 f4 brne .+14 ; 0x3f86 - // READ SIGN - return what Avrdude wants to hear - verifySpace(); - 3f78: 28 d0 rcall .+80 ; 0x3fca - putch(SIGNATURE_0); - 3f7a: 8e e1 ldi r24, 0x1E ; 30 - 3f7c: 0c d0 rcall .+24 ; 0x3f96 - putch(SIGNATURE_1); - 3f7e: 84 e9 ldi r24, 0x94 ; 148 - 3f80: 0a d0 rcall .+20 ; 0x3f96 - putch(SIGNATURE_2); - 3f82: 86 e0 ldi r24, 0x06 ; 6 - 3f84: 7a cf rjmp .-268 ; 0x3e7a - } - else if (ch == 'Q') { - 3f86: 81 35 cpi r24, 0x51 ; 81 - 3f88: 11 f4 brne .+4 ; 0x3f8e - // Adaboot no-wait mod - watchdogConfig(WATCHDOG_16MS); - 3f8a: 88 e0 ldi r24, 0x08 ; 8 - 3f8c: 18 d0 rcall .+48 ; 0x3fbe - verifySpace(); - } - else { - // This covers the response to commands like STK_ENTER_PROGMODE - verifySpace(); - 3f8e: 1d d0 rcall .+58 ; 0x3fca - } - putch(STK_OK); - 3f90: 80 e1 ldi r24, 0x10 ; 16 - 3f92: 01 d0 rcall .+2 ; 0x3f96 - 3f94: 65 cf rjmp .-310 ; 0x3e60 - -00003f96 : - } -} - -void putch(char ch) { - 3f96: 98 2f mov r25, r24 -#ifndef SOFT_UART - while (!(UCSR0A & _BV(UDRE0))); - 3f98: 80 91 c0 00 lds r24, 0x00C0 - 3f9c: 85 ff sbrs r24, 5 - 3f9e: fc cf rjmp .-8 ; 0x3f98 - UDR0 = ch; - 3fa0: 90 93 c6 00 sts 0x00C6, r25 - [uartBit] "I" (UART_TX_BIT) - : - "r25" - ); -#endif -} - 3fa4: 08 95 ret - -00003fa6 : - [uartBit] "I" (UART_RX_BIT) - : - "r25" -); -#else - while(!(UCSR0A & _BV(RXC0))) - 3fa6: 80 91 c0 00 lds r24, 0x00C0 - 3faa: 87 ff sbrs r24, 7 - 3fac: fc cf rjmp .-8 ; 0x3fa6 - ; - if (!(UCSR0A & _BV(FE0))) { - 3fae: 80 91 c0 00 lds r24, 0x00C0 - 3fb2: 84 fd sbrc r24, 4 - 3fb4: 01 c0 rjmp .+2 ; 0x3fb8 -} -#endif - -// Watchdog functions. These are only safe with interrupts turned off. -void watchdogReset() { - __asm__ __volatile__ ( - 3fb6: a8 95 wdr - * don't care that an invalid char is returned...) - */ - watchdogReset(); - } - - ch = UDR0; - 3fb8: 80 91 c6 00 lds r24, 0x00C6 - LED_PIN |= _BV(LED); -#endif -#endif - - return ch; -} - 3fbc: 08 95 ret - -00003fbe : - "wdr\n" - ); -} - -void watchdogConfig(uint8_t x) { - WDTCSR = _BV(WDCE) | _BV(WDE); - 3fbe: e0 e6 ldi r30, 0x60 ; 96 - 3fc0: f0 e0 ldi r31, 0x00 ; 0 - 3fc2: 98 e1 ldi r25, 0x18 ; 24 - 3fc4: 90 83 st Z, r25 - WDTCSR = x; - 3fc6: 80 83 st Z, r24 -} - 3fc8: 08 95 ret - -00003fca : - do getch(); while (--count); - verifySpace(); -} - -void verifySpace() { - if (getch() != CRC_EOP) { - 3fca: ed df rcall .-38 ; 0x3fa6 - 3fcc: 80 32 cpi r24, 0x20 ; 32 - 3fce: 19 f0 breq .+6 ; 0x3fd6 - watchdogConfig(WATCHDOG_16MS); // shorten WD timeout - 3fd0: 88 e0 ldi r24, 0x08 ; 8 - 3fd2: f5 df rcall .-22 ; 0x3fbe - 3fd4: ff cf rjmp .-2 ; 0x3fd4 - while (1) // and busy-loop so that WD causes - ; // a reset and app start. - } - putch(STK_INSYNC); - 3fd6: 84 e1 ldi r24, 0x14 ; 20 -} - 3fd8: de cf rjmp .-68 ; 0x3f96 - -00003fda : - ::[count] "M" (UART_B_VALUE) - ); -} -#endif - -void getNch(uint8_t count) { - 3fda: 1f 93 push r17 - 3fdc: 18 2f mov r17, r24 - do getch(); while (--count); - 3fde: e3 df rcall .-58 ; 0x3fa6 - 3fe0: 11 50 subi r17, 0x01 ; 1 - 3fe2: e9 f7 brne .-6 ; 0x3fde - verifySpace(); - 3fe4: f2 df rcall .-28 ; 0x3fca -} - 3fe6: 1f 91 pop r17 - 3fe8: 08 95 ret - -00003fea : - WDTCSR = _BV(WDCE) | _BV(WDE); - WDTCSR = x; -} - -void appStart() { - watchdogConfig(WATCHDOG_OFF); - 3fea: 80 e0 ldi r24, 0x00 ; 0 - 3fec: e8 df rcall .-48 ; 0x3fbe - __asm__ __volatile__ ( - 3fee: ee 27 eor r30, r30 - 3ff0: ff 27 eor r31, r31 - 3ff2: 09 94 ijmp diff --git a/build/linux/work/hardware/arduino/bootloaders/optiboot/optiboot_atmega328-Mini.hex b/build/linux/work/hardware/arduino/bootloaders/optiboot/optiboot_atmega328-Mini.hex deleted file mode 100644 index 02266ee8f..000000000 --- a/build/linux/work/hardware/arduino/bootloaders/optiboot/optiboot_atmega328-Mini.hex +++ /dev/null @@ -1,33 +0,0 @@ -:107E000085E08093810082E08093C00088E18093C8 -:107E1000C10086E08093C20080E18093C40084B7F3 -:107E200014BE81FFD0D089E2C8D0259A86E020E335 -:107E30003CEF91E0309385002093840096BBB09B8B -:107E4000FECF1D9AA8958150A9F7DD24D394A5E013 -:107E5000EA2EF1E1FF2EA4D0813421F481E0BED0DE -:107E600083E024C0823411F484E103C0853419F422 -:107E700085E0B4D08AC08535A1F492D0082F10E0F7 -:107E800010930102009300028BD090E0982F882776 -:107E9000802B912B880F991F9093010280930002F1 -:107EA00073C0863529F484E099D080E071D06DC02C -:107EB000843609F043C07CD0E0910002F0910102C9 -:107EC00083E080935700E895C0E0D1E069D08993C2 -:107ED000809102028150809302028823B9F778D002 -:107EE00007B600FCFDCF4091000250910102A0E0D6 -:107EF000B1E02C9130E011968C91119790E0982F81 -:107F00008827822B932B1296FA010C01D0925700EE -:107F1000E89511244E5F5F4FF1E0A038BF0749F7A5 -:107F2000E0910002F0910102E0925700E89507B657 -:107F300000FCFDCFF0925700E89527C08437B9F4D4 -:107F400037D046D0E0910002F09101023196F093D3 -:107F50000102E09300023197E4918E2F19D08091B5 -:107F60000202815080930202882361F70EC0853798 -:107F700039F42ED08EE10CD085E90AD08FE096CF6F -:107F8000813511F488E019D023D080E101D063CF8E -:107F9000982F8091C00085FFFCCF9093C600089574 -:107FA000A8958091C00087FFFCCF8091C6000895FE -:107FB000F7DFF6DF80930202F3CFE0E6F0E098E12E -:107FC00090838083089580E0F8DFEE27FF270994EF -:107FD000E7DF803209F0F7DF84E1DACF1F93182F53 -:0C7FE000DFDF1150E9F7F4DF1F91089576 -:0400000300007E007B -:00000001FF diff --git a/build/linux/work/hardware/arduino/bootloaders/optiboot/optiboot_atmega328.hex b/build/linux/work/hardware/arduino/bootloaders/optiboot/optiboot_atmega328.hex deleted file mode 100644 index a219f0833..000000000 --- a/build/linux/work/hardware/arduino/bootloaders/optiboot/optiboot_atmega328.hex +++ /dev/null @@ -1,35 +0,0 @@ -:107E0000112484B714BE81FFF0D085E080938100F7 -:107E100082E08093C00088E18093C10086E0809377 -:107E2000C20080E18093C4008EE0C9D0259A86E02C -:107E300020E33CEF91E0309385002093840096BBD3 -:107E4000B09BFECF1D9AA8958150A9F7CC24DD24C4 -:107E500088248394B5E0AB2EA1E19A2EF3E0BF2EE7 -:107E6000A2D0813461F49FD0082FAFD0023811F036 -:107E7000013811F484E001C083E08DD089C08234E0 -:107E800011F484E103C0853419F485E0A6D080C0E4 -:107E9000853579F488D0E82EFF2485D0082F10E0AE -:107EA000102F00270E291F29000F111F8ED06801E7 -:107EB0006FC0863521F484E090D080E0DECF843638 -:107EC00009F040C070D06FD0082F6DD080E0C81688 -:107ED00080E7D80618F4F601B7BEE895C0E0D1E017 -:107EE00062D089930C17E1F7F0E0CF16F0E7DF06D8 -:107EF00018F0F601B7BEE89568D007B600FCFDCFD4 -:107F0000A601A0E0B1E02C9130E011968C91119780 -:107F100090E0982F8827822B932B1296FA010C0160 -:107F200087BEE89511244E5F5F4FF1E0A038BF0790 -:107F300051F7F601A7BEE89507B600FCFDCF97BE46 -:107F4000E89526C08437B1F42ED02DD0F82E2BD052 -:107F50003CD0F601EF2C8F010F5F1F4F84911BD097 -:107F6000EA94F801C1F70894C11CD11CFA94CF0C13 -:107F7000D11C0EC0853739F428D08EE10CD085E9AC -:107F80000AD08FE07ACF813511F488E018D01DD067 -:107F900080E101D065CF982F8091C00085FFFCCF94 -:107FA0009093C60008958091C00087FFFCCF809118 -:107FB000C00084FD01C0A8958091C6000895E0E648 -:107FC000F0E098E1908380830895EDDF803219F02E -:107FD00088E0F5DFFFCF84E1DECF1F93182FE3DFCA -:107FE0001150E9F7F2DF1F91089580E0E8DFEE27F6 -:047FF000FF270994CA -:027FFE00040479 -:0400000300007E007B -:00000001FF diff --git a/build/linux/work/hardware/arduino/bootloaders/optiboot/optiboot_atmega328.lst b/build/linux/work/hardware/arduino/bootloaders/optiboot/optiboot_atmega328.lst deleted file mode 100644 index d9dd4cc20..000000000 --- a/build/linux/work/hardware/arduino/bootloaders/optiboot/optiboot_atmega328.lst +++ /dev/null @@ -1,598 +0,0 @@ - -optiboot_atmega328.elf: file format elf32-avr - -Sections: -Idx Name Size VMA LMA File off Algn - 0 .text 000001f4 00007e00 00007e00 00000054 2**1 - CONTENTS, ALLOC, LOAD, READONLY, CODE - 1 .version 00000002 00007ffe 00007ffe 00000248 2**0 - CONTENTS, READONLY - 2 .debug_aranges 00000028 00000000 00000000 0000024a 2**0 - CONTENTS, READONLY, DEBUGGING - 3 .debug_pubnames 0000005f 00000000 00000000 00000272 2**0 - CONTENTS, READONLY, DEBUGGING - 4 .debug_info 000002a8 00000000 00000000 000002d1 2**0 - CONTENTS, READONLY, DEBUGGING - 5 .debug_abbrev 00000178 00000000 00000000 00000579 2**0 - CONTENTS, READONLY, DEBUGGING - 6 .debug_line 00000488 00000000 00000000 000006f1 2**0 - CONTENTS, READONLY, DEBUGGING - 7 .debug_frame 00000080 00000000 00000000 00000b7c 2**2 - CONTENTS, READONLY, DEBUGGING - 8 .debug_str 0000014f 00000000 00000000 00000bfc 2**0 - CONTENTS, READONLY, DEBUGGING - 9 .debug_loc 000002d8 00000000 00000000 00000d4b 2**0 - CONTENTS, READONLY, DEBUGGING - 10 .debug_ranges 00000078 00000000 00000000 00001023 2**0 - CONTENTS, READONLY, DEBUGGING - -Disassembly of section .text: - -00007e00
    : -#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4)) -#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6)) -#endif - -/* main program starts here */ -int main(void) { - 7e00: 11 24 eor r1, r1 -#ifdef __AVR_ATmega8__ - SP=RAMEND; // This is done by hardware reset -#endif - - // Adaboot no-wait mod - ch = MCUSR; - 7e02: 84 b7 in r24, 0x34 ; 52 - MCUSR = 0; - 7e04: 14 be out 0x34, r1 ; 52 - if (!(ch & _BV(EXTRF))) appStart(); - 7e06: 81 ff sbrs r24, 1 - 7e08: f0 d0 rcall .+480 ; 0x7fea - -#if LED_START_FLASHES > 0 - // Set up Timer 1 for timeout counter - TCCR1B = _BV(CS12) | _BV(CS10); // div 1024 - 7e0a: 85 e0 ldi r24, 0x05 ; 5 - 7e0c: 80 93 81 00 sts 0x0081, r24 - UCSRA = _BV(U2X); //Double speed mode USART - UCSRB = _BV(RXEN) | _BV(TXEN); // enable Rx & Tx - UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); // config USART; 8N1 - UBRRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); -#else - UCSR0A = _BV(U2X0); //Double speed mode USART0 - 7e10: 82 e0 ldi r24, 0x02 ; 2 - 7e12: 80 93 c0 00 sts 0x00C0, r24 - UCSR0B = _BV(RXEN0) | _BV(TXEN0); - 7e16: 88 e1 ldi r24, 0x18 ; 24 - 7e18: 80 93 c1 00 sts 0x00C1, r24 - UCSR0C = _BV(UCSZ00) | _BV(UCSZ01); - 7e1c: 86 e0 ldi r24, 0x06 ; 6 - 7e1e: 80 93 c2 00 sts 0x00C2, r24 - UBRR0L = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); - 7e22: 80 e1 ldi r24, 0x10 ; 16 - 7e24: 80 93 c4 00 sts 0x00C4, r24 -#endif -#endif - - // Set up watchdog to trigger after 500ms - watchdogConfig(WATCHDOG_1S); - 7e28: 8e e0 ldi r24, 0x0E ; 14 - 7e2a: c9 d0 rcall .+402 ; 0x7fbe - - /* Set LED pin as output */ - LED_DDR |= _BV(LED); - 7e2c: 25 9a sbi 0x04, 5 ; 4 - 7e2e: 86 e0 ldi r24, 0x06 ; 6 -} - -#if LED_START_FLASHES > 0 -void flash_led(uint8_t count) { - do { - TCNT1 = -(F_CPU/(1024*16)); - 7e30: 20 e3 ldi r18, 0x30 ; 48 - 7e32: 3c ef ldi r19, 0xFC ; 252 - TIFR1 = _BV(TOV1); - 7e34: 91 e0 ldi r25, 0x01 ; 1 -} - -#if LED_START_FLASHES > 0 -void flash_led(uint8_t count) { - do { - TCNT1 = -(F_CPU/(1024*16)); - 7e36: 30 93 85 00 sts 0x0085, r19 - 7e3a: 20 93 84 00 sts 0x0084, r18 - TIFR1 = _BV(TOV1); - 7e3e: 96 bb out 0x16, r25 ; 22 - while(!(TIFR1 & _BV(TOV1))); - 7e40: b0 9b sbis 0x16, 0 ; 22 - 7e42: fe cf rjmp .-4 ; 0x7e40 -#ifdef __AVR_ATmega8__ - LED_PORT ^= _BV(LED); -#else - LED_PIN |= _BV(LED); - 7e44: 1d 9a sbi 0x03, 5 ; 3 -} -#endif - -// Watchdog functions. These are only safe with interrupts turned off. -void watchdogReset() { - __asm__ __volatile__ ( - 7e46: a8 95 wdr - LED_PORT ^= _BV(LED); -#else - LED_PIN |= _BV(LED); -#endif - watchdogReset(); - } while (--count); - 7e48: 81 50 subi r24, 0x01 ; 1 - 7e4a: a9 f7 brne .-22 ; 0x7e36 - 7e4c: cc 24 eor r12, r12 - 7e4e: dd 24 eor r13, r13 - ch = SPM_PAGESIZE / 2; - do { - uint16_t a; - a = *bufPtr++; - a |= (*bufPtr++) << 8; - __boot_page_fill_short((uint16_t)(void*)addrPtr,a); - 7e50: 88 24 eor r8, r8 - 7e52: 83 94 inc r8 - addrPtr += 2; - } while (--ch); - - // Write from programming buffer - __boot_page_write_short((uint16_t)(void*)address); - 7e54: b5 e0 ldi r27, 0x05 ; 5 - 7e56: ab 2e mov r10, r27 - boot_spm_busy_wait(); - -#if defined(RWWSRE) - // Reenable read access to flash - boot_rww_enable(); - 7e58: a1 e1 ldi r26, 0x11 ; 17 - 7e5a: 9a 2e mov r9, r26 - do *bufPtr++ = getch(); - while (--length); - - // If we are in NRWW section, page erase has to be delayed until now. - // Todo: Take RAMPZ into account - if (address >= NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address); - 7e5c: f3 e0 ldi r31, 0x03 ; 3 - 7e5e: bf 2e mov r11, r31 -#endif - - /* Forever loop */ - for (;;) { - /* get character from UART */ - ch = getch(); - 7e60: a2 d0 rcall .+324 ; 0x7fa6 - - if(ch == STK_GET_PARAMETER) { - 7e62: 81 34 cpi r24, 0x41 ; 65 - 7e64: 61 f4 brne .+24 ; 0x7e7e - unsigned char which = getch(); - 7e66: 9f d0 rcall .+318 ; 0x7fa6 - 7e68: 08 2f mov r16, r24 - verifySpace(); - 7e6a: af d0 rcall .+350 ; 0x7fca - if (which == 0x82) { - 7e6c: 02 38 cpi r16, 0x82 ; 130 - 7e6e: 11 f0 breq .+4 ; 0x7e74 - /* - * Send optiboot version as "minor SW version" - */ - putch(OPTIBOOT_MINVER); - } else if (which == 0x81) { - 7e70: 01 38 cpi r16, 0x81 ; 129 - 7e72: 11 f4 brne .+4 ; 0x7e78 - putch(OPTIBOOT_MAJVER); - 7e74: 84 e0 ldi r24, 0x04 ; 4 - 7e76: 01 c0 rjmp .+2 ; 0x7e7a - } else { - /* - * GET PARAMETER returns a generic 0x03 reply for - * other parameters - enough to keep Avrdude happy - */ - putch(0x03); - 7e78: 83 e0 ldi r24, 0x03 ; 3 - 7e7a: 8d d0 rcall .+282 ; 0x7f96 - 7e7c: 89 c0 rjmp .+274 ; 0x7f90 - } - } - else if(ch == STK_SET_DEVICE) { - 7e7e: 82 34 cpi r24, 0x42 ; 66 - 7e80: 11 f4 brne .+4 ; 0x7e86 - // SET DEVICE is ignored - getNch(20); - 7e82: 84 e1 ldi r24, 0x14 ; 20 - 7e84: 03 c0 rjmp .+6 ; 0x7e8c - } - else if(ch == STK_SET_DEVICE_EXT) { - 7e86: 85 34 cpi r24, 0x45 ; 69 - 7e88: 19 f4 brne .+6 ; 0x7e90 - // SET DEVICE EXT is ignored - getNch(5); - 7e8a: 85 e0 ldi r24, 0x05 ; 5 - 7e8c: a6 d0 rcall .+332 ; 0x7fda - 7e8e: 80 c0 rjmp .+256 ; 0x7f90 - } - else if(ch == STK_LOAD_ADDRESS) { - 7e90: 85 35 cpi r24, 0x55 ; 85 - 7e92: 79 f4 brne .+30 ; 0x7eb2 - // LOAD ADDRESS - uint16_t newAddress; - newAddress = getch(); - 7e94: 88 d0 rcall .+272 ; 0x7fa6 - newAddress = (newAddress & 0xff) | (getch() << 8); - 7e96: e8 2e mov r14, r24 - 7e98: ff 24 eor r15, r15 - 7e9a: 85 d0 rcall .+266 ; 0x7fa6 - 7e9c: 08 2f mov r16, r24 - 7e9e: 10 e0 ldi r17, 0x00 ; 0 - 7ea0: 10 2f mov r17, r16 - 7ea2: 00 27 eor r16, r16 - 7ea4: 0e 29 or r16, r14 - 7ea6: 1f 29 or r17, r15 -#ifdef RAMPZ - // Transfer top bit to RAMPZ - RAMPZ = (newAddress & 0x8000) ? 1 : 0; -#endif - newAddress += newAddress; // Convert from word address to byte address - 7ea8: 00 0f add r16, r16 - 7eaa: 11 1f adc r17, r17 - address = newAddress; - verifySpace(); - 7eac: 8e d0 rcall .+284 ; 0x7fca - 7eae: 68 01 movw r12, r16 - 7eb0: 6f c0 rjmp .+222 ; 0x7f90 - } - else if(ch == STK_UNIVERSAL) { - 7eb2: 86 35 cpi r24, 0x56 ; 86 - 7eb4: 21 f4 brne .+8 ; 0x7ebe - // UNIVERSAL command is ignored - getNch(4); - 7eb6: 84 e0 ldi r24, 0x04 ; 4 - 7eb8: 90 d0 rcall .+288 ; 0x7fda - putch(0x00); - 7eba: 80 e0 ldi r24, 0x00 ; 0 - 7ebc: de cf rjmp .-68 ; 0x7e7a - } - /* Write memory, length is big endian and is in bytes */ - else if(ch == STK_PROG_PAGE) { - 7ebe: 84 36 cpi r24, 0x64 ; 100 - 7ec0: 09 f0 breq .+2 ; 0x7ec4 - 7ec2: 40 c0 rjmp .+128 ; 0x7f44 - // PROGRAM PAGE - we support flash programming only, not EEPROM - uint8_t *bufPtr; - uint16_t addrPtr; - - getch(); /* getlen() */ - 7ec4: 70 d0 rcall .+224 ; 0x7fa6 - length = getch(); - 7ec6: 6f d0 rcall .+222 ; 0x7fa6 - 7ec8: 08 2f mov r16, r24 - getch(); - 7eca: 6d d0 rcall .+218 ; 0x7fa6 - - // If we are in RWW section, immediately start page erase - if (address < NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address); - 7ecc: 80 e0 ldi r24, 0x00 ; 0 - 7ece: c8 16 cp r12, r24 - 7ed0: 80 e7 ldi r24, 0x70 ; 112 - 7ed2: d8 06 cpc r13, r24 - 7ed4: 18 f4 brcc .+6 ; 0x7edc - 7ed6: f6 01 movw r30, r12 - 7ed8: b7 be out 0x37, r11 ; 55 - 7eda: e8 95 spm - 7edc: c0 e0 ldi r28, 0x00 ; 0 - 7ede: d1 e0 ldi r29, 0x01 ; 1 - - // While that is going on, read in page contents - bufPtr = buff; - do *bufPtr++ = getch(); - 7ee0: 62 d0 rcall .+196 ; 0x7fa6 - 7ee2: 89 93 st Y+, r24 - while (--length); - 7ee4: 0c 17 cp r16, r28 - 7ee6: e1 f7 brne .-8 ; 0x7ee0 - - // If we are in NRWW section, page erase has to be delayed until now. - // Todo: Take RAMPZ into account - if (address >= NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address); - 7ee8: f0 e0 ldi r31, 0x00 ; 0 - 7eea: cf 16 cp r12, r31 - 7eec: f0 e7 ldi r31, 0x70 ; 112 - 7eee: df 06 cpc r13, r31 - 7ef0: 18 f0 brcs .+6 ; 0x7ef8 - 7ef2: f6 01 movw r30, r12 - 7ef4: b7 be out 0x37, r11 ; 55 - 7ef6: e8 95 spm - - // Read command terminator, start reply - verifySpace(); - 7ef8: 68 d0 rcall .+208 ; 0x7fca - - // If only a partial page is to be programmed, the erase might not be complete. - // So check that here - boot_spm_busy_wait(); - 7efa: 07 b6 in r0, 0x37 ; 55 - 7efc: 00 fc sbrc r0, 0 - 7efe: fd cf rjmp .-6 ; 0x7efa - 7f00: a6 01 movw r20, r12 - 7f02: a0 e0 ldi r26, 0x00 ; 0 - 7f04: b1 e0 ldi r27, 0x01 ; 1 - bufPtr = buff; - addrPtr = (uint16_t)(void*)address; - ch = SPM_PAGESIZE / 2; - do { - uint16_t a; - a = *bufPtr++; - 7f06: 2c 91 ld r18, X - 7f08: 30 e0 ldi r19, 0x00 ; 0 - a |= (*bufPtr++) << 8; - 7f0a: 11 96 adiw r26, 0x01 ; 1 - 7f0c: 8c 91 ld r24, X - 7f0e: 11 97 sbiw r26, 0x01 ; 1 - 7f10: 90 e0 ldi r25, 0x00 ; 0 - 7f12: 98 2f mov r25, r24 - 7f14: 88 27 eor r24, r24 - 7f16: 82 2b or r24, r18 - 7f18: 93 2b or r25, r19 -#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4)) -#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6)) -#endif - -/* main program starts here */ -int main(void) { - 7f1a: 12 96 adiw r26, 0x02 ; 2 - ch = SPM_PAGESIZE / 2; - do { - uint16_t a; - a = *bufPtr++; - a |= (*bufPtr++) << 8; - __boot_page_fill_short((uint16_t)(void*)addrPtr,a); - 7f1c: fa 01 movw r30, r20 - 7f1e: 0c 01 movw r0, r24 - 7f20: 87 be out 0x37, r8 ; 55 - 7f22: e8 95 spm - 7f24: 11 24 eor r1, r1 - addrPtr += 2; - 7f26: 4e 5f subi r20, 0xFE ; 254 - 7f28: 5f 4f sbci r21, 0xFF ; 255 - } while (--ch); - 7f2a: f1 e0 ldi r31, 0x01 ; 1 - 7f2c: a0 38 cpi r26, 0x80 ; 128 - 7f2e: bf 07 cpc r27, r31 - 7f30: 51 f7 brne .-44 ; 0x7f06 - - // Write from programming buffer - __boot_page_write_short((uint16_t)(void*)address); - 7f32: f6 01 movw r30, r12 - 7f34: a7 be out 0x37, r10 ; 55 - 7f36: e8 95 spm - boot_spm_busy_wait(); - 7f38: 07 b6 in r0, 0x37 ; 55 - 7f3a: 00 fc sbrc r0, 0 - 7f3c: fd cf rjmp .-6 ; 0x7f38 - -#if defined(RWWSRE) - // Reenable read access to flash - boot_rww_enable(); - 7f3e: 97 be out 0x37, r9 ; 55 - 7f40: e8 95 spm - 7f42: 26 c0 rjmp .+76 ; 0x7f90 -#endif - - } - /* Read memory block mode, length is big endian. */ - else if(ch == STK_READ_PAGE) { - 7f44: 84 37 cpi r24, 0x74 ; 116 - 7f46: b1 f4 brne .+44 ; 0x7f74 - // READ PAGE - we only read flash - getch(); /* getlen() */ - 7f48: 2e d0 rcall .+92 ; 0x7fa6 - length = getch(); - 7f4a: 2d d0 rcall .+90 ; 0x7fa6 - 7f4c: f8 2e mov r15, r24 - getch(); - 7f4e: 2b d0 rcall .+86 ; 0x7fa6 - - verifySpace(); - 7f50: 3c d0 rcall .+120 ; 0x7fca - 7f52: f6 01 movw r30, r12 - 7f54: ef 2c mov r14, r15 - putch(result); - address++; - } - while (--length); -#else - do putch(pgm_read_byte_near(address++)); - 7f56: 8f 01 movw r16, r30 - 7f58: 0f 5f subi r16, 0xFF ; 255 - 7f5a: 1f 4f sbci r17, 0xFF ; 255 - 7f5c: 84 91 lpm r24, Z+ - 7f5e: 1b d0 rcall .+54 ; 0x7f96 - while (--length); - 7f60: ea 94 dec r14 - 7f62: f8 01 movw r30, r16 - 7f64: c1 f7 brne .-16 ; 0x7f56 -#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4)) -#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6)) -#endif - -/* main program starts here */ -int main(void) { - 7f66: 08 94 sec - 7f68: c1 1c adc r12, r1 - 7f6a: d1 1c adc r13, r1 - 7f6c: fa 94 dec r15 - 7f6e: cf 0c add r12, r15 - 7f70: d1 1c adc r13, r1 - 7f72: 0e c0 rjmp .+28 ; 0x7f90 -#endif -#endif - } - - /* Get device signature bytes */ - else if(ch == STK_READ_SIGN) { - 7f74: 85 37 cpi r24, 0x75 ; 117 - 7f76: 39 f4 brne .+14 ; 0x7f86 - // READ SIGN - return what Avrdude wants to hear - verifySpace(); - 7f78: 28 d0 rcall .+80 ; 0x7fca - putch(SIGNATURE_0); - 7f7a: 8e e1 ldi r24, 0x1E ; 30 - 7f7c: 0c d0 rcall .+24 ; 0x7f96 - putch(SIGNATURE_1); - 7f7e: 85 e9 ldi r24, 0x95 ; 149 - 7f80: 0a d0 rcall .+20 ; 0x7f96 - putch(SIGNATURE_2); - 7f82: 8f e0 ldi r24, 0x0F ; 15 - 7f84: 7a cf rjmp .-268 ; 0x7e7a - } - else if (ch == 'Q') { - 7f86: 81 35 cpi r24, 0x51 ; 81 - 7f88: 11 f4 brne .+4 ; 0x7f8e - // Adaboot no-wait mod - watchdogConfig(WATCHDOG_16MS); - 7f8a: 88 e0 ldi r24, 0x08 ; 8 - 7f8c: 18 d0 rcall .+48 ; 0x7fbe - verifySpace(); - } - else { - // This covers the response to commands like STK_ENTER_PROGMODE - verifySpace(); - 7f8e: 1d d0 rcall .+58 ; 0x7fca - } - putch(STK_OK); - 7f90: 80 e1 ldi r24, 0x10 ; 16 - 7f92: 01 d0 rcall .+2 ; 0x7f96 - 7f94: 65 cf rjmp .-310 ; 0x7e60 - -00007f96 : - } -} - -void putch(char ch) { - 7f96: 98 2f mov r25, r24 -#ifndef SOFT_UART - while (!(UCSR0A & _BV(UDRE0))); - 7f98: 80 91 c0 00 lds r24, 0x00C0 - 7f9c: 85 ff sbrs r24, 5 - 7f9e: fc cf rjmp .-8 ; 0x7f98 - UDR0 = ch; - 7fa0: 90 93 c6 00 sts 0x00C6, r25 - [uartBit] "I" (UART_TX_BIT) - : - "r25" - ); -#endif -} - 7fa4: 08 95 ret - -00007fa6 : - [uartBit] "I" (UART_RX_BIT) - : - "r25" -); -#else - while(!(UCSR0A & _BV(RXC0))) - 7fa6: 80 91 c0 00 lds r24, 0x00C0 - 7faa: 87 ff sbrs r24, 7 - 7fac: fc cf rjmp .-8 ; 0x7fa6 - ; - if (!(UCSR0A & _BV(FE0))) { - 7fae: 80 91 c0 00 lds r24, 0x00C0 - 7fb2: 84 fd sbrc r24, 4 - 7fb4: 01 c0 rjmp .+2 ; 0x7fb8 -} -#endif - -// Watchdog functions. These are only safe with interrupts turned off. -void watchdogReset() { - __asm__ __volatile__ ( - 7fb6: a8 95 wdr - * don't care that an invalid char is returned...) - */ - watchdogReset(); - } - - ch = UDR0; - 7fb8: 80 91 c6 00 lds r24, 0x00C6 - LED_PIN |= _BV(LED); -#endif -#endif - - return ch; -} - 7fbc: 08 95 ret - -00007fbe : - "wdr\n" - ); -} - -void watchdogConfig(uint8_t x) { - WDTCSR = _BV(WDCE) | _BV(WDE); - 7fbe: e0 e6 ldi r30, 0x60 ; 96 - 7fc0: f0 e0 ldi r31, 0x00 ; 0 - 7fc2: 98 e1 ldi r25, 0x18 ; 24 - 7fc4: 90 83 st Z, r25 - WDTCSR = x; - 7fc6: 80 83 st Z, r24 -} - 7fc8: 08 95 ret - -00007fca : - do getch(); while (--count); - verifySpace(); -} - -void verifySpace() { - if (getch() != CRC_EOP) { - 7fca: ed df rcall .-38 ; 0x7fa6 - 7fcc: 80 32 cpi r24, 0x20 ; 32 - 7fce: 19 f0 breq .+6 ; 0x7fd6 - watchdogConfig(WATCHDOG_16MS); // shorten WD timeout - 7fd0: 88 e0 ldi r24, 0x08 ; 8 - 7fd2: f5 df rcall .-22 ; 0x7fbe - 7fd4: ff cf rjmp .-2 ; 0x7fd4 - while (1) // and busy-loop so that WD causes - ; // a reset and app start. - } - putch(STK_INSYNC); - 7fd6: 84 e1 ldi r24, 0x14 ; 20 -} - 7fd8: de cf rjmp .-68 ; 0x7f96 - -00007fda : - ::[count] "M" (UART_B_VALUE) - ); -} -#endif - -void getNch(uint8_t count) { - 7fda: 1f 93 push r17 - 7fdc: 18 2f mov r17, r24 - do getch(); while (--count); - 7fde: e3 df rcall .-58 ; 0x7fa6 - 7fe0: 11 50 subi r17, 0x01 ; 1 - 7fe2: e9 f7 brne .-6 ; 0x7fde - verifySpace(); - 7fe4: f2 df rcall .-28 ; 0x7fca -} - 7fe6: 1f 91 pop r17 - 7fe8: 08 95 ret - -00007fea : - WDTCSR = _BV(WDCE) | _BV(WDE); - WDTCSR = x; -} - -void appStart() { - watchdogConfig(WATCHDOG_OFF); - 7fea: 80 e0 ldi r24, 0x00 ; 0 - 7fec: e8 df rcall .-48 ; 0x7fbe - __asm__ __volatile__ ( - 7fee: ee 27 eor r30, r30 - 7ff0: ff 27 eor r31, r31 - 7ff2: 09 94 ijmp diff --git a/build/linux/work/hardware/arduino/bootloaders/optiboot/optiboot_atmega8.hex b/build/linux/work/hardware/arduino/bootloaders/optiboot/optiboot_atmega8.hex deleted file mode 100644 index b04f27685..000000000 --- a/build/linux/work/hardware/arduino/bootloaders/optiboot/optiboot_atmega8.hex +++ /dev/null @@ -1,33 +0,0 @@ -:101E000011248FE594E09EBF8DBF84B714BE81FF7F -:101E1000E2D085E08EBD82E08BB988E18AB986E8A0 -:101E200080BD80E189B98EE0C2D0BD9A96E020E302 -:101E30003CEF54E040E23DBD2CBD58BF08B602FE69 -:101E4000FDCF88B3842788BBA8959150A1F7CC24F7 -:101E5000DD2488248394B5E0AB2EA1E19A2EF3E033 -:101E6000BF2E9ED0813461F49BD0082FA4D00238BD -:101E700011F0013811F484E001C083E08DD089C0F5 -:101E8000823411F484E103C0853419F485E09BD0D9 -:101E900080C0853579F484D0E82EFF2481D0082FC6 -:101EA00010E0102F00270E291F29000F111F83D0CB -:101EB00068016FC0863521F484E085D080E0DECFF4 -:101EC000843609F040C06CD06BD0082F69D080E018 -:101ED000C81688E1D80618F4F601B7BEE895C0E048 -:101EE000D1E05ED089930C17E1F7F0E0CF16F8E16E -:101EF000DF0618F0F601B7BEE8955DD007B600FC26 -:101F0000FDCFA601A0E0B1E02C9130E011968C91BC -:101F1000119790E0982F8827822B932B1296FA0125 -:101F20000C0187BEE89511244E5F5F4FF1E0A034AD -:101F3000BF0751F7F601A7BEE89507B600FCFDCF35 -:101F400097BEE89526C08437B1F42AD029D0F82E60 -:101F500027D031D0F601EF2C8F010F5F1F4F8491F6 -:101F60001BD0EA94F801C1F70894C11CD11CFA9463 -:101F7000CF0CD11C0EC0853739F41DD08EE10CD0AA -:101F800083E90AD087E07ACF813511F488E00FD059 -:101F900012D080E101D065CF5D9BFECF8CB9089552 -:101FA0005F9BFECF5C9901C0A8958CB1089598E124 -:101FB00091BD81BD0895F4DF803219F088E0F7DF2C -:101FC000FFCF84E1E9CF1F93182FEADF1150E9F723 -:101FD000F2DF1F91089580E0EADFEE27FF270994E2 -:021FFE000404D9 -:0400000300001E00DB -:00000001FF diff --git a/build/linux/work/hardware/arduino/bootloaders/optiboot/optiboot_atmega8.lst b/build/linux/work/hardware/arduino/bootloaders/optiboot/optiboot_atmega8.lst deleted file mode 100644 index d92189582..000000000 --- a/build/linux/work/hardware/arduino/bootloaders/optiboot/optiboot_atmega8.lst +++ /dev/null @@ -1,604 +0,0 @@ - -optiboot_atmega8.elf: file format elf32-avr - -Sections: -Idx Name Size VMA LMA File off Algn - 0 .text 000001e0 00001e00 00001e00 00000054 2**1 - CONTENTS, ALLOC, LOAD, READONLY, CODE - 1 .version 00000002 00001ffe 00001ffe 00000234 2**0 - CONTENTS, READONLY - 2 .debug_aranges 00000028 00000000 00000000 00000236 2**0 - CONTENTS, READONLY, DEBUGGING - 3 .debug_pubnames 0000005f 00000000 00000000 0000025e 2**0 - CONTENTS, READONLY, DEBUGGING - 4 .debug_info 000002a6 00000000 00000000 000002bd 2**0 - CONTENTS, READONLY, DEBUGGING - 5 .debug_abbrev 00000169 00000000 00000000 00000563 2**0 - CONTENTS, READONLY, DEBUGGING - 6 .debug_line 00000498 00000000 00000000 000006cc 2**0 - CONTENTS, READONLY, DEBUGGING - 7 .debug_frame 00000080 00000000 00000000 00000b64 2**2 - CONTENTS, READONLY, DEBUGGING - 8 .debug_str 0000014f 00000000 00000000 00000be4 2**0 - CONTENTS, READONLY, DEBUGGING - 9 .debug_loc 000002ba 00000000 00000000 00000d33 2**0 - CONTENTS, READONLY, DEBUGGING - 10 .debug_ranges 00000078 00000000 00000000 00000fed 2**0 - CONTENTS, READONLY, DEBUGGING - -Disassembly of section .text: - -00001e00
    : -#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4)) -#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6)) -#endif - -/* main program starts here */ -int main(void) { - 1e00: 11 24 eor r1, r1 - // - // If not, uncomment the following instructions: - // cli(); - asm volatile ("clr __zero_reg__"); -#ifdef __AVR_ATmega8__ - SP=RAMEND; // This is done by hardware reset - 1e02: 8f e5 ldi r24, 0x5F ; 95 - 1e04: 94 e0 ldi r25, 0x04 ; 4 - 1e06: 9e bf out 0x3e, r25 ; 62 - 1e08: 8d bf out 0x3d, r24 ; 61 -#endif - - // Adaboot no-wait mod - ch = MCUSR; - 1e0a: 84 b7 in r24, 0x34 ; 52 - MCUSR = 0; - 1e0c: 14 be out 0x34, r1 ; 52 - if (!(ch & _BV(EXTRF))) appStart(); - 1e0e: 81 ff sbrs r24, 1 - 1e10: e2 d0 rcall .+452 ; 0x1fd6 - -#if LED_START_FLASHES > 0 - // Set up Timer 1 for timeout counter - TCCR1B = _BV(CS12) | _BV(CS10); // div 1024 - 1e12: 85 e0 ldi r24, 0x05 ; 5 - 1e14: 8e bd out 0x2e, r24 ; 46 -#endif -#ifndef SOFT_UART -#ifdef __AVR_ATmega8__ - UCSRA = _BV(U2X); //Double speed mode USART - 1e16: 82 e0 ldi r24, 0x02 ; 2 - 1e18: 8b b9 out 0x0b, r24 ; 11 - UCSRB = _BV(RXEN) | _BV(TXEN); // enable Rx & Tx - 1e1a: 88 e1 ldi r24, 0x18 ; 24 - 1e1c: 8a b9 out 0x0a, r24 ; 10 - UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); // config USART; 8N1 - 1e1e: 86 e8 ldi r24, 0x86 ; 134 - 1e20: 80 bd out 0x20, r24 ; 32 - UBRRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); - 1e22: 80 e1 ldi r24, 0x10 ; 16 - 1e24: 89 b9 out 0x09, r24 ; 9 - UBRR0L = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 ); -#endif -#endif - - // Set up watchdog to trigger after 500ms - watchdogConfig(WATCHDOG_1S); - 1e26: 8e e0 ldi r24, 0x0E ; 14 - 1e28: c2 d0 rcall .+388 ; 0x1fae - - /* Set LED pin as output */ - LED_DDR |= _BV(LED); - 1e2a: bd 9a sbi 0x17, 5 ; 23 - 1e2c: 96 e0 ldi r25, 0x06 ; 6 -} - -#if LED_START_FLASHES > 0 -void flash_led(uint8_t count) { - do { - TCNT1 = -(F_CPU/(1024*16)); - 1e2e: 20 e3 ldi r18, 0x30 ; 48 - 1e30: 3c ef ldi r19, 0xFC ; 252 - TIFR1 = _BV(TOV1); - 1e32: 54 e0 ldi r21, 0x04 ; 4 - while(!(TIFR1 & _BV(TOV1))); -#ifdef __AVR_ATmega8__ - LED_PORT ^= _BV(LED); - 1e34: 40 e2 ldi r20, 0x20 ; 32 -} - -#if LED_START_FLASHES > 0 -void flash_led(uint8_t count) { - do { - TCNT1 = -(F_CPU/(1024*16)); - 1e36: 3d bd out 0x2d, r19 ; 45 - 1e38: 2c bd out 0x2c, r18 ; 44 - TIFR1 = _BV(TOV1); - 1e3a: 58 bf out 0x38, r21 ; 56 - while(!(TIFR1 & _BV(TOV1))); - 1e3c: 08 b6 in r0, 0x38 ; 56 - 1e3e: 02 fe sbrs r0, 2 - 1e40: fd cf rjmp .-6 ; 0x1e3c -#ifdef __AVR_ATmega8__ - LED_PORT ^= _BV(LED); - 1e42: 88 b3 in r24, 0x18 ; 24 - 1e44: 84 27 eor r24, r20 - 1e46: 88 bb out 0x18, r24 ; 24 -} -#endif - -// Watchdog functions. These are only safe with interrupts turned off. -void watchdogReset() { - __asm__ __volatile__ ( - 1e48: a8 95 wdr - LED_PORT ^= _BV(LED); -#else - LED_PIN |= _BV(LED); -#endif - watchdogReset(); - } while (--count); - 1e4a: 91 50 subi r25, 0x01 ; 1 - 1e4c: a1 f7 brne .-24 ; 0x1e36 - 1e4e: cc 24 eor r12, r12 - 1e50: dd 24 eor r13, r13 - ch = SPM_PAGESIZE / 2; - do { - uint16_t a; - a = *bufPtr++; - a |= (*bufPtr++) << 8; - __boot_page_fill_short((uint16_t)(void*)addrPtr,a); - 1e52: 88 24 eor r8, r8 - 1e54: 83 94 inc r8 - addrPtr += 2; - } while (--ch); - - // Write from programming buffer - __boot_page_write_short((uint16_t)(void*)address); - 1e56: b5 e0 ldi r27, 0x05 ; 5 - 1e58: ab 2e mov r10, r27 - boot_spm_busy_wait(); - -#if defined(RWWSRE) - // Reenable read access to flash - boot_rww_enable(); - 1e5a: a1 e1 ldi r26, 0x11 ; 17 - 1e5c: 9a 2e mov r9, r26 - do *bufPtr++ = getch(); - while (--length); - - // If we are in NRWW section, page erase has to be delayed until now. - // Todo: Take RAMPZ into account - if (address >= NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address); - 1e5e: f3 e0 ldi r31, 0x03 ; 3 - 1e60: bf 2e mov r11, r31 -#endif - - /* Forever loop */ - for (;;) { - /* get character from UART */ - ch = getch(); - 1e62: 9e d0 rcall .+316 ; 0x1fa0 - - if(ch == STK_GET_PARAMETER) { - 1e64: 81 34 cpi r24, 0x41 ; 65 - 1e66: 61 f4 brne .+24 ; 0x1e80 - unsigned char which = getch(); - 1e68: 9b d0 rcall .+310 ; 0x1fa0 - 1e6a: 08 2f mov r16, r24 - verifySpace(); - 1e6c: a4 d0 rcall .+328 ; 0x1fb6 - if (which == 0x82) { - 1e6e: 02 38 cpi r16, 0x82 ; 130 - 1e70: 11 f0 breq .+4 ; 0x1e76 - /* - * Send optiboot version as "minor SW version" - */ - putch(OPTIBOOT_MINVER); - } else if (which == 0x81) { - 1e72: 01 38 cpi r16, 0x81 ; 129 - 1e74: 11 f4 brne .+4 ; 0x1e7a - putch(OPTIBOOT_MAJVER); - 1e76: 84 e0 ldi r24, 0x04 ; 4 - 1e78: 01 c0 rjmp .+2 ; 0x1e7c - } else { - /* - * GET PARAMETER returns a generic 0x03 reply for - * other parameters - enough to keep Avrdude happy - */ - putch(0x03); - 1e7a: 83 e0 ldi r24, 0x03 ; 3 - 1e7c: 8d d0 rcall .+282 ; 0x1f98 - 1e7e: 89 c0 rjmp .+274 ; 0x1f92 - } - } - else if(ch == STK_SET_DEVICE) { - 1e80: 82 34 cpi r24, 0x42 ; 66 - 1e82: 11 f4 brne .+4 ; 0x1e88 - // SET DEVICE is ignored - getNch(20); - 1e84: 84 e1 ldi r24, 0x14 ; 20 - 1e86: 03 c0 rjmp .+6 ; 0x1e8e - } - else if(ch == STK_SET_DEVICE_EXT) { - 1e88: 85 34 cpi r24, 0x45 ; 69 - 1e8a: 19 f4 brne .+6 ; 0x1e92 - // SET DEVICE EXT is ignored - getNch(5); - 1e8c: 85 e0 ldi r24, 0x05 ; 5 - 1e8e: 9b d0 rcall .+310 ; 0x1fc6 - 1e90: 80 c0 rjmp .+256 ; 0x1f92 - } - else if(ch == STK_LOAD_ADDRESS) { - 1e92: 85 35 cpi r24, 0x55 ; 85 - 1e94: 79 f4 brne .+30 ; 0x1eb4 - // LOAD ADDRESS - uint16_t newAddress; - newAddress = getch(); - 1e96: 84 d0 rcall .+264 ; 0x1fa0 - newAddress = (newAddress & 0xff) | (getch() << 8); - 1e98: e8 2e mov r14, r24 - 1e9a: ff 24 eor r15, r15 - 1e9c: 81 d0 rcall .+258 ; 0x1fa0 - 1e9e: 08 2f mov r16, r24 - 1ea0: 10 e0 ldi r17, 0x00 ; 0 - 1ea2: 10 2f mov r17, r16 - 1ea4: 00 27 eor r16, r16 - 1ea6: 0e 29 or r16, r14 - 1ea8: 1f 29 or r17, r15 -#ifdef RAMPZ - // Transfer top bit to RAMPZ - RAMPZ = (newAddress & 0x8000) ? 1 : 0; -#endif - newAddress += newAddress; // Convert from word address to byte address - 1eaa: 00 0f add r16, r16 - 1eac: 11 1f adc r17, r17 - address = newAddress; - verifySpace(); - 1eae: 83 d0 rcall .+262 ; 0x1fb6 - 1eb0: 68 01 movw r12, r16 - 1eb2: 6f c0 rjmp .+222 ; 0x1f92 - } - else if(ch == STK_UNIVERSAL) { - 1eb4: 86 35 cpi r24, 0x56 ; 86 - 1eb6: 21 f4 brne .+8 ; 0x1ec0 - // UNIVERSAL command is ignored - getNch(4); - 1eb8: 84 e0 ldi r24, 0x04 ; 4 - 1eba: 85 d0 rcall .+266 ; 0x1fc6 - putch(0x00); - 1ebc: 80 e0 ldi r24, 0x00 ; 0 - 1ebe: de cf rjmp .-68 ; 0x1e7c - } - /* Write memory, length is big endian and is in bytes */ - else if(ch == STK_PROG_PAGE) { - 1ec0: 84 36 cpi r24, 0x64 ; 100 - 1ec2: 09 f0 breq .+2 ; 0x1ec6 - 1ec4: 40 c0 rjmp .+128 ; 0x1f46 - // PROGRAM PAGE - we support flash programming only, not EEPROM - uint8_t *bufPtr; - uint16_t addrPtr; - - getch(); /* getlen() */ - 1ec6: 6c d0 rcall .+216 ; 0x1fa0 - length = getch(); - 1ec8: 6b d0 rcall .+214 ; 0x1fa0 - 1eca: 08 2f mov r16, r24 - getch(); - 1ecc: 69 d0 rcall .+210 ; 0x1fa0 - - // If we are in RWW section, immediately start page erase - if (address < NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address); - 1ece: 80 e0 ldi r24, 0x00 ; 0 - 1ed0: c8 16 cp r12, r24 - 1ed2: 88 e1 ldi r24, 0x18 ; 24 - 1ed4: d8 06 cpc r13, r24 - 1ed6: 18 f4 brcc .+6 ; 0x1ede - 1ed8: f6 01 movw r30, r12 - 1eda: b7 be out 0x37, r11 ; 55 - 1edc: e8 95 spm - 1ede: c0 e0 ldi r28, 0x00 ; 0 - 1ee0: d1 e0 ldi r29, 0x01 ; 1 - - // While that is going on, read in page contents - bufPtr = buff; - do *bufPtr++ = getch(); - 1ee2: 5e d0 rcall .+188 ; 0x1fa0 - 1ee4: 89 93 st Y+, r24 - while (--length); - 1ee6: 0c 17 cp r16, r28 - 1ee8: e1 f7 brne .-8 ; 0x1ee2 - - // If we are in NRWW section, page erase has to be delayed until now. - // Todo: Take RAMPZ into account - if (address >= NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address); - 1eea: f0 e0 ldi r31, 0x00 ; 0 - 1eec: cf 16 cp r12, r31 - 1eee: f8 e1 ldi r31, 0x18 ; 24 - 1ef0: df 06 cpc r13, r31 - 1ef2: 18 f0 brcs .+6 ; 0x1efa - 1ef4: f6 01 movw r30, r12 - 1ef6: b7 be out 0x37, r11 ; 55 - 1ef8: e8 95 spm - - // Read command terminator, start reply - verifySpace(); - 1efa: 5d d0 rcall .+186 ; 0x1fb6 - - // If only a partial page is to be programmed, the erase might not be complete. - // So check that here - boot_spm_busy_wait(); - 1efc: 07 b6 in r0, 0x37 ; 55 - 1efe: 00 fc sbrc r0, 0 - 1f00: fd cf rjmp .-6 ; 0x1efc - 1f02: a6 01 movw r20, r12 - 1f04: a0 e0 ldi r26, 0x00 ; 0 - 1f06: b1 e0 ldi r27, 0x01 ; 1 - bufPtr = buff; - addrPtr = (uint16_t)(void*)address; - ch = SPM_PAGESIZE / 2; - do { - uint16_t a; - a = *bufPtr++; - 1f08: 2c 91 ld r18, X - 1f0a: 30 e0 ldi r19, 0x00 ; 0 - a |= (*bufPtr++) << 8; - 1f0c: 11 96 adiw r26, 0x01 ; 1 - 1f0e: 8c 91 ld r24, X - 1f10: 11 97 sbiw r26, 0x01 ; 1 - 1f12: 90 e0 ldi r25, 0x00 ; 0 - 1f14: 98 2f mov r25, r24 - 1f16: 88 27 eor r24, r24 - 1f18: 82 2b or r24, r18 - 1f1a: 93 2b or r25, r19 -#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4)) -#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6)) -#endif - -/* main program starts here */ -int main(void) { - 1f1c: 12 96 adiw r26, 0x02 ; 2 - ch = SPM_PAGESIZE / 2; - do { - uint16_t a; - a = *bufPtr++; - a |= (*bufPtr++) << 8; - __boot_page_fill_short((uint16_t)(void*)addrPtr,a); - 1f1e: fa 01 movw r30, r20 - 1f20: 0c 01 movw r0, r24 - 1f22: 87 be out 0x37, r8 ; 55 - 1f24: e8 95 spm - 1f26: 11 24 eor r1, r1 - addrPtr += 2; - 1f28: 4e 5f subi r20, 0xFE ; 254 - 1f2a: 5f 4f sbci r21, 0xFF ; 255 - } while (--ch); - 1f2c: f1 e0 ldi r31, 0x01 ; 1 - 1f2e: a0 34 cpi r26, 0x40 ; 64 - 1f30: bf 07 cpc r27, r31 - 1f32: 51 f7 brne .-44 ; 0x1f08 - - // Write from programming buffer - __boot_page_write_short((uint16_t)(void*)address); - 1f34: f6 01 movw r30, r12 - 1f36: a7 be out 0x37, r10 ; 55 - 1f38: e8 95 spm - boot_spm_busy_wait(); - 1f3a: 07 b6 in r0, 0x37 ; 55 - 1f3c: 00 fc sbrc r0, 0 - 1f3e: fd cf rjmp .-6 ; 0x1f3a - -#if defined(RWWSRE) - // Reenable read access to flash - boot_rww_enable(); - 1f40: 97 be out 0x37, r9 ; 55 - 1f42: e8 95 spm - 1f44: 26 c0 rjmp .+76 ; 0x1f92 -#endif - - } - /* Read memory block mode, length is big endian. */ - else if(ch == STK_READ_PAGE) { - 1f46: 84 37 cpi r24, 0x74 ; 116 - 1f48: b1 f4 brne .+44 ; 0x1f76 - // READ PAGE - we only read flash - getch(); /* getlen() */ - 1f4a: 2a d0 rcall .+84 ; 0x1fa0 - length = getch(); - 1f4c: 29 d0 rcall .+82 ; 0x1fa0 - 1f4e: f8 2e mov r15, r24 - getch(); - 1f50: 27 d0 rcall .+78 ; 0x1fa0 - - verifySpace(); - 1f52: 31 d0 rcall .+98 ; 0x1fb6 - 1f54: f6 01 movw r30, r12 - 1f56: ef 2c mov r14, r15 - putch(result); - address++; - } - while (--length); -#else - do putch(pgm_read_byte_near(address++)); - 1f58: 8f 01 movw r16, r30 - 1f5a: 0f 5f subi r16, 0xFF ; 255 - 1f5c: 1f 4f sbci r17, 0xFF ; 255 - 1f5e: 84 91 lpm r24, Z+ - 1f60: 1b d0 rcall .+54 ; 0x1f98 - while (--length); - 1f62: ea 94 dec r14 - 1f64: f8 01 movw r30, r16 - 1f66: c1 f7 brne .-16 ; 0x1f58 -#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4)) -#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6)) -#endif - -/* main program starts here */ -int main(void) { - 1f68: 08 94 sec - 1f6a: c1 1c adc r12, r1 - 1f6c: d1 1c adc r13, r1 - 1f6e: fa 94 dec r15 - 1f70: cf 0c add r12, r15 - 1f72: d1 1c adc r13, r1 - 1f74: 0e c0 rjmp .+28 ; 0x1f92 -#endif -#endif - } - - /* Get device signature bytes */ - else if(ch == STK_READ_SIGN) { - 1f76: 85 37 cpi r24, 0x75 ; 117 - 1f78: 39 f4 brne .+14 ; 0x1f88 - // READ SIGN - return what Avrdude wants to hear - verifySpace(); - 1f7a: 1d d0 rcall .+58 ; 0x1fb6 - putch(SIGNATURE_0); - 1f7c: 8e e1 ldi r24, 0x1E ; 30 - 1f7e: 0c d0 rcall .+24 ; 0x1f98 - putch(SIGNATURE_1); - 1f80: 83 e9 ldi r24, 0x93 ; 147 - 1f82: 0a d0 rcall .+20 ; 0x1f98 - putch(SIGNATURE_2); - 1f84: 87 e0 ldi r24, 0x07 ; 7 - 1f86: 7a cf rjmp .-268 ; 0x1e7c - } - else if (ch == 'Q') { - 1f88: 81 35 cpi r24, 0x51 ; 81 - 1f8a: 11 f4 brne .+4 ; 0x1f90 - // Adaboot no-wait mod - watchdogConfig(WATCHDOG_16MS); - 1f8c: 88 e0 ldi r24, 0x08 ; 8 - 1f8e: 0f d0 rcall .+30 ; 0x1fae - verifySpace(); - } - else { - // This covers the response to commands like STK_ENTER_PROGMODE - verifySpace(); - 1f90: 12 d0 rcall .+36 ; 0x1fb6 - } - putch(STK_OK); - 1f92: 80 e1 ldi r24, 0x10 ; 16 - 1f94: 01 d0 rcall .+2 ; 0x1f98 - 1f96: 65 cf rjmp .-310 ; 0x1e62 - -00001f98 : - } -} - -void putch(char ch) { -#ifndef SOFT_UART - while (!(UCSR0A & _BV(UDRE0))); - 1f98: 5d 9b sbis 0x0b, 5 ; 11 - 1f9a: fe cf rjmp .-4 ; 0x1f98 - UDR0 = ch; - 1f9c: 8c b9 out 0x0c, r24 ; 12 - [uartBit] "I" (UART_TX_BIT) - : - "r25" - ); -#endif -} - 1f9e: 08 95 ret - -00001fa0 : - [uartBit] "I" (UART_RX_BIT) - : - "r25" -); -#else - while(!(UCSR0A & _BV(RXC0))) - 1fa0: 5f 9b sbis 0x0b, 7 ; 11 - 1fa2: fe cf rjmp .-4 ; 0x1fa0 - ; - if (!(UCSR0A & _BV(FE0))) { - 1fa4: 5c 99 sbic 0x0b, 4 ; 11 - 1fa6: 01 c0 rjmp .+2 ; 0x1faa -} -#endif - -// Watchdog functions. These are only safe with interrupts turned off. -void watchdogReset() { - __asm__ __volatile__ ( - 1fa8: a8 95 wdr - * don't care that an invalid char is returned...) - */ - watchdogReset(); - } - - ch = UDR0; - 1faa: 8c b1 in r24, 0x0c ; 12 - LED_PIN |= _BV(LED); -#endif -#endif - - return ch; -} - 1fac: 08 95 ret - -00001fae : - "wdr\n" - ); -} - -void watchdogConfig(uint8_t x) { - WDTCSR = _BV(WDCE) | _BV(WDE); - 1fae: 98 e1 ldi r25, 0x18 ; 24 - 1fb0: 91 bd out 0x21, r25 ; 33 - WDTCSR = x; - 1fb2: 81 bd out 0x21, r24 ; 33 -} - 1fb4: 08 95 ret - -00001fb6 : - do getch(); while (--count); - verifySpace(); -} - -void verifySpace() { - if (getch() != CRC_EOP) { - 1fb6: f4 df rcall .-24 ; 0x1fa0 - 1fb8: 80 32 cpi r24, 0x20 ; 32 - 1fba: 19 f0 breq .+6 ; 0x1fc2 - watchdogConfig(WATCHDOG_16MS); // shorten WD timeout - 1fbc: 88 e0 ldi r24, 0x08 ; 8 - 1fbe: f7 df rcall .-18 ; 0x1fae - 1fc0: ff cf rjmp .-2 ; 0x1fc0 - while (1) // and busy-loop so that WD causes - ; // a reset and app start. - } - putch(STK_INSYNC); - 1fc2: 84 e1 ldi r24, 0x14 ; 20 -} - 1fc4: e9 cf rjmp .-46 ; 0x1f98 - -00001fc6 : - ::[count] "M" (UART_B_VALUE) - ); -} -#endif - -void getNch(uint8_t count) { - 1fc6: 1f 93 push r17 - 1fc8: 18 2f mov r17, r24 - do getch(); while (--count); - 1fca: ea df rcall .-44 ; 0x1fa0 - 1fcc: 11 50 subi r17, 0x01 ; 1 - 1fce: e9 f7 brne .-6 ; 0x1fca - verifySpace(); - 1fd0: f2 df rcall .-28 ; 0x1fb6 -} - 1fd2: 1f 91 pop r17 - 1fd4: 08 95 ret - -00001fd6 : - WDTCSR = _BV(WDCE) | _BV(WDE); - WDTCSR = x; -} - -void appStart() { - watchdogConfig(WATCHDOG_OFF); - 1fd6: 80 e0 ldi r24, 0x00 ; 0 - 1fd8: ea df rcall .-44 ; 0x1fae - __asm__ __volatile__ ( - 1fda: ee 27 eor r30, r30 - 1fdc: ff 27 eor r31, r31 - 1fde: 09 94 ijmp diff --git a/build/linux/work/hardware/arduino/bootloaders/optiboot/pin_defs.h b/build/linux/work/hardware/arduino/bootloaders/optiboot/pin_defs.h deleted file mode 100644 index 27d777244..000000000 --- a/build/linux/work/hardware/arduino/bootloaders/optiboot/pin_defs.h +++ /dev/null @@ -1,80 +0,0 @@ -#if defined(__AVR_ATmega168__) || defined(__AVR_ATmega328P__) || defined(__AVR_ATmega88) || defined(__AVR_ATmega8__) || defined(__AVR_ATmega88__) -/* Onboard LED is connected to pin PB5 in Arduino NG, Diecimila, and Duemilanove */ -#define LED_DDR DDRB -#define LED_PORT PORTB -#define LED_PIN PINB -#define LED PINB5 - -/* Ports for soft UART */ -#ifdef SOFT_UART -#define UART_PORT PORTD -#define UART_PIN PIND -#define UART_DDR DDRD -#define UART_TX_BIT 1 -#define UART_RX_BIT 0 -#endif -#endif - -#if defined(__AVR_ATmega8__) - //Name conversion R.Wiersma - #define UCSR0A UCSRA - #define UDR0 UDR - #define UDRE0 UDRE - #define RXC0 RXC - #define FE0 FE - #define TIFR1 TIFR - #define WDTCSR WDTCR -#endif - -/* Luminet support */ -#if defined(__AVR_ATtiny84__) -/* Red LED is connected to pin PA4 */ -#define LED_DDR DDRA -#define LED_PORT PORTA -#define LED_PIN PINA -#define LED PINA4 -/* Ports for soft UART - left port only for now. TX/RX on PA2/PA3 */ -#ifdef SOFT_UART -#define UART_PORT PORTA -#define UART_PIN PINA -#define UART_DDR DDRA -#define UART_TX_BIT 2 -#define UART_RX_BIT 3 -#endif -#endif - -/* Sanguino support */ -#if defined(__AVR_ATmega644P__) -/* Onboard LED is connected to pin PB0 on Sanguino */ -#define LED_DDR DDRB -#define LED_PORT PORTB -#define LED_PIN PINB -#define LED PINB0 - -/* Ports for soft UART */ -#ifdef SOFT_UART -#define UART_PORT PORTD -#define UART_PIN PIND -#define UART_DDR DDRD -#define UART_TX_BIT 1 -#define UART_RX_BIT 0 -#endif -#endif - -/* Mega support */ -#if defined(__AVR_ATmega1280__) -/* Onboard LED is connected to pin PB7 on Arduino Mega */ -#define LED_DDR DDRB -#define LED_PORT PORTB -#define LED_PIN PINB -#define LED PINB7 - -/* Ports for soft UART */ -#ifdef SOFT_UART -#define UART_PORT PORTE -#define UART_PIN PINE -#define UART_DDR DDRE -#define UART_TX_BIT 1 -#define UART_RX_BIT 0 -#endif -#endif diff --git a/build/linux/work/hardware/arduino/bootloaders/optiboot/stk500.h b/build/linux/work/hardware/arduino/bootloaders/optiboot/stk500.h deleted file mode 100644 index ca0dd91df..000000000 --- a/build/linux/work/hardware/arduino/bootloaders/optiboot/stk500.h +++ /dev/null @@ -1,39 +0,0 @@ -/* STK500 constants list, from AVRDUDE */ -#define STK_OK 0x10 -#define STK_FAILED 0x11 // Not used -#define STK_UNKNOWN 0x12 // Not used -#define STK_NODEVICE 0x13 // Not used -#define STK_INSYNC 0x14 // ' ' -#define STK_NOSYNC 0x15 // Not used -#define ADC_CHANNEL_ERROR 0x16 // Not used -#define ADC_MEASURE_OK 0x17 // Not used -#define PWM_CHANNEL_ERROR 0x18 // Not used -#define PWM_ADJUST_OK 0x19 // Not used -#define CRC_EOP 0x20 // 'SPACE' -#define STK_GET_SYNC 0x30 // '0' -#define STK_GET_SIGN_ON 0x31 // '1' -#define STK_SET_PARAMETER 0x40 // '@' -#define STK_GET_PARAMETER 0x41 // 'A' -#define STK_SET_DEVICE 0x42 // 'B' -#define STK_SET_DEVICE_EXT 0x45 // 'E' -#define STK_ENTER_PROGMODE 0x50 // 'P' -#define STK_LEAVE_PROGMODE 0x51 // 'Q' -#define STK_CHIP_ERASE 0x52 // 'R' -#define STK_CHECK_AUTOINC 0x53 // 'S' -#define STK_LOAD_ADDRESS 0x55 // 'U' -#define STK_UNIVERSAL 0x56 // 'V' -#define STK_PROG_FLASH 0x60 // '`' -#define STK_PROG_DATA 0x61 // 'a' -#define STK_PROG_FUSE 0x62 // 'b' -#define STK_PROG_LOCK 0x63 // 'c' -#define STK_PROG_PAGE 0x64 // 'd' -#define STK_PROG_FUSE_EXT 0x65 // 'e' -#define STK_READ_FLASH 0x70 // 'p' -#define STK_READ_DATA 0x71 // 'q' -#define STK_READ_FUSE 0x72 // 'r' -#define STK_READ_LOCK 0x73 // 's' -#define STK_READ_PAGE 0x74 // 't' -#define STK_READ_SIGN 0x75 // 'u' -#define STK_READ_OSCCAL 0x76 // 'v' -#define STK_READ_FUSE_EXT 0x77 // 'w' -#define STK_READ_OSCCAL_EXT 0x78 // 'x' diff --git a/build/linux/work/hardware/arduino/bootloaders/stk500v2/License.txt b/build/linux/work/hardware/arduino/bootloaders/stk500v2/License.txt deleted file mode 100644 index e7dcdd8d7..000000000 --- a/build/linux/work/hardware/arduino/bootloaders/stk500v2/License.txt +++ /dev/null @@ -1,280 +0,0 @@ - GNU GENERAL PUBLIC LICENSE - Version 2, June 1991 - - Copyright (C) 1989, 1991 Free Software Foundation, Inc. - 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA - Everyone is permitted to copy and distribute verbatim copies - of this license document, but changing it is not allowed. - - Preamble - - The licenses for most software are designed to take away your -freedom to share and change it. By contrast, the GNU General Public -License is intended to guarantee your freedom to share and change free -software--to make sure the software is free for all its users. This -General Public License applies to most of the Free Software -Foundation's software and to any other program whose authors commit to -using it. (Some other Free Software Foundation software is covered by -the GNU Library General Public License instead.) You can apply it to -your programs, too. - - When we speak of free software, we are referring to freedom, not -price. Our General Public Licenses are designed to make sure that you -have the freedom to distribute copies of free software (and charge for -this service if you wish), that you receive source code or can get it -if you want it, that you can change the software or use pieces of it -in new free programs; and that you know you can do these things. - - To protect your rights, we need to make restrictions that forbid -anyone to deny you these rights or to ask you to surrender the rights. -These restrictions translate to certain responsibilities for you if you -distribute copies of the software, or if you modify it. - - For example, if you distribute copies of such a program, whether -gratis or for a fee, you must give the recipients all the rights that -you have. You must make sure that they, too, receive or can get the -source code. And you must show them these terms so they know their -rights. - - We protect your rights with two steps: (1) copyright the software, and -(2) offer you this license which gives you legal permission to copy, -distribute and/or modify the software. - - Also, for each author's protection and ours, we want to make certain -that everyone understands that there is no warranty for this free -software. If the software is modified by someone else and passed on, we -want its recipients to know that what they have is not the original, so -that any problems introduced by others will not reflect on the original -authors' reputations. - - Finally, any free program is threatened constantly by software -patents. We wish to avoid the danger that redistributors of a free -program will individually obtain patent licenses, in effect making the -program proprietary. To prevent this, we have made it clear that any -patent must be licensed for everyone's free use or not licensed at all. - - The precise terms and conditions for copying, distribution and -modification follow. - - GNU GENERAL PUBLIC LICENSE - TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION - - 0. This License applies to any program or other work which contains -a notice placed by the copyright holder saying it may be distributed -under the terms of this General Public License. The "Program", below, -refers to any such program or work, and a "work based on the Program" -means either the Program or any derivative work under copyright law: -that is to say, a work containing the Program or a portion of it, -either verbatim or with modifications and/or translated into another -language. (Hereinafter, translation is included without limitation in -the term "modification".) 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You may copy and distribute verbatim copies of the Program's -source code as you receive it, in any medium, provided that you -conspicuously and appropriately publish on each copy an appropriate -copyright notice and disclaimer of warranty; keep intact all the -notices that refer to this License and to the absence of any warranty; -and give any other recipients of the Program a copy of this License -along with the Program. - -You may charge a fee for the physical act of transferring a copy, and -you may at your option offer warranty protection in exchange for a fee. - - 2. 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Weddington, Jrg Wunsch, et al. -# -# Adjust F_CPU below to the clock frequency in Mhz of your AVR target -# Adjust BOOTLOADER_ADDRESS to your AVR target -# -#---------------------------------------------------------------------------- -# On command line: -# -# make all = Make software. -# -# make clean = Clean out built project files. -# -# make coff = Convert ELF to AVR COFF. -# -# make extcoff = Convert ELF to AVR Extended COFF. -# -# make program = Download the hex file to the device, using avrdude. -# Please customize the avrdude settings below first! -# -# make debug = Start either simulavr or avarice as specified for debugging, -# with avr-gdb or avr-insight as the front end for debugging. -# -# make filename.s = Just compile filename.c into the assembler code only. -# -# make filename.i = Create a preprocessed source file for use in submitting -# bug reports to the GCC project. -# -# To rebuild project do "make clean" then "make all". -#---------------------------------------------------------------------------- -# = Mark Sproul msproul-at-skychariot.com - - -# MCU name -#MCU = atmega128 - - -# Processor frequency. -# This will define a symbol, F_CPU, in all source code files equal to the -# processor frequency. You can then use this symbol in your source code to -# calculate timings. Do NOT tack on a 'UL' at the end, this will be done -# automatically to create a 32-bit value in your source code. -#F_CPU = 16000000 - - -# Bootloader -# Please adjust if using a different AVR -# 0x0e00*2=0x1C00 for ATmega8 512 words Boot Size -# 0xFC00*2=0x1F800 for ATmega128 1024 words Boot Size -# 0xF800*2=0x1F000 for ATmega1280 -# 0xF000*2=0x1E000 for ATmega1280 -#BOOTLOADER_ADDRESS = 1E000 - - -# Output format. (can be srec, ihex, binary) -FORMAT = ihex - - -# Target file name (without extension). -TARGET = stk500boot - - -# List C source files here. (C dependencies are automatically generated.) -SRC = stk500boot.c - - -# List Assembler source files here. -# Make them always end in a capital .S. Files ending in a lowercase .s -# will not be considered source files but generated files (assembler -# output from the compiler), and will be deleted upon "make clean"! -# Even though the DOS/Win* filesystem matches both .s and .S the same, -# it will preserve the spelling of the filenames, and gcc itself does -# care about how the name is spelled on its command-line. -ASRC = - - -# Optimization level, can be [0, 1, 2, 3, s]. -# 0 = turn off optimization. s = optimize for size. -# (Note: 3 is not always the best optimization level. See avr-libc FAQ.) -OPT = s - - -# Debugging format. -# Native formats for AVR-GCC's -g are dwarf-2 [default] or stabs. -# AVR Studio 4.10 requires dwarf-2. -# AVR [Extended] COFF format requires stabs, plus an avr-objcopy run. -DEBUG = dwarf-2 - - -# List any extra directories to look for include files here. -# Each directory must be seperated by a space. -# Use forward slashes for directory separators. -# For a directory that has spaces, enclose it in quotes. -EXTRAINCDIRS = - - -# Compiler flag to set the C Standard level. -# c89 = "ANSI" C -# gnu89 = c89 plus GCC extensions -# c99 = ISO C99 standard (not yet fully implemented) -# gnu99 = c99 plus GCC extensions -CSTANDARD = -std=gnu99 - - -# Place -D or -U options here -CDEFS = -DF_CPU=$(F_CPU)UL - - -# Place -I options here -CINCS = - - - -#---------------- Compiler Options ---------------- -# -g*: generate debugging information -# -O*: optimization level -# -f...: tuning, see GCC manual and avr-libc documentation -# -Wall...: warning level -# -Wa,...: tell GCC to pass this to the assembler. -# -adhlns...: create assembler listing -CFLAGS = -g$(DEBUG) -CFLAGS += $(CDEFS) $(CINCS) -CFLAGS += -O$(OPT) -CFLAGS += -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enums -mno-tablejump -CFLAGS += -Wall -Wstrict-prototypes -CFLAGS += -Wa,-adhlns=$(<:.c=.lst) -CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS)) -CFLAGS += $(CSTANDARD) - - -#---------------- Assembler Options ---------------- -# -Wa,...: tell GCC to pass this to the assembler. -# -ahlms: create listing -# -gstabs: have the assembler create line number information; note that -# for use in COFF files, additional information about filenames -# and function names needs to be present in the assembler source -# files -- see avr-libc docs [FIXME: not yet described there] -ASFLAGS = -Wa,-adhlns=$(<:.S=.lst),-gstabs - - -#---------------- Library Options ---------------- -# Minimalistic printf version -PRINTF_LIB_MIN = -Wl,-u,vfprintf -lprintf_min - -# Floating point printf version (requires MATH_LIB = -lm below) -PRINTF_LIB_FLOAT = -Wl,-u,vfprintf -lprintf_flt - -# If this is left blank, then it will use the Standard printf version. -PRINTF_LIB = -#PRINTF_LIB = $(PRINTF_LIB_MIN) -#PRINTF_LIB = $(PRINTF_LIB_FLOAT) - - -# Minimalistic scanf version -SCANF_LIB_MIN = -Wl,-u,vfscanf -lscanf_min - -# Floating point + %[ scanf version (requires MATH_LIB = -lm below) -SCANF_LIB_FLOAT = -Wl,-u,vfscanf -lscanf_flt - -# If this is left blank, then it will use the Standard scanf version. -SCANF_LIB = -#SCANF_LIB = $(SCANF_LIB_MIN) -#SCANF_LIB = $(SCANF_LIB_FLOAT) - - -MATH_LIB = -lm - - - -#---------------- External Memory Options ---------------- - -# 64 KB of external RAM, starting after internal RAM (ATmega128!), -# used for variables (.data/.bss) and heap (malloc()). -#EXTMEMOPTS = -Wl,-Tdata=0x801100,--defsym=__heap_end=0x80ffff - -# 64 KB of external RAM, starting after internal RAM (ATmega128!), -# only used for heap (malloc()). -#EXTMEMOPTS = -Wl,--defsym=__heap_start=0x801100,--defsym=__heap_end=0x80ffff - -EXTMEMOPTS = - - - - -#---------------- Linker Options ---------------- -# -Wl,...: tell GCC to pass this to linker. -# -Map: create map file -# --cref: add cross reference to map file -LDFLAGS = -Wl,-Map=$(TARGET).map,--cref -LDFLAGS += $(EXTMEMOPTS) -LDFLAGS += $(PRINTF_LIB) $(SCANF_LIB) $(MATH_LIB) - - -#--------------- bootloader linker Options ------- -# BOOTLOADER_ADDRESS (=Start of Boot Loader section -# in bytes - not words) is defined above. -#LDFLAGS += -Wl,--section-start=.text=$(BOOTLOADER_ADDRESS) -nostartfiles -nodefaultlibs -#LDFLAGS += -Wl,--section-start=.text=$(BOOTLOADER_ADDRESS) -nostartfiles -LDFLAGS += -Wl,--section-start=.text=$(BOOTLOADER_ADDRESS) - -#---------------- Programming Options (avrdude) ---------------- - -# Programming hardware: alf avr910 avrisp bascom bsd -# dt006 pavr picoweb pony-stk200 sp12 stk200 stk500 -# -# Type: avrdude -c ? -# to get a full listing. -# -AVRDUDE_PROGRAMMER = stk500v2 - -# com1 = serial port. Use lpt1 to connect to parallel port. -AVRDUDE_PORT = com1 # programmer connected to serial device - -AVRDUDE_WRITE_FLASH = -U flash:w:$(TARGET).hex -#AVRDUDE_WRITE_EEPROM = -U eeprom:w:$(TARGET).eep - - -# Uncomment the following if you want avrdude's erase cycle counter. -# Note that this counter needs to be initialized first using -Yn, -# see avrdude manual. -#AVRDUDE_ERASE_COUNTER = -y - -# Uncomment the following if you do /not/ wish a verification to be -# performed after programming the device. -#AVRDUDE_NO_VERIFY = -V - -# Increase verbosity level. Please use this when submitting bug -# reports about avrdude. See -# to submit bug reports. -#AVRDUDE_VERBOSE = -v -v - -AVRDUDE_FLAGS = -p $(MCU) -P $(AVRDUDE_PORT) -c $(AVRDUDE_PROGRAMMER) -AVRDUDE_FLAGS += $(AVRDUDE_NO_VERIFY) -AVRDUDE_FLAGS += $(AVRDUDE_VERBOSE) -AVRDUDE_FLAGS += $(AVRDUDE_ERASE_COUNTER) - - - -#---------------- Debugging Options ---------------- - -# For simulavr only - target MCU frequency. -DEBUG_MFREQ = $(F_CPU) - -# Set the DEBUG_UI to either gdb or insight. -# DEBUG_UI = gdb -DEBUG_UI = insight - -# Set the debugging back-end to either avarice, simulavr. -DEBUG_BACKEND = avarice -#DEBUG_BACKEND = simulavr - -# GDB Init Filename. -GDBINIT_FILE = __avr_gdbinit - -# When using avarice settings for the JTAG -JTAG_DEV = /dev/com1 - -# Debugging port used to communicate between GDB / avarice / simulavr. -DEBUG_PORT = 4242 - -# Debugging host used to communicate between GDB / avarice / simulavr, normally -# just set to localhost unless doing some sort of crazy debugging when -# avarice is running on a different computer. -DEBUG_HOST = localhost - - - -#============================================================================ - - -# Define programs and commands. -SHELL = sh -CC = avr-gcc -OBJCOPY = avr-objcopy -OBJDUMP = avr-objdump -SIZE = avr-size -NM = avr-nm -AVRDUDE = avrdude -REMOVE = rm -f -COPY = cp -WINSHELL = cmd - - -# Define Messages -# English -MSG_ERRORS_NONE = Errors: none -MSG_BEGIN = -------- begin -------- -MSG_END = -------- end -------- -MSG_SIZE_BEFORE = Size before: -MSG_SIZE_AFTER = Size after: -MSG_COFF = Converting to AVR COFF: -MSG_EXTENDED_COFF = Converting to AVR Extended COFF: -MSG_FLASH = Creating load file for Flash: -MSG_EEPROM = Creating load file for EEPROM: -MSG_EXTENDED_LISTING = Creating Extended Listing: -MSG_SYMBOL_TABLE = Creating Symbol Table: -MSG_LINKING = Linking: -MSG_COMPILING = Compiling: -MSG_ASSEMBLING = Assembling: -MSG_CLEANING = Cleaning project: - - - - -# Define all object files. -OBJ = $(SRC:.c=.o) $(ASRC:.S=.o) - -# Define all listing files. -LST = $(SRC:.c=.lst) $(ASRC:.S=.lst) - - -# Compiler flags to generate dependency files. -GENDEPFLAGS = -MD -MP -MF .dep/$(@F).d - - -# Combine all necessary flags and optional flags. -# Add target processor to flags. -ALL_CFLAGS = -mmcu=$(MCU) -I. $(CFLAGS) $(GENDEPFLAGS) -ALL_ASFLAGS = -mmcu=$(MCU) -I. -x assembler-with-cpp $(ASFLAGS) - - - -############################################################ -# May 25, 2010 Adding 1280 support -mega1280: MCU = atmega1280 -mega1280: F_CPU = 16000000 -mega1280: BOOTLOADER_ADDRESS = 1E000 -mega1280: CFLAGS += -D_MEGA_BOARD_ -mega1280: begin gccversion sizebefore build sizeafter end - mv $(TARGET).hex stk500boot_v2_mega1280.hex - - -############################################################ -# Jul 6, 2010 Adding 2560 support -mega2560: MCU = atmega2560 -mega2560: F_CPU = 16000000 -mega2560: BOOTLOADER_ADDRESS = 3E000 -mega2560: CFLAGS += -D_MEGA_BOARD_ -mega2560: begin gccversion sizebefore build sizeafter end - mv $(TARGET).hex stk500boot_v2_mega2560.hex - - -############################################################ -#Initial config on Amber128 board -# avrdude: Device signature = 0x1e9702 -# avrdude: safemode: lfuse reads as 8F -# avrdude: safemode: hfuse reads as CB -# avrdude: safemode: efuse reads as FF -# Jul 17, 2010 Adding 128 support -############################################################ -amber128: MCU = atmega128 -#amber128: F_CPU = 16000000 -amber128: F_CPU = 14745600 -amber128: BOOTLOADER_ADDRESS = 1E000 -amber128: CFLAGS += -D_BOARD_AMBER128_ -amber128: begin gccversion sizebefore build sizeafter end - mv $(TARGET).hex stk500boot_v2_amber128.hex - -############################################################ -# Aug 23, 2010 Adding atmega2561 support -m2561: MCU = atmega2561 -m2561: F_CPU = 8000000 -m2561: BOOTLOADER_ADDRESS = 3E000 -m2561: CFLAGS += -D_ANDROID_2561_ -DBAUDRATE=57600 -m2561: begin gccversion sizebefore build sizeafter end - mv $(TARGET).hex stk500boot_v2_android2561.hex - - -############################################################ -# avrdude: Device signature = 0x1e9801 -# avrdude: safemode: lfuse reads as EC -# avrdude: safemode: hfuse reads as 18 -# avrdude: safemode: efuse reads as FD -# Aug 23, 2010 Adding cerebot 2560 @ 8mhz -#avrdude -P usb -c usbtiny -p m2560 -v -U flash:w:/Arduino/WiringBootV2_upd1/stk500boot_v2_cerebotplus.hex -############################################################ -cerebot: MCU = atmega2560 -cerebot: F_CPU = 8000000 -cerebot: BOOTLOADER_ADDRESS = 3E000 -cerebot: CFLAGS += -D_CEREBOTPLUS_BOARD_ -DBAUDRATE=38400 -DUART_BAUDRATE_DOUBLE_SPEED=1 -cerebot: begin gccversion sizebefore build sizeafter end - mv $(TARGET).hex stk500boot_v2_cerebotplus.hex - - -############################################################ -# Aug 23, 2010 Adding atmega2561 support -penguino: MCU = atmega32 -penguino: F_CPU = 16000000 -penguino: BOOTLOADER_ADDRESS = 7800 -penguino: CFLAGS += -D_PENGUINO_ -DBAUDRATE=57600 -penguino: begin gccversion sizebefore build sizeafter end - mv $(TARGET).hex stk500boot_v2_penguino.hex - - -# Default target. -all: begin gccversion sizebefore build sizeafter end - -build: elf hex eep lss sym -#build: hex eep lss sym - -elf: $(TARGET).elf -hex: $(TARGET).hex -eep: $(TARGET).eep -lss: $(TARGET).lss -sym: $(TARGET).sym - - - -# Eye candy. -# AVR Studio 3.x does not check make's exit code but relies on -# the following magic strings to be generated by the compile job. -begin: - @echo - @echo $(MSG_BEGIN) - -end: - @echo $(MSG_END) - @echo - - -# Display size of file. -HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex -ELFSIZE = $(SIZE) --format=avr --mcu=$(MCU) $(TARGET).elf - -sizebefore: - @if test -f $(TARGET).elf; then echo; echo $(MSG_SIZE_BEFORE); $(ELFSIZE); \ - 2>/dev/null; echo; fi - -sizeafter: - @if test -f $(TARGET).elf; then echo; echo $(MSG_SIZE_AFTER); $(ELFSIZE); \ - 2>/dev/null; echo; fi - - - -# Display compiler version information. -gccversion : - @$(CC) --version - - - -# Program the device. -program: $(TARGET).hex $(TARGET).eep - $(AVRDUDE) $(AVRDUDE_FLAGS) $(AVRDUDE_WRITE_FLASH) $(AVRDUDE_WRITE_EEPROM) - - -# Generate avr-gdb config/init file which does the following: -# define the reset signal, load the target file, connect to target, and set -# a breakpoint at main(). -gdb-config: - @$(REMOVE) $(GDBINIT_FILE) - @echo define reset >> $(GDBINIT_FILE) - @echo SIGNAL SIGHUP >> $(GDBINIT_FILE) - @echo end >> $(GDBINIT_FILE) - @echo file $(TARGET).elf >> $(GDBINIT_FILE) - @echo target remote $(DEBUG_HOST):$(DEBUG_PORT) >> $(GDBINIT_FILE) -ifeq ($(DEBUG_BACKEND),simulavr) - @echo load >> $(GDBINIT_FILE) -endif - @echo break main >> $(GDBINIT_FILE) - -debug: gdb-config $(TARGET).elf -ifeq ($(DEBUG_BACKEND), avarice) - @echo Starting AVaRICE - Press enter when "waiting to connect" message displays. - @$(WINSHELL) /c start avarice --jtag $(JTAG_DEV) --erase --program --file \ - $(TARGET).elf $(DEBUG_HOST):$(DEBUG_PORT) - @$(WINSHELL) /c pause - -else - @$(WINSHELL) /c start simulavr --gdbserver --device $(MCU) --clock-freq \ - $(DEBUG_MFREQ) --port $(DEBUG_PORT) -endif - @$(WINSHELL) /c start avr-$(DEBUG_UI) --command=$(GDBINIT_FILE) - - - - -# Convert ELF to COFF for use in debugging / simulating in AVR Studio or VMLAB. -COFFCONVERT=$(OBJCOPY) --debugging \ ---change-section-address .data-0x800000 \ ---change-section-address .bss-0x800000 \ ---change-section-address .noinit-0x800000 \ ---change-section-address .eeprom-0x810000 - - - -coff: $(TARGET).elf - @echo - @echo $(MSG_COFF) $(TARGET).cof - $(COFFCONVERT) -O coff-avr $< $(TARGET).cof - - -extcoff: $(TARGET).elf - @echo - @echo $(MSG_EXTENDED_COFF) $(TARGET).cof - $(COFFCONVERT) -O coff-ext-avr $< $(TARGET).cof - - -# Create final output files (.hex, .eep) from ELF output file. -%.hex: %.elf - @echo - @echo $(MSG_FLASH) $@ - $(OBJCOPY) -O $(FORMAT) -R .eeprom $< $@ - -%.eep: %.elf - @echo - @echo $(MSG_EEPROM) $@ - -$(OBJCOPY) -j .eeprom --set-section-flags=.eeprom="alloc,load" \ - --change-section-lma .eeprom=0 -O $(FORMAT) $< $@ - -# Create extended listing file from ELF output file. -%.lss: %.elf - @echo - @echo $(MSG_EXTENDED_LISTING) $@ - $(OBJDUMP) -h -S $< > $@ - -# Create a symbol table from ELF output file. -%.sym: %.elf - @echo - @echo $(MSG_SYMBOL_TABLE) $@ - $(NM) -n $< > $@ - - - -# Link: create ELF output file from object files. -.SECONDARY : $(TARGET).elf -.PRECIOUS : $(OBJ) -%.elf: $(OBJ) - @echo - @echo $(MSG_LINKING) $@ - $(CC) $(ALL_CFLAGS) $^ --output $@ $(LDFLAGS) - - -# Compile: create object files from C source files. -%.o : %.c - @echo - @echo $(MSG_COMPILING) $< - $(CC) -c $(ALL_CFLAGS) $< -o $@ - - -# Compile: create assembler files from C source files. -%.s : %.c - $(CC) -S $(ALL_CFLAGS) $< -o $@ - - -# Assemble: create object files from assembler source files. -%.o : %.S - @echo - @echo $(MSG_ASSEMBLING) $< - $(CC) -c $(ALL_ASFLAGS) $< -o $@ - -# Create preprocessed source for use in sending a bug report. -%.i : %.c - $(CC) -E -mmcu=$(MCU) -I. $(CFLAGS) $< -o $@ - - -# Target: clean project. -clean: begin clean_list end - -clean_list : - @echo - @echo $(MSG_CLEANING) - $(REMOVE) *.hex - $(REMOVE) *.eep - $(REMOVE) *.cof - $(REMOVE) *.elf - $(REMOVE) *.map - $(REMOVE) *.sym - $(REMOVE) *.lss - $(REMOVE) $(OBJ) - $(REMOVE) $(LST) - $(REMOVE) $(SRC:.c=.s) - $(REMOVE) $(SRC:.c=.d) - $(REMOVE) .dep/* - - - -# Include the dependency files. --include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*) - - -# Listing of phony targets. -.PHONY : all begin finish end sizebefore sizeafter gccversion \ -build elf hex eep lss sym coff extcoff \ -clean clean_list program debug gdb-config - diff --git a/build/linux/work/hardware/arduino/bootloaders/stk500v2/STK500V2.pnproj b/build/linux/work/hardware/arduino/bootloaders/stk500v2/STK500V2.pnproj deleted file mode 100644 index d935019e1..000000000 --- a/build/linux/work/hardware/arduino/bootloaders/stk500v2/STK500V2.pnproj +++ /dev/null @@ -1 +0,0 @@ - \ No newline at end of file diff --git a/build/linux/work/hardware/arduino/bootloaders/stk500v2/STK500V2.pnps b/build/linux/work/hardware/arduino/bootloaders/stk500v2/STK500V2.pnps deleted file mode 100644 index f85cde5e7..000000000 --- a/build/linux/work/hardware/arduino/bootloaders/stk500v2/STK500V2.pnps +++ /dev/null @@ -1 +0,0 @@ - \ No newline at end of file diff --git a/build/linux/work/hardware/arduino/bootloaders/stk500v2/avrinterruptnames.h b/build/linux/work/hardware/arduino/bootloaders/stk500v2/avrinterruptnames.h deleted file mode 100644 index 0ae80f925..000000000 --- a/build/linux/work/hardware/arduino/bootloaders/stk500v2/avrinterruptnames.h +++ /dev/null @@ -1,742 +0,0 @@ -//************************************************************************************************** -//* -//* interrupt vector names -//* -//* It is important to note that the vector numbers listed here -//* are the ATMEL documentation numbers. The Arduino numbers are 1 less -//* This is because the Atmel docs start numbering the interrupts at 1 -//* when it is actually vector #0 in the table. -//************************************************************************************************** -//* Jun 1, 2010 Added support for ATmega1281 -//* Jun 30, 2010 Putting in more ifdefs to conserve space -//* Jul 3, 2010 More #ifdefs to conserve space and testing on most of my boards -//* Jul 4, 2010 Started using vector defs for #ifdefs as defined in -//* Jul 13, 2010 Added support for __AVR_ATmega128__ -//* Aug 26, 2010 Added support for __AVR_ATmega2561__ -//************************************************************************************************** - -//#include "avrinterruptnames.h" - -//************************************************************************************************** -//* this defines the interrupt vectors and allows us to compile ONLY those strings that are actually -//* in the target CPU. This way we do not have to keep making changes based on cpu, it will be -//* automatic even if we add a new CPU -#ifndef _AVR_IO_H_ - #include -#endif -//************************************************************************************************** - -#ifdef __MWERKS__ - #define prog_char char - #define PGM_P char * -#endif - - prog_char gAvrInt_RESET[] PROGMEM = "RESET"; -#ifdef INT0_vect - prog_char gAvrInt_INT0[] PROGMEM = "INT0"; -#endif -#ifdef INT1_vect - prog_char gAvrInt_INT1[] PROGMEM = "INT1"; -#endif -#ifdef INT2_vect - prog_char gAvrInt_INT2[] PROGMEM = "INT2"; -#endif -#ifdef INT3_vect - prog_char gAvrInt_INT3[] PROGMEM = "INT3"; -#endif -#ifdef INT4_vect - prog_char gAvrInt_INT4[] PROGMEM = "INT4"; -#endif -#ifdef INT5_vect - prog_char gAvrInt_INT5[] PROGMEM = "INT5"; -#endif -#ifdef INT6_vect - prog_char gAvrInt_INT6[] PROGMEM = "INT6"; -#endif -#ifdef INT7_vect - prog_char gAvrInt_INT7[] PROGMEM = "INT7"; -#endif -#ifdef PCINT0_vect - prog_char gAvrInt_PCINT0[] PROGMEM = "PCINT0"; -#endif -#ifdef PCINT1_vect - prog_char gAvrInt_PCINT1[] PROGMEM = "PCINT1"; -#endif -#ifdef PCINT2_vect - prog_char gAvrInt_PCINT2[] PROGMEM = "PCINT2"; -#endif -#ifdef PCINT3_vect - prog_char gAvrInt_PCINT3[] PROGMEM = "PCINT3"; -#endif -#ifdef WDT_vect - prog_char gAvrInt_WDT[] PROGMEM = "WDT"; -#endif -#ifdef TIMER0_COMP_vect - prog_char gAvrInt_TIMER0_COMP[] PROGMEM = "TIMER0 COMP"; -#endif -#ifdef TIMER0_COMPA_vect - prog_char gAvrInt_TIMER0_COMPA[] PROGMEM = "TIMER0 COMPA"; -#endif -#ifdef TIMER0_COMPB_vect - prog_char gAvrInt_TIMER0_COMPB[] PROGMEM = "TIMER0 COMPB"; -#endif -#ifdef TIMER0_OVF_vect - prog_char gAvrInt_TIMER0_OVF[] PROGMEM = "TIMER0 OVF"; -#endif -#ifdef TIMER1_CAPT_vect - prog_char gAvrInt_TIMER1_CAPT[] PROGMEM = "TIMER1 CAPT"; -#endif -#ifdef TIMER1_COMPA_vect - prog_char gAvrInt_TIMER1_COMPA[] PROGMEM = "TIMER1 COMPA"; -#endif -#ifdef TIMER1_COMPB_vect - prog_char gAvrInt_TIMER1_COMPB[] PROGMEM = "TIMER1 COMPB"; -#endif -#ifdef TIMER1_COMPC_vect - prog_char gAvrInt_TIMER1_COMPC[] PROGMEM = "TIMER1 COMPC"; -#endif -#ifdef TIMER1_OVF_vect - prog_char gAvrInt_TIMER1_OVF[] PROGMEM = "TIMER1 OVF"; -#endif -#ifdef TIMER2_COMP_vect - prog_char gAvrInt_TIMER2_COMP[] PROGMEM = "TIMER2 COMP"; -#endif -#ifdef TIMER2_COMPA_vect - prog_char gAvrInt_TIMER2_COMPA[] PROGMEM = "TIMER2 COMPA"; -#endif -#ifdef TIMER2_COMPB_vect - prog_char gAvrInt_TIMER2_COMPB[] PROGMEM = "TIMER2 COMPB"; -#endif -#ifdef TIMER2_OVF_vect - prog_char gAvrInt_TIMER2_OVF[] PROGMEM = "TIMER2 OVF"; -#endif -#ifdef TIMER3_CAPT_vect - prog_char gAvrInt_TIMER3_CAPT[] PROGMEM = "TIMER3 CAPT"; -#endif -#ifdef TIMER3_COMPA_vect - prog_char gAvrInt_TIMER3_COMPA[] PROGMEM = "TIMER3 COMPA"; -#endif -#ifdef TIMER3_COMPB_vect - prog_char gAvrInt_TIMER3_COMPB[] PROGMEM = "TIMER3 COMPB"; -#endif -#ifdef TIMER3_COMPC_vect - prog_char gAvrInt_TIMER3_COMPC[] PROGMEM = "TIMER3 COMPC"; -#endif -#ifdef TIMER3_OVF_vect - prog_char gAvrInt_TIMER3_OVF[] PROGMEM = "TIMER3 OVF"; -#endif -#ifdef TIMER4_CAPT_vect - prog_char gAvrInt_TIMER4_CAPT[] PROGMEM = "TIMER4 CAPT"; -#endif -#ifdef TIMER4_COMPA_vect - prog_char gAvrInt_TIMER4_COMPA[] PROGMEM = "TIMER4 COMPA"; -#endif -#ifdef TIMER4_COMPB_vect - prog_char gAvrInt_TIMER4_COMPB[] PROGMEM = "TIMER4 COMPB"; -#endif -#ifdef TIMER4_COMPC_vect - prog_char gAvrInt_TIMER4_COMPC[] PROGMEM = "TIMER4 COMPC"; -#endif -#ifdef TIMER4_COMPD_vect - prog_char gAvrInt_TIMER4_COMPD[] PROGMEM = "TIMER4 COMPD"; -#endif -#ifdef TIMER4_OVF_vect - prog_char gAvrInt_TIMER4_OVF[] PROGMEM = "TIMER4 OVF"; -#endif -#ifdef TIMER4_FPF_vect - prog_char gAvrInt_TIMER4_FPF[] PROGMEM = "TIMER4 Fault Protection"; -#endif -#ifdef TIMER5_CAPT_vect - prog_char gAvrInt_TIMER5_CAPT[] PROGMEM = "TIMER5 CAPT"; -#endif -#ifdef TIMER5_COMPA_vect - prog_char gAvrInt_TIMER5_COMPA[] PROGMEM = "TIMER5 COMPA"; -#endif -#ifdef TIMER5_COMPB_vect - prog_char gAvrInt_TIMER5_COMPB[] PROGMEM = "TIMER5 COMPB"; -#endif -#ifdef TIMER5_COMPC_vect - prog_char gAvrInt_TIMER5_COMPC[] PROGMEM = "TIMER5 COMPC"; -#endif -#ifdef TIMER5_OVF_vect - prog_char gAvrInt_TIMER5_OVF[] PROGMEM = "TIMER5 OVF"; -#endif - -//* when there is only 1 usart -#if defined(USART_RX_vect) || defined(USART_RXC_vect) - prog_char gAvrInt_USART_RX[] PROGMEM = "USART RX"; -#endif -#if defined(USART_UDRE_vect) - prog_char gAvrInt_USART_UDRE[] PROGMEM = "USART UDRE"; -#endif -#if defined(USART_TX_vect) || defined(USART_TXC_vect) - prog_char gAvrInt_USART_TX[] PROGMEM = "USART TX"; -#endif - - -//* usart 0 -#if defined(USART0_RX_vect) - prog_char gAvrInt_USART0_RX[] PROGMEM = "USART0 RX"; -#endif -#if defined(USART0_UDRE_vect) - prog_char gAvrInt_USART0_UDRE[] PROGMEM = "USART0 UDRE"; -#endif -#if defined(USART0_TX_vect) - prog_char gAvrInt_USART0_TX[] PROGMEM = "USART0 TX"; -#endif - - -//* usart 1 -#ifdef USART1_RX_vect - prog_char gAvrInt_USART1_RX[] PROGMEM = "USART1 RX"; -#endif -#ifdef USART1_UDRE_vect - prog_char gAvrInt_USART1_UDRE[] PROGMEM = "USART1 UDRE"; -#endif -#ifdef USART1_TX_vect - prog_char gAvrInt_USART1_TX[] PROGMEM = "USART1 TX"; -#endif - -//* usart 2 -#ifdef USART2_RX_vect - prog_char gAvrInt_USART2_RX[] PROGMEM = "USART2 RX"; -#endif -#ifdef USART2_UDRE_vect - prog_char gAvrInt_USART2_UDRE[] PROGMEM = "USART2 UDRE"; -#endif -#ifdef USART2_TX_vect - prog_char gAvrInt_USART2_TX[] PROGMEM = "USART2 TX"; -#endif - -//* usart 3 -#ifdef USART3_RX_vect - prog_char gAvrInt_USART3_RX[] PROGMEM = "USART3 RX"; -#endif -#ifdef USART3_UDRE_vect - prog_char gAvrInt_USART3_UDRE[] PROGMEM = "USART3 UDRE"; -#endif -#ifdef USART3_TX_vect - prog_char gAvrInt_USART3_TX[] PROGMEM = "USART3 TX"; -#endif -#ifdef SPI_STC_vect - prog_char gAvrInt_SPI_STC[] PROGMEM = "SPI STC"; -#endif -#ifdef ADC_vect - prog_char gAvrInt_ADC[] PROGMEM = "ADC"; -#endif -#if defined(ANALOG_COMP_vect) || defined(ANA_COMP_vect) - prog_char gAvrInt_ANALOG_COMP[] PROGMEM = "ANALOG COMP"; -#endif -#if defined(EE_READY_vect) || defined(EE_RDY_vect) - prog_char gAvrInt_EE_READY[] PROGMEM = "EE READY"; -#endif -#ifdef TWI_vect - prog_char gAvrInt_TWI[] PROGMEM = "TWI"; -#endif -#if defined(SPM_READY_vect) || defined(SPM_RDY_vect) - prog_char gAvrInt_SPM_READY[] PROGMEM = "SPM READY"; -#endif -#ifdef USI_START_vect - prog_char gAvrInt_USI_START[] PROGMEM = "USI START"; -#endif -#ifdef USI_OVERFLOW_vect - prog_char gAvrInt_USI_OVERFLOW[] PROGMEM = "USI OVERFLOW"; -#endif -#ifdef USB_GEN_vect - prog_char gAvrInt_USB_General[] PROGMEM = "USB General"; -#endif -#ifdef USB_COM_vect - prog_char gAvrInt_USB_Endpoint[] PROGMEM = "USB Endpoint"; -#endif - -#ifdef LCD_vect - prog_char gAvrInt_LCD_StartFrame[] PROGMEM = "LCD Start of Frame"; -#endif - - -//************************************************************************************************** -//* these do not have vector defs and have to be done by CPU type -#if defined(__AVR_ATmega645__ ) || defined(__AVR_ATmega1281__) || defined(__AVR_ATmega2561__) - prog_char gAvrInt_NOT_USED[] PROGMEM = "NOT_USED"; -#endif -#if defined(__AVR_ATmega32U4__) - prog_char gAvrInt_RESERVED[] PROGMEM = "Reserved"; -#endif - - prog_char gAvrInt_END[] PROGMEM = "*"; - - - - - -//************************************************************************************************** -#if defined(__AVR_ATmega168__) || defined(__AVR_ATmega328P__) -#pragma mark __AVR_ATmega168__ / __AVR_ATmega328P__ - -#define _INTERRUPT_NAMES_DEFINED_ - -PGM_P gInterruptNameTable[] PROGMEM = -{ - - gAvrInt_RESET, // 1 - gAvrInt_INT0, // 2 - gAvrInt_INT1, // 3 - gAvrInt_PCINT0, // 4 - gAvrInt_PCINT1, // 5 - gAvrInt_PCINT2, // 6 - gAvrInt_WDT, // 7 - gAvrInt_TIMER2_COMPA, // 8 - gAvrInt_TIMER2_COMPB, // 9 - gAvrInt_TIMER2_OVF, // 10 - gAvrInt_TIMER1_CAPT, // 11 - gAvrInt_TIMER1_COMPA, // 12 - gAvrInt_TIMER1_COMPB, // 13 - gAvrInt_TIMER1_OVF, // 14 - gAvrInt_TIMER0_COMPA, // 15 - gAvrInt_TIMER0_COMPB, // 16 - gAvrInt_TIMER0_OVF, // 17 - gAvrInt_SPI_STC, // 18 - gAvrInt_USART_RX, // 19 - gAvrInt_USART_UDRE, // 20 - gAvrInt_USART_TX, // 21 - gAvrInt_ADC, // 22 - gAvrInt_EE_READY, // 23 - gAvrInt_ANALOG_COMP, // 24 - gAvrInt_TWI, // 25 - gAvrInt_SPM_READY, // 26 -}; - -#endif - -//************************************************************************************************** -#pragma mark __AVR_ATmega169__ -#if defined(__AVR_ATmega169__) - -#define _INTERRUPT_NAMES_DEFINED_ - -PGM_P gInterruptNameTable[] PROGMEM = -{ - - gAvrInt_RESET, // 1 - gAvrInt_INT0, // 2 - gAvrInt_PCINT0, // 3 - gAvrInt_PCINT1, // 4 - gAvrInt_TIMER2_COMP, // 5 - gAvrInt_TIMER2_OVF, // 6 - gAvrInt_TIMER1_CAPT, // 7 - gAvrInt_TIMER1_COMPA, // 8 - gAvrInt_TIMER1_COMPB, // 9 - gAvrInt_TIMER1_OVF, // 10 - gAvrInt_TIMER0_COMP, // 11 - gAvrInt_TIMER0_OVF, // 12 - gAvrInt_SPI_STC, // 13 - gAvrInt_USART0_RX, // 14 - gAvrInt_USART0_UDRE, // 15 - gAvrInt_USART0_TX, // 16 - gAvrInt_USI_START, // 17 - gAvrInt_USI_OVERFLOW, // 18 - gAvrInt_ANALOG_COMP, // 19 - gAvrInt_ADC, // 20 - gAvrInt_EE_READY, // 21 - gAvrInt_SPM_READY, // 22 - gAvrInt_LCD_StartFrame, // 23 - -}; - -#endif - - -//************************************************************************************************** -#if defined(__AVR_ATmega640__) || defined(__AVR_ATmega1280__) || defined(__AVR_ATmega1281__) || defined(__AVR_ATmega2560__) || defined(__AVR_ATmega2561__) -#pragma mark __AVR_ATmega640__ __AVR_ATmega1280__ __AVR_ATmega1281__ __AVR_ATmega2560__ __AVR_ATmega2561__ - -#define _INTERRUPT_NAMES_DEFINED_ - -PGM_P gInterruptNameTable[] PROGMEM = -{ - - gAvrInt_RESET, // 1 - gAvrInt_INT0, // 2 - gAvrInt_INT1, // 3 - gAvrInt_INT2, // 4 - gAvrInt_INT3, // 5 - gAvrInt_INT4, // 6 - gAvrInt_INT5, // 7 - gAvrInt_INT6, // 8 - gAvrInt_INT7, // 9 - gAvrInt_PCINT0, // 10 - gAvrInt_PCINT1, // 11 -#if defined(__AVR_ATmega640__) || defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__) - gAvrInt_PCINT2, // 12 -#else - gAvrInt_NOT_USED, // 12 -#endif - gAvrInt_WDT, // 13 - gAvrInt_TIMER2_COMPA, // 14 - gAvrInt_TIMER2_COMPB, // 15 - gAvrInt_TIMER2_OVF, // 16 - gAvrInt_TIMER1_CAPT, // 17 - gAvrInt_TIMER1_COMPA, // 18 - gAvrInt_TIMER1_COMPB, // 19 - gAvrInt_TIMER1_COMPC, // 20 - gAvrInt_TIMER1_OVF, // 21 - gAvrInt_TIMER0_COMPA, // 22 - gAvrInt_TIMER0_COMPB, // 23 - gAvrInt_TIMER0_OVF, // 24 - gAvrInt_SPI_STC, // 25 - - gAvrInt_USART0_RX, // 26 - gAvrInt_USART0_UDRE, // 27 - gAvrInt_USART0_TX, // 28 - gAvrInt_ANALOG_COMP, // 29 - gAvrInt_ADC, // 30 - gAvrInt_EE_READY, // 31 - - gAvrInt_TIMER3_CAPT, // 32 - gAvrInt_TIMER3_COMPA, // 33 - gAvrInt_TIMER3_COMPB, // 34 - gAvrInt_TIMER3_COMPC, // 35 - gAvrInt_TIMER3_OVF, // 36 - - gAvrInt_USART1_RX, // 37 - gAvrInt_USART1_UDRE, // 38 - gAvrInt_USART1_TX, // 39 - gAvrInt_TWI, // 40 - gAvrInt_SPM_READY, // 41 -#if defined(__AVR_ATmega640__) || defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__) - gAvrInt_TIMER4_CAPT, // 42 -#else - gAvrInt_NOT_USED, // 42 -#endif - gAvrInt_TIMER4_COMPA, // 43 - gAvrInt_TIMER4_COMPB, // 44 - gAvrInt_TIMER4_COMPC, // 45 - gAvrInt_TIMER4_OVF, // 46 -#if defined(__AVR_ATmega640__) || defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__) - gAvrInt_TIMER5_CAPT, // 47 -#else - gAvrInt_NOT_USED, // 47 -#endif - gAvrInt_TIMER5_COMPA, // 48 - gAvrInt_TIMER5_COMPB, // 49 - gAvrInt_TIMER5_COMPC, // 50 - gAvrInt_TIMER5_OVF, // 51 - -#if defined(__AVR_ATmega640__) || defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__) - gAvrInt_USART2_RX, // 52 - gAvrInt_USART2_UDRE, // 53 - gAvrInt_USART2_TX, // 54 - - gAvrInt_USART3_RX, // 55 - gAvrInt_USART3_UDRE, // 56 - gAvrInt_USART3_TX, // 57 -#endif - -}; - -#endif - - - -//************************************************************************************************** -#if defined(__AVR_ATmega324P__ ) || defined(__AVR_ATmega644__ ) || defined(__AVR_ATmega644P__) || defined(__AVR_ATmega1284P__) -#pragma mark __AVR_ATmega324P__ __AVR_ATmega644__ __AVR_ATmega644P__ __AVR_ATmega1284P__ - -#define _INTERRUPT_NAMES_DEFINED_ - -PGM_P gInterruptNameTable[] PROGMEM = -{ - - gAvrInt_RESET, // 1 - gAvrInt_INT0, // 2 - gAvrInt_INT1, // 3 - gAvrInt_INT2, // 4 - gAvrInt_PCINT0, // 5 - gAvrInt_PCINT1, // 6 - gAvrInt_PCINT2, // 7 - gAvrInt_PCINT3, // 8 - gAvrInt_WDT, // 9 - gAvrInt_TIMER2_COMPA, // 10 - gAvrInt_TIMER2_COMPB, // 11 - gAvrInt_TIMER2_OVF, // 12 - gAvrInt_TIMER1_CAPT, // 13 - gAvrInt_TIMER1_COMPA, // 14 - gAvrInt_TIMER1_COMPB, // 15 - gAvrInt_TIMER1_OVF, // 16 - gAvrInt_TIMER0_COMPA, // 17 - gAvrInt_TIMER0_COMPB, // 18 - gAvrInt_TIMER0_OVF, // 19 - gAvrInt_SPI_STC, // 20 - gAvrInt_USART0_RX, // 21 - gAvrInt_USART0_UDRE, // 22 - gAvrInt_USART0_TX, // 23 - gAvrInt_ANALOG_COMP, // 24 - gAvrInt_ADC, // 25 - gAvrInt_EE_READY, // 26 - gAvrInt_TWI, // 27 - gAvrInt_SPM_READY, // 28 - -#if defined(__AVR_ATmega324P__ ) || defined(__AVR_ATmega644P__) - gAvrInt_USART1_RX, // 29 - gAvrInt_USART1_UDRE, // 30 - gAvrInt_USART1_TX, // 31 -#endif - -}; - - -#endif - -//************************************************************************************************** -#if defined(__AVR_ATmega645__ ) -#pragma mark __AVR_ATmega645__ - -#define _INTERRUPT_NAMES_DEFINED_ - -PGM_P gInterruptNameTable[] PROGMEM = -{ - - gAvrInt_RESET, // 1 - gAvrInt_INT0, // 2 - gAvrInt_PCINT0, // 3 - gAvrInt_PCINT1, // 4 - gAvrInt_TIMER2_COMP, // 5 - gAvrInt_TIMER2_OVF, // 6 - gAvrInt_TIMER1_CAPT, // 7 - gAvrInt_TIMER1_COMPA, // 8 - gAvrInt_TIMER1_COMPB, // 9 - gAvrInt_TIMER1_OVF, // 10 - gAvrInt_TIMER0_COMP, // 11 - gAvrInt_TIMER0_OVF, // 12 - gAvrInt_SPI_STC, // 13 - gAvrInt_USART0_RX, // 14 - gAvrInt_USART0_UDRE, // 15 - gAvrInt_USART0_TX, // 16 - gAvrInt_USI_START, // 17 - gAvrInt_USI_OVERFLOW, // 18 - gAvrInt_ANALOG_COMP, // 19 - gAvrInt_ADC, // 20 - gAvrInt_EE_READY, // 21 - gAvrInt_SPM_READY, // 22 - gAvrInt_NOT_USED, // 23 - -#if defined(__AVR_ATmega3250__) || defined(__AVR_ATmega6450__) - gAvrInt_PCINT2, // 24 - gAvrInt_PCINT3, // 25 -#endif -}; - - -#endif - - -//************************************************************************************************** -#if defined(__AVR_ATmega32__ ) -#pragma mark __AVR_ATmega32__ - -#define _INTERRUPT_NAMES_DEFINED_ - -PGM_P gInterruptNameTable[] PROGMEM = -{ - - gAvrInt_RESET, // 1 - gAvrInt_INT0, // 2 - gAvrInt_INT1, // 3 - gAvrInt_INT2, // 4 - gAvrInt_TIMER2_COMP, // 5 - gAvrInt_TIMER2_OVF, // 6 - gAvrInt_TIMER1_CAPT, // 7 - gAvrInt_TIMER1_COMPA, // 8 - gAvrInt_TIMER1_COMPB, // 9 - gAvrInt_TIMER1_OVF, // 10 - gAvrInt_TIMER0_COMP, // 11 - gAvrInt_TIMER0_OVF, // 12 - gAvrInt_SPI_STC, // 13 - gAvrInt_USART_RX, // 14 - gAvrInt_USART_UDRE, // 15 - gAvrInt_USART_TX, // 16 - gAvrInt_ADC, // 17 - gAvrInt_EE_READY, // 18 - gAvrInt_ANALOG_COMP, // 19 - gAvrInt_TWI, // 20 - gAvrInt_SPM_READY, // 21 - -}; - - -#endif - -//************************************************************************************************** -#if defined(__AVR_ATmega32U4__) -#pragma mark __AVR_ATmega32U4__ -//* teensy 2.0 -//* http://www.pjrc.com/teensy/pinout.html -#define _INTERRUPT_NAMES_DEFINED_ - - -PGM_P gInterruptNameTable[] PROGMEM = -{ - - gAvrInt_RESET, // 1 - gAvrInt_INT0, // 2 - gAvrInt_INT1, // 3 - gAvrInt_INT2, // 4 - gAvrInt_INT3, // 5 - gAvrInt_RESERVED, // 6 - gAvrInt_RESERVED, // 7 - gAvrInt_INT6, // 8 - gAvrInt_RESERVED, // 9 - gAvrInt_PCINT0, // 10 - gAvrInt_USB_General, // 11 - gAvrInt_USB_Endpoint, // 12 - gAvrInt_WDT, // 13 - gAvrInt_RESERVED, // 14 - gAvrInt_RESERVED, // 15 - gAvrInt_RESERVED, // 16 - gAvrInt_TIMER1_CAPT, // 17 - gAvrInt_TIMER1_COMPA, // 18 - gAvrInt_TIMER1_COMPB, // 19 - gAvrInt_TIMER1_COMPC, // 20 - gAvrInt_TIMER1_OVF, // 21 - gAvrInt_TIMER0_COMPA, // 22 - gAvrInt_TIMER0_COMPB, // 23 - gAvrInt_TIMER0_OVF, // 24 - gAvrInt_SPI_STC, // 25 - - gAvrInt_USART1_RX, // 26 - gAvrInt_USART1_UDRE, // 27 - gAvrInt_USART1_TX, // 28 - gAvrInt_ANALOG_COMP, // 29 - - gAvrInt_ADC, // 30 - gAvrInt_EE_READY, // 31 - - gAvrInt_TIMER3_CAPT, // 32 - gAvrInt_TIMER3_COMPA, // 33 - gAvrInt_TIMER3_COMPB, // 34 - gAvrInt_TIMER3_COMPC, // 35 - gAvrInt_TIMER3_OVF, // 36 - gAvrInt_TWI, // 37 - gAvrInt_SPM_READY, // 38 - - gAvrInt_TIMER4_COMPA, // 39 - gAvrInt_TIMER4_COMPB, // 40 - gAvrInt_TIMER4_COMPD, // 41 - gAvrInt_TIMER4_OVF, // 42 - gAvrInt_TIMER4_FPF, // 43 -}; - -#endif - -//************************************************************************************************** -#if defined(__AVR_AT90USB1286__) -#pragma mark __AVR_AT90USB1286__ -//* teensy++ 2.0 -//* http://www.pjrc.com/teensy/pinout.html -#define _INTERRUPT_NAMES_DEFINED_ - - -PGM_P gInterruptNameTable[] PROGMEM = -{ - - gAvrInt_RESET, // 1 - gAvrInt_INT0, // 2 - gAvrInt_INT1, // 3 - gAvrInt_INT2, // 4 - gAvrInt_INT3, // 5 - gAvrInt_INT4, // 6 - gAvrInt_INT5, // 7 - gAvrInt_INT6, // 8 - gAvrInt_INT7, // 9 - gAvrInt_PCINT0, // 10 - gAvrInt_USB_General, // 11 - gAvrInt_USB_Endpoint, // 12 - gAvrInt_WDT, // 13 - gAvrInt_TIMER2_COMPA, // 14 - gAvrInt_TIMER2_COMPB, // 15 - gAvrInt_TIMER2_OVF, // 16 - gAvrInt_TIMER1_CAPT, // 17 - gAvrInt_TIMER1_COMPA, // 18 - gAvrInt_TIMER1_COMPB, // 19 - gAvrInt_TIMER1_COMPC, // 20 - gAvrInt_TIMER1_OVF, // 21 - gAvrInt_TIMER0_COMPA, // 22 - gAvrInt_TIMER0_COMPB, // 23 - gAvrInt_TIMER0_OVF, // 24 - gAvrInt_SPI_STC, // 25 - - gAvrInt_USART1_RX, // 26 - gAvrInt_USART1_UDRE, // 27 - gAvrInt_USART1_TX, // 28 - gAvrInt_ANALOG_COMP, // 29 - - gAvrInt_ADC, // 30 - gAvrInt_EE_READY, // 31 - - gAvrInt_TIMER3_CAPT, // 32 - gAvrInt_TIMER3_COMPA, // 33 - gAvrInt_TIMER3_COMPB, // 34 - gAvrInt_TIMER3_COMPC, // 35 - gAvrInt_TIMER3_OVF, // 36 - gAvrInt_TWI, // 37 - gAvrInt_SPM_READY, // 38 - -}; - -#endif - - - - -//************************************************************************************************** -#if defined(__AVR_ATmega128__) -#pragma mark __AVR_ATmega128__ -#define _INTERRUPT_NAMES_DEFINED_ - - -PGM_P gInterruptNameTable[] PROGMEM = -{ - - gAvrInt_RESET, // 1 - gAvrInt_INT0, // 2 - gAvrInt_INT1, // 3 - gAvrInt_INT2, // 4 - gAvrInt_INT3, // 5 - gAvrInt_INT4, // 6 - gAvrInt_INT5, // 7 - gAvrInt_INT6, // 8 - gAvrInt_INT7, // 9 - gAvrInt_TIMER2_COMP, // 10 - gAvrInt_TIMER2_OVF, // 11 - gAvrInt_TIMER1_CAPT, // 12 - gAvrInt_TIMER1_COMPA, // 13 - gAvrInt_TIMER1_COMPB, // 14 - gAvrInt_TIMER1_OVF, // 15 - gAvrInt_TIMER0_COMP, // 16 - gAvrInt_TIMER0_OVF, // 17 - gAvrInt_SPI_STC, // 18 - gAvrInt_USART0_RX, // 19 - gAvrInt_USART0_UDRE, // 20 - gAvrInt_USART0_TX, // 21 - gAvrInt_ADC, // 22 - gAvrInt_EE_READY, // 23 - gAvrInt_ANALOG_COMP, // 24 - gAvrInt_TIMER1_COMPC, // 25 - gAvrInt_TIMER3_CAPT, // 26 - gAvrInt_TIMER3_COMPA, // 27 - gAvrInt_TIMER3_COMPB, // 28 - gAvrInt_TIMER3_COMPC, // 29 - gAvrInt_TIMER3_OVF, // 30 - gAvrInt_USART1_RX, // 31 - gAvrInt_USART1_UDRE, // 32 - gAvrInt_USART1_TX, // 33 - gAvrInt_TWI, // 34 - gAvrInt_SPM_READY, // 35 - -}; - -#endif - -#if !defined(_INTERRUPT_NAMES_DEFINED_) - #warning No interrupt string defs for this cpu -#endif \ No newline at end of file diff --git a/build/linux/work/hardware/arduino/bootloaders/stk500v2/command.h b/build/linux/work/hardware/arduino/bootloaders/stk500v2/command.h deleted file mode 100644 index 03b1b38af..000000000 --- a/build/linux/work/hardware/arduino/bootloaders/stk500v2/command.h +++ /dev/null @@ -1,114 +0,0 @@ -//**** ATMEL AVR - A P P L I C A T I O N N O T E ************************ -//* -//* Title: AVR068 - STK500 Communication Protocol -//* Filename: command.h -//* Version: 1.0 -//* Last updated: 31.01.2005 -//* -//* Support E-mail: avr@atmel.com -//* -//************************************************************************** - -// *****************[ STK message constants ]*************************** - -#define MESSAGE_START 0x1B //= ESC = 27 decimal -#define TOKEN 0x0E - -// *****************[ STK general command constants ]************************** - -#define CMD_SIGN_ON 0x01 -#define CMD_SET_PARAMETER 0x02 -#define CMD_GET_PARAMETER 0x03 -#define CMD_SET_DEVICE_PARAMETERS 0x04 -#define CMD_OSCCAL 0x05 -#define CMD_LOAD_ADDRESS 0x06 -#define CMD_FIRMWARE_UPGRADE 0x07 - - -// *****************[ STK ISP command constants ]****************************** - -#define CMD_ENTER_PROGMODE_ISP 0x10 -#define CMD_LEAVE_PROGMODE_ISP 0x11 -#define CMD_CHIP_ERASE_ISP 0x12 -#define CMD_PROGRAM_FLASH_ISP 0x13 -#define CMD_READ_FLASH_ISP 0x14 -#define CMD_PROGRAM_EEPROM_ISP 0x15 -#define CMD_READ_EEPROM_ISP 0x16 -#define CMD_PROGRAM_FUSE_ISP 0x17 -#define CMD_READ_FUSE_ISP 0x18 -#define CMD_PROGRAM_LOCK_ISP 0x19 -#define CMD_READ_LOCK_ISP 0x1A -#define CMD_READ_SIGNATURE_ISP 0x1B -#define CMD_READ_OSCCAL_ISP 0x1C -#define CMD_SPI_MULTI 0x1D - -// *****************[ STK PP command constants ]******************************* - -#define CMD_ENTER_PROGMODE_PP 0x20 -#define CMD_LEAVE_PROGMODE_PP 0x21 -#define CMD_CHIP_ERASE_PP 0x22 -#define CMD_PROGRAM_FLASH_PP 0x23 -#define CMD_READ_FLASH_PP 0x24 -#define CMD_PROGRAM_EEPROM_PP 0x25 -#define CMD_READ_EEPROM_PP 0x26 -#define CMD_PROGRAM_FUSE_PP 0x27 -#define CMD_READ_FUSE_PP 0x28 -#define CMD_PROGRAM_LOCK_PP 0x29 -#define CMD_READ_LOCK_PP 0x2A -#define CMD_READ_SIGNATURE_PP 0x2B -#define CMD_READ_OSCCAL_PP 0x2C - -#define CMD_SET_CONTROL_STACK 0x2D - -// *****************[ STK HVSP command constants ]***************************** - -#define CMD_ENTER_PROGMODE_HVSP 0x30 -#define CMD_LEAVE_PROGMODE_HVSP 0x31 -#define CMD_CHIP_ERASE_HVSP 0x32 -#define CMD_PROGRAM_FLASH_HVSP ` 0x33 -#define CMD_READ_FLASH_HVSP 0x34 -#define CMD_PROGRAM_EEPROM_HVSP 0x35 -#define CMD_READ_EEPROM_HVSP 0x36 -#define CMD_PROGRAM_FUSE_HVSP 0x37 -#define CMD_READ_FUSE_HVSP 0x38 -#define CMD_PROGRAM_LOCK_HVSP 0x39 -#define CMD_READ_LOCK_HVSP 0x3A -#define CMD_READ_SIGNATURE_HVSP 0x3B -#define CMD_READ_OSCCAL_HVSP 0x3C - -// *****************[ STK status constants ]*************************** - -// Success -#define STATUS_CMD_OK 0x00 - -// Warnings -#define STATUS_CMD_TOUT 0x80 -#define STATUS_RDY_BSY_TOUT 0x81 -#define STATUS_SET_PARAM_MISSING 0x82 - -// Errors -#define STATUS_CMD_FAILED 0xC0 -#define STATUS_CKSUM_ERROR 0xC1 -#define STATUS_CMD_UNKNOWN 0xC9 - -// *****************[ STK parameter constants ]*************************** -#define PARAM_BUILD_NUMBER_LOW 0x80 -#define PARAM_BUILD_NUMBER_HIGH 0x81 -#define PARAM_HW_VER 0x90 -#define PARAM_SW_MAJOR 0x91 -#define PARAM_SW_MINOR 0x92 -#define PARAM_VTARGET 0x94 -#define PARAM_VADJUST 0x95 -#define PARAM_OSC_PSCALE 0x96 -#define PARAM_OSC_CMATCH 0x97 -#define PARAM_SCK_DURATION 0x98 -#define PARAM_TOPCARD_DETECT 0x9A -#define PARAM_STATUS 0x9C -#define PARAM_DATA 0x9D -#define PARAM_RESET_POLARITY 0x9E -#define PARAM_CONTROLLER_INIT 0x9F - -// *****************[ STK answer constants ]*************************** - -#define ANSWER_CKSUM_ERROR 0xB0 - diff --git a/build/linux/work/hardware/arduino/bootloaders/stk500v2/stk500boot.c b/build/linux/work/hardware/arduino/bootloaders/stk500v2/stk500boot.c deleted file mode 100644 index 13dec8951..000000000 --- a/build/linux/work/hardware/arduino/bootloaders/stk500v2/stk500boot.c +++ /dev/null @@ -1,1996 +0,0 @@ -/***************************************************************************** -Title: STK500v2 compatible bootloader - Modified for Wiring board ATMega128-16MHz -Author: Peter Fleury http://jump.to/fleury -File: $Id: stk500boot.c,v 1.11 2006/06/25 12:39:17 peter Exp $ -Compiler: avr-gcc 3.4.5 or 4.1 / avr-libc 1.4.3 -Hardware: All AVRs with bootloader support, tested with ATmega8 -License: GNU General Public License - -Modified: Worapoht Kornkaewwattanakul http://www.avride.com -Date: 17 October 2007 -Update: 1st, 29 Dec 2007 : Enable CMD_SPI_MULTI but ignore unused command by return 0x00 byte response.. -Compiler: WINAVR20060421 -Description: add timeout feature like previous Wiring bootloader - -DESCRIPTION: - This program allows an AVR with bootloader capabilities to - read/write its own Flash/EEprom. To enter Programming mode - an input pin is checked. If this pin is pulled low, programming mode - is entered. If not, normal execution is done from $0000 - "reset" vector in Application area. - Size fits into a 1024 word bootloader section - when compiled with avr-gcc 4.1 - (direct replace on Wiring Board without fuse setting changed) - -USAGE: - - Set AVR MCU type and clock-frequency (F_CPU) in the Makefile. - - Set baud rate below (AVRISP only works with 115200 bps) - - compile/link the bootloader with the supplied Makefile - - program the "Boot Flash section size" (BOOTSZ fuses), - for boot-size 1024 words: program BOOTSZ01 - - enable the BOOT Reset Vector (program BOOTRST) - - Upload the hex file to the AVR using any ISP programmer - - Program Boot Lock Mode 3 (program BootLock 11 and BootLock 12 lock bits) // (leave them) - - Reset your AVR while keeping PROG_PIN pulled low // (for enter bootloader by switch) - - Start AVRISP Programmer (AVRStudio/Tools/Program AVR) - - AVRISP will detect the bootloader - - Program your application FLASH file and optional EEPROM file using AVRISP - -Note: - Erasing the device without flashing, through AVRISP GUI button "Erase Device" - is not implemented, due to AVRStudio limitations. - Flash is always erased before programming. - - AVRdude: - Please uncomment #define REMOVE_CMD_SPI_MULTI when using AVRdude. - Comment #define REMOVE_PROGRAM_LOCK_BIT_SUPPORT to reduce code size - Read Fuse Bits and Read/Write Lock Bits is not supported - -NOTES: - Based on Atmel Application Note AVR109 - Self-programming - Based on Atmel Application Note AVR068 - STK500v2 Protocol - -LICENSE: - Copyright (C) 2006 Peter Fleury - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - -*****************************************************************************/ - -//************************************************************************ -//* Edit History -//************************************************************************ -//* Jul 7, 2010 = Mark Sproul msproul@skycharoit.com -//* Jul 7, 2010 Working on mega2560. No Auto-restart -//* Jul 7, 2010 Switched to 8K bytes (4K words) so that we have room for the monitor -//* Jul 8, 2010 Found older version of source that had auto restart, put that code back in -//* Jul 8, 2010 Adding monitor code -//* Jul 11, 2010 Added blinking LED while waiting for download to start -//* Jul 11, 2010 Added EEPROM test -//* Jul 29, 2010 Added recchar_timeout for timing out on bootloading -//* Aug 23, 2010 Added support for atmega2561 -//* Aug 26, 2010 Removed support for BOOT_BY_SWITCH -//************************************************************************ - - - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "command.h" - - -#if defined(_MEGA_BOARD_) || defined(_BOARD_AMBER128_) || defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__) || defined(__AVR_ATmega2561__) - #define ENABLE_MONITOR - static void RunMonitor(void); -#endif - -//#define _DEBUG_SERIAL_ -//#define _DEBUG_WITH_LEDS_ - - -/* - * Uncomment the following lines to save code space - */ -//#define REMOVE_PROGRAM_LOCK_BIT_SUPPORT // disable program lock bits -//#define REMOVE_BOOTLOADER_LED // no LED to show active bootloader -//#define REMOVE_CMD_SPI_MULTI // disable processing of SPI_MULTI commands, Remark this line for AVRDUDE -// - - - -//************************************************************************ -//* LED on pin "PROGLED_PIN" on port "PROGLED_PORT" -//* indicates that bootloader is active -//* PG2 -> LED on Wiring board -//************************************************************************ -#define BLINK_LED_WHILE_WAITING - -#ifdef _MEGA_BOARD_ - #define PROGLED_PORT PORTB - #define PROGLED_DDR DDRB - #define PROGLED_PIN PINB7 -#elif defined( _BOARD_AMBER128_ ) - //* this is for the amber 128 http://www.soc-robotics.com/ - //* onbarod led is PORTE4 - #define PROGLED_PORT PORTD - #define PROGLED_DDR DDRD - #define PROGLED_PIN PINE7 -#elif defined( _CEREBOTPLUS_BOARD_ ) - //* this is for the Cerebot 2560 board - //* onbarod leds are on PORTE4-7 - #define PROGLED_PORT PORTE - #define PROGLED_DDR DDRE - #define PROGLED_PIN PINE7 -#elif defined( _PENGUINO_ ) - //* this is for the Penguino - //* onbarod led is PORTE4 - #define PROGLED_PORT PORTC - #define PROGLED_DDR DDRC - #define PROGLED_PIN PINC6 -#elif defined( _ANDROID_2561_ ) || defined( __AVR_ATmega2561__ ) - //* this is for the Boston Android 2561 - //* onbarod led is PORTE4 - #define PROGLED_PORT PORTA - #define PROGLED_DDR DDRA - #define PROGLED_PIN PINA3 -#else - #define PROGLED_PORT PORTG - #define PROGLED_DDR DDRG - #define PROGLED_PIN PING2 -#endif - - - -/* - * define CPU frequency in Mhz here if not defined in Makefile - */ -#ifndef F_CPU - #define F_CPU 16000000UL -#endif - -/* - * UART Baudrate, AVRStudio AVRISP only accepts 115200 bps - */ - -#ifndef BAUDRATE - #define BAUDRATE 115200 -#endif - -/* - * Enable (1) or disable (0) USART double speed operation - */ -#ifndef UART_BAUDRATE_DOUBLE_SPEED - #if defined (__AVR_ATmega32__) - #define UART_BAUDRATE_DOUBLE_SPEED 0 - #else - #define UART_BAUDRATE_DOUBLE_SPEED 1 - #endif -#endif - -/* - * HW and SW version, reported to AVRISP, must match version of AVRStudio - */ -#define CONFIG_PARAM_BUILD_NUMBER_LOW 0 -#define CONFIG_PARAM_BUILD_NUMBER_HIGH 0 -#define CONFIG_PARAM_HW_VER 0x0F -#define CONFIG_PARAM_SW_MAJOR 2 -#define CONFIG_PARAM_SW_MINOR 0x0A - -/* - * Calculate the address where the bootloader starts from FLASHEND and BOOTSIZE - * (adjust BOOTSIZE below and BOOTLOADER_ADDRESS in Makefile if you want to change the size of the bootloader) - */ -//#define BOOTSIZE 1024 -#if FLASHEND > 0x0F000 - #define BOOTSIZE 8192 -#else - #define BOOTSIZE 2048 -#endif - -#define APP_END (FLASHEND -(2*BOOTSIZE) + 1) - -/* - * Signature bytes are not available in avr-gcc io_xxx.h - */ -#if defined (__AVR_ATmega8__) - #define SIGNATURE_BYTES 0x1E9307 -#elif defined (__AVR_ATmega16__) - #define SIGNATURE_BYTES 0x1E9403 -#elif defined (__AVR_ATmega32__) - #define SIGNATURE_BYTES 0x1E9502 -#elif defined (__AVR_ATmega8515__) - #define SIGNATURE_BYTES 0x1E9306 -#elif defined (__AVR_ATmega8535__) - #define SIGNATURE_BYTES 0x1E9308 -#elif defined (__AVR_ATmega162__) - #define SIGNATURE_BYTES 0x1E9404 -#elif defined (__AVR_ATmega128__) - #define SIGNATURE_BYTES 0x1E9702 -#elif defined (__AVR_ATmega1280__) - #define SIGNATURE_BYTES 0x1E9703 -#elif defined (__AVR_ATmega2560__) - #define SIGNATURE_BYTES 0x1E9801 -#elif defined (__AVR_ATmega2561__) - #define SIGNATURE_BYTES 0x1e9802 -#else - #error "no signature definition for MCU available" -#endif - - -#if defined(__AVR_ATmega8__) || defined(__AVR_ATmega16__) || defined(__AVR_ATmega32__) \ - || defined(__AVR_ATmega8515__) || defined(__AVR_ATmega8535__) - /* ATMega8 with one USART */ - #define UART_BAUD_RATE_LOW UBRRL - #define UART_STATUS_REG UCSRA - #define UART_CONTROL_REG UCSRB - #define UART_ENABLE_TRANSMITTER TXEN - #define UART_ENABLE_RECEIVER RXEN - #define UART_TRANSMIT_COMPLETE TXC - #define UART_RECEIVE_COMPLETE RXC - #define UART_DATA_REG UDR - #define UART_DOUBLE_SPEED U2X - -#elif defined(__AVR_ATmega64__) || defined(__AVR_ATmega128__) || defined(__AVR_ATmega162__) \ - || defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__) || defined(__AVR_ATmega2561__) - /* ATMega with two USART, use UART0 */ - #define UART_BAUD_RATE_LOW UBRR0L - #define UART_STATUS_REG UCSR0A - #define UART_CONTROL_REG UCSR0B - #define UART_ENABLE_TRANSMITTER TXEN0 - #define UART_ENABLE_RECEIVER RXEN0 - #define UART_TRANSMIT_COMPLETE TXC0 - #define UART_RECEIVE_COMPLETE RXC0 - #define UART_DATA_REG UDR0 - #define UART_DOUBLE_SPEED U2X0 -#else - #error "no UART definition for MCU available" -#endif - - - -/* - * Macro to calculate UBBR from XTAL and baudrate - */ -#if defined(__AVR_ATmega32__) && UART_BAUDRATE_DOUBLE_SPEED - #define UART_BAUD_SELECT(baudRate,xtalCpu) ((xtalCpu / 4 / baudRate - 1) / 2) -#elif defined(__AVR_ATmega32__) - #define UART_BAUD_SELECT(baudRate,xtalCpu) ((xtalCpu / 8 / baudRate - 1) / 2) -#elif UART_BAUDRATE_DOUBLE_SPEED - #define UART_BAUD_SELECT(baudRate,xtalCpu) (((float)(xtalCpu))/(((float)(baudRate))*8.0)-1.0+0.5) -#else - #define UART_BAUD_SELECT(baudRate,xtalCpu) (((float)(xtalCpu))/(((float)(baudRate))*16.0)-1.0+0.5) -#endif - - -/* - * States used in the receive state machine - */ -#define ST_START 0 -#define ST_GET_SEQ_NUM 1 -#define ST_MSG_SIZE_1 2 -#define ST_MSG_SIZE_2 3 -#define ST_GET_TOKEN 4 -#define ST_GET_DATA 5 -#define ST_GET_CHECK 6 -#define ST_PROCESS 7 - -/* - * use 16bit address variable for ATmegas with <= 64K flash - */ -#if defined(RAMPZ) - typedef uint32_t address_t; -#else - typedef uint16_t address_t; -#endif - -/* - * function prototypes - */ -static void sendchar(char c); -static unsigned char recchar(void); - -/* - * since this bootloader is not linked against the avr-gcc crt1 functions, - * to reduce the code size, we need to provide our own initialization - */ -void __jumpMain (void) __attribute__ ((naked)) __attribute__ ((section (".init9"))); -#include - -//#define SPH_REG 0x3E -//#define SPL_REG 0x3D - -//***************************************************************************** -void __jumpMain(void) -{ -//* July 17, 2010 Added stack pointer initialzation -//* the first line did not do the job on the ATmega128 - - asm volatile ( ".set __stack, %0" :: "i" (RAMEND) ); - -// ldi r16,high(RAMEND) -// out SPH,r16 ; Set stack pointer to top of RAM - -// asm volatile ( "ldi 16, 0x10"); - asm volatile ( "ldi 16, %0" :: "i" (RAMEND >> 8) ); -// asm volatile ( "out 0x3E,16"); -// asm volatile ( "out %0,16" :: "i" (SPH_REG) ); - asm volatile ( "out %0,16" :: "i" (AVR_STACK_POINTER_HI_ADDR) ); - -// asm volatile ( "ldi 16, 0x00"); - asm volatile ( "ldi 16, %0" :: "i" (RAMEND & 0x0ff) ); -// asm volatile ( "out 0x3d,16"); -// asm volatile ( "out %0,16" :: "i" (SPL_REG) ); - asm volatile ( "out %0,16" :: "i" (AVR_STACK_POINTER_LO_ADDR) ); - - - - asm volatile ( "clr __zero_reg__" ); // GCC depends on register r1 set to 0 - asm volatile ( "out %0, __zero_reg__" :: "I" (_SFR_IO_ADDR(SREG)) ); // set SREG to 0 -// asm volatile ( "rjmp main"); // jump to main() - asm volatile ( "jmp main"); // jump to main() -} - - -//***************************************************************************** -void delay_ms(unsigned int timedelay) -{ - unsigned int i; - for (i=0;i> 1) -//***************************************************************************** -static unsigned char recchar_timeout(void) -{ -uint32_t count = 0; - - while (!(UART_STATUS_REG & (1 << UART_RECEIVE_COMPLETE))) - { - // wait for data - count++; - if (count > MAX_TIME_COUNT) - { - unsigned int data; - #if (FLASHEND > 0x0FFFF) - data = pgm_read_word_far(0); //* get the first word of the user program - #else - data = pgm_read_word_near(0); //* get the first word of the user program - #endif - if (data != 0xffff) //* make sure its valid before jumping to it. - { - asm volatile( - "clr r30 \n\t" - "clr r31 \n\t" - "ijmp \n\t" - ); - } - count = 0; - } - } - return UART_DATA_REG; -} - - - -//***************************************************************************** -int main(void) -{ - address_t address = 0; - address_t eraseAddress = 0; - unsigned char msgParseState; - unsigned int ii = 0; - unsigned char checksum = 0; - unsigned char seqNum = 0; - unsigned int msgLength = 0; - unsigned char msgBuffer[285]; - unsigned char c, *p; - unsigned char isLeave = 0; - - unsigned long boot_timeout; - unsigned long boot_timer; - unsigned int boot_state; -#ifdef ENABLE_MONITOR - unsigned int exPointCntr = 0; -#endif - - - boot_timer = 0; - boot_state = 0; - -#ifdef BLINK_LED_WHILE_WAITING - boot_timeout = 20000; //* should be about 1 second -// boot_timeout = 170000; -#else - boot_timeout = 3500000; // 7 seconds , approx 2us per step when optimize "s" -#endif - /* - * Branch to bootloader or application code ? - */ - -#ifndef REMOVE_BOOTLOADER_LED - /* PROG_PIN pulled low, indicate with LED that bootloader is active */ - PROGLED_DDR |= (1< boot_timeout) - { - boot_state = 1; // (after ++ -> boot_state=2 bootloader timeout, jump to main 0x00000 ) - } - #ifdef BLINK_LED_WHILE_WAITING - if ((boot_timer % 7000) == 0) - { - //* toggle the LED - PROGLED_PORT ^= (1<>16) & 0x000000FF; - else if ( signatureIndex == 1 ) - answerByte = (SIGNATURE_BYTES >> 8) & 0x000000FF; - else - answerByte = SIGNATURE_BYTES & 0x000000FF; - } - else if ( msgBuffer[4] & 0x50 ) - { - answerByte = 0; //read fuse/lock bits not implemented, return dummy value - } - else - { - answerByte = 0; // for all others command are not implemented, return dummy value for AVRDUDE happy - // flag = 1; // Remark this line for AVRDUDE - } - if ( !flag ) - { - msgLength = 7; - msgBuffer[1] = STATUS_CMD_OK; - msgBuffer[2] = 0; - msgBuffer[3] = msgBuffer[4]; - msgBuffer[4] = 0; - msgBuffer[5] = answerByte; - msgBuffer[6] = STATUS_CMD_OK; - } - } - break; - #endif - case CMD_SIGN_ON: - msgLength = 11; - msgBuffer[1] = STATUS_CMD_OK; - msgBuffer[2] = 8; - msgBuffer[3] = 'A'; - msgBuffer[4] = 'V'; - msgBuffer[5] = 'R'; - msgBuffer[6] = 'I'; - msgBuffer[7] = 'S'; - msgBuffer[8] = 'P'; - msgBuffer[9] = '_'; - msgBuffer[10] = '2'; - break; - - case CMD_GET_PARAMETER: - { - unsigned char value; - - switch(msgBuffer[1]) - { - case PARAM_BUILD_NUMBER_LOW: - value = CONFIG_PARAM_BUILD_NUMBER_LOW; - break; - case PARAM_BUILD_NUMBER_HIGH: - value = CONFIG_PARAM_BUILD_NUMBER_HIGH; - break; - case PARAM_HW_VER: - value = CONFIG_PARAM_HW_VER; - break; - case PARAM_SW_MAJOR: - value = CONFIG_PARAM_SW_MAJOR; - break; - case PARAM_SW_MINOR: - value = CONFIG_PARAM_SW_MINOR; - break; - default: - value = 0; - break; - } - msgLength = 3; - msgBuffer[1] = STATUS_CMD_OK; - msgBuffer[2] = value; - } - break; - - case CMD_LEAVE_PROGMODE_ISP: - isLeave = 1; - //* fall thru - - case CMD_SET_PARAMETER: - case CMD_ENTER_PROGMODE_ISP: - msgLength = 2; - msgBuffer[1] = STATUS_CMD_OK; - break; - - case CMD_READ_SIGNATURE_ISP: - { - unsigned char signatureIndex = msgBuffer[4]; - unsigned char signature; - - if ( signatureIndex == 0 ) - signature = (SIGNATURE_BYTES >>16) & 0x000000FF; - else if ( signatureIndex == 1 ) - signature = (SIGNATURE_BYTES >> 8) & 0x000000FF; - else - signature = SIGNATURE_BYTES & 0x000000FF; - - msgLength = 4; - msgBuffer[1] = STATUS_CMD_OK; - msgBuffer[2] = signature; - msgBuffer[3] = STATUS_CMD_OK; - } - break; - - case CMD_READ_LOCK_ISP: - msgLength = 4; - msgBuffer[1] = STATUS_CMD_OK; - msgBuffer[2] = boot_lock_fuse_bits_get( GET_LOCK_BITS ); - msgBuffer[3] = STATUS_CMD_OK; - break; - - case CMD_READ_FUSE_ISP: - { - unsigned char fuseBits; - - if ( msgBuffer[2] == 0x50 ) - { - if ( msgBuffer[3] == 0x08 ) - fuseBits = boot_lock_fuse_bits_get( GET_EXTENDED_FUSE_BITS ); - else - fuseBits = boot_lock_fuse_bits_get( GET_LOW_FUSE_BITS ); - } - else - { - fuseBits = boot_lock_fuse_bits_get( GET_HIGH_FUSE_BITS ); - } - msgLength = 4; - msgBuffer[1] = STATUS_CMD_OK; - msgBuffer[2] = fuseBits; - msgBuffer[3] = STATUS_CMD_OK; - } - break; - - #ifndef REMOVE_PROGRAM_LOCK_BIT_SUPPORT - case CMD_PROGRAM_LOCK_ISP: - { - unsigned char lockBits = msgBuffer[4]; - - lockBits = (~lockBits) & 0x3C; // mask BLBxx bits - boot_lock_bits_set(lockBits); // and program it - boot_spm_busy_wait(); - - msgLength = 3; - msgBuffer[1] = STATUS_CMD_OK; - msgBuffer[2] = STATUS_CMD_OK; - } - break; - #endif - case CMD_CHIP_ERASE_ISP: - eraseAddress = 0; - msgLength = 2; - msgBuffer[1] = STATUS_CMD_OK; - break; - - case CMD_LOAD_ADDRESS: - #if defined(RAMPZ) - address = ( ((address_t)(msgBuffer[1])<<24)|((address_t)(msgBuffer[2])<<16)|((address_t)(msgBuffer[3])<<8)|(msgBuffer[4]) )<<1; - #else - address = ( ((msgBuffer[3])<<8)|(msgBuffer[4]) )<<1; //convert word to byte address - #endif - msgLength = 2; - msgBuffer[1] = STATUS_CMD_OK; - break; - - case CMD_PROGRAM_FLASH_ISP: - case CMD_PROGRAM_EEPROM_ISP: - { - unsigned int size = ((msgBuffer[1])<<8) | msgBuffer[2]; - unsigned char *p = msgBuffer+10; - unsigned int data; - unsigned char highByte, lowByte; - address_t tempaddress = address; - - - if ( msgBuffer[0] == CMD_PROGRAM_FLASH_ISP ) - { - // erase only main section (bootloader protection) - if (eraseAddress < APP_END ) - { - boot_page_erase(eraseAddress); // Perform page erase - boot_spm_busy_wait(); // Wait until the memory is erased. - eraseAddress += SPM_PAGESIZE; // point to next page to be erase - } - - /* Write FLASH */ - do { - lowByte = *p++; - highByte = *p++; - - data = (highByte << 8) | lowByte; - boot_page_fill(address,data); - - address = address + 2; // Select next word in memory - size -= 2; // Reduce number of bytes to write by two - } while (size); // Loop until all bytes written - - boot_page_write(tempaddress); - boot_spm_busy_wait(); - boot_rww_enable(); // Re-enable the RWW section - } - else - { - #if (!defined(__AVR_ATmega1280__) && !defined(__AVR_ATmega2560__) && !defined(__AVR_ATmega2561__)) - /* write EEPROM */ - do { - EEARL = address; // Setup EEPROM address - EEARH = (address >> 8); - address++; // Select next EEPROM byte - - EEDR = *p++; // get byte from buffer - EECR |= (1<> 8); //MSB - address += 2; // Select next word in memory - size -= 2; - }while (size); - } - else - { - /* Read EEPROM */ - do { - EEARL = address; // Setup EEPROM address - EEARH = ((address >> 8)); - address++; // Select next EEPROM byte - EECR |= (1<>8)&0xFF); - sendchar(c); - checksum ^= c; - - c = msgLength&0x00FF; - sendchar(c); - checksum ^= c; - - sendchar(TOKEN); - checksum ^= TOKEN; - - p = msgBuffer; - while ( msgLength ) - { - c = *p++; - sendchar(c); - checksum ^=c; - msgLength--; - } - sendchar(checksum); - seqNum++; - - #ifndef REMOVE_BOOTLOADER_LED - //* toggle the LED - PROGLED_PORT ^= (1< - - -base address = f000 -avrdude: Device signature = 0x1e9703 -avrdude: safemode: lfuse reads as FF -avrdude: safemode: hfuse reads as D8 -avrdude: safemode: efuse reads as F5 -avrdude> -*/ - -//************************************************************************ -#ifdef ENABLE_MONITOR -#include - -unsigned long gRamIndex; -unsigned long gFlashIndex; -unsigned long gEepromIndex; - - -#define true 1 -#define false 0 - -#if defined(__AVR_ATmega128__) - #define kCPU_NAME "ATmega128" -#elif defined(__AVR_ATmega1280__) - #define kCPU_NAME "ATmega1280" -#elif defined(__AVR_ATmega1281__) - #define kCPU_NAME "ATmega1281" -#elif defined(__AVR_ATmega2560__) - #define kCPU_NAME "ATmega2560" -#elif defined(__AVR_ATmega2561__) - #define kCPU_NAME "ATmega2561" -#endif - -#ifdef _VECTORS_SIZE - #define kInterruptVectorCount (_VECTORS_SIZE / 4) -#else - #define kInterruptVectorCount 23 -#endif - - -void PrintDecInt(int theNumber, int digitCnt); - -#ifdef kCPU_NAME - prog_char gTextMsg_CPU_Name[] PROGMEM = kCPU_NAME; -#else - prog_char gTextMsg_CPU_Name[] PROGMEM = "UNKNOWN"; -#endif - - prog_char gTextMsg_Explorer[] PROGMEM = "Arduino explorer stk500V2 by MLS"; - prog_char gTextMsg_Prompt[] PROGMEM = "Bootloader>"; - prog_char gTextMsg_HUH[] PROGMEM = "Huh?"; - prog_char gTextMsg_COMPILED_ON[] PROGMEM = "Compiled on = "; - prog_char gTextMsg_CPU_Type[] PROGMEM = "CPU Type = "; - prog_char gTextMsg_AVR_ARCH[] PROGMEM = "__AVR_ARCH__ = "; - prog_char gTextMsg_AVR_LIBC[] PROGMEM = "AVR LibC Ver = "; - prog_char gTextMsg_GCC_VERSION[] PROGMEM = "GCC Version = "; - prog_char gTextMsg_CPU_SIGNATURE[] PROGMEM = "CPU signature= "; - prog_char gTextMsg_FUSE_BYTE_LOW[] PROGMEM = "Low fuse = "; - prog_char gTextMsg_FUSE_BYTE_HIGH[] PROGMEM = "High fuse = "; - prog_char gTextMsg_FUSE_BYTE_EXT[] PROGMEM = "Ext fuse = "; - prog_char gTextMsg_FUSE_BYTE_LOCK[] PROGMEM = "Lock fuse = "; - prog_char gTextMsg_GCC_DATE_STR[] PROGMEM = __DATE__; - prog_char gTextMsg_AVR_LIBC_VER_STR[] PROGMEM = __AVR_LIBC_VERSION_STRING__; - prog_char gTextMsg_GCC_VERSION_STR[] PROGMEM = __VERSION__; - prog_char gTextMsg_VECTOR_HEADER[] PROGMEM = "V# ADDR op code instruction addr Interrupt"; - prog_char gTextMsg_noVector[] PROGMEM = "no vector"; - prog_char gTextMsg_rjmp[] PROGMEM = "rjmp "; - prog_char gTextMsg_jmp[] PROGMEM = "jmp "; - prog_char gTextMsg_WHAT_PORT[] PROGMEM = "What port:"; - prog_char gTextMsg_PortNotSupported[] PROGMEM = "Port not supported"; - prog_char gTextMsg_MustBeLetter[] PROGMEM = "Must be a letter"; - prog_char gTextMsg_SPACE[] PROGMEM = " "; - prog_char gTextMsg_WriteToEEprom[] PROGMEM = "Writting EE"; - prog_char gTextMsg_ReadingEEprom[] PROGMEM = "Reading EE"; - prog_char gTextMsg_EEPROMerrorCnt[] PROGMEM = "eeprom error count="; - prog_char gTextMsg_PORT[] PROGMEM = "PORT"; - - -//************************************************************************ -//* Help messages - prog_char gTextMsg_HELP_MSG_0[] PROGMEM = "0=Zero address ctrs"; - prog_char gTextMsg_HELP_MSG_QM[] PROGMEM = "?=CPU stats"; - prog_char gTextMsg_HELP_MSG_AT[] PROGMEM = "@=EEPROM test"; - prog_char gTextMsg_HELP_MSG_B[] PROGMEM = "B=Blink LED"; - prog_char gTextMsg_HELP_MSG_E[] PROGMEM = "E=Dump EEPROM"; - prog_char gTextMsg_HELP_MSG_F[] PROGMEM = "F=Dump FLASH"; - prog_char gTextMsg_HELP_MSG_H[] PROGMEM = "H=Help"; - prog_char gTextMsg_HELP_MSG_L[] PROGMEM = "L=List I/O Ports"; - prog_char gTextMsg_HELP_MSG_Q[] PROGMEM = "Q=Quit & jump to user pgm"; - prog_char gTextMsg_HELP_MSG_R[] PROGMEM = "R=Dump RAM"; - prog_char gTextMsg_HELP_MSG_V[] PROGMEM = "V=show interrupt Vectors"; - prog_char gTextMsg_HELP_MSG_Y[] PROGMEM = "Y=Port blink"; - - prog_char gTextMsg_END[] PROGMEM = "*"; - - -//************************************************************************ -void PrintFromPROGMEM(void *dataPtr, unsigned char offset) -{ -uint8_t ii; -char theChar; - - ii = offset; - theChar = 1; - - while (theChar != 0) - { - theChar = pgm_read_byte_far((uint32_t)dataPtr + ii); - if (theChar != 0) - { - sendchar(theChar); - } - ii++; - } -} - -//************************************************************************ -void PrintNewLine(void) -{ - sendchar(0x0d); - sendchar(0x0a); -} - - -//************************************************************************ -void PrintFromPROGMEMln(void *dataPtr, unsigned char offset) -{ - PrintFromPROGMEM(dataPtr, offset); - - PrintNewLine(); -} - - -//************************************************************************ -void PrintString(char *textString) -{ -char theChar; -int ii; - - theChar = 1; - ii = 0; - while (theChar != 0) - { - theChar = textString[ii]; - if (theChar != 0) - { - sendchar(theChar); - } - ii++; - } -} - -//************************************************************************ -void PrintHexByte(unsigned char theByte) -{ -char theChar; - - theChar = 0x30 + ((theByte >> 4) & 0x0f); - if (theChar > 0x39) - { - theChar += 7; - } - sendchar(theChar ); - - theChar = 0x30 + (theByte & 0x0f); - if (theChar > 0x39) - { - theChar += 7; - } - sendchar(theChar ); -} - -//************************************************************************ -void PrintDecInt(int theNumber, int digitCnt) -{ -int theChar; -int myNumber; - - myNumber = theNumber; - - if ((myNumber > 100) || (digitCnt >= 3)) - { - theChar = 0x30 + myNumber / 100; - sendchar(theChar ); - } - - if ((myNumber > 10) || (digitCnt >= 2)) - { - theChar = 0x30 + ((myNumber % 100) / 10 ); - sendchar(theChar ); - } - theChar = 0x30 + (myNumber % 10); - sendchar(theChar ); -} - - - - -//************************************************************************ -static void PrintCPUstats(void) -{ -unsigned char fuseByte; - - PrintFromPROGMEMln(gTextMsg_Explorer, 0); - - PrintFromPROGMEM(gTextMsg_COMPILED_ON, 0); - PrintFromPROGMEMln(gTextMsg_GCC_DATE_STR, 0); - - PrintFromPROGMEM(gTextMsg_CPU_Type, 0); - PrintFromPROGMEMln(gTextMsg_CPU_Name, 0); - - PrintFromPROGMEM(gTextMsg_AVR_ARCH, 0); - PrintDecInt(__AVR_ARCH__, 1); - PrintNewLine(); - - PrintFromPROGMEM(gTextMsg_GCC_VERSION, 0); - PrintFromPROGMEMln(gTextMsg_GCC_VERSION_STR, 0); - - //* these can be found in avr/version.h - PrintFromPROGMEM(gTextMsg_AVR_LIBC, 0); - PrintFromPROGMEMln(gTextMsg_AVR_LIBC_VER_STR, 0); - -#if defined(SIGNATURE_0) - PrintFromPROGMEM(gTextMsg_CPU_SIGNATURE, 0); - //* these can be found in avr/iomxxx.h - PrintHexByte(SIGNATURE_0); - PrintHexByte(SIGNATURE_1); - PrintHexByte(SIGNATURE_2); - PrintNewLine(); -#endif - - -#if defined(GET_LOW_FUSE_BITS) - //* fuse settings - PrintFromPROGMEM(gTextMsg_FUSE_BYTE_LOW, 0); - fuseByte = boot_lock_fuse_bits_get(GET_LOW_FUSE_BITS); - PrintHexByte(fuseByte); - PrintNewLine(); - - PrintFromPROGMEM(gTextMsg_FUSE_BYTE_HIGH, 0); - fuseByte = boot_lock_fuse_bits_get(GET_HIGH_FUSE_BITS); - PrintHexByte(fuseByte); - PrintNewLine(); - - PrintFromPROGMEM(gTextMsg_FUSE_BYTE_EXT, 0); - fuseByte = boot_lock_fuse_bits_get(GET_EXTENDED_FUSE_BITS); - PrintHexByte(fuseByte); - PrintNewLine(); - - PrintFromPROGMEM(gTextMsg_FUSE_BYTE_LOCK, 0); - fuseByte = boot_lock_fuse_bits_get(GET_LOCK_BITS); - PrintHexByte(fuseByte); - PrintNewLine(); - -#endif - -} - -#ifndef sbi - #define sbi(sfr, bit) (_SFR_BYTE(sfr) |= _BV(bit)) -#endif - -//************************************************************************ -int analogRead(uint8_t pin) -{ -uint8_t low, high; - - // set the analog reference (high two bits of ADMUX) and select the - // channel (low 4 bits). this also sets ADLAR (left-adjust result) - // to 0 (the default). -// ADMUX = (analog_reference << 6) | (pin & 0x07); - ADMUX = (1 << 6) | (pin & 0x07); - -#if defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__) - // the MUX5 bit of ADCSRB selects whether we're reading from channels - // 0 to 7 (MUX5 low) or 8 to 15 (MUX5 high). - ADCSRB = (ADCSRB & ~(1 << MUX5)) | (((pin >> 3) & 0x01) << MUX5); -#endif - - // without a delay, we seem to read from the wrong channel - //delay(1); - - // start the conversion - sbi(ADCSRA, ADSC); - - // ADSC is cleared when the conversion finishes - while (bit_is_set(ADCSRA, ADSC)); - - // we have to read ADCL first; doing so locks both ADCL - // and ADCH until ADCH is read. reading ADCL second would - // cause the results of each conversion to be discarded, - // as ADCL and ADCH would be locked when it completed. - low = ADCL; - high = ADCH; - - // combine the two bytes - return (high << 8) | low; -} - -//************************************************************************ -static void BlinkLED(void) -{ - PROGLED_DDR |= (1< 0) - { - if (myAddressPointer > 0x10000) - { - PrintHexByte((myAddressPointer >> 16) & 0x00ff); - } - PrintHexByte((myAddressPointer >> 8) & 0x00ff); - PrintHexByte(myAddressPointer & 0x00ff); - sendchar(0x20); - sendchar('-'); - sendchar(0x20); - - asciiDump[0] = 0; - for (ii=0; ii<16; ii++) - { - switch(dumpWhat) - { - case kDUMP_FLASH: - theValue = pgm_read_byte_far(myAddressPointer); - break; - - case kDUMP_EEPROM: - theValue = eeprom_read_byte((void *)myAddressPointer); - break; - - case kDUMP_RAM: - theValue = ramPtr[myAddressPointer]; - break; - - } - PrintHexByte(theValue); - sendchar(0x20); - if ((theValue >= 0x20) && (theValue < 0x7f)) - { - asciiDump[ii % 16] = theValue; - } - else - { - asciiDump[ii % 16] = '.'; - } - - myAddressPointer++; - } - asciiDump[16] = 0; - PrintString(asciiDump); - PrintNewLine(); - - numRows--; - } -} - - - -//************************************************************************ -//* returns amount of extended memory -static void EEPROMtest(void) -{ -int ii; -char theChar; -char theEEPROMchar; -int errorCount; - - PrintFromPROGMEMln(gTextMsg_WriteToEEprom, 0); - PrintNewLine(); - ii = 0; - while (((theChar = pgm_read_byte_far(gTextMsg_Explorer + ii)) != '*') && (ii < 512)) - { - eeprom_write_byte((uint8_t *)ii, theChar); - if (theChar == 0) - { - PrintFromPROGMEM(gTextMsg_SPACE, 0); - } - else - { - sendchar(theChar); - } - ii++; - } - - //* no go back through and test - PrintNewLine(); - PrintNewLine(); - PrintFromPROGMEMln(gTextMsg_ReadingEEprom, 0); - PrintNewLine(); - errorCount = 0; - ii = 0; - while (((theChar = pgm_read_byte_far(gTextMsg_Explorer + ii)) != '*') && (ii < 512)) - { - theEEPROMchar = eeprom_read_byte((uint8_t *)ii); - if (theEEPROMchar == 0) - { - PrintFromPROGMEM(gTextMsg_SPACE, 0); - } - else - { - sendchar(theEEPROMchar); - } - if (theEEPROMchar != theChar) - { - errorCount++; - } - ii++; - } - PrintNewLine(); - PrintNewLine(); - PrintFromPROGMEM(gTextMsg_EEPROMerrorCnt, 0); - PrintDecInt(errorCount, 1); - PrintNewLine(); - PrintNewLine(); - - gEepromIndex = 0; //* set index back to zero for next eeprom dump - -} - - - -#if (FLASHEND > 0x08000) - #include "avrinterruptnames.h" - #ifndef _INTERRUPT_NAMES_DEFINED_ - #warning Interrupt vectors not defined - #endif -#endif - -//************************************************************************ -static void VectorDisplay(void) -{ -unsigned long byte1; -unsigned long byte2; -unsigned long byte3; -unsigned long byte4; -unsigned long word1; -unsigned long word2; -int vectorIndex; -unsigned long myMemoryPtr; -unsigned long wordMemoryAddress; -unsigned long realitiveAddr; -unsigned long myFullAddress; -unsigned long absoluteAddr; -#if defined(_INTERRUPT_NAMES_DEFINED_) - long stringPointer; -#endif - - myMemoryPtr = 0; - vectorIndex = 0; - PrintFromPROGMEMln(gTextMsg_CPU_Name, 0); - PrintFromPROGMEMln(gTextMsg_VECTOR_HEADER, 0); - // V# ADDR op code - // 1 - 0000 = C3 BB 00 00 rjmp 03BB >000776 RESET - while (vectorIndex < kInterruptVectorCount) - { - wordMemoryAddress = myMemoryPtr / 2; - // 01 - 0000 = 12 34 - PrintDecInt(vectorIndex + 1, 2); - sendchar(0x20); - sendchar('-'); - sendchar(0x20); - PrintHexByte((wordMemoryAddress >> 8) & 0x00ff); - PrintHexByte((wordMemoryAddress) & 0x00ff); - sendchar(0x20); - sendchar('='); - sendchar(0x20); - - - //* the AVR is LITTLE ENDIAN, swap the byte order - byte1 = pgm_read_byte_far(myMemoryPtr++); - byte2 = pgm_read_byte_far(myMemoryPtr++); - word1 = (byte2 << 8) + byte1; - - byte3 = pgm_read_byte_far(myMemoryPtr++); - byte4 = pgm_read_byte_far(myMemoryPtr++); - word2 = (byte4 << 8) + byte3; - - - PrintHexByte(byte2); - sendchar(0x20); - PrintHexByte(byte1); - sendchar(0x20); - PrintHexByte(byte4); - sendchar(0x20); - PrintHexByte(byte3); - sendchar(0x20); - - if (word1 == 0xffff) - { - PrintFromPROGMEM(gTextMsg_noVector, 0); - } - else if ((word1 & 0xc000) == 0xc000) - { - //* rjmp instruction - realitiveAddr = word1 & 0x3FFF; - absoluteAddr = wordMemoryAddress + realitiveAddr; //* add the offset to the current address - absoluteAddr = absoluteAddr << 1; //* multiply by 2 for byte address - - PrintFromPROGMEM(gTextMsg_rjmp, 0); - PrintHexByte((realitiveAddr >> 8) & 0x00ff); - PrintHexByte((realitiveAddr) & 0x00ff); - sendchar(0x20); - sendchar('>'); - PrintHexByte((absoluteAddr >> 16) & 0x00ff); - PrintHexByte((absoluteAddr >> 8) & 0x00ff); - PrintHexByte((absoluteAddr) & 0x00ff); - - } - else if ((word1 & 0xfE0E) == 0x940c) - { - //* jmp instruction, this is REALLY complicated, refer to the instruction manual (JMP) - myFullAddress = ((byte1 & 0x01) << 16) + - ((byte1 & 0xf0) << 17) + - ((byte2 & 0x01) << 21) + - word2; - - absoluteAddr = myFullAddress << 1; - - PrintFromPROGMEM(gTextMsg_jmp, 0); - PrintHexByte((myFullAddress >> 16) & 0x00ff); - PrintHexByte((myFullAddress >> 8) & 0x00ff); - PrintHexByte((myFullAddress) & 0x00ff); - sendchar(0x20); - sendchar('>'); - PrintHexByte((absoluteAddr >> 16) & 0x00ff); - PrintHexByte((absoluteAddr >> 8) & 0x00ff); - PrintHexByte((absoluteAddr) & 0x00ff); - } - - #if defined(_INTERRUPT_NAMES_DEFINED_) - sendchar(0x20); - stringPointer = pgm_read_word_far(&(gInterruptNameTable[vectorIndex])); - PrintFromPROGMEM((char *)stringPointer, 0); - #endif - PrintNewLine(); - - vectorIndex++; - } -} - -//************************************************************************ -static void PrintAvailablePort(char thePortLetter) -{ - PrintFromPROGMEM(gTextMsg_PORT, 0); - sendchar(thePortLetter); - PrintNewLine(); -} - -//************************************************************************ -static void ListAvailablePorts(void) -{ - -#ifdef DDRA - PrintAvailablePort('A'); -#endif - -#ifdef DDRB - PrintAvailablePort('B'); -#endif - -#ifdef DDRC - PrintAvailablePort('C'); -#endif - -#ifdef DDRD - PrintAvailablePort('D'); -#endif - -#ifdef DDRE - PrintAvailablePort('E'); -#endif - -#ifdef DDRF - PrintAvailablePort('F'); -#endif - -#ifdef DDRG - PrintAvailablePort('G'); -#endif - -#ifdef DDRH - PrintAvailablePort('H'); -#endif - -#ifdef DDRI - PrintAvailablePort('I'); -#endif - -#ifdef DDRJ - PrintAvailablePort('J'); -#endif - -#ifdef DDRK - PrintAvailablePort('K'); -#endif - -#ifdef DDRL - PrintAvailablePort('L'); -#endif - -} - -//************************************************************************ -static void AVR_PortOutput(void) -{ -char portLetter; -char getCharFlag; - - PrintFromPROGMEM(gTextMsg_WHAT_PORT, 0); - - portLetter = recchar(); - portLetter = portLetter & 0x5f; - sendchar(portLetter); - PrintNewLine(); - - if ((portLetter >= 'A') && (portLetter <= 'Z')) - { - getCharFlag = true; - switch(portLetter) - { - #ifdef DDRA - case 'A': - DDRA = 0xff; - while (!Serial_Available()) - { - PORTA ^= 0xff; - delay_ms(200); - } - PORTA = 0; - break; - #endif - - #ifdef DDRB - case 'B': - DDRB = 0xff; - while (!Serial_Available()) - { - PORTB ^= 0xff; - delay_ms(200); - } - PORTB = 0; - break; - #endif - - #ifdef DDRC - case 'C': - DDRC = 0xff; - while (!Serial_Available()) - { - PORTC ^= 0xff; - delay_ms(200); - } - PORTC = 0; - break; - #endif - - #ifdef DDRD - case 'D': - DDRD = 0xff; - while (!Serial_Available()) - { - PORTD ^= 0xff; - delay_ms(200); - } - PORTD = 0; - break; - #endif - - #ifdef DDRE - case 'E': - DDRE = 0xff; - while (!Serial_Available()) - { - PORTE ^= 0xff; - delay_ms(200); - } - PORTE = 0; - break; - #endif - - #ifdef DDRF - case 'F': - DDRF = 0xff; - while (!Serial_Available()) - { - PORTF ^= 0xff; - delay_ms(200); - } - PORTF = 0; - break; - #endif - - #ifdef DDRG - case 'G': - DDRG = 0xff; - while (!Serial_Available()) - { - PORTG ^= 0xff; - delay_ms(200); - } - PORTG = 0; - break; - #endif - - #ifdef DDRH - case 'H': - DDRH = 0xff; - while (!Serial_Available()) - { - PORTH ^= 0xff; - delay_ms(200); - } - PORTH = 0; - break; - #endif - - #ifdef DDRI - case 'I': - DDRI = 0xff; - while (!Serial_Available()) - { - PORTI ^= 0xff; - delay_ms(200); - } - PORTI = 0; - break; - #endif - - #ifdef DDRJ - case 'J': - DDRJ = 0xff; - while (!Serial_Available()) - { - PORTJ ^= 0xff; - delay_ms(200); - } - PORTJ = 0; - break; - #endif - - #ifdef DDRK - case 'K': - DDRK = 0xff; - while (!Serial_Available()) - { - PORTK ^= 0xff; - delay_ms(200); - } - PORTK = 0; - break; - #endif - - #ifdef DDRL - case 'L': - DDRL = 0xff; - while (!Serial_Available()) - { - PORTL ^= 0xff; - delay_ms(200); - } - PORTL = 0; - break; - #endif - - default: - PrintFromPROGMEMln(gTextMsg_PortNotSupported, 0); - getCharFlag = false; - break; - } - if (getCharFlag) - { - recchar(); - } - } - else - { - PrintFromPROGMEMln(gTextMsg_MustBeLetter, 0); - } -} - - -//******************************************************************* -static void PrintHelp(void) -{ - PrintFromPROGMEMln(gTextMsg_HELP_MSG_0, 0); - PrintFromPROGMEMln(gTextMsg_HELP_MSG_QM, 0); - PrintFromPROGMEMln(gTextMsg_HELP_MSG_AT, 0); - PrintFromPROGMEMln(gTextMsg_HELP_MSG_B, 0); - PrintFromPROGMEMln(gTextMsg_HELP_MSG_E, 0); - PrintFromPROGMEMln(gTextMsg_HELP_MSG_F, 0); - PrintFromPROGMEMln(gTextMsg_HELP_MSG_H, 0); - - PrintFromPROGMEMln(gTextMsg_HELP_MSG_L, 0); - PrintFromPROGMEMln(gTextMsg_HELP_MSG_Q, 0); - PrintFromPROGMEMln(gTextMsg_HELP_MSG_R, 0); - PrintFromPROGMEMln(gTextMsg_HELP_MSG_V, 0); - PrintFromPROGMEMln(gTextMsg_HELP_MSG_Y, 0); -} - -//************************************************************************ -static void RunMonitor(void) -{ -char keepGoing; -unsigned char theChar; -int ii, jj; - - for (ii=0; ii<5; ii++) - { - for (jj=0; jj<25; jj++) - { - sendchar('!'); - } - PrintNewLine(); - } - - gRamIndex = 0; - gFlashIndex = 0; - gEepromIndex = 0; - - PrintFromPROGMEMln(gTextMsg_Explorer, 0); - - keepGoing = 1; - while (keepGoing) - { - PrintFromPROGMEM(gTextMsg_Prompt, 0); - theChar = recchar(); - if (theChar >= 0x60) - { - theChar = theChar & 0x5F; - } - #if defined( _CEREBOTPLUS_BOARD_ ) - if (theChar == 0x5F) - { - - } - else - #endif - if (theChar >= 0x20) - { - sendchar(theChar); - sendchar(0x20); - } - - switch(theChar) - { - case '0': - PrintFromPROGMEMln(gTextMsg_HELP_MSG_0, 2); - gFlashIndex = 0; - gRamIndex = 0; - gEepromIndex = 0; - break; - - case '?': - PrintFromPROGMEMln(gTextMsg_HELP_MSG_QM, 2); - PrintCPUstats(); - break; - - case '@': - PrintFromPROGMEMln(gTextMsg_HELP_MSG_AT, 2); - EEPROMtest(); - break; - - case 'B': - PrintFromPROGMEMln(gTextMsg_HELP_MSG_B, 2); - BlinkLED(); - break; - - case 'E': - PrintFromPROGMEMln(gTextMsg_HELP_MSG_E, 2); - DumpHex(kDUMP_EEPROM, gEepromIndex, 16); - gEepromIndex += 256; - if (gEepromIndex > E2END) - { - gEepromIndex = 0; - } - break; - - case 'F': - PrintFromPROGMEMln(gTextMsg_HELP_MSG_F, 2); - DumpHex(kDUMP_FLASH, gFlashIndex, 16); - gFlashIndex += 256; - break; - - case 'H': - PrintFromPROGMEMln(gTextMsg_HELP_MSG_H, 2); - PrintHelp(); - break; - - case 'L': - PrintFromPROGMEMln(gTextMsg_HELP_MSG_L, 2); - ListAvailablePorts(); - break; - - case 'Q': - PrintFromPROGMEMln(gTextMsg_HELP_MSG_Q, 2); - keepGoing = false; - break; - - case 'R': - PrintFromPROGMEMln(gTextMsg_HELP_MSG_R, 2); - DumpHex(kDUMP_RAM, gRamIndex, 16); - gRamIndex += 256; - break; - - case 'V': - PrintFromPROGMEMln(gTextMsg_HELP_MSG_V, 2); - VectorDisplay(); - break; - - case 'Y': - PrintFromPROGMEMln(gTextMsg_HELP_MSG_Y, 2); - AVR_PortOutput(); - break; - - #if defined( _CEREBOTPLUS_BOARD_ ) - case 0x5F: - //* do nothing - break; - #endif - - default: - PrintFromPROGMEMln(gTextMsg_HUH, 0); - break; - } - } -} - -#endif - diff --git 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b/build/linux/work/hardware/arduino/cores/arduino/Arduino.h deleted file mode 100644 index 830c9952f..000000000 --- a/build/linux/work/hardware/arduino/cores/arduino/Arduino.h +++ /dev/null @@ -1,215 +0,0 @@ -#ifndef Arduino_h -#define Arduino_h - -#include -#include -#include - -#include -#include -#include - -#include "binary.h" - -#ifdef __cplusplus -extern "C"{ -#endif - -#define HIGH 0x1 -#define LOW 0x0 - -#define INPUT 0x0 -#define OUTPUT 0x1 -#define INPUT_PULLUP 0x2 - -#define true 0x1 -#define false 0x0 - -#define PI 3.1415926535897932384626433832795 -#define HALF_PI 1.5707963267948966192313216916398 -#define TWO_PI 6.283185307179586476925286766559 -#define DEG_TO_RAD 0.017453292519943295769236907684886 -#define RAD_TO_DEG 57.295779513082320876798154814105 - -#define SERIAL 0x0 -#define DISPLAY 0x1 - -#define LSBFIRST 0 -#define MSBFIRST 1 - -#define CHANGE 1 -#define FALLING 2 -#define RISING 3 - -#if defined(__AVR_ATtiny24__) || defined(__AVR_ATtiny44__) || defined(__AVR_ATtiny84__) || defined(__AVR_ATtiny25__) || defined(__AVR_ATtiny45__) || defined(__AVR_ATtiny85__) -#define DEFAULT 0 -#define EXTERNAL 1 -#define INTERNAL 2 -#else -#if defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__) || defined(__AVR_ATmega1284P__) -#define INTERNAL1V1 2 -#define INTERNAL2V56 3 -#else -#define INTERNAL 3 -#endif -#define DEFAULT 1 -#define EXTERNAL 0 -#endif - -// undefine stdlib's abs if encountered -#ifdef abs -#undef abs -#endif - -#define min(a,b) ((a)<(b)?(a):(b)) -#define max(a,b) ((a)>(b)?(a):(b)) -#define abs(x) ((x)>0?(x):-(x)) -#define constrain(amt,low,high) ((amt)<(low)?(low):((amt)>(high)?(high):(amt))) -#define round(x) ((x)>=0?(long)((x)+0.5):(long)((x)-0.5)) -#define radians(deg) ((deg)*DEG_TO_RAD) -#define degrees(rad) ((rad)*RAD_TO_DEG) -#define sq(x) ((x)*(x)) - -#define interrupts() sei() -#define noInterrupts() cli() - -#define clockCyclesPerMicrosecond() ( F_CPU / 1000000L ) -#define clockCyclesToMicroseconds(a) ( (a) / clockCyclesPerMicrosecond() ) -#define microsecondsToClockCycles(a) ( (a) * clockCyclesPerMicrosecond() ) - -#define lowByte(w) ((uint8_t) ((w) & 0xff)) -#define highByte(w) ((uint8_t) ((w) >> 8)) - -#define bitRead(value, bit) (((value) >> (bit)) & 0x01) -#define bitSet(value, bit) ((value) |= (1UL << (bit))) -#define bitClear(value, bit) ((value) &= ~(1UL << (bit))) -#define bitWrite(value, bit, bitvalue) (bitvalue ? bitSet(value, bit) : bitClear(value, bit)) - - -typedef unsigned int word; - -#define bit(b) (1UL << (b)) - -typedef uint8_t boolean; -typedef uint8_t byte; - -void init(void); - -void pinMode(uint8_t, uint8_t); -void digitalWrite(uint8_t, uint8_t); -int digitalRead(uint8_t); -int analogRead(uint8_t); -void analogReference(uint8_t mode); -void analogWrite(uint8_t, int); - -unsigned long millis(void); -unsigned long micros(void); -void delay(unsigned long); -void delayMicroseconds(unsigned int us); -unsigned long pulseIn(uint8_t pin, uint8_t state, unsigned long timeout); - -void shiftOut(uint8_t dataPin, uint8_t clockPin, uint8_t bitOrder, uint8_t val); -uint8_t shiftIn(uint8_t dataPin, uint8_t clockPin, uint8_t bitOrder); - -void attachInterrupt(uint8_t, void (*)(void), int mode); -void detachInterrupt(uint8_t); - -void setup(void); -void loop(void); - -// Get the bit location within the hardware port of the given virtual pin. -// This comes from the pins_*.c file for the active board configuration. - -#define analogInPinToBit(P) (P) - -// On the ATmega1280, the addresses of some of the port registers are -// greater than 255, so we can't store them in uint8_t's. -extern const uint16_t PROGMEM port_to_mode_PGM[]; -extern const uint16_t PROGMEM port_to_input_PGM[]; -extern const uint16_t PROGMEM port_to_output_PGM[]; - -extern const uint8_t PROGMEM digital_pin_to_port_PGM[]; -// extern const uint8_t PROGMEM digital_pin_to_bit_PGM[]; -extern const uint8_t PROGMEM digital_pin_to_bit_mask_PGM[]; -extern const uint8_t PROGMEM digital_pin_to_timer_PGM[]; - -// Get the bit location within the hardware port of the given virtual pin. -// This comes from the pins_*.c file for the active board configuration. -// -// These perform slightly better as macros compared to inline functions -// -#define digitalPinToPort(P) ( pgm_read_byte( digital_pin_to_port_PGM + (P) ) ) -#define digitalPinToBitMask(P) ( pgm_read_byte( digital_pin_to_bit_mask_PGM + (P) ) ) -#define digitalPinToTimer(P) ( pgm_read_byte( digital_pin_to_timer_PGM + (P) ) ) -#define analogInPinToBit(P) (P) -#define portOutputRegister(P) ( (volatile uint8_t *)( pgm_read_word( port_to_output_PGM + (P))) ) -#define portInputRegister(P) ( (volatile uint8_t *)( pgm_read_word( port_to_input_PGM + (P))) ) -#define portModeRegister(P) ( (volatile uint8_t *)( pgm_read_word( port_to_mode_PGM + (P))) ) - -#define NOT_A_PIN 0 -#define NOT_A_PORT 0 - -#ifdef ARDUINO_MAIN -#define PA 1 -#define PB 2 -#define PC 3 -#define PD 4 -#define PE 5 -#define PF 6 -#define PG 7 -#define PH 8 -#define PJ 10 -#define PK 11 -#define PL 12 -#endif - -#define NOT_ON_TIMER 0 -#define TIMER0A 1 -#define TIMER0B 2 -#define TIMER1A 3 -#define TIMER1B 4 -#define TIMER2 5 -#define TIMER2A 6 -#define TIMER2B 7 - -#define TIMER3A 8 -#define TIMER3B 9 -#define TIMER3C 10 -#define TIMER4A 11 -#define TIMER4B 12 -#define TIMER4C 13 -#define TIMER4D 14 -#define TIMER5A 15 -#define TIMER5B 16 -#define TIMER5C 17 - -#ifdef __cplusplus -} // extern "C" -#endif - -#ifdef __cplusplus -#include "WCharacter.h" -#include "WString.h" -#include "HardwareSerial.h" - -uint16_t makeWord(uint16_t w); -uint16_t makeWord(byte h, byte l); - -#define word(...) makeWord(__VA_ARGS__) - -unsigned long pulseIn(uint8_t pin, uint8_t state, unsigned long timeout = 1000000L); - -void tone(uint8_t _pin, unsigned int frequency, unsigned long duration = 0); -void noTone(uint8_t _pin); - -// WMath prototypes -long random(long); -long random(long, long); -void randomSeed(unsigned int); -long map(long, long, long, long, long); - -#endif - -#include "pins_arduino.h" - -#endif diff --git a/build/linux/work/hardware/arduino/cores/arduino/CDC.cpp b/build/linux/work/hardware/arduino/cores/arduino/CDC.cpp deleted file mode 100644 index c1e646d2d..000000000 --- a/build/linux/work/hardware/arduino/cores/arduino/CDC.cpp +++ /dev/null @@ -1,234 +0,0 @@ - - -/* Copyright (c) 2011, Peter Barrett -** -** Permission to use, copy, modify, and/or distribute this software for -** any purpose with or without fee is hereby granted, provided that the -** above copyright notice and this permission notice appear in all copies. -** -** THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL -** WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED -** WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR -** BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES -** OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, -** WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, -** ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS -** SOFTWARE. -*/ - -#include "Platform.h" -#include "USBAPI.h" -#include - -#if defined(USBCON) -#ifdef CDC_ENABLED - -#if (RAMEND < 1000) -#define SERIAL_BUFFER_SIZE 16 -#else -#define SERIAL_BUFFER_SIZE 64 -#endif - -struct ring_buffer -{ - unsigned char buffer[SERIAL_BUFFER_SIZE]; - volatile int head; - volatile int tail; -}; - -ring_buffer cdc_rx_buffer = { { 0 }, 0, 0}; - -typedef struct -{ - u32 dwDTERate; - u8 bCharFormat; - u8 bParityType; - u8 bDataBits; - u8 lineState; -} LineInfo; - -static volatile LineInfo _usbLineInfo = { 57600, 0x00, 0x00, 0x00, 0x00 }; - -#define WEAK __attribute__ ((weak)) - -extern const CDCDescriptor _cdcInterface PROGMEM; -const CDCDescriptor _cdcInterface = -{ - D_IAD(0,2,CDC_COMMUNICATION_INTERFACE_CLASS,CDC_ABSTRACT_CONTROL_MODEL,1), - - // CDC communication interface - D_INTERFACE(CDC_ACM_INTERFACE,1,CDC_COMMUNICATION_INTERFACE_CLASS,CDC_ABSTRACT_CONTROL_MODEL,0), - D_CDCCS(CDC_HEADER,0x10,0x01), // Header (1.10 bcd) - D_CDCCS(CDC_CALL_MANAGEMENT,1,1), // Device handles call management (not) - D_CDCCS4(CDC_ABSTRACT_CONTROL_MANAGEMENT,6), // SET_LINE_CODING, GET_LINE_CODING, SET_CONTROL_LINE_STATE supported - D_CDCCS(CDC_UNION,CDC_ACM_INTERFACE,CDC_DATA_INTERFACE), // Communication interface is master, data interface is slave 0 - D_ENDPOINT(USB_ENDPOINT_IN (CDC_ENDPOINT_ACM),USB_ENDPOINT_TYPE_INTERRUPT,0x10,0x40), - - // CDC data interface - D_INTERFACE(CDC_DATA_INTERFACE,2,CDC_DATA_INTERFACE_CLASS,0,0), - D_ENDPOINT(USB_ENDPOINT_OUT(CDC_ENDPOINT_OUT),USB_ENDPOINT_TYPE_BULK,0x40,0), - D_ENDPOINT(USB_ENDPOINT_IN (CDC_ENDPOINT_IN ),USB_ENDPOINT_TYPE_BULK,0x40,0) -}; - -int WEAK CDC_GetInterface(u8* interfaceNum) -{ - interfaceNum[0] += 2; // uses 2 - return USB_SendControl(TRANSFER_PGM,&_cdcInterface,sizeof(_cdcInterface)); -} - -bool WEAK CDC_Setup(Setup& setup) -{ - u8 r = setup.bRequest; - u8 requestType = setup.bmRequestType; - - if (REQUEST_DEVICETOHOST_CLASS_INTERFACE == requestType) - { - if (CDC_GET_LINE_CODING == r) - { - USB_SendControl(0,(void*)&_usbLineInfo,7); - return true; - } - } - - if (REQUEST_HOSTTODEVICE_CLASS_INTERFACE == requestType) - { - if (CDC_SET_LINE_CODING == r) - { - USB_RecvControl((void*)&_usbLineInfo,7); - return true; - } - - if (CDC_SET_CONTROL_LINE_STATE == r) - { - _usbLineInfo.lineState = setup.wValueL; - - // auto-reset into the bootloader is triggered when the port, already - // open at 1200 bps, is closed. this is the signal to start the watchdog - // with a relatively long period so it can finish housekeeping tasks - // like servicing endpoints before the sketch ends - if (1200 == _usbLineInfo.dwDTERate) { - // We check DTR state to determine if host port is open (bit 0 of lineState). - // Serial1.print(">"); Serial1.println(_usbLineInfo.lineState, HEX); - if ((_usbLineInfo.lineState & 0x01) == 0) { - *(uint16_t *)0x0A00 = 0x7777; - wdt_enable(WDTO_120MS); - } else { - // Most OSs do some intermediate steps when configuring ports and DTR can - // twiggle more than once before stabilizing. - // To avoid spurious resets we set the watchdog to 250ms and eventually - // cancel if DTR goes back high. - - wdt_disable(); - wdt_reset(); - *(uint16_t *)0x0A00 = 0x0; - } - } - return true; - } - } - return false; -} - - -int _serialPeek = -1; -void Serial_::begin(uint16_t baud_count) -{ -} - -void Serial_::end(void) -{ -} - -void Serial_::accept(void) -{ - ring_buffer *buffer = &cdc_rx_buffer; - int c = USB_Recv(CDC_RX); - int i = (unsigned int)(buffer->head+1) % SERIAL_BUFFER_SIZE; - - // if we should be storing the received character into the location - // just before the tail (meaning that the head would advance to the - // current location of the tail), we're about to overflow the buffer - // and so we don't write the character or advance the head. - if (i != buffer->tail) { - buffer->buffer[buffer->head] = c; - buffer->head = i; - } -} - -int Serial_::available(void) -{ - ring_buffer *buffer = &cdc_rx_buffer; - return (unsigned int)(SERIAL_BUFFER_SIZE + buffer->head - buffer->tail) % SERIAL_BUFFER_SIZE; -} - -int Serial_::peek(void) -{ - ring_buffer *buffer = &cdc_rx_buffer; - if (buffer->head == buffer->tail) { - return -1; - } else { - return buffer->buffer[buffer->tail]; - } -} - -int Serial_::read(void) -{ - ring_buffer *buffer = &cdc_rx_buffer; - // if the head isn't ahead of the tail, we don't have any characters - if (buffer->head == buffer->tail) { - return -1; - } else { - unsigned char c = buffer->buffer[buffer->tail]; - buffer->tail = (unsigned int)(buffer->tail + 1) % SERIAL_BUFFER_SIZE; - return c; - } -} - -void Serial_::flush(void) -{ - USB_Flush(CDC_TX); -} - -size_t Serial_::write(uint8_t c) -{ - /* only try to send bytes if the high-level CDC connection itself - is open (not just the pipe) - the OS should set lineState when the port - is opened and clear lineState when the port is closed. - bytes sent before the user opens the connection or after - the connection is closed are lost - just like with a UART. */ - - // TODO - ZE - check behavior on different OSes and test what happens if an - // open connection isn't broken cleanly (cable is yanked out, host dies - // or locks up, or host virtual serial port hangs) - if (_usbLineInfo.lineState > 0) { - int r = USB_Send(CDC_TX,&c,1); - if (r > 0) { - return r; - } else { - setWriteError(); - return 0; - } - } - setWriteError(); - return 0; -} - -// This operator is a convenient way for a sketch to check whether the -// port has actually been configured and opened by the host (as opposed -// to just being connected to the host). It can be used, for example, in -// setup() before printing to ensure that an application on the host is -// actually ready to receive and display the data. -// We add a short delay before returning to fix a bug observed by Federico -// where the port is configured (lineState != 0) but not quite opened. -Serial_::operator bool() { - bool result = false; - if (_usbLineInfo.lineState > 0) - result = true; - delay(10); - return result; -} - -Serial_ Serial; - -#endif -#endif /* if defined(USBCON) */ diff --git a/build/linux/work/hardware/arduino/cores/arduino/Client.h b/build/linux/work/hardware/arduino/cores/arduino/Client.h deleted file mode 100644 index ea134838a..000000000 --- a/build/linux/work/hardware/arduino/cores/arduino/Client.h +++ /dev/null @@ -1,26 +0,0 @@ -#ifndef client_h -#define client_h -#include "Print.h" -#include "Stream.h" -#include "IPAddress.h" - -class Client : public Stream { - -public: - virtual int connect(IPAddress ip, uint16_t port) =0; - virtual int connect(const char *host, uint16_t port) =0; - virtual size_t write(uint8_t) =0; - virtual size_t write(const uint8_t *buf, size_t size) =0; - virtual int available() = 0; - virtual int read() = 0; - virtual int read(uint8_t *buf, size_t size) = 0; - virtual int peek() = 0; - virtual void flush() = 0; - virtual void stop() = 0; - virtual uint8_t connected() = 0; - virtual operator bool() = 0; -protected: - uint8_t* rawIPAddress(IPAddress& addr) { return addr.raw_address(); }; -}; - -#endif diff --git a/build/linux/work/hardware/arduino/cores/arduino/HID.cpp b/build/linux/work/hardware/arduino/cores/arduino/HID.cpp deleted file mode 100644 index ac6360844..000000000 --- a/build/linux/work/hardware/arduino/cores/arduino/HID.cpp +++ /dev/null @@ -1,520 +0,0 @@ - - -/* Copyright (c) 2011, Peter Barrett -** -** Permission to use, copy, modify, and/or distribute this software for -** any purpose with or without fee is hereby granted, provided that the -** above copyright notice and this permission notice appear in all copies. -** -** THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL -** WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED -** WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR -** BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES -** OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, -** WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, -** ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS -** SOFTWARE. -*/ - -#include "Platform.h" -#include "USBAPI.h" -#include "USBDesc.h" - -#if defined(USBCON) -#ifdef HID_ENABLED - -//#define RAWHID_ENABLED - -// Singletons for mouse and keyboard - -Mouse_ Mouse; -Keyboard_ Keyboard; - -//================================================================================ -//================================================================================ - -// HID report descriptor - -#define LSB(_x) ((_x) & 0xFF) -#define MSB(_x) ((_x) >> 8) - -#define RAWHID_USAGE_PAGE 0xFFC0 -#define RAWHID_USAGE 0x0C00 -#define RAWHID_TX_SIZE 64 -#define RAWHID_RX_SIZE 64 - -extern const u8 _hidReportDescriptor[] PROGMEM; -const u8 _hidReportDescriptor[] = { - - // Mouse - 0x05, 0x01, // USAGE_PAGE (Generic Desktop) // 54 - 0x09, 0x02, // USAGE (Mouse) - 0xa1, 0x01, // COLLECTION (Application) - 0x09, 0x01, // USAGE (Pointer) - 0xa1, 0x00, // COLLECTION (Physical) - 0x85, 0x01, // REPORT_ID (1) - 0x05, 0x09, // USAGE_PAGE (Button) - 0x19, 0x01, // USAGE_MINIMUM (Button 1) - 0x29, 0x03, // USAGE_MAXIMUM (Button 3) - 0x15, 0x00, // LOGICAL_MINIMUM (0) - 0x25, 0x01, // LOGICAL_MAXIMUM (1) - 0x95, 0x03, // REPORT_COUNT (3) - 0x75, 0x01, // REPORT_SIZE (1) - 0x81, 0x02, // INPUT (Data,Var,Abs) - 0x95, 0x01, // REPORT_COUNT (1) - 0x75, 0x05, // REPORT_SIZE (5) - 0x81, 0x03, // INPUT (Cnst,Var,Abs) - 0x05, 0x01, // USAGE_PAGE (Generic Desktop) - 0x09, 0x30, // USAGE (X) - 0x09, 0x31, // USAGE (Y) - 0x09, 0x38, // USAGE (Wheel) - 0x15, 0x81, // LOGICAL_MINIMUM (-127) - 0x25, 0x7f, // LOGICAL_MAXIMUM (127) - 0x75, 0x08, // REPORT_SIZE (8) - 0x95, 0x03, // REPORT_COUNT (3) - 0x81, 0x06, // INPUT (Data,Var,Rel) - 0xc0, // END_COLLECTION - 0xc0, // END_COLLECTION - - // Keyboard - 0x05, 0x01, // USAGE_PAGE (Generic Desktop) // 47 - 0x09, 0x06, // USAGE (Keyboard) - 0xa1, 0x01, // COLLECTION (Application) - 0x85, 0x02, // REPORT_ID (2) - 0x05, 0x07, // USAGE_PAGE (Keyboard) - - 0x19, 0xe0, // USAGE_MINIMUM (Keyboard LeftControl) - 0x29, 0xe7, // USAGE_MAXIMUM (Keyboard Right GUI) - 0x15, 0x00, // LOGICAL_MINIMUM (0) - 0x25, 0x01, // LOGICAL_MAXIMUM (1) - 0x75, 0x01, // REPORT_SIZE (1) - - 0x95, 0x08, // REPORT_COUNT (8) - 0x81, 0x02, // INPUT (Data,Var,Abs) - 0x95, 0x01, // REPORT_COUNT (1) - 0x75, 0x08, // REPORT_SIZE (8) - 0x81, 0x03, // INPUT (Cnst,Var,Abs) - - 0x95, 0x06, // REPORT_COUNT (6) - 0x75, 0x08, // REPORT_SIZE (8) - 0x15, 0x00, // LOGICAL_MINIMUM (0) - 0x25, 0x65, // LOGICAL_MAXIMUM (101) - 0x05, 0x07, // USAGE_PAGE (Keyboard) - - 0x19, 0x00, // USAGE_MINIMUM (Reserved (no event indicated)) - 0x29, 0x65, // USAGE_MAXIMUM (Keyboard Application) - 0x81, 0x00, // INPUT (Data,Ary,Abs) - 0xc0, // END_COLLECTION - -#if RAWHID_ENABLED - // RAW HID - 0x06, LSB(RAWHID_USAGE_PAGE), MSB(RAWHID_USAGE_PAGE), // 30 - 0x0A, LSB(RAWHID_USAGE), MSB(RAWHID_USAGE), - - 0xA1, 0x01, // Collection 0x01 - 0x85, 0x03, // REPORT_ID (3) - 0x75, 0x08, // report size = 8 bits - 0x15, 0x00, // logical minimum = 0 - 0x26, 0xFF, 0x00, // logical maximum = 255 - - 0x95, 64, // report count TX - 0x09, 0x01, // usage - 0x81, 0x02, // Input (array) - - 0x95, 64, // report count RX - 0x09, 0x02, // usage - 0x91, 0x02, // Output (array) - 0xC0 // end collection -#endif -}; - -extern const HIDDescriptor _hidInterface PROGMEM; -const HIDDescriptor _hidInterface = -{ - D_INTERFACE(HID_INTERFACE,1,3,0,0), - D_HIDREPORT(sizeof(_hidReportDescriptor)), - D_ENDPOINT(USB_ENDPOINT_IN (HID_ENDPOINT_INT),USB_ENDPOINT_TYPE_INTERRUPT,0x40,0x01) -}; - -//================================================================================ -//================================================================================ -// Driver - -u8 _hid_protocol = 1; -u8 _hid_idle = 1; - -#define WEAK __attribute__ ((weak)) - -int WEAK HID_GetInterface(u8* interfaceNum) -{ - interfaceNum[0] += 1; // uses 1 - return USB_SendControl(TRANSFER_PGM,&_hidInterface,sizeof(_hidInterface)); -} - -int WEAK HID_GetDescriptor(int i) -{ - return USB_SendControl(TRANSFER_PGM,_hidReportDescriptor,sizeof(_hidReportDescriptor)); -} - -void WEAK HID_SendReport(u8 id, const void* data, int len) -{ - USB_Send(HID_TX, &id, 1); - USB_Send(HID_TX | TRANSFER_RELEASE,data,len); -} - -bool WEAK HID_Setup(Setup& setup) -{ - u8 r = setup.bRequest; - u8 requestType = setup.bmRequestType; - if (REQUEST_DEVICETOHOST_CLASS_INTERFACE == requestType) - { - if (HID_GET_REPORT == r) - { - //HID_GetReport(); - return true; - } - if (HID_GET_PROTOCOL == r) - { - //Send8(_hid_protocol); // TODO - return true; - } - } - - if (REQUEST_HOSTTODEVICE_CLASS_INTERFACE == requestType) - { - if (HID_SET_PROTOCOL == r) - { - _hid_protocol = setup.wValueL; - return true; - } - - if (HID_SET_IDLE == r) - { - _hid_idle = setup.wValueL; - return true; - } - } - return false; -} - -//================================================================================ -//================================================================================ -// Mouse - -Mouse_::Mouse_(void) : _buttons(0) -{ -} - -void Mouse_::begin(void) -{ -} - -void Mouse_::end(void) -{ -} - -void Mouse_::click(uint8_t b) -{ - _buttons = b; - move(0,0,0); - _buttons = 0; - move(0,0,0); -} - -void Mouse_::move(signed char x, signed char y, signed char wheel) -{ - u8 m[4]; - m[0] = _buttons; - m[1] = x; - m[2] = y; - m[3] = wheel; - HID_SendReport(1,m,4); -} - -void Mouse_::buttons(uint8_t b) -{ - if (b != _buttons) - { - _buttons = b; - move(0,0,0); - } -} - -void Mouse_::press(uint8_t b) -{ - buttons(_buttons | b); -} - -void Mouse_::release(uint8_t b) -{ - buttons(_buttons & ~b); -} - -bool Mouse_::isPressed(uint8_t b) -{ - if ((b & _buttons) > 0) - return true; - return false; -} - -//================================================================================ -//================================================================================ -// Keyboard - -Keyboard_::Keyboard_(void) -{ -} - -void Keyboard_::begin(void) -{ -} - -void Keyboard_::end(void) -{ -} - -void Keyboard_::sendReport(KeyReport* keys) -{ - HID_SendReport(2,keys,sizeof(KeyReport)); -} - -extern -const uint8_t _asciimap[128] PROGMEM; - -#define SHIFT 0x80 -const uint8_t _asciimap[128] = -{ - 0x00, // NUL - 0x00, // SOH - 0x00, // STX - 0x00, // ETX - 0x00, // EOT - 0x00, // ENQ - 0x00, // ACK - 0x00, // BEL - 0x2a, // BS Backspace - 0x2b, // TAB Tab - 0x28, // LF Enter - 0x00, // VT - 0x00, // FF - 0x00, // CR - 0x00, // SO - 0x00, // SI - 0x00, // DEL - 0x00, // DC1 - 0x00, // DC2 - 0x00, // DC3 - 0x00, // DC4 - 0x00, // NAK - 0x00, // SYN - 0x00, // ETB - 0x00, // CAN - 0x00, // EM - 0x00, // SUB - 0x00, // ESC - 0x00, // FS - 0x00, // GS - 0x00, // RS - 0x00, // US - - 0x2c, // ' ' - 0x1e|SHIFT, // ! - 0x34|SHIFT, // " - 0x20|SHIFT, // # - 0x21|SHIFT, // $ - 0x22|SHIFT, // % - 0x24|SHIFT, // & - 0x34, // ' - 0x26|SHIFT, // ( - 0x27|SHIFT, // ) - 0x25|SHIFT, // * - 0x2e|SHIFT, // + - 0x36, // , - 0x2d, // - - 0x37, // . - 0x38, // / - 0x27, // 0 - 0x1e, // 1 - 0x1f, // 2 - 0x20, // 3 - 0x21, // 4 - 0x22, // 5 - 0x23, // 6 - 0x24, // 7 - 0x25, // 8 - 0x26, // 9 - 0x33|SHIFT, // : - 0x33, // ; - 0x36|SHIFT, // < - 0x2e, // = - 0x37|SHIFT, // > - 0x38|SHIFT, // ? - 0x1f|SHIFT, // @ - 0x04|SHIFT, // A - 0x05|SHIFT, // B - 0x06|SHIFT, // C - 0x07|SHIFT, // D - 0x08|SHIFT, // E - 0x09|SHIFT, // F - 0x0a|SHIFT, // G - 0x0b|SHIFT, // H - 0x0c|SHIFT, // I - 0x0d|SHIFT, // J - 0x0e|SHIFT, // K - 0x0f|SHIFT, // L - 0x10|SHIFT, // M - 0x11|SHIFT, // N - 0x12|SHIFT, // O - 0x13|SHIFT, // P - 0x14|SHIFT, // Q - 0x15|SHIFT, // R - 0x16|SHIFT, // S - 0x17|SHIFT, // T - 0x18|SHIFT, // U - 0x19|SHIFT, // V - 0x1a|SHIFT, // W - 0x1b|SHIFT, // X - 0x1c|SHIFT, // Y - 0x1d|SHIFT, // Z - 0x2f, // [ - 0x31, // bslash - 0x30, // ] - 0x23|SHIFT, // ^ - 0x2d|SHIFT, // _ - 0x35, // ` - 0x04, // a - 0x05, // b - 0x06, // c - 0x07, // d - 0x08, // e - 0x09, // f - 0x0a, // g - 0x0b, // h - 0x0c, // i - 0x0d, // j - 0x0e, // k - 0x0f, // l - 0x10, // m - 0x11, // n - 0x12, // o - 0x13, // p - 0x14, // q - 0x15, // r - 0x16, // s - 0x17, // t - 0x18, // u - 0x19, // v - 0x1a, // w - 0x1b, // x - 0x1c, // y - 0x1d, // z - 0x2f|SHIFT, // - 0x31|SHIFT, // | - 0x30|SHIFT, // } - 0x35|SHIFT, // ~ - 0 // DEL -}; - -uint8_t USBPutChar(uint8_t c); - -// press() adds the specified key (printing, non-printing, or modifier) -// to the persistent key report and sends the report. Because of the way -// USB HID works, the host acts like the key remains pressed until we -// call release(), releaseAll(), or otherwise clear the report and resend. -size_t Keyboard_::press(uint8_t k) -{ - uint8_t i; - if (k >= 136) { // it's a non-printing key (not a modifier) - k = k - 136; - } else if (k >= 128) { // it's a modifier key - _keyReport.modifiers |= (1<<(k-128)); - k = 0; - } else { // it's a printing key - k = pgm_read_byte(_asciimap + k); - if (!k) { - setWriteError(); - return 0; - } - if (k & 0x80) { // it's a capital letter or other character reached with shift - _keyReport.modifiers |= 0x02; // the left shift modifier - k &= 0x7F; - } - } - - // Add k to the key report only if it's not already present - // and if there is an empty slot. - if (_keyReport.keys[0] != k && _keyReport.keys[1] != k && - _keyReport.keys[2] != k && _keyReport.keys[3] != k && - _keyReport.keys[4] != k && _keyReport.keys[5] != k) { - - for (i=0; i<6; i++) { - if (_keyReport.keys[i] == 0x00) { - _keyReport.keys[i] = k; - break; - } - } - if (i == 6) { - setWriteError(); - return 0; - } - } - sendReport(&_keyReport); - return 1; -} - -// release() takes the specified key out of the persistent key report and -// sends the report. This tells the OS the key is no longer pressed and that -// it shouldn't be repeated any more. -size_t Keyboard_::release(uint8_t k) -{ - uint8_t i; - if (k >= 136) { // it's a non-printing key (not a modifier) - k = k - 136; - } else if (k >= 128) { // it's a modifier key - _keyReport.modifiers &= ~(1<<(k-128)); - k = 0; - } else { // it's a printing key - k = pgm_read_byte(_asciimap + k); - if (!k) { - return 0; - } - if (k & 0x80) { // it's a capital letter or other character reached with shift - _keyReport.modifiers &= ~(0x02); // the left shift modifier - k &= 0x7F; - } - } - - // Test the key report to see if k is present. Clear it if it exists. - // Check all positions in case the key is present more than once (which it shouldn't be) - for (i=0; i<6; i++) { - if (0 != k && _keyReport.keys[i] == k) { - _keyReport.keys[i] = 0x00; - } - } - - sendReport(&_keyReport); - return 1; -} - -void Keyboard_::releaseAll(void) -{ - _keyReport.keys[0] = 0; - _keyReport.keys[1] = 0; - _keyReport.keys[2] = 0; - _keyReport.keys[3] = 0; - _keyReport.keys[4] = 0; - _keyReport.keys[5] = 0; - _keyReport.modifiers = 0; - sendReport(&_keyReport); -} - -size_t Keyboard_::write(uint8_t c) -{ - uint8_t p = press(c); // Keydown - uint8_t r = release(c); // Keyup - return (p); // just return the result of press() since release() almost always returns 1 -} - -#endif - -#endif /* if defined(USBCON) */ \ No newline at end of file diff --git a/build/linux/work/hardware/arduino/cores/arduino/HardwareSerial.cpp b/build/linux/work/hardware/arduino/cores/arduino/HardwareSerial.cpp deleted file mode 100644 index f40ddee06..000000000 --- a/build/linux/work/hardware/arduino/cores/arduino/HardwareSerial.cpp +++ /dev/null @@ -1,428 +0,0 @@ -/* - HardwareSerial.cpp - Hardware serial library for Wiring - Copyright (c) 2006 Nicholas Zambetti. All right reserved. - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with this library; if not, write to the Free Software - Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - - Modified 23 November 2006 by David A. Mellis - Modified 28 September 2010 by Mark Sproul -*/ - -#include -#include -#include -#include -#include "Arduino.h" -#include "wiring_private.h" - -// this next line disables the entire HardwareSerial.cpp, -// this is so I can support Attiny series and any other chip without a uart -#if defined(UBRRH) || defined(UBRR0H) || defined(UBRR1H) || defined(UBRR2H) || defined(UBRR3H) - -#include "HardwareSerial.h" - -// Define constants and variables for buffering incoming serial data. We're -// using a ring buffer (I think), in which head is the index of the location -// to which to write the next incoming character and tail is the index of the -// location from which to read. -#if (RAMEND < 1000) - #define SERIAL_BUFFER_SIZE 16 -#else - #define SERIAL_BUFFER_SIZE 64 -#endif - -struct ring_buffer -{ - unsigned char buffer[SERIAL_BUFFER_SIZE]; - volatile unsigned int head; - volatile unsigned int tail; -}; - -#if defined(USBCON) - ring_buffer rx_buffer = { { 0 }, 0, 0}; - ring_buffer tx_buffer = { { 0 }, 0, 0}; -#endif -#if defined(UBRRH) || defined(UBRR0H) - ring_buffer rx_buffer = { { 0 }, 0, 0 }; - ring_buffer tx_buffer = { { 0 }, 0, 0 }; -#endif -#if defined(UBRR1H) - ring_buffer rx_buffer1 = { { 0 }, 0, 0 }; - ring_buffer tx_buffer1 = { { 0 }, 0, 0 }; -#endif -#if defined(UBRR2H) - ring_buffer rx_buffer2 = { { 0 }, 0, 0 }; - ring_buffer tx_buffer2 = { { 0 }, 0, 0 }; -#endif -#if defined(UBRR3H) - ring_buffer rx_buffer3 = { { 0 }, 0, 0 }; - ring_buffer tx_buffer3 = { { 0 }, 0, 0 }; -#endif - -inline void store_char(unsigned char c, ring_buffer *buffer) -{ - int i = (unsigned int)(buffer->head + 1) % SERIAL_BUFFER_SIZE; - - // if we should be storing the received character into the location - // just before the tail (meaning that the head would advance to the - // current location of the tail), we're about to overflow the buffer - // and so we don't write the character or advance the head. - if (i != buffer->tail) { - buffer->buffer[buffer->head] = c; - buffer->head = i; - } -} - -#if !defined(USART0_RX_vect) && defined(USART1_RX_vect) -// do nothing - on the 32u4 the first USART is USART1 -#else -#if !defined(USART_RX_vect) && !defined(SIG_USART0_RECV) && \ - !defined(SIG_UART0_RECV) && !defined(USART0_RX_vect) && \ - !defined(SIG_UART_RECV) - #error "Don't know what the Data Received vector is called for the first UART" -#else - void serialEvent() __attribute__((weak)); - void serialEvent() {} - #define serialEvent_implemented -#if defined(USART_RX_vect) - SIGNAL(USART_RX_vect) -#elif defined(SIG_USART0_RECV) - SIGNAL(SIG_USART0_RECV) -#elif defined(SIG_UART0_RECV) - SIGNAL(SIG_UART0_RECV) -#elif defined(USART0_RX_vect) - SIGNAL(USART0_RX_vect) -#elif defined(SIG_UART_RECV) - SIGNAL(SIG_UART_RECV) -#endif - { - #if defined(UDR0) - unsigned char c = UDR0; - #elif defined(UDR) - unsigned char c = UDR; - #else - #error UDR not defined - #endif - store_char(c, &rx_buffer); - } -#endif -#endif - -#if defined(USART1_RX_vect) - void serialEvent1() __attribute__((weak)); - void serialEvent1() {} - #define serialEvent1_implemented - SIGNAL(USART1_RX_vect) - { - unsigned char c = UDR1; - store_char(c, &rx_buffer1); - } -#elif defined(SIG_USART1_RECV) - #error SIG_USART1_RECV -#endif - -#if defined(USART2_RX_vect) && defined(UDR2) - void serialEvent2() __attribute__((weak)); - void serialEvent2() {} - #define serialEvent2_implemented - SIGNAL(USART2_RX_vect) - { - unsigned char c = UDR2; - store_char(c, &rx_buffer2); - } -#elif defined(SIG_USART2_RECV) - #error SIG_USART2_RECV -#endif - -#if defined(USART3_RX_vect) && defined(UDR3) - void serialEvent3() __attribute__((weak)); - void serialEvent3() {} - #define serialEvent3_implemented - SIGNAL(USART3_RX_vect) - { - unsigned char c = UDR3; - store_char(c, &rx_buffer3); - } -#elif defined(SIG_USART3_RECV) - #error SIG_USART3_RECV -#endif - -void serialEventRun(void) -{ -#ifdef serialEvent_implemented - if (Serial.available()) serialEvent(); -#endif -#ifdef serialEvent1_implemented - if (Serial1.available()) serialEvent1(); -#endif -#ifdef serialEvent2_implemented - if (Serial2.available()) serialEvent2(); -#endif -#ifdef serialEvent3_implemented - if (Serial3.available()) serialEvent3(); -#endif -} - - -#if !defined(USART0_UDRE_vect) && defined(USART1_UDRE_vect) -// do nothing - on the 32u4 the first USART is USART1 -#else -#if !defined(UART0_UDRE_vect) && !defined(UART_UDRE_vect) && !defined(USART0_UDRE_vect) && !defined(USART_UDRE_vect) - #error "Don't know what the Data Register Empty vector is called for the first UART" -#else -#if defined(UART0_UDRE_vect) -ISR(UART0_UDRE_vect) -#elif defined(UART_UDRE_vect) -ISR(UART_UDRE_vect) -#elif defined(USART0_UDRE_vect) -ISR(USART0_UDRE_vect) -#elif defined(USART_UDRE_vect) -ISR(USART_UDRE_vect) -#endif -{ - if (tx_buffer.head == tx_buffer.tail) { - // Buffer empty, so disable interrupts -#if defined(UCSR0B) - cbi(UCSR0B, UDRIE0); -#else - cbi(UCSRB, UDRIE); -#endif - } - else { - // There is more data in the output buffer. Send the next byte - unsigned char c = tx_buffer.buffer[tx_buffer.tail]; - tx_buffer.tail = (tx_buffer.tail + 1) % SERIAL_BUFFER_SIZE; - - #if defined(UDR0) - UDR0 = c; - #elif defined(UDR) - UDR = c; - #else - #error UDR not defined - #endif - } -} -#endif -#endif - -#ifdef USART1_UDRE_vect -ISR(USART1_UDRE_vect) -{ - if (tx_buffer1.head == tx_buffer1.tail) { - // Buffer empty, so disable interrupts - cbi(UCSR1B, UDRIE1); - } - else { - // There is more data in the output buffer. Send the next byte - unsigned char c = tx_buffer1.buffer[tx_buffer1.tail]; - tx_buffer1.tail = (tx_buffer1.tail + 1) % SERIAL_BUFFER_SIZE; - - UDR1 = c; - } -} -#endif - -#ifdef USART2_UDRE_vect -ISR(USART2_UDRE_vect) -{ - if (tx_buffer2.head == tx_buffer2.tail) { - // Buffer empty, so disable interrupts - cbi(UCSR2B, UDRIE2); - } - else { - // There is more data in the output buffer. Send the next byte - unsigned char c = tx_buffer2.buffer[tx_buffer2.tail]; - tx_buffer2.tail = (tx_buffer2.tail + 1) % SERIAL_BUFFER_SIZE; - - UDR2 = c; - } -} -#endif - -#ifdef USART3_UDRE_vect -ISR(USART3_UDRE_vect) -{ - if (tx_buffer3.head == tx_buffer3.tail) { - // Buffer empty, so disable interrupts - cbi(UCSR3B, UDRIE3); - } - else { - // There is more data in the output buffer. Send the next byte - unsigned char c = tx_buffer3.buffer[tx_buffer3.tail]; - tx_buffer3.tail = (tx_buffer3.tail + 1) % SERIAL_BUFFER_SIZE; - - UDR3 = c; - } -} -#endif - - -// Constructors //////////////////////////////////////////////////////////////// - -HardwareSerial::HardwareSerial(ring_buffer *rx_buffer, ring_buffer *tx_buffer, - volatile uint8_t *ubrrh, volatile uint8_t *ubrrl, - volatile uint8_t *ucsra, volatile uint8_t *ucsrb, - volatile uint8_t *udr, - uint8_t rxen, uint8_t txen, uint8_t rxcie, uint8_t udrie, uint8_t u2x) -{ - _rx_buffer = rx_buffer; - _tx_buffer = tx_buffer; - _ubrrh = ubrrh; - _ubrrl = ubrrl; - _ucsra = ucsra; - _ucsrb = ucsrb; - _udr = udr; - _rxen = rxen; - _txen = txen; - _rxcie = rxcie; - _udrie = udrie; - _u2x = u2x; -} - -// Public Methods ////////////////////////////////////////////////////////////// - -void HardwareSerial::begin(unsigned long baud) -{ - uint16_t baud_setting; - bool use_u2x = true; - -#if F_CPU == 16000000UL - // hardcoded exception for compatibility with the bootloader shipped - // with the Duemilanove and previous boards and the firmware on the 8U2 - // on the Uno and Mega 2560. - if (baud == 57600) { - use_u2x = false; - } -#endif - -try_again: - - if (use_u2x) { - *_ucsra = 1 << _u2x; - baud_setting = (F_CPU / 4 / baud - 1) / 2; - } else { - *_ucsra = 0; - baud_setting = (F_CPU / 8 / baud - 1) / 2; - } - - if ((baud_setting > 4095) && use_u2x) - { - use_u2x = false; - goto try_again; - } - - // assign the baud_setting, a.k.a. ubbr (USART Baud Rate Register) - *_ubrrh = baud_setting >> 8; - *_ubrrl = baud_setting; - - sbi(*_ucsrb, _rxen); - sbi(*_ucsrb, _txen); - sbi(*_ucsrb, _rxcie); - cbi(*_ucsrb, _udrie); -} - -void HardwareSerial::end() -{ - // wait for transmission of outgoing data - while (_tx_buffer->head != _tx_buffer->tail) - ; - - cbi(*_ucsrb, _rxen); - cbi(*_ucsrb, _txen); - cbi(*_ucsrb, _rxcie); - cbi(*_ucsrb, _udrie); - - // clear any received data - _rx_buffer->head = _rx_buffer->tail; -} - -int HardwareSerial::available(void) -{ - return (unsigned int)(SERIAL_BUFFER_SIZE + _rx_buffer->head - _rx_buffer->tail) % SERIAL_BUFFER_SIZE; -} - -int HardwareSerial::peek(void) -{ - if (_rx_buffer->head == _rx_buffer->tail) { - return -1; - } else { - return _rx_buffer->buffer[_rx_buffer->tail]; - } -} - -int HardwareSerial::read(void) -{ - // if the head isn't ahead of the tail, we don't have any characters - if (_rx_buffer->head == _rx_buffer->tail) { - return -1; - } else { - unsigned char c = _rx_buffer->buffer[_rx_buffer->tail]; - _rx_buffer->tail = (unsigned int)(_rx_buffer->tail + 1) % SERIAL_BUFFER_SIZE; - return c; - } -} - -void HardwareSerial::flush() -{ - while (_tx_buffer->head != _tx_buffer->tail) - ; -} - -size_t HardwareSerial::write(uint8_t c) -{ - int i = (_tx_buffer->head + 1) % SERIAL_BUFFER_SIZE; - - // If the output buffer is full, there's nothing for it other than to - // wait for the interrupt handler to empty it a bit - // ???: return 0 here instead? - while (i == _tx_buffer->tail) - ; - - _tx_buffer->buffer[_tx_buffer->head] = c; - _tx_buffer->head = i; - - sbi(*_ucsrb, _udrie); - - return 1; -} - -HardwareSerial::operator bool() { - return true; -} - -// Preinstantiate Objects ////////////////////////////////////////////////////// - -#if defined(UBRRH) && defined(UBRRL) - HardwareSerial Serial(&rx_buffer, &tx_buffer, &UBRRH, &UBRRL, &UCSRA, &UCSRB, &UDR, RXEN, TXEN, RXCIE, UDRIE, U2X); -#elif defined(UBRR0H) && defined(UBRR0L) - HardwareSerial Serial(&rx_buffer, &tx_buffer, &UBRR0H, &UBRR0L, &UCSR0A, &UCSR0B, &UDR0, RXEN0, TXEN0, RXCIE0, UDRIE0, U2X0); -#elif defined(USBCON) - // do nothing - Serial object and buffers are initialized in CDC code -#else - #error no serial port defined (port 0) -#endif - -#if defined(UBRR1H) - HardwareSerial Serial1(&rx_buffer1, &tx_buffer1, &UBRR1H, &UBRR1L, &UCSR1A, &UCSR1B, &UDR1, RXEN1, TXEN1, RXCIE1, UDRIE1, U2X1); -#endif -#if defined(UBRR2H) - HardwareSerial Serial2(&rx_buffer2, &tx_buffer2, &UBRR2H, &UBRR2L, &UCSR2A, &UCSR2B, &UDR2, RXEN2, TXEN2, RXCIE2, UDRIE2, U2X2); -#endif -#if defined(UBRR3H) - HardwareSerial Serial3(&rx_buffer3, &tx_buffer3, &UBRR3H, &UBRR3L, &UCSR3A, &UCSR3B, &UDR3, RXEN3, TXEN3, RXCIE3, UDRIE3, U2X3); -#endif - -#endif // whole file - diff --git a/build/linux/work/hardware/arduino/cores/arduino/HardwareSerial.h b/build/linux/work/hardware/arduino/cores/arduino/HardwareSerial.h deleted file mode 100644 index bf4924c6d..000000000 --- a/build/linux/work/hardware/arduino/cores/arduino/HardwareSerial.h +++ /dev/null @@ -1,81 +0,0 @@ -/* - HardwareSerial.h - Hardware serial library for Wiring - Copyright (c) 2006 Nicholas Zambetti. All right reserved. - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with this library; if not, write to the Free Software - Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - - Modified 28 September 2010 by Mark Sproul -*/ - -#ifndef HardwareSerial_h -#define HardwareSerial_h - -#include - -#include "Stream.h" - -struct ring_buffer; - -class HardwareSerial : public Stream -{ - private: - ring_buffer *_rx_buffer; - ring_buffer *_tx_buffer; - volatile uint8_t *_ubrrh; - volatile uint8_t *_ubrrl; - volatile uint8_t *_ucsra; - volatile uint8_t *_ucsrb; - volatile uint8_t *_udr; - uint8_t _rxen; - uint8_t _txen; - uint8_t _rxcie; - uint8_t _udrie; - uint8_t _u2x; - public: - HardwareSerial(ring_buffer *rx_buffer, ring_buffer *tx_buffer, - volatile uint8_t *ubrrh, volatile uint8_t *ubrrl, - volatile uint8_t *ucsra, volatile uint8_t *ucsrb, - volatile uint8_t *udr, - uint8_t rxen, uint8_t txen, uint8_t rxcie, uint8_t udrie, uint8_t u2x); - void begin(unsigned long); - void end(); - virtual int available(void); - virtual int peek(void); - virtual int read(void); - virtual void flush(void); - virtual size_t write(uint8_t); - using Print::write; // pull in write(str) and write(buf, size) from Print - operator bool(); -}; - -#if defined(UBRRH) || defined(UBRR0H) - extern HardwareSerial Serial; -#elif defined(USBCON) - #include "USBAPI.h" -// extern HardwareSerial Serial_; -#endif -#if defined(UBRR1H) - extern HardwareSerial Serial1; -#endif -#if defined(UBRR2H) - extern HardwareSerial Serial2; -#endif -#if defined(UBRR3H) - extern HardwareSerial Serial3; -#endif - -extern void serialEventRun(void) __attribute__((weak)); - -#endif diff --git a/build/linux/work/hardware/arduino/cores/arduino/IPAddress.cpp b/build/linux/work/hardware/arduino/cores/arduino/IPAddress.cpp deleted file mode 100644 index fe3deb77a..000000000 --- a/build/linux/work/hardware/arduino/cores/arduino/IPAddress.cpp +++ /dev/null @@ -1,56 +0,0 @@ - -#include -#include - -IPAddress::IPAddress() -{ - memset(_address, 0, sizeof(_address)); -} - -IPAddress::IPAddress(uint8_t first_octet, uint8_t second_octet, uint8_t third_octet, uint8_t fourth_octet) -{ - _address[0] = first_octet; - _address[1] = second_octet; - _address[2] = third_octet; - _address[3] = fourth_octet; -} - -IPAddress::IPAddress(uint32_t address) -{ - memcpy(_address, &address, sizeof(_address)); -} - -IPAddress::IPAddress(const uint8_t *address) -{ - memcpy(_address, address, sizeof(_address)); -} - -IPAddress& IPAddress::operator=(const uint8_t *address) -{ - memcpy(_address, address, sizeof(_address)); - return *this; -} - -IPAddress& IPAddress::operator=(uint32_t address) -{ - memcpy(_address, (const uint8_t *)&address, sizeof(_address)); - return *this; -} - -bool IPAddress::operator==(const uint8_t* addr) -{ - return memcmp(addr, _address, sizeof(_address)) == 0; -} - -size_t IPAddress::printTo(Print& p) const -{ - size_t n = 0; - for (int i =0; i < 3; i++) - { - n += p.print(_address[i], DEC); - n += p.print('.'); - } - n += p.print(_address[3], DEC); - return n; -} - diff --git a/build/linux/work/hardware/arduino/cores/arduino/IPAddress.h b/build/linux/work/hardware/arduino/cores/arduino/IPAddress.h deleted file mode 100644 index 2585aec0e..000000000 --- a/build/linux/work/hardware/arduino/cores/arduino/IPAddress.h +++ /dev/null @@ -1,76 +0,0 @@ -/* - * - * MIT License: - * Copyright (c) 2011 Adrian McEwen - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * adrianm@mcqn.com 1/1/2011 - */ - -#ifndef IPAddress_h -#define IPAddress_h - -#include - -// A class to make it easier to handle and pass around IP addresses - -class IPAddress : public Printable { -private: - uint8_t _address[4]; // IPv4 address - // Access the raw byte array containing the address. Because this returns a pointer - // to the internal structure rather than a copy of the address this function should only - // be used when you know that the usage of the returned uint8_t* will be transient and not - // stored. - uint8_t* raw_address() { return _address; }; - -public: - // Constructors - IPAddress(); - IPAddress(uint8_t first_octet, uint8_t second_octet, uint8_t third_octet, uint8_t fourth_octet); - IPAddress(uint32_t address); - IPAddress(const uint8_t *address); - - // Overloaded cast operator to allow IPAddress objects to be used where a pointer - // to a four-byte uint8_t array is expected - operator uint32_t() { return *((uint32_t*)_address); }; - bool operator==(const IPAddress& addr) { return (*((uint32_t*)_address)) == (*((uint32_t*)addr._address)); }; - bool operator==(const uint8_t* addr); - - // Overloaded index operator to allow getting and setting individual octets of the address - uint8_t operator[](int index) const { return _address[index]; }; - uint8_t& operator[](int index) { return _address[index]; }; - - // Overloaded copy operators to allow initialisation of IPAddress objects from other types - IPAddress& operator=(const uint8_t *address); - IPAddress& operator=(uint32_t address); - - virtual size_t printTo(Print& p) const; - - friend class EthernetClass; - friend class UDP; - friend class Client; - friend class Server; - friend class DhcpClass; - friend class DNSClient; -}; - -const IPAddress INADDR_NONE(0,0,0,0); - - -#endif diff --git a/build/linux/work/hardware/arduino/cores/arduino/Platform.h b/build/linux/work/hardware/arduino/cores/arduino/Platform.h deleted file mode 100644 index 8b8f74277..000000000 --- a/build/linux/work/hardware/arduino/cores/arduino/Platform.h +++ /dev/null @@ -1,23 +0,0 @@ - -#ifndef __PLATFORM_H__ -#define __PLATFORM_H__ - -#include -#include -#include -#include -#include - -typedef unsigned char u8; -typedef unsigned short u16; -typedef unsigned long u32; - -#include "Arduino.h" - -#if defined(USBCON) - #include "USBDesc.h" - #include "USBCore.h" - #include "USBAPI.h" -#endif /* if defined(USBCON) */ - -#endif diff --git a/build/linux/work/hardware/arduino/cores/arduino/Print.cpp b/build/linux/work/hardware/arduino/cores/arduino/Print.cpp deleted file mode 100644 index e541a6ce7..000000000 --- a/build/linux/work/hardware/arduino/cores/arduino/Print.cpp +++ /dev/null @@ -1,263 +0,0 @@ -/* - Print.cpp - Base class that provides print() and println() - Copyright (c) 2008 David A. Mellis. All right reserved. - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with this library; if not, write to the Free Software - Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - - Modified 23 November 2006 by David A. Mellis - */ - -#include -#include -#include -#include -#include "Arduino.h" - -#include "Print.h" - -// Public Methods ////////////////////////////////////////////////////////////// - -/* default implementation: may be overridden */ -size_t Print::write(const uint8_t *buffer, size_t size) -{ - size_t n = 0; - while (size--) { - n += write(*buffer++); - } - return n; -} - -size_t Print::print(const __FlashStringHelper *ifsh) -{ - const char PROGMEM *p = (const char PROGMEM *)ifsh; - size_t n = 0; - while (1) { - unsigned char c = pgm_read_byte(p++); - if (c == 0) break; - n += write(c); - } - return n; -} - -size_t Print::print(const String &s) -{ - size_t n = 0; - for (uint16_t i = 0; i < s.length(); i++) { - n += write(s[i]); - } - return n; -} - -size_t Print::print(const char str[]) -{ - return write(str); -} - -size_t Print::print(char c) -{ - return write(c); -} - -size_t Print::print(unsigned char b, int base) -{ - return print((unsigned long) b, base); -} - -size_t Print::print(int n, int base) -{ - return print((long) n, base); -} - -size_t Print::print(unsigned int n, int base) -{ - return print((unsigned long) n, base); -} - -size_t Print::print(long n, int base) -{ - if (base == 0) { - return write(n); - } else if (base == 10) { - if (n < 0) { - int t = print('-'); - n = -n; - return printNumber(n, 10) + t; - } - return printNumber(n, 10); - } else { - return printNumber(n, base); - } -} - -size_t Print::print(unsigned long n, int base) -{ - if (base == 0) return write(n); - else return printNumber(n, base); -} - -size_t Print::print(double n, int digits) -{ - return printFloat(n, digits); -} - -size_t Print::println(const __FlashStringHelper *ifsh) -{ - size_t n = print(ifsh); - n += println(); - return n; -} - -size_t Print::print(const Printable& x) -{ - return x.printTo(*this); -} - -size_t Print::println(void) -{ - size_t n = print('\r'); - n += print('\n'); - return n; -} - -size_t Print::println(const String &s) -{ - size_t n = print(s); - n += println(); - return n; -} - -size_t Print::println(const char c[]) -{ - size_t n = print(c); - n += println(); - return n; -} - -size_t Print::println(char c) -{ - size_t n = print(c); - n += println(); - return n; -} - -size_t Print::println(unsigned char b, int base) -{ - size_t n = print(b, base); - n += println(); - return n; -} - -size_t Print::println(int num, int base) -{ - size_t n = print(num, base); - n += println(); - return n; -} - -size_t Print::println(unsigned int num, int base) -{ - size_t n = print(num, base); - n += println(); - return n; -} - -size_t Print::println(long num, int base) -{ - size_t n = print(num, base); - n += println(); - return n; -} - -size_t Print::println(unsigned long num, int base) -{ - size_t n = print(num, base); - n += println(); - return n; -} - -size_t Print::println(double num, int digits) -{ - size_t n = print(num, digits); - n += println(); - return n; -} - -size_t Print::println(const Printable& x) -{ - size_t n = print(x); - n += println(); - return n; -} - -// Private Methods ///////////////////////////////////////////////////////////// - -size_t Print::printNumber(unsigned long n, uint8_t base) { - char buf[8 * sizeof(long) + 1]; // Assumes 8-bit chars plus zero byte. - char *str = &buf[sizeof(buf) - 1]; - - *str = '\0'; - - // prevent crash if called with base == 1 - if (base < 2) base = 10; - - do { - unsigned long m = n; - n /= base; - char c = m - base * n; - *--str = c < 10 ? c + '0' : c + 'A' - 10; - } while(n); - - return write(str); -} - -size_t Print::printFloat(double number, uint8_t digits) -{ - size_t n = 0; - - // Handle negative numbers - if (number < 0.0) - { - n += print('-'); - number = -number; - } - - // Round correctly so that print(1.999, 2) prints as "2.00" - double rounding = 0.5; - for (uint8_t i=0; i 0) { - n += print("."); - } - - // Extract digits from the remainder one at a time - while (digits-- > 0) - { - remainder *= 10.0; - int toPrint = int(remainder); - n += print(toPrint); - remainder -= toPrint; - } - - return n; -} diff --git a/build/linux/work/hardware/arduino/cores/arduino/Print.h b/build/linux/work/hardware/arduino/cores/arduino/Print.h deleted file mode 100644 index 1af6b723f..000000000 --- a/build/linux/work/hardware/arduino/cores/arduino/Print.h +++ /dev/null @@ -1,78 +0,0 @@ -/* - Print.h - Base class that provides print() and println() - Copyright (c) 2008 David A. Mellis. All right reserved. - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with this library; if not, write to the Free Software - Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -*/ - -#ifndef Print_h -#define Print_h - -#include -#include // for size_t - -#include "WString.h" -#include "Printable.h" - -#define DEC 10 -#define HEX 16 -#define OCT 8 -#define BIN 2 - -class Print -{ - private: - int write_error; - size_t printNumber(unsigned long, uint8_t); - size_t printFloat(double, uint8_t); - protected: - void setWriteError(int err = 1) { write_error = err; } - public: - Print() : write_error(0) {} - - int getWriteError() { return write_error; } - void clearWriteError() { setWriteError(0); } - - virtual size_t write(uint8_t) = 0; - size_t write(const char *str) { return write((const uint8_t *)str, strlen(str)); } - virtual size_t write(const uint8_t *buffer, size_t size); - - size_t print(const __FlashStringHelper *); - size_t print(const String &); - size_t print(const char[]); - size_t print(char); - size_t print(unsigned char, int = DEC); - size_t print(int, int = DEC); - size_t print(unsigned int, int = DEC); - size_t print(long, int = DEC); - size_t print(unsigned long, int = DEC); - size_t print(double, int = 2); - size_t print(const Printable&); - - size_t println(const __FlashStringHelper *); - size_t println(const String &s); - size_t println(const char[]); - size_t println(char); - size_t println(unsigned char, int = DEC); - size_t println(int, int = DEC); - size_t println(unsigned int, int = DEC); - size_t println(long, int = DEC); - size_t println(unsigned long, int = DEC); - size_t println(double, int = 2); - size_t println(const Printable&); - size_t println(void); -}; - -#endif diff --git a/build/linux/work/hardware/arduino/cores/arduino/Printable.h b/build/linux/work/hardware/arduino/cores/arduino/Printable.h deleted file mode 100644 index d03c9af62..000000000 --- a/build/linux/work/hardware/arduino/cores/arduino/Printable.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - Printable.h - Interface class that allows printing of complex types - Copyright (c) 2011 Adrian McEwen. All right reserved. - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with this library; if not, write to the Free Software - Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -*/ - -#ifndef Printable_h -#define Printable_h - -#include - -class Print; - -/** The Printable class provides a way for new classes to allow themselves to be printed. - By deriving from Printable and implementing the printTo method, it will then be possible - for users to print out instances of this class by passing them into the usual - Print::print and Print::println methods. -*/ - -class Printable -{ - public: - virtual size_t printTo(Print& p) const = 0; -}; - -#endif - diff --git a/build/linux/work/hardware/arduino/cores/arduino/Server.h b/build/linux/work/hardware/arduino/cores/arduino/Server.h deleted file mode 100644 index 9674c7626..000000000 --- a/build/linux/work/hardware/arduino/cores/arduino/Server.h +++ /dev/null @@ -1,9 +0,0 @@ -#ifndef server_h -#define server_h - -class Server : public Print { -public: - virtual void begin() =0; -}; - -#endif diff --git a/build/linux/work/hardware/arduino/cores/arduino/Stream.cpp b/build/linux/work/hardware/arduino/cores/arduino/Stream.cpp deleted file mode 100644 index 3d5b90529..000000000 --- a/build/linux/work/hardware/arduino/cores/arduino/Stream.cpp +++ /dev/null @@ -1,246 +0,0 @@ -/* - Stream.cpp - adds parsing methods to Stream class - Copyright (c) 2008 David A. Mellis. All right reserved. - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with this library; if not, write to the Free Software - Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - - Created July 2011 - parsing functions based on TextFinder library by Michael Margolis - */ - -#include "Arduino.h" -#include "Stream.h" - -#define PARSE_TIMEOUT 1000 // default number of milli-seconds to wait -#define NO_SKIP_CHAR 1 // a magic char not found in a valid ASCII numeric field - -// private method to read stream with timeout -int Stream::timedRead() -{ - int c; - _startMillis = millis(); - do { - c = read(); - if (c >= 0) return c; - } while(millis() - _startMillis < _timeout); - return -1; // -1 indicates timeout -} - -// private method to peek stream with timeout -int Stream::timedPeek() -{ - int c; - _startMillis = millis(); - do { - c = peek(); - if (c >= 0) return c; - } while(millis() - _startMillis < _timeout); - return -1; // -1 indicates timeout -} - -// returns peek of the next digit in the stream or -1 if timeout -// discards non-numeric characters -int Stream::peekNextDigit() -{ - int c; - while (1) { - c = timedPeek(); - if (c < 0) return c; // timeout - if (c == '-') return c; - if (c >= '0' && c <= '9') return c; - read(); // discard non-numeric - } -} - -// Public Methods -////////////////////////////////////////////////////////////// - -void Stream::setTimeout(unsigned long timeout) // sets the maximum number of milliseconds to wait -{ - _timeout = timeout; -} - - // find returns true if the target string is found -bool Stream::find(char *target) -{ - return findUntil(target, NULL); -} - -// reads data from the stream until the target string of given length is found -// returns true if target string is found, false if timed out -bool Stream::find(char *target, size_t length) -{ - return findUntil(target, length, NULL, 0); -} - -// as find but search ends if the terminator string is found -bool Stream::findUntil(char *target, char *terminator) -{ - return findUntil(target, strlen(target), terminator, strlen(terminator)); -} - -// reads data from the stream until the target string of the given length is found -// search terminated if the terminator string is found -// returns true if target string is found, false if terminated or timed out -bool Stream::findUntil(char *target, size_t targetLen, char *terminator, size_t termLen) -{ - size_t index = 0; // maximum target string length is 64k bytes! - size_t termIndex = 0; - int c; - - if( *target == 0) - return true; // return true if target is a null string - while( (c = timedRead()) > 0){ - - if(c != target[index]) - index = 0; // reset index if any char does not match - - if( c == target[index]){ - //////Serial.print("found "); Serial.write(c); Serial.print("index now"); Serial.println(index+1); - if(++index >= targetLen){ // return true if all chars in the target match - return true; - } - } - - if(termLen > 0 && c == terminator[termIndex]){ - if(++termIndex >= termLen) - return false; // return false if terminate string found before target string - } - else - termIndex = 0; - } - return false; -} - - -// returns the first valid (long) integer value from the current position. -// initial characters that are not digits (or the minus sign) are skipped -// function is terminated by the first character that is not a digit. -long Stream::parseInt() -{ - return parseInt(NO_SKIP_CHAR); // terminate on first non-digit character (or timeout) -} - -// as above but a given skipChar is ignored -// this allows format characters (typically commas) in values to be ignored -long Stream::parseInt(char skipChar) -{ - boolean isNegative = false; - long value = 0; - int c; - - c = peekNextDigit(); - // ignore non numeric leading characters - if(c < 0) - return 0; // zero returned if timeout - - do{ - if(c == skipChar) - ; // ignore this charactor - else if(c == '-') - isNegative = true; - else if(c >= '0' && c <= '9') // is c a digit? - value = value * 10 + c - '0'; - read(); // consume the character we got with peek - c = timedPeek(); - } - while( (c >= '0' && c <= '9') || c == skipChar ); - - if(isNegative) - value = -value; - return value; -} - - -// as parseInt but returns a floating point value -float Stream::parseFloat() -{ - return parseFloat(NO_SKIP_CHAR); -} - -// as above but the given skipChar is ignored -// this allows format characters (typically commas) in values to be ignored -float Stream::parseFloat(char skipChar){ - boolean isNegative = false; - boolean isFraction = false; - long value = 0; - char c; - float fraction = 1.0; - - c = peekNextDigit(); - // ignore non numeric leading characters - if(c < 0) - return 0; // zero returned if timeout - - do{ - if(c == skipChar) - ; // ignore - else if(c == '-') - isNegative = true; - else if (c == '.') - isFraction = true; - else if(c >= '0' && c <= '9') { // is c a digit? - value = value * 10 + c - '0'; - if(isFraction) - fraction *= 0.1; - } - read(); // consume the character we got with peek - c = timedPeek(); - } - while( (c >= '0' && c <= '9') || c == '.' || c == skipChar ); - - if(isNegative) - value = -value; - if(isFraction) - return value * fraction; - else - return value; -} - -// read characters from stream into buffer -// terminates if length characters have been read, or timeout (see setTimeout) -// returns the number of characters placed in the buffer -// the buffer is NOT null terminated. -// -size_t Stream::readBytes(char *buffer, size_t length) -{ - size_t count = 0; - while (count < length) { - int c = timedRead(); - if (c < 0) break; - *buffer++ = (char)c; - count++; - } - return count; -} - - -// as readBytes with terminator character -// terminates if length characters have been read, timeout, or if the terminator character detected -// returns the number of characters placed in the buffer (0 means no valid data found) - -size_t Stream::readBytesUntil(char terminator, char *buffer, size_t length) -{ - if (length < 1) return 0; - size_t index = 0; - while (index < length) { - int c = timedRead(); - if (c < 0 || c == terminator) break; - *buffer++ = (char)c; - index++; - } - return index; // return number of characters, not including null terminator -} - diff --git a/build/linux/work/hardware/arduino/cores/arduino/Stream.h b/build/linux/work/hardware/arduino/cores/arduino/Stream.h deleted file mode 100644 index 13f11bee0..000000000 --- a/build/linux/work/hardware/arduino/cores/arduino/Stream.h +++ /dev/null @@ -1,94 +0,0 @@ -/* - Stream.h - base class for character-based streams. - Copyright (c) 2010 David A. Mellis. All right reserved. - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with this library; if not, write to the Free Software - Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - - parsing functions based on TextFinder library by Michael Margolis -*/ - -#ifndef Stream_h -#define Stream_h - -#include -#include "Print.h" - -// compatability macros for testing -/* -#define getInt() parseInt() -#define getInt(skipChar) parseInt(skipchar) -#define getFloat() parseFloat() -#define getFloat(skipChar) parseFloat(skipChar) -#define getString( pre_string, post_string, buffer, length) -readBytesBetween( pre_string, terminator, buffer, length) -*/ - -class Stream : public Print -{ - private: - unsigned long _timeout; // number of milliseconds to wait for the next char before aborting timed read - unsigned long _startMillis; // used for timeout measurement - int timedRead(); // private method to read stream with timeout - int timedPeek(); // private method to peek stream with timeout - int peekNextDigit(); // returns the next numeric digit in the stream or -1 if timeout - - public: - virtual int available() = 0; - virtual int read() = 0; - virtual int peek() = 0; - virtual void flush() = 0; - - Stream() {_timeout=1000;} - -// parsing methods - - void setTimeout(unsigned long timeout); // sets maximum milliseconds to wait for stream data, default is 1 second - - bool find(char *target); // reads data from the stream until the target string is found - // returns true if target string is found, false if timed out (see setTimeout) - - bool find(char *target, size_t length); // reads data from the stream until the target string of given length is found - // returns true if target string is found, false if timed out - - bool findUntil(char *target, char *terminator); // as find but search ends if the terminator string is found - - bool findUntil(char *target, size_t targetLen, char *terminate, size_t termLen); // as above but search ends if the terminate string is found - - - long parseInt(); // returns the first valid (long) integer value from the current position. - // initial characters that are not digits (or the minus sign) are skipped - // integer is terminated by the first character that is not a digit. - - float parseFloat(); // float version of parseInt - - size_t readBytes( char *buffer, size_t length); // read chars from stream into buffer - // terminates if length characters have been read or timeout (see setTimeout) - // returns the number of characters placed in the buffer (0 means no valid data found) - - size_t readBytesUntil( char terminator, char *buffer, size_t length); // as readBytes with terminator character - // terminates if length characters have been read, timeout, or if the terminator character detected - // returns the number of characters placed in the buffer (0 means no valid data found) - - // Arduino String functions to be added here - - protected: - long parseInt(char skipChar); // as above but the given skipChar is ignored - // as above but the given skipChar is ignored - // this allows format characters (typically commas) in values to be ignored - - float parseFloat(char skipChar); // as above but the given skipChar is ignored -}; - -#endif diff --git a/build/linux/work/hardware/arduino/cores/arduino/Tone.cpp b/build/linux/work/hardware/arduino/cores/arduino/Tone.cpp deleted file mode 100644 index 20eed3f48..000000000 --- a/build/linux/work/hardware/arduino/cores/arduino/Tone.cpp +++ /dev/null @@ -1,601 +0,0 @@ -/* Tone.cpp - - A Tone Generator Library - - Written by Brett Hagman - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with this library; if not, write to the Free Software - Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - -Version Modified By Date Comments -------- ----------- -------- -------- -0001 B Hagman 09/08/02 Initial coding -0002 B Hagman 09/08/18 Multiple pins -0003 B Hagman 09/08/18 Moved initialization from constructor to begin() -0004 B Hagman 09/09/26 Fixed problems with ATmega8 -0005 B Hagman 09/11/23 Scanned prescalars for best fit on 8 bit timers - 09/11/25 Changed pin toggle method to XOR - 09/11/25 Fixed timer0 from being excluded -0006 D Mellis 09/12/29 Replaced objects with functions -0007 M Sproul 10/08/29 Changed #ifdefs from cpu to register -*************************************************/ - -#include -#include -#include "Arduino.h" -#include "pins_arduino.h" - -#if defined(__AVR_ATmega8__) || defined(__AVR_ATmega128__) -#define TCCR2A TCCR2 -#define TCCR2B TCCR2 -#define COM2A1 COM21 -#define COM2A0 COM20 -#define OCR2A OCR2 -#define TIMSK2 TIMSK -#define OCIE2A OCIE2 -#define TIMER2_COMPA_vect TIMER2_COMP_vect -#define TIMSK1 TIMSK -#endif - -// timerx_toggle_count: -// > 0 - duration specified -// = 0 - stopped -// < 0 - infinitely (until stop() method called, or new play() called) - -#if !defined(__AVR_ATmega8__) -volatile long timer0_toggle_count; -volatile uint8_t *timer0_pin_port; -volatile uint8_t timer0_pin_mask; -#endif - -volatile long timer1_toggle_count; -volatile uint8_t *timer1_pin_port; -volatile uint8_t timer1_pin_mask; -volatile long timer2_toggle_count; -volatile uint8_t *timer2_pin_port; -volatile uint8_t timer2_pin_mask; - -#if defined(TIMSK3) -volatile long timer3_toggle_count; -volatile uint8_t *timer3_pin_port; -volatile uint8_t timer3_pin_mask; -#endif - -#if defined(TIMSK4) -volatile long timer4_toggle_count; -volatile uint8_t *timer4_pin_port; -volatile uint8_t timer4_pin_mask; -#endif - -#if defined(TIMSK5) -volatile long timer5_toggle_count; -volatile uint8_t *timer5_pin_port; -volatile uint8_t timer5_pin_mask; -#endif - - -// MLS: This does not make sense, the 3 options are the same -#if defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__) - -#define AVAILABLE_TONE_PINS 1 - -const uint8_t PROGMEM tone_pin_to_timer_PGM[] = { 2 /*, 3, 4, 5, 1, 0 */ }; -static uint8_t tone_pins[AVAILABLE_TONE_PINS] = { 255 /*, 255, 255, 255, 255, 255 */ }; - -#elif defined(__AVR_ATmega8__) - -#define AVAILABLE_TONE_PINS 1 - -const uint8_t PROGMEM tone_pin_to_timer_PGM[] = { 2 /*, 1 */ }; -static uint8_t tone_pins[AVAILABLE_TONE_PINS] = { 255 /*, 255 */ }; - -#else - -#define AVAILABLE_TONE_PINS 1 - -// Leave timer 0 to last. -const uint8_t PROGMEM tone_pin_to_timer_PGM[] = { 2 /*, 1, 0 */ }; -static uint8_t tone_pins[AVAILABLE_TONE_PINS] = { 255 /*, 255, 255 */ }; - -#endif - - - -static int8_t toneBegin(uint8_t _pin) -{ - int8_t _timer = -1; - - // if we're already using the pin, the timer should be configured. - for (int i = 0; i < AVAILABLE_TONE_PINS; i++) { - if (tone_pins[i] == _pin) { - return pgm_read_byte(tone_pin_to_timer_PGM + i); - } - } - - // search for an unused timer. - for (int i = 0; i < AVAILABLE_TONE_PINS; i++) { - if (tone_pins[i] == 255) { - tone_pins[i] = _pin; - _timer = pgm_read_byte(tone_pin_to_timer_PGM + i); - break; - } - } - - if (_timer != -1) - { - // Set timer specific stuff - // All timers in CTC mode - // 8 bit timers will require changing prescalar values, - // whereas 16 bit timers are set to either ck/1 or ck/64 prescalar - switch (_timer) - { - #if defined(TCCR0A) && defined(TCCR0B) - case 0: - // 8 bit timer - TCCR0A = 0; - TCCR0B = 0; - bitWrite(TCCR0A, WGM01, 1); - bitWrite(TCCR0B, CS00, 1); - timer0_pin_port = portOutputRegister(digitalPinToPort(_pin)); - timer0_pin_mask = digitalPinToBitMask(_pin); - break; - #endif - - #if defined(TCCR1A) && defined(TCCR1B) && defined(WGM12) - case 1: - // 16 bit timer - TCCR1A = 0; - TCCR1B = 0; - bitWrite(TCCR1B, WGM12, 1); - bitWrite(TCCR1B, CS10, 1); - timer1_pin_port = portOutputRegister(digitalPinToPort(_pin)); - timer1_pin_mask = digitalPinToBitMask(_pin); - break; - #endif - - #if defined(TCCR2A) && defined(TCCR2B) - case 2: - // 8 bit timer - TCCR2A = 0; - TCCR2B = 0; - bitWrite(TCCR2A, WGM21, 1); - bitWrite(TCCR2B, CS20, 1); - timer2_pin_port = portOutputRegister(digitalPinToPort(_pin)); - timer2_pin_mask = digitalPinToBitMask(_pin); - break; - #endif - - #if defined(TCCR3A) && defined(TCCR3B) && defined(TIMSK3) - case 3: - // 16 bit timer - TCCR3A = 0; - TCCR3B = 0; - bitWrite(TCCR3B, WGM32, 1); - bitWrite(TCCR3B, CS30, 1); - timer3_pin_port = portOutputRegister(digitalPinToPort(_pin)); - timer3_pin_mask = digitalPinToBitMask(_pin); - break; - #endif - - #if defined(TCCR4A) && defined(TCCR4B) && defined(TIMSK4) - case 4: - // 16 bit timer - TCCR4A = 0; - TCCR4B = 0; - #if defined(WGM42) - bitWrite(TCCR4B, WGM42, 1); - #elif defined(CS43) - #warning this may not be correct - // atmega32u4 - bitWrite(TCCR4B, CS43, 1); - #endif - bitWrite(TCCR4B, CS40, 1); - timer4_pin_port = portOutputRegister(digitalPinToPort(_pin)); - timer4_pin_mask = digitalPinToBitMask(_pin); - break; - #endif - - #if defined(TCCR5A) && defined(TCCR5B) && defined(TIMSK5) - case 5: - // 16 bit timer - TCCR5A = 0; - TCCR5B = 0; - bitWrite(TCCR5B, WGM52, 1); - bitWrite(TCCR5B, CS50, 1); - timer5_pin_port = portOutputRegister(digitalPinToPort(_pin)); - timer5_pin_mask = digitalPinToBitMask(_pin); - break; - #endif - } - } - - return _timer; -} - - - -// frequency (in hertz) and duration (in milliseconds). - -void tone(uint8_t _pin, unsigned int frequency, unsigned long duration) -{ - uint8_t prescalarbits = 0b001; - long toggle_count = 0; - uint32_t ocr = 0; - int8_t _timer; - - _timer = toneBegin(_pin); - - if (_timer >= 0) - { - // Set the pinMode as OUTPUT - pinMode(_pin, OUTPUT); - - // if we are using an 8 bit timer, scan through prescalars to find the best fit - if (_timer == 0 || _timer == 2) - { - ocr = F_CPU / frequency / 2 - 1; - prescalarbits = 0b001; // ck/1: same for both timers - if (ocr > 255) - { - ocr = F_CPU / frequency / 2 / 8 - 1; - prescalarbits = 0b010; // ck/8: same for both timers - - if (_timer == 2 && ocr > 255) - { - ocr = F_CPU / frequency / 2 / 32 - 1; - prescalarbits = 0b011; - } - - if (ocr > 255) - { - ocr = F_CPU / frequency / 2 / 64 - 1; - prescalarbits = _timer == 0 ? 0b011 : 0b100; - - if (_timer == 2 && ocr > 255) - { - ocr = F_CPU / frequency / 2 / 128 - 1; - prescalarbits = 0b101; - } - - if (ocr > 255) - { - ocr = F_CPU / frequency / 2 / 256 - 1; - prescalarbits = _timer == 0 ? 0b100 : 0b110; - if (ocr > 255) - { - // can't do any better than /1024 - ocr = F_CPU / frequency / 2 / 1024 - 1; - prescalarbits = _timer == 0 ? 0b101 : 0b111; - } - } - } - } - -#if defined(TCCR0B) - if (_timer == 0) - { - TCCR0B = prescalarbits; - } - else -#endif -#if defined(TCCR2B) - { - TCCR2B = prescalarbits; - } -#else - { - // dummy place holder to make the above ifdefs work - } -#endif - } - else - { - // two choices for the 16 bit timers: ck/1 or ck/64 - ocr = F_CPU / frequency / 2 - 1; - - prescalarbits = 0b001; - if (ocr > 0xffff) - { - ocr = F_CPU / frequency / 2 / 64 - 1; - prescalarbits = 0b011; - } - - if (_timer == 1) - { -#if defined(TCCR1B) - TCCR1B = (TCCR1B & 0b11111000) | prescalarbits; -#endif - } -#if defined(TCCR3B) - else if (_timer == 3) - TCCR3B = (TCCR3B & 0b11111000) | prescalarbits; -#endif -#if defined(TCCR4B) - else if (_timer == 4) - TCCR4B = (TCCR4B & 0b11111000) | prescalarbits; -#endif -#if defined(TCCR5B) - else if (_timer == 5) - TCCR5B = (TCCR5B & 0b11111000) | prescalarbits; -#endif - - } - - - // Calculate the toggle count - if (duration > 0) - { - toggle_count = 2 * frequency * duration / 1000; - } - else - { - toggle_count = -1; - } - - // Set the OCR for the given timer, - // set the toggle count, - // then turn on the interrupts - switch (_timer) - { - -#if defined(OCR0A) && defined(TIMSK0) && defined(OCIE0A) - case 0: - OCR0A = ocr; - timer0_toggle_count = toggle_count; - bitWrite(TIMSK0, OCIE0A, 1); - break; -#endif - - case 1: -#if defined(OCR1A) && defined(TIMSK1) && defined(OCIE1A) - OCR1A = ocr; - timer1_toggle_count = toggle_count; - bitWrite(TIMSK1, OCIE1A, 1); -#elif defined(OCR1A) && defined(TIMSK) && defined(OCIE1A) - // this combination is for at least the ATmega32 - OCR1A = ocr; - timer1_toggle_count = toggle_count; - bitWrite(TIMSK, OCIE1A, 1); -#endif - break; - -#if defined(OCR2A) && defined(TIMSK2) && defined(OCIE2A) - case 2: - OCR2A = ocr; - timer2_toggle_count = toggle_count; - bitWrite(TIMSK2, OCIE2A, 1); - break; -#endif - -#if defined(TIMSK3) - case 3: - OCR3A = ocr; - timer3_toggle_count = toggle_count; - bitWrite(TIMSK3, OCIE3A, 1); - break; -#endif - -#if defined(TIMSK4) - case 4: - OCR4A = ocr; - timer4_toggle_count = toggle_count; - bitWrite(TIMSK4, OCIE4A, 1); - break; -#endif - -#if defined(OCR5A) && defined(TIMSK5) && defined(OCIE5A) - case 5: - OCR5A = ocr; - timer5_toggle_count = toggle_count; - bitWrite(TIMSK5, OCIE5A, 1); - break; -#endif - - } - } -} - - -// XXX: this function only works properly for timer 2 (the only one we use -// currently). for the others, it should end the tone, but won't restore -// proper PWM functionality for the timer. -void disableTimer(uint8_t _timer) -{ - switch (_timer) - { - case 0: - #if defined(TIMSK0) - TIMSK0 = 0; - #elif defined(TIMSK) - TIMSK = 0; // atmega32 - #endif - break; - -#if defined(TIMSK1) && defined(OCIE1A) - case 1: - bitWrite(TIMSK1, OCIE1A, 0); - break; -#endif - - case 2: - #if defined(TIMSK2) && defined(OCIE2A) - bitWrite(TIMSK2, OCIE2A, 0); // disable interrupt - #endif - #if defined(TCCR2A) && defined(WGM20) - TCCR2A = (1 << WGM20); - #endif - #if defined(TCCR2B) && defined(CS22) - TCCR2B = (TCCR2B & 0b11111000) | (1 << CS22); - #endif - #if defined(OCR2A) - OCR2A = 0; - #endif - break; - -#if defined(TIMSK3) - case 3: - TIMSK3 = 0; - break; -#endif - -#if defined(TIMSK4) - case 4: - TIMSK4 = 0; - break; -#endif - -#if defined(TIMSK5) - case 5: - TIMSK5 = 0; - break; -#endif - } -} - - -void noTone(uint8_t _pin) -{ - int8_t _timer = -1; - - for (int i = 0; i < AVAILABLE_TONE_PINS; i++) { - if (tone_pins[i] == _pin) { - _timer = pgm_read_byte(tone_pin_to_timer_PGM + i); - tone_pins[i] = 255; - } - } - - disableTimer(_timer); - - digitalWrite(_pin, 0); -} - -#if 0 -#if !defined(__AVR_ATmega8__) -ISR(TIMER0_COMPA_vect) -{ - if (timer0_toggle_count != 0) - { - // toggle the pin - *timer0_pin_port ^= timer0_pin_mask; - - if (timer0_toggle_count > 0) - timer0_toggle_count--; - } - else - { - disableTimer(0); - *timer0_pin_port &= ~(timer0_pin_mask); // keep pin low after stop - } -} -#endif - - -ISR(TIMER1_COMPA_vect) -{ - if (timer1_toggle_count != 0) - { - // toggle the pin - *timer1_pin_port ^= timer1_pin_mask; - - if (timer1_toggle_count > 0) - timer1_toggle_count--; - } - else - { - disableTimer(1); - *timer1_pin_port &= ~(timer1_pin_mask); // keep pin low after stop - } -} -#endif - - -ISR(TIMER2_COMPA_vect) -{ - - if (timer2_toggle_count != 0) - { - // toggle the pin - *timer2_pin_port ^= timer2_pin_mask; - - if (timer2_toggle_count > 0) - timer2_toggle_count--; - } - else - { - // need to call noTone() so that the tone_pins[] entry is reset, so the - // timer gets initialized next time we call tone(). - // XXX: this assumes timer 2 is always the first one used. - noTone(tone_pins[0]); -// disableTimer(2); -// *timer2_pin_port &= ~(timer2_pin_mask); // keep pin low after stop - } -} - - - -//#if defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__) -#if 0 - -ISR(TIMER3_COMPA_vect) -{ - if (timer3_toggle_count != 0) - { - // toggle the pin - *timer3_pin_port ^= timer3_pin_mask; - - if (timer3_toggle_count > 0) - timer3_toggle_count--; - } - else - { - disableTimer(3); - *timer3_pin_port &= ~(timer3_pin_mask); // keep pin low after stop - } -} - -ISR(TIMER4_COMPA_vect) -{ - if (timer4_toggle_count != 0) - { - // toggle the pin - *timer4_pin_port ^= timer4_pin_mask; - - if (timer4_toggle_count > 0) - timer4_toggle_count--; - } - else - { - disableTimer(4); - *timer4_pin_port &= ~(timer4_pin_mask); // keep pin low after stop - } -} - -ISR(TIMER5_COMPA_vect) -{ - if (timer5_toggle_count != 0) - { - // toggle the pin - *timer5_pin_port ^= timer5_pin_mask; - - if (timer5_toggle_count > 0) - timer5_toggle_count--; - } - else - { - disableTimer(5); - *timer5_pin_port &= ~(timer5_pin_mask); // keep pin low after stop - } -} - -#endif diff --git a/build/linux/work/hardware/arduino/cores/arduino/USBAPI.h b/build/linux/work/hardware/arduino/cores/arduino/USBAPI.h deleted file mode 100644 index f66cb16d2..000000000 --- a/build/linux/work/hardware/arduino/cores/arduino/USBAPI.h +++ /dev/null @@ -1,195 +0,0 @@ - - -#ifndef __USBAPI__ -#define __USBAPI__ - -#if defined(USBCON) - -//================================================================================ -//================================================================================ -// USB - -class USB_ -{ -public: - USB_(); - bool configured(); - - void attach(); - void detach(); // Serial port goes down too... - void poll(); -}; -extern USB_ USB; - -//================================================================================ -//================================================================================ -// Serial over CDC (Serial1 is the physical port) - -class Serial_ : public Stream -{ -private: - ring_buffer *_cdc_rx_buffer; -public: - void begin(uint16_t baud_count); - void end(void); - - virtual int available(void); - virtual void accept(void); - virtual int peek(void); - virtual int read(void); - virtual void flush(void); - virtual size_t write(uint8_t); - operator bool(); -}; -extern Serial_ Serial; - -//================================================================================ -//================================================================================ -// Mouse - -#define MOUSE_LEFT 1 -#define MOUSE_RIGHT 2 -#define MOUSE_MIDDLE 4 -#define MOUSE_ALL (MOUSE_LEFT | MOUSE_RIGHT | MOUSE_MIDDLE) - -class Mouse_ -{ -private: - uint8_t _buttons; - void buttons(uint8_t b); -public: - Mouse_(void); - void begin(void); - void end(void); - void click(uint8_t b = MOUSE_LEFT); - void move(signed char x, signed char y, signed char wheel = 0); - void press(uint8_t b = MOUSE_LEFT); // press LEFT by default - void release(uint8_t b = MOUSE_LEFT); // release LEFT by default - bool isPressed(uint8_t b = MOUSE_ALL); // check all buttons by default -}; -extern Mouse_ Mouse; - -//================================================================================ -//================================================================================ -// Keyboard - -#define KEY_LEFT_CTRL 0x80 -#define KEY_LEFT_SHIFT 0x81 -#define KEY_LEFT_ALT 0x82 -#define KEY_LEFT_GUI 0x83 -#define KEY_RIGHT_CTRL 0x84 -#define KEY_RIGHT_SHIFT 0x85 -#define KEY_RIGHT_ALT 0x86 -#define KEY_RIGHT_GUI 0x87 - -#define KEY_UP_ARROW 0xDA -#define KEY_DOWN_ARROW 0xD9 -#define KEY_LEFT_ARROW 0xD8 -#define KEY_RIGHT_ARROW 0xD7 -#define KEY_BACKSPACE 0xB2 -#define KEY_TAB 0xB3 -#define KEY_RETURN 0xB0 -#define KEY_ESC 0xB1 -#define KEY_INSERT 0xD1 -#define KEY_DELETE 0xD4 -#define KEY_PAGE_UP 0xD3 -#define KEY_PAGE_DOWN 0xD6 -#define KEY_HOME 0xD2 -#define KEY_END 0xD5 -#define KEY_CAPS_LOCK 0xC1 -#define KEY_F1 0xC2 -#define KEY_F2 0xC3 -#define KEY_F3 0xC4 -#define KEY_F4 0xC5 -#define KEY_F5 0xC6 -#define KEY_F6 0xC7 -#define KEY_F7 0xC8 -#define KEY_F8 0xC9 -#define KEY_F9 0xCA -#define KEY_F10 0xCB -#define KEY_F11 0xCC -#define KEY_F12 0xCD - -// Low level key report: up to 6 keys and shift, ctrl etc at once -typedef struct -{ - uint8_t modifiers; - uint8_t reserved; - uint8_t keys[6]; -} KeyReport; - -class Keyboard_ : public Print -{ -private: - KeyReport _keyReport; - void sendReport(KeyReport* keys); -public: - Keyboard_(void); - void begin(void); - void end(void); - virtual size_t write(uint8_t k); - virtual size_t press(uint8_t k); - virtual size_t release(uint8_t k); - virtual void releaseAll(void); -}; -extern Keyboard_ Keyboard; - -//================================================================================ -//================================================================================ -// Low level API - -typedef struct -{ - uint8_t bmRequestType; - uint8_t bRequest; - uint8_t wValueL; - uint8_t wValueH; - uint16_t wIndex; - uint16_t wLength; -} Setup; - -//================================================================================ -//================================================================================ -// HID 'Driver' - -int HID_GetInterface(uint8_t* interfaceNum); -int HID_GetDescriptor(int i); -bool HID_Setup(Setup& setup); -void HID_SendReport(uint8_t id, const void* data, int len); - -//================================================================================ -//================================================================================ -// MSC 'Driver' - -int MSC_GetInterface(uint8_t* interfaceNum); -int MSC_GetDescriptor(int i); -bool MSC_Setup(Setup& setup); -bool MSC_Data(uint8_t rx,uint8_t tx); - -//================================================================================ -//================================================================================ -// CSC 'Driver' - -int CDC_GetInterface(uint8_t* interfaceNum); -int CDC_GetDescriptor(int i); -bool CDC_Setup(Setup& setup); - -//================================================================================ -//================================================================================ - -#define TRANSFER_PGM 0x80 -#define TRANSFER_RELEASE 0x40 -#define TRANSFER_ZERO 0x20 - -int USB_SendControl(uint8_t flags, const void* d, int len); -int USB_RecvControl(void* d, int len); - -uint8_t USB_Available(uint8_t ep); -int USB_Send(uint8_t ep, const void* data, int len); // blocking -int USB_Recv(uint8_t ep, void* data, int len); // non-blocking -int USB_Recv(uint8_t ep); // non-blocking -void USB_Flush(uint8_t ep); - -#endif - -#endif /* if defined(USBCON) */ \ No newline at end of file diff --git a/build/linux/work/hardware/arduino/cores/arduino/USBCore.cpp b/build/linux/work/hardware/arduino/cores/arduino/USBCore.cpp deleted file mode 100644 index c360d262a..000000000 --- a/build/linux/work/hardware/arduino/cores/arduino/USBCore.cpp +++ /dev/null @@ -1,668 +0,0 @@ - - -/* Copyright (c) 2010, Peter Barrett -** -** Permission to use, copy, modify, and/or distribute this software for -** any purpose with or without fee is hereby granted, provided that the -** above copyright notice and this permission notice appear in all copies. -** -** THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL -** WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED -** WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR -** BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES -** OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, -** WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, -** ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS -** SOFTWARE. -*/ - -#include "Platform.h" -#include "USBAPI.h" -#include "USBDesc.h" - -#if defined(USBCON) - -#define EP_TYPE_CONTROL 0x00 -#define EP_TYPE_BULK_IN 0x81 -#define EP_TYPE_BULK_OUT 0x80 -#define EP_TYPE_INTERRUPT_IN 0xC1 -#define EP_TYPE_INTERRUPT_OUT 0xC0 -#define EP_TYPE_ISOCHRONOUS_IN 0x41 -#define EP_TYPE_ISOCHRONOUS_OUT 0x40 - -/** Pulse generation counters to keep track of the number of milliseconds remaining for each pulse type */ -#define TX_RX_LED_PULSE_MS 100 -volatile u8 TxLEDPulse; /**< Milliseconds remaining for data Tx LED pulse */ -volatile u8 RxLEDPulse; /**< Milliseconds remaining for data Rx LED pulse */ - -//================================================================== -//================================================================== - -extern const u16 STRING_LANGUAGE[] PROGMEM; -extern const u16 STRING_IPRODUCT[] PROGMEM; -extern const u16 STRING_IMANUFACTURER[] PROGMEM; -extern const DeviceDescriptor USB_DeviceDescriptor PROGMEM; -extern const DeviceDescriptor USB_DeviceDescriptorA PROGMEM; - -const u16 STRING_LANGUAGE[2] = { - (3<<8) | (2+2), - 0x0409 // English -}; - -const u16 STRING_IPRODUCT[17] = { - (3<<8) | (2+2*16), -#if USB_PID == USB_PID_LEONARDO - 'A','r','d','u','i','n','o',' ','L','e','o','n','a','r','d','o' -#elif USB_PID == USB_PID_MICRO - 'A','r','d','u','i','n','o',' ','M','i','c','r','o',' ',' ',' ' -#endif -}; - -const u16 STRING_IMANUFACTURER[12] = { - (3<<8) | (2+2*11), - 'A','r','d','u','i','n','o',' ','L','L','C' -}; - -#ifdef CDC_ENABLED -#define DEVICE_CLASS 0x02 -#else -#define DEVICE_CLASS 0x00 -#endif - -// DEVICE DESCRIPTOR -const DeviceDescriptor USB_DeviceDescriptor = - D_DEVICE(0x00,0x00,0x00,64,USB_VID,USB_PID,0x100,IMANUFACTURER,IPRODUCT,0,1); - -const DeviceDescriptor USB_DeviceDescriptorA = - D_DEVICE(DEVICE_CLASS,0x00,0x00,64,USB_VID,USB_PID,0x100,IMANUFACTURER,IPRODUCT,0,1); - -//================================================================== -//================================================================== - -volatile u8 _usbConfiguration = 0; - -static inline void WaitIN(void) -{ - while (!(UEINTX & (1< len) - n = len; - len -= n; - { - LockEP lock(ep); - if (ep & TRANSFER_ZERO) - { - while (n--) - Send8(0); - } - else if (ep & TRANSFER_PGM) - { - while (n--) - Send8(pgm_read_byte(data++)); - } - else - { - while (n--) - Send8(*data++); - } - if (!ReadWriteAllowed() || ((len == 0) && (ep & TRANSFER_RELEASE))) // Release full buffer - ReleaseTX(); - } - } - TXLED1; // light the TX LED - TxLEDPulse = TX_RX_LED_PULSE_MS; - return r; -} - -extern const u8 _initEndpoints[] PROGMEM; -const u8 _initEndpoints[] = -{ - 0, - -#ifdef CDC_ENABLED - EP_TYPE_INTERRUPT_IN, // CDC_ENDPOINT_ACM - EP_TYPE_BULK_OUT, // CDC_ENDPOINT_OUT - EP_TYPE_BULK_IN, // CDC_ENDPOINT_IN -#endif - -#ifdef HID_ENABLED - EP_TYPE_INTERRUPT_IN // HID_ENDPOINT_INT -#endif -}; - -#define EP_SINGLE_64 0x32 // EP0 -#define EP_DOUBLE_64 0x36 // Other endpoints - -static -void InitEP(u8 index, u8 type, u8 size) -{ - UENUM = index; - UECONX = 1; - UECFG0X = type; - UECFG1X = size; -} - -static -void InitEndpoints() -{ - for (u8 i = 1; i < sizeof(_initEndpoints); i++) - { - UENUM = i; - UECONX = 1; - UECFG0X = pgm_read_byte(_initEndpoints+i); - UECFG1X = EP_DOUBLE_64; - } - UERST = 0x7E; // And reset them - UERST = 0; -} - -// Handle CLASS_INTERFACE requests -static -bool ClassInterfaceRequest(Setup& setup) -{ - u8 i = setup.wIndex; - -#ifdef CDC_ENABLED - if (CDC_ACM_INTERFACE == i) - return CDC_Setup(setup); -#endif - -#ifdef HID_ENABLED - if (HID_INTERFACE == i) - return HID_Setup(setup); -#endif - return false; -} - -int _cmark; -int _cend; -void InitControl(int end) -{ - SetEP(0); - _cmark = 0; - _cend = end; -} - -static -bool SendControl(u8 d) -{ - if (_cmark < _cend) - { - if (!WaitForINOrOUT()) - return false; - Send8(d); - if (!((_cmark + 1) & 0x3F)) - ClearIN(); // Fifo is full, release this packet - } - _cmark++; - return true; -}; - -// Clipped by _cmark/_cend -int USB_SendControl(u8 flags, const void* d, int len) -{ - int sent = len; - const u8* data = (const u8*)d; - bool pgm = flags & TRANSFER_PGM; - while (len--) - { - u8 c = pgm ? pgm_read_byte(data++) : *data++; - if (!SendControl(c)) - return -1; - } - return sent; -} - -// Does not timeout or cross fifo boundaries -// Will only work for transfers <= 64 bytes -// TODO -int USB_RecvControl(void* d, int len) -{ - WaitOUT(); - Recv((u8*)d,len); - ClearOUT(); - return len; -} - -int SendInterfaces() -{ - int total = 0; - u8 interfaces = 0; - -#ifdef CDC_ENABLED - total = CDC_GetInterface(&interfaces); -#endif - -#ifdef HID_ENABLED - total += HID_GetInterface(&interfaces); -#endif - - return interfaces; -} - -// Construct a dynamic configuration descriptor -// This really needs dynamic endpoint allocation etc -// TODO -static -bool SendConfiguration(int maxlen) -{ - // Count and measure interfaces - InitControl(0); - int interfaces = SendInterfaces(); - ConfigDescriptor config = D_CONFIG(_cmark + sizeof(ConfigDescriptor),interfaces); - - // Now send them - InitControl(maxlen); - USB_SendControl(0,&config,sizeof(ConfigDescriptor)); - SendInterfaces(); - return true; -} - -u8 _cdcComposite = 0; - -static -bool SendDescriptor(Setup& setup) -{ - u8 t = setup.wValueH; - if (USB_CONFIGURATION_DESCRIPTOR_TYPE == t) - return SendConfiguration(setup.wLength); - - InitControl(setup.wLength); -#ifdef HID_ENABLED - if (HID_REPORT_DESCRIPTOR_TYPE == t) - return HID_GetDescriptor(t); -#endif - - u8 desc_length = 0; - const u8* desc_addr = 0; - if (USB_DEVICE_DESCRIPTOR_TYPE == t) - { - if (setup.wLength == 8) - _cdcComposite = 1; - desc_addr = _cdcComposite ? (const u8*)&USB_DeviceDescriptorA : (const u8*)&USB_DeviceDescriptor; - } - else if (USB_STRING_DESCRIPTOR_TYPE == t) - { - if (setup.wValueL == 0) - desc_addr = (const u8*)&STRING_LANGUAGE; - else if (setup.wValueL == IPRODUCT) - desc_addr = (const u8*)&STRING_IPRODUCT; - else if (setup.wValueL == IMANUFACTURER) - desc_addr = (const u8*)&STRING_IMANUFACTURER; - else - return false; - } - - if (desc_addr == 0) - return false; - if (desc_length == 0) - desc_length = pgm_read_byte(desc_addr); - - USB_SendControl(TRANSFER_PGM,desc_addr,desc_length); - return true; -} - -// Endpoint 0 interrupt -ISR(USB_COM_vect) -{ - SetEP(0); - if (!ReceivedSetupInt()) - return; - - Setup setup; - Recv((u8*)&setup,8); - ClearSetupInt(); - - u8 requestType = setup.bmRequestType; - if (requestType & REQUEST_DEVICETOHOST) - WaitIN(); - else - ClearIN(); - - bool ok = true; - if (REQUEST_STANDARD == (requestType & REQUEST_TYPE)) - { - // Standard Requests - u8 r = setup.bRequest; - if (GET_STATUS == r) - { - Send8(0); // TODO - Send8(0); - } - else if (CLEAR_FEATURE == r) - { - } - else if (SET_FEATURE == r) - { - } - else if (SET_ADDRESS == r) - { - WaitIN(); - UDADDR = setup.wValueL | (1<> 8) & 0xFF) - -#define CDC_V1_10 0x0110 -#define CDC_COMMUNICATION_INTERFACE_CLASS 0x02 - -#define CDC_CALL_MANAGEMENT 0x01 -#define CDC_ABSTRACT_CONTROL_MODEL 0x02 -#define CDC_HEADER 0x00 -#define CDC_ABSTRACT_CONTROL_MANAGEMENT 0x02 -#define CDC_UNION 0x06 -#define CDC_CS_INTERFACE 0x24 -#define CDC_CS_ENDPOINT 0x25 -#define CDC_DATA_INTERFACE_CLASS 0x0A - -#define MSC_SUBCLASS_SCSI 0x06 -#define MSC_PROTOCOL_BULK_ONLY 0x50 - -#define HID_HID_DESCRIPTOR_TYPE 0x21 -#define HID_REPORT_DESCRIPTOR_TYPE 0x22 -#define HID_PHYSICAL_DESCRIPTOR_TYPE 0x23 - - -// Device -typedef struct { - u8 len; // 18 - u8 dtype; // 1 USB_DEVICE_DESCRIPTOR_TYPE - u16 usbVersion; // 0x200 - u8 deviceClass; - u8 deviceSubClass; - u8 deviceProtocol; - u8 packetSize0; // Packet 0 - u16 idVendor; - u16 idProduct; - u16 deviceVersion; // 0x100 - u8 iManufacturer; - u8 iProduct; - u8 iSerialNumber; - u8 bNumConfigurations; -} DeviceDescriptor; - -// Config -typedef struct { - u8 len; // 9 - u8 dtype; // 2 - u16 clen; // total length - u8 numInterfaces; - u8 config; - u8 iconfig; - u8 attributes; - u8 maxPower; -} ConfigDescriptor; - -// String - -// Interface -typedef struct -{ - u8 len; // 9 - u8 dtype; // 4 - u8 number; - u8 alternate; - u8 numEndpoints; - u8 interfaceClass; - u8 interfaceSubClass; - u8 protocol; - u8 iInterface; -} InterfaceDescriptor; - -// Endpoint -typedef struct -{ - u8 len; // 7 - u8 dtype; // 5 - u8 addr; - u8 attr; - u16 packetSize; - u8 interval; -} EndpointDescriptor; - -// Interface Association Descriptor -// Used to bind 2 interfaces together in CDC compostite device -typedef struct -{ - u8 len; // 8 - u8 dtype; // 11 - u8 firstInterface; - u8 interfaceCount; - u8 functionClass; - u8 funtionSubClass; - u8 functionProtocol; - u8 iInterface; -} IADDescriptor; - -// CDC CS interface descriptor -typedef struct -{ - u8 len; // 5 - u8 dtype; // 0x24 - u8 subtype; - u8 d0; - u8 d1; -} CDCCSInterfaceDescriptor; - -typedef struct -{ - u8 len; // 4 - u8 dtype; // 0x24 - u8 subtype; - u8 d0; -} CDCCSInterfaceDescriptor4; - -typedef struct -{ - u8 len; - u8 dtype; // 0x24 - u8 subtype; // 1 - u8 bmCapabilities; - u8 bDataInterface; -} CMFunctionalDescriptor; - -typedef struct -{ - u8 len; - u8 dtype; // 0x24 - u8 subtype; // 1 - u8 bmCapabilities; -} ACMFunctionalDescriptor; - -typedef struct -{ - // IAD - IADDescriptor iad; // Only needed on compound device - - // Control - InterfaceDescriptor cif; // - CDCCSInterfaceDescriptor header; - CMFunctionalDescriptor callManagement; // Call Management - ACMFunctionalDescriptor controlManagement; // ACM - CDCCSInterfaceDescriptor functionalDescriptor; // CDC_UNION - EndpointDescriptor cifin; - - // Data - InterfaceDescriptor dif; - EndpointDescriptor in; - EndpointDescriptor out; -} CDCDescriptor; - -typedef struct -{ - InterfaceDescriptor msc; - EndpointDescriptor in; - EndpointDescriptor out; -} MSCDescriptor; - -typedef struct -{ - u8 len; // 9 - u8 dtype; // 0x21 - u8 addr; - u8 versionL; // 0x101 - u8 versionH; // 0x101 - u8 country; - u8 desctype; // 0x22 report - u8 descLenL; - u8 descLenH; -} HIDDescDescriptor; - -typedef struct -{ - InterfaceDescriptor hid; - HIDDescDescriptor desc; - EndpointDescriptor in; -} HIDDescriptor; - - -#define D_DEVICE(_class,_subClass,_proto,_packetSize0,_vid,_pid,_version,_im,_ip,_is,_configs) \ - { 18, 1, 0x200, _class,_subClass,_proto,_packetSize0,_vid,_pid,_version,_im,_ip,_is,_configs } - -#define D_CONFIG(_totalLength,_interfaces) \ - { 9, 2, _totalLength,_interfaces, 1, 0, USB_CONFIG_BUS_POWERED, USB_CONFIG_POWER_MA(500) } - -#define D_INTERFACE(_n,_numEndpoints,_class,_subClass,_protocol) \ - { 9, 4, _n, 0, _numEndpoints, _class,_subClass, _protocol, 0 } - -#define D_ENDPOINT(_addr,_attr,_packetSize, _interval) \ - { 7, 5, _addr,_attr,_packetSize, _interval } - -#define D_IAD(_firstInterface, _count, _class, _subClass, _protocol) \ - { 8, 11, _firstInterface, _count, _class, _subClass, _protocol, 0 } - -#define D_HIDREPORT(_descriptorLength) \ - { 9, 0x21, 0x1, 0x1, 0, 1, 0x22, _descriptorLength, 0 } - -#define D_CDCCS(_subtype,_d0,_d1) { 5, 0x24, _subtype, _d0, _d1 } -#define D_CDCCS4(_subtype,_d0) { 4, 0x24, _subtype, _d0 } - - -#endif \ No newline at end of file diff --git a/build/linux/work/hardware/arduino/cores/arduino/USBDesc.h b/build/linux/work/hardware/arduino/cores/arduino/USBDesc.h deleted file mode 100644 index 5cd90adba..000000000 --- a/build/linux/work/hardware/arduino/cores/arduino/USBDesc.h +++ /dev/null @@ -1,67 +0,0 @@ - - -/* Copyright (c) 2011, Peter Barrett -** -** Permission to use, copy, modify, and/or distribute this software for -** any purpose with or without fee is hereby granted, provided that the -** above copyright notice and this permission notice appear in all copies. -** -** THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL -** WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED -** WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR -** BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES -** OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, -** WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, -** ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS -** SOFTWARE. -*/ - -#define CDC_ENABLED -#define HID_ENABLED - - -#ifdef CDC_ENABLED -#define CDC_INTERFACE_COUNT 2 -#define CDC_ENPOINT_COUNT 3 -#else -#define CDC_INTERFACE_COUNT 0 -#define CDC_ENPOINT_COUNT 0 -#endif - -#ifdef HID_ENABLED -#define HID_INTERFACE_COUNT 1 -#define HID_ENPOINT_COUNT 1 -#else -#define HID_INTERFACE_COUNT 0 -#define HID_ENPOINT_COUNT 0 -#endif - -#define CDC_ACM_INTERFACE 0 // CDC ACM -#define CDC_DATA_INTERFACE 1 // CDC Data -#define CDC_FIRST_ENDPOINT 1 -#define CDC_ENDPOINT_ACM (CDC_FIRST_ENDPOINT) // CDC First -#define CDC_ENDPOINT_OUT (CDC_FIRST_ENDPOINT+1) -#define CDC_ENDPOINT_IN (CDC_FIRST_ENDPOINT+2) - -#define HID_INTERFACE (CDC_ACM_INTERFACE + CDC_INTERFACE_COUNT) // HID Interface -#define HID_FIRST_ENDPOINT (CDC_FIRST_ENDPOINT + CDC_ENPOINT_COUNT) -#define HID_ENDPOINT_INT (HID_FIRST_ENDPOINT) - -#define INTERFACE_COUNT (MSC_INTERFACE + MSC_INTERFACE_COUNT) - -#ifdef CDC_ENABLED -#define CDC_RX CDC_ENDPOINT_OUT -#define CDC_TX CDC_ENDPOINT_IN -#endif - -#ifdef HID_ENABLED -#define HID_TX HID_ENDPOINT_INT -#endif - -#define IMANUFACTURER 1 -#define IPRODUCT 2 -#define USB_PID_LEONARDO 0x0801 -#define USB_PID_MICRO 0x0035 -#define USB_VID 0x2341 // arduino LLC vid -#define USB_PID ARDUINO_MODEL_USB_PID - diff --git a/build/linux/work/hardware/arduino/cores/arduino/Udp.h b/build/linux/work/hardware/arduino/cores/arduino/Udp.h deleted file mode 100644 index dc5644b9d..000000000 --- a/build/linux/work/hardware/arduino/cores/arduino/Udp.h +++ /dev/null @@ -1,88 +0,0 @@ -/* - * Udp.cpp: Library to send/receive UDP packets. - * - * NOTE: UDP is fast, but has some important limitations (thanks to Warren Gray for mentioning these) - * 1) UDP does not guarantee the order in which assembled UDP packets are received. This - * might not happen often in practice, but in larger network topologies, a UDP - * packet can be received out of sequence. - * 2) UDP does not guard against lost packets - so packets *can* disappear without the sender being - * aware of it. Again, this may not be a concern in practice on small local networks. - * For more information, see http://www.cafeaulait.org/course/week12/35.html - * - * MIT License: - * Copyright (c) 2008 Bjoern Hartmann - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * bjoern@cs.stanford.edu 12/30/2008 - */ - -#ifndef udp_h -#define udp_h - -#include -#include - -class UDP : public Stream { - -public: - virtual uint8_t begin(uint16_t) =0; // initialize, start listening on specified port. Returns 1 if successful, 0 if there are no sockets available to use - virtual void stop() =0; // Finish with the UDP socket - - // Sending UDP packets - - // Start building up a packet to send to the remote host specific in ip and port - // Returns 1 if successful, 0 if there was a problem with the supplied IP address or port - virtual int beginPacket(IPAddress ip, uint16_t port) =0; - // Start building up a packet to send to the remote host specific in host and port - // Returns 1 if successful, 0 if there was a problem resolving the hostname or port - virtual int beginPacket(const char *host, uint16_t port) =0; - // Finish off this packet and send it - // Returns 1 if the packet was sent successfully, 0 if there was an error - virtual int endPacket() =0; - // Write a single byte into the packet - virtual size_t write(uint8_t) =0; - // Write size bytes from buffer into the packet - virtual size_t write(const uint8_t *buffer, size_t size) =0; - - // Start processing the next available incoming packet - // Returns the size of the packet in bytes, or 0 if no packets are available - virtual int parsePacket() =0; - // Number of bytes remaining in the current packet - virtual int available() =0; - // Read a single byte from the current packet - virtual int read() =0; - // Read up to len bytes from the current packet and place them into buffer - // Returns the number of bytes read, or 0 if none are available - virtual int read(unsigned char* buffer, size_t len) =0; - // Read up to len characters from the current packet and place them into buffer - // Returns the number of characters read, or 0 if none are available - virtual int read(char* buffer, size_t len) =0; - // Return the next byte from the current packet without moving on to the next byte - virtual int peek() =0; - virtual void flush() =0; // Finish reading the current packet - - // Return the IP address of the host who sent the current incoming packet - virtual IPAddress remoteIP() =0; - // Return the port of the host who sent the current incoming packet - virtual uint16_t remotePort() =0; -protected: - uint8_t* rawIPAddress(IPAddress& addr) { return addr.raw_address(); }; -}; - -#endif diff --git a/build/linux/work/hardware/arduino/cores/arduino/WCharacter.h b/build/linux/work/hardware/arduino/cores/arduino/WCharacter.h deleted file mode 100644 index 79733b50a..000000000 --- a/build/linux/work/hardware/arduino/cores/arduino/WCharacter.h +++ /dev/null @@ -1,168 +0,0 @@ -/* - WCharacter.h - Character utility functions for Wiring & Arduino - Copyright (c) 2010 Hernando Barragan. All right reserved. - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with this library; if not, write to the Free Software - Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef Character_h -#define Character_h - -#include - -// WCharacter.h prototypes -inline boolean isAlphaNumeric(int c) __attribute__((always_inline)); -inline boolean isAlpha(int c) __attribute__((always_inline)); -inline boolean isAscii(int c) __attribute__((always_inline)); -inline boolean isWhitespace(int c) __attribute__((always_inline)); -inline boolean isControl(int c) __attribute__((always_inline)); -inline boolean isDigit(int c) __attribute__((always_inline)); -inline boolean isGraph(int c) __attribute__((always_inline)); -inline boolean isLowerCase(int c) __attribute__((always_inline)); -inline boolean isPrintable(int c) __attribute__((always_inline)); -inline boolean isPunct(int c) __attribute__((always_inline)); -inline boolean isSpace(int c) __attribute__((always_inline)); -inline boolean isUpperCase(int c) __attribute__((always_inline)); -inline boolean isHexadecimalDigit(int c) __attribute__((always_inline)); -inline int toAscii(int c) __attribute__((always_inline)); -inline int toLowerCase(int c) __attribute__((always_inline)); -inline int toUpperCase(int c)__attribute__((always_inline)); - - -// Checks for an alphanumeric character. -// It is equivalent to (isalpha(c) || isdigit(c)). -inline boolean isAlphaNumeric(int c) -{ - return ( isalnum(c) == 0 ? false : true); -} - - -// Checks for an alphabetic character. -// It is equivalent to (isupper(c) || islower(c)). -inline boolean isAlpha(int c) -{ - return ( isalpha(c) == 0 ? false : true); -} - - -// Checks whether c is a 7-bit unsigned char value -// that fits into the ASCII character set. -inline boolean isAscii(int c) -{ - return ( isascii (c) == 0 ? false : true); -} - - -// Checks for a blank character, that is, a space or a tab. -inline boolean isWhitespace(int c) -{ - return ( isblank (c) == 0 ? false : true); -} - - -// Checks for a control character. -inline boolean isControl(int c) -{ - return ( iscntrl (c) == 0 ? false : true); -} - - -// Checks for a digit (0 through 9). -inline boolean isDigit(int c) -{ - return ( isdigit (c) == 0 ? false : true); -} - - -// Checks for any printable character except space. -inline boolean isGraph(int c) -{ - return ( isgraph (c) == 0 ? false : true); -} - - -// Checks for a lower-case character. -inline boolean isLowerCase(int c) -{ - return (islower (c) == 0 ? false : true); -} - - -// Checks for any printable character including space. -inline boolean isPrintable(int c) -{ - return ( isprint (c) == 0 ? false : true); -} - - -// Checks for any printable character which is not a space -// or an alphanumeric character. -inline boolean isPunct(int c) -{ - return ( ispunct (c) == 0 ? false : true); -} - - -// Checks for white-space characters. For the avr-libc library, -// these are: space, formfeed ('\f'), newline ('\n'), carriage -// return ('\r'), horizontal tab ('\t'), and vertical tab ('\v'). -inline boolean isSpace(int c) -{ - return ( isspace (c) == 0 ? false : true); -} - - -// Checks for an uppercase letter. -inline boolean isUpperCase(int c) -{ - return ( isupper (c) == 0 ? false : true); -} - - -// Checks for a hexadecimal digits, i.e. one of 0 1 2 3 4 5 6 7 -// 8 9 a b c d e f A B C D E F. -inline boolean isHexadecimalDigit(int c) -{ - return ( isxdigit (c) == 0 ? false : true); -} - - -// Converts c to a 7-bit unsigned char value that fits into the -// ASCII character set, by clearing the high-order bits. -inline int toAscii(int c) -{ - return toascii (c); -} - - -// Warning: -// Many people will be unhappy if you use this function. -// This function will convert accented letters into random -// characters. - -// Converts the letter c to lower case, if possible. -inline int toLowerCase(int c) -{ - return tolower (c); -} - - -// Converts the letter c to upper case, if possible. -inline int toUpperCase(int c) -{ - return toupper (c); -} - -#endif \ No newline at end of file diff --git a/build/linux/work/hardware/arduino/cores/arduino/WInterrupts.c b/build/linux/work/hardware/arduino/cores/arduino/WInterrupts.c deleted file mode 100644 index 8f3ec847f..000000000 --- a/build/linux/work/hardware/arduino/cores/arduino/WInterrupts.c +++ /dev/null @@ -1,298 +0,0 @@ -/* -*- mode: jde; c-basic-offset: 2; indent-tabs-mode: nil -*- */ - -/* - Part of the Wiring project - http://wiring.uniandes.edu.co - - Copyright (c) 2004-05 Hernando Barragan - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General - Public License along with this library; if not, write to the - Free Software Foundation, Inc., 59 Temple Place, Suite 330, - Boston, MA 02111-1307 USA - - Modified 24 November 2006 by David A. Mellis - Modified 1 August 2010 by Mark Sproul -*/ - -#include -#include -#include -#include -#include - -#include "wiring_private.h" - -static volatile voidFuncPtr intFunc[EXTERNAL_NUM_INTERRUPTS]; -// volatile static voidFuncPtr twiIntFunc; - -void attachInterrupt(uint8_t interruptNum, void (*userFunc)(void), int mode) { - if(interruptNum < EXTERNAL_NUM_INTERRUPTS) { - intFunc[interruptNum] = userFunc; - - // Configure the interrupt mode (trigger on low input, any change, rising - // edge, or falling edge). The mode constants were chosen to correspond - // to the configuration bits in the hardware register, so we simply shift - // the mode into place. - - // Enable the interrupt. - - switch (interruptNum) { -#if defined(__AVR_ATmega32U4__) - // I hate doing this, but the register assignment differs between the 1280/2560 - // and the 32U4. Since avrlib defines registers PCMSK1 and PCMSK2 that aren't - // even present on the 32U4 this is the only way to distinguish between them. - case 0: - EICRA = (EICRA & ~((1<= howbig) { - return howsmall; - } - long diff = howbig - howsmall; - return random(diff) + howsmall; -} - -long map(long x, long in_min, long in_max, long out_min, long out_max) -{ - return (x - in_min) * (out_max - out_min) / (in_max - in_min) + out_min; -} - -unsigned int makeWord(unsigned int w) { return w; } -unsigned int makeWord(unsigned char h, unsigned char l) { return (h << 8) | l; } \ No newline at end of file diff --git a/build/linux/work/hardware/arduino/cores/arduino/WString.cpp b/build/linux/work/hardware/arduino/cores/arduino/WString.cpp deleted file mode 100644 index c6839fc0d..000000000 --- a/build/linux/work/hardware/arduino/cores/arduino/WString.cpp +++ /dev/null @@ -1,645 +0,0 @@ -/* - WString.cpp - String library for Wiring & Arduino - ...mostly rewritten by Paul Stoffregen... - Copyright (c) 2009-10 Hernando Barragan. All rights reserved. - Copyright 2011, Paul Stoffregen, paul@pjrc.com - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with this library; if not, write to the Free Software - Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -*/ - -#include "WString.h" - - -/*********************************************/ -/* Constructors */ -/*********************************************/ - -String::String(const char *cstr) -{ - init(); - if (cstr) copy(cstr, strlen(cstr)); -} - -String::String(const String &value) -{ - init(); - *this = value; -} - -#ifdef __GXX_EXPERIMENTAL_CXX0X__ -String::String(String &&rval) -{ - init(); - move(rval); -} -String::String(StringSumHelper &&rval) -{ - init(); - move(rval); -} -#endif - -String::String(char c) -{ - init(); - char buf[2]; - buf[0] = c; - buf[1] = 0; - *this = buf; -} - -String::String(unsigned char value, unsigned char base) -{ - init(); - char buf[9]; - utoa(value, buf, base); - *this = buf; -} - -String::String(int value, unsigned char base) -{ - init(); - char buf[18]; - itoa(value, buf, base); - *this = buf; -} - -String::String(unsigned int value, unsigned char base) -{ - init(); - char buf[17]; - utoa(value, buf, base); - *this = buf; -} - -String::String(long value, unsigned char base) -{ - init(); - char buf[34]; - ltoa(value, buf, base); - *this = buf; -} - -String::String(unsigned long value, unsigned char base) -{ - init(); - char buf[33]; - ultoa(value, buf, base); - *this = buf; -} - -String::~String() -{ - free(buffer); -} - -/*********************************************/ -/* Memory Management */ -/*********************************************/ - -inline void String::init(void) -{ - buffer = NULL; - capacity = 0; - len = 0; - flags = 0; -} - -void String::invalidate(void) -{ - if (buffer) free(buffer); - buffer = NULL; - capacity = len = 0; -} - -unsigned char String::reserve(unsigned int size) -{ - if (buffer && capacity >= size) return 1; - if (changeBuffer(size)) { - if (len == 0) buffer[0] = 0; - return 1; - } - return 0; -} - -unsigned char String::changeBuffer(unsigned int maxStrLen) -{ - char *newbuffer = (char *)realloc(buffer, maxStrLen + 1); - if (newbuffer) { - buffer = newbuffer; - capacity = maxStrLen; - return 1; - } - return 0; -} - -/*********************************************/ -/* Copy and Move */ -/*********************************************/ - -String & String::copy(const char *cstr, unsigned int length) -{ - if (!reserve(length)) { - invalidate(); - return *this; - } - len = length; - strcpy(buffer, cstr); - return *this; -} - -#ifdef __GXX_EXPERIMENTAL_CXX0X__ -void String::move(String &rhs) -{ - if (buffer) { - if (capacity >= rhs.len) { - strcpy(buffer, rhs.buffer); - len = rhs.len; - rhs.len = 0; - return; - } else { - free(buffer); - } - } - buffer = rhs.buffer; - capacity = rhs.capacity; - len = rhs.len; - rhs.buffer = NULL; - rhs.capacity = 0; - rhs.len = 0; -} -#endif - -String & String::operator = (const String &rhs) -{ - if (this == &rhs) return *this; - - if (rhs.buffer) copy(rhs.buffer, rhs.len); - else invalidate(); - - return *this; -} - -#ifdef __GXX_EXPERIMENTAL_CXX0X__ -String & String::operator = (String &&rval) -{ - if (this != &rval) move(rval); - return *this; -} - -String & String::operator = (StringSumHelper &&rval) -{ - if (this != &rval) move(rval); - return *this; -} -#endif - -String & String::operator = (const char *cstr) -{ - if (cstr) copy(cstr, strlen(cstr)); - else invalidate(); - - return *this; -} - -/*********************************************/ -/* concat */ -/*********************************************/ - -unsigned char String::concat(const String &s) -{ - return concat(s.buffer, s.len); -} - -unsigned char String::concat(const char *cstr, unsigned int length) -{ - unsigned int newlen = len + length; - if (!cstr) return 0; - if (length == 0) return 1; - if (!reserve(newlen)) return 0; - strcpy(buffer + len, cstr); - len = newlen; - return 1; -} - -unsigned char String::concat(const char *cstr) -{ - if (!cstr) return 0; - return concat(cstr, strlen(cstr)); -} - -unsigned char String::concat(char c) -{ - char buf[2]; - buf[0] = c; - buf[1] = 0; - return concat(buf, 1); -} - -unsigned char String::concat(unsigned char num) -{ - char buf[4]; - itoa(num, buf, 10); - return concat(buf, strlen(buf)); -} - -unsigned char String::concat(int num) -{ - char buf[7]; - itoa(num, buf, 10); - return concat(buf, strlen(buf)); -} - -unsigned char String::concat(unsigned int num) -{ - char buf[6]; - utoa(num, buf, 10); - return concat(buf, strlen(buf)); -} - -unsigned char String::concat(long num) -{ - char buf[12]; - ltoa(num, buf, 10); - return concat(buf, strlen(buf)); -} - -unsigned char String::concat(unsigned long num) -{ - char buf[11]; - ultoa(num, buf, 10); - return concat(buf, strlen(buf)); -} - -/*********************************************/ -/* Concatenate */ -/*********************************************/ - -StringSumHelper & operator + (const StringSumHelper &lhs, const String &rhs) -{ - StringSumHelper &a = const_cast(lhs); - if (!a.concat(rhs.buffer, rhs.len)) a.invalidate(); - return a; -} - -StringSumHelper & operator + (const StringSumHelper &lhs, const char *cstr) -{ - StringSumHelper &a = const_cast(lhs); - if (!cstr || !a.concat(cstr, strlen(cstr))) a.invalidate(); - return a; -} - -StringSumHelper & operator + (const StringSumHelper &lhs, char c) -{ - StringSumHelper &a = const_cast(lhs); - if (!a.concat(c)) a.invalidate(); - return a; -} - -StringSumHelper & operator + (const StringSumHelper &lhs, unsigned char num) -{ - StringSumHelper &a = const_cast(lhs); - if (!a.concat(num)) a.invalidate(); - return a; -} - -StringSumHelper & operator + (const StringSumHelper &lhs, int num) -{ - StringSumHelper &a = const_cast(lhs); - if (!a.concat(num)) a.invalidate(); - return a; -} - -StringSumHelper & operator + (const StringSumHelper &lhs, unsigned int num) -{ - StringSumHelper &a = const_cast(lhs); - if (!a.concat(num)) a.invalidate(); - return a; -} - -StringSumHelper & operator + (const StringSumHelper &lhs, long num) -{ - StringSumHelper &a = const_cast(lhs); - if (!a.concat(num)) a.invalidate(); - return a; -} - -StringSumHelper & operator + (const StringSumHelper &lhs, unsigned long num) -{ - StringSumHelper &a = const_cast(lhs); - if (!a.concat(num)) a.invalidate(); - return a; -} - -/*********************************************/ -/* Comparison */ -/*********************************************/ - -int String::compareTo(const String &s) const -{ - if (!buffer || !s.buffer) { - if (s.buffer && s.len > 0) return 0 - *(unsigned char *)s.buffer; - if (buffer && len > 0) return *(unsigned char *)buffer; - return 0; - } - return strcmp(buffer, s.buffer); -} - -unsigned char String::equals(const String &s2) const -{ - return (len == s2.len && compareTo(s2) == 0); -} - -unsigned char String::equals(const char *cstr) const -{ - if (len == 0) return (cstr == NULL || *cstr == 0); - if (cstr == NULL) return buffer[0] == 0; - return strcmp(buffer, cstr) == 0; -} - -unsigned char String::operator<(const String &rhs) const -{ - return compareTo(rhs) < 0; -} - -unsigned char String::operator>(const String &rhs) const -{ - return compareTo(rhs) > 0; -} - -unsigned char String::operator<=(const String &rhs) const -{ - return compareTo(rhs) <= 0; -} - -unsigned char String::operator>=(const String &rhs) const -{ - return compareTo(rhs) >= 0; -} - -unsigned char String::equalsIgnoreCase( const String &s2 ) const -{ - if (this == &s2) return 1; - if (len != s2.len) return 0; - if (len == 0) return 1; - const char *p1 = buffer; - const char *p2 = s2.buffer; - while (*p1) { - if (tolower(*p1++) != tolower(*p2++)) return 0; - } - return 1; -} - -unsigned char String::startsWith( const String &s2 ) const -{ - if (len < s2.len) return 0; - return startsWith(s2, 0); -} - -unsigned char String::startsWith( const String &s2, unsigned int offset ) const -{ - if (offset > len - s2.len || !buffer || !s2.buffer) return 0; - return strncmp( &buffer[offset], s2.buffer, s2.len ) == 0; -} - -unsigned char String::endsWith( const String &s2 ) const -{ - if ( len < s2.len || !buffer || !s2.buffer) return 0; - return strcmp(&buffer[len - s2.len], s2.buffer) == 0; -} - -/*********************************************/ -/* Character Access */ -/*********************************************/ - -char String::charAt(unsigned int loc) const -{ - return operator[](loc); -} - -void String::setCharAt(unsigned int loc, char c) -{ - if (loc < len) buffer[loc] = c; -} - -char & String::operator[](unsigned int index) -{ - static char dummy_writable_char; - if (index >= len || !buffer) { - dummy_writable_char = 0; - return dummy_writable_char; - } - return buffer[index]; -} - -char String::operator[]( unsigned int index ) const -{ - if (index >= len || !buffer) return 0; - return buffer[index]; -} - -void String::getBytes(unsigned char *buf, unsigned int bufsize, unsigned int index) const -{ - if (!bufsize || !buf) return; - if (index >= len) { - buf[0] = 0; - return; - } - unsigned int n = bufsize - 1; - if (n > len - index) n = len - index; - strncpy((char *)buf, buffer + index, n); - buf[n] = 0; -} - -/*********************************************/ -/* Search */ -/*********************************************/ - -int String::indexOf(char c) const -{ - return indexOf(c, 0); -} - -int String::indexOf( char ch, unsigned int fromIndex ) const -{ - if (fromIndex >= len) return -1; - const char* temp = strchr(buffer + fromIndex, ch); - if (temp == NULL) return -1; - return temp - buffer; -} - -int String::indexOf(const String &s2) const -{ - return indexOf(s2, 0); -} - -int String::indexOf(const String &s2, unsigned int fromIndex) const -{ - if (fromIndex >= len) return -1; - const char *found = strstr(buffer + fromIndex, s2.buffer); - if (found == NULL) return -1; - return found - buffer; -} - -int String::lastIndexOf( char theChar ) const -{ - return lastIndexOf(theChar, len - 1); -} - -int String::lastIndexOf(char ch, unsigned int fromIndex) const -{ - if (fromIndex >= len) return -1; - char tempchar = buffer[fromIndex + 1]; - buffer[fromIndex + 1] = '\0'; - char* temp = strrchr( buffer, ch ); - buffer[fromIndex + 1] = tempchar; - if (temp == NULL) return -1; - return temp - buffer; -} - -int String::lastIndexOf(const String &s2) const -{ - return lastIndexOf(s2, len - s2.len); -} - -int String::lastIndexOf(const String &s2, unsigned int fromIndex) const -{ - if (s2.len == 0 || len == 0 || s2.len > len) return -1; - if (fromIndex >= len) fromIndex = len - 1; - int found = -1; - for (char *p = buffer; p <= buffer + fromIndex; p++) { - p = strstr(p, s2.buffer); - if (!p) break; - if ((unsigned int)(p - buffer) <= fromIndex) found = p - buffer; - } - return found; -} - -String String::substring( unsigned int left ) const -{ - return substring(left, len); -} - -String String::substring(unsigned int left, unsigned int right) const -{ - if (left > right) { - unsigned int temp = right; - right = left; - left = temp; - } - String out; - if (left > len) return out; - if (right > len) right = len; - char temp = buffer[right]; // save the replaced character - buffer[right] = '\0'; - out = buffer + left; // pointer arithmetic - buffer[right] = temp; //restore character - return out; -} - -/*********************************************/ -/* Modification */ -/*********************************************/ - -void String::replace(char find, char replace) -{ - if (!buffer) return; - for (char *p = buffer; *p; p++) { - if (*p == find) *p = replace; - } -} - -void String::replace(const String& find, const String& replace) -{ - if (len == 0 || find.len == 0) return; - int diff = replace.len - find.len; - char *readFrom = buffer; - char *foundAt; - if (diff == 0) { - while ((foundAt = strstr(readFrom, find.buffer)) != NULL) { - memcpy(foundAt, replace.buffer, replace.len); - readFrom = foundAt + replace.len; - } - } else if (diff < 0) { - char *writeTo = buffer; - while ((foundAt = strstr(readFrom, find.buffer)) != NULL) { - unsigned int n = foundAt - readFrom; - memcpy(writeTo, readFrom, n); - writeTo += n; - memcpy(writeTo, replace.buffer, replace.len); - writeTo += replace.len; - readFrom = foundAt + find.len; - len += diff; - } - strcpy(writeTo, readFrom); - } else { - unsigned int size = len; // compute size needed for result - while ((foundAt = strstr(readFrom, find.buffer)) != NULL) { - readFrom = foundAt + find.len; - size += diff; - } - if (size == len) return; - if (size > capacity && !changeBuffer(size)) return; // XXX: tell user! - int index = len - 1; - while (index >= 0 && (index = lastIndexOf(find, index)) >= 0) { - readFrom = buffer + index + find.len; - memmove(readFrom + diff, readFrom, len - (readFrom - buffer)); - len += diff; - buffer[len] = 0; - memcpy(buffer + index, replace.buffer, replace.len); - index--; - } - } -} - -void String::toLowerCase(void) -{ - if (!buffer) return; - for (char *p = buffer; *p; p++) { - *p = tolower(*p); - } -} - -void String::toUpperCase(void) -{ - if (!buffer) return; - for (char *p = buffer; *p; p++) { - *p = toupper(*p); - } -} - -void String::trim(void) -{ - if (!buffer || len == 0) return; - char *begin = buffer; - while (isspace(*begin)) begin++; - char *end = buffer + len - 1; - while (isspace(*end) && end >= begin) end--; - len = end + 1 - begin; - if (begin > buffer) memcpy(buffer, begin, len); - buffer[len] = 0; -} - -/*********************************************/ -/* Parsing / Conversion */ -/*********************************************/ - -long String::toInt(void) const -{ - if (buffer) return atol(buffer); - return 0; -} - - diff --git a/build/linux/work/hardware/arduino/cores/arduino/WString.h b/build/linux/work/hardware/arduino/cores/arduino/WString.h deleted file mode 100644 index d76d2a33d..000000000 --- a/build/linux/work/hardware/arduino/cores/arduino/WString.h +++ /dev/null @@ -1,205 +0,0 @@ -/* - WString.h - String library for Wiring & Arduino - ...mostly rewritten by Paul Stoffregen... - Copyright (c) 2009-10 Hernando Barragan. All right reserved. - Copyright 2011, Paul Stoffregen, paul@pjrc.com - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with this library; if not, write to the Free Software - Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -*/ - -#ifndef String_class_h -#define String_class_h -#ifdef __cplusplus - -#include -#include -#include -#include - -// When compiling programs with this class, the following gcc parameters -// dramatically increase performance and memory (RAM) efficiency, typically -// with little or no increase in code size. -// -felide-constructors -// -std=c++0x - -class __FlashStringHelper; -#define F(string_literal) (reinterpret_cast<__FlashStringHelper *>(PSTR(string_literal))) - -// An inherited class for holding the result of a concatenation. These -// result objects are assumed to be writable by subsequent concatenations. -class StringSumHelper; - -// The string class -class String -{ - // use a function pointer to allow for "if (s)" without the - // complications of an operator bool(). for more information, see: - // http://www.artima.com/cppsource/safebool.html - typedef void (String::*StringIfHelperType)() const; - void StringIfHelper() const {} - -public: - // constructors - // creates a copy of the initial value. - // if the initial value is null or invalid, or if memory allocation - // fails, the string will be marked as invalid (i.e. "if (s)" will - // be false). - String(const char *cstr = ""); - String(const String &str); - #ifdef __GXX_EXPERIMENTAL_CXX0X__ - String(String &&rval); - String(StringSumHelper &&rval); - #endif - explicit String(char c); - explicit String(unsigned char, unsigned char base=10); - explicit String(int, unsigned char base=10); - explicit String(unsigned int, unsigned char base=10); - explicit String(long, unsigned char base=10); - explicit String(unsigned long, unsigned char base=10); - ~String(void); - - // memory management - // return true on success, false on failure (in which case, the string - // is left unchanged). reserve(0), if successful, will validate an - // invalid string (i.e., "if (s)" will be true afterwards) - unsigned char reserve(unsigned int size); - inline unsigned int length(void) const {return len;} - - // creates a copy of the assigned value. if the value is null or - // invalid, or if the memory allocation fails, the string will be - // marked as invalid ("if (s)" will be false). - String & operator = (const String &rhs); - String & operator = (const char *cstr); - #ifdef __GXX_EXPERIMENTAL_CXX0X__ - String & operator = (String &&rval); - String & operator = (StringSumHelper &&rval); - #endif - - // concatenate (works w/ built-in types) - - // returns true on success, false on failure (in which case, the string - // is left unchanged). if the argument is null or invalid, the - // concatenation is considered unsucessful. - unsigned char concat(const String &str); - unsigned char concat(const char *cstr); - unsigned char concat(char c); - unsigned char concat(unsigned char c); - unsigned char concat(int num); - unsigned char concat(unsigned int num); - unsigned char concat(long num); - unsigned char concat(unsigned long num); - - // if there's not enough memory for the concatenated value, the string - // will be left unchanged (but this isn't signalled in any way) - String & operator += (const String &rhs) {concat(rhs); return (*this);} - String & operator += (const char *cstr) {concat(cstr); return (*this);} - String & operator += (char c) {concat(c); return (*this);} - String & operator += (unsigned char num) {concat(num); return (*this);} - String & operator += (int num) {concat(num); return (*this);} - String & operator += (unsigned int num) {concat(num); return (*this);} - String & operator += (long num) {concat(num); return (*this);} - String & operator += (unsigned long num) {concat(num); return (*this);} - - friend StringSumHelper & operator + (const StringSumHelper &lhs, const String &rhs); - friend StringSumHelper & operator + (const StringSumHelper &lhs, const char *cstr); - friend StringSumHelper & operator + (const StringSumHelper &lhs, char c); - friend StringSumHelper & operator + (const StringSumHelper &lhs, unsigned char num); - friend StringSumHelper & operator + (const StringSumHelper &lhs, int num); - friend StringSumHelper & operator + (const StringSumHelper &lhs, unsigned int num); - friend StringSumHelper & operator + (const StringSumHelper &lhs, long num); - friend StringSumHelper & operator + (const StringSumHelper &lhs, unsigned long num); - - // comparison (only works w/ Strings and "strings") - operator StringIfHelperType() const { return buffer ? &String::StringIfHelper : 0; } - int compareTo(const String &s) const; - unsigned char equals(const String &s) const; - unsigned char equals(const char *cstr) const; - unsigned char operator == (const String &rhs) const {return equals(rhs);} - unsigned char operator == (const char *cstr) const {return equals(cstr);} - unsigned char operator != (const String &rhs) const {return !equals(rhs);} - unsigned char operator != (const char *cstr) const {return !equals(cstr);} - unsigned char operator < (const String &rhs) const; - unsigned char operator > (const String &rhs) const; - unsigned char operator <= (const String &rhs) const; - unsigned char operator >= (const String &rhs) const; - unsigned char equalsIgnoreCase(const String &s) const; - unsigned char startsWith( const String &prefix) const; - unsigned char startsWith(const String &prefix, unsigned int offset) const; - unsigned char endsWith(const String &suffix) const; - - // character acccess - char charAt(unsigned int index) const; - void setCharAt(unsigned int index, char c); - char operator [] (unsigned int index) const; - char& operator [] (unsigned int index); - void getBytes(unsigned char *buf, unsigned int bufsize, unsigned int index=0) const; - void toCharArray(char *buf, unsigned int bufsize, unsigned int index=0) const - {getBytes((unsigned char *)buf, bufsize, index);} - - // search - int indexOf( char ch ) const; - int indexOf( char ch, unsigned int fromIndex ) const; - int indexOf( const String &str ) const; - int indexOf( const String &str, unsigned int fromIndex ) const; - int lastIndexOf( char ch ) const; - int lastIndexOf( char ch, unsigned int fromIndex ) const; - int lastIndexOf( const String &str ) const; - int lastIndexOf( const String &str, unsigned int fromIndex ) const; - String substring( unsigned int beginIndex ) const; - String substring( unsigned int beginIndex, unsigned int endIndex ) const; - - // modification - void replace(char find, char replace); - void replace(const String& find, const String& replace); - void toLowerCase(void); - void toUpperCase(void); - void trim(void); - - // parsing/conversion - long toInt(void) const; - -protected: - char *buffer; // the actual char array - unsigned int capacity; // the array length minus one (for the '\0') - unsigned int len; // the String length (not counting the '\0') - unsigned char flags; // unused, for future features -protected: - void init(void); - void invalidate(void); - unsigned char changeBuffer(unsigned int maxStrLen); - unsigned char concat(const char *cstr, unsigned int length); - - // copy and move - String & copy(const char *cstr, unsigned int length); - #ifdef __GXX_EXPERIMENTAL_CXX0X__ - void move(String &rhs); - #endif -}; - -class StringSumHelper : public String -{ -public: - StringSumHelper(const String &s) : String(s) {} - StringSumHelper(const char *p) : String(p) {} - StringSumHelper(char c) : String(c) {} - StringSumHelper(unsigned char num) : String(num) {} - StringSumHelper(int num) : String(num) {} - StringSumHelper(unsigned int num) : String(num) {} - StringSumHelper(long num) : String(num) {} - StringSumHelper(unsigned long num) : String(num) {} -}; - -#endif // __cplusplus -#endif // String_class_h diff --git a/build/linux/work/hardware/arduino/cores/arduino/binary.h b/build/linux/work/hardware/arduino/cores/arduino/binary.h deleted file mode 100644 index af1498033..000000000 --- a/build/linux/work/hardware/arduino/cores/arduino/binary.h +++ /dev/null @@ -1,515 +0,0 @@ -#ifndef Binary_h -#define Binary_h - -#define B0 0 -#define B00 0 -#define B000 0 -#define B0000 0 -#define B00000 0 -#define B000000 0 -#define B0000000 0 -#define B00000000 0 -#define B1 1 -#define B01 1 -#define B001 1 -#define B0001 1 -#define B00001 1 -#define B000001 1 -#define B0000001 1 -#define B00000001 1 -#define B10 2 -#define B010 2 -#define B0010 2 -#define B00010 2 -#define B000010 2 -#define B0000010 2 -#define B00000010 2 -#define B11 3 -#define B011 3 -#define B0011 3 -#define B00011 3 -#define B000011 3 -#define B0000011 3 -#define B00000011 3 -#define B100 4 -#define B0100 4 -#define B00100 4 -#define B000100 4 -#define B0000100 4 -#define B00000100 4 -#define B101 5 -#define B0101 5 -#define B00101 5 -#define B000101 5 -#define B0000101 5 -#define B00000101 5 -#define B110 6 -#define B0110 6 -#define B00110 6 -#define B000110 6 -#define B0000110 6 -#define B00000110 6 -#define B111 7 -#define B0111 7 -#define B00111 7 -#define B000111 7 -#define B0000111 7 -#define B00000111 7 -#define B1000 8 -#define B01000 8 -#define B001000 8 -#define B0001000 8 -#define B00001000 8 -#define B1001 9 -#define B01001 9 -#define B001001 9 -#define B0001001 9 -#define B00001001 9 -#define B1010 10 -#define B01010 10 -#define B001010 10 -#define B0001010 10 -#define B00001010 10 -#define B1011 11 -#define B01011 11 -#define B001011 11 -#define B0001011 11 -#define B00001011 11 -#define B1100 12 -#define B01100 12 -#define B001100 12 -#define B0001100 12 -#define B00001100 12 -#define B1101 13 -#define B01101 13 -#define B001101 13 -#define B0001101 13 -#define B00001101 13 -#define B1110 14 -#define B01110 14 -#define B001110 14 -#define B0001110 14 -#define B00001110 14 -#define B1111 15 -#define B01111 15 -#define B001111 15 -#define B0001111 15 -#define B00001111 15 -#define B10000 16 -#define B010000 16 -#define B0010000 16 -#define B00010000 16 -#define B10001 17 -#define B010001 17 -#define B0010001 17 -#define B00010001 17 -#define B10010 18 -#define B010010 18 -#define B0010010 18 -#define B00010010 18 -#define B10011 19 -#define B010011 19 -#define B0010011 19 -#define B00010011 19 -#define B10100 20 -#define B010100 20 -#define B0010100 20 -#define B00010100 20 -#define B10101 21 -#define B010101 21 -#define B0010101 21 -#define B00010101 21 -#define B10110 22 -#define B010110 22 -#define B0010110 22 -#define B00010110 22 -#define B10111 23 -#define B010111 23 -#define B0010111 23 -#define B00010111 23 -#define B11000 24 -#define B011000 24 -#define B0011000 24 -#define B00011000 24 -#define B11001 25 -#define B011001 25 -#define B0011001 25 -#define B00011001 25 -#define B11010 26 -#define B011010 26 -#define B0011010 26 -#define B00011010 26 -#define B11011 27 -#define B011011 27 -#define B0011011 27 -#define B00011011 27 -#define B11100 28 -#define B011100 28 -#define B0011100 28 -#define B00011100 28 -#define B11101 29 -#define B011101 29 -#define B0011101 29 -#define B00011101 29 -#define B11110 30 -#define B011110 30 -#define B0011110 30 -#define B00011110 30 -#define B11111 31 -#define B011111 31 -#define B0011111 31 -#define B00011111 31 -#define B100000 32 -#define B0100000 32 -#define B00100000 32 -#define B100001 33 -#define B0100001 33 -#define B00100001 33 -#define B100010 34 -#define B0100010 34 -#define B00100010 34 -#define B100011 35 -#define B0100011 35 -#define B00100011 35 -#define B100100 36 -#define B0100100 36 -#define B00100100 36 -#define B100101 37 -#define B0100101 37 -#define B00100101 37 -#define B100110 38 -#define B0100110 38 -#define B00100110 38 -#define B100111 39 -#define B0100111 39 -#define B00100111 39 -#define B101000 40 -#define B0101000 40 -#define B00101000 40 -#define B101001 41 -#define B0101001 41 -#define B00101001 41 -#define B101010 42 -#define B0101010 42 -#define B00101010 42 -#define B101011 43 -#define B0101011 43 -#define B00101011 43 -#define B101100 44 -#define B0101100 44 -#define B00101100 44 -#define B101101 45 -#define B0101101 45 -#define B00101101 45 -#define B101110 46 -#define B0101110 46 -#define B00101110 46 -#define B101111 47 -#define B0101111 47 -#define B00101111 47 -#define B110000 48 -#define B0110000 48 -#define B00110000 48 -#define B110001 49 -#define B0110001 49 -#define B00110001 49 -#define B110010 50 -#define B0110010 50 -#define B00110010 50 -#define B110011 51 -#define B0110011 51 -#define B00110011 51 -#define B110100 52 -#define B0110100 52 -#define B00110100 52 -#define B110101 53 -#define B0110101 53 -#define B00110101 53 -#define B110110 54 -#define B0110110 54 -#define B00110110 54 -#define B110111 55 -#define B0110111 55 -#define B00110111 55 -#define B111000 56 -#define B0111000 56 -#define B00111000 56 -#define B111001 57 -#define B0111001 57 -#define B00111001 57 -#define B111010 58 -#define B0111010 58 -#define B00111010 58 -#define B111011 59 -#define B0111011 59 -#define B00111011 59 -#define B111100 60 -#define B0111100 60 -#define B00111100 60 -#define B111101 61 -#define B0111101 61 -#define B00111101 61 -#define B111110 62 -#define B0111110 62 -#define B00111110 62 -#define B111111 63 -#define B0111111 63 -#define B00111111 63 -#define B1000000 64 -#define B01000000 64 -#define B1000001 65 -#define B01000001 65 -#define B1000010 66 -#define B01000010 66 -#define B1000011 67 -#define B01000011 67 -#define B1000100 68 -#define B01000100 68 -#define B1000101 69 -#define B01000101 69 -#define B1000110 70 -#define B01000110 70 -#define B1000111 71 -#define B01000111 71 -#define B1001000 72 -#define B01001000 72 -#define B1001001 73 -#define B01001001 73 -#define B1001010 74 -#define B01001010 74 -#define B1001011 75 -#define B01001011 75 -#define B1001100 76 -#define B01001100 76 -#define B1001101 77 -#define B01001101 77 -#define B1001110 78 -#define B01001110 78 -#define B1001111 79 -#define B01001111 79 -#define B1010000 80 -#define B01010000 80 -#define B1010001 81 -#define B01010001 81 -#define B1010010 82 -#define B01010010 82 -#define B1010011 83 -#define B01010011 83 -#define B1010100 84 -#define B01010100 84 -#define B1010101 85 -#define B01010101 85 -#define B1010110 86 -#define B01010110 86 -#define B1010111 87 -#define B01010111 87 -#define B1011000 88 -#define B01011000 88 -#define B1011001 89 -#define B01011001 89 -#define B1011010 90 -#define B01011010 90 -#define B1011011 91 -#define B01011011 91 -#define B1011100 92 -#define B01011100 92 -#define B1011101 93 -#define B01011101 93 -#define B1011110 94 -#define B01011110 94 -#define B1011111 95 -#define B01011111 95 -#define B1100000 96 -#define B01100000 96 -#define B1100001 97 -#define B01100001 97 -#define B1100010 98 -#define B01100010 98 -#define B1100011 99 -#define B01100011 99 -#define B1100100 100 -#define B01100100 100 -#define B1100101 101 -#define B01100101 101 -#define B1100110 102 -#define B01100110 102 -#define B1100111 103 -#define B01100111 103 -#define B1101000 104 -#define B01101000 104 -#define B1101001 105 -#define B01101001 105 -#define B1101010 106 -#define B01101010 106 -#define B1101011 107 -#define B01101011 107 -#define B1101100 108 -#define B01101100 108 -#define B1101101 109 -#define B01101101 109 -#define B1101110 110 -#define B01101110 110 -#define B1101111 111 -#define B01101111 111 -#define B1110000 112 -#define B01110000 112 -#define B1110001 113 -#define B01110001 113 -#define B1110010 114 -#define B01110010 114 -#define B1110011 115 -#define B01110011 115 -#define B1110100 116 -#define B01110100 116 -#define B1110101 117 -#define B01110101 117 -#define B1110110 118 -#define B01110110 118 -#define B1110111 119 -#define B01110111 119 -#define B1111000 120 -#define B01111000 120 -#define B1111001 121 -#define B01111001 121 -#define B1111010 122 -#define B01111010 122 -#define B1111011 123 -#define B01111011 123 -#define B1111100 124 -#define B01111100 124 -#define B1111101 125 -#define B01111101 125 -#define B1111110 126 -#define B01111110 126 -#define B1111111 127 -#define B01111111 127 -#define B10000000 128 -#define B10000001 129 -#define B10000010 130 -#define B10000011 131 -#define B10000100 132 -#define B10000101 133 -#define B10000110 134 -#define B10000111 135 -#define B10001000 136 -#define B10001001 137 -#define B10001010 138 -#define B10001011 139 -#define B10001100 140 -#define B10001101 141 -#define B10001110 142 -#define B10001111 143 -#define B10010000 144 -#define B10010001 145 -#define B10010010 146 -#define B10010011 147 -#define B10010100 148 -#define B10010101 149 -#define B10010110 150 -#define B10010111 151 -#define B10011000 152 -#define B10011001 153 -#define B10011010 154 -#define B10011011 155 -#define B10011100 156 -#define B10011101 157 -#define B10011110 158 -#define B10011111 159 -#define B10100000 160 -#define B10100001 161 -#define B10100010 162 -#define B10100011 163 -#define B10100100 164 -#define B10100101 165 -#define B10100110 166 -#define B10100111 167 -#define B10101000 168 -#define B10101001 169 -#define B10101010 170 -#define B10101011 171 -#define B10101100 172 -#define B10101101 173 -#define B10101110 174 -#define B10101111 175 -#define B10110000 176 -#define B10110001 177 -#define B10110010 178 -#define B10110011 179 -#define B10110100 180 -#define B10110101 181 -#define B10110110 182 -#define B10110111 183 -#define B10111000 184 -#define B10111001 185 -#define B10111010 186 -#define B10111011 187 -#define B10111100 188 -#define B10111101 189 -#define B10111110 190 -#define B10111111 191 -#define B11000000 192 -#define B11000001 193 -#define B11000010 194 -#define B11000011 195 -#define B11000100 196 -#define B11000101 197 -#define B11000110 198 -#define B11000111 199 -#define B11001000 200 -#define B11001001 201 -#define B11001010 202 -#define B11001011 203 -#define B11001100 204 -#define B11001101 205 -#define B11001110 206 -#define B11001111 207 -#define B11010000 208 -#define B11010001 209 -#define B11010010 210 -#define B11010011 211 -#define B11010100 212 -#define B11010101 213 -#define B11010110 214 -#define B11010111 215 -#define B11011000 216 -#define B11011001 217 -#define B11011010 218 -#define B11011011 219 -#define B11011100 220 -#define B11011101 221 -#define B11011110 222 -#define B11011111 223 -#define B11100000 224 -#define B11100001 225 -#define B11100010 226 -#define B11100011 227 -#define B11100100 228 -#define B11100101 229 -#define B11100110 230 -#define B11100111 231 -#define B11101000 232 -#define B11101001 233 -#define B11101010 234 -#define B11101011 235 -#define B11101100 236 -#define B11101101 237 -#define B11101110 238 -#define B11101111 239 -#define B11110000 240 -#define B11110001 241 -#define B11110010 242 -#define B11110011 243 -#define B11110100 244 -#define B11110101 245 -#define B11110110 246 -#define B11110111 247 -#define B11111000 248 -#define B11111001 249 -#define B11111010 250 -#define B11111011 251 -#define B11111100 252 -#define B11111101 253 -#define B11111110 254 -#define B11111111 255 - -#endif diff --git a/build/linux/work/hardware/arduino/cores/arduino/main.cpp b/build/linux/work/hardware/arduino/cores/arduino/main.cpp deleted file mode 100644 index 34450f46d..000000000 --- a/build/linux/work/hardware/arduino/cores/arduino/main.cpp +++ /dev/null @@ -1,20 +0,0 @@ -#include - -int main(void) -{ - init(); - -#if defined(USBCON) - USB.attach(); -#endif - - setup(); - - for (;;) { - loop(); - if (serialEventRun) serialEventRun(); - } - - return 0; -} - diff --git a/build/linux/work/hardware/arduino/cores/arduino/new.cpp b/build/linux/work/hardware/arduino/cores/arduino/new.cpp deleted file mode 100644 index 0f6d4220e..000000000 --- a/build/linux/work/hardware/arduino/cores/arduino/new.cpp +++ /dev/null @@ -1,18 +0,0 @@ -#include - -void * operator new(size_t size) -{ - return malloc(size); -} - -void operator delete(void * ptr) -{ - free(ptr); -} - -int __cxa_guard_acquire(__guard *g) {return !*(char *)(g);}; -void __cxa_guard_release (__guard *g) {*(char *)g = 1;}; -void __cxa_guard_abort (__guard *) {}; - -void __cxa_pure_virtual(void) {}; - diff --git a/build/linux/work/hardware/arduino/cores/arduino/new.h b/build/linux/work/hardware/arduino/cores/arduino/new.h deleted file mode 100644 index cd940ce8b..000000000 --- a/build/linux/work/hardware/arduino/cores/arduino/new.h +++ /dev/null @@ -1,22 +0,0 @@ -/* Header to define new/delete operators as they aren't provided by avr-gcc by default - Taken from http://www.avrfreaks.net/index.php?name=PNphpBB2&file=viewtopic&t=59453 - */ - -#ifndef NEW_H -#define NEW_H - -#include - -void * operator new(size_t size); -void operator delete(void * ptr); - -__extension__ typedef int __guard __attribute__((mode (__DI__))); - -extern "C" int __cxa_guard_acquire(__guard *); -extern "C" void __cxa_guard_release (__guard *); -extern "C" void __cxa_guard_abort (__guard *); - -extern "C" void __cxa_pure_virtual(void); - -#endif - diff --git a/build/linux/work/hardware/arduino/cores/arduino/wiring.c b/build/linux/work/hardware/arduino/cores/arduino/wiring.c deleted file mode 100644 index fb447eb53..000000000 --- a/build/linux/work/hardware/arduino/cores/arduino/wiring.c +++ /dev/null @@ -1,328 +0,0 @@ -/* - wiring.c - Partial implementation of the Wiring API for the ATmega8. - Part of Arduino - http://www.arduino.cc/ - - Copyright (c) 2005-2006 David A. Mellis - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General - Public License along with this library; if not, write to the - Free Software Foundation, Inc., 59 Temple Place, Suite 330, - Boston, MA 02111-1307 USA - - $Id$ -*/ - -#include "wiring_private.h" - -// the prescaler is set so that timer0 ticks every 64 clock cycles, and the -// the overflow handler is called every 256 ticks. -#define MICROSECONDS_PER_TIMER0_OVERFLOW (clockCyclesToMicroseconds(64 * 256)) - -// the whole number of milliseconds per timer0 overflow -#define MILLIS_INC (MICROSECONDS_PER_TIMER0_OVERFLOW / 1000) - -// the fractional number of milliseconds per timer0 overflow. we shift right -// by three to fit these numbers into a byte. (for the clock speeds we care -// about - 8 and 16 MHz - this doesn't lose precision.) -#define FRACT_INC ((MICROSECONDS_PER_TIMER0_OVERFLOW % 1000) >> 3) -#define FRACT_MAX (1000 >> 3) - -volatile unsigned long timer0_overflow_count = 0; -volatile unsigned long timer0_millis = 0; -static unsigned char timer0_fract = 0; - -#if defined(__AVR_ATtiny24__) || defined(__AVR_ATtiny44__) || defined(__AVR_ATtiny84__) -SIGNAL(TIM0_OVF_vect) -#else -SIGNAL(TIMER0_OVF_vect) -#endif -{ - // copy these to local variables so they can be stored in registers - // (volatile variables must be read from memory on every access) - unsigned long m = timer0_millis; - unsigned char f = timer0_fract; - - m += MILLIS_INC; - f += FRACT_INC; - if (f >= FRACT_MAX) { - f -= FRACT_MAX; - m += 1; - } - - timer0_fract = f; - timer0_millis = m; - timer0_overflow_count++; -} - -unsigned long millis() -{ - unsigned long m; - uint8_t oldSREG = SREG; - - // disable interrupts while we read timer0_millis or we might get an - // inconsistent value (e.g. in the middle of a write to timer0_millis) - cli(); - m = timer0_millis; - SREG = oldSREG; - - return m; -} - -unsigned long micros() { - unsigned long m; - uint8_t oldSREG = SREG, t; - - cli(); - m = timer0_overflow_count; -#if defined(TCNT0) - t = TCNT0; -#elif defined(TCNT0L) - t = TCNT0L; -#else - #error TIMER 0 not defined -#endif - - -#ifdef TIFR0 - if ((TIFR0 & _BV(TOV0)) && (t < 255)) - m++; -#else - if ((TIFR & _BV(TOV0)) && (t < 255)) - m++; -#endif - - SREG = oldSREG; - - return ((m << 8) + t) * (64 / clockCyclesPerMicrosecond()); -} - -void delay(unsigned long ms) -{ - uint16_t start = (uint16_t)micros(); - - while (ms > 0) { - if (((uint16_t)micros() - start) >= 1000) { - ms--; - start += 1000; - } - } -} - -/* Delay for the given number of microseconds. Assumes a 8 or 16 MHz clock. */ -void delayMicroseconds(unsigned int us) -{ - // calling avrlib's delay_us() function with low values (e.g. 1 or - // 2 microseconds) gives delays longer than desired. - //delay_us(us); -#if F_CPU >= 20000000L - // for the 20 MHz clock on rare Arduino boards - - // for a one-microsecond delay, simply wait 2 cycle and return. The overhead - // of the function call yields a delay of exactly a one microsecond. - __asm__ __volatile__ ( - "nop" "\n\t" - "nop"); //just waiting 2 cycle - if (--us == 0) - return; - - // the following loop takes a 1/5 of a microsecond (4 cycles) - // per iteration, so execute it five times for each microsecond of - // delay requested. - us = (us<<2) + us; // x5 us - - // account for the time taken in the preceeding commands. - us -= 2; - -#elif F_CPU >= 16000000L - // for the 16 MHz clock on most Arduino boards - - // for a one-microsecond delay, simply return. the overhead - // of the function call yields a delay of approximately 1 1/8 us. - if (--us == 0) - return; - - // the following loop takes a quarter of a microsecond (4 cycles) - // per iteration, so execute it four times for each microsecond of - // delay requested. - us <<= 2; - - // account for the time taken in the preceeding commands. - us -= 2; -#else - // for the 8 MHz internal clock on the ATmega168 - - // for a one- or two-microsecond delay, simply return. the overhead of - // the function calls takes more than two microseconds. can't just - // subtract two, since us is unsigned; we'd overflow. - if (--us == 0) - return; - if (--us == 0) - return; - - // the following loop takes half of a microsecond (4 cycles) - // per iteration, so execute it twice for each microsecond of - // delay requested. - us <<= 1; - - // partially compensate for the time taken by the preceeding commands. - // we can't subtract any more than this or we'd overflow w/ small delays. - us--; -#endif - - // busy wait - __asm__ __volatile__ ( - "1: sbiw %0,1" "\n\t" // 2 cycles - "brne 1b" : "=w" (us) : "0" (us) // 2 cycles - ); -} - -void init() -{ - // this needs to be called before setup() or some functions won't - // work there - sei(); - - // on the ATmega168, timer 0 is also used for fast hardware pwm - // (using phase-correct PWM would mean that timer 0 overflowed half as often - // resulting in different millis() behavior on the ATmega8 and ATmega168) -#if defined(TCCR0A) && defined(WGM01) - sbi(TCCR0A, WGM01); - sbi(TCCR0A, WGM00); -#endif - - // set timer 0 prescale factor to 64 -#if defined(__AVR_ATmega128__) - // CPU specific: different values for the ATmega128 - sbi(TCCR0, CS02); -#elif defined(TCCR0) && defined(CS01) && defined(CS00) - // this combination is for the standard atmega8 - sbi(TCCR0, CS01); - sbi(TCCR0, CS00); -#elif defined(TCCR0B) && defined(CS01) && defined(CS00) - // this combination is for the standard 168/328/1280/2560 - sbi(TCCR0B, CS01); - sbi(TCCR0B, CS00); -#elif defined(TCCR0A) && defined(CS01) && defined(CS00) - // this combination is for the __AVR_ATmega645__ series - sbi(TCCR0A, CS01); - sbi(TCCR0A, CS00); -#else - #error Timer 0 prescale factor 64 not set correctly -#endif - - // enable timer 0 overflow interrupt -#if defined(TIMSK) && defined(TOIE0) - sbi(TIMSK, TOIE0); -#elif defined(TIMSK0) && defined(TOIE0) - sbi(TIMSK0, TOIE0); -#else - #error Timer 0 overflow interrupt not set correctly -#endif - - // timers 1 and 2 are used for phase-correct hardware pwm - // this is better for motors as it ensures an even waveform - // note, however, that fast pwm mode can achieve a frequency of up - // 8 MHz (with a 16 MHz clock) at 50% duty cycle - -#if defined(TCCR1B) && defined(CS11) && defined(CS10) - TCCR1B = 0; - - // set timer 1 prescale factor to 64 - sbi(TCCR1B, CS11); -#if F_CPU >= 8000000L - sbi(TCCR1B, CS10); -#endif -#elif defined(TCCR1) && defined(CS11) && defined(CS10) - sbi(TCCR1, CS11); -#if F_CPU >= 8000000L - sbi(TCCR1, CS10); -#endif -#endif - // put timer 1 in 8-bit phase correct pwm mode -#if defined(TCCR1A) && defined(WGM10) - sbi(TCCR1A, WGM10); -#elif defined(TCCR1) - #warning this needs to be finished -#endif - - // set timer 2 prescale factor to 64 -#if defined(TCCR2) && defined(CS22) - sbi(TCCR2, CS22); -#elif defined(TCCR2B) && defined(CS22) - sbi(TCCR2B, CS22); -#else - #warning Timer 2 not finished (may not be present on this CPU) -#endif - - // configure timer 2 for phase correct pwm (8-bit) -#if defined(TCCR2) && defined(WGM20) - sbi(TCCR2, WGM20); -#elif defined(TCCR2A) && defined(WGM20) - sbi(TCCR2A, WGM20); -#else - #warning Timer 2 not finished (may not be present on this CPU) -#endif - -#if defined(TCCR3B) && defined(CS31) && defined(WGM30) - sbi(TCCR3B, CS31); // set timer 3 prescale factor to 64 - sbi(TCCR3B, CS30); - sbi(TCCR3A, WGM30); // put timer 3 in 8-bit phase correct pwm mode -#endif - -#if defined(TCCR4A) && defined(TCCR4B) && defined(TCCR4D) /* beginning of timer4 block for 32U4 and similar */ - sbi(TCCR4A, COM4A1); // clear channel A on output compare match - cbi(TCCR4A, COM4A0); - sbi(TCCR4C, COM4D1); // clear channel D on output compare match - cbi(TCCR4C, COM4D0); - sbi(TCCR4B, CS42); // set timer4 prescale factor to 64 - sbi(TCCR4B, CS41); - sbi(TCCR4B, CS40); - sbi(TCCR4D, WGM40); // put timer 4 in phase- and frequency-correct PWM mode - sbi(TCCR4A, PWM4A); // enable PWM mode for comparator OCR4A - sbi(TCCR4C, PWM4D); // enable PWM mode for comparator OCR4D -#else /* beginning of timer4 block for ATMEGA1280 and ATMEGA2560 */ -#if defined(TCCR4B) && defined(CS41) && defined(WGM40) - sbi(TCCR4B, CS41); // set timer 4 prescale factor to 64 - sbi(TCCR4B, CS40); - sbi(TCCR4A, WGM40); // put timer 4 in 8-bit phase correct pwm mode -#endif -#endif /* end timer4 block for ATMEGA1280/2560 and similar */ - -#if defined(TCCR5B) && defined(CS51) && defined(WGM50) - sbi(TCCR5B, CS51); // set timer 5 prescale factor to 64 - sbi(TCCR5B, CS50); - sbi(TCCR5A, WGM50); // put timer 5 in 8-bit phase correct pwm mode -#endif - -#if defined(ADCSRA) - // set a2d prescale factor to 128 - // 16 MHz / 128 = 125 KHz, inside the desired 50-200 KHz range. - // XXX: this will not work properly for other clock speeds, and - // this code should use F_CPU to determine the prescale factor. - sbi(ADCSRA, ADPS2); - sbi(ADCSRA, ADPS1); - sbi(ADCSRA, ADPS0); - - // enable a2d conversions - sbi(ADCSRA, ADEN); -#endif - - // the bootloader connects pins 0 and 1 to the USART; disconnect them - // here so they can be used as normal digital i/o; they will be - // reconnected in Serial.begin() -#if defined(UCSRB) - UCSRB = 0; -#elif defined(UCSR0B) - UCSR0B = 0; -#endif -} diff --git a/build/linux/work/hardware/arduino/cores/arduino/wiring_analog.c b/build/linux/work/hardware/arduino/cores/arduino/wiring_analog.c deleted file mode 100644 index 40a3363f8..000000000 --- a/build/linux/work/hardware/arduino/cores/arduino/wiring_analog.c +++ /dev/null @@ -1,276 +0,0 @@ -/* - wiring_analog.c - analog input and output - Part of Arduino - http://www.arduino.cc/ - - Copyright (c) 2005-2006 David A. Mellis - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General - Public License along with this library; if not, write to the - Free Software Foundation, Inc., 59 Temple Place, Suite 330, - Boston, MA 02111-1307 USA - - Modified 28 September 2010 by Mark Sproul - - $Id: wiring.c 248 2007-02-03 15:36:30Z mellis $ -*/ - -#include "wiring_private.h" -#include "pins_arduino.h" - -uint8_t analog_reference = DEFAULT; - -void analogReference(uint8_t mode) -{ - // can't actually set the register here because the default setting - // will connect AVCC and the AREF pin, which would cause a short if - // there's something connected to AREF. - analog_reference = mode; -} - -int analogRead(uint8_t pin) -{ - uint8_t low, high; - -#if defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__) - if (pin >= 54) pin -= 54; // allow for channel or pin numbers -#elif defined(__AVR_ATmega32U4__) - if (pin >= 18) pin -= 18; // allow for channel or pin numbers -#elif defined(__AVR_ATmega1284__) - if (pin >= 24) pin -= 24; // allow for channel or pin numbers -#else - if (pin >= 14) pin -= 14; // allow for channel or pin numbers -#endif - -#if defined(__AVR_ATmega32U4__) - pin = analogPinToChannel(pin); - ADCSRB = (ADCSRB & ~(1 << MUX5)) | (((pin >> 3) & 0x01) << MUX5); -#elif defined(ADCSRB) && defined(MUX5) - // the MUX5 bit of ADCSRB selects whether we're reading from channels - // 0 to 7 (MUX5 low) or 8 to 15 (MUX5 high). - ADCSRB = (ADCSRB & ~(1 << MUX5)) | (((pin >> 3) & 0x01) << MUX5); -#endif - - // set the analog reference (high two bits of ADMUX) and select the - // channel (low 4 bits). this also sets ADLAR (left-adjust result) - // to 0 (the default). -#if defined(ADMUX) - ADMUX = (analog_reference << 6) | (pin & 0x07); -#endif - - // without a delay, we seem to read from the wrong channel - //delay(1); - -#if defined(ADCSRA) && defined(ADCL) - // start the conversion - sbi(ADCSRA, ADSC); - - // ADSC is cleared when the conversion finishes - while (bit_is_set(ADCSRA, ADSC)); - - // we have to read ADCL first; doing so locks both ADCL - // and ADCH until ADCH is read. reading ADCL second would - // cause the results of each conversion to be discarded, - // as ADCL and ADCH would be locked when it completed. - low = ADCL; - high = ADCH; -#else - // we dont have an ADC, return 0 - low = 0; - high = 0; -#endif - - // combine the two bytes - return (high << 8) | low; -} - -// Right now, PWM output only works on the pins with -// hardware support. These are defined in the appropriate -// pins_*.c file. For the rest of the pins, we default -// to digital output. -void analogWrite(uint8_t pin, int val) -{ - // We need to make sure the PWM output is enabled for those pins - // that support it, as we turn it off when digitally reading or - // writing with them. Also, make sure the pin is in output mode - // for consistenty with Wiring, which doesn't require a pinMode - // call for the analog output pins. - pinMode(pin, OUTPUT); - if (val == 0) - { - digitalWrite(pin, LOW); - } - else if (val == 255) - { - digitalWrite(pin, HIGH); - } - else - { - switch(digitalPinToTimer(pin)) - { - // XXX fix needed for atmega8 - #if defined(TCCR0) && defined(COM00) && !defined(__AVR_ATmega8__) - case TIMER0A: - // connect pwm to pin on timer 0 - sbi(TCCR0, COM00); - OCR0 = val; // set pwm duty - break; - #endif - - #if defined(TCCR0A) && defined(COM0A1) - case TIMER0A: - // connect pwm to pin on timer 0, channel A - sbi(TCCR0A, COM0A1); - OCR0A = val; // set pwm duty - break; - #endif - - #if defined(TCCR0A) && defined(COM0B1) - case TIMER0B: - // connect pwm to pin on timer 0, channel B - sbi(TCCR0A, COM0B1); - OCR0B = val; // set pwm duty - break; - #endif - - #if defined(TCCR1A) && defined(COM1A1) - case TIMER1A: - // connect pwm to pin on timer 1, channel A - sbi(TCCR1A, COM1A1); - OCR1A = val; // set pwm duty - break; - #endif - - #if defined(TCCR1A) && defined(COM1B1) - case TIMER1B: - // connect pwm to pin on timer 1, channel B - sbi(TCCR1A, COM1B1); - OCR1B = val; // set pwm duty - break; - #endif - - #if defined(TCCR2) && defined(COM21) - case TIMER2: - // connect pwm to pin on timer 2 - sbi(TCCR2, COM21); - OCR2 = val; // set pwm duty - break; - #endif - - #if defined(TCCR2A) && defined(COM2A1) - case TIMER2A: - // connect pwm to pin on timer 2, channel A - sbi(TCCR2A, COM2A1); - OCR2A = val; // set pwm duty - break; - #endif - - #if defined(TCCR2A) && defined(COM2B1) - case TIMER2B: - // connect pwm to pin on timer 2, channel B - sbi(TCCR2A, COM2B1); - OCR2B = val; // set pwm duty - break; - #endif - - #if defined(TCCR3A) && defined(COM3A1) - case TIMER3A: - // connect pwm to pin on timer 3, channel A - sbi(TCCR3A, COM3A1); - OCR3A = val; // set pwm duty - break; - #endif - - #if defined(TCCR3A) && defined(COM3B1) - case TIMER3B: - // connect pwm to pin on timer 3, channel B - sbi(TCCR3A, COM3B1); - OCR3B = val; // set pwm duty - break; - #endif - - #if defined(TCCR3A) && defined(COM3C1) - case TIMER3C: - // connect pwm to pin on timer 3, channel C - sbi(TCCR3A, COM3C1); - OCR3C = val; // set pwm duty - break; - #endif - - #if defined(TCCR4A) - case TIMER4A: - //connect pwm to pin on timer 4, channel A - sbi(TCCR4A, COM4A1); - OCR4A = val; // set pwm duty - break; - #endif - - #if defined(TCCR4A) && defined(COM4B1) - case TIMER4B: - // connect pwm to pin on timer 4, channel B - sbi(TCCR4A, COM4B1); - OCR4B = val; // set pwm duty - break; - #endif - - #if defined(TCCR4A) && defined(COM4C1) - case TIMER4C: - // connect pwm to pin on timer 4, channel C - sbi(TCCR4A, COM4C1); - OCR4C = val; // set pwm duty - break; - #endif - - #if defined(TCCR4C) - case TIMER4D: - // connect pwm to pin on timer 4, channel D - sbi(TCCR4C, COM4D1); - OCR4D = val; // set pwm duty - break; - #endif - - - #if defined(TCCR5A) && defined(COM5A1) - case TIMER5A: - // connect pwm to pin on timer 5, channel A - sbi(TCCR5A, COM5A1); - OCR5A = val; // set pwm duty - break; - #endif - - #if defined(TCCR5A) && defined(COM5B1) - case TIMER5B: - // connect pwm to pin on timer 5, channel B - sbi(TCCR5A, COM5B1); - OCR5B = val; // set pwm duty - break; - #endif - - #if defined(TCCR5A) && defined(COM5C1) - case TIMER5C: - // connect pwm to pin on timer 5, channel C - sbi(TCCR5A, COM5C1); - OCR5C = val; // set pwm duty - break; - #endif - - case NOT_ON_TIMER: - default: - if (val < 128) { - digitalWrite(pin, LOW); - } else { - digitalWrite(pin, HIGH); - } - } - } -} - diff --git a/build/linux/work/hardware/arduino/cores/arduino/wiring_digital.c b/build/linux/work/hardware/arduino/cores/arduino/wiring_digital.c deleted file mode 100644 index be323b1df..000000000 --- a/build/linux/work/hardware/arduino/cores/arduino/wiring_digital.c +++ /dev/null @@ -1,178 +0,0 @@ -/* - wiring_digital.c - digital input and output functions - Part of Arduino - http://www.arduino.cc/ - - Copyright (c) 2005-2006 David A. Mellis - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General - Public License along with this library; if not, write to the - Free Software Foundation, Inc., 59 Temple Place, Suite 330, - Boston, MA 02111-1307 USA - - Modified 28 September 2010 by Mark Sproul - - $Id: wiring.c 248 2007-02-03 15:36:30Z mellis $ -*/ - -#define ARDUINO_MAIN -#include "wiring_private.h" -#include "pins_arduino.h" - -void pinMode(uint8_t pin, uint8_t mode) -{ - uint8_t bit = digitalPinToBitMask(pin); - uint8_t port = digitalPinToPort(pin); - volatile uint8_t *reg, *out; - - if (port == NOT_A_PIN) return; - - // JWS: can I let the optimizer do this? - reg = portModeRegister(port); - out = portOutputRegister(port); - - if (mode == INPUT) { - uint8_t oldSREG = SREG; - cli(); - *reg &= ~bit; - *out &= ~bit; - SREG = oldSREG; - } else if (mode == INPUT_PULLUP) { - uint8_t oldSREG = SREG; - cli(); - *reg &= ~bit; - *out |= bit; - SREG = oldSREG; - } else { - uint8_t oldSREG = SREG; - cli(); - *reg |= bit; - SREG = oldSREG; - } -} - -// Forcing this inline keeps the callers from having to push their own stuff -// on the stack. It is a good performance win and only takes 1 more byte per -// user than calling. (It will take more bytes on the 168.) -// -// But shouldn't this be moved into pinMode? Seems silly to check and do on -// each digitalread or write. -// -// Mark Sproul: -// - Removed inline. Save 170 bytes on atmega1280 -// - changed to a switch statment; added 32 bytes but much easier to read and maintain. -// - Added more #ifdefs, now compiles for atmega645 -// -//static inline void turnOffPWM(uint8_t timer) __attribute__ ((always_inline)); -//static inline void turnOffPWM(uint8_t timer) -static void turnOffPWM(uint8_t timer) -{ - switch (timer) - { - #if defined(TCCR1A) && defined(COM1A1) - case TIMER1A: cbi(TCCR1A, COM1A1); break; - #endif - #if defined(TCCR1A) && defined(COM1B1) - case TIMER1B: cbi(TCCR1A, COM1B1); break; - #endif - - #if defined(TCCR2) && defined(COM21) - case TIMER2: cbi(TCCR2, COM21); break; - #endif - - #if defined(TCCR0A) && defined(COM0A1) - case TIMER0A: cbi(TCCR0A, COM0A1); break; - #endif - - #if defined(TIMER0B) && defined(COM0B1) - case TIMER0B: cbi(TCCR0A, COM0B1); break; - #endif - #if defined(TCCR2A) && defined(COM2A1) - case TIMER2A: cbi(TCCR2A, COM2A1); break; - #endif - #if defined(TCCR2A) && defined(COM2B1) - case TIMER2B: cbi(TCCR2A, COM2B1); break; - #endif - - #if defined(TCCR3A) && defined(COM3A1) - case TIMER3A: cbi(TCCR3A, COM3A1); break; - #endif - #if defined(TCCR3A) && defined(COM3B1) - case TIMER3B: cbi(TCCR3A, COM3B1); break; - #endif - #if defined(TCCR3A) && defined(COM3C1) - case TIMER3C: cbi(TCCR3A, COM3C1); break; - #endif - - #if defined(TCCR4A) && defined(COM4A1) - case TIMER4A: cbi(TCCR4A, COM4A1); break; - #endif - #if defined(TCCR4A) && defined(COM4B1) - case TIMER4B: cbi(TCCR4A, COM4B1); break; - #endif - #if defined(TCCR4A) && defined(COM4C1) - case TIMER4C: cbi(TCCR4A, COM4C1); break; - #endif - #if defined(TCCR4C) && defined(COM4D1) - case TIMER4D: cbi(TCCR4C, COM4D1); break; - #endif - - #if defined(TCCR5A) - case TIMER5A: cbi(TCCR5A, COM5A1); break; - case TIMER5B: cbi(TCCR5A, COM5B1); break; - case TIMER5C: cbi(TCCR5A, COM5C1); break; - #endif - } -} - -void digitalWrite(uint8_t pin, uint8_t val) -{ - uint8_t timer = digitalPinToTimer(pin); - uint8_t bit = digitalPinToBitMask(pin); - uint8_t port = digitalPinToPort(pin); - volatile uint8_t *out; - - if (port == NOT_A_PIN) return; - - // If the pin that support PWM output, we need to turn it off - // before doing a digital write. - if (timer != NOT_ON_TIMER) turnOffPWM(timer); - - out = portOutputRegister(port); - - uint8_t oldSREG = SREG; - cli(); - - if (val == LOW) { - *out &= ~bit; - } else { - *out |= bit; - } - - SREG = oldSREG; -} - -int digitalRead(uint8_t pin) -{ - uint8_t timer = digitalPinToTimer(pin); - uint8_t bit = digitalPinToBitMask(pin); - uint8_t port = digitalPinToPort(pin); - - if (port == NOT_A_PIN) return LOW; - - // If the pin that support PWM output, we need to turn it off - // before getting a digital reading. - if (timer != NOT_ON_TIMER) turnOffPWM(timer); - - if (*portInputRegister(port) & bit) return HIGH; - return LOW; -} diff --git a/build/linux/work/hardware/arduino/cores/arduino/wiring_private.h b/build/linux/work/hardware/arduino/cores/arduino/wiring_private.h deleted file mode 100644 index f0ceb0cc4..000000000 --- a/build/linux/work/hardware/arduino/cores/arduino/wiring_private.h +++ /dev/null @@ -1,69 +0,0 @@ -/* - wiring_private.h - Internal header file. - Part of Arduino - http://www.arduino.cc/ - - Copyright (c) 2005-2006 David A. Mellis - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General - Public License along with this library; if not, write to the - Free Software Foundation, Inc., 59 Temple Place, Suite 330, - Boston, MA 02111-1307 USA - - $Id: wiring.h 239 2007-01-12 17:58:39Z mellis $ -*/ - -#ifndef WiringPrivate_h -#define WiringPrivate_h - -#include -#include -#include -#include - -#include "Arduino.h" - -#ifdef __cplusplus -extern "C"{ -#endif - -#ifndef cbi -#define cbi(sfr, bit) (_SFR_BYTE(sfr) &= ~_BV(bit)) -#endif -#ifndef sbi -#define sbi(sfr, bit) (_SFR_BYTE(sfr) |= _BV(bit)) -#endif - -#define EXTERNAL_INT_0 0 -#define EXTERNAL_INT_1 1 -#define EXTERNAL_INT_2 2 -#define EXTERNAL_INT_3 3 -#define EXTERNAL_INT_4 4 -#define EXTERNAL_INT_5 5 -#define EXTERNAL_INT_6 6 -#define EXTERNAL_INT_7 7 - -#if defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__) -#define EXTERNAL_NUM_INTERRUPTS 8 -#elif defined(__AVR_ATmega1284P__) -#define EXTERNAL_NUM_INTERRUPTS 3 -#else -#define EXTERNAL_NUM_INTERRUPTS 2 -#endif - -typedef void (*voidFuncPtr)(void); - -#ifdef __cplusplus -} // extern "C" -#endif - -#endif diff --git a/build/linux/work/hardware/arduino/cores/arduino/wiring_pulse.c b/build/linux/work/hardware/arduino/cores/arduino/wiring_pulse.c deleted file mode 100644 index 0d968865d..000000000 --- a/build/linux/work/hardware/arduino/cores/arduino/wiring_pulse.c +++ /dev/null @@ -1,69 +0,0 @@ -/* - wiring_pulse.c - pulseIn() function - Part of Arduino - http://www.arduino.cc/ - - Copyright (c) 2005-2006 David A. Mellis - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General - Public License along with this library; if not, write to the - Free Software Foundation, Inc., 59 Temple Place, Suite 330, - Boston, MA 02111-1307 USA - - $Id: wiring.c 248 2007-02-03 15:36:30Z mellis $ -*/ - -#include "wiring_private.h" -#include "pins_arduino.h" - -/* Measures the length (in microseconds) of a pulse on the pin; state is HIGH - * or LOW, the type of pulse to measure. Works on pulses from 2-3 microseconds - * to 3 minutes in length, but must be called at least a few dozen microseconds - * before the start of the pulse. */ -unsigned long pulseIn(uint8_t pin, uint8_t state, unsigned long timeout) -{ - // cache the port and bit of the pin in order to speed up the - // pulse width measuring loop and achieve finer resolution. calling - // digitalRead() instead yields much coarser resolution. - uint8_t bit = digitalPinToBitMask(pin); - uint8_t port = digitalPinToPort(pin); - uint8_t stateMask = (state ? bit : 0); - unsigned long width = 0; // keep initialization out of time critical area - - // convert the timeout from microseconds to a number of times through - // the initial loop; it takes 16 clock cycles per iteration. - unsigned long numloops = 0; - unsigned long maxloops = microsecondsToClockCycles(timeout) / 16; - - // wait for any previous pulse to end - while ((*portInputRegister(port) & bit) == stateMask) - if (numloops++ == maxloops) - return 0; - - // wait for the pulse to start - while ((*portInputRegister(port) & bit) != stateMask) - if (numloops++ == maxloops) - return 0; - - // wait for the pulse to stop - while ((*portInputRegister(port) & bit) == stateMask) { - if (numloops++ == maxloops) - return 0; - width++; - } - - // convert the reading to microseconds. The loop has been determined - // to be 20 clock cycles long and have about 16 clocks between the edge - // and the start of the loop. There will be some error introduced by - // the interrupt handlers. - return clockCyclesToMicroseconds(width * 21 + 16); -} diff --git a/build/linux/work/hardware/arduino/cores/arduino/wiring_shift.c b/build/linux/work/hardware/arduino/cores/arduino/wiring_shift.c deleted file mode 100644 index cfe786758..000000000 --- a/build/linux/work/hardware/arduino/cores/arduino/wiring_shift.c +++ /dev/null @@ -1,55 +0,0 @@ -/* - wiring_shift.c - shiftOut() function - Part of Arduino - http://www.arduino.cc/ - - Copyright (c) 2005-2006 David A. Mellis - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General - Public License along with this library; if not, write to the - Free Software Foundation, Inc., 59 Temple Place, Suite 330, - Boston, MA 02111-1307 USA - - $Id: wiring.c 248 2007-02-03 15:36:30Z mellis $ -*/ - -#include "wiring_private.h" - -uint8_t shiftIn(uint8_t dataPin, uint8_t clockPin, uint8_t bitOrder) { - uint8_t value = 0; - uint8_t i; - - for (i = 0; i < 8; ++i) { - digitalWrite(clockPin, HIGH); - if (bitOrder == LSBFIRST) - value |= digitalRead(dataPin) << i; - else - value |= digitalRead(dataPin) << (7 - i); - digitalWrite(clockPin, LOW); - } - return value; -} - -void shiftOut(uint8_t dataPin, uint8_t clockPin, uint8_t bitOrder, uint8_t val) -{ - uint8_t i; - - for (i = 0; i < 8; i++) { - if (bitOrder == LSBFIRST) - digitalWrite(dataPin, !!(val & (1 << i))); - else - digitalWrite(dataPin, !!(val & (1 << (7 - i)))); - - digitalWrite(clockPin, HIGH); - digitalWrite(clockPin, LOW); - } -} diff --git a/build/linux/work/hardware/arduino/firmwares/Arduino-COMBINED-dfu-usbserial-atmega16u2-Mega2560-Rev3.hex b/build/linux/work/hardware/arduino/firmwares/Arduino-COMBINED-dfu-usbserial-atmega16u2-Mega2560-Rev3.hex deleted file mode 100644 index 7720cf41b..000000000 --- a/build/linux/work/hardware/arduino/firmwares/Arduino-COMBINED-dfu-usbserial-atmega16u2-Mega2560-Rev3.hex +++ /dev/null @@ -1,467 +0,0 @@ -:1000000090C00000A9C00000A7C00000A5C000006B -:10001000A3C00000A1C000009FC000009DC0000060 -:100020009BC0000099C0000097C0000048C40000B9 -:100030000CC4000091C000008FC000008DC0000003 -:100040008BC0000089C0000087C0000085C0000090 -:1000500083C0000081C000007FC0000002C100001A -:100060007BC0000079C0000077C0000075C00000B0 -:1000700073C0000071C000006FC000006DC00000C0 -:100080006BC0000069C0000067C0000065C00000D0 -:1000900063C0000061C000001201100102000008EE -:1000A0004123420001000102DC0109023E0002017D -:1000B00000C0320904000001020201000524000111 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-:1C1D000000650067006100200032003500360030002000440046005500000000AE -:00000001FF diff --git a/build/linux/work/hardware/arduino/firmwares/README.txt b/build/linux/work/hardware/arduino/firmwares/README.txt deleted file mode 100644 index 386dcf020..000000000 --- a/build/linux/work/hardware/arduino/firmwares/README.txt +++ /dev/null @@ -1,33 +0,0 @@ -Arduino Uno and Mega 2560 Firmwares for the ATmega8U2 - -This directory contains the firmwares used on the ATmega8U2 on the Arduino -Uno and Arduino Mega 2560. The arduino-usbdfu directory contains the DFU -bootloader on the 8U2; the arduino-usbserial directory contains the actual -usb to serial firmware. Both should be compiled against LUFA 100807. The -two .hex files in this directory combine the dfu and serial firmwares into -a single file to burn onto the 8U2. - -To burn (Uno): -avrdude -p at90usb82 -F -P usb -c avrispmkii -U flash:w:UNO-dfu_and_usbserial_combined.hex -U lfuse:w:0xFF:m -U hfuse:w:0xD9:m -U efuse:w:0xF4:m -U lock:w:0x0F:m - -To burn (Mega 2560): -avrdude -p at90usb82 -F -P usb -c avrispmkii -U flash:w:MEGA-dfu_and_usbserial_combined.hex -U lfuse:w:0xFF:m -U hfuse:w:0xD9:m -U efuse:w:0xF4:m -U lock:w:0x0F:m - - -Note on USB Vendor IDs (VID) and Product IDs (PID): The arduino-usbdfu -project uses Atmel's VID and MCU-specific PIDs to maintain compatibility -with their FLIP software. The source code to the arduino-usbserial -project includes Atmel's VID and a PID donated by them to LUFA. This -PID is used in LUFA's USBtoSerial project, which forms the basis for -arduino-usbserial. According to the LUFA documentation, this VID/PID -combination is: - - "For use in testing of LUFA powered devices during development only, - by non-commercial entities. All devices must accept collisions on this - VID/PID range (from other in-development LUFA devices) to be resolved - by using a unique release number in the Device Descriptor. No devices - using this VID/PID combination may be released to the general public." - -The production version of the arduino-usbserial firmware uses the -Arduino VID. This is only for use with official Arduino hardware and -should not be used on other products. \ No newline at end of file diff --git a/build/linux/work/hardware/arduino/firmwares/UNO-dfu_and_usbserial_combined.hex b/build/linux/work/hardware/arduino/firmwares/UNO-dfu_and_usbserial_combined.hex deleted file mode 100644 index 60acf44c5..000000000 --- a/build/linux/work/hardware/arduino/firmwares/UNO-dfu_and_usbserial_combined.hex +++ /dev/null @@ -1,234 +0,0 @@ -:200000009CC00000B5C00000B3C00000B1C00000AFC00000ADC00000ABC00000A9C000007B -:20002000A7C00000A5C00000A3C0000054C4000018C400009DC000009BC0000099C000008C -:2000400097C0000095C0000093C0000091C000008FC000008DC000008BC000000EC100009A -:2000600087C0000085C0000083C0000081C000007FC000007DC000007BC0000079C0000080 -:2000800077C0000075C0000073C0000071C000006FC000006DC00000120110010200000806 -:2000A0004123010001000102DC0109023E00020100C032090400000102020100052400017F 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-:201C60008093E8000F900F90CF91DF911F91089508958EB3882329F08091E80083FF01C030 -:201C800043CF0895F999FECF92BD81BDF89A992780B50895262FF999FECF1FBA92BD81BD6B -:201CA00020BD0FB6F894FA9AF99A0FBE01960895F894FFCF01021E938220DCFB1201100123 -:201CC00000000020EB03F72F00000001000109021B0001010080320904000000FE010200E6 -:201CE0000921030000000C0001040309042003410072006400750069006E006F002000552C -:101D0000006E006F002000440046005500000000F7 -:00000001FF diff --git a/build/linux/work/hardware/arduino/firmwares/arduino-usbdfu/Arduino-usbdfu.c b/build/linux/work/hardware/arduino/firmwares/arduino-usbdfu/Arduino-usbdfu.c deleted file mode 100644 index 7bed831f2..000000000 --- a/build/linux/work/hardware/arduino/firmwares/arduino-usbdfu/Arduino-usbdfu.c +++ /dev/null @@ -1,728 +0,0 @@ -/* - LUFA Library - Copyright (C) Dean Camera, 2010. - - dean [at] fourwalledcubicle [dot] com - www.fourwalledcubicle.com -*/ - -/* - Copyright 2010 Dean Camera (dean [at] fourwalledcubicle [dot] com) - - Permission to use, copy, modify, distribute, and sell this - software and its documentation for any purpose is hereby granted - without fee, provided that the above copyright notice appear in - all copies and that both that the copyright notice and this - permission notice and warranty disclaimer appear in supporting - documentation, and that the name of the author not be used in - advertising or publicity pertaining to distribution of the - software without specific, written prior permission. - - The author disclaim all warranties with regard to this - software, including all implied warranties of merchantability - and fitness. In no event shall the author be liable for any - special, indirect or consequential damages or any damages - whatsoever resulting from loss of use, data or profits, whether - in an action of contract, negligence or other tortious action, - arising out of or in connection with the use or performance of - this software. -*/ - -/** \file - * - * Main source file for the DFU class bootloader. This file contains the complete bootloader logic. - */ - -#define INCLUDE_FROM_BOOTLOADER_C -#include "Arduino-usbdfu.h" - -/** Flag to indicate if the bootloader should be running, or should exit and allow the application code to run - * via a soft reset. When cleared, the bootloader will abort, the USB interface will shut down and the application - * jumped to via an indirect jump to location 0x0000 (or other location specified by the host). - */ -bool RunBootloader = true; - -/** Flag to indicate if the bootloader is waiting to exit. When the host requests the bootloader to exit and - * jump to the application address it specifies, it sends two sequential commands which must be properly - * acknowledged. Upon reception of the first the RunBootloader flag is cleared and the WaitForExit flag is set, - * causing the bootloader to wait for the final exit command before shutting down. - */ -bool WaitForExit = false; - -/** Current DFU state machine state, one of the values in the DFU_State_t enum. */ -uint8_t DFU_State = dfuIDLE; - -/** Status code of the last executed DFU command. This is set to one of the values in the DFU_Status_t enum after - * each operation, and returned to the host when a Get Status DFU request is issued. - */ -uint8_t DFU_Status = OK; - -/** Data containing the DFU command sent from the host. */ -DFU_Command_t SentCommand; - -/** Response to the last issued Read Data DFU command. Unlike other DFU commands, the read command - * requires a single byte response from the bootloader containing the read data when the next DFU_UPLOAD command - * is issued by the host. - */ -uint8_t ResponseByte; - -/** Pointer to the start of the user application. By default this is 0x0000 (the reset vector), however the host - * may specify an alternate address when issuing the application soft-start command. - */ -AppPtr_t AppStartPtr = (AppPtr_t)0x0000; - -/** 64-bit flash page number. This is concatenated with the current 16-bit address on USB AVRs containing more than - * 64KB of flash memory. - */ -uint8_t Flash64KBPage = 0; - -/** Memory start address, indicating the current address in the memory being addressed (either FLASH or EEPROM - * depending on the issued command from the host). - */ -uint16_t StartAddr = 0x0000; - -/** Memory end address, indicating the end address to read to/write from in the memory being addressed (either FLASH - * of EEPROM depending on the issued command from the host). - */ -uint16_t EndAddr = 0x0000; - - -/** Pulse generation counters to keep track of the number of milliseconds remaining for each pulse type */ -volatile struct -{ - uint8_t TxLEDPulse; /**< Milliseconds remaining for data Tx LED pulse */ - uint8_t RxLEDPulse; /**< Milliseconds remaining for data Rx LED pulse */ - uint8_t PingPongLEDPulse; /**< Milliseconds remaining for enumeration Tx/Rx ping-pong LED pulse */ -} PulseMSRemaining; - -/** Main program entry point. This routine configures the hardware required by the bootloader, then continuously - * runs the bootloader processing routine until instructed to soft-exit, or hard-reset via the watchdog to start - * the loaded application code. - */ -int main(void) -{ - /* Configure hardware required by the bootloader */ - SetupHardware(); - - /* Enable global interrupts so that the USB stack can function */ - sei(); - - /* Run the USB management task while the bootloader is supposed to be running */ - while (RunBootloader || WaitForExit) - USB_USBTask(); - - /* Reset configured hardware back to their original states for the user application */ - ResetHardware(); - - /* Start the user application */ - AppStartPtr(); -} - -/** Configures all hardware required for the bootloader. */ -void SetupHardware(void) -{ - /* Disable watchdog if enabled by bootloader/fuses */ - MCUSR &= ~(1 << WDRF); - wdt_disable(); - - /* Disable clock division */ -// clock_prescale_set(clock_div_1); - - /* Relocate the interrupt vector table to the bootloader section */ - MCUCR = (1 << IVCE); - MCUCR = (1 << IVSEL); - - LEDs_Init(); - - /* Initialize the USB subsystem */ - USB_Init(); -} - -/** Resets all configured hardware required for the bootloader back to their original states. */ -void ResetHardware(void) -{ - /* Shut down the USB subsystem */ - USB_ShutDown(); - - /* Relocate the interrupt vector table back to the application section */ - MCUCR = (1 << IVCE); - MCUCR = 0; -} - -/** Event handler for the USB_UnhandledControlRequest event. This is used to catch standard and class specific - * control requests that are not handled internally by the USB library (including the DFU commands, which are - * all issued via the control endpoint), so that they can be handled appropriately for the application. - */ -void EVENT_USB_Device_UnhandledControlRequest(void) -{ - /* Get the size of the command and data from the wLength value */ - SentCommand.DataSize = USB_ControlRequest.wLength; - - /* Turn off TX LED(s) once the TX pulse period has elapsed */ - if (PulseMSRemaining.TxLEDPulse && !(--PulseMSRemaining.TxLEDPulse)) - LEDs_TurnOffLEDs(LEDMASK_TX); - - /* Turn off RX LED(s) once the RX pulse period has elapsed */ - if (PulseMSRemaining.RxLEDPulse && !(--PulseMSRemaining.RxLEDPulse)) - LEDs_TurnOffLEDs(LEDMASK_RX); - - switch (USB_ControlRequest.bRequest) - { - case DFU_DNLOAD: - LEDs_TurnOnLEDs(LEDMASK_RX); - PulseMSRemaining.RxLEDPulse = TX_RX_LED_PULSE_MS; - - Endpoint_ClearSETUP(); - - /* Check if bootloader is waiting to terminate */ - if (WaitForExit) - { - /* Bootloader is terminating - process last received command */ - ProcessBootloaderCommand(); - - /* Turn off TX/RX status LEDs so that they're not left on when application starts */ - LEDs_TurnOffLEDs(LEDMASK_TX); - LEDs_TurnOffLEDs(LEDMASK_RX); - - /* Indicate that the last command has now been processed - free to exit bootloader */ - WaitForExit = false; - } - - /* If the request has a data stage, load it into the command struct */ - if (SentCommand.DataSize) - { - while (!(Endpoint_IsOUTReceived())) - { - if (USB_DeviceState == DEVICE_STATE_Unattached) - return; - } - - /* First byte of the data stage is the DNLOAD request's command */ - SentCommand.Command = Endpoint_Read_Byte(); - - /* One byte of the data stage is the command, so subtract it from the total data bytes */ - SentCommand.DataSize--; - - /* Load in the rest of the data stage as command parameters */ - for (uint8_t DataByte = 0; (DataByte < sizeof(SentCommand.Data)) && - Endpoint_BytesInEndpoint(); DataByte++) - { - SentCommand.Data[DataByte] = Endpoint_Read_Byte(); - SentCommand.DataSize--; - } - - /* Process the command */ - ProcessBootloaderCommand(); - } - - /* Check if currently downloading firmware */ - if (DFU_State == dfuDNLOAD_IDLE) - { - if (!(SentCommand.DataSize)) - { - DFU_State = dfuIDLE; - } - else - { - /* Throw away the filler bytes before the start of the firmware */ - DiscardFillerBytes(DFU_FILLER_BYTES_SIZE); - - /* Throw away the packet alignment filler bytes before the start of the firmware */ - DiscardFillerBytes(StartAddr % FIXED_CONTROL_ENDPOINT_SIZE); - - /* Calculate the number of bytes remaining to be written */ - uint16_t BytesRemaining = ((EndAddr - StartAddr) + 1); - - if (IS_ONEBYTE_COMMAND(SentCommand.Data, 0x00)) // Write flash - { - /* Calculate the number of words to be written from the number of bytes to be written */ - uint16_t WordsRemaining = (BytesRemaining >> 1); - - union - { - uint16_t Words[2]; - uint32_t Long; - } CurrFlashAddress = {.Words = {StartAddr, Flash64KBPage}}; - - uint32_t CurrFlashPageStartAddress = CurrFlashAddress.Long; - uint8_t WordsInFlashPage = 0; - - while (WordsRemaining--) - { - /* Check if endpoint is empty - if so clear it and wait until ready for next packet */ - if (!(Endpoint_BytesInEndpoint())) - { - Endpoint_ClearOUT(); - - while (!(Endpoint_IsOUTReceived())) - { - if (USB_DeviceState == DEVICE_STATE_Unattached) - return; - } - } - - /* Write the next word into the current flash page */ - boot_page_fill(CurrFlashAddress.Long, Endpoint_Read_Word_LE()); - - /* Adjust counters */ - WordsInFlashPage += 1; - CurrFlashAddress.Long += 2; - - /* See if an entire page has been written to the flash page buffer */ - if ((WordsInFlashPage == (SPM_PAGESIZE >> 1)) || !(WordsRemaining)) - { - /* Commit the flash page to memory */ - boot_page_write(CurrFlashPageStartAddress); - boot_spm_busy_wait(); - - /* Check if programming incomplete */ - if (WordsRemaining) - { - CurrFlashPageStartAddress = CurrFlashAddress.Long; - WordsInFlashPage = 0; - - /* Erase next page's temp buffer */ - boot_page_erase(CurrFlashAddress.Long); - boot_spm_busy_wait(); - } - } - } - - /* Once programming complete, start address equals the end address */ - StartAddr = EndAddr; - - /* Re-enable the RWW section of flash */ - boot_rww_enable(); - } - else // Write EEPROM - { - while (BytesRemaining--) - { - /* Check if endpoint is empty - if so clear it and wait until ready for next packet */ - if (!(Endpoint_BytesInEndpoint())) - { - Endpoint_ClearOUT(); - - while (!(Endpoint_IsOUTReceived())) - { - if (USB_DeviceState == DEVICE_STATE_Unattached) - return; - } - } - - /* Read the byte from the USB interface and write to to the EEPROM */ - eeprom_write_byte((uint8_t*)StartAddr, Endpoint_Read_Byte()); - - /* Adjust counters */ - StartAddr++; - } - } - - /* Throw away the currently unused DFU file suffix */ - DiscardFillerBytes(DFU_FILE_SUFFIX_SIZE); - } - } - - Endpoint_ClearOUT(); - - Endpoint_ClearStatusStage(); - - break; - case DFU_UPLOAD: - Endpoint_ClearSETUP(); - - LEDs_TurnOnLEDs(LEDMASK_TX); - PulseMSRemaining.TxLEDPulse = TX_RX_LED_PULSE_MS; - - while (!(Endpoint_IsINReady())) - { - if (USB_DeviceState == DEVICE_STATE_Unattached) - return; - } - - if (DFU_State != dfuUPLOAD_IDLE) - { - if ((DFU_State == dfuERROR) && IS_ONEBYTE_COMMAND(SentCommand.Data, 0x01)) // Blank Check - { - /* Blank checking is performed in the DFU_DNLOAD request - if we get here we've told the host - that the memory isn't blank, and the host is requesting the first non-blank address */ - Endpoint_Write_Word_LE(StartAddr); - } - else - { - /* Idle state upload - send response to last issued command */ - Endpoint_Write_Byte(ResponseByte); - } - } - else - { - /* Determine the number of bytes remaining in the current block */ - uint16_t BytesRemaining = ((EndAddr - StartAddr) + 1); - - if (IS_ONEBYTE_COMMAND(SentCommand.Data, 0x00)) // Read FLASH - { - /* Calculate the number of words to be written from the number of bytes to be written */ - uint16_t WordsRemaining = (BytesRemaining >> 1); - - union - { - uint16_t Words[2]; - uint32_t Long; - } CurrFlashAddress = {.Words = {StartAddr, Flash64KBPage}}; - - while (WordsRemaining--) - { - /* Check if endpoint is full - if so clear it and wait until ready for next packet */ - if (Endpoint_BytesInEndpoint() == FIXED_CONTROL_ENDPOINT_SIZE) - { - Endpoint_ClearIN(); - - while (!(Endpoint_IsINReady())) - { - if (USB_DeviceState == DEVICE_STATE_Unattached) - return; - } - } - - /* Read the flash word and send it via USB to the host */ - #if (FLASHEND > 0xFFFF) - Endpoint_Write_Word_LE(pgm_read_word_far(CurrFlashAddress.Long)); - #else - Endpoint_Write_Word_LE(pgm_read_word(CurrFlashAddress.Long)); - #endif - - /* Adjust counters */ - CurrFlashAddress.Long += 2; - } - - /* Once reading is complete, start address equals the end address */ - StartAddr = EndAddr; - } - else if (IS_ONEBYTE_COMMAND(SentCommand.Data, 0x02)) // Read EEPROM - { - while (BytesRemaining--) - { - /* Check if endpoint is full - if so clear it and wait until ready for next packet */ - if (Endpoint_BytesInEndpoint() == FIXED_CONTROL_ENDPOINT_SIZE) - { - Endpoint_ClearIN(); - - while (!(Endpoint_IsINReady())) - { - if (USB_DeviceState == DEVICE_STATE_Unattached) - return; - } - } - - /* Read the EEPROM byte and send it via USB to the host */ - Endpoint_Write_Byte(eeprom_read_byte((uint8_t*)StartAddr)); - - /* Adjust counters */ - StartAddr++; - } - } - - /* Return to idle state */ - DFU_State = dfuIDLE; - } - - Endpoint_ClearIN(); - - Endpoint_ClearStatusStage(); - break; - case DFU_GETSTATUS: - Endpoint_ClearSETUP(); - - /* Write 8-bit status value */ - Endpoint_Write_Byte(DFU_Status); - - /* Write 24-bit poll timeout value */ - Endpoint_Write_Byte(0); - Endpoint_Write_Word_LE(0); - - /* Write 8-bit state value */ - Endpoint_Write_Byte(DFU_State); - - /* Write 8-bit state string ID number */ - Endpoint_Write_Byte(0); - - Endpoint_ClearIN(); - - Endpoint_ClearStatusStage(); - break; - case DFU_CLRSTATUS: - Endpoint_ClearSETUP(); - - /* Reset the status value variable to the default OK status */ - DFU_Status = OK; - - Endpoint_ClearStatusStage(); - break; - case DFU_GETSTATE: - Endpoint_ClearSETUP(); - - /* Write the current device state to the endpoint */ - Endpoint_Write_Byte(DFU_State); - - Endpoint_ClearIN(); - - Endpoint_ClearStatusStage(); - break; - case DFU_ABORT: - Endpoint_ClearSETUP(); - - /* Turn off TX/RX status LEDs so that they're not left on when application starts */ - LEDs_TurnOffLEDs(LEDMASK_TX); - LEDs_TurnOffLEDs(LEDMASK_RX); - - /* Reset the current state variable to the default idle state */ - DFU_State = dfuIDLE; - - Endpoint_ClearStatusStage(); - break; - } -} - -/** Routine to discard the specified number of bytes from the control endpoint stream. This is used to - * discard unused bytes in the stream from the host, including the memory program block suffix. - * - * \param[in] NumberOfBytes Number of bytes to discard from the host from the control endpoint - */ -static void DiscardFillerBytes(uint8_t NumberOfBytes) -{ - while (NumberOfBytes--) - { - if (!(Endpoint_BytesInEndpoint())) - { - Endpoint_ClearOUT(); - - /* Wait until next data packet received */ - while (!(Endpoint_IsOUTReceived())) - { - if (USB_DeviceState == DEVICE_STATE_Unattached) - return; - } - } - else - { - Endpoint_Discard_Byte(); - } - } -} - -/** Routine to process an issued command from the host, via a DFU_DNLOAD request wrapper. This routine ensures - * that the command is allowed based on the current secure mode flag value, and passes the command off to the - * appropriate handler function. - */ -static void ProcessBootloaderCommand(void) -{ - /* Check if device is in secure mode */ -// if (IsSecure) -// { -// /* Don't process command unless it is a READ or chip erase command */ -// if (!(((SentCommand.Command == COMMAND_WRITE) && -// IS_TWOBYTE_COMMAND(SentCommand.Data, 0x00, 0xFF)) || -// (SentCommand.Command == COMMAND_READ))) -// { -// /* Set the state and status variables to indicate the error */ -// DFU_State = dfuERROR; -// DFU_Status = errWRITE; -// -// /* Stall command */ -// Endpoint_StallTransaction(); -// -// /* Don't process the command */ -// return; -// } -// } - - /* Dispatch the required command processing routine based on the command type */ - switch (SentCommand.Command) - { - case COMMAND_PROG_START: - ProcessMemProgCommand(); - break; - case COMMAND_DISP_DATA: - ProcessMemReadCommand(); - break; - case COMMAND_WRITE: - ProcessWriteCommand(); - break; - case COMMAND_READ: - ProcessReadCommand(); - break; - case COMMAND_CHANGE_BASE_ADDR: - if (IS_TWOBYTE_COMMAND(SentCommand.Data, 0x03, 0x00)) // Set 64KB flash page command - Flash64KBPage = SentCommand.Data[2]; - break; - } -} - -/** Routine to concatenate the given pair of 16-bit memory start and end addresses from the host, and store them - * in the StartAddr and EndAddr global variables. - */ -static void LoadStartEndAddresses(void) -{ - union - { - uint8_t Bytes[2]; - uint16_t Word; - } Address[2] = {{.Bytes = {SentCommand.Data[2], SentCommand.Data[1]}}, - {.Bytes = {SentCommand.Data[4], SentCommand.Data[3]}}}; - - /* Load in the start and ending read addresses from the sent data packet */ - StartAddr = Address[0].Word; - EndAddr = Address[1].Word; -} - -/** Handler for a Memory Program command issued by the host. This routine handles the preparations needed - * to write subsequent data from the host into the specified memory. - */ -static void ProcessMemProgCommand(void) -{ - if (IS_ONEBYTE_COMMAND(SentCommand.Data, 0x00) || // Write FLASH command - IS_ONEBYTE_COMMAND(SentCommand.Data, 0x01)) // Write EEPROM command - { - /* Load in the start and ending read addresses */ - LoadStartEndAddresses(); - - /* If FLASH is being written to, we need to pre-erase the first page to write to */ - if (IS_ONEBYTE_COMMAND(SentCommand.Data, 0x00)) - { - union - { - uint16_t Words[2]; - uint32_t Long; - } CurrFlashAddress = {.Words = {StartAddr, Flash64KBPage}}; - - /* Erase the current page's temp buffer */ - boot_page_erase(CurrFlashAddress.Long); - boot_spm_busy_wait(); - } - - /* Set the state so that the next DNLOAD requests reads in the firmware */ - DFU_State = dfuDNLOAD_IDLE; - } -} - -/** Handler for a Memory Read command issued by the host. This routine handles the preparations needed - * to read subsequent data from the specified memory out to the host, as well as implementing the memory - * blank check command. - */ -static void ProcessMemReadCommand(void) -{ - if (IS_ONEBYTE_COMMAND(SentCommand.Data, 0x00) || // Read FLASH command - IS_ONEBYTE_COMMAND(SentCommand.Data, 0x02)) // Read EEPROM command - { - /* Load in the start and ending read addresses */ - LoadStartEndAddresses(); - - /* Set the state so that the next UPLOAD requests read out the firmware */ - DFU_State = dfuUPLOAD_IDLE; - } - else if (IS_ONEBYTE_COMMAND(SentCommand.Data, 0x01)) // Blank check FLASH command - { - uint32_t CurrFlashAddress = 0; - - while (CurrFlashAddress < BOOT_START_ADDR) - { - /* Check if the current byte is not blank */ - #if (FLASHEND > 0xFFFF) - if (pgm_read_byte_far(CurrFlashAddress) != 0xFF) - #else - if (pgm_read_byte(CurrFlashAddress) != 0xFF) - #endif - { - /* Save the location of the first non-blank byte for response back to the host */ - Flash64KBPage = (CurrFlashAddress >> 16); - StartAddr = CurrFlashAddress; - - /* Set state and status variables to the appropriate error values */ - DFU_State = dfuERROR; - DFU_Status = errCHECK_ERASED; - - break; - } - - CurrFlashAddress++; - } - } -} - -/** Handler for a Data Write command issued by the host. This routine handles non-programming commands such as - * bootloader exit (both via software jumps and hardware watchdog resets) and flash memory erasure. - */ -static void ProcessWriteCommand(void) -{ - if (IS_ONEBYTE_COMMAND(SentCommand.Data, 0x03)) // Start application - { - /* Indicate that the bootloader is terminating */ - WaitForExit = true; - - /* Check if data supplied for the Start Program command - no data executes the program */ - if (SentCommand.DataSize) - { - if (SentCommand.Data[1] == 0x01) // Start via jump - { - union - { - uint8_t Bytes[2]; - AppPtr_t FuncPtr; - } Address = {.Bytes = {SentCommand.Data[4], SentCommand.Data[3]}}; - - /* Load in the jump address into the application start address pointer */ - AppStartPtr = Address.FuncPtr; - } - } - else - { - if (SentCommand.Data[1] == 0x00) // Start via watchdog - { - /* Start the watchdog to reset the AVR once the communications are finalized */ - wdt_enable(WDTO_250MS); - } - else // Start via jump - { - /* Set the flag to terminate the bootloader at next opportunity */ - RunBootloader = false; - } - } - } - else if (IS_TWOBYTE_COMMAND(SentCommand.Data, 0x00, 0xFF)) // Erase flash - { - uint32_t CurrFlashAddress = 0; - - /* Clear the application section of flash */ - while (CurrFlashAddress < BOOT_START_ADDR) - { - boot_page_erase(CurrFlashAddress); - boot_spm_busy_wait(); - boot_page_write(CurrFlashAddress); - boot_spm_busy_wait(); - - CurrFlashAddress += SPM_PAGESIZE; - } - - /* Re-enable the RWW section of flash as writing to the flash locks it out */ - boot_rww_enable(); - - /* Memory has been erased, reset the security bit so that programming/reading is allowed */ -// IsSecure = false; - } -} - -/** Handler for a Data Read command issued by the host. This routine handles bootloader information retrieval - * commands such as device signature and bootloader version retrieval. - */ -static void ProcessReadCommand(void) -{ - const uint8_t BootloaderInfo[3] = {BOOTLOADER_VERSION, BOOTLOADER_ID_BYTE1, BOOTLOADER_ID_BYTE2}; - const uint8_t SignatureInfo[3] = {AVR_SIGNATURE_1, AVR_SIGNATURE_2, AVR_SIGNATURE_3}; - - uint8_t DataIndexToRead = SentCommand.Data[1]; - - if (IS_ONEBYTE_COMMAND(SentCommand.Data, 0x00)) // Read bootloader info - ResponseByte = BootloaderInfo[DataIndexToRead]; - else if (IS_ONEBYTE_COMMAND(SentCommand.Data, 0x01)) // Read signature byte - ResponseByte = SignatureInfo[DataIndexToRead - 0x30]; -} diff --git a/build/linux/work/hardware/arduino/firmwares/arduino-usbdfu/Arduino-usbdfu.h b/build/linux/work/hardware/arduino/firmwares/arduino-usbdfu/Arduino-usbdfu.h deleted file mode 100644 index 4fb236e64..000000000 --- a/build/linux/work/hardware/arduino/firmwares/arduino-usbdfu/Arduino-usbdfu.h +++ /dev/null @@ -1,220 +0,0 @@ -/* - LUFA Library - Copyright (C) Dean Camera, 2010. - - dean [at] fourwalledcubicle [dot] com - www.fourwalledcubicle.com -*/ - -/* - Copyright 2010 Dean Camera (dean [at] fourwalledcubicle [dot] com) - - Permission to use, copy, modify, distribute, and sell this - software and its documentation for any purpose is hereby granted - without fee, provided that the above copyright notice appear in - all copies and that both that the copyright notice and this - permission notice and warranty disclaimer appear in supporting - documentation, and that the name of the author not be used in - advertising or publicity pertaining to distribution of the - software without specific, written prior permission. - - The author disclaim all warranties with regard to this - software, including all implied warranties of merchantability - and fitness. In no event shall the author be liable for any - special, indirect or consequential damages or any damages - whatsoever resulting from loss of use, data or profits, whether - in an action of contract, negligence or other tortious action, - arising out of or in connection with the use or performance of - this software. -*/ - -/** \file - * - * Header file for Arduino-usbdfu.c. - */ - -#ifndef _ARDUINO_USB_DFU_BOOTLOADER_H_ -#define _ARDUINO_USB_DFU_BOOTLOADER_H_ - - /* Includes: */ - #include - #include - #include - #include - #include - #include - #include - #include - - #include "Descriptors.h" - - #include - #include - - /* Macros: */ - /** LED mask for the library LED driver, to indicate TX activity. */ - #define LEDMASK_TX LEDS_LED1 - - /** LED mask for the library LED driver, to indicate RX activity. */ - #define LEDMASK_RX LEDS_LED2 - - /** LED mask for the library LED driver, to indicate that an error has occurred in the USB interface. */ - #define LEDMASK_ERROR (LEDS_LED1 | LEDS_LED2) - - /** LED mask for the library LED driver, to indicate that the USB interface is busy. */ - #define LEDMASK_BUSY (LEDS_LED1 | LEDS_LED2) - - /** Configuration define. Define this token to true to case the bootloader to reject all memory commands - * until a memory erase has been performed. When used in conjunction with the lockbits of the AVR, this - * can protect the AVR's firmware from being dumped from a secured AVR. When false, memory operations are - * allowed at any time. - */ -// #define SECURE_MODE false - - /** Major bootloader version number. */ - #define BOOTLOADER_VERSION_MINOR 2 - - /** Minor bootloader version number. */ - #define BOOTLOADER_VERSION_REV 0 - - /** Complete bootloader version number expressed as a packed byte, constructed from the - * two individual bootloader version macros. - */ - #define BOOTLOADER_VERSION ((BOOTLOADER_VERSION_MINOR << 4) | BOOTLOADER_VERSION_REV) - - /** First byte of the bootloader identification bytes, used to identify a device's bootloader. */ - #define BOOTLOADER_ID_BYTE1 0xDC - - /** Second byte of the bootloader identification bytes, used to identify a device's bootloader. */ - #define BOOTLOADER_ID_BYTE2 0xFB - - /** Convenience macro, used to determine if the issued command is the given one-byte long command. - * - * \param[in] dataarr Command byte array to check against - * \param[in] cb1 First command byte to check - */ - #define IS_ONEBYTE_COMMAND(dataarr, cb1) (dataarr[0] == (cb1)) - - /** Convenience macro, used to determine if the issued command is the given two-byte long command. - * - * \param[in] dataarr Command byte array to check against - * \param[in] cb1 First command byte to check - * \param[in] cb2 Second command byte to check - */ - #define IS_TWOBYTE_COMMAND(dataarr, cb1, cb2) ((dataarr[0] == (cb1)) && (dataarr[1] == (cb2))) - - /** Length of the DFU file suffix block, appended to the end of each complete memory write command. - * The DFU file suffix is currently unused (but is designed to give extra file information, such as - * a CRC of the complete firmware for error checking) and so is discarded. - */ - #define DFU_FILE_SUFFIX_SIZE 16 - - /** Length of the DFU file filler block, appended to the start of each complete memory write command. - * Filler bytes are added to the start of each complete memory write command, and must be discarded. - */ - #define DFU_FILLER_BYTES_SIZE 26 - - /** DFU class command request to detach from the host. */ - #define DFU_DETATCH 0x00 - - /** DFU class command request to send data from the host to the bootloader. */ - #define DFU_DNLOAD 0x01 - - /** DFU class command request to send data from the bootloader to the host. */ - #define DFU_UPLOAD 0x02 - - /** DFU class command request to get the current DFU status and state from the bootloader. */ - #define DFU_GETSTATUS 0x03 - - /** DFU class command request to reset the current DFU status and state variables to their defaults. */ - #define DFU_CLRSTATUS 0x04 - - /** DFU class command request to get the current DFU state of the bootloader. */ - #define DFU_GETSTATE 0x05 - - /** DFU class command request to abort the current multi-request transfer and return to the dfuIDLE state. */ - #define DFU_ABORT 0x06 - - /** DFU command to begin programming the device's memory. */ - #define COMMAND_PROG_START 0x01 - - /** DFU command to begin reading the device's memory. */ - #define COMMAND_DISP_DATA 0x03 - - /** DFU command to issue a write command. */ - #define COMMAND_WRITE 0x04 - - /** DFU command to issue a read command. */ - #define COMMAND_READ 0x05 - - /** DFU command to issue a memory base address change command, to set the current 64KB flash page - * that subsequent flash operations should use. */ - #define COMMAND_CHANGE_BASE_ADDR 0x06 - - /* Type Defines: */ - /** Type define for a non-returning function pointer to the loaded application. */ - typedef void (*AppPtr_t)(void) ATTR_NO_RETURN; - - /** Type define for a structure containing a complete DFU command issued by the host. */ - typedef struct - { - uint8_t Command; /**< Single byte command to perform, one of the COMMAND_* macro values */ - uint8_t Data[5]; /**< Command parameters */ - uint16_t DataSize; /**< Size of the command parameters */ - } DFU_Command_t; - - /* Enums: */ - /** DFU bootloader states. Refer to the DFU class specification for information on each state. */ - enum DFU_State_t - { - appIDLE = 0, - appDETACH = 1, - dfuIDLE = 2, - dfuDNLOAD_SYNC = 3, - dfuDNBUSY = 4, - dfuDNLOAD_IDLE = 5, - dfuMANIFEST_SYNC = 6, - dfuMANIFEST = 7, - dfuMANIFEST_WAIT_RESET = 8, - dfuUPLOAD_IDLE = 9, - dfuERROR = 10 - }; - - /** DFU command status error codes. Refer to the DFU class specification for information on each error code. */ - enum DFU_Status_t - { - OK = 0, - errTARGET = 1, - errFILE = 2, - errWRITE = 3, - errERASE = 4, - errCHECK_ERASED = 5, - errPROG = 6, - errVERIFY = 7, - errADDRESS = 8, - errNOTDONE = 9, - errFIRMWARE = 10, - errVENDOR = 11, - errUSBR = 12, - errPOR = 13, - errUNKNOWN = 14, - errSTALLEDPKT = 15 - }; - - /* Function Prototypes: */ - void SetupHardware(void); - void ResetHardware(void); - - void EVENT_USB_Device_UnhandledControlRequest(void); - - #if defined(INCLUDE_FROM_BOOTLOADER_C) - static void DiscardFillerBytes(uint8_t NumberOfBytes); - static void ProcessBootloaderCommand(void); - static void LoadStartEndAddresses(void); - static void ProcessMemProgCommand(void); - static void ProcessMemReadCommand(void); - static void ProcessWriteCommand(void); - static void ProcessReadCommand(void); - #endif - -#endif /* _ARDUINO_USB_DFU_BOOTLOADER_H_ */ diff --git a/build/linux/work/hardware/arduino/firmwares/arduino-usbdfu/Board/LEDs.h b/build/linux/work/hardware/arduino/firmwares/arduino-usbdfu/Board/LEDs.h deleted file mode 100644 index 152e8f571..000000000 --- a/build/linux/work/hardware/arduino/firmwares/arduino-usbdfu/Board/LEDs.h +++ /dev/null @@ -1,110 +0,0 @@ -/* - LUFA Library - Copyright (C) Dean Camera, 2010. - - dean [at] fourwalledcubicle [dot] com - www.fourwalledcubicle.com -*/ - -/* - Copyright 2010 Dean Camera (dean [at] fourwalledcubicle [dot] com) - - Permission to use, copy, modify, distribute, and sell this - software and its documentation for any purpose is hereby granted - without fee, provided that the above copyright notice appear in - all copies and that both that the copyright notice and this - permission notice and warranty disclaimer appear in supporting - documentation, and that the name of the author not be used in - advertising or publicity pertaining to distribution of the - software without specific, written prior permission. - - The author disclaim all warranties with regard to this - software, including all implied warranties of merchantability - and fitness. In no event shall the author be liable for any - special, indirect or consequential damages or any damages - whatsoever resulting from loss of use, data or profits, whether - in an action of contract, negligence or other tortious action, - arising out of or in connection with the use or performance of - this software. -*/ - -/* - Board LEDs driver for the Benito board, from www.dorkbotpdx.org. -*/ - -#ifndef __LEDS_ARDUINOUNO_H__ -#define __LEDS_ARDUINOUNO_H__ - - /* Includes: */ - #include - -/* Enable C linkage for C++ Compilers: */ - #if defined(__cplusplus) - extern "C" { - #endif - - /* Preprocessor Checks: */ - #if !defined(INCLUDE_FROM_LEDS_H) - #error Do not include this file directly. Include LUFA/Drivers/Board/LEDS.h instead. - #endif - - /* Public Interface - May be used in end-application: */ - /* Macros: */ - /** LED mask for the first LED on the board. */ - #define LEDS_LED1 (1 << 5) - - /** LED mask for the second LED on the board. */ - #define LEDS_LED2 (1 << 4) - - /** LED mask for all the LEDs on the board. */ - #define LEDS_ALL_LEDS (LEDS_LED1 | LEDS_LED2) - - /** LED mask for the none of the board LEDs */ - #define LEDS_NO_LEDS 0 - - /* Inline Functions: */ - #if !defined(__DOXYGEN__) - static inline void LEDs_Init(void) - { - DDRD |= LEDS_ALL_LEDS; - PORTD |= LEDS_ALL_LEDS; - } - - static inline void LEDs_TurnOnLEDs(const uint8_t LEDMask) - { - PORTD &= ~LEDMask; - } - - static inline void LEDs_TurnOffLEDs(const uint8_t LEDMask) - { - PORTD |= LEDMask; - } - - static inline void LEDs_SetAllLEDs(const uint8_t LEDMask) - { - PORTD = ((PORTD | LEDS_ALL_LEDS) & ~LEDMask); - } - - static inline void LEDs_ChangeLEDs(const uint8_t LEDMask, const uint8_t ActiveMask) - { - PORTD = ((PORTD | ActiveMask) & ~LEDMask); - } - - static inline void LEDs_ToggleLEDs(const uint8_t LEDMask) - { - PORTD ^= LEDMask; - } - - static inline uint8_t LEDs_GetLEDs(void) ATTR_WARN_UNUSED_RESULT; - static inline uint8_t LEDs_GetLEDs(void) - { - return (PORTD & LEDS_ALL_LEDS); - } - #endif - - /* Disable C linkage for C++ Compilers: */ - #if defined(__cplusplus) - } - #endif - -#endif diff --git a/build/linux/work/hardware/arduino/firmwares/arduino-usbdfu/Descriptors.c b/build/linux/work/hardware/arduino/firmwares/arduino-usbdfu/Descriptors.c deleted file mode 100644 index 4deaa0625..000000000 --- a/build/linux/work/hardware/arduino/firmwares/arduino-usbdfu/Descriptors.c +++ /dev/null @@ -1,189 +0,0 @@ -/* - LUFA Library - Copyright (C) Dean Camera, 2010. - - dean [at] fourwalledcubicle [dot] com - www.fourwalledcubicle.com -*/ - -/* - Copyright 2010 Dean Camera (dean [at] fourwalledcubicle [dot] com) - - Permission to use, copy, modify, distribute, and sell this - software and its documentation for any purpose is hereby granted - without fee, provided that the above copyright notice appear in - all copies and that both that the copyright notice and this - permission notice and warranty disclaimer appear in supporting - documentation, and that the name of the author not be used in - advertising or publicity pertaining to distribution of the - software without specific, written prior permission. - - The author disclaim all warranties with regard to this - software, including all implied warranties of merchantability - and fitness. In no event shall the author be liable for any - special, indirect or consequential damages or any damages - whatsoever resulting from loss of use, data or profits, whether - in an action of contract, negligence or other tortious action, - arising out of or in connection with the use or performance of - this software. -*/ - -/** \file - * - * USB Device Descriptors, for library use when in USB device mode. Descriptors are special - * computer-readable structures which the host requests upon device enumeration, to determine - * the device's capabilities and functions. - */ - -#include "Descriptors.h" - -/** Device descriptor structure. This descriptor, located in FLASH memory, describes the overall - * device characteristics, including the supported USB version, control endpoint size and the - * number of device configurations. The descriptor is read out by the USB host when the enumeration - * process begins. - */ -USB_Descriptor_Device_t DeviceDescriptor = -{ - .Header = {.Size = sizeof(USB_Descriptor_Device_t), .Type = DTYPE_Device}, - - .USBSpecification = VERSION_BCD(01.10), - .Class = 0x00, - .SubClass = 0x00, - .Protocol = 0x00, - - .Endpoint0Size = FIXED_CONTROL_ENDPOINT_SIZE, - - .VendorID = 0x03EB, // Atmel - .ProductID = PRODUCT_ID_CODE, // MCU-dependent - .ReleaseNumber = 0x0000, - - .ManufacturerStrIndex = NO_DESCRIPTOR, - .ProductStrIndex = 0x01, - .SerialNumStrIndex = NO_DESCRIPTOR, - - .NumberOfConfigurations = FIXED_NUM_CONFIGURATIONS -}; - -/** Configuration descriptor structure. This descriptor, located in FLASH memory, describes the usage - * of the device in one of its supported configurations, including information about any device interfaces - * and endpoints. The descriptor is read out by the USB host during the enumeration process when selecting - * a configuration so that the host may correctly communicate with the USB device. - */ -USB_Descriptor_Configuration_t ConfigurationDescriptor = -{ - .Config = - { - .Header = {.Size = sizeof(USB_Descriptor_Configuration_Header_t), .Type = DTYPE_Configuration}, - - .TotalConfigurationSize = sizeof(USB_Descriptor_Configuration_t), - .TotalInterfaces = 1, - - .ConfigurationNumber = 1, - .ConfigurationStrIndex = NO_DESCRIPTOR, - - .ConfigAttributes = USB_CONFIG_ATTR_BUSPOWERED, - - .MaxPowerConsumption = USB_CONFIG_POWER_MA(100) - }, - - .DFU_Interface = - { - .Header = {.Size = sizeof(USB_Descriptor_Interface_t), .Type = DTYPE_Interface}, - - .InterfaceNumber = 0, - .AlternateSetting = 0, - - .TotalEndpoints = 0, - - .Class = 0xFE, - .SubClass = 0x01, - .Protocol = 0x02, - - .InterfaceStrIndex = NO_DESCRIPTOR - }, - - .DFU_Functional = - { - .Header = {.Size = sizeof(USB_DFU_Functional_Descriptor_t), .Type = DTYPE_DFUFunctional}, - - .Attributes = (ATTR_CAN_UPLOAD | ATTR_CAN_DOWNLOAD), - - .DetachTimeout = 0x0000, - .TransferSize = 0x0c00, - - .DFUSpecification = VERSION_BCD(01.01) - } -}; - -/** Language descriptor structure. This descriptor, located in FLASH memory, is returned when the host requests - * the string descriptor with index 0 (the first index). It is actually an array of 16-bit integers, which indicate - * via the language ID table available at USB.org what languages the device supports for its string descriptors. - */ -USB_Descriptor_String_t LanguageString = -{ - .Header = {.Size = USB_STRING_LEN(1), .Type = DTYPE_String}, - - .UnicodeString = {LANGUAGE_ID_ENG} -}; - -/** Product descriptor string. This is a Unicode string containing the product's details in human readable form, - * and is read out upon request by the host when the appropriate string ID is requested, listed in the Device - * Descriptor. - */ -USB_Descriptor_String_t ProductString = -{ - #if (ARDUINO_MODEL_PID == ARDUINO_UNO_PID) - .Header = {.Size = USB_STRING_LEN(15), .Type = DTYPE_String}, - - .UnicodeString = L"Arduino Uno DFU" - #elif (ARDUINO_MODEL_PID == ARDUINO_MEGA2560_PID) - .Header = {.Size = USB_STRING_LEN(21), .Type = DTYPE_String}, - - .UnicodeString = L"Arduino Mega 2560 DFU" - #endif -}; - -/** This function is called by the library when in device mode, and must be overridden (see library "USB Descriptors" - * documentation) by the application code so that the address and size of a requested descriptor can be given - * to the USB library. When the device receives a Get Descriptor request on the control endpoint, this function - * is called so that the descriptor details can be passed back and the appropriate descriptor sent back to the - * USB host. - */ -uint16_t CALLBACK_USB_GetDescriptor(const uint16_t wValue, - const uint8_t wIndex, - void** const DescriptorAddress) -{ - const uint8_t DescriptorType = (wValue >> 8); - const uint8_t DescriptorNumber = (wValue & 0xFF); - - void* Address = NULL; - uint16_t Size = NO_DESCRIPTOR; - - switch (DescriptorType) - { - case DTYPE_Device: - Address = &DeviceDescriptor; - Size = sizeof(USB_Descriptor_Device_t); - break; - case DTYPE_Configuration: - Address = &ConfigurationDescriptor; - Size = sizeof(USB_Descriptor_Configuration_t); - break; - case DTYPE_String: - if (!(DescriptorNumber)) - { - Address = &LanguageString; - Size = LanguageString.Header.Size; - } - else - { - Address = &ProductString; - Size = ProductString.Header.Size; - } - - break; - } - - *DescriptorAddress = Address; - return Size; -} diff --git a/build/linux/work/hardware/arduino/firmwares/arduino-usbdfu/Descriptors.h b/build/linux/work/hardware/arduino/firmwares/arduino-usbdfu/Descriptors.h deleted file mode 100644 index 6c93f20cd..000000000 --- a/build/linux/work/hardware/arduino/firmwares/arduino-usbdfu/Descriptors.h +++ /dev/null @@ -1,177 +0,0 @@ -/* - LUFA Library - Copyright (C) Dean Camera, 2010. - - dean [at] fourwalledcubicle [dot] com - www.fourwalledcubicle.com -*/ - -/* - Copyright 2010 Dean Camera (dean [at] fourwalledcubicle [dot] com) - - Permission to use, copy, modify, distribute, and sell this - software and its documentation for any purpose is hereby granted - without fee, provided that the above copyright notice appear in - all copies and that both that the copyright notice and this - permission notice and warranty disclaimer appear in supporting - documentation, and that the name of the author not be used in - advertising or publicity pertaining to distribution of the - software without specific, written prior permission. - - The author disclaim all warranties with regard to this - software, including all implied warranties of merchantability - and fitness. In no event shall the author be liable for any - special, indirect or consequential damages or any damages - whatsoever resulting from loss of use, data or profits, whether - in an action of contract, negligence or other tortious action, - arising out of or in connection with the use or performance of - this software. -*/ - -/** \file - * - * Header file for Descriptors.c. - */ - -#ifndef _DESCRIPTORS_H_ -#define _DESCRIPTORS_H_ - - /* Includes: */ - #include - - /* Product-specific definitions: */ - #define ARDUINO_UNO_PID 0x0001 - #define ARDUINO_MEGA2560_PID 0x0010 - - /* Macros: */ - /** Descriptor type value for a DFU class functional descriptor. */ - #define DTYPE_DFUFunctional 0x21 - - /** DFU attribute mask, indicating that the DFU device will detach and re-attach when a DFU_DETACH - * command is issued, rather than the host issuing a USB Reset. - */ - #define ATTR_WILL_DETATCH (1 << 3) - - /** DFU attribute mask, indicating that the DFU device can communicate during the manifestation phase - * (memory programming phase). - */ - #define ATTR_MANEFESTATION_TOLLERANT (1 << 2) - - /** DFU attribute mask, indicating that the DFU device can accept DFU_UPLOAD requests to send data from - * the device to the host. - */ - #define ATTR_CAN_UPLOAD (1 << 1) - - /** DFU attribute mask, indicating that the DFU device can accept DFU_DNLOAD requests to send data from - * the host to the device. - */ - #define ATTR_CAN_DOWNLOAD (1 << 0) - - #if defined(__AVR_AT90USB1287__) - #define PRODUCT_ID_CODE 0x2FFB - #define AVR_SIGNATURE_1 0x1E - #define AVR_SIGNATURE_2 0x97 - #define AVR_SIGNATURE_3 0x82 - #elif defined(__AVR_AT90USB1286__) - #define PRODUCT_ID_CODE 0x2FFB - #define AVR_SIGNATURE_1 0x1E - #define AVR_SIGNATURE_2 0x97 - #define AVR_SIGNATURE_3 0x82 - #elif defined(__AVR_AT90USB647__) - #define PRODUCT_ID_CODE 0x2FF9 - #define AVR_SIGNATURE_1 0x1E - #define AVR_SIGNATURE_2 0x96 - #define AVR_SIGNATURE_3 0x82 - #elif defined(__AVR_AT90USB646__) - #define PRODUCT_ID_CODE 0x2FF9 - #define AVR_SIGNATURE_1 0x1E - #define AVR_SIGNATURE_2 0x96 - #define AVR_SIGNATURE_3 0x82 - #elif defined(__AVR_ATmega32U6__) - #define PRODUCT_ID_CODE 0x2FFB - #define AVR_SIGNATURE_1 0x1E - #define AVR_SIGNATURE_2 0x95 - #define AVR_SIGNATURE_3 0x88 - #elif defined(__AVR_ATmega32U4__) - #define PRODUCT_ID_CODE 0x2FF4 - #define AVR_SIGNATURE_1 0x1E - #define AVR_SIGNATURE_2 0x95 - #define AVR_SIGNATURE_3 0x87 - #elif defined(__AVR_ATmega32U2__) - #define PRODUCT_ID_CODE 0x2FF0 - #define AVR_SIGNATURE_1 0x1E - #define AVR_SIGNATURE_2 0x95 - #define AVR_SIGNATURE_3 0x8A - #elif defined(__AVR_ATmega16U4__) - #define PRODUCT_ID_CODE 0x2FF3 - #define AVR_SIGNATURE_1 0x1E - #define AVR_SIGNATURE_2 0x94 - #define AVR_SIGNATURE_3 0x88 - #elif defined(__AVR_ATmega16U2__) - #define PRODUCT_ID_CODE 0x2FEF - #define AVR_SIGNATURE_1 0x1E - #define AVR_SIGNATURE_2 0x94 - #define AVR_SIGNATURE_3 0x89 - #elif defined(__AVR_AT90USB162__) - #define PRODUCT_ID_CODE 0x2FFA - #define AVR_SIGNATURE_1 0x1E - #define AVR_SIGNATURE_2 0x94 - #define AVR_SIGNATURE_3 0x82 - #elif defined(__AVR_AT90USB82__) - #define PRODUCT_ID_CODE 0x2FEE - #define AVR_SIGNATURE_1 0x1E - #define AVR_SIGNATURE_2 0x93 - #define AVR_SIGNATURE_3 0x89 - #elif defined(__AVR_ATmega8U2__) - #define PRODUCT_ID_CODE 0x2FF7 - #define AVR_SIGNATURE_1 0x1E - #define AVR_SIGNATURE_2 0x93 - #define AVR_SIGNATURE_3 0x82 - #else - #error The selected AVR part is not currently supported by this bootloader. - #endif - - #if !defined(PRODUCT_ID_CODE) - #error Current AVR model is not supported by this bootloader. - #endif - - /* Type Defines: */ - /** Type define for a DFU class function descriptor. This descriptor gives DFU class information - * to the host when read, indicating the DFU device's capabilities. - */ - typedef struct - { - USB_Descriptor_Header_t Header; /**< Standard descriptor header structure */ - - uint8_t Attributes; /**< DFU device attributes, a mask comprising of the - * ATTR_* macros listed in this source file - */ - uint16_t DetachTimeout; /**< Timeout in milliseconds between a USB_DETACH - * command being issued and the device detaching - * from the USB bus - */ - uint16_t TransferSize; /**< Maximum number of bytes the DFU device can accept - * from the host in a transaction - */ - uint16_t DFUSpecification; /**< BCD packed DFU specification number this DFU - * device complies with - */ - } USB_DFU_Functional_Descriptor_t; - - /** Type define for the device configuration descriptor structure. This must be defined in the - * application code, as the configuration descriptor contains several sub-descriptors which - * vary between devices, and which describe the device's usage to the host. - */ - typedef struct - { - USB_Descriptor_Configuration_Header_t Config; - USB_Descriptor_Interface_t DFU_Interface; - USB_DFU_Functional_Descriptor_t DFU_Functional; - } USB_Descriptor_Configuration_t; - - /* Function Prototypes: */ - uint16_t CALLBACK_USB_GetDescriptor(const uint16_t wValue, - const uint8_t wIndex, - void** const DescriptorAddress) ATTR_WARN_UNUSED_RESULT ATTR_NON_NULL_PTR_ARG(3); - -#endif diff --git a/build/linux/work/hardware/arduino/firmwares/arduino-usbdfu/makefile b/build/linux/work/hardware/arduino/firmwares/arduino-usbdfu/makefile deleted file mode 100644 index 1fb4ed346..000000000 --- a/build/linux/work/hardware/arduino/firmwares/arduino-usbdfu/makefile +++ /dev/null @@ -1,710 +0,0 @@ -# Hey Emacs, this is a -*- makefile -*- -#---------------------------------------------------------------------------- -# WinAVR Makefile Template written by Eric B. Weddington, Jrg Wunsch, et al. -# >> Modified for use with the LUFA project. << -# -# Released to the Public Domain -# -# Additional material for this makefile was written by: -# Peter Fleury -# Tim Henigan -# Colin O'Flynn -# Reiner Patommel -# Markus Pfaff -# Sander Pool -# Frederik Rouleau -# Carlos Lamas -# Dean Camera -# Opendous Inc. -# Denver Gingerich -# -#---------------------------------------------------------------------------- -# On command line: -# -# make all = Make software. -# -# make clean = Clean out built project files. -# -# make coff = Convert ELF to AVR COFF. -# -# make extcoff = Convert ELF to AVR Extended COFF. -# -# make program = Download the hex file to the device, using avrdude. -# Please customize the avrdude settings below first! -# -# make doxygen = Generate DoxyGen documentation for the project (must have -# DoxyGen installed) -# -# make debug = Start either simulavr or avarice as specified for debugging, -# with avr-gdb or avr-insight as the front end for debugging. -# -# make filename.s = Just compile filename.c into the assembler code only. -# -# make filename.i = Create a preprocessed source file for use in submitting -# bug reports to the GCC project. -# -# To rebuild project do "make clean" then "make all". -#---------------------------------------------------------------------------- - - -# MCU name -MCU = atmega8u2 -MCU_AVRDUDE = at90usb82 - -# Specify the Arduino model using the assigned PID. This is used by Descriptors.c -# to set the product descriptor string (for DFU we must use the PID for each -# chip that dfu-bootloader or Flip expect) -# Uno PID: -ARDUINO_MODEL_PID = 0x0001 -# Mega 2560 PID: -#ARDUINO_MODEL_PID = 0x0010 - -# Target board (see library "Board Types" documentation, NONE for projects not requiring -# LUFA board drivers). If USER is selected, put custom board drivers in a directory called -# "Board" inside the application directory. -BOARD = USER - - -# Processor frequency. -# This will define a symbol, F_CPU, in all source code files equal to the -# processor frequency in Hz. You can then use this symbol in your source code to -# calculate timings. Do NOT tack on a 'UL' at the end, this will be done -# automatically to create a 32-bit value in your source code. -# -# This will be an integer division of F_CLOCK below, as it is sourced by -# F_CLOCK after it has run through any CPU prescalers. Note that this value -# does not *change* the processor frequency - it should merely be updated to -# reflect the processor speed set externally so that the code can use accurate -# software delays. -F_CPU = 16000000 - - -# Input clock frequency. -# This will define a symbol, F_CLOCK, in all source code files equal to the -# input clock frequency (before any prescaling is performed) in Hz. This value may -# differ from F_CPU if prescaling is used on the latter, and is required as the -# raw input clock is fed directly to the PLL sections of the AVR for high speed -# clock generation for the USB and other AVR subsections. Do NOT tack on a 'UL' -# at the end, this will be done automatically to create a 32-bit value in your -# source code. -# -# If no clock division is performed on the input clock inside the AVR (via the -# CPU clock adjust registers or the clock division fuses), this will be equal to F_CPU. -F_CLOCK = $(F_CPU) - - -# Starting byte address of the bootloader, as a byte address - computed via the formula -# BOOT_START = ((TOTAL_FLASH_BYTES - BOOTLOADER_SECTION_SIZE_BYTES) * 1024) -# -# Note that the bootloader size and start address given in AVRStudio is in words and not -# bytes, and so will need to be doubled to obtain the byte address needed by AVR-GCC. -BOOT_START = 0x1000 - - -# Output format. (can be srec, ihex, binary) -FORMAT = ihex - - -# Target file name (without extension). -TARGET = Arduino-usbdfu - - -# Object files directory -# To put object files in current directory, use a dot (.), do NOT make -# this an empty or blank macro! -OBJDIR = . - - -# Path to the LUFA library -LUFA_PATH = ../.. - - -# LUFA library compile-time options and predefined tokens -LUFA_OPTS = -D USB_DEVICE_ONLY -LUFA_OPTS += -D DEVICE_STATE_AS_GPIOR=0 -LUFA_OPTS += -D CONTROL_ONLY_DEVICE -LUFA_OPTS += -D FIXED_CONTROL_ENDPOINT_SIZE=32 -LUFA_OPTS += -D FIXED_NUM_CONFIGURATIONS=1 -LUFA_OPTS += -D USE_RAM_DESCRIPTORS -LUFA_OPTS += -D USE_STATIC_OPTIONS="(USB_DEVICE_OPT_FULLSPEED | USB_OPT_REG_ENABLED | USB_OPT_AUTO_PLL)" -LUFA_OPTS += -D NO_INTERNAL_SERIAL -LUFA_OPTS += -D NO_DEVICE_SELF_POWER -LUFA_OPTS += -D NO_DEVICE_REMOTE_WAKEUP -LUFA_OPTS += -D NO_STREAM_CALLBACKS - - -# Create the LUFA source path variables by including the LUFA root makefile -include $(LUFA_PATH)/LUFA/makefile - - -# List C source files here. (C dependencies are automatically generated.) -SRC = $(TARGET).c \ - Descriptors.c \ - $(LUFA_SRC_USB) \ - - -# List C++ source files here. (C dependencies are automatically generated.) -CPPSRC = - - -# List Assembler source files here. -# Make them always end in a capital .S. Files ending in a lowercase .s -# will not be considered source files but generated files (assembler -# output from the compiler), and will be deleted upon "make clean"! -# Even though the DOS/Win* filesystem matches both .s and .S the same, -# it will preserve the spelling of the filenames, and gcc itself does -# care about how the name is spelled on its command-line. -ASRC = - - -# Optimization level, can be [0, 1, 2, 3, s]. -# 0 = turn off optimization. s = optimize for size. -# (Note: 3 is not always the best optimization level. See avr-libc FAQ.) -OPT = s - - -# Debugging format. -# Native formats for AVR-GCC's -g are dwarf-2 [default] or stabs. -# AVR Studio 4.10 requires dwarf-2. -# AVR [Extended] COFF format requires stabs, plus an avr-objcopy run. -DEBUG = dwarf-2 - - -# List any extra directories to look for include files here. -# Each directory must be seperated by a space. -# Use forward slashes for directory separators. -# For a directory that has spaces, enclose it in quotes. -EXTRAINCDIRS = $(LUFA_PATH)/ - - -# Compiler flag to set the C Standard level. -# c89 = "ANSI" C -# gnu89 = c89 plus GCC extensions -# c99 = ISO C99 standard (not yet fully implemented) -# gnu99 = c99 plus GCC extensions -CSTANDARD = -std=c99 - - -# Place -D or -U options here for C sources -CDEFS = -DF_CPU=$(F_CPU)UL -CDEFS += -DARDUINO_MODEL_PID=$(ARDUINO_MODEL_PID) -CDEFS += -DF_CLOCK=$(F_CLOCK)UL -CDEFS += -DBOARD=BOARD_$(BOARD) -CDEFS += -DBOOT_START_ADDR=$(BOOT_START)UL -CDEFS += -DTX_RX_LED_PULSE_MS=3 -CDEFS += $(LUFA_OPTS) - - -# Place -D or -U options here for ASM sources -ADEFS = -DF_CPU=$(F_CPU) -ADEFS += -DF_CLOCK=$(F_CLOCK)UL -ADEFS += -DBOARD=BOARD_$(BOARD) -CDEFS += -DBOOT_START_ADDR=$(BOOT_START)UL -ADEFS += $(LUFA_OPTS) - -# Place -D or -U options here for C++ sources -CPPDEFS = -DF_CPU=$(F_CPU)UL -CPPDEFS += -DF_CLOCK=$(F_CLOCK)UL -CPPDEFS += -DBOARD=BOARD_$(BOARD) -CDEFS += -DBOOT_START_ADDR=$(BOOT_START)UL -CPPDEFS += $(LUFA_OPTS) -#CPPDEFS += -D__STDC_LIMIT_MACROS -#CPPDEFS += -D__STDC_CONSTANT_MACROS - - - -#---------------- Compiler Options C ---------------- -# -g*: generate debugging information -# -O*: optimization level -# -f...: tuning, see GCC manual and avr-libc documentation -# -Wall...: warning level -# -Wa,...: tell GCC to pass this to the assembler. -# -adhlns...: create assembler listing -CFLAGS = -g$(DEBUG) -CFLAGS += $(CDEFS) -CFLAGS += -O$(OPT) -CFLAGS += -funsigned-char -CFLAGS += -funsigned-bitfields -CFLAGS += -ffunction-sections -CFLAGS += -fno-inline-small-functions -CFLAGS += -fpack-struct -CFLAGS += -fshort-enums -CFLAGS += -fno-strict-aliasing -CFLAGS += -Wall -CFLAGS += -Wstrict-prototypes -#CFLAGS += -mshort-calls -#CFLAGS += -fno-unit-at-a-time -#CFLAGS += -Wundef -#CFLAGS += -Wunreachable-code -#CFLAGS += -Wsign-compare -CFLAGS += -Wa,-adhlns=$(<:%.c=$(OBJDIR)/%.lst) -CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS)) -CFLAGS += $(CSTANDARD) - - -#---------------- Compiler Options C++ ---------------- -# -g*: generate debugging information -# -O*: optimization level -# -f...: tuning, see GCC manual and avr-libc documentation -# -Wall...: warning level -# -Wa,...: tell GCC to pass this to the assembler. -# -adhlns...: create assembler listing -CPPFLAGS = -g$(DEBUG) -CPPFLAGS += $(CPPDEFS) -CPPFLAGS += -O$(OPT) -CPPFLAGS += -funsigned-char -CPPFLAGS += -funsigned-bitfields -CPPFLAGS += -fpack-struct -CPPFLAGS += -fshort-enums -CPPFLAGS += -fno-exceptions -CPPFLAGS += -Wall -CPPFLAGS += -Wundef -#CPPFLAGS += -mshort-calls -#CPPFLAGS += -fno-unit-at-a-time -#CPPFLAGS += -Wstrict-prototypes -#CPPFLAGS += -Wunreachable-code -#CPPFLAGS += -Wsign-compare -CPPFLAGS += -Wa,-adhlns=$(<:%.cpp=$(OBJDIR)/%.lst) -CPPFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS)) -#CPPFLAGS += $(CSTANDARD) - - -#---------------- Assembler Options ---------------- -# -Wa,...: tell GCC to pass this to the assembler. -# -adhlns: create listing -# -gstabs: have the assembler create line number information; note that -# for use in COFF files, additional information about filenames -# and function names needs to be present in the assembler source -# files -- see avr-libc docs [FIXME: not yet described there] -# -listing-cont-lines: Sets the maximum number of continuation lines of hex -# dump that will be displayed for a given single line of source input. -ASFLAGS = $(ADEFS) -Wa,-adhlns=$(<:%.S=$(OBJDIR)/%.lst),-gstabs,--listing-cont-lines=100 - - -#---------------- Library Options ---------------- -# Minimalistic printf version -PRINTF_LIB_MIN = -Wl,-u,vfprintf -lprintf_min - -# Floating point printf version (requires MATH_LIB = -lm below) -PRINTF_LIB_FLOAT = -Wl,-u,vfprintf -lprintf_flt - -# If this is left blank, then it will use the Standard printf version. -PRINTF_LIB = -#PRINTF_LIB = $(PRINTF_LIB_MIN) -#PRINTF_LIB = $(PRINTF_LIB_FLOAT) - - -# Minimalistic scanf version -SCANF_LIB_MIN = -Wl,-u,vfscanf -lscanf_min - -# Floating point + %[ scanf version (requires MATH_LIB = -lm below) -SCANF_LIB_FLOAT = -Wl,-u,vfscanf -lscanf_flt - -# If this is left blank, then it will use the Standard scanf version. -SCANF_LIB = -#SCANF_LIB = $(SCANF_LIB_MIN) -#SCANF_LIB = $(SCANF_LIB_FLOAT) - - -MATH_LIB = -lm - - -# List any extra directories to look for libraries here. -# Each directory must be seperated by a space. -# Use forward slashes for directory separators. -# For a directory that has spaces, enclose it in quotes. -EXTRALIBDIRS = - - - -#---------------- External Memory Options ---------------- - -# 64 KB of external RAM, starting after internal RAM (ATmega128!), -# used for variables (.data/.bss) and heap (malloc()). -#EXTMEMOPTS = -Wl,-Tdata=0x801100,--defsym=__heap_end=0x80ffff - -# 64 KB of external RAM, starting after internal RAM (ATmega128!), -# only used for heap (malloc()). -#EXTMEMOPTS = -Wl,--section-start,.data=0x801100,--defsym=__heap_end=0x80ffff - -EXTMEMOPTS = - - - -#---------------- Linker Options ---------------- -# -Wl,...: tell GCC to pass this to linker. -# -Map: create map file -# --cref: add cross reference to map file -LDFLAGS = -Wl,-Map=$(TARGET).map,--cref -LDFLAGS += -Wl,--section-start=.text=$(BOOT_START) -LDFLAGS += -Wl,--relax -LDFLAGS += -Wl,--gc-sections -LDFLAGS += $(EXTMEMOPTS) -LDFLAGS += $(patsubst %,-L%,$(EXTRALIBDIRS)) -LDFLAGS += $(PRINTF_LIB) $(SCANF_LIB) $(MATH_LIB) -#LDFLAGS += -T linker_script.x - - - -#---------------- Programming Options (avrdude) ---------------- - -# Fuse settings for Arduino Uno DFU bootloader project -AVRDUDE_FUSES = -U efuse:w:0xF4:m -U hfuse:w:0xD9:m -U lfuse:w:0xFF:m - -# Lock settings for Arduino Uno DFU bootloader project -AVRDUDE_LOCK = -U lock:w:0x0F:m - -# Programming hardware -# Type: avrdude -c ? -# to get a full listing. -# -AVRDUDE_PROGRAMMER = avrispmkii - -# com1 = serial port. Use lpt1 to connect to parallel port. -AVRDUDE_PORT = usb - -AVRDUDE_WRITE_FLASH = -U flash:w:$(TARGET).hex -#AVRDUDE_WRITE_EEPROM = -U eeprom:w:$(TARGET).eep - -# Uncomment the following if you want avrdude's erase cycle counter. -# Note that this counter needs to be initialized first using -Yn, -# see avrdude manual. -#AVRDUDE_ERASE_COUNTER = -y - -# Uncomment the following if you do /not/ wish a verification to be -# performed after programming the device. -#AVRDUDE_NO_VERIFY = -V - -# Increase verbosity level. Please use this when submitting bug -# reports about avrdude. See -# to submit bug reports. -#AVRDUDE_VERBOSE = -v -v - -AVRDUDE_FLAGS = -p $(MCU_AVRDUDE) -F -P $(AVRDUDE_PORT) -c $(AVRDUDE_PROGRAMMER) -AVRDUDE_FLAGS += $(AVRDUDE_NO_VERIFY) -AVRDUDE_FLAGS += $(AVRDUDE_VERBOSE) -AVRDUDE_FLAGS += $(AVRDUDE_ERASE_COUNTER) - - - -#---------------- Debugging Options ---------------- - -# For simulavr only - target MCU frequency. -DEBUG_MFREQ = $(F_CPU) - -# Set the DEBUG_UI to either gdb or insight. -# DEBUG_UI = gdb -DEBUG_UI = insight - -# Set the debugging back-end to either avarice, simulavr. -DEBUG_BACKEND = avarice -#DEBUG_BACKEND = simulavr - -# GDB Init Filename. -GDBINIT_FILE = __avr_gdbinit - -# When using avarice settings for the JTAG -JTAG_DEV = /dev/com1 - -# Debugging port used to communicate between GDB / avarice / simulavr. -DEBUG_PORT = 4242 - -# Debugging host used to communicate between GDB / avarice / simulavr, normally -# just set to localhost unless doing some sort of crazy debugging when -# avarice is running on a different computer. -DEBUG_HOST = localhost - - - -#============================================================================ - - -# Define programs and commands. -SHELL = sh -CC = avr-gcc -OBJCOPY = avr-objcopy -OBJDUMP = avr-objdump -SIZE = avr-size -AR = avr-ar rcs -NM = avr-nm -AVRDUDE = avrdude -REMOVE = rm -f -REMOVEDIR = rm -rf -COPY = cp -WINSHELL = cmd - - -# Define Messages -# English -MSG_ERRORS_NONE = Errors: none -MSG_BEGIN = -------- begin -------- -MSG_END = -------- end -------- -MSG_SIZE_BEFORE = Size before: -MSG_SIZE_AFTER = Size after: -MSG_COFF = Converting to AVR COFF: -MSG_EXTENDED_COFF = Converting to AVR Extended COFF: -MSG_FLASH = Creating load file for Flash: -MSG_EEPROM = Creating load file for EEPROM: -MSG_EXTENDED_LISTING = Creating Extended Listing: -MSG_SYMBOL_TABLE = Creating Symbol Table: -MSG_LINKING = Linking: -MSG_COMPILING = Compiling C: -MSG_COMPILING_CPP = Compiling C++: -MSG_ASSEMBLING = Assembling: -MSG_CLEANING = Cleaning project: -MSG_CREATING_LIBRARY = Creating library: - - - - -# Define all object files. -OBJ = $(SRC:%.c=$(OBJDIR)/%.o) $(CPPSRC:%.cpp=$(OBJDIR)/%.o) $(ASRC:%.S=$(OBJDIR)/%.o) - -# Define all listing files. -LST = $(SRC:%.c=$(OBJDIR)/%.lst) $(CPPSRC:%.cpp=$(OBJDIR)/%.lst) $(ASRC:%.S=$(OBJDIR)/%.lst) - - -# Compiler flags to generate dependency files. -GENDEPFLAGS = -MMD -MP -MF .dep/$(@F).d - - -# Combine all necessary flags and optional flags. -# Add target processor to flags. -ALL_CFLAGS = -mmcu=$(MCU) -I. $(CFLAGS) $(GENDEPFLAGS) -ALL_CPPFLAGS = -mmcu=$(MCU) -I. -x c++ $(CPPFLAGS) $(GENDEPFLAGS) -ALL_ASFLAGS = -mmcu=$(MCU) -I. -x assembler-with-cpp $(ASFLAGS) - - - - - -# Default target. -all: begin gccversion sizebefore build sizeafter end - -# Change the build target to build a HEX file or a library. -build: elf hex eep lss sym -#build: lib - - -elf: $(TARGET).elf -hex: $(TARGET).hex -eep: $(TARGET).eep -lss: $(TARGET).lss -sym: $(TARGET).sym -LIBNAME=lib$(TARGET).a -lib: $(LIBNAME) - - - -# Eye candy. -# AVR Studio 3.x does not check make's exit code but relies on -# the following magic strings to be generated by the compile job. -begin: - @echo - @echo $(MSG_BEGIN) - -end: - @echo $(MSG_END) - @echo - - -# Display size of file. -HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex -ELFSIZE = $(SIZE) $(MCU_FLAG) $(FORMAT_FLAG) $(TARGET).elf -MCU_FLAG = $(shell $(SIZE) --help | grep -- --mcu > /dev/null && echo --mcu=$(MCU) ) -FORMAT_FLAG = $(shell $(SIZE) --help | grep -- --format=.*avr > /dev/null && echo --format=avr ) - - -sizebefore: - @if test -f $(TARGET).elf; then echo; echo $(MSG_SIZE_BEFORE); $(ELFSIZE); \ - 2>/dev/null; echo; fi - -sizeafter: - @if test -f $(TARGET).elf; then echo; echo $(MSG_SIZE_AFTER); $(ELFSIZE); \ - 2>/dev/null; echo; fi - - - -# Display compiler version information. -gccversion : - @$(CC) --version - - -# Program the device. -program: $(TARGET).hex $(TARGET).eep - $(AVRDUDE) $(AVRDUDE_FLAGS) $(AVRDUDE_WRITE_FLASH) $(AVRDUDE_WRITE_EEPROM) $(AVRDUDE_FUSES) $(AVRDUDE_LOCK) - - -# Generate avr-gdb config/init file which does the following: -# define the reset signal, load the target file, connect to target, and set -# a breakpoint at main(). -gdb-config: - @$(REMOVE) $(GDBINIT_FILE) - @echo define reset >> $(GDBINIT_FILE) - @echo SIGNAL SIGHUP >> $(GDBINIT_FILE) - @echo end >> $(GDBINIT_FILE) - @echo file $(TARGET).elf >> $(GDBINIT_FILE) - @echo target remote $(DEBUG_HOST):$(DEBUG_PORT) >> $(GDBINIT_FILE) -ifeq ($(DEBUG_BACKEND),simulavr) - @echo load >> $(GDBINIT_FILE) -endif - @echo break main >> $(GDBINIT_FILE) - -debug: gdb-config $(TARGET).elf -ifeq ($(DEBUG_BACKEND), avarice) - @echo Starting AVaRICE - Press enter when "waiting to connect" message displays. - @$(WINSHELL) /c start avarice --jtag $(JTAG_DEV) --erase --program --file \ - $(TARGET).elf $(DEBUG_HOST):$(DEBUG_PORT) - @$(WINSHELL) /c pause - -else - @$(WINSHELL) /c start simulavr --gdbserver --device $(MCU) --clock-freq \ - $(DEBUG_MFREQ) --port $(DEBUG_PORT) -endif - @$(WINSHELL) /c start avr-$(DEBUG_UI) --command=$(GDBINIT_FILE) - - - - -# Convert ELF to COFF for use in debugging / simulating in AVR Studio or VMLAB. -COFFCONVERT = $(OBJCOPY) --debugging -COFFCONVERT += --change-section-address .data-0x800000 -COFFCONVERT += --change-section-address .bss-0x800000 -COFFCONVERT += --change-section-address .noinit-0x800000 -COFFCONVERT += --change-section-address .eeprom-0x810000 - - - -coff: $(TARGET).elf - @echo - @echo $(MSG_COFF) $(TARGET).cof - $(COFFCONVERT) -O coff-avr $< $(TARGET).cof - - -extcoff: $(TARGET).elf - @echo - @echo $(MSG_EXTENDED_COFF) $(TARGET).cof - $(COFFCONVERT) -O coff-ext-avr $< $(TARGET).cof - - - -# Create final output files (.hex, .eep) from ELF output file. -%.hex: %.elf - @echo - @echo $(MSG_FLASH) $@ - $(OBJCOPY) -O $(FORMAT) -R .eeprom -R .fuse -R .lock $< $@ - -%.eep: %.elf - @echo - @echo $(MSG_EEPROM) $@ - -$(OBJCOPY) -j .eeprom --set-section-flags=.eeprom="alloc,load" \ - --change-section-lma .eeprom=0 --no-change-warnings -O $(FORMAT) $< $@ || exit 0 - -# Create extended listing file from ELF output file. -%.lss: %.elf - @echo - @echo $(MSG_EXTENDED_LISTING) $@ - $(OBJDUMP) -h -S -z $< > $@ - -# Create a symbol table from ELF output file. -%.sym: %.elf - @echo - @echo $(MSG_SYMBOL_TABLE) $@ - $(NM) -n $< > $@ - - - -# Create library from object files. -.SECONDARY : $(TARGET).a -.PRECIOUS : $(OBJ) -%.a: $(OBJ) - @echo - @echo $(MSG_CREATING_LIBRARY) $@ - $(AR) $@ $(OBJ) - - -# Link: create ELF output file from object files. -.SECONDARY : $(TARGET).elf -.PRECIOUS : $(OBJ) -%.elf: $(OBJ) - @echo - @echo $(MSG_LINKING) $@ - $(CC) $(ALL_CFLAGS) $^ --output $@ $(LDFLAGS) - - -# Compile: create object files from C source files. -$(OBJDIR)/%.o : %.c - @echo - @echo $(MSG_COMPILING) $< - $(CC) -c $(ALL_CFLAGS) $< -o $@ - - -# Compile: create object files from C++ source files. -$(OBJDIR)/%.o : %.cpp - @echo - @echo $(MSG_COMPILING_CPP) $< - $(CC) -c $(ALL_CPPFLAGS) $< -o $@ - - -# Compile: create assembler files from C source files. -%.s : %.c - $(CC) -S $(ALL_CFLAGS) $< -o $@ - - -# Compile: create assembler files from C++ source files. -%.s : %.cpp - $(CC) -S $(ALL_CPPFLAGS) $< -o $@ - - -# Assemble: create object files from assembler source files. -$(OBJDIR)/%.o : %.S - @echo - @echo $(MSG_ASSEMBLING) $< - $(CC) -c $(ALL_ASFLAGS) $< -o $@ - - -# Create preprocessed source for use in sending a bug report. -%.i : %.c - $(CC) -E -mmcu=$(MCU) -I. $(CFLAGS) $< -o $@ - - -# Target: clean project. -clean: begin clean_list end - -clean_list : - @echo - @echo $(MSG_CLEANING) - $(REMOVE) $(TARGET).hex - $(REMOVE) $(TARGET).eep - $(REMOVE) $(TARGET).cof - $(REMOVE) $(TARGET).elf - $(REMOVE) $(TARGET).map - $(REMOVE) $(TARGET).sym - $(REMOVE) $(TARGET).lss - $(REMOVE) $(SRC:%.c=$(OBJDIR)/%.o) - $(REMOVE) $(SRC:%.c=$(OBJDIR)/%.lst) - $(REMOVE) $(SRC:.c=.s) - $(REMOVE) $(SRC:.c=.d) - $(REMOVE) $(SRC:.c=.i) - $(REMOVEDIR) .dep - -doxygen: - @echo Generating Project Documentation... - @doxygen Doxygen.conf - @echo Documentation Generation Complete. - -clean_doxygen: - rm -rf Documentation - -# Create object files directory -$(shell mkdir $(OBJDIR) 2>/dev/null) - - -# Include the dependency files. --include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*) - - -# Listing of phony targets. -.PHONY : all begin finish end sizebefore sizeafter gccversion \ -build elf hex eep lss sym coff extcoff doxygen clean \ -clean_list clean_doxygen program debug gdb-config diff --git a/build/linux/work/hardware/arduino/firmwares/arduino-usbdfu/readme.txt b/build/linux/work/hardware/arduino/firmwares/arduino-usbdfu/readme.txt deleted file mode 100644 index e376679c2..000000000 --- a/build/linux/work/hardware/arduino/firmwares/arduino-usbdfu/readme.txt +++ /dev/null @@ -1,7 +0,0 @@ -To setup the project and program an ATMEG8U2 with the Arduino USB DFU bootloader: -1. unpack the source into LUFA's Bootloader directory -2. set ARDUINO_MODEL_PID in the makefile as appropriate -3. do "make clean; make; make program" - -Check that the board enumerates as either "Arduino Uno DFU" or "Arduino Mega 2560 DFU". Test by uploading the Arduino-usbserial application firmware (see instructions in Arduino-usbserial directory) - diff --git a/build/linux/work/hardware/arduino/firmwares/arduino-usbserial/Arduino-usbserial-atmega16u2-Mega2560-Rev3.hex b/build/linux/work/hardware/arduino/firmwares/arduino-usbserial/Arduino-usbserial-atmega16u2-Mega2560-Rev3.hex deleted file mode 100644 index efbbf15db..000000000 --- a/build/linux/work/hardware/arduino/firmwares/arduino-usbserial/Arduino-usbserial-atmega16u2-Mega2560-Rev3.hex +++ /dev/null @@ -1,254 +0,0 @@ -:1000000090C00000A9C00000A7C00000A5C000006B -:10001000A3C00000A1C000009FC000009DC0000060 -:100020009BC0000099C0000097C0000048C40000B9 -:100030000CC4000091C000008FC000008DC0000003 -:100040008BC0000089C0000087C0000085C0000090 -:1000500083C0000081C000007FC0000002C100001A -:100060007BC0000079C0000077C0000075C00000B0 -:1000700073C0000071C000006FC000006DC00000C0 -:100080006BC0000069C0000067C0000065C00000D0 -:1000900063C0000061C000001201100102000008EE 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b/build/linux/work/hardware/arduino/firmwares/arduino-usbserial/Arduino-usbserial.c deleted file mode 100644 index 4de73c8a4..000000000 --- a/build/linux/work/hardware/arduino/firmwares/arduino-usbserial/Arduino-usbserial.c +++ /dev/null @@ -1,242 +0,0 @@ -/* - LUFA Library - Copyright (C) Dean Camera, 2010. - - dean [at] fourwalledcubicle [dot] com - www.fourwalledcubicle.com -*/ - -/* - Copyright 2010 Dean Camera (dean [at] fourwalledcubicle [dot] com) - - Permission to use, copy, modify, distribute, and sell this - software and its documentation for any purpose is hereby granted - without fee, provided that the above copyright notice appear in - all copies and that both that the copyright notice and this - permission notice and warranty disclaimer appear in supporting - documentation, and that the name of the author not be used in - advertising or publicity pertaining to distribution of the - software without specific, written prior permission. - - The author disclaim all warranties with regard to this - software, including all implied warranties of merchantability - and fitness. In no event shall the author be liable for any - special, indirect or consequential damages or any damages - whatsoever resulting from loss of use, data or profits, whether - in an action of contract, negligence or other tortious action, - arising out of or in connection with the use or performance of - this software. -*/ - -/** \file - * - * Main source file for the Arduino-usbserial project. This file contains the main tasks of - * the project and is responsible for the initial application hardware configuration. - */ - -#include "Arduino-usbserial.h" - -/** Circular buffer to hold data from the host before it is sent to the device via the serial port. */ -RingBuff_t USBtoUSART_Buffer; - -/** Circular buffer to hold data from the serial port before it is sent to the host. */ -RingBuff_t USARTtoUSB_Buffer; - -/** Pulse generation counters to keep track of the number of milliseconds remaining for each pulse type */ -volatile struct -{ - uint8_t TxLEDPulse; /**< Milliseconds remaining for data Tx LED pulse */ - uint8_t RxLEDPulse; /**< Milliseconds remaining for data Rx LED pulse */ - uint8_t PingPongLEDPulse; /**< Milliseconds remaining for enumeration Tx/Rx ping-pong LED pulse */ -} PulseMSRemaining; - -/** LUFA CDC Class driver interface configuration and state information. This structure is - * passed to all CDC Class driver functions, so that multiple instances of the same class - * within a device can be differentiated from one another. - */ -USB_ClassInfo_CDC_Device_t VirtualSerial_CDC_Interface = - { - .Config = - { - .ControlInterfaceNumber = 0, - - .DataINEndpointNumber = CDC_TX_EPNUM, - .DataINEndpointSize = CDC_TXRX_EPSIZE, - .DataINEndpointDoubleBank = false, - - .DataOUTEndpointNumber = CDC_RX_EPNUM, - .DataOUTEndpointSize = CDC_TXRX_EPSIZE, - .DataOUTEndpointDoubleBank = false, - - .NotificationEndpointNumber = CDC_NOTIFICATION_EPNUM, - .NotificationEndpointSize = CDC_NOTIFICATION_EPSIZE, - .NotificationEndpointDoubleBank = false, - }, - }; - -/** Main program entry point. This routine contains the overall program flow, including initial - * setup of all components and the main program loop. - */ -int main(void) -{ - SetupHardware(); - - RingBuffer_InitBuffer(&USBtoUSART_Buffer); - RingBuffer_InitBuffer(&USARTtoUSB_Buffer); - - sei(); - - for (;;) - { - /* Only try to read in bytes from the CDC interface if the transmit buffer is not full */ - if (!(RingBuffer_IsFull(&USBtoUSART_Buffer))) - { - int16_t ReceivedByte = CDC_Device_ReceiveByte(&VirtualSerial_CDC_Interface); - - /* Read bytes from the USB OUT endpoint into the USART transmit buffer */ - if (!(ReceivedByte < 0)) - RingBuffer_Insert(&USBtoUSART_Buffer, ReceivedByte); - } - - /* Check if the UART receive buffer flush timer has expired or the buffer is nearly full */ - RingBuff_Count_t BufferCount = RingBuffer_GetCount(&USARTtoUSB_Buffer); - if ((TIFR0 & (1 << TOV0)) || (BufferCount > BUFFER_NEARLY_FULL)) - { - TIFR0 |= (1 << TOV0); - - if (USARTtoUSB_Buffer.Count) { - LEDs_TurnOnLEDs(LEDMASK_TX); - PulseMSRemaining.TxLEDPulse = TX_RX_LED_PULSE_MS; - } - - /* Read bytes from the USART receive buffer into the USB IN endpoint */ - while (BufferCount--) - CDC_Device_SendByte(&VirtualSerial_CDC_Interface, RingBuffer_Remove(&USARTtoUSB_Buffer)); - - /* Turn off TX LED(s) once the TX pulse period has elapsed */ - if (PulseMSRemaining.TxLEDPulse && !(--PulseMSRemaining.TxLEDPulse)) - LEDs_TurnOffLEDs(LEDMASK_TX); - - /* Turn off RX LED(s) once the RX pulse period has elapsed */ - if (PulseMSRemaining.RxLEDPulse && !(--PulseMSRemaining.RxLEDPulse)) - LEDs_TurnOffLEDs(LEDMASK_RX); - } - - /* Load the next byte from the USART transmit buffer into the USART */ - if (!(RingBuffer_IsEmpty(&USBtoUSART_Buffer))) { - Serial_TxByte(RingBuffer_Remove(&USBtoUSART_Buffer)); - - LEDs_TurnOnLEDs(LEDMASK_RX); - PulseMSRemaining.RxLEDPulse = TX_RX_LED_PULSE_MS; - } - - CDC_Device_USBTask(&VirtualSerial_CDC_Interface); - USB_USBTask(); - } -} - -/** Configures the board hardware and chip peripherals for the demo's functionality. */ -void SetupHardware(void) -{ - /* Disable watchdog if enabled by bootloader/fuses */ - MCUSR &= ~(1 << WDRF); - wdt_disable(); - - /* Hardware Initialization */ - Serial_Init(9600, false); - LEDs_Init(); - USB_Init(); - - /* Start the flush timer so that overflows occur rapidly to push received bytes to the USB interface */ - TCCR0B = (1 << CS02); - - /* Pull target /RESET line high */ - AVR_RESET_LINE_PORT |= AVR_RESET_LINE_MASK; - AVR_RESET_LINE_DDR |= AVR_RESET_LINE_MASK; -} - -/** Event handler for the library USB Configuration Changed event. */ -void EVENT_USB_Device_ConfigurationChanged(void) -{ - CDC_Device_ConfigureEndpoints(&VirtualSerial_CDC_Interface); -} - -/** Event handler for the library USB Unhandled Control Request event. */ -void EVENT_USB_Device_UnhandledControlRequest(void) -{ - CDC_Device_ProcessControlRequest(&VirtualSerial_CDC_Interface); -} - -/** Event handler for the CDC Class driver Line Encoding Changed event. - * - * \param[in] CDCInterfaceInfo Pointer to the CDC class interface configuration structure being referenced - */ -void EVENT_CDC_Device_LineEncodingChanged(USB_ClassInfo_CDC_Device_t* const CDCInterfaceInfo) -{ - uint8_t ConfigMask = 0; - - switch (CDCInterfaceInfo->State.LineEncoding.ParityType) - { - case CDC_PARITY_Odd: - ConfigMask = ((1 << UPM11) | (1 << UPM10)); - break; - case CDC_PARITY_Even: - ConfigMask = (1 << UPM11); - break; - } - - if (CDCInterfaceInfo->State.LineEncoding.CharFormat == CDC_LINEENCODING_TwoStopBits) - ConfigMask |= (1 << USBS1); - - switch (CDCInterfaceInfo->State.LineEncoding.DataBits) - { - case 6: - ConfigMask |= (1 << UCSZ10); - break; - case 7: - ConfigMask |= (1 << UCSZ11); - break; - case 8: - ConfigMask |= ((1 << UCSZ11) | (1 << UCSZ10)); - break; - } - - /* Must turn off USART before reconfiguring it, otherwise incorrect operation may occur */ - UCSR1B = 0; - UCSR1A = 0; - UCSR1C = 0; - - /* Special case 57600 baud for compatibility with the ATmega328 bootloader. */ - UBRR1 = (CDCInterfaceInfo->State.LineEncoding.BaudRateBPS == 57600) - ? SERIAL_UBBRVAL(CDCInterfaceInfo->State.LineEncoding.BaudRateBPS) - : SERIAL_2X_UBBRVAL(CDCInterfaceInfo->State.LineEncoding.BaudRateBPS); - - UCSR1C = ConfigMask; - UCSR1A = (CDCInterfaceInfo->State.LineEncoding.BaudRateBPS == 57600) ? 0 : (1 << U2X1); - UCSR1B = ((1 << RXCIE1) | (1 << TXEN1) | (1 << RXEN1)); -} - -/** ISR to manage the reception of data from the serial port, placing received bytes into a circular buffer - * for later transmission to the host. - */ -ISR(USART1_RX_vect, ISR_BLOCK) -{ - uint8_t ReceivedByte = UDR1; - - if (USB_DeviceState == DEVICE_STATE_Configured) - RingBuffer_Insert(&USARTtoUSB_Buffer, ReceivedByte); -} - -/** Event handler for the CDC Class driver Host-to-Device Line Encoding Changed event. - * - * \param[in] CDCInterfaceInfo Pointer to the CDC class interface configuration structure being referenced - */ -void EVENT_CDC_Device_ControLineStateChanged(USB_ClassInfo_CDC_Device_t* const CDCInterfaceInfo) -{ - bool CurrentDTRState = (CDCInterfaceInfo->State.ControlLineStates.HostToDevice & CDC_CONTROL_LINE_OUT_DTR); - - if (CurrentDTRState) - AVR_RESET_LINE_PORT &= ~AVR_RESET_LINE_MASK; - else - AVR_RESET_LINE_PORT |= AVR_RESET_LINE_MASK; -} diff --git a/build/linux/work/hardware/arduino/firmwares/arduino-usbserial/Arduino-usbserial.h b/build/linux/work/hardware/arduino/firmwares/arduino-usbserial/Arduino-usbserial.h deleted file mode 100644 index 99fde3914..000000000 --- a/build/linux/work/hardware/arduino/firmwares/arduino-usbserial/Arduino-usbserial.h +++ /dev/null @@ -1,79 +0,0 @@ -/* - LUFA Library - Copyright (C) Dean Camera, 2010. - - dean [at] fourwalledcubicle [dot] com - www.fourwalledcubicle.com -*/ - -/* - Copyright 2010 Dean Camera (dean [at] fourwalledcubicle [dot] com) - - Permission to use, copy, modify, distribute, and sell this - software and its documentation for any purpose is hereby granted - without fee, provided that the above copyright notice appear in - all copies and that both that the copyright notice and this - permission notice and warranty disclaimer appear in supporting - documentation, and that the name of the author not be used in - advertising or publicity pertaining to distribution of the - software without specific, written prior permission. - - The author disclaim all warranties with regard to this - software, including all implied warranties of merchantability - and fitness. In no event shall the author be liable for any - special, indirect or consequential damages or any damages - whatsoever resulting from loss of use, data or profits, whether - in an action of contract, negligence or other tortious action, - arising out of or in connection with the use or performance of - this software. -*/ - -/** \file - * - * Header file for Arduino-usbserial.c. - */ - -#ifndef _ARDUINO_USBSERIAL_H_ -#define _ARDUINO_USBSERIAL_H_ - - /* Includes: */ - #include - #include - #include - #include - - #include "Descriptors.h" - - #include "Lib/LightweightRingBuff.h" - - #include - #include - #include - #include - #include - - /* Macros: */ - /** LED mask for the library LED driver, to indicate TX activity. */ - #define LEDMASK_TX LEDS_LED1 - - /** LED mask for the library LED driver, to indicate RX activity. */ - #define LEDMASK_RX LEDS_LED2 - - /** LED mask for the library LED driver, to indicate that an error has occurred in the USB interface. */ - #define LEDMASK_ERROR (LEDS_LED1 | LEDS_LED2) - - /** LED mask for the library LED driver, to indicate that the USB interface is busy. */ - #define LEDMASK_BUSY (LEDS_LED1 | LEDS_LED2) - - /* Function Prototypes: */ - void SetupHardware(void); - - void EVENT_USB_Device_Connect(void); - void EVENT_USB_Device_Disconnect(void); - void EVENT_USB_Device_ConfigurationChanged(void); - void EVENT_USB_Device_UnhandledControlRequest(void); - - void EVENT_CDC_Device_LineEncodingChanged(USB_ClassInfo_CDC_Device_t* const CDCInterfaceInfo); - void EVENT_CDC_Device_ControLineStateChanged(USB_ClassInfo_CDC_Device_t* const CDCInterfaceInfo); - -#endif /* _ARDUINO_USBSERIAL_H_ */ diff --git a/build/linux/work/hardware/arduino/firmwares/arduino-usbserial/Board/LEDs.h b/build/linux/work/hardware/arduino/firmwares/arduino-usbserial/Board/LEDs.h deleted file mode 100644 index 152e8f571..000000000 --- a/build/linux/work/hardware/arduino/firmwares/arduino-usbserial/Board/LEDs.h +++ /dev/null @@ -1,110 +0,0 @@ -/* - LUFA Library - Copyright (C) Dean Camera, 2010. - - dean [at] fourwalledcubicle [dot] com - www.fourwalledcubicle.com -*/ - -/* - Copyright 2010 Dean Camera (dean [at] fourwalledcubicle [dot] com) - - Permission to use, copy, modify, distribute, and sell this - software and its documentation for any purpose is hereby granted - without fee, provided that the above copyright notice appear in - all copies and that both that the copyright notice and this - permission notice and warranty disclaimer appear in supporting - documentation, and that the name of the author not be used in - advertising or publicity pertaining to distribution of the - software without specific, written prior permission. - - The author disclaim all warranties with regard to this - software, including all implied warranties of merchantability - and fitness. In no event shall the author be liable for any - special, indirect or consequential damages or any damages - whatsoever resulting from loss of use, data or profits, whether - in an action of contract, negligence or other tortious action, - arising out of or in connection with the use or performance of - this software. -*/ - -/* - Board LEDs driver for the Benito board, from www.dorkbotpdx.org. -*/ - -#ifndef __LEDS_ARDUINOUNO_H__ -#define __LEDS_ARDUINOUNO_H__ - - /* Includes: */ - #include - -/* Enable C linkage for C++ Compilers: */ - #if defined(__cplusplus) - extern "C" { - #endif - - /* Preprocessor Checks: */ - #if !defined(INCLUDE_FROM_LEDS_H) - #error Do not include this file directly. Include LUFA/Drivers/Board/LEDS.h instead. - #endif - - /* Public Interface - May be used in end-application: */ - /* Macros: */ - /** LED mask for the first LED on the board. */ - #define LEDS_LED1 (1 << 5) - - /** LED mask for the second LED on the board. */ - #define LEDS_LED2 (1 << 4) - - /** LED mask for all the LEDs on the board. */ - #define LEDS_ALL_LEDS (LEDS_LED1 | LEDS_LED2) - - /** LED mask for the none of the board LEDs */ - #define LEDS_NO_LEDS 0 - - /* Inline Functions: */ - #if !defined(__DOXYGEN__) - static inline void LEDs_Init(void) - { - DDRD |= LEDS_ALL_LEDS; - PORTD |= LEDS_ALL_LEDS; - } - - static inline void LEDs_TurnOnLEDs(const uint8_t LEDMask) - { - PORTD &= ~LEDMask; - } - - static inline void LEDs_TurnOffLEDs(const uint8_t LEDMask) - { - PORTD |= LEDMask; - } - - static inline void LEDs_SetAllLEDs(const uint8_t LEDMask) - { - PORTD = ((PORTD | LEDS_ALL_LEDS) & ~LEDMask); - } - - static inline void LEDs_ChangeLEDs(const uint8_t LEDMask, const uint8_t ActiveMask) - { - PORTD = ((PORTD | ActiveMask) & ~LEDMask); - } - - static inline void LEDs_ToggleLEDs(const uint8_t LEDMask) - { - PORTD ^= LEDMask; - } - - static inline uint8_t LEDs_GetLEDs(void) ATTR_WARN_UNUSED_RESULT; - static inline uint8_t LEDs_GetLEDs(void) - { - return (PORTD & LEDS_ALL_LEDS); - } - #endif - - /* Disable C linkage for C++ Compilers: */ - #if defined(__cplusplus) - } - #endif - -#endif diff --git a/build/linux/work/hardware/arduino/firmwares/arduino-usbserial/Descriptors.c b/build/linux/work/hardware/arduino/firmwares/arduino-usbserial/Descriptors.c deleted file mode 100644 index 705dddf9a..000000000 --- a/build/linux/work/hardware/arduino/firmwares/arduino-usbserial/Descriptors.c +++ /dev/null @@ -1,277 +0,0 @@ -/* - LUFA Library - Copyright (C) Dean Camera, 2010. - - dean [at] fourwalledcubicle [dot] com - www.fourwalledcubicle.com -*/ - -/* - Copyright 2010 Dean Camera (dean [at] fourwalledcubicle [dot] com) - - Permission to use, copy, modify, distribute, and sell this - software and its documentation for any purpose is hereby granted - without fee, provided that the above copyright notice appear in - all copies and that both that the copyright notice and this - permission notice and warranty disclaimer appear in supporting - documentation, and that the name of the author not be used in - advertising or publicity pertaining to distribution of the - software without specific, written prior permission. - - The author disclaim all warranties with regard to this - software, including all implied warranties of merchantability - and fitness. In no event shall the author be liable for any - special, indirect or consequential damages or any damages - whatsoever resulting from loss of use, data or profits, whether - in an action of contract, negligence or other tortious action, - arising out of or in connection with the use or performance of - this software. -*/ - -/** \file - * - * USB Device Descriptors, for library use when in USB device mode. Descriptors are special - * computer-readable structures which the host requests upon device enumeration, to determine - * the device's capabilities and functions. - */ - -#include "Descriptors.h" - -/* On some devices, there is a factory set internal serial number which can be automatically sent to the host as - * the device's serial number when the Device Descriptor's .SerialNumStrIndex entry is set to USE_INTERNAL_SERIAL. - * This allows the host to track a device across insertions on different ports, allowing them to retain allocated - * resources like COM port numbers and drivers. On demos using this feature, give a warning on unsupported devices - * so that the user can supply their own serial number descriptor instead or remove the USE_INTERNAL_SERIAL value - * from the Device Descriptor (forcing the host to generate a serial number for each device from the VID, PID and - * port location). - */ -#if (USE_INTERNAL_SERIAL == NO_DESCRIPTOR) - #warning USE_INTERNAL_SERIAL is not available on this AVR - please manually construct a device serial descriptor. -#endif - -/** Device descriptor structure. This descriptor, located in FLASH memory, describes the overall - * device characteristics, including the supported USB version, control endpoint size and the - * number of device configurations. The descriptor is read out by the USB host when the enumeration - * process begins. - */ -USB_Descriptor_Device_t PROGMEM DeviceDescriptor = -{ - .Header = {.Size = sizeof(USB_Descriptor_Device_t), .Type = DTYPE_Device}, - - .USBSpecification = VERSION_BCD(01.10), - .Class = 0x02, - .SubClass = 0x00, - .Protocol = 0x00, - - .Endpoint0Size = FIXED_CONTROL_ENDPOINT_SIZE, - - .VendorID = 0x03EB, // Atmel - - .ProductID = 0x204B, // LUFA USB to Serial Demo Application - .ReleaseNumber = 0x0001, - - .ManufacturerStrIndex = 0x01, - .ProductStrIndex = 0x02, - .SerialNumStrIndex = USE_INTERNAL_SERIAL, - - .NumberOfConfigurations = FIXED_NUM_CONFIGURATIONS -}; - -/** Configuration descriptor structure. This descriptor, located in FLASH memory, describes the usage - * of the device in one of its supported configurations, including information about any device interfaces - * and endpoints. The descriptor is read out by the USB host during the enumeration process when selecting - * a configuration so that the host may correctly communicate with the USB device. - */ -USB_Descriptor_Configuration_t PROGMEM ConfigurationDescriptor = -{ - .Config = - { - .Header = {.Size = sizeof(USB_Descriptor_Configuration_Header_t), .Type = DTYPE_Configuration}, - - .TotalConfigurationSize = sizeof(USB_Descriptor_Configuration_t), - .TotalInterfaces = 2, - - .ConfigurationNumber = 1, - .ConfigurationStrIndex = NO_DESCRIPTOR, - - .ConfigAttributes = (USB_CONFIG_ATTR_BUSPOWERED | USB_CONFIG_ATTR_SELFPOWERED), - - .MaxPowerConsumption = USB_CONFIG_POWER_MA(100) - }, - - .CDC_CCI_Interface = - { - .Header = {.Size = sizeof(USB_Descriptor_Interface_t), .Type = DTYPE_Interface}, - - .InterfaceNumber = 0, - .AlternateSetting = 0, - - .TotalEndpoints = 1, - - .Class = 0x02, - .SubClass = 0x02, - .Protocol = 0x01, - - .InterfaceStrIndex = NO_DESCRIPTOR - }, - - .CDC_Functional_IntHeader = - { - .Header = {.Size = sizeof(CDC_FUNCTIONAL_DESCRIPTOR(2)), .Type = 0x24}, - .SubType = 0x00, - - .Data = {0x01, 0x10} - }, - - .CDC_Functional_AbstractControlManagement = - { - .Header = {.Size = sizeof(CDC_FUNCTIONAL_DESCRIPTOR(1)), .Type = 0x24}, - .SubType = 0x02, - - .Data = {0x06} - }, - - .CDC_Functional_Union = - { - .Header = {.Size = sizeof(CDC_FUNCTIONAL_DESCRIPTOR(2)), .Type = 0x24}, - .SubType = 0x06, - - .Data = {0x00, 0x01} - }, - - .CDC_NotificationEndpoint = - { - .Header = {.Size = sizeof(USB_Descriptor_Endpoint_t), .Type = DTYPE_Endpoint}, - - .EndpointAddress = (ENDPOINT_DESCRIPTOR_DIR_IN | CDC_NOTIFICATION_EPNUM), - .Attributes = (EP_TYPE_INTERRUPT | ENDPOINT_ATTR_NO_SYNC | ENDPOINT_USAGE_DATA), - .EndpointSize = CDC_NOTIFICATION_EPSIZE, - .PollingIntervalMS = 0xFF - }, - - .CDC_DCI_Interface = - { - .Header = {.Size = sizeof(USB_Descriptor_Interface_t), .Type = DTYPE_Interface}, - - .InterfaceNumber = 1, - .AlternateSetting = 0, - - .TotalEndpoints = 2, - - .Class = 0x0A, - .SubClass = 0x00, - .Protocol = 0x00, - - .InterfaceStrIndex = NO_DESCRIPTOR - }, - - .CDC_DataOutEndpoint = - { - .Header = {.Size = sizeof(USB_Descriptor_Endpoint_t), .Type = DTYPE_Endpoint}, - - .EndpointAddress = (ENDPOINT_DESCRIPTOR_DIR_OUT | CDC_RX_EPNUM), - .Attributes = (EP_TYPE_BULK | ENDPOINT_ATTR_NO_SYNC | ENDPOINT_USAGE_DATA), - .EndpointSize = CDC_TXRX_EPSIZE, - .PollingIntervalMS = 0x01 - }, - - .CDC_DataInEndpoint = - { - .Header = {.Size = sizeof(USB_Descriptor_Endpoint_t), .Type = DTYPE_Endpoint}, - - .EndpointAddress = (ENDPOINT_DESCRIPTOR_DIR_IN | CDC_TX_EPNUM), - .Attributes = (EP_TYPE_BULK | ENDPOINT_ATTR_NO_SYNC | ENDPOINT_USAGE_DATA), - .EndpointSize = CDC_TXRX_EPSIZE, - .PollingIntervalMS = 0x01 - } -}; - -/** Language descriptor structure. This descriptor, located in FLASH memory, is returned when the host requests - * the string descriptor with index 0 (the first index). It is actually an array of 16-bit integers, which indicate - * via the language ID table available at USB.org what languages the device supports for its string descriptors. - */ -USB_Descriptor_String_t PROGMEM LanguageString = -{ - .Header = {.Size = USB_STRING_LEN(1), .Type = DTYPE_String}, - - .UnicodeString = {LANGUAGE_ID_ENG} -}; - -/** Manufacturer descriptor string. This is a Unicode string containing the manufacturer's details in human readable - * form, and is read out upon request by the host when the appropriate string ID is requested, listed in the Device - * Descriptor. - */ -USB_Descriptor_String_t PROGMEM ManufacturerString = -{ - .Header = {.Size = USB_STRING_LEN(24), .Type = DTYPE_String}, - - .UnicodeString = L"Arduino (www.arduino.cc)" -}; - -/** Product descriptor string. This is a Unicode string containing the product's details in human readable form, - * and is read out upon request by the host when the appropriate string ID is requested, listed in the Device - * Descriptor. - */ -USB_Descriptor_String_t PROGMEM ProductString = -{ - #if (ARDUINO_MODEL_PID == ARDUINO_UNO_PID) - .Header = {.Size = USB_STRING_LEN(11), .Type = DTYPE_String}, - - .UnicodeString = L"Arduino Uno" - #elif (ARDUINO_MODEL_PID == ARDUINO_MEGA2560_PID) - .Header = {.Size = USB_STRING_LEN(17), .Type = DTYPE_String}, - - .UnicodeString = L"Arduino Mega 2560" - #endif - -}; - -/** This function is called by the library when in device mode, and must be overridden (see library "USB Descriptors" - * documentation) by the application code so that the address and size of a requested descriptor can be given - * to the USB library. When the device receives a Get Descriptor request on the control endpoint, this function - * is called so that the descriptor details can be passed back and the appropriate descriptor sent back to the - * USB host. - */ -uint16_t CALLBACK_USB_GetDescriptor(const uint16_t wValue, - const uint8_t wIndex, - void** const DescriptorAddress) -{ - const uint8_t DescriptorType = (wValue >> 8); - const uint8_t DescriptorNumber = (wValue & 0xFF); - - void* Address = NULL; - uint16_t Size = NO_DESCRIPTOR; - - switch (DescriptorType) - { - case DTYPE_Device: - Address = (void*)&DeviceDescriptor; - Size = sizeof(USB_Descriptor_Device_t); - break; - case DTYPE_Configuration: - Address = (void*)&ConfigurationDescriptor; - Size = sizeof(USB_Descriptor_Configuration_t); - break; - case DTYPE_String: - switch (DescriptorNumber) - { - case 0x00: - Address = (void*)&LanguageString; - Size = pgm_read_byte(&LanguageString.Header.Size); - break; - case 0x01: - Address = (void*)&ManufacturerString; - Size = pgm_read_byte(&ManufacturerString.Header.Size); - break; - case 0x02: - Address = (void*)&ProductString; - Size = pgm_read_byte(&ProductString.Header.Size); - break; - } - - break; - } - - *DescriptorAddress = Address; - return Size; -} diff --git a/build/linux/work/hardware/arduino/firmwares/arduino-usbserial/Descriptors.h b/build/linux/work/hardware/arduino/firmwares/arduino-usbserial/Descriptors.h deleted file mode 100644 index 3ac4e5257..000000000 --- a/build/linux/work/hardware/arduino/firmwares/arduino-usbserial/Descriptors.h +++ /dev/null @@ -1,88 +0,0 @@ -/* - LUFA Library - Copyright (C) Dean Camera, 2010. - - dean [at] fourwalledcubicle [dot] com - www.fourwalledcubicle.com -*/ - -/* - Copyright 2010 Dean Camera (dean [at] fourwalledcubicle [dot] com) - - Permission to use, copy, modify, distribute, and sell this - software and its documentation for any purpose is hereby granted - without fee, provided that the above copyright notice appear in - all copies and that both that the copyright notice and this - permission notice and warranty disclaimer appear in supporting - documentation, and that the name of the author not be used in - advertising or publicity pertaining to distribution of the - software without specific, written prior permission. - - The author disclaim all warranties with regard to this - software, including all implied warranties of merchantability - and fitness. In no event shall the author be liable for any - special, indirect or consequential damages or any damages - whatsoever resulting from loss of use, data or profits, whether - in an action of contract, negligence or other tortious action, - arising out of or in connection with the use or performance of - this software. -*/ - -/** \file - * - * Header file for Descriptors.c. - */ - -#ifndef _DESCRIPTORS_H_ -#define _DESCRIPTORS_H_ - - /* Includes: */ - #include - - #include - #include - - /* Product-specific definitions: */ - #define ARDUINO_UNO_PID 0x0001 - #define ARDUINO_MEGA2560_PID 0x0010 - - /* Macros: */ - /** Endpoint number of the CDC device-to-host notification IN endpoint. */ - #define CDC_NOTIFICATION_EPNUM 2 - - /** Endpoint number of the CDC device-to-host data IN endpoint. */ - #define CDC_TX_EPNUM 3 - - /** Endpoint number of the CDC host-to-device data OUT endpoint. */ - #define CDC_RX_EPNUM 4 - - /** Size in bytes of the CDC device-to-host notification IN endpoint. */ - #define CDC_NOTIFICATION_EPSIZE 8 - - /** Size in bytes of the CDC data IN and OUT endpoints. */ - #define CDC_TXRX_EPSIZE 64 - - /* Type Defines: */ - /** Type define for the device configuration descriptor structure. This must be defined in the - * application code, as the configuration descriptor contains several sub-descriptors which - * vary between devices, and which describe the device's usage to the host. - */ - typedef struct - { - USB_Descriptor_Configuration_Header_t Config; - USB_Descriptor_Interface_t CDC_CCI_Interface; - CDC_FUNCTIONAL_DESCRIPTOR(2) CDC_Functional_IntHeader; - CDC_FUNCTIONAL_DESCRIPTOR(1) CDC_Functional_AbstractControlManagement; - CDC_FUNCTIONAL_DESCRIPTOR(2) CDC_Functional_Union; - USB_Descriptor_Endpoint_t CDC_NotificationEndpoint; - USB_Descriptor_Interface_t CDC_DCI_Interface; - USB_Descriptor_Endpoint_t CDC_DataOutEndpoint; - USB_Descriptor_Endpoint_t CDC_DataInEndpoint; - } USB_Descriptor_Configuration_t; - - /* Function Prototypes: */ - uint16_t CALLBACK_USB_GetDescriptor(const uint16_t wValue, - const uint8_t wIndex, - void** const DescriptorAddress) ATTR_WARN_UNUSED_RESULT ATTR_NON_NULL_PTR_ARG(3); - -#endif diff --git a/build/linux/work/hardware/arduino/firmwares/arduino-usbserial/Lib/LightweightRingBuff.h b/build/linux/work/hardware/arduino/firmwares/arduino-usbserial/Lib/LightweightRingBuff.h deleted file mode 100644 index fb48c1f73..000000000 --- a/build/linux/work/hardware/arduino/firmwares/arduino-usbserial/Lib/LightweightRingBuff.h +++ /dev/null @@ -1,197 +0,0 @@ -/* - LUFA Library - Copyright (C) Dean Camera, 2010. - - dean [at] fourwalledcubicle [dot] com - www.fourwalledcubicle.com -*/ - -/* - Copyright 2010 Dean Camera (dean [at] fourwalledcubicle [dot] com) - - Permission to use, copy, modify, distribute, and sell this - software and its documentation for any purpose is hereby granted - without fee, provided that the above copyright notice appear in - all copies and that both that the copyright notice and this - permission notice and warranty disclaimer appear in supporting - documentation, and that the name of the author not be used in - advertising or publicity pertaining to distribution of the - software without specific, written prior permission. - - The author disclaim all warranties with regard to this - software, including all implied warranties of merchantability - and fitness. In no event shall the author be liable for any - special, indirect or consequential damages or any damages - whatsoever resulting from loss of use, data or profits, whether - in an action of contract, negligence or other tortious action, - arising out of or in connection with the use or performance of - this software. -*/ - -/** \file - * - * Ultra lightweight ring buffer, for fast insertion/deletion. - */ - -#ifndef _ULW_RING_BUFF_H_ -#define _ULW_RING_BUFF_H_ - - /* Includes: */ - #include - - #include - #include - - /* Defines: */ - /** Size of each ring buffer, in data elements - must be between 1 and 255. */ - #define BUFFER_SIZE 128 - - /** Maximum number of data elements to buffer before forcing a flush. - * Must be less than BUFFER_SIZE - */ - #define BUFFER_NEARLY_FULL 96 - - /** Type of data to store into the buffer. */ - #define RingBuff_Data_t uint8_t - - /** Datatype which may be used to store the count of data stored in a buffer, retrieved - * via a call to \ref RingBuffer_GetCount(). - */ - #if (BUFFER_SIZE <= 0xFF) - #define RingBuff_Count_t uint8_t - #else - #define RingBuff_Count_t uint16_t - #endif - - /* Type Defines: */ - /** Type define for a new ring buffer object. Buffers should be initialized via a call to - * \ref RingBuffer_InitBuffer() before use. - */ - typedef struct - { - RingBuff_Data_t Buffer[BUFFER_SIZE]; /**< Internal ring buffer data, referenced by the buffer pointers. */ - RingBuff_Data_t* In; /**< Current storage location in the circular buffer */ - RingBuff_Data_t* Out; /**< Current retrieval location in the circular buffer */ - RingBuff_Count_t Count; - } RingBuff_t; - - /* Inline Functions: */ - /** Initializes a ring buffer ready for use. Buffers must be initialized via this function - * before any operations are called upon them. Already initialized buffers may be reset - * by re-initializing them using this function. - * - * \param[out] Buffer Pointer to a ring buffer structure to initialize - */ - static inline void RingBuffer_InitBuffer(RingBuff_t* const Buffer) - { - ATOMIC_BLOCK(ATOMIC_RESTORESTATE) - { - Buffer->In = Buffer->Buffer; - Buffer->Out = Buffer->Buffer; - } - } - - /** Retrieves the minimum number of bytes stored in a particular buffer. This value is computed - * by entering an atomic lock on the buffer while the IN and OUT locations are fetched, so that - * the buffer cannot be modified while the computation takes place. This value should be cached - * when reading out the contents of the buffer, so that as small a time as possible is spent - * in an atomic lock. - * - * \note The value returned by this function is guaranteed to only be the minimum number of bytes - * stored in the given buffer; this value may change as other threads write new data and so - * the returned number should be used only to determine how many successive reads may safely - * be performed on the buffer. - * - * \param[in] Buffer Pointer to a ring buffer structure whose count is to be computed - */ - static inline RingBuff_Count_t RingBuffer_GetCount(RingBuff_t* const Buffer) - { - RingBuff_Count_t Count; - - ATOMIC_BLOCK(ATOMIC_RESTORESTATE) - { - Count = Buffer->Count; - } - - return Count; - } - - /** Atomically determines if the specified ring buffer contains any free space. This should - * be tested before storing data to the buffer, to ensure that no data is lost due to a - * buffer overrun. - * - * \param[in,out] Buffer Pointer to a ring buffer structure to insert into - * - * \return Boolean true if the buffer contains no free space, false otherwise - */ - static inline bool RingBuffer_IsFull(RingBuff_t* const Buffer) - { - return (RingBuffer_GetCount(Buffer) == BUFFER_SIZE); - } - - /** Atomically determines if the specified ring buffer contains any data. This should - * be tested before removing data from the buffer, to ensure that the buffer does not - * underflow. - * - * If the data is to be removed in a loop, store the total number of bytes stored in the - * buffer (via a call to the \ref RingBuffer_GetCount() function) in a temporary variable - * to reduce the time spent in atomicity locks. - * - * \param[in,out] Buffer Pointer to a ring buffer structure to insert into - * - * \return Boolean true if the buffer contains no free space, false otherwise - */ - static inline bool RingBuffer_IsEmpty(RingBuff_t* const Buffer) - { - return (RingBuffer_GetCount(Buffer) == 0); - } - - /** Inserts an element into the ring buffer. - * - * \note Only one execution thread (main program thread or an ISR) may insert into a single buffer - * otherwise data corruption may occur. Insertion and removal may occur from different execution - * threads. - * - * \param[in,out] Buffer Pointer to a ring buffer structure to insert into - * \param[in] Data Data element to insert into the buffer - */ - static inline void RingBuffer_Insert(RingBuff_t* const Buffer, - const RingBuff_Data_t Data) - { - *Buffer->In = Data; - - if (++Buffer->In == &Buffer->Buffer[BUFFER_SIZE]) - Buffer->In = Buffer->Buffer; - - ATOMIC_BLOCK(ATOMIC_RESTORESTATE) - { - Buffer->Count++; - } - } - - /** Removes an element from the ring buffer. - * - * \note Only one execution thread (main program thread or an ISR) may remove from a single buffer - * otherwise data corruption may occur. Insertion and removal may occur from different execution - * threads. - * - * \param[in,out] Buffer Pointer to a ring buffer structure to retrieve from - * - * \return Next data element stored in the buffer - */ - static inline RingBuff_Data_t RingBuffer_Remove(RingBuff_t* const Buffer) - { - RingBuff_Data_t Data = *Buffer->Out; - - if (++Buffer->Out == &Buffer->Buffer[BUFFER_SIZE]) - Buffer->Out = Buffer->Buffer; - - ATOMIC_BLOCK(ATOMIC_RESTORESTATE) - { - Buffer->Count--; - } - - return Data; - } - -#endif diff --git a/build/linux/work/hardware/arduino/firmwares/arduino-usbserial/makefile b/build/linux/work/hardware/arduino/firmwares/arduino-usbserial/makefile deleted file mode 100644 index 79d6be231..000000000 --- a/build/linux/work/hardware/arduino/firmwares/arduino-usbserial/makefile +++ /dev/null @@ -1,776 +0,0 @@ -# Hey Emacs, this is a -*- makefile -*- -#---------------------------------------------------------------------------- -# WinAVR Makefile Template written by Eric B. Weddington, Jrg Wunsch, et al. -# >> Modified for use with the LUFA project. << -# -# Released to the Public Domain -# -# Additional material for this makefile was written by: -# Peter Fleury -# Tim Henigan -# Colin O'Flynn -# Reiner Patommel -# Markus Pfaff -# Sander Pool -# Frederik Rouleau -# Carlos Lamas -# Dean Camera -# Opendous Inc. -# Denver Gingerich -# -#---------------------------------------------------------------------------- -# On command line: -# -# make all = Make software. -# -# make clean = Clean out built project files. -# -# make coff = Convert ELF to AVR COFF. -# -# make extcoff = Convert ELF to AVR Extended COFF. -# -# make program = Download the hex file to the device, using avrdude. -# Please customize the avrdude settings below first! -# -# make dfu = Download the hex file to the device, using dfu-programmer (must -# have dfu-programmer installed). -# -# make flip = Download the hex file to the device, using Atmel FLIP (must -# have Atmel FLIP installed). -# -# make dfu-ee = Download the eeprom file to the device, using dfu-programmer -# (must have dfu-programmer installed). -# -# make flip-ee = Download the eeprom file to the device, using Atmel FLIP -# (must have Atmel FLIP installed). -# -# make doxygen = Generate DoxyGen documentation for the project (must have -# DoxyGen installed) -# -# make debug = Start either simulavr or avarice as specified for debugging, -# with avr-gdb or avr-insight as the front end for debugging. -# -# make filename.s = Just compile filename.c into the assembler code only. -# -# make filename.i = Create a preprocessed source file for use in submitting -# bug reports to the GCC project. -# -# To rebuild project do "make clean" then "make all". -#---------------------------------------------------------------------------- - -# MCU name(s) -# Since the ATMEGA8U2 part is not directly supported by the current -# versions of either avrdude or dfu-programmer, we specify a dummy -# part; AT90USB82 which is close enough in memory size and organization -MCU = atmega8u2 -MCU_AVRDUDE = at90usb82 -MCU_DFU = at90usb82 - -# Specify the Arduino model using the assigned PID. This is used by Descriptors.c -# to set PID and product descriptor string -# Uno PID: -ARDUINO_MODEL_PID = 0x0001 -# Mega 2560 PID: -#ARDUINO_MODEL_PID = 0x0010 - - -# Target board (see library "Board Types" documentation, NONE for projects not requiring -# LUFA board drivers). If USER is selected, put custom board drivers in a directory called -# "Board" inside the application directory. -BOARD = USER - - -# Processor frequency. -# This will define a symbol, F_CPU, in all source code files equal to the -# processor frequency in Hz. You can then use this symbol in your source code to -# calculate timings. Do NOT tack on a 'UL' at the end, this will be done -# automatically to create a 32-bit value in your source code. -# -# This will be an integer division of F_CLOCK below, as it is sourced by -# F_CLOCK after it has run through any CPU prescalers. Note that this value -# does not *change* the processor frequency - it should merely be updated to -# reflect the processor speed set externally so that the code can use accurate -# software delays. -F_CPU = 16000000 - - -# Input clock frequency. -# This will define a symbol, F_CLOCK, in all source code files equal to the -# input clock frequency (before any prescaling is performed) in Hz. This value may -# differ from F_CPU if prescaling is used on the latter, and is required as the -# raw input clock is fed directly to the PLL sections of the AVR for high speed -# clock generation for the USB and other AVR subsections. Do NOT tack on a 'UL' -# at the end, this will be done automatically to create a 32-bit value in your -# source code. -# -# If no clock division is performed on the input clock inside the AVR (via the -# CPU clock adjust registers or the clock division fuses), this will be equal to F_CPU. -F_CLOCK = $(F_CPU) - - -# Output format. (can be srec, ihex, binary) -FORMAT = ihex - - -# Target file name (without extension). -TARGET = Arduino-usbserial - - -# Object files directory -# To put object files in current directory, use a dot (.), do NOT make -# this an empty or blank macro! -OBJDIR = . - - -# Path to the LUFA library -LUFA_PATH = ../.. - - -# LUFA library compile-time options -LUFA_OPTS = -D USB_DEVICE_ONLY -LUFA_OPTS += -D FIXED_CONTROL_ENDPOINT_SIZE=8 -LUFA_OPTS += -D FIXED_NUM_CONFIGURATIONS=1 -LUFA_OPTS += -D USE_FLASH_DESCRIPTORS -LUFA_OPTS += -D INTERRUPT_CONTROL_ENDPOINT -LUFA_OPTS += -D DEVICE_STATE_AS_GPIOR=0 -LUFA_OPTS += -D USE_STATIC_OPTIONS="(USB_DEVICE_OPT_FULLSPEED | USB_OPT_REG_ENABLED | USB_OPT_AUTO_PLL)" - - -# Create the LUFA source path variables by including the LUFA root makefile -include $(LUFA_PATH)/LUFA/makefile - - -# List C source files here. (C dependencies are automatically generated.) -SRC = $(TARGET).c \ - Descriptors.c \ - $(LUFA_SRC_USB) \ - $(LUFA_SRC_USBCLASS) \ - $(LUFA_PATH)/LUFA/Drivers/USB/LowLevel/Device.c \ - $(LUFA_PATH)/LUFA/Drivers/USB/LowLevel/Endpoint.c \ - $(LUFA_PATH)/LUFA/Drivers/USB/HighLevel/HostStandardReq.c \ - $(LUFA_PATH)/LUFA/Drivers/USB/LowLevel/Host.c \ - $(LUFA_PATH)/LUFA/Drivers/USB/LowLevel/Pipe.c \ - $(LUFA_PATH)/LUFA/Drivers/USB/LowLevel/USBController.c \ - $(LUFA_PATH)/LUFA/Drivers/USB/HighLevel/Events.c \ - $(LUFA_PATH)/LUFA/Drivers/USB/LowLevel/USBInterrupt.c \ - $(LUFA_PATH)/LUFA/Drivers/USB/HighLevel/USBTask.c \ - $(LUFA_PATH)/LUFA/Drivers/USB/HighLevel/DeviceStandardReq.c \ - $(LUFA_PATH)/LUFA/Drivers/USB/HighLevel/ConfigDescriptor.c \ - $(LUFA_PATH)/LUFA/Drivers/USB/Class/Device/CDC.c \ - $(LUFA_PATH)/LUFA/Drivers/USB/Class/Host/CDC.c - - -# List C++ source files here. (C dependencies are automatically generated.) -CPPSRC = - - -# List Assembler source files here. -# Make them always end in a capital .S. Files ending in a lowercase .s -# will not be considered source files but generated files (assembler -# output from the compiler), and will be deleted upon "make clean"! -# Even though the DOS/Win* filesystem matches both .s and .S the same, -# it will preserve the spelling of the filenames, and gcc itself does -# care about how the name is spelled on its command-line. -ASRC = - - -# Optimization level, can be [0, 1, 2, 3, s]. -# 0 = turn off optimization. s = optimize for size. -# (Note: 3 is not always the best optimization level. See avr-libc FAQ.) -OPT = s - - -# Debugging format. -# Native formats for AVR-GCC's -g are dwarf-2 [default] or stabs. -# AVR Studio 4.10 requires dwarf-2. -# AVR [Extended] COFF format requires stabs, plus an avr-objcopy run. -DEBUG = dwarf-2 - - -# List any extra directories to look for include files here. -# Each directory must be seperated by a space. -# Use forward slashes for directory separators. -# For a directory that has spaces, enclose it in quotes. -EXTRAINCDIRS = $(LUFA_PATH)/ - - -# Compiler flag to set the C Standard level. -# c89 = "ANSI" C -# gnu89 = c89 plus GCC extensions -# c99 = ISO C99 standard (not yet fully implemented) -# gnu99 = c99 plus GCC extensions -CSTANDARD = -std=gnu99 - - -# Place -D or -U options here for C sources -CDEFS = -DF_CPU=$(F_CPU)UL -CDEFS += -DF_CLOCK=$(F_CLOCK)UL -CDEFS += -DARDUINO_MODEL_PID=$(ARDUINO_MODEL_PID) -CDEFS += -DBOARD=BOARD_$(BOARD) -CDEFS += $(LUFA_OPTS) -CDEFS += -DAVR_RESET_LINE_PORT="PORTD" -CDEFS += -DAVR_RESET_LINE_DDR="DDRD" -CDEFS += -DAVR_RESET_LINE_MASK="(1 << 7)" -CDEFS += -DTX_RX_LED_PULSE_MS=3 -CDEFS += -DPING_PONG_LED_PULSE_MS=100 - -# Place -D or -U options here for ASM sources -ADEFS = -DF_CPU=$(F_CPU) -ADEFS += -DF_CLOCK=$(F_CLOCK)UL -ADEFS += -DBOARD=BOARD_$(BOARD) -ADEFS += $(LUFA_OPTS) - -# Place -D or -U options here for C++ sources -CPPDEFS = -DF_CPU=$(F_CPU)UL -CPPDEFS += -DF_CLOCK=$(F_CLOCK)UL -CPPDEFS += -DBOARD=BOARD_$(BOARD) -CPPDEFS += $(LUFA_OPTS) -#CPPDEFS += -D__STDC_LIMIT_MACROS -#CPPDEFS += -D__STDC_CONSTANT_MACROS - - - -#---------------- Compiler Options C ---------------- -# -g*: generate debugging information -# -O*: optimization level -# -f...: tuning, see GCC manual and avr-libc documentation -# -Wall...: warning level -# -Wa,...: tell GCC to pass this to the assembler. -# -adhlns...: create assembler listing -CFLAGS = -g$(DEBUG) -CFLAGS += $(CDEFS) -CFLAGS += -O$(OPT) -CFLAGS += -funsigned-char -CFLAGS += -funsigned-bitfields -CFLAGS += -ffunction-sections -CFLAGS += -fno-inline-small-functions -CFLAGS += -fpack-struct -CFLAGS += -fshort-enums -CFLAGS += -fno-strict-aliasing -CFLAGS += -Wall -CFLAGS += -Wstrict-prototypes -#CFLAGS += -mshort-calls -#CFLAGS += -fno-unit-at-a-time -#CFLAGS += -Wundef -#CFLAGS += -Wunreachable-code -#CFLAGS += -Wsign-compare -CFLAGS += -Wa,-adhlns=$(<:%.c=$(OBJDIR)/%.lst) -CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS)) -CFLAGS += $(CSTANDARD) - - -#---------------- Compiler Options C++ ---------------- -# -g*: generate debugging information -# -O*: optimization level -# -f...: tuning, see GCC manual and avr-libc documentation -# -Wall...: warning level -# -Wa,...: tell GCC to pass this to the assembler. -# -adhlns...: create assembler listing -CPPFLAGS = -g$(DEBUG) -CPPFLAGS += $(CPPDEFS) -CPPFLAGS += -O$(OPT) -CPPFLAGS += -funsigned-char -CPPFLAGS += -funsigned-bitfields -CPPFLAGS += -fpack-struct -CPPFLAGS += -fshort-enums -CPPFLAGS += -fno-exceptions -CPPFLAGS += -Wall -CPPFLAGS += -Wundef -CFLAGS += -Wundef -#CPPFLAGS += -mshort-calls -#CPPFLAGS += -fno-unit-at-a-time -#CPPFLAGS += -Wstrict-prototypes -#CPPFLAGS += -Wunreachable-code -#CPPFLAGS += -Wsign-compare -CPPFLAGS += -Wa,-adhlns=$(<:%.cpp=$(OBJDIR)/%.lst) -CPPFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS)) -#CPPFLAGS += $(CSTANDARD) - - -#---------------- Assembler Options ---------------- -# -Wa,...: tell GCC to pass this to the assembler. -# -adhlns: create listing -# -gstabs: have the assembler create line number information; note that -# for use in COFF files, additional information about filenames -# and function names needs to be present in the assembler source -# files -- see avr-libc docs [FIXME: not yet described there] -# -listing-cont-lines: Sets the maximum number of continuation lines of hex -# dump that will be displayed for a given single line of source input. -ASFLAGS = $(ADEFS) -Wa,-adhlns=$(<:%.S=$(OBJDIR)/%.lst),-gstabs,--listing-cont-lines=100 - - -#---------------- Library Options ---------------- -# Minimalistic printf version -PRINTF_LIB_MIN = -Wl,-u,vfprintf -lprintf_min - -# Floating point printf version (requires MATH_LIB = -lm below) -PRINTF_LIB_FLOAT = -Wl,-u,vfprintf -lprintf_flt - -# If this is left blank, then it will use the Standard printf version. -PRINTF_LIB = -#PRINTF_LIB = $(PRINTF_LIB_MIN) -#PRINTF_LIB = $(PRINTF_LIB_FLOAT) - - -# Minimalistic scanf version -SCANF_LIB_MIN = -Wl,-u,vfscanf -lscanf_min - -# Floating point + %[ scanf version (requires MATH_LIB = -lm below) -SCANF_LIB_FLOAT = -Wl,-u,vfscanf -lscanf_flt - -# If this is left blank, then it will use the Standard scanf version. -SCANF_LIB = -#SCANF_LIB = $(SCANF_LIB_MIN) -#SCANF_LIB = $(SCANF_LIB_FLOAT) - - -MATH_LIB = -lm - - -# List any extra directories to look for libraries here. -# Each directory must be seperated by a space. -# Use forward slashes for directory separators. -# For a directory that has spaces, enclose it in quotes. -EXTRALIBDIRS = - - - -#---------------- External Memory Options ---------------- - -# 64 KB of external RAM, starting after internal RAM (ATmega128!), -# used for variables (.data/.bss) and heap (malloc()). -#EXTMEMOPTS = -Wl,-Tdata=0x801100,--defsym=__heap_end=0x80ffff - -# 64 KB of external RAM, starting after internal RAM (ATmega128!), -# only used for heap (malloc()). -#EXTMEMOPTS = -Wl,--section-start,.data=0x801100,--defsym=__heap_end=0x80ffff - -EXTMEMOPTS = - - - -#---------------- Linker Options ---------------- -# -Wl,...: tell GCC to pass this to linker. -# -Map: create map file -# --cref: add cross reference to map file -LDFLAGS = -Wl,-Map=$(TARGET).map,--cref -LDFLAGS += -Wl,--relax -LDFLAGS += -Wl,--gc-sections -LDFLAGS += $(EXTMEMOPTS) -LDFLAGS += $(patsubst %,-L%,$(EXTRALIBDIRS)) -LDFLAGS += $(PRINTF_LIB) $(SCANF_LIB) $(MATH_LIB) -#LDFLAGS += -T linker_script.x - - - -#---------------- Programming Options (avrdude) ---------------- - -# Programming hardware -# Type: avrdude -c ? -# to get a full listing. -# -AVRDUDE_PROGRAMMER = avrispmkii - -# com1 = serial port. Use lpt1 to connect to parallel port. -AVRDUDE_PORT = usb - -AVRDUDE_WRITE_FLASH = -U flash:w:$(TARGET).hex -#AVRDUDE_WRITE_EEPROM = -U eeprom:w:$(TARGET).eep - - -# Uncomment the following if you want avrdude's erase cycle counter. -# Note that this counter needs to be initialized first using -Yn, -# see avrdude manual. -#AVRDUDE_ERASE_COUNTER = -y - -# Uncomment the following if you do /not/ wish a verification to be -# performed after programming the device. -#AVRDUDE_NO_VERIFY = -V - -# Increase verbosity level. Please use this when submitting bug -# reports about avrdude. See -# to submit bug reports. -#AVRDUDE_VERBOSE = -v -v - -AVRDUDE_FORCE = -F - -AVRDUDE_FLAGS = -p $(MCU_AVRDUDE) -P $(AVRDUDE_PORT) -c $(AVRDUDE_PROGRAMMER) -AVRDUDE_FLAGS += $(AVRDUDE_NO_VERIFY) -AVRDUDE_FLAGS += $(AVRDUDE_VERBOSE) -AVRDUDE_FLAGS += $(AVRDUDE_ERASE_COUNTER) -AVRDUDE_FLAGS += $(AVRDUDE_FORCE) - - - -#---------------- Debugging Options ---------------- - -# For simulavr only - target MCU frequency. -DEBUG_MFREQ = $(F_CPU) - -# Set the DEBUG_UI to either gdb or insight. -# DEBUG_UI = gdb -DEBUG_UI = insight - -# Set the debugging back-end to either avarice, simulavr. -DEBUG_BACKEND = avarice -#DEBUG_BACKEND = simulavr - -# GDB Init Filename. -GDBINIT_FILE = __avr_gdbinit - -# When using avarice settings for the JTAG -JTAG_DEV = /dev/com1 - -# Debugging port used to communicate between GDB / avarice / simulavr. -DEBUG_PORT = 4242 - -# Debugging host used to communicate between GDB / avarice / simulavr, normally -# just set to localhost unless doing some sort of crazy debugging when -# avarice is running on a different computer. -DEBUG_HOST = localhost - - - -#============================================================================ - - -# Define programs and commands. -SHELL = sh -CC = avr-gcc -OBJCOPY = avr-objcopy -OBJDUMP = avr-objdump -SIZE = avr-size -AR = avr-ar rcs -NM = avr-nm -AVRDUDE = avrdude -REMOVE = rm -f -REMOVEDIR = rm -rf -COPY = cp -WINSHELL = cmd - -# Define Messages -# English -MSG_ERRORS_NONE = Errors: none -MSG_BEGIN = -------- begin -------- -MSG_END = -------- end -------- -MSG_SIZE_BEFORE = Size before: -MSG_SIZE_AFTER = Size after: -MSG_COFF = Converting to AVR COFF: -MSG_EXTENDED_COFF = Converting to AVR Extended COFF: -MSG_FLASH = Creating load file for Flash: -MSG_EEPROM = Creating load file for EEPROM: -MSG_EXTENDED_LISTING = Creating Extended Listing: -MSG_SYMBOL_TABLE = Creating Symbol Table: -MSG_LINKING = Linking: -MSG_COMPILING = Compiling C: -MSG_COMPILING_CPP = Compiling C++: -MSG_ASSEMBLING = Assembling: -MSG_CLEANING = Cleaning project: -MSG_CREATING_LIBRARY = Creating library: - - - - -# Define all object files. -OBJ = $(SRC:%.c=$(OBJDIR)/%.o) $(CPPSRC:%.cpp=$(OBJDIR)/%.o) $(ASRC:%.S=$(OBJDIR)/%.o) - -# Define all listing files. -LST = $(SRC:%.c=$(OBJDIR)/%.lst) $(CPPSRC:%.cpp=$(OBJDIR)/%.lst) $(ASRC:%.S=$(OBJDIR)/%.lst) - - -# Compiler flags to generate dependency files. -GENDEPFLAGS = -MMD -MP -MF .dep/$(@F).d - - -# Combine all necessary flags and optional flags. -# Add target processor to flags. -ALL_CFLAGS = -mmcu=$(MCU) -I. $(CFLAGS) $(GENDEPFLAGS) -ALL_CPPFLAGS = -mmcu=$(MCU) -I. -x c++ $(CPPFLAGS) $(GENDEPFLAGS) -ALL_ASFLAGS = -mmcu=$(MCU) -I. -x assembler-with-cpp $(ASFLAGS) - - - - - -# Default target. -#all: begin gccversion sizebefore build checkinvalidevents showliboptions showtarget sizeafter end -all: begin gccversion sizebefore build showliboptions showtarget sizeafter end - -# Change the build target to build a HEX file or a library. -build: elf hex eep lss sym asm -#build: lib - - -elf: $(TARGET).elf -hex: $(TARGET).hex -eep: $(TARGET).eep -lss: $(TARGET).lss -sym: $(TARGET).sym -asm: $(TARGET).s -LIBNAME=lib$(TARGET).a -lib: $(LIBNAME) - - - -# Eye candy. -# AVR Studio 3.x does not check make's exit code but relies on -# the following magic strings to be generated by the compile job. -begin: - @echo - @echo $(MSG_BEGIN) - -end: - @echo $(MSG_END) - @echo - - -# Display size of file. -HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex -ELFSIZE = $(SIZE) $(MCU_FLAG) $(FORMAT_FLAG) $(TARGET).elf -MCU_FLAG = $(shell $(SIZE) --help | grep -- --mcu > /dev/null && echo --mcu=$(MCU) ) -FORMAT_FLAG = $(shell $(SIZE) --help | grep -- --format=.*avr > /dev/null && echo --format=avr ) - -sizebefore: - @if test -f $(TARGET).elf; then echo; echo $(MSG_SIZE_BEFORE); $(ELFSIZE); \ - 2>/dev/null; echo; fi - -sizeafter: - @if test -f $(TARGET).elf; then echo; echo $(MSG_SIZE_AFTER); $(ELFSIZE); \ - 2>/dev/null; echo; fi - -#$(LUFA_PATH)/LUFA/LUFA_Events.lst: -# @make -C $(LUFA_PATH)/LUFA/ LUFA_Events.lst - -#checkinvalidevents: $(LUFA_PATH)/LUFA/LUFA_Events.lst -# @echo -# @echo Checking for invalid events... -# @$(shell) avr-nm $(OBJ) | sed -n -e 's/^.*EVENT_/EVENT_/p' | \ -# grep -F -v --file=$(LUFA_PATH)/LUFA/LUFA_Events.lst > InvalidEvents.tmp || true -# @sed -n -e 's/^/ WARNING - INVALID EVENT NAME: /p' InvalidEvents.tmp -# @if test -s InvalidEvents.tmp; then exit 1; fi - -showliboptions: - @echo - @echo ---- Compile Time Library Options ---- - @for i in $(LUFA_OPTS:-D%=%); do \ - echo $$i; \ - done - @echo -------------------------------------- - -showtarget: - @echo - @echo --------- Target Information --------- - @echo AVR Model: $(MCU) - @echo Board: $(BOARD) - @echo Clock: $(F_CPU)Hz CPU, $(F_CLOCK)Hz Master - @echo -------------------------------------- - - -# Display compiler version information. -gccversion : - @$(CC) --version - - -# Program the device. -program: $(TARGET).hex $(TARGET).eep - $(AVRDUDE) $(AVRDUDE_FLAGS) $(AVRDUDE_WRITE_FLASH) $(AVRDUDE_WRITE_EEPROM) - -flip: $(TARGET).hex - batchisp -hardware usb -device $(MCU_DFU) -operation erase f - batchisp -hardware usb -device $(MCU_DFU) -operation loadbuffer $(TARGET).hex program - batchisp -hardware usb -device $(MCU_DFU) -operation start reset 0 - -dfu: $(TARGET).hex - dfu-programmer $(MCU_DFU) erase - dfu-programmer $(MCU_DFU) flash --debug 1 $(TARGET).hex - dfu-programmer $(MCU_DFU) reset - - -flip-ee: $(TARGET).hex $(TARGET).eep - $(COPY) $(TARGET).eep $(TARGET)eep.hex - batchisp -hardware usb -device $(MCU_DFU) -operation memory EEPROM erase - batchisp -hardware usb -device $(MCU_DFU) -operation memory EEPROM loadbuffer $(TARGET)eep.hex program - batchisp -hardware usb -device $(MCU_DFU) -operation start reset 0 - $(REMOVE) $(TARGET)eep.hex - -dfu-ee: $(TARGET).hex $(TARGET).eep - dfu-programmer $(MCU_DFU) flash-eeprom --debug 1 --suppress-bootloader-mem $(TARGET).eep - dfu-programmer $(MCU_DFU) reset - - -# Generate avr-gdb config/init file which does the following: -# define the reset signal, load the target file, connect to target, and set -# a breakpoint at main(). -gdb-config: - @$(REMOVE) $(GDBINIT_FILE) - @echo define reset >> $(GDBINIT_FILE) - @echo SIGNAL SIGHUP >> $(GDBINIT_FILE) - @echo end >> $(GDBINIT_FILE) - @echo file $(TARGET).elf >> $(GDBINIT_FILE) - @echo target remote $(DEBUG_HOST):$(DEBUG_PORT) >> $(GDBINIT_FILE) -ifeq ($(DEBUG_BACKEND),simulavr) - @echo load >> $(GDBINIT_FILE) -endif - @echo break main >> $(GDBINIT_FILE) - -debug: gdb-config $(TARGET).elf -ifeq ($(DEBUG_BACKEND), avarice) - @echo Starting AVaRICE - Press enter when "waiting to connect" message displays. - @$(WINSHELL) /c start avarice --jtag $(JTAG_DEV) --erase --program --file \ - $(TARGET).elf $(DEBUG_HOST):$(DEBUG_PORT) - @$(WINSHELL) /c pause - -else - @$(WINSHELL) /c start simulavr --gdbserver --device $(MCU) --clock-freq \ - $(DEBUG_MFREQ) --port $(DEBUG_PORT) -endif - @$(WINSHELL) /c start avr-$(DEBUG_UI) --command=$(GDBINIT_FILE) - - - - -# Convert ELF to COFF for use in debugging / simulating in AVR Studio or VMLAB. -COFFCONVERT = $(OBJCOPY) --debugging -COFFCONVERT += --change-section-address .data-0x800000 -COFFCONVERT += --change-section-address .bss-0x800000 -COFFCONVERT += --change-section-address .noinit-0x800000 -COFFCONVERT += --change-section-address .eeprom-0x810000 - - - -coff: $(TARGET).elf - @echo - @echo $(MSG_COFF) $(TARGET).cof - $(COFFCONVERT) -O coff-avr $< $(TARGET).cof - - -extcoff: $(TARGET).elf - @echo - @echo $(MSG_EXTENDED_COFF) $(TARGET).cof - $(COFFCONVERT) -O coff-ext-avr $< $(TARGET).cof - - - -# Create final output files (.hex, .eep) from ELF output file. -%.hex: %.elf - @echo - @echo $(MSG_FLASH) $@ - $(OBJCOPY) -O $(FORMAT) -R .eeprom -R .fuse -R .lock $< $@ - -%.eep: %.elf - @echo - @echo $(MSG_EEPROM) $@ - -$(OBJCOPY) -j .eeprom --set-section-flags=.eeprom="alloc,load" \ - --change-section-lma .eeprom=0 --no-change-warnings -O $(FORMAT) $< $@ || exit 0 - -# Create extended listing file from ELF output file. -%.lss: %.elf - @echo - @echo $(MSG_EXTENDED_LISTING) $@ - $(OBJDUMP) -h -S -z $< > $@ - -# Create a symbol table from ELF output file. -%.sym: %.elf - @echo - @echo $(MSG_SYMBOL_TABLE) $@ - $(NM) -n $< > $@ - - - -# Create library from object files. -.SECONDARY : $(TARGET).a -.PRECIOUS : $(OBJ) -%.a: $(OBJ) - @echo - @echo $(MSG_CREATING_LIBRARY) $@ - $(AR) $@ $(OBJ) - - -# Link: create ELF output file from object files. -.SECONDARY : $(TARGET).elf -.PRECIOUS : $(OBJ) -%.elf: $(OBJ) - @echo - @echo $(MSG_LINKING) $@ - $(CC) $(ALL_CFLAGS) $^ --output $@ $(LDFLAGS) - - -# Compile: create object files from C source files. -$(OBJDIR)/%.o : %.c - @echo - @echo $(MSG_COMPILING) $< - $(CC) -c $(ALL_CFLAGS) $< -o $@ - - -# Compile: create object files from C++ source files. -$(OBJDIR)/%.o : %.cpp - @echo - @echo $(MSG_COMPILING_CPP) $< - $(CC) -c $(ALL_CPPFLAGS) $< -o $@ - - -# Compile: create assembler files from C source files. -%.s : %.c - $(CC) -S $(ALL_CFLAGS) $< -o $@ - - -# Compile: create assembler files from C++ source files. -%.s : %.cpp - $(CC) -S $(ALL_CPPFLAGS) $< -o $@ - - -# Assemble: create object files from assembler source files. -$(OBJDIR)/%.o : %.S - @echo - @echo $(MSG_ASSEMBLING) $< - $(CC) -c $(ALL_ASFLAGS) $< -o $@ - - -# Create preprocessed source for use in sending a bug report. -%.i : %.c - $(CC) -E -mmcu=$(MCU) -I. $(CFLAGS) $< -o $@ - - -# Target: clean project. -clean: begin clean_list clean_binary end - -clean_binary: - $(REMOVE) $(TARGET).hex - -clean_list: - @echo $(MSG_CLEANING) - $(REMOVE) $(TARGET).hex - $(REMOVE) $(TARGET).eep - $(REMOVE) $(TARGET).cof - $(REMOVE) $(TARGET).elf - $(REMOVE) $(TARGET).map - $(REMOVE) $(TARGET).sym - $(REMOVE) $(TARGET).lss - $(REMOVE) $(SRC:%.c=$(OBJDIR)/%.o) - $(REMOVE) $(SRC:%.c=$(OBJDIR)/%.lst) - $(REMOVE) $(SRC:.c=.s) - $(REMOVE) $(SRC:.c=.d) - $(REMOVE) $(SRC:.c=.i) - $(REMOVEDIR) .dep - -doxygen: - @echo Generating Project Documentation... - @doxygen Doxygen.conf - @echo Documentation Generation Complete. - -clean_doxygen: - rm -rf Documentation - -# Create object files directory -$(shell mkdir $(OBJDIR) 2>/dev/null) - - -# Include the dependency files. --include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*) - - -# Listing of phony targets. -.PHONY : all begin finish end sizebefore sizeafter gccversion \ -build elf hex eep lss sym coff extcoff doxygen clean \ -clean_list clean_doxygen program dfu flip flip-ee dfu-ee \ -debug gdb-config diff --git a/build/linux/work/hardware/arduino/firmwares/arduino-usbserial/readme.txt b/build/linux/work/hardware/arduino/firmwares/arduino-usbserial/readme.txt deleted file mode 100644 index 289326b13..000000000 --- a/build/linux/work/hardware/arduino/firmwares/arduino-usbserial/readme.txt +++ /dev/null @@ -1,13 +0,0 @@ -To setup the project and upload the Arduino usbserial application firmware to an ATMEGA8U2 using the Arduino USB DFU bootloader: -1. unpack the source into LUFA's Projects directory -2. set ARDUINO_MODEL_PID in the makefile as appropriate -3. do "make clean; make" -4. put the 8U2 into USB DFU mode: -4.a. assert and hold the 8U2's RESET line -4.b. assert and hold the 8U2's HWB line -4.c. release the 8U2's RESET line -4.d. release the 8U2's HWB line -5. confirm that the board enumerates as either "Arduino Uno DFU" or "Arduino Mega 2560 DFU" -6. do "make dfu" (OS X or Linux - dfu-programmer must be installed first) or "make flip" (Windows - Flip must be installed first) - -Check that the board enumerates as either "Arduino Uno" or "Arduino Mega 2560". Test by uploading a new Arduino sketch from the Arduino IDE. diff --git a/build/linux/work/hardware/arduino/programmers.txt b/build/linux/work/hardware/arduino/programmers.txt deleted file mode 100644 index c34b88cd2..000000000 --- a/build/linux/work/hardware/arduino/programmers.txt +++ /dev/null @@ -1,26 +0,0 @@ -# See: http://code.google.com/p/arduino/wiki/Platforms - -avrisp.name=AVR ISP -avrisp.communication=serial -avrisp.protocol=stk500v1 - -avrispmkii.name=AVRISP mkII -avrispmkii.communication=usb -avrispmkii.protocol=stk500v2 - -usbtinyisp.name=USBtinyISP -usbtinyisp.protocol=usbtiny - -usbasp.name=USBasp -usbasp.communication=usb -usbasp.protocol=usbasp - -parallel.name=Parallel Programmer -parallel.protocol=dapa -parallel.force=true -# parallel.delay=200 - -arduinoisp.name=Arduino as ISP -arduinoisp.communication=serial -arduinoisp.protocol=stk500v1 -arduinoisp.speed=19200 diff --git a/build/linux/work/hardware/arduino/variants/eightanaloginputs/pins_arduino.h b/build/linux/work/hardware/arduino/variants/eightanaloginputs/pins_arduino.h deleted file mode 100644 index 52b37efc4..000000000 --- a/build/linux/work/hardware/arduino/variants/eightanaloginputs/pins_arduino.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - pins_arduino.h - Pin definition functions for Arduino - Part of Arduino - http://www.arduino.cc/ - - Copyright (c) 2007 David A. Mellis - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General - Public License along with this library; if not, write to the - Free Software Foundation, Inc., 59 Temple Place, Suite 330, - Boston, MA 02111-1307 USA - - $Id: wiring.h 249 2007-02-03 16:52:51Z mellis $ -*/ - -#include "../standard/pins_arduino.h" -#undef NUM_ANALOG_INPUTS -#define NUM_ANALOG_INPUTS 8 diff --git a/build/linux/work/hardware/arduino/variants/leonardo/pins_arduino.h b/build/linux/work/hardware/arduino/variants/leonardo/pins_arduino.h deleted file mode 100644 index 753aa93bb..000000000 --- a/build/linux/work/hardware/arduino/variants/leonardo/pins_arduino.h +++ /dev/null @@ -1,253 +0,0 @@ -/* - pins_arduino.h - Pin definition functions for Arduino - Part of Arduino - http://www.arduino.cc/ - - Copyright (c) 2007 David A. Mellis - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General - Public License along with this library; if not, write to the - Free Software Foundation, Inc., 59 Temple Place, Suite 330, - Boston, MA 02111-1307 USA - - $Id: wiring.h 249 2007-02-03 16:52:51Z mellis $ -*/ - -#ifndef Pins_Arduino_h -#define Pins_Arduino_h - -#include - -#define ARDUINO_MODEL_USB_PID 0x0801 - -#define TX_RX_LED_INIT DDRD |= (1<<5), DDRB |= (1<<0) -#define TXLED0 PORTD |= (1<<5) -#define TXLED1 PORTD &= ~(1<<5) -#define RXLED0 PORTB |= (1<<0) -#define RXLED1 PORTB &= ~(1<<0) - -static const uint8_t SDA = 2; -static const uint8_t SCL = 3; - -// Map SPI port to 'new' pins D14..D17 -static const uint8_t SS = 17; -static const uint8_t MOSI = 16; -static const uint8_t MISO = 14; -static const uint8_t SCK = 15; - -// Mapping of analog pins as digital I/O -// A6-A11 share with digital pins -static const uint8_t A0 = 18; -static const uint8_t A1 = 19; -static const uint8_t A2 = 20; -static const uint8_t A3 = 21; -static const uint8_t A4 = 22; -static const uint8_t A5 = 23; -static const uint8_t A6 = 24; // D4 -static const uint8_t A7 = 25; // D6 -static const uint8_t A8 = 26; // D8 -static const uint8_t A9 = 27; // D9 -static const uint8_t A10 = 28; // D10 -static const uint8_t A11 = 29; // D12 - -// __AVR_ATmega32U4__ has an unusual mapping of pins to channels -extern const uint8_t PROGMEM analog_pin_to_channel_PGM[]; -#define analogPinToChannel(P) ( pgm_read_byte( analog_pin_to_channel_PGM + (P) ) ) - -#ifdef ARDUINO_MAIN - -// On the Arduino board, digital pins are also used -// for the analog output (software PWM). Analog input -// pins are a separate set. - -// ATMEL ATMEGA32U4 / ARDUINO LEONARDO -// -// D0 PD2 RXD1/INT2 -// D1 PD3 TXD1/INT3 -// D2 PD1 SDA SDA/INT1 -// D3# PD0 PWM8/SCL OC0B/SCL/INT0 -// D4 A6 PD4 ADC8 -// D5# PC6 ??? OC3A/#OC4A -// D6# A7 PD7 FastPWM #OC4D/ADC10 -// D7 PE6 INT6/AIN0 -// -// D8 A8 PB4 ADC11/PCINT4 -// D9# A9 PB5 PWM16 OC1A/#OC4B/ADC12/PCINT5 -// D10# A10 PB6 PWM16 OC1B/0c4B/ADC13/PCINT6 -// D11# PB7 PWM8/16 0C0A/OC1C/#RTS/PCINT7 -// D12 A11 PD6 T1/#OC4D/ADC9 -// D13# PC7 PWM10 CLK0/OC4A -// -// A0 D18 PF7 ADC7 -// A1 D19 PF6 ADC6 -// A2 D20 PF5 ADC5 -// A3 D21 PF4 ADC4 -// A4 D22 PF1 ADC1 -// A5 D23 PF0 ADC0 -// -// New pins D14..D17 to map SPI port to digital pins -// -// MISO D14 PB3 MISO,PCINT3 -// SCK D15 PB1 SCK,PCINT1 -// MOSI D16 PB2 MOSI,PCINT2 -// SS D17 PB0 RXLED,SS/PCINT0 -// -// TXLED PD5 -// RXLED PB0 -// HWB PE2 HWB - -// these arrays map port names (e.g. port B) to the -// appropriate addresses for various functions (e.g. reading -// and writing) -const uint16_t PROGMEM port_to_mode_PGM[] = { - NOT_A_PORT, - NOT_A_PORT, - (uint16_t) &DDRB, - (uint16_t) &DDRC, - (uint16_t) &DDRD, - (uint16_t) &DDRE, - (uint16_t) &DDRF, -}; - -const uint16_t PROGMEM port_to_output_PGM[] = { - NOT_A_PORT, - NOT_A_PORT, - (uint16_t) &PORTB, - (uint16_t) &PORTC, - (uint16_t) &PORTD, - (uint16_t) &PORTE, - (uint16_t) &PORTF, -}; - -const uint16_t PROGMEM port_to_input_PGM[] = { - NOT_A_PORT, - NOT_A_PORT, - (uint16_t) &PINB, - (uint16_t) &PINC, - (uint16_t) &PIND, - (uint16_t) &PINE, - (uint16_t) &PINF, -}; - -const uint8_t PROGMEM digital_pin_to_port_PGM[30] = { - PD, // D0 - PD2 - PD, // D1 - PD3 - PD, // D2 - PD1 - PD, // D3 - PD0 - PD, // D4 - PD4 - PC, // D5 - PC6 - PD, // D6 - PD7 - PE, // D7 - PE6 - - PB, // D8 - PB4 - PB, // D9 - PB5 - PB, // D10 - PB6 - PB, // D11 - PB7 - PD, // D12 - PD6 - PC, // D13 - PC7 - - PB, // D14 - MISO - PB3 - PB, // D15 - SCK - PB1 - PB, // D16 - MOSI - PB2 - PB, // D17 - SS - PB0 - - PF, // D18 - A0 - PF7 - PF, // D19 - A1 - PF6 - PF, // D20 - A2 - PF5 - PF, // D21 - A3 - PF4 - PF, // D22 - A4 - PF1 - PF, // D23 - A5 - PF0 - - PD, // D24 / D4 - A6 - PD4 - PD, // D25 / D6 - A7 - PD7 - PB, // D26 / D8 - A8 - PB4 - PB, // D27 / D9 - A9 - PB5 - PB, // D28 / D10 - A10 - PB6 - PD, // D29 / D12 - A11 - PD6 -}; - -const uint8_t PROGMEM digital_pin_to_bit_mask_PGM[30] = { - _BV(2), // D0 - PD2 - _BV(3), // D1 - PD3 - _BV(1), // D2 - PD1 - _BV(0), // D3 - PD0 - _BV(4), // D4 - PD4 - _BV(6), // D5 - PC6 - _BV(7), // D6 - PD7 - _BV(6), // D7 - PE6 - - _BV(4), // D8 - PB4 - _BV(5), // D9 - PB5 - _BV(6), // D10 - PB6 - _BV(7), // D11 - PB7 - _BV(6), // D12 - PD6 - _BV(7), // D13 - PC7 - - _BV(3), // D14 - MISO - PB3 - _BV(1), // D15 - SCK - PB1 - _BV(2), // D16 - MOSI - PB2 - _BV(0), // D17 - SS - PB0 - - _BV(7), // D18 - A0 - PF7 - _BV(6), // D19 - A1 - PF6 - _BV(5), // D20 - A2 - PF5 - _BV(4), // D21 - A3 - PF4 - _BV(1), // D22 - A4 - PF1 - _BV(0), // D23 - A5 - PF0 - - _BV(4), // D24 / D4 - A6 - PD4 - _BV(7), // D25 / D6 - A7 - PD7 - _BV(4), // D26 / D8 - A8 - PB4 - _BV(5), // D27 / D9 - A9 - PB5 - _BV(6), // D28 / D10 - A10 - PB6 - _BV(6), // D29 / D12 - A11 - PD6 -}; - -const uint8_t PROGMEM digital_pin_to_timer_PGM[16] = { - NOT_ON_TIMER, - NOT_ON_TIMER, - NOT_ON_TIMER, - TIMER0B, /* 3 */ - NOT_ON_TIMER, - TIMER3A, /* 5 */ - TIMER4D, /* 6 */ - NOT_ON_TIMER, - - NOT_ON_TIMER, - TIMER1A, /* 9 */ - TIMER1B, /* 10 */ - TIMER0A, /* 11 */ - - NOT_ON_TIMER, - TIMER4A, /* 13 */ - - NOT_ON_TIMER, - NOT_ON_TIMER, -}; - -const uint8_t PROGMEM analog_pin_to_channel_PGM[12] = { - 7, // A0 PF7 ADC7 - 6, // A1 PF6 ADC6 - 5, // A2 PF5 ADC5 - 4, // A3 PF4 ADC4 - 1, // A4 PF1 ADC1 - 0, // A5 PF0 ADC0 - 8, // A6 D4 PD4 ADC8 - 10, // A7 D6 PD7 ADC10 - 11, // A8 D8 PB4 ADC11 - 12, // A9 D9 PB5 ADC12 - 13, // A10 D10 PB6 ADC13 - 9 // A11 D12 PD6 ADC9 -}; - -#endif /* ARDUINO_MAIN */ -#endif /* Pins_Arduino_h */ diff --git a/build/linux/work/hardware/arduino/variants/mega/pins_arduino.h b/build/linux/work/hardware/arduino/variants/mega/pins_arduino.h deleted file mode 100644 index 5a9b4cb09..000000000 --- a/build/linux/work/hardware/arduino/variants/mega/pins_arduino.h +++ /dev/null @@ -1,363 +0,0 @@ -/* - pins_arduino.h - Pin definition functions for Arduino - Part of Arduino - http://www.arduino.cc/ - - Copyright (c) 2007 David A. Mellis - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General - Public License along with this library; if not, write to the - Free Software Foundation, Inc., 59 Temple Place, Suite 330, - Boston, MA 02111-1307 USA - - $Id: wiring.h 249 2007-02-03 16:52:51Z mellis $ -*/ - -#ifndef Pins_Arduino_h -#define Pins_Arduino_h - -#include - -#define NUM_DIGITAL_PINS 70 -#define NUM_ANALOG_INPUTS 16 -#define analogInputToDigitalPin(p) ((p < 16) ? (p) + 54 : -1) -#define digitalPinHasPWM(p) (((p) >= 2 && (p) <= 13) || ((p) >= 44 && (p)<= 46)) - -static const uint8_t SS = 53; -static const uint8_t MOSI = 51; -static const uint8_t MISO = 50; -static const uint8_t SCK = 52; - -static const uint8_t SDA = 20; -static const uint8_t SCL = 21; -static const uint8_t LED_BUILTIN = 13; - -static const uint8_t A0 = 54; -static const uint8_t A1 = 55; -static const uint8_t A2 = 56; -static const uint8_t A3 = 57; -static const uint8_t A4 = 58; -static const uint8_t A5 = 59; -static const uint8_t A6 = 60; -static const uint8_t A7 = 61; -static const uint8_t A8 = 62; -static const uint8_t A9 = 63; -static const uint8_t A10 = 64; -static const uint8_t A11 = 65; -static const uint8_t A12 = 66; -static const uint8_t A13 = 67; -static const uint8_t A14 = 68; -static const uint8_t A15 = 69; - -// A majority of the pins are NOT PCINTs, SO BE WARNED (i.e. you cannot use them as receive pins) -// Only pins available for RECEIVE (TRANSMIT can be on any pin): -// (I've deliberately left out pin mapping to the Hardware USARTs - seems senseless to me) -// Pins: 10, 11, 12, 13, 50, 51, 52, 53, 62, 63, 64, 65, 66, 67, 68, 69 - -#define digitalPinToPCICR(p) ( (((p) >= 10) && ((p) <= 13)) || \ - (((p) >= 50) && ((p) <= 53)) || \ - (((p) >= 62) && ((p) <= 69)) ? (&PCICR) : ((uint8_t *)0) ) - -#define digitalPinToPCICRbit(p) ( (((p) >= 10) && ((p) <= 13)) || (((p) >= 50) && ((p) <= 53)) ? 0 : \ - ( (((p) >= 62) && ((p) <= 69)) ? 2 : \ - 0 ) ) - -#define digitalPinToPCMSK(p) ( (((p) >= 10) && ((p) <= 13)) || (((p) >= 50) && ((p) <= 53)) ? (&PCMSK0) : \ - ( (((p) >= 62) && ((p) <= 69)) ? (&PCMSK2) : \ - ((uint8_t *)0) ) ) - -#define digitalPinToPCMSKbit(p) ( (((p) >= 10) && ((p) <= 13)) ? ((p) - 6) : \ - ( ((p) == 50) ? 3 : \ - ( ((p) == 51) ? 2 : \ - ( ((p) == 52) ? 1 : \ - ( ((p) == 53) ? 0 : \ - ( (((p) >= 62) && ((p) <= 69)) ? ((p) - 62) : \ - 0 ) ) ) ) ) ) - -#ifdef ARDUINO_MAIN - -const uint16_t PROGMEM port_to_mode_PGM[] = { - NOT_A_PORT, - (uint16_t) &DDRA, - (uint16_t) &DDRB, - (uint16_t) &DDRC, - (uint16_t) &DDRD, - (uint16_t) &DDRE, - (uint16_t) &DDRF, - (uint16_t) &DDRG, - (uint16_t) &DDRH, - NOT_A_PORT, - (uint16_t) &DDRJ, - (uint16_t) &DDRK, - (uint16_t) &DDRL, -}; - -const uint16_t PROGMEM port_to_output_PGM[] = { - NOT_A_PORT, - (uint16_t) &PORTA, - (uint16_t) &PORTB, - (uint16_t) &PORTC, - (uint16_t) &PORTD, - (uint16_t) &PORTE, - (uint16_t) &PORTF, - (uint16_t) &PORTG, - (uint16_t) &PORTH, - NOT_A_PORT, - (uint16_t) &PORTJ, - (uint16_t) &PORTK, - (uint16_t) &PORTL, -}; - -const uint16_t PROGMEM port_to_input_PGM[] = { - NOT_A_PIN, - (uint16_t) &PINA, - (uint16_t) &PINB, - (uint16_t) &PINC, - (uint16_t) &PIND, - (uint16_t) &PINE, - (uint16_t) &PINF, - (uint16_t) &PING, - (uint16_t) &PINH, - NOT_A_PIN, - (uint16_t) &PINJ, - (uint16_t) &PINK, - (uint16_t) &PINL, -}; - -const uint8_t PROGMEM digital_pin_to_port_PGM[] = { - // PORTLIST - // ------------------------------------------- - PE , // PE 0 ** 0 ** USART0_RX - PE , // PE 1 ** 1 ** USART0_TX - PE , // PE 4 ** 2 ** PWM2 - PE , // PE 5 ** 3 ** PWM3 - PG , // PG 5 ** 4 ** PWM4 - PE , // PE 3 ** 5 ** PWM5 - PH , // PH 3 ** 6 ** PWM6 - PH , // PH 4 ** 7 ** PWM7 - PH , // PH 5 ** 8 ** PWM8 - PH , // PH 6 ** 9 ** PWM9 - PB , // PB 4 ** 10 ** PWM10 - PB , // PB 5 ** 11 ** PWM11 - PB , // PB 6 ** 12 ** PWM12 - PB , // PB 7 ** 13 ** PWM13 - PJ , // PJ 1 ** 14 ** USART3_TX - PJ , // PJ 0 ** 15 ** USART3_RX - PH , // PH 1 ** 16 ** USART2_TX - PH , // PH 0 ** 17 ** USART2_RX - PD , // PD 3 ** 18 ** USART1_TX - PD , // PD 2 ** 19 ** USART1_RX - PD , // PD 1 ** 20 ** I2C_SDA - PD , // PD 0 ** 21 ** I2C_SCL - PA , // PA 0 ** 22 ** D22 - PA , // PA 1 ** 23 ** D23 - PA , // PA 2 ** 24 ** D24 - PA , // PA 3 ** 25 ** D25 - PA , // PA 4 ** 26 ** D26 - PA , // PA 5 ** 27 ** D27 - PA , // PA 6 ** 28 ** D28 - PA , // PA 7 ** 29 ** D29 - PC , // PC 7 ** 30 ** D30 - PC , // PC 6 ** 31 ** D31 - PC , // PC 5 ** 32 ** D32 - PC , // PC 4 ** 33 ** D33 - PC , // PC 3 ** 34 ** D34 - PC , // PC 2 ** 35 ** D35 - PC , // PC 1 ** 36 ** D36 - PC , // PC 0 ** 37 ** D37 - PD , // PD 7 ** 38 ** D38 - PG , // PG 2 ** 39 ** D39 - PG , // PG 1 ** 40 ** D40 - PG , // PG 0 ** 41 ** D41 - PL , // PL 7 ** 42 ** D42 - PL , // PL 6 ** 43 ** D43 - PL , // PL 5 ** 44 ** D44 - PL , // PL 4 ** 45 ** D45 - PL , // PL 3 ** 46 ** D46 - PL , // PL 2 ** 47 ** D47 - PL , // PL 1 ** 48 ** D48 - PL , // PL 0 ** 49 ** D49 - PB , // PB 3 ** 50 ** SPI_MISO - PB , // PB 2 ** 51 ** SPI_MOSI - PB , // PB 1 ** 52 ** SPI_SCK - PB , // PB 0 ** 53 ** SPI_SS - PF , // PF 0 ** 54 ** A0 - PF , // PF 1 ** 55 ** A1 - PF , // PF 2 ** 56 ** A2 - PF , // PF 3 ** 57 ** A3 - PF , // PF 4 ** 58 ** A4 - PF , // PF 5 ** 59 ** A5 - PF , // PF 6 ** 60 ** A6 - PF , // PF 7 ** 61 ** A7 - PK , // PK 0 ** 62 ** A8 - PK , // PK 1 ** 63 ** A9 - PK , // PK 2 ** 64 ** A10 - PK , // PK 3 ** 65 ** A11 - PK , // PK 4 ** 66 ** A12 - PK , // PK 5 ** 67 ** A13 - PK , // PK 6 ** 68 ** A14 - PK , // PK 7 ** 69 ** A15 -}; - -const uint8_t PROGMEM digital_pin_to_bit_mask_PGM[] = { - // PIN IN PORT - // ------------------------------------------- - _BV( 0 ) , // PE 0 ** 0 ** USART0_RX - _BV( 1 ) , // PE 1 ** 1 ** USART0_TX - _BV( 4 ) , // PE 4 ** 2 ** PWM2 - _BV( 5 ) , // PE 5 ** 3 ** PWM3 - _BV( 5 ) , // PG 5 ** 4 ** PWM4 - _BV( 3 ) , // PE 3 ** 5 ** PWM5 - _BV( 3 ) , // PH 3 ** 6 ** PWM6 - _BV( 4 ) , // PH 4 ** 7 ** PWM7 - _BV( 5 ) , // PH 5 ** 8 ** PWM8 - _BV( 6 ) , // PH 6 ** 9 ** PWM9 - _BV( 4 ) , // PB 4 ** 10 ** PWM10 - _BV( 5 ) , // PB 5 ** 11 ** PWM11 - _BV( 6 ) , // PB 6 ** 12 ** PWM12 - _BV( 7 ) , // PB 7 ** 13 ** PWM13 - _BV( 1 ) , // PJ 1 ** 14 ** USART3_TX - _BV( 0 ) , // PJ 0 ** 15 ** USART3_RX - _BV( 1 ) , // PH 1 ** 16 ** USART2_TX - _BV( 0 ) , // PH 0 ** 17 ** USART2_RX - _BV( 3 ) , // PD 3 ** 18 ** USART1_TX - _BV( 2 ) , // PD 2 ** 19 ** USART1_RX - _BV( 1 ) , // PD 1 ** 20 ** I2C_SDA - _BV( 0 ) , // PD 0 ** 21 ** I2C_SCL - _BV( 0 ) , // PA 0 ** 22 ** D22 - _BV( 1 ) , // PA 1 ** 23 ** D23 - _BV( 2 ) , // PA 2 ** 24 ** D24 - _BV( 3 ) , // PA 3 ** 25 ** D25 - _BV( 4 ) , // PA 4 ** 26 ** D26 - _BV( 5 ) , // PA 5 ** 27 ** D27 - _BV( 6 ) , // PA 6 ** 28 ** D28 - _BV( 7 ) , // PA 7 ** 29 ** D29 - _BV( 7 ) , // PC 7 ** 30 ** D30 - _BV( 6 ) , // PC 6 ** 31 ** D31 - _BV( 5 ) , // PC 5 ** 32 ** D32 - _BV( 4 ) , // PC 4 ** 33 ** D33 - _BV( 3 ) , // PC 3 ** 34 ** D34 - _BV( 2 ) , // PC 2 ** 35 ** D35 - _BV( 1 ) , // PC 1 ** 36 ** D36 - _BV( 0 ) , // PC 0 ** 37 ** D37 - _BV( 7 ) , // PD 7 ** 38 ** D38 - _BV( 2 ) , // PG 2 ** 39 ** D39 - _BV( 1 ) , // PG 1 ** 40 ** D40 - _BV( 0 ) , // PG 0 ** 41 ** D41 - _BV( 7 ) , // PL 7 ** 42 ** D42 - _BV( 6 ) , // PL 6 ** 43 ** D43 - _BV( 5 ) , // PL 5 ** 44 ** D44 - _BV( 4 ) , // PL 4 ** 45 ** D45 - _BV( 3 ) , // PL 3 ** 46 ** D46 - _BV( 2 ) , // PL 2 ** 47 ** D47 - _BV( 1 ) , // PL 1 ** 48 ** D48 - _BV( 0 ) , // PL 0 ** 49 ** D49 - _BV( 3 ) , // PB 3 ** 50 ** SPI_MISO - _BV( 2 ) , // PB 2 ** 51 ** SPI_MOSI - _BV( 1 ) , // PB 1 ** 52 ** SPI_SCK - _BV( 0 ) , // PB 0 ** 53 ** SPI_SS - _BV( 0 ) , // PF 0 ** 54 ** A0 - _BV( 1 ) , // PF 1 ** 55 ** A1 - _BV( 2 ) , // PF 2 ** 56 ** A2 - _BV( 3 ) , // PF 3 ** 57 ** A3 - _BV( 4 ) , // PF 4 ** 58 ** A4 - _BV( 5 ) , // PF 5 ** 59 ** A5 - _BV( 6 ) , // PF 6 ** 60 ** A6 - _BV( 7 ) , // PF 7 ** 61 ** A7 - _BV( 0 ) , // PK 0 ** 62 ** A8 - _BV( 1 ) , // PK 1 ** 63 ** A9 - _BV( 2 ) , // PK 2 ** 64 ** A10 - _BV( 3 ) , // PK 3 ** 65 ** A11 - _BV( 4 ) , // PK 4 ** 66 ** A12 - _BV( 5 ) , // PK 5 ** 67 ** A13 - _BV( 6 ) , // PK 6 ** 68 ** A14 - _BV( 7 ) , // PK 7 ** 69 ** A15 -}; - -const uint8_t PROGMEM digital_pin_to_timer_PGM[] = { - // TIMERS - // ------------------------------------------- - NOT_ON_TIMER , // PE 0 ** 0 ** USART0_RX - NOT_ON_TIMER , // PE 1 ** 1 ** USART0_TX - TIMER3B , // PE 4 ** 2 ** PWM2 - TIMER3C , // PE 5 ** 3 ** PWM3 - TIMER0B , // PG 5 ** 4 ** PWM4 - TIMER3A , // PE 3 ** 5 ** PWM5 - TIMER4A , // PH 3 ** 6 ** PWM6 - TIMER4B , // PH 4 ** 7 ** PWM7 - TIMER4C , // PH 5 ** 8 ** PWM8 - TIMER2B , // PH 6 ** 9 ** PWM9 - TIMER2A , // PB 4 ** 10 ** PWM10 - TIMER1A , // PB 5 ** 11 ** PWM11 - TIMER1B , // PB 6 ** 12 ** PWM12 - TIMER0A , // PB 7 ** 13 ** PWM13 - NOT_ON_TIMER , // PJ 1 ** 14 ** USART3_TX - NOT_ON_TIMER , // PJ 0 ** 15 ** USART3_RX - NOT_ON_TIMER , // PH 1 ** 16 ** USART2_TX - NOT_ON_TIMER , // PH 0 ** 17 ** USART2_RX - NOT_ON_TIMER , // PD 3 ** 18 ** USART1_TX - NOT_ON_TIMER , // PD 2 ** 19 ** USART1_RX - NOT_ON_TIMER , // PD 1 ** 20 ** I2C_SDA - NOT_ON_TIMER , // PD 0 ** 21 ** I2C_SCL - NOT_ON_TIMER , // PA 0 ** 22 ** D22 - NOT_ON_TIMER , // PA 1 ** 23 ** D23 - NOT_ON_TIMER , // PA 2 ** 24 ** D24 - NOT_ON_TIMER , // PA 3 ** 25 ** D25 - NOT_ON_TIMER , // PA 4 ** 26 ** D26 - NOT_ON_TIMER , // PA 5 ** 27 ** D27 - NOT_ON_TIMER , // PA 6 ** 28 ** D28 - NOT_ON_TIMER , // PA 7 ** 29 ** D29 - NOT_ON_TIMER , // PC 7 ** 30 ** D30 - NOT_ON_TIMER , // PC 6 ** 31 ** D31 - NOT_ON_TIMER , // PC 5 ** 32 ** D32 - NOT_ON_TIMER , // PC 4 ** 33 ** D33 - NOT_ON_TIMER , // PC 3 ** 34 ** D34 - NOT_ON_TIMER , // PC 2 ** 35 ** D35 - NOT_ON_TIMER , // PC 1 ** 36 ** D36 - NOT_ON_TIMER , // PC 0 ** 37 ** D37 - NOT_ON_TIMER , // PD 7 ** 38 ** D38 - NOT_ON_TIMER , // PG 2 ** 39 ** D39 - NOT_ON_TIMER , // PG 1 ** 40 ** D40 - NOT_ON_TIMER , // PG 0 ** 41 ** D41 - NOT_ON_TIMER , // PL 7 ** 42 ** D42 - NOT_ON_TIMER , // PL 6 ** 43 ** D43 - TIMER5C , // PL 5 ** 44 ** D44 - TIMER5B , // PL 4 ** 45 ** D45 - TIMER5A , // PL 3 ** 46 ** D46 - NOT_ON_TIMER , // PL 2 ** 47 ** D47 - NOT_ON_TIMER , // PL 1 ** 48 ** D48 - NOT_ON_TIMER , // PL 0 ** 49 ** D49 - NOT_ON_TIMER , // PB 3 ** 50 ** SPI_MISO - NOT_ON_TIMER , // PB 2 ** 51 ** SPI_MOSI - NOT_ON_TIMER , // PB 1 ** 52 ** SPI_SCK - NOT_ON_TIMER , // PB 0 ** 53 ** SPI_SS - NOT_ON_TIMER , // PF 0 ** 54 ** A0 - NOT_ON_TIMER , // PF 1 ** 55 ** A1 - NOT_ON_TIMER , // PF 2 ** 56 ** A2 - NOT_ON_TIMER , // PF 3 ** 57 ** A3 - NOT_ON_TIMER , // PF 4 ** 58 ** A4 - NOT_ON_TIMER , // PF 5 ** 59 ** A5 - NOT_ON_TIMER , // PF 6 ** 60 ** A6 - NOT_ON_TIMER , // PF 7 ** 61 ** A7 - NOT_ON_TIMER , // PK 0 ** 62 ** A8 - NOT_ON_TIMER , // PK 1 ** 63 ** A9 - NOT_ON_TIMER , // PK 2 ** 64 ** A10 - NOT_ON_TIMER , // PK 3 ** 65 ** A11 - NOT_ON_TIMER , // PK 4 ** 66 ** A12 - NOT_ON_TIMER , // PK 5 ** 67 ** A13 - NOT_ON_TIMER , // PK 6 ** 68 ** A14 - NOT_ON_TIMER , // PK 7 ** 69 ** A15 -}; - -#endif - -#endif \ No newline at end of file diff --git a/build/linux/work/hardware/arduino/variants/micro/pins_arduino.h b/build/linux/work/hardware/arduino/variants/micro/pins_arduino.h deleted file mode 100644 index c9f25eb12..000000000 --- a/build/linux/work/hardware/arduino/variants/micro/pins_arduino.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - pins_arduino.h - Pin definition functions for Arduino - Part of Arduino - http://www.arduino.cc/ - - Copyright (c) 2007 David A. Mellis - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General - Public License along with this library; if not, write to the - Free Software Foundation, Inc., 59 Temple Place, Suite 330, - Boston, MA 02111-1307 USA - - $Id: wiring.h 249 2007-02-03 16:52:51Z mellis $ -*/ - -#include "../leonardo/pins_arduino.h" -#undef ARDUINO_MODEL_USB_PID -#define ARDUINO_MODEL_USB_PID 0x0035 \ No newline at end of file diff --git a/build/linux/work/hardware/arduino/variants/standard/pins_arduino.h b/build/linux/work/hardware/arduino/variants/standard/pins_arduino.h deleted file mode 100644 index 30b426630..000000000 --- a/build/linux/work/hardware/arduino/variants/standard/pins_arduino.h +++ /dev/null @@ -1,218 +0,0 @@ -/* - pins_arduino.h - Pin definition functions for Arduino - Part of Arduino - http://www.arduino.cc/ - - Copyright (c) 2007 David A. Mellis - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General - Public License along with this library; if not, write to the - Free Software Foundation, Inc., 59 Temple Place, Suite 330, - Boston, MA 02111-1307 USA - - $Id: wiring.h 249 2007-02-03 16:52:51Z mellis $ -*/ - -#ifndef Pins_Arduino_h -#define Pins_Arduino_h - -#include - -#define NUM_DIGITAL_PINS 20 -#define NUM_ANALOG_INPUTS 6 -#define analogInputToDigitalPin(p) ((p < 6) ? (p) + 14 : -1) - -#if defined(__AVR_ATmega8__) -#define digitalPinHasPWM(p) ((p) == 9 || (p) == 10 || (p) == 11) -#else -#define digitalPinHasPWM(p) ((p) == 3 || (p) == 5 || (p) == 6 || (p) == 9 || (p) == 10 || (p) == 11) -#endif - -static const uint8_t SS = 10; -static const uint8_t MOSI = 11; -static const uint8_t MISO = 12; -static const uint8_t SCK = 13; - -static const uint8_t SDA = 18; -static const uint8_t SCL = 19; -static const uint8_t LED_BUILTIN = 13; - -static const uint8_t A0 = 14; -static const uint8_t A1 = 15; -static const uint8_t A2 = 16; -static const uint8_t A3 = 17; -static const uint8_t A4 = 18; -static const uint8_t A5 = 19; -static const uint8_t A6 = 20; -static const uint8_t A7 = 21; - -#define digitalPinToPCICR(p) (((p) >= 0 && (p) <= 21) ? (&PCICR) : ((uint8_t *)0)) -#define digitalPinToPCICRbit(p) (((p) <= 7) ? 2 : (((p) <= 13) ? 0 : 1)) -#define digitalPinToPCMSK(p) (((p) <= 7) ? (&PCMSK2) : (((p) <= 13) ? (&PCMSK0) : (((p) <= 21) ? (&PCMSK1) : ((uint8_t *)0)))) -#define digitalPinToPCMSKbit(p) (((p) <= 7) ? (p) : (((p) <= 13) ? ((p) - 8) : ((p) - 14))) - -#ifdef ARDUINO_MAIN - -// On the Arduino board, digital pins are also used -// for the analog output (software PWM). Analog input -// pins are a separate set. - -// ATMEL ATMEGA8 & 168 / ARDUINO -// -// +-\/-+ -// PC6 1| |28 PC5 (AI 5) -// (D 0) PD0 2| |27 PC4 (AI 4) -// (D 1) PD1 3| |26 PC3 (AI 3) -// (D 2) PD2 4| |25 PC2 (AI 2) -// PWM+ (D 3) PD3 5| |24 PC1 (AI 1) -// (D 4) PD4 6| |23 PC0 (AI 0) -// VCC 7| |22 GND -// GND 8| |21 AREF -// PB6 9| |20 AVCC -// PB7 10| |19 PB5 (D 13) -// PWM+ (D 5) PD5 11| |18 PB4 (D 12) -// PWM+ (D 6) PD6 12| |17 PB3 (D 11) PWM -// (D 7) PD7 13| |16 PB2 (D 10) PWM -// (D 8) PB0 14| |15 PB1 (D 9) PWM -// +----+ -// -// (PWM+ indicates the additional PWM pins on the ATmega168.) - -// ATMEL ATMEGA1280 / ARDUINO -// -// 0-7 PE0-PE7 works -// 8-13 PB0-PB5 works -// 14-21 PA0-PA7 works -// 22-29 PH0-PH7 works -// 30-35 PG5-PG0 works -// 36-43 PC7-PC0 works -// 44-51 PJ7-PJ0 works -// 52-59 PL7-PL0 works -// 60-67 PD7-PD0 works -// A0-A7 PF0-PF7 -// A8-A15 PK0-PK7 - - -// these arrays map port names (e.g. port B) to the -// appropriate addresses for various functions (e.g. reading -// and writing) -const uint16_t PROGMEM port_to_mode_PGM[] = { - NOT_A_PORT, - NOT_A_PORT, - (uint16_t) &DDRB, - (uint16_t) &DDRC, - (uint16_t) &DDRD, -}; - -const uint16_t PROGMEM port_to_output_PGM[] = { - NOT_A_PORT, - NOT_A_PORT, - (uint16_t) &PORTB, - (uint16_t) &PORTC, - (uint16_t) &PORTD, -}; - -const uint16_t PROGMEM port_to_input_PGM[] = { - NOT_A_PORT, - NOT_A_PORT, - (uint16_t) &PINB, - (uint16_t) &PINC, - (uint16_t) &PIND, -}; - -const uint8_t PROGMEM digital_pin_to_port_PGM[] = { - PD, /* 0 */ - PD, - PD, - PD, - PD, - PD, - PD, - PD, - PB, /* 8 */ - PB, - PB, - PB, - PB, - PB, - PC, /* 14 */ - PC, - PC, - PC, - PC, - PC, -}; - -const uint8_t PROGMEM digital_pin_to_bit_mask_PGM[] = { - _BV(0), /* 0, port D */ - _BV(1), - _BV(2), - _BV(3), - _BV(4), - _BV(5), - _BV(6), - _BV(7), - _BV(0), /* 8, port B */ - _BV(1), - _BV(2), - _BV(3), - _BV(4), - _BV(5), - _BV(0), /* 14, port C */ - _BV(1), - _BV(2), - _BV(3), - _BV(4), - _BV(5), -}; - -const uint8_t PROGMEM digital_pin_to_timer_PGM[] = { - NOT_ON_TIMER, /* 0 - port D */ - NOT_ON_TIMER, - NOT_ON_TIMER, - // on the ATmega168, digital pin 3 has hardware pwm -#if defined(__AVR_ATmega8__) - NOT_ON_TIMER, -#else - TIMER2B, -#endif - NOT_ON_TIMER, - // on the ATmega168, digital pins 5 and 6 have hardware pwm -#if defined(__AVR_ATmega8__) - NOT_ON_TIMER, - NOT_ON_TIMER, -#else - TIMER0B, - TIMER0A, -#endif - NOT_ON_TIMER, - NOT_ON_TIMER, /* 8 - port B */ - TIMER1A, - TIMER1B, -#if defined(__AVR_ATmega8__) - TIMER2, -#else - TIMER2A, -#endif - NOT_ON_TIMER, - NOT_ON_TIMER, - NOT_ON_TIMER, - NOT_ON_TIMER, /* 14 - port C */ - NOT_ON_TIMER, - NOT_ON_TIMER, - NOT_ON_TIMER, - NOT_ON_TIMER, -}; - -#endif - -#endif diff --git a/build/linux/work/hardware/tools/avr/bin.gcc/avr-cpp b/build/linux/work/hardware/tools/avr/bin.gcc/avr-cpp deleted file mode 100755 index bdf79f62a..000000000 Binary files a/build/linux/work/hardware/tools/avr/bin.gcc/avr-cpp and /dev/null differ diff --git a/build/linux/work/hardware/tools/avr/bin.gcc/avr-g++ b/build/linux/work/hardware/tools/avr/bin.gcc/avr-g++ deleted file mode 100755 index 6a09b25e2..000000000 Binary files a/build/linux/work/hardware/tools/avr/bin.gcc/avr-g++ and /dev/null differ diff --git a/build/linux/work/hardware/tools/avr/bin.gcc/avr-gcc b/build/linux/work/hardware/tools/avr/bin.gcc/avr-gcc deleted file mode 100755 index 5668e7ada..000000000 Binary files a/build/linux/work/hardware/tools/avr/bin.gcc/avr-gcc and /dev/null differ diff --git a/build/linux/work/hardware/tools/avr/bin/avr-addr2line b/build/linux/work/hardware/tools/avr/bin/avr-addr2line deleted file mode 100755 index 9b13a04a7..000000000 Binary files a/build/linux/work/hardware/tools/avr/bin/avr-addr2line and /dev/null differ diff --git a/build/linux/work/hardware/tools/avr/bin/avr-ar b/build/linux/work/hardware/tools/avr/bin/avr-ar deleted file mode 100755 index ffbccd04e..000000000 Binary files a/build/linux/work/hardware/tools/avr/bin/avr-ar and /dev/null differ diff --git a/build/linux/work/hardware/tools/avr/bin/avr-as b/build/linux/work/hardware/tools/avr/bin/avr-as deleted file mode 100755 index 2d39ec667..000000000 Binary files a/build/linux/work/hardware/tools/avr/bin/avr-as and /dev/null differ diff --git a/build/linux/work/hardware/tools/avr/bin/avr-c++ b/build/linux/work/hardware/tools/avr/bin/avr-c++ deleted file mode 120000 index 8d64688b2..000000000 --- a/build/linux/work/hardware/tools/avr/bin/avr-c++ +++ /dev/null @@ -1 +0,0 @@ -avr-g++ \ No newline at end of file diff --git a/build/linux/work/hardware/tools/avr/bin/avr-c++filt b/build/linux/work/hardware/tools/avr/bin/avr-c++filt deleted file mode 100755 index a33b90428..000000000 Binary files a/build/linux/work/hardware/tools/avr/bin/avr-c++filt and /dev/null differ diff --git a/build/linux/work/hardware/tools/avr/bin/avr-cpp b/build/linux/work/hardware/tools/avr/bin/avr-cpp deleted file mode 100755 index be49cffa5..000000000 --- a/build/linux/work/hardware/tools/avr/bin/avr-cpp +++ /dev/null @@ -1,3 +0,0 @@ -#!/bin/bash -export LD_LIBRARY_PATH="`dirname "$0"`/../lib" -exec -a "$0" "`dirname "$0"`/../bin.gcc/avr-cpp" "$@" diff --git a/build/linux/work/hardware/tools/avr/bin/avr-g++ b/build/linux/work/hardware/tools/avr/bin/avr-g++ deleted file mode 100755 index a62a5a1d2..000000000 --- a/build/linux/work/hardware/tools/avr/bin/avr-g++ +++ /dev/null @@ -1,3 +0,0 @@ -#!/bin/bash -export LD_LIBRARY_PATH="`dirname "$0"`/../lib" -exec -a "$0" "`dirname "$0"`/../bin.gcc/avr-g++" "$@" diff --git a/build/linux/work/hardware/tools/avr/bin/avr-gcc b/build/linux/work/hardware/tools/avr/bin/avr-gcc deleted file mode 100755 index c3ff2dcf8..000000000 --- a/build/linux/work/hardware/tools/avr/bin/avr-gcc +++ /dev/null @@ -1,3 +0,0 @@ -#!/bin/bash -export LD_LIBRARY_PATH="`dirname "$0"`/../lib" -exec -a "$0" "`dirname "$0"`/../bin.gcc/avr-gcc" "$@" diff --git a/build/linux/work/hardware/tools/avr/bin/avr-gcc-4.3.2 b/build/linux/work/hardware/tools/avr/bin/avr-gcc-4.3.2 deleted file mode 120000 index daf521dd3..000000000 --- a/build/linux/work/hardware/tools/avr/bin/avr-gcc-4.3.2 +++ /dev/null @@ -1 +0,0 @@ -avr-gcc \ No newline at end of file diff --git a/build/linux/work/hardware/tools/avr/bin/avr-gccbug b/build/linux/work/hardware/tools/avr/bin/avr-gccbug deleted file mode 100755 index 6698ea09c..000000000 --- a/build/linux/work/hardware/tools/avr/bin/avr-gccbug +++ /dev/null @@ -1,558 +0,0 @@ -#!/bin/sh -# Submit a problem report to a GNATS site. -# Copyright (C) 1993, 2000, 2001, 2002, 2003, 2007 Free Software Foundation, Inc. -# Contributed by Brendan Kehoe (brendan@cygnus.com), based on a -# version written by Heinz G. Seidl (hgs@cygnus.com). -# -# This file is part of GNU GNATS. -# -# GNU GNATS is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 3, or (at your option) -# any later version. -# -# GNU GNATS is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with GNU GNATS; see the file COPYING3. If not see -# . - -# The version of this send-pr. -VERSION=3.113 - -# The submitter-id for your site. -SUBMITTER=net - -# The default mail address for PR submissions. -GNATS_ADDR=gcc-gnats@gcc.gnu.org - -# The default release for this host. -# We have to guess at what program_transform_name might have done. -# "sed 1q" because neither "head -1" nor "head -n 1" is universal, argh. - -DEFAULT_GCC="`echo $0 | sed -e 's/bug//'`" -DEFAULT_RELEASE="`$DEFAULT_GCC --version | sed 1q`" - -# The default organization. -DEFAULT_ORGANIZATION= - -# What mailer to use. This must come after the config file, since it is -# host-dependent. -# Copied from cvsbug -if [ -f /usr/sbin/sendmail ]; then - MAIL_AGENT="/usr/sbin/sendmail -oi -t" -else - MAIL_AGENT="/usr/lib/sendmail -oi -t" -fi -MAILER=`echo $MAIL_AGENT | sed -e 's, .*,,'` -if [ ! -f "$MAILER" ] ; then - echo "$COMMAND: Cannot file mail program \"$MAILER\"." - echo "$COMMAND: Please fix the MAIL_AGENT entry in the $COMMAND file." - exit 1 -fi - - -# How to read the passwd database. -PASSWD="cat /etc/passwd" - -ECHON=bsd - -if [ $ECHON = bsd ] ; then - ECHON1="echo -n" - ECHON2= -elif [ $ECHON = sysv ] ; then - ECHON1=echo - ECHON2='\c' -else - ECHON1=echo - ECHON2= -fi - -# - -if [ -z "$TMPDIR" ]; then - TMPDIR=/tmp -else - if [ "`echo $TMPDIR | grep '/$'`" != "" ]; then - TMPDIR="`echo $TMPDIR | sed -e 's,/$,,'`" - fi -fi - -if [ yes = yes ]; then - TEMP0=`mktemp $TMPDIR/poXXXXXX` || exit 1 - TEMP=`mktemp $TMPDIR/pXXXXXX` || exit 1 - BAD=`mktemp $TMPDIR/pbadXXXXXX` || exit 1 - REF=`mktemp $TMPDIR/pfXXXXXX` || exit 1 - REMOVE_TEMP="rm -f $TEMP0 $TEMP $BAD $REF" -else - TEMPD=$TMPDIR/pd$$ - TEMP0=$TEMPD/po$$ - TEMP=$TEMPD/p$$ - BAD=$TEMPD/pbad$$ - REF=$TEMPD/pf$$ - mkdir $TEMPD || exit 1 - REMOVE_TEMP="rm -rf $TEMPD" -fi - -# find a user name -if [ "$LOGNAME" = "" ]; then - if [ "$USER" != "" ]; then - LOGNAME="$USER" - else - LOGNAME="UNKNOWN" - fi -fi - -FROM="$LOGNAME" -REPLY_TO="${REPLY_TO:-${REPLYTO:-$LOGNAME}}" - -# Find out the name of the originator of this PR. -if [ -n "$NAME" ]; then - ORIGINATOR="$NAME" -elif [ -f $HOME/.fullname ]; then - ORIGINATOR="`sed -e '1q' $HOME/.fullname`" -else - # Must use temp file due to incompatibilities in quoting behavior - # and to protect shell metacharacters in the expansion of $LOGNAME - $PASSWD | grep "^$LOGNAME:" | awk -F: '{print $5}' | sed -e 's/,.*//' > $TEMP0 - ORIGINATOR="`cat $TEMP0`" - rm -f $TEMP0 -fi - -if [ -n "$ORGANIZATION" ]; then - if [ -f "$ORGANIZATION" ]; then - ORGANIZATION="`cat $ORGANIZATION`" - fi -else - if [ -n "$DEFAULT_ORGANIZATION" ]; then - ORGANIZATION="$DEFAULT_ORGANIZATION" - elif [ -f $HOME/.organization ]; then - ORGANIZATION="`cat $HOME/.organization`" - fi -fi - -# If they don't have a preferred editor set, then use -if [ -z "$VISUAL" ]; then - if [ -z "$EDITOR" ]; then - EDIT=vi - else - EDIT="$EDITOR" - fi -else - EDIT="$VISUAL" -fi - -# Find out some information. -SYSTEM=`( [ -f /bin/uname ] && /bin/uname -a ) || \ - ( [ -f /usr/bin/uname ] && /usr/bin/uname -a ) || echo ""` -ARCH=`[ -f /bin/arch ] && /bin/arch` -MACHINE=`[ -f /bin/machine ] && /bin/machine` - -COMMAND=`echo $0 | sed -e 's,.*/,,'` -USAGE="Usage: $COMMAND [-PVL] [-t address] [-f filename] [-s severity] - [-c address] [--request-id] [--version]" -REMOVE= -BATCH= -CC= -SEVERITY_C= - -while [ $# -gt 0 ]; do - case "$1" in - -r) ;; # Ignore for backward compat. - -t | --to) if [ $# -eq 1 ]; then echo "$USAGE"; $REMOVE_TEMP; exit 1; fi - shift ; GNATS_ADDR="$1" - EXPLICIT_GNATS_ADDR=true - ;; - -f | --file) if [ $# -eq 1 ]; then echo "$USAGE"; $REMOVE_TEMP; exit 1; fi - shift ; IN_FILE="$1" - if [ "$IN_FILE" != "-" -a ! -r "$IN_FILE" ]; then - echo "$COMMAND: cannot read $IN_FILE" - $REMOVE_TEMP - exit 1 - fi - ;; - -b | --batch) BATCH=true ;; - -c | --cc) if [ $# -eq 1 ]; then echo "$USAGE"; $REMOVE_TEMP; exit 1; fi - shift ; CC="$1" - ;; - -s | --severity) if [ $# -eq 1 ]; then echo "$USAGE"; $REMOVE_TEMP; exit 1; fi - shift ; SEVERITY_C="$1" - ;; - -p | -P | --print) PRINT=true ;; - -L | --list) FORMAT=norm ;; - -l | -CL | --lisp) FORMAT=lisp ;; - --request-id) REQUEST_ID=true ;; - -h | --help) echo "$USAGE"; $REMOVE_TEMP; exit 0 ;; - -V | --version) cat < max) { max = length($0); } } - END {print max + 1;}'` - c=`expr 70 / $l` - if [ $c -eq 0 ]; then c=1; fi - echo "$CATEGORIES" | \ - awk 'BEGIN {print "Known categories:"; i = 0 } - { printf ("%-'$l'.'$l's", $0); if ((++i % '$c') == 0) { print "" } } - END { print ""; }' - $REMOVE_TEMP - exit 0 - ;; -esac - -ORIGINATOR_C='' -ORGANIZATION_C='' -SYNOPSIS_C='' -if [ -z "$SEVERITY_C" ]; then - SEVERITY_C='<[ non-critical | serious | critical ] (one line)>' -fi -PRIORITY_C='<[ low | medium ] (one line)>' -CATEGORY_C='' -RELEASE_C='' -ENVIRONMENT_C='' -DESCRIPTION_C='' -HOW_TO_REPEAT_C='' -FIX_C='' - -# Catch some signals. ($xs kludge needed by Sun /bin/sh) -xs=0 -trap '$REMOVE_TEMP; exit $xs' 0 -trap 'echo "$COMMAND: Aborting ..."; $REMOVE_TEMP; xs=1; exit' 1 3 13 15 - -# If they told us to use a specific file, then do so. -if [ -n "$IN_FILE" ]; then - if [ "$IN_FILE" = "-" ]; then - # The PR is coming from the standard input. - if [ -n "$EXPLICIT_GNATS_ADDR" ]; then - sed -e "s;^[Tt][Oo]:.*;To: $GNATS_ADDR;" > $TEMP - else - cat > $TEMP - fi - else - # Use the file they named. - if [ -n "$EXPLICIT_GNATS_ADDR" ]; then - sed -e "s;^[Tt][Oo]:.*;To: $GNATS_ADDR;" $IN_FILE > $TEMP - else - cat $IN_FILE > $TEMP - fi - fi -else - - if [ -n "$PR_FORM" -a -z "$PRINT_INTERN" ]; then - # If their PR_FORM points to a bogus entry, then bail. - if [ ! -f "$PR_FORM" -o ! -r "$PR_FORM" -o ! -s "$PR_FORM" ]; then - echo "$COMMAND: can't seem to read your template file (\`$PR_FORM'), ignoring PR_FORM" - sleep 1 - PRINT_INTERN=bad_prform - fi - fi - - if [ -n "$PR_FORM" -a -z "$PRINT_INTERN" ]; then - cp $PR_FORM $TEMP || - ( echo "$COMMAND: could not copy $PR_FORM" ; xs=1; exit ) - else - for file in $TEMP $REF ; do - cat > $file << '__EOF__' -SEND-PR: -*- send-pr -*- -SEND-PR: Lines starting with `SEND-PR' will be removed automatically, as -SEND-PR: will all comments (text enclosed in `<' and `>'). -SEND-PR: -SEND-PR: Please consult the GCC manual if you are not sure how to -SEND-PR: fill out a problem report. -SEND-PR: Note that the Synopsis field is mandatory. The Subject (for -SEND-PR: the mail) will be made the same as Synopsis unless explicitly -SEND-PR: changed. -SEND-PR: -SEND-PR: Choose from the following categories: -SEND-PR: -__EOF__ - - # Format the categories so they fit onto lines. - l=`echo "$CATEGORIES" | \ - awk 'BEGIN {max = 0; } { if (length($0) > max) { max = length($0); } } - END {print max + 1;}'` - c=`expr 61 / $l` - if [ $c -eq 0 ]; then c=1; fi - echo "$CATEGORIES" | \ - awk 'BEGIN {printf "SEND-PR: "; i = 0 } - { printf ("%-'$l'.'$l's", $0); - if ((++i % '$c') == 0) { printf "\nSEND-PR: " } } - END { printf "\nSEND-PR:\n"; }' >> $file - - cat >> $file << __EOF__ -To: $GNATS_ADDR -Subject: -From: $FROM -Reply-To: $REPLYTO -Cc: $CC -X-send-pr-version: $VERSION -X-GNATS-Notify: - - ->Submitter-Id: $SUBMITTER ->Originator: $ORIGINATOR ->Organization: ${ORGANIZATION-$ORGANIZATION_C} ->Confidential: no -SEND-PR: Leave "Confidential" as "no"; all GCC PRs are public. ->Synopsis: $SYNOPSIS_C ->Severity: $SEVERITY_C -SEND-PR: critical GCC is completely not operational; no work-around known. -SEND-PR: serious GCC is not working properly; a work-around is possible. -SEND-PR: non-critical Report indicates minor problem. ->Priority: $PRIORITY_C -SEND-PR: medium The problem should be solved in the next release. -SEND-PR: low The problem should be solve in a future release. ->Category: $CATEGORY_C ->Class: <[ doc-bug | accepts-illegal | rejects-legal | wrong-code | ice-on-legal-code| ice-on-illegal-code | pessimizes-code | sw-bug | change-request | support ] (one line)> -SEND-PR: doc-bug The documentation is incorrect. -SEND-PR: accepts-illegal GCC fails to reject erroneous code. -SEND-PR: rejects-legal GCC gives an error message for correct code. -SEND-PR: wrong-code The machine code generated by gcc is incorrect. -SEND-PR: ice-on-legal-code GCC gives an Internal Compiler Error (ICE) -SEND-PR: for correct code -SEND-PR: ice-on-illegal-code GCC gives an ICE instead of reporting an error -SEND-PR: pessimizes-code GCC misses an important optimization opportunity -SEND-PR: sw-bug Software bug of some other class than above -SEND-PR: change-request A feature in GCC is missing. -SEND-PR: support I need help with gcc. ->Release: ${DEFAULT_RELEASE-$RELEASE_C} ->Environment: -`[ -n "$SYSTEM" ] && echo System: $SYSTEM` -`[ -n "$ARCH" ] && echo Architecture: $ARCH` -`[ -n "$MACHINE" ] && echo Machine: $MACHINE` - $ENVIRONMENT_C -host: x86_64-pc-linux-gnu -build: x86_64-pc-linux-gnu -target: avr-unknown-none -__EOF__ - cat >> $file << \__EOF__ -configured with: ../src/configure -v --enable-languages=c,c++ --prefix=/usr/lib --infodir=/usr/share/info --mandir=/usr/share/man --bindir=/usr/bin --libexecdir=/usr/lib --libdir=/usr/lib --enable-shared --with-system-zlib --enable-long-long --enable-nls --without-included-gettext --disable-checking --disable-libssp --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=avr -__EOF__ - cat >> $file << __EOF__ ->Description: - $DESCRIPTION_C ->How-To-Repeat: - $HOW_TO_REPEAT_C ->Fix: - $FIX_C -__EOF__ - done - fi - - if [ "$PRINT" = true -o "$PRINT_INTERN" = true ]; then - cat $TEMP - xs=0; exit - fi - - chmod u+w $TEMP - if [ -z "$REQUEST_ID" ]; then - eval $EDIT $TEMP - else - ed -s $TEMP << '__EOF__' -/^Subject/s/^Subject:.*/Subject: request for a customer id/ -/^>Category/s/^>Category:.*/>Category: send-pr/ -w -q -__EOF__ - fi - - if cmp -s $REF $TEMP ; then - echo "$COMMAND: problem report not filled out, therefore not sent" - xs=1; exit - fi -fi - -# -# Check the enumeration fields - -# This is a "sed-subroutine" with one keyword parameter -# (with workaround for Sun sed bug) -# -SED_CMD=' -/$PATTERN/{ -s||| -s|<.*>|| -s|^[ ]*|| -s|[ ]*$|| -p -q -}' - - -while [ -z "$REQUEST_ID" ]; do - CNT=0 - - # 1) Confidential - # - PATTERN=">Confidential:" - CONFIDENTIAL=`eval sed -n -e "\"$SED_CMD\"" $TEMP` - case "$CONFIDENTIAL" in - no) CNT=`expr $CNT + 1` ;; - *) echo "$COMMAND: \`$CONFIDENTIAL' is not a valid value for \`Confidential'." ;; - esac - # - # 2) Severity - # - PATTERN=">Severity:" - SEVERITY=`eval sed -n -e "\"$SED_CMD\"" $TEMP` - case "$SEVERITY" in - ""|non-critical|serious|critical) CNT=`expr $CNT + 1` ;; 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mysterious mail failure." - if [ -z "$BATCH" ]; then - echo "$COMMAND: the problem report remains in $BAD and is not sent." - REMOVE_TEMP="rm -f $TEMP0 $TEMP $REF" - mv $REF $BAD - else - echo "$COMMAND: the problem report is not sent." - fi - xs=1; exit -fi diff --git a/build/linux/work/hardware/tools/avr/bin/avr-ld b/build/linux/work/hardware/tools/avr/bin/avr-ld deleted file mode 100755 index 33625ebfd..000000000 Binary files a/build/linux/work/hardware/tools/avr/bin/avr-ld and /dev/null differ diff --git a/build/linux/work/hardware/tools/avr/bin/avr-nm b/build/linux/work/hardware/tools/avr/bin/avr-nm deleted file mode 100755 index 572c11cd6..000000000 Binary files a/build/linux/work/hardware/tools/avr/bin/avr-nm and /dev/null differ diff --git a/build/linux/work/hardware/tools/avr/bin/avr-objcopy b/build/linux/work/hardware/tools/avr/bin/avr-objcopy deleted file mode 100755 index f9cde6267..000000000 Binary files a/build/linux/work/hardware/tools/avr/bin/avr-objcopy and /dev/null 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file mode 120000 index 469193ba7..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/bin/objdump +++ /dev/null @@ -1 +0,0 @@ -../../../bin/avr-objdump \ No newline at end of file diff --git a/build/linux/work/hardware/tools/avr/lib/avr/bin/ranlib b/build/linux/work/hardware/tools/avr/lib/avr/bin/ranlib deleted file mode 120000 index 55f6164ca..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/bin/ranlib +++ /dev/null @@ -1 +0,0 @@ -../../../bin/avr-ranlib \ No newline at end of file diff --git a/build/linux/work/hardware/tools/avr/lib/avr/bin/strip b/build/linux/work/hardware/tools/avr/lib/avr/bin/strip deleted file mode 120000 index 883440868..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/bin/strip +++ /dev/null @@ -1 +0,0 @@ -../../../bin/avr-strip \ No newline at end of file diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/alloca.h b/build/linux/work/hardware/tools/avr/lib/avr/include/alloca.h deleted file mode 100644 index 34c889a06..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/alloca.h +++ /dev/null @@ -1,59 +0,0 @@ -/* Copyright (c) 2007, Dmitry Xmelkov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: alloca.h,v 1.2 2007/12/18 13:34:15 dmix Exp $ */ - -#ifndef _ALLOCA_H -#define _ALLOCA_H 1 - -#include - -/** \defgroup alloca : Allocate space in the stack */ - -/** \ingroup alloca - \brief Allocate \a __size bytes of space in the stack frame of the caller. - - This temporary space is automatically freed when the function that - called alloca() returns to its caller. Avr-libc defines the alloca() as - a macro, which is translated into the inlined \c __builtin_alloca() - function. The fact that the code is inlined, means that it is impossible - to take the address of this function, or to change its behaviour by - linking with a different library. - - \return alloca() returns a pointer to the beginning of the allocated - space. If the allocation causes stack overflow, program behaviour is - undefined. - - \warning Avoid use alloca() inside the list of arguments of a function - call. - */ -extern void *alloca (size_t __size); - -#define alloca(size) __builtin_alloca (size) - -#endif /* alloca.h */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/assert.h b/build/linux/work/hardware/tools/avr/lib/avr/include/assert.h deleted file mode 100644 index 4e7e7e6ce..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/assert.h +++ /dev/null @@ -1,112 +0,0 @@ -/* Copyright (c) 2005,2007 Joerg Wunsch - All rights reserved. - - Portions of documentation Copyright (c) 1991, 1993 - The Regents of the University of California. - - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. - - $Id: assert.h,v 1.3 2007/01/23 15:32:48 joerg_wunsch Exp $ -*/ - -/** \file */ -/** \defgroup avr_assert : Diagnostics - \code #include \endcode - - This header file defines a debugging aid. - - As there is no standard error output stream available for many - applications using this library, the generation of a printable - error message is not enabled by default. These messages will - only be generated if the application defines the macro - - \code __ASSERT_USE_STDERR \endcode - - before including the \c header file. By default, - only abort() will be called to halt the application. -*/ - -/*@{*/ - -/* - * The ability to include this file (with or without NDEBUG) is a - * feature. - */ - -#undef assert - -#if defined(__DOXYGEN__) -/** - * \def assert - * \param expression Expression to test for. - * - * The assert() macro tests the given expression and if it is false, - * the calling process is terminated. A diagnostic message is written - * to stderr and the function abort() is called, effectively - * terminating the program. - * - * If expression is true, the assert() macro does nothing. - * - * The assert() macro may be removed at compile time by defining - * NDEBUG as a macro (e.g., by using the compiler option -DNDEBUG). - */ -# define assert(expression) - -#else /* !DOXYGEN */ - -# if defined(NDEBUG) -# define assert(e) ((void)0) -# else /* !NDEBUG */ -# if defined(__ASSERT_USE_STDERR) -# define assert(e) ((e) ? (void)0 : \ - __assert(__func__, __FILE__, __LINE__, #e)) -# else /* !__ASSERT_USE_STDERR */ -# define assert(e) ((e) ? (void)0 : abort()) -# endif /* __ASSERT_USE_STDERR */ -# endif /* NDEBUG */ -#endif /* DOXYGEN */ - -#ifdef __cplusplus -extern "C" { -#endif - -#if !defined(__DOXYGEN__) - -extern void __assert(const char *__func, const char *__file, - int __lineno, const char *__sexp); - -#endif /* not __DOXYGEN__ */ - -#ifdef __cplusplus -} -#endif - -/*@}*/ -/* EOF */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/boot.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/boot.h deleted file mode 100644 index 577fd9690..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/boot.h +++ /dev/null @@ -1,677 +0,0 @@ -/* Copyright (c) 2002, 2003, 2004, 2005, 2006, 2007 Eric B. Weddington - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: boot.h,v 1.27.2.3 2008/09/30 13:58:48 arcanum Exp $ */ - -#ifndef _AVR_BOOT_H_ -#define _AVR_BOOT_H_ 1 - -/** \file */ -/** \defgroup avr_boot : Bootloader Support Utilities - \code - #include - #include - \endcode - - The macros in this module provide a C language interface to the - bootloader support functionality of certain AVR processors. These - macros are designed to work with all sizes of flash memory. - - Global interrupts are not automatically disabled for these macros. It - is left up to the programmer to do this. See the code example below. - Also see the processor datasheet for caveats on having global interrupts - enabled during writing of the Flash. - - \note Not all AVR processors provide bootloader support. See your - processor datasheet to see if it provides bootloader support. - - \todo From email with Marek: On smaller devices (all except ATmega64/128), - __SPM_REG is in the I/O space, accessible with the shorter "in" and "out" - instructions - since the boot loader has a limited size, this could be an - important optimization. - - \par API Usage Example - The following code shows typical usage of the boot API. - - \code - #include - #include - #include - - void boot_program_page (uint32_t page, uint8_t *buf) - { - uint16_t i; - uint8_t sreg; - - // Disable interrupts. - - sreg = SREG; - cli(); - - eeprom_busy_wait (); - - boot_page_erase (page); - boot_spm_busy_wait (); // Wait until the memory is erased. - - for (i=0; i -#include -#include -#include - -/* Check for SPM Control Register in processor. */ -#if defined (SPMCSR) -# define __SPM_REG SPMCSR -#elif defined (SPMCR) -# define __SPM_REG SPMCR -#else -# error AVR processor does not provide bootloader support! -#endif - - -/* Check for SPM Enable bit. */ -#if defined(SPMEN) -# define __SPM_ENABLE SPMEN -#elif defined(SELFPRGEN) -# define __SPM_ENABLE SELFPRGEN -#else -# error Cannot find SPM Enable bit definition! -#endif - -/** \ingroup avr_boot - \def BOOTLOADER_SECTION - - Used to declare a function or variable to be placed into a - new section called .bootloader. This section and its contents - can then be relocated to any address (such as the bootloader - NRWW area) at link-time. */ - -#define BOOTLOADER_SECTION __attribute__ ((section (".bootloader"))) - -/* Create common bit definitions. */ -#ifdef ASB -#define __COMMON_ASB ASB -#else -#define __COMMON_ASB RWWSB -#endif - -#ifdef ASRE -#define __COMMON_ASRE ASRE -#else -#define __COMMON_ASRE RWWSRE -#endif - -/* Define the bit positions of the Boot Lock Bits. */ - -#define BLB12 5 -#define BLB11 4 -#define BLB02 3 -#define BLB01 2 - -/** \ingroup avr_boot - \def boot_spm_interrupt_enable() - Enable the SPM interrupt. */ - -#define boot_spm_interrupt_enable() (__SPM_REG |= (uint8_t)_BV(SPMIE)) - -/** \ingroup avr_boot - \def boot_spm_interrupt_disable() - Disable the SPM interrupt. */ - -#define boot_spm_interrupt_disable() (__SPM_REG &= (uint8_t)~_BV(SPMIE)) - -/** \ingroup avr_boot - \def boot_is_spm_interrupt() - Check if the SPM interrupt is enabled. */ - -#define boot_is_spm_interrupt() (__SPM_REG & (uint8_t)_BV(SPMIE)) - -/** \ingroup avr_boot - \def boot_rww_busy() - Check if the RWW section is busy. */ - -#define boot_rww_busy() (__SPM_REG & (uint8_t)_BV(__COMMON_ASB)) - -/** \ingroup avr_boot - \def boot_spm_busy() - Check if the SPM instruction is busy. */ - -#define boot_spm_busy() (__SPM_REG & (uint8_t)_BV(__SPM_ENABLE)) - -/** \ingroup avr_boot - \def boot_spm_busy_wait() - Wait while the SPM instruction is busy. */ - -#define boot_spm_busy_wait() do{}while(boot_spm_busy()) - -#define __BOOT_PAGE_ERASE (_BV(__SPM_ENABLE) | _BV(PGERS)) -#define __BOOT_PAGE_WRITE (_BV(__SPM_ENABLE) | _BV(PGWRT)) -#define __BOOT_PAGE_FILL _BV(__SPM_ENABLE) -#define __BOOT_RWW_ENABLE (_BV(__SPM_ENABLE) | _BV(__COMMON_ASRE)) -#define __BOOT_LOCK_BITS_SET (_BV(__SPM_ENABLE) | _BV(BLBSET)) - -#define __boot_page_fill_normal(address, data) \ -(__extension__({ \ - __asm__ __volatile__ \ - ( \ - "movw r0, %3\n\t" \ - "sts %0, %1\n\t" \ - "spm\n\t" \ - "clr r1\n\t" \ - : \ - : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ - "r" ((uint8_t)__BOOT_PAGE_FILL), \ - "z" ((uint16_t)address), \ - "r" ((uint16_t)data) \ - : "r0" \ - ); \ -})) - -#define __boot_page_fill_alternate(address, data)\ -(__extension__({ \ - __asm__ __volatile__ \ - ( \ - "movw r0, %3\n\t" \ - "sts %0, %1\n\t" \ - "spm\n\t" \ - ".word 0xffff\n\t" \ - "nop\n\t" \ - "clr r1\n\t" \ - : \ - : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ - "r" ((uint8_t)__BOOT_PAGE_FILL), \ - "z" ((uint16_t)address), \ - "r" ((uint16_t)data) \ - : "r0" \ - ); \ -})) - -#define __boot_page_fill_extended(address, data) \ -(__extension__({ \ - __asm__ __volatile__ \ - ( \ - "movw r0, %4\n\t" \ - "movw r30, %A3\n\t" \ - "sts %1, %C3\n\t" \ - "sts %0, %2\n\t" \ - "spm\n\t" \ - "clr r1\n\t" \ - : \ - : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ - "i" (_SFR_MEM_ADDR(RAMPZ)), \ - "r" ((uint8_t)__BOOT_PAGE_FILL), \ - "r" ((uint32_t)address), \ - "r" ((uint16_t)data) \ - : "r0", "r30", "r31" \ - ); \ -})) - -#define __boot_page_erase_normal(address) \ -(__extension__({ \ - __asm__ __volatile__ \ - ( \ - "sts %0, %1\n\t" \ - "spm\n\t" \ - : \ - : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ - "r" ((uint8_t)__BOOT_PAGE_ERASE), \ - "z" ((uint16_t)address) \ - ); \ -})) - -#define __boot_page_erase_alternate(address) \ -(__extension__({ \ - __asm__ __volatile__ \ - ( \ - "sts %0, %1\n\t" \ - "spm\n\t" \ - ".word 0xffff\n\t" \ - "nop\n\t" \ - : \ - : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ - "r" ((uint8_t)__BOOT_PAGE_ERASE), \ - "z" ((uint16_t)address) \ - ); \ -})) - -#define __boot_page_erase_extended(address) \ -(__extension__({ \ - __asm__ __volatile__ \ - ( \ - "movw r30, %A3\n\t" \ - "sts %1, %C3\n\t" \ - "sts %0, %2\n\t" \ - "spm\n\t" \ - : \ - : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ - "i" (_SFR_MEM_ADDR(RAMPZ)), \ - "r" ((uint8_t)__BOOT_PAGE_ERASE), \ - "r" ((uint32_t)address) \ - : "r30", "r31" \ - ); \ -})) - -#define __boot_page_write_normal(address) \ -(__extension__({ \ - __asm__ __volatile__ \ - ( \ - "sts %0, %1\n\t" \ - "spm\n\t" \ - : \ - : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ - "r" ((uint8_t)__BOOT_PAGE_WRITE), \ - "z" ((uint16_t)address) \ - ); \ -})) - -#define __boot_page_write_alternate(address) \ -(__extension__({ \ - __asm__ __volatile__ \ - ( \ - "sts %0, %1\n\t" \ - "spm\n\t" \ - ".word 0xffff\n\t" \ - "nop\n\t" \ - : \ - : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ - "r" ((uint8_t)__BOOT_PAGE_WRITE), \ - "z" ((uint16_t)address) \ - ); \ -})) - -#define __boot_page_write_extended(address) \ -(__extension__({ \ - __asm__ __volatile__ \ - ( \ - "movw r30, %A3\n\t" \ - "sts %1, %C3\n\t" \ - "sts %0, %2\n\t" \ - "spm\n\t" \ - : \ - : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ - "i" (_SFR_MEM_ADDR(RAMPZ)), \ - "r" ((uint8_t)__BOOT_PAGE_WRITE), \ - "r" ((uint32_t)address) \ - : "r30", "r31" \ - ); \ -})) - -#define __boot_rww_enable() \ -(__extension__({ \ - __asm__ __volatile__ \ - ( \ - "sts %0, %1\n\t" \ - "spm\n\t" \ - : \ - : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ - "r" ((uint8_t)__BOOT_RWW_ENABLE) \ - ); \ -})) - -#define __boot_rww_enable_alternate() \ -(__extension__({ \ - __asm__ __volatile__ \ - ( \ - "sts %0, %1\n\t" \ - "spm\n\t" \ - ".word 0xffff\n\t" \ - "nop\n\t" \ - : \ - : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ - "r" ((uint8_t)__BOOT_RWW_ENABLE) \ - ); \ -})) - -/* From the mega16/mega128 data sheets (maybe others): - - Bits by SPM To set the Boot Loader Lock bits, write the desired data to - R0, write "X0001001" to SPMCR and execute SPM within four clock cycles - after writing SPMCR. The only accessible Lock bits are the Boot Lock bits - that may prevent the Application and Boot Loader section from any - software update by the MCU. - - If bits 5..2 in R0 are cleared (zero), the corresponding Boot Lock bit - will be programmed if an SPM instruction is executed within four cycles - after BLBSET and SPMEN (or SELFPRGEN) are set in SPMCR. The Z-pointer is - don't care during this operation, but for future compatibility it is - recommended to load the Z-pointer with $0001 (same as used for reading the - Lock bits). For future compatibility It is also recommended to set bits 7, - 6, 1, and 0 in R0 to 1 when writing the Lock bits. When programming the - Lock bits the entire Flash can be read during the operation. */ - -#define __boot_lock_bits_set(lock_bits) \ -(__extension__({ \ - uint8_t value = (uint8_t)(~(lock_bits)); \ - __asm__ __volatile__ \ - ( \ - "ldi r30, 1\n\t" \ - "ldi r31, 0\n\t" \ - "mov r0, %2\n\t" \ - "sts %0, %1\n\t" \ - "spm\n\t" \ - : \ - : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ - "r" ((uint8_t)__BOOT_LOCK_BITS_SET), \ - "r" (value) \ - : "r0", "r30", "r31" \ - ); \ -})) - -#define __boot_lock_bits_set_alternate(lock_bits) \ -(__extension__({ \ - uint8_t value = (uint8_t)(~(lock_bits)); \ - __asm__ __volatile__ \ - ( \ - "ldi r30, 1\n\t" \ - "ldi r31, 0\n\t" \ - "mov r0, %2\n\t" \ - "sts %0, %1\n\t" \ - "spm\n\t" \ - ".word 0xffff\n\t" \ - "nop\n\t" \ - : \ - : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ - "r" ((uint8_t)__BOOT_LOCK_BITS_SET), \ - "r" (value) \ - : "r0", "r30", "r31" \ - ); \ -})) - -/* - Reading lock and fuse bits: - - Similarly to writing the lock bits above, set BLBSET and SPMEN (or - SELFPRGEN) bits in __SPMREG, and then (within four clock cycles) issue an - LPM instruction. - - Z address: contents: - 0x0000 low fuse bits - 0x0001 lock bits - 0x0002 extended fuse bits - 0x0003 high fuse bits - - Sounds confusing, doesn't it? - - Unlike the macros in pgmspace.h, no need to care for non-enhanced - cores here as these old cores do not provide SPM support anyway. - */ - -/** \ingroup avr_boot - \def GET_LOW_FUSE_BITS - address to read the low fuse bits, using boot_lock_fuse_bits_get - */ -#define GET_LOW_FUSE_BITS (0x0000) -/** \ingroup avr_boot - \def GET_LOCK_BITS - address to read the lock bits, using boot_lock_fuse_bits_get - */ -#define GET_LOCK_BITS (0x0001) -/** \ingroup avr_boot - \def GET_EXTENDED_FUSE_BITS - address to read the extended fuse bits, using boot_lock_fuse_bits_get - */ -#define GET_EXTENDED_FUSE_BITS (0x0002) -/** \ingroup avr_boot - \def GET_HIGH_FUSE_BITS - address to read the high fuse bits, using boot_lock_fuse_bits_get - */ -#define GET_HIGH_FUSE_BITS (0x0003) - -/** \ingroup avr_boot - \def boot_lock_fuse_bits_get(address) - - Read the lock or fuse bits at \c address. - - Parameter \c address can be any of GET_LOW_FUSE_BITS, - GET_LOCK_BITS, GET_EXTENDED_FUSE_BITS, or GET_HIGH_FUSE_BITS. - - \note The lock and fuse bits returned are the physical values, - i.e. a bit returned as 0 means the corresponding fuse or lock bit - is programmed. - */ -#define boot_lock_fuse_bits_get(address) \ -(__extension__({ \ - uint8_t __result; \ - __asm__ __volatile__ \ - ( \ - "ldi r30, %3\n\t" \ - "ldi r31, 0\n\t" \ - "sts %1, %2\n\t" \ - "lpm %0, Z\n\t" \ - : "=r" (__result) \ - : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ - "r" ((uint8_t)__BOOT_LOCK_BITS_SET), \ - "M" (address) \ - : "r0", "r30", "r31" \ - ); \ - __result; \ -})) - -/** \ingroup avr_boot - \def boot_signature_byte_get(address) - - Read the Signature Row byte at \c address. For some MCU types, - this function can also retrieve the factory-stored oscillator - calibration bytes. - - Parameter \c address can be 0-0x1f as documented by the datasheet. - \note The values are MCU type dependent. -*/ - -#define __BOOT_SIGROW_READ (_BV(__SPM_ENABLE) | _BV(SIGRD)) - -#define boot_signature_byte_get(addr) \ -(__extension__({ \ - uint16_t __addr16 = (uint16_t)(addr); \ - uint8_t __result; \ - __asm__ __volatile__ \ - ( \ - "sts %1, %2\n\t" \ - "lpm %0, Z" "\n\t" \ - : "=r" (__result) \ - : "i" (_SFR_MEM_ADDR(__SPM_REG)), \ - "r" ((uint8_t) __BOOT_SIGROW_READ), \ - "z" (__addr16) \ - ); \ - __result; \ -})) - -/** \ingroup avr_boot - \def boot_page_fill(address, data) - - Fill the bootloader temporary page buffer for flash - address with data word. - - \note The address is a byte address. The data is a word. The AVR - writes data to the buffer a word at a time, but addresses the buffer - per byte! So, increment your address by 2 between calls, and send 2 - data bytes in a word format! The LSB of the data is written to the lower - address; the MSB of the data is written to the higher address.*/ - -/** \ingroup avr_boot - \def boot_page_erase(address) - - Erase the flash page that contains address. - - \note address is a byte address in flash, not a word address. */ - -/** \ingroup avr_boot - \def boot_page_write(address) - - Write the bootloader temporary page buffer - to flash page that contains address. - - \note address is a byte address in flash, not a word address. */ - -/** \ingroup avr_boot - \def boot_rww_enable() - - Enable the Read-While-Write memory section. */ - -/** \ingroup avr_boot - \def boot_lock_bits_set(lock_bits) - - Set the bootloader lock bits. - - \param lock_bits A mask of which Boot Loader Lock Bits to set. - - \note In this context, a 'set bit' will be written to a zero value. - Note also that only BLBxx bits can be programmed by this command. - - For example, to disallow the SPM instruction from writing to the Boot - Loader memory section of flash, you would use this macro as such: - - \code - boot_lock_bits_set (_BV (BLB11)); - \endcode - - \note Like any lock bits, the Boot Loader Lock Bits, once set, - cannot be cleared again except by a chip erase which will in turn - also erase the boot loader itself. */ - -/* Normal versions of the macros use 16-bit addresses. - Extended versions of the macros use 32-bit addresses. - Alternate versions of the macros use 16-bit addresses and require special - instruction sequences after LPM. - - FLASHEND is defined in the ioXXXX.h file. - USHRT_MAX is defined in . */ - -#if defined(__AVR_ATmega161__) || defined(__AVR_ATmega163__) \ - || defined(__AVR_ATmega323__) - -/* Alternate: ATmega161/163/323 and 16 bit address */ -#define boot_page_fill(address, data) __boot_page_fill_alternate(address, data) -#define boot_page_erase(address) __boot_page_erase_alternate(address) -#define boot_page_write(address) __boot_page_write_alternate(address) -#define boot_rww_enable() __boot_rww_enable_alternate() -#define boot_lock_bits_set(lock_bits) __boot_lock_bits_set_alternate(lock_bits) - -#elif (FLASHEND > USHRT_MAX) - -/* Extended: >16 bit address */ -#define boot_page_fill(address, data) __boot_page_fill_extended(address, data) -#define boot_page_erase(address) __boot_page_erase_extended(address) -#define boot_page_write(address) __boot_page_write_extended(address) -#define boot_rww_enable() __boot_rww_enable() -#define boot_lock_bits_set(lock_bits) __boot_lock_bits_set(lock_bits) - -#else - -/* Normal: 16 bit address */ -#define boot_page_fill(address, data) __boot_page_fill_normal(address, data) -#define boot_page_erase(address) __boot_page_erase_normal(address) -#define boot_page_write(address) __boot_page_write_normal(address) -#define boot_rww_enable() __boot_rww_enable() -#define boot_lock_bits_set(lock_bits) __boot_lock_bits_set(lock_bits) - -#endif - -/** \ingroup avr_boot - - Same as boot_page_fill() except it waits for eeprom and spm operations to - complete before filling the page. */ - -#define boot_page_fill_safe(address, data) \ -do { \ - boot_spm_busy_wait(); \ - eeprom_busy_wait(); \ - boot_page_fill(address, data); \ -} while (0) - -/** \ingroup avr_boot - - Same as boot_page_erase() except it waits for eeprom and spm operations to - complete before erasing the page. */ - -#define boot_page_erase_safe(address) \ -do { \ - boot_spm_busy_wait(); \ - eeprom_busy_wait(); \ - boot_page_erase (address); \ -} while (0) - -/** \ingroup avr_boot - - Same as boot_page_write() except it waits for eeprom and spm operations to - complete before writing the page. */ - -#define boot_page_write_safe(address) \ -do { \ - boot_spm_busy_wait(); \ - eeprom_busy_wait(); \ - boot_page_write (address); \ -} while (0) - -/** \ingroup avr_boot - - Same as boot_rww_enable() except waits for eeprom and spm operations to - complete before enabling the RWW mameory. */ - -#define boot_rww_enable_safe() \ -do { \ - boot_spm_busy_wait(); \ - eeprom_busy_wait(); \ - boot_rww_enable(); \ -} while (0) - -/** \ingroup avr_boot - - Same as boot_lock_bits_set() except waits for eeprom and spm operations to - complete before setting the lock bits. */ - -#define boot_lock_bits_set_safe(lock_bits) \ -do { \ - boot_spm_busy_wait(); \ - eeprom_busy_wait(); \ - boot_lock_bits_set (lock_bits); \ -} while (0) - -#endif /* _AVR_BOOT_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/builtins.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/builtins.h deleted file mode 100644 index d5c67d58e..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/builtins.h +++ /dev/null @@ -1,101 +0,0 @@ -/* Copyright (c) 2008 Anatoly Sokolv - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id:$ */ - -/* - avr/builtins.h - - */ - -#ifndef _AVR_BUILTINS_H_ -#define _AVR_BUILTINS_H_ - -/** \file */ -/** \defgroup avr_builtins : GCC builtins - \code #include \endcode - - This header file declares avr builtins. */ - -/** - \ingroup avr_builtins - - Enables interrupts by setting the global interrupt mask. */ -extern void __builtin_avr_sei(void); - -/** - \ingroup avr_builtins - - Disables all interrupts by clearing the global interrupt mask. */ -extern void __builtin_avr_cli(void); - -/** - \ingroup avr_builtins - - TODO. */ - -extern void __builtin_avr_sleep(void); - -/** - \ingroup avr_builtins - - TODO. */ -extern void __builtin_avr_wdr(void); - -/** - \ingroup avr_builtins - - TODO. */ -extern unsigned char __builtin_avr_swap(unsigned char __b); - -/** - \ingroup avr_builtins - - TODO. */ -extern unsigned int __builtin_avr_fmul(unsigned char __a, unsigned char __b); - -/** - \ingroup avr_builtins - - TODO. */ -extern int __builtin_avr_fmuls(char __a, char __b); - -/** - \ingroup avr_builtins - - TODO. */ -extern int __builtin_avr_fmulsu(char __a, unsigned char __b); - -/** - \ingroup avr_builtins - - TODO. */ -extern void __builtin_avr_delay_cycles(unsigned long __n); - -#endif /* _AVR_BUILTINS_H_ */ \ No newline at end of file diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/common.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/common.h deleted file mode 100644 index 8aade16ec..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/common.h +++ /dev/null @@ -1,293 +0,0 @@ -/* Copyright (c) 2007 Eric B. Weddington - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: common.h,v 1.3.4.3 2008/03/24 17:11:06 arcanum Exp $ */ - - -#ifndef _AVR_COMMON_H -#define _AVR_COMMON_H - -#include - -/* -This purpose of this header is to define registers that have not been -previously defined in the individual device IO header files, and to define -other symbols that are common across AVR device families. - -This file is designed to be included in after the individual -device IO header files, and after - -*/ - -/*------------ Registers Not Previously Defined ------------*/ - -/* -These are registers that are not previously defined in the individual -IO header files, OR they are defined here because they are used in parts of -avr-libc even if a device is not selected but a general architecture has -been selected. -*/ - - -/* -Stack pointer register. - -AVR architecture 1 has no RAM, thus no stack pointer. - -All other architectures do have a stack pointer. Some devices have only -less than 256 bytes of possible RAM locations (128 Bytes of SRAM -and no option for external RAM), thus SPH is officially "reserved" -for them. -*/ -#if __AVR_ARCH__ >= 100 -# ifndef SPL -# define SPL _SFR_MEM8(0x3D) -# endif -# ifndef SPH -# define SPH _SFR_MEM8(0x3E) -# endif -# ifndef SP -# define SP _SFR_MEM16(0x3D) -# endif -#elif __AVR_ARCH__ != 1 -# ifndef SPL -# define SPL _SFR_IO8(0x3D) -# endif -# if XRAMEND < 0x100 && !defined(__COMPILING_AVR_LIBC__) -# ifndef SP -# define SP _SFR_IO8(0x3D) -# endif -# else -# ifndef SP -# define SP _SFR_IO16(0x3D) -# endif -# ifndef SPH -# define SPH _SFR_IO8(0x3E) -# endif -# endif /* XRAMEND < 0x100 && !defined(__COMPILING_AVR_LIBC__) */ -#endif /* __AVR_ARCH__ != 1 */ - - -/* Status Register */ -#ifndef SREG -# if __AVR_ARCH__ >= 100 -# define SREG _SFR_MEM8(0x3F) -# else -# define SREG _SFR_IO8(0x3F) -# endif -#endif - - -/* SREG bit definitions */ -#ifndef SREG_C -# define SREG_C (0) -#endif -#ifndef SREG_Z -# define SREG_Z (1) -#endif -#ifndef SREG_N -# define SREG_N (2) -#endif -#ifndef SREG_V -# define SREG_V (3) -#endif -#ifndef SREG_S -# define SREG_S (4) -#endif -#ifndef SREG_H -# define SREG_H (5) -#endif -#ifndef SREG_T -# define SREG_T (6) -#endif -#ifndef SREG_I -# define SREG_I (7) -#endif - - -#if defined(__COMPILING_AVR_LIBC__) - -/* AVR 6 Architecture */ -# if __AVR_ARCH__ == 6 -# ifndef EIND -# define EIND _SFR_IO8(0X3C) -# endif -/* XMEGA Architectures */ -# elif __AVR_ARCH__ >= 100 -# ifndef EIND -# define EIND _SFR_MEM8(0x3C) -# endif -# endif - -/* -Only few devices come without EEPROM. In order to assemble the -EEPROM library components without defining a specific device, we -keep the EEPROM-related definitions here. -*/ - -/* EEPROM Control Register */ -# ifndef EECR -# define EECR _SFR_IO8(0x1C) -# endif - -/* EEPROM Data Register */ -# ifndef EEDR -# define EEDR _SFR_IO8(0x1D) -# endif - -/* EEPROM Address Register */ -# ifndef EEAR -# define EEAR _SFR_IO16(0x1E) -# endif -# ifndef EEARL -# define EEARL _SFR_IO8(0x1E) -# endif -# ifndef EEARH -# define EEARH _SFR_IO8(0x1F) -# endif - -/* EEPROM Control Register bits */ -# ifndef EERE -# define EERE (0) -# endif -# ifndef EEWE -# define EEWE (1) -# endif -# ifndef EEMWE -# define EEMWE (2) -# endif -# ifndef EERIE -# define EERIE (3) -# endif - -#endif /* __COMPILING_AVR_LIBC__ */ - - - -/*------------ Common Symbols ------------*/ - -/* -Generic definitions for registers that are common across multiple AVR devices -and families. -*/ - -/* Pointer registers definitions */ -#if __AVR_ARCH__ != 1 /* avr1 does not have X and Y pointers */ -# define XL r26 -# define XH r27 -# define YL r28 -# define YH r29 -#endif /* #if __AVR_ARCH__ != 1 */ -#define ZL r30 -#define ZH r31 - - -/* Status Register */ -#if defined(SREG) -# define AVR_STATUS_REG SREG -# if __AVR_ARCH__ >= 100 -# define AVR_STATUS_ADDR _SFR_MEM_ADDR(SREG) -# else -# define AVR_STATUS_ADDR _SFR_IO_ADDR(SREG) -# endif -#endif - -/* Stack Pointer (combined) Register */ -#if defined(SP) -# define AVR_STACK_POINTER_REG SP -# if __AVR_ARCH__ >= 100 -# define AVR_STACK_POINTER_ADDR _SFR_MEM_ADDR(SP) -# else -# define AVR_STACK_POINTER_ADDR _SFR_IO_ADDR(SP) -# endif -#endif - -/* Stack Pointer High Register */ -#if defined(SPH) -# define _HAVE_AVR_STACK_POINTER_HI 1 -# define AVR_STACK_POINTER_HI_REG SPH -# if __AVR_ARCH__ >= 100 -# define AVR_STACK_POINTER_HI_ADDR _SFR_MEM_ADDR(SPH) -# else -# define AVR_STACK_POINTER_HI_ADDR _SFR_IO_ADDR(SPH) -# endif -#endif - -/* Stack Pointer Low Register */ -#if defined(SPL) -# define AVR_STACK_POINTER_LO_REG SPL -# if __AVR_ARCH__ >= 100 -# define AVR_STACK_POINTER_LO_ADDR _SFR_MEM_ADDR(SPL) -# else -# define AVR_STACK_POINTER_LO_ADDR _SFR_IO_ADDR(SPL) -# endif -#endif - -/* RAMPZ Register */ -#if defined(RAMPZ) -# define AVR_RAMPZ_REG RAMPZ -# if __AVR_ARCH__ >= 100 -# define AVR_RAMPZ_ADDR _SFR_MEM_ADDR(RAMPZ) -# else -# define AVR_RAMPZ_ADDR _SFR_IO_ADDR(RAMPZ) -# endif -#endif - -/* Extended Indirect Register */ -#if defined(EIND) -# define AVR_EXTENDED_INDIRECT_REG EIND -# if __AVR_ARCH__ >= 100 -# define AVR_EXTENDED_INDIRECT_ADDR _SFR_MEM_ADDR(EIND) -# else -# define AVR_EXTENDED_INDIRECT_ADDR _SFR_IO_ADDR(EIND) -# endif -#endif - -/*------------ Workaround to old compilers (4.1.2 and earlier) ------------*/ - -#ifndef __AVR_HAVE_MOVW__ -# if defined(__AVR_ENHANCED__) && __AVR_ENHANCED__ -# define __AVR_HAVE_MOVW__ 1 -# endif -#endif - -#ifndef __AVR_HAVE_LPMX__ -# if defined(__AVR_ENHANCED__) && __AVR_ENHANCED__ -# define __AVR_HAVE_LPMX__ 1 -# endif -#endif - -#ifndef __AVR_HAVE_MUL__ -# if defined(__AVR_ENHANCED__) && __AVR_ENHANCED__ -# define __AVR_HAVE_MUL__ 1 -# endif -#endif - -#endif /* _AVR_COMMON_H */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/crc16.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/crc16.h deleted file mode 100644 index 3376cdf98..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/crc16.h +++ /dev/null @@ -1,39 +0,0 @@ -/* Copyright (c) 2005 Joerg Wunsch - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: crc16.h,v 1.10 2005/11/05 22:23:15 joerg_wunsch Exp $ */ - -#ifndef _AVR_CRC16_H_ -#define _AVR_CRC16_H_ - -#warning "This file has been moved to ." -#include - -#endif /* _AVR_CRC16_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/delay.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/delay.h deleted file mode 100644 index 7fb40e6cb..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/delay.h +++ /dev/null @@ -1,39 +0,0 @@ -/* Copyright (c) 2005 Joerg Wunsch - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: delay.h,v 1.14 2005/11/05 22:23:15 joerg_wunsch Exp $ */ - -#ifndef _AVR_DELAY_H_ -#define _AVR_DELAY_H_ - -#warning "This file has been moved to ." -#include - -#endif /* _AVR_DELAY_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/eeprom.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/eeprom.h deleted file mode 100644 index 3cf5575c5..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/eeprom.h +++ /dev/null @@ -1,442 +0,0 @@ -/* Copyright (c) 2002, 2003, 2004, 2007 Marek Michalkiewicz - Copyright (c) 2005, 2006 Bjoern Haase - Copyright (c) 2008 Atmel Corporation - Copyright (c) 2008 Wouter van Gulik - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: eeprom.h,v 1.21.2.6 2008/08/19 22:10:39 arcanum Exp $ */ - -#ifndef _AVR_EEPROM_H_ -#define _AVR_EEPROM_H_ 1 - -#include -#include /* size_t */ -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#ifndef __ATTR_PURE__ -# ifdef __DOXYGEN__ -# define __ATTR_PURE__ -# else -# define __ATTR_PURE__ __attribute__((__pure__)) -# endif -#endif - -#if (! (defined(__AVR_ATmega2560__) || defined(__AVR_ATmega2561__)) ) -uint16_t __eerd_word (const uint16_t *, uint8_t (*)(const uint8_t *)) - __ATTR_PURE__; -uint32_t __eerd_dword (const uint32_t *, uint8_t (*)(const uint8_t *)) - __ATTR_PURE__; -void __eerd_block (void *, const void *, size_t, uint8_t (*)(const uint8_t *)); - -void __eewr_word (uint16_t *, uint16_t, void (*)(uint8_t *, uint8_t)); -void __eewr_dword (uint32_t *, uint32_t, void (*)(uint8_t *, uint8_t)); -void __eewr_block (void *, const void *, size_t, void (*)(uint8_t *, uint8_t)); -#endif /* (! (defined(__AVR_ATmega2560__) || defined(__AVR_ATmega2561__)) ) */ - -#if !E2END && !defined(__DOXYGEN__) -# ifndef __COMPILING_AVR_LIBC__ -# warning "Device does not have EEPROM available." -# endif - /* Omit below for chips without EEPROM. */ - -#else - -/** \defgroup avr_eeprom : EEPROM handling - \code #include \endcode - - This header file declares the interface to some simple library - routines suitable for handling the data EEPROM contained in the - AVR microcontrollers. The implementation uses a simple polled - mode interface. Applications that require interrupt-controlled - EEPROM access to ensure that no time will be wasted in spinloops - will have to deploy their own implementation. - - \note All of the read/write functions first make sure the EEPROM - is ready to be accessed. Since this may cause long delays if a - write operation is still pending, time-critical applications - should first poll the EEPROM e. g. using eeprom_is_ready() before - attempting any actual I/O. But this functions are not wait until - SELFPRGEN in SPMCSR becomes zero. Do this manually, if your - softwate contains the Flash burning. - - \note As these functions modify IO registers, they are known to be - non-reentrant. If any of these functions are used from both, - standard and interrupt context, the applications must ensure - proper protection (e.g. by disabling interrupts before accessing - them). - - \note All write functions force erase_and_write programming mode. - */ - -/** \def EEMEM - \ingroup avr_eeprom - Attribute expression causing a variable to be allocated within the - .eeprom section. */ -#define EEMEM __attribute__((section(".eeprom"))) - - -/* Register definitions */ - -/* Check for aliases. */ -#if !defined(EEWE) && defined(EEPE) -# define EEWE EEPE -#endif - -#if !defined(EEMWE) && defined(EEMPE) -# define EEMWE EEMPE -#endif - -#if !defined(EECR) && defined(DEECR) -/* AT86RF401 */ -# define EECR DEECR -# define EEAR DEEAR -# define EEARL DEEAR -# define EEDR DEEDR -# define EERE EER -# define EEWE EEL -# define EEMWE EEU -#endif - - -#if !defined(EECR) || !defined(EEDR) || !defined(EEARL) - -# if !defined(__EEPROM_REG_LOCATIONS__) \ - && !defined(EEPROM_REG_LOCATIONS_OVERRIDE) - /* 6-byte string denoting where to find the EEPROM registers in memory - space. Adresses denoted in hex syntax with uppercase letters. Used - by the EEPROM subroutines. - First two letters: EECR address. - Second two letters: EEDR address. - Last two letters: EEAR address. - */ -# error "Unknown EEPROM register(s) location." -# endif - -/* If needed, override the locations defined in the IO headers. */ -# ifdef EEPROM_REG_LOCATIONS_OVERRIDE -# undef __EEPROM_REG_LOCATIONS__ -# define __EEPROM_REG_LOCATIONS__ EEPROM_REG_LOCATIONS_OVERRIDE -# endif - -# define CONCAT1(a, b) CONCAT2(a, b) -# define CONCAT2(a, b) a ## b -# define HEXNR CONCAT1(0x, __EEPROM_REG_LOCATIONS__) - -# undef EECR -# define EECR _SFR_IO8((HEXNR >> 16) & 0xFF) - -# undef EEDR -# define EEDR _SFR_IO8((HEXNR >> 8) & 0xFF) - -# undef EEAR -# define EEAR _SFR_IO8(HEXNR & 0xFF) - -# undef EEARH - -# undef EEARL -# define EEARL EEAR - -#endif - - -/** \def eeprom_is_ready - \ingroup avr_eeprom - \returns 1 if EEPROM is ready for a new read/write operation, 0 if not. - */ -#if defined(__DOXYGEN__) -# define eeprom_is_ready() -#elif defined(DEECR) -# define eeprom_is_ready() bit_is_clear(DEECR, BSY) -#else -# define eeprom_is_ready() bit_is_clear(EECR, EEWE) -#endif - - -/** \def eeprom_busy_wait - \ingroup avr_eeprom - Loops until the eeprom is no longer busy. - \returns Nothing. - */ -#define eeprom_busy_wait() do {} while (!eeprom_is_ready()) - - -/** \ingroup avr_eeprom - Read one byte from EEPROM address \a __p. - */ -__ATTR_PURE__ static __inline__ uint8_t eeprom_read_byte (const uint8_t *__p) -{ - do {} while (!eeprom_is_ready ()); -#if E2END <= 0xFF - EEARL = (uint8_t)(uint16_t)__p; -#else - EEAR = (uint16_t)__p; -#endif - /* Use inline assembly below as some AVRs have problems with accessing - EECR with STS instructions. For example, see errata for ATmega64. - The code below also assumes that EECR and EEDR are in the I/O space. - */ - uint8_t __result; - __asm__ __volatile__ - ( - "/* START EEPROM READ CRITICAL SECTION */ \n\t" - "sbi %1, %2 \n\t" - "in %0, %3 \n\t" - "/* END EEPROM READ CRITICAL SECTION */ \n\t" - : "=r" (__result) - : "i" (_SFR_IO_ADDR(EECR)), - "i" (EERE), - "i" (_SFR_IO_ADDR(EEDR)) - ); - return __result; -} - -/** \ingroup avr_eeprom - Read one 16-bit word (little endian) from EEPROM address \a __p. - */ -__ATTR_PURE__ static __inline__ uint16_t eeprom_read_word (const uint16_t *__p) -{ -#if (! (defined(__AVR_ATmega2560__) || defined(__AVR_ATmega2561__)) ) - return __eerd_word (__p, eeprom_read_byte); -#else - /* If ATmega256x device, do not call function. */ - union - { - uint16_t word; - struct - { - uint8_t lo; - uint8_t hi; - } byte; - } x; - - x.byte.lo = eeprom_read_byte ((const uint8_t *)__p); - x.byte.hi = eeprom_read_byte ((const uint8_t *)__p + 1); - return x.word; -#endif -} - -/** \ingroup avr_eeprom - Read one 32-bit double word (little endian) from EEPROM address \a __p. - */ -__ATTR_PURE__ static __inline__ -uint32_t eeprom_read_dword (const uint32_t *__p) -{ -#if (! (defined(__AVR_ATmega2560__) || defined(__AVR_ATmega2561__)) ) - return __eerd_dword (__p, eeprom_read_byte); -#else - /* If ATmega256x device, do not call function. */ - union - { - uint32_t dword; - struct - { - uint8_t byte0; - uint8_t byte1; - uint8_t byte2; - uint8_t byte3; - } byte; - } x; - - x.byte.byte0 = eeprom_read_byte ((const uint8_t *)__p); - x.byte.byte1 = eeprom_read_byte ((const uint8_t *)__p + 1); - x.byte.byte2 = eeprom_read_byte ((const uint8_t *)__p + 2); - x.byte.byte3 = eeprom_read_byte ((const uint8_t *)__p + 3); - return x.dword; -#endif -} - -/** \ingroup avr_eeprom - Read a block of \a __n bytes from EEPROM address \a __src to SRAM - \a __dst. - */ -static __inline__ void -eeprom_read_block (void *__dst, const void *__src, size_t __n) -{ -#if (! (defined(__AVR_ATmega2560__) || defined(__AVR_ATmega2561__)) ) - __eerd_block (__dst, __src, __n, eeprom_read_byte); -#else - /* If ATmega256x device, do not call function. */ - char *_myDstPtr; - char *_mySrcPtr; - - _myDstPtr = (char *)__dst; - _mySrcPtr = (char *)__src; - while (__n--) - { - //* Jul 6, 2010 modifed by Mark Sproul to work with the 2560 - // *(char *)__dst++ = eeprom_read_byte((const uint8_t *)__src++); - *_myDstPtr = eeprom_read_byte((const uint8_t *)_mySrcPtr); - _myDstPtr++; - _mySrcPtr++; - } -#endif -} - -/** \ingroup avr_eeprom - Write a byte \a __value to EEPROM address \a __p. - */ -static __inline__ void eeprom_write_byte (uint8_t *__p, uint8_t __value) -{ - do {} while (!eeprom_is_ready ()); - -#if defined(EEPM0) && defined(EEPM1) - EECR = 0; /* Set programming mode: erase and write. */ -#elif defined(EEPM0) || defined(EEPM1) -# warning "Unknown EECR register, eeprom_write_byte() has become outdated." -#endif - -#if E2END <= 0xFF - EEARL = (unsigned)__p; -#else - EEAR = (unsigned)__p; -#endif - EEDR = __value; - - __asm__ __volatile__ ( - "/* START EEPROM WRITE CRITICAL SECTION */\n\t" - "in r0, %[__sreg] \n\t" - "cli \n\t" - "sbi %[__eecr], %[__eemwe] \n\t" - "sbi %[__eecr], %[__eewe] \n\t" - "out %[__sreg], r0 \n\t" - "/* END EEPROM WRITE CRITICAL SECTION */" - : - : [__eecr] "i" (_SFR_IO_ADDR(EECR)), - [__sreg] "i" (_SFR_IO_ADDR(SREG)), - [__eemwe] "i" (EEMWE), - [__eewe] "i" (EEWE) - : "r0" - ); -} - -/** \ingroup avr_eeprom - Write a word \a __value to EEPROM address \a __p. - */ -static __inline__ void eeprom_write_word (uint16_t *__p, uint16_t __value) -{ -#if (! (defined(__AVR_ATmega2560__) || defined(__AVR_ATmega2561__)) ) - __eewr_word (__p, __value, eeprom_write_byte); -#else - /* If ATmega256x device, do not call function. */ - union - { - uint16_t word; - struct - { - uint8_t lo; - uint8_t hi; - } byte; - } x; - - x.word = __value; - eeprom_write_byte ((uint8_t *)__p, x.byte.lo); - eeprom_write_byte ((uint8_t *)__p + 1, x.byte.hi); -#endif -} - -/** \ingroup avr_eeprom - Write a 32-bit double word \a __value to EEPROM address \a __p. - */ -static __inline__ void eeprom_write_dword (uint32_t *__p, uint32_t __value) -{ -#if (! (defined(__AVR_ATmega2560__) || defined(__AVR_ATmega2561__)) ) - __eewr_dword (__p, __value, eeprom_write_byte); -#else - /* If ATmega256x device, do not call function. */ - union - { - uint32_t dword; - struct - { - uint8_t byte0; - uint8_t byte1; - uint8_t byte2; - uint8_t byte3; - } byte; - } x; - - x.dword = __value; - eeprom_write_byte ((uint8_t *)__p, x.byte.byte0); - eeprom_write_byte ((uint8_t *)__p + 1, x.byte.byte1); - eeprom_write_byte ((uint8_t *)__p + 2, x.byte.byte2); - eeprom_write_byte ((uint8_t *)__p + 3, x.byte.byte3); -#endif -} - -/** \ingroup avr_eeprom - Write a block of \a __n bytes to EEPROM address \a __dst from \a __src. - \note The argument order is mismatch with common functions like strcpy(). - */ -static __inline__ void -eeprom_write_block (const void *__src, void *__dst, size_t __n) -{ -#if (! (defined(__AVR_ATmega2560__) || defined(__AVR_ATmega2561__)) ) - __eewr_block (__dst, __src, __n, eeprom_write_byte); -#else - /* If ATmega256x device, do not call function. */ - uint8_t *_myDstPtr; - uint8_t *_mySrcPtr; - - //* Jul 6, 2010 modifed by Mark Sproul to work with the 2560 - _myDstPtr = (uint8_t *)__dst; - _mySrcPtr = (uint8_t *)__src; - - while (__n--) - { - // eeprom_write_byte((uint8_t *)__dst++, *(uint8_t *)__src++); - eeprom_write_byte(_myDstPtr++, *_mySrcPtr++); - } -#endif -} - -/** \name IAR C compatibility defines */ -/*@{*/ - -/** \def _EEPUT - \ingroup avr_eeprom - Write a byte to EEPROM. Compatibility define for IAR C. */ -#define _EEPUT(addr, val) eeprom_write_byte ((uint8_t *)(addr), (uint8_t)(val)) - -/** \def _EEGET - \ingroup avr_eeprom - Read a byte from EEPROM. Compatibility define for IAR C. */ -#define _EEGET(var, addr) (var) = eeprom_read_byte ((const uint8_t *)(addr)) - -/*@}*/ - -#endif /* E2END || defined(__DOXYGEN__) */ - -#ifdef __cplusplus -} -#endif - -#endif /* !_AVR_EEPROM_H */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/eeprom.h.orig b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/eeprom.h.orig deleted file mode 100644 index d34fb1be0..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/eeprom.h.orig +++ /dev/null @@ -1,423 +0,0 @@ -/* Copyright (c) 2002, 2003, 2004, 2007 Marek Michalkiewicz - Copyright (c) 2005, 2006 Bjoern Haase - Copyright (c) 2008 Atmel Corporation - Copyright (c) 2008 Wouter van Gulik - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: eeprom.h,v 1.21.2.6 2008/08/19 22:10:39 arcanum Exp $ */ - -#ifndef _AVR_EEPROM_H_ -#define _AVR_EEPROM_H_ 1 - -#include -#include /* size_t */ -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#ifndef __ATTR_PURE__ -# ifdef __DOXYGEN__ -# define __ATTR_PURE__ -# else -# define __ATTR_PURE__ __attribute__((__pure__)) -# endif -#endif - -#if (! (defined(__AVR_ATmega2560__) || defined(__AVR_ATmega2561__)) ) -uint16_t __eerd_word (const uint16_t *, uint8_t (*)(const uint8_t *)) - __ATTR_PURE__; -uint32_t __eerd_dword (const uint32_t *, uint8_t (*)(const uint8_t *)) - __ATTR_PURE__; -void __eerd_block (void *, const void *, size_t, uint8_t (*)(const uint8_t *)); - -void __eewr_word (uint16_t *, uint16_t, void (*)(uint8_t *, uint8_t)); -void __eewr_dword (uint32_t *, uint32_t, void (*)(uint8_t *, uint8_t)); -void __eewr_block (void *, const void *, size_t, void (*)(uint8_t *, uint8_t)); -#endif /* (! (defined(__AVR_ATmega2560__) || defined(__AVR_ATmega2561__)) ) */ - -#if !E2END && !defined(__DOXYGEN__) -# ifndef __COMPILING_AVR_LIBC__ -# warning "Device does not have EEPROM available." -# endif - /* Omit below for chips without EEPROM. */ - -#else - -/** \defgroup avr_eeprom : EEPROM handling - \code #include \endcode - - This header file declares the interface to some simple library - routines suitable for handling the data EEPROM contained in the - AVR microcontrollers. The implementation uses a simple polled - mode interface. Applications that require interrupt-controlled - EEPROM access to ensure that no time will be wasted in spinloops - will have to deploy their own implementation. - - \note All of the read/write functions first make sure the EEPROM - is ready to be accessed. Since this may cause long delays if a - write operation is still pending, time-critical applications - should first poll the EEPROM e. g. using eeprom_is_ready() before - attempting any actual I/O. But this functions are not wait until - SELFPRGEN in SPMCSR becomes zero. Do this manually, if your - softwate contains the Flash burning. - - \note As these functions modify IO registers, they are known to be - non-reentrant. If any of these functions are used from both, - standard and interrupt context, the applications must ensure - proper protection (e.g. by disabling interrupts before accessing - them). - - \note All write functions force erase_and_write programming mode. - */ - -/** \def EEMEM - \ingroup avr_eeprom - Attribute expression causing a variable to be allocated within the - .eeprom section. */ -#define EEMEM __attribute__((section(".eeprom"))) - - -/* Register definitions */ - -/* Check for aliases. */ -#if !defined(EEWE) && defined(EEPE) -# define EEWE EEPE -#endif - -#if !defined(EEMWE) && defined(EEMPE) -# define EEMWE EEMPE -#endif - -#if !defined(EECR) && defined(DEECR) -/* AT86RF401 */ -# define EECR DEECR -# define EEAR DEEAR -# define EEARL DEEAR -# define EEDR DEEDR -# define EERE EER -# define EEWE EEL -# define EEMWE EEU -#endif - - -#if !defined(EECR) || !defined(EEDR) || !defined(EEARL) - -# if !defined(__EEPROM_REG_LOCATIONS__) \ - && !defined(EEPROM_REG_LOCATIONS_OVERRIDE) - /* 6-byte string denoting where to find the EEPROM registers in memory - space. Adresses denoted in hex syntax with uppercase letters. Used - by the EEPROM subroutines. - First two letters: EECR address. - Second two letters: EEDR address. - Last two letters: EEAR address. - */ -# error "Unknown EEPROM register(s) location." -# endif - -/* If needed, override the locations defined in the IO headers. */ -# ifdef EEPROM_REG_LOCATIONS_OVERRIDE -# undef __EEPROM_REG_LOCATIONS__ -# define __EEPROM_REG_LOCATIONS__ EEPROM_REG_LOCATIONS_OVERRIDE -# endif - -# define CONCAT1(a, b) CONCAT2(a, b) -# define CONCAT2(a, b) a ## b -# define HEXNR CONCAT1(0x, __EEPROM_REG_LOCATIONS__) - -# undef EECR -# define EECR _SFR_IO8((HEXNR >> 16) & 0xFF) - -# undef EEDR -# define EEDR _SFR_IO8((HEXNR >> 8) & 0xFF) - -# undef EEAR -# define EEAR _SFR_IO8(HEXNR & 0xFF) - -# undef EEARH - -# undef EEARL -# define EEARL EEAR - -#endif - - -/** \def eeprom_is_ready - \ingroup avr_eeprom - \returns 1 if EEPROM is ready for a new read/write operation, 0 if not. - */ -#if defined(__DOXYGEN__) -# define eeprom_is_ready() -#elif defined(DEECR) -# define eeprom_is_ready() bit_is_clear(DEECR, BSY) -#else -# define eeprom_is_ready() bit_is_clear(EECR, EEWE) -#endif - - -/** \def eeprom_busy_wait - \ingroup avr_eeprom - Loops until the eeprom is no longer busy. - \returns Nothing. - */ -#define eeprom_busy_wait() do {} while (!eeprom_is_ready()) - - -/** \ingroup avr_eeprom - Read one byte from EEPROM address \a __p. - */ -__ATTR_PURE__ static __inline__ uint8_t eeprom_read_byte (const uint8_t *__p) -{ - do {} while (!eeprom_is_ready ()); -#if E2END <= 0xFF - EEARL = (uint8_t)__p; -#else - EEAR = (uint16_t)__p; -#endif - /* Use inline assembly below as some AVRs have problems with accessing - EECR with STS instructions. For example, see errata for ATmega64. - The code below also assumes that EECR and EEDR are in the I/O space. - */ - uint8_t __result; - __asm__ __volatile__ - ( - "/* START EEPROM READ CRITICAL SECTION */ \n\t" - "sbi %1, %2 \n\t" - "in %0, %3 \n\t" - "/* END EEPROM READ CRITICAL SECTION */ \n\t" - : "=r" (__result) - : "i" (_SFR_IO_ADDR(EECR)), - "i" (EERE), - "i" (_SFR_IO_ADDR(EEDR)) - ); - return __result; -} - -/** \ingroup avr_eeprom - Read one 16-bit word (little endian) from EEPROM address \a __p. - */ -__ATTR_PURE__ static __inline__ uint16_t eeprom_read_word (const uint16_t *__p) -{ -#if (! (defined(__AVR_ATmega2560__) || defined(__AVR_ATmega2561__)) ) - return __eerd_word (__p, eeprom_read_byte); -#else - /* If ATmega256x device, do not call function. */ - union - { - uint16_t word; - struct - { - uint8_t lo; - uint8_t hi; - } byte; - } x; - - x.byte.lo = eeprom_read_byte ((const uint8_t *)__p); - x.byte.hi = eeprom_read_byte ((const uint8_t *)__p + 1); - return x.word; -#endif -} - -/** \ingroup avr_eeprom - Read one 32-bit double word (little endian) from EEPROM address \a __p. - */ -__ATTR_PURE__ static __inline__ -uint32_t eeprom_read_dword (const uint32_t *__p) -{ -#if (! (defined(__AVR_ATmega2560__) || defined(__AVR_ATmega2561__)) ) - return __eerd_dword (__p, eeprom_read_byte); -#else - /* If ATmega256x device, do not call function. */ - union - { - uint32_t dword; - struct - { - uint8_t byte0; - uint8_t byte1; - uint8_t byte2; - uint8_t byte3; - } byte; - } x; - - x.byte.byte0 = eeprom_read_byte ((const uint8_t *)__p); - x.byte.byte1 = eeprom_read_byte ((const uint8_t *)__p + 1); - x.byte.byte2 = eeprom_read_byte ((const uint8_t *)__p + 2); - x.byte.byte3 = eeprom_read_byte ((const uint8_t *)__p + 3); - return x.dword; -#endif -} - -/** \ingroup avr_eeprom - Read a block of \a __n bytes from EEPROM address \a __src to SRAM - \a __dst. - */ -static __inline__ void -eeprom_read_block (void *__dst, const void *__src, size_t __n) -{ -#if (! (defined(__AVR_ATmega2560__) || defined(__AVR_ATmega2561__)) ) - __eerd_block (__dst, __src, __n, eeprom_read_byte); -#else - /* If ATmega256x device, do not call function. */ - while (__n--) - { - *(char *)__dst++ = eeprom_read_byte(__src++); - } -#endif -} - -/** \ingroup avr_eeprom - Write a byte \a __value to EEPROM address \a __p. - */ -static __inline__ void eeprom_write_byte (uint8_t *__p, uint8_t __value) -{ - do {} while (!eeprom_is_ready ()); - -#if defined(EEPM0) && defined(EEPM1) - EECR = 0; /* Set programming mode: erase and write. */ -#elif defined(EEPM0) || defined(EEPM1) -# warning "Unknown EECR register, eeprom_write_byte() has become outdated." -#endif - -#if E2END <= 0xFF - EEARL = (unsigned)__p; -#else - EEAR = (unsigned)__p; -#endif - EEDR = __value; - - __asm__ __volatile__ ( - "/* START EEPROM WRITE CRITICAL SECTION */\n\t" - "in r0, %[__sreg] \n\t" - "cli \n\t" - "sbi %[__eecr], %[__eemwe] \n\t" - "sbi %[__eecr], %[__eewe] \n\t" - "out %[__sreg], r0 \n\t" - "/* END EEPROM WRITE CRITICAL SECTION */" - : - : [__eecr] "i" (_SFR_IO_ADDR(EECR)), - [__sreg] "i" (_SFR_IO_ADDR(SREG)), - [__eemwe] "i" (EEMWE), - [__eewe] "i" (EEWE) - : "r0" - ); -} - -/** \ingroup avr_eeprom - Write a word \a __value to EEPROM address \a __p. - */ -static __inline__ void eeprom_write_word (uint16_t *__p, uint16_t __value) -{ -#if (! (defined(__AVR_ATmega2560__) || defined(__AVR_ATmega2561__)) ) - __eewr_word (__p, __value, eeprom_write_byte); -#else - /* If ATmega256x device, do not call function. */ - union - { - uint16_t word; - struct - { - uint8_t lo; - uint8_t hi; - } byte; - } x; - - x.word = __value; - eeprom_write_byte ((uint8_t *)__p, x.byte.lo); - eeprom_write_byte ((uint8_t *)__p + 1, x.byte.hi); -#endif -} - -/** \ingroup avr_eeprom - Write a 32-bit double word \a __value to EEPROM address \a __p. - */ -static __inline__ void eeprom_write_dword (uint32_t *__p, uint32_t __value) -{ -#if (! (defined(__AVR_ATmega2560__) || defined(__AVR_ATmega2561__)) ) - __eewr_dword (__p, __value, eeprom_write_byte); -#else - /* If ATmega256x device, do not call function. */ - union - { - uint32_t dword; - struct - { - uint8_t byte0; - uint8_t byte1; - uint8_t byte2; - uint8_t byte3; - } byte; - } x; - - x.dword = __value; - eeprom_write_byte ((uint8_t *)__p, x.byte.byte0); - eeprom_write_byte ((uint8_t *)__p + 1, x.byte.byte1); - eeprom_write_byte ((uint8_t *)__p + 2, x.byte.byte2); - eeprom_write_byte ((uint8_t *)__p + 3, x.byte.byte3); -#endif -} - -/** \ingroup avr_eeprom - Write a block of \a __n bytes to EEPROM address \a __dst from \a __src. - \note The argument order is mismatch with common functions like strcpy(). - */ -static __inline__ void -eeprom_write_block (const void *__src, void *__dst, size_t __n) -{ -#if (! (defined(__AVR_ATmega2560__) || defined(__AVR_ATmega2561__)) ) - __eewr_block (__dst, __src, __n, eeprom_write_byte); -#else - /* If ATmega256x device, do not call function. */ - while (__n--) - eeprom_write_byte (__dst++, *(uint8_t *)__src++); -#endif -} - -/** \name IAR C compatibility defines */ -/*@{*/ - -/** \def _EEPUT - \ingroup avr_eeprom - Write a byte to EEPROM. Compatibility define for IAR C. */ -#define _EEPUT(addr, val) eeprom_write_byte ((uint8_t *)(addr), (uint8_t)(val)) - -/** \def _EEGET - \ingroup avr_eeprom - Read a byte from EEPROM. Compatibility define for IAR C. */ -#define _EEGET(var, addr) (var) = eeprom_read_byte ((const uint8_t *)(addr)) - -/*@}*/ - -#endif /* E2END || defined(__DOXYGEN__) */ - -#ifdef __cplusplus -} -#endif - -#endif /* !_AVR_EEPROM_H */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/fuse.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/fuse.h deleted file mode 100644 index a516cea34..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/fuse.h +++ /dev/null @@ -1,264 +0,0 @@ -/* Copyright (c) 2007, Atmel Corporation - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: fuse.h,v 1.3.2.5 2008/07/18 20:32:14 arcanum Exp $ */ - -/* avr/fuse.h - Fuse API */ - -#ifndef _AVR_FUSE_H_ -#define _AVR_FUSE_H_ 1 - - -/** \file */ -/** \defgroup avr_fuse : Fuse Support - - \par Introduction - - The Fuse API allows a user to specify the fuse settings for the specific - AVR device they are compiling for. These fuse settings will be placed - in a special section in the ELF output file, after linking. - - Programming tools can take advantage of the fuse information embedded in - the ELF file, by extracting this information and determining if the fuses - need to be programmed before programming the Flash and EEPROM memories. - This also allows a single ELF file to contain all the - information needed to program an AVR. - - To use the Fuse API, include the header file, which in turn - automatically includes the individual I/O header file and the - file. These other two files provides everything necessary to set the AVR - fuses. - - \par Fuse API - - Each I/O header file must define the FUSE_MEMORY_SIZE macro which is - defined to the number of fuse bytes that exist in the AVR device. - - A new type, __fuse_t, is defined as a structure. The number of fields in - this structure are determined by the number of fuse bytes in the - FUSE_MEMORY_SIZE macro. - - If FUSE_MEMORY_SIZE == 1, there is only a single field: byte, of type - unsigned char. - - If FUSE_MEMORY_SIZE == 2, there are two fields: low, and high, of type - unsigned char. - - If FUSE_MEMORY_SIZE == 3, there are three fields: low, high, and extended, - of type unsigned char. - - If FUSE_MEMORY_SIZE > 3, there is a single field: byte, which is an array - of unsigned char with the size of the array being FUSE_MEMORY_SIZE. - - A convenience macro, FUSEMEM, is defined as a GCC attribute for a - custom-named section of ".fuse". - - A convenience macro, FUSES, is defined that declares a variable, __fuse, of - type __fuse_t with the attribute defined by FUSEMEM. This variable - allows the end user to easily set the fuse data. - - \note If a device-specific I/O header file has previously defined FUSEMEM, - then FUSEMEM is not redefined. If a device-specific I/O header file has - previously defined FUSES, then FUSES is not redefined. - - Each AVR device I/O header file has a set of defined macros which specify the - actual fuse bits available on that device. The AVR fuses have inverted - values, logical 1 for an unprogrammed (disabled) bit and logical 0 for a - programmed (enabled) bit. The defined macros for each individual fuse - bit represent this in their definition by a bit-wise inversion of a mask. - For example, the FUSE_EESAVE fuse in the ATmega128 is defined as: - \code - #define FUSE_EESAVE ~_BV(3) - \endcode - \note The _BV macro creates a bit mask from a bit number. It is then - inverted to represent logical values for a fuse memory byte. - - To combine the fuse bits macros together to represent a whole fuse byte, - use the bitwise AND operator, like so: - \code - (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_EESAVE & FUSE_SPIEN & FUSE_JTAGEN) - \endcode - - Each device I/O header file also defines macros that provide default values - for each fuse byte that is available. LFUSE_DEFAULT is defined for a Low - Fuse byte. HFUSE_DEFAULT is defined for a High Fuse byte. EFUSE_DEFAULT - is defined for an Extended Fuse byte. - - If FUSE_MEMORY_SIZE > 3, then the I/O header file defines macros that - provide default values for each fuse byte like so: - FUSE0_DEFAULT - FUSE1_DEFAULT - FUSE2_DEFAULT - FUSE3_DEFAULT - FUSE4_DEFAULT - .... - - \par API Usage Example - - Putting all of this together is easy. Using C99's designated initializers: - - \code - #include - - FUSES = - { - .low = LFUSE_DEFAULT, - .high = (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_EESAVE & FUSE_SPIEN & FUSE_JTAGEN), - .extended = EFUSE_DEFAULT, - }; - - int main(void) - { - return 0; - } - \endcode - - Or, using the variable directly instead of the FUSES macro, - - \code - #include - - __fuse_t __fuse __attribute__((section (".fuse"))) = - { - .low = LFUSE_DEFAULT, - .high = (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_EESAVE & FUSE_SPIEN & FUSE_JTAGEN), - .extended = EFUSE_DEFAULT, - }; - - int main(void) - { - return 0; - } - \endcode - - If you are compiling in C++, you cannot use the designated intializers so - you must do: - - \code - #include - - FUSES = - { - LFUSE_DEFAULT, // .low - (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_EESAVE & FUSE_SPIEN & FUSE_JTAGEN), // .high - EFUSE_DEFAULT, // .extended - }; - - int main(void) - { - return 0; - } - \endcode - - - However there are a number of caveats that you need to be aware of to - use this API properly. - - Be sure to include to get all of the definitions for the API. - The FUSES macro defines a global variable to store the fuse data. This - variable is assigned to its own linker section. Assign the desired fuse - values immediately in the variable initialization. - - The .fuse section in the ELF file will get its values from the initial - variable assignment ONLY. This means that you can NOT assign values to - this variable in functions and the new values will not be put into the - ELF .fuse section. - - The global variable is declared in the FUSES macro has two leading - underscores, which means that it is reserved for the "implementation", - meaning the library, so it will not conflict with a user-named variable. - - You must initialize ALL fields in the __fuse_t structure. This is because - the fuse bits in all bytes default to a logical 1, meaning unprogrammed. - Normal uninitialized data defaults to all locgial zeros. So it is vital that - all fuse bytes are initialized, even with default data. If they are not, - then the fuse bits may not programmed to the desired settings. - - Be sure to have the -mmcu=device flag in your compile command line and - your linker command line to have the correct device selected and to have - the correct I/O header file included when you include . - - You can print out the contents of the .fuse section in the ELF file by - using this command line: - \code - avr-objdump -s -j .fuse - \endcode - The section contents shows the address on the left, then the data going from - lower address to a higher address, left to right. - -*/ - -#ifndef __ASSEMBLER__ - -#ifndef FUSEMEM -#define FUSEMEM __attribute__((section (".fuse"))) -#endif - -#if FUSE_MEMORY_SIZE > 3 - -typedef struct -{ - unsigned char byte[FUSE_MEMORY_SIZE]; -} __fuse_t; - - -#elif FUSE_MEMORY_SIZE == 3 - -typedef struct -{ - unsigned char low; - unsigned char high; - unsigned char extended; -} __fuse_t; - -#elif FUSE_MEMORY_SIZE == 2 - -typedef struct -{ - unsigned char low; - unsigned char high; -} __fuse_t; - -#elif FUSE_MEMORY_SIZE == 1 - -typedef struct -{ - unsigned char byte; -} __fuse_t; - -#endif - -#ifndef FUSES -#define FUSES __fuse_t __fuse FUSEMEM -#endif - -#endif /* !__ASSEMBLER__ */ - -#endif /* _AVR_FUSE_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/interrupt.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/interrupt.h deleted file mode 100644 index 369c1b87e..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/interrupt.h +++ /dev/null @@ -1,344 +0,0 @@ -/* Copyright (c) 2002,2005,2007 Marek Michalkiewicz - Copyright (c) 2007, Dean Camera - - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: interrupt.h,v 1.25.2.1 2008/01/05 06:33:11 dmix Exp $ */ - -#ifndef _AVR_INTERRUPT_H_ -#define _AVR_INTERRUPT_H_ - -#include - -#if !defined(__DOXYGEN__) && !defined(__STRINGIFY) -/* Auxiliary macro for ISR_ALIAS(). */ -#define __STRINGIFY(x) #x -#endif /* !defined(__DOXYGEN__) */ - -/** -\file -\@{ -*/ - - -/** \name Global manipulation of the interrupt flag - - The global interrupt flag is maintained in the I bit of the status - register (SREG). -*/ - -#if defined(__DOXYGEN__) -/** \def sei() - \ingroup avr_interrupts - - \code #include \endcode - - Enables interrupts by setting the global interrupt mask. This function - actually compiles into a single line of assembly, so there is no function - call overhead. */ -#define sei() -#else /* !DOXYGEN */ -# define sei() __asm__ __volatile__ ("sei" ::) -#endif /* DOXYGEN */ - -#if defined(__DOXYGEN__) -/** \def cli() - \ingroup avr_interrupts - - \code #include \endcode - - Disables all interrupts by clearing the global interrupt mask. This function - actually compiles into a single line of assembly, so there is no function - call overhead. */ -#define cli() -#else /* !DOXYGEN */ -# define cli() __asm__ __volatile__ ("cli" ::) -#endif /* DOXYGEN */ - - -/** \name Macros for writing interrupt handler functions */ - - -#if defined(__DOXYGEN__) -/** \def ISR(vector [, attributes]) - \ingroup avr_interrupts - - \code #include \endcode - - Introduces an interrupt handler function (interrupt service - routine) that runs with global interrupts initially disabled - by default with no attributes specified. - - The attributes are optional and alter the behaviour and resultant - generated code of the interrupt routine. Multiple attributes may - be used for a single function, with a space seperating each - attribute. - - Valid attributes are ISR_BLOCK, ISR_NOBLOCK, ISR_NAKED and - ISR_ALIASOF(vect). - - \c vector must be one of the interrupt vector names that are - valid for the particular MCU type. -*/ -# define ISR(vector, [attributes]) -#else /* real code */ - -#if (__GNUC__ == 4 && __GNUC_MINOR__ >= 1) || (__GNUC__ > 4) -# define __INTR_ATTRS used, externally_visible -#else /* GCC < 4.1 */ -# define __INTR_ATTRS used -#endif - -#ifdef __cplusplus -# define ISR(vector, ...) \ - extern "C" void vector (void) __attribute__ ((signal,__INTR_ATTRS)) __VA_ARGS__; \ - void vector (void) -#else -# define ISR(vector, ...) \ - void vector (void) __attribute__ ((signal,__INTR_ATTRS)) __VA_ARGS__; \ - void vector (void) -#endif - -#endif /* DOXYGEN */ - -#if defined(__DOXYGEN__) -/** \def SIGNAL(vector) - \ingroup avr_interrupts - - \code #include \endcode - - Introduces an interrupt handler function that runs with global interrupts - initially disabled. - - This is the same as the ISR macro without optional attributes. - \deprecated Do not use SIGNAL() in new code. Use ISR() instead. -*/ -# define SIGNAL(vector) -#else /* real code */ - -#ifdef __cplusplus -# define SIGNAL(vector) \ - extern "C" void vector(void) __attribute__ ((signal, __INTR_ATTRS)); \ - void vector (void) -#else -# define SIGNAL(vector) \ - void vector (void) __attribute__ ((signal, __INTR_ATTRS)); \ - void vector (void) -#endif - -#endif /* DOXYGEN */ - -#if defined(__DOXYGEN__) -/** \def EMPTY_INTERRUPT(vector) - \ingroup avr_interrupts - - \code #include \endcode - - Defines an empty interrupt handler function. This will not generate - any prolog or epilog code and will only return from the ISR. Do not - define a function body as this will define it for you. - Example: - \code EMPTY_INTERRUPT(ADC_vect);\endcode */ -# define EMPTY_INTERRUPT(vector) -#else /* real code */ - -#ifdef __cplusplus -# define EMPTY_INTERRUPT(vector) \ - extern "C" void vector(void) __attribute__ ((signal,naked,__INTR_ATTRS)); \ - void vector (void) { __asm__ __volatile__ ("reti" ::); } -#else -# define EMPTY_INTERRUPT(vector) \ - void vector (void) __attribute__ ((signal,naked,__INTR_ATTRS)); \ - void vector (void) { __asm__ __volatile__ ("reti" ::); } -#endif - -#endif /* DOXYGEN */ - -#if defined(__DOXYGEN__) -/** \def ISR_ALIAS(vector, target_vector) - \ingroup avr_interrupts - - \code #include \endcode - - Aliases a given vector to another one in the same manner as the - ISR_ALIASOF attribute for the ISR() macro. Unlike the ISR_ALIASOF - attribute macro however, this is compatible for all versions of - GCC rather than just GCC version 4.2 onwards. - - \note This macro creates a trampoline function for the aliased - macro. This will result in a two cycle penalty for the aliased - vector compared to the ISR the vector is aliased to, due to the - JMP/RJMP opcode used. - - \deprecated - For new code, the use of ISR(..., ISR_ALIASOF(...)) is - recommended. - - Example: - \code - ISR(INT0_vect) - { - PORTB = 42; - } - - ISR_ALIAS(INT1_vect, INT0_vect); - \endcode -*/ -# define ISR_ALIAS(vector, target_vector) -#else /* real code */ - -#ifdef __cplusplus -# if defined(__AVR_MEGA__) && __AVR_MEGA__ -# define ISR_ALIAS(vector, tgt) extern "C" void vector (void) \ - __attribute__((signal, naked, __INTR_ATTRS)); \ - void vector (void) { asm volatile ("jmp " __STRINGIFY(tgt) ::); } -# else /* !__AVR_MEGA */ -# define ISR_ALIAS(vector, tgt) extern "C" void vector (void) \ - __attribute__((signal, naked, __INTR_ATTRS)); \ - void vector (void) { asm volatile ("rjmp " __STRINGIFY(tgt) ::); } -# endif /* __AVR_MEGA__ */ -#else /* !__cplusplus */ -# if defined(__AVR_MEGA__) && __AVR_MEGA__ -# define ISR_ALIAS(vector, tgt) void vector (void) \ - __attribute__((signal, naked, __INTR_ATTRS)); \ - void vector (void) { asm volatile ("jmp " __STRINGIFY(tgt) ::); } -# else /* !__AVR_MEGA */ -# define ISR_ALIAS(vector, tgt) void vector (void) \ - __attribute__((signal, naked, __INTR_ATTRS)); \ - void vector (void) { asm volatile ("rjmp " __STRINGIFY(tgt) ::); } -# endif /* __AVR_MEGA__ */ -#endif /* __cplusplus */ - -#endif /* DOXYGEN */ - -#if defined(__DOXYGEN__) -/** \def reti() - \ingroup avr_interrupts - - \code #include \endcode - - Returns from an interrupt routine, enabling global interrupts. This should - be the last command executed before leaving an ISR defined with the ISR_NAKED - attribute. - - This macro actually compiles into a single line of assembly, so there is - no function call overhead. -*/ -# define reti() -#else /* !DOXYGEN */ -# define reti() __asm__ __volatile__ ("reti" ::) -#endif /* DOXYGEN */ - -#if defined(__DOXYGEN__) -/** \def BADISR_vect - \ingroup avr_interrupts - - \code #include \endcode - - This is a vector which is aliased to __vector_default, the vector - executed when an ISR fires with no accompanying ISR handler. This - may be used along with the ISR() macro to create a catch-all for - undefined but used ISRs for debugging purposes. -*/ -# define BADISR_vect -#else /* !DOXYGEN */ -# define BADISR_vect __vector_default -#endif /* DOXYGEN */ - -/** \name ISR attributes */ - -#if defined(__DOXYGEN__) -/** \def ISR_BLOCK - \ingroup avr_interrupts - - \code# include \endcode - - Identical to an ISR with no attributes specified. Global - interrupts are initially disabled by the AVR hardware when - entering the ISR, without the compiler modifying this state. - - Use this attribute in the attributes parameter of the ISR macro. -*/ -# define ISR_BLOCK - -/** \def ISR_NOBLOCK - \ingroup avr_interrupts - - \code# include \endcode - - ISR runs with global interrupts initially enabled. The interrupt - enable flag is activated by the compiler as early as possible - within the ISR to ensure minimal processing delay for nested - interrupts. - - This may be used to create nested ISRs, however care should be - taken to avoid stack overflows, or to avoid infinitely entering - the ISR for those cases where the AVR hardware does not clear the - respective interrupt flag before entering the ISR. - - Use this attribute in the attributes parameter of the ISR macro. -*/ -# define ISR_NOBLOCK - -/** \def ISR_NAKED - \ingroup avr_interrupts - - \code# include \endcode - - ISR is created with no prologue or epilogue code. The user code is - responsible for preservation of the machine state including the - SREG register, as well as placing a reti() at the end of the - interrupt routine. - - Use this attribute in the attributes parameter of the ISR macro. -*/ -# define ISR_NAKED - -/** \def ISR_ALIASOF(target_vector) - \ingroup avr_interrupts - - \code#include \endcode - - The ISR is linked to another ISR, specified by the vect parameter. - This is compatible with GCC 4.2 and greater only. - - Use this attribute in the attributes parameter of the ISR macro. -*/ -# define ISR_ALIASOF(target_vector) -#else /* !DOXYGEN */ -# define ISR_BLOCK -# define ISR_NOBLOCK __attribute__((interrupt)) -# define ISR_NAKED __attribute__((naked)) -# define ISR_ALIASOF(v) __attribute__((alias(__STRINGIFY(v)))) -#endif /* DOXYGEN */ - -/* \@} */ - -#endif diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io.h deleted file mode 100644 index e8db96f1a..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io.h +++ /dev/null @@ -1,346 +0,0 @@ -/* Copyright (c) 2002,2003,2005,2006,2007 Marek Michalkiewicz, Joerg Wunsch - Copyright (c) 2007 Eric B. Weddington - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: io.h,v 1.52.2.9 2008/11/03 04:13:14 arcanum Exp $ */ - -/** \file */ -/** \defgroup avr_io : AVR device-specific IO definitions - \code #include \endcode - - This header file includes the apropriate IO definitions for the - device that has been specified by the -mmcu= compiler - command-line switch. This is done by diverting to the appropriate - file <avr/ioXXXX.h> which should - never be included directly. Some register names common to all - AVR devices are defined directly within <avr/common.h>, - which is included in <avr/io.h>, - but most of the details come from the respective include file. - - Note that this file always includes the following files: - \code - #include - #include - #include - #include - \endcode - See \ref avr_sfr for more details about that header file. - - Included are definitions of the IO register set and their - respective bit values as specified in the Atmel documentation. - Note that inconsistencies in naming conventions, - so even identical functions sometimes get different names on - different devices. - - Also included are the specific names useable for interrupt - function definitions as documented - \ref avr_signames "here". - - Finally, the following macros are defined: - - - \b RAMEND -
    - The last on-chip RAM address. -
    - - \b XRAMEND -
    - The last possible RAM location that is addressable. This is equal to - RAMEND for devices that do not allow for external RAM. For devices - that allow external RAM, this will larger than RAMEND. -
    - - \b E2END -
    - The last EEPROM address. -
    - - \b FLASHEND -
    - The last byte address in the Flash program space. -
    - - \b SPM_PAGESIZE -
    - For devices with bootloader support, the flash pagesize - (in bytes) to be used for the \c SPM instruction. - - \b E2PAGESIZE -
    - The size of the EEPROM page. - -*/ - -#ifndef _AVR_IO_H_ -#define _AVR_IO_H_ - -#include - -#if defined (__AVR_AT94K__) -# include -#elif defined (__AVR_AT43USB320__) -# include -#elif defined (__AVR_AT43USB355__) -# include -#elif defined (__AVR_AT76C711__) -# include -#elif defined (__AVR_AT86RF401__) -# include -#elif defined (__AVR_AT90PWM1__) -# include -#elif defined (__AVR_AT90PWM2__) -# include -#elif defined (__AVR_AT90PWM2B__) -# include -#elif defined (__AVR_AT90PWM3__) -# include -#elif defined (__AVR_AT90PWM3B__) -# include -#elif defined (__AVR_AT90PWM216__) -# include -#elif defined (__AVR_AT90PWM316__) -# include -#elif defined (__AVR_ATmega32C1__) -# include -#elif defined (__AVR_ATmega32M1__) -# include -#elif defined (__AVR_ATmega32U4__) -# include -#elif defined (__AVR_ATmega32U6__) -# include -#elif defined (__AVR_ATmega128__) -# include -#elif defined (__AVR_ATmega1280__) -# include -#elif defined (__AVR_ATmega1281__) -# include -#elif defined (__AVR_ATmega1284P__) -# include -#elif defined (__AVR_ATmega2560__) -# include -#elif defined (__AVR_ATmega2561__) -# include -#elif defined (__AVR_AT90CAN32__) -# include -#elif defined (__AVR_AT90CAN64__) -# include -#elif defined (__AVR_AT90CAN128__) -# include -#elif defined (__AVR_AT90USB82__) -# include -#elif defined (__AVR_AT90USB162__) -# include -#elif defined (__AVR_AT90USB646__) -# include -#elif defined (__AVR_AT90USB647__) -# include -#elif defined (__AVR_AT90USB1286__) -# include -#elif defined (__AVR_AT90USB1287__) -# include -#elif defined (__AVR_ATmega64__) -# include -#elif defined (__AVR_ATmega640__) -# include -#elif defined (__AVR_ATmega644__) -# include -#elif defined (__AVR_ATmega644P__) -# include -#elif defined (__AVR_ATmega645__) -# include -#elif defined (__AVR_ATmega6450__) -# include -#elif defined (__AVR_ATmega649__) -# include -#elif defined (__AVR_ATmega6490__) -# include -#elif defined (__AVR_ATmega103__) -# include -#elif defined (__AVR_ATmega32__) -# include -#elif defined (__AVR_ATmega323__) -# include -#elif defined (__AVR_ATmega324P__) -# include -#elif defined (__AVR_ATmega325__) -# include -#elif defined (__AVR_ATmega325P__) -# include -#elif defined (__AVR_ATmega3250__) -# include -#elif defined (__AVR_ATmega3250P__) -# include -#elif defined (__AVR_ATmega328P__) -# include -#elif defined (__AVR_ATmega329__) -# include -#elif defined (__AVR_ATmega329P__) -# include -#elif defined (__AVR_ATmega3290__) -# include -#elif defined (__AVR_ATmega3290P__) -# include -#elif defined (__AVR_ATmega32HVB__) -# include -#elif defined (__AVR_ATmega406__) -# include -#elif defined (__AVR_ATmega16__) -# include -#elif defined (__AVR_ATmega161__) -# include -#elif defined (__AVR_ATmega162__) -# include -#elif defined (__AVR_ATmega163__) -# include -#elif defined (__AVR_ATmega164P__) -# include -#elif defined (__AVR_ATmega165__) -# include -#elif defined (__AVR_ATmega165P__) -# include -#elif defined (__AVR_ATmega168__) -# include -#elif defined (__AVR_ATmega168P__) -# include -#elif defined (__AVR_ATmega169__) -# include -#elif defined (__AVR_ATmega169P__) -# include -#elif defined (__AVR_ATmega8HVA__) -# include -#elif defined (__AVR_ATmega16HVA__) -# include -#elif defined (__AVR_ATmega8__) -# include -#elif defined (__AVR_ATmega48__) -# include -#elif defined (__AVR_ATmega48P__) -# include -#elif defined (__AVR_ATmega88__) -# include -#elif defined (__AVR_ATmega88P__) -# include -#elif defined (__AVR_ATmega8515__) -# include -#elif defined (__AVR_ATmega8535__) -# include -#elif defined (__AVR_AT90S8535__) -# include -#elif defined (__AVR_AT90C8534__) -# include -#elif defined (__AVR_AT90S8515__) -# include -#elif defined (__AVR_AT90S4434__) -# include -#elif defined (__AVR_AT90S4433__) -# include -#elif defined (__AVR_AT90S4414__) -# include -#elif defined (__AVR_ATtiny22__) -# include -#elif defined (__AVR_ATtiny26__) -# include -#elif defined (__AVR_AT90S2343__) -# include -#elif defined (__AVR_AT90S2333__) -# include -#elif defined (__AVR_AT90S2323__) -# include -#elif defined (__AVR_AT90S2313__) -# include -#elif defined (__AVR_ATtiny2313__) -# include -#elif defined (__AVR_ATtiny13__) -# include -#elif defined (__AVR_ATtiny13A__) -# include -#elif defined (__AVR_ATtiny25__) -# include -#elif defined (__AVR_ATtiny45__) -# include -#elif defined (__AVR_ATtiny85__) -# include -#elif defined (__AVR_ATtiny24__) -# include -#elif defined (__AVR_ATtiny44__) -# include -#elif defined (__AVR_ATtiny84__) -# include -#elif defined (__AVR_ATtiny261__) -# include -#elif defined (__AVR_ATtiny461__) -# include -#elif defined (__AVR_ATtiny861__) -# include -#elif defined (__AVR_ATtiny43U__) -# include -#elif defined (__AVR_ATtiny48__) -# include -#elif defined (__AVR_ATtiny88__) -# include -#elif defined (__AVR_ATtiny167__) -# include -/* avr1: the following only supported for assembler programs */ -#elif defined (__AVR_ATtiny28__) -# include -#elif defined (__AVR_AT90S1200__) -# include -#elif defined (__AVR_ATtiny15__) -# include -#elif defined (__AVR_ATtiny12__) -# include -#elif defined (__AVR_ATtiny11__) -# include -#elif defined (__AVR_ATxmega64A1__) -# include -#elif defined (__AVR_ATxmega64A3__) -# include -#elif defined (__AVR_ATxmega128A1__) -# include -#elif defined (__AVR_ATxmega128A3__) -# include -#elif defined (__AVR_ATxmega256A3__) -# include -#elif defined (__AVR_ATxmega256A3B__) -# include -#else -# if !defined(__COMPILING_AVR_LIBC__) -# warning "device type not defined" -# endif -#endif - -#include - -#include - -#include - -/* Include fuse.h after individual IO header files. */ -#include - -/* Include lock.h after individual IO header files. */ -#include - -#endif /* _AVR_IO_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io1200.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io1200.h deleted file mode 100644 index 42e9a9755..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io1200.h +++ /dev/null @@ -1,270 +0,0 @@ -/* Copyright (c) 2002, Marek Michalkiewicz - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: io1200.h,v 1.8.4.3 2008/08/14 00:07:59 arcanum Exp $ */ - -/* avr/io1200.h - definitions for AT90S1200 */ - -#ifndef _AVR_IO1200_H_ -#define _AVR_IO1200_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "io1200.h" -#else -# error "Attempt to include more than one file." -#endif - -#ifndef __ASSEMBLER__ -# warning "MCU not supported by the C compiler" -#endif - -/* I/O registers */ - -/* 0x00..0x07 reserved */ - -/* Analog Comparator Control and Status Register */ -#define ACSR _SFR_IO8(0x08) - -/* 0x09..0x0F reserved */ - -#define PIND _SFR_IO8(0x10) -#define DDRD _SFR_IO8(0x11) -#define PORTD _SFR_IO8(0x12) - -/* 0x13..0x15 reserved */ - -#define PINB _SFR_IO8(0x16) -#define DDRB _SFR_IO8(0x17) -#define PORTB _SFR_IO8(0x18) - -/* 0x19..0x1B reserved */ - -/* EEPROM Control Register */ -#define EECR _SFR_IO8(0x1C) - -/* EEPROM Data Register */ -#define EEDR _SFR_IO8(0x1D) - -/* EEPROM Address Register */ -#define EEAR _SFR_IO8(0x1E) -#define EEARL _SFR_IO8(0x1E) - -/* 0x1F..0x20 reserved */ - -/* Watchdog Timer Control Register */ -#define WDTCR _SFR_IO8(0x21) - -/* 0x22..0x31 reserved */ - -#define TCNT0 _SFR_IO8(0x32) -#define TCCR0 _SFR_IO8(0x33) - -/* 0x34 reserved */ - -#define MCUCR _SFR_IO8(0x35) - -/* 0x36..0x37 reserved */ - -/* Timer/Counter Interrupt Flag Register */ -#define TIFR _SFR_IO8(0x38) - -/* Timer/Counter Interrupt MaSK Register */ -#define TIMSK _SFR_IO8(0x39) - -/* 0x3A reserved */ - -#define GIMSK _SFR_IO8(0x3B) - -/* 0x3C..0x3E reserved */ - -/* 0x3F SREG */ - -/* Interrupt vectors */ - -/* External Interrupt 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(2) -#define SIG_OVERFLOW0 _VECTOR(2) - -/* Analog Comparator */ -#define ANA_COMP_vect _VECTOR(3) -#define SIG_COMPARATOR _VECTOR(3) - -#define _VECTORS_SIZE 8 - -/* Bit numbers */ - -/* GIMSK */ -#define INT0 6 - -/* TIMSK */ -#define TOIE0 1 - -/* TIFR */ -#define TOV0 1 - -/* MCUCR */ -#define SE 5 -#define SM 4 -#define ISC01 1 -#define ISC00 0 - -/* TCCR0 */ -#define CS02 2 -#define CS01 1 -#define CS00 0 - -/* WDTCR */ -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -/* EECR */ -#undef EEMWE - -/* - PB7 = SCK - PB6 = MISO - PB5 = MOSI - PB1 = AIN1 - PB0 = AIN0 - */ - -/* PORTB */ -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -/* DDRB */ -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -/* PINB */ -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -/* PORTD */ -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -/* DDRD */ -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -/* PIND */ -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -/* ACSR */ -#define ACD 7 -#define ACO 5 -#define ACI 4 -#define ACIE 3 -#define ACIS1 1 -#define ACIS0 0 - -/* EEPROM Control Register */ -#define EERIE 3 -#define EEMWE 2 -#define EEWE 1 -#define EERE 0 - -#undef ZH - -/* Last memory addresses */ -#define RAMEND 0x1F -#define XRAMEND 0x0 -#define E2END 0x3F -#define E2PAGESIZE 0 -#define FLASHEND 0x3FF - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 1 - -/* Low Fuse Byte */ -#define FUSE_RCEN (unsigned char)~_BV(0) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define LFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x90 -#define SIGNATURE_2 0x01 - - -#endif /* _AVR_IO1200_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io2313.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io2313.h deleted file mode 100644 index 33d468a99..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io2313.h +++ /dev/null @@ -1,371 +0,0 @@ -/* Copyright (c) 2002, Marek Michalkiewicz - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: io2313.h,v 1.10.2.3 2008/08/14 00:07:59 arcanum Exp $ */ - -/* avr/io2313.h - definitions for AT90S2313 */ - -#ifndef _AVR_IO2313_H_ -#define _AVR_IO2313_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "io2313.h" -#else -# error "Attempt to include more than one file." -#endif - -/* I/O registers */ - -/* Analog Comparator Control and Status Register */ -#define ACSR _SFR_IO8(0x08) - -/* UART Baud Rate Register */ -#define UBRR _SFR_IO8(0x09) - -/* UART Control Register */ -#define UCR _SFR_IO8(0x0A) - -/* UART Status Register */ -#define USR _SFR_IO8(0x0B) - -/* UART I/O Data Register */ -#define UDR _SFR_IO8(0x0C) - -/* Input Pins, Port D */ -#define PIND _SFR_IO8(0x10) - -/* Data Direction Register, Port D */ -#define DDRD _SFR_IO8(0x11) - -/* Data Register, Port D */ -#define PORTD _SFR_IO8(0x12) - -/* Input Pins, Port B */ -#define PINB _SFR_IO8(0x16) - -/* Data Direction Register, Port B */ -#define DDRB _SFR_IO8(0x17) - -/* Data Register, Port B */ -#define PORTB _SFR_IO8(0x18) - -/* EEPROM Control Register */ -#define EECR _SFR_IO8(0x1C) - -/* EEPROM Data Register */ -#define EEDR _SFR_IO8(0x1D) - -/* EEPROM Address Register */ -#define EEAR _SFR_IO8(0x1E) -#define EEARL _SFR_IO8(0x1E) - -/* Watchdog Timer Control Register */ -#define WDTCR _SFR_IO8(0x21) - -/* T/C 1 Input Capture Register */ -#define ICR1 _SFR_IO16(0x24) -#define ICR1L _SFR_IO8(0x24) -#define ICR1H _SFR_IO8(0x25) - -/* Output Compare Register 1 */ -#define OCR1 _SFR_IO16(0x2A) -#define OCR1L _SFR_IO8(0x2A) -#define OCR1H _SFR_IO8(0x2B) -#define OCR1A _SFR_IO16(0x2A) -#define OCR1AL _SFR_IO8(0x2A) -#define OCR1AH _SFR_IO8(0x2B) - -/* Timer/Counter 1 */ -#define TCNT1 _SFR_IO16(0x2C) -#define TCNT1L _SFR_IO8(0x2C) -#define TCNT1H _SFR_IO8(0x2D) - -/* Timer/Counter 1 Control and Status Register */ -#define TCCR1B _SFR_IO8(0x2E) - -/* Timer/Counter 1 Control Register */ -#define TCCR1A _SFR_IO8(0x2F) - -/* Timer/Counter 0 */ -#define TCNT0 _SFR_IO8(0x32) - -/* Timer/Counter 0 Control Register */ -#define TCCR0 _SFR_IO8(0x33) - -/* MCU general Control Register */ -#define MCUCR _SFR_IO8(0x35) - -/* Timer/Counter Interrupt Flag register */ -#define TIFR _SFR_IO8(0x38) - -/* Timer/Counter Interrupt MaSK register */ -#define TIMSK _SFR_IO8(0x39) - -/* General Interrupt Flag Register */ -#define GIFR _SFR_IO8(0x3A) - -/* General Interrupt MaSK register */ -#define GIMSK _SFR_IO8(0x3B) - -/* 0x3C..0x3D SP */ - -/* 0x3F SREG */ - -/* Interrupt vectors */ - -/* External Interrupt Request 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* External Interrupt Request 1 */ -#define INT1_vect _VECTOR(2) -#define SIG_INTERRUPT1 _VECTOR(2) - -/* Timer/Counter1 Capture Event */ -#define TIMER1_CAPT1_vect _VECTOR(3) -#define SIG_INPUT_CAPTURE1 _VECTOR(3) - -/* Timer/Counter1 Compare Match */ -#define TIMER1_COMP1_vect _VECTOR(4) -#define SIG_OUTPUT_COMPARE1A _VECTOR(4) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF1_vect _VECTOR(5) -#define SIG_OVERFLOW1 _VECTOR(5) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF0_vect _VECTOR(6) -#define SIG_OVERFLOW0 _VECTOR(6) - -/* UART, Rx Complete */ -#define UART_RX_vect _VECTOR(7) -#define SIG_UART_RECV _VECTOR(7) - -/* UART Data Register Empty */ -#define UART_UDRE_vect _VECTOR(8) -#define SIG_UART_DATA _VECTOR(8) - -/* UART, Tx Complete */ -#define UART_TX_vect _VECTOR(9) -#define SIG_UART_TRANS _VECTOR(9) - -/* Analog Comparator */ -#define ANA_COMP_vect _VECTOR(10) -#define SIG_COMPARATOR _VECTOR(10) - -#define _VECTORS_SIZE 22 - -/* - * The Register Bit names are represented by their bit number (0-7). - */ - -/* General Interrupt MaSK register */ -#define INT1 7 -#define INT0 6 - -/* General Interrupt Flag Register */ -#define INTF1 7 -#define INTF0 6 - -/* Timer/Counter Interrupt MaSK register */ -#define TOIE1 7 -#define OCIE1A 6 -#define TICIE 3 /* old name */ -#define TICIE1 3 -#define TOIE0 1 - -/* Timer/Counter Interrupt Flag register */ -#define TOV1 7 -#define OCF1A 6 -#define ICF1 3 -#define TOV0 1 - -/* MCU general Control Register */ -#define SE 5 -#define SM 4 -#define ISC11 3 -#define ISC10 2 -#define ISC01 1 -#define ISC00 0 - -/* Timer/Counter 0 Control Register */ -#define CS02 2 -#define CS01 1 -#define CS00 0 - -/* Timer/Counter 1 Control Register */ -#define COM1A1 7 -#define COM1A0 6 -#define PWM11 1 -#define PWM10 0 - -/* Timer/Counter 1 Control and Status Register */ -#define ICNC1 7 -#define ICES1 6 -#define CTC1 3 -#define CS12 2 -#define CS11 1 -#define CS10 0 - -/* Watchdog Timer Control Register */ -#define WDTOE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -/* EEPROM Control Register */ -#define EEMWE 2 -#define EEWE 1 -#define EERE 0 - -/* Data Register, Port B */ -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -/* Data Direction Register, Port B */ -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -/* Input Pins, Port B */ -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -/* Data Register, Port D */ -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -/* Data Direction Register, Port D */ -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -/* Input Pins, Port D */ -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -/* UART Status Register */ -#define RXC 7 -#define TXC 6 -#define UDRE 5 -#define FE 4 -#define DOR 3 - -/* UART Control Register */ -#define RXCIE 7 -#define TXCIE 6 -#define UDRIE 5 -#define RXEN 4 -#define TXEN 3 -#define CHR9 2 -#define RXB8 1 -#define TXB8 0 - -/* Analog Comparator Control and Status Register */ -#define ACD 7 -#define ACO 5 -#define ACI 4 -#define ACIE 3 -#define ACIC 2 -#define ACIS1 1 -#define ACIS0 0 - -/* EEPROM Control Register */ -#define EERIE 3 -#define EEMWE 2 -#define EEWE 1 -#define EERE 0 - -/* Constants */ -#define RAMEND 0xDF -#define XRAMEND 0xDF -#define E2END 0x7F -#define E2PAGESIZE 0 -#define FLASHEND 0x07FF - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 1 - -/* Low Fuse Byte */ -#define FUSE_FSTRT (unsigned char)~_BV(0) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define LFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x91 -#define SIGNATURE_2 0x01 - - -#endif /* _AVR_IO2313_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io2323.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io2323.h deleted file mode 100644 index 0eacd300f..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io2323.h +++ /dev/null @@ -1,204 +0,0 @@ -/* Copyright (c) 2002, Marek Michalkiewicz - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: io2323.h,v 1.8.4.4 2008/10/17 23:27:45 arcanum Exp $ */ - -/* avr/io2323.h - definitions for AT90S2323 */ - -#ifndef _AVR_IO2323_H_ -#define _AVR_IO2323_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "io2323.h" -#else -# error "Attempt to include more than one file." -#endif - -/* I/O registers */ - -/* Input Pins, Port B */ -#define PINB _SFR_IO8(0x16) - -/* Data Direction Register, Port B */ -#define DDRB _SFR_IO8(0x17) - -/* Data Register, Port B */ -#define PORTB _SFR_IO8(0x18) - -/* EEPROM Control Register */ -#define EECR _SFR_IO8(0x1C) - -/* EEPROM Data Register */ -#define EEDR _SFR_IO8(0x1D) - -/* EEPROM Address Register */ -#define EEAR _SFR_IO8(0x1E) -#define EEARL _SFR_IO8(0x1E) - -/* Watchdog Timer Control Register */ -#define WDTCR _SFR_IO8(0x21) - -/* Timer/Counter 0 */ -#define TCNT0 _SFR_IO8(0x32) - -/* Timer/Counter 0 Control Register */ -#define TCCR0 _SFR_IO8(0x33) - -/* MCU Status Register */ -#define MCUSR _SFR_IO8(0x34) - -/* MCU general Control Register */ -#define MCUCR _SFR_IO8(0x35) - -/* Timer/Counter Interrupt Flag register */ -#define TIFR _SFR_IO8(0x38) - -/* Timer/Counter Interrupt MaSK register */ -#define TIMSK _SFR_IO8(0x39) - -/* General Interrupt Flag register */ -#define GIFR _SFR_IO8(0x3A) - -/* General Interrupt MaSK register */ -#define GIMSK _SFR_IO8(0x3B) - -/* 0x3D..0x3E SP */ - -/* 0x3F SREG */ - -/* Interrupt vectors */ - -/* External Interrupt 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF0_vect _VECTOR(2) -#define SIG_OVERFLOW0 _VECTOR(2) - -#define _VECTORS_SIZE 6 - -/* - The Register Bit names are represented by their bit number (0-7). - */ - -/* General Interrupt MaSK register */ -#define INT0 6 -#define INTF0 6 - -/* General Interrupt Flag Register */ -#define TOIE0 1 -#define TOV0 1 - -/* MCU general Control Register */ -#define SE 5 -#define SM 4 -#define ISC01 1 -#define ISC00 0 - -/* Timer/Counter 0 Control Register */ -#define CS02 2 -#define CS01 1 -#define CS00 0 - -/* Watchdog Timer Control Register */ -#define WDTOE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -/* - PB2 = SCK/T0 - PB1 = MISO/INT0 - PB0 = MOSI - */ - -/* Data Register, Port B */ -#define PB2 2 -#define PB1 1 -#define PB0 0 - -/* Data Direction Register, Port B */ -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -/* Input Pins, Port B */ -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -/* EEPROM Control Register */ -#define EERIE 3 -#define EEMWE 2 -#define EEWE 1 -#define EERE 0 - -/* Constants */ -#define RAMEND 0xDF -#define XRAMEND 0xDF -#define E2END 0x7F -#define E2PAGESIZE 0 -#define FLASHEND 0x07FF - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 1 - -/* Low Fuse Byte */ -#define FUSE_FSTRT (unsigned char)~_BV(0) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define LFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x91 -#define SIGNATURE_2 0x02 - - -#endif /* _AVR_IO2323_H_ */ - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x91 -#define SIGNATURE_2 0x02 - diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io2333.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io2333.h deleted file mode 100644 index f3a33fbdf..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io2333.h +++ /dev/null @@ -1,444 +0,0 @@ -/* Copyright (c) 2002, Marek Michalkiewicz - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: io2333.h,v 1.9 2005/10/30 22:11:23 joerg_wunsch Exp $ */ - -/* avr/io2333.h - definitions for AT90S2333 */ - -#ifndef _AVR_IO2333_H_ -#define _AVR_IO2333_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "io2333.h" -#else -# error "Attempt to include more than one file." -#endif - -/* I/O registers */ - -/* UART Baud Rate Register high */ -#define UBRRH _SFR_IO8(0x03) - -/* ADC Data register */ -#ifndef __ASSEMBLER__ -#define ADC _SFR_IO16(0x04) -#endif -#define ADCW _SFR_IO16(0x04) -#define ADCL _SFR_IO8(0x04) -#define ADCH _SFR_IO8(0x05) - -/* ADC Control and Status Register */ -#define ADCSR _SFR_IO8(0x06) - -/* ADC MUX */ -#define ADMUX _SFR_IO8(0x07) - -/* Analog Comparator Control and Status Register */ -#define ACSR _SFR_IO8(0x08) - -/* UART Baud Rate Register */ -#define UBRR _SFR_IO8(0x09) - -/* UART Control/Status Registers */ -#define UCSRB _SFR_IO8(0x0A) -#define UCSRA _SFR_IO8(0x0B) - -/* UART I/O Data Register */ -#define UDR _SFR_IO8(0x0C) - -/* SPI Control Register */ -#define SPCR _SFR_IO8(0x0D) - -/* SPI Status Register */ -#define SPSR _SFR_IO8(0x0E) - -/* SPI I/O Data Register */ -#define SPDR _SFR_IO8(0x0F) - -/* Input Pins, Port D */ -#define PIND _SFR_IO8(0x10) - -/* Data Direction Register, Port D */ -#define DDRD _SFR_IO8(0x11) - -/* Data Register, Port D */ -#define PORTD _SFR_IO8(0x12) - -/* Input Pins, Port C */ -#define PINC _SFR_IO8(0x13) - -/* Data Direction Register, Port C */ -#define DDRC _SFR_IO8(0x14) - -/* Data Register, Port C */ -#define PORTC _SFR_IO8(0x15) - -/* Input Pins, Port B */ -#define PINB _SFR_IO8(0x16) - -/* Data Direction Register, Port B */ -#define DDRB _SFR_IO8(0x17) - -/* Data Register, Port B */ -#define PORTB _SFR_IO8(0x18) - -/* EEPROM Control Register */ -#define EECR _SFR_IO8(0x1C) - -/* EEPROM Data Register */ -#define EEDR _SFR_IO8(0x1D) - -/* EEPROM Address Register */ -#define EEAR _SFR_IO8(0x1E) -#define EEARL _SFR_IO8(0x1E) - -/* Watchdog Timer Control Register */ -#define WDTCR _SFR_IO8(0x21) - -/* T/C 1 Input Capture Register */ -#define ICR1 _SFR_IO16(0x26) -#define ICR1L _SFR_IO8(0x26) -#define ICR1H _SFR_IO8(0x27) - -/* Timer/Counter1 Output Compare Register A */ -#define OCR1 _SFR_IO16(0x2A) -#define OCR1L _SFR_IO8(0x2A) -#define OCR1H _SFR_IO8(0x2B) - -/* Timer/Counter 1 */ -#define TCNT1 _SFR_IO16(0x2C) -#define TCNT1L _SFR_IO8(0x2C) -#define TCNT1H _SFR_IO8(0x2D) - -/* Timer/Counter 1 Control and Status Register */ -#define TCCR1B _SFR_IO8(0x2E) - -/* Timer/Counter 1 Control Register */ -#define TCCR1A _SFR_IO8(0x2F) - -/* Timer/Counter 0 */ -#define TCNT0 _SFR_IO8(0x32) - -/* Timer/Counter 0 Control Register */ -#define TCCR0 _SFR_IO8(0x33) - -/* MCU general Status Register */ -#define MCUSR _SFR_IO8(0x34) - -/* MCU general Control Register */ -#define MCUCR _SFR_IO8(0x35) - -/* Timer/Counter Interrupt Flag register */ -#define TIFR _SFR_IO8(0x38) - -/* Timer/Counter Interrupt MaSK register */ -#define TIMSK _SFR_IO8(0x39) - -/* General Interrupt Flag Register */ -#define GIFR _SFR_IO8(0x3A) - -/* General Interrupt MaSK register */ -#define GIMSK _SFR_IO8(0x3B) - -/* Interrupt vectors */ - -/* External Interrupt 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* External Interrupt 1 */ -#define INT1_vect _VECTOR(2) -#define SIG_INTERRUPT1 _VECTOR(2) - -/* Timer/Counter Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(3) -#define SIG_INPUT_CAPTURE1 _VECTOR(3) - -/* Timer/Counter1 Compare Match */ -#define TIMER1_COMP_vect _VECTOR(4) -#define SIG_OUTPUT_COMPARE1A _VECTOR(4) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(5) -#define SIG_OVERFLOW1 _VECTOR(5) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(6) -#define SIG_OVERFLOW0 _VECTOR(6) - -/* Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(7) -#define SIG_SPI _VECTOR(7) - -/* UART, Rx Complete */ -#define UART_RX_vect _VECTOR(8) -#define SIG_UART_RECV _VECTOR(8) - -/* UART Data Register Empty */ -#define UART_UDRE_vect _VECTOR(9) -#define SIG_UART_DATA _VECTOR(9) - -/* UART, Tx Complete */ -#define UART_TX_vect _VECTOR(10) -#define SIG_UART_TRANS _VECTOR(10) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(11) -#define SIG_ADC _VECTOR(11) - -/* EEPROM Ready */ -#define EE_RDY_vect _VECTOR(12) -#define SIG_EEPROM_READY _VECTOR(12) - -/* Analog Comparator */ -#define ANA_COMP_vect _VECTOR(13) -#define SIG_COMPARATOR _VECTOR(13) - -#define _VECTORS_SIZE 28 - -/* - The Register Bit names are represented by their bit number (0-7). -*/ - -/* MCU general Status Register */ -#define WDRF 3 -#define BORF 2 -#define EXTRF 1 -#define PORF 0 - -/* General Interrupt MaSK register */ -#define INT1 7 -#define INT0 6 - -/* General Interrupt Flag Register */ -#define INTF1 7 -#define INTF0 6 - -/* Timer/Counter Interrupt MaSK register */ -#define TOIE1 7 -#define OCIE1 6 -#define TICIE1 3 -#define TOIE0 1 - -/* Timer/Counter Interrupt Flag register */ -#define TOV1 7 -#define OCF1 6 -#define ICF1 3 -#define TOV0 1 - -/* MCU general Control Register */ -#define SE 5 -#define SM 4 -#define ISC11 3 -#define ISC10 2 -#define ISC01 1 -#define ISC00 0 - -/* Timer/Counter 0 Control Register */ -#define CS02 2 -#define CS01 1 -#define CS00 0 - -/* Timer/Counter 1 Control Register */ -#define COM11 7 -#define COM10 6 -#define PWM11 1 -#define PWM10 0 - -/* Timer/Counter 1 Control and Status Register */ -#define ICNC1 7 -#define ICES1 6 -#define CTC1 3 -#define CS12 2 -#define CS11 1 -#define CS10 0 - -/* Watchdog Timer Control Register */ -#define WDTOE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -/* SPI Control Register */ -#define SPIE 7 -#define SPE 6 -#define DORD 5 -#define MSTR 4 -#define CPOL 3 -#define CPHA 2 -#define SPR1 1 -#define SPR0 0 - -/* SPI Status Register */ -#define SPIF 7 -#define WCOL 6 - -/* UART Status Register */ -#define RXC 7 -#define TXC 6 -#define UDRE 5 -#define FE 4 -#define DOR 3 -#define MPCM 0 - -/* UART Control Register */ -#define RXCIE 7 -#define TXCIE 6 -#define UDRIE 5 -#define RXEN 4 -#define TXEN 3 -#define CHR9 2 -#define RXB8 1 -#define TXB8 0 - -/* Analog Comparator Control and Status Register */ -#define ACD 7 -#define AINBG 6 -#define ACO 5 -#define ACI 4 -#define ACIE 3 -#define ACIC 2 -#define ACIS1 1 -#define ACIS0 0 - -/* ADC MUX */ -#define ACDBG 6 -#define MUX2 2 -#define MUX1 1 -#define MUX0 0 - -/* ADC Control and Status Register */ -#define ADEN 7 -#define ADSC 6 -#define ADFR 5 -#define ADIF 4 -#define ADIE 3 -#define ADPS2 2 -#define ADPS1 1 -#define ADPS0 0 - -/* Data Register, Port B */ -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -/* Data Direction Register, Port B */ -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -/* Input Pins, Port B */ -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -/* Data Register, Port C */ -#define PC5 5 -#define PC4 4 -#define PC3 3 -#define PC2 2 -#define PC1 1 -#define PC0 0 - -/* Data Direction Register, Port C */ -#define DDC5 5 -#define DDC4 4 -#define DDC3 3 -#define DDC2 2 -#define DDC1 1 -#define DDC0 0 - -/* Input Pins, Port C */ -#define PINC5 5 -#define PINC4 4 -#define PINC3 3 -#define PINC2 2 -#define PINC1 1 -#define PINC0 0 - -/* Data Register, Port D */ -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -/* Data Direction Register, Port D */ -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -/* Input Pins, Port D */ -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -/* EEPROM Control Register */ -#define EERIE 3 -#define EEMWE 2 -#define EEWE 1 -#define EERE 0 - -/* Constants */ -#define RAMEND 0xDF /*Last On-Chip SRAM location*/ -#define XRAMEND 0xDF -#define E2END 0x7F -#define FLASHEND 0x7FF - -#endif /* _AVR_IO2333_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io2343.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io2343.h deleted file mode 100644 index 7ab6da81d..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io2343.h +++ /dev/null @@ -1,209 +0,0 @@ -/* Copyright (c) 2002, Marek Michalkiewicz - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: io2343.h,v 1.9.2.3 2008/08/14 00:07:59 arcanum Exp $ */ - -/* avr/io2343.h - definitions for AT90S2343 */ - -#ifndef _AVR_IO2343_H_ -#define _AVR_IO2343_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "io2343.h" -#else -# error "Attempt to include more than one file." -#endif - -/* I/O registers */ - -/* Input Pins, Port B */ -#define PINB _SFR_IO8(0x16) - -/* Data Direction Register, Port B */ -#define DDRB _SFR_IO8(0x17) - -/* Data Register, Port B */ -#define PORTB _SFR_IO8(0x18) - -/* EEPROM Control Register */ -#define EECR _SFR_IO8(0x1C) - -/* EEPROM Data Register */ -#define EEDR _SFR_IO8(0x1D) - -/* EEPROM Address Register */ -#define EEAR _SFR_IO8(0x1E) -#define EEARL _SFR_IO8(0x1E) - -/* Watchdog Timer Control Register */ -#define WDTCR _SFR_IO8(0x21) - -/* Timer/Counter 0 */ -#define TCNT0 _SFR_IO8(0x32) - -/* Timer/Counter 0 Control Register */ -#define TCCR0 _SFR_IO8(0x33) - -/* MCU Status Register */ -#define MCUSR _SFR_IO8(0x34) - -/* MCU general Control Register */ -#define MCUCR _SFR_IO8(0x35) - -/* Timer/Counter Interrupt Flag register */ -#define TIFR _SFR_IO8(0x38) - -/* Timer/Counter Interrupt MaSK register */ -#define TIMSK _SFR_IO8(0x39) - -/* General Interrupt Flag register */ -#define GIFR _SFR_IO8(0x3A) - -/* General Interrupt MaSK register */ -#define GIMSK _SFR_IO8(0x3B) - -/* 0x3D..0x3E SP */ - -/* 0x3F SREG */ - -/* Interrupt vectors */ - -/* External Interrupt 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF0_vect _VECTOR(2) -#define SIG_OVERFLOW0 _VECTOR(2) - -#define _VECTORS_SIZE 6 - -/* - The Register Bit names are represented by their bit number (0-7). - */ - -/* General Interrupt MaSK register */ -#define INT0 6 -#define INTF0 6 - -/* General Interrupt Flag Register */ -#define TOIE0 1 -#define TOV0 1 - -/* MCU general Control Register */ -#define SE 5 -#define SM 4 -#define ISC01 1 -#define ISC00 0 - -/* MCU Status Register */ -#define PORF 0 -#define EXTRF 1 - -/* Timer/Counter 0 Control Register */ -#define CS02 2 -#define CS01 1 -#define CS00 0 - -/* Watchdog Timer Control Register */ -#define WDTOE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -/* - PB3 = CLOCK - PB2 = SCK/T0 - PB1 = MISO/INT0 - PB0 = MOSI - */ - -/* Data Register, Port B */ -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -/* Data Direction Register, Port B */ -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -/* Input Pins, Port B */ -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -/* EEPROM Control Register */ -#define EERIE 3 -#define EEMWE 2 -#define EEWE 1 -#define EERE 0 - -/* Constants */ -#define RAMEND 0xDF -#define XRAMEND 0xDF -#define E2END 0x7F -#define E2PAGESIZE 0 -#define FLASHEND 0x07FF - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 1 - -/* Low Fuse Byte */ -#define FUSE_RCEN (unsigned char)~_BV(0) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define LFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x91 -#define SIGNATURE_2 0x03 - - -#endif /* _AVR_IO2343_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io43u32x.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io43u32x.h deleted file mode 100644 index 82211ba60..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io43u32x.h +++ /dev/null @@ -1,436 +0,0 @@ -/* Copyright (c) 2003,2005 Keith Gudger - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: io43u32x.h,v 1.5 2005/11/10 22:19:07 joerg_wunsch Exp $ */ - -/* avr/io43u32x.h - definitions for AT43USB32x */ - -#ifndef _AVR_IO43U32X_H_ -#define _AVR_IO43U32X_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "io43u32x.h" -#else -# error "Attempt to include more than one file." -#endif - -/* I/O registers */ - -/* Analog Comparator Control and Status Register */ -#define ACSR _SFR_IO8(0x08) - -/* UART Baud Rate Register */ -#define UBRR _SFR_IO8(0x09) - -/* UART Control Register */ -#define UCR _SFR_IO8(0x0A) - -/* UART Status Register */ -#define USR _SFR_IO8(0x0B) - -/* UART I/O Data Register */ -#define UDR _SFR_IO8(0x0C) - -/* Input Pins, Port E */ // new port for 43324/6 -#define PINE _SFR_IO8(0x01) - -/* Data Direction Register, Port E */ -#define DDRE _SFR_IO8(0x02) - -/* Data Register, Port E */ -#define PORTE _SFR_IO8(0x03) - -/* SPI Control Register */ -#define SPCR _SFR_IO8(0x0D) - -/* SPI Status Register */ -#define SPSR _SFR_IO8(0x0E) - -/* SPI I/O Data Register */ -#define SPDR _SFR_IO8(0x0F) - -/* Input Pins, Port D */ -#define PIND _SFR_IO8(0x10) - -/* Data Direction Register, Port D */ -#define DDRD _SFR_IO8(0x11) - -/* Data Register, Port D */ -#define PORTD _SFR_IO8(0x12) - -/* Input Pins, Port C */ -#define PINC _SFR_IO8(0x13) - -/* Data Direction Register, Port C */ -#define DDRC _SFR_IO8(0x14) - -/* Data Register, Port C */ -#define PORTC _SFR_IO8(0x15) - -/* Input Pins, Port B */ -#define PINB _SFR_IO8(0x16) - -/* Data Direction Register, Port B */ -#define DDRB _SFR_IO8(0x17) - -/* Data Register, Port B */ -#define PORTB _SFR_IO8(0x18) - -/* Input Pins, Port A */ -#define PINA _SFR_IO8(0x19) - -/* Data Direction Register, Port A */ -#define DDRA _SFR_IO8(0x1A) - -/* Data Register, Port A */ -#define PORTA _SFR_IO8(0x1B) - -/* 0x1C..0x1F reserved */ - -/* Watchdog Timer Control Register */ -#define WDTCR _SFR_IO8(0x21) - -/* T/C 1 Input Capture Register */ -#define ICR1 _SFR_IO16(0x24) -#define ICR1L _SFR_IO8(0x24) -#define ICR1H _SFR_IO8(0x25) - -/* Timer/Counter1 Output Compare Register B */ -#define OCR1B _SFR_IO16(0x28) -#define OCR1BL _SFR_IO8(0x28) -#define OCR1BH _SFR_IO8(0x29) - -/* Timer/Counter1 Output Compare Register A */ -#define OCR1A _SFR_IO16(0x2A) -#define OCR1AL _SFR_IO8(0x2A) -#define OCR1AH _SFR_IO8(0x2B) - -/* Timer/Counter 1 */ -#define TCNT1 _SFR_IO16(0x2C) -#define TCNT1L _SFR_IO8(0x2C) -#define TCNT1H _SFR_IO8(0x2D) - -/* Timer/Counter 1 Control and Status Register */ -#define TCCR1B _SFR_IO8(0x2E) - -/* Timer/Counter 1 Control Register */ -#define TCCR1A _SFR_IO8(0x2F) - -/* Timer/Counter 0 */ -#define TCNT0 _SFR_IO8(0x32) - -/* Timer/Counter 0 Control Register */ -#define TCCR0 _SFR_IO8(0x33) - -/* MCU general Control Register */ -#define MCUCR _SFR_IO8(0x35) - -/* Timer/Counter Interrupt Flag Register */ -#define TIFR _SFR_IO8(0x38) - -/* Timer/Counter Interrupt MaSK register */ -#define TIMSK _SFR_IO8(0x39) - -/* General Interrupt Control Register */ -#define GIFR _SFR_IO8(0x3A) - -/* General Interrupt Mask register */ -#define GIMSK _SFR_IO8(0x3B) - -/* Interrupt vectors */ - -#define SIG_INTERRUPT0 _VECTOR(1) -#define SIG_INTERRUPT1 _VECTOR(2) -#define SIG_TIMER1_CAPT1 _VECTOR(3) -#define SIG_INPUT_CAPTURE1 _VECTOR(3) -#define SIG_OUTPUT_COMPARE1A _VECTOR(4) -#define SIG_OUTPUT_COMPARE1B _VECTOR(5) -#define SIG_OVERFLOW1 _VECTOR(6) -#define SIG_OVERFLOW0 _VECTOR(7) -#define SIG_SPI _VECTOR(8) -#define SIG_UART_RECV _VECTOR(9) -#define SIG_UART_DATA _VECTOR(10) -#define SIG_UART_TRANS _VECTOR(11) -#define SIG_USB_INT _VECTOR(12) - -#define _VECTORS_SIZE 52 - -/* - The Register Bit names are represented by their bit number (0-7). -*/ - -/* Timer/Counter Interrupt MaSK register */ -#define TICIE1 3 -#define OCIE1A 6 -#define OCIE1B 5 -#define TOIE1 7 -#define TOIE0 1 - -/* Timer/Counter Interrupt Flag Register */ -#define ICF1 3 -#define OCF1A 6 -#define OCF1B 5 -#define TOV1 7 -#define TOV0 1 - -/* MCU general Control Register */ -#define SE 5 -#define SM 4 -#define ISC11 3 -#define ISC10 2 -#define ISC01 1 -#define ISC00 0 - -/* Timer/Counter 0 Control Register */ -#define CS02 2 -#define CS01 1 -#define CS00 0 - - -/* Timer/Counter 1 Control Register */ -#define COM1A1 7 -#define COM1A0 6 -#define COM1B1 5 -#define COM1B0 4 -#define PWM11 1 -#define PWM10 0 - -/* Timer/Counter 1 Control and Status Register */ -#define ICNC1 7 -#define ICES1 6 -#define CTC1 3 -#define CS12 2 -#define CS11 1 -#define CS10 0 - -/* Watchdog Timer Control Register */ -#define WDTOE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -/* Data Register, Port A */ -#define PA7 7 -#define PA6 6 -#define PA5 5 -#define PA4 4 -#define PA3 3 -#define PA2 2 -#define PA1 1 -#define PA0 0 - -/* Data Direction Register, Port A */ -#define DDA7 7 -#define DDA6 6 -#define DDA5 5 -#define DDA4 4 -#define DDA3 3 -#define DDA2 2 -#define DDA1 1 -#define DDA0 0 - -/* Input Pins, Port A */ -#define PINA7 7 -#define PINA6 6 -#define PINA5 5 -#define PINA4 4 -#define PINA3 3 -#define PINA2 2 -#define PINA1 1 -#define PINA0 0 - -/* Data Register, Port B */ -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -/* Data Direction Register, Port B */ -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -/* Input Pins, Port B */ -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -/* Data Direction Register, Port C */ -#define DDC7 7 -#define DDC6 6 -#define DDC5 5 -#define DDC4 4 -#define DDC3 3 -#define DDC2 2 -#define DDC1 1 -#define DDC0 0 - -/* Input Pins, Port C */ -#define PINC7 7 -#define PINC6 6 -#define PINC5 5 -#define PINC4 4 -#define PINC3 3 -#define PINC2 2 -#define PINC1 1 -#define PINC0 0 - -/* Data Register, Port C */ -#define PC7 7 -#define PC6 6 -#define PC5 5 -#define PC4 4 -#define PC3 3 -#define PC2 2 -#define PC1 1 -#define PC0 0 - -/* Data Register, Port D */ -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -/* Data Direction Register, Port D */ -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -/* Input Pins, Port D */ -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -/* Data Register, Port E */ -#define PE7 7 -#define PE6 6 -#define PE5 5 -#define PE4 4 -#define PE3 3 -#define PE2 2 -#define PE1 1 -#define PE0 0 - -/* Data Direction Register, Port E */ -#define DDE7 7 -#define DDE6 6 -#define DDE5 5 -#define DDE4 4 -#define DDE3 3 -#define DDE2 2 -#define DDE1 1 -#define DDE0 0 - -/* Input Pins, Port E */ -#define PINE7 7 -#define PINE6 6 -#define PINE5 5 -#define PINE4 4 -#define PINE3 3 -#define PINE2 2 -#define PINE1 1 -#define PINE0 0 - -/* SPI Status Register */ -#define SPIF 7 -#define WCOL 6 - -/* SPI Control Register */ -#define SPIE 7 -#define SPE 6 -#define DORD 5 -#define MSTR 4 -#define CPOL 3 -#define CPHA 2 -#define SPR1 1 -#define SPR0 0 - -/* UART Status Register */ -#define RXC 7 -#define TXC 6 -#define UDRE 5 -#define FE 4 -#define DOR 3 - -/* UART Control Register */ -#define RXCIE 7 -#define TXCIE 6 -#define UDRIE 5 -#define RXEN 4 -#define TXEN 3 -#define CHR9 2 -#define RXB8 1 -#define TXB8 0 - -/* Constants */ -#define RAMEND 0x025F /*Last On-Chip SRAM Location*/ -#define XRAMEND 0x025F -#define E2END 0x0000 - -/* FIXME: should be 0x1FFFF for max 128K (64K*16) external program memory, - but no RAMPZ causes gcrt1.S build to fail, so assume 64K for now... */ -#define FLASHEND 0x0FFFF - -#endif /* _AVR_43USB32X_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io43u35x.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io43u35x.h deleted file mode 100644 index 5109cdd39..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io43u35x.h +++ /dev/null @@ -1,428 +0,0 @@ -/* Copyright (c) 2003,2005 Keith Gudger - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: io43u35x.h,v 1.7 2005/11/10 22:19:07 joerg_wunsch Exp $ */ - -/* avr/io43u35x.h - definitions for AT43USB35x */ - -#ifndef _AVR_IO43U35X_H_ -#define _AVR_IO43U35X_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "io43u35x.h" -#else -# error "Attempt to include more than one file." -#endif - -/* I/O registers */ - -/* ADC Data Register */ -#ifndef __ASSEMBLER__ -#define ADC _SFR_IO16(0x02) -#endif -#define ADCW _SFR_IO16(0x02) -#define ADCL _SFR_IO8(0x02) -#define ADCH _SFR_IO8(0x03) - -/* ADC Control and status register */ -#define ADCSR _SFR_IO8(0x07) - -/* ADC Multiplexer select */ -#define ADMUX _SFR_IO8(0x08) - -/* Analog Comparator Control and Status Register */ -#define ACSR _SFR_IO8(0x08) - -/* Input Pins, Port F */ -#define PINF _SFR_IO8(0x04) - -/* Data Direction Register, Port F */ -#define DDRF _SFR_IO8(0x05) - -/* Data Register, Port F */ -#define PORTF _SFR_IO8(0x06) - -/* Input Pins, Port E */ -#define PINE _SFR_IO8(0x01) - -/* Data Direction Register, Port E */ -#define DDRE _SFR_IO8(0x02) - -/* Data Register, Port E */ -#define PORTE _SFR_IO8(0x03) - -/* SPI Control Register */ -#define SPCR _SFR_IO8(0x0D) - -/* SPI Status Register */ -#define SPSR _SFR_IO8(0x0E) - -/* SPI I/O Data Register */ -#define SPDR _SFR_IO8(0x0F) - -/* Input Pins, Port D */ -#define PIND _SFR_IO8(0x10) - -/* Data Direction Register, Port D */ -#define DDRD _SFR_IO8(0x11) - -/* Data Register, Port D */ -#define PORTD _SFR_IO8(0x12) - -/* Input Pins, Port C */ -#define PINC _SFR_IO8(0x13) - -/* Data Direction Register, Port C */ -#define DDRC _SFR_IO8(0x14) - -/* Data Register, Port C */ -#define PORTC _SFR_IO8(0x15) - -/* Input Pins, Port B */ -#define PINB _SFR_IO8(0x16) - -/* Data Direction Register, Port B */ -#define DDRB _SFR_IO8(0x17) - -/* Data Register, Port B */ -#define PORTB _SFR_IO8(0x18) - -/* Input Pins, Port A */ -#define PINA _SFR_IO8(0x19) - -/* Data Direction Register, Port A */ -#define DDRA _SFR_IO8(0x1A) - -/* Data Register, Port A */ -#define PORTA _SFR_IO8(0x1B) - -/* 0x1C..0x1F reserved */ - -/* Watchdog Timer Control Register */ -#define WDTCR _SFR_IO8(0x21) - -/* T/C 1 Input Capture Register */ -#define ICR1 _SFR_IO16(0x24) -#define ICR1L _SFR_IO8(0x24) -#define ICR1H _SFR_IO8(0x25) - -/* Timer/Counter1 Output Compare Register B */ -#define OCR1B _SFR_IO16(0x28) -#define OCR1BL _SFR_IO8(0x28) -#define OCR1BH _SFR_IO8(0x29) - -/* Timer/Counter1 Output Compare Register A */ -#define OCR1A _SFR_IO16(0x2A) -#define OCR1AL _SFR_IO8(0x2A) -#define OCR1AH _SFR_IO8(0x2B) - -/* Timer/Counter 1 */ -#define TCNT1 _SFR_IO16(0x2C) -#define TCNT1L _SFR_IO8(0x2C) -#define TCNT1H _SFR_IO8(0x2D) - -/* Timer/Counter 1 Control and Status Register */ -#define TCCR1B _SFR_IO8(0x2E) - -/* Timer/Counter 1 Control Register */ -#define TCCR1A _SFR_IO8(0x2F) - -/* Timer/Counter 0 */ -#define TCNT0 _SFR_IO8(0x32) - -/* Timer/Counter 0 Control Register */ -#define TCCR0 _SFR_IO8(0x33) - -/* MCU general Control Register */ -#define MCUCR _SFR_IO8(0x35) - -/* Timer/Counter Interrupt Flag Register */ -#define TIFR _SFR_IO8(0x38) - -/* Timer/Counter Interrupt MaSK register */ -#define TIMSK _SFR_IO8(0x39) - -/* General Interrupt Control Register */ -#define GIFR _SFR_IO8(0x3A) - -/* General Interrupt Mask register */ -#define GIMSK _SFR_IO8(0x3B) - -/* Interrupt vectors */ - -#define SIG_INTERRUPT0 _VECTOR(1) /* suspend/resume */ -#define SIG_INTERRUPT1 _VECTOR(2) -#define SIG_TIMER1_CAPT1 _VECTOR(3) -#define SIG_INPUT_CAPTURE1 _VECTOR(3) -#define SIG_OUTPUT_COMPARE1A _VECTOR(4) -#define SIG_OUTPUT_COMPARE1B _VECTOR(5) -#define SIG_OVERFLOW1 _VECTOR(6) -#define SIG_OVERFLOW0 _VECTOR(7) -#define SIG_SPI _VECTOR(8) -/* 9, 10: reserved */ -#define SIG_ADC _VECTOR(11) -#define SIG_USB_INT _VECTOR(12) - -#define _VECTORS_SIZE 52 - -/* - The Register Bit names are represented by their bit number (0-7). -*/ - -/* Timer/Counter Interrupt MaSK register */ -#define TICIE1 3 -#define OCIE1A 6 -#define OCIE1B 5 -#define TOIE1 7 -#define TOIE0 1 - -/* Timer/Counter Interrupt Flag Register */ -#define ICF1 3 -#define OCF1A 6 -#define OCF1B 5 -#define TOV1 7 -#define TOV0 1 - -/* MCU general Control Register */ -#define SE 5 -#define SM 4 -#define ISC11 3 -#define ISC10 2 -#define ISC01 1 -#define ISC00 0 - -/* Timer/Counter 0 Control Register */ -#define CS02 2 -#define CS01 1 -#define CS00 0 - - -/* Timer/Counter 1 Control Register */ -#define COM1A1 7 -#define COM1A0 6 -#define COM1B1 5 -#define COM1B0 4 -#define PWM11 1 -#define PWM10 0 - -/* Timer/Counter 1 Control and Status Register */ -#define ICNC1 7 -#define ICES1 6 -#define CTC1 3 -#define CS12 2 -#define CS11 1 -#define CS10 0 - -/* Watchdog Timer Control Register */ -#define WDTOE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -/* Data Register, Port A */ -#define PA7 7 -#define PA6 6 -#define PA5 5 -#define PA4 4 -#define PA3 3 -#define PA2 2 -#define PA1 1 -#define PA0 0 - -/* Data Direction Register, Port A */ -#define DDA7 7 -#define DDA6 6 -#define DDA5 5 -#define DDA4 4 -#define DDA3 3 -#define DDA2 2 -#define DDA1 1 -#define DDA0 0 - -/* Input Pins, Port A */ -#define PINA7 7 -#define PINA6 6 -#define PINA5 5 -#define PINA4 4 -#define PINA3 3 -#define PINA2 2 -#define PINA1 1 -#define PINA0 0 - -/* Data Register, Port B */ -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -/* Data Direction Register, Port B */ -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -/* Input Pins, Port B */ -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -/* Data Direction Register, Port C */ -#define DDC7 7 -#define DDC6 6 -#define DDC5 5 -#define DDC4 4 -#define DDC3 3 -#define DDC2 2 -#define DDC1 1 -#define DDC0 0 - -/* Input Pins, Port C */ -#define PINC7 7 -#define PINC6 6 -#define PINC5 5 -#define PINC4 4 -#define PINC3 3 -#define PINC2 2 -#define PINC1 1 -#define PINC0 0 - -/* Data Register, Port C */ -#define PC7 7 -#define PC6 6 -#define PC5 5 -#define PC4 4 -#define PC3 3 -#define PC2 2 -#define PC1 1 -#define PC0 0 - -/* Data Register, Port D */ -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -/* Data Direction Register, Port D */ -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -/* Input Pins, Port D */ -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -/* Data Register, Port F */ -#define PF3 3 -#define PF2 2 -#define PF1 1 -#define PF0 0 - -/* Data Direction Register, Port F */ -#define DDF3 3 -#define DDF2 2 -#define DDF1 1 - -/* Input Pins, Port F */ -#define PINF3 3 -#define PINF2 2 -#define PINF1 1 -#define PINF0 0 - -/* SPI Status Register */ -#define SPIF 7 -#define WCOL 6 - -/* SPI Control Register */ -#define SPIE 7 -#define SPE 6 -#define DORD 5 -#define MSTR 4 -#define CPOL 3 -#define CPHA 2 -#define SPR1 1 -#define SPR0 0 - -/* ADC Multiplexer select */ -#define MUX2 2 -#define MUX1 1 -#define MUX0 0 - -/* ADC Control and Status Register */ -#define ADEN 7 -#define ADSC 6 -#define ADFR 5 -#define ADIF 4 -#define ADIE 3 -#define ADPS2 2 -#define ADPS1 1 -#define ADPS0 0 - -/* Constants */ -#define RAMEND 0x045F /*Last On-Chip SRAM Location*/ -#define XRAMEND 0x045F -#define E2END 0x0000 -#define FLASHEND 0x5FFF - -#endif /* _AVR_43USB355_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io4414.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io4414.h deleted file mode 100644 index 0b19dcbf5..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io4414.h +++ /dev/null @@ -1,485 +0,0 @@ -/* Copyright (c) 2002, Marek Michalkiewicz - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: io4414.h,v 1.8.4.3 2008/08/14 00:07:59 arcanum Exp $ */ - -/* avr/io4414.h - definitions for AT90S4414 */ - -#ifndef _AVR_IO4414_H_ -#define _AVR_IO4414_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "io4414.h" -#else -# error "Attempt to include more than one file." -#endif - -/* I/O registers */ - -/* Analog Comparator Control and Status Register */ -#define ACSR _SFR_IO8(0x08) - -/* UART Baud Rate Register */ -#define UBRR _SFR_IO8(0x09) - -/* UART Control Register */ -#define UCR _SFR_IO8(0x0A) - -/* UART Status Register */ -#define USR _SFR_IO8(0x0B) - -/* UART I/O Data Register */ -#define UDR _SFR_IO8(0x0C) - -/* SPI Control Register */ -#define SPCR _SFR_IO8(0x0D) - -/* SPI Status Register */ -#define SPSR _SFR_IO8(0x0E) - -/* SPI I/O Data Register */ -#define SPDR _SFR_IO8(0x0F) - -/* Input Pins, Port D */ -#define PIND _SFR_IO8(0x10) - -/* Data Direction Register, Port D */ -#define DDRD _SFR_IO8(0x11) - -/* Data Register, Port D */ -#define PORTD _SFR_IO8(0x12) - -/* Input Pins, Port C */ -#define PINC _SFR_IO8(0x13) - -/* Data Direction Register, Port C */ -#define DDRC _SFR_IO8(0x14) - -/* Data Register, Port C */ -#define PORTC _SFR_IO8(0x15) - -/* Input Pins, Port B */ -#define PINB _SFR_IO8(0x16) - -/* Data Direction Register, Port B */ -#define DDRB _SFR_IO8(0x17) - -/* Data Register, Port B */ -#define PORTB _SFR_IO8(0x18) - -/* Input Pins, Port A */ -#define PINA _SFR_IO8(0x19) - -/* Data Direction Register, Port A */ -#define DDRA _SFR_IO8(0x1A) - -/* Data Register, Port A */ -#define PORTA _SFR_IO8(0x1B) - -/* EEPROM Control Register */ -#define EECR _SFR_IO8(0x1C) - -/* EEPROM Data Register */ -#define EEDR _SFR_IO8(0x1D) - -/* EEPROM Address Register */ -#define EEAR _SFR_IO8(0x1E) -#define EEARL _SFR_IO8(0x1E) - -/* Watchdog Timer Control Register */ -#define WDTCR _SFR_IO8(0x21) - -/* T/C 1 Input Capture Register */ -#define ICR1 _SFR_IO16(0x24) -#define ICR1L _SFR_IO8(0x24) -#define ICR1H _SFR_IO8(0x25) - -/* Timer/Counter1 Output Compare Register B */ -#define OCR1B _SFR_IO16(0x28) -#define OCR1BL _SFR_IO8(0x28) -#define OCR1BH _SFR_IO8(0x29) - -/* Timer/Counter1 Output Compare Register A */ -#define OCR1A _SFR_IO16(0x2A) -#define OCR1AL _SFR_IO8(0x2A) -#define OCR1AH _SFR_IO8(0x2B) - -/* Timer/Counter 1 */ -#define TCNT1 _SFR_IO16(0x2C) -#define TCNT1L _SFR_IO8(0x2C) -#define TCNT1H _SFR_IO8(0x2D) - -/* Timer/Counter 1 Control and Status Register */ -#define TCCR1B _SFR_IO8(0x2E) - -/* Timer/Counter 1 Control Register */ -#define TCCR1A _SFR_IO8(0x2F) - -/* Timer/Counter 0 */ -#define TCNT0 _SFR_IO8(0x32) - -/* Timer/Counter 0 Control Register */ -#define TCCR0 _SFR_IO8(0x33) - -/* MCU general Control Register */ -#define MCUCR _SFR_IO8(0x35) - -/* Timer/Counter Interrupt Flag register */ -#define TIFR _SFR_IO8(0x38) - -/* Timer/Counter Interrupt MaSK register */ -#define TIMSK _SFR_IO8(0x39) - -/* General Interrupt Flag Register */ -#define GIFR _SFR_IO8(0x3A) - -/* General Interrupt MaSK register */ -#define GIMSK _SFR_IO8(0x3B) - -/* 0x3C..0x3D SP */ - -/* 0x3F SREG */ - -/* Interrupt vectors */ - -/* External Interrupt Request 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* External Interrupt Request 1 */ -#define INT1_vect _VECTOR(2) -#define SIG_INTERRUPT1 _VECTOR(2) - -/* Timer/Counter Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(3) -#define SIG_INPUT_CAPTURE1 _VECTOR(3) - -/* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPA_vect _VECTOR(4) -#define SIG_OUTPUT_COMPARE1A _VECTOR(4) - -/* Timer/Counter1 Compare MatchB */ -#define TIMER1_COMPB_vect _VECTOR(5) -#define SIG_OUTPUT_COMPARE1B _VECTOR(5) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(6) -#define SIG_OVERFLOW1 _VECTOR(6) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(7) -#define SIG_OVERFLOW0 _VECTOR(7) - -/* Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(8) -#define SIG_SPI _VECTOR(8) - -/* UART, Rx Complete */ -#define UART_RX_vect _VECTOR(9) -#define SIG_UART_RECV _VECTOR(9) - -/* UART Data Register Empty */ -#define UART_UDRE_vect _VECTOR(10) -#define SIG_UART_DATA _VECTOR(10) - -/* UART, Tx Complete */ -#define UART_TX_vect _VECTOR(11) -#define SIG_UART_TRANS _VECTOR(11) - -/* Analog Comparator */ -#define ANA_COMP_vect _VECTOR(12) -#define SIG_COMPARATOR _VECTOR(12) - -#define _VECTORS_SIZE 26 - -/* - The Register Bit names are represented by their bit number (0-7). -*/ - -/* General Interrupt MaSK register */ -#define INT1 7 -#define INT0 6 - -/* General Interrupt Flag Register */ -#define INTF1 7 -#define INTF0 6 - -/* Timer/Counter Interrupt MaSK register */ -#define TOIE1 7 -#define OCIE1A 6 -#define OCIE1B 5 -#define TICIE1 3 -#define TOIE0 1 - -/* Timer/Counter Interrupt Flag register */ -#define TOV1 7 -#define OCF1A 6 -#define OCF1B 5 -#define ICF1 3 -#define TOV0 1 - -/* MCU general Control Register */ -#define SRE 7 -#define SRW 6 -#define SE 5 -#define SM 4 -#define ISC11 3 -#define ISC10 2 -#define ISC01 1 -#define ISC00 0 - -/* Timer/Counter 0 Control Register */ -#define CS02 2 -#define CS01 1 -#define CS00 0 - -/* Timer/Counter 1 Control Register */ -#define COM1A1 7 -#define COM1A0 6 -#define COM1B1 5 -#define COM1B0 4 -#define PWM11 1 -#define PWM10 0 - -/* Timer/Counter 1 Control and Status Register */ -#define ICNC1 7 -#define ICES1 6 -#define CTC1 3 -#define CS12 2 -#define CS11 1 -#define CS10 0 - -/* Watchdog Timer Control Register */ -#define WDTOE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -/* Data Register, Port A */ -#define PA7 7 -#define PA6 6 -#define PA5 5 -#define PA4 4 -#define PA3 3 -#define PA2 2 -#define PA1 1 -#define PA0 0 - -/* Data Direction Register, Port A */ -#define DDA7 7 -#define DDA6 6 -#define DDA5 5 -#define DDA4 4 -#define DDA3 3 -#define DDA2 2 -#define DDA1 1 -#define DDA0 0 - -/* Input Pins, Port A */ -#define PINA7 7 -#define PINA6 6 -#define PINA5 5 -#define PINA4 4 -#define PINA3 3 -#define PINA2 2 -#define PINA1 1 -#define PINA0 0 - -/* Data Register, Port B */ -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -/* Data Direction Register, Port B */ -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -/* Input Pins, Port B */ -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -/* Data Register, Port C */ -#define PC7 7 -#define PC6 6 -#define PC5 5 -#define PC4 4 -#define PC3 3 -#define PC2 2 -#define PC1 1 -#define PC0 0 - -/* Data Direction Register, Port C */ -#define DDC7 7 -#define DDC6 6 -#define DDC5 5 -#define DDC4 4 -#define DDC3 3 -#define DDC2 2 -#define DDC1 1 -#define DDC0 0 - -/* Input Pins, Port C */ -#define PINC7 7 -#define PINC6 6 -#define PINC5 5 -#define PINC4 4 -#define PINC3 3 -#define PINC2 2 -#define PINC1 1 -#define PINC0 0 - -/* Data Register, Port D */ -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -/* Data Direction Register, Port D */ -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -/* Input Pins, Port D */ -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -/* SPI Status Register */ -#define SPIF 7 -#define WCOL 6 - -/* SPI Control Register */ -#define SPIE 7 -#define SPE 6 -#define DORD 5 -#define MSTR 4 -#define CPOL 3 -#define CPHA 2 -#define SPR1 1 -#define SPR0 0 - -/* UART Status Register */ -#define RXC 7 -#define TXC 6 -#define UDRE 5 -#define FE 4 -#define DOR 3 - -/* UART Control Register */ -#define RXCIE 7 -#define TXCIE 6 -#define UDRIE 5 -#define RXEN 4 -#define TXEN 3 -#define CHR9 2 -#define RXB8 1 -#define TXB8 0 - -/* Analog Comparator Control and Status Register */ -#define ACD 7 -#define ACO 5 -#define ACI 4 -#define ACIE 3 -#define ACIC 2 -#define ACIS1 1 -#define ACIS0 0 - -/* EEPROM Control Register */ -#define EERIE 3 -#define EEMWE 2 -#define EEWE 1 -#define EERE 0 - -/* Constants */ -#define RAMEND 0x15F /* Last On-Chip SRAM Location */ -#define XRAMEND 0xFFFF -#define E2END 0xFF -#define E2PAGESIZE 0 -#define FLASHEND 0xFFF - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 1 - -/* Low Fuse Byte */ -#define FUSE_SPIEN (unsigned char)~_BV(1) /* Serial Program Downloading Enabled */ -#define FUSE_FSTRT (unsigned char)~_BV(2) /* Short Start-up time selected */ -#define LFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x92 -#define SIGNATURE_2 0x01 - - -#endif /* _AVR_IO4414_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io4433.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io4433.h deleted file mode 100644 index 1ed191067..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io4433.h +++ /dev/null @@ -1,473 +0,0 @@ -/* Copyright (c) 2002, Marek Michalkiewicz - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: io4433.h,v 1.9.4.3 2008/08/14 00:07:59 arcanum Exp $ */ - -/* avr/io4433.h - definitions for AT90S4433 */ - -#ifndef _AVR_IO4433_H_ -#define _AVR_IO4433_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "io4433.h" -#else -# error "Attempt to include more than one file." -#endif - -/* I/O registers */ - -/* UART Baud Rate Register high */ -#define UBRRH _SFR_IO8(0x03) - -/* ADC Data register */ -#ifndef __ASSEMBLER__ -#define ADC _SFR_IO16(0x04) -#endif -#define ADCW _SFR_IO16(0x04) -#define ADCL _SFR_IO8(0x04) -#define ADCH _SFR_IO8(0x05) - -/* ADC Control and Status Register */ -#define ADCSR _SFR_IO8(0x06) - -/* ADC MUX */ -#define ADMUX _SFR_IO8(0x07) - -/* Analog Comparator Control and Status Register */ -#define ACSR _SFR_IO8(0x08) - -/* UART Baud Rate Register */ -#define UBRR _SFR_IO8(0x09) - -/* UART Control/Status Registers */ -#define UCSRB _SFR_IO8(0x0A) -#define UCSRA _SFR_IO8(0x0B) - -/* UART I/O Data Register */ -#define UDR _SFR_IO8(0x0C) - -/* SPI Control Register */ -#define SPCR _SFR_IO8(0x0D) - -/* SPI Status Register */ -#define SPSR _SFR_IO8(0x0E) - -/* SPI I/O Data Register */ -#define SPDR _SFR_IO8(0x0F) - -/* Input Pins, Port D */ -#define PIND _SFR_IO8(0x10) - -/* Data Direction Register, Port D */ -#define DDRD _SFR_IO8(0x11) - -/* Data Register, Port D */ -#define PORTD _SFR_IO8(0x12) - -/* Input Pins, Port C */ -#define PINC _SFR_IO8(0x13) - -/* Data Direction Register, Port C */ -#define DDRC _SFR_IO8(0x14) - -/* Data Register, Port C */ -#define PORTC _SFR_IO8(0x15) - -/* Input Pins, Port B */ -#define PINB _SFR_IO8(0x16) - -/* Data Direction Register, Port B */ -#define DDRB _SFR_IO8(0x17) - -/* Data Register, Port B */ -#define PORTB _SFR_IO8(0x18) - -/* EEPROM Control Register */ -#define EECR _SFR_IO8(0x1C) - -/* EEPROM Data Register */ -#define EEDR _SFR_IO8(0x1D) - -/* EEPROM Address Register */ -#define EEAR _SFR_IO8(0x1E) -#define EEARL _SFR_IO8(0x1E) - -/* Watchdog Timer Control Register */ -#define WDTCR _SFR_IO8(0x21) - -/* T/C 1 Input Capture Register */ -#define ICR1 _SFR_IO16(0x26) -#define ICR1L _SFR_IO8(0x26) -#define ICR1H _SFR_IO8(0x27) - -/* Timer/Counter1 Output Compare Register A */ -#define OCR1 _SFR_IO16(0x2A) -#define OCR1L _SFR_IO8(0x2A) -#define OCR1H _SFR_IO8(0x2B) - -/* Timer/Counter 1 */ -#define TCNT1 _SFR_IO16(0x2C) -#define TCNT1L _SFR_IO8(0x2C) -#define TCNT1H _SFR_IO8(0x2D) - -/* Timer/Counter 1 Control and Status Register */ -#define TCCR1B _SFR_IO8(0x2E) - -/* Timer/Counter 1 Control Register */ -#define TCCR1A _SFR_IO8(0x2F) - -/* Timer/Counter 0 */ -#define TCNT0 _SFR_IO8(0x32) - -/* Timer/Counter 0 Control Register */ -#define TCCR0 _SFR_IO8(0x33) - -/* MCU general Status Register */ -#define MCUSR _SFR_IO8(0x34) - -/* MCU general Control Register */ -#define MCUCR _SFR_IO8(0x35) - -/* Timer/Counter Interrupt Flag register */ -#define TIFR _SFR_IO8(0x38) - -/* Timer/Counter Interrupt MaSK register */ -#define TIMSK _SFR_IO8(0x39) - -/* General Interrupt Flag Register */ -#define GIFR _SFR_IO8(0x3A) - -/* General Interrupt MaSK register */ -#define GIMSK _SFR_IO8(0x3B) - -/* 0x3D..0x3E SP */ - -/* 0x3F SREG */ - -/* Interrupt vectors */ - -/* External Interrupt 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* External Interrupt 1 */ -#define INT1_vect _VECTOR(2) -#define SIG_INTERRUPT1 _VECTOR(2) - -/* Timer/Counter Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(3) -#define SIG_INPUT_CAPTURE1 _VECTOR(3) - -/* Timer/Counter1 Compare Match */ -#define TIMER1_COMP_vect _VECTOR(4) -#define SIG_OUTPUT_COMPARE1A _VECTOR(4) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(5) -#define SIG_OVERFLOW1 _VECTOR(5) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(6) -#define SIG_OVERFLOW0 _VECTOR(6) - -/* Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(7) -#define SIG_SPI _VECTOR(7) - -/* UART, Rx Complete */ -#define UART_RX_vect _VECTOR(8) -#define SIG_UART_RECV _VECTOR(8) - -/* UART Data Register Empty */ -#define UART_UDRE_vect _VECTOR(9) -#define SIG_UART_DATA _VECTOR(9) - -/* UART, Tx Complete */ -#define UART_TX_vect _VECTOR(10) -#define SIG_UART_TRANS _VECTOR(10) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(11) -#define SIG_ADC _VECTOR(11) - -/* EEPROM Ready */ -#define EE_RDY_vect _VECTOR(12) -#define SIG_EEPROM_READY _VECTOR(12) - -/* Analog Comparator */ -#define ANA_COMP_vect _VECTOR(13) -#define SIG_COMPARATOR _VECTOR(13) - -#define _VECTORS_SIZE 28 - -/* - The Register Bit names are represented by their bit number (0-7). -*/ - -/* MCU general Status Register */ -#define WDRF 3 -#define BORF 2 -#define EXTRF 1 -#define PORF 0 - -/* General Interrupt MaSK register */ -#define INT1 7 -#define INT0 6 - -/* General Interrupt Flag Register */ -#define INTF1 7 -#define INTF0 6 - -/* Timer/Counter Interrupt MaSK register */ -#define TOIE1 7 -#define OCIE1 6 -#define TICIE1 3 -#define TOIE0 1 - -/* Timer/Counter Interrupt Flag register */ -#define TOV1 7 -#define OCF1 6 -#define ICF1 3 -#define TOV0 1 - -/* MCU general Control Register */ -#define SE 5 -#define SM 4 -#define ISC11 3 -#define ISC10 2 -#define ISC01 1 -#define ISC00 0 - -/* Timer/Counter 0 Control Register */ -#define CS02 2 -#define CS01 1 -#define CS00 0 - -/* Timer/Counter 1 Control Register */ -#define COM11 7 -#define COM10 6 -#define PWM11 1 -#define PWM10 0 - -/* Timer/Counter 1 Control and Status Register */ -#define ICNC1 7 -#define ICES1 6 -#define CTC1 3 -#define CS12 2 -#define CS11 1 -#define CS10 0 - -/* Watchdog Timer Control Register */ -#define WDTOE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -/* SPI Control Register */ -#define SPIE 7 -#define SPE 6 -#define DORD 5 -#define MSTR 4 -#define CPOL 3 -#define CPHA 2 -#define SPR1 1 -#define SPR0 0 - -/* SPI Status Register */ -#define SPIF 7 -#define WCOL 6 - -/* UART Status Register */ -#define RXC 7 -#define TXC 6 -#define UDRE 5 -#define FE 4 -#define DOR 3 -#define MPCM 0 - -/* UART Control Register */ -#define RXCIE 7 -#define TXCIE 6 -#define UDRIE 5 -#define RXEN 4 -#define TXEN 3 -#define CHR9 2 -#define RXB8 1 -#define TXB8 0 - -/* Analog Comparator Control and Status Register */ -#define ACD 7 -#define AINBG 6 -#define ACO 5 -#define ACI 4 -#define ACIE 3 -#define ACIC 2 -#define ACIS1 1 -#define ACIS0 0 - -/* ADC MUX */ -#define ACDBG 6 -#define MUX2 2 -#define MUX1 1 -#define MUX0 0 - -/* ADC Control and Status Register */ -#define ADEN 7 -#define ADSC 6 -#define ADFR 5 -#define ADIF 4 -#define ADIE 3 -#define ADPS2 2 -#define ADPS1 1 -#define ADPS0 0 - -/* Data Register, Port B */ -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -/* Data Direction Register, Port B */ -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -/* Input Pins, Port B */ -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -/* Data Register, Port C */ -#define PC5 5 -#define PC4 4 -#define PC3 3 -#define PC2 2 -#define PC1 1 -#define PC0 0 - -/* Data Direction Register, Port C */ -#define DDC5 5 -#define DDC4 4 -#define DDC3 3 -#define DDC2 2 -#define DDC1 1 -#define DDC0 0 - -/* Input Pins, Port C */ -#define PINC5 5 -#define PINC4 4 -#define PINC3 3 -#define PINC2 2 -#define PINC1 1 -#define PINC0 0 - -/* Data Register, Port D */ -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -/* Data Direction Register, Port D */ -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -/* Input Pins, Port D */ -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -/* EEPROM Control Register */ -#define EERIE 3 -#define EEMWE 2 -#define EEWE 1 -#define EERE 0 - -/* Constants */ -#define RAMEND 0xDF /*Last On-Chip SRAM location*/ -#define XRAMEND 0xDF -#define E2END 0xFF -#define E2PAGESIZE 0 -#define FLASHEND 0xFFF - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 1 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_BODEN (unsigned char)~_BV(3) -#define FUSE_BODLEVEL (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define LFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x92 -#define SIGNATURE_2 0x03 - - -#endif /* _AVR_IO4433_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io4434.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io4434.h deleted file mode 100644 index d4d541f71..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io4434.h +++ /dev/null @@ -1,567 +0,0 @@ -/* Copyright (c) 2002, Marek Michalkiewicz - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: io4434.h,v 1.9.4.2 2008/08/14 00:07:59 arcanum Exp $ */ - -/* avr/io4434.h - definitions for AT90S4434 */ - -#ifndef _AVR_IO4434_H_ -#define _AVR_IO4434_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "io4434.h" -#else -# error "Attempt to include more than one file." -#endif - -/* I/O registers */ - -/* ADC Data register */ -#ifndef __ASSEMBLER__ -#define ADC _SFR_IO16(0x04) -#endif -#define ADCW _SFR_IO16(0x04) -#define ADCL _SFR_IO8(0x04) -#define ADCH _SFR_IO8(0x05) - -/* ADC Control and Status Register */ -#define ADCSR _SFR_IO8(0x06) - -/* ADC MUX */ -#define ADMUX _SFR_IO8(0x07) - -/* Analog Comparator Control and Status Register */ -#define ACSR _SFR_IO8(0x08) - -/* UART Baud Rate Register */ -#define UBRR _SFR_IO8(0x09) - -/* UART Control Register */ -#define UCR _SFR_IO8(0x0A) - -/* UART Status Register */ -#define USR _SFR_IO8(0x0B) - -/* UART I/O Data Register */ -#define UDR _SFR_IO8(0x0C) - -/* SPI Control Register */ -#define SPCR _SFR_IO8(0x0D) - -/* SPI Status Register */ -#define SPSR _SFR_IO8(0x0E) - -/* SPI I/O Data Register */ -#define SPDR _SFR_IO8(0x0F) - -/* Input Pins, Port D */ -#define PIND _SFR_IO8(0x10) - -/* Data Direction Register, Port D */ -#define DDRD _SFR_IO8(0x11) - -/* Data Register, Port D */ -#define PORTD _SFR_IO8(0x12) - -/* Input Pins, Port C */ -#define PINC _SFR_IO8(0x13) - -/* Data Direction Register, Port C */ -#define DDRC _SFR_IO8(0x14) - -/* Data Register, Port C */ -#define PORTC _SFR_IO8(0x15) - -/* Input Pins, Port B */ -#define PINB _SFR_IO8(0x16) - -/* Data Direction Register, Port B */ -#define DDRB _SFR_IO8(0x17) - -/* Data Register, Port B */ -#define PORTB _SFR_IO8(0x18) - -/* Input Pins, Port A */ -#define PINA _SFR_IO8(0x19) - -/* Data Direction Register, Port A */ -#define DDRA _SFR_IO8(0x1A) - -/* Data Register, Port A */ -#define PORTA _SFR_IO8(0x1B) - -/* EEPROM Control Register */ -#define EECR _SFR_IO8(0x1C) - -/* EEPROM Data Register */ -#define EEDR _SFR_IO8(0x1D) - -/* EEPROM Address Register */ -#define EEAR _SFR_IO8(0x1E) -#define EEARL _SFR_IO8(0x1E) - -/* Watchdog Timer Control Register */ -#define WDTCR _SFR_IO8(0x21) - -/* Asynchronous mode Status Register */ -#define ASSR _SFR_IO8(0x22) - -/* Timer/Counter2 Output Compare Register */ -#define OCR2 _SFR_IO8(0x23) - -/* Timer/Counter 2 */ -#define TCNT2 _SFR_IO8(0x24) - -/* Timer/Counter 2 Control Register */ -#define TCCR2 _SFR_IO8(0x25) - -/* T/C 1 Input Capture Register */ -#define ICR1 _SFR_IO16(0x26) -#define ICR1L _SFR_IO8(0x26) -#define ICR1H _SFR_IO8(0x27) - -/* Timer/Counter1 Output Compare Register B */ -#define OCR1B _SFR_IO16(0x28) -#define OCR1BL _SFR_IO8(0x28) -#define OCR1BH _SFR_IO8(0x29) - -/* Timer/Counter1 Output Compare Register A */ -#define OCR1A _SFR_IO16(0x2A) -#define OCR1AL _SFR_IO8(0x2A) -#define OCR1AH _SFR_IO8(0x2B) - -/* Timer/Counter 1 */ -#define TCNT1 _SFR_IO16(0x2C) -#define TCNT1L _SFR_IO8(0x2C) -#define TCNT1H _SFR_IO8(0x2D) - -/* Timer/Counter 1 Control and Status Register */ -#define TCCR1B _SFR_IO8(0x2E) - -/* Timer/Counter 1 Control Register */ -#define TCCR1A _SFR_IO8(0x2F) - -/* Timer/Counter 0 */ -#define TCNT0 _SFR_IO8(0x32) - -/* Timer/Counter 0 Control Register */ -#define TCCR0 _SFR_IO8(0x33) - -/* MCU general Status Register */ -#define MCUSR _SFR_IO8(0x34) - -/* MCU general Control Register */ -#define MCUCR _SFR_IO8(0x35) - -/* Timer/Counter Interrupt Flag register */ -#define TIFR _SFR_IO8(0x38) - -/* Timer/Counter Interrupt MaSK register */ -#define TIMSK _SFR_IO8(0x39) - -/* General Interrupt Flag Register */ -#define GIFR _SFR_IO8(0x3A) - -/* General Interrupt MaSK register */ -#define GIMSK _SFR_IO8(0x3B) - -/* 0x3D..0x3E SP */ - -/* 0x3F SREG */ - -/* Interrupt vectors */ - -/* External Interrupt 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* External Interrupt 1 */ -#define INT1_vect _VECTOR(2) -#define SIG_INTERRUPT1 _VECTOR(2) - -/* Timer/Counter2 Compare Match */ -#define TIMER2_COMP_vect _VECTOR(3) -#define SIG_OUTPUT_COMPARE2 _VECTOR(3) - -/* Timer/Counter2 Overflow */ -#define TIMER2_OVF_vect _VECTOR(4) -#define SIG_OVERFLOW2 _VECTOR(4) - -/* Timer/Counter1 Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(5) -#define SIG_INPUT_CAPTURE1 _VECTOR(5) - -/* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPA_vect _VECTOR(6) -#define SIG_OUTPUT_COMPARE1A _VECTOR(6) - -/* Timer/Counter1 Compare Match B */ -#define TIMER1_COMPB_vect _VECTOR(7) -#define SIG_OUTPUT_COMPARE1B _VECTOR(7) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(8) -#define SIG_OVERFLOW1 _VECTOR(8) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(9) -#define SIG_OVERFLOW0 _VECTOR(9) - -/* SPI Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(10) -#define SIG_SPI _VECTOR(10) - -/* UART, RX Complete */ -#define UART_RX_vect _VECTOR(11) -#define SIG_UART_RECV _VECTOR(11) - -/* UART Data Register Empty */ -#define UART_UDRE_vect _VECTOR(12) -#define SIG_UART_DATA _VECTOR(12) - -/* UART, TX Complete */ -#define UART_TX_vect _VECTOR(13) -#define SIG_UART_TRANS _VECTOR(13) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(14) -#define SIG_ADC _VECTOR(14) - -/* EEPROM Ready */ -#define EE_RDY_vect _VECTOR(15) -#define SIG_EEPROM_READY _VECTOR(15) - -/* Analog Comparator */ -#define ANA_COMP_vect _VECTOR(16) -#define SIG_COMPARATOR _VECTOR(16) - -#define _VECTORS_SIZE 34 - -/* - The Register Bit names are represented by their bit number (0-7). -*/ - -/* MCU general Status Register */ -#define EXTRF 1 -#define PORF 0 - -/* General Interrupt MaSK register */ -#define INT1 7 -#define INT0 6 - -/* General Interrupt Flag Register */ -#define INTF1 7 -#define INTF0 6 - -/* Timer/Counter Interrupt MaSK register */ -#define OCIE2 7 -#define TOIE2 6 -#define TICIE1 5 -#define OCIE1A 4 -#define OCIE1B 3 -#define TOIE1 2 -#define TOIE0 0 - -/* Timer/Counter Interrupt Flag register */ -#define OCF2 7 -#define TOV2 6 -#define ICF1 5 -#define OCF1A 4 -#define OCF1B 3 -#define TOV1 2 -#define TOV0 0 - -/* MCU general Control Register */ -#define SE 6 -#define SM1 5 -#define SM0 4 -#define ISC11 3 -#define ISC10 2 -#define ISC01 1 -#define ISC00 0 - -/* Timer/Counter 0 Control Register */ -#define CS02 2 -#define CS01 1 -#define CS00 0 - -/* Timer/Counter 1 Control Register */ -#define COM1A1 7 -#define COM1A0 6 -#define COM1B1 5 -#define COM1B0 4 -#define PWM11 1 -#define PWM10 0 - -/* Timer/Counter 1 Control and Status Register */ -#define ICNC1 7 -#define ICES1 6 -#define CTC1 3 -#define CS12 2 -#define CS11 1 -#define CS10 0 - -/* Timer/Counter 2 Control Register */ -#define PWM2 6 -#define COM21 5 -#define COM20 4 -#define CTC2 3 -#define CS22 2 -#define CS21 1 -#define CS20 0 - -/* Asynchronous mode Status Register */ -#define AS2 3 -#define TCN2UB 2 -#define OCR2UB 1 -#define TCR2UB 0 - -/* Watchdog Timer Control Register */ -#define WDTOE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -/* Data Register, Port A */ -#define PA7 7 -#define PA6 6 -#define PA5 5 -#define PA4 4 -#define PA3 3 -#define PA2 2 -#define PA1 1 -#define PA0 0 - -/* Data Direction Register, Port A */ -#define DDA7 7 -#define DDA6 6 -#define DDA5 5 -#define DDA4 4 -#define DDA3 3 -#define DDA2 2 -#define DDA1 1 -#define DDA0 0 - -/* Input Pins, Port A */ -#define PINA7 7 -#define PINA6 6 -#define PINA5 5 -#define PINA4 4 -#define PINA3 3 -#define PINA2 2 -#define PINA1 1 -#define PINA0 0 - -/* Data Register, Port B */ -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -/* Data Direction Register, Port B */ -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -/* Input Pins, Port B */ -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -/* Data Register, Port C */ -#define PC7 7 -#define PC6 6 -#define PC5 5 -#define PC4 4 -#define PC3 3 -#define PC2 2 -#define PC1 1 -#define PC0 0 - -/* Data Direction Register, Port C */ -#define DDC7 7 -#define DDC6 6 -#define DDC5 5 -#define DDC4 4 -#define DDC3 3 -#define DDC2 2 -#define DDC1 1 -#define DDC0 0 - -/* Input Pins, Port C */ -#define PINC7 7 -#define PINC6 6 -#define PINC5 5 -#define PINC4 4 -#define PINC3 3 -#define PINC2 2 -#define PINC1 1 -#define PINC0 0 - -/* Data Register, Port D */ -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -/* Data Direction Register, Port D */ -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -/* Input Pins, Port D */ -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -/* SPI Control Register */ -#define SPIE 7 -#define SPE 6 -#define DORD 5 -#define MSTR 4 -#define CPOL 3 -#define CPHA 2 -#define SPR1 1 -#define SPR0 0 - -/* SPI Status Register */ -#define SPIF 7 -#define WCOL 6 - -/* UART Status Register */ -#define RXC 7 -#define TXC 6 -#define UDRE 5 -#define FE 4 -#define DOR 3 - -/* UART Control Register */ -#define RXCIE 7 -#define TXCIE 6 -#define UDRIE 5 -#define RXEN 4 -#define TXEN 3 -#define CHR9 2 -#define RXB8 1 -#define TXB8 0 - -/* Analog Comparator Control and Status Register */ -#define ACD 7 -#define ACO 5 -#define ACI 4 -#define ACIE 3 -#define ACIC 2 -#define ACIS1 1 -#define ACIS0 0 - -/* ADC MUX */ -#define MUX2 2 -#define MUX1 1 -#define MUX0 0 - -/* ADC Control and Status Register */ -#define ADEN 7 -#define ADSC 6 -#define ADFR 5 -#define ADIF 4 -#define ADIE 3 -#define ADPS2 2 -#define ADPS1 1 -#define ADPS0 0 - -/* EEPROM Control Register */ -#define EERIE 3 -#define EEMWE 2 -#define EEWE 1 -#define EERE 0 - -/* Constants */ -#define RAMEND 0x15F /*Last On-Chip SRAM location*/ -#define XRAMEND 0x15F -#define E2END 0xFF -#define E2PAGESIZE 0 -#define FLASHEND 0xFFF - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 1 - -/* Low Fuse Byte */ -#define FUSE_SPIEN ~_BV(1) /* Serial Program Downloading Enabled */ -#define FUSE_FSTRT ~_BV(2) /* Short Start-up time selected */ -#define LFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x93 -#define SIGNATURE_2 0x03 - - -#endif /* _AVR_IO4434_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io58u54a.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io58u54a.h deleted file mode 100644 index 379df1645..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io58u54a.h +++ /dev/null @@ -1,1558 +0,0 @@ -/* Copyright (c) 2008 Atmel Corporation - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id$ */ - -/* avr/io58u54a.h - definitions for 58U54A_Albatross */ - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "io58u54a.h" -#else -# error "Attempt to include more than one file." -#endif - - -#ifndef _AVR_58U54A_Albatross_H_ -#define _AVR_58U54A_Albatross_H_ 1 - - -/* Registers and associated bit numbers. */ - -#define PINA _SFR_IO8(0x000) -#define PINA0 0 -#define PINA1 1 -#define PINA2 2 -#define PINA3 3 -#define PINA4 4 -#define PINA5 5 -#define PINA6 6 -#define PINA7 7 - -#define DDRA _SFR_IO8(0x001) -#define DDA0 0 -#define DDA1 1 -#define DDA2 2 -#define DDA3 3 -#define DDA4 4 -#define DDA5 5 -#define DDA6 6 -#define DDA7 7 - -#define PORTA _SFR_IO8(0x002) -#define PORTA0 0 -#define PORTA1 1 -#define PORTA2 2 -#define PORTA3 3 -#define PORTA4 4 -#define PORTA5 5 -#define PORTA6 6 -#define PORTA7 7 - -#define PINB _SFR_IO8(0x003) -#define PINB0 0 -#define PINB1 1 -#define PINB2 2 -#define PINB3 3 -#define PINB4 4 -#define PINB5 5 -#define PINB6 6 -#define PINB7 7 - -#define DDRB _SFR_IO8(0x004) -#define DDB0 0 -#define DDB1 1 -#define DDB2 2 -#define DDB3 3 -#define DDB4 4 -#define DDB5 5 -#define DDB6 6 -#define DDB7 7 - -#define PORTB _SFR_IO8(0x005) -#define PORTB0 0 -#define PORTB1 1 -#define PORTB2 2 -#define PORTB3 3 -#define PORTB4 4 -#define PORTB5 5 -#define PORTB6 6 -#define PORTB7 7 - -#define PINC _SFR_IO8(0x006) -#define PINC0 0 -#define PINC1 1 -#define PINC2 2 -#define PINC3 3 -#define PINC4 4 -#define PINC5 5 -#define PINC6 6 - -#define DDRC _SFR_IO8(0x007) -#define DDC0 0 -#define DDC1 1 -#define DDC2 2 -#define DDC3 3 -#define DDC4 4 -#define DDC5 5 -#define DDC6 6 - -#define PORTC _SFR_IO8(0x008) -#define PORTC0 0 -#define PORTC1 1 -#define PORTC2 2 -#define PORTC3 3 -#define PORTC4 4 -#define PORTC5 5 -#define PORTC6 6 - -#define PIND _SFR_IO8(0x009) -#define PIND0 0 -#define PIND1 1 -#define PIND2 2 -#define PIND3 3 -#define PIND4 4 -#define PIND5 5 -#define PIND6 6 -#define PIND7 7 - -#define DDRD _SFR_IO8(0x00A) -#define DDD0 0 -#define DDD1 1 -#define DDD2 2 -#define DDD3 3 -#define DDD4 4 -#define DDD5 5 -#define DDD6 6 -#define DDD7 7 - -#define PORTD _SFR_IO8(0x00B) -#define PORTD0 0 -#define PORTD1 1 -#define PORTD2 2 -#define PORTD3 3 -#define PORTD4 4 -#define PORTD5 5 -#define PORTD6 6 -#define PORTD7 7 - -#define PINE _SFR_IO8(0x00C) -#define PINE0 0 -#define PINE1 1 -#define PINE2 2 -#define PINE3 3 -#define PINE4 4 -#define PINE5 5 -#define PINE6 6 -#define PINE7 7 - -#define DDRE _SFR_IO8(0x00D) -#define DDE0 0 -#define DDE1 1 -#define DDE2 2 -#define DDE3 3 -#define DDE4 4 -#define DDE5 5 -#define DDE6 6 -#define DDE7 7 - -#define PORTE _SFR_IO8(0x00E) -#define PORTE0 0 -#define PORTE1 1 -#define PORTE2 2 -#define PORTE3 3 -#define PORTE4 4 -#define PORTE5 5 -#define PORTE6 6 -#define PORTE7 7 - -#define PINF _SFR_IO8(0x00F) -#define PINF0 0 -#define PINF1 1 -#define PINF2 2 -#define PINF3 3 -#define PINF4 4 -#define PINF5 5 -#define PINF6 6 -#define PINF7 7 - -#define DDRF _SFR_IO8(0x010) -#define DDF0 0 -#define DDF1 1 -#define DDF2 2 -#define DDF3 3 -#define DDF4 4 -#define DDF5 5 -#define DDF6 6 -#define DDF7 7 - -#define PORTF _SFR_IO8(0x011) -#define PORTF0 0 -#define PORTF1 1 -#define PORTF2 2 -#define PORTF3 3 -#define PORTF4 4 -#define PORTF5 5 -#define PORTF6 6 -#define PORTF7 7 - -#define TIFR0 _SFR_IO8(0x015) -#define TOV0 0 -#define OCF0A 1 -#define OCF0B 2 - -#define TIFR1 _SFR_IO8(0x016) -#define TOV1 0 -#define OCF1A 1 -#define OCF1B 2 -#define ICF1 5 - -#define TIFR2 _SFR_IO8(0x017) -#define TOV2 0 -#define OCF2A 1 -#define OCF2B 2 - -#define TIFR3 _SFR_IO8(0x018) -#define TOV3 0 -#define OCF3A 1 -#define OCF3B 2 -#define ICF3 5 - -#define TIFR4 _SFR_IO8(0x019) -#define TOV4 0 -#define OCF4A 1 -#define OCF4B 2 - -#define PCIFR _SFR_IO8(0x01B) -#define PCIF0 0 -#define PCIF1 1 -#define PCIF2 2 -#define PCIF3 3 -#define PCIF4 4 -#define PCIF5 5 - -#define GPIOR0 _SFR_IO8(0x01E) -#define GPIOR00 0 -#define GPIOR01 1 -#define GPIOR02 2 -#define GPIOR03 3 -#define GPIOR04 4 -#define GPIOR05 5 -#define GPIOR06 6 -#define GPIOR07 7 - -#define GTCCR _SFR_IO8(0x023) -#define PSRSYNC 0 -#define TSM 7 - -#define TCCR0A _SFR_IO8(0x024) -#define WGM00 0 -#define WGM01 1 -#define COM0B0 4 -#define COM0B1 5 -#define COM0A0 6 -#define COM0A1 7 - -#define TCCR0B _SFR_IO8(0x025) -#define CS00 0 -#define CS01 1 -#define CS02 2 -#define WGM02 3 -#define FOC0B 6 -#define FOC0A 7 - -#define TCNT0 _SFR_IO8(0x026) -#define TCNT0_0 0 -#define TCNT0_1 1 -#define TCNT0_2 2 -#define TCNT0_3 3 -#define TCNT0_4 4 -#define TCNT0_5 5 -#define TCNT0_6 6 -#define TCNT0_7 7 - -#define OCR0A _SFR_IO8(0x027) -#define OCROA_0 0 -#define OCROA_1 1 -#define OCROA_2 2 -#define OCROA_3 3 -#define OCROA_4 4 -#define OCROA_5 5 -#define OCROA_6 6 -#define OCROA_7 7 - -#define OCR0B _SFR_IO8(0x028) -#define OCR0B_0 0 -#define OCR0B_1 1 -#define OCR0B_2 2 -#define OCR0B_3 3 -#define OCR0B_4 4 -#define OCR0B_5 5 -#define OCR0B_6 6 -#define OCR0B_7 7 - -#define GPIOR1 _SFR_IO8(0x02A) -#define GPIOR10 0 -#define GPIOR11 1 -#define GPIOR12 2 -#define GPIOR13 3 -#define GPIOR14 4 -#define GPIOR15 5 -#define GPIOR16 6 -#define GPIOR17 7 - -#define GPIOR2 _SFR_IO8(0x02B) -#define GPIOR20 0 -#define GPIOR21 1 -#define GPIOR22 2 -#define GPIOR23 3 -#define GPIOR24 4 -#define GPIOR25 5 -#define GPIOR26 6 -#define GPIOR27 7 - -#define SPCR _SFR_IO8(0x02C) -#define SPR0 0 -#define SPR1 1 -#define CPHA 2 -#define CPOL 3 -#define MSTR 4 -#define DORD 5 -#define SPE 6 -#define SPIE 7 - -#define SPSR _SFR_IO8(0x02D) -#define SPI2X 0 -#define WCOL 6 -#define SPIF 7 - -#define SPDR _SFR_IO8(0x02E) -#define SPDR0 0 -#define SPDR1 1 -#define SPDR2 2 -#define SPDR3 3 -#define SPDR4 4 -#define SPDR5 5 -#define SPDR6 6 -#define SPDR7 7 - -#define OUTCLKR _SFR_IO8(0x02F) -#define CLK_O 0 - -#define ACSR _SFR_IO8(0x030) -#define SELANA 0 - -#define OCDR _SFR_IO8(0x031) -#define OCDR0 0 -#define OCDR1 1 -#define OCDR2 2 -#define OCDR3 3 -#define OCDR4 4 -#define OCDR5 5 -#define OCDR6 6 -#define OCDR7 7 - -#define SMHIGH _SFR_IO8(0x032) -#define ON_SMHIGH 0 -#define SMHIGH_IE 1 -#define SMHIGH_IF 2 - -#define SMCR _SFR_IO8(0x033) -#define SE 0 - -#define MCUSR _SFR_IO8(0x034) -#define PORF 0 -#define BORF 2 -#define WDRF 3 -#define JTRF 4 - -#define MCUCR _SFR_IO8(0x035) -#define IVCE 0 -#define IVSEL 1 -#define PUD 4 -#define BODSE 5 -#define JTD 7 - -#define POWER _SFR_IO8(0x036) -#define ONOFF 0 -#define WKUPF 1 -#define PORVBATF 2 -#define WKUPSEL 3 - -#define SPMCSR _SFR_IO8(0x037) -#define SPMEN 0 -#define PGERS 1 -#define PGWRT 2 -#define BLBSET 3 -#define RWWSRE 4 -#define RWWSB 6 -#define SPMIE 7 - -#define RAMPZ _SFR_IO8(0x03B) -#define RAMPZ0 0 - -#define WDTCSR _SFR_MEM8(0x060) -#define WDP0 0 -#define WDP1 1 -#define WDP2 2 -#define WDE 3 -#define WDCE 4 -#define WDP3 5 -#define WDIE 6 -#define WDIF 7 - -#define CLKPR _SFR_MEM8(0x061) -#define CLKPS0 0 -#define CLKPS1 1 -#define CLKPS2 2 -#define CLKPS3 3 -#define CLKPCE 7 - -#define PRR0 _SFR_MEM8(0x064) -#define PRUSART0 1 -#define PRSPI 2 -#define PRTIM1 3 -#define PRLCD 4 -#define PRTIM0 5 -#define PRTIM2 6 -#define PRTWI 7 - -#define PRR1 _SFR_MEM8(0x065) -#define PRTIM3 0 -#define PRTIM4 1 -#define PRSCI0 2 -#define PRSCI1 3 -#define PRSCI2 4 -#define PRCL 5 -#define PRDSRC 6 - -#define PCICR _SFR_MEM8(0x068) -#define PCIE0 0 -#define PCIE1 1 -#define PCIE2 2 -#define PCIE3 3 -#define PCIE4 4 -#define PCIE5 5 - -#define PCMSK0 _SFR_MEM8(0x06B) -#define PCINT0 0 -#define PCINT1 1 -#define PCINT2 2 -#define PCINT3 3 -#define PCINT4 4 -#define PCINT5 5 -#define PCINT6 6 -#define PCINT7 7 - -#define PCMSK1 _SFR_MEM8(0x06C) -#define PCINT8 0 -#define PCINT9 1 -#define PCINT10 2 -#define PCINT11 3 -#define PCINT12 4 -#define PCINT13 5 -#define PCINT14 6 -#define PCINT15 7 - -#define PCMSK2 _SFR_MEM8(0x06D) -#define PCINT16 0 -#define PCINT17 1 -#define PCINT18 2 -#define PCINT19 3 -#define PCINT20 4 - -#define TIMSK0 _SFR_MEM8(0x06E) -#define TOIE0 0 -#define OCIE0A 1 -#define OCIE0B 2 - -#define TIMSK1 _SFR_MEM8(0x06F) -#define TOIE1 0 -#define OCIE1A 1 -#define OCIE1B 2 -#define ICIE1 5 - -#define TIMSK2 _SFR_MEM8(0x070) -#define TOI20 0 -#define OCIE2A 1 -#define OCIE2B 2 - -#define TIMSK3 _SFR_MEM8(0x071) -#define TOIE3 0 -#define OCIE3A 1 -#define OCIE3B 2 -#define ICIE3 5 - -#define TIMSK4 _SFR_MEM8(0x072) -#define TOIE4 0 -#define OCIE4A 1 -#define OCIE4B 2 - -#define PCMSK3 _SFR_MEM8(0x073) -#define PCINT24 0 -#define PCINT25 1 -#define PCINT26 2 -#define PCINT27 3 -#define PCINT28 4 -#define PCINT29 5 -#define PCINT30 6 -#define PCINT31 7 - -#define PCMSK4 _SFR_MEM8(0x074) -#define PCINT32 0 -#define PCINT33 1 -#define PCINT34 2 -#define PCINT35 3 -#define PCINT36 4 -#define PCINT37 5 -#define PCINT38 6 -#define PCINT39 7 - -#define PCMSK5 _SFR_MEM8(0x075) -#define PCINT40 0 -#define PCINT41 1 -#define PCINT42 2 -#define PCINT43 3 -#define PCINT44 4 -#define PCINT45 5 -#define PCINT46 6 -#define PCINT47 7 - -#define TCCR1A _SFR_MEM8(0x080) -#define WGM10 0 -#define WGM11 1 -#define COM1B0 4 -#define COM1B1 5 -#define COM1A0 6 -#define COM1A1 7 - -#define TCCR1B _SFR_MEM8(0x081) -#define CS10 0 -#define CS11 1 -#define CS12 2 -#define WGM12 3 -#define WGM13 4 -#define ICES1 6 -#define ICNC1 7 - -#define TCCR1C _SFR_MEM8(0x082) -#define FOC1B 6 -#define FOC1A 7 - -#define TCNT1 _SFR_MEM16(0x084) - -#define TCNT1L _SFR_MEM8(0x084) -#define TCNT1L0 0 -#define TCNT1L1 1 -#define TCNT1L2 2 -#define TCNT1L3 3 -#define TCNT1L4 4 -#define TCNT1L5 5 -#define TCNT1L6 6 -#define TCNT1L7 7 - -#define TCNT1H _SFR_MEM8(0x085) -#define TCNT1H0 0 -#define TCNT1H1 1 -#define TCNT1H2 2 -#define TCNT1H3 3 -#define TCNT1H4 4 -#define TCNT1H5 5 -#define TCNT1H6 6 -#define TCNT1H7 7 - -#define ICR1 _SFR_MEM16(0x086) - -#define ICR1L _SFR_MEM8(0x086) -#define ICR1L0 0 -#define ICR1L1 1 -#define ICR1L2 2 -#define ICR1L3 3 -#define ICR1L4 4 -#define ICR1L5 5 -#define ICR1L6 6 -#define ICR1L7 7 - -#define ICR1H _SFR_MEM8(0x087) -#define ICR1H0 0 -#define ICR1H1 1 -#define ICR1H2 2 -#define ICR1H3 3 -#define ICR1H4 4 -#define ICR1H5 5 -#define ICR1H6 6 -#define ICR1H7 7 - -#define OCR1A _SFR_MEM16(0x088) - -#define OCR1AL _SFR_MEM8(0x088) -#define OCR1AL0 0 -#define OCR1AL1 1 -#define OCR1AL2 2 -#define OCR1AL3 3 -#define OCR1AL4 4 -#define OCR1AL5 5 -#define OCR1AL6 6 -#define OCR1AL7 7 - -#define OCR1AH _SFR_MEM8(0x089) -#define OCR1AH0 0 -#define OCR1AH1 1 -#define OCR1AH2 2 -#define OCR1AH3 3 -#define OCR1AH4 4 -#define OCR1AH5 5 -#define OCR1AH6 6 -#define OCR1AH7 7 - -#define OCR1B _SFR_MEM16(0x08A) - -#define OCR1BL _SFR_MEM8(0x08A) -#define OCR1BL0 0 -#define OCR1BL1 1 -#define OCR1BL2 2 -#define OCR1BL3 3 -#define OCR1BL4 4 -#define OCR1BL5 5 -#define OCR1BL6 6 -#define OCR1BL7 7 - -#define OCR1BH _SFR_MEM8(0x08B) -#define OCR1BH0 0 -#define OCR1BH1 1 -#define OCR1BH2 2 -#define OCR1BH3 3 -#define OCR1BH4 4 -#define OCR1BH5 5 -#define OCR1BH6 6 -#define OCR1BH7 7 - -#define TCCR3A _SFR_MEM8(0x090) -#define WGM30 0 -#define WGM31 1 -#define COM3B0 4 -#define COM3B1 5 -#define COM3A0 6 -#define COM3A1 7 - -#define TCCR3B _SFR_MEM8(0x091) -#define CS30 0 -#define CS31 1 -#define CS32 2 -#define WGM32 3 -#define WGM33 4 -#define ICES3 6 -#define ICNC3 7 - -#define TCCR3C _SFR_MEM8(0x092) -#define FOC3B 6 -#define FOC3A 7 - -#define TCNT3 _SFR_MEM16(0x094) - -#define TCNT3L _SFR_MEM8(0x094) -#define TCNT3L0 0 -#define TCNT3L1 1 -#define TCNT3L2 2 -#define TCNT3L3 3 -#define TCNT3L4 4 -#define TCNT3L5 5 -#define TCNT3L6 6 -#define TCNT3L7 7 - -#define TCNT3H _SFR_MEM8(0x095) -#define TCNT3H0 0 -#define TCNT3H1 1 -#define TCNT3H2 2 -#define TCNT3H3 3 -#define TCNT3H4 4 -#define TCNT3H5 5 -#define TCNT3H6 6 -#define TCNT3H7 7 - -#define ICR3 _SFR_MEM16(0x096) - -#define ICR3L _SFR_MEM8(0x096) -#define ICR3L0 0 -#define ICR3L1 1 -#define ICR3L2 2 -#define ICR3L3 3 -#define ICR3L4 4 -#define ICR3L5 5 -#define ICR3L6 6 -#define ICR3L7 7 - -#define ICR3H _SFR_MEM8(0x097) -#define ICR3H0 0 -#define ICR3H1 1 -#define ICR3H2 2 -#define ICR3H3 3 -#define ICR3H4 4 -#define ICR3H5 5 -#define ICR3H6 6 -#define ICR3H7 7 - -#define OCR3A _SFR_MEM16(0x098) - -#define OCR3AL _SFR_MEM8(0x098) -#define OCR3AL0 0 -#define OCR3AL3 1 -#define OCR3AL2 2 -#define OCR3AL4 4 -#define OCR3AL5 5 -#define OCR3AL6 6 -#define OCR3AL7 7 - -#define OCR3AH _SFR_MEM8(0x099) -#define OCR3AH0 0 -#define OCR3AH1 1 -#define OCR3AH2 2 -#define OCR3AH3 3 -#define OCR3AH4 4 -#define OCR3AH5 5 -#define OCR3AH6 6 -#define OCR3AH7 7 - -#define OCR3B _SFR_MEM16(0x09A) - -#define OCR3BL _SFR_MEM8(0x09A) -#define OCR3BL0 0 -#define OCR3BL1 1 -#define OCR3BL2 2 -#define OCR3BL3 3 -#define OCR3BL4 4 -#define OCR3BL5 5 -#define OCR3BL6 6 -#define OCR3BL7 7 - -#define OCR3BH _SFR_MEM8(0x09B) -#define OCR3BH0 0 -#define OCR3BH1 1 -#define OCR3BH2 2 -#define OCR3BH3 3 -#define OCR3BH4 4 -#define OCR3BH5 5 -#define OCR3BH6 6 -#define OCR3BH7 7 - -#define TCCR2A _SFR_MEM8(0x0A0) -#define WGM20 0 -#define WGM21 1 -#define COM2B0 4 -#define COM2B1 5 -#define COM2A0 6 -#define COM2A1 7 - -#define TCCR2B _SFR_MEM8(0x0A1) -#define CS20 0 -#define CS21 1 -#define CS22 2 -#define WGM22 3 -#define FOC2B 6 -#define FOC2A 7 - -#define TCNT2 _SFR_MEM8(0x0A2) -#define TCNT2_0 0 -#define TCNT2_1 1 -#define TCNT2_2 2 -#define TCNT2_3 3 -#define TCNT2_4 4 -#define TCNT2_5 5 -#define TCNT2_6 6 -#define TCNT2_7 7 - -#define OCR2A _SFR_MEM8(0x0A3) -#define OCR2A_0 0 -#define OCR2A_1 1 -#define OCR2A_2 2 -#define OCR2A_3 3 -#define OCR2A_4 4 -#define OCR2A_5 5 -#define OCR2A_6 6 -#define OCR2A_7 7 - -#define OCR2B _SFR_MEM8(0x0A4) -#define OCR2B_0 0 -#define OCR2B_1 1 -#define OCR2B_2 2 -#define OCR2B_3 3 -#define OCR2B_4 4 -#define OCR2B_5 5 -#define OCR2B_6 6 -#define OCR2B_7 7 - -#define TCCR4A _SFR_MEM8(0x0A8) -#define WGM40 0 -#define WGM41 1 -#define COM4B0 4 -#define COM4B1 5 -#define COM4A0 6 -#define COM4A1 7 - -#define TCCR4B _SFR_MEM8(0x0A9) -#define CS40 0 -#define CS41 1 -#define CS42 2 -#define WGM42 3 -#define FOC4B 6 -#define FOC4A 7 - -#define TCNT4 _SFR_MEM8(0x0AA) -#define TCNT4_0 0 -#define TCNT4_1 1 -#define TCNT4_2 2 -#define TCNT4_3 3 -#define TCNT4_4 4 -#define TCNT4_5 5 -#define TCNT4_6 6 -#define TCNT4_7 7 - -#define OCR4A _SFR_MEM8(0x0AB) -#define OCR4A_0 0 -#define OCR4A_1 1 -#define OCR4A_2 2 -#define OCR4A_3 3 -#define OCR4A_4 4 -#define OCR4A_5 5 -#define OCR4A_6 6 -#define OCR4A_7 7 - -#define OCR4B _SFR_MEM8(0x0AC) -#define OCR4B_0 0 -#define OCR4B_1 1 -#define OCR4B_2 2 -#define OCR4B_3 3 -#define OCR4B_4 4 -#define OCR4B_5 5 -#define OCR4B_6 6 -#define OCR4B_7 7 - -#define TWBR _SFR_MEM8(0x0B8) - -#define TWSR _SFR_MEM8(0x0B9) - -#define TWAR _SFR_MEM8(0x0BA) - -#define TWDR _SFR_MEM8(0x0BB) - -#define TWCR _SFR_MEM8(0x0BC) - -#define TWAMR _SFR_MEM8(0x0BD) - -#define UCSR0A _SFR_MEM8(0x0C0) -#define MPCM0 0 -#define U2X0 1 -#define UPE0 2 -#define DOR0 3 -#define FE0 4 -#define UDRE0 5 -#define TXC0 6 -#define RXC0 7 - -#define UCSR0B _SFR_MEM8(0x0C1) -#define TXB80 0 -#define RXB80 1 -#define UCSZ02 2 -#define TXEN0 3 -#define RXEN0 4 -#define UDRIE0 5 -#define TXCIE0 6 -#define RXCIE0 7 - -#define UCSR0C _SFR_MEM8(0x0C2) -#define UCPOL0 0 -#define UCSZ00 1 -#define UCSZ01 2 -#define USBS0 3 -#define UPM00 4 -#define UPM01 5 -#define UMSEL00 6 -#define UMSEL01 7 - -#define UBRR0 _SFR_MEM16(0x0C4) - -#define UBRR0L _SFR_MEM8(0x0C4) -#define UBRR0_0 0 -#define UBRR0_1 1 -#define UBRR0_2 2 -#define UBRR0_3 3 -#define UBRR0_4 4 -#define UBRR0_5 5 -#define UBRR0_6 6 -#define UBRR0_7 7 - -#define UBRR0H _SFR_MEM8(0x0C5) -#define UBRR0_8 0 -#define UBRR0_9 1 -#define UBRR0_10 2 -#define UBRR0_11 3 - -#define UDR0 _SFR_MEM8(0x0C6) -#define UDR0_0 0 -#define UDR0_1 1 -#define UDR0_2 2 -#define UDR0_3 3 -#define UDR0_4 4 -#define UDR0_5 5 -#define UDR0_6 6 -#define UDR0_7 7 - -#define LCDCRA _SFR_MEM8(0x0E0) -#define LCDBL 0 -#define LCDIE 3 -#define LCDIF 4 -#define LCDAB 6 -#define LCDEN 7 - -#define LCDFRR _SFR_MEM8(0x0E1) -#define LCDCD0 0 -#define LCDCD1 1 -#define LCDCD2 2 -#define LCDPS0 4 -#define LCDPS1 5 -#define LCDPS2 6 -#define LCDPBUFEN 7 - -#define LCDCCR _SFR_MEM8(0x0E2) -#define LCDCC0 0 -#define LCDCC1 1 -#define LCDCC2 2 -#define LCDCC3 3 -#define LCDMDT 4 -#define LCDDC0 5 -#define LCDDC1 6 -#define LCDDC2 7 - -#define LCDDR0 _SFR_MEM8(0x0E3) -#define SEG000 0 -#define SEG001 1 -#define SEG002 2 -#define SEG003 3 -#define SEG004 4 -#define SEG005 5 -#define SEG006 6 -#define SEG007 7 - -#define LCDDR1 _SFR_MEM8(0x0E4) -#define SEG008 0 -#define SEG009 1 -#define SEG010 2 -#define SEG011 3 -#define SEG012 4 -#define SEG013 5 -#define SEG014 6 -#define SEG015 7 - -#define LCDDR2 _SFR_MEM8(0x0E5) -#define SEG100 0 -#define SEG101 1 -#define SEG102 2 -#define SEG103 3 -#define SEG104 4 -#define SEG105 5 -#define SEG106 6 -#define SEG107 7 - -#define LCDDR3 _SFR_MEM8(0x0E6) -#define SEG108 0 -#define SEG109 1 -#define SEG024 2 -#define SEG111 3 -#define SEG112 4 -#define SEG113 5 -#define SEG114 6 -#define SEG115 7 - -#define LCDDR4 _SFR_MEM8(0x0E7) -#define SEG200 0 -#define SEG201 1 -#define SEG202 2 -#define SEG203 3 -#define SEG204 4 -#define SEG205 5 -#define SEG206 6 -#define SEG207 7 - -#define LCDDR5 _SFR_MEM8(0x0E8) -#define SEG208 0 -#define SEG209 1 -#define SEG210 2 -#define SEG211 3 -#define SEG213 5 -#define SEG214 6 -#define SEG215 7 - -#define LCDDR6 _SFR_MEM8(0x0E9) -#define SEG300 0 -#define SEG301 1 -#define SEG302 2 -#define SEG303 3 -#define SEG304 4 -#define SEG305 5 -#define SEG306 6 -#define SEG307 7 - -#define LCDDR7 _SFR_MEM8(0x0EA) -#define SEG308 0 -#define SEG309 1 -#define SEG310 2 -#define SEG311 3 -#define SEG312 4 -#define SEG313 5 -#define SEG314 6 -#define SEG315 7 - -#define SC0ICLK _SFR_MEM8(0x100) - -#define SC0WT0 _SFR_MEM8(0x101) - -#define SC0WT1 _SFR_MEM8(0x102) - -#define SC0WT2 _SFR_MEM8(0x103) - -#define SC0WT3 _SFR_MEM8(0x104) - -#define SC0GT _SFR_MEM16(0x105) - -#define SC0GTL _SFR_MEM8(0x105) - -#define SC0GTH _SFR_MEM8(0x106) - -#define SC0ETU _SFR_MEM16(0x107) - -#define SC0ETUL _SFR_MEM8(0x107) - -#define SC0ETUH _SFR_MEM8(0x108) - -#define SC0IBUF _SFR_MEM8(0x109) - -#define SC0SR _SFR_MEM8(0x10A) - -#define SC0IER _SFR_MEM8(0x10B) - -#define SC0IIR _SFR_MEM8(0x10C) - -#define SC0ISR _SFR_MEM8(0x10D) - -#define SC0CON _SFR_MEM8(0x10E) - -#define SC0ICR _SFR_MEM8(0x10F) - -#define SC1ICLK _SFR_MEM8(0x110) - -#define SC1WT0 _SFR_MEM8(0x111) - -#define SC1WT1 _SFR_MEM8(0x112) - -#define SC1WT2 _SFR_MEM8(0x113) - -#define SC1WT3 _SFR_MEM8(0x114) - -#define SC1GT _SFR_MEM16(0x115) - -#define SC1GTL _SFR_MEM8(0x115) - -#define SC1GTH _SFR_MEM8(0x116) - -#define SC1ETU _SFR_MEM16(0x117) - -#define SC1ETUL _SFR_MEM8(0x117) - -#define SC1ETUH _SFR_MEM8(0x118) - -#define SC1IBUF _SFR_MEM8(0x119) - -#define SC1SR _SFR_MEM8(0x11A) - -#define SC1IER _SFR_MEM8(0x11B) - -#define SC1IIR _SFR_MEM8(0x11C) - -#define SC1ISR _SFR_MEM8(0x11D) - -#define SC1CON _SFR_MEM8(0x11E) - -#define SC1ICR _SFR_MEM8(0x11F) - -#define SC2ICLK _SFR_MEM8(0x120) - -#define SC2WT0 _SFR_MEM8(0x121) - -#define SC2WT1 _SFR_MEM8(0x122) - -#define SC2WT2 _SFR_MEM8(0x123) - -#define SC2WT3 _SFR_MEM8(0x124) - -#define SC2GT _SFR_MEM16(0x125) - -#define SC2GTL _SFR_MEM8(0x125) - -#define SC2GTH _SFR_MEM8(0x126) - -#define SC2ETU _SFR_MEM16(0x127) - -#define SC2ETUL _SFR_MEM8(0x127) - -#define SC2ETUH _SFR_MEM8(0x128) - -#define SC2IBUF _SFR_MEM8(0x129) - -#define SC2SR _SFR_MEM8(0x12A) - -#define SC2IER _SFR_MEM8(0x12B) - -#define SC2IIR _SFR_MEM8(0x12C) - -#define SC2ISR _SFR_MEM8(0x12D) - -#define SC2CON _SFR_MEM8(0x12E) - -#define SC2ICR _SFR_MEM8(0x12F) - -#define ACLCr _SFR_MEM8(0x140) - -#define ACLMr _SFR_MEM8(0x141) - -#define ACLIr _SFR_MEM8(0x142) - -#define ACLKey1b1r _SFR_MEM8(0x146) - -#define ACLKey1b2r _SFR_MEM8(0x147) - -#define ACLKey1b3r _SFR_MEM8(0x148) - -#define ACLKey1b4r _SFR_MEM8(0x149) - -#define ACLKey1b5r _SFR_MEM8(0x14A) - -#define ACLKey1b6r _SFR_MEM8(0x14B) - -#define ACLKey1b7r _SFR_MEM8(0x14C) - -#define ACLKey1b8r _SFR_MEM8(0x14D) - -#define ACLKey2b1r _SFR_MEM8(0x14E) - -#define ACLKey2b2r _SFR_MEM8(0x14F) - -#define ACLKey2b3r _SFR_MEM8(0x150) - -#define ACLKey2b4r _SFR_MEM8(0x151) - -#define ACLKey2b5r _SFR_MEM8(0x152) - -#define ACLKey2b6r _SFR_MEM8(0x153) - -#define ACLKey2b7r _SFR_MEM8(0x154) - -#define ACLKey2b8r _SFR_MEM8(0x155) - -#define ACLIdata1r _SFR_MEM8(0x156) - -#define ACLIdata2r _SFR_MEM8(0x157) - -#define ACLIdata3r _SFR_MEM8(0x158) - -#define ACLIdata4r _SFR_MEM8(0x159) - -#define ACLIdata5r _SFR_MEM8(0x15A) - -#define ACLIdata6r _SFR_MEM8(0x15B) - -#define ACLIdata7r _SFR_MEM8(0x15C) - -#define ACLIdata8r _SFR_MEM8(0x15D) - -#define ACLOdata1r _SFR_MEM8(0x15E) - -#define ACLOdata2r _SFR_MEM8(0x15F) - -#define ACLOdata3r _SFR_MEM8(0x160) - -#define ACLOdata4r _SFR_MEM8(0x161) - -#define ACLOdata5r _SFR_MEM8(0x162) - -#define ACLOdata6r _SFR_MEM8(0x163) - -#define ACLOdata7r _SFR_MEM8(0x164) - -#define ACLOdata8r _SFR_MEM8(0x165) - -#define ACLIv1r _SFR_MEM8(0x166) - -#define ACLIv2r _SFR_MEM8(0x167) - -#define ACLIv3r _SFR_MEM8(0x168) - -#define ACLIv4r _SFR_MEM8(0x169) - -#define ACLIv5r _SFR_MEM8(0x16A) - -#define ACLIv6r _SFR_MEM8(0x16B) - -#define ACLIv7r _SFR_MEM8(0x16C) - -#define ACLIv8r _SFR_MEM8(0x16D) - -#define ACLVr _SFR_MEM8(0x16F) - -#define DSRCDvrr _SFR_MEM8(0x180) - -#define DSRCDldr _SFR_MEM8(0x181) - -#define DSRCDenr _SFR_MEM8(0x182) - -#define DSRCIntr _SFR_MEM8(0x188) - -#define DSRCInrr _SFR_MEM8(0x189) - -#define DSRCItmr _SFR_MEM8(0x18A) - -#define DSRCIrmr _SFR_MEM8(0x18B) - -#define DSRCItcr _SFR_MEM8(0x18C) - -#define DSRCIrcr _SFR_MEM8(0x18D) - -#define DSRCTcdrl _SFR_MEM8(0x190) - -#define DSRCTcdrh _SFR_MEM8(0x191) - -#define DSRCRcdrl _SFR_MEM8(0x192) - -#define DSRCRcdrh _SFR_MEM8(0x193) - -#define DSRCAder _SFR_MEM8(0x196) - -#define DSRCAdsr _SFR_MEM8(0x197) - -#define DSRCRadr0 _SFR_MEM8(0x198) - -#define DSRCRadr1 _SFR_MEM8(0x199) - -#define DSRCRadr2 _SFR_MEM8(0x19A) - -#define DSRCRadr3 _SFR_MEM8(0x19B) - -#define DSRCPadr0 _SFR_MEM8(0x19C) - -#define DSRCPadr1 _SFR_MEM8(0x19D) - -#define DSRCPadr2 _SFR_MEM8(0x19E) - -#define DSRCPadr3 _SFR_MEM8(0x19F) - -#define DSRCPamr0 _SFR_MEM8(0x1A0) - -#define DSRCPamr1 _SFR_MEM8(0x1A1) - -#define DSRCPamr2 _SFR_MEM8(0x1A2) - -#define DSRCPamr3 _SFR_MEM8(0x1A3) - -#define DSRCGadr00 _SFR_MEM8(0x1A4) - -#define DSRCGadr01 _SFR_MEM8(0x1A5) - -#define DSRCGadr02 _SFR_MEM8(0x1A6) - -#define DSRCGadr03 _SFR_MEM8(0x1A7) - -#define DSRCGamr00 _SFR_MEM8(0x1A8) - -#define DSRCGamr01 _SFR_MEM8(0x1A9) - -#define DSRCGamr02 _SFR_MEM8(0x1AA) - -#define DSRCGamr03 _SFR_MEM8(0x1AB) - -#define DSRCGadr10 _SFR_MEM8(0x1AC) - -#define DSRCGadr11 _SFR_MEM8(0x1AD) - -#define DSRCGadr12 _SFR_MEM8(0x1AE) - -#define DSRCGadr13 _SFR_MEM8(0x1AF) - -#define DSRCGamr10 _SFR_MEM8(0x1B0) - -#define DSRCGamr11 _SFR_MEM8(0x1B1) - -#define DSRCGamr12 _SFR_MEM8(0x1B2) - -#define DSRCGamr13 _SFR_MEM8(0x1B3) - -#define DSRCGadr20 _SFR_MEM8(0x1B4) - -#define DSRCGadr21 _SFR_MEM8(0x1B5) - -#define DSRCGadr22 _SFR_MEM8(0x1B6) - -#define DSRCGadr23 _SFR_MEM8(0x1B7) - -#define DSRCGamr20 _SFR_MEM8(0x1B8) - -#define DSRCGamr21 _SFR_MEM8(0x1B9) - -#define DSRCGamr22 _SFR_MEM8(0x1BA) - -#define DSRCGamr23 _SFR_MEM8(0x1BB) - -#define DSRCGadr30 _SFR_MEM8(0x1BC) - -#define DSRCGadr31 _SFR_MEM8(0x1BD) - -#define DSRCGadr32 _SFR_MEM8(0x1BE) - -#define DSRCGadr33 _SFR_MEM8(0x1BF) - -#define DSRCGamr30 _SFR_MEM8(0x1C0) - -#define DSRCGamr31 _SFR_MEM8(0x1C1) - -#define DSRCGamr32 _SFR_MEM8(0x1C2) - -#define DSRCGamr33 _SFR_MEM8(0x1C3) - -#define DSRCBmr0 _SFR_MEM8(0x1C4) - -#define DSRCBmr1 _SFR_MEM8(0x1C5) - -#define DSRCBmr2 _SFR_MEM8(0x1C6) - -#define DSRCBmr3 _SFR_MEM8(0x1C7) - -#define DSRCTcmr _SFR_MEM8(0x1C8) - -#define DSRCTcnr _SFR_MEM8(0x1C9) - -#define DSRCTstr _SFR_MEM8(0x1CA) - -#define DSRCTmor _SFR_MEM8(0x1CB) - -#define DSRCTrdr _SFR_MEM8(0x1CC) - -#define DSRCTflr0 _SFR_MEM8(0x1CD) - -#define DSRCTflr1 _SFR_MEM8(0x1CE) - -#define DSRCTfsr _SFR_MEM8(0x1CF) - -#define DSRCTfir0 _SFR_MEM8(0x1D0) - -#define DSRCTfir1 _SFR_MEM8(0x1D1) - -#define DSRCTfir2 _SFR_MEM8(0x1D2) - -#define DSRCTfir3 _SFR_MEM8(0x1D3) - -#define DSRCTprr0 _SFR_MEM8(0x1D4) - -#define DSRCTprr1 _SFR_MEM8(0x1D5) - -#define DSRCTpor0 _SFR_MEM8(0x1D6) - -#define DSRCTpor1 _SFR_MEM8(0x1D7) - -#define DSRCPplr _SFR_MEM8(0x1D8) - -#define DSRCRcmr _SFR_MEM8(0x1E0) - -#define DSRCRcnr _SFR_MEM8(0x1E1) - -#define DSRCRstr _SFR_MEM8(0x1E2) - -#define DSRCRflr0 _SFR_MEM8(0x1E3) - -#define DSRCRflr1 _SFR_MEM8(0x1E4) - -#define DSRCRdtr _SFR_MEM8(0x1E5) - -#define DSRCRrdr _SFR_MEM8(0x1E6) - -#define DSRCRfir0 _SFR_MEM8(0x1E8) - -#define DSRCRfir1 _SFR_MEM8(0x1E9) - -#define DSRCRfir2 _SFR_MEM8(0x1EA) - -#define DSRCRfir3 _SFR_MEM8(0x1EB) - -#define DSRCRfcr0 _SFR_MEM8(0x1EC) - -#define DSRCRfcr1 _SFR_MEM8(0x1ED) - -#define DSRCRfcr2 _SFR_MEM8(0x1EE) - -#define DSRCRfcr3 _SFR_MEM8(0x1EF) - -#define DSRCTestr _SFR_MEM8(0x1F0) - -#define DSRCFstr _SFR_MEM8(0x1F4) - -#define DSRCTfcr _SFR_MEM8(0x1F5) - -#define DSRCRfcr _SFR_MEM8(0x1F6) - -#define DSRCDtdf _SFR_MEM8(0x1F7) - -#define DSRCDrdf _SFR_MEM8(0x1F8) - - -/* Interrupt vectors */ -/* Vector 0 is the reset vector */ -#define PCINT0_vect_num 1 -#define PCINT0_vect _VECTOR(1) /* Pin Change Interrupt Request 0 PortA */ -#define PCINT1_vect_num 2 -#define PCINT1_vect _VECTOR(2) /* Pin Change Interrupt Request 1 PortB */ -#define PCINT2_vect_num 3 -#define PCINT2_vect _VECTOR(3) /* Pin Change Interrupt Request 2 PortC */ -#define PCINT3_vect_num 4 -#define PCINT3_vect _VECTOR(4) /* Pin Change Interrupt Request 3 PortD-LCD */ -#define PCINT4_vect_num 5 -#define PCINT4_vect _VECTOR(5) /* Pin Change Interrupt Request 4 PortE-LCD */ -#define PCINT5_vect_num 6 -#define PCINT5_vect _VECTOR(6) /* Pin Change Interrupt Request 5 PortF-LCD */ -#define WDT_vect_num 7 -#define WDT_vect _VECTOR(7) /* Watchdog Time out Interrupt */ -#define TIMER4_COMPA_vect_num 8 -#define TIMER4_COMPA_vect _VECTOR(8) /* Timer 8bit /Counter4 Compare Match A */ -#define TIMER4_COMPB_vect_num 9 -#define TIMER4_COMPB_vect _VECTOR(9) /* Timer 8bit /Counter4 Compare Match B */ -#define TIMER4_OVF_vect_num 10 -#define TIMER4_OVF_vect _VECTOR(10) /* Timer/Counter4 Overflow */ -#define TIMER3_INPUT_CAPT_vect_num 11 -#define TIMER3_INPUT_CAPT_vect _VECTOR(11) /* Timer 16bit/Counter3 Capture Event */ -#define TIMER3_COMPA_vect_num 12 -#define TIMER3_COMPA_vect _VECTOR(12) /* Timer 16bit/Counter3 Compare Match A */ -#define TIMER3_COMPB_vect_num 13 -#define TIMER3_COMPB_vect _VECTOR(13) /* Timer 16bit/Counter3 Compare Match B */ -#define TIMER3_OVF_vect_num 14 -#define TIMER3_OVF_vect _VECTOR(14) /* Timer3 16 bit/Counter3 Overflow */ -#define TIMER2_COMPA_vect_num 15 -#define TIMER2_COMPA_vect _VECTOR(15) /* Timer 8bit/Counter2 Compare Match A */ -#define TIMER2_COMPB_vect_num 16 -#define TIMER2_COMPB_vect _VECTOR(16) /* Timer 8bit/Counter2 Compare Match B */ -#define TIMER2_OVF_vect_num 17 -#define TIMER2_OVF_vect _VECTOR(17) /* Timer2 8 bit/Counter2 Overflow */ -#define TIMER1_INPUT_CAPT_vect_num 18 -#define TIMER1_INPUT_CAPT_vect _VECTOR(18) /* Timer1 16bit/Counter1 Capture Event */ -#define TIMER1_COMPA_vect_num 19 -#define TIMER1_COMPA_vect _VECTOR(19) /* Timer 16bit/Counter1 Compare Match A */ -#define TIMER1_COMPB_vect_num 20 -#define TIMER1_COMPB_vect _VECTOR(20) /* Timer 16bit/Counter1 Compare Match B */ -#define TIMER1_OVF_vect_num 21 -#define TIMER1_OVF_vect _VECTOR(21) /* Timer1 16 bit/Counter1 Overflow */ -#define TIMER0_COMP_A_vect_num 22 -#define TIMER0_COMP_A_vect _VECTOR(22) /* Timer0/Counter0 Compare Match */ -#define TIMER0_COMP_B_vect_num 23 -#define TIMER0_COMP_B_vect _VECTOR(23) /* Timer0 8bit /Counter0 Compare Match A */ -#define TIMER0_OVF_vect_num 24 -#define TIMER0_OVF_vect _VECTOR(24) /* Timer0 8bit/Counter0 Overflow */ -#define IRQ_DSRC_vect_num 25 -#define IRQ_DSRC_vect _VECTOR(25) /* DSRC interrupt - custom IP */ -#define IRQ_SCI0_vect_num 26 -#define IRQ_SCI0_vect _VECTOR(26) /* Smart Card 0 interrupt */ -#define IRQ_SCI1_vect_num 27 -#define IRQ_SCI1_vect _VECTOR(27) /* Smart Card 1 interrupt */ -#define IRQ_SCI2_vect_num 28 -#define IRQ_SCI2_vect _VECTOR(28) /* Smart Card 2 interrupt */ -#define IRQ_CL_vect_num 29 -#define IRQ_CL_vect _VECTOR(29) /* AWAH custom IP interrupt */ -#define SPI_STC_vect_num 30 -#define SPI_STC_vect _VECTOR(30) /* SPI Serial Transfer Complete */ -#define USART0_RX_vect_num 31 -#define USART0_RX_vect _VECTOR(31) /* USART0, Rx Complete */ -#define USART0_UDRE_vect_num 32 -#define USART0_UDRE_vect _VECTOR(32) /* USART0 Data register Empty */ -#define USART0_TX_vect_num 33 -#define USART0_TX_vect _VECTOR(33) /* USART0, Tx Complete */ -#define TWI_vect_num 34 -#define TWI_vect _VECTOR(34) /* 2 wire interface */ -#define SPM_READY_vect_num 35 -#define SPM_READY_vect _VECTOR(35) /* Store Program Memory Read */ -#define LCD_vect_num 36 -#define LCD_vect _VECTOR(36) /* LCD Start of Frame */ -#define BOD_SMHIGH_vect_num 37 -#define BOD_SMHIGH_vect _VECTOR(37) /* SM High level - SWVBAT between 2V to 2.2V */ - -#define _VECTOR_SIZE 4 /* Size of individual vector. */ -#define _VECTORS_SIZE (38 * _VECTOR_SIZE) - - -/* Constants */ -#define SPM_PAGESIZE (256) -#define RAMSTART (0x200) -#define RAMSIZE (8192) -#define RAMEND (RAMSTART + RAMSIZE - 1) -#define XRAMSTART (NA) -#define XRAMSIZE (0) -#define XRAMEND (RAMEND) -#define E2END (0x0) -#define E2PAGESIZE (0) -#define FLASHEND (0xFFFF) - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 1 - -/* Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) /* Select Reset Vector */ -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) /* Select Boot Size */ -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) /* Select Boot Size */ -#define FUSE_SMHIGH (unsigned char)~_BV(3) /* SM SWVBAT not activated by default */ -#define FUSE_WDTON (unsigned char)~_BV(4) /* Watchdog timer always on */ -#define FUSE_CKSEL0 (unsigned char)~_BV(5) /* Select Clock Source */ -#define FUSE_SUT (unsigned char)~_BV(6) /* Select start-up time */ -#define FUSE_OCDEN (unsigned char)~_BV(7) /* Enable OCD */ -#define FUSE_DEFAULT (FUSE_BOOTSZ1 & FUSE_BOOTSZ0) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x0 -#define SIGNATURE_1 0x0 -#define SIGNATURE_2 0x0 - - -#endif /* _AVR_58U54A_Albatross_H_ */ - diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io76c711.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io76c711.h deleted file mode 100644 index c6a9f83a3..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io76c711.h +++ /dev/null @@ -1,493 +0,0 @@ -/* Copyright (c) 2002, Marek Michalkiewicz - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: io76c711.h,v 1.5 2004/11/01 21:19:54 arcanum Exp $ */ - -/* avr/io76c711.h - definitions for AT76C711 */ - -#ifndef _AVR_IO76C711_H_ -#define _AVR_IO76C711_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "io76c711.h" -#else -# error "Attempt to include more than one file." -#endif - -/* I/O registers */ - -/* 0x00-0x0C reserved */ - -/* SPI */ -#define SPCR _SFR_IO8(0x0D) -#define SPSR _SFR_IO8(0x0E) -#define SPDR _SFR_IO8(0x0F) - -/* Port D */ -#define PIND _SFR_IO8(0x10) -#define DDRD _SFR_IO8(0x11) -#define PORTD _SFR_IO8(0x12) - -/* Peripheral Enable Register */ -#define PERIPHEN _SFR_IO8(0x13) - -/* Clock Control Register */ -#define CLK_CNTR _SFR_IO8(0x14) - -/* Data Register, Port C */ -#define PORTC _SFR_IO8(0x15) - -/* Port B */ -#define PINB _SFR_IO8(0x16) -#define DDRB _SFR_IO8(0x17) -#define PORTB _SFR_IO8(0x18) - -/* Port A */ -#define PINA _SFR_IO8(0x19) -#define DDRA _SFR_IO8(0x1A) -#define PORTA _SFR_IO8(0x1B) - -/* 0x1C-0x1F reserved */ - -#define IRDAMOD _SFR_IO8(0x20) - -#define WDTCR _SFR_IO8(0x21) - -/* 0x22-0x25 reserved */ -/* Timer 1 */ -#define ICR1 _SFR_IO16(0x26) -#define ICR1L _SFR_IO8(0x26) -#define ICR1H _SFR_IO8(0x27) -#define OCR1B _SFR_IO16(0x28) -#define OCR1BL _SFR_IO8(0x28) -#define OCR1BH _SFR_IO8(0x29) -#define OCR1A _SFR_IO16(0x2A) -#define OCR1AL _SFR_IO8(0x2A) -#define OCR1AH _SFR_IO8(0x2B) -#define TCNT1 _SFR_IO16(0x2C) -#define TCNT1L _SFR_IO8(0x2C) -#define TCNT1H _SFR_IO8(0x2D) -#define TCCR1B _SFR_IO8(0x2E) -#define TCCR1A _SFR_IO8(0x2F) - -/* 0x30 reserved */ - -/* Timer 0 */ -#define PRELD _SFR_IO8(0x31) -#define TCNT0 _SFR_IO8(0x32) -#define TCCR0 _SFR_IO8(0x33) - -#define MCUSR _SFR_IO8(0x34) -#define MCUCR _SFR_IO8(0x35) - -#define TIFR _SFR_IO8(0x36) -#define TIMSK _SFR_IO8(0x37) - -/* 0x38 reserved */ - -#define EIMSK _SFR_IO8(0x39) - -/* 0x3A-0x3C reserved */ - -/* 0x3D..0x3E SP */ - -/* 0x3F SREG */ - -/* Interrupt vectors */ - -#define SIG_SUSPEND_RESUME _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(2) -#define SIG_INPUT_CAPTURE1 _VECTOR(3) -#define SIG_OUTPUT_COMPARE1A _VECTOR(4) -#define SIG_OUTPUT_COMPARE1B _VECTOR(5) -#define SIG_OVERFLOW1 _VECTOR(6) -#define SIG_OVERFLOW0 _VECTOR(7) -#define SIG_SPI _VECTOR(8) -#define SIG_TDMAC _VECTOR(9) -#define SIG_UART0 _VECTOR(10) -#define SIG_RDMAC _VECTOR(11) -#define SIG_USB_HW _VECTOR(12) -#define SIG_UART1 _VECTOR(13) -#define SIG_INTERRUPT1 _VECTOR(14) - -#define _VECTORS_SIZE 60 - -/* Bit numbers */ - -/* EIMSK */ -/* bits 7-4 reserved */ -#define POL1 3 -#define POL0 2 -#define INT1 1 -#define INT0 0 - -/* TIMSK */ -#define TOIE1 7 -#define OCIE1A 6 -#define OCIE1B 5 -/* bit 4 reserved */ -#define TICIE1 3 -/* bit 2 reserved */ -#define TOIE0 1 -/* bit 0 reserved */ - -/* TIFR */ -#define TOV1 7 -#define OCF1A 6 -#define OCF1B 5 -/* bit 4 reserved */ -#define ICF1 3 -/* bit 2 reserved */ -#define TOV0 1 -/* bit 0 reserved */ - -/* MCUCR */ -/* bits 7-6 reserved */ -#define SE 5 -#define SM1 4 -#define SM0 3 -/* bits 2-0 reserved */ - -/* MCUSR */ -/* bits 7-2 reserved */ -#define EXTRF 1 -#define PORF 0 - -/* TCCR0 */ -/* bits 7-6 reserved */ -#define COM01 5 -#define COM00 4 -#define CTC0 3 -#define CS02 2 -#define CS01 1 -#define CS00 0 - -/* TCCR1A */ -#define COM1A1 7 -#define COM1A0 6 -#define COM1B1 5 -#define COM1B0 4 -/* bits 3-0 reserved */ - -/* TCCR1B */ -#define ICNC1 7 -#define ICES1 6 -/* bits 5-4 reserved */ -#define CTC1 3 -#define CS12 2 -#define CS11 1 -#define CS10 0 - -/* WDTCR */ -/* bits 7-5 reserved */ -#define WDTOE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -/* IRDAMOD */ -/* bits 7-3 reserved */ -#define POL 2 -#define MODE 1 -#define EN 0 - -/* PORTA */ -#define PA7 7 -#define PA6 6 -#define PA5 5 -#define PA4 4 -#define PA3 3 -#define PA2 2 -#define PA1 1 -#define PA0 0 - -/* DDRA */ -#define DDA7 7 -#define DDA6 6 -#define DDA5 5 -#define DDA4 4 -#define DDA3 3 -#define DDA2 2 -#define DDA1 1 -#define DDA0 0 - -/* PINA */ -#define PINA7 7 -#define PINA6 6 -#define PINA5 5 -#define PINA4 4 -#define PINA3 3 -#define PINA2 2 -#define PINA1 1 -#define PINA0 0 - -/* - PB7 = SCK - PB6 = MISO - PB5 = MOSI - PB4 = SS# - PB2 = ICP - PB1 = T1 - PB0 = T0 - */ - -/* PORTB */ -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -/* DDRB */ -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -/* PINB */ -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -/* PORTC */ -/* bits 7-4 reserved */ -#define PC3 3 -#define PC2 2 -#define PC1 1 -#define PC0 0 - -/* - PD7 = INT1 / OC1B - PD6 = INT0 / OC1A - PD1 = TXD - PD0 = RXD - */ - -/* PORTD */ -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -/* DDRD */ -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -/* PIND */ -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -/* CLK_CNTR */ -/* bits 7-5 reserved */ -#define UOSC 4 -#define UCK 3 -#define IRCK 2 -/* bits 1-0 reserved */ - -/* PERIPHEN */ -/* bits 7-3 reserved */ -#define IRDA 2 -#define UART 1 -#define USB 0 - -/* SPSR */ -#define SPIF 7 -#define WCOL 6 -/* bits 5-0 reserved */ - -/* SPCR */ -#define SPIE 7 -#define SPE 6 -#define DORD 5 -#define MSTR 4 -#define CPOL 3 -#define CPHA 2 -#define SPR1 1 -#define SPR0 0 - -/* Memory mapped registers (XXX - not yet changed to use _SFR_MEM8() macros) */ - -/* UART */ -#define UART0_BASE 0x2020 -#define UART1_BASE 0x2030 -/* offsets from the base address */ -#define US_RHR 0x00 -#define US_THR 0x00 -#define US_IER 0x01 -#define US_FCR 0x02 -#define US_PMR 0x03 -#define US_MR 0x04 -#define US_CSR 0x05 -#define US_CR 0x06 -#define US_BL 0x07 -#define US_BM 0x08 -#define US_RTO 0x09 -#define US_TTG 0x0A - -/* DMA */ -#define DMA_BASE 0x2000 -/* offsets from the base address */ -#define TXTADL 0x01 -#define TXPLL 0x03 -#define TXPLM 0x04 -#define TXTPLL 0x05 -#define TXTPLM 0x06 -#define RXTADL 0x07 -#define RXTADMEN 0x08 -#define RSPLL 0x09 -#define RXPLM 0x0A -#define RXTPLL 0x0B -#define RXTPLM 0x0C -#define INTCST 0x0D -/* XXX DPORG register mentioned on page 20, but undocumented */ - -/* XXX Program Memory Control Bit mentioned on page 20, but undocumented */ -#define PROGRAM_MEMORY_CONTROL_BIT 0x2040 - -/* USB */ -#define USB_BASE 0x1000 -/* offsets from the base address */ -#define FRM_NUM_H 0x0FD -#define FRM_NUM_L 0x0FC -#define GLB_STATE 0x0FB -#define SPRSR 0x0FA -#define SPRSIE 0x0F9 -#define UISR 0x0F7 -#define UIAR 0x0F5 -#define FADDR 0x0F2 -#define ENDPPGPG 0x0F1 -#define ECR0 0x0EF -#define ECR1 0x0EE -#define ECR2 0x0ED -#define ECR3 0x0EC -#define ECR4 0x0EB -#define ECR5 0x0EA -#define ECR6 0x0E9 -#define ECR7 0x0E8 -#define CSR0 0x0DF -#define CSR1 0x0DE -#define CSR2 0x0DD -#define CSR3 0x0DC -#define CSR4 0x0DB -#define CSR5 0x0DA -#define CSR6 0x0D9 -#define CSR7 0x0D8 -#define FDR0 0x0CF -#define FDR1 0x0CE -#define FDR2 0x0CD -#define FDR3 0x0CC -#define FDR4 0x0CB -#define FDR5 0x0CA -#define FDR6 0x0C9 -#define FDR7 0x0C8 -#define FBYTE_CNT0_L 0x0BF -#define FBYTE_CNT1_L 0x0BE -#define FBYTE_CNT2_L 0x0BD -#define FBYTE_CNT3_L 0x0BC -#define FBYTE_CNT4_L 0x0BB -#define FBYTE_CNT5_L 0x0BA -#define FBYTE_CNT6_L 0x0B9 -#define FBYTE_CNT7_L 0x0B8 -#define FBYTE_CNT0_H 0x0AF -#define FBYTE_CNT1_H 0x0AE -#define FBYTE_CNT2_H 0x0AD -#define FBYTE_CNT3_H 0x0AC -#define FBYTE_CNT4_H 0x0AB -#define FBYTE_CNT5_H 0x0AA -#define FBYTE_CNT6_H 0x0A9 -#define FBYTE_CNT7_H 0x0A8 -#define SLP_MD_EN 0x100 -#define IRQ_EN 0x101 -#define IRQ_STAT 0x102 -#define SUSP_WUP 0x103 -#define PA_EN 0x104 -#define USB_DMA_ADL 0x105 -#define USB_DMA_ADH 0x106 -#define USB_DMA_PLR 0x107 -#define USB_DMA_EAD 0x108 -#define USB_DMA_PLT 0x109 -#define USB_DMA_EN 0x10A - -/* Last memory addresses */ -#define RAMEND 0x07FF -#define XRAMEND 0x07FF -#define E2END 0 -#define FLASHEND 0x3FFF - -/* - AT76C711 data space memory map (ranges not listed are reserved): - 0x0000 - 0x001F - AVR registers - 0x0020 - 0x005F - AVR I/O space - 0x0060 - 0x07FF - AVR data SRAM - 0x1000 - 0x1FFF - USB (not all locations used) - 0x2000 - 0x201F - DMA controller - 0x2020 - 0x202F - UART0 - 0x2030 - 0x203F - UART1 (IRDA) - 0x2040 - the mysterious Program Memory Control bit (???) - 0x3000 - 0x37FF - DPRAM - 0x8000 - 0xBFFF - program SRAM (read/write), would be nice if other - AVR devices did that as well (no need to use LPM!) - */ -#endif /* _AVR_IO76C711_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io8515.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io8515.h deleted file mode 100644 index 95e6f9d47..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io8515.h +++ /dev/null @@ -1,486 +0,0 @@ -/* Copyright (c) 2002, Marek Michalkiewicz - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: io8515.h,v 1.8.4.2 2008/08/14 00:07:59 arcanum Exp $ */ - -/* avr/io8515.h - definitions for AT90S8515 */ - -#ifndef _AVR_IO8515_H_ -#define _AVR_IO8515_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "io8515.h" -#else -# error "Attempt to include more than one file." -#endif - -/* I/O registers */ - -/* Analog Comparator Control and Status Register */ -#define ACSR _SFR_IO8(0x08) - -/* UART Baud Rate Register */ -#define UBRR _SFR_IO8(0x09) - -/* UART Control Register */ -#define UCR _SFR_IO8(0x0A) - -/* UART Status Register */ -#define USR _SFR_IO8(0x0B) - -/* UART I/O Data Register */ -#define UDR _SFR_IO8(0x0C) - -/* SPI Control Register */ -#define SPCR _SFR_IO8(0x0D) - -/* SPI Status Register */ -#define SPSR _SFR_IO8(0x0E) - -/* SPI I/O Data Register */ -#define SPDR _SFR_IO8(0x0F) - -/* Input Pins, Port D */ -#define PIND _SFR_IO8(0x10) - -/* Data Direction Register, Port D */ -#define DDRD _SFR_IO8(0x11) - -/* Data Register, Port D */ -#define PORTD _SFR_IO8(0x12) - -/* Input Pins, Port C */ -#define PINC _SFR_IO8(0x13) - -/* Data Direction Register, Port C */ -#define DDRC _SFR_IO8(0x14) - -/* Data Register, Port C */ -#define PORTC _SFR_IO8(0x15) - -/* Input Pins, Port B */ -#define PINB _SFR_IO8(0x16) - -/* Data Direction Register, Port B */ -#define DDRB _SFR_IO8(0x17) - -/* Data Register, Port B */ -#define PORTB _SFR_IO8(0x18) - -/* Input Pins, Port A */ -#define PINA _SFR_IO8(0x19) - -/* Data Direction Register, Port A */ -#define DDRA _SFR_IO8(0x1A) - -/* Data Register, Port A */ -#define PORTA _SFR_IO8(0x1B) - -/* EEPROM Control Register */ -#define EECR _SFR_IO8(0x1C) - -/* EEPROM Data Register */ -#define EEDR _SFR_IO8(0x1D) - -/* EEPROM Address Register */ -#define EEAR _SFR_IO16(0x1E) -#define EEARL _SFR_IO8(0x1E) -#define EEARH _SFR_IO8(0x1F) - -/* Watchdog Timer Control Register */ -#define WDTCR _SFR_IO8(0x21) - -/* T/C 1 Input Capture Register */ -#define ICR1 _SFR_IO16(0x24) -#define ICR1L _SFR_IO8(0x24) -#define ICR1H _SFR_IO8(0x25) - -/* Timer/Counter1 Output Compare Register B */ -#define OCR1B _SFR_IO16(0x28) -#define OCR1BL _SFR_IO8(0x28) -#define OCR1BH _SFR_IO8(0x29) - -/* Timer/Counter1 Output Compare Register A */ -#define OCR1A _SFR_IO16(0x2A) -#define OCR1AL _SFR_IO8(0x2A) -#define OCR1AH _SFR_IO8(0x2B) - -/* Timer/Counter 1 */ -#define TCNT1 _SFR_IO16(0x2C) -#define TCNT1L _SFR_IO8(0x2C) -#define TCNT1H _SFR_IO8(0x2D) - -/* Timer/Counter 1 Control and Status Register */ -#define TCCR1B _SFR_IO8(0x2E) - -/* Timer/Counter 1 Control Register */ -#define TCCR1A _SFR_IO8(0x2F) - -/* Timer/Counter 0 */ -#define TCNT0 _SFR_IO8(0x32) - -/* Timer/Counter 0 Control Register */ -#define TCCR0 _SFR_IO8(0x33) - -/* MCU general Control Register */ -#define MCUCR _SFR_IO8(0x35) - -/* Timer/Counter Interrupt Flag register */ -#define TIFR _SFR_IO8(0x38) - -/* Timer/Counter Interrupt MaSK register */ -#define TIMSK _SFR_IO8(0x39) - -/* General Interrupt Flag Register */ -#define GIFR _SFR_IO8(0x3A) - -/* General Interrupt MaSK register */ -#define GIMSK _SFR_IO8(0x3B) - -/* 0x3D..0x3E SP */ - -/* 0x3F SREG */ - -/* Interrupt vectors */ - -/* External Interrupt Request 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* External Interrupt Request 1 */ -#define INT1_vect _VECTOR(2) -#define SIG_INTERRUPT1 _VECTOR(2) - -/* Timer/Counter Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(3) -#define SIG_INPUT_CAPTURE1 _VECTOR(3) - -/* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPA_vect _VECTOR(4) -#define SIG_OUTPUT_COMPARE1A _VECTOR(4) - -/* Timer/Counter1 Compare MatchB */ -#define TIMER1_COMPB_vect _VECTOR(5) -#define SIG_OUTPUT_COMPARE1B _VECTOR(5) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(6) -#define SIG_OVERFLOW1 _VECTOR(6) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(7) -#define SIG_OVERFLOW0 _VECTOR(7) - -/* Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(8) -#define SIG_SPI _VECTOR(8) - -/* UART, Rx Complete */ -#define UART_RX_vect _VECTOR(9) -#define SIG_UART_RECV _VECTOR(9) - -/* UART Data Register Empty */ -#define UART_UDRE_vect _VECTOR(10) -#define SIG_UART_DATA _VECTOR(10) - -/* UART, Tx Complete */ -#define UART_TX_vect _VECTOR(11) -#define SIG_UART_TRANS _VECTOR(11) - -/* Analog Comparator */ -#define ANA_COMP_vect _VECTOR(12) -#define SIG_COMPARATOR _VECTOR(12) - -#define _VECTORS_SIZE 26 - -/* - The Register Bit names are represented by their bit number (0-7). -*/ - -/* General Interrupt MaSK register */ -#define INT1 7 -#define INT0 6 - -/* General Interrupt Flag Register */ -#define INTF1 7 -#define INTF0 6 - -/* Timer/Counter Interrupt MaSK register */ -#define TOIE1 7 -#define OCIE1A 6 -#define OCIE1B 5 -#define TICIE1 3 -#define TOIE0 1 - -/* Timer/Counter Interrupt Flag register */ -#define TOV1 7 -#define OCF1A 6 -#define OCF1B 5 -#define ICF1 3 -#define TOV0 1 - -/* MCU general Control Register */ -#define SRE 7 -#define SRW 6 -#define SE 5 -#define SM 4 -#define ISC11 3 -#define ISC10 2 -#define ISC01 1 -#define ISC00 0 - -/* Timer/Counter 0 Control Register */ -#define CS02 2 -#define CS01 1 -#define CS00 0 - -/* Timer/Counter 1 Control Register */ -#define COM1A1 7 -#define COM1A0 6 -#define COM1B1 5 -#define COM1B0 4 -#define PWM11 1 -#define PWM10 0 - -/* Timer/Counter 1 Control and Status Register */ -#define ICNC1 7 -#define ICES1 6 -#define CTC1 3 -#define CS12 2 -#define CS11 1 -#define CS10 0 - -/* Watchdog Timer Control Register */ -#define WDTOE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -/* Data Register, Port A */ -#define PA7 7 -#define PA6 6 -#define PA5 5 -#define PA4 4 -#define PA3 3 -#define PA2 2 -#define PA1 1 -#define PA0 0 - -/* Data Direction Register, Port A */ -#define DDA7 7 -#define DDA6 6 -#define DDA5 5 -#define DDA4 4 -#define DDA3 3 -#define DDA2 2 -#define DDA1 1 -#define DDA0 0 - -/* Input Pins, Port A */ -#define PINA7 7 -#define PINA6 6 -#define PINA5 5 -#define PINA4 4 -#define PINA3 3 -#define PINA2 2 -#define PINA1 1 -#define PINA0 0 - -/* Data Register, Port B */ -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -/* Data Direction Register, Port B */ -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -/* Input Pins, Port B */ -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -/* Data Register, Port C */ -#define PC7 7 -#define PC6 6 -#define PC5 5 -#define PC4 4 -#define PC3 3 -#define PC2 2 -#define PC1 1 -#define PC0 0 - -/* Data Direction Register, Port C */ -#define DDC7 7 -#define DDC6 6 -#define DDC5 5 -#define DDC4 4 -#define DDC3 3 -#define DDC2 2 -#define DDC1 1 -#define DDC0 0 - -/* Input Pins, Port C */ -#define PINC7 7 -#define PINC6 6 -#define PINC5 5 -#define PINC4 4 -#define PINC3 3 -#define PINC2 2 -#define PINC1 1 -#define PINC0 0 - -/* Data Register, Port D */ -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -/* Data Direction Register, Port D */ -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -/* Input Pins, Port D */ -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -/* SPI Status Register */ -#define SPIF 7 -#define WCOL 6 - -/* SPI Control Register */ -#define SPIE 7 -#define SPE 6 -#define DORD 5 -#define MSTR 4 -#define CPOL 3 -#define CPHA 2 -#define SPR1 1 -#define SPR0 0 - -/* UART Status Register */ -#define RXC 7 -#define TXC 6 -#define UDRE 5 -#define FE 4 -#define DOR 3 - -/* UART Control Register */ -#define RXCIE 7 -#define TXCIE 6 -#define UDRIE 5 -#define RXEN 4 -#define TXEN 3 -#define CHR9 2 -#define RXB8 1 -#define TXB8 0 - -/* Analog Comparator Control and Status Register */ -#define ACD 7 -#define ACO 5 -#define ACI 4 -#define ACIE 3 -#define ACIC 2 -#define ACIS1 1 -#define ACIS0 0 - -/* EEPROM Control Register */ -#define EERIE 3 -#define EEMWE 2 -#define EEWE 1 -#define EERE 0 - -/* Constants */ -#define RAMEND 0x25F /* Last On-Chip SRAM Location */ -#define XRAMEND 0xFFFF -#define E2END 0x1FF -#define E2PAGESIZE 0 -#define FLASHEND 0x1FFF - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 1 - -/* Low Fuse Byte */ -#define FUSE_SPIEN ~_BV(1) /* Serial Program Downloading Enabled */ -#define FUSE_FSTRT ~_BV(2) /* Short Start-up time selected */ -#define LFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x93 -#define SIGNATURE_2 0x01 - - -#endif /* _AVR_IO8515_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io8534.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io8534.h deleted file mode 100644 index 55b85c2c7..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io8534.h +++ /dev/null @@ -1,216 +0,0 @@ -/* Copyright (c) 2002, Marek Michalkiewicz - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: io8534.h,v 1.7 2005/07/09 14:01:11 aesok Exp $ */ - -/* avr/io8534.h - definitions for AT90C8534 */ - -#ifndef _AVR_IO8534_ -#define _AVR_IO8534_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "io8534.h" -#else -# error "Attempt to include more than one file." -#endif - -/* I/O registers */ - -/* 0x00..0x03 reserved */ - -/* ADC Data Register */ -#ifndef __ASSEMBLER__ -#define ADC _SFR_IO16(0x04) -#endif -#define ADCW _SFR_IO16(0x04) -#define ADCL _SFR_IO8(0x04) -#define ADCH _SFR_IO8(0x05) - -/* ADC Control and Status Register */ -#define ADCSR _SFR_IO8(0x06) - -/* ADC Multiplexer Select Register */ -#define ADMUX _SFR_IO8(0x07) - -/* 0x08..0x0F reserved */ - -/* General Interrupt Pin Register */ -#define GIPR _SFR_IO8(0x10) - -/* 0x11..0x19 reserved */ - -/* Data Direction Register, Port A */ -#define DDRA _SFR_IO8(0x1A) - -/* Data Register, Port A */ -#define PORTA _SFR_IO8(0x1B) - -/* EEPROM Control Register */ -#define EECR _SFR_IO8(0x1C) - -/* EEPROM Data Register */ -#define EEDR _SFR_IO8(0x1D) - -/* EEPROM Address Register */ -#define EEAR _SFR_IO16(0x1E) -#define EEARL _SFR_IO8(0x1E) -#define EEARH _SFR_IO8(0x1F) - -/* 0x20..0x2B reserved */ - -/* Timer/Counter1 */ -#define TCNT1 _SFR_IO16(0x2C) -#define TCNT1L _SFR_IO8(0x2C) -#define TCNT1H _SFR_IO8(0x2D) - -/* Timer/Counter1 Control Register */ -#define TCCR1 _SFR_IO8(0x2E) - -/* 0x2F..0x31 reserved */ - -/* Timer/Counter0 (8-bit) */ -#define TCNT0 _SFR_IO8(0x32) - -/* Timer/Counter0 Control Register */ -#define TCCR0 _SFR_IO8(0x33) - -/* 0x34 reserved */ - -/* MCU general Control Register */ -#define MCUCR _SFR_IO8(0x35) - -/* 0x36..0x37 reserved */ - -/* Timer/Counter Interrupt Flag Register */ -#define TIFR _SFR_IO8(0x38) - -/* Timer/Counter Interrupt MaSK Register */ -#define TIMSK _SFR_IO8(0x39) - -/* General Interrupt Flag Register */ -#define GIFR _SFR_IO8(0x3A) - -/* General Interrupt MaSK register */ -#define GIMSK _SFR_IO8(0x3B) - -/* 0x3C reserved */ - -/* 0x3D..0x3E SP */ - -/* 0x3F SREG */ - -/* Interrupt vectors */ - -#define SIG_INTERRUPT0 _VECTOR(1) -#define SIG_INTERRUPT1 _VECTOR(2) -#define SIG_OVERFLOW1 _VECTOR(3) -#define SIG_OVERFLOW0 _VECTOR(4) -#define SIG_ADC _VECTOR(5) -#define SIG_EEPROM_READY _VECTOR(6) - -#define _VECTORS_SIZE 14 - -/* Bit numbers */ - -/* GIMSK */ -#define INT1 7 -#define INT0 6 - -/* GIFR */ -#define INTF1 7 -#define INTF0 6 - -/* GIPR */ -#define IPIN1 3 -#define IPIN0 2 - -/* TIMSK */ -#define TOIE1 2 -#define TOIE0 0 - -/* TIFR */ -#define TOV1 2 -#define TOV0 0 - -/* MCUCR */ -#define SE 6 -#define SM 5 -#define ISC1 2 -#define ISC0 0 - -/* TCCR0 */ -#define CS02 2 -#define CS01 1 -#define CS00 0 - -/* TCCR1 */ -#define CS12 2 -#define CS11 1 -#define CS10 0 - -/* PORTA */ -#define PA7 7 -#define PA6 6 -#define PA5 5 -#define PA4 4 -#define PA3 3 -#define PA2 2 -#define PA1 1 -#define PA0 0 - -/* DDRA */ -#define DDA7 7 -#define DDA6 6 -#define DDA5 5 -#define DDA4 4 -#define DDA3 3 -#define DDA2 2 -#define DDA1 1 -#define DDA0 0 - -/* EEPROM Control Register */ -#define EERIE 3 -#define EEMWE 2 -#define EEWE 1 -#define EERE 0 - -/* Last memory addresses */ -#define RAMEND 0x15F -#define XRAMEND 0x15F -#define E2END 0x1FF -#define FLASHEND 0x1FFF - -#endif /* _AVR_IO8534_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io8535.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io8535.h deleted file mode 100644 index 8ac4657de..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io8535.h +++ /dev/null @@ -1,568 +0,0 @@ -/* Copyright (c) 2002, Marek Michalkiewicz - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: io8535.h,v 1.9.4.3 2008/08/14 00:07:59 arcanum Exp $ */ - -/* avr/io8535.h - definitions for AT90S8535 */ - -#ifndef _AVR_IO8535_H_ -#define _AVR_IO8535_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "io8535.h" -#else -# error "Attempt to include more than one file." -#endif - -/* I/O registers */ - -/* ADC Data register */ -#ifndef __ASSEMBLER__ -#define ADC _SFR_IO16(0x04) -#endif -#define ADCW _SFR_IO16(0x04) -#define ADCL _SFR_IO8(0x04) -#define ADCH _SFR_IO8(0x05) - -/* ADC Control and Status Register */ -#define ADCSR _SFR_IO8(0x06) - -/* ADC MUX */ -#define ADMUX _SFR_IO8(0x07) - -/* Analog Comparator Control and Status Register */ -#define ACSR _SFR_IO8(0x08) - -/* UART Baud Rate Register */ -#define UBRR _SFR_IO8(0x09) - -/* UART Control Register */ -#define UCR _SFR_IO8(0x0A) - -/* UART Status Register */ -#define USR _SFR_IO8(0x0B) - -/* UART I/O Data Register */ -#define UDR _SFR_IO8(0x0C) - -/* SPI Control Register */ -#define SPCR _SFR_IO8(0x0D) - -/* SPI Status Register */ -#define SPSR _SFR_IO8(0x0E) - -/* SPI I/O Data Register */ -#define SPDR _SFR_IO8(0x0F) - -/* Input Pins, Port D */ -#define PIND _SFR_IO8(0x10) - -/* Data Direction Register, Port D */ -#define DDRD _SFR_IO8(0x11) - -/* Data Register, Port D */ -#define PORTD _SFR_IO8(0x12) - -/* Input Pins, Port C */ -#define PINC _SFR_IO8(0x13) - -/* Data Direction Register, Port C */ -#define DDRC _SFR_IO8(0x14) - -/* Data Register, Port C */ -#define PORTC _SFR_IO8(0x15) - -/* Input Pins, Port B */ -#define PINB _SFR_IO8(0x16) - -/* Data Direction Register, Port B */ -#define DDRB _SFR_IO8(0x17) - -/* Data Register, Port B */ -#define PORTB _SFR_IO8(0x18) - -/* Input Pins, Port A */ -#define PINA _SFR_IO8(0x19) - -/* Data Direction Register, Port A */ -#define DDRA _SFR_IO8(0x1A) - -/* Data Register, Port A */ -#define PORTA _SFR_IO8(0x1B) - -/* EEPROM Control Register */ -#define EECR _SFR_IO8(0x1C) - -/* EEPROM Data Register */ -#define EEDR _SFR_IO8(0x1D) - -/* EEPROM Address Register */ -#define EEAR _SFR_IO16(0x1E) -#define EEARL _SFR_IO8(0x1E) -#define EEARH _SFR_IO8(0x1F) - -/* Watchdog Timer Control Register */ -#define WDTCR _SFR_IO8(0x21) - -/* Asynchronous mode Status Register */ -#define ASSR _SFR_IO8(0x22) - -/* Timer/Counter2 Output Compare Register */ -#define OCR2 _SFR_IO8(0x23) - -/* Timer/Counter 2 */ -#define TCNT2 _SFR_IO8(0x24) - -/* Timer/Counter 2 Control Register */ -#define TCCR2 _SFR_IO8(0x25) - -/* T/C 1 Input Capture Register */ -#define ICR1 _SFR_IO16(0x26) -#define ICR1L _SFR_IO8(0x26) -#define ICR1H _SFR_IO8(0x27) - -/* Timer/Counter1 Output Compare Register B */ -#define OCR1B _SFR_IO16(0x28) -#define OCR1BL _SFR_IO8(0x28) -#define OCR1BH _SFR_IO8(0x29) - -/* Timer/Counter1 Output Compare Register A */ -#define OCR1A _SFR_IO16(0x2A) -#define OCR1AL _SFR_IO8(0x2A) -#define OCR1AH _SFR_IO8(0x2B) - -/* Timer/Counter 1 */ -#define TCNT1 _SFR_IO16(0x2C) -#define TCNT1L _SFR_IO8(0x2C) -#define TCNT1H _SFR_IO8(0x2D) - -/* Timer/Counter 1 Control and Status Register */ -#define TCCR1B _SFR_IO8(0x2E) - -/* Timer/Counter 1 Control Register */ -#define TCCR1A _SFR_IO8(0x2F) - -/* Timer/Counter 0 */ -#define TCNT0 _SFR_IO8(0x32) - -/* Timer/Counter 0 Control Register */ -#define TCCR0 _SFR_IO8(0x33) - -/* MCU general Status Register */ -#define MCUSR _SFR_IO8(0x34) - -/* MCU general Control Register */ -#define MCUCR _SFR_IO8(0x35) - -/* Timer/Counter Interrupt Flag register */ -#define TIFR _SFR_IO8(0x38) - -/* Timer/Counter Interrupt MaSK register */ -#define TIMSK _SFR_IO8(0x39) - -/* General Interrupt Flag Register */ -#define GIFR _SFR_IO8(0x3A) - -/* General Interrupt MaSK register */ -#define GIMSK _SFR_IO8(0x3B) - -/* 0x3D..0x3E SP */ - -/* 0x3F SREG */ - -/* Interrupt vectors */ - -/* External Interrupt 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* External Interrupt 1 */ -#define INT1_vect _VECTOR(2) -#define SIG_INTERRUPT1 _VECTOR(2) - -/* Timer/Counter2 Compare Match */ -#define TIMER2_COMP_vect _VECTOR(3) -#define SIG_OUTPUT_COMPARE2 _VECTOR(3) - -/* Timer/Counter2 Overflow */ -#define TIMER2_OVF_vect _VECTOR(4) -#define SIG_OVERFLOW2 _VECTOR(4) - -/* Timer/Counter1 Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(5) -#define SIG_INPUT_CAPTURE1 _VECTOR(5) - -/* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPA_vect _VECTOR(6) -#define SIG_OUTPUT_COMPARE1A _VECTOR(6) - -/* Timer/Counter1 Compare Match B */ -#define TIMER1_COMPB_vect _VECTOR(7) -#define SIG_OUTPUT_COMPARE1B _VECTOR(7) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(8) -#define SIG_OVERFLOW1 _VECTOR(8) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(9) -#define SIG_OVERFLOW0 _VECTOR(9) - -/* SPI Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(10) -#define SIG_SPI _VECTOR(10) - -/* UART, RX Complete */ -#define UART_RX_vect _VECTOR(11) -#define SIG_UART_RECV _VECTOR(11) - -/* UART Data Register Empty */ -#define UART_UDRE_vect _VECTOR(12) -#define SIG_UART_DATA _VECTOR(12) - -/* UART, TX Complete */ -#define UART_TX_vect _VECTOR(13) -#define SIG_UART_TRANS _VECTOR(13) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(14) -#define SIG_ADC _VECTOR(14) - -/* EEPROM Ready */ -#define EE_RDY_vect _VECTOR(15) -#define SIG_EEPROM_READY _VECTOR(15) - -/* Analog Comparator */ -#define ANA_COMP_vect _VECTOR(16) -#define SIG_COMPARATOR _VECTOR(16) - -#define _VECTORS_SIZE 34 - -/* - The Register Bit names are represented by their bit number (0-7). -*/ - -/* MCU general Status Register */ -#define EXTRF 1 -#define PORF 0 - -/* General Interrupt MaSK register */ -#define INT1 7 -#define INT0 6 - -/* General Interrupt Flag Register */ -#define INTF1 7 -#define INTF0 6 - -/* Timer/Counter Interrupt MaSK register */ -#define OCIE2 7 -#define TOIE2 6 -#define TICIE1 5 -#define OCIE1A 4 -#define OCIE1B 3 -#define TOIE1 2 -#define TOIE0 0 - -/* Timer/Counter Interrupt Flag register */ -#define OCF2 7 -#define TOV2 6 -#define ICF1 5 -#define OCF1A 4 -#define OCF1B 3 -#define TOV1 2 -#define TOV0 0 - -/* MCU general Control Register */ -#define SE 6 -#define SM1 5 -#define SM0 4 -#define ISC11 3 -#define ISC10 2 -#define ISC01 1 -#define ISC00 0 - -/* Timer/Counter 0 Control Register */ -#define CS02 2 -#define CS01 1 -#define CS00 0 - -/* Timer/Counter 1 Control Register */ -#define COM1A1 7 -#define COM1A0 6 -#define COM1B1 5 -#define COM1B0 4 -#define PWM11 1 -#define PWM10 0 - -/* Timer/Counter 1 Control and Status Register */ -#define ICNC1 7 -#define ICES1 6 -#define CTC1 3 -#define CS12 2 -#define CS11 1 -#define CS10 0 - -/* Timer/Counter 2 Control Register */ -#define PWM2 6 -#define COM21 5 -#define COM20 4 -#define CTC2 3 -#define CS22 2 -#define CS21 1 -#define CS20 0 - -/* Asynchronous mode Status Register */ -#define AS2 3 -#define TCN2UB 2 -#define OCR2UB 1 -#define TCR2UB 0 - -/* Watchdog Timer Control Register */ -#define WDTOE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -/* Data Register, Port A */ -#define PA7 7 -#define PA6 6 -#define PA5 5 -#define PA4 4 -#define PA3 3 -#define PA2 2 -#define PA1 1 -#define PA0 0 - -/* Data Direction Register, Port A */ -#define DDA7 7 -#define DDA6 6 -#define DDA5 5 -#define DDA4 4 -#define DDA3 3 -#define DDA2 2 -#define DDA1 1 -#define DDA0 0 - -/* Input Pins, Port A */ -#define PINA7 7 -#define PINA6 6 -#define PINA5 5 -#define PINA4 4 -#define PINA3 3 -#define PINA2 2 -#define PINA1 1 -#define PINA0 0 - -/* Data Register, Port B */ -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -/* Data Direction Register, Port B */ -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -/* Input Pins, Port B */ -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -/* Data Register, Port C */ -#define PC7 7 -#define PC6 6 -#define PC5 5 -#define PC4 4 -#define PC3 3 -#define PC2 2 -#define PC1 1 -#define PC0 0 - -/* Data Direction Register, Port C */ -#define DDC7 7 -#define DDC6 6 -#define DDC5 5 -#define DDC4 4 -#define DDC3 3 -#define DDC2 2 -#define DDC1 1 -#define DDC0 0 - -/* Input Pins, Port C */ -#define PINC7 7 -#define PINC6 6 -#define PINC5 5 -#define PINC4 4 -#define PINC3 3 -#define PINC2 2 -#define PINC1 1 -#define PINC0 0 - -/* Data Register, Port D */ -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -/* Data Direction Register, Port D */ -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -/* Input Pins, Port D */ -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -/* SPI Control Register */ -#define SPIE 7 -#define SPE 6 -#define DORD 5 -#define MSTR 4 -#define CPOL 3 -#define CPHA 2 -#define SPR1 1 -#define SPR0 0 - -/* SPI Status Register */ -#define SPIF 7 -#define WCOL 6 - -/* UART Status Register */ -#define RXC 7 -#define TXC 6 -#define UDRE 5 -#define FE 4 -#define DOR 3 - -/* UART Control Register */ -#define RXCIE 7 -#define TXCIE 6 -#define UDRIE 5 -#define RXEN 4 -#define TXEN 3 -#define CHR9 2 -#define RXB8 1 -#define TXB8 0 - -/* Analog Comparator Control and Status Register */ -#define ACD 7 -#define ACO 5 -#define ACI 4 -#define ACIE 3 -#define ACIC 2 -#define ACIS1 1 -#define ACIS0 0 - -/* ADC MUX */ -#define MUX2 2 -#define MUX1 1 -#define MUX0 0 - -/* ADC Control and Status Register */ -#define ADEN 7 -#define ADSC 6 -#define ADFR 5 -#define ADIF 4 -#define ADIE 3 -#define ADPS2 2 -#define ADPS1 1 -#define ADPS0 0 - -/* EEPROM Control Register */ -#define EERIE 3 -#define EEMWE 2 -#define EEWE 1 -#define EERE 0 - -/* Constants */ -#define RAMEND 0x25F /*Last On-Chip SRAM location*/ -#define XRAMEND 0x25F -#define E2END 0x1FF -#define E2PAGESIZE 0 -#define FLASHEND 0x1FFF - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 1 - -/* Low Fuse Byte */ -#define FUSE_SPIEN (unsigned char)~_BV(1) /* Serial Program Downloading Enabled */ -#define FUSE_FSTRT (unsigned char)~_BV(2) /* Short Start-up time selected */ -#define LFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x93 -#define SIGNATURE_2 0x03 - - -#endif /* _AVR_IO8535_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io86r401.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io86r401.h deleted file mode 100644 index 35c72e75e..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io86r401.h +++ /dev/null @@ -1,308 +0,0 @@ -/* Copyright (c) 2002, Colin O'Flynn - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* avr/io86r401.h - definitions for AT86RF401 */ - -#ifndef _AVR_IO86RF401_H_ -#define _AVR_IO86RF401_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "io86r401.h" -#else -# error "Attempt to include more than one file." -#endif - -#include - -/* Status REGister */ -#define SREG _SFR_IO8(0x3F) - -/* Stack Pointer */ -#define SP _SFR_IO16(0x3D) -#define SPH _SFR_IO8(0x3E) -#define SPL _SFR_IO8(0x3D) - -/*Battery low configeration register */ -#define BL_CONFIG _SFR_IO8(0x35) - -/*Button detect register*/ -#define B_DET _SFR_IO8(0x34) - -/*AVR Configeration register*/ -#define AVR_CONFIG _SFR_IO8(0x33) - -/* I/O registers */ - -/*Data in register */ -#define IO_DATIN _SFR_IO8(0x32) - -/*Data out register */ -#define IO_DATOUT _SFR_IO8(0x31) - -/*IO Enable register */ -#define IO_ENAB _SFR_IO8(0x30) - -/* Watchdog Timer Control Register */ -#define WDTCR _SFR_IO8(0x22) - -/* Bit Timer Control Register */ -#define BTCR _SFR_IO8(0x21) - -#define BTCNT _SFR_IO8(0x20) - -/* -NOTE: EEPROM name's changed to have D in front on them, per datasheet, but -you may want to remove the leading D. -*/ -/* EEPROM Control Register */ - -/* EEPROM Address Register */ -#define DEEAR _SFR_IO8(0x1E) -#define DEEARL _SFR_IO8(0x1E) - -/* EEPROM Data Register */ -#define DEEDR _SFR_IO8(0x1D) -/* EEPROM Control Register */ -#define DEECR _SFR_IO8(0x1C) - -/* Lock Detector Configuration Register 2 */ -#define LOCKDET2 _SFR_IO8(0x17) - -/* VCO Tuning Register*/ -#define VCOTUNE _SFR_IO8(0x16) - -/* Power Attenuation Control Register */ -#define PWR_ATTEN _SFR_IO8(0x14) - -/* Transmitter Control Register */ -#define TX_CNTL _SFR_IO8(0x12) - -/* Lock Detector Configuration Register 1 */ -#define LOCKDET1 _SFR_IO8(0x10) - - -/* Interrupt vectors */ - -/* Transmission Done, Bit Timer Flag 2 Interrupt */ -#define TXDONE_vect _VECTOR(1) -#define SIG_TXDONE _VECTOR(1) - -/* Transmit Buffer Empty, Bit Itmer Flag 0 Interrupt */ -#define TXEMPTY_vect _VECTOR(2) -#define SIG_TXBE _VECTOR(2) - -#define _VECTORS_SIZE 12 - -/* - * The Register Bit names are represented by their bit number (0-7). - */ - -/* Lock Detector Configuration Register 1 - LOCKDET1 */ -#define UPOK 4 -#define ENKO 3 -#define BOD 2 -#define CS1 1 -#define CS0 0 - -/* Transmit Control Register - TX_CNTL */ -#define TXE 5 -#define TXK 4 -#define LOC 2 - -/* Power Attenuation Control Register - PWR_ATTEN */ -#define PCC2 5 -#define PCC1 4 -#define PCC0 3 -#define PCF2 2 -#define PCF1 1 -#define PCF0 0 - -/* VCO Tuning Register 6 - VCOTUNE --NOTE: [] removed from names*/ -#define VCOVDET1 7 -#define VCOVDET0 6 -#define VCOTUNE4 4 -#define VCOTUNE3 3 -#define VCOTUNE2 2 -#define VCOTUNE1 1 -#define VCOTUNE0 0 - -/* Lock Detector Configuration Register 2 - LOCKDET2 --NOTE: [] removed from names*/ -#define EUD 7 -#define LAT 6 -#define ULC2 5 -#define ULC1 4 -#define ULC0 3 -#define LC2 2 -#define LC1 1 -#define LC0 0 - -/* Data EEPROM Control Register - DEECR */ -#define BSY 3 -#define EEU 2 -#define EEL 1 -#define EER 0 - -/* Data EEPROM Data Register - DEEDR */ -#define ED7 7 -#define ED6 6 -#define ED5 5 -#define ED4 4 -#define ED3 3 -#define ED2 2 -#define ED1 1 -#define ED0 0 - -/* Data EEPROM Address Register - DEEAR */ -#define PA6 6 -#define PA5 5 -#define PA4 4 -#define PA3 3 -#define BA2 2 /* B is not a typo! */ -#define BA1 1 -#define BA0 0 - -/* Bit Timer Count Register - BTCNT */ -#define C7 7 -#define C6 6 -#define C5 5 -#define C4 4 -#define C3 3 -#define C2 2 -#define C1 1 -#define C0 0 - -/* Bit Timer Control Register - BTCR */ -#define C9 7 -#define C8 6 -#define M1 5 -#define M0 4 -#define IE 3 -#define F2 2 -#define DATA 1 -#define F0 0 - -/* Watchdog Timer Control Register - WDTCR */ -#define WDTOE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -/* I/O Enable Register - IO_ENAB */ -#define BOHYST 6 -#define IOE5 5 -#define IOE4 4 -#define IOE3 3 -#define IOE2 2 -#define IOE1 1 -#define IOE0 0 - -/* Note: No PORTB or whatever, this is the equivalent. */ -/* I/O Data Out Register - IO_DATOUT */ -#define IOO5 5 -#define IOO4 4 -#define IOO3 3 -#define IOO2 2 -#define IOO1 1 -#define IOO0 0 - -/* Note: No PINB or whatever, this is the equivalent. */ -/* I/O Data In Register - IO_DATIN */ -#define IOI5 5 -#define IOI4 4 -#define IOI3 3 -#define IOI2 2 -#define IOI1 1 -#define IOI0 0 - -/* AVR Configuration Register - AVR_CONFIG */ -#define ACS1 6 -#define ACS0 5 -#define TM 4 -#define BD 3 -#define BLI 2 -#define SLEEP 1 -#define BBM 0 - -/* Button Detect Register - B_DET */ -#define BD5 5 -#define BD4 4 -#define BD3 3 -#define BD2 2 -#define BD1 1 -#define BD0 0 - -/* Battery Low Configuration Register - BL_CONFIG */ -#define BL 7 -#define BLV 6 -#define BL5 5 -#define BL4 4 -#define BL3 3 -#define BL2 2 -#define BL1 1 -#define BL0 0 - -/* Pointer definition */ -#define XL r26 -#define XH r27 -#define YL r28 -#define YH r29 -#define ZL r30 -#define ZH r31 - -/* Constants */ -#define RAMEND 0xDF -#define XRAMEND 0xDF -#define E2END 0x7F -#define E2PAGESIZE 0 -#define FLASHEND 0x07FF - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 0 - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x91 -#define SIGNATURE_2 0x81 - - -#endif /* _AVR_IO86RF401_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io90pwm1.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io90pwm1.h deleted file mode 100644 index 04fc376d5..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io90pwm1.h +++ /dev/null @@ -1,1121 +0,0 @@ -/* Copyright (c) 2005, Andrey Pashchenko - Copyright (c) 2007, Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: io90pwm1.h,v 1.3.2.3 2008/08/06 22:44:59 arcanum Exp $ */ - -/* avr/iopwm1.h - definitions for AT90PWM1 device */ - -#ifndef _AVR_IOPWM1_H_ -#define _AVR_IOPWM1_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iopwm1.h" -#else -# error "Attempt to include more than one file." -#endif - -/* I/O registers */ - -/* Reserved [0x00..0x02] */ - -/* Port B Input Pins Address */ -#define PINB _SFR_IO8(0x03) -/* PINB */ -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -/* Port B Data Direction Register */ -#define DDRB _SFR_IO8(0x04) -/* DDRB */ -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -/* Port B Data Register */ -#define PORTB _SFR_IO8(0x05) -/* PORTB */ -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -/* Reserved [0x06..0x08] */ - -/* Port D Input Pins Address */ -#define PIND _SFR_IO8(0x09) -/* PIND */ -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -/* Port D Data Direction Register */ -#define DDRD _SFR_IO8(0x0A) -/* DDRD */ -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -/* Port D Data Register */ -#define PORTD _SFR_IO8(0x0B) -/* PORTD */ -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -/* Port E Input Pins Address */ -#define PINE _SFR_IO8(0x0C) -/* PINE */ -#define PINE2 2 -#define PINE1 1 -#define PINE0 0 - -/* Port E Data Direction Register */ -#define DDRE _SFR_IO8(0x0D) -/* DDRE */ -#define DDE2 2 -#define DDE1 1 -#define DDE0 0 - -/* Port E Data Register */ -#define PORTE _SFR_IO8(0x0E) -/* PORTE */ -#define PE2 2 -#define PE1 1 -#define PE0 0 - -/* Reserved [0x0F..0x14] */ - -/* Timer/Counter 0 Interrupt Flag Register */ -#define TIFR0 _SFR_IO8(0x15) -/* TIFR0 */ -#define OCF0B 2 /* Output Compare Flag 0B */ -#define OCF0A 1 /* Output Compare Flag 0A */ -#define TOV0 0 /* Overflow Flag */ - -/* Timer/Counter1 Interrupt Flag Register */ -#define TIFR1 _SFR_IO8(0x16) -/* TIFR1 */ -#define ICF1 5 /* Input Capture Flag 1 */ -#define OCF1B 2 /* Output Compare Flag 1B*/ -#define OCF1A 1 /* Output Compare Flag 1A*/ -#define TOV1 0 /* Overflow Flag */ - -/* Reserved [0x17..0x18] */ - -/* General Purpose I/O Register 1 */ -#define GPIOR1 _SFR_IO8(0x19) -/* GPIOR1 */ -#define GPIOR17 7 -#define GPIOR16 6 -#define GPIOR15 5 -#define GPIOR14 4 -#define GPIOR13 3 -#define GPIOR12 2 -#define GPIOR11 1 -#define GPIOR10 0 - -/* General Purpose I/O Register 2 */ -#define GPIOR2 _SFR_IO8(0x1A) -/* GPIOR2 */ -#define GPIOR27 7 -#define GPIOR26 6 -#define GPIOR25 5 -#define GPIOR24 4 -#define GPIOR23 3 -#define GPIOR22 2 -#define GPIOR21 1 -#define GPIOR20 0 - -/* General Purpose I/O Register 3 */ -#define GPIOR3 _SFR_IO8(0x1B) -/* GPIOR3 */ -#define GPIOR37 7 -#define GPIOR36 6 -#define GPIOR35 5 -#define GPIOR34 4 -#define GPIOR33 3 -#define GPIOR32 2 -#define GPIOR31 1 -#define GPIOR30 0 - -/* External Interrupt Flag Register */ -#define EIFR _SFR_IO8(0x1C) -/* EIFR */ -#define INTF3 3 -#define INTF2 2 -#define INTF1 1 -#define INTF0 0 - -/* External Interrupt Mask Register */ -#define EIMSK _SFR_IO8(0x1D) -/* EIMSK */ -#define INT3 3 /* External Interrupt Request 3 Enable */ -#define INT2 2 /* External Interrupt Request 2 Enable */ -#define INT1 1 /* External Interrupt Request 1 Enable */ -#define INT0 0 /* External Interrupt Request 0 Enable */ - -/* General Purpose I/O Register 0 */ -#define GPIOR0 _SFR_IO8(0x1E) -/* GPIOR0 */ -#define GPIOR07 7 -#define GPIOR06 6 -#define GPIOR05 5 -#define GPIOR04 4 -#define GPIOR03 3 -#define GPIOR02 2 -#define GPIOR01 1 -#define GPIOR00 0 - -/* EEPROM Control Register */ -#define EECR _SFR_IO8(0x1F) -/* EECR */ -#define EERIE 3 /* EEPROM Ready Interrupt Enable */ -#define EEMWE 2 /* EEPROM Master Write Enable */ -#define EEWE 1 /* EEPROM Write Enable */ -#define EERE 0 /* EEPROM Read Enable */ - -/* EEPROM Data Register */ -#define EEDR _SFR_IO8(0x20) -/* EEDR */ -#define EEDR7 7 -#define EEDR6 6 -#define EEDR5 5 -#define EEDR4 4 -#define EEDR3 3 -#define EEDR2 2 -#define EEDR1 1 -#define EEDR0 0 - -/* The EEPROM Address Registers */ -#define EEAR _SFR_IO16(0x21) -#define EEARL _SFR_IO8(0x21) -#define EEARH _SFR_IO8(0x22) -/* EEARH */ -#define EEAR11 3 -#define EEAR10 2 -#define EEAR9 1 -#define EEAR8 0 -/* EEARL */ -#define EEAR7 7 -#define EEAR6 6 -#define EEAR5 5 -#define EEAR4 4 -#define EEAR3 3 -#define EEAR2 2 -#define EEAR1 1 -#define EEAR0 0 - -/* 6-char sequence denoting where to find the EEPROM registers in memory space. - Adresses denoted in hex syntax with uppercase letters. Used by the EEPROM - subroutines. - First two letters: EECR address. - Second two letters: EEDR address. - Last two letters: EEAR address. */ -#define __EEPROM_REG_LOCATIONS__ 1F2021 - -/* General Timer/Counter Control Register */ -#define GTCCR _SFR_IO8(0x23) -/* GTCCR */ -#define TSM 7 /* Timer/Counter Synchronization Mode */ -#define ICPSEL1 6 /* Timer1 Input Capture Selection Bit */ -#define PSRSYNC 0 - -/* Timer/Counter Control Register A */ -#define TCCR0A _SFR_IO8(0x24) -/* TCCR0A */ -#define COM0A1 7 /* Compare Output Mode, Phase Correct PWM Mode */ -#define COM0A0 6 /* Compare Output Mode, Phase Correct PWM Mode */ -#define COM0B1 5 /* Compare Output Mode, Fast PWm */ -#define COM0B0 4 /* Compare Output Mode, Fast PWm */ -#define WGM01 1 /* Waveform Generation Mode */ -#define WGM00 0 /* Waveform Generation Mode */ - -/* Timer/Counter Control Register B */ -#define TCCR0B _SFR_IO8(0x25) -/* TCCR0B */ -#define FOC0A 7 /* Force Output Compare A */ -#define FOC0B 6 /* Force Output Compare B */ -#define WGM02 3 /* Waveform Generation Mode */ -#define CS02 2 /* Clock Select */ -#define CS01 1 /* Clock Select */ -#define CS00 0 /* Clock Select */ - -/* Timer/Counter0 Register */ -#define TCNT0 _SFR_IO8(0x26) -/* TCNT0 */ -#define TCNT07 7 -#define TCNT06 6 -#define TCNT05 5 -#define TCNT04 4 -#define TCNT03 3 -#define TCNT02 2 -#define TCNT01 1 -#define TCNT00 0 - -/* Timer/Counter0 Output Compare Register A */ -#define OCR0A _SFR_IO8(0x27) -/* OCR0A */ -#define OCR0A7 7 -#define OCR0A6 6 -#define OCR0A5 5 -#define OCR0A4 4 -#define OCR0A3 3 -#define OCR0A2 2 -#define OCR0A1 1 -#define OCR0A0 0 - -/* Timer/Counter0 Output Compare Register B */ -#define OCR0B _SFR_IO8(0x28) -/* OCR0B */ -#define OCR0B7 7 -#define OCR0B6 6 -#define OCR0B5 5 -#define OCR0B4 4 -#define OCR0B3 3 -#define OCR0B2 2 -#define OCR0B1 1 -#define OCR0B0 0 - -/* PLL Control and Status Register */ -#define PLLCSR _SFR_IO8(0x29) -/* PLLCSR */ -#define PLLF 2 -#define PLLE 1 /* PLL Enable */ -#define PLOCK 0 /* PLL Lock Detector */ - -/* Reserved [0x2A..0x2B] */ - -/* SPI Control Register */ -#define SPCR _SFR_IO8(0x2C) -/* SPCR */ -#define SPIE 7 /* SPI Interrupt Enable */ -#define SPE 6 /* SPI Enable */ -#define DORD 5 /* Data Order */ -#define MSTR 4 /* Master/Slave Select */ -#define CPOL 3 /* Clock polarity */ -#define CPHA 2 /* Clock Phase */ -#define SPR1 1 /* SPI Clock Rate Select 1 */ -#define SPR0 0 /* SPI Clock Rate Select 0 */ - -/* SPI Status Register */ -#define SPSR _SFR_IO8(0x2D) -/* SPSR */ -#define SPIF 7 /* SPI Interrupt Flag */ -#define WCOL 6 /* Write Collision Flag */ -#define SPI2X 0 /* Double SPI Speed Bit */ - -/* SPI Data Register */ -#define SPDR _SFR_IO8(0x2E) -/* SPDR */ -#define SPD7 7 -#define SPD6 6 -#define SPD5 5 -#define SPD4 4 -#define SPD3 3 -#define SPD2 2 -#define SPD1 1 -#define SPD0 0 - -/* Reserved [0x2F] */ - -/* Analog Comparator Status Register */ -#define ACSR _SFR_IO8(0x30) -/* ACSR */ -#define ACCKDIV 7 /* Analog Comparator Clock Divider */ -#define AC2IF 6 /* Analog Comparator 2 Interrupt Flag Bit */ -#define AC0IF 4 /* Analog Comparator 0 Interrupt Flag Bit */ -#define AC2O 2 /* Analog Comparator 2 Output Bit */ -#define AC0O 0 /* Analog Comparator 0 Output Bit */ - -/* Monitor Data Register */ -#define MONDR _SFR_IO8(0x31) - -/* Monitor Stop Mode Control Register */ -#define MSMCR _SFR_IO8(0x32) - -/* Sleep Mode Control Register */ -#define SMCR _SFR_IO8(0x33) -/* SMCR */ -#define SM2 3 /* Sleep Mode Select bit2 */ -#define SM1 2 /* Sleep Mode Select bit1 */ -#define SM0 1 /* Sleep Mode Select bit0 */ -#define SE 0 /* Sleep Enable */ - -/* MCU Status Register */ -#define MCUSR _SFR_IO8(0x34) -/* MCUSR */ -#define WDRF 3 /* Watchdog Reset Flag */ -#define BORF 2 /* Brown-out Reset Flag */ -#define EXTRF 1 /* External Reset Flag */ -#define PORF 0 /* Power-on reset flag */ - -/* MCU Control Register */ -#define MCUCR _SFR_IO8(0x35) -/* MCUCR */ -#define SPIPS 7 /* SPI Pin Select */ -#define PUD 4 /* Pull-up disable */ -#define IVSEL 1 /* Interrupt Vector Select */ -#define IVCE 0 /* Interrupt Vector Change Enable */ - -/* Reserved [0x36] */ - -/* Store Program Memory Control Register */ -#define SPMCSR _SFR_IO8(0x37) -/* SPMCSR */ -#define SPMIE 7 /* SPM Interrupt Enable */ -#define RWWSB 6 /* Read While Write Section Busy */ -#define RWWSRE 4 /* Read While Write section read enable */ -#define BLBSET 3 /* Boot Lock Bit Set */ -#define PGWRT 2 /* Page Write */ -#define PGERS 1 /* Page Erase */ -#define SPMEN 0 /* Store Program Memory Enable */ - -/* Reserved [0x38..0x3C] */ - -/* 0x3D..0x3E SP [defined in ] */ -/* 0x3F SREG [defined in ] */ - -/* Watchdog Timer Control Register */ -#define WDTCSR _SFR_MEM8(0x60) -/* WDTCSR */ -#define WDIF 7 /* Watchdog Timeout Interrupt Flag */ -#define WDIE 6 /* Watchdog Timeout Interrupt Enable */ -#define WDP3 5 /* Watchdog Timer Prescaler bit3 */ -#define WDCE 4 /* Watchdog Change Enable */ -#define WDE 3 /* Watchdog Enable */ -#define WDP2 2 /* Watchdog Timer Prescaler bit2 */ -#define WDP1 1 /* Watchdog Timer Prescaler bit1 */ -#define WDP0 0 /* Watchdog Timer Prescaler bit0 */ - -/* Clock Prescaler Register */ -#define CLKPR _SFR_MEM8(0x61) -/* CLKPR */ -#define CLKPCE 7 /* Clock Prescaler Change Enable */ -#define CLKPS3 3 /* Clock Prescaler Select bit3 */ -#define CLKPS2 2 /* Clock Prescaler Select bit2 */ -#define CLKPS1 1 /* Clock Prescaler Select bit1 */ -#define CLKPS0 0 /* Clock Prescaler Select bit0 */ - -/* Reserved [0x62..0x63] */ - -/* Power Reduction Register */ -#define PRR _SFR_MEM8(0x64) -/* PRR */ -#define PRPSC2 7 /* Power Reduction PSC2 */ -#define PRPSC1 6 /* Power Reduction PSC1 */ -#define PRPSC0 5 /* Power Reduction PSC0 */ -#define PRTIM1 4 /* Power Reduction Timer/Counter1 */ -#define PRTIM0 3 /* Power Reduction Timer/Counter0 */ -#define PRSPI 2 /* Power Reduction Serial Peripheral Interface */ -#define PRADC 0 /* Power Reduction ADC */ - -/* Reserved [0x65] */ - -/* Oscillator Calibration Value */ -#define OSCCAL _SFR_MEM8(0x66) -/* OSCCAL */ -#define CAL6 6 -#define CAL5 5 -#define CAL4 4 -#define CAL3 3 -#define CAL2 2 -#define CAL1 1 -#define CAL0 0 - -/* Reserved [0x67..0x68] */ - -/* External Interrupt Control Register A */ -#define EICRA _SFR_MEM8(0x69) -/* EICRA */ -#define ISC31 7 -#define ISC30 6 -#define ISC21 5 -#define ISC20 4 -#define ISC11 3 -#define ISC10 2 -#define ISC01 1 -#define ISC00 0 - -/* Reserved [0x6A..0x6D] */ - -/* Timer/Counter0 Interrupt Mask Register */ -#define TIMSK0 _SFR_MEM8(0x6E) -/* TIMSK0 */ -#define OCIE0B 2 /* Output Compare Match B Interrupt Enable */ -#define OCIE0A 1 /* Output Compare Match A Interrupt Enable */ -#define TOIE0 0 /* Overflow Interrupt Enable */ - -/* Timer/Counter1 Interrupt Mask Register */ -#define TIMSK1 _SFR_MEM8(0x6F) -/* TIMSK1 */ -#define ICIE1 5 /* Input Capture Interrupt Enable */ -#define OCIE1B 2 /* Output Compare Match B Interrupt Enable */ -#define OCIE1A 1 /* Output Compare Match A Interrupt Enable */ -#define TOIE1 0 /* Overflow Interrupt Enable */ - -/* Reserved [0x70..0x75] */ - -/* Amplifier 0 Control and Status register */ -#define AMP0CSR _SFR_MEM8(0x76) -#define AMP0EN 7 -#define AMP0IS 6 -#define AMP0G1 5 -#define AMP0G0 4 -#define AMP0TS1 1 -#define AMP0TS0 0 - -/* Reserved [0x77] */ - -/* ADC Result Data Register */ -#ifndef __ASSEMBLER__ -#define ADC _SFR_MEM16(0x78) -#endif -#define ADCW _SFR_MEM16(0x78) -#define ADCL _SFR_MEM8(0x78) -#define ADCH _SFR_MEM8(0x79) - -/* ADC Control and Status Register A */ -#define ADCSRA _SFR_MEM8(0x7A) -/* ADCSRA */ -#define ADEN 7 /* ADC Enable */ -#define ADSC 6 /* ADC Start Conversion */ -#define ADATE 5 /* ADC Auto Trigger Enable */ -#define ADIF 4 /* ADC Interrupt Flag */ -#define ADIE 3 /* ADC Interrupt Enable */ -#define ADPS2 2 /* ADC Prescaler Select bit2 */ -#define ADPS1 1 /* ADC Prescaler Select bit1 */ -#define ADPS0 0 /* ADC Prescaler Select bit0 */ - -/* ADC Control and Status Register B */ -#define ADCSRB _SFR_MEM8(0x7B) -/* ADCSRB */ -#define ADTS3 3 /* ADC Auto Trigger Source 2 */ -#define ADTS2 2 /* ADC Auto Trigger Source 2 */ -#define ADTS1 1 /* ADC Auto Trigger Source 1 */ -#define ADTS0 0 /* ADC Auto Trigger Source 0 */ - -/* ADC multiplexer Selection Register */ -#define ADMUX _SFR_MEM8(0x7C) -/* ADMUX */ -#define REFS1 7 /* Reference Selection bit1 */ -#define REFS0 6 /* Reference Selection bit0 */ -#define ADLAR 5 /* Left Adjust Result */ -#define MUX3 3 /* Analog Channel and Gain Selection bit3 */ -#define MUX2 2 /* Analog Channel and Gain Selection bit2 */ -#define MUX1 1 /* Analog Channel and Gain Selection bit1 */ -#define MUX0 0 /* Analog Channel and Gain Selection bit0 */ - -/* Reserved [0x7D] */ - -/* Digital Input Disable Register 0 */ -#define DIDR0 _SFR_MEM8(0x7E) -/* DIDR0 */ -#define ADC7D 7 /* ADC7 Digital input Disable */ -#define ADC6D 6 /* ADC6 Digital input Disable */ -#define ADC5D 5 /* ADC5 Digital input Disable */ -#define ADC4D 4 /* ADC4 Digital input Disable */ -#define ADC3D 3 /* ADC3 Digital input Disable */ -#define ADC2D 2 /* ADC2 Digital input Disable */ -#define ADC1D 1 /* ADC1 Digital input Disable */ -#define ADC0D 0 /* ADC0 Digital input Disable */ - -/* Digital Input Disable Register 1 */ -#define DIDR1 _SFR_MEM8(0x7F) -/* DIDR1 */ -#define ACMP0D 5 -#define AMP0PD 4 -#define AMP0ND 3 -#define ADC10D 2 /* ADC10 Digital input Disable */ -#define ADC9D 1 /* ADC9 Digital input Disable */ -#define ADC8D 0 /* ADC8 Digital input Disable */ - -/* Timer/Counter1 Control Register A */ -#define TCCR1A _SFR_MEM8(0x80) -/* TCCR1A */ -#define COM1A1 7 /* Comparet Ouput Mode 1A, bit 1 */ -#define COM1A0 6 /* Comparet Ouput Mode 1A, bit 0 */ -#define COM1B1 5 /* Compare Output Mode 1B, bit 1 */ -#define COM1B0 4 /* Compare Output Mode 1B, bit 0 */ -#define WGM11 1 /* Waveform Generation Mode */ -#define WGM10 0 /* Waveform Generation Mode */ - -/* Timer/Counter1 Control Register B */ -#define TCCR1B _SFR_MEM8(0x81) -/* TCCR1B */ -#define ICNC1 7 /* Input Capture 1 Noise Canceler */ -#define ICES1 6 /* Input Capture 1 Edge Select */ -#define WGM13 4 /* Waveform Generation Mode */ -#define WGM12 3 /* Waveform Generation Mode */ -#define CS12 2 /* Prescaler source of Timer/Counter 1 */ -#define CS11 1 /* Prescaler source of Timer/Counter 1 */ -#define CS10 0 /* Prescaler source of Timer/Counter 1 */ - -/* Timer/Counter1 Control Register C */ -#define TCCR1C _SFR_MEM8(0x82) -/* TCCR1C */ -#define FOC1A 7 /* Force Output Compare for Channel A */ -#define FOC1B 6 /* Force Output Compare for Channel B */ - -/* Reserved [0x83] */ - -/* Timer/Counter1 */ -#define TCNT1 _SFR_MEM16(0x84) -#define TCNT1L _SFR_MEM8(0x84) -#define TCNT1H _SFR_MEM8(0x85) -/* TCNT1H */ -#define TCNT115 7 -#define TCNT114 6 -#define TCNT113 5 -#define TCNT112 4 -#define TCNT111 3 -#define TCNT110 2 -#define TCNT19 1 -#define TCNT18 0 -/* TCNT1L */ -#define TCNT17 7 -#define TCNT16 6 -#define TCNT15 5 -#define TCNT14 4 -#define TCNT13 3 -#define TCNT12 2 -#define TCNT11 1 -#define TCNT10 0 - -/* Input Capture Register 1 */ -#define ICR1 _SFR_MEM16(0x86) -#define ICR1L _SFR_MEM8(0x86) -#define ICR1H _SFR_MEM8(0x87) -/* ICR1H */ -#define ICR115 7 -#define ICR114 6 -#define ICR113 5 -#define ICR112 4 -#define ICR111 3 -#define ICR110 2 -#define ICR19 1 -#define ICR18 0 -/* ICR1L */ -#define ICR17 7 -#define ICR16 6 -#define ICR15 5 -#define ICR14 4 -#define ICR13 3 -#define ICR12 2 -#define ICR11 1 -#define ICR10 0 - -/* Output Compare Register 1 A */ -#define OCR1A _SFR_MEM16(0x88) -#define OCR1AL _SFR_MEM8(0x88) -#define OCR1AH _SFR_MEM8(0x89) -/* OCR1AH */ -#define OCR1A15 7 -#define OCR1A14 6 -#define OCR1A13 5 -#define OCR1A12 4 -#define OCR1A11 3 -#define OCR1A10 2 -#define OCR1A9 1 -#define OCR1A8 0 -/* OCR1AL */ -#define OCR1A7 7 -#define OCR1A6 6 -#define OCR1A5 5 -#define OCR1A4 4 -#define OCR1A3 3 -#define OCR1A2 2 -#define OCR1A1 1 -#define OCR1A0 0 - -/* Output Compare Register 1 B */ -#define OCR1B _SFR_MEM16(0x8A) -#define OCR1BL _SFR_MEM8(0x8A) -#define OCR1BH _SFR_MEM8(0x8B) -/* OCR1BH */ -#define OCR1B15 7 -#define OCR1B14 6 -#define OCR1B13 5 -#define OCR1B12 4 -#define OCR1B11 3 -#define OCR1B10 2 -#define OCR1B9 1 -#define OCR1B8 0 -/* OCR1BL */ -#define OCR1B7 7 -#define OCR1B6 6 -#define OCR1B5 5 -#define OCR1B4 4 -#define OCR1B3 3 -#define OCR1B2 2 -#define OCR1B1 1 -#define OCR1B0 0 - -/* Reserved [0x8C..0x9F] */ - -/* PSC0 Interrupt Flag Register */ -#define PIFR0 _SFR_MEM8(0xA0) -/* PIFR0 */ -#define PSEI0 5 /* PSC0 Synchro Error Interrupt */ -#define PEV0B 4 /* PSC0 External Event B Interrupt */ -#define PEV0A 3 /* PSC0 External Event A Interrupt */ -#define PRN01 2 /* PSC0 Ramp Number bit1 */ -#define PRN00 1 /* PSC0 Ramp Number bit0 */ -#define PEOP0 0 /* End Of PSC0 Interrupt */ - -/* PSC0 Interrupt Mask Register */ -#define PIM0 _SFR_MEM8(0xA1) -/* PIM0 */ -#define PSEIE0 5 /* PSC0 Synchro Error Interrupt Enable */ -#define PEVE0B 4 /* PSC0 External Event B Interrupt Enable */ -#define PEVE0A 3 /* PSC0 External Event A Interrupt Enable */ -#define PEOPE0 0 /* PSC0 End Of Cycle Interrupt Enable */ - -/* Reserved [0xA2..0xA3] */ - -/* PSC2 Interrupt Flag Register */ -#define PIFR2 _SFR_MEM8(0xA4) -/* PIFR2 */ -#define PSEI2 5 /* PSC2 Synchro Error Interrupt */ -#define PEV2B 4 /* PSC2 External Event B Interrupt */ -#define PEV2A 3 /* PSC2 External Event A Interrupt */ -#define PRN21 2 /* PSC2 Ramp Number bit1 */ -#define PRN20 1 /* PSC2 Ramp Number bit0 */ -#define PEOP2 0 /* End Of PSC2 Interrupt */ - -/* PSC2 Interrupt Mask Register */ -#define PIM2 _SFR_MEM8(0xA5) -/* PIM2 */ -#define PSEIE2 5 /* PSC2 Synchro Error Interrupt Enable */ -#define PEVE2B 4 /* PSC2 External Event B Interrupt Enable */ -#define PEVE2A 3 /* PSC2 External Event A Interrupt Enable */ -#define PEOPE2 0 /* PSC2 End Of Cycle Interrupt Enable */ - -/* Reserved [0xA6..0xAC] */ - -/* Analog Comparator 0 Control Register */ -#define AC0CON _SFR_MEM8(0xAD) -/* AC0CON */ -#define AC0EN 7 /* Analog Comparator 0 Enable Bit */ -#define AC0IE 6 /* Analog Comparator 0 Interrupt Enable bit */ -#define AC0IS1 5 /* Analog Comparator 0 Interrupt Select bit1 */ -#define AC0IS0 4 /* Analog Comparator 0 Interrupt Select bit0 */ -#define AC0M2 2 /* Analog Comparator 0 Multiplexer register bit2 */ -#define AC0M1 1 /* Analog Comparator 0 Multiplexer register bit1 */ -#define AC0M0 0 /* Analog Comparator 0 Multiplexer register bit0 */ - -/* Reserved [0xB0..0xAE] */ - -/* Analog Comparator 2 Control Register */ -#define AC2CON _SFR_MEM8(0xAF) -/* AC2CON */ -#define AC2EN 7 /* Analog Comparator 2 Enable Bit */ -#define AC2IE 6 /* Analog Comparator 2 Interrupt Enable bit */ -#define AC2IS1 5 /* Analog Comparator 2 Interrupt Select bit1 */ -#define AC2IS0 4 /* Analog Comparator 2 Interrupt Select bit0 */ -#define AC2M2 2 /* Analog Comparator 2 Multiplexer register bit2 */ -#define AC2M1 1 /* Analog Comparator 2 Multiplexer register bit1 */ -#define AC2M0 0 /* Analog Comparator 2 Multiplexer register bit0 */ - -/* Reserved [0xB0..0xCF] */ - -/* PSC 0 Synchro and Output Configuration */ -#define PSOC0 _SFR_MEM8(0xD0) -/* PSOC0 */ -#define PSYNC01 5 /* Synchronization Out for ADC Selection bit1 */ -#define PSYNC00 4 /* Synchronization Out for ADC Selection bit0 */ -#define POEN0B 2 /* PSC 0 OUT Part B Output Enable */ -#define POEN0A 0 /* PSC 0 OUT Part A Output Enable */ - -/* Reserved [0xD1] */ - -/* Output Compare SA Registers */ -#define OCR0SA _SFR_MEM16(0xD2) -#define OCR0SAL _SFR_MEM8(0xD2) -#define OCR0SAH _SFR_MEM8(0xD3) - -/* Output Compare RA Registers */ -#define OCR0RA _SFR_MEM16(0xD4) -#define OCR0RAL _SFR_MEM8(0xD4) -#define OCR0RAH _SFR_MEM8(0xD5) - -/* Output Compare SB Registers */ -#define OCR0SB _SFR_MEM16(0xD6) -#define OCR0SBL _SFR_MEM8(0xD6) -#define OCR0SBH _SFR_MEM8(0xD7) - -/* Output Compare RB Registers */ -#define OCR0RB _SFR_MEM16(0xD8) -#define OCR0RBL _SFR_MEM8(0xD8) -#define OCR0RBH _SFR_MEM8(0xD9) - -/* PSC 0 Configuration Register */ -#define PCNF0 _SFR_MEM8(0xDA) -/* PCNF0 */ -#define PFIFTY0 7 /* PSC 0 Fifty */ -#define PALOCK0 6 /* PSC 0 Autolock */ -#define PLOCK0 5 /* PSC 0 Lock */ -#define PMODE01 4 /* PSC 0 Mode bit1 */ -#define PMODE00 3 /* PSC 0 Mode bit0 */ -#define POP0 2 /* PSC 0 Output Polarity */ -#define PCLKSEL0 1 /* PSC 0 Input Clock Select */ - -/* PSC 0 Control Register */ -#define PCTL0 _SFR_MEM8(0xDB) -/* PCTL0 */ -#define PPRE01 7 /* PSC 0 Prescaler Select bit1 */ -#define PPRE00 6 /* PSC 0 Prescaler Select bit0 */ -#define PBFM0 5 /* Balance Flank Width Modulation */ -#define PAOC0B 4 /* PSC 0 Asynchronous Output Control B */ -#define PAOC0A 3 /* PSC 0 Asynchronous Output Control A */ -#define PARUN0 2 /* PSC 0 Autorun */ -#define PCCYC0 1 /* PSC 0 Complete Cycle */ -#define PRUN0 0 /* PSC 0 Run */ - -/* PSC 0 Input A Control Register */ -#define PFRC0A _SFR_MEM8(0xDC) -/* PFRC0A */ -#define PCAE0A 7 /* PSC 0 Capture Enable Input Part A */ -#define PISEL0A 6 /* PSC 0 Input Select for Part A */ -#define PELEV0A 5 /* PSC 0 Edge Level Selector of Input Part A */ -#define PFLTE0A 4 /* PSC 0 Filter Enable on Input Part A */ -#define PRFM0A3 3 /* PSC 0 Fault Mode bit3 */ -#define PRFM0A2 2 /* PSC 0 Fault Mode bit2 */ -#define PRFM0A1 1 /* PSC 0 Fault Mode bit1 */ -#define PRFM0A0 0 /* PSC 0 Fault Mode bit0 */ - -/* PSC 0 Input B Control Register */ -#define PFRC0B _SFR_MEM8(0xDD) -/* PFRC0B */ -#define PCAE0B 7 /* PSC 0 Capture Enable Input Part B */ -#define PISEL0B 6 /* PSC 0 Input Select for Part B */ -#define PELEV0B 5 /* PSC 0 Edge Level Selector of Input Part B */ -#define PFLTE0B 4 /* PSC 0 Filter Enable on Input Part B */ -#define PRFM0B3 3 /* PSC 0 Fault Mode bit3 */ -#define PRFM0B2 2 /* PSC 0 Fault Mode bit2 */ -#define PRFM0B1 1 /* PSC 0 Fault Mode bit1 */ -#define PRFM0B0 0 /* PSC 0 Fault Mode bit0 */ - -/* PSC 0 Input Capture Registers */ -#define PICR0 _SFR_MEM16(0xDE) - -#define PICR0L _SFR_MEM8(0xDE) - -#define PICR0H _SFR_MEM8(0xDF) -#define PCST0 7 /* PSC Capture Software Trig bit */ - -/* Reserved [0xE0..0xEF] */ - -/* PSC 2 Synchro and Output Configuration */ -#define PSOC2 _SFR_MEM8(0xF0) -/* PSOC2 */ -#define POS23 7 /* PSCOUT23 Selection */ -#define POS22 6 /* PSCOUT22 Selection */ -#define PSYNC21 5 /* Synchronization Out for ADC Selection bit1 */ -#define PSYNC20 4 /* Synchronization Out for ADC Selection bit0 */ -#define POEN2D 3 /* PSCOUT23 Output Enable */ -#define POEN2B 2 /* PSC 2 OUT Part B Output Enable */ -#define POEN2C 1 /* PSCOUT22 Output Enable */ -#define POEN2A 0 /* PSC 2 OUT Part A Output Enable */ - -/* PSC 2 Output Matrix */ -#define POM2 _SFR_MEM8(0xF1) -/* POM2 */ -#define POMV2B3 7 /* Output Matrix Output B Ramp 3 */ -#define POMV2B2 6 /* Output Matrix Output B Ramp 2 */ -#define POMV2B1 5 /* Output Matrix Output B Ramp 1 */ -#define POMV2B0 4 /* Output Matrix Output B Ramp 0 */ -#define POMV2A3 3 /* Output Matrix Output A Ramp 3 */ -#define POMV2A2 2 /* Output Matrix Output A Ramp 2 */ -#define POMV2A1 1 /* Output Matrix Output A Ramp 1 */ -#define POMV2A0 0 /* Output Matrix Output A Ramp 0 */ - -/* Output Compare SA Registers */ -#define OCR2SA _SFR_MEM16(0xF2) -#define OCR2SAL _SFR_MEM8(0xF2) -#define OCR2SAH _SFR_MEM8(0xF3) - -/* Output Compare RA Registers */ -#define OCR2RA _SFR_MEM16(0xF4) -#define OCR2RAL _SFR_MEM8(0xF4) -#define OCR2RAH _SFR_MEM8(0xF5) - -/* Output Compare SB Registers */ -#define OCR2SB _SFR_MEM16(0xF6) -#define OCR2SBL _SFR_MEM8(0xF6) -#define OCR2SBH _SFR_MEM8(0xF7) - -/* Output Compare RB Registers */ -#define OCR2RB _SFR_MEM16(0xF8) -#define OCR2RBL _SFR_MEM8(0xF8) -#define OCR2RBH _SFR_MEM8(0xF9) - -/* PSC 2 Configuration Register */ -#define PCNF2 _SFR_MEM8(0xFA) -/* PCNF2 */ -#define PFIFTY2 7 /* PSC 2 Fifty */ -#define PALOCK2 6 /* PSC 2 Autolock */ -#define PLOCK2 5 /* PSC 2 Lock */ -#define PMODE21 4 /* PSC 2 Mode bit1 */ -#define PMODE20 3 /* PSC 2 Mode bit0 */ -#define POP2 2 /* PSC 2 Output Polarity */ -#define PCLKSEL2 1 /* PSC 2 Input Clock Select */ -#define POME2 0 /* PSC 2 Output Matrix Enable */ - -/* PSC 2 Control Register */ -#define PCTL2 _SFR_MEM8(0xFB) -/* PCTL2 */ -#define PPRE21 7 /* PSC 2 Prescaler Select bit1 */ -#define PPRE20 6 /* PSC 2 Prescaler Select bit0 */ -#define PBFM2 5 /* Balance Flank Width Modulation */ -#define PAOC2B 4 /* PSC 2 Asynchronous Output Control B */ -#define PAOC2A 3 /* PSC 2 Asynchronous Output Control A */ -#define PARUN2 2 /* PSC 2 Autorun */ -#define PCCYC2 1 /* PSC 2 Complete Cycle */ -#define PRUN2 0 /* PSC 2 Run */ - -/* PSC 2 Input A Control Register */ -#define PFRC2A _SFR_MEM8(0xFC) -/* PFRC2A */ -#define PCAE2A 7 /* PSC 2 Capture Enable Input Part A */ -#define PISEL2A 6 /* PSC 2 Input Select for Part A */ -#define PELEV2A 5 /* PSC 2 Edge Level Selector of Input Part A */ -#define PFLTE2A 4 /* PSC 2 Filter Enable on Input Part A */ -#define PRFM2A3 3 /* PSC 2 Fault Mode bit3 */ -#define PRFM2A2 2 /* PSC 2 Fault Mode bit2 */ -#define PRFM2A1 1 /* PSC 2 Fault Mode bit1 */ -#define PRFM2A0 0 /* PSC 2 Fault Mode bit0 */ - -/* PSC 2 Input B Control Register */ -#define PFRC2B _SFR_MEM8(0xFD) -/* PFRC2B */ -#define PCAE2B 7 /* PSC 2 Capture Enable Input Part B */ -#define PISEL2B 6 /* PSC 2 Input Select for Part B */ -#define PELEV2B 5 /* PSC 2 Edge Level Selector of Input Part B */ -#define PFLTE2B 4 /* PSC 2 Filter Enable on Input Part B */ -#define PRFM2B3 3 /* PSC 2 Fault Mode bit3 */ -#define PRFM2B2 2 /* PSC 2 Fault Mode bit2 */ -#define PRFM2B1 1 /* PSC 2 Fault Mode bit1 */ -#define PRFM2B0 0 /* PSC 2 Fault Mode bit0 */ - -/* PSC 2 Input Capture Registers */ -#define PICR2 _SFR_MEM16(0xFE) - -#define PICR2L _SFR_MEM8(0xFE) - -#define PICR2H _SFR_MEM8(0xFF) -#define PCST2 7 /* PSC Capture Software Trig bit */ - /* not implemented on AT90PWM2/AT90PWM3 */ - - -/* Interrupt vectors */ -/* PSC2 Capture Event */ -#define PSC2_CAPT_vect _VECTOR(1) -#define SIG_PSC2_CAPTURE _VECTOR(1) - -/* PSC2 End Cycle */ -#define PSC2_EC_vect _VECTOR(2) -#define SIG_PSC2_END_CYCLE _VECTOR(2) - -/* PSC0 Capture Event */ -#define PSC0_CAPT_vect _VECTOR(5) -#define SIG_PSC0_CAPTURE _VECTOR(5) - -/* PSC0 End Cycle */ -#define PSC0_EC_vect _VECTOR(6) -#define SIG_PSC0_END_CYCLE _VECTOR(6) - -/* Analog Comparator 0 */ -#define ANALOG_COMP_0_vect _VECTOR(7) -#define SIG_COMPARATOR0 _VECTOR(7) - -/* Analog Comparator 2 */ -#define ANALOG_COMP_2_vect _VECTOR(9) -#define SIG_COMPARATOR2 _VECTOR(9) - -/* External Interrupt Request 0 */ -#define INT0_vect _VECTOR(10) -#define SIG_INTERRUPT0 _VECTOR(10) - -/* Timer/Counter1 Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(11) -#define SIG_INPUT_CAPTURE1 _VECTOR(11) - -/* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPA_vect _VECTOR(12) -#define SIG_OUTPUT_COMPARE1A _VECTOR(12) -#define SIG_OUTPUT_COMPARE1_A _VECTOR(12) - -/* Timer/Counter Compare Match B */ -#define TIMER1_COMPB_vect _VECTOR(13) -#define SIG_OUTPUT_COMPARE1B _VECTOR(13) -#define SIG_OUTPUT_COMPARE1_B _VECTOR(13) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(15) -#define SIG_OVERFLOW1 _VECTOR(15) - -/* Timer/Counter0 Compare Match A */ -#define TIMER0_COMP_A_vect _VECTOR(16) -#define SIG_OUTPUT_COMPARE0A _VECTOR(16) -#define SIG_OUTPUT_COMPARE0_A _VECTOR(16) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(17) -#define SIG_OVERFLOW0 _VECTOR(17) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(18) -#define SIG_ADC _VECTOR(18) - -/* External Interrupt Request 1 */ -#define INT1_vect _VECTOR(19) -#define SIG_INTERRUPT1 _VECTOR(19) - -/* SPI Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(20) -#define SIG_SPI _VECTOR(20) - -/* External Interrupt Request 2 */ -#define INT2_vect _VECTOR(24) -#define SIG_INTERRUPT2 _VECTOR(24) - -/* Watchdog Timeout Interrupt */ -#define WDT_vect _VECTOR(25) -#define SIG_WDT _VECTOR(25) -#define SIG_WATCHDOG_TIMEOUT _VECTOR(25) - -/* EEPROM Ready */ -#define EE_READY_vect _VECTOR(26) -#define SIG_EEPROM_READY _VECTOR(26) - -/* Timer Counter 0 Compare Match B */ -#define TIMER0_COMPB_vect _VECTOR(27) -#define SIG_OUTPUT_COMPARE0B _VECTOR(27) -#define SIG_OUTPUT_COMPARE0_B _VECTOR(27) - -/* External Interrupt Request 3 */ -#define INT3_vect _VECTOR(28) -#define SIG_INTERRUPT3 _VECTOR(28) - -/* Store Program Memory Read */ -#define SPM_READY_vect _VECTOR(31) -#define SIG_SPM_READY _VECTOR(31) - -#define _VECTORS_SIZE 64 - -/* Constants */ -#define SPM_PAGESIZE 64 - -#define RAMEND 0x02FF -#define XRAMEND 0x02FF -#define E2END 0x01FF -#define FLASHEND 0x0FFF - - -/* Fuse Information */ - -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) /* Select Clock Source */ -#define FUSE_CKSEL1 (unsigned char)~_BV(1) /* Select Clock Source */ -#define FUSE_CKSEL2 (unsigned char)~_BV(2) /* Select Clock Source */ -#define FUSE_CKSEL3 (unsigned char)~_BV(3) /* Select Clock Source */ -#define FUSE_SUT0 (unsigned char)~_BV(4) /* Select start-up time */ -#define FUSE_SUT1 (unsigned char)~_BV(5) /* Select start-up time */ -#define FUSE_CKOUT (unsigned char)~_BV(6) /* Oscillator output option */ -#define FUSE_CKDIV8 (unsigned char)~_BV(7) /* Divide clock by 8 */ -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) /* EEPROM memory is preserved through chip erase */ -#define FUSE_WDTON (unsigned char)~_BV(4) /* Watchdog timer always on */ -#define FUSE_SPIEN (unsigned char)~_BV(5) /* Enable Serial programming and Data Downloading */ -#define FUSE_DWEN (unsigned char)~_BV(6) /* debugWIRE Enable */ -#define FUSE_RSTDISBL (unsigned char)~_BV(7) /* External Reset Diasble */ -#define HFUSE_DEFAULT (FUSE_SPIEN) - -/* Extended Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_PSCRV (unsigned char)~_BV(4) -#define FUSE_PSC0RB (unsigned char)~_BV(5) -#define FUSE_PSC2RB (unsigned char)~_BV(7) -#define EFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -#endif /* _AVR_IOPWM1_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io90pwm216.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io90pwm216.h deleted file mode 100644 index 8e7373b80..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io90pwm216.h +++ /dev/null @@ -1,1181 +0,0 @@ -/* Copyright (c) 2007, Atmel Corporation - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: io90pwm216.h,v 1.7.2.6 2008/10/17 23:27:45 arcanum Exp $ */ - -/* avr/io90pwm216.h - definitions for AT90PWM216 */ - -#ifndef _AVR_IO90PWM216_H_ -#define _AVR_IO90PWM216_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "io90pwm216.h" -#else -# error "Attempt to include more than one file." -#endif - -/* I/O registers */ - -/* Port B Input Pins Address */ -#define PINB _SFR_IO8(0x03) -#define PINB0 0 -#define PINB1 1 -#define PINB2 2 -#define PINB3 3 -#define PINB4 4 -#define PINB5 5 -#define PINB6 6 -#define PINB7 7 - -/* Port B Data Direction Register */ -#define DDRB _SFR_IO8(0x04) -#define DDB0 0 -#define DDB1 1 -#define DDB2 2 -#define DDB3 3 -#define DDB4 4 -#define DDB5 5 -#define DDB6 6 -#define DDB7 7 - -/* Port B Data Register */ -#define PORTB _SFR_IO8(0x05) -#define PB0 0 -#define PB1 1 -#define PB2 2 -#define PB3 3 -#define PB4 4 -#define PB5 5 -#define PB6 6 -#define PB7 7 - -/* Port C Input Pins Address */ -#define PINC _SFR_IO8(0x06) -#define PINC0 0 -#define PINC1 1 -#define PINC2 2 -#define PINC3 3 -#define PINC4 4 -#define PINC5 5 -#define PINC6 6 -#define PINC7 7 - -/* Port C Data Direction Register */ -#define DDRC _SFR_IO8(0x07) -#define DDC0 0 -#define DDC1 1 -#define DDC2 2 -#define DDC3 3 -#define DDC4 4 -#define DDC5 5 -#define DDC6 6 -#define DDC7 7 - -/* Port C Data Register */ -#define PORTC _SFR_IO8(0x08) -#define PC0 0 -#define PC1 1 -#define PC2 2 -#define PC3 3 -#define PC4 4 -#define PC5 5 -#define PC6 6 -#define PC7 7 - -/* Port D Input Pins Address */ -#define PIND _SFR_IO8(0x09) -#define PIND0 0 -#define PIND1 1 -#define PIND2 2 -#define PIND3 3 -#define PIND4 4 -#define PIND5 5 -#define PIND6 6 -#define PIND7 7 - -/* Port D Data Direction Register */ -#define DDRD _SFR_IO8(0x0A) -#define DDD0 0 -#define DDD1 1 -#define DDD2 2 -#define DDD3 3 -#define DDD4 4 -#define DDD5 5 -#define DDD6 6 -#define DDD7 7 - -/* Port D Data Register */ -#define PORTD _SFR_IO8(0x0B) -#define PD0 0 -#define PD1 1 -#define PD2 2 -#define PD3 3 -#define PD4 4 -#define PD5 5 -#define PD6 6 -#define PD7 7 - -/* Port E Input Pins Address */ -#define PINE _SFR_IO8(0x0C) -#define PINE0 0 -#define PINE1 1 -#define PINE2 2 - -/* Port E Data Direction Register */ -#define DDRE _SFR_IO8(0x0D) -#define DDE0 0 -#define DDE1 1 -#define DDE2 2 - -/* Port E Data Register */ -#define PORTE _SFR_IO8(0x0E) -#define PE0 0 -#define PE1 1 -#define PE2 2 - -/* Timer/Counter 0 Interrupt Flag Register */ -#define TIFR0 _SFR_IO8(0x15) -#define TOV0 0 /* Overflow Flag */ -#define OCF0A 1 /* Output Compare Flag 0A */ -#define OCF0B 2 /* Output Compare Flag 0B */ - -/* Timer/Counter1 Interrupt Flag Register */ -#define TIFR1 _SFR_IO8(0x16) -#define TOV1 0 /* Overflow Flag */ -#define OCF1A 1 /* Output Compare Flag 1A*/ -#define OCF1B 2 /* Output Compare Flag 1B*/ -#define ICF1 5 /* Input Capture Flag 1 */ - -/* General Purpose I/O Register 1 */ -#define GPIOR1 _SFR_IO8(0x19) -#define GPIOR10 0 -#define GPIOR11 1 -#define GPIOR12 2 -#define GPIOR13 3 -#define GPIOR14 4 -#define GPIOR15 5 -#define GPIOR16 6 -#define GPIOR17 7 - -/* General Purpose I/O Register 2 */ -#define GPIOR2 _SFR_IO8(0x1A) -#define GPIOR20 0 -#define GPIOR21 1 -#define GPIOR22 2 -#define GPIOR23 3 -#define GPIOR24 4 -#define GPIOR25 5 -#define GPIOR26 6 -#define GPIOR27 7 - -/* General Purpose I/O Register 3 */ -#define GPIOR3 _SFR_IO8(0x1B) -#define GPIOR30 0 -#define GPIOR31 1 -#define GPIOR32 2 -#define GPIOR33 3 -#define GPIOR34 4 -#define GPIOR35 5 -#define GPIOR36 6 -#define GPIOR37 7 - -/* External Interrupt Flag Register */ -#define EIFR _SFR_IO8(0x1C) -#define INTF0 0 -#define INTF1 1 -#define INTF2 2 -#define INTF3 3 - -/* External Interrupt Mask Register */ -#define EIMSK _SFR_IO8(0x1D) -#define INT0 0 /* External Interrupt Request 0 Enable */ -#define INT1 1 /* External Interrupt Request 1 Enable */ -#define INT2 2 /* External Interrupt Request 2 Enable */ -#define INT3 3 /* External Interrupt Request 3 Enable */ - -/* General Purpose I/O Register 0 */ -#define GPIOR0 _SFR_IO8(0x1E) -#define GPIOR00 0 -#define GPIOR01 1 -#define GPIOR02 2 -#define GPIOR03 3 -#define GPIOR04 4 -#define GPIOR05 5 -#define GPIOR06 6 -#define GPIOR07 7 - -/* EEPROM Control Register */ -#define EECR _SFR_IO8(0x1F) -#define EERE 0 /* EEPROM Read Enable */ -#define EEWE 1 /* EEPROM Write Enable */ -#define EEMWE 2 /* EEPROM Master Write Enable */ -#define EERIE 3 /* EEPROM Ready Interrupt Enable */ - -/* EEPROM Data Register */ -#define EEDR _SFR_IO8(0x20) -#define EEDR0 0 -#define EEDR1 1 -#define EEDR2 2 -#define EEDR3 3 -#define EEDR4 4 -#define EEDR5 5 -#define EEDR6 6 -#define EEDR7 7 - -/* The EEPROM Address Registers */ -#define EEAR _SFR_IO16(0x21) -#define EEARL _SFR_IO8(0x21) -#define EEAR0 0 -#define EEAR1 1 -#define EEAR2 2 -#define EEAR3 3 -#define EEAR4 4 -#define EEAR5 5 -#define EEAR6 6 -#define EEAR7 7 -#define EEARH _SFR_IO8(0x22) -#define EEAR8 0 -#define EEAR9 1 -#define EEAR10 2 -#define EEAR11 3 - -/* 6-char sequence denoting where to find the EEPROM registers in memory space. - Adresses denoted in hex syntax with uppercase letters. Used by the EEPROM - subroutines. - First two letters: EECR address. - Second two letters: EEDR address. - Last two letters: EEAR address. */ -#define __EEPROM_REG_LOCATIONS__ 1F2021 - -/* General Timer/Counter Control Register */ -#define GTCCR _SFR_IO8(0x23) -#define PSR10 0 /* Prescaler Reset Timer/Counter1 and Timer/Counter0 */ -#define ICPSEL1 6 /* Timer1 Input Capture Selection Bit */ -#define TSM 7 /* Timer/Counter Synchronization Mode */ - -/* Timer/Counter Control Register A */ -#define TCCR0A _SFR_IO8(0x24) -#define WGM00 0 /* Waveform Generation Mode */ -#define WGM01 1 /* Waveform Generation Mode */ -#define COM0B0 4 /* Compare Output Mode, Fast PWm */ -#define COM0B1 5 /* Compare Output Mode, Fast PWm */ -#define COM0A0 6 /* Compare Output Mode, Phase Correct PWM Mode */ -#define COM0A1 7 /* Compare Output Mode, Phase Correct PWM Mode */ - -/* Timer/Counter Control Register B */ -#define TCCR0B _SFR_IO8(0x25) -#define CS00 0 /* Clock Select */ -#define CS01 1 /* Clock Select */ -#define CS02 2 /* Clock Select */ -#define WGM02 3 /* Waveform Generation Mode */ -#define FOC0B 6 /* Force Output Compare B */ -#define FOC0A 7 /* Force Output Compare A */ - -/* Timer/Counter0 Register */ -#define TCNT0 _SFR_IO8(0x26) -#define TCNT00 0 -#define TCNT01 1 -#define TCNT02 2 -#define TCNT03 3 -#define TCNT04 4 -#define TCNT05 5 -#define TCNT06 6 -#define TCNT07 7 - -/* Timer/Counter0 Output Compare Register A */ -#define OCR0A _SFR_IO8(0x27) -#define OCR0A0 0 -#define OCR0A1 1 -#define OCR0A2 2 -#define OCR0A3 3 -#define OCR0A4 4 -#define OCR0A5 5 -#define OCR0A6 6 -#define OCR0A7 7 - -/* Timer/Counter0 Output Compare Register B */ -#define OCR0B _SFR_IO8(0x28) -#define OCR0B0 0 -#define OCR0B1 1 -#define OCR0B2 2 -#define OCR0B3 3 -#define OCR0B4 4 -#define OCR0B5 5 -#define OCR0B6 6 -#define OCR0B7 7 - -/* PLL Control and Status Register */ -#define PLLCSR _SFR_IO8(0x29) -#define PLOCK 0 /* PLL Lock Detector */ -#define PLLE 1 /* PLL Enable */ -#define PLLF 2 /* PLL Factor */ - -/* SPI Control Register */ -#define SPCR _SFR_IO8(0x2C) -#define SPR0 0 /* SPI Clock Rate Select 0 */ -#define SPR1 1 /* SPI Clock Rate Select 1 */ -#define CPHA 2 /* Clock Phase */ -#define CPOL 3 /* Clock polarity */ -#define MSTR 4 /* Master/Slave Select */ -#define DORD 5 /* Data Order */ -#define SPE 6 /* SPI Enable */ -#define SPIE 7 /* SPI Interrupt Enable */ - -/* SPI Status Register */ -#define SPSR _SFR_IO8(0x2D) -#define SPI2X 0 /* Double SPI Speed Bit */ -#define WCOL 6 /* Write Collision Flag */ -#define SPIF 7 /* SPI Interrupt Flag */ - -/* SPI Data Register */ -#define SPDR _SFR_IO8(0x2E) -#define SPD0 0 -#define SPD1 1 -#define SPD2 2 -#define SPD3 3 -#define SPD4 4 -#define SPD5 5 -#define SPD6 6 -#define SPD7 7 - -/* Analog Comparator Status Register */ -#define ACSR _SFR_IO8(0x30) -#define AC0O 0 /* Analog Comparator 0 Output Bit */ -#define AC1O 1 /* Analog Comparator 1 Output Bit */ -#define AC2O 2 /* Analog Comparator 2 Output Bit */ -#define AC0IF 4 /* Analog Comparator 0 Interrupt Flag Bit */ -#define AC1IF 5 /* Analog Comparator 1 Interrupt Flag Bit */ -#define AC2IF 6 /* Analog Comparator 2 Interrupt Flag Bit */ -#define ACCKDIV 7 /* Analog Comparator Clock Divider */ - -/* Sleep Mode Control Register */ -#define SMCR _SFR_IO8(0x33) -#define SE 0 /* Sleep Enable */ -#define SM0 1 /* Sleep Mode Select bit0 */ -#define SM1 2 /* Sleep Mode Select bit1 */ -#define SM2 3 /* Sleep Mode Select bit2 */ - -/* MCU Status Register */ -#define MCUSR _SFR_IO8(0x34) -#define PORF 0 /* Power-on reset flag */ -#define EXTRF 1 /* External Reset Flag */ -#define BORF 2 /* Brown-out Reset Flag */ -#define WDRF 3 /* Watchdog Reset Flag */ - -/* MCU Control Register */ -#define MCUCR _SFR_IO8(0x35) -#define IVCE 0 /* Interrupt Vector Change Enable */ -#define IVSEL 1 /* Interrupt Vector Select */ -#define PUD 4 /* Pull-up disable */ -#define SPIPS 7 /* SPI Pin Select */ - -/* Store Program Memory Control Register */ -#define SPMCSR _SFR_IO8(0x37) -#define SPMEN 0 /* Store Program Memory Enable */ -#define PGERS 1 /* Page Erase */ -#define PGWRT 2 /* Page Write */ -#define BLBSET 3 /* Boot Lock Bit Set */ -#define RWWSRE 4 /* Read While Write section read enable */ -#define RWWSB 6 /* Read While Write Section Busy */ -#define SPMIE 7 /* SPM Interrupt Enable */ - -/* Watchdog Timer Control Register */ -#define WDTCSR _SFR_MEM8(0x60) -#define WDP0 0 /* Watchdog Timer Prescaler bit0 */ -#define WDP1 1 /* Watchdog Timer Prescaler bit1 */ -#define WDP2 2 /* Watchdog Timer Prescaler bit2 */ -#define WDE 3 /* Watchdog Enable */ -#define WDCE 4 /* Watchdog Change Enable */ -#define WDP3 5 /* Watchdog Timer Prescaler bit3 */ -#define WDIE 6 /* Watchdog Timeout Interrupt Enable */ -#define WDIF 7 /* Watchdog Timeout Interrupt Flag */ - -/* Clock Prescaler Register */ -#define CLKPR _SFR_MEM8(0x61) -#define CLKPS0 0 /* Clock Prescaler Select bit0 */ -#define CLKPS1 1 /* Clock Prescaler Select bit1 */ -#define CLKPS2 2 /* Clock Prescaler Select bit2 */ -#define CLKPS3 3 /* Clock Prescaler Select bit3 */ -#define CLKPCE 7 /* Clock Prescaler Change Enable */ - -/* Power Reduction Register */ -#define PRR _SFR_MEM8(0x64) -#define PRADC 0 /* Power Reduction ADC */ -#define PRUSART 1 /* Power Reduction USART */ -#define PRSPI 2 /* Power Reduction Serial Peripheral Interface */ -#define PRTIM0 3 /* Power Reduction Timer/Counter0 */ -#define PRTIM1 4 /* Power Reduction Timer/Counter1 */ -#define PRPSC0 5 /* Power Reduction PSC0 */ -#define PRPSC1 6 /* Power Reduction PSC1 */ -#define PRPSC2 7 /* Power Reduction PSC2 */ - -/* Oscillator Calibration Value */ -#define OSCCAL _SFR_MEM8(0x66) -#define CAL0 0 -#define CAL1 1 -#define CAL2 2 -#define CAL3 3 -#define CAL4 4 -#define CAL5 5 -#define CAL6 6 - -/* External Interrupt Control Register A */ -#define EICRA _SFR_MEM8(0x69) -#define ISC00 0 -#define ISC01 1 -#define ISC10 2 -#define ISC11 3 -#define ISC20 4 -#define ISC21 5 -#define ISC30 6 -#define ISC31 7 - -/* Timer/Counter0 Interrupt Mask Register */ -#define TIMSK0 _SFR_MEM8(0x6E) -#define TOIE0 0 /* Overflow Interrupt Enable */ -#define OCIE0A 1 /* Output Compare Match A Interrupt Enable */ -#define OCIE0B 2 /* Output Compare Match B Interrupt Enable */ - -/* Timer/Counter1 Interrupt Mask Register */ -#define TIMSK1 _SFR_MEM8(0x6F) -#define TOIE1 0 /* Overflow Interrupt Enable */ -#define OCIE1A 1 /* Output Compare Match A Interrupt Enable */ -#define OCIE1B 2 /* Output Compare Match B Interrupt Enable */ -#define ICIE1 5 /* Input Capture Interrupt Enable */ - -/* Amplifier 0 Control and Status register */ -#define AMP0CSR _SFR_MEM8(0x76) -#define AMP0TS0 0 -#define AMP0TS1 1 -#define AMP0G0 4 -#define AMP0G1 5 -#define AMP0IS 6 -#define AMP0EN 7 - -/* Amplifier 1 Control and Status register */ -#define AMP1CSR _SFR_MEM8(0x77) -#define AMP1TS0 0 -#define AMP1TS1 1 -#define AMP1G0 4 -#define AMP1G1 5 -#define AMP1IS 6 -#define AMP1EN 7 - -/* ADC Result Data Register */ -#ifndef __ASSEMBLER__ -#define ADC _SFR_MEM16(0x78) -#endif -#define ADCW _SFR_MEM16(0x78) -#define ADCL _SFR_MEM8(0x78) -#define ADCH _SFR_MEM8(0x79) - -/* ADC Control and Status Register A */ -#define ADCSRA _SFR_MEM8(0x7A) -#define ADPS0 0 /* ADC Prescaler Select bit0 */ -#define ADPS1 1 /* ADC Prescaler Select bit1 */ -#define ADPS2 2 /* ADC Prescaler Select bit2 */ -#define ADIE 3 /* ADC Interrupt Enable */ -#define ADIF 4 /* ADC Interrupt Flag */ -#define ADATE 5 /* ADC Auto Trigger Enable */ -#define ADSC 6 /* ADC Start Conversion */ -#define ADEN 7 /* ADC Enable */ - -/* ADC Control and Status Register B */ -#define ADCSRB _SFR_MEM8(0x7B) -#define ADTS0 0 /* ADC Auto Trigger Source 0 */ -#define ADTS1 1 /* ADC Auto Trigger Source 1 */ -#define ADTS2 2 /* ADC Auto Trigger Source 2 */ -#define ADTS3 3 /* ADC Auto Trigger Source 3 */ -#define ADHSM 7 /* ADC High Speed Mode */ - -/* ADC multiplexer Selection Register */ -#define ADMUX _SFR_MEM8(0x7C) -#define MUX0 0 /* Analog Channel and Gain Selection bit0 */ -#define MUX1 1 /* Analog Channel and Gain Selection bit1 */ -#define MUX2 2 /* Analog Channel and Gain Selection bit2 */ -#define MUX3 3 /* Analog Channel and Gain Selection bit3 */ -#define ADLAR 5 /* Left Adjust Result */ -#define REFS0 6 /* Reference Selection bit0 */ -#define REFS1 7 /* Reference Selection bit1 */ - -/* Digital Input Disable Register 0 */ -#define DIDR0 _SFR_MEM8(0x7E) -#define ADC0D 0 /* ADC0 Digital input Disable */ -#define ADC1D 1 /* ADC1 Digital input Disable */ -#define ADC2D 2 /* ADC2 Digital input Disable */ -#define ADC3D 3 /* ADC3 Digital input Disable */ -#define ADC4D 4 /* ADC4 Digital input Disable */ -#define ADC5D 5 /* ADC5 Digital input Disable */ -#define ADC6D 6 /* ADC6 Digital input Disable */ -#define ADC7D 7 /* ADC7 Digital input Disable */ - -/* Digital Input Disable Register 1 */ -#define DIDR1 _SFR_MEM8(0x7F) -#define ADC8D 0 /* ADC8 Digital input Disable */ -#define ADC9D 1 /* ADC9 Digital input Disable */ -#define ADC10D 2 /* ADC10 Digital input Disable */ -#define AMP0ND 3 -#define AMP0PD 4 -#define ACMP0D 5 - -/* Timer/Counter1 Control Register A */ -#define TCCR1A _SFR_MEM8(0x80) -#define WGM10 0 /* Waveform Generation Mode */ -#define WGM11 1 /* Waveform Generation Mode */ -#define COM1B0 4 /* Compare Output Mode 1B, bit 0 */ -#define COM1B1 5 /* Compare Output Mode 1B, bit 1 */ -#define COM1A0 6 /* Comparet Ouput Mode 1A, bit 0 */ -#define COM1A1 7 /* Comparet Ouput Mode 1A, bit 1 */ - -/* Timer/Counter1 Control Register B */ -#define TCCR1B _SFR_MEM8(0x81) -#define CS10 0 /* Prescaler source of Timer/Counter 1 */ -#define CS11 1 /* Prescaler source of Timer/Counter 1 */ -#define CS12 2 /* Prescaler source of Timer/Counter 1 */ -#define WGM12 3 /* Waveform Generation Mode */ -#define WGM13 4 /* Waveform Generation Mode */ -#define ICES1 6 /* Input Capture 1 Edge Select */ -#define ICNC1 7 /* Input Capture 1 Noise Canceler */ - -/* Timer/Counter1 Control Register C */ -#define TCCR1C _SFR_MEM8(0x82) -#define FOC1B 6 /* Force Output Compare for Channel B */ -#define FOC1A 7 /* Force Output Compare for Channel A */ - -/* Timer/Counter1 */ -#define TCNT1 _SFR_MEM16(0x84) -#define TCNT1L _SFR_MEM8(0x84) -#define TCNT10 0 -#define TCNT11 1 -#define TCNT12 2 -#define TCNT13 3 -#define TCNT14 4 -#define TCNT15 5 -#define TCNT16 6 -#define TCNT17 7 -#define TCNT1H _SFR_MEM8(0x85) -#define TCNT18 0 -#define TCNT19 1 -#define TCNT110 2 -#define TCNT111 3 -#define TCNT112 4 -#define TCNT113 5 -#define TCNT114 6 -#define TCNT115 7 - -/* Input Capture Register 1 */ -#define ICR1 _SFR_MEM16(0x86) -#define ICR1L _SFR_MEM8(0x86) -#define ICR17 7 -#define ICR16 6 -#define ICR15 5 -#define ICR14 4 -#define ICR13 3 -#define ICR12 2 -#define ICR11 1 -#define ICR10 0 -#define ICR1H _SFR_MEM8(0x87) -#define ICR115 7 -#define ICR114 6 -#define ICR113 5 -#define ICR112 4 -#define ICR111 3 -#define ICR110 2 -#define ICR19 1 -#define ICR18 0 - -/* Output Compare Register 1 A */ -#define OCR1A _SFR_MEM16(0x88) -#define OCR1AL _SFR_MEM8(0x88) -#define OCR1A0 0 -#define OCR1A1 1 -#define OCR1A2 2 -#define OCR1A3 3 -#define OCR1A4 4 -#define OCR1A5 5 -#define OCR1A6 6 -#define OCR1A7 7 -#define OCR1AH _SFR_MEM8(0x89) -#define OCR1A8 0 -#define OCR1A9 1 -#define OCR1A10 2 -#define OCR1A11 3 -#define OCR1A12 4 -#define OCR1A13 5 -#define OCR1A14 6 -#define OCR1A15 7 - -/* Output Compare Register 1 B */ -#define OCR1B _SFR_MEM16(0x8A) -#define OCR1BL _SFR_MEM8(0x8A) -#define OCR1B0 0 -#define OCR1B1 1 -#define OCR1B2 2 -#define OCR1B3 3 -#define OCR1B4 4 -#define OCR1B5 5 -#define OCR1B6 6 -#define OCR1B7 7 -#define OCR1BH _SFR_MEM8(0x8B) -#define OCR1B8 0 -#define OCR1B9 1 -#define OCR1B10 2 -#define OCR1B11 3 -#define OCR1B12 4 -#define OCR1B13 5 -#define OCR1B14 6 -#define OCR1B15 7 - -/* PSC0 Interrupt Flag Register */ -#define PIFR0 _SFR_MEM8(0xA0) -#define PEOP0 0 /* End Of PSC0 Interrupt */ -#define PRN00 1 /* PSC0 Ramp Number bit0 */ -#define PRN01 2 /* PSC0 Ramp Number bit1 */ -#define PEV0A 3 /* PSC0 External Event A Interrupt */ -#define PEV0B 4 /* PSC0 External Event B Interrupt */ -#define PSEI0 5 /* PSC0 Synchro Error Interrupt */ -#define POAC0A 6 /* PSC0 Output A Activity */ -#define POAC0B 7 /* PSC0 Output B Activity */ - -/* PSC0 Interrupt Mask Register */ -#define PIM0 _SFR_MEM8(0xA1) -#define PEOPE0 0 /* PSC0 End Of Cycle Interrupt Enable */ -#define PEVE0A 3 /* PSC0 External Event A Interrupt Enable */ -#define PEVE0B 4 /* PSC0 External Event B Interrupt Enable */ -#define PSEIE0 5 /* PSC0 Synchro Error Interrupt Enable */ - -/* PSC1 Interrupt Flag Register */ -#define PIFR1 _SFR_MEM8(0xA2) - -/* PSC1 Interrupt Mask Register */ -#define PIM1 _SFR_MEM8(0xA3) - -/* PSC2 Interrupt Flag Register */ -#define PIFR2 _SFR_MEM8(0xA4) -#define PEOP2 0 /* End Of PSC2 Interrupt */ -#define PRN20 1 /* PSC2 Ramp Number bit0 */ -#define PRN21 2 /* PSC2 Ramp Number bit1 */ -#define PEV2A 3 /* PSC2 External Event A Interrupt */ -#define PEV2B 4 /* PSC2 External Event B Interrupt */ -#define PSEI2 5 /* PSC2 Synchro Error Interrupt */ -#define POAC2A 6 /* PSC2 Output A Activity */ -#define POAC2B 7 /* PSC2 Output B Activity */ - -/* PSC2 Interrupt Mask Register */ -#define PIM2 _SFR_MEM8(0xA5) -#define PEOPE2 0 /* PSC2 End Of Cycle Interrupt Enable */ -#define PEVE2A 3 /* PSC2 External Event A Interrupt Enable */ -#define PEVE2B 4 /* PSC2 External Event B Interrupt Enable */ -#define PSEIE2 5 /* PSC2 Synchro Error Interrupt Enable */ - -/* Digital to Analog Conversion Control Register */ -#define DACON _SFR_MEM8(0xAA) -#define DAEN 0 /* Digital to Analog Enable bit */ -#define DAOE 1 /* Digital to Analog Output Enable bit */ -#define DALA 2 /* Digital to Analog Left Adjust */ -#define DATS0 4 /* DAC Trigger Selection bit0 */ -#define DATS1 5 /* DAC Trigger Selection bit1 */ -#define DATS2 6 /* DAC Trigger Selection bit2 */ -#define DAATE 7 /* DAC Auto Trigger Enable bit */ - -/* Digital to Analog Converter input Register */ -#define DAC _SFR_MEM16(0xAB) -#define DACL _SFR_MEM8(0xAB) -#define DACH _SFR_MEM8(0xAC) - -/* Analog Comparator 0 Control Register */ -#define AC0CON _SFR_MEM8(0xAD) -#define AC0M0 0 /* Analog Comparator 0 Multiplexer register bit0 */ -#define AC0M1 1 /* Analog Comparator 0 Multiplexer register bit1 */ -#define AC0M2 2 /* Analog Comparator 0 Multiplexer register bit2 */ -#define AC0IS0 4 /* Analog Comparator 0 Interrupt Select bit0 */ -#define AC0IS1 5 /* Analog Comparator 0 Interrupt Select bit1 */ -#define AC0IE 6 /* Analog Comparator 0 Interrupt Enable bit */ -#define AC0EN 7 /* Analog Comparator 0 Enable Bit */ - -/* Analog Comparator 1 Control Register */ -#define AC1CON _SFR_MEM8(0xAE) -#define AC1M0 0 /* Analog Comparator 1 Multiplexer register bit0 */ -#define AC1M1 1 /* Analog Comparator 1 Multiplexer register bit1 */ -#define AC1M2 2 /* Analog Comparator 1 Multiplexer register bit2 */ -#define AC1ICE 3 /* Analog Comparator 1 Interrupt Capture Enable bit */ -#define AC1IS0 4 /* Analog Comparator 1 Interrupt Select bit0 */ -#define AC1IS1 5 /* Analog Comparator 1 Interrupt Select bit1 */ -#define AC1IE 6 /* Analog Comparator 1 Interrupt Enable bit */ -#define AC1EN 7 /* Analog Comparator 1 Enable Bit */ - -/* Analog Comparator 2 Control Register */ -#define AC2CON _SFR_MEM8(0xAF) -#define AC2M0 0 /* Analog Comparator 2 Multiplexer register bit0 */ -#define AC2M1 1 /* Analog Comparator 2 Multiplexer register bit1 */ -#define AC2M2 2 /* Analog Comparator 2 Multiplexer register bit2 */ -#define AC2IS0 4 /* Analog Comparator 2 Interrupt Select bit0 */ -#define AC2IS1 5 /* Analog Comparator 2 Interrupt Select bit1 */ -#define AC2IE 6 /* Analog Comparator 2 Interrupt Enable bit */ -#define AC2EN 7 /* Analog Comparator 2 Enable Bit */ - -/* USART Control and Status Register A */ -#define UCSRA _SFR_MEM8(0xC0) -#define MPCM 0 /* Multi-processor Communication Mode */ -#define U2X 1 /* Double the USART Transmission Speed */ -#define UPE 2 /* USART Parity Error */ -#define DOR 3 /* Data OverRun */ -#define FE 4 /* Frame Error */ -#define UDRE 5 /* USART Data Register Empty */ -#define TXC 6 /* USART Transmit Complete */ -#define RXC 7 /* USART Receive Complete */ - -/* USART Control and Status Register B */ -#define UCSRB _SFR_MEM8(0xC1) -#define TXB8 0 /* Transmit Data Bit 8 */ -#define RXB8 1 /* Receive Data Bit 8 */ -#define UCSZ2 2 /* Character Size */ -#define TXEN 3 /* Transmitter Enable */ -#define RXEN 4 /* Receiver Enable */ -#define UDRIE 5 /* USART Data Register Empty Interrupt Enable */ -#define TXCIE 6 /* TX Complete Interrupt Enable */ -#define RXCIE 7 /* RX Complete Interrupt Enable */ - -/* USART Control and Status Register C */ -#define UCSRC _SFR_MEM8(0xC2) -#define UCPOL 0 /* Clock Polarity */ -#define UCSZ0 1 /* Character Size bit0 */ -#define UCSZ1 2 /* Character Size bit1 */ -#define USBS 3 /* Stop Bit Select */ -#define UPM0 4 /* Parity Mode bit0 */ -#define UPM1 5 /* Parity Mode bit1 */ -#define UMSEL 6 /* USART Mode Select */ - -/* USART Baud Rate Register */ -#define UBRR _SFR_MEM16(0xC4) -#define UBRRL _SFR_MEM8(0xC4) -#define UBRRH _SFR_MEM8(0xC5) - -/* USART I/O Data Register */ -#define UDR _SFR_MEM8(0xC6) - -/* EUSART Control and Status Register A */ -#define EUCSRA _SFR_MEM8(0xC8) -#define URxS0 0 /* EUSART Receive Character Size bit0 */ -#define URxS1 1 /* EUSART Receive Character Size bit1 */ -#define URxS2 2 /* EUSART Receive Character Size bit2 */ -#define URxS3 3 /* EUSART Receive Character Size bit3 */ -#define UTxS0 4 /* EUSART Transmit Character Size bit0 */ -#define UTxS1 5 /* EUSART Transmit Character Size bit1 */ -#define UTxS2 6 /* EUSART Transmit Character Size bit2 */ -#define UTxS3 7 /* EUSART Transmit Character Size bit3 */ - -/* EUSART Control and Status Register B */ -#define EUCSRB _SFR_MEM8(0xC9) -#define BODR 0 /* Bit Order */ -#define EMCH 1 /* Manchester mode */ -#define EUSBS 3 /* EUSBS Enable Bit */ -#define EUSART 4 /* EUSART Enable Bit */ - -/* EUSART Control and Status Register C */ -#define EUCSRC _SFR_MEM8(0xCA) -#define STP0 0 /* Stop bits values bit0 */ -#define STP1 1 /* Stop bits values bit1 */ -#define F1617 2 -#define FEM 3 /* Frame Error Manchester */ - -/* Manchester receiver Baud Rate Registers */ -#define MUBRR _SFR_MEM16(0xCC) -#define MUBRRL _SFR_MEM8(0xCC) -#define MUBRRH _SFR_MEM8(0xCD) - -/* EUSART I/O Data Register */ -#define EUDR _SFR_MEM8(0xCE) - -/* PSC 0 Synchro and Output Configuration */ -#define PSOC0 _SFR_MEM8(0xD0) -#define POEN0A 0 /* PSC 0 OUT Part A Output Enable */ -#define POEN0B 2 /* PSC 0 OUT Part B Output Enable */ -#define PSYNC00 4 /* Synchronization Out for ADC Selection bit0 */ -#define PSYNC01 5 /* Synchronization Out for ADC Selection bit1 */ - -/* Output Compare SA Registers */ -#define OCR0SA _SFR_MEM16(0xD2) -#define OCR0SAL _SFR_MEM8(0xD2) -#define OCR0SAH _SFR_MEM8(0xD3) - -/* Output Compare RA Registers */ -#define OCR0RA _SFR_MEM16(0xD4) -#define OCR0RAL _SFR_MEM8(0xD4) -#define OCR0RAH _SFR_MEM8(0xD5) - -/* Output Compare SB Registers */ -#define OCR0SB _SFR_MEM16(0xD6) -#define OCR0SBL _SFR_MEM8(0xD6) -#define OCR0SBH _SFR_MEM8(0xD7) - -/* Output Compare RB Registers */ -#define OCR0RB _SFR_MEM16(0xD8) -#define OCR0RBL _SFR_MEM8(0xD8) -#define OCR0RBH _SFR_MEM8(0xD9) - -/* PSC 0 Configuration Register */ -#define PCNF0 _SFR_MEM8(0xDA) -#define PCLKSEL0 1 /* PSC 0 Input Clock Select */ -#define POP0 2 /* PSC 0 Output Polarity */ -#define PMODE00 3 /* PSC 0 Mode bit0 */ -#define PMODE01 4 /* PSC 0 Mode bit1 */ -#define PLOCK0 5 /* PSC 0 Lock */ -#define PALOCK0 6 /* PSC 0 Autolock */ -#define PFIFTY0 7 /* PSC 0 Fifty */ - -/* PSC 0 Control Register */ -#define PCTL0 _SFR_MEM8(0xDB) -#define PRUN0 0 /* PSC 0 Run */ -#define PCCYC0 1 /* PSC 0 Complete Cycle */ -#define PARUN0 2 /* PSC 0 Autorun */ -#define PAOC0A 3 /* PSC 0 Asynchronous Output Control A */ -#define PAOC0B 4 /* PSC 0 Asynchronous Output Control B */ -#define PBFM0 5 /* Balance Flank Width Modulation */ -#define PPRE00 6 /* PSC 0 Prescaler Select bit0 */ -#define PPRE01 7 /* PSC 0 Prescaler Select bit1 */ - -/* PSC 0 Input A Control Register */ -#define PFRC0A _SFR_MEM8(0xDC) -#define PRFM0A0 0 /* PSC 0 Fault Mode bit0 */ -#define PRFM0A1 1 /* PSC 0 Fault Mode bit1 */ -#define PRFM0A2 2 /* PSC 0 Fault Mode bit2 */ -#define PRFM0A3 3 /* PSC 0 Fault Mode bit3 */ -#define PFLTE0A 4 /* PSC 0 Filter Enable on Input Part A */ -#define PELEV0A 5 /* PSC 0 Edge Level Selector of Input Part A */ -#define PISEL0A 6 /* PSC 0 Input Select for Part A */ -#define PCAE0A 7 /* PSC 0 Capture Enable Input Part A */ - -/* PSC 0 Input B Control Register */ -#define PFRC0B _SFR_MEM8(0xDD) -#define PRFM0B0 0 /* PSC 0 Fault Mode bit0 */ -#define PRFM0B1 1 /* PSC 0 Fault Mode bit1 */ -#define PRFM0B2 2 /* PSC 0 Fault Mode bit2 */ -#define PRFM0B3 3 /* PSC 0 Fault Mode bit3 */ -#define PFLTE0B 4 /* PSC 0 Filter Enable on Input Part B */ -#define PELEV0B 5 /* PSC 0 Edge Level Selector of Input Part B */ -#define PISEL0B 6 /* PSC 0 Input Select for Part B */ -#define PCAE0B 7 /* PSC 0 Capture Enable Input Part B */ - -/* PSC 0 Input Capture Registers */ -#define PICR0 _SFR_MEM16(0xDE) -#define PICR0L _SFR_MEM8(0xDE) -#define PICR0H _SFR_MEM8(0xDF) -#define PCST0 7 /* PSC Capture Software Trig bit */ - -/* PSC 1 Synchro and Output Configuration */ -#define PSOC1 _SFR_MEM8(0xE0) - -/* Output Compare SA Registers */ -#define OCR1SA _SFR_MEM16(0xE2) -#define OCR1SAL _SFR_MEM8(0xE2) -#define OCR1SAH _SFR_MEM8(0xE3) - -/* Output Compare RA Registers */ -#define OCR1RA _SFR_MEM16(0xE4) -#define OCR1RAL _SFR_MEM8(0xE4) -#define OCR1RAH _SFR_MEM8(0xE5) - -/* Output Compare SB Registers */ -#define OCR1SB _SFR_MEM16(0xE6) -#define OCR1SBL _SFR_MEM8(0xE6) -#define OCR1SBH _SFR_MEM8(0xE7) - -/* Output Compare RB Registers */ -#define OCR1RB _SFR_MEM16(0xE8) -#define OCR1RBL _SFR_MEM8(0xE8) -#define OCR1RBH _SFR_MEM8(0xE9) - -/* PSC 1 Configuration Register */ -#define PCNF1 _SFR_MEM8(0xEA) - -/* PSC 1 Control Register */ -#define PCTL1 _SFR_MEM8(0xEB) - -/* PSC 1 Input A Control Register */ -#define PFRC1A _SFR_MEM8(0xEC) - -/* PSC 1 Input B Control Register */ -#define PFRC1B _SFR_MEM8(0xED) - -/* PSC 1 Input Capture Registers */ -#define PICR1 _SFR_MEM16(0xEE) -#define PICR1L _SFR_MEM8(0xEE) -#define PICR1H _SFR_MEM8(0xEF) - -/* PSC 2 Synchro and Output Configuration */ -#define PSOC2 _SFR_MEM8(0xF0) -#define POEN2A 0 /* PSC 2 OUT Part A Output Enable */ -#define POEN2C 1 /* PSCOUT22 Output Enable */ -#define POEN2B 2 /* PSC 2 OUT Part B Output Enable */ -#define POEN2D 3 /* PSCOUT23 Output Enable */ -#define PSYNC20 4 /* Synchronization Out for ADC Selection bit0 */ -#define PSYNC21 5 /* Synchronization Out for ADC Selection bit1 */ -#define POS22 6 /* PSCOUT22 Selection */ -#define POS23 7 /* PSCOUT23 Selection */ - -/* PSC 2 Output Matrix */ -#define POM2 _SFR_MEM8(0xF1) -#define POMV2A0 0 /* Output Matrix Output A Ramp 0 */ -#define POMV2A1 1 /* Output Matrix Output A Ramp 1 */ -#define POMV2A2 2 /* Output Matrix Output A Ramp 2 */ -#define POMV2A3 3 /* Output Matrix Output A Ramp 3 */ -#define POMV2B0 4 /* Output Matrix Output B Ramp 0 */ -#define POMV2B1 5 /* Output Matrix Output B Ramp 1 */ -#define POMV2B2 6 /* Output Matrix Output B Ramp 2 */ -#define POMV2B3 7 /* Output Matrix Output B Ramp 3 */ - -/* Output Compare SA Registers */ -#define OCR2SA _SFR_MEM16(0xF2) -#define OCR2SAL _SFR_MEM8(0xF2) -#define OCR2SAH _SFR_MEM8(0xF3) - -/* Output Compare RA Registers */ -#define OCR2RA _SFR_MEM16(0xF4) -#define OCR2RAL _SFR_MEM8(0xF4) -#define OCR2RAH _SFR_MEM8(0xF5) - -/* Output Compare SB Registers */ -#define OCR2SB _SFR_MEM16(0xF6) -#define OCR2SBL _SFR_MEM8(0xF6) -#define OCR2SBH _SFR_MEM8(0xF7) - -/* Output Compare RB Registers */ -#define OCR2RB _SFR_MEM16(0xF8) -#define OCR2RBL _SFR_MEM8(0xF8) -#define OCR2RBH _SFR_MEM8(0xF9) - -/* PSC 2 Configuration Register */ -#define PCNF2 _SFR_MEM8(0xFA) -#define POME2 0 /* PSC 2 Output Matrix Enable */ -#define PCLKSEL2 1 /* PSC 2 Input Clock Select */ -#define POP2 2 /* PSC 2 Output Polarity */ -#define PMODE20 3 /* PSC 2 Mode bit0 */ -#define PMODE21 4 /* PSC 2 Mode bit1 */ -#define PLOCK2 5 /* PSC 2 Lock */ -#define PALOCK2 6 /* PSC 2 Autolock */ -#define PFIFTY2 7 /* PSC 2 Fifty */ - -/* PSC 2 Control Register */ -#define PCTL2 _SFR_MEM8(0xFB) -#define PRUN2 0 /* PSC 2 Run */ -#define PCCYC2 1 /* PSC 2 Complete Cycle */ -#define PARUN2 2 /* PSC 2 Autorun */ -#define PAOC2A 3 /* PSC 2 Asynchronous Output Control A */ -#define PAOC2B 4 /* PSC 2 Asynchronous Output Control B */ -#define PBFM2 5 /* Balance Flank Width Modulation */ -#define PPRE20 6 /* PSC 2 Prescaler Select bit0 */ -#define PPRE21 7 /* PSC 2 Prescaler Select bit1 */ - -/* PSC 2 Input A Control Register */ -#define PFRC2A _SFR_MEM8(0xFC) -#define PRFM2A0 0 /* PSC 2 Fault Mode bit0 */ -#define PRFM2A1 1 /* PSC 2 Fault Mode bit1 */ -#define PRFM2A2 2 /* PSC 2 Fault Mode bit2 */ -#define PRFM2A3 3 /* PSC 2 Fault Mode bit3 */ -#define PFLTE2A 4 /* PSC 2 Filter Enable on Input Part A */ -#define PELEV2A 5 /* PSC 2 Edge Level Selector of Input Part A */ -#define PISEL2A 6 /* PSC 2 Input Select for Part A */ -#define PCAE2A 7 /* PSC 2 Capture Enable Input Part A */ - -/* PSC 2 Input B Control Register */ -#define PFRC2B _SFR_MEM8(0xFD) -#define PRFM2B0 0 /* PSC 2 Fault Mode bit0 */ -#define PRFM2B1 1 /* PSC 2 Fault Mode bit1 */ -#define PRFM2B2 2 /* PSC 2 Fault Mode bit2 */ -#define PRFM2B3 3 /* PSC 2 Fault Mode bit3 */ -#define PFLTE2B 4 /* PSC 2 Filter Enable on Input Part B */ -#define PELEV2B 5 /* PSC 2 Edge Level Selector of Input Part B */ -#define PISEL2B 6 /* PSC 2 Input Select for Part B */ -#define PCAE2B 7 /* PSC 2 Capture Enable Input Part B */ - -/* PSC 2 Input Capture Registers */ -#define PICR2 _SFR_MEM16(0xFE) -#define PICR2L _SFR_MEM8(0xFE) -#define PICR2H _SFR_MEM8(0xFF) -#define PCST2 7 /* PSC Capture Software Trig bit */ - - -/* Interrupt Vectors */ -/* Interrupt 0 is the reset vector. */ - -/* PSC2 Capture Event */ -#define PSC2_CAPT_vect _VECTOR(1) - -/* PSC2 End Cycle */ -#define PSC2_EC_vect _VECTOR(2) - -/* PSC1 Capture Event */ -#define PSC1_CAPT_vect _VECTOR(3) - -/* PSC1 End Cycle */ -#define PSC1_EC_vect _VECTOR(4) - -/* PSC0 Capture Event */ -#define PSC0_CAPT_vect _VECTOR(5) - -/* PSC0 End Cycle */ -#define PSC0_EC_vect _VECTOR(6) - -/* Analog Comparator 0 */ -#define ANALOG_COMP_0_vect _VECTOR(7) - -/* Analog Comparator 1 */ -#define ANALOG_COMP_1_vect _VECTOR(8) - -/* Analog Comparator 2 */ -#define ANALOG_COMP_2_vect _VECTOR(9) - -/* External Interrupt Request 0 */ -#define INT0_vect _VECTOR(10) - -/* Timer/Counter1 Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(11) - -/* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPA_vect _VECTOR(12) - -/* Timer/Counter Compare Match B */ -#define TIMER1_COMPB_vect _VECTOR(13) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(15) - -/* Timer/Counter0 Compare Match A */ -#define TIMER0_COMP_A_vect _VECTOR(16) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(17) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(18) - -/* External Interrupt Request 1 */ -#define INT1_vect _VECTOR(19) - -/* SPI Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(20) - -/* USART, Rx Complete */ -#define USART_RX_vect _VECTOR(21) - -/* USART Data Register Empty */ -#define USART_UDRE_vect _VECTOR(22) - -/* USART, Tx Complete */ -#define USART_TX_vect _VECTOR(23) - -/* External Interrupt Request 2 */ -#define INT2_vect _VECTOR(24) - -/* Watchdog Timeout Interrupt */ -#define WDT_vect _VECTOR(25) - -/* EEPROM Ready */ -#define EE_READY_vect _VECTOR(26) - -/* Timer Counter 0 Compare Match B */ -#define TIMER0_COMPB_vect _VECTOR(27) - -/* External Interrupt Request 3 */ -#define INT3_vect _VECTOR(28) - -/* Store Program Memory Read */ -#define SPM_READY_vect _VECTOR(31) - -#define _VECTORS_SIZE (4 * 32) - -/* Constants */ - -#define RAMEND 0x4FF -#define XRAMSIZE 0 -#define XRAMEND (RAMEND + XRAMSIZE) -#define E2END 0x1FF -#define E2PAGESIZE 4 -#define FLASHEND 0x3FFF -#define SPM_PAGESIZE 128 - - -/* Fuse Information */ - -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) /* Select Clock Source */ -#define FUSE_CKSEL1 (unsigned char)~_BV(1) /* Select Clock Source */ -#define FUSE_CKSEL2 (unsigned char)~_BV(2) /* Select Clock Source */ -#define FUSE_CKSEL3 (unsigned char)~_BV(3) /* Select Clock Source */ -#define FUSE_SUT0 (unsigned char)~_BV(4) /* Select start-up time */ -#define FUSE_SUT1 (unsigned char)~_BV(5) /* Select start-up time */ -#define FUSE_CKOUT (unsigned char)~_BV(6) /* Oscillator output option */ -#define FUSE_CKDIV8 (unsigned char)~_BV(7) /* Divide clock by 8 */ -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) /* EEPROM memory is preserved through chip erase */ -#define FUSE_WDTON (unsigned char)~_BV(4) /* Watchdog timer always on */ -#define FUSE_SPIEN (unsigned char)~_BV(5) /* Enable Serial programming and Data Downloading */ -#define FUSE_DWEN (unsigned char)~_BV(6) /* debugWIRE Enable */ -#define FUSE_RSTDISBL (unsigned char)~_BV(7) /* External Reset Diasble */ -#define HFUSE_DEFAULT (FUSE_SPIEN) - -/* Extended Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) /* Select Reset Vector */ -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) /* Select Boot Size */ -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) /* Select Boot Size */ -#define FUSE_PSCRV (unsigned char)~_BV(4) -#define FUSE_PSC0RB (unsigned char)~_BV(5) -#define FUSE_PSC1RB (unsigned char)~_BV(6) -#define FUSE_PSC2RB (unsigned char)~_BV(7) -#define EFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x94 -#define SIGNATURE_2 0x83 - - -#endif /* _AVR_IO90PWM216_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io90pwm2b.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io90pwm2b.h deleted file mode 100644 index bb99c86ad..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io90pwm2b.h +++ /dev/null @@ -1,1383 +0,0 @@ -/* Copyright (c) 2007 Atmel Corporation - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. -*/ - -/* $Id: io90pwm2b.h,v 1.3.2.10 2008/10/17 23:27:45 arcanum Exp $ */ - -/* avr/io90pwm2b.h - definitions for AT90PWM2B */ - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "io90pwm2b.h" -#else -# error "Attempt to include more than one file." -#endif - - -#ifndef _AVR_IO90PWM2B_H_ -#define _AVR_IO90PWM2B_H_ 1 - -/* Registers and associated bit numbers */ - -#define PINB _SFR_IO8(0x03) -#define PINB0 0 -#define PINB1 1 -#define PINB2 2 -#define PINB3 3 -#define PINB4 4 -#define PINB5 5 -#define PINB6 6 -#define PINB7 7 - -#define DDRB _SFR_IO8(0x04) -#define DDB0 0 -#define DDB1 1 -#define DDB2 2 -#define DDB3 3 -#define DDB4 4 -#define DDB5 5 -#define DDB6 6 -#define DDB7 7 - -#define PORTB _SFR_IO8(0x05) -#define PORTB0 0 -#define PORTB1 1 -#define PORTB2 2 -#define PORTB3 3 -#define PORTB4 4 -#define PORTB5 5 -#define PORTB6 6 -#define PORTB7 7 - -#define PINC _SFR_IO8(0x06) -#define PINC0 0 -#define PINC1 1 -#define PINC2 2 -#define PINC3 3 -#define PINC4 4 -#define PINC5 5 -#define PINC6 6 -#define PINC7 7 - -#define DDRC _SFR_IO8(0x07) -#define DDC0 0 -#define DDC1 1 -#define DDC2 2 -#define DDC3 3 -#define DDC4 4 -#define DDC5 5 -#define DDC6 6 -#define DDC7 7 - -#define PORTC _SFR_IO8(0x08) -#define PORTC0 0 -#define PORTC1 1 -#define PORTC2 2 -#define PORTC3 3 -#define PORTC4 4 -#define PORTC5 5 -#define PORTC6 6 -#define PORTC7 7 - -#define PIND _SFR_IO8(0x09) -#define PIND0 0 -#define PIND1 1 -#define PIND2 2 -#define PIND3 3 -#define PIND4 4 -#define PIND5 5 -#define PIND6 6 -#define PIND7 7 - -#define DDRD _SFR_IO8(0x0A) -#define DDD0 0 -#define DDD1 1 -#define DDD2 2 -#define DDD3 3 -#define DDD4 4 -#define DDD5 5 -#define DDD6 6 -#define DDD7 7 - -#define PORTD _SFR_IO8(0x0B) -#define PORTD0 0 -#define PORTD1 1 -#define PORTD2 2 -#define PORTD3 3 -#define PORTD4 4 -#define PORTD5 5 -#define PORTD6 6 -#define PORTD7 7 - -#define PINE _SFR_IO8(0x0C) -#define PINE0 0 -#define PINE1 1 -#define PINE2 2 - -#define DDRE _SFR_IO8(0x0D) -#define DDE0 0 -#define DDE1 1 -#define DDE2 2 - -#define PORTE _SFR_IO8(0x0E) -#define PORTE0 0 -#define PORTE1 1 -#define PORTE2 2 - -#define TIFR0 _SFR_IO8(0x15) -#define TOV0 0 -#define OCF0A 1 -#define OCF0B 2 - -#define TIFR1 _SFR_IO8(0x16) -#define TOV1 0 -#define OCF1A 1 -#define OCF1B 2 -#define ICF1 5 - -#define GPIOR1 _SFR_IO8(0x19) -#define GPIOR10 0 -#define GPIOR11 1 -#define GPIOR12 2 -#define GPIOR13 3 -#define GPIOR14 4 -#define GPIOR15 5 -#define GPIOR16 6 -#define GPIOR17 7 - -#define GPIOR2 _SFR_IO8(0x1A) -#define GPIOR20 0 -#define GPIOR21 1 -#define GPIOR22 2 -#define GPIOR23 3 -#define GPIOR24 4 -#define GPIOR25 5 -#define GPIOR26 6 -#define GPIOR27 7 - -#define GPIOR3 _SFR_IO8(0x1B) -#define GPIOR30 0 -#define GPIOR31 1 -#define GPIOR32 2 -#define GPIOR33 3 -#define GPIOR34 4 -#define GPIOR35 5 -#define GPIOR36 6 -#define GPIOR37 7 - -#define EIFR _SFR_IO8(0x1C) -#define INTF0 0 -#define INTF1 1 -#define INTF2 2 -#define INTF3 3 - -#define EIMSK _SFR_IO8(0x1D) -#define INT0 0 -#define INT1 1 -#define INT2 2 -#define INT3 3 - -#define GPIOR0 _SFR_IO8(0x1E) -#define GPIOR00 0 -#define GPIOR01 1 -#define GPIOR02 2 -#define GPIOR03 3 -#define GPIOR04 4 -#define GPIOR05 5 -#define GPIOR06 6 -#define GPIOR07 7 - -#define EECR _SFR_IO8(0x1F) -#define EERE 0 -#define EEWE 1 -#define EEMWE 2 -#define EERIE 3 -#define EEPM0 4 -#define EEPM1 5 - -#define EEDR _SFR_IO8(0x20) -#define EEDR0 0 -#define EEDR1 1 -#define EEDR2 2 -#define EEDR3 3 -#define EEDR4 4 -#define EEDR5 5 -#define EEDR6 6 -#define EEDR7 7 - -#define EEAR _SFR_IO16(0x21) - -#define EEARL _SFR_IO8(0x21) -#define EEARL0 0 -#define EEARL1 1 -#define EEARL2 2 -#define EEARL3 3 -#define EEARL4 4 -#define EEARL5 5 -#define EEARL6 6 -#define EEARL7 7 - -#define EEARH _SFR_IO8(0x22) -#define EEAR8 0 -#define EEAR9 1 -#define EEAR10 2 -#define EEAR11 3 - -#define GTCCR _SFR_IO8(0x23) -#define PSR10 0 -#define PSRSYNC 0 -#define ICPSEL1 2 -#define TSM 3 - -#define TCCR0A _SFR_IO8(0x24) -#define WGM00 0 -#define WGM01 1 -#define COM0B0 4 -#define COM0B1 5 -#define COM0A0 6 -#define COM0A1 7 - -#define TCCR0B _SFR_IO8(0x25) -#define CS00 0 -#define CS01 1 -#define CS02 2 -#define WGM02 3 -#define FOC0B 6 -#define FOC0A 7 - -#define TCNT0 _SFR_IO8(0x26) -#define TCNT0_0 0 -#define TCNT0_1 1 -#define TCNT0_2 2 -#define TCNT0_3 3 -#define TCNT0_4 4 -#define TCNT0_5 5 -#define TCNT0_6 6 -#define TCNT0_7 7 - -#define OCR0A _SFR_IO8(0x27) -#define OCR0_0 0 -#define OCR0_1 1 -#define OCR0_2 2 -#define OCR0_3 3 -#define OCR0_4 4 -#define OCR0_5 5 -#define OCR0_6 6 -#define OCR0_7 7 - -#define OCR0B _SFR_IO8(0x28) -#define OCR0_0 0 -#define OCR0_1 1 -#define OCR0_2 2 -#define OCR0_3 3 -#define OCR0_4 4 -#define OCR0_5 5 -#define OCR0_6 6 -#define OCR0_7 7 - -#define PLLCSR _SFR_IO8(0x29) -#define PLOCK 0 -#define PLLE 1 -#define PLLF 2 - -#define SPCR _SFR_IO8(0x2C) -#define SPR0 0 -#define SPR1 1 -#define CPHA 2 -#define CPOL 3 -#define MSTR 4 -#define DORD 5 -#define SPE 6 -#define SPIE 7 - -#define SPSR _SFR_IO8(0x2D) -#define SPI2X 0 -#define WCOL 6 -#define SPIF 7 - -#define SPDR _SFR_IO8(0x2E) -#define SPDR0 0 -#define SPDR1 1 -#define SPDR2 2 -#define SPDR3 3 -#define SPDR4 4 -#define SPDR5 5 -#define SPDR6 6 -#define SPDR7 7 - -#define ACSR _SFR_IO8(0x30) -#define AC0O 0 -#define AC1O 1 -#define AC2O 2 -#define AC0IF 4 -#define AC1IF 5 -#define AC2IF 6 -#define ACCKDIV 7 - -#define SMCR _SFR_IO8(0x33) -#define SE 0 -#define SM0 1 -#define SM1 2 -#define SM2 3 - -#define MCUSR _SFR_IO8(0x34) -#define PORF 0 -#define EXTRF 1 -#define BORF 2 -#define WDRF 3 - -#define MCUCR _SFR_IO8(0x35) -#define IVCE 0 -#define IVSEL 1 -#define PUD 4 -#define SPIPS 7 - -#define SPMCSR _SFR_IO8(0x37) -#define SPMEN 0 -#define PGERS 1 -#define PGWRT 2 -#define BLBSET 3 -#define RWWSRE 4 -#define RWWSB 6 -#define SPMIE 7 - -#define WDTCSR _SFR_MEM8(0x60) -#define WDP0 0 -#define WDP1 1 -#define WDP2 2 -#define WDE3 3 -#define WDCE 4 -#define WDP3 5 -#define WDIE 6 -#define WDIF 7 - -#define CLKPR _SFR_MEM8(0x61) -#define CLKPS0 0 -#define CLKPS1 1 -#define CLKPS2 2 -#define CLKPS3 3 -#define CLKPCE 7 - -#define PRR _SFR_MEM8(0x64) -#define PRADC 0 -#define PRUSART0 1 -#define PRSPI 2 -#define PRTIM0 3 -#define PRTIM1 4 -#define PRPSC0 5 -#define PRPSC1 6 -#define PRPSC2 7 - -#define OSCCAL _SFR_MEM8(0x66) -#define CAL0 0 -#define CAL1 1 -#define CAL2 2 -#define CAL3 3 -#define CAL4 4 -#define CAL5 5 -#define CAL6 6 - -#define EICRA _SFR_MEM8(0x69) -#define ISC00 0 -#define ISC01 1 -#define ISC10 2 -#define ISC11 3 -#define ISC20 4 -#define ISC21 5 -#define ISC30 6 -#define ISC31 7 - -#define TIMSK0 _SFR_MEM8(0x6E) -#define TOIE0 0 -#define OCIE0A 1 -#define OCIE0B 2 - -#define TIMSK1 _SFR_MEM8(0x6F) -#define TOIE1 0 -#define OCIE1A 1 -#define OCIE1B 2 -#define ICIE1 5 - -#define AMP0CSR _SFR_MEM8(0x76) -#define AMP0TS0 0 -#define AMP0TS1 1 -#define AMP0G0 4 -#define AMP0G1 5 -#define AMP0IS 6 -#define AMP0EN 7 - -#define AMP1CSR _SFR_MEM8(0x77) -#define AMP1TS0 0 -#define AMP1TS1 1 -#define AMP1G0 4 -#define AMP1G1 5 -#define AMP1IS 6 -#define AMP1EN 7 - -#ifndef __ASSEMBLER__ -#define ADC _SFR_MEM16(0x78) -#endif -#define ADCW _SFR_MEM16(0x78) - -#define ADCL _SFR_MEM8(0x78) -#define ADCL0 0 -#define ADCL1 1 -#define ADCL2 2 -#define ADCL3 3 -#define ADCL4 4 -#define ADCL5 5 -#define ADCL6 6 -#define ADCL7 7 - -#define ADCH _SFR_MEM8(0x79) -#define ADCH0 0 -#define ADCH1 1 -#define ADCH2 2 -#define ADCH3 3 -#define ADCH4 4 -#define ADCH5 5 -#define ADCH6 6 -#define ADCH7 7 - -#define ADCSRA _SFR_MEM8(0x7A) -#define ADPS0 0 -#define ADPS1 1 -#define ADPS2 2 -#define ADIE 3 -#define ADIF 4 -#define ADATE 5 -#define ADSC 6 -#define ADEN 7 - -#define ADCSRB _SFR_MEM8(0x7B) -#define ADTS0 0 -#define ADTS1 1 -#define ADTS2 2 -#define ADTS3 3 -#define ADASCR 4 -#define ADHSM 7 - -#define ADMUX _SFR_MEM8(0x7C) -#define MUX0 0 -#define MUX1 1 -#define MUX2 2 -#define MUX3 3 -#define ADLAR 5 -#define REFS0 6 -#define REFS1 7 - -#define DIDR0 _SFR_MEM8(0x7E) -#define ADC0D 0 -#define ADC1D 1 -#define ADC2D 2 -#define ADC3D 3 -#define ADC4D 4 -#define ADC5D 5 -#define ADC6D 6 -#define ADC7D 7 - -#define DIDR1 _SFR_MEM8(0x7F) -#define ADC8D 0 -#define ADC9D 1 -#define ADC10D 2 -#define AMP0ND 3 -#define AMP0PD 4 -#define ACMP0D 5 - -#define TCCR1A _SFR_MEM8(0x80) -#define WGM10 0 -#define WGM11 1 -#define COM1B0 4 -#define COM1B1 5 -#define COM1A0 6 -#define COM1A1 7 - -#define TCCR1B _SFR_MEM8(0x81) -#define CS10 0 -#define CS11 1 -#define CS12 2 -#define WGM12 3 -#define WGM13 4 -#define ICES1 6 -#define ICNC1 7 - -#define TCCR1C _SFR_MEM8(0x82) -#define FOC1B 6 -#define FOC1A 7 - -#define TCNT1 _SFR_MEM16(0x84) - -#define TCNT1L _SFR_MEM8(0x84) -#define TCNT1L0 0 -#define TCNT1L1 1 -#define TCNT1L2 2 -#define TCNT1L3 3 -#define TCNT1L4 4 -#define TCNT1L5 5 -#define TCNT1L6 6 -#define TCNT1L7 7 - -#define TCNT1H _SFR_MEM8(0x85) -#define TCNT1H0 0 -#define TCNT1H1 1 -#define TCNT1H2 2 -#define TCNT1H3 3 -#define TCNT1H4 4 -#define TCNT1H5 5 -#define TCNT1H6 6 -#define TCNT1H7 7 - -#define ICR1 _SFR_MEM16(0x86) - -#define ICR1L _SFR_MEM8(0x86) -#define ICR1L0 0 -#define ICR1L1 1 -#define ICR1L2 2 -#define ICR1L3 3 -#define ICR1L4 4 -#define ICR1L5 5 -#define ICR1L6 6 -#define ICR1L7 7 - -#define ICR1H _SFR_MEM8(0x87) -#define ICR1H0 0 -#define ICR1H1 1 -#define ICR1H2 2 -#define ICR1H3 3 -#define ICR1H4 4 -#define ICR1H5 5 -#define ICR1H6 6 -#define ICR1H7 7 - -#define OCR1A _SFR_MEM16(0x88) - -#define OCR1AL _SFR_MEM8(0x88) -#define OCR1AL0 0 -#define OCR1AL1 1 -#define OCR1AL2 2 -#define OCR1AL3 3 -#define OCR1AL4 4 -#define OCR1AL5 5 -#define OCR1AL6 6 -#define OCR1AL7 7 - -#define OCR1AH _SFR_MEM8(0x89) -#define OCR1AH0 0 -#define OCR1AH1 1 -#define OCR1AH2 2 -#define OCR1AH3 3 -#define OCR1AH4 4 -#define OCR1AH5 5 -#define OCR1AH6 6 -#define OCR1AH7 7 - -#define OCR1B _SFR_MEM16(0x8A) - -#define OCR1BL _SFR_MEM8(0x8A) -#define OCR1BL0 0 -#define OCR1BL1 1 -#define OCR1BL2 2 -#define OCR1BL3 3 -#define OCR1BL4 4 -#define OCR1BL5 5 -#define OCR1BL6 6 -#define OCR1BL7 7 - -#define OCR1BH _SFR_MEM8(0x8B) -#define OCR1BH0 0 -#define OCR1BH1 1 -#define OCR1BH2 2 -#define OCR1BH3 3 -#define OCR1BH4 4 -#define OCR1BH5 5 -#define OCR1BH6 6 -#define OCR1BH7 7 - -#define PIFR0 _SFR_MEM8(0xA0) -#define PEOP0 0 -#define PRN00 1 -#define PRN01 2 -#define PEV0A 3 -#define PEV0B 4 -#define PSEI0 5 -#define POAC0A 6 -#define POAC0B 7 - -#define PIM0 _SFR_MEM8(0xA1) -#define PEOPE0 0 -#define PEVE0A 3 -#define PEVE0B 4 -#define PSEIE0 5 - -#define PIFR1 _SFR_MEM8(0xA2) -#define PEOP1 0 -#define PRN10 1 -#define PRN11 2 -#define PEV1A 3 -#define PEV1B 4 -#define PSEI1 5 -#define POAC1A 6 -#define POAC1B 7 - -#define PIM1 _SFR_MEM8(0xA3) -#define PEOPE1 0 -#define PEVE1A 3 -#define PEVE1B 4 -#define PSEIE1 5 - -#define PIFR2 _SFR_MEM8(0xA4) -#define PEOP2 0 -#define PRN20 1 -#define PRN21 2 -#define PEV2A 3 -#define PEV2B 4 -#define PSEI2 5 -#define POAC2A 6 -#define POAC2B 7 - -#define PIM2 _SFR_MEM8(0xA5) -#define PEOPE2 0 -#define PEVE2A 3 -#define PEVE2B 4 -#define PSEIE2 5 - -#define DACON _SFR_MEM8(0xAA) -#define DAEN 0 -#define DAOE 1 -#define DALA 2 -#define DATS0 4 -#define DATS1 5 -#define DATS2 6 -#define DAATE 7 - -#define DAC _SFR_MEM16(0xAB) - -#define DACL _SFR_MEM8(0xAB) -#define DACL0 0 -#define DACL1 1 -#define DACL2 2 -#define DACL3 3 -#define DACL4 4 -#define DACL5 5 -#define DACL6 6 -#define DACL7 7 - -#define DACH _SFR_MEM8(0xAC) -#define DACH0 0 -#define DACH1 1 -#define DACH2 2 -#define DACH3 3 -#define DACH4 4 -#define DACH5 5 -#define DACH6 6 -#define DACH7 7 - -#define AC0CON _SFR_MEM8(0xAD) -#define AC0M0 0 -#define AC0M1 1 -#define AC0M2 2 -#define AC0IS0 4 -#define AC0IS1 5 -#define AC0IE 6 -#define AC0EN 7 - -#define AC1CON _SFR_MEM8(0xAE) -#define AC1M0 0 -#define AC1M1 1 -#define AC1M2 2 -#define AC1ICE 3 -#define AC1IS0 4 -#define AC1IS1 5 -#define AC1IE 6 -#define AC1EN 7 - -#define AC2CON _SFR_MEM8(0xAF) -#define AC2M0 0 -#define AC2M1 1 -#define AC2M2 2 -#define AC2IS0 4 -#define AC2IS1 5 -#define AC2IE 6 -#define AC2EN 7 - -#define UCSRA _SFR_MEM8(0xC0) -#define MPCM 0 -#define U2X 1 -#define UPE 2 -#define DOR 3 -#define FE 4 -#define UDRE 5 -#define TXC 6 -#define RXC 7 - -#define UCSRB _SFR_MEM8(0xC1) -#define TXB8 0 -#define RXB8 1 -#define UCSZ2 2 -#define TXEN 3 -#define RXEN 4 -#define UDRIE 5 -#define TXCIE 6 -#define RXCIE 7 - -#define UCSRC _SFR_MEM8(0xC2) -#define UCPOL 0 -#define UCSZ0 1 -#define UCSZ1 2 -#define USBS 3 -#define UPM0 4 -#define UPM1 5 -#define UMSEL0 6 - -#define UBRR _SFR_MEM16(0xC4) - -#define UBRRL _SFR_MEM8(0xC4) -#define UBRR0 0 -#define UBRR1 1 -#define UBRR2 2 -#define UBRR3 3 -#define UBRR4 4 -#define UBRR5 5 -#define UBRR6 6 -#define UBRR7 7 - -#define UBRRH _SFR_MEM8(0xC5) -#define UBRR8 0 -#define UBRR9 1 -#define UBRR10 2 -#define UBRR11 3 - -#define UDR _SFR_MEM8(0xC6) -#define UDR0 0 -#define UDR1 1 -#define UDR2 2 -#define UDR3 3 -#define UDR4 4 -#define UDR5 5 -#define UDR6 6 -#define UDR7 7 - -#define EUCSRA _SFR_MEM8(0xC8) -#define URxS0 0 -#define URxS1 1 -#define URxS2 2 -#define URxS3 3 -#define UTxS0 4 -#define UTxS1 5 -#define UTxS2 6 -#define UTxS3 7 - -#define EUCSRB _SFR_MEM8(0xC9) -#define BODR 0 -#define EMCH 1 -#define EUSBS 3 -#define EUSART 4 - -#define EUCSRC _SFR_MEM8(0xCA) -#define STP0 0 -#define STP1 1 -#define F1617 2 -#define FEM 3 - -#define MUBRR _SFR_MEM16(0xCC) - -#define MUBRRL _SFR_MEM8(0xCC) -#define MUBRR0 0 -#define MUBRR1 1 -#define MUBRR2 2 -#define MUBRR3 3 -#define MUBRR4 4 -#define MUBRR5 5 -#define MUBRR6 6 -#define MUBRR7 7 - -#define MUBRRH _SFR_MEM8(0xCD) -#define MUBRR8 0 -#define MUBRR9 1 -#define MUBRR10 2 -#define MUBRR11 3 -#define MUBRR12 4 -#define MUBRR13 5 -#define MUBRR14 6 -#define MUBRR15 7 - -#define EUDR _SFR_MEM8(0xCE) -#define EUDR0 0 -#define EUDR1 1 -#define EUDR2 2 -#define EUDR3 3 -#define EUDR4 4 -#define EUDR5 5 -#define EUDR6 6 -#define EUDR7 7 - -#define PSOC0 _SFR_MEM8(0xD0) -#define POEN0A 0 -#define POEN0B 2 -#define PSYNC00 4 -#define PSYNC01 5 - -#define OCR0SA _SFR_MEM16(0xD2) - -#define OCR0SAL _SFR_MEM8(0xD2) -#define OCR0SA_0 0 -#define OCR0SA_1 1 -#define OCR0SA_2 2 -#define OCR0SA_3 3 -#define OCR0SA_4 4 -#define OCR0SA_5 5 -#define OCR0SA_6 6 -#define OCR0SA_7 7 - -#define OCR0SAH _SFR_MEM8(0xD3) -#define OCR0SA_8 0 -#define OCR0SA_9 1 -#define OCR0SA_00 2 -#define OCR0SA_01 3 - -#define OCR0RA _SFR_MEM16(0xD4) - -#define OCR0RAL _SFR_MEM8(0xD4) -#define OCR0RA_0 0 -#define OCR0RA_1 1 -#define OCR0RA_2 2 -#define OCR0RA_3 3 -#define OCR0RA_4 4 -#define OCR0RA_5 5 -#define OCR0RA_6 6 -#define OCR0RA_7 7 - -#define OCR0RAH _SFR_MEM8(0xD5) -#define OCR0RA_8 0 -#define OCR0RA_9 1 -#define OCR0RA_00 2 -#define OCR0RA_01 3 - -#define OCR0SB _SFR_MEM16(0xD6) - -#define OCR0SBL _SFR_MEM8(0xD6) -#define OCR0SB_0 0 -#define OCR0SB_1 1 -#define OCR0SB_2 2 -#define OCR0SB_3 3 -#define OCR0SB_4 4 -#define OCR0SB_5 5 -#define OCR0SB_6 6 -#define OCR0SB_7 7 - -#define OCR0SBH _SFR_MEM8(0xD7) -#define OCR0SB_8 0 -#define OCR0SB_9 1 -#define OCR0SB_00 2 -#define OCR0SB_01 3 - -#define OCR0RB _SFR_MEM16(0xD8) - -#define OCR0RBL _SFR_MEM8(0xD8) -#define OCR0RB_0 0 -#define OCR0RB_1 1 -#define OCR0RB_2 2 -#define OCR0RB_3 3 -#define OCR0RB_4 4 -#define OCR0RB_5 5 -#define OCR0RB_6 6 -#define OCR0RB_7 7 - -#define OCR0RBH _SFR_MEM8(0xD9) -#define OCR0RB_8 0 -#define OCR0RB_9 1 -#define OCR0RB_00 2 -#define OCR0RB_01 3 -#define OCR0RB_02 4 -#define OCR0RB_03 5 -#define OCR0RB_04 6 -#define OCR0RB_05 7 - -#define PCNF0 _SFR_MEM8(0xDA) -#define PCLKSEL0 1 -#define POP0 2 -#define PMODE00 3 -#define PMODE01 4 -#define PLOCK0 5 -#define PALOCK0 6 -#define PFIFTY0 7 - -#define PCTL0 _SFR_MEM8(0xDB) -#define PRUN0 0 -#define PCCYC0 1 -#define PARUN0 2 -#define PAOC0A 3 -#define PAOC0B 4 -#define PBFM0 5 -#define PPRE00 6 -#define PPRE01 7 - -#define PFRC0A _SFR_MEM8(0xDC) -#define PRFM0A0 0 -#define PRFM0A1 1 -#define PRFM0A2 2 -#define PRFM0A3 3 -#define PFLTE0A 4 -#define PELEV0A 5 -#define PISEL0A 6 -#define PCAE0A 7 - -#define PFRC0B _SFR_MEM8(0xDD) -#define PRFM0B0 0 -#define PRFM0B1 1 -#define PRFM0B2 2 -#define PRFM0B3 3 -#define PFLTE0B 4 -#define PELEV0B 5 -#define PISEL0B 6 -#define PCAE0B 7 - -#define PICR0 _SFR_MEM16(0xDE) - -#define PICR0L _SFR_MEM8(0xDE) -#define PICR0_0 0 -#define PICR0_1 1 -#define PICR0_2 2 -#define PICR0_3 3 -#define PICR0_4 4 -#define PICR0_5 5 -#define PICR0_6 6 -#define PICR0_7 7 - -#define PICR0H _SFR_MEM8(0xDF) -#define PICR0_8 0 -#define PICR0_9 1 -#define PICR0_10 2 -#define PICR0_11 3 -#define PCST0 7 - -#define PSOC1 _SFR_MEM8(0xE0) -#define POEN1A 0 -#define POEN1B 2 -#define PSYNC1_0 4 -#define PSYNC1_1 5 - -#define OCR1SA _SFR_MEM16(0xE2) - -#define OCR1SAL _SFR_MEM8(0xE2) -#define OCR1SA_0 0 -#define OCR1SA_1 1 -#define OCR1SA_2 2 -#define OCR1SA_3 3 -#define OCR1SA_4 4 -#define OCR1SA_5 5 -#define OCR1SA_6 6 -#define OCR1SA_7 7 - -#define OCR1SAH _SFR_MEM8(0xE3) -#define OCR1SA_8 0 -#define OCR1SA_9 1 -#define OCR1SA_10 2 -#define OCR1SA_11 3 - -#define OCR1RA _SFR_MEM16(0xE4) - -#define OCR1RAL _SFR_MEM8(0xE4) -#define OCR1RA_0 0 -#define OCR1RA_1 1 -#define OCR1RA_2 2 -#define OCR1RA_3 3 -#define OCR1RA_4 4 -#define OCR1RA_5 5 -#define OCR1RA_6 6 -#define OCR1RA_7 7 - -#define OCR1RAH _SFR_MEM8(0xE5) -#define OCR1RA_8 0 -#define OCR1RA_9 1 -#define OCR1RA_10 2 -#define OCR1RA_11 3 - -#define OCR1SB _SFR_MEM16(0xE6) - -#define OCR1SBL _SFR_MEM8(0xE6) -#define OCR1SB_0 0 -#define OCR1SB_1 1 -#define OCR1SB_2 2 -#define OCR1SB_3 3 -#define OCR1SB_4 4 -#define OCR1SB_5 5 -#define OCR1SB_6 6 -#define OCR1SB_7 7 - -#define OCR1SBH _SFR_MEM8(0xE7) -#define OCR1SB_8 0 -#define OCR1SB_9 1 -#define OCR1SB_10 2 -#define OCR1SB_11 3 - -#define OCR1RB _SFR_MEM16(0xE8) - -#define OCR1RBL _SFR_MEM8(0xE8) -#define OCR1RB_0 0 -#define OCR1RB_1 1 -#define OCR1RB_2 2 -#define OCR1RB_3 3 -#define OCR1RB_4 4 -#define OCR1RB_5 5 -#define OCR1RB_6 6 -#define OCR1RB_7 7 - -#define OCR1RBH _SFR_MEM8(0xE9) -#define OCR1RB_8 0 -#define OCR1RB_9 1 -#define OCR1RB_10 2 -#define OCR1RB_11 3 -#define OCR1RB_12 4 -#define OCR1RB_13 5 -#define OCR1RB_14 6 -#define OCR1RB_15 7 - -#define PCNF1 _SFR_MEM8(0xEA) -#define PCLKSEL1 1 -#define POP1 2 -#define PMODE10 3 -#define PMODE11 4 -#define PLOCK1 5 -#define PALOCK1 6 -#define PFIFTY1 7 - -#define PCTL1 _SFR_MEM8(0xEB) -#define PRUN1 0 -#define PCCYC1 1 -#define PARUN1 2 -#define PAOC1A 3 -#define PAOC1B 4 -#define PBFM1 5 -#define PPRE10 6 -#define PPRE11 7 - -#define PFRC1A _SFR_MEM8(0xEC) -#define PRFM1A0 0 -#define PRFM1A1 1 -#define PRFM1A2 2 -#define PRFM1A3 3 -#define PFLTE1A 4 -#define PELEV1A 5 -#define PISEL1A 6 -#define PCAE1A 7 - -#define PFRC1B _SFR_MEM8(0xED) -#define PRFM1B0 0 -#define PRFM1B1 1 -#define PRFM1B2 2 -#define PRFM1B3 3 -#define PFLTE1B 4 -#define PELEV1B 5 -#define PISEL1B 6 -#define PCAE1B 7 - -#define PICR1 _SFR_MEM16(0xEE) - -#define PICR1L _SFR_MEM8(0xEE) -#define PICR1_0 0 -#define PICR1_1 1 -#define PICR1_2 2 -#define PICR1_3 3 -#define PICR1_4 4 -#define PICR1_5 5 -#define PICR1_6 6 -#define PICR1_7 7 - -#define PICR1H _SFR_MEM8(0xEF) -#define PICR1_8 0 -#define PICR1_9 1 -#define PICR1_10 2 -#define PICR1_11 3 -#define PCST1 7 - -#define PSOC2 _SFR_MEM8(0xF0) -#define POEN2A 0 -#define POEN2C 1 -#define POEN2B 2 -#define POEN2D 3 -#define PSYNC2_0 4 -#define PSYNC2_1 5 -#define POS22 6 -#define POS23 7 - -#define POM2 _SFR_MEM8(0xF1) -#define POMV2A0 0 -#define POMV2A1 1 -#define POMV2A2 2 -#define POMV2A3 3 -#define POMV2B0 4 -#define POMV2B1 5 -#define POMV2B2 6 -#define POMV2B3 7 - -#define OCR2SA _SFR_MEM16(0xF2) - -#define OCR2SAL _SFR_MEM8(0xF2) -#define OCR2SA_0 0 -#define OCR2SA_1 1 -#define OCR2SA_2 2 -#define OCR2SA_3 3 -#define OCR2SA_4 4 -#define OCR2SA_5 5 -#define OCR2SA_6 6 -#define OCR2SA_7 7 - -#define OCR2SAH _SFR_MEM8(0xF3) -#define OCR2SA_8 0 -#define OCR2SA_9 1 -#define OCR2SA_10 2 -#define OCR2SA_11 3 - -#define OCR2RA _SFR_MEM16(0xF4) - -#define OCR2RAL _SFR_MEM8(0xF4) -#define OCR2RA_0 0 -#define OCR2RA_1 1 -#define OCR2RA_2 2 -#define OCR2RA_3 3 -#define OCR2RA_4 4 -#define OCR2RA_5 5 -#define OCR2RA_6 6 -#define OCR2RA_7 7 - -#define OCR2RAH _SFR_MEM8(0xF5) -#define OCR2RA_8 0 -#define OCR2RA_9 1 -#define OCR2RA_10 2 -#define OCR2RA_11 3 - -#define OCR2SB _SFR_MEM16(0xF6) - -#define OCR2SBL _SFR_MEM8(0xF6) -#define OCR2SB_0 0 -#define OCR2SB_1 1 -#define OCR2SB_2 2 -#define OCR2SB_3 3 -#define OCR2SB_4 4 -#define OCR2SB_5 5 -#define OCR2SB_6 6 -#define OCR2SB_7 7 - -#define OCR2SBH _SFR_MEM8(0xF7) -#define OCR2SB_8 0 -#define OCR2SB_9 1 -#define OCR2SB_10 2 -#define OCR2SB_11 3 - -#define OCR2RB _SFR_MEM16(0xF8) - -#define OCR2RBL _SFR_MEM8(0xF8) -#define OCR2RB_0 0 -#define OCR2RB_1 1 -#define OCR2RB_2 2 -#define OCR2RB_3 3 -#define OCR2RB_4 4 -#define OCR2RB_5 5 -#define OCR2RB_6 6 -#define OCR2RB_7 7 - -#define OCR2RBH _SFR_MEM8(0xF9) -#define OCR2RB_8 0 -#define OCR2RB_9 1 -#define OCR2RB_10 2 -#define OCR2RB_11 3 -#define OCR2RB_12 4 -#define OCR2RB_13 5 -#define OCR2RB_14 6 -#define OCR2RB_15 7 - -#define PCNF2 _SFR_MEM8(0xFA) -#define POME2 0 -#define PCLKSEL2 1 -#define POP2 2 -#define PMODE20 3 -#define PMODE21 4 -#define PLOCK2 5 -#define PALOCK2 6 -#define PFIFTY2 7 - -#define PCTL2 _SFR_MEM8(0xFB) -#define PRUN2 0 -#define PCCYC2 1 -#define PARUN2 2 -#define PAOC2A 3 -#define PAOC2B 4 -#define PBFM2 5 -#define PPRE20 6 -#define PPRE21 7 - -#define PFRC2A _SFR_MEM8(0xFC) -#define PRFM2A0 0 -#define PRFM2A1 1 -#define PRFM2A2 2 -#define PRFM2A3 3 -#define PFLTE2A 4 -#define PELEV2A 5 -#define PISEL2A 6 -#define PCAE2A 7 - -#define PFRC2B _SFR_MEM8(0xFD) -#define PRFM2B0 0 -#define PRFM2B1 1 -#define PRFM2B2 2 -#define PRFM2B3 3 -#define PFLTE2B 4 -#define PELEV2B 5 -#define PISEL2B 6 -#define PCAE2B 7 - -#define PICR2 _SFR_MEM16(0xFE) - -#define PICR2L _SFR_MEM8(0xFE) -#define PICR2_0 0 -#define PICR2_1 1 -#define PICR2_2 2 -#define PICR2_3 3 -#define PICR2_4 4 -#define PICR2_5 5 -#define PICR2_6 6 -#define PICR2_7 7 - -#define PICR2H _SFR_MEM8(0xFF) -#define PICR2_8 0 -#define PICR2_9 1 -#define PICR2_10 2 -#define PICR2_11 3 -#define PCST2 7 - - - -/* Interrupt Vectors */ -/* Interrupt vector 0 is the reset vector. */ -#define PSC2_CAPT_vect _VECTOR(1) /* PSC2 Capture Event */ -#define PSC2_EC_vect _VECTOR(2) /* PSC2 End Cycle */ -#define PSC1_CAPT_vect _VECTOR(3) /* PSC1 Capture Event */ -#define PSC1_EC_vect _VECTOR(4) /* PSC1 End Cycle */ -#define PSC0_CAPT_vect _VECTOR(5) /* PSC0 Capture Event */ -#define PSC0_EC_vect _VECTOR(6) /* PSC0 End Cycle */ -#define ANALOG_COMP_0_vect _VECTOR(7) /* Analog Comparator 0 */ -#define ANALOG_COMP_1_vect _VECTOR(8) /* Analog Comparator 1 */ -#define ANALOG_COMP_2_vect _VECTOR(9) /* Analog Comparator 2 */ -#define INT0_vect _VECTOR(10) /* External Interrupt Request 0 */ -#define TIMER1_CAPT_vect _VECTOR(11) /* Timer/Counter1 Capture Event */ -#define TIMER1_COMPA_vect _VECTOR(12) /* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPB_vect _VECTOR(13) /* Timer/Counter Compare Match B */ -/* Vector 14, Reserved */ -#define TIMER1_OVF_vect _VECTOR(15) /* Timer/Counter1 Overflow */ -#define TIMER0_COMPA_vect _VECTOR(16) /* Timer/Counter0 Compare Match A */ -#define TIMER0_OVF_vect _VECTOR(17) /* Timer/Counter0 Overflow */ -#define ADC_vect _VECTOR(18) /* ADC Conversion Complete */ -#define INT1_vect _VECTOR(19) /* External Interrupt Request 1 */ -#define SPI_STC_vect _VECTOR(20) /* SPI Serial Transfer Complete */ -#define USART_RX_vect _VECTOR(21) /* USART, Rx Complete */ -#define USART_UDRE_vect _VECTOR(22) /* USART Data Register Empty */ -#define USART_TX_vect _VECTOR(23) /* USART, Tx Complete */ -#define INT2_vect _VECTOR(24) /* External Interrupt Request 2 */ -#define WDT_vect _VECTOR(25) /* Watchdog Timeout Interrupt */ -#define EE_READY_vect _VECTOR(26) /* EEPROM Ready */ -#define TIMER0_COMPB_vect _VECTOR(27) /* Timer Counter 0 Compare Match B */ -#define INT3_vect _VECTOR(28) /* External Interrupt Request 3 */ -/* Vector 29, Reserved */ -/* Vector 30, Reserved */ -#define SPM_READY_vect _VECTOR(31) /* Store Program Memory Read */ - -#define _VECTORS_SIZE 64 - - - -/* Memory Sizes */ -#define RAMEND 0x2FF -#define XRAMSIZE 0 -#define XRAMEND (RAMEND + XRAMSIZE) -#define E2END 0x1FF -#define E2PAGESIZE 4 -#define FLASHEND 0x1FFF -#define SPM_PAGESIZE 32 - - - -/* Fuse Information */ - -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) /* Select Clock Source */ -#define FUSE_CKSEL1 (unsigned char)~_BV(1) /* Select Clock Source */ -#define FUSE_CKSEL2 (unsigned char)~_BV(2) /* Select Clock Source */ -#define FUSE_CKSEL3 (unsigned char)~_BV(3) /* Select Clock Source */ -#define FUSE_SUT0 (unsigned char)~_BV(4) /* Select start-up time */ -#define FUSE_SUT1 (unsigned char)~_BV(5) /* Select start-up time */ -#define FUSE_CKOUT (unsigned char)~_BV(6) /* Oscillator output option */ -#define FUSE_CKDIV8 (unsigned char)~_BV(7) /* Divide clock by 8 */ -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - - -/* High Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) /* Brown-out Detector trigger level */ -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) /* Brown-out Detector trigger level */ -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) /* Brown out detector trigger level */ -#define FUSE_EESAVE (unsigned char)~_BV(3) /* EEPROM memory is preserved through chip erase */ -#define FUSE_WDTON (unsigned char)~_BV(4) /* Watchdog timer always on */ -#define FUSE_SPIEN (unsigned char)~_BV(5) /* Enable Serial programming and Data Downloading */ -#define FUSE_DWEN (unsigned char)~_BV(6) /* debugWIRE Enable */ -#define FUSE_RSTDISBL (unsigned char)~_BV(7) /* External Reset Disable */ -#define HFUSE_DEFAULT (FUSE_SPIEN) - - -/* Extended Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) /* Select Reset Vector */ -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) /* Select Boot Size */ -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) /* Select Boot Size */ -#define FUSE_PSCRV (unsigned char)~_BV(4) /* PSCOUT Reset Value */ -#define FUSE_PSC0RB (unsigned char)~_BV(5) /* PSC0 Reset Behaviour */ -#define FUSE_PSC1RB (unsigned char)~_BV(6) /* PSC1 Reset Behaviour */ -#define FUSE_PSC2RB (unsigned char)~_BV(7) /* PSC2 Reset Behaviour */ -#define EFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x93 -#define SIGNATURE_2 0x83 - - -#endif /* _AVR_IO90PWM2B_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io90pwm316.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io90pwm316.h deleted file mode 100644 index 7c1cc6fc2..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io90pwm316.h +++ /dev/null @@ -1,1224 +0,0 @@ -/* Copyright (c) 2007, Atmel Corporation - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: io90pwm316.h,v 1.7.2.7 2008/10/17 23:27:46 arcanum Exp $ */ - -/* avr/io90pwm316.h - definitions for AT90PWM316 */ - -#ifndef _AVR_IO90PWM316_H_ -#define _AVR_IO90PWM316_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "io90pwm316.h" -#else -# error "Attempt to include more than one file." -#endif - -/* I/O registers */ - -/* Port B Input Pins Address */ -#define PINB _SFR_IO8(0x03) -#define PINB0 0 -#define PINB1 1 -#define PINB2 2 -#define PINB3 3 -#define PINB4 4 -#define PINB5 5 -#define PINB6 6 -#define PINB7 7 - -/* Port B Data Direction Register */ -#define DDRB _SFR_IO8(0x04) -#define DDB0 0 -#define DDB1 1 -#define DDB2 2 -#define DDB3 3 -#define DDB4 4 -#define DDB5 5 -#define DDB6 6 -#define DDB7 7 - -/* Port B Data Register */ -#define PORTB _SFR_IO8(0x05) -#define PB0 0 -#define PB1 1 -#define PB2 2 -#define PB3 3 -#define PB4 4 -#define PB5 5 -#define PB6 6 -#define PB7 7 - -/* Port C Input Pins Address */ -#define PINC _SFR_IO8(0x06) -#define PINC0 0 -#define PINC1 1 -#define PINC2 2 -#define PINC3 3 -#define PINC4 4 -#define PINC5 5 -#define PINC6 6 -#define PINC7 7 - -/* Port C Data Direction Register */ -#define DDRC _SFR_IO8(0x07) -#define DDC0 0 -#define DDC1 1 -#define DDC2 2 -#define DDC3 3 -#define DDC4 4 -#define DDC5 5 -#define DDC6 6 -#define DDC7 7 - -/* Port C Data Register */ -#define PORTC _SFR_IO8(0x08) -#define PC0 0 -#define PC1 1 -#define PC2 2 -#define PC3 3 -#define PC4 4 -#define PC5 5 -#define PC6 6 -#define PC7 7 - -/* Port D Input Pins Address */ -#define PIND _SFR_IO8(0x09) -#define PIND0 0 -#define PIND1 1 -#define PIND2 2 -#define PIND3 3 -#define PIND4 4 -#define PIND5 5 -#define PIND6 6 -#define PIND7 7 - -/* Port D Data Direction Register */ -#define DDRD _SFR_IO8(0x0A) -#define DDD0 0 -#define DDD1 1 -#define DDD2 2 -#define DDD3 3 -#define DDD4 4 -#define DDD5 5 -#define DDD6 6 -#define DDD7 7 - -/* Port D Data Register */ -#define PORTD _SFR_IO8(0x0B) -#define PD0 0 -#define PD1 1 -#define PD2 2 -#define PD3 3 -#define PD4 4 -#define PD5 5 -#define PD6 6 -#define PD7 7 - -/* Port E Input Pins Address */ -#define PINE _SFR_IO8(0x0C) -#define PINE0 0 -#define PINE1 1 -#define PINE2 2 - -/* Port E Data Direction Register */ -#define DDRE _SFR_IO8(0x0D) -#define DDE0 0 -#define DDE1 1 -#define DDE2 2 - -/* Port E Data Register */ -#define PORTE _SFR_IO8(0x0E) -#define PE0 0 -#define PE1 1 -#define PE2 2 - -/* Timer/Counter 0 Interrupt Flag Register */ -#define TIFR0 _SFR_IO8(0x15) -#define TOV0 0 /* Overflow Flag */ -#define OCF0A 1 /* Output Compare Flag 0A */ -#define OCF0B 2 /* Output Compare Flag 0B */ - -/* Timer/Counter1 Interrupt Flag Register */ -#define TIFR1 _SFR_IO8(0x16) -#define TOV1 0 /* Overflow Flag */ -#define OCF1A 1 /* Output Compare Flag 1A*/ -#define OCF1B 2 /* Output Compare Flag 1B*/ -#define ICF1 5 /* Input Capture Flag 1 */ - -/* General Purpose I/O Register 1 */ -#define GPIOR1 _SFR_IO8(0x19) -#define GPIOR10 0 -#define GPIOR11 1 -#define GPIOR12 2 -#define GPIOR13 3 -#define GPIOR14 4 -#define GPIOR15 5 -#define GPIOR16 6 -#define GPIOR17 7 - -/* General Purpose I/O Register 2 */ -#define GPIOR2 _SFR_IO8(0x1A) -#define GPIOR20 0 -#define GPIOR21 1 -#define GPIOR22 2 -#define GPIOR23 3 -#define GPIOR24 4 -#define GPIOR25 5 -#define GPIOR26 6 -#define GPIOR27 7 - -/* General Purpose I/O Register 3 */ -#define GPIOR3 _SFR_IO8(0x1B) -#define GPIOR30 0 -#define GPIOR31 1 -#define GPIOR32 2 -#define GPIOR33 3 -#define GPIOR34 4 -#define GPIOR35 5 -#define GPIOR36 6 -#define GPIOR37 7 - -/* External Interrupt Flag Register */ -#define EIFR _SFR_IO8(0x1C) -#define INTF0 0 -#define INTF1 1 -#define INTF2 2 -#define INTF3 3 - -/* External Interrupt Mask Register */ -#define EIMSK _SFR_IO8(0x1D) -#define INT0 0 /* External Interrupt Request 0 Enable */ -#define INT1 1 /* External Interrupt Request 1 Enable */ -#define INT2 2 /* External Interrupt Request 2 Enable */ -#define INT3 3 /* External Interrupt Request 3 Enable */ - -/* General Purpose I/O Register 0 */ -#define GPIOR0 _SFR_IO8(0x1E) -#define GPIOR00 0 -#define GPIOR01 1 -#define GPIOR02 2 -#define GPIOR03 3 -#define GPIOR04 4 -#define GPIOR05 5 -#define GPIOR06 6 -#define GPIOR07 7 - -/* EEPROM Control Register */ -#define EECR _SFR_IO8(0x1F) -#define EERE 0 /* EEPROM Read Enable */ -#define EEWE 1 /* EEPROM Write Enable */ -#define EEMWE 2 /* EEPROM Master Write Enable */ -#define EERIE 3 /* EEPROM Ready Interrupt Enable */ - -/* EEPROM Data Register */ -#define EEDR _SFR_IO8(0x20) -#define EEDR0 0 -#define EEDR1 1 -#define EEDR2 2 -#define EEDR3 3 -#define EEDR4 4 -#define EEDR5 5 -#define EEDR6 6 -#define EEDR7 7 - -/* The EEPROM Address Registers */ -#define EEAR _SFR_IO16(0x21) -#define EEARL _SFR_IO8(0x21) -#define EEAR0 0 -#define EEAR1 1 -#define EEAR2 2 -#define EEAR3 3 -#define EEAR4 4 -#define EEAR5 5 -#define EEAR6 6 -#define EEAR7 7 -#define EEARH _SFR_IO8(0x22) -#define EEAR8 0 -#define EEAR9 1 -#define EEAR10 2 -#define EEAR11 3 - -/* 6-char sequence denoting where to find the EEPROM registers in memory space. - Adresses denoted in hex syntax with uppercase letters. Used by the EEPROM - subroutines. - First two letters: EECR address. - Second two letters: EEDR address. - Last two letters: EEAR address. */ -#define __EEPROM_REG_LOCATIONS__ 1F2021 - -/* General Timer/Counter Control Register */ -#define GTCCR _SFR_IO8(0x23) -#define PSR10 0 /* Prescaler Reset Timer/Counter1 and Timer/Counter0 */ -#define ICPSEL1 6 /* Timer1 Input Capture Selection Bit */ -#define TSM 7 /* Timer/Counter Synchronization Mode */ - -/* Timer/Counter Control Register A */ -#define TCCR0A _SFR_IO8(0x24) -#define WGM00 0 /* Waveform Generation Mode */ -#define WGM01 1 /* Waveform Generation Mode */ -#define COM0B0 4 /* Compare Output Mode, Fast PWm */ -#define COM0B1 5 /* Compare Output Mode, Fast PWm */ -#define COM0A0 6 /* Compare Output Mode, Phase Correct PWM Mode */ -#define COM0A1 7 /* Compare Output Mode, Phase Correct PWM Mode */ - -/* Timer/Counter Control Register B */ -#define TCCR0B _SFR_IO8(0x25) -#define CS00 0 /* Clock Select */ -#define CS01 1 /* Clock Select */ -#define CS02 2 /* Clock Select */ -#define WGM02 3 /* Waveform Generation Mode */ -#define FOC0B 6 /* Force Output Compare B */ -#define FOC0A 7 /* Force Output Compare A */ - -/* Timer/Counter0 Register */ -#define TCNT0 _SFR_IO8(0x26) -#define TCNT00 0 -#define TCNT01 1 -#define TCNT02 2 -#define TCNT03 3 -#define TCNT04 4 -#define TCNT05 5 -#define TCNT06 6 -#define TCNT07 7 - -/* Timer/Counter0 Output Compare Register A */ -#define OCR0A _SFR_IO8(0x27) -#define OCR0A0 0 -#define OCR0A1 1 -#define OCR0A2 2 -#define OCR0A3 3 -#define OCR0A4 4 -#define OCR0A5 5 -#define OCR0A6 6 -#define OCR0A7 7 - -/* Timer/Counter0 Output Compare Register B */ -#define OCR0B _SFR_IO8(0x28) -#define OCR0B0 0 -#define OCR0B1 1 -#define OCR0B2 2 -#define OCR0B3 3 -#define OCR0B4 4 -#define OCR0B5 5 -#define OCR0B6 6 -#define OCR0B7 7 - -/* PLL Control and Status Register */ -#define PLLCSR _SFR_IO8(0x29) -#define PLOCK 0 /* PLL Lock Detector */ -#define PLLE 1 /* PLL Enable */ -#define PLLF 2 /* PLL Factor */ - -/* SPI Control Register */ -#define SPCR _SFR_IO8(0x2C) -#define SPR0 0 /* SPI Clock Rate Select 0 */ -#define SPR1 1 /* SPI Clock Rate Select 1 */ -#define CPHA 2 /* Clock Phase */ -#define CPOL 3 /* Clock polarity */ -#define MSTR 4 /* Master/Slave Select */ -#define DORD 5 /* Data Order */ -#define SPE 6 /* SPI Enable */ -#define SPIE 7 /* SPI Interrupt Enable */ - -/* SPI Status Register */ -#define SPSR _SFR_IO8(0x2D) -#define SPI2X 0 /* Double SPI Speed Bit */ -#define WCOL 6 /* Write Collision Flag */ -#define SPIF 7 /* SPI Interrupt Flag */ - -/* SPI Data Register */ -#define SPDR _SFR_IO8(0x2E) -#define SPD0 0 -#define SPD1 1 -#define SPD2 2 -#define SPD3 3 -#define SPD4 4 -#define SPD5 5 -#define SPD6 6 -#define SPD7 7 - -/* Analog Comparator Status Register */ -#define ACSR _SFR_IO8(0x30) -#define AC0O 0 /* Analog Comparator 0 Output Bit */ -#define AC1O 1 /* Analog Comparator 1 Output Bit */ -#define AC2O 2 /* Analog Comparator 2 Output Bit */ -#define AC0IF 4 /* Analog Comparator 0 Interrupt Flag Bit */ -#define AC1IF 5 /* Analog Comparator 1 Interrupt Flag Bit */ -#define AC2IF 6 /* Analog Comparator 2 Interrupt Flag Bit */ -#define ACCKDIV 7 /* Analog Comparator Clock Divider */ - -/* Sleep Mode Control Register */ -#define SMCR _SFR_IO8(0x33) -#define SE 0 /* Sleep Enable */ -#define SM0 1 /* Sleep Mode Select bit0 */ -#define SM1 2 /* Sleep Mode Select bit1 */ -#define SM2 3 /* Sleep Mode Select bit2 */ - -/* MCU Status Register */ -#define MCUSR _SFR_IO8(0x34) -#define PORF 0 /* Power-on reset flag */ -#define EXTRF 1 /* External Reset Flag */ -#define BORF 2 /* Brown-out Reset Flag */ -#define WDRF 3 /* Watchdog Reset Flag */ - -/* MCU Control Register */ -#define MCUCR _SFR_IO8(0x35) -#define IVCE 0 /* Interrupt Vector Change Enable */ -#define IVSEL 1 /* Interrupt Vector Select */ -#define PUD 4 /* Pull-up disable */ -#define SPIPS 7 /* SPI Pin Select */ - -/* Store Program Memory Control Register */ -#define SPMCSR _SFR_IO8(0x37) -#define SPMEN 0 /* Store Program Memory Enable */ -#define PGERS 1 /* Page Erase */ -#define PGWRT 2 /* Page Write */ -#define BLBSET 3 /* Boot Lock Bit Set */ -#define RWWSRE 4 /* Read While Write section read enable */ -#define RWWSB 6 /* Read While Write Section Busy */ -#define SPMIE 7 /* SPM Interrupt Enable */ - -/* Watchdog Timer Control Register */ -#define WDTCSR _SFR_MEM8(0x60) -#define WDP0 0 /* Watchdog Timer Prescaler bit0 */ -#define WDP1 1 /* Watchdog Timer Prescaler bit1 */ -#define WDP2 2 /* Watchdog Timer Prescaler bit2 */ -#define WDE 3 /* Watchdog Enable */ -#define WDCE 4 /* Watchdog Change Enable */ -#define WDP3 5 /* Watchdog Timer Prescaler bit3 */ -#define WDIE 6 /* Watchdog Timeout Interrupt Enable */ -#define WDIF 7 /* Watchdog Timeout Interrupt Flag */ - -/* Clock Prescaler Register */ -#define CLKPR _SFR_MEM8(0x61) -#define CLKPS0 0 /* Clock Prescaler Select bit0 */ -#define CLKPS1 1 /* Clock Prescaler Select bit1 */ -#define CLKPS2 2 /* Clock Prescaler Select bit2 */ -#define CLKPS3 3 /* Clock Prescaler Select bit3 */ -#define CLKPCE 7 /* Clock Prescaler Change Enable */ - -/* Power Reduction Register */ -#define PRR _SFR_MEM8(0x64) -#define PRADC 0 /* Power Reduction ADC */ -#define PRUSART 1 /* Power Reduction USART */ -#define PRSPI 2 /* Power Reduction Serial Peripheral Interface */ -#define PRTIM0 3 /* Power Reduction Timer/Counter0 */ -#define PRTIM1 4 /* Power Reduction Timer/Counter1 */ -#define PRPSC0 5 /* Power Reduction PSC0 */ -#define PRPSC1 6 /* Power Reduction PSC1 */ -#define PRPSC2 7 /* Power Reduction PSC2 */ - -/* Oscillator Calibration Value */ -#define OSCCAL _SFR_MEM8(0x66) -#define CAL0 0 -#define CAL1 1 -#define CAL2 2 -#define CAL3 3 -#define CAL4 4 -#define CAL5 5 -#define CAL6 6 - -/* External Interrupt Control Register A */ -#define EICRA _SFR_MEM8(0x69) -#define ISC00 0 -#define ISC01 1 -#define ISC10 2 -#define ISC11 3 -#define ISC20 4 -#define ISC21 5 -#define ISC30 6 -#define ISC31 7 - -/* Timer/Counter0 Interrupt Mask Register */ -#define TIMSK0 _SFR_MEM8(0x6E) -#define TOIE0 0 /* Overflow Interrupt Enable */ -#define OCIE0A 1 /* Output Compare Match A Interrupt Enable */ -#define OCIE0B 2 /* Output Compare Match B Interrupt Enable */ - -/* Timer/Counter1 Interrupt Mask Register */ -#define TIMSK1 _SFR_MEM8(0x6F) -#define TOIE1 0 /* Overflow Interrupt Enable */ -#define OCIE1A 1 /* Output Compare Match A Interrupt Enable */ -#define OCIE1B 2 /* Output Compare Match B Interrupt Enable */ -#define ICIE1 5 /* Input Capture Interrupt Enable */ - -/* Amplifier 0 Control and Status register */ -#define AMP0CSR _SFR_MEM8(0x76) -#define AMP0TS0 0 -#define AMP0TS1 1 -#define AMP0G0 4 -#define AMP0G1 5 -#define AMP0IS 6 -#define AMP0EN 7 - -/* Amplifier 1 Control and Status register */ -#define AMP1CSR _SFR_MEM8(0x77) -#define AMP1TS0 0 -#define AMP1TS1 1 -#define AMP1G0 4 -#define AMP1G1 5 -#define AMP1IS 6 -#define AMP1EN 7 - -/* ADC Result Data Register */ -#ifndef __ASSEMBLER__ -#define ADC _SFR_MEM16(0x78) -#endif -#define ADCW _SFR_MEM16(0x78) -#define ADCL _SFR_MEM8(0x78) -#define ADCH _SFR_MEM8(0x79) - -/* ADC Control and Status Register A */ -#define ADCSRA _SFR_MEM8(0x7A) -#define ADPS0 0 /* ADC Prescaler Select bit0 */ -#define ADPS1 1 /* ADC Prescaler Select bit1 */ -#define ADPS2 2 /* ADC Prescaler Select bit2 */ -#define ADIE 3 /* ADC Interrupt Enable */ -#define ADIF 4 /* ADC Interrupt Flag */ -#define ADATE 5 /* ADC Auto Trigger Enable */ -#define ADSC 6 /* ADC Start Conversion */ -#define ADEN 7 /* ADC Enable */ - -/* ADC Control and Status Register B */ -#define ADCSRB _SFR_MEM8(0x7B) -#define ADTS0 0 /* ADC Auto Trigger Source 0 */ -#define ADTS1 1 /* ADC Auto Trigger Source 1 */ -#define ADTS2 2 /* ADC Auto Trigger Source 2 */ -#define ADTS3 3 /* ADC Auto Trigger Source 3 */ -#define ADHSM 7 /* ADC High Speed Mode */ - -/* ADC multiplexer Selection Register */ -#define ADMUX _SFR_MEM8(0x7C) -#define MUX0 0 /* Analog Channel and Gain Selection bit0 */ -#define MUX1 1 /* Analog Channel and Gain Selection bit1 */ -#define MUX2 2 /* Analog Channel and Gain Selection bit2 */ -#define MUX3 3 /* Analog Channel and Gain Selection bit3 */ -#define ADLAR 5 /* Left Adjust Result */ -#define REFS0 6 /* Reference Selection bit0 */ -#define REFS1 7 /* Reference Selection bit1 */ - -/* Digital Input Disable Register 0 */ -#define DIDR0 _SFR_MEM8(0x7E) -#define ADC0D 0 /* ADC0 Digital input Disable */ -#define ADC1D 1 /* ADC1 Digital input Disable */ -#define ADC2D 2 /* ADC2 Digital input Disable */ -#define ADC3D 3 /* ADC3 Digital input Disable */ -#define ADC4D 4 /* ADC4 Digital input Disable */ -#define ADC5D 5 /* ADC5 Digital input Disable */ -#define ADC6D 6 /* ADC6 Digital input Disable */ -#define ADC7D 7 /* ADC7 Digital input Disable */ - -/* Digital Input Disable Register 1 */ -#define DIDR1 _SFR_MEM8(0x7F) -#define ADC8D 0 /* ADC8 Digital input Disable */ -#define ADC9D 1 /* ADC9 Digital input Disable */ -#define ADC10D 2 /* ADC10 Digital input Disable */ -#define AMP0ND 3 -#define AMP0PD 4 -#define ACMP0D 5 - -/* Timer/Counter1 Control Register A */ -#define TCCR1A _SFR_MEM8(0x80) -#define WGM10 0 /* Waveform Generation Mode */ -#define WGM11 1 /* Waveform Generation Mode */ -#define COM1B0 4 /* Compare Output Mode 1B, bit 0 */ -#define COM1B1 5 /* Compare Output Mode 1B, bit 1 */ -#define COM1A0 6 /* Comparet Ouput Mode 1A, bit 0 */ -#define COM1A1 7 /* Comparet Ouput Mode 1A, bit 1 */ - -/* Timer/Counter1 Control Register B */ -#define TCCR1B _SFR_MEM8(0x81) -#define CS10 0 /* Prescaler source of Timer/Counter 1 */ -#define CS11 1 /* Prescaler source of Timer/Counter 1 */ -#define CS12 2 /* Prescaler source of Timer/Counter 1 */ -#define WGM12 3 /* Waveform Generation Mode */ -#define WGM13 4 /* Waveform Generation Mode */ -#define ICES1 6 /* Input Capture 1 Edge Select */ -#define ICNC1 7 /* Input Capture 1 Noise Canceler */ - -/* Timer/Counter1 Control Register C */ -#define TCCR1C _SFR_MEM8(0x82) -#define FOC1B 6 /* Force Output Compare for Channel B */ -#define FOC1A 7 /* Force Output Compare for Channel A */ - -/* Timer/Counter1 */ -#define TCNT1 _SFR_MEM16(0x84) -#define TCNT1L _SFR_MEM8(0x84) -#define TCNT10 0 -#define TCNT11 1 -#define TCNT12 2 -#define TCNT13 3 -#define TCNT14 4 -#define TCNT15 5 -#define TCNT16 6 -#define TCNT17 7 -#define TCNT1H _SFR_MEM8(0x85) -#define TCNT18 0 -#define TCNT19 1 -#define TCNT110 2 -#define TCNT111 3 -#define TCNT112 4 -#define TCNT113 5 -#define TCNT114 6 -#define TCNT115 7 - -/* Input Capture Register 1 */ -#define ICR1 _SFR_MEM16(0x86) -#define ICR1L _SFR_MEM8(0x86) -#define ICR17 7 -#define ICR16 6 -#define ICR15 5 -#define ICR14 4 -#define ICR13 3 -#define ICR12 2 -#define ICR11 1 -#define ICR10 0 -#define ICR1H _SFR_MEM8(0x87) -#define ICR115 7 -#define ICR114 6 -#define ICR113 5 -#define ICR112 4 -#define ICR111 3 -#define ICR110 2 -#define ICR19 1 -#define ICR18 0 - -/* Output Compare Register 1 A */ -#define OCR1A _SFR_MEM16(0x88) -#define OCR1AL _SFR_MEM8(0x88) -#define OCR1A0 0 -#define OCR1A1 1 -#define OCR1A2 2 -#define OCR1A3 3 -#define OCR1A4 4 -#define OCR1A5 5 -#define OCR1A6 6 -#define OCR1A7 7 -#define OCR1AH _SFR_MEM8(0x89) -#define OCR1A8 0 -#define OCR1A9 1 -#define OCR1A10 2 -#define OCR1A11 3 -#define OCR1A12 4 -#define OCR1A13 5 -#define OCR1A14 6 -#define OCR1A15 7 - -/* Output Compare Register 1 B */ -#define OCR1B _SFR_MEM16(0x8A) -#define OCR1BL _SFR_MEM8(0x8A) -#define OCR1B0 0 -#define OCR1B1 1 -#define OCR1B2 2 -#define OCR1B3 3 -#define OCR1B4 4 -#define OCR1B5 5 -#define OCR1B6 6 -#define OCR1B7 7 -#define OCR1BH _SFR_MEM8(0x8B) -#define OCR1B8 0 -#define OCR1B9 1 -#define OCR1B10 2 -#define OCR1B11 3 -#define OCR1B12 4 -#define OCR1B13 5 -#define OCR1B14 6 -#define OCR1B15 7 - -/* PSC0 Interrupt Flag Register */ -#define PIFR0 _SFR_MEM8(0xA0) -#define PEOP0 0 /* End Of PSC0 Interrupt */ -#define PRN00 1 /* PSC0 Ramp Number bit0 */ -#define PRN01 2 /* PSC0 Ramp Number bit1 */ -#define PEV0A 3 /* PSC0 External Event A Interrupt */ -#define PEV0B 4 /* PSC0 External Event B Interrupt */ -#define PSEI0 5 /* PSC0 Synchro Error Interrupt */ -#define POAC0A 6 /* PSC0 Output A Activity */ -#define POAC0B 7 /* PSC0 Output B Activity */ - -/* PSC0 Interrupt Mask Register */ -#define PIM0 _SFR_MEM8(0xA1) -#define PEOPE0 0 /* PSC0 End Of Cycle Interrupt Enable */ -#define PEVE0A 3 /* PSC0 External Event A Interrupt Enable */ -#define PEVE0B 4 /* PSC0 External Event B Interrupt Enable */ -#define PSEIE0 5 /* PSC0 Synchro Error Interrupt Enable */ - -/* PSC1 Interrupt Flag Register */ -#define PIFR1 _SFR_MEM8(0xA2) -#define PEOP1 0 -#define PRN10 1 -#define PRN11 2 -#define PEV1A 3 -#define PEV1B 4 -#define PSEI1 5 -#define POAC1A 6 -#define POAC1B 7 - -/* PSC1 Interrupt Mask Register */ -#define PIM1 _SFR_MEM8(0xA3) - -/* PSC2 Interrupt Flag Register */ -#define PIFR2 _SFR_MEM8(0xA4) -#define PEOP2 0 /* End Of PSC2 Interrupt */ -#define PRN20 1 /* PSC2 Ramp Number bit0 */ -#define PRN21 2 /* PSC2 Ramp Number bit1 */ -#define PEV2A 3 /* PSC2 External Event A Interrupt */ -#define PEV2B 4 /* PSC2 External Event B Interrupt */ -#define PSEI2 5 /* PSC2 Synchro Error Interrupt */ -#define POAC2A 6 /* PSC2 Output A Activity */ -#define POAC2B 7 /* PSC2 Output B Activity */ - -/* PSC2 Interrupt Mask Register */ -#define PIM2 _SFR_MEM8(0xA5) -#define PEOPE2 0 /* PSC2 End Of Cycle Interrupt Enable */ -#define PEVE2A 3 /* PSC2 External Event A Interrupt Enable */ -#define PEVE2B 4 /* PSC2 External Event B Interrupt Enable */ -#define PSEIE2 5 /* PSC2 Synchro Error Interrupt Enable */ - -/* Digital to Analog Conversion Control Register */ -#define DACON _SFR_MEM8(0xAA) -#define DAEN 0 /* Digital to Analog Enable bit */ -#define DAOE 1 /* Digital to Analog Output Enable bit */ -#define DALA 2 /* Digital to Analog Left Adjust */ -#define DATS0 4 /* DAC Trigger Selection bit0 */ -#define DATS1 5 /* DAC Trigger Selection bit1 */ -#define DATS2 6 /* DAC Trigger Selection bit2 */ -#define DAATE 7 /* DAC Auto Trigger Enable bit */ - -/* Digital to Analog Converter input Register */ -#define DAC _SFR_MEM16(0xAB) -#define DACL _SFR_MEM8(0xAB) -#define DACH _SFR_MEM8(0xAC) - -/* Analog Comparator 0 Control Register */ -#define AC0CON _SFR_MEM8(0xAD) -#define AC0M0 0 /* Analog Comparator 0 Multiplexer register bit0 */ -#define AC0M1 1 /* Analog Comparator 0 Multiplexer register bit1 */ -#define AC0M2 2 /* Analog Comparator 0 Multiplexer register bit2 */ -#define AC0IS0 4 /* Analog Comparator 0 Interrupt Select bit0 */ -#define AC0IS1 5 /* Analog Comparator 0 Interrupt Select bit1 */ -#define AC0IE 6 /* Analog Comparator 0 Interrupt Enable bit */ -#define AC0EN 7 /* Analog Comparator 0 Enable Bit */ - -/* Analog Comparator 1 Control Register */ -#define AC1CON _SFR_MEM8(0xAE) -#define AC1M0 0 /* Analog Comparator 1 Multiplexer register bit0 */ -#define AC1M1 1 /* Analog Comparator 1 Multiplexer register bit1 */ -#define AC1M2 2 /* Analog Comparator 1 Multiplexer register bit2 */ -#define AC1ICE 3 /* Analog Comparator 1 Interrupt Capture Enable bit */ -#define AC1IS0 4 /* Analog Comparator 1 Interrupt Select bit0 */ -#define AC1IS1 5 /* Analog Comparator 1 Interrupt Select bit1 */ -#define AC1IE 6 /* Analog Comparator 1 Interrupt Enable bit */ -#define AC1EN 7 /* Analog Comparator 1 Enable Bit */ - -/* Analog Comparator 2 Control Register */ -#define AC2CON _SFR_MEM8(0xAF) -#define AC2M0 0 /* Analog Comparator 2 Multiplexer register bit0 */ -#define AC2M1 1 /* Analog Comparator 2 Multiplexer register bit1 */ -#define AC2M2 2 /* Analog Comparator 2 Multiplexer register bit2 */ -#define AC2IS0 4 /* Analog Comparator 2 Interrupt Select bit0 */ -#define AC2IS1 5 /* Analog Comparator 2 Interrupt Select bit1 */ -#define AC2IE 6 /* Analog Comparator 2 Interrupt Enable bit */ -#define AC2EN 7 /* Analog Comparator 2 Enable Bit */ - -/* USART Control and Status Register A */ -#define UCSRA _SFR_MEM8(0xC0) -#define MPCM 0 /* Multi-processor Communication Mode */ -#define U2X 1 /* Double the USART Transmission Speed */ -#define UPE 2 /* USART Parity Error */ -#define DOR 3 /* Data OverRun */ -#define FE 4 /* Frame Error */ -#define UDRE 5 /* USART Data Register Empty */ -#define TXC 6 /* USART Transmit Complete */ -#define RXC 7 /* USART Receive Complete */ - -/* USART Control and Status Register B */ -#define UCSRB _SFR_MEM8(0xC1) -#define TXB8 0 /* Transmit Data Bit 8 */ -#define RXB8 1 /* Receive Data Bit 8 */ -#define UCSZ2 2 /* Character Size */ -#define TXEN 3 /* Transmitter Enable */ -#define RXEN 4 /* Receiver Enable */ -#define UDRIE 5 /* USART Data Register Empty Interrupt Enable */ -#define TXCIE 6 /* TX Complete Interrupt Enable */ -#define RXCIE 7 /* RX Complete Interrupt Enable */ - -/* USART Control and Status Register C */ -#define UCSRC _SFR_MEM8(0xC2) -#define UCPOL 0 /* Clock Polarity */ -#define UCSZ0 1 /* Character Size bit0 */ -#define UCSZ1 2 /* Character Size bit1 */ -#define USBS 3 /* Stop Bit Select */ -#define UPM0 4 /* Parity Mode bit0 */ -#define UPM1 5 /* Parity Mode bit1 */ -#define UMSEL 6 /* USART Mode Select */ - -/* USART Baud Rate Register */ -#define UBRR _SFR_MEM16(0xC4) -#define UBRRL _SFR_MEM8(0xC4) -#define UBRRH _SFR_MEM8(0xC5) - -/* USART I/O Data Register */ -#define UDR _SFR_MEM8(0xC6) - -/* EUSART Control and Status Register A */ -#define EUCSRA _SFR_MEM8(0xC8) -#define URxS0 0 /* EUSART Receive Character Size bit0 */ -#define URxS1 1 /* EUSART Receive Character Size bit1 */ -#define URxS2 2 /* EUSART Receive Character Size bit2 */ -#define URxS3 3 /* EUSART Receive Character Size bit3 */ -#define UTxS0 4 /* EUSART Transmit Character Size bit0 */ -#define UTxS1 5 /* EUSART Transmit Character Size bit1 */ -#define UTxS2 6 /* EUSART Transmit Character Size bit2 */ -#define UTxS3 7 /* EUSART Transmit Character Size bit3 */ - -/* EUSART Control and Status Register B */ -#define EUCSRB _SFR_MEM8(0xC9) -#define BODR 0 /* Bit Order */ -#define EMCH 1 /* Manchester mode */ -#define EUSBS 3 /* EUSBS Enable Bit */ -#define EUSART 4 /* EUSART Enable Bit */ - -/* EUSART Control and Status Register C */ -#define EUCSRC _SFR_MEM8(0xCA) -#define STP0 0 /* Stop bits values bit0 */ -#define STP1 1 /* Stop bits values bit1 */ -#define F1617 2 -#define FEM 3 /* Frame Error Manchester */ - -/* Manchester receiver Baud Rate Registers */ -#define MUBRR _SFR_MEM16(0xCC) -#define MUBRRL _SFR_MEM8(0xCC) -#define MUBRRH _SFR_MEM8(0xCD) - -/* EUSART I/O Data Register */ -#define EUDR _SFR_MEM8(0xCE) - -/* PSC 0 Synchro and Output Configuration */ -#define PSOC0 _SFR_MEM8(0xD0) -#define POEN0A 0 /* PSC 0 OUT Part A Output Enable */ -#define POEN0B 2 /* PSC 0 OUT Part B Output Enable */ -#define PSYNC00 4 /* Synchronization Out for ADC Selection bit0 */ -#define PSYNC01 5 /* Synchronization Out for ADC Selection bit1 */ - -/* Output Compare SA Registers */ -#define OCR0SA _SFR_MEM16(0xD2) -#define OCR0SAL _SFR_MEM8(0xD2) -#define OCR0SAH _SFR_MEM8(0xD3) - -/* Output Compare RA Registers */ -#define OCR0RA _SFR_MEM16(0xD4) -#define OCR0RAL _SFR_MEM8(0xD4) -#define OCR0RAH _SFR_MEM8(0xD5) - -/* Output Compare SB Registers */ -#define OCR0SB _SFR_MEM16(0xD6) -#define OCR0SBL _SFR_MEM8(0xD6) -#define OCR0SBH _SFR_MEM8(0xD7) - -/* Output Compare RB Registers */ -#define OCR0RB _SFR_MEM16(0xD8) -#define OCR0RBL _SFR_MEM8(0xD8) -#define OCR0RBH _SFR_MEM8(0xD9) - -/* PSC 0 Configuration Register */ -#define PCNF0 _SFR_MEM8(0xDA) -#define PCLKSEL0 1 /* PSC 0 Input Clock Select */ -#define POP0 2 /* PSC 0 Output Polarity */ -#define PMODE00 3 /* PSC 0 Mode bit0 */ -#define PMODE01 4 /* PSC 0 Mode bit1 */ -#define PLOCK0 5 /* PSC 0 Lock */ -#define PALOCK0 6 /* PSC 0 Autolock */ -#define PFIFTY0 7 /* PSC 0 Fifty */ - -/* PSC 0 Control Register */ -#define PCTL0 _SFR_MEM8(0xDB) -#define PRUN0 0 /* PSC 0 Run */ -#define PCCYC0 1 /* PSC 0 Complete Cycle */ -#define PARUN0 2 /* PSC 0 Autorun */ -#define PAOC0A 3 /* PSC 0 Asynchronous Output Control A */ -#define PAOC0B 4 /* PSC 0 Asynchronous Output Control B */ -#define PBFM0 5 /* Balance Flank Width Modulation */ -#define PPRE00 6 /* PSC 0 Prescaler Select bit0 */ -#define PPRE01 7 /* PSC 0 Prescaler Select bit1 */ - -/* PSC 0 Input A Control Register */ -#define PFRC0A _SFR_MEM8(0xDC) -#define PRFM0A0 0 /* PSC 0 Fault Mode bit0 */ -#define PRFM0A1 1 /* PSC 0 Fault Mode bit1 */ -#define PRFM0A2 2 /* PSC 0 Fault Mode bit2 */ -#define PRFM0A3 3 /* PSC 0 Fault Mode bit3 */ -#define PFLTE0A 4 /* PSC 0 Filter Enable on Input Part A */ -#define PELEV0A 5 /* PSC 0 Edge Level Selector of Input Part A */ -#define PISEL0A 6 /* PSC 0 Input Select for Part A */ -#define PCAE0A 7 /* PSC 0 Capture Enable Input Part A */ - -/* PSC 0 Input B Control Register */ -#define PFRC0B _SFR_MEM8(0xDD) -#define PRFM0B0 0 /* PSC 0 Fault Mode bit0 */ -#define PRFM0B1 1 /* PSC 0 Fault Mode bit1 */ -#define PRFM0B2 2 /* PSC 0 Fault Mode bit2 */ -#define PRFM0B3 3 /* PSC 0 Fault Mode bit3 */ -#define PFLTE0B 4 /* PSC 0 Filter Enable on Input Part B */ -#define PELEV0B 5 /* PSC 0 Edge Level Selector of Input Part B */ -#define PISEL0B 6 /* PSC 0 Input Select for Part B */ -#define PCAE0B 7 /* PSC 0 Capture Enable Input Part B */ - -/* PSC 0 Input Capture Registers */ -#define PICR0 _SFR_MEM16(0xDE) -#define PICR0L _SFR_MEM8(0xDE) -#define PICR0H _SFR_MEM8(0xDF) -#define PCST0 7 /* PSC Capture Software Trig bit */ - -/* PSC 1 Synchro and Output Configuration */ -#define PSOC1 _SFR_MEM8(0xE0) -#define POEN1A 0 -#define POEN1B 2 -#define PSYNC1_0 4 -#define PSYNC1_1 5 - -/* Output Compare SA Registers */ -#define OCR1SA _SFR_MEM16(0xE2) -#define OCR1SAL _SFR_MEM8(0xE2) -#define OCR1SAH _SFR_MEM8(0xE3) - -/* Output Compare RA Registers */ -#define OCR1RA _SFR_MEM16(0xE4) -#define OCR1RAL _SFR_MEM8(0xE4) -#define OCR1RAH _SFR_MEM8(0xE5) - -/* Output Compare SB Registers */ -#define OCR1SB _SFR_MEM16(0xE6) -#define OCR1SBL _SFR_MEM8(0xE6) -#define OCR1SBH _SFR_MEM8(0xE7) - -/* Output Compare RB Registers */ -#define OCR1RB _SFR_MEM16(0xE8) -#define OCR1RBL _SFR_MEM8(0xE8) -#define OCR1RBH _SFR_MEM8(0xE9) - -/* PSC 1 Configuration Register */ -#define PCNF1 _SFR_MEM8(0xEA) -#define PCLKSEL1 1 -#define POP1 2 -#define PMODE10 3 -#define PMODE11 4 -#define PLOCK1 5 -#define PALOCK1 6 -#define PFIFTY1 7 - -/* PSC 1 Control Register */ -#define PCTL1 _SFR_MEM8(0xEB) -#define PRUN1 0 -#define PCCYC1 1 -#define PARUN1 2 -#define PAOC1A 3 -#define PAOC1B 4 -#define PBFM1 5 -#define PPRE10 6 -#define PPRE11 7 - -/* PSC 1 Input A Control Register */ -#define PFRC1A _SFR_MEM8(0xEC) -#define PRFM1A0 0 -#define PRFM1A1 1 -#define PRFM1A2 2 -#define PRFM1A3 3 -#define PFLTE1A 4 -#define PELEV1A 5 -#define PISEL1A 6 -#define PCAE1A 7 - -/* PSC 1 Input B Control Register */ -#define PFRC1B _SFR_MEM8(0xED) -#define PRFM1B0 0 -#define PRFM1B1 1 -#define PRFM1B2 2 -#define PRFM1B3 3 -#define PFLTE1B 4 -#define PELEV1B 5 -#define PISEL1B 6 -#define PCAE1B 7 - -/* PSC 1 Input Capture Registers */ -#define PICR1 _SFR_MEM16(0xEE) -#define PICR1L _SFR_MEM8(0xEE) -#define PICR1H _SFR_MEM8(0xEF) - -/* PSC 2 Synchro and Output Configuration */ -#define PSOC2 _SFR_MEM8(0xF0) -#define POEN2A 0 /* PSC 2 OUT Part A Output Enable */ -#define POEN2C 1 /* PSCOUT22 Output Enable */ -#define POEN2B 2 /* PSC 2 OUT Part B Output Enable */ -#define POEN2D 3 /* PSCOUT23 Output Enable */ -#define PSYNC20 4 /* Synchronization Out for ADC Selection bit0 */ -#define PSYNC21 5 /* Synchronization Out for ADC Selection bit1 */ -#define POS22 6 /* PSCOUT22 Selection */ -#define POS23 7 /* PSCOUT23 Selection */ - -/* PSC 2 Output Matrix */ -#define POM2 _SFR_MEM8(0xF1) -#define POMV2A0 0 /* Output Matrix Output A Ramp 0 */ -#define POMV2A1 1 /* Output Matrix Output A Ramp 1 */ -#define POMV2A2 2 /* Output Matrix Output A Ramp 2 */ -#define POMV2A3 3 /* Output Matrix Output A Ramp 3 */ -#define POMV2B0 4 /* Output Matrix Output B Ramp 0 */ -#define POMV2B1 5 /* Output Matrix Output B Ramp 1 */ -#define POMV2B2 6 /* Output Matrix Output B Ramp 2 */ -#define POMV2B3 7 /* Output Matrix Output B Ramp 3 */ - -/* Output Compare SA Registers */ -#define OCR2SA _SFR_MEM16(0xF2) -#define OCR2SAL _SFR_MEM8(0xF2) -#define OCR2SAH _SFR_MEM8(0xF3) - -/* Output Compare RA Registers */ -#define OCR2RA _SFR_MEM16(0xF4) -#define OCR2RAL _SFR_MEM8(0xF4) -#define OCR2RAH _SFR_MEM8(0xF5) - -/* Output Compare SB Registers */ -#define OCR2SB _SFR_MEM16(0xF6) -#define OCR2SBL _SFR_MEM8(0xF6) -#define OCR2SBH _SFR_MEM8(0xF7) - -/* Output Compare RB Registers */ -#define OCR2RB _SFR_MEM16(0xF8) -#define OCR2RBL _SFR_MEM8(0xF8) -#define OCR2RBH _SFR_MEM8(0xF9) - -/* PSC 2 Configuration Register */ -#define PCNF2 _SFR_MEM8(0xFA) -#define POME2 0 /* PSC 2 Output Matrix Enable */ -#define PCLKSEL2 1 /* PSC 2 Input Clock Select */ -#define POP2 2 /* PSC 2 Output Polarity */ -#define PMODE20 3 /* PSC 2 Mode bit0 */ -#define PMODE21 4 /* PSC 2 Mode bit1 */ -#define PLOCK2 5 /* PSC 2 Lock */ -#define PALOCK2 6 /* PSC 2 Autolock */ -#define PFIFTY2 7 /* PSC 2 Fifty */ - -/* PSC 2 Control Register */ -#define PCTL2 _SFR_MEM8(0xFB) -#define PRUN2 0 /* PSC 2 Run */ -#define PCCYC2 1 /* PSC 2 Complete Cycle */ -#define PARUN2 2 /* PSC 2 Autorun */ -#define PAOC2A 3 /* PSC 2 Asynchronous Output Control A */ -#define PAOC2B 4 /* PSC 2 Asynchronous Output Control B */ -#define PBFM2 5 /* Balance Flank Width Modulation */ -#define PPRE20 6 /* PSC 2 Prescaler Select bit0 */ -#define PPRE21 7 /* PSC 2 Prescaler Select bit1 */ - -/* PSC 2 Input A Control Register */ -#define PFRC2A _SFR_MEM8(0xFC) -#define PRFM2A0 0 /* PSC 2 Fault Mode bit0 */ -#define PRFM2A1 1 /* PSC 2 Fault Mode bit1 */ -#define PRFM2A2 2 /* PSC 2 Fault Mode bit2 */ -#define PRFM2A3 3 /* PSC 2 Fault Mode bit3 */ -#define PFLTE2A 4 /* PSC 2 Filter Enable on Input Part A */ -#define PELEV2A 5 /* PSC 2 Edge Level Selector of Input Part A */ -#define PISEL2A 6 /* PSC 2 Input Select for Part A */ -#define PCAE2A 7 /* PSC 2 Capture Enable Input Part A */ - -/* PSC 2 Input B Control Register */ -#define PFRC2B _SFR_MEM8(0xFD) -#define PRFM2B0 0 /* PSC 2 Fault Mode bit0 */ -#define PRFM2B1 1 /* PSC 2 Fault Mode bit1 */ -#define PRFM2B2 2 /* PSC 2 Fault Mode bit2 */ -#define PRFM2B3 3 /* PSC 2 Fault Mode bit3 */ -#define PFLTE2B 4 /* PSC 2 Filter Enable on Input Part B */ -#define PELEV2B 5 /* PSC 2 Edge Level Selector of Input Part B */ -#define PISEL2B 6 /* PSC 2 Input Select for Part B */ -#define PCAE2B 7 /* PSC 2 Capture Enable Input Part B */ - -/* PSC 2 Input Capture Registers */ -#define PICR2 _SFR_MEM16(0xFE) -#define PICR2L _SFR_MEM8(0xFE) -#define PICR2H _SFR_MEM8(0xFF) -#define PCST2 7 /* PSC Capture Software Trig bit */ - - -/* Interrupt Vectors */ -/* Interrupt 0 is the reset vector. */ - -/* PSC2 Capture Event */ -#define PSC2_CAPT_vect _VECTOR(1) - -/* PSC2 End Cycle */ -#define PSC2_EC_vect _VECTOR(2) - -/* PSC1 Capture Event */ -#define PSC1_CAPT_vect _VECTOR(3) - -/* PSC1 End Cycle */ -#define PSC1_EC_vect _VECTOR(4) - -/* PSC0 Capture Event */ -#define PSC0_CAPT_vect _VECTOR(5) - -/* PSC0 End Cycle */ -#define PSC0_EC_vect _VECTOR(6) - -/* Analog Comparator 0 */ -#define ANALOG_COMP_0_vect _VECTOR(7) - -/* Analog Comparator 1 */ -#define ANALOG_COMP_1_vect _VECTOR(8) - -/* Analog Comparator 2 */ -#define ANALOG_COMP_2_vect _VECTOR(9) - -/* External Interrupt Request 0 */ -#define INT0_vect _VECTOR(10) - -/* Timer/Counter1 Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(11) - -/* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPA_vect _VECTOR(12) - -/* Timer/Counter Compare Match B */ -#define TIMER1_COMPB_vect _VECTOR(13) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(15) - -/* Timer/Counter0 Compare Match A */ -#define TIMER0_COMP_A_vect _VECTOR(16) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(17) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(18) - -/* External Interrupt Request 1 */ -#define INT1_vect _VECTOR(19) - -/* SPI Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(20) - -/* USART, Rx Complete */ -#define USART_RX_vect _VECTOR(21) - -/* USART Data Register Empty */ -#define USART_UDRE_vect _VECTOR(22) - -/* USART, Tx Complete */ -#define USART_TX_vect _VECTOR(23) - -/* External Interrupt Request 2 */ -#define INT2_vect _VECTOR(24) - -/* Watchdog Timeout Interrupt */ -#define WDT_vect _VECTOR(25) - -/* EEPROM Ready */ -#define EE_READY_vect _VECTOR(26) - -/* Timer Counter 0 Compare Match B */ -#define TIMER0_COMPB_vect _VECTOR(27) - -/* External Interrupt Request 3 */ -#define INT3_vect _VECTOR(28) - -/* Store Program Memory Read */ -#define SPM_READY_vect _VECTOR(31) - -#define _VECTORS_SIZE (4 * 32) - -/* Constants */ - -#define RAMEND 0x4FF -#define XRAMSIZE 0 -#define XRAMEND (RAMEND + XRAMSIZE) -#define E2END 0x1FF -#define E2PAGESIZE 4 -#define FLASHEND 0x3FFF -#define SPM_PAGESIZE 128 - - -/* Fuse Information */ - -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) /* Select Clock Source */ -#define FUSE_CKSEL1 (unsigned char)~_BV(1) /* Select Clock Source */ -#define FUSE_CKSEL2 (unsigned char)~_BV(2) /* Select Clock Source */ -#define FUSE_CKSEL3 (unsigned char)~_BV(3) /* Select Clock Source */ -#define FUSE_SUT0 (unsigned char)~_BV(4) /* Select start-up time */ -#define FUSE_SUT1 (unsigned char)~_BV(5) /* Select start-up time */ -#define FUSE_CKOUT (unsigned char)~_BV(6) /* Oscillator output option */ -#define FUSE_CKDIV8 (unsigned char)~_BV(7) /* Divide clock by 8 */ -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) /* EEPROM memory is preserved through chip erase */ -#define FUSE_WDTON (unsigned char)~_BV(4) /* Watchdog timer always on */ -#define FUSE_SPIEN (unsigned char)~_BV(5) /* Enable Serial programming and Data Downloading */ -#define FUSE_DWEN (unsigned char)~_BV(6) /* debugWIRE Enable */ -#define FUSE_RSTDISBL (unsigned char)~_BV(7) /* External Reset Diasble */ -#define HFUSE_DEFAULT (FUSE_SPIEN) - -/* Extended Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) /* Select Reset Vector */ -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) /* Select Boot Size */ -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) /* Select Boot Size */ -#define FUSE_PSCRV (unsigned char)~_BV(4) -#define FUSE_PSC0RB (unsigned char)~_BV(5) -#define FUSE_PSC1RB (unsigned char)~_BV(6) -#define FUSE_PSC2RB (unsigned char)~_BV(7) -#define EFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x94 -#define SIGNATURE_2 0x83 - - -#endif /* _AVR_IO90PWM316_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io90pwm3b.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io90pwm3b.h deleted file mode 100644 index 5eeec0430..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io90pwm3b.h +++ /dev/null @@ -1,1383 +0,0 @@ -/* Copyright (c) 2007 Atmel Corporation - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. -*/ - -/* $Id: io90pwm3b.h,v 1.3.2.11 2008/10/17 23:27:46 arcanum Exp $ */ - -/* avr/io90pwm3b.h - definitions for AT90PWM3B */ - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "io90pwm3b.h" -#else -# error "Attempt to include more than one file." -#endif - - -#ifndef _AVR_IO90PWM3B_H_ -#define _AVR_IO90PWM3B_H_ 1 - -/* Registers and associated bit numbers */ - -#define PINB _SFR_IO8(0x03) -#define PINB0 0 -#define PINB1 1 -#define PINB2 2 -#define PINB3 3 -#define PINB4 4 -#define PINB5 5 -#define PINB6 6 -#define PINB7 7 - -#define DDRB _SFR_IO8(0x04) -#define DDB0 0 -#define DDB1 1 -#define DDB2 2 -#define DDB3 3 -#define DDB4 4 -#define DDB5 5 -#define DDB6 6 -#define DDB7 7 - -#define PORTB _SFR_IO8(0x05) -#define PORTB0 0 -#define PORTB1 1 -#define PORTB2 2 -#define PORTB3 3 -#define PORTB4 4 -#define PORTB5 5 -#define PORTB6 6 -#define PORTB7 7 - -#define PINC _SFR_IO8(0x06) -#define PINC0 0 -#define PINC1 1 -#define PINC2 2 -#define PINC3 3 -#define PINC4 4 -#define PINC5 5 -#define PINC6 6 -#define PINC7 7 - -#define DDRC _SFR_IO8(0x07) -#define DDC0 0 -#define DDC1 1 -#define DDC2 2 -#define DDC3 3 -#define DDC4 4 -#define DDC5 5 -#define DDC6 6 -#define DDC7 7 - -#define PORTC _SFR_IO8(0x08) -#define PORTC0 0 -#define PORTC1 1 -#define PORTC2 2 -#define PORTC3 3 -#define PORTC4 4 -#define PORTC5 5 -#define PORTC6 6 -#define PORTC7 7 - -#define PIND _SFR_IO8(0x09) -#define PIND0 0 -#define PIND1 1 -#define PIND2 2 -#define PIND3 3 -#define PIND4 4 -#define PIND5 5 -#define PIND6 6 -#define PIND7 7 - -#define DDRD _SFR_IO8(0x0A) -#define DDD0 0 -#define DDD1 1 -#define DDD2 2 -#define DDD3 3 -#define DDD4 4 -#define DDD5 5 -#define DDD6 6 -#define DDD7 7 - -#define PORTD _SFR_IO8(0x0B) -#define PORTD0 0 -#define PORTD1 1 -#define PORTD2 2 -#define PORTD3 3 -#define PORTD4 4 -#define PORTD5 5 -#define PORTD6 6 -#define PORTD7 7 - -#define PINE _SFR_IO8(0x0C) -#define PINE0 0 -#define PINE1 1 -#define PINE2 2 - -#define DDRE _SFR_IO8(0x0D) -#define DDE0 0 -#define DDE1 1 -#define DDE2 2 - -#define PORTE _SFR_IO8(0x0E) -#define PORTE0 0 -#define PORTE1 1 -#define PORTE2 2 - -#define TIFR0 _SFR_IO8(0x15) -#define TOV0 0 -#define OCF0A 1 -#define OCF0B 2 - -#define TIFR1 _SFR_IO8(0x16) -#define TOV1 0 -#define OCF1A 1 -#define OCF1B 2 -#define ICF1 5 - -#define GPIOR1 _SFR_IO8(0x19) -#define GPIOR10 0 -#define GPIOR11 1 -#define GPIOR12 2 -#define GPIOR13 3 -#define GPIOR14 4 -#define GPIOR15 5 -#define GPIOR16 6 -#define GPIOR17 7 - -#define GPIOR2 _SFR_IO8(0x1A) -#define GPIOR20 0 -#define GPIOR21 1 -#define GPIOR22 2 -#define GPIOR23 3 -#define GPIOR24 4 -#define GPIOR25 5 -#define GPIOR26 6 -#define GPIOR27 7 - -#define GPIOR3 _SFR_IO8(0x1B) -#define GPIOR30 0 -#define GPIOR31 1 -#define GPIOR32 2 -#define GPIOR33 3 -#define GPIOR34 4 -#define GPIOR35 5 -#define GPIOR36 6 -#define GPIOR37 7 - -#define EIFR _SFR_IO8(0x1C) -#define INTF0 0 -#define INTF1 1 -#define INTF2 2 -#define INTF3 3 - -#define EIMSK _SFR_IO8(0x1D) -#define INT0 0 -#define INT1 1 -#define INT2 2 -#define INT3 3 - -#define GPIOR0 _SFR_IO8(0x1E) -#define GPIOR00 0 -#define GPIOR01 1 -#define GPIOR02 2 -#define GPIOR03 3 -#define GPIOR04 4 -#define GPIOR05 5 -#define GPIOR06 6 -#define GPIOR07 7 - -#define EECR _SFR_IO8(0x1F) -#define EERE 0 -#define EEWE 1 -#define EEMWE 2 -#define EERIE 3 -#define EEPM0 4 -#define EEPM1 5 - -#define EEDR _SFR_IO8(0x20) -#define EEDR0 0 -#define EEDR1 1 -#define EEDR2 2 -#define EEDR3 3 -#define EEDR4 4 -#define EEDR5 5 -#define EEDR6 6 -#define EEDR7 7 - -#define EEAR _SFR_IO16(0x21) - -#define EEARL _SFR_IO8(0x21) -#define EEARL0 0 -#define EEARL1 1 -#define EEARL2 2 -#define EEARL3 3 -#define EEARL4 4 -#define EEARL5 5 -#define EEARL6 6 -#define EEARL7 7 - -#define EEARH _SFR_IO8(0x22) -#define EEAR8 0 -#define EEAR9 1 -#define EEAR10 2 -#define EEAR11 3 - -#define GTCCR _SFR_IO8(0x23) -#define PSR10 0 -#define PSRSYNC 0 -#define ICPSEL1 2 -#define TSM 3 - -#define TCCR0A _SFR_IO8(0x24) -#define WGM00 0 -#define WGM01 1 -#define COM0B0 4 -#define COM0B1 5 -#define COM0A0 6 -#define COM0A1 7 - -#define TCCR0B _SFR_IO8(0x25) -#define CS00 0 -#define CS01 1 -#define CS02 2 -#define WGM02 3 -#define FOC0B 6 -#define FOC0A 7 - -#define TCNT0 _SFR_IO8(0x26) -#define TCNT0_0 0 -#define TCNT0_1 1 -#define TCNT0_2 2 -#define TCNT0_3 3 -#define TCNT0_4 4 -#define TCNT0_5 5 -#define TCNT0_6 6 -#define TCNT0_7 7 - -#define OCR0A _SFR_IO8(0x27) -#define OCR0_0 0 -#define OCR0_1 1 -#define OCR0_2 2 -#define OCR0_3 3 -#define OCR0_4 4 -#define OCR0_5 5 -#define OCR0_6 6 -#define OCR0_7 7 - -#define OCR0B _SFR_IO8(0x28) -#define OCR0_0 0 -#define OCR0_1 1 -#define OCR0_2 2 -#define OCR0_3 3 -#define OCR0_4 4 -#define OCR0_5 5 -#define OCR0_6 6 -#define OCR0_7 7 - -#define PLLCSR _SFR_IO8(0x29) -#define PLOCK 0 -#define PLLE 1 -#define PLLF 2 - -#define SPCR _SFR_IO8(0x2C) -#define SPR0 0 -#define SPR1 1 -#define CPHA 2 -#define CPOL 3 -#define MSTR 4 -#define DORD 5 -#define SPE 6 -#define SPIE 7 - -#define SPSR _SFR_IO8(0x2D) -#define SPI2X 0 -#define WCOL 6 -#define SPIF 7 - -#define SPDR _SFR_IO8(0x2E) -#define SPDR0 0 -#define SPDR1 1 -#define SPDR2 2 -#define SPDR3 3 -#define SPDR4 4 -#define SPDR5 5 -#define SPDR6 6 -#define SPDR7 7 - -#define ACSR _SFR_IO8(0x30) -#define AC0O 0 -#define AC1O 1 -#define AC2O 2 -#define AC0IF 4 -#define AC1IF 5 -#define AC2IF 6 -#define ACCKDIV 7 - -#define SMCR _SFR_IO8(0x33) -#define SE 0 -#define SM0 1 -#define SM1 2 -#define SM2 3 - -#define MCUSR _SFR_IO8(0x34) -#define PORF 0 -#define EXTRF 1 -#define BORF 2 -#define WDRF 3 - -#define MCUCR _SFR_IO8(0x35) -#define IVCE 0 -#define IVSEL 1 -#define PUD 4 -#define SPIPS 7 - -#define SPMCSR _SFR_IO8(0x37) -#define SPMEN 0 -#define PGERS 1 -#define PGWRT 2 -#define BLBSET 3 -#define RWWSRE 4 -#define RWWSB 6 -#define SPMIE 7 - -#define WDTCSR _SFR_MEM8(0x60) -#define WDP0 0 -#define WDP1 1 -#define WDP2 2 -#define WDE3 3 -#define WDCE 4 -#define WDP3 5 -#define WDIE 6 -#define WDIF 7 - -#define CLKPR _SFR_MEM8(0x61) -#define CLKPS0 0 -#define CLKPS1 1 -#define CLKPS2 2 -#define CLKPS3 3 -#define CLKPCE 7 - -#define PRR _SFR_MEM8(0x64) -#define PRADC 0 -#define PRUSART0 1 -#define PRSPI 2 -#define PRTIM0 3 -#define PRTIM1 4 -#define PRPSC0 5 -#define PRPSC1 6 -#define PRPSC2 7 - -#define OSCCAL _SFR_MEM8(0x66) -#define CAL0 0 -#define CAL1 1 -#define CAL2 2 -#define CAL3 3 -#define CAL4 4 -#define CAL5 5 -#define CAL6 6 - -#define EICRA _SFR_MEM8(0x69) -#define ISC00 0 -#define ISC01 1 -#define ISC10 2 -#define ISC11 3 -#define ISC20 4 -#define ISC21 5 -#define ISC30 6 -#define ISC31 7 - -#define TIMSK0 _SFR_MEM8(0x6E) -#define TOIE0 0 -#define OCIE0A 1 -#define OCIE0B 2 - -#define TIMSK1 _SFR_MEM8(0x6F) -#define TOIE1 0 -#define OCIE1A 1 -#define OCIE1B 2 -#define ICIE1 5 - -#define AMP0CSR _SFR_MEM8(0x76) -#define AMP0TS0 0 -#define AMP0TS1 1 -#define AMP0G0 4 -#define AMP0G1 5 -#define AMP0IS 6 -#define AMP0EN 7 - -#define AMP1CSR _SFR_MEM8(0x77) -#define AMP1TS0 0 -#define AMP1TS1 1 -#define AMP1G0 4 -#define AMP1G1 5 -#define AMP1IS 6 -#define AMP1EN 7 - -#ifndef __ASSEMBLER__ -#define ADC _SFR_MEM16(0x78) -#endif -#define ADCW _SFR_MEM16(0x78) - -#define ADCL _SFR_MEM8(0x78) -#define ADCL0 0 -#define ADCL1 1 -#define ADCL2 2 -#define ADCL3 3 -#define ADCL4 4 -#define ADCL5 5 -#define ADCL6 6 -#define ADCL7 7 - -#define ADCH _SFR_MEM8(0x79) -#define ADCH0 0 -#define ADCH1 1 -#define ADCH2 2 -#define ADCH3 3 -#define ADCH4 4 -#define ADCH5 5 -#define ADCH6 6 -#define ADCH7 7 - -#define ADCSRA _SFR_MEM8(0x7A) -#define ADPS0 0 -#define ADPS1 1 -#define ADPS2 2 -#define ADIE 3 -#define ADIF 4 -#define ADATE 5 -#define ADSC 6 -#define ADEN 7 - -#define ADCSRB _SFR_MEM8(0x7B) -#define ADTS0 0 -#define ADTS1 1 -#define ADTS2 2 -#define ADTS3 3 -#define ADASCR 4 -#define ADHSM 7 - -#define ADMUX _SFR_MEM8(0x7C) -#define MUX0 0 -#define MUX1 1 -#define MUX2 2 -#define MUX3 3 -#define ADLAR 5 -#define REFS0 6 -#define REFS1 7 - -#define DIDR0 _SFR_MEM8(0x7E) -#define ADC0D 0 -#define ADC1D 1 -#define ADC2D 2 -#define ADC3D 3 -#define ADC4D 4 -#define ADC5D 5 -#define ADC6D 6 -#define ADC7D 7 - -#define DIDR1 _SFR_MEM8(0x7F) -#define ADC8D 0 -#define ADC9D 1 -#define ADC10D 2 -#define AMP0ND 3 -#define AMP0PD 4 -#define ACMP0D 5 - -#define TCCR1A _SFR_MEM8(0x80) -#define WGM10 0 -#define WGM11 1 -#define COM1B0 4 -#define COM1B1 5 -#define COM1A0 6 -#define COM1A1 7 - -#define TCCR1B _SFR_MEM8(0x81) -#define CS10 0 -#define CS11 1 -#define CS12 2 -#define WGM12 3 -#define WGM13 4 -#define ICES1 6 -#define ICNC1 7 - -#define TCCR1C _SFR_MEM8(0x82) -#define FOC1B 6 -#define FOC1A 7 - -#define TCNT1 _SFR_MEM16(0x84) - -#define TCNT1L _SFR_MEM8(0x84) -#define TCNT1L0 0 -#define TCNT1L1 1 -#define TCNT1L2 2 -#define TCNT1L3 3 -#define TCNT1L4 4 -#define TCNT1L5 5 -#define TCNT1L6 6 -#define TCNT1L7 7 - -#define TCNT1H _SFR_MEM8(0x85) -#define TCNT1H0 0 -#define TCNT1H1 1 -#define TCNT1H2 2 -#define TCNT1H3 3 -#define TCNT1H4 4 -#define TCNT1H5 5 -#define TCNT1H6 6 -#define TCNT1H7 7 - -#define ICR1 _SFR_MEM16(0x86) - -#define ICR1L _SFR_MEM8(0x86) -#define ICR1L0 0 -#define ICR1L1 1 -#define ICR1L2 2 -#define ICR1L3 3 -#define ICR1L4 4 -#define ICR1L5 5 -#define ICR1L6 6 -#define ICR1L7 7 - -#define ICR1H _SFR_MEM8(0x87) -#define ICR1H0 0 -#define ICR1H1 1 -#define ICR1H2 2 -#define ICR1H3 3 -#define ICR1H4 4 -#define ICR1H5 5 -#define ICR1H6 6 -#define ICR1H7 7 - -#define OCR1A _SFR_MEM16(0x88) - -#define OCR1AL _SFR_MEM8(0x88) -#define OCR1AL0 0 -#define OCR1AL1 1 -#define OCR1AL2 2 -#define OCR1AL3 3 -#define OCR1AL4 4 -#define OCR1AL5 5 -#define OCR1AL6 6 -#define OCR1AL7 7 - -#define OCR1AH _SFR_MEM8(0x89) -#define OCR1AH0 0 -#define OCR1AH1 1 -#define OCR1AH2 2 -#define OCR1AH3 3 -#define OCR1AH4 4 -#define OCR1AH5 5 -#define OCR1AH6 6 -#define OCR1AH7 7 - -#define OCR1B _SFR_MEM16(0x8A) - -#define OCR1BL _SFR_MEM8(0x8A) -#define OCR1BL0 0 -#define OCR1BL1 1 -#define OCR1BL2 2 -#define OCR1BL3 3 -#define OCR1BL4 4 -#define OCR1BL5 5 -#define OCR1BL6 6 -#define OCR1BL7 7 - -#define OCR1BH _SFR_MEM8(0x8B) -#define OCR1BH0 0 -#define OCR1BH1 1 -#define OCR1BH2 2 -#define OCR1BH3 3 -#define OCR1BH4 4 -#define OCR1BH5 5 -#define OCR1BH6 6 -#define OCR1BH7 7 - -#define PIFR0 _SFR_MEM8(0xA0) -#define PEOP0 0 -#define PRN00 1 -#define PRN01 2 -#define PEV0A 3 -#define PEV0B 4 -#define PSEI0 5 -#define POAC0A 6 -#define POAC0B 7 - -#define PIM0 _SFR_MEM8(0xA1) -#define PEOPE0 0 -#define PEVE0A 3 -#define PEVE0B 4 -#define PSEIE0 5 - -#define PIFR1 _SFR_MEM8(0xA2) -#define PEOP1 0 -#define PRN10 1 -#define PRN11 2 -#define PEV1A 3 -#define PEV1B 4 -#define PSEI1 5 -#define POAC1A 6 -#define POAC1B 7 - -#define PIM1 _SFR_MEM8(0xA3) -#define PEOPE1 0 -#define PEVE1A 3 -#define PEVE1B 4 -#define PSEIE1 5 - -#define PIFR2 _SFR_MEM8(0xA4) -#define PEOP2 0 -#define PRN20 1 -#define PRN21 2 -#define PEV2A 3 -#define PEV2B 4 -#define PSEI2 5 -#define POAC2A 6 -#define POAC2B 7 - -#define PIM2 _SFR_MEM8(0xA5) -#define PEOPE2 0 -#define PEVE2A 3 -#define PEVE2B 4 -#define PSEIE2 5 - -#define DACON _SFR_MEM8(0xAA) -#define DAEN 0 -#define DAOE 1 -#define DALA 2 -#define DATS0 4 -#define DATS1 5 -#define DATS2 6 -#define DAATE 7 - -#define DAC _SFR_MEM16(0xAB) - -#define DACL _SFR_MEM8(0xAB) -#define DACL0 0 -#define DACL1 1 -#define DACL2 2 -#define DACL3 3 -#define DACL4 4 -#define DACL5 5 -#define DACL6 6 -#define DACL7 7 - -#define DACH _SFR_MEM8(0xAC) -#define DACH0 0 -#define DACH1 1 -#define DACH2 2 -#define DACH3 3 -#define DACH4 4 -#define DACH5 5 -#define DACH6 6 -#define DACH7 7 - -#define AC0CON _SFR_MEM8(0xAD) -#define AC0M0 0 -#define AC0M1 1 -#define AC0M2 2 -#define AC0IS0 4 -#define AC0IS1 5 -#define AC0IE 6 -#define AC0EN 7 - -#define AC1CON _SFR_MEM8(0xAE) -#define AC1M0 0 -#define AC1M1 1 -#define AC1M2 2 -#define AC1ICE 3 -#define AC1IS0 4 -#define AC1IS1 5 -#define AC1IE 6 -#define AC1EN 7 - -#define AC2CON _SFR_MEM8(0xAF) -#define AC2M0 0 -#define AC2M1 1 -#define AC2M2 2 -#define AC2IS0 4 -#define AC2IS1 5 -#define AC2IE 6 -#define AC2EN 7 - -#define UCSRA _SFR_MEM8(0xC0) -#define MPCM 0 -#define U2X 1 -#define UPE 2 -#define DOR 3 -#define FE 4 -#define UDRE 5 -#define TXC 6 -#define RXC 7 - -#define UCSRB _SFR_MEM8(0xC1) -#define TXB8 0 -#define RXB8 1 -#define UCSZ2 2 -#define TXEN 3 -#define RXEN 4 -#define UDRIE 5 -#define TXCIE 6 -#define RXCIE 7 - -#define UCSRC _SFR_MEM8(0xC2) -#define UCPOL 0 -#define UCSZ0 1 -#define UCSZ1 2 -#define USBS 3 -#define UPM0 4 -#define UPM1 5 -#define UMSEL0 6 - -#define UBRR _SFR_MEM16(0xC4) - -#define UBRRL _SFR_MEM8(0xC4) -#define UBRR0 0 -#define UBRR1 1 -#define UBRR2 2 -#define UBRR3 3 -#define UBRR4 4 -#define UBRR5 5 -#define UBRR6 6 -#define UBRR7 7 - -#define UBRRH _SFR_MEM8(0xC5) -#define UBRR8 0 -#define UBRR9 1 -#define UBRR10 2 -#define UBRR11 3 - -#define UDR _SFR_MEM8(0xC6) -#define UDR0 0 -#define UDR1 1 -#define UDR2 2 -#define UDR3 3 -#define UDR4 4 -#define UDR5 5 -#define UDR6 6 -#define UDR7 7 - -#define EUCSRA _SFR_MEM8(0xC8) -#define URxS0 0 -#define URxS1 1 -#define URxS2 2 -#define URxS3 3 -#define UTxS0 4 -#define UTxS1 5 -#define UTxS2 6 -#define UTxS3 7 - -#define EUCSRB _SFR_MEM8(0xC9) -#define BODR 0 -#define EMCH 1 -#define EUSBS 3 -#define EUSART 4 - -#define EUCSRC _SFR_MEM8(0xCA) -#define STP0 0 -#define STP1 1 -#define F1617 2 -#define FEM 3 - -#define MUBRR _SFR_MEM16(0xCC) - -#define MUBRRL _SFR_MEM8(0xCC) -#define MUBRR0 0 -#define MUBRR1 1 -#define MUBRR2 2 -#define MUBRR3 3 -#define MUBRR4 4 -#define MUBRR5 5 -#define MUBRR6 6 -#define MUBRR7 7 - -#define MUBRRH _SFR_MEM8(0xCD) -#define MUBRR8 0 -#define MUBRR9 1 -#define MUBRR10 2 -#define MUBRR11 3 -#define MUBRR12 4 -#define MUBRR13 5 -#define MUBRR14 6 -#define MUBRR15 7 - -#define EUDR _SFR_MEM8(0xCE) -#define EUDR0 0 -#define EUDR1 1 -#define EUDR2 2 -#define EUDR3 3 -#define EUDR4 4 -#define EUDR5 5 -#define EUDR6 6 -#define EUDR7 7 - -#define PSOC0 _SFR_MEM8(0xD0) -#define POEN0A 0 -#define POEN0B 2 -#define PSYNC00 4 -#define PSYNC01 5 - -#define OCR0SA _SFR_MEM16(0xD2) - -#define OCR0SAL _SFR_MEM8(0xD2) -#define OCR0SA_0 0 -#define OCR0SA_1 1 -#define OCR0SA_2 2 -#define OCR0SA_3 3 -#define OCR0SA_4 4 -#define OCR0SA_5 5 -#define OCR0SA_6 6 -#define OCR0SA_7 7 - -#define OCR0SAH _SFR_MEM8(0xD3) -#define OCR0SA_8 0 -#define OCR0SA_9 1 -#define OCR0SA_00 2 -#define OCR0SA_01 3 - -#define OCR0RA _SFR_MEM16(0xD4) - -#define OCR0RAL _SFR_MEM8(0xD4) -#define OCR0RA_0 0 -#define OCR0RA_1 1 -#define OCR0RA_2 2 -#define OCR0RA_3 3 -#define OCR0RA_4 4 -#define OCR0RA_5 5 -#define OCR0RA_6 6 -#define OCR0RA_7 7 - -#define OCR0RAH _SFR_MEM8(0xD5) -#define OCR0RA_8 0 -#define OCR0RA_9 1 -#define OCR0RA_00 2 -#define OCR0RA_01 3 - -#define OCR0SB _SFR_MEM16(0xD6) - -#define OCR0SBL _SFR_MEM8(0xD6) -#define OCR0SB_0 0 -#define OCR0SB_1 1 -#define OCR0SB_2 2 -#define OCR0SB_3 3 -#define OCR0SB_4 4 -#define OCR0SB_5 5 -#define OCR0SB_6 6 -#define OCR0SB_7 7 - -#define OCR0SBH _SFR_MEM8(0xD7) -#define OCR0SB_8 0 -#define OCR0SB_9 1 -#define OCR0SB_00 2 -#define OCR0SB_01 3 - -#define OCR0RB _SFR_MEM16(0xD8) - -#define OCR0RBL _SFR_MEM8(0xD8) -#define OCR0RB_0 0 -#define OCR0RB_1 1 -#define OCR0RB_2 2 -#define OCR0RB_3 3 -#define OCR0RB_4 4 -#define OCR0RB_5 5 -#define OCR0RB_6 6 -#define OCR0RB_7 7 - -#define OCR0RBH _SFR_MEM8(0xD9) -#define OCR0RB_8 0 -#define OCR0RB_9 1 -#define OCR0RB_00 2 -#define OCR0RB_01 3 -#define OCR0RB_02 4 -#define OCR0RB_03 5 -#define OCR0RB_04 6 -#define OCR0RB_05 7 - -#define PCNF0 _SFR_MEM8(0xDA) -#define PCLKSEL0 1 -#define POP0 2 -#define PMODE00 3 -#define PMODE01 4 -#define PLOCK0 5 -#define PALOCK0 6 -#define PFIFTY0 7 - -#define PCTL0 _SFR_MEM8(0xDB) -#define PRUN0 0 -#define PCCYC0 1 -#define PARUN0 2 -#define PAOC0A 3 -#define PAOC0B 4 -#define PBFM0 5 -#define PPRE00 6 -#define PPRE01 7 - -#define PFRC0A _SFR_MEM8(0xDC) -#define PRFM0A0 0 -#define PRFM0A1 1 -#define PRFM0A2 2 -#define PRFM0A3 3 -#define PFLTE0A 4 -#define PELEV0A 5 -#define PISEL0A 6 -#define PCAE0A 7 - -#define PFRC0B _SFR_MEM8(0xDD) -#define PRFM0B0 0 -#define PRFM0B1 1 -#define PRFM0B2 2 -#define PRFM0B3 3 -#define PFLTE0B 4 -#define PELEV0B 5 -#define PISEL0B 6 -#define PCAE0B 7 - -#define PICR0 _SFR_MEM16(0xDE) - -#define PICR0L _SFR_MEM8(0xDE) -#define PICR0_0 0 -#define PICR0_1 1 -#define PICR0_2 2 -#define PICR0_3 3 -#define PICR0_4 4 -#define PICR0_5 5 -#define PICR0_6 6 -#define PICR0_7 7 - -#define PICR0H _SFR_MEM8(0xDF) -#define PICR0_8 0 -#define PICR0_9 1 -#define PICR0_10 2 -#define PICR0_11 3 -#define PCST0 7 - -#define PSOC1 _SFR_MEM8(0xE0) -#define POEN1A 0 -#define POEN1B 2 -#define PSYNC1_0 4 -#define PSYNC1_1 5 - -#define OCR1SA _SFR_MEM16(0xE2) - -#define OCR1SAL _SFR_MEM8(0xE2) -#define OCR1SA_0 0 -#define OCR1SA_1 1 -#define OCR1SA_2 2 -#define OCR1SA_3 3 -#define OCR1SA_4 4 -#define OCR1SA_5 5 -#define OCR1SA_6 6 -#define OCR1SA_7 7 - -#define OCR1SAH _SFR_MEM8(0xE3) -#define OCR1SA_8 0 -#define OCR1SA_9 1 -#define OCR1SA_10 2 -#define OCR1SA_11 3 - -#define OCR1RA _SFR_MEM16(0xE4) - -#define OCR1RAL _SFR_MEM8(0xE4) -#define OCR1RA_0 0 -#define OCR1RA_1 1 -#define OCR1RA_2 2 -#define OCR1RA_3 3 -#define OCR1RA_4 4 -#define OCR1RA_5 5 -#define OCR1RA_6 6 -#define OCR1RA_7 7 - -#define OCR1RAH _SFR_MEM8(0xE5) -#define OCR1RA_8 0 -#define OCR1RA_9 1 -#define OCR1RA_10 2 -#define OCR1RA_11 3 - -#define OCR1SB _SFR_MEM16(0xE6) - -#define OCR1SBL _SFR_MEM8(0xE6) -#define OCR1SB_0 0 -#define OCR1SB_1 1 -#define OCR1SB_2 2 -#define OCR1SB_3 3 -#define OCR1SB_4 4 -#define OCR1SB_5 5 -#define OCR1SB_6 6 -#define OCR1SB_7 7 - -#define OCR1SBH _SFR_MEM8(0xE7) -#define OCR1SB_8 0 -#define OCR1SB_9 1 -#define OCR1SB_10 2 -#define OCR1SB_11 3 - -#define OCR1RB _SFR_MEM16(0xE8) - -#define OCR1RBL _SFR_MEM8(0xE8) -#define OCR1RB_0 0 -#define OCR1RB_1 1 -#define OCR1RB_2 2 -#define OCR1RB_3 3 -#define OCR1RB_4 4 -#define OCR1RB_5 5 -#define OCR1RB_6 6 -#define OCR1RB_7 7 - -#define OCR1RBH _SFR_MEM8(0xE9) -#define OCR1RB_8 0 -#define OCR1RB_9 1 -#define OCR1RB_10 2 -#define OCR1RB_11 3 -#define OCR1RB_12 4 -#define OCR1RB_13 5 -#define OCR1RB_14 6 -#define OCR1RB_15 7 - -#define PCNF1 _SFR_MEM8(0xEA) -#define PCLKSEL1 1 -#define POP1 2 -#define PMODE10 3 -#define PMODE11 4 -#define PLOCK1 5 -#define PALOCK1 6 -#define PFIFTY1 7 - -#define PCTL1 _SFR_MEM8(0xEB) -#define PRUN1 0 -#define PCCYC1 1 -#define PARUN1 2 -#define PAOC1A 3 -#define PAOC1B 4 -#define PBFM1 5 -#define PPRE10 6 -#define PPRE11 7 - -#define PFRC1A _SFR_MEM8(0xEC) -#define PRFM1A0 0 -#define PRFM1A1 1 -#define PRFM1A2 2 -#define PRFM1A3 3 -#define PFLTE1A 4 -#define PELEV1A 5 -#define PISEL1A 6 -#define PCAE1A 7 - -#define PFRC1B _SFR_MEM8(0xED) -#define PRFM1B0 0 -#define PRFM1B1 1 -#define PRFM1B2 2 -#define PRFM1B3 3 -#define PFLTE1B 4 -#define PELEV1B 5 -#define PISEL1B 6 -#define PCAE1B 7 - -#define PICR1 _SFR_MEM16(0xEE) - -#define PICR1L _SFR_MEM8(0xEE) -#define PICR1_0 0 -#define PICR1_1 1 -#define PICR1_2 2 -#define PICR1_3 3 -#define PICR1_4 4 -#define PICR1_5 5 -#define PICR1_6 6 -#define PICR1_7 7 - -#define PICR1H _SFR_MEM8(0xEF) -#define PICR1_8 0 -#define PICR1_9 1 -#define PICR1_10 2 -#define PICR1_11 3 -#define PCST1 7 - -#define PSOC2 _SFR_MEM8(0xF0) -#define POEN2A 0 -#define POEN2C 1 -#define POEN2B 2 -#define POEN2D 3 -#define PSYNC2_0 4 -#define PSYNC2_1 5 -#define POS22 6 -#define POS23 7 - -#define POM2 _SFR_MEM8(0xF1) -#define POMV2A0 0 -#define POMV2A1 1 -#define POMV2A2 2 -#define POMV2A3 3 -#define POMV2B0 4 -#define POMV2B1 5 -#define POMV2B2 6 -#define POMV2B3 7 - -#define OCR2SA _SFR_MEM16(0xF2) - -#define OCR2SAL _SFR_MEM8(0xF2) -#define OCR2SA_0 0 -#define OCR2SA_1 1 -#define OCR2SA_2 2 -#define OCR2SA_3 3 -#define OCR2SA_4 4 -#define OCR2SA_5 5 -#define OCR2SA_6 6 -#define OCR2SA_7 7 - -#define OCR2SAH _SFR_MEM8(0xF3) -#define OCR2SA_8 0 -#define OCR2SA_9 1 -#define OCR2SA_10 2 -#define OCR2SA_11 3 - -#define OCR2RA _SFR_MEM16(0xF4) - -#define OCR2RAL _SFR_MEM8(0xF4) -#define OCR2RA_0 0 -#define OCR2RA_1 1 -#define OCR2RA_2 2 -#define OCR2RA_3 3 -#define OCR2RA_4 4 -#define OCR2RA_5 5 -#define OCR2RA_6 6 -#define OCR2RA_7 7 - -#define OCR2RAH _SFR_MEM8(0xF5) -#define OCR2RA_8 0 -#define OCR2RA_9 1 -#define OCR2RA_10 2 -#define OCR2RA_11 3 - -#define OCR2SB _SFR_MEM16(0xF6) - -#define OCR2SBL _SFR_MEM8(0xF6) -#define OCR2SB_0 0 -#define OCR2SB_1 1 -#define OCR2SB_2 2 -#define OCR2SB_3 3 -#define OCR2SB_4 4 -#define OCR2SB_5 5 -#define OCR2SB_6 6 -#define OCR2SB_7 7 - -#define OCR2SBH _SFR_MEM8(0xF7) -#define OCR2SB_8 0 -#define OCR2SB_9 1 -#define OCR2SB_10 2 -#define OCR2SB_11 3 - -#define OCR2RB _SFR_MEM16(0xF8) - -#define OCR2RBL _SFR_MEM8(0xF8) -#define OCR2RB_0 0 -#define OCR2RB_1 1 -#define OCR2RB_2 2 -#define OCR2RB_3 3 -#define OCR2RB_4 4 -#define OCR2RB_5 5 -#define OCR2RB_6 6 -#define OCR2RB_7 7 - -#define OCR2RBH _SFR_MEM8(0xF9) -#define OCR2RB_8 0 -#define OCR2RB_9 1 -#define OCR2RB_10 2 -#define OCR2RB_11 3 -#define OCR2RB_12 4 -#define OCR2RB_13 5 -#define OCR2RB_14 6 -#define OCR2RB_15 7 - -#define PCNF2 _SFR_MEM8(0xFA) -#define POME2 0 -#define PCLKSEL2 1 -#define POP2 2 -#define PMODE20 3 -#define PMODE21 4 -#define PLOCK2 5 -#define PALOCK2 6 -#define PFIFTY2 7 - -#define PCTL2 _SFR_MEM8(0xFB) -#define PRUN2 0 -#define PCCYC2 1 -#define PARUN2 2 -#define PAOC2A 3 -#define PAOC2B 4 -#define PBFM2 5 -#define PPRE20 6 -#define PPRE21 7 - -#define PFRC2A _SFR_MEM8(0xFC) -#define PRFM2A0 0 -#define PRFM2A1 1 -#define PRFM2A2 2 -#define PRFM2A3 3 -#define PFLTE2A 4 -#define PELEV2A 5 -#define PISEL2A 6 -#define PCAE2A 7 - -#define PFRC2B _SFR_MEM8(0xFD) -#define PRFM2B0 0 -#define PRFM2B1 1 -#define PRFM2B2 2 -#define PRFM2B3 3 -#define PFLTE2B 4 -#define PELEV2B 5 -#define PISEL2B 6 -#define PCAE2B 7 - -#define PICR2 _SFR_MEM16(0xFE) - -#define PICR2L _SFR_MEM8(0xFE) -#define PICR2_0 0 -#define PICR2_1 1 -#define PICR2_2 2 -#define PICR2_3 3 -#define PICR2_4 4 -#define PICR2_5 5 -#define PICR2_6 6 -#define PICR2_7 7 - -#define PICR2H _SFR_MEM8(0xFF) -#define PICR2_8 0 -#define PICR2_9 1 -#define PICR2_10 2 -#define PICR2_11 3 -#define PCST2 7 - - - -/* Interrupt Vectors */ -/* Interrupt vector 0 is the reset vector. */ -#define PSC2_CAPT_vect _VECTOR(1) /* PSC2 Capture Event */ -#define PSC2_EC_vect _VECTOR(2) /* PSC2 End Cycle */ -#define PSC1_CAPT_vect _VECTOR(3) /* PSC1 Capture Event */ -#define PSC1_EC_vect _VECTOR(4) /* PSC1 End Cycle */ -#define PSC0_CAPT_vect _VECTOR(5) /* PSC0 Capture Event */ -#define PSC0_EC_vect _VECTOR(6) /* PSC0 End Cycle */ -#define ANALOG_COMP_0_vect _VECTOR(7) /* Analog Comparator 0 */ -#define ANALOG_COMP_1_vect _VECTOR(8) /* Analog Comparator 1 */ -#define ANALOG_COMP_2_vect _VECTOR(9) /* Analog Comparator 2 */ -#define INT0_vect _VECTOR(10) /* External Interrupt Request 0 */ -#define TIMER1_CAPT_vect _VECTOR(11) /* Timer/Counter1 Capture Event */ -#define TIMER1_COMPA_vect _VECTOR(12) /* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPB_vect _VECTOR(13) /* Timer/Counter Compare Match B */ -/* Vector 14, Reserved */ -#define TIMER1_OVF_vect _VECTOR(15) /* Timer/Counter1 Overflow */ -#define TIMER0_COMPA_vect _VECTOR(16) /* Timer/Counter0 Compare Match A */ -#define TIMER0_OVF_vect _VECTOR(17) /* Timer/Counter0 Overflow */ -#define ADC_vect _VECTOR(18) /* ADC Conversion Complete */ -#define INT1_vect _VECTOR(19) /* External Interrupt Request 1 */ -#define SPI_STC_vect _VECTOR(20) /* SPI Serial Transfer Complete */ -#define USART_RX_vect _VECTOR(21) /* USART, Rx Complete */ -#define USART_UDRE_vect _VECTOR(22) /* USART Data Register Empty */ -#define USART_TX_vect _VECTOR(23) /* USART, Tx Complete */ -#define INT2_vect _VECTOR(24) /* External Interrupt Request 2 */ -#define WDT_vect _VECTOR(25) /* Watchdog Timeout Interrupt */ -#define EE_READY_vect _VECTOR(26) /* EEPROM Ready */ -#define TIMER0_COMPB_vect _VECTOR(27) /* Timer Counter 0 Compare Match B */ -#define INT3_vect _VECTOR(28) /* External Interrupt Request 3 */ -/* Vector 29, Reserved */ -/* Vector 30, Reserved */ -#define SPM_READY_vect _VECTOR(31) /* Store Program Memory Read */ - -#define _VECTORS_SIZE 64 - - - -/* Memory Sizes */ -#define RAMEND 0x2FF -#define XRAMSIZE 0 -#define XRAMEND (RAMEND + XRAMSIZE) -#define E2END 0x1FF -#define E2PAGESIZE 4 -#define FLASHEND 0x1FFF -#define SPM_PAGESIZE 32 - - - -/* Fuse Information */ - -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) /* Select Clock Source */ -#define FUSE_CKSEL1 (unsigned char)~_BV(1) /* Select Clock Source */ -#define FUSE_CKSEL2 (unsigned char)~_BV(2) /* Select Clock Source */ -#define FUSE_CKSEL3 (unsigned char)~_BV(3) /* Select Clock Source */ -#define FUSE_SUT0 (unsigned char)~_BV(4) /* Select start-up time */ -#define FUSE_SUT1 (unsigned char)~_BV(5) /* Select start-up time */ -#define FUSE_CKOUT (unsigned char)~_BV(6) /* Oscillator output option */ -#define FUSE_CKDIV8 (unsigned char)~_BV(7) /* Divide clock by 8 */ -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - - -/* High Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) /* Brown-out Detector trigger level */ -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) /* Brown-out Detector trigger level */ -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) /* Brown out detector trigger level */ -#define FUSE_EESAVE (unsigned char)~_BV(3) /* EEPROM memory is preserved through chip erase */ -#define FUSE_WDTON (unsigned char)~_BV(4) /* Watchdog timer always on */ -#define FUSE_SPIEN (unsigned char)~_BV(5) /* Enable Serial programming and Data Downloading */ -#define FUSE_DWEN (unsigned char)~_BV(6) /* debugWIRE Enable */ -#define FUSE_RSTDISBL (unsigned char)~_BV(7) /* External Reset Disable */ -#define HFUSE_DEFAULT (FUSE_SPIEN) - - -/* Extended Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) /* Select Reset Vector */ -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) /* Select Boot Size */ -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) /* Select Boot Size */ -#define FUSE_PSCRV (unsigned char)~_BV(4) /* PSCOUT Reset Value */ -#define FUSE_PSC0RB (unsigned char)~_BV(5) /* PSC0 Reset Behaviour */ -#define FUSE_PSC1RB (unsigned char)~_BV(6) /* PSC1 Reset Behaviour */ -#define FUSE_PSC2RB (unsigned char)~_BV(7) /* PSC2 Reset Behaviour */ -#define EFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x93 -#define SIGNATURE_2 0x83 - - -#endif /* _AVR_IO90PWM3B_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io90pwmx.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io90pwmx.h deleted file mode 100644 index 364b30137..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/io90pwmx.h +++ /dev/null @@ -1,1371 +0,0 @@ -/* Copyright (c) 2005, Andrey Pashchenko - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: io90pwmx.h,v 1.10.2.4 2008/08/14 00:08:00 arcanum Exp $ */ - -/* avr/io90pwmx.h - definitions for AT90PWM2(B) and AT90PWM3(B) */ - -#ifndef _AVR_IO90PWMX_H_ -#define _AVR_IO90PWMX_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "io90pwmX.h" -#else -# error "Attempt to include more than one file." -#endif - -/* I/O registers */ - -/* Port B Input Pins Address */ -#define PINB _SFR_IO8(0x03) -/* PINB */ -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -/* Port B Data Direction Register */ -#define DDRB _SFR_IO8(0x04) -/* DDRB */ -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -/* Port B Data Register */ -#define PORTB _SFR_IO8(0x05) -/* PORTB */ -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -/* Port C Input Pins Address */ -#define PINC _SFR_IO8(0x06) -/* PINC */ -#define PINC7 7 -#define PINC6 6 -#define PINC5 5 -#define PINC4 4 -#define PINC3 3 -#define PINC2 2 -#define PINC1 1 -#define PINC0 0 - -/* Port C Data Direction Register */ -#define DDRC _SFR_IO8(0x07) -/* DDRC */ -#define DDC7 7 -#define DDC6 6 -#define DDC5 5 -#define DDC4 4 -#define DDC3 3 -#define DDC2 2 -#define DDC1 1 -#define DDC0 0 - -/* Port C Data Register */ -#define PORTC _SFR_IO8(0x08) -/* PORTC */ -#define PC7 7 -#define PC6 6 -#define PC5 5 -#define PC4 4 -#define PC3 3 -#define PC2 2 -#define PC1 1 -#define PC0 0 - -/* Port D Input Pins Address */ -#define PIND _SFR_IO8(0x09) -/* PIND */ -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -/* Port D Data Direction Register */ -#define DDRD _SFR_IO8(0x0A) -/* DDRD */ -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -/* Port D Data Register */ -#define PORTD _SFR_IO8(0x0B) -/* PORTD */ -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -/* Port E Input Pins Address */ -#define PINE _SFR_IO8(0x0C) -/* PINE */ -#define PINE2 2 -#define PINE1 1 -#define PINE0 0 - -/* Port E Data Direction Register */ -#define DDRE _SFR_IO8(0x0D) -/* DDRE */ -#define DDE2 2 -#define DDE1 1 -#define DDE0 0 - -/* Port E Data Register */ -#define PORTE _SFR_IO8(0x0E) -/* PORTE */ -#define PE2 2 -#define PE1 1 -#define PE0 0 - -/* Timer/Counter 0 Interrupt Flag Register */ -#define TIFR0 _SFR_IO8(0x15) -/* TIFR0 */ -#define OCF0B 2 /* Output Compare Flag 0B */ -#define OCF0A 1 /* Output Compare Flag 0A */ -#define TOV0 0 /* Overflow Flag */ - -/* Timer/Counter1 Interrupt Flag Register */ -#define TIFR1 _SFR_IO8(0x16) -/* TIFR1 */ -#define ICF1 5 /* Input Capture Flag 1 */ -#define OCF1B 2 /* Output Compare Flag 1B*/ -#define OCF1A 1 /* Output Compare Flag 1A*/ -#define TOV1 0 /* Overflow Flag */ - -/* General Purpose I/O Register 1 */ -#define GPIOR1 _SFR_IO8(0x19) -/* GPIOR1 */ -#define GPIOR17 7 -#define GPIOR16 6 -#define GPIOR15 5 -#define GPIOR14 4 -#define GPIOR13 3 -#define GPIOR12 2 -#define GPIOR11 1 -#define GPIOR10 0 - -/* General Purpose I/O Register 2 */ -#define GPIOR2 _SFR_IO8(0x1A) -/* GPIOR2 */ -#define GPIOR27 7 -#define GPIOR26 6 -#define GPIOR25 5 -#define GPIOR24 4 -#define GPIOR23 3 -#define GPIOR22 2 -#define GPIOR21 1 -#define GPIOR20 0 - -/* General Purpose I/O Register 3 */ -#define GPIOR3 _SFR_IO8(0x1B) -/* GPIOR3 */ -#define GPIOR37 7 -#define GPIOR36 6 -#define GPIOR35 5 -#define GPIOR34 4 -#define GPIOR33 3 -#define GPIOR32 2 -#define GPIOR31 1 -#define GPIOR30 0 - -/* External Interrupt Flag Register */ -#define EIFR _SFR_IO8(0x1C) -/* EIFR */ -#define INTF3 3 -#define INTF2 2 -#define INTF1 1 -#define INTF0 0 - -/* External Interrupt Mask Register */ -#define EIMSK _SFR_IO8(0x1D) -/* EIMSK */ -#define INT3 3 /* External Interrupt Request 3 Enable */ -#define INT2 2 /* External Interrupt Request 2 Enable */ -#define INT1 1 /* External Interrupt Request 1 Enable */ -#define INT0 0 /* External Interrupt Request 0 Enable */ - -/* General Purpose I/O Register 0 */ -#define GPIOR0 _SFR_IO8(0x1E) -/* GPIOR0 */ -#define GPIOR07 7 -#define GPIOR06 6 -#define GPIOR05 5 -#define GPIOR04 4 -#define GPIOR03 3 -#define GPIOR02 2 -#define GPIOR01 1 -#define GPIOR00 0 - -/* EEPROM Control Register */ -#define EECR _SFR_IO8(0x1F) -/* EECR */ -#define EERIE 3 /* EEPROM Ready Interrupt Enable */ -#define EEMWE 2 /* EEPROM Master Write Enable */ -#define EEWE 1 /* EEPROM Write Enable */ -#define EERE 0 /* EEPROM Read Enable */ - -/* EEPROM Data Register */ -#define EEDR _SFR_IO8(0x20) -/* EEDR */ -#define EEDR7 7 -#define EEDR6 6 -#define EEDR5 5 -#define EEDR4 4 -#define EEDR3 3 -#define EEDR2 2 -#define EEDR1 1 -#define EEDR0 0 - -/* The EEPROM Address Registers */ -#define EEAR _SFR_IO16(0x21) -#define EEARL _SFR_IO8(0x21) -#define EEARH _SFR_IO8(0x22) -/* EEARH */ -#define EEAR11 3 -#define EEAR10 2 -#define EEAR9 1 -#define EEAR8 0 -/* EEARL */ -#define EEAR7 7 -#define EEAR6 6 -#define EEAR5 5 -#define EEAR4 4 -#define EEAR3 3 -#define EEAR2 2 -#define EEAR1 1 -#define EEAR0 0 - -/* 6-char sequence denoting where to find the EEPROM registers in memory space. - Adresses denoted in hex syntax with uppercase letters. Used by the EEPROM - subroutines. - First two letters: EECR address. - Second two letters: EEDR address. - Last two letters: EEAR address. */ -#define __EEPROM_REG_LOCATIONS__ 1F2021 - -/* General Timer/Counter Control Register */ -#define GTCCR _SFR_IO8(0x23) -/* GTCCR */ -#define TSM 7 /* Timer/Counter Synchronization Mode */ -#define ICPSEL1 6 /* Timer1 Input Capture Selection Bit */ -#define PSR10 0 /* Prescaler Reset Timer/Counter1 and Timer/Counter0 */ - -/* Timer/Counter Control Register A */ -#define TCCR0A _SFR_IO8(0x24) -/* TCCR0A */ -#define COM0A1 7 /* Compare Output Mode, Phase Correct PWM Mode */ -#define COM0A0 6 /* Compare Output Mode, Phase Correct PWM Mode */ -#define COM0B1 5 /* Compare Output Mode, Fast PWm */ -#define COM0B0 4 /* Compare Output Mode, Fast PWm */ -#define WGM01 1 /* Waveform Generation Mode */ -#define WGM00 0 /* Waveform Generation Mode */ - -/* Timer/Counter Control Register B */ -#define TCCR0B _SFR_IO8(0x25) -/* TCCR0B */ -#define FOC0A 7 /* Force Output Compare A */ -#define FOC0B 6 /* Force Output Compare B */ -#define WGM02 3 /* Waveform Generation Mode */ -#define CS02 2 /* Clock Select */ -#define CS01 1 /* Clock Select */ -#define CS00 0 /* Clock Select */ - -/* Timer/Counter0 Register */ -#define TCNT0 _SFR_IO8(0x26) -/* TCNT0 */ -#define TCNT07 7 -#define TCNT06 6 -#define TCNT05 5 -#define TCNT04 4 -#define TCNT03 3 -#define TCNT02 2 -#define TCNT01 1 -#define TCNT00 0 - -/* Timer/Counter0 Output Compare Register A */ -#define OCR0A _SFR_IO8(0x27) -/* OCR0A */ -#define OCR0A7 7 -#define OCR0A6 6 -#define OCR0A5 5 -#define OCR0A4 4 -#define OCR0A3 3 -#define OCR0A2 2 -#define OCR0A1 1 -#define OCR0A0 0 - -/* Timer/Counter0 Output Compare Register B */ -#define OCR0B _SFR_IO8(0x28) -/* OCR0B */ -#define OCR0B7 7 -#define OCR0B6 6 -#define OCR0B5 5 -#define OCR0B4 4 -#define OCR0B3 3 -#define OCR0B2 2 -#define OCR0B1 1 -#define OCR0B0 0 - -/* PLL Control and Status Register */ -#define PLLCSR _SFR_IO8(0x29) -/* PLLCSR */ -#define PCKE 2 /* PCK Enable */ -/* Bit 2 has been renamed in later versions of the datasheet. */ -#define PLLF 2 /* PLL Factor */ -#define PLLE 1 /* PLL Enable */ -#define PLOCK 0 /* PLL Lock Detector */ - -/* SPI Control Register */ -#define SPCR _SFR_IO8(0x2C) -/* SPCR */ -#define SPIE 7 /* SPI Interrupt Enable */ -#define SPE 6 /* SPI Enable */ -#define DORD 5 /* Data Order */ -#define MSTR 4 /* Master/Slave Select */ -#define CPOL 3 /* Clock polarity */ -#define CPHA 2 /* Clock Phase */ -#define SPR1 1 /* SPI Clock Rate Select 1 */ -#define SPR0 0 /* SPI Clock Rate Select 0 */ - -/* SPI Status Register */ -#define SPSR _SFR_IO8(0x2D) -/* SPSR */ -#define SPIF 7 /* SPI Interrupt Flag */ -#define WCOL 6 /* Write Collision Flag */ -#define SPI2X 0 /* Double SPI Speed Bit */ - -/* SPI Data Register */ -#define SPDR _SFR_IO8(0x2E) -/* SPDR */ -#define SPD7 7 -#define SPD6 6 -#define SPD5 5 -#define SPD4 4 -#define SPD3 3 -#define SPD2 2 -#define SPD1 1 -#define SPD0 0 - -/* Analog Comparator Status Register */ -#define ACSR _SFR_IO8(0x30) -/* ACSR */ -#define ACCKDIV 7 /* Analog Comparator Clock Divider */ -#define AC2IF 6 /* Analog Comparator 2 Interrupt Flag Bit */ -#define AC1IF 5 /* Analog Comparator 1 Interrupt Flag Bit */ -#define AC0IF 4 /* Analog Comparator 0 Interrupt Flag Bit */ -#define AC2O 2 /* Analog Comparator 2 Output Bit */ -#define AC1O 1 /* Analog Comparator 1 Output Bit */ -#define AC0O 0 /* Analog Comparator 0 Output Bit */ - -/* Monitor Data Register */ -#define MONDR _SFR_IO8(0x31) - -/* Monitor Stop Mode Control Register */ -#define MSMCR _SFR_IO8(0x32) - -/* Sleep Mode Control Register */ -#define SMCR _SFR_IO8(0x33) -/* SMCR */ -#define SM2 3 /* Sleep Mode Select bit2 */ -#define SM1 2 /* Sleep Mode Select bit1 */ -#define SM0 1 /* Sleep Mode Select bit0 */ -#define SE 0 /* Sleep Enable */ - -/* MCU Status Register */ -#define MCUSR _SFR_IO8(0x34) -/* MCUSR */ -#define WDRF 3 /* Watchdog Reset Flag */ -#define BORF 2 /* Brown-out Reset Flag */ -#define EXTRF 1 /* External Reset Flag */ -#define PORF 0 /* Power-on reset flag */ - -/* MCU Control Register */ -#define MCUCR _SFR_IO8(0x35) -/* MCUCR */ -#define SPIPS 7 /* SPI Pin Select */ -#define PUD 4 /* Pull-up disable */ -#define IVSEL 1 /* Interrupt Vector Select */ -#define IVCE 0 /* Interrupt Vector Change Enable */ - -/* Store Program Memory Control Register */ -#define SPMCSR _SFR_IO8(0x37) -/* SPMCSR */ -#define SPMIE 7 /* SPM Interrupt Enable */ -#define RWWSB 6 /* Read While Write Section Busy */ -#define RWWSRE 4 /* Read While Write section read enable */ -#define BLBSET 3 /* Boot Lock Bit Set */ -#define PGWRT 2 /* Page Write */ -#define PGERS 1 /* Page Erase */ -#define SPMEN 0 /* Store Program Memory Enable */ - -/* 0x3D..0x3E SP [defined in ] */ -/* 0x3F SREG [defined in ] */ - -/* Watchdog Timer Control Register */ -#define WDTCSR _SFR_MEM8(0x60) -/* WDTCSR */ -#define WDIF 7 /* Watchdog Timeout Interrupt Flag */ -#define WDIE 6 /* Watchdog Timeout Interrupt Enable */ -#define WDP3 5 /* Watchdog Timer Prescaler bit3 */ -#define WDCE 4 /* Watchdog Change Enable */ -#define WDE 3 /* Watchdog Enable */ -#define WDP2 2 /* Watchdog Timer Prescaler bit2 */ -#define WDP1 1 /* Watchdog Timer Prescaler bit1 */ -#define WDP0 0 /* Watchdog Timer Prescaler bit0 */ - -/* Clock Prescaler Register */ -#define CLKPR _SFR_MEM8(0x61) -/* CLKPR */ -#define CLKPCE 7 /* Clock Prescaler Change Enable */ -#define CLKPS3 3 /* Clock Prescaler Select bit3 */ -#define CLKPS2 2 /* Clock Prescaler Select bit2 */ -#define CLKPS1 1 /* Clock Prescaler Select bit1 */ -#define CLKPS0 0 /* Clock Prescaler Select bit0 */ - -/* Power Reduction Register */ -#define PRR _SFR_MEM8(0x64) -/* PRR */ -#define PRPSC2 7 /* Power Reduction PSC2 */ -#define PRPSC1 6 /* Power Reduction PSC1 */ -#define PRPSC0 5 /* Power Reduction PSC0 */ -#define PRTIM1 4 /* Power Reduction Timer/Counter1 */ -#define PRTIM0 3 /* Power Reduction Timer/Counter0 */ -#define PRSPI 2 /* Power Reduction Serial Peripheral Interface */ -#define PRUSART 1 /* Power Reduction USART */ -#define PRADC 0 /* Power Reduction ADC */ - -/* Oscillator Calibration Value */ -#define OSCCAL _SFR_MEM8(0x66) -/* OSCCAL */ -#define CAL6 6 -#define CAL5 5 -#define CAL4 4 -#define CAL3 3 -#define CAL2 2 -#define CAL1 1 -#define CAL0 0 - -/* External Interrupt Control Register A */ -#define EICRA _SFR_MEM8(0x69) -/* EICRA */ -#define ISC31 7 -#define ISC30 6 -#define ISC21 5 -#define ISC20 4 -#define ISC11 3 -#define ISC10 2 -#define ISC01 1 -#define ISC00 0 - -/* Timer/Counter0 Interrupt Mask Register */ -#define TIMSK0 _SFR_MEM8(0x6E) -/* TIMSK0 */ -#define OCIE0B 2 /* Output Compare Match B Interrupt Enable */ -#define OCIE0A 1 /* Output Compare Match A Interrupt Enable */ -#define TOIE0 0 /* Overflow Interrupt Enable */ - -/* Timer/Counter1 Interrupt Mask Register */ -#define TIMSK1 _SFR_MEM8(0x6F) -/* TIMSK1 */ -#define ICIE1 5 /* Input Capture Interrupt Enable */ -#define OCIE1B 2 /* Output Compare Match B Interrupt Enable */ -#define OCIE1A 1 /* Output Compare Match A Interrupt Enable */ -#define TOIE1 0 /* Overflow Interrupt Enable */ - -/* Amplifier 0 Control and Status register */ -#define AMP0CSR _SFR_MEM8(0x76) -#define AMP0EN 7 -#define AMP0IS 6 -#define AMP0G1 5 -#define AMP0G0 4 -#define AMP0TS1 1 -#define AMP0TS0 0 - -/* Amplifier 1 Control and Status register */ -#define AMP1CSR _SFR_MEM8(0x77) -#define AMP1EN 7 -#define AMP1IS 6 -#define AMP1G1 5 -#define AMP1G0 4 -#define AMP1TS1 1 -#define AMP1TS0 0 - -/* ADC Result Data Register */ -#ifndef __ASSEMBLER__ -#define ADC _SFR_MEM16(0x78) -#endif -#define ADCW _SFR_MEM16(0x78) -#define ADCL _SFR_MEM8(0x78) -#define ADCH _SFR_MEM8(0x79) - -/* ADC Control and Status Register A */ -#define ADCSRA _SFR_MEM8(0x7A) -/* ADCSRA */ -#define ADEN 7 /* ADC Enable */ -#define ADSC 6 /* ADC Start Conversion */ -#define ADATE 5 /* ADC Auto Trigger Enable */ -#define ADIF 4 /* ADC Interrupt Flag */ -#define ADIE 3 /* ADC Interrupt Enable */ -#define ADPS2 2 /* ADC Prescaler Select bit2 */ -#define ADPS1 1 /* ADC Prescaler Select bit1 */ -#define ADPS0 0 /* ADC Prescaler Select bit0 */ - -/* ADC Control and Status Register B */ -#define ADCSRB _SFR_MEM8(0x7B) -/* ADCSRB */ -#define ADHSM 7 /* ADC High Speed Mode */ -#define ADASCR 4 -#define ADTS3 3 /* ADC Auto Trigger Source 3 */ -#define ADTS2 2 /* ADC Auto Trigger Source 2 */ -#define ADTS1 1 /* ADC Auto Trigger Source 1 */ -#define ADTS0 0 /* ADC Auto Trigger Source 0 */ - -/* ADC multiplexer Selection Register */ -#define ADMUX _SFR_MEM8(0x7C) -/* ADMUX */ -#define REFS1 7 /* Reference Selection bit1 */ -#define REFS0 6 /* Reference Selection bit0 */ -#define ADLAR 5 /* Left Adjust Result */ -#define MUX3 3 /* Analog Channel and Gain Selection bit3 */ -#define MUX2 2 /* Analog Channel and Gain Selection bit2 */ -#define MUX1 1 /* Analog Channel and Gain Selection bit1 */ -#define MUX0 0 /* Analog Channel and Gain Selection bit0 */ - -/* Digital Input Disable Register 0 */ -#define DIDR0 _SFR_MEM8(0x7E) -/* DIDR0 */ -#define ADC7D 7 /* ADC7 Digital input Disable */ -#define ADC6D 6 /* ADC6 Digital input Disable */ -#define ADC5D 5 /* ADC5 Digital input Disable */ -#define ADC4D 4 /* ADC4 Digital input Disable */ -#define ADC3D 3 /* ADC3 Digital input Disable */ -#define ADC2D 2 /* ADC2 Digital input Disable */ -#define ADC1D 1 /* ADC1 Digital input Disable */ -#define ADC0D 0 /* ADC0 Digital input Disable */ - -/* Digital Input Disable Register 1 */ -#define DIDR1 _SFR_MEM8(0x7F) -/* DIDR1 */ -#define ACMP0D 5 -#define AMP0PD 4 -#define AMP0ND 3 -#define ADC10D 2 /* ADC10 Digital input Disable */ -#define ADC9D 1 /* ADC9 Digital input Disable */ -#define ADC8D 0 /* ADC8 Digital input Disable */ - -/* Timer/Counter1 Control Register A */ -#define TCCR1A _SFR_MEM8(0x80) -/* TCCR1A */ -#define COM1A1 7 /* Comparet Ouput Mode 1A, bit 1 */ -#define COM1A0 6 /* Comparet Ouput Mode 1A, bit 0 */ -#define COM1B1 5 /* Compare Output Mode 1B, bit 1 */ -#define COM1B0 4 /* Compare Output Mode 1B, bit 0 */ -#define WGM11 1 /* Waveform Generation Mode */ -#define WGM10 0 /* Waveform Generation Mode */ - -/* Timer/Counter1 Control Register B */ -#define TCCR1B _SFR_MEM8(0x81) -/* TCCR1B */ -#define ICNC1 7 /* Input Capture 1 Noise Canceler */ -#define ICES1 6 /* Input Capture 1 Edge Select */ -#define WGM13 4 /* Waveform Generation Mode */ -#define WGM12 3 /* Waveform Generation Mode */ -#define CS12 2 /* Prescaler source of Timer/Counter 1 */ -#define CS11 1 /* Prescaler source of Timer/Counter 1 */ -#define CS10 0 /* Prescaler source of Timer/Counter 1 */ - -/* Timer/Counter1 Control Register C */ -#define TCCR1C _SFR_MEM8(0x82) -/* TCCR1C */ -#define FOC1A 7 /* Force Output Compare for Channel A */ -#define FOC1B 6 /* Force Output Compare for Channel B */ - -/* Timer/Counter1 */ -#define TCNT1 _SFR_MEM16(0x84) -#define TCNT1L _SFR_MEM8(0x84) -#define TCNT1H _SFR_MEM8(0x85) -/* TCNT1H */ -#define TCNT115 7 -#define TCNT114 6 -#define TCNT113 5 -#define TCNT112 4 -#define TCNT111 3 -#define TCNT110 2 -#define TCNT19 1 -#define TCNT18 0 -/* TCNT1L */ -#define TCNT17 7 -#define TCNT16 6 -#define TCNT15 5 -#define TCNT14 4 -#define TCNT13 3 -#define TCNT12 2 -#define TCNT11 1 -#define TCNT10 0 - -/* Input Capture Register 1 */ -#define ICR1 _SFR_MEM16(0x86) -#define ICR1L _SFR_MEM8(0x86) -#define ICR1H _SFR_MEM8(0x87) -/* ICR1H */ -#define ICR115 7 -#define ICR114 6 -#define ICR113 5 -#define ICR112 4 -#define ICR111 3 -#define ICR110 2 -#define ICR19 1 -#define ICR18 0 -/* ICR1L */ -#define ICR17 7 -#define ICR16 6 -#define ICR15 5 -#define ICR14 4 -#define ICR13 3 -#define ICR12 2 -#define ICR11 1 -#define ICR10 0 - -/* Output Compare Register 1 A */ -#define OCR1A _SFR_MEM16(0x88) -#define OCR1AL _SFR_MEM8(0x88) -#define OCR1AH _SFR_MEM8(0x89) -/* OCR1AH */ -#define OCR1A15 7 -#define OCR1A14 6 -#define OCR1A13 5 -#define OCR1A12 4 -#define OCR1A11 3 -#define OCR1A10 2 -#define OCR1A9 1 -#define OCR1A8 0 -/* OCR1AL */ -#define OCR1A7 7 -#define OCR1A6 6 -#define OCR1A5 5 -#define OCR1A4 4 -#define OCR1A3 3 -#define OCR1A2 2 -#define OCR1A1 1 -#define OCR1A0 0 - -/* Output Compare Register 1 B */ -#define OCR1B _SFR_MEM16(0x8A) -#define OCR1BL _SFR_MEM8(0x8A) -#define OCR1BH _SFR_MEM8(0x8B) -/* OCR1BH */ -#define OCR1B15 7 -#define OCR1B14 6 -#define OCR1B13 5 -#define OCR1B12 4 -#define OCR1B11 3 -#define OCR1B10 2 -#define OCR1B9 1 -#define OCR1B8 0 -/* OCR1BL */ -#define OCR1B7 7 -#define OCR1B6 6 -#define OCR1B5 5 -#define OCR1B4 4 -#define OCR1B3 3 -#define OCR1B2 2 -#define OCR1B1 1 -#define OCR1B0 0 - -/* PSC0 Interrupt Flag Register */ -#define PIFR0 _SFR_MEM8(0xA0) -/* PIFR0 */ -#define POAC0B 7 /* PSC0 Output B Activity */ -#define POAC0A 6 /* PSC0 Output A Activity */ -#define PSEI0 5 /* PSC0 Synchro Error Interrupt */ -#define PEV0B 4 /* PSC0 External Event B Interrupt */ -#define PEV0A 3 /* PSC0 External Event A Interrupt */ -#define PRN01 2 /* PSC0 Ramp Number bit1 */ -#define PRN00 1 /* PSC0 Ramp Number bit0 */ -#define PEOP0 0 /* End Of PSC0 Interrupt */ - -/* PSC0 Interrupt Mask Register */ -#define PIM0 _SFR_MEM8(0xA1) -/* PIM0 */ -#define PSEIE0 5 /* PSC0 Synchro Error Interrupt Enable */ -#define PEVE0B 4 /* PSC0 External Event B Interrupt Enable */ -#define PEVE0A 3 /* PSC0 External Event A Interrupt Enable */ -#define PEOPE0 0 /* PSC0 End Of Cycle Interrupt Enable */ - -/* PSC1 Interrupt Flag Register */ -#define PIFR1 _SFR_MEM8(0xA2) -/* PIFR1 */ -#define POAC1B 7 /* PSC1 Output B Activity */ -#define POAC1A 6 /* PSC1 Output A Activity */ -#define PSEI1 5 /* PSC1 Synchro Error Interrupt */ -#define PEV1B 4 /* PSC1 External Event B Interrupt */ -#define PEV1A 3 /* PSC1 External Event A Interrupt */ -#define PRN11 2 /* PSC1 Ramp Number bit1 */ -#define PRN10 1 /* PSC1 Ramp Number bit0 */ -#define PEOP1 0 /* End Of PSC1 Interrupt */ - -/* PSC1 Interrupt Mask Register */ -#define PIM1 _SFR_MEM8(0xA3) -/* PIM1 */ -#define PSEIE1 5 /* PSC1 Synchro Error Interrupt Enable */ -#define PEVE1B 4 /* PSC1 External Event B Interrupt Enable */ -#define PEVE1A 3 /* PSC1 External Event A Interrupt Enable */ -#define PEOPE1 0 /* PSC1 End Of Cycle Interrupt Enable */ - -/* PSC2 Interrupt Flag Register */ -#define PIFR2 _SFR_MEM8(0xA4) -/* PIFR2 */ -#define POAC2B 7 /* PSC2 Output B Activity */ -#define POAC2A 6 /* PSC2 Output A Activity */ -#define PSEI2 5 /* PSC2 Synchro Error Interrupt */ -#define PEV2B 4 /* PSC2 External Event B Interrupt */ -#define PEV2A 3 /* PSC2 External Event A Interrupt */ -#define PRN21 2 /* PSC2 Ramp Number bit1 */ -#define PRN20 1 /* PSC2 Ramp Number bit0 */ -#define PEOP2 0 /* End Of PSC2 Interrupt */ - -/* PSC2 Interrupt Mask Register */ -#define PIM2 _SFR_MEM8(0xA5) -/* PIM2 */ -#define PSEIE2 5 /* PSC2 Synchro Error Interrupt Enable */ -#define PEVE2B 4 /* PSC2 External Event B Interrupt Enable */ -#define PEVE2A 3 /* PSC2 External Event A Interrupt Enable */ -#define PEOPE2 0 /* PSC2 End Of Cycle Interrupt Enable */ - -/* Digital to Analog Conversion Control Register */ -#define DACON _SFR_MEM8(0xAA) -/* DACON */ -#define DAATE 7 /* DAC Auto Trigger Enable bit */ -#define DATS2 6 /* DAC Trigger Selection bit2 */ -#define DATS1 5 /* DAC Trigger Selection bit1 */ -#define DATS0 4 /* DAC Trigger Selection bit0 */ -#define DALA 2 /* Digital to Analog Left Adjust */ -#define DAOE 1 /* Digital to Analog Output Enable bit */ -#define DAEN 0 /* Digital to Analog Enable bit */ - -/* Digital to Analog Converter input Register */ -#define DAC _SFR_MEM16(0xAB) -#define DACL _SFR_MEM8(0xAB) -#define DACH _SFR_MEM8(0xAC) - -/* Analog Comparator 0 Control Register */ -#define AC0CON _SFR_MEM8(0xAD) -/* AC0CON */ -#define AC0EN 7 /* Analog Comparator 0 Enable Bit */ -#define AC0IE 6 /* Analog Comparator 0 Interrupt Enable bit */ -#define AC0IS1 5 /* Analog Comparator 0 Interrupt Select bit1 */ -#define AC0IS0 4 /* Analog Comparator 0 Interrupt Select bit0 */ -#define AC0M2 2 /* Analog Comparator 0 Multiplexer register bit2 */ -#define AC0M1 1 /* Analog Comparator 0 Multiplexer register bit1 */ -#define AC0M0 0 /* Analog Comparator 0 Multiplexer register bit0 */ - -/* Analog Comparator 1 Control Register */ -#define AC1CON _SFR_MEM8(0xAE) -/* AC1CON */ -#define AC1EN 7 /* Analog Comparator 1 Enable Bit */ -#define AC1IE 6 /* Analog Comparator 1 Interrupt Enable bit */ -#define AC1IS1 5 /* Analog Comparator 1 Interrupt Select bit1 */ -#define AC1IS0 4 /* Analog Comparator 1 Interrupt Select bit0 */ -#define AC1ICE 3 /* Analog Comparator 1 Interrupt Capture Enable bit */ -#define AC1M2 2 /* Analog Comparator 1 Multiplexer register bit2 */ -#define AC1M1 1 /* Analog Comparator 1 Multiplexer register bit1 */ -#define AC1M0 0 /* Analog Comparator 1 Multiplexer register bit0 */ - -/* Analog Comparator 2 Control Register */ -#define AC2CON _SFR_MEM8(0xAF) -/* AC2CON */ -#define AC2EN 7 /* Analog Comparator 2 Enable Bit */ -#define AC2IE 6 /* Analog Comparator 2 Interrupt Enable bit */ -#define AC2IS1 5 /* Analog Comparator 2 Interrupt Select bit1 */ -#define AC2IS0 4 /* Analog Comparator 2 Interrupt Select bit0 */ -#define AC2M2 2 /* Analog Comparator 2 Multiplexer register bit2 */ -#define AC2M1 1 /* Analog Comparator 2 Multiplexer register bit1 */ -#define AC2M0 0 /* Analog Comparator 2 Multiplexer register bit0 */ - -/* USART Control and Status Register A */ -#define UCSRA _SFR_MEM8(0xC0) -/* UCSRA */ -#define RXC 7 /* USART Receive Complete */ -#define TXC 6 /* USART Transmit Complete */ -#define UDRE 5 /* USART Data Register Empty */ -#define FE 4 /* Frame Error */ -#define DOR 3 /* Data OverRun */ -#define UPE 2 /* USART Parity Error */ -#define U2X 1 /* Double the USART Transmission Speed */ -#define MPCM 0 /* Multi-processor Communication Mode */ - -/* USART Control and Status Register B */ -#define UCSRB _SFR_MEM8(0xC1) -/* UCSRB */ -#define RXCIE 7 /* RX Complete Interrupt Enable */ -#define TXCIE 6 /* TX Complete Interrupt Enable */ -#define UDRIE 5 /* USART Data Register Empty Interrupt Enable */ -#define RXEN 4 /* Receiver Enable */ -#define TXEN 3 /* Transmitter Enable */ -#define UCSZ2 2 /* Character Size */ -#define RXB8 1 /* Receive Data Bit 8 */ -#define TXB8 0 /* Transmit Data Bit 8 */ - -/* USART Control and Status Register C */ -#define UCSRC _SFR_MEM8(0xC2) -/* UCSRC */ -#define UMSEL 6 /* USART Mode Select */ -#define UPM1 5 /* Parity Mode bit1 */ -#define UPM0 4 /* Parity Mode bit0 */ -#define USBS 3 /* Stop Bit Select */ -#define UCSZ1 2 /* Character Size bit1 */ -#define UCSZ0 1 /* Character Size bit0 */ -#define UCPOL 0 /* Clock Polarity */ - -/* USART Baud Rate Register */ -#define UBRR _SFR_MEM16(0xC4) -#define UBRRL _SFR_MEM8(0xC4) -#define UBRRH _SFR_MEM8(0xC5) - -/* USART I/O Data Register */ -#define UDR _SFR_MEM8(0xC6) - -/* EUSART Control and Status Register A */ -#define EUCSRA _SFR_MEM8(0xC8) -/* EUCSRA */ -#define UTxS3 7 /* EUSART Transmit Character Size bit3 */ -#define UTxS2 6 /* EUSART Transmit Character Size bit2 */ -#define UTxS1 5 /* EUSART Transmit Character Size bit1 */ -#define UTxS0 4 /* EUSART Transmit Character Size bit0 */ -#define URxS3 3 /* EUSART Receive Character Size bit3 */ -#define URxS2 2 /* EUSART Receive Character Size bit2 */ -#define URxS1 1 /* EUSART Receive Character Size bit1 */ -#define URxS0 0 /* EUSART Receive Character Size bit0 */ - -/* EUSART Control and Status Register B */ -#define EUCSRB _SFR_MEM8(0xC9) -/* EUCSRB */ -#define EUSART 4 /* EUSART Enable Bit */ -#define EUSBS 3 /* EUSBS Enable Bit */ -#define EMCH 1 /* Manchester mode */ -#define BODR 0 /* Bit Order */ - -/* EUSART Control and Status Register C */ -#define EUCSRC _SFR_MEM8(0xCA) -/* EUCSRC */ -#define FEM 3 /* Frame Error Manchester */ -#define F1617 2 -#define STP1 1 /* Stop bits values bit1 */ -#define STP0 0 /* Stop bits values bit0 */ - -/* Manchester receiver Baud Rate Registers */ -#define MUBRR _SFR_MEM16(0xCC) -#define MUBRRL _SFR_MEM8(0xCC) -#define MUBRRH _SFR_MEM8(0xCD) - -/* EUSART I/O Data Register */ -#define EUDR _SFR_MEM8(0xCE) - -/* PSC 0 Synchro and Output Configuration */ -#define PSOC0 _SFR_MEM8(0xD0) -/* PSOC0 */ -#define PSYNC01 5 /* Synchronization Out for ADC Selection bit1 */ -#define PSYNC00 4 /* Synchronization Out for ADC Selection bit0 */ -#define POEN0B 2 /* PSC 0 OUT Part B Output Enable */ -#define POEN0A 0 /* PSC 0 OUT Part A Output Enable */ - -/* Output Compare SA Registers */ -#define OCR0SA _SFR_MEM16(0xD2) -#define OCR0SAL _SFR_MEM8(0xD2) -#define OCR0SAH _SFR_MEM8(0xD3) - -/* Output Compare RA Registers */ -#define OCR0RA _SFR_MEM16(0xD4) -#define OCR0RAL _SFR_MEM8(0xD4) -#define OCR0RAH _SFR_MEM8(0xD5) - -/* Output Compare SB Registers */ -#define OCR0SB _SFR_MEM16(0xD6) -#define OCR0SBL _SFR_MEM8(0xD6) -#define OCR0SBH _SFR_MEM8(0xD7) - -/* Output Compare RB Registers */ -#define OCR0RB _SFR_MEM16(0xD8) -#define OCR0RBL _SFR_MEM8(0xD8) -#define OCR0RBH _SFR_MEM8(0xD9) - -/* PSC 0 Configuration Register */ -#define PCNF0 _SFR_MEM8(0xDA) -/* PCNF0 */ -#define PFIFTY0 7 /* PSC 0 Fifty */ -#define PALOCK0 6 /* PSC 0 Autolock */ -#define PLOCK0 5 /* PSC 0 Lock */ -#define PMODE01 4 /* PSC 0 Mode bit1 */ -#define PMODE00 3 /* PSC 0 Mode bit0 */ -#define POP0 2 /* PSC 0 Output Polarity */ -#define PCLKSEL0 1 /* PSC 0 Input Clock Select */ - -/* PSC 0 Control Register */ -#define PCTL0 _SFR_MEM8(0xDB) -/* PCTL0 */ -#define PPRE01 7 /* PSC 0 Prescaler Select bit1 */ -#define PPRE00 6 /* PSC 0 Prescaler Select bit0 */ -#define PBFM0 5 /* Balance Flank Width Modulation */ -#define PAOC0B 4 /* PSC 0 Asynchronous Output Control B */ -#define PAOC0A 3 /* PSC 0 Asynchronous Output Control A */ -#define PARUN0 2 /* PSC 0 Autorun */ -#define PCCYC0 1 /* PSC 0 Complete Cycle */ -#define PRUN0 0 /* PSC 0 Run */ - -/* PSC 0 Input A Control Register */ -#define PFRC0A _SFR_MEM8(0xDC) -/* PFRC0A */ -#define PCAE0A 7 /* PSC 0 Capture Enable Input Part A */ -#define PISEL0A 6 /* PSC 0 Input Select for Part A */ -#define PELEV0A 5 /* PSC 0 Edge Level Selector of Input Part A */ -#define PFLTE0A 4 /* PSC 0 Filter Enable on Input Part A */ -#define PRFM0A3 3 /* PSC 0 Fault Mode bit3 */ -#define PRFM0A2 2 /* PSC 0 Fault Mode bit2 */ -#define PRFM0A1 1 /* PSC 0 Fault Mode bit1 */ -#define PRFM0A0 0 /* PSC 0 Fault Mode bit0 */ - -/* PSC 0 Input B Control Register */ -#define PFRC0B _SFR_MEM8(0xDD) -/* PFRC0B */ -#define PCAE0B 7 /* PSC 0 Capture Enable Input Part B */ -#define PISEL0B 6 /* PSC 0 Input Select for Part B */ -#define PELEV0B 5 /* PSC 0 Edge Level Selector of Input Part B */ -#define PFLTE0B 4 /* PSC 0 Filter Enable on Input Part B */ -#define PRFM0B3 3 /* PSC 0 Fault Mode bit3 */ -#define PRFM0B2 2 /* PSC 0 Fault Mode bit2 */ -#define PRFM0B1 1 /* PSC 0 Fault Mode bit1 */ -#define PRFM0B0 0 /* PSC 0 Fault Mode bit0 */ - -/* PSC 0 Input Capture Registers */ -#define PICR0 _SFR_MEM16(0xDE) - -#define PICR0L _SFR_MEM8(0xDE) - -#define PICR0H _SFR_MEM8(0xDF) -#define PCST0 7 /* PSC Capture Software Trig bit */ - /* not implemented on AT90PWM2/AT90PWM3 */ - -/* PSC 1 Synchro and Output Configuration */ -#define PSOC1 _SFR_MEM8(0xE0) -/* PSOC1 */ -#define PSYNC11 5 /* Synchronization Out for ADC Selection bit1 */ -#define PSYNC10 4 /* Synchronization Out for ADC Selection bit0 */ -#define POEN1B 2 /* PSC 1 OUT Part B Output Enable */ -#define POEN1A 0 /* PSC 1 OUT Part A Output Enable */ - -/* Output Compare SA Registers */ -#define OCR1SA _SFR_MEM16(0xE2) -#define OCR1SAL _SFR_MEM8(0xE2) -#define OCR1SAH _SFR_MEM8(0xE3) - -/* Output Compare RA Registers */ -#define OCR1RA _SFR_MEM16(0xE4) -#define OCR1RAL _SFR_MEM8(0xE4) -#define OCR1RAH _SFR_MEM8(0xE5) - -/* Output Compare SB Registers */ -#define OCR1SB _SFR_MEM16(0xE6) -#define OCR1SBL _SFR_MEM8(0xE6) -#define OCR1SBH _SFR_MEM8(0xE7) - -/* Output Compare RB Registers */ -#define OCR1RB _SFR_MEM16(0xE8) -#define OCR1RBL _SFR_MEM8(0xE8) -#define OCR1RBH _SFR_MEM8(0xE9) - -/* PSC 1 Configuration Register */ -#define PCNF1 _SFR_MEM8(0xEA) -/* PCNF1 */ -#define PFIFTY1 7 /* PSC 1 Fifty */ -#define PALOCK1 6 /* PSC 1 Autolock */ -#define PLOCK1 5 /* PSC 1 Lock */ -#define PMODE11 4 /* PSC 1 Mode bit1 */ -#define PMODE10 3 /* PSC 1 Mode bit0 */ -#define POP1 2 /* PSC 1 Output Polarity */ -#define PCLKSEL1 1 /* PSC 1 Input Clock Select */ - -/* PSC 1 Control Register */ -#define PCTL1 _SFR_MEM8(0xEB) -/* PCTL1 */ -#define PPRE11 7 /* PSC 1 Prescaler Select bit1 */ -#define PPRE10 6 /* PSC 1 Prescaler Select bit0 */ -#define PBFM1 5 /* Balance Flank Width Modulation */ -#define PAOC1B 4 /* PSC 1 Asynchronous Output Control B */ -#define PAOC1A 3 /* PSC 1 Asynchronous Output Control A */ -#define PARUN1 2 /* PSC 1 Autorun */ -#define PCCYC1 1 /* PSC 1 Complete Cycle */ -#define PRUN1 0 /* PSC 1 Run */ - -/* PSC 1 Input A Control Register */ -#define PFRC1A _SFR_MEM8(0xEC) -/* PFRC1A */ -#define PCAE1A 7 /* PSC 1 Capture Enable Input Part A */ -#define PISEL1A 6 /* PSC 1 Input Select for Part A */ -#define PELEV1A 5 /* PSC 1 Edge Level Selector of Input Part A */ -#define PFLTE1A 4 /* PSC 1 Filter Enable on Input Part A */ -#define PRFM1A3 3 /* PSC 1 Fault Mode bit3 */ -#define PRFM1A2 2 /* PSC 1 Fault Mode bit2 */ -#define PRFM1A1 1 /* PSC 1 Fault Mode bit1 */ -#define PRFM1A0 0 /* PSC 1 Fault Mode bit0 */ - -/* PSC 1 Input B Control Register */ -#define PFRC1B _SFR_MEM8(0xED) -/* PFRC1B */ -#define PCAE1B 7 /* PSC 1 Capture Enable Input Part B */ -#define PISEL1B 6 /* PSC 1 Input Select for Part B */ -#define PELEV1B 5 /* PSC 1 Edge Level Selector of Input Part B */ -#define PFLTE1B 4 /* PSC 1 Filter Enable on Input Part B */ -#define PRFM1B3 3 /* PSC 1 Fault Mode bit3 */ -#define PRFM1B2 2 /* PSC 1 Fault Mode bit2 */ -#define PRFM1B1 1 /* PSC 1 Fault Mode bit1 */ -#define PRFM1B0 0 /* PSC 1 Fault Mode bit0 */ - -/* PSC 1 Input Capture Registers */ -#define PICR1 _SFR_MEM16(0xEE) - -#define PICR1L _SFR_MEM8(0xEE) - -#define PICR1H _SFR_MEM8(0xEF) -#define PCST1 7 /* PSC Capture Software Trig bit */ - /* not implemented on AT90PWM2/AT90PWM3 */ - -/* PSC 2 Synchro and Output Configuration */ -#define PSOC2 _SFR_MEM8(0xF0) -/* PSOC2 */ -#define POS23 7 /* PSCOUT23 Selection */ -#define POS22 6 /* PSCOUT22 Selection */ -#define PSYNC21 5 /* Synchronization Out for ADC Selection bit1 */ -#define PSYNC20 4 /* Synchronization Out for ADC Selection bit0 */ -#define POEN2D 3 /* PSCOUT23 Output Enable */ -#define POEN2B 2 /* PSC 2 OUT Part B Output Enable */ -#define POEN2C 1 /* PSCOUT22 Output Enable */ -#define POEN2A 0 /* PSC 2 OUT Part A Output Enable */ - -/* PSC 2 Output Matrix */ -#define POM2 _SFR_MEM8(0xF1) -/* POM2 */ -#define POMV2B3 7 /* Output Matrix Output B Ramp 3 */ -#define POMV2B2 6 /* Output Matrix Output B Ramp 2 */ -#define POMV2B1 5 /* Output Matrix Output B Ramp 1 */ -#define POMV2B0 4 /* Output Matrix Output B Ramp 0 */ -#define POMV2A3 3 /* Output Matrix Output A Ramp 3 */ -#define POMV2A2 2 /* Output Matrix Output A Ramp 2 */ -#define POMV2A1 1 /* Output Matrix Output A Ramp 1 */ -#define POMV2A0 0 /* Output Matrix Output A Ramp 0 */ - -/* Output Compare SA Registers */ -#define OCR2SA _SFR_MEM16(0xF2) -#define OCR2SAL _SFR_MEM8(0xF2) -#define OCR2SAH _SFR_MEM8(0xF3) - -/* Output Compare RA Registers */ -#define OCR2RA _SFR_MEM16(0xF4) -#define OCR2RAL _SFR_MEM8(0xF4) -#define OCR2RAH _SFR_MEM8(0xF5) - -/* Output Compare SB Registers */ -#define OCR2SB _SFR_MEM16(0xF6) -#define OCR2SBL _SFR_MEM8(0xF6) -#define OCR2SBH _SFR_MEM8(0xF7) - -/* Output Compare RB Registers */ -#define OCR2RB _SFR_MEM16(0xF8) -#define OCR2RBL _SFR_MEM8(0xF8) -#define OCR2RBH _SFR_MEM8(0xF9) - -/* PSC 2 Configuration Register */ -#define PCNF2 _SFR_MEM8(0xFA) -/* PCNF2 */ -#define PFIFTY2 7 /* PSC 2 Fifty */ -#define PALOCK2 6 /* PSC 2 Autolock */ -#define PLOCK2 5 /* PSC 2 Lock */ -#define PMODE21 4 /* PSC 2 Mode bit1 */ -#define PMODE20 3 /* PSC 2 Mode bit0 */ -#define POP2 2 /* PSC 2 Output Polarity */ -#define PCLKSEL2 1 /* PSC 2 Input Clock Select */ -#define POME2 0 /* PSC 2 Output Matrix Enable */ - -/* PSC 2 Control Register */ -#define PCTL2 _SFR_MEM8(0xFB) -/* PCTL2 */ -#define PPRE21 7 /* PSC 2 Prescaler Select bit1 */ -#define PPRE20 6 /* PSC 2 Prescaler Select bit0 */ -#define PBFM2 5 /* Balance Flank Width Modulation */ -#define PAOC2B 4 /* PSC 2 Asynchronous Output Control B */ -#define PAOC2A 3 /* PSC 2 Asynchronous Output Control A */ -#define PARUN2 2 /* PSC 2 Autorun */ -#define PCCYC2 1 /* PSC 2 Complete Cycle */ -#define PRUN2 0 /* PSC 2 Run */ - -/* PSC 2 Input A Control Register */ -#define PFRC2A _SFR_MEM8(0xFC) -/* PFRC2A */ -#define PCAE2A 7 /* PSC 2 Capture Enable Input Part A */ -#define PISEL2A 6 /* PSC 2 Input Select for Part A */ -#define PELEV2A 5 /* PSC 2 Edge Level Selector of Input Part A */ -#define PFLTE2A 4 /* PSC 2 Filter Enable on Input Part A */ -#define PRFM2A3 3 /* PSC 2 Fault Mode bit3 */ -#define PRFM2A2 2 /* PSC 2 Fault Mode bit2 */ -#define PRFM2A1 1 /* PSC 2 Fault Mode bit1 */ -#define PRFM2A0 0 /* PSC 2 Fault Mode bit0 */ - -/* PSC 2 Input B Control Register */ -#define PFRC2B _SFR_MEM8(0xFD) -/* PFRC2B */ -#define PCAE2B 7 /* PSC 2 Capture Enable Input Part B */ -#define PISEL2B 6 /* PSC 2 Input Select for Part B */ -#define PELEV2B 5 /* PSC 2 Edge Level Selector of Input Part B */ -#define PFLTE2B 4 /* PSC 2 Filter Enable on Input Part B */ -#define PRFM2B3 3 /* PSC 2 Fault Mode bit3 */ -#define PRFM2B2 2 /* PSC 2 Fault Mode bit2 */ -#define PRFM2B1 1 /* PSC 2 Fault Mode bit1 */ -#define PRFM2B0 0 /* PSC 2 Fault Mode bit0 */ - -/* PSC 2 Input Capture Registers */ -#define PICR2 _SFR_MEM16(0xFE) - -#define PICR2L _SFR_MEM8(0xFE) - -#define PICR2H _SFR_MEM8(0xFF) -#define PCST2 7 /* PSC Capture Software Trig bit */ - /* not implemented on AT90PWM2/AT90PWM3 */ - - -/* Interrupt vectors */ -/* PSC2 Capture Event */ -#define PSC2_CAPT_vect _VECTOR(1) -#define SIG_PSC2_CAPTURE _VECTOR(1) - -/* PSC2 End Cycle */ -#define PSC2_EC_vect _VECTOR(2) -#define SIG_PSC2_END_CYCLE _VECTOR(2) - -/* PSC1 Capture Event */ -#define PSC1_CAPT_vect _VECTOR(3) -#define SIG_PSC1_CAPTURE _VECTOR(3) - -/* PSC1 End Cycle */ -#define PSC1_EC_vect _VECTOR(4) -#define SIG_PSC1_END_CYCLE _VECTOR(4) - -/* PSC0 Capture Event */ -#define PSC0_CAPT_vect _VECTOR(5) -#define SIG_PSC0_CAPTURE _VECTOR(5) - -/* PSC0 End Cycle */ -#define PSC0_EC_vect _VECTOR(6) -#define SIG_PSC0_END_CYCLE _VECTOR(6) - -/* Analog Comparator 0 */ -#define ANALOG_COMP_0_vect _VECTOR(7) -#define SIG_COMPARATOR0 _VECTOR(7) - -/* Analog Comparator 1 */ -#define ANALOG_COMP_1_vect _VECTOR(8) -#define SIG_COMPARATOR1 _VECTOR(8) - -/* Analog Comparator 2 */ -#define ANALOG_COMP_2_vect _VECTOR(9) -#define SIG_COMPARATOR2 _VECTOR(9) - -/* External Interrupt Request 0 */ -#define INT0_vect _VECTOR(10) -#define SIG_INTERRUPT0 _VECTOR(10) - -/* Timer/Counter1 Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(11) -#define SIG_INPUT_CAPTURE1 _VECTOR(11) - -/* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPA_vect _VECTOR(12) -#define SIG_OUTPUT_COMPARE1A _VECTOR(12) -#define SIG_OUTPUT_COMPARE1_A _VECTOR(12) - -/* Timer/Counter Compare Match B */ -#define TIMER1_COMPB_vect _VECTOR(13) -#define SIG_OUTPUT_COMPARE1B _VECTOR(13) -#define SIG_OUTPUT_COMPARE1_B _VECTOR(13) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(15) -#define SIG_OVERFLOW1 _VECTOR(15) - -/* Timer/Counter0 Compare Match A */ -#define TIMER0_COMP_A_vect _VECTOR(16) -#define SIG_OUTPUT_COMPARE0A _VECTOR(16) -#define SIG_OUTPUT_COMPARE0_A _VECTOR(16) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(17) -#define SIG_OVERFLOW0 _VECTOR(17) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(18) -#define SIG_ADC _VECTOR(18) - -/* External Interrupt Request 1 */ -#define INT1_vect _VECTOR(19) -#define SIG_INTERRUPT1 _VECTOR(19) - -/* SPI Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(20) -#define SIG_SPI _VECTOR(20) - -/* USART, Rx Complete */ -#define USART_RX_vect _VECTOR(21) -#define SIG_USART_RECV _VECTOR(21) -#define SIG_UART_RECV _VECTOR(21) - -/* USART Data Register Empty */ -#define USART_UDRE_vect _VECTOR(22) -#define SIG_USART_DATA _VECTOR(22) -#define SIG_UART_DATA _VECTOR(22) - -/* USART, Tx Complete */ -#define USART_TX_vect _VECTOR(23) -#define SIG_USART_TRANS _VECTOR(23) -#define SIG_UART_TRANS _VECTOR(23) - -/* External Interrupt Request 2 */ -#define INT2_vect _VECTOR(24) -#define SIG_INTERRUPT2 _VECTOR(24) - -/* Watchdog Timeout Interrupt */ -#define WDT_vect _VECTOR(25) -#define SIG_WDT _VECTOR(25) -#define SIG_WATCHDOG_TIMEOUT _VECTOR(25) - -/* EEPROM Ready */ -#define EE_READY_vect _VECTOR(26) -#define SIG_EEPROM_READY _VECTOR(26) - -/* Timer Counter 0 Compare Match B */ -#define TIMER0_COMPB_vect _VECTOR(27) -#define SIG_OUTPUT_COMPARE0B _VECTOR(27) -#define SIG_OUTPUT_COMPARE0_B _VECTOR(27) - -/* External Interrupt Request 3 */ -#define INT3_vect _VECTOR(28) -#define SIG_INTERRUPT3 _VECTOR(28) - -/* Store Program Memory Read */ -#define SPM_READY_vect _VECTOR(31) -#define SIG_SPM_READY _VECTOR(31) - -#define _VECTORS_SIZE 64 - -/* Constants */ -#define SPM_PAGESIZE 64 - -#define RAMEND 0x02FF -#define XRAMEND 0x02FF -#define E2END 0x01FF -#define E2PAGESIZE 4 -#define FLASHEND 0x0FFF - - -/* Fuse Information */ - -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) /* Select Clock Source */ -#define FUSE_CKSEL1 (unsigned char)~_BV(1) /* Select Clock Source */ -#define FUSE_CKSEL2 (unsigned char)~_BV(2) /* Select Clock Source */ -#define FUSE_CKSEL3 (unsigned char)~_BV(3) /* Select Clock Source */ -#define FUSE_SUT0 (unsigned char)~_BV(4) /* Select start-up time */ -#define FUSE_SUT1 (unsigned char)~_BV(5) /* Select start-up time */ -#define FUSE_CKOUT (unsigned char)~_BV(6) /* Oscillator output option */ -#define FUSE_CKDIV8 (unsigned char)~_BV(7) /* Divide clock by 8 */ -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) /* EEPROM memory is preserved through chip erase */ -#define FUSE_WDTON (unsigned char)~_BV(4) /* Watchdog timer always on */ -#define FUSE_SPIEN (unsigned char)~_BV(5) /* Enable Serial programming and Data Downloading */ -#define FUSE_DWEN (unsigned char)~_BV(6) /* debugWIRE Enable */ -#define FUSE_RSTDISBL (unsigned char)~_BV(7) /* External Reset Diasble */ -#define HFUSE_DEFAULT (FUSE_SPIEN) - -/* Extended Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_PSCRV (unsigned char)~_BV(4) -#define FUSE_PSC0RB (unsigned char)~_BV(5) -#define FUSE_PSC1RB (unsigned char)~_BV(6) -#define FUSE_PSC2RB (unsigned char)~_BV(7) -#define EFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -#endif /* _AVR_IO90PWMX_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/ioat94k.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/ioat94k.h deleted file mode 100644 index e516fcb9b..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/ioat94k.h +++ /dev/null @@ -1,557 +0,0 @@ -/* Copyright (c) 2002, Marek Michalkiewicz - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: ioat94k.h,v 1.9 2004/11/01 22:23:56 arcanum Exp $ */ - -/* avr/ioat94k.h - definitions for AT94K series FPSLIC(tm) */ - -#ifndef _AVR_IOAT94K_H_ -#define _AVR_IOAT94K_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "ioat94k.h" -#else -# error "Attempt to include more than one file." -#endif - -/* I/O registers */ - -/* UART1 Baud Rate Register */ -#define UBRR1 _SFR_IO8(0x00) - -/* UART1 Control and Status Registers */ -#define UCSR1B _SFR_IO8(0x01) -#define UCSR1A _SFR_IO8(0x02) - -/* UART1 I/O Data Register */ -#define UDR1 _SFR_IO8(0x03) - -/* 0x04 reserved */ - -/* Input Pins, Port E */ -#define PINE _SFR_IO8(0x05) - -/* Data Direction Register, Port E */ -#define DDRE _SFR_IO8(0x06) - -/* Data Register, Port E */ -#define PORTE _SFR_IO8(0x07) - -/* On Chip Debug Register (reserved) */ -#define OCDR _SFR_IO8(0x08) - -/* UART0 Baud Rate Register */ -#define UBRR0 _SFR_IO8(0x09) - -/* UART0 Control and Status Registers */ -#define UCSR0B _SFR_IO8(0x0A) -#define UCSR0A _SFR_IO8(0x0B) - -/* UART0 I/O Data Register */ -#define UDR0 _SFR_IO8(0x0C) - -/* 0x0D..0x0F reserved */ - -/* Input Pins, Port D */ -#define PIND _SFR_IO8(0x10) - -/* Data Direction Register, Port D */ -#define DDRD _SFR_IO8(0x11) - -/* Data Register, Port D */ -#define PORTD _SFR_IO8(0x12) - -/* FPGA I/O Select Control Register */ -#define FISCR _SFR_IO8(0x13) - -/* FPGA I/O Select Registers A, B, C, D */ -#define FISUA _SFR_IO8(0x14) -#define FISUB _SFR_IO8(0x15) -#define FISUC _SFR_IO8(0x16) -#define FISUD _SFR_IO8(0x17) - -/* FPGA Cache Logic(R) registers (top secret, under NDA) */ -#define FPGAX _SFR_IO8(0x18) -#define FPGAY _SFR_IO8(0x19) -#define FPGAZ _SFR_IO8(0x1A) -#define FPGAD _SFR_IO8(0x1B) - -/* TWI stands for "Two Wire Interface" or "TWI Was I2C(tm)" */ - -/* 2-wire Serial Bit Rate Register */ -#define TWBR _SFR_IO8(0x1C) - -/* 2-wire Serial Status Register */ -#define TWSR _SFR_IO8(0x1D) - -/* 2-wire Serial (Slave) Address Register */ -#define TWAR _SFR_IO8(0x1E) - -/* 2-wire Serial Data Register */ -#define TWDR _SFR_IO8(0x1F) - -/* UART Baud Register High */ -#define UBRRH _SFR_IO8(0x20) -#define UBRRHI UBRRH /* New name in datasheet (1138F-FPSLI-06/02) */ - -/* Watchdog Timer Control Register */ -#define WDTCR _SFR_IO8(0x21) - -/* Timer/Counter2 Output Compare Register */ -#define OCR2 _SFR_IO8(0x22) - -/* Timer/Counter2 (8-bit) */ -#define TCNT2 _SFR_IO8(0x23) - -/* Timer/Counter1 Input Capture Register */ -#define ICR1 _SFR_IO16(0x24) -#define ICR1L _SFR_IO8(0x24) -#define ICR1H _SFR_IO8(0x25) - -/* Asynchronous mode StatuS Register */ -#define ASSR _SFR_IO8(0x26) - -/* Timer/Counter2 Control Register */ -#define TCCR2 _SFR_IO8(0x27) - -/* Timer/Counter1 Output Compare RegisterB */ -#define OCR1B _SFR_IO16(0x28) -#define OCR1BL _SFR_IO8(0x28) -#define OCR1BH _SFR_IO8(0x29) - -/* Timer/Counter1 Output Compare RegisterA */ -#define OCR1A _SFR_IO16(0x2A) -#define OCR1AL _SFR_IO8(0x2A) -#define OCR1AH _SFR_IO8(0x2B) - -/* Timer/Counter1 */ -#define TCNT1 _SFR_IO16(0x2C) -#define TCNT1L _SFR_IO8(0x2C) -#define TCNT1H _SFR_IO8(0x2D) - -/* Timer/Counter1 Control Register B */ -#define TCCR1B _SFR_IO8(0x2E) - -/* Timer/Counter1 Control Register A */ -#define TCCR1A _SFR_IO8(0x2F) - -/* Special Function IO Register */ -#define SFIOR _SFR_IO8(0x30) - -/* Timer/Counter0 Output Compare Register */ -#define OCR0 _SFR_IO8(0x31) - -/* Timer/Counter0 (8-bit) */ -#define TCNT0 _SFR_IO8(0x32) - -/* Timer/Counter0 Control Register */ -#define TCCR0 _SFR_IO8(0x33) - -/* 0x34 reserved */ - -/* MCU Control/Status Register */ -#define MCUR _SFR_IO8(0x35) - -/* 2-wire Serial Control Register */ -#define TWCR _SFR_IO8(0x36) - -/* 0x37 reserved */ - -/* Timer/Counter Interrupt Flag Register */ -#define TIFR _SFR_IO8(0x38) - -/* Timer/Counter Interrupt MaSK Register */ -#define TIMSK _SFR_IO8(0x39) - -/* Software Control Register */ -#define SFTCR _SFR_IO8(0x3A) - -/* External Interrupt Mask/Flag Register */ -#define EIMF _SFR_IO8(0x3B) - -/* 0x3C reserved */ - -/* 0x3D..0x3E SP */ - -/* 0x3F SREG */ - -/* Interrupt vectors */ - -#define SIG_FPGA_INTERRUPT0 _VECTOR(1) /* FPGA_INT0 */ -#define SIG_INTERRUPT0 _VECTOR(2) /* EXT_INT0 */ -#define SIG_FPGA_INTERRUPT1 _VECTOR(3) /* FPGA_INT1 */ -#define SIG_INTERRUPT1 _VECTOR(4) /* EXT_INT1 */ -#define SIG_FPGA_INTERRUPT2 _VECTOR(5) /* FPGA_INT2 */ -#define SIG_INTERRUPT2 _VECTOR(6) /* EXT_INT2 */ -#define SIG_FPGA_INTERRUPT3 _VECTOR(7) /* FPGA_INT3 */ -#define SIG_INTERRUPT3 _VECTOR(8) /* EXT_INT3 */ -#define SIG_OUTPUT_COMPARE2 _VECTOR(9) /* TIM2_COMP */ -#define SIG_OVERFLOW2 _VECTOR(10) /* TIM2_OVF */ -#define SIG_INPUT_CAPTURE1 _VECTOR(11) /* TIM1_CAPT */ -#define SIG_OUTPUT_COMPARE1A _VECTOR(12) /* TIM1_COMPA */ -#define SIG_OUTPUT_COMPARE1B _VECTOR(13) /* TIM1_COMPB */ -#define SIG_OVERFLOW1 _VECTOR(14) /* TIM1_OVF */ -#define SIG_OUTPUT_COMPARE0 _VECTOR(15) /* TIM0_COMP */ -#define SIG_OVERFLOW0 _VECTOR(16) /* TIM0_OVF */ -#define SIG_FPGA_INTERRUPT4 _VECTOR(17) /* FPGA_INT4 */ -#define SIG_FPGA_INTERRUPT5 _VECTOR(18) /* FPGA_INT5 */ -#define SIG_FPGA_INTERRUPT6 _VECTOR(19) /* FPGA_INT6 */ -#define SIG_FPGA_INTERRUPT7 _VECTOR(20) /* FPGA_INT7 */ -#define SIG_UART0_RECV _VECTOR(21) /* UART0_RXC */ -#define SIG_UART0_DATA _VECTOR(22) /* UART0_DRE */ -#define SIG_UART0_TRANS _VECTOR(23) /* UART0_TXC */ -#define SIG_FPGA_INTERRUPT8 _VECTOR(24) /* FPGA_INT8 */ -#define SIG_FPGA_INTERRUPT9 _VECTOR(25) /* FPGA_INT9 */ -#define SIG_FPGA_INTERRUPT10 _VECTOR(26) /* FPGA_INT10 */ -#define SIG_FPGA_INTERRUPT11 _VECTOR(27) /* FPGA_INT11 */ -#define SIG_UART1_RECV _VECTOR(28) /* UART1_RXC */ -#define SIG_UART1_DATA _VECTOR(29) /* UART1_DRE */ -#define SIG_UART1_TRANS _VECTOR(30) /* UART1_TXC */ -#define SIG_FPGA_INTERRUPT12 _VECTOR(31) /* FPGA_INT12 */ -#define SIG_FPGA_INTERRUPT13 _VECTOR(32) /* FPGA_INT13 */ -#define SIG_FPGA_INTERRUPT14 _VECTOR(33) /* FPGA_INT14 */ -#define SIG_FPGA_INTERRUPT15 _VECTOR(34) /* FPGA_INT15 */ -#define SIG_2WIRE_SERIAL _VECTOR(35) /* TWS_INT */ - -#define _VECTORS_SIZE 144 - -/* Bit numbers (SFRs alphabetically sorted) */ - -/* ASSR */ -#define AS2 3 -#define TCN2UB 2 -#define OCR2UB 1 -#define TCR2UB 0 - -/* DDRD */ -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -/* DDRE */ -#define DDE7 7 -#define DDE6 6 -#define DDE5 5 -#define DDE4 4 -#define DDE3 3 -#define DDE2 2 -#define DDE1 1 -#define DDE0 0 - -/* EIMF */ -#define INTF3 7 -#define INTF2 6 -#define INTF1 5 -#define INTF0 4 -#define INT3 3 -#define INT2 2 -#define INT1 1 -#define INT0 0 - -/* FISCR */ -#define FIADR 7 -#define XFIS1 1 -#define XFIS0 0 - -/* FISUA */ -#define FIF3 7 -#define FIF2 6 -#define FIF1 5 -#define FIF0 4 -#define FINT3 3 -#define FINT2 2 -#define FINT1 1 -#define FINT0 0 - -/* FISUB */ -#define FIF7 7 -#define FIF6 6 -#define FIF5 5 -#define FIF4 4 -#define FINT7 3 -#define FINT6 2 -#define FINT5 1 -#define FINT4 0 - -/* FISUC */ -#define FIF11 7 -#define FIF10 6 -#define FIF9 5 -#define FIF8 4 -#define FINT11 3 -#define FINT10 2 -#define FINT9 1 -#define FINT8 0 - -/* FISUD */ -#define FIF15 7 -#define FIF14 6 -#define FIF13 5 -#define FIF12 4 -#define FINT15 3 -#define FINT14 2 -#define FINT13 1 -#define FINT12 0 - -/* MCUR */ -#define JTRF 7 -#define JTD 6 -#define SE 5 -#define SM1 4 -#define SM0 3 -#define PORF 2 -#define WDRF 1 -#define EXTRF 0 - -/* OCDR (reserved) */ -#define IDRD 7 - -/* PIND */ -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -/* PINE */ -#define PINE7 7 -#define PINE6 6 -#define PINE5 5 -#define PINE4 4 -#define PINE3 3 -#define PINE2 2 -#define PINE1 1 -#define PINE0 0 - -/* PORTD */ -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -/* PORTE */ -/* - PE7 = IC1 / INT3 (alternate) - PE6 = OC1A / INT2 (alternate) - PE5 = OC1B / INT1 (alternate) - PE4 = ET11 / INT0 (alternate) - PE3 = OC2 / RX1 (alternate) - PE2 = / TX1 (alternate) - PE1 = OC0 / RX0 (alternate) - PE0 = ET0 / TX0 (alternate) - */ -#define PE7 7 -#define PE6 6 -#define PE5 5 -#define PE4 4 -#define PE3 3 -#define PE2 2 -#define PE1 1 -#define PE0 0 - -/* SFIOR */ -#define PSR2 1 -#define PSR10 0 - -/* SFTCR */ -#define FMXOR 3 -#define WDTS 2 -#define DBG 1 -#define SRST 0 - -/* TCCR0 */ -#define FOC0 7 -#define PWM0 6 -#define COM01 5 -#define COM00 4 -#define CTC0 3 -#define CS02 2 -#define CS01 1 -#define CS00 0 - -/* TCCR1A */ -#define COM1A1 7 -#define COM1A0 6 -#define COM1B1 5 -#define COM1B0 4 -#define FOC1A 3 -#define FOC1B 2 -#define PWM11 1 -#define PWM10 0 - -/* TCCR1B */ -#define ICNC1 7 -#define ICES1 6 -#define ICPE 5 -#define CTC1 3 -#define CS12 2 -#define CS11 1 -#define CS10 0 - -/* TCCR2 */ -#define FOC2 7 -#define PWM2 6 -#define COM21 5 -#define COM20 4 -#define CTC2 3 -#define CS22 2 -#define CS21 1 -#define CS20 0 - -/* TIFR */ -#define TOV1 7 -#define OCF1A 6 -#define OCF1B 5 -#define TOV2 4 -#define ICF1 3 -#define OCF2 2 -#define TOV0 1 -#define OCF0 0 - -/* TIMSK */ -#define TOIE1 7 -#define OCIE1A 6 -#define OCIE1B 5 -#define TOIE2 4 -#define TICIE1 3 -#define OCIE2 2 -#define TOIE0 1 -#define OCIE0 0 - -/* TWAR */ -/* #define TWA 1 */ /* TWA is bits 7:1 */ -#define TWGCE 0 - -/* TWCR */ -#define TWINT 7 -#define TWEA 6 -#define TWSTA 5 -#define TWSTO 4 -#define TWWC 3 -#define TWEN 2 -#define TWIE 0 - -/* TWSR */ -#define TWS7 7 -#define TWS6 6 -#define TWS5 5 -#define TWS4 4 -#define TWS3 3 - -/* UBRRHI - Bits 11..8 of UART1 are bits 7..4 of UBRRHI. - Bits 11..8 of UART0 are bits 3..0 of UBRRHI. */ -/* #define UBRRHI1 4 */ -/* #define UBRRHI0 0 */ - -/* UCSR0A */ -#define RXC0 7 -#define TXC0 6 -#define UDRE0 5 -#define FE0 4 -#define OR0 3 -#define U2X0 1 -#define MPCM0 0 - -/* UCSR0B */ -#define RXCIE0 7 -#define TXCIE0 6 -#define UDRIE0 5 -#define RXEN0 4 -#define TXEN0 3 -#define CHR90 2 -#define RXB80 1 -#define TXB80 0 - -/* UCSR1A */ -#define RXC1 7 -#define TXC1 6 -#define UDRE1 5 -#define FE1 4 -#define OR1 3 -#define U2X1 1 -#define MPCM1 0 - -/* UCSR1B */ -#define RXCIE1 7 -#define TXCIE1 6 -#define UDRIE1 5 -#define RXEN1 4 -#define TXEN1 3 -#define CHR91 2 -#define RXB81 1 -#define TXB81 0 - -/* WDTCR */ -#define WDTOE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -/* - Last memory addresses - depending on configuration, it is possible - to have 20K-32K of program memory and 4K-16K of data memory - (all in the same 36K total of SRAM, loaded from external EEPROM). - */ - -#ifndef RAMEND -#define RAMEND 0x0FFF -#endif - -#ifndef XRAMEND -#define XRAMEND RAMEND -#endif - -#define E2END 0 - -#ifndef FLASHEND -#define FLASHEND 0x7FFF -#endif - -#endif /* _AVR_IOAT94K_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iocan128.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iocan128.h deleted file mode 100644 index 2f21482cc..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iocan128.h +++ /dev/null @@ -1,94 +0,0 @@ -/* Copyright (c) 2004,2005, Colin O'Flynn - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iocan128.h,v 1.17.2.5 2008/10/17 23:27:46 arcanum Exp $ */ - -/* iocan128.h - definitions for CAN128 */ - -#ifndef _AVR_IOCAN128_H_ -#define _AVR_IOCAN128_H_ 1 - -#include - -/* Constants */ -#define SPM_PAGESIZE 256 -#define RAMEND 0x10FF /* Last On-Chip SRAM Location */ -#define XRAMEND 0xFFFF -#define E2END 0x0FFF -#define E2PAGESIZE 8 -#define FLASHEND 0x1FFFF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_JTAGEN (unsigned char)~_BV(6) -#define FUSE_OCDEN (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_SPIEN & FUSE_JTAGEN) - -/* Extended Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(2) -#define FUSE_BODLEVEL2 (unsigned char)~_BV(3) -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x97 -#define SIGNATURE_2 0x81 - - -#endif /* _AVR_IOCAN128_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iocan32.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iocan32.h deleted file mode 100644 index 5c8092cfb..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iocan32.h +++ /dev/null @@ -1,94 +0,0 @@ -/* Copyright (c) 2004,2005, Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iocan32.h,v 1.2.2.5 2008/10/17 23:27:46 arcanum Exp $ */ - -/* iocan32.h - definitions for CAN32 */ - -#ifndef _AVR_IOCAN32_H_ -#define _AVR_IOCAN32_H_ 1 - -#include - -/* Constants */ -#define SPM_PAGESIZE 256 -#define RAMEND 0x08FF /* Last On-Chip SRAM Location */ -#define XRAMEND 0xFFFF -#define E2END 0x03FF -#define E2PAGESIZE 8 -#define FLASHEND 0x7FFF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_JTAGEN (unsigned char)~_BV(6) -#define FUSE_OCDEN (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_SPIEN & FUSE_JTAGEN) - -/* Extended Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(2) -#define FUSE_BODLEVEL2 (unsigned char)~_BV(3) -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x95 -#define SIGNATURE_2 0x81 - - -#endif /* _AVR_IOCAN32_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iocan64.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iocan64.h deleted file mode 100644 index 78a0b244d..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iocan64.h +++ /dev/null @@ -1,94 +0,0 @@ -/* Copyright (c) 2004,2005, Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iocan64.h,v 1.2.2.5 2008/10/17 23:27:46 arcanum Exp $ */ - -/* iocan64.h - definitions for CAN64 */ - -#ifndef _AVR_IOCAN64_H_ -#define _AVR_IOCAN64_H_ 1 - -#include - -/* Constants */ -#define SPM_PAGESIZE 256 -#define RAMEND 0x10FF /* Last On-Chip SRAM Location */ -#define XRAMEND 0xFFFF -#define E2END 0x07FF -#define E2PAGESIZE 8 -#define FLASHEND 0xFFFF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_JTAGEN (unsigned char)~_BV(6) -#define FUSE_OCDEN (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_SPIEN & FUSE_JTAGEN) - -/* Extended Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(2) -#define FUSE_BODLEVEL2 (unsigned char)~_BV(3) -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x96 -#define SIGNATURE_2 0x81 - - -#endif /* _AVR_IOCAN64_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iocanxx.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iocanxx.h deleted file mode 100644 index 97404c06d..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iocanxx.h +++ /dev/null @@ -1,1978 +0,0 @@ -/* Copyright (c) 2004,2005,2006 Colin O'Flynn - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iocanxx.h,v 1.7 2007/10/25 20:33:23 aesok Exp $ */ - -/* This file is based largely on: - - iom128.h by Peter Jansen (bit defines) - - iom169.h by Juergen Schilling - (register addresses) - - AT90CAN128 Datasheet (bit defines and register addresses) - - Appnote on Mega128 --> AT90Can128 Conversion (for what registers I need - to change) */ - -/* iocanxx.h - definitions for AT90CAN32, AT90CAN64 and AT90CAN128 */ - -#ifndef _AVR_IOCANXX_H_ -#define _AVR_IOCANXX_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iocanxx.h" -#else -# error "Attempt to include more than one file." -#endif - -/* I/O registers and bit definitions. */ - -/* RegDef: Port A */ -#define PINA _SFR_IO8(0x00) -#define DDRA _SFR_IO8(0x01) -#define PORTA _SFR_IO8(0x02) - -/* RegDef: Port B */ -#define PINB _SFR_IO8(0x03) -#define DDRB _SFR_IO8(0x04) -#define PORTB _SFR_IO8(0x05) - -/* RegDef: Port C */ -#define PINC _SFR_IO8(0x06) -#define DDRC _SFR_IO8(0x07) -#define PORTC _SFR_IO8(0x08) - -/* RegDef: Port D */ -#define PIND _SFR_IO8(0x09) -#define DDRD _SFR_IO8(0x0A) -#define PORTD _SFR_IO8(0x0B) - -/* RegDef: Port E */ -#define PINE _SFR_IO8(0x0C) -#define DDRE _SFR_IO8(0x0D) -#define PORTE _SFR_IO8(0x0E) - -/* RegDef: Port F */ -#define PINF _SFR_IO8(0x0F) -#define DDRF _SFR_IO8(0x10) -#define PORTF _SFR_IO8(0x11) - -/* RegDef: Port G */ -#define PING _SFR_IO8(0x12) -#define DDRG _SFR_IO8(0x13) -#define PORTG _SFR_IO8(0x14) - -/* RegDef: Timer/Counter 0 interrupt Flag Register */ -#define TIFR0 _SFR_IO8(0x15) - -/* RegDef: Timer/Counter 1 interrupt Flag Register */ -#define TIFR1 _SFR_IO8(0x16) - -/* RegDef: Timer/Counter 2 interrupt Flag Register */ -#define TIFR2 _SFR_IO8(0x17) - -/* RegDef: Timer/Counter 3 interrupt Flag Register */ -#define TIFR3 _SFR_IO8(0x18) - -/* RegDef: External Interrupt Flag Register */ -#define EIFR _SFR_IO8(0x1C) - -/* RegDef: External Interrupt Mask Register */ -#define EIMSK _SFR_IO8(0x1D) - -/* RegDef: General Purpose I/O Register 0 */ -#define GPIOR0 _SFR_IO8(0x1E) - -/* RegDef: EEPROM Control Register */ -#define EECR _SFR_IO8(0x1F) - -/* RegDef: EEPROM Data Register */ -#define EEDR _SFR_IO8(0x20) - -/* RegDef: EEPROM Address Register */ -#define EEAR _SFR_IO16(0x21) -#define EEARL _SFR_IO8(0x21) -#define EEARH _SFR_IO8(0x22) - -/* 6-char sequence denoting where to find the EEPROM registers in memory space. - Adresses denoted in hex syntax with uppercase letters. Used by the EEPROM - subroutines. - First two letters: EECR address. - Second two letters: EEDR address. - Last two letters: EEAR address. */ -#define __EEPROM_REG_LOCATIONS__ 1F2021 - -/* RegDef: General Timer/Counter Control Register */ -#define GTCCR _SFR_IO8(0x23) - -/* RegDef: Timer/Counter Control Register A */ -#define TCCR0A _SFR_IO8(0x24) - -/* RegDef: Timer/Counter Register */ -#define TCNT0 _SFR_IO8(0x26) - -/* RegDef: Output Compare Register A */ -#define OCR0A _SFR_IO8(0x27) - -/* RegDef: General Purpose I/O Register 1 */ -#define GPIOR1 _SFR_IO8(0x2A) - -/* RegDef: General Purpose I/O Register 2 */ -#define GPIOR2 _SFR_IO8(0x2B) - -/* RegDef: SPI Control Register */ -#define SPCR _SFR_IO8(0x2C) - -/* RegDef: SPI Status Register */ -#define SPSR _SFR_IO8(0x2D) - -/* RegDef: SPI Data Register */ -#define SPDR _SFR_IO8(0x2E) - -/* RegDef: Analog Comperator Control and Status Register */ -#define ACSR _SFR_IO8(0x30) - -/* RegDef: On-chip Debug Register */ -#define OCDR _SFR_IO8(0x31) - -/* RegDef: Sleep Mode Control Register */ -#define SMCR _SFR_IO8(0x33) - -/* RegDef: MCU Status Register */ -#define MCUSR _SFR_IO8(0x34) - -/* RegDef: MCU Control Rgeister */ -#define MCUCR _SFR_IO8(0x35) - -/* RegDef: Store Program Memory Control and Status Register */ -#define SPMCSR _SFR_IO8(0x37) - -/* RegDef: RAMPZ register. */ -#define RAMPZ _SFR_IO8(0x3B) - -/* RegDef: Watchdog Timer Control Register */ -#define WDTCR _SFR_MEM8(0x60) - -/* RegDef: Clock Prescale Register */ -#define CLKPR _SFR_MEM8(0x61) - -/* RegDef: Oscillator Calibration Register */ -#define OSCCAL _SFR_MEM8(0x66) - -/* RegDef: External Interrupt Control Register A */ -#define EICRA _SFR_MEM8(0x69) - -/* RegDef: External Interrupt Control Register B */ -#define EICRB _SFR_MEM8(0x6A) - -/* RegDef: Timer/Counter 0 Interrupt Mask Register */ -#define TIMSK0 _SFR_MEM8(0x6E) - -/* RegDef: Timer/Counter 1 Interrupt Mask Register */ -#define TIMSK1 _SFR_MEM8(0x6F) - -/* RegDef: Timer/Counter 2 Interrupt Mask Register */ -#define TIMSK2 _SFR_MEM8(0x70) - -/* RegDef: Timer/Counter 3 Interrupt Mask Register */ -#define TIMSK3 _SFR_MEM8(0x71) - -/* RegDef: External Memory Control Register A */ -#define XMCRA _SFR_MEM8(0x74) - -/* RegDef: External Memory Control Register A */ -#define XMCRB _SFR_MEM8(0x75) - -/* RegDef: ADC Data Register */ -#ifndef __ASSEMBLER__ -#define ADC _SFR_MEM16(0x78) -#endif -#define ADCW _SFR_MEM16(0x78) -#define ADCL _SFR_MEM8(0x78) -#define ADCH _SFR_MEM8(0x79) - -/* RegDef: ADC Control and Status Register A */ -#define ADCSRA _SFR_MEM8(0x7A) - -/* RegDef: ADC Control and Status Register B */ -#define ADCSRB _SFR_MEM8(0x7B) - -/* RegDef: ADC Multiplex Selection Register */ -#define ADMUX _SFR_MEM8(0x7C) - -/* RegDef: Digital Input Disable Register 0 */ -#define DIDR0 _SFR_MEM8(0x7E) - -/* RegDef: Digital Input Disable Register 1 */ -#define DIDR1 _SFR_MEM8(0x7F) - -/* RegDef: Timer/Counter1 Control Register A */ -#define TCCR1A _SFR_MEM8(0x80) - -/* RegDef: Timer/Counter1 Control Register B */ -#define TCCR1B _SFR_MEM8(0x81) - -/* RegDef: Timer/Counter1 Control Register C */ -#define TCCR1C _SFR_MEM8(0x82) - -/* RegDef: Timer/Counter1 Register */ -#define TCNT1 _SFR_MEM16(0x84) -#define TCNT1L _SFR_MEM8(0x84) -#define TCNT1H _SFR_MEM8(0x85) - -/* RegDef: Timer/Counter1 Input Capture Register */ -#define ICR1 _SFR_MEM16(0x86) -#define ICR1L _SFR_MEM8(0x86) -#define ICR1H _SFR_MEM8(0x87) - -/* RegDef: Timer/Counter1 Output Compare Register A */ -#define OCR1A _SFR_MEM16(0x88) -#define OCR1AL _SFR_MEM8(0x88) -#define OCR1AH _SFR_MEM8(0x89) - -/* RegDef: Timer/Counter1 Output Compare Register B */ -#define OCR1B _SFR_MEM16(0x8A) -#define OCR1BL _SFR_MEM8(0x8A) -#define OCR1BH _SFR_MEM8(0x8B) - -/* RegDef: Timer/Counter1 Output Compare Register C */ -#define OCR1C _SFR_MEM16(0x8C) -#define OCR1CL _SFR_MEM8(0x8C) -#define OCR1CH _SFR_MEM8(0x8D) - -/* RegDef: Timer/Counter3 Control Register A */ -#define TCCR3A _SFR_MEM8(0x90) - -/* RegDef: Timer/Counter3 Control Register B */ -#define TCCR3B _SFR_MEM8(0x91) - -/* RegDef: Timer/Counter3 Control Register C */ -#define TCCR3C _SFR_MEM8(0x92) - -/* RegDef: Timer/Counter3 Register */ -#define TCNT3 _SFR_MEM16(0x94) -#define TCNT3L _SFR_MEM8(0x94) -#define TCNT3H _SFR_MEM8(0x95) - -/* RegDef: Timer/Counter3 Input Capture Register */ -#define ICR3 _SFR_MEM16(0x96) -#define ICR3L _SFR_MEM8(0x96) -#define ICR3H _SFR_MEM8(0x97) - -/* RegDef: Timer/Counter3 Output Compare Register A */ -#define OCR3A _SFR_MEM16(0x98) -#define OCR3AL _SFR_MEM8(0x98) -#define OCR3AH _SFR_MEM8(0x99) - -/* RegDef: Timer/Counter3 Output Compare Register B */ -#define OCR3B _SFR_MEM16(0x9A) -#define OCR3BL _SFR_MEM8(0x9A) -#define OCR3BH _SFR_MEM8(0x9B) - -/* RegDef: Timer/Counter3 Output Compare Register C */ -#define OCR3C _SFR_MEM16(0x9C) -#define OCR3CL _SFR_MEM8(0x9C) -#define OCR3CH _SFR_MEM8(0x9D) - -/* RegDef: Timer/Counter2 Control Register A */ -#define TCCR2A _SFR_MEM8(0xB0) - -/* RegDef: Timer/Counter2 Register */ -#define TCNT2 _SFR_MEM8(0xB2) - -/* RegDef: Timer/Counter2 Output Compare Register */ -#define OCR2A _SFR_MEM8(0xB3) - -/* RegDef: Asynchronous Status Register */ -#define ASSR _SFR_MEM8(0xB6) - -/* RegDef: TWI Bit Rate Register */ -#define TWBR _SFR_MEM8(0xB8) - -/* RegDef: TWI Status Register */ -#define TWSR _SFR_MEM8(0xB9) - -/* RegDef: TWI (Slave) Address Register */ -#define TWAR _SFR_MEM8(0xBA) - -/* RegDef: TWI Data Register */ -#define TWDR _SFR_MEM8(0xBB) - -/* RegDef: TWI Control Register */ -#define TWCR _SFR_MEM8(0xBC) - -/* RegDef: USART0 Control and Status Register A */ -#define UCSR0A _SFR_MEM8(0xC0) - -/* RegDef: USART0 Control and Status Register B */ -#define UCSR0B _SFR_MEM8(0xC1) - -/* RegDef: USART0 Control and Status Register C */ -#define UCSR0C _SFR_MEM8(0xC2) - -/* RegDef: USART0 Baud Rate Register */ -#define UBRR0 _SFR_MEM16(0xC4) -#define UBRR0L _SFR_MEM8(0xC4) -#define UBRR0H _SFR_MEM8(0xC5) - -/* RegDef: USART0 I/O Data Register */ -#define UDR0 _SFR_MEM8(0xC6) - -/* RegDef: USART1 Control and Status Register A */ -#define UCSR1A _SFR_MEM8(0xC8) - -/* RegDef: USART1 Control and Status Register B */ -#define UCSR1B _SFR_MEM8(0xC9) - -/* RegDef: USART1 Control and Status Register C */ -#define UCSR1C _SFR_MEM8(0xCA) - -/* RegDef: USART1 Baud Rate Register */ -#define UBRR1 _SFR_MEM16(0xCC) -#define UBRR1L _SFR_MEM8(0xCC) -#define UBRR1H _SFR_MEM8(0xCD) - -/* RegDef: USART1 I/O Data Register */ -#define UDR1 _SFR_MEM8(0xCE) - -/* RegDef: CAN General Control Register*/ -#define CANGCON _SFR_MEM8(0xD8) - -/* RegDef: CAN General Status Register*/ -#define CANGSTA _SFR_MEM8(0xD9) - -/* RegDef: CAN General Interrupt Register*/ -#define CANGIT _SFR_MEM8(0xDA) - -/* RegDef: CAN General Interrupt Enable Register*/ -#define CANGIE _SFR_MEM8(0xDB) - -/* RegDef: CAN Enable MOb Register*/ -#define CANEN2 _SFR_MEM8(0xDC) - -/* RegDef: CAN Enable MOb Register*/ -#define CANEN1 _SFR_MEM8(0xDD) - -/* RegDef: CAN Enable Interrupt MOb Register*/ -#define CANIE2 _SFR_MEM8(0xDE) - -/* RegDef: CAN Enable Interrupt MOb Register*/ -#define CANIE1 _SFR_MEM8(0xDF) - -/* RegDef: CAN Status Interrupt MOb Register*/ -/* - * WARNING: Do not apply the SIT8...SIT14 constants to bits in the CANSIT - * register. - */ -#define CANSIT _SFR_MEM16(0xE0) -#define CANSIT2 _SFR_MEM8(0xE0) -#define CANSIT1 _SFR_MEM8(0xE1) - -/* RegDef: CAN Bit Timing Register 1*/ -#define CANBT1 _SFR_MEM8(0xE2) - -/* RegDef: CAN Bit Timing Register 2*/ -#define CANBT2 _SFR_MEM8(0xE3) - -/* RegDef: CAN Bit Timing Register 3*/ -#define CANBT3 _SFR_MEM8(0xE4) - -/* RegDef: CAN Timer Control Register*/ -#define CANTCON _SFR_MEM8(0xE5) - -/* RegDef: CAN Timer Register*/ -#define CANTIM _SFR_MEM16(0xE6) -#define CANTIML _SFR_MEM8(0xE6) -#define CANTIMH _SFR_MEM8(0xE7) - -/* RegDef: CAN TTC Timer Register*/ -#define CANTTC _SFR_MEM16(0xE8) -#define CANTTCL _SFR_MEM8(0xE8) -#define CANTTCH _SFR_MEM8(0xE9) - -/* RegDef: CAN Transmitt Error Counter Register*/ -#define CANTEC _SFR_MEM8(0xEA) - -/* RegDef: CAN Receive Error Counter Register*/ -#define CANREC _SFR_MEM8(0xEB) - -/* RegDef: CAN Highest Priority MOb Register*/ -#define CANHPMOB _SFR_MEM8(0xEC) - -/* RegDef: CAN Page MOb Register*/ -#define CANPAGE _SFR_MEM8(0xED) - -/* RegDef: CAN MOb Status Register*/ -#define CANSTMOB _SFR_MEM8(0xEE) - -/* RegDef: CAN MOb Control and DLC Register*/ -#define CANCDMOB _SFR_MEM8(0xEF) - -/* RegDef: CAN Identifier Tag Registers*/ -#define CANIDT _SFR_MEM32(0xF0) - -#define CANIDT4 _SFR_MEM8(0xF0) -#define CANIDT3 _SFR_MEM8(0xF1) -#define CANIDT2 _SFR_MEM8(0xF2) -#define CANIDT1 _SFR_MEM8(0xF3) - -/* RegDef: CAN Identifier Mask Registers */ -#define CANIDM _SFR_MEM32(0xF4) - -#define CANIDM4 _SFR_MEM8(0xF4) -#define CANIDM3 _SFR_MEM8(0xF5) -#define CANIDM2 _SFR_MEM8(0xF6) -#define CANIDM1 _SFR_MEM8(0xF7) - -/* RegDef: CAN TTC Timer Register*/ -#define CANSTM _SFR_MEM16(0xF8) -#define CANSTML _SFR_MEM8(0xF8) -#define CANSTMH _SFR_MEM8(0xF9) - -/* RegDef: CAN Message Register*/ -#define CANMSG _SFR_MEM8(0xFA) - -/* Interrupt vectors */ - -/* External Interrupt Request 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* External Interrupt Request 1 */ -#define INT1_vect _VECTOR(2) -#define SIG_INTERRUPT1 _VECTOR(2) - -/* External Interrupt Request 2 */ -#define INT2_vect _VECTOR(3) -#define SIG_INTERRUPT2 _VECTOR(3) - -/* External Interrupt Request 3 */ -#define INT3_vect _VECTOR(4) -#define SIG_INTERRUPT3 _VECTOR(4) - -/* External Interrupt Request 4 */ -#define INT4_vect _VECTOR(5) -#define SIG_INTERRUPT4 _VECTOR(5) - -/* External Interrupt Request 5 */ -#define INT5_vect _VECTOR(6) -#define SIG_INTERRUPT5 _VECTOR(6) - -/* External Interrupt Request 6 */ -#define INT6_vect _VECTOR(7) -#define SIG_INTERRUPT6 _VECTOR(7) - -/* External Interrupt Request 7 */ -#define INT7_vect _VECTOR(8) -#define SIG_INTERRUPT7 _VECTOR(8) - -/* Timer/Counter2 Compare Match */ -#define TIMER2_COMP_vect _VECTOR(9) -#define SIG_OUTPUT_COMPARE2 _VECTOR(9) - -/* Timer/Counter2 Overflow */ -#define TIMER2_OVF_vect _VECTOR(10) -#define SIG_OVERFLOW2 _VECTOR(10) - -/* Timer/Counter1 Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(11) -#define SIG_INPUT_CAPTURE1 _VECTOR(11) - -/* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPA_vect _VECTOR(12) -#define SIG_OUTPUT_COMPARE1A _VECTOR(12) - -/* Timer/Counter Compare Match B */ -#define TIMER1_COMPB_vect _VECTOR(13) -#define SIG_OUTPUT_COMPARE1B _VECTOR(13) - -/* Timer/Counter1 Compare Match C */ -#define TIMER1_COMPC_vect _VECTOR(14) -#define SIG_OUTPUT_COMPARE1C _VECTOR(14) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(15) -#define SIG_OVERFLOW1 _VECTOR(15) - -/* Timer/Counter0 Compare Match */ -#define TIMER0_COMP_vect _VECTOR(16) -#define SIG_OUTPUT_COMPARE0 _VECTOR(16) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(17) -#define SIG_OVERFLOW0 _VECTOR(17) - -/* CAN Transfer Complete or Error */ -#define CANIT_vect _VECTOR(18) -#define SIG_CAN_INTERRUPT1 _VECTOR(18) - -/* CAN Timer Overrun */ -#define OVRIT_vect _VECTOR(19) -#define SIG_CAN_OVERFLOW1 _VECTOR(19) - -/* SPI Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(20) -#define SIG_SPI _VECTOR(20) - -/* USART0, Rx Complete */ -#define USART0_RX_vect _VECTOR(21) -#define SIG_UART0_RECV _VECTOR(21) -#define SIG_USART0_RECV _VECTOR(21) - -/* USART0 Data Register Empty */ -#define USART0_UDRE_vect _VECTOR(22) -#define SIG_UART0_DATA _VECTOR(22) -#define SIG_USART0_DATA _VECTOR(22) - -/* USART0, Tx Complete */ -#define USART0_TX_vect _VECTOR(23) -#define SIG_UART0_TRANS _VECTOR(23) -#define SIG_USART0_TRANS _VECTOR(23) - -/* Analog Comparator */ -#define ANALOG_COMP_vect _VECTOR(24) -#define SIG_COMPARATOR _VECTOR(24) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(25) -#define SIG_ADC _VECTOR(25) - -/* EEPROM Ready */ -#define EE_READY_vect _VECTOR(26) -#define SIG_EEPROM_READY _VECTOR(26) - -/* Timer/Counter3 Capture Event */ -#define TIMER3_CAPT_vect _VECTOR(27) -#define SIG_INPUT_CAPTURE3 _VECTOR(27) - -/* Timer/Counter3 Compare Match A */ -#define TIMER3_COMPA_vect _VECTOR(28) -#define SIG_OUTPUT_COMPARE3A _VECTOR(28) - -/* Timer/Counter3 Compare Match B */ -#define TIMER3_COMPB_vect _VECTOR(29) -#define SIG_OUTPUT_COMPARE3B _VECTOR(29) - -/* Timer/Counter3 Compare Match C */ -#define TIMER3_COMPC_vect _VECTOR(30) -#define SIG_OUTPUT_COMPARE3C _VECTOR(30) - -/* Timer/Counter3 Overflow */ -#define TIMER3_OVF_vect _VECTOR(31) -#define SIG_OVERFLOW3 _VECTOR(31) - -/* USART1, Rx Complete */ -#define USART1_RX_vect _VECTOR(32) -#define SIG_UART1_RECV _VECTOR(32) -#define SIG_USART1_RECV _VECTOR(32) - -/* USART1, Data Register Empty */ -#define USART1_UDRE_vect _VECTOR(33) -#define SIG_UART1_DATA _VECTOR(33) -#define SIG_USART1_DATA _VECTOR(33) - -/* USART1, Tx Complete */ -#define USART1_TX_vect _VECTOR(34) -#define SIG_UART1_TRANS _VECTOR(34) -#define SIG_USART1_TRANS _VECTOR(34) - -/* 2-wire Serial Interface */ -#define TWI_vect _VECTOR(35) -#define SIG_2WIRE_SERIAL _VECTOR(35) - -/* Store Program Memory Read */ -#define SPM_READY_vect _VECTOR(36) -#define SIG_SPM_READY _VECTOR(36) - -#define _VECTORS_SIZE 148 - -/* The Register Bit names are represented by their bit number (0-7). */ - -/* Register Bits [ASSR] */ -/* Asynchronous Status Register */ -#define EXCLK 4 -#define AS2 3 -#define TCN2UB 2 -#define OCR2UB 1 -#define TCR2UB 0 -/* End Register Bits */ - -/* Register Bits [TWCR] */ -/* 2-wire Control Register - TWCR */ -#define TWINT 7 -#define TWEA 6 -#define TWSTA 5 -#define TWSTO 4 -#define TWWC 3 -#define TWEN 2 -#define TWIE 0 -/* End Register Bits */ - -/* Register Bits [TWAR] */ -/* 2-wire Address Register - TWAR */ -#define TWA6 7 -#define TWA5 6 -#define TWA4 5 -#define TWA3 4 -#define TWA2 3 -#define TWA1 2 -#define TWA0 1 -#define TWGCE 0 -/* End Register Bits */ - -/* Register Bits [TWSR] */ -/* 2-wire Status Register - TWSR */ -#define TWS7 7 -#define TWS6 6 -#define TWS5 5 -#define TWS4 4 -#define TWS3 3 -#define TWPS1 1 -#define TWPS0 0 -/* End Register Bits */ - -/* Register Bits [XMCRB] */ -/* External Memory Control Register B - XMCRB */ -#define XMBK 7 -#define XMM2 2 -#define XMM1 1 -#define XMM0 0 -/* End Register Bits */ - -/* Register Bits [XMCRA] */ -/* External Memory Control Register A - XMCRA */ -#define SRE 7 -#define SRL2 6 -#define SRL1 5 -#define SRL0 4 -#define SRW11 3 -#define SRW10 2 -#define SRW01 1 -#define SRW00 0 -/* End Register Bits */ - -/* Register Bits [RAMPZ] */ -/* RAM Page Z select register - RAMPZ */ -#define RAMPZ0 0 -/* End Register Bits */ - -/* Register Bits [EICRA] */ -/* External Interrupt Control Register A - EICRA */ -#define ISC31 7 -#define ISC30 6 -#define ISC21 5 -#define ISC20 4 -#define ISC11 3 -#define ISC10 2 -#define ISC01 1 -#define ISC00 0 -/* End Register Bits */ - -/* Register Bits [EICRB] */ -/* External Interrupt Control Register B - EICRB */ -#define ISC71 7 -#define ISC70 6 -#define ISC61 5 -#define ISC60 4 -#define ISC51 3 -#define ISC50 2 -#define ISC41 1 -#define ISC40 0 -/* End Register Bits */ - -/* Register Bits [SPMCSR] */ -/* Store Program Memory Control Register - SPMCSR, SPMCR */ -#define SPMIE 7 -#define RWWSB 6 -#define RWWSRE 4 -#define BLBSET 3 -#define PGWRT 2 -#define PGERS 1 -#define SPMEN 0 -/* End Register Bits */ - -/* Register Bits [EIMSK] */ -/* External Interrupt MaSK register - EIMSK */ -#define INT7 7 -#define INT6 6 -#define INT5 5 -#define INT4 4 -#define INT3 3 -#define INT2 2 -#define INT1 1 -#define INT0 0 -/* End Register Bits */ - -/* Register Bits [EIFR] */ -/* External Interrupt Flag Register - EIFR */ -#define INTF7 7 -#define INTF6 6 -#define INTF5 5 -#define INTF4 4 -#define INTF3 3 -#define INTF2 2 -#define INTF1 1 -#define INTF0 0 -/* End Register Bits */ - -/* Register Bits [TCCR2] */ -/* Timer/Counter 2 Control Register - TCCR2 */ -#define FOC2A 7 -#define WGM20 6 -#define COM2A1 5 -#define COM2A0 4 -#define WGM21 3 -#define CS22 2 -#define CS21 1 -#define CS20 0 -/* End Register Bits */ - -/* Register Bits [TCCR1A] */ -/* Timer/Counter 1 Control and Status Register A - TCCR1A */ -#define COM1A1 7 -#define COM1A0 6 -#define COM1B1 5 -#define COM1B0 4 -#define COM1C1 3 -#define COM1C0 2 -#define WGM11 1 -#define WGM10 0 -/* End Register Bits */ - -/* Register Bits [TCCR3A] */ -/* Timer/Counter 3 Control and Status Register A - TCCR3A */ -#define COM3A1 7 -#define COM3A0 6 -#define COM3B1 5 -#define COM3B0 4 -#define COM3C1 3 -#define COM3C0 2 -#define WGM31 1 -#define WGM30 0 -/* End Register Bits */ - -/* Register Bits [TCCR1B] */ -/* Timer/Counter 1 Control and Status Register B - TCCR1B */ -#define ICNC1 7 -#define ICES1 6 -#define WGM13 4 -#define WGM12 3 -#define CS12 2 -#define CS11 1 -#define CS10 0 -/* End Register Bits */ - -/* Register Bits [TCCR3B] */ -/* Timer/Counter 3 Control and Status Register B - TCCR3B */ -#define ICNC3 7 -#define ICES3 6 -#define WGM33 4 -#define WGM32 3 -#define CS32 2 -#define CS31 1 -#define CS30 0 -/* End Register Bits */ - -/* Register Bits [TCCR3C] */ -/* Timer/Counter 3 Control Register C - TCCR3C */ -#define FOC3A 7 -#define FOC3B 6 -#define FOC3C 5 -/* End Register Bits */ - -/* Register Bits [TCCR1C] */ -/* Timer/Counter 1 Control Register C - TCCR1C */ -#define FOC1A 7 -#define FOC1B 6 -#define FOC1C 5 -/* End Register Bits */ - -/* Register Bits [OCDR] */ -/* On-chip Debug Register - OCDR */ -#define IDRD 7 -#define OCDR7 7 -#define OCDR6 6 -#define OCDR5 5 -#define OCDR4 4 -#define OCDR3 3 -#define OCDR2 2 -#define OCDR1 1 -#define OCDR0 0 -/* End Register Bits */ - -/* Register Bits [WDTCR] */ -/* Watchdog Timer Control Register - WDTCR */ -#define WDCE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 -/* End Register Bits */ - -/* Register Bits [SPSR] */ -/* SPI Status Register - SPSR */ -#define SPIF 7 -#define WCOL 6 -#define SPI2X 0 -/* End Register Bits */ - -/* Register Bits [SPCR] */ -/* SPI Control Register - SPCR */ -#define SPIE 7 -#define SPE 6 -#define DORD 5 -#define MSTR 4 -#define CPOL 3 -#define CPHA 2 -#define SPR1 1 -#define SPR0 0 -/* End Register Bits */ - -/* Register Bits [UCSR1C] */ -/* USART1 Register C - UCSR1C */ -#define UMSEL1 6 -#define UPM11 5 -#define UPM10 4 -#define USBS1 3 -#define UCSZ11 2 -#define UCSZ10 1 -#define UCPOL1 0 -/* End Register Bits */ - -/* Register Bits [UCSR0C] */ -/* USART0 Register C - UCSR0C */ -#define UMSEL0 6 -#define UPM01 5 -#define UPM00 4 -#define USBS0 3 -#define UCSZ01 2 -#define UCSZ00 1 -#define UCPOL0 0 -/* End Register Bits */ - -/* Register Bits [UCSR1A] */ -/* USART1 Status Register A - UCSR1A */ -#define RXC1 7 -#define TXC1 6 -#define UDRE1 5 -#define FE1 4 -#define DOR1 3 -#define UPE1 2 -#define U2X1 1 -#define MPCM1 0 -/* End Register Bits */ - -/* Register Bits [UCSR0A] */ -/* USART0 Status Register A - UCSR0A */ -#define RXC0 7 -#define TXC0 6 -#define UDRE0 5 -#define FE0 4 -#define DOR0 3 -#define UPE0 2 -#define U2X0 1 -#define MPCM0 0 -/* End Register Bits */ - -/* Register Bits [UCSR1B] */ -/* USART1 Control Register B - UCSR1B */ -#define RXCIE1 7 -#define TXCIE1 6 -#define UDRIE1 5 -#define RXEN1 4 -#define TXEN1 3 -#define UCSZ12 2 -#define RXB81 1 -#define TXB81 0 -/* End Register Bits */ - -/* Register Bits [UCSR0B] */ -/* USART0 Control Register B - UCSR0B */ -#define RXCIE0 7 -#define TXCIE0 6 -#define UDRIE0 5 -#define RXEN0 4 -#define TXEN0 3 -#define UCSZ02 2 -#define RXB80 1 -#define TXB80 0 -/* End Register Bits */ - -/* Register Bits [ACSR] */ -/* Analog Comparator Control and Status Register - ACSR */ -#define ACD 7 -#define ACBG 6 -#define ACO 5 -#define ACI 4 -#define ACIE 3 -#define ACIC 2 -#define ACIS1 1 -#define ACIS0 0 -/* End Register Bits */ - -/* Register Bits [ADCSRA] */ -/* ADC Control and status register - ADCSRA */ -#define ADEN 7 -#define ADSC 6 -#define ADATE 5 -#define ADIF 4 -#define ADIE 3 -#define ADPS2 2 -#define ADPS1 1 -#define ADPS0 0 -/* End Register Bits */ - -/* - The ADHSM bit has been removed from all documentation, - as being not needed at all since the comparator has proven - to be fast enough even without feeding it more power. -*/ - -/* Register Bits [ADCSRB] */ -/* ADC Control and status register - ADCSRB */ -#define ACME 6 -#define ADTS2 2 -#define ADTS1 1 -#define ADTS0 0 -/* End Register Bits */ - -/* Register Bits [ADMUX] */ -/* ADC Multiplexer select - ADMUX */ -#define REFS1 7 -#define REFS0 6 -#define ADLAR 5 -#define MUX4 4 -#define MUX3 3 -#define MUX2 2 -#define MUX1 1 -#define MUX0 0 -/* End Register Bits */ - -/* Register Bits [DIDR0] */ -/* Digital Input Disable Register 0 */ -#define ADC7D 7 -#define ADC6D 6 -#define ADC5D 5 -#define ADC4D 4 -#define ADC3D 3 -#define ADC2D 2 -#define ADC1D 1 -#define ADC0D 0 -/* End Register Bits */ - -/* Register Bits [DIDR1] */ -/* Digital Input Disable Register 1 */ -#define AIN1D 1 -#define AIN0D 0 -/* End Register Bits */ - -/* Register Bits [PORTA] */ -/* Port A Data Register - PORTA */ -#define PA7 7 -#define PA6 6 -#define PA5 5 -#define PA4 4 -#define PA3 3 -#define PA2 2 -#define PA1 1 -#define PA0 0 -/* End Register Bits */ - -/* Register Bits [DDRA] */ -/* Port A Data Direction Register - DDRA */ -#define DDA7 7 -#define DDA6 6 -#define DDA5 5 -#define DDA4 4 -#define DDA3 3 -#define DDA2 2 -#define DDA1 1 -#define DDA0 0 -/* End Register Bits */ - -/* Register Bits [PINA] */ -/* Port A Input Pins - PINA */ -#define PINA7 7 -#define PINA6 6 -#define PINA5 5 -#define PINA4 4 -#define PINA3 3 -#define PINA2 2 -#define PINA1 1 -#define PINA0 0 -/* End Register Bits */ - -/* Register Bits [PORTB] */ -/* Port B Data Register - PORTB */ -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 -/* End Register Bits */ - -/* Register Bits [DDRB] */ -/* Port B Data Direction Register - DDRB */ -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 -/* End Register Bits */ - -/* Register Bits [PINB] */ -/* Port B Input Pins - PINB */ -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 -/* End Register Bits */ - -/* Register Bits [PORTC] */ -/* Port C Data Register - PORTC */ -#define PC7 7 -#define PC6 6 -#define PC5 5 -#define PC4 4 -#define PC3 3 -#define PC2 2 -#define PC1 1 -#define PC0 0 -/* End Register Bits */ - -/* Register Bits [DDRC] */ -/* Port C Data Direction Register - DDRC */ -#define DDC7 7 -#define DDC6 6 -#define DDC5 5 -#define DDC4 4 -#define DDC3 3 -#define DDC2 2 -#define DDC1 1 -#define DDC0 0 -/* End Register Bits */ - -/* Register Bits [PINC] */ -/* Port C Input Pins - PINC */ -#define PINC7 7 -#define PINC6 6 -#define PINC5 5 -#define PINC4 4 -#define PINC3 3 -#define PINC2 2 -#define PINC1 1 -#define PINC0 0 -/* End Register Bits */ - -/* Register Bits [PORTD] */ -/* Port D Data Register - PORTD */ -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 -/* End Register Bits */ - -/* Register Bits [DDRD] */ -/* Port D Data Direction Register - DDRD */ -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 -/* End Register Bits */ - -/* Register Bits [PIND] */ -/* Port D Input Pins - PIND */ -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 -/* End Register Bits */ - -/* Register Bits [PORTE] */ -/* Port E Data Register - PORTE */ -#define PE7 7 -#define PE6 6 -#define PE5 5 -#define PE4 4 -#define PE3 3 -#define PE2 2 -#define PE1 1 -#define PE0 0 -/* End Register Bits */ - -/* Register Bits [DDRE] */ -/* Port E Data Direction Register - DDRE */ -#define DDE7 7 -#define DDE6 6 -#define DDE5 5 -#define DDE4 4 -#define DDE3 3 -#define DDE2 2 -#define DDE1 1 -#define DDE0 0 -/* End Register Bits */ - -/* Register Bits [PINE] */ -/* Port E Input Pins - PINE */ -#define PINE7 7 -#define PINE6 6 -#define PINE5 5 -#define PINE4 4 -#define PINE3 3 -#define PINE2 2 -#define PINE1 1 -#define PINE0 0 -/* End Register Bits */ - -/* Register Bits [PORTF] */ -/* Port F Data Register - PORTF */ -#define PF7 7 -#define PF6 6 -#define PF5 5 -#define PF4 4 -#define PF3 3 -#define PF2 2 -#define PF1 1 -#define PF0 0 -/* End Register Bits */ - -/* Register Bits [DDRF] */ -/* Port F Data Direction Register - DDRF */ -#define DDF7 7 -#define DDF6 6 -#define DDF5 5 -#define DDF4 4 -#define DDF3 3 -#define DDF2 2 -#define DDF1 1 -#define DDF0 0 -/* End Register Bits */ - -/* Register Bits [PINF] */ -/* Port F Input Pins - PINF */ -#define PINF7 7 -#define PINF6 6 -#define PINF5 5 -#define PINF4 4 -#define PINF3 3 -#define PINF2 2 -#define PINF1 1 -#define PINF0 0 -/* End Register Bits */ - -/* Register Bits [PORTG] */ -/* Port G Data Register - PORTG */ -#define PG4 4 -#define PG3 3 -#define PG2 2 -#define PG1 1 -#define PG0 0 -/* End Register Bits */ - -/* Register Bits [DDRG] */ -/* Port G Data Direction Register - DDRG */ -#define DDG4 4 -#define DDG3 3 -#define DDG2 2 -#define DDG1 1 -#define DDG0 0 -/* End Register Bits */ - -/* Register Bits [PING] */ -/* Port G Input Pins - PING */ -#define PING4 4 -#define PING3 3 -#define PING2 2 -#define PING1 1 -#define PING0 0 -/* End Register Bits */ - - -/* Register Bits [TIFR0] */ -/* Timer/Counter 0 interrupt Flag Register */ -#define OCF0A 1 -#define TOV0 0 -/* End Register Bits */ - -/* Register Bits [TIFR1] */ -/* Timer/Counter 1 interrupt Flag Register */ -#define ICF1 5 -#define OCF1C 3 -#define OCF1B 2 -#define OCF1A 1 -#define TOV1 0 -/* End Register Bits */ - -/* Register Bits [TIFR2] */ -/* Timer/Counter 2 interrupt Flag Register */ -#define OCF2A 1 -#define TOV2 0 -/* End Register Bits */ - -/* Register Bits [TIFR3] */ -/* Timer/Counter 3 interrupt Flag Register */ -#define ICF3 5 -#define OCF3C 3 -#define OCF3B 2 -#define OCF3A 1 -#define TOV3 0 -/* End Register Bits */ - -/* Register Bits [GPIOR0] */ -/* General Purpose I/O Register 0 */ -#define GPIOR07 7 -#define GPIOR06 6 -#define GPIOR05 5 -#define GPIOR04 4 -#define GPIOR03 3 -#define GPIOR02 2 -#define GPIOR01 1 -#define GPIOR00 0 -/* End Register Bits */ - -/* Register Bits [GPIOR1] */ -/* General Purpose I/O Register 1 */ -#define GPIOR17 7 -#define GPIOR16 6 -#define GPIOR15 5 -#define GPIOR14 4 -#define GPIOR13 3 -#define GPIOR12 2 -#define GPIOR11 1 -#define GPIOR10 0 -/* End Register Bits */ - -/* Register Bits [GPIOR2] */ -/* General Purpose I/O Register 2 */ -#define GPIOR27 7 -#define GPIOR26 6 -#define GPIOR25 5 -#define GPIOR24 4 -#define GPIOR23 3 -#define GPIOR22 2 -#define GPIOR21 1 -#define GPIOR20 0 -/* End Register Bits */ - -/* Register Bits [EECR] */ -/* EEPROM Control Register */ -#define EERIE 3 -#define EEMWE 2 -#define EEWE 1 -#define EERE 0 -/* End Register Bits */ - -/* Register Bits [EEDR] */ -/* EEPROM Data Register */ -#define EEDR7 7 -#define EEDR6 6 -#define EEDR5 5 -#define EEDR4 4 -#define EEDR3 3 -#define EEDR2 2 -#define EEDR1 1 -#define EEDR0 0 -/* End Register Bits */ - -/* Register Bits [EEARL] */ -/* EEPROM Address Register */ -#define EEAR7 7 -#define EEAR6 6 -#define EEAR5 5 -#define EEAR4 4 -#define EEAR3 3 -#define EEAR2 2 -#define EEAR1 1 -#define EEAR0 0 -/* End Register Bits */ - -/* Register Bits [EEARH] */ -/* EEPROM Address Register */ -#define EEAR11 3 -#define EEAR10 2 -#define EEAR9 1 -#define EEAR8 0 -/* End Register Bits */ - -/* Register Bits [GTCCR] */ -/* General Timer/Counter Control Register */ -#define TSM 7 -#define PSR2 1 -#define PSR310 0 -/* End Register Bits */ - -/* Register Bits [TCCR0A] */ -/* Timer/Counter Control Register A */ -/* ALSO COVERED IN GENERIC SECTION */ -#define FOC0A 7 -#define WGM00 6 -#define COM0A1 5 -#define COM0A0 4 -#define WGM01 3 -#define CS02 2 -#define CS01 1 -#define CS00 0 -/* End Register Bits */ - -/* Register Bits [OCR0A] */ -/* Output Compare Register A */ -#define OCR0A7 7 -#define OCR0A6 6 -#define OCR0A5 5 -#define OCR0A4 4 -#define OCR0A3 3 -#define OCR0A2 2 -#define OCR0A1 1 -#define OCR0A0 0 -/* End Register Bits */ - - -/* Register Bits [SPIDR] */ -/* SPI Data Register */ -#define SPD7 7 -#define SPD6 6 -#define SPD5 5 -#define SPD4 4 -#define SPD3 3 -#define SPD2 2 -#define SPD1 1 -#define SPD0 0 -/* End Register Bits */ - -/* Register Bits [SMCR] */ -/* Sleep Mode Control Register */ -#define SM2 3 -#define SM1 2 -#define SM0 1 -#define SE 0 -/* End Register Bits */ - -/* Register Bits [MCUSR] */ -/* MCU Status Register */ -#define JTRF 4 -#define WDRF 3 -#define BORF 2 -#define EXTRF 1 -#define PORF 0 -/* End Register Bits */ - -/* Register Bits [MCUCR] */ -/* MCU Control Register */ -#define JTD 7 -#define PUD 4 -#define IVSEL 1 -#define IVCE 0 -/* End Register Bits */ - -/* Register Bits [CLKPR] */ -/* Clock Prescale Register */ -#define CLKPCE 7 -#define CLKPS3 3 -#define CLKPS2 2 -#define CLKPS1 1 -#define CLKPS0 0 -/* End Register Bits */ - -/* Register Bits [OSCCAL] */ -/* Oscillator Calibration Register */ -#define CAL6 6 -#define CAL5 5 -#define CAL4 4 -#define CAL3 3 -#define CAL2 2 -#define CAL1 1 -#define CAL0 0 -/* End Register Bits */ - -/* Register Bits [TIMSK0] */ -/* Timer/Counter 0 interrupt mask Register */ -#define OCIE0A 1 -#define TOIE0 0 -/* End Register Bits */ - -/* Register Bits [TIMSK1] */ -/* Timer/Counter 1 interrupt mask Register */ -#define ICIE1 5 -#define OCIE1C 3 -#define OCIE1B 2 -#define OCIE1A 1 -#define TOIE1 0 -/* End Register Bits */ - -/* Register Bits [TIMSK2] */ -/* Timer/Counter 2 interrupt mask Register */ -#define OCIE2A 1 -#define TOIE2 0 -/* End Register Bits */ - -/* Register Bits [TIMSK3] */ -/* Timer/Counter 3 interrupt mask Register */ -#define ICIE3 5 -#define OCIE3C 3 -#define OCIE3B 2 -#define OCIE3A 1 -#define TOIE3 0 -/* End Register Bits */ - -//Begin CAN specific parts - -/* Register Bits [CANGCON] */ -/* CAN General Control Register */ -#define ABRQ 7 -#define OVRQ 6 -#define TTC 5 -#define SYNTTC 4 -#define LISTEN 3 -#define TEST 2 -#define ENASTB 1 -#define SWRES 0 -/* End Register Bits */ - -/* Register Bits [CANGSTA] */ -/* CAN General Status Register */ -#define OVFG 6 -#define OVRG 6 -#define TXBSY 4 -#define RXBSY 3 -#define ENFG 2 -#define BOFF 1 -#define ERRP 0 -/* End Register Bits */ - -/* Register Bits [CANGIT] */ -/* CAN General Interrupt Register */ -#define CANIT 7 -#define BOFFIT 6 -#define OVRTIM 5 -#define BXOK 4 -#define SERG 3 -#define CERG 2 -#define FERG 1 -#define AERG 0 -/* End Register Bits */ - -/* Register Bits [CANGIE] */ -/* CAN General Interrupt Enable */ -#define ENIT 7 -#define ENBOFF 6 -#define ENRX 5 -#define ENTX 4 -#define ENERR 3 -#define ENBX 2 -#define ENERG 1 -#define ENOVRT 0 -/* End Register Bits */ - -/* Register Bits [CANEN2] */ -/* CAN Enable MOb Register */ -#define ENMOB7 7 -#define ENMOB6 6 -#define ENMOB5 5 -#define ENMOB4 4 -#define ENMOB3 3 -#define ENMOB2 2 -#define ENMOB1 1 -#define ENMOB0 0 -/* End Register Bits */ - -/* Register Bits [CANEN1] */ -/* CAN Enable MOb Register */ -#define ENMOB14 6 -#define ENMOB13 5 -#define ENMOB12 4 -#define ENMOB11 3 -#define ENMOB10 2 -#define ENMOB9 1 -#define ENMOB8 0 -/* End Register Bits */ - -/* Register Bits [CANIE2] */ -/* CAN Interrupt Enable MOb Register */ -#define IEMOB7 7 -#define IEMOB6 6 -#define IEMOB5 5 -#define IEMOB4 4 -#define IEMOB3 3 -#define IEMOB2 2 -#define IEMOB1 1 -#define IEMOB0 0 -/* End Register Bits */ - -/* Register Bits [CANIE1] */ -/* CAN Interrupt Enable MOb Register */ -#define IEMOB14 6 -#define IEMOB13 5 -#define IEMOB12 4 -#define IEMOB11 3 -#define IEMOB10 2 -#define IEMOB9 1 -#define IEMOB8 0 -/* End Register Bits */ - -/* Register Bits [CANSIT2] */ -/* CAN Status Interrupt MOb Register */ -#define SIT7 7 -#define SIT6 6 -#define SIT5 5 -#define SIT4 4 -#define SIT3 3 -#define SIT2 2 -#define SIT1 1 -#define SIT0 0 -/* End Register Bits */ - -/* Register Bits [CANSIT1] */ -/* CAN Status Interrupt MOb Register */ -#define SIT14 6 -#define SIT13 5 -#define SIT12 4 -#define SIT11 3 -#define SIT10 2 -#define SIT9 1 -#define SIT8 0 -/* End Register Bits */ - -/* Register Bits [CANBT1] */ -/* Bit Timing Register 1 */ -#define BRP5 6 -#define BRP4 5 -#define BRP3 4 -#define BRP2 3 -#define BRP1 2 -#define BRP0 1 -/* End Register Bits */ - -/* Register Bits [CANBT2] */ -/* Bit Timing Register 2 */ -#define SJW1 6 -#define SJW0 5 -#define PRS2 3 -#define PRS1 2 -#define PRS0 1 -/* End Register Bits */ - -/* Register Bits [CANBT3] */ -/* Bit Timing Register 3 */ -#define PHS22 6 -#define PHS21 5 -#define PHS20 4 -#define PHS12 3 -#define PHS11 2 -#define PHS10 1 -#define SMP 0 -/* End Register Bits */ - -/* Register Bits [CANTCON] */ -/* CAN Timer Control Register */ -#define TPRSC7 7 -#define TPRSC6 6 -#define TPRSC5 5 -#define TPRSC4 4 -#define TPRSC3 3 -#define TPRSC2 2 -#define TPRSC1 1 -#define TPRSC0 0 -/* End Register Bits */ - -/* Register Bits [CANTIML] */ -/* CAN Timer Register Low */ -#define CANTIM7 7 -#define CANTIM6 6 -#define CANTIM5 5 -#define CANTIM4 4 -#define CANTIM3 3 -#define CANTIM2 2 -#define CANTIM1 1 -#define CANTIM0 0 -/* End Register Bits */ - -/* Register Bits [CANTIMH] */ -/* CAN Timer Register High */ -#define CANTIM15 7 -#define CANTIM14 6 -#define CANTIM13 5 -#define CANTIM12 4 -#define CANTIM11 3 -#define CANTIM10 2 -#define CANTIM9 1 -#define CANTIM8 0 -/* End Register Bits */ - -/* Register Bits [CANTTCL] */ -/* CAN TTC Timer Register Low */ -#define TIMTTC7 7 -#define TIMTTC6 6 -#define TIMTTC5 5 -#define TIMTTC4 4 -#define TIMTTC3 3 -#define TIMTTC2 2 -#define TIMTTC1 1 -#define TIMTTC0 0 -/* End Register Bits */ - -/* Register Bits [CANTTCH] */ -/* CAN TTC Timer Register High */ -#define TIMTTC15 7 -#define TIMTTC14 6 -#define TIMTTC13 5 -#define TIMTTC12 4 -#define TIMTTC11 3 -#define TIMTTC10 2 -#define TIMTTC9 1 -#define TIMTTC8 0 -/* End Register Bits */ - -/* Register Bits [CANTEC] */ -/* CAN Transmitt Error Counter */ -#define TEC7 7 -#define TEC6 6 -#define TEC5 5 -#define TEC4 4 -#define TEC3 3 -#define TEC2 2 -#define TEC1 1 -#define TEC0 0 -/* End Register Bits */ - -/* Register Bits [CANREC] */ -/* CAN Receive Error Counter */ -#define REC7 7 -#define REC6 6 -#define REC5 5 -#define REC4 4 -#define REC3 3 -#define REC2 2 -#define REC1 1 -#define REC0 0 -/* End Register Bits */ - -/* Register Bits [CANHPMOB] */ -/* Highest Priority MOb */ -#define HPMOB3 7 -#define HPMOB2 6 -#define HPMOB1 5 -#define HPMOB0 4 -#define CGP3 3 -#define CGP2 2 -#define CGP1 1 -#define CGP0 0 -/* End Register Bits */ - -/* Register Bits [CANPAGE] */ -/* CAN Page MOb Register */ -#define MOBNB3 7 -#define MOBNB2 6 -#define MOBNB1 5 -#define MOBNB0 4 -#define AINC 3 -#define INDX2 2 -#define INDX1 1 -#define INDX0 0 -/* End Register Bits */ - -/* Register Bits [CANSTMOB] */ -/* CAN MOb Status Register */ -#define DLCW 7 -#define TXOK 6 -#define RXOK 5 -#define BERR 4 -#define SERR 3 -#define CERR 2 -#define FERR 1 -#define AERR 0 -/* End Register Bits */ - -/* Register Bits [CANCDMOB] */ -/* CAN MOb Control and DLC Register */ -#define CONMOB1 7 -#define CONMOB0 6 -#define RPLV 5 -#define IDE 4 -#define DLC3 3 -#define DLC2 2 -#define DLC1 1 -#define DLC0 0 -/* End Register Bits */ - -/* Register Bits [CANIDT4] */ -/* CAN Identifier Tag Register 4 */ -#define IDT4 7 -#define IDT3 6 -#define IDT2 5 -#define IDT1 4 -#define IDT0 3 -#define RTRTAG 2 -#define RB1TAG 1 -#define RB0TAG 0 -/* End Register Bits */ - -/* Register Bits [CANIDT3] */ -/* CAN Identifier Tag Register 3 */ -#define IDT12 7 -#define IDT11 6 -#define IDT10 5 -#define IDT9 4 -#define IDT8 3 -#define IDT7 2 -#define IDT6 1 -#define IDT5 0 -/* End Register Bits */ - -/* Register Bits [CANIDT2] */ -/* CAN Identifier Tag Register 2 */ -#define IDT20 7 -#define IDT19 6 -#define IDT18 5 -#define IDT17 4 -#define IDT16 3 -#define IDT15 2 -#define IDT14 1 -#define IDT13 0 -/* End Register Bits */ - -/* Register Bits [CANIDT1] */ -/* CAN Identifier Tag Register 1 */ -#define IDT28 7 -#define IDT27 6 -#define IDT26 5 -#define IDT25 4 -#define IDT24 3 -#define IDT23 2 -#define IDT22 1 -#define IDT21 0 -/* End Register Bits */ - -/* Register Bits [CANIDM4] */ -/* CAN Identifier Mask Register 4 */ -#define IDMSK4 7 -#define IDMSK3 6 -#define IDMSK2 5 -#define IDMSK1 4 -#define IDMSK0 3 -#define RTRMSK 2 -#define IDEMSK 0 -/* End Register Bits */ - -/* Register Bits [CANIDM3] */ -/* CAN Identifier Mask Register 3 */ -#define IDMSK12 7 -#define IDMSK11 6 -#define IDMSK10 5 -#define IDMSK9 4 -#define IDMSK8 3 -#define IDMSK7 2 -#define IDMSK6 1 -#define IDMSK5 0 -/* End Register Bits */ - -/* Register Bits [CANIDM2] */ -/* CAN Identifier Mask Register 2 */ -#define IDMSK20 7 -#define IDMSK19 6 -#define IDMSK18 5 -#define IDMSK17 4 -#define IDMSK16 3 -#define IDMSK15 2 -#define IDMSK14 1 -#define IDMSK13 0 -/* End Register Bits */ - -/* Register Bits [CANIDM1] */ -/* CAN Identifier Mask Register 1 */ -#define IDMSK28 7 -#define IDMSK27 6 -#define IDMSK26 5 -#define IDMSK25 4 -#define IDMSK24 3 -#define IDMSK23 2 -#define IDMSK22 1 -#define IDMSK21 0 -/* End Register Bits */ - -/* Register Bits [CANSTML] */ -/* CAN Timer Register of some sort, low*/ -#define TIMSTM7 7 -#define TIMSTM6 6 -#define TIMSTM5 5 -#define TIMSTM4 4 -#define TIMSTM3 3 -#define TIMSTM2 2 -#define TIMSTM1 1 -#define TIMSTM0 0 -/* End Register Bits */ - -/* Register Bits [CANSTMH] */ -/* CAN Timer Register of some sort, high */ -#define TIMSTM15 7 -#define TIMSTM14 6 -#define TIMSTM13 5 -#define TIMSTM12 4 -#define TIMSTM11 3 -#define TIMSTM10 2 -#define TIMSTM9 1 -#define TIMSTM8 0 -/* End Register Bits */ - -/* Register Bits [CANMSG] */ -/* CAN Message Register */ -#define MSG7 7 -#define MSG6 6 -#define MSG5 5 -#define MSG4 4 -#define MSG3 3 -#define MSG2 2 -#define MSG1 1 -#define MSG0 0 -/* End Register Bits */ - -/* Begin Verbatim */ - -/* Timer/Counter Control Register (generic) */ -#define FOC 7 -#define WGM0 6 -#define COM1 5 -#define COM0 4 -#define WGM1 3 -#define CS2 2 -#define CS1 1 -#define CS0 0 - -/* Timer/Counter Control Register A (generic) */ -#define COMA1 7 -#define COMA0 6 -#define COMB1 5 -#define COMB0 4 -#define COMC1 3 -#define COMC0 2 -#define WGMA1 1 -#define WGMA0 0 - -/* Timer/Counter Control and Status Register B (generic) */ -#define ICNC 7 -#define ICES 6 -#define WGMB3 4 -#define WGMB2 3 -#define CSB2 2 -#define CSB1 1 -#define CSB0 0 - -/* Timer/Counter Control Register C (generic) */ -#define FOCA 7 -#define FOCB 6 -#define FOCC 5 - -/* Port Data Register (generic) */ -#define PORT7 7 -#define PORT6 6 -#define PORT5 5 -#define PORT4 4 -#define PORT3 3 -#define PORT2 2 -#define PORT1 1 -#define PORT0 0 - -/* Port Data Direction Register (generic) */ -#define DD7 7 -#define DD6 6 -#define DD5 5 -#define DD4 4 -#define DD3 3 -#define DD2 2 -#define DD1 1 -#define DD0 0 - -/* Port Input Pins (generic) */ -#define PIN7 7 -#define PIN6 6 -#define PIN5 5 -#define PIN4 4 -#define PIN3 3 -#define PIN2 2 -#define PIN1 1 -#define PIN0 0 - -/* USART Status Register A (generic) */ -#define RXC 7 -#define TXC 6 -#define UDRE 5 -#define FE 4 -#define DOR 3 -#define UPE 2 -#define U2X 1 -#define MPCM 0 - -/* USART Control Register B (generic) */ -#define RXCIE 7 -#define TXCIE 6 -#define UDRIE 5 -#define RXEN 4 -#define TXEN 3 -#define UCSZ 2 -#define UCSZ2 2 /* new name in datasheet (2467E-AVR-05/02) */ -#define RXB8 1 -#define TXB8 0 - -/* USART Register C (generic) */ -#define UMSEL 6 -#define UPM1 5 -#define UPM0 4 -#define USBS 3 -#define UCSZ1 2 -#define UCSZ0 1 -#define UCPOL 0 - -/* End Verbatim */ - -#endif /* _AVR_IOCANXX_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom103.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom103.h deleted file mode 100644 index 040152727..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom103.h +++ /dev/null @@ -1,675 +0,0 @@ -/* Copyright (c) 2002, Marek Michalkiewicz - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iom103.h,v 1.9.4.3 2008/08/14 00:08:00 arcanum Exp $ */ - -/* avr/iom103.h - definitions for ATmega103 */ - -#ifndef _AVR_IOM103_H_ -#define _AVR_IOM103_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iom103.h" -#else -# error "Attempt to include more than one file." -#endif - -/* I/O registers */ - -/* Input Pins, Port F */ -#define PINF _SFR_IO8(0x00) - -/* Input Pins, Port E */ -#define PINE _SFR_IO8(0x01) - -/* Data Direction Register, Port E */ -#define DDRE _SFR_IO8(0x02) - -/* Data Register, Port E */ -#define PORTE _SFR_IO8(0x03) - -/* ADC Data Register */ -#ifndef __ASSEMBLER__ -#define ADC _SFR_IO16(0x04) -#endif -#define ADCW _SFR_IO16(0x04) -#define ADCL _SFR_IO8(0x04) -#define ADCH _SFR_IO8(0x05) - -/* ADC Control and status register */ -#define ADCSR _SFR_IO8(0x06) - -/* ADC Multiplexer select */ -#define ADMUX _SFR_IO8(0x07) - -/* Analog Comparator Control and Status Register */ -#define ACSR _SFR_IO8(0x08) - -/* UART Baud Rate Register */ -#define UBRR _SFR_IO8(0x09) - -/* UART Control Register */ -#define UCR _SFR_IO8(0x0A) - -/* UART Status Register */ -#define USR _SFR_IO8(0x0B) - -/* UART I/O Data Register */ -#define UDR _SFR_IO8(0x0C) - -/* SPI Control Register */ -#define SPCR _SFR_IO8(0x0D) - -/* SPI Status Register */ -#define SPSR _SFR_IO8(0x0E) - -/* SPI I/O Data Register */ -#define SPDR _SFR_IO8(0x0F) - -/* Input Pins, Port D */ -#define PIND _SFR_IO8(0x10) - -/* Data Direction Register, Port D */ -#define DDRD _SFR_IO8(0x11) - -/* Data Register, Port D */ -#define PORTD _SFR_IO8(0x12) - -/* Data Register, Port C */ -#define PORTC _SFR_IO8(0x15) - -/* Input Pins, Port B */ -#define PINB _SFR_IO8(0x16) - -/* Data Direction Register, Port B */ -#define DDRB _SFR_IO8(0x17) - -/* Data Register, Port B */ -#define PORTB _SFR_IO8(0x18) - -/* Input Pins, Port A */ -#define PINA _SFR_IO8(0x19) - -/* Data Direction Register, Port A */ -#define DDRA _SFR_IO8(0x1A) - -/* Data Register, Port A */ -#define PORTA _SFR_IO8(0x1B) - -/* EEPROM Control Register */ -#define EECR _SFR_IO8(0x1C) - -/* EEPROM Data Register */ -#define EEDR _SFR_IO8(0x1D) - -/* EEPROM Address Register */ -#define EEAR _SFR_IO16(0x1E) -#define EEARL _SFR_IO8(0x1E) -#define EEARH _SFR_IO8(0x1F) - -/* Watchdog Timer Control Register */ -#define WDTCR _SFR_IO8(0x21) - -/* Timer2 Output Compare Register */ -#define OCR2 _SFR_IO8(0x23) - -/* Timer/Counter 2 */ -#define TCNT2 _SFR_IO8(0x24) - -/* Timer/Counter 2 Control register */ -#define TCCR2 _SFR_IO8(0x25) - -/* T/C 1 Input Capture Register */ -#define ICR1 _SFR_IO16(0x26) -#define ICR1L _SFR_IO8(0x26) -#define ICR1H _SFR_IO8(0x27) - -/* Timer/Counter1 Output Compare Register B */ -#define OCR1B _SFR_IO16(0x28) -#define OCR1BL _SFR_IO8(0x28) -#define OCR1BH _SFR_IO8(0x29) - -/* Timer/Counter1 Output Compare Register A */ -#define OCR1A _SFR_IO16(0x2A) -#define OCR1AL _SFR_IO8(0x2A) -#define OCR1AH _SFR_IO8(0x2B) - -/* Timer/Counter 1 */ -#define TCNT1 _SFR_IO16(0x2C) -#define TCNT1L _SFR_IO8(0x2C) -#define TCNT1H _SFR_IO8(0x2D) - -/* Timer/Counter 1 Control and Status Register */ -#define TCCR1B _SFR_IO8(0x2E) - -/* Timer/Counter 1 Control Register */ -#define TCCR1A _SFR_IO8(0x2F) - -/* Timer/Counter 0 Asynchronous Control & Status Register */ -#define ASSR _SFR_IO8(0x30) - -/* Output Compare Register 0 */ -#define OCR0 _SFR_IO8(0x31) - -/* Timer/Counter 0 */ -#define TCNT0 _SFR_IO8(0x32) - -/* Timer/Counter 0 Control Register */ -#define TCCR0 _SFR_IO8(0x33) - -/* MCU Status Register */ -#define MCUSR _SFR_IO8(0x34) - -/* MCU general Control Register */ -#define MCUCR _SFR_IO8(0x35) - -/* Timer/Counter Interrupt Flag Register */ -#define TIFR _SFR_IO8(0x36) - -/* Timer/Counter Interrupt MaSK register */ -#define TIMSK _SFR_IO8(0x37) - -/* xternal Interrupt Flag Register */ -#define EIFR _SFR_IO8(0x38) - -/* External Interrupt MaSK register */ -#define EIMSK _SFR_IO8(0x39) - -/* External Interrupt Control Register */ -#define EICR _SFR_IO8(0x3A) - -/* RAM Page Z select register */ -#define RAMPZ _SFR_IO8(0x3B) - -/* XDIV Divide control register */ -#define XDIV _SFR_IO8(0x3C) - -/* 0x3D..0x3E SP */ - -/* 0x3F SREG */ - -/* Interrupt vectors */ - -/* External Interrupt 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* External Interrupt 1 */ -#define INT1_vect _VECTOR(2) -#define SIG_INTERRUPT1 _VECTOR(2) - -/* External Interrupt 2 */ -#define INT2_vect _VECTOR(3) -#define SIG_INTERRUPT2 _VECTOR(3) - -/* External Interrupt 3 */ -#define INT3_vect _VECTOR(4) -#define SIG_INTERRUPT3 _VECTOR(4) - -/* External Interrupt 4 */ -#define INT4_vect _VECTOR(5) -#define SIG_INTERRUPT4 _VECTOR(5) - -/* External Interrupt 5 */ -#define INT5_vect _VECTOR(6) -#define SIG_INTERRUPT5 _VECTOR(6) - -/* External Interrupt 6 */ -#define INT6_vect _VECTOR(7) -#define SIG_INTERRUPT6 _VECTOR(7) - -/* External Interrupt 7 */ -#define INT7_vect _VECTOR(8) -#define SIG_INTERRUPT7 _VECTOR(8) - -/* Timer/Counter2 Compare Match */ -#define TIMER2_COMP_vect _VECTOR(9) -#define SIG_OUTPUT_COMPARE2 _VECTOR(9) - -/* Timer/Counter2 Overflow */ -#define TIMER2_OVF_vect _VECTOR(10) -#define SIG_OVERFLOW2 _VECTOR(10) - -/* Timer/Counter1 Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(11) -#define SIG_INPUT_CAPTURE1 _VECTOR(11) - -/* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPA_vect _VECTOR(12) -#define SIG_OUTPUT_COMPARE1A _VECTOR(12) - -/* Timer/Counter1 Compare Match B */ -#define TIMER1_COMPB_vect _VECTOR(13) -#define SIG_OUTPUT_COMPARE1B _VECTOR(13) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(14) -#define SIG_OVERFLOW1 _VECTOR(14) - -/* Timer/Counter0 Compare Match */ -#define TIMER0_COMP_vect _VECTOR(15) -#define SIG_OUTPUT_COMPARE0 _VECTOR(15) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(16) -#define SIG_OVERFLOW0 _VECTOR(16) - -/* SPI Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(17) -#define SIG_SPI _VECTOR(17) - -/* UART, Rx Complete */ -#define UART_RX_vect _VECTOR(18) -#define SIG_UART_RECV _VECTOR(18) - -/* UART Data Register Empty */ -#define UART_UDRE_vect _VECTOR(19) -#define SIG_UART_DATA _VECTOR(19) - -/* UART, Tx Complete */ -#define UART_TX_vect _VECTOR(20) -#define SIG_UART_TRANS _VECTOR(20) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(21) -#define SIG_ADC _VECTOR(21) - -/* EEPROM Ready */ -#define EE_READY_vect _VECTOR(22) -#define SIG_EEPROM_READY _VECTOR(22) - -/* Analog Comparator */ -#define ANALOG_COMP_vect _VECTOR(23) -#define SIG_COMPARATOR _VECTOR(23) - -#define _VECTORS_SIZE 96 - -/* - The Register Bit names are represented by their bit number (0-7). -*/ - -/* XDIV Divide control register*/ -#define XDIVEN 7 -#define XDIV6 6 -#define XDIV5 5 -#define XDIV4 4 -#define XDIV3 3 -#define XDIV2 2 -#define XDIV1 1 -#define XDIV0 0 - -/* RAM Page Z select register */ -#define RAMPZ0 0 - -/* External Interrupt Control Register */ -#define ISC71 7 -#define ISC70 6 -#define ISC61 5 -#define ISC60 4 -#define ISC51 3 -#define ISC50 2 -#define ISC41 1 -#define ISC40 0 - -/* External Interrupt MaSK register */ -#define INT7 7 -#define INT6 6 -#define INT5 5 -#define INT4 4 -#define INT3 3 -#define INT2 2 -#define INT1 1 -#define INT0 0 - -/* xternal Interrupt Flag Register */ -#define INTF7 7 -#define INTF6 6 -#define INTF5 5 -#define INTF4 4 - -/* Timer/Counter Interrupt MaSK register */ -#define OCIE2 7 -#define TOIE2 6 -#define TICIE1 5 -#define OCIE1A 4 -#define OCIE1B 3 -#define TOIE1 2 -#define OCIE0 1 -#define TOIE0 0 - -/* Timer/Counter Interrupt Flag Register */ -#define OCF2 7 -#define TOV2 6 -#define ICF1 5 -#define OCF1A 4 -#define OCF1B 3 -#define TOV1 2 -#define OCF0 1 -#define TOV0 0 - -/* MCU general Control Register */ -#define SRE 7 -#define SRW 6 -#define SE 5 -#define SM1 4 -#define SM0 3 - -/* MCU Status Register */ -#define EXTRF 1 -#define PORF 0 - -/* Timer/Counter 0 Control Register */ -#define PWM0 6 -#define COM01 5 -#define COM00 4 -#define CTC0 3 -#define CS02 2 -#define CS01 1 -#define CS00 0 - -/* Timer/Counter 0 Asynchronous Control & Status Register */ -#define AS0 3 -#define TCN0UB 2 -#define OCR0UB 1 -#define TCR0UB 0 - -/* Timer/Counter 1 Control Register */ -#define COM1A1 7 -#define COM1A0 6 -#define COM1B1 5 -#define COM1B0 4 -#define PWM11 1 -#define PWM10 0 - -/* Timer/Counter 1 Control and Status Register */ -#define ICNC1 7 -#define ICES1 6 -#define CTC1 3 -#define CS12 2 -#define CS11 1 -#define CS10 0 - -/* Timer/Counter 2 Control register */ -#define PWM2 6 -#define COM21 5 -#define COM20 4 -#define CTC2 3 -#define CS22 2 -#define CS21 1 -#define CS20 0 - -/* Watchdog Timer Control Register */ -#define WDTOE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -/* Data Register, Port A */ -#define PA7 7 -#define PA6 6 -#define PA5 5 -#define PA4 4 -#define PA3 3 -#define PA2 2 -#define PA1 1 -#define PA0 0 - -/* Data Direction Register, Port A */ -#define DDA7 7 -#define DDA6 6 -#define DDA5 5 -#define DDA4 4 -#define DDA3 3 -#define DDA2 2 -#define DDA1 1 -#define DDA0 0 - -/* Input Pins, Port A */ -#define PINA7 7 -#define PINA6 6 -#define PINA5 5 -#define PINA4 4 -#define PINA3 3 -#define PINA2 2 -#define PINA1 1 -#define PINA0 0 - -/* Data Register, Port B */ -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -/* Data Direction Register, Port B */ -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -/* Input Pins, Port B */ -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -/* Data Register, Port C */ -#define PC7 7 -#define PC6 6 -#define PC5 5 -#define PC4 4 -#define PC3 3 -#define PC2 2 -#define PC1 1 -#define PC0 0 - -/* Data Register, Port D */ -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -/* Data Direction Register, Port D */ -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -/* Input Pins, Port D */ -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -/* Data Register, Port E */ -#define PE7 7 -#define PE6 6 -#define PE5 5 -#define PE4 4 -#define PE3 3 -#define PE2 2 -#define PE1 1 -#define PE0 0 - -/* Data Direction Register, Port E */ -#define DDE7 7 -#define DDE6 6 -#define DDE5 5 -#define DDE4 4 -#define DDE3 3 -#define DDE2 2 -#define DDE1 1 -#define DDE0 0 - -/* Input Pins, Port E */ -#define PINE7 7 -#define PINE6 6 -#define PINE5 5 -#define PINE4 4 -#define PINE3 3 -#define PINE2 2 -#define PINE1 1 -#define PINE0 0 - -/* Input Pins, Port F */ -#define PINF7 7 -#define PINF6 6 -#define PINF5 5 -#define PINF4 4 -#define PINF3 3 -#define PINF2 2 -#define PINF1 1 -#define PINF0 0 - -/* SPI Status Register */ -#define SPIF 7 -#define WCOL 6 - -/* SPI Control Register */ -#define SPIE 7 -#define SPE 6 -#define DORD 5 -#define MSTR 4 -#define CPOL 3 -#define CPHA 2 -#define SPR1 1 -#define SPR0 0 - -/* UART Status Register */ -#define RXC 7 -#define TXC 6 -#define UDRE 5 -#define FE 4 -#define DOR 3 - -/* UART Control Register */ -#define RXCIE 7 -#define TXCIE 6 -#define UDRIE 5 -#define RXEN 4 -#define TXEN 3 -#define CHR9 2 -#define RXB8 1 -#define TXB8 0 - -/* Analog Comparator Control and Status Register */ -#define ACD 7 -#define ACO 5 -#define ACI 4 -#define ACIE 3 -#define ACIC 2 -#define ACIS1 1 -#define ACIS0 0 - -/* ADC Control and status register */ -#define ADEN 7 -#define ADSC 6 -#define ADFR 5 -#define ADIF 4 -#define ADIE 3 -#define ADPS2 2 -#define ADPS1 1 -#define ADPS0 0 - -/* ADC Multiplexer select */ -#define MUX2 2 -#define MUX1 1 -#define MUX0 0 - -/* EEPROM Control Register */ -#define EERIE 3 -#define EEMWE 2 -#define EEWE 1 -#define EERE 0 - -/* Constants */ -#define RAMEND 0x0FFF /*Last On-Chip SRAM Location*/ -#define XRAMEND 0xFFFF -#define E2END 0x0FFF -#define E2PAGESIZE 0 -#define FLASHEND 0x1FFFF - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 1 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) /* Select Clock Source */ -#define FUSE_CKSEL1 (unsigned char)~_BV(1) /* Select Clock Source */ -#define FUSE_CKSEL2 (unsigned char)~_BV(2) /* Select Clock Source */ -#define FUSE_CKSEL3 (unsigned char)~_BV(3) /* Select Clock Source */ -#define FUSE_SUT0 (unsigned char)~_BV(4) /* Select start-up time */ -#define FUSE_SUT1 (unsigned char)~_BV(5) /* Select start-up time */ -#define FUSE_BODEN (unsigned char)~_BV(6) /* Brown out detector enable */ -#define FUSE_BODLEVEL (unsigned char)~_BV(7) /* Brown out detector trigger level */ -#define LFUSE_DEFAULT (FUSE_SUT1 & FUSE_SUT0 & FUSE_CKSEL3 & FUSE_CKSEL2 & FUSE_CKSEL1) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x97 -#define SIGNATURE_2 0x01 - - -#endif /* _AVR_IOM103_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom128.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom128.h deleted file mode 100644 index 0e2ee6c47..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom128.h +++ /dev/null @@ -1,1203 +0,0 @@ -/* Copyright (c) 2002, Peter Jansen - Copyright (c) 2007, Atmel Corporation - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iom128.h,v 1.21.2.5 2008/10/17 23:27:46 arcanum Exp $ */ - -/* avr/iom128.h - defines for ATmega128 - - As of 2002-08-27: - - This should be up to date with data sheet 2467E-AVR-05/02 */ - -#ifndef _AVR_IOM128_H_ -#define _AVR_IOM128_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iom128.h" -#else -# error "Attempt to include more than one file." -#endif - -/* I/O registers */ - -/* Input Pins, Port F */ -#define PINF _SFR_IO8(0x00) - -/* Input Pins, Port E */ -#define PINE _SFR_IO8(0x01) - -/* Data Direction Register, Port E */ -#define DDRE _SFR_IO8(0x02) - -/* Data Register, Port E */ -#define PORTE _SFR_IO8(0x03) - -/* ADC Data Register */ -#define ADCW _SFR_IO16(0x04) /* for backwards compatibility */ -#ifndef __ASSEMBLER__ -#define ADC _SFR_IO16(0x04) -#endif -#define ADCL _SFR_IO8(0x04) -#define ADCH _SFR_IO8(0x05) - -/* ADC Control and status register */ -#define ADCSR _SFR_IO8(0x06) -#define ADCSRA _SFR_IO8(0x06) /* new name in datasheet (2467E-AVR-05/02) */ - -/* ADC Multiplexer select */ -#define ADMUX _SFR_IO8(0x07) - -/* Analog Comparator Control and Status Register */ -#define ACSR _SFR_IO8(0x08) - -/* USART0 Baud Rate Register Low */ -#define UBRR0L _SFR_IO8(0x09) - -/* USART0 Control and Status Register B */ -#define UCSR0B _SFR_IO8(0x0A) - -/* USART0 Control and Status Register A */ -#define UCSR0A _SFR_IO8(0x0B) - -/* USART0 I/O Data Register */ -#define UDR0 _SFR_IO8(0x0C) - -/* SPI Control Register */ -#define SPCR _SFR_IO8(0x0D) - -/* SPI Status Register */ -#define SPSR _SFR_IO8(0x0E) - -/* SPI I/O Data Register */ -#define SPDR _SFR_IO8(0x0F) - -/* Input Pins, Port D */ -#define PIND _SFR_IO8(0x10) - -/* Data Direction Register, Port D */ -#define DDRD _SFR_IO8(0x11) - -/* Data Register, Port D */ -#define PORTD _SFR_IO8(0x12) - -/* Input Pins, Port C */ -#define PINC _SFR_IO8(0x13) - -/* Data Direction Register, Port C */ -#define DDRC _SFR_IO8(0x14) - -/* Data Register, Port C */ -#define PORTC _SFR_IO8(0x15) - -/* Input Pins, Port B */ -#define PINB _SFR_IO8(0x16) - -/* Data Direction Register, Port B */ -#define DDRB _SFR_IO8(0x17) - -/* Data Register, Port B */ -#define PORTB _SFR_IO8(0x18) - -/* Input Pins, Port A */ -#define PINA _SFR_IO8(0x19) - -/* Data Direction Register, Port A */ -#define DDRA _SFR_IO8(0x1A) - -/* Data Register, Port A */ -#define PORTA _SFR_IO8(0x1B) - -/* EEPROM Control Register */ -#define EECR _SFR_IO8(0x1C) - -/* EEPROM Data Register */ -#define EEDR _SFR_IO8(0x1D) - -/* EEPROM Address Register */ -#define EEAR _SFR_IO16(0x1E) -#define EEARL _SFR_IO8(0x1E) -#define EEARH _SFR_IO8(0x1F) - -/* Special Function I/O Register */ -#define SFIOR _SFR_IO8(0x20) - -/* Watchdog Timer Control Register */ -#define WDTCR _SFR_IO8(0x21) - -/* On-chip Debug Register */ -#define OCDR _SFR_IO8(0x22) - -/* Timer2 Output Compare Register */ -#define OCR2 _SFR_IO8(0x23) - -/* Timer/Counter 2 */ -#define TCNT2 _SFR_IO8(0x24) - -/* Timer/Counter 2 Control register */ -#define TCCR2 _SFR_IO8(0x25) - -/* T/C 1 Input Capture Register */ -#define ICR1 _SFR_IO16(0x26) -#define ICR1L _SFR_IO8(0x26) -#define ICR1H _SFR_IO8(0x27) - -/* Timer/Counter1 Output Compare Register B */ -#define OCR1B _SFR_IO16(0x28) -#define OCR1BL _SFR_IO8(0x28) -#define OCR1BH _SFR_IO8(0x29) - -/* Timer/Counter1 Output Compare Register A */ -#define OCR1A _SFR_IO16(0x2A) -#define OCR1AL _SFR_IO8(0x2A) -#define OCR1AH _SFR_IO8(0x2B) - -/* Timer/Counter 1 */ -#define TCNT1 _SFR_IO16(0x2C) -#define TCNT1L _SFR_IO8(0x2C) -#define TCNT1H _SFR_IO8(0x2D) - -/* Timer/Counter 1 Control and Status Register */ -#define TCCR1B _SFR_IO8(0x2E) - -/* Timer/Counter 1 Control Register */ -#define TCCR1A _SFR_IO8(0x2F) - -/* Timer/Counter 0 Asynchronous Control & Status Register */ -#define ASSR _SFR_IO8(0x30) - -/* Output Compare Register 0 */ -#define OCR0 _SFR_IO8(0x31) - -/* Timer/Counter 0 */ -#define TCNT0 _SFR_IO8(0x32) - -/* Timer/Counter 0 Control Register */ -#define TCCR0 _SFR_IO8(0x33) - -/* MCU Status Register */ -#define MCUSR _SFR_IO8(0x34) -#define MCUCSR _SFR_IO8(0x34) /* new name in datasheet (2467E-AVR-05/02) */ - -/* MCU general Control Register */ -#define MCUCR _SFR_IO8(0x35) - -/* Timer/Counter Interrupt Flag Register */ -#define TIFR _SFR_IO8(0x36) - -/* Timer/Counter Interrupt MaSK register */ -#define TIMSK _SFR_IO8(0x37) - -/* External Interrupt Flag Register */ -#define EIFR _SFR_IO8(0x38) - -/* External Interrupt MaSK register */ -#define EIMSK _SFR_IO8(0x39) - -/* External Interrupt Control Register B */ -#define EICRB _SFR_IO8(0x3A) - -/* RAM Page Z select register */ -#define RAMPZ _SFR_IO8(0x3B) - -/* XDIV Divide control register */ -#define XDIV _SFR_IO8(0x3C) - -/* 0x3D..0x3E SP */ - -/* 0x3F SREG */ - -/* Extended I/O registers */ - -/* Data Direction Register, Port F */ -#define DDRF _SFR_MEM8(0x61) - -/* Data Register, Port F */ -#define PORTF _SFR_MEM8(0x62) - -/* Input Pins, Port G */ -#define PING _SFR_MEM8(0x63) - -/* Data Direction Register, Port G */ -#define DDRG _SFR_MEM8(0x64) - -/* Data Register, Port G */ -#define PORTG _SFR_MEM8(0x65) - -/* Store Program Memory Control and Status Register */ -#define SPMCR _SFR_MEM8(0x68) -#define SPMCSR _SFR_MEM8(0x68) /* new name in datasheet (2467E-AVR-05/02) */ - -/* External Interrupt Control Register A */ -#define EICRA _SFR_MEM8(0x6A) - -/* External Memory Control Register B */ -#define XMCRB _SFR_MEM8(0x6C) - -/* External Memory Control Register A */ -#define XMCRA _SFR_MEM8(0x6D) - -/* Oscillator Calibration Register */ -#define OSCCAL _SFR_MEM8(0x6F) - -/* 2-wire Serial Interface Bit Rate Register */ -#define TWBR _SFR_MEM8(0x70) - -/* 2-wire Serial Interface Status Register */ -#define TWSR _SFR_MEM8(0x71) - -/* 2-wire Serial Interface Address Register */ -#define TWAR _SFR_MEM8(0x72) - -/* 2-wire Serial Interface Data Register */ -#define TWDR _SFR_MEM8(0x73) - -/* 2-wire Serial Interface Control Register */ -#define TWCR _SFR_MEM8(0x74) - -/* Time Counter 1 Output Compare Register C */ -#define OCR1C _SFR_MEM16(0x78) -#define OCR1CL _SFR_MEM8(0x78) -#define OCR1CH _SFR_MEM8(0x79) - -/* Timer/Counter 1 Control Register C */ -#define TCCR1C _SFR_MEM8(0x7A) - -/* Extended Timer Interrupt Flag Register */ -#define ETIFR _SFR_MEM8(0x7C) - -/* Extended Timer Interrupt Mask Register */ -#define ETIMSK _SFR_MEM8(0x7D) - -/* Timer/Counter 3 Input Capture Register */ -#define ICR3 _SFR_MEM16(0x80) -#define ICR3L _SFR_MEM8(0x80) -#define ICR3H _SFR_MEM8(0x81) - -/* Timer/Counter 3 Output Compare Register C */ -#define OCR3C _SFR_MEM16(0x82) -#define OCR3CL _SFR_MEM8(0x82) -#define OCR3CH _SFR_MEM8(0x83) - -/* Timer/Counter 3 Output Compare Register B */ -#define OCR3B _SFR_MEM16(0x84) -#define OCR3BL _SFR_MEM8(0x84) -#define OCR3BH _SFR_MEM8(0x85) - -/* Timer/Counter 3 Output Compare Register A */ -#define OCR3A _SFR_MEM16(0x86) -#define OCR3AL _SFR_MEM8(0x86) -#define OCR3AH _SFR_MEM8(0x87) - -/* Timer/Counter 3 Counter Register */ -#define TCNT3 _SFR_MEM16(0x88) -#define TCNT3L _SFR_MEM8(0x88) -#define TCNT3H _SFR_MEM8(0x89) - -/* Timer/Counter 3 Control Register B */ -#define TCCR3B _SFR_MEM8(0x8A) - -/* Timer/Counter 3 Control Register A */ -#define TCCR3A _SFR_MEM8(0x8B) - -/* Timer/Counter 3 Control Register C */ -#define TCCR3C _SFR_MEM8(0x8C) - -/* USART0 Baud Rate Register High */ -#define UBRR0H _SFR_MEM8(0x90) - -/* USART0 Control and Status Register C */ -#define UCSR0C _SFR_MEM8(0x95) - -/* USART1 Baud Rate Register High */ -#define UBRR1H _SFR_MEM8(0x98) - -/* USART1 Baud Rate Register Low*/ -#define UBRR1L _SFR_MEM8(0x99) - -/* USART1 Control and Status Register B */ -#define UCSR1B _SFR_MEM8(0x9A) - -/* USART1 Control and Status Register A */ -#define UCSR1A _SFR_MEM8(0x9B) - -/* USART1 I/O Data Register */ -#define UDR1 _SFR_MEM8(0x9C) - -/* USART1 Control and Status Register C */ -#define UCSR1C _SFR_MEM8(0x9D) - -/* Interrupt vectors */ - -/* External Interrupt Request 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* External Interrupt Request 1 */ -#define INT1_vect _VECTOR(2) -#define SIG_INTERRUPT1 _VECTOR(2) - -/* External Interrupt Request 2 */ -#define INT2_vect _VECTOR(3) -#define SIG_INTERRUPT2 _VECTOR(3) - -/* External Interrupt Request 3 */ -#define INT3_vect _VECTOR(4) -#define SIG_INTERRUPT3 _VECTOR(4) - -/* External Interrupt Request 4 */ -#define INT4_vect _VECTOR(5) -#define SIG_INTERRUPT4 _VECTOR(5) - -/* External Interrupt Request 5 */ -#define INT5_vect _VECTOR(6) -#define SIG_INTERRUPT5 _VECTOR(6) - -/* External Interrupt Request 6 */ -#define INT6_vect _VECTOR(7) -#define SIG_INTERRUPT6 _VECTOR(7) - -/* External Interrupt Request 7 */ -#define INT7_vect _VECTOR(8) -#define SIG_INTERRUPT7 _VECTOR(8) - -/* Timer/Counter2 Compare Match */ -#define TIMER2_COMP_vect _VECTOR(9) -#define SIG_OUTPUT_COMPARE2 _VECTOR(9) - -/* Timer/Counter2 Overflow */ -#define TIMER2_OVF_vect _VECTOR(10) -#define SIG_OVERFLOW2 _VECTOR(10) - -/* Timer/Counter1 Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(11) -#define SIG_INPUT_CAPTURE1 _VECTOR(11) - -/* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPA_vect _VECTOR(12) -#define SIG_OUTPUT_COMPARE1A _VECTOR(12) - -/* Timer/Counter Compare Match B */ -#define TIMER1_COMPB_vect _VECTOR(13) -#define SIG_OUTPUT_COMPARE1B _VECTOR(13) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(14) -#define SIG_OVERFLOW1 _VECTOR(14) - -/* Timer/Counter0 Compare Match */ -#define TIMER0_COMP_vect _VECTOR(15) -#define SIG_OUTPUT_COMPARE0 _VECTOR(15) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(16) -#define SIG_OVERFLOW0 _VECTOR(16) - -/* SPI Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(17) -#define SIG_SPI _VECTOR(17) - -/* USART0, Rx Complete */ -#define USART0_RX_vect _VECTOR(18) -#define SIG_USART0_RECV _VECTOR(18) -#define SIG_UART0_RECV _VECTOR(18) - -/* USART0 Data Register Empty */ -#define USART0_UDRE_vect _VECTOR(19) -#define SIG_USART0_DATA _VECTOR(19) -#define SIG_UART0_DATA _VECTOR(19) - -/* USART0, Tx Complete */ -#define USART0_TX_vect _VECTOR(20) -#define SIG_USART0_TRANS _VECTOR(20) -#define SIG_UART0_TRANS _VECTOR(20) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(21) -#define SIG_ADC _VECTOR(21) - -/* EEPROM Ready */ -#define EE_READY_vect _VECTOR(22) -#define SIG_EEPROM_READY _VECTOR(22) - -/* Analog Comparator */ -#define ANALOG_COMP_vect _VECTOR(23) -#define SIG_COMPARATOR _VECTOR(23) - -/* Timer/Counter1 Compare Match C */ -#define TIMER1_COMPC_vect _VECTOR(24) -#define SIG_OUTPUT_COMPARE1C _VECTOR(24) - -/* Timer/Counter3 Capture Event */ -#define TIMER3_CAPT_vect _VECTOR(25) -#define SIG_INPUT_CAPTURE3 _VECTOR(25) - -/* Timer/Counter3 Compare Match A */ -#define TIMER3_COMPA_vect _VECTOR(26) -#define SIG_OUTPUT_COMPARE3A _VECTOR(26) - -/* Timer/Counter3 Compare Match B */ -#define TIMER3_COMPB_vect _VECTOR(27) -#define SIG_OUTPUT_COMPARE3B _VECTOR(27) - -/* Timer/Counter3 Compare Match C */ -#define TIMER3_COMPC_vect _VECTOR(28) -#define SIG_OUTPUT_COMPARE3C _VECTOR(28) - -/* Timer/Counter3 Overflow */ -#define TIMER3_OVF_vect _VECTOR(29) -#define SIG_OVERFLOW3 _VECTOR(29) - -/* USART1, Rx Complete */ -#define USART1_RX_vect _VECTOR(30) -#define SIG_USART1_RECV _VECTOR(30) -#define SIG_UART1_RECV _VECTOR(30) - -/* USART1, Data Register Empty */ -#define USART1_UDRE_vect _VECTOR(31) -#define SIG_USART1_DATA _VECTOR(31) -#define SIG_UART1_DATA _VECTOR(31) - -/* USART1, Tx Complete */ -#define USART1_TX_vect _VECTOR(32) -#define SIG_USART1_TRANS _VECTOR(32) -#define SIG_UART1_TRANS _VECTOR(32) - -/* 2-wire Serial Interface */ -#define TWI_vect _VECTOR(33) -#define SIG_2WIRE_SERIAL _VECTOR(33) - -/* Store Program Memory Read */ -#define SPM_READY_vect _VECTOR(34) -#define SIG_SPM_READY _VECTOR(34) - -#define _VECTORS_SIZE 140 - -/* - The Register Bit names are represented by their bit number (0-7). -*/ - -/* 2-wire Control Register - TWCR */ -#define TWINT 7 -#define TWEA 6 -#define TWSTA 5 -#define TWSTO 4 -#define TWWC 3 -#define TWEN 2 -#define TWIE 0 - -/* 2-wire Address Register - TWAR */ -#define TWA6 7 -#define TWA5 6 -#define TWA4 5 -#define TWA3 4 -#define TWA2 3 -#define TWA1 2 -#define TWA0 1 -#define TWGCE 0 - -/* 2-wire Status Register - TWSR */ -#define TWS7 7 -#define TWS6 6 -#define TWS5 5 -#define TWS4 4 -#define TWS3 3 -#define TWPS1 1 -#define TWPS0 0 - -/* External Memory Control Register A - XMCRA */ -#define SRL2 6 -#define SRL1 5 -#define SRL0 4 -#define SRW01 3 -#define SRW00 2 -#define SRW11 1 - -/* External Memory Control Register B - XMCRA */ -#define XMBK 7 -#define XMM2 2 -#define XMM1 1 -#define XMM0 0 - -/* XDIV Divide control register - XDIV */ -#define XDIVEN 7 -#define XDIV6 6 -#define XDIV5 5 -#define XDIV4 4 -#define XDIV3 3 -#define XDIV2 2 -#define XDIV1 1 -#define XDIV0 0 - -/* RAM Page Z select register - RAMPZ */ -#define RAMPZ0 0 - -/* External Interrupt Control Register A - EICRA */ -#define ISC31 7 -#define ISC30 6 -#define ISC21 5 -#define ISC20 4 -#define ISC11 3 -#define ISC10 2 -#define ISC01 1 -#define ISC00 0 - -/* External Interrupt Control Register B - EICRB */ -#define ISC71 7 -#define ISC70 6 -#define ISC61 5 -#define ISC60 4 -#define ISC51 3 -#define ISC50 2 -#define ISC41 1 -#define ISC40 0 - -/* Store Program Memory Control Register - SPMCSR, SPMCR */ -#define SPMIE 7 -#define RWWSB 6 -#define RWWSRE 4 -#define BLBSET 3 -#define PGWRT 2 -#define PGERS 1 -#define SPMEN 0 - -/* External Interrupt MaSK register - EIMSK */ -#define INT7 7 -#define INT6 6 -#define INT5 5 -#define INT4 4 -#define INT3 3 -#define INT2 2 -#define INT1 1 -#define INT0 0 - -/* External Interrupt Flag Register - EIFR */ -#define INTF7 7 -#define INTF6 6 -#define INTF5 5 -#define INTF4 4 -#define INTF3 3 -#define INTF2 2 -#define INTF1 1 -#define INTF0 0 - -/* Timer/Counter Interrupt MaSK register - TIMSK */ -#define OCIE2 7 -#define TOIE2 6 -#define TICIE1 5 -#define OCIE1A 4 -#define OCIE1B 3 -#define TOIE1 2 -#define OCIE0 1 -#define TOIE0 0 - -/* Timer/Counter Interrupt Flag Register - TIFR */ -#define OCF2 7 -#define TOV2 6 -#define ICF1 5 -#define OCF1A 4 -#define OCF1B 3 -#define TOV1 2 -#define OCF0 1 -#define TOV0 0 - -/* Extended Timer Interrupt MaSK register - ETIMSK */ -#define TICIE3 5 -#define OCIE3A 4 -#define OCIE3B 3 -#define TOIE3 2 -#define OCIE3C 1 -#define OCIE1C 0 - -/* Extended Timer Interrupt Flag Register - ETIFR */ -#define ICF3 5 -#define OCF3A 4 -#define OCF3B 3 -#define TOV3 2 -#define OCF3C 1 -#define OCF1C 0 - -/* MCU general Control Register - MCUCR */ -#define SRE 7 -#define SRW 6 -#define SRW10 6 /* new name in datasheet (2467E-AVR-05/02) */ -#define SE 5 -#define SM1 4 -#define SM0 3 -#define SM2 2 -#define IVSEL 1 -#define IVCE 0 - -/* MCU Status Register - MCUSR, MCUCSR */ -#define JTD 7 -#define JTRF 4 -#define WDRF 3 -#define BORF 2 -#define EXTRF 1 -#define PORF 0 - -/* Timer/Counter Control Register (generic) */ -#define FOC 7 -#define WGM0 6 -#define COM1 5 -#define COM0 4 -#define WGM1 3 -#define CS2 2 -#define CS1 1 -#define CS0 0 - -/* Timer/Counter 0 Control Register - TCCR0 */ -#define FOC0 7 -#define WGM00 6 -#define COM01 5 -#define COM00 4 -#define WGM01 3 -#define CS02 2 -#define CS01 1 -#define CS00 0 - -/* Timer/Counter 2 Control Register - TCCR2 */ -#define FOC2 7 -#define WGM20 6 -#define COM21 5 -#define COM20 4 -#define WGM21 3 -#define CS22 2 -#define CS21 1 -#define CS20 0 - -/* Timer/Counter 0 Asynchronous Control & Status Register - ASSR */ -#define AS0 3 -#define TCN0UB 2 -#define OCR0UB 1 -#define TCR0UB 0 - -/* Timer/Counter Control Register A (generic) */ -#define COMA1 7 -#define COMA0 6 -#define COMB1 5 -#define COMB0 4 -#define COMC1 3 -#define COMC0 2 -#define WGMA1 1 -#define WGMA0 0 - -/* Timer/Counter 1 Control and Status Register A - TCCR1A */ -#define COM1A1 7 -#define COM1A0 6 -#define COM1B1 5 -#define COM1B0 4 -#define COM1C1 3 -#define COM1C0 2 -#define WGM11 1 -#define WGM10 0 - -/* Timer/Counter 3 Control and Status Register A - TCCR3A */ -#define COM3A1 7 -#define COM3A0 6 -#define COM3B1 5 -#define COM3B0 4 -#define COM3C1 3 -#define COM3C0 2 -#define WGM31 1 -#define WGM30 0 - -/* Timer/Counter Control and Status Register B (generic) */ -#define ICNC 7 -#define ICES 6 -#define WGMB3 4 -#define WGMB2 3 -#define CSB2 2 -#define CSB1 1 -#define CSB0 0 - -/* Timer/Counter 1 Control and Status Register B - TCCR1B */ -#define ICNC1 7 -#define ICES1 6 -#define WGM13 4 -#define WGM12 3 -#define CS12 2 -#define CS11 1 -#define CS10 0 - -/* Timer/Counter 3 Control and Status Register B - TCCR3B */ -#define ICNC3 7 -#define ICES3 6 -#define WGM33 4 -#define WGM32 3 -#define CS32 2 -#define CS31 1 -#define CS30 0 - -/* Timer/Counter Control Register C (generic) */ -#define FOCA 7 -#define FOCB 6 -#define FOCC 5 - -/* Timer/Counter 3 Control Register C - TCCR3C */ -#define FOC3A 7 -#define FOC3B 6 -#define FOC3C 5 - -/* Timer/Counter 1 Control Register C - TCCR1C */ -#define FOC1A 7 -#define FOC1B 6 -#define FOC1C 5 - -/* On-chip Debug Register - OCDR */ -#define IDRD 7 -#define OCDR7 7 -#define OCDR6 6 -#define OCDR5 5 -#define OCDR4 4 -#define OCDR3 3 -#define OCDR2 2 -#define OCDR1 1 -#define OCDR0 0 - -/* Watchdog Timer Control Register - WDTCR */ -#define WDCE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -/* - The ADHSM bit has been removed from all documentation, - as being not needed at all since the comparator has proven - to be fast enough even without feeding it more power. -*/ - -/* Special Function I/O Register - SFIOR */ -#define TSM 7 -#define ACME 3 -#define PUD 2 -#define PSR0 1 -#define PSR321 0 - -/* SPI Status Register - SPSR */ -#define SPIF 7 -#define WCOL 6 -#define SPI2X 0 - -/* SPI Control Register - SPCR */ -#define SPIE 7 -#define SPE 6 -#define DORD 5 -#define MSTR 4 -#define CPOL 3 -#define CPHA 2 -#define SPR1 1 -#define SPR0 0 - -/* USART Register C (generic) */ -#define UMSEL 6 -#define UPM1 5 -#define UPM0 4 -#define USBS 3 -#define UCSZ1 2 -#define UCSZ0 1 -#define UCPOL 0 - -/* USART1 Register C - UCSR1C */ -#define UMSEL1 6 -#define UPM11 5 -#define UPM10 4 -#define USBS1 3 -#define UCSZ11 2 -#define UCSZ10 1 -#define UCPOL1 0 - -/* USART0 Register C - UCSR0C */ -#define UMSEL0 6 -#define UPM01 5 -#define UPM00 4 -#define USBS0 3 -#define UCSZ01 2 -#define UCSZ00 1 -#define UCPOL0 0 - -/* USART Status Register A (generic) */ -#define RXC 7 -#define TXC 6 -#define UDRE 5 -#define FE 4 -#define DOR 3 -#define UPE 2 -#define U2X 1 -#define MPCM 0 - -/* USART1 Status Register A - UCSR1A */ -#define RXC1 7 -#define TXC1 6 -#define UDRE1 5 -#define FE1 4 -#define DOR1 3 -#define UPE1 2 -#define U2X1 1 -#define MPCM1 0 - -/* USART0 Status Register A - UCSR0A */ -#define RXC0 7 -#define TXC0 6 -#define UDRE0 5 -#define FE0 4 -#define DOR0 3 -#define UPE0 2 -#define U2X0 1 -#define MPCM0 0 - -/* USART Control Register B (generic) */ -#define RXCIE 7 -#define TXCIE 6 -#define UDRIE 5 -#define RXEN 4 -#define TXEN 3 -#define UCSZ 2 -#define UCSZ2 2 /* new name in datasheet (2467E-AVR-05/02) */ -#define RXB8 1 -#define TXB8 0 - -/* USART1 Control Register B - UCSR1B */ -#define RXCIE1 7 -#define TXCIE1 6 -#define UDRIE1 5 -#define RXEN1 4 -#define TXEN1 3 -#define UCSZ12 2 -#define RXB81 1 -#define TXB81 0 - -/* USART0 Control Register B - UCSR0B */ -#define RXCIE0 7 -#define TXCIE0 6 -#define UDRIE0 5 -#define RXEN0 4 -#define TXEN0 3 -#define UCSZ02 2 -#define RXB80 1 -#define TXB80 0 - -/* Analog Comparator Control and Status Register - ACSR */ -#define ACD 7 -#define ACBG 6 -#define ACO 5 -#define ACI 4 -#define ACIE 3 -#define ACIC 2 -#define ACIS1 1 -#define ACIS0 0 - -/* ADC Control and status register - ADCSRA */ -#define ADEN 7 -#define ADSC 6 -#define ADFR 5 -#define ADIF 4 -#define ADIE 3 -#define ADPS2 2 -#define ADPS1 1 -#define ADPS0 0 - -/* ADC Multiplexer select - ADMUX */ -#define REFS1 7 -#define REFS0 6 -#define ADLAR 5 -#define MUX4 4 -#define MUX3 3 -#define MUX2 2 -#define MUX1 1 -#define MUX0 0 - -/* Port A Data Register - PORTA */ -#define PA7 7 -#define PA6 6 -#define PA5 5 -#define PA4 4 -#define PA3 3 -#define PA2 2 -#define PA1 1 -#define PA0 0 - -/* Port A Data Direction Register - DDRA */ -#define DDA7 7 -#define DDA6 6 -#define DDA5 5 -#define DDA4 4 -#define DDA3 3 -#define DDA2 2 -#define DDA1 1 -#define DDA0 0 - -/* Port A Input Pins - PINA */ -#define PINA7 7 -#define PINA6 6 -#define PINA5 5 -#define PINA4 4 -#define PINA3 3 -#define PINA2 2 -#define PINA1 1 -#define PINA0 0 - -/* Port B Data Register - PORTB */ -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -/* Port B Data Direction Register - DDRB */ -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -/* Port B Input Pins - PINB */ -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -/* Port C Data Register - PORTC */ -#define PC7 7 -#define PC6 6 -#define PC5 5 -#define PC4 4 -#define PC3 3 -#define PC2 2 -#define PC1 1 -#define PC0 0 - -/* Port C Data Direction Register - DDRC */ -#define DDC7 7 -#define DDC6 6 -#define DDC5 5 -#define DDC4 4 -#define DDC3 3 -#define DDC2 2 -#define DDC1 1 -#define DDC0 0 - -/* Port C Input Pins - PINC */ -#define PINC7 7 -#define PINC6 6 -#define PINC5 5 -#define PINC4 4 -#define PINC3 3 -#define PINC2 2 -#define PINC1 1 -#define PINC0 0 - -/* Port D Data Register - PORTD */ -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -/* Port D Data Direction Register - DDRD */ -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -/* Port D Input Pins - PIND */ -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -/* Port E Data Register - PORTE */ -#define PE7 7 -#define PE6 6 -#define PE5 5 -#define PE4 4 -#define PE3 3 -#define PE2 2 -#define PE1 1 -#define PE0 0 - -/* Port E Data Direction Register - DDRE */ -#define DDE7 7 -#define DDE6 6 -#define DDE5 5 -#define DDE4 4 -#define DDE3 3 -#define DDE2 2 -#define DDE1 1 -#define DDE0 0 - -/* Port E Input Pins - PINE */ -#define PINE7 7 -#define PINE6 6 -#define PINE5 5 -#define PINE4 4 -#define PINE3 3 -#define PINE2 2 -#define PINE1 1 -#define PINE0 0 - -/* Port F Data Register - PORTF */ -#define PF7 7 -#define PF6 6 -#define PF5 5 -#define PF4 4 -#define PF3 3 -#define PF2 2 -#define PF1 1 -#define PF0 0 - -/* Port F Data Direction Register - DDRF */ -#define DDF7 7 -#define DDF6 6 -#define DDF5 5 -#define DDF4 4 -#define DDF3 3 -#define DDF2 2 -#define DDF1 1 -#define DDF0 0 - -/* Port F Input Pins - PINF */ -#define PINF7 7 -#define PINF6 6 -#define PINF5 5 -#define PINF4 4 -#define PINF3 3 -#define PINF2 2 -#define PINF1 1 -#define PINF0 0 - -/* Port G Data Register - PORTG */ -#define PG4 4 -#define PG3 3 -#define PG2 2 -#define PG1 1 -#define PG0 0 - -/* Port G Data Direction Register - DDRG */ -#define DDG4 4 -#define DDG3 3 -#define DDG2 2 -#define DDG1 1 -#define DDG0 0 - -/* Port G Input Pins - PING */ -#define PING4 4 -#define PING3 3 -#define PING2 2 -#define PING1 1 -#define PING0 0 - -/* EEPROM Control Register */ -#define EERIE 3 -#define EEMWE 2 -#define EEWE 1 -#define EERE 0 - -/* Constants */ -#define SPM_PAGESIZE 256 -#define RAMEND 0x10FF /* Last On-Chip SRAM Location */ -#define XRAMEND 0xFFFF -#define E2END 0x0FFF -#define E2PAGESIZE 8 -#define FLASHEND 0x1FFFF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_BODEN (unsigned char)~_BV(6) -#define FUSE_BODLEVEL (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL1 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_CKOPT (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_JTAGEN (unsigned char)~_BV(6) -#define FUSE_OCDEN (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_SPIEN & FUSE_JTAGEN) - -/* Extended Fuse Byte */ -#define FUSE_WDTON (unsigned char)~_BV(0) -#define FUSE_M103C (unsigned char)~_BV(1) -#define EFUSE_DEFAULT (FUSE_M103C) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x97 -#define SIGNATURE_2 0x02 - - -#endif /* _AVR_IOM128_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom1280.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom1280.h deleted file mode 100644 index 855dd47aa..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom1280.h +++ /dev/null @@ -1,94 +0,0 @@ -/* Copyright (c) 2005 Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iom1280.h,v 1.2.2.5 2008/10/17 23:27:46 arcanum Exp $ */ - -/* avr/iom1280.h - definitions for ATmega1280 */ - -#ifndef _AVR_IOM1280_H_ -#define _AVR_IOM1280_H_ 1 - -#include - -/* Constants */ -#define SPM_PAGESIZE 256 -#define RAMEND 0x21FF -#define XRAMEND 0xFFFF -#define E2END 0xFFF -#define E2PAGESIZE 8 -#define FLASHEND 0x1FFFF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_JTAGEN (unsigned char)~_BV(6) -#define FUSE_OCDEN (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_SPIEN & FUSE_JTAGEN) - -/* Extended Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x97 -#define SIGNATURE_2 0x03 - - -#endif /* _AVR_IOM1280_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom1281.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom1281.h deleted file mode 100644 index 273fc5312..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom1281.h +++ /dev/null @@ -1,94 +0,0 @@ -/* Copyright (c) 2005 Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iom1281.h,v 1.2.2.5 2008/10/17 23:27:47 arcanum Exp $ */ - -/* avr/iom1281.h - definitions for ATmega1281 */ - -#ifndef _AVR_IOM1281_H_ -#define _AVR_IOM1281_H_ 1 - -#include - -/* Constants */ -#define SPM_PAGESIZE 256 -#define RAMEND 0x21FF -#define XRAMEND 0xFFFF -#define E2END 0xFFF -#define E2PAGESIZE 8 -#define FLASHEND 0x1FFFF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_JTAGEN (unsigned char)~_BV(6) -#define FUSE_OCDEN (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_SPIEN & FUSE_JTAGEN) - -/* Extended Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x97 -#define SIGNATURE_2 0x04 - - -#endif /* _AVR_IOM1281_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom1284p.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom1284p.h deleted file mode 100644 index ae3671d95..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom1284p.h +++ /dev/null @@ -1,1132 +0,0 @@ -/* Copyright (c) 2007 Atmel Corporation - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. -*/ - -/* $Id: iom1284p.h,v 1.2.2.11 2008/10/17 23:27:47 arcanum Exp $ */ - -/* avr/iom1284p.h - definitions for ATmega1284P. */ - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iom1284p.h" -#else -# error "Attempt to include more than one file." -#endif - - -#ifndef _AVR_IOM1284P_H_ -#define _AVR_IOM1284P_H_ 1 - - -/* Registers and associated bit numbers */ - -#define PINA _SFR_IO8(0x00) -#define PINA0 0 -#define PINA1 1 -#define PINA2 2 -#define PINA3 3 -#define PINA4 4 -#define PINA5 5 -#define PINA6 6 -#define PINA7 7 - -#define DDRA _SFR_IO8(0x01) -#define DDA0 0 -#define DDA1 1 -#define DDA2 2 -#define DDA3 3 -#define DDA4 4 -#define DDA5 5 -#define DDA6 6 -#define DDA7 7 - -#define PORTA _SFR_IO8(0x02) -#define PORTA0 0 -#define PORTA1 1 -#define PORTA2 2 -#define PORTA3 3 -#define PORTA4 4 -#define PORTA5 5 -#define PORTA6 6 -#define PORTA7 7 - -#define PINB _SFR_IO8(0x03) -#define PINB0 0 -#define PINB1 1 -#define PINB2 2 -#define PINB3 3 -#define PINB4 4 -#define PINB5 5 -#define PINB6 6 -#define PINB7 7 - -#define DDRB _SFR_IO8(0x04) -#define DDB0 0 -#define DDB1 1 -#define DDB2 2 -#define DDB3 3 -#define DDB4 4 -#define DDB5 5 -#define DDB6 6 -#define DDB7 7 - -#define PORTB _SFR_IO8(0x05) -#define PORTB0 0 -#define PORTB1 1 -#define PORTB2 2 -#define PORTB3 3 -#define PORTB4 4 -#define PORTB5 5 -#define PORTB6 6 -#define PORTB7 7 - -#define PINC _SFR_IO8(0x06) -#define PINC0 0 -#define PINC1 1 -#define PINC2 2 -#define PINC3 3 -#define PINC4 4 -#define PINC5 5 -#define PINC6 6 -#define PINC7 7 - -#define DDRC _SFR_IO8(0x07) -#define DDC0 0 -#define DDC1 1 -#define DDC2 2 -#define DDC3 3 -#define DDC4 4 -#define DDC5 5 -#define DDC6 6 -#define DDC7 7 - -#define PORTC _SFR_IO8(0x08) -#define PORTC0 0 -#define PORTC1 1 -#define PORTC2 2 -#define PORTC3 3 -#define PORTC4 4 -#define PORTC5 5 -#define PORTC6 6 -#define PORTC7 7 - -#define PIND _SFR_IO8(0x09) -#define PIND0 0 -#define PIND1 1 -#define PIND2 2 -#define PIND3 3 -#define PIND4 4 -#define PIND5 5 -#define PIND6 6 -#define PIND7 7 - -#define DDRD _SFR_IO8(0x0A) -#define DDD0 0 -#define DDD1 1 -#define DDD2 2 -#define DDD3 3 -#define DDD4 4 -#define DDD5 5 -#define DDD6 6 -#define DDD7 7 - -#define PORTD _SFR_IO8(0x0B) -#define PORTD0 0 -#define PORTD1 1 -#define PORTD2 2 -#define PORTD3 3 -#define PORTD4 4 -#define PORTD5 5 -#define PORTD6 6 -#define PORTD7 7 - -#define TIFR0 _SFR_IO8(0x15) -#define TOV0 0 -#define OCF0A 1 -#define OCF0B 2 - -#define TIFR1 _SFR_IO8(0x16) -#define TOV1 0 -#define OCF1A 1 -#define OCF1B 2 -#define ICF1 5 - -#define TIFR2 _SFR_IO8(0x17) -#define TOV2 0 -#define OCF2A 1 -#define OCF2B 2 - -#define TIFR3 _SFR_IO8(0x18) -#define TOV3 0 -#define OCF3A 1 -#define OCF3B 2 -#define ICF3 5 - -#define PCIFR _SFR_IO8(0x1B) -#define PCIF0 0 -#define PCIF1 1 -#define PCIF2 2 -#define PCIF3 3 - -#define EIFR _SFR_IO8(0x1C) -#define INTF0 0 -#define INTF1 1 -#define INTF2 2 - -#define EIMSK _SFR_IO8(0x1D) -#define INT0 0 -#define INT1 1 -#define INT2 2 - -#define GPIOR0 _SFR_IO8(0x1E) -#define GPIOR00 0 -#define GPIOR01 1 -#define GPIOR02 2 -#define GPIOR03 3 -#define GPIOR04 4 -#define GPIOR05 5 -#define GPIOR06 6 -#define GPIOR07 7 - -#define EECR _SFR_IO8(0x1F) -#define EERE 0 -#define EEPE 1 -#define EEMPE 2 -#define EERIE 3 -#define EEPM0 4 -#define EEPM1 5 - -#define EEDR _SFR_IO8(0x20) -#define EEDR0 0 -#define EEDR1 1 -#define EEDR2 2 -#define EEDR3 3 -#define EEDR4 4 -#define EEDR5 5 -#define EEDR6 6 -#define EEDR7 7 - -#define EEAR _SFR_IO16(0x21) - -#define EEARL _SFR_IO8(0x21) -#define EEAR0 0 -#define EEAR1 1 -#define EEAR2 2 -#define EEAR3 3 -#define EEAR4 4 -#define EEAR5 5 -#define EEAR6 6 -#define EEAR7 7 - -#define EEARH _SFR_IO8(0x22) -#define EEAR8 0 -#define EEAR9 1 -#define EEAR10 2 -#define EEAR11 3 - -#define GTCCR _SFR_IO8(0x23) -#define PSRSYNC 0 -#define PSRASY 1 -#define TSM 7 - -#define TCCR0A _SFR_IO8(0x24) -#define WGM00 0 -#define WGM01 1 -#define COM0B0 4 -#define COM0B1 5 -#define COM0A0 6 -#define COM0A1 7 - -#define TCCR0B _SFR_IO8(0x25) -#define CS00 0 -#define CS01 1 -#define CS02 2 -#define WGM02 3 -#define FOC0B 6 -#define FOC0A 7 - -#define TCNT0 _SFR_IO8(0x26) -#define TCNT0_0 0 -#define TCNT0_1 1 -#define TCNT0_2 2 -#define TCNT0_3 3 -#define TCNT0_4 4 -#define TCNT0_5 5 -#define TCNT0_6 6 -#define TCNT0_7 7 - -#define OCR0A _SFR_IO8(0x27) -#define OCROA_0 0 -#define OCROA_1 1 -#define OCROA_2 2 -#define OCROA_3 3 -#define OCROA_4 4 -#define OCROA_5 5 -#define OCROA_6 6 -#define OCROA_7 7 - -#define OCR0B _SFR_IO8(0x28) -#define OCR0B_0 0 -#define OCR0B_1 1 -#define OCR0B_2 2 -#define OCR0B_3 3 -#define OCR0B_4 4 -#define OCR0B_5 5 -#define OCR0B_6 6 -#define OCR0B_7 7 - -#define GPIOR1 _SFR_IO8(0x2A) -#define GPIOR10 0 -#define GPIOR11 1 -#define GPIOR12 2 -#define GPIOR13 3 -#define GPIOR14 4 -#define GPIOR15 5 -#define GPIOR16 6 -#define GPIOR17 7 - -#define GPIOR2 _SFR_IO8(0x2B) -#define GPIOR20 0 -#define GPIOR21 1 -#define GPIOR22 2 -#define GPIOR23 3 -#define GPIOR24 4 -#define GPIOR25 5 -#define GPIOR26 6 -#define GPIOR27 7 - -#define SPCR _SFR_IO8(0x2C) -#define SPR0 0 -#define SPR1 1 -#define CPHA 2 -#define CPOL 3 -#define MSTR 4 -#define DORD 5 -#define SPE 6 -#define SPIE 7 - -#define SPSR _SFR_IO8(0x2D) -#define SPI2X 0 -#define WCOL 6 -#define SPIF 7 - -#define SPDR _SFR_IO8(0x2E) -#define SPDR0 0 -#define SPDR1 1 -#define SPDR2 2 -#define SPDR3 3 -#define SPDR4 4 -#define SPDR5 5 -#define SPDR6 6 -#define SPDR7 7 - -#define ACSR _SFR_IO8(0x30) -#define ACIS0 0 -#define ACIS1 1 -#define ACIC 2 -#define ACIE 3 -#define ACI 4 -#define ACO 5 -#define ACBG 6 -#define ACD 7 - -#define OCDR _SFR_IO8(0x31) -#define OCDR0 0 -#define OCDR1 1 -#define OCDR2 2 -#define OCDR3 3 -#define OCDR4 4 -#define OCDR5 5 -#define OCDR6 6 -#define OCDR7 7 - -#define SMCR _SFR_IO8(0x33) -#define SE 0 -#define SM0 1 -#define SM1 2 -#define SM2 3 - -#define MCUSR _SFR_IO8(0x34) -#define PORF 0 -#define EXTRF 1 -#define BORF 2 -#define WDRF 3 -#define JTRF 4 - -#define MCUCR _SFR_IO8(0x35) -#define IVCE 0 -#define IVSEL 1 -#define PUD 4 -#define BODSE 5 -#define BODS 6 -#define JTD 7 - -#define SPMCSR _SFR_IO8(0x37) -#define SPMEN 0 -#define PGERS 1 -#define PGWRT 2 -#define BLBSET 3 -#define RWWSRE 4 -#define SIGRD 5 -#define RWWSB 6 -#define SPMIE 7 - -#define RAMPZ _SFR_IO8(0x3B) -#define RAMPZ0 0 - -#define WDTCSR _SFR_MEM8(0x60) -#define WDP0 0 -#define WDP1 1 -#define WDP2 2 -#define WDE 3 -#define WDCE 4 -#define WDP3 5 -#define WDIE 6 -#define WDIF 7 - -#define CLKPR _SFR_MEM8(0x61) -#define CLKPS0 0 -#define CLKPS1 1 -#define CLKPS2 2 -#define CLKPS3 3 -#define CLKPCE 7 - -#define PRR0 _SFR_MEM8(0x64) -#define PRADC 0 -#define PRUSART0 1 -#define PRSPI 2 -#define PRTIM1 3 -#define PRUSART1 4 -#define PRTIM0 5 -#define PRTIM2 6 -#define PRTWI 7 - -#define PRR1 _SFR_MEM8(0x65) -#define PRTIM3 0 - -#define OSCCAL _SFR_MEM8(0x66) -#define CAL0 0 -#define CAL1 1 -#define CAL2 2 -#define CAL3 3 -#define CAL4 4 -#define CAL5 5 -#define CAL6 6 -#define CAL7 7 - -#define PCICR _SFR_MEM8(0x68) -#define PCIE0 0 -#define PCIE1 1 -#define PCIE2 2 -#define PCIE3 3 - -#define EICRA _SFR_MEM8(0x69) -#define ISC00 0 -#define ISC01 1 -#define ISC10 2 -#define ISC11 3 -#define ISC20 4 -#define ISC21 5 - -#define PCMSK0 _SFR_MEM8(0x6B) -#define PCINT0 0 -#define PCINT1 1 -#define PCINT2 2 -#define PCINT3 3 -#define PCINT4 4 -#define PCINT5 5 -#define PCINT6 6 -#define PCINT7 7 - -#define PCMSK1 _SFR_MEM8(0x6C) -#define PCINT8 0 -#define PCINT9 1 -#define PCINT10 2 -#define PCINT11 3 -#define PCINT12 4 -#define PCINT13 5 -#define PCINT14 6 -#define PCINT15 7 - -#define PCMSK2 _SFR_MEM8(0x6D) -#define PCINT16 0 -#define PCINT17 1 -#define PCINT18 2 -#define PCINT19 3 -#define PCINT20 4 -#define PCINT21 5 -#define PCINT22 6 -#define PCINT23 7 - -#define TIMSK0 _SFR_MEM8(0x6E) -#define TOIE0 0 -#define OCIE0A 1 -#define OCIE0B 2 - -#define TIMSK1 _SFR_MEM8(0x6F) -#define TOIE1 0 -#define OCIE1A 1 -#define OCIE1B 2 -#define ICIE1 5 - -#define TIMSK2 _SFR_MEM8(0x70) -#define TOIE2 0 -#define OCIE2A 1 -#define OCIE2B 2 - -#define TIMSK3 _SFR_MEM8(0x71) -#define TOIE3 0 -#define OCIE3A 1 -#define OCIE3B 2 -#define ICIE3 5 - -#define PCMSK3 _SFR_MEM8(0x73) -#define PCINT24 0 -#define PCINT25 1 -#define PCINT26 2 -#define PCINT27 3 -#define PCINT28 4 -#define PCINT29 5 -#define PCINT30 6 -#define PCINT31 7 - -#ifndef __ASSEMBLER__ -#define ADC _SFR_MEM16(0x78) -#endif -#define ADCW _SFR_MEM16(0x78) - -#define ADCL _SFR_MEM8(0x78) -#define ADCL0 0 -#define ADCL1 1 -#define ADCL2 2 -#define ADCL3 3 -#define ADCL4 4 -#define ADCL5 5 -#define ADCL6 6 -#define ADCL7 7 - -#define ADCH _SFR_MEM8(0x79) -#define ADCH0 0 -#define ADCH1 1 -#define ADCH2 2 -#define ADCH3 3 -#define ADCH4 4 -#define ADCH5 5 -#define ADCH6 6 -#define ADCH7 7 - -#define ADCSRA _SFR_MEM8(0x7A) -#define ADPS0 0 -#define ADPS1 1 -#define ADPS2 2 -#define ADIE 3 -#define ADIF 4 -#define ADATE 5 -#define ADSC 6 -#define ADEN 7 - -#define ADCSRB _SFR_MEM8(0x7B) -#define ADTS0 0 -#define ADTS1 1 -#define ADTS2 2 -#define ACME 6 - -#define ADMUX _SFR_MEM8(0x7C) -#define MUX0 0 -#define MUX1 1 -#define MUX2 2 -#define MUX3 3 -#define MUX4 4 -#define ADLAR 5 -#define REFS0 6 -#define REFS1 7 - -#define DIDR0 _SFR_MEM8(0x7E) -#define ADC0D 0 -#define ADC1D 1 -#define ADC2D 2 -#define ADC3D 3 -#define ADC4D 4 -#define ADC5D 5 -#define ADC6D 6 -#define ADC7D 7 - -#define DIDR1 _SFR_MEM8(0x7F) -#define AIN0D 0 -#define AIN1D 1 - -#define TCCR1A _SFR_MEM8(0x80) -#define WGM10 0 -#define WGM11 1 -#define COM1B0 4 -#define COM1B1 5 -#define COM1A0 6 -#define COM1A1 7 - -#define TCCR1B _SFR_MEM8(0x81) -#define CS10 0 -#define CS11 1 -#define CS12 2 -#define WGM12 3 -#define WGM13 4 -#define ICES1 6 -#define ICNC1 7 - -#define TCCR1C _SFR_MEM8(0x82) -#define FOC1B 6 -#define FOC1A 7 - -#define TCNT1 _SFR_MEM16(0x84) - -#define TCNT1L _SFR_MEM8(0x84) -#define TCNT1L0 0 -#define TCNT1L1 1 -#define TCNT1L2 2 -#define TCNT1L3 3 -#define TCNT1L4 4 -#define TCNT1L5 5 -#define TCNT1L6 6 -#define TCNT1L7 7 - -#define TCNT1H _SFR_MEM8(0x85) -#define TCNT1H0 0 -#define TCNT1H1 1 -#define TCNT1H2 2 -#define TCNT1H3 3 -#define TCNT1H4 4 -#define TCNT1H5 5 -#define TCNT1H6 6 -#define TCNT1H7 7 - -#define ICR1 _SFR_MEM16(0x86) - -#define ICR1L _SFR_MEM8(0x86) -#define ICR1L0 0 -#define ICR1L1 1 -#define ICR1L2 2 -#define ICR1L3 3 -#define ICR1L4 4 -#define ICR1L5 5 -#define ICR1L6 6 -#define ICR1L7 7 - -#define ICR1H _SFR_MEM8(0x87) -#define ICR1H0 0 -#define ICR1H1 1 -#define ICR1H2 2 -#define ICR1H3 3 -#define ICR1H4 4 -#define ICR1H5 5 -#define ICR1H6 6 -#define ICR1H7 7 - -#define OCR1A _SFR_MEM16(0x88) - -#define OCR1AL _SFR_MEM8(0x88) -#define OCR1AL0 0 -#define OCR1AL1 1 -#define OCR1AL2 2 -#define OCR1AL3 3 -#define OCR1AL4 4 -#define OCR1AL5 5 -#define OCR1AL6 6 -#define OCR1AL7 7 - -#define OCR1AH _SFR_MEM8(0x89) -#define OCR1AH0 0 -#define OCR1AH1 1 -#define OCR1AH2 2 -#define OCR1AH3 3 -#define OCR1AH4 4 -#define OCR1AH5 5 -#define OCR1AH6 6 -#define OCR1AH7 7 - -#define OCR1B _SFR_MEM16(0x8A) - -#define OCR1BL _SFR_MEM8(0x8A) -#define OCR1AL0 0 -#define OCR1AL1 1 -#define OCR1AL2 2 -#define OCR1AL3 3 -#define OCR1AL4 4 -#define OCR1AL5 5 -#define OCR1AL6 6 -#define OCR1AL7 7 - -#define OCR1BH _SFR_MEM8(0x8B) -#define OCR1AH0 0 -#define OCR1AH1 1 -#define OCR1AH2 2 -#define OCR1AH3 3 -#define OCR1AH4 4 -#define OCR1AH5 5 -#define OCR1AH6 6 -#define OCR1AH7 7 - -#define TCCR3A _SFR_MEM8(0x90) -#define WGM30 0 -#define WGM31 1 -#define COM3B0 4 -#define COM3B1 5 -#define COM3A0 6 -#define COM3A1 7 - -#define TCCR3B _SFR_MEM8(0x91) -#define CS30 0 -#define CS31 1 -#define CS32 2 -#define WGM32 3 -#define WGM33 4 -#define ICES3 6 -#define ICNC3 7 - -#define TCCR3C _SFR_MEM8(0x92) -#define FOC3B 6 -#define FOC3A 7 - -#define TCNT3 _SFR_MEM16(0x94) - -#define TCNT3L _SFR_MEM8(0x94) -#define TCNT3L0 0 -#define TCNT3L1 1 -#define TCNT3L2 2 -#define TCNT3L3 3 -#define TCNT3L4 4 -#define TCNT3L5 5 -#define TCNT3L6 6 -#define TCNT3L7 7 - -#define TCNT3H _SFR_MEM8(0x95) -#define TCNT3H0 0 -#define TCNT3H1 1 -#define TCNT3H2 2 -#define TCNT3H3 3 -#define TCNT3H4 4 -#define TCNT3H5 5 -#define TCNT3H6 6 -#define TCNT3H7 7 - -#define ICR3 _SFR_MEM16(0x96) - -#define ICR3L _SFR_MEM8(0x96) -#define ICR3L0 0 -#define ICR3L1 1 -#define ICR3L2 2 -#define ICR3L3 3 -#define ICR3L4 4 -#define ICR3L5 5 -#define ICR3L6 6 -#define ICR3L7 7 - -#define ICR3H _SFR_MEM8(0x97) -#define ICR3H0 0 -#define ICR3H1 1 -#define ICR3H2 2 -#define ICR3H3 3 -#define ICR3H4 4 -#define ICR3H5 5 -#define ICR3H6 6 -#define ICR3H7 7 - -#define OCR3A _SFR_MEM16(0x98) - -#define OCR3AL _SFR_MEM8(0x98) -#define OCR3AL0 0 -#define OCR3AL1 1 -#define OCR3AL2 2 -#define OCR3AL3 3 -#define OCR3AL4 4 -#define OCR3AL5 5 -#define OCR3AL6 6 -#define OCR3AL7 7 - -#define OCR3AH _SFR_MEM8(0x99) -#define OCR3AH0 0 -#define OCR3AH1 1 -#define OCR3AH2 2 -#define OCR3AH3 3 -#define OCR3AH4 4 -#define OCR3AH5 5 -#define OCR3AH6 6 -#define OCR3AH7 7 - -#define OCR3B _SFR_MEM16(0x9A) - -#define OCR3BL _SFR_MEM8(0x9A) -#define OCR3AL0 0 -#define OCR3AL1 1 -#define OCR3AL2 2 -#define OCR3AL3 3 -#define OCR3AL4 4 -#define OCR3AL5 5 -#define OCR3AL6 6 -#define OCR3AL7 7 - -#define OCR3BH _SFR_MEM8(0x9B) -#define OCR3AH0 0 -#define OCR3AH1 1 -#define OCR3AH2 2 -#define OCR3AH3 3 -#define OCR3AH4 4 -#define OCR3AH5 5 -#define OCR3AH6 6 -#define OCR3AH7 7 - -#define TCCR2A _SFR_MEM8(0xB0) -#define WGM20 0 -#define WGM21 1 -#define COM2B0 4 -#define COM2B1 5 -#define COM2A0 6 -#define COM2A1 7 - -#define TCCR2B _SFR_MEM8(0xB1) -#define CS20 0 -#define CS21 1 -#define CS22 2 -#define WGM22 3 -#define FOC2B 6 -#define FOC2A 7 - -#define TCNT2 _SFR_MEM8(0xB2) -#define TCNT2_0 0 -#define TCNT2_1 1 -#define TCNT2_2 2 -#define TCNT2_3 3 -#define TCNT2_4 4 -#define TCNT2_5 5 -#define TCNT2_6 6 -#define TCNT2_7 7 - -#define OCR2A _SFR_MEM8(0xB3) -#define OCR2_0 0 -#define OCR2_1 1 -#define OCR2_2 2 -#define OCR2_3 3 -#define OCR2_4 4 -#define OCR2_5 5 -#define OCR2_6 6 -#define OCR2_7 7 - -#define OCR2B _SFR_MEM8(0xB4) -#define OCR2_0 0 -#define OCR2_1 1 -#define OCR2_2 2 -#define OCR2_3 3 -#define OCR2_4 4 -#define OCR2_5 5 -#define OCR2_6 6 -#define OCR2_7 7 - -#define ASSR _SFR_MEM8(0xB6) -#define TCR2BUB 0 -#define TCR2AUB 1 -#define OCR2BUB 2 -#define OCR2AUB 3 -#define TCN2UB 4 -#define AS2 5 -#define EXCLK 6 - -#define TWBR _SFR_MEM8(0xB8) -#define TWBR0 0 -#define TWBR1 1 -#define TWBR2 2 -#define TWBR3 3 -#define TWBR4 4 -#define TWBR5 5 -#define TWBR6 6 -#define TWBR7 7 - -#define TWSR _SFR_MEM8(0xB9) -#define TWPS0 0 -#define TWPS1 1 -#define TWS3 3 -#define TWS4 4 -#define TWS5 5 -#define TWS6 6 -#define TWS7 7 - -#define TWAR _SFR_MEM8(0xBA) -#define TWGCE 0 -#define TWA0 1 -#define TWA1 2 -#define TWA2 3 -#define TWA3 4 -#define TWA4 5 -#define TWA5 6 -#define TWA6 7 - -#define TWDR _SFR_MEM8(0xBB) -#define TWD0 0 -#define TWD1 1 -#define TWD2 2 -#define TWD3 3 -#define TWD4 4 -#define TWD5 5 -#define TWD6 6 -#define TWD7 7 - -#define TWCR _SFR_MEM8(0xBC) -#define TWIE 0 -#define TWEN 2 -#define TWWC 3 -#define TWSTO 4 -#define TWSTA 5 -#define TWEA 6 -#define TWINT 7 - -#define TWAMR _SFR_MEM8(0xBD) -#define TWAM0 1 -#define TWAM1 2 -#define TWAM2 3 -#define TWAM3 4 -#define TWAM4 5 -#define TWAM5 6 -#define TWAM6 7 - -#define UCSR0A _SFR_MEM8(0xC0) -#define MPCM0 0 -#define U2X0 1 -#define UPE0 2 -#define DOR0 3 -#define FE0 4 -#define UDRE0 5 -#define TXC0 6 -#define RXC0 7 - -#define UCSR0B _SFR_MEM8(0xC1) -#define TXB80 0 -#define RXB80 1 -#define UCSZ02 2 -#define TXEN0 3 -#define RXEN0 4 -#define UDRIE0 5 -#define TXCIE0 6 -#define RXCIE0 7 - -#define UCSR0C _SFR_MEM8(0xC2) -#define UCPOL0 0 -#define UCSZ00 1 -#define UCSZ01 2 -#define USBS0 3 -#define UPM00 4 -#define UPM01 5 -#define UMSEL00 6 -#define UMSEL01 7 - -#define UBRR0 _SFR_MEM16(0xC4) - -#define UBRR0L _SFR_MEM8(0xC4) -#define UBRR0_0 0 -#define UBRR0_1 1 -#define UBRR0_2 2 -#define UBRR0_3 3 -#define UBRR0_4 4 -#define UBRR0_5 5 -#define UBRR0_6 6 -#define UBRR0_7 7 - -#define UBRR0H _SFR_MEM8(0xC5) -#define UBRR0_8 0 -#define UBRR0_9 1 -#define UBRR0_10 2 -#define UBRR0_11 3 - -#define UDR0 _SFR_MEM8(0xC6) -#define UDR0_0 0 -#define UDR0_1 1 -#define UDR0_2 2 -#define UDR0_3 3 -#define UDR0_4 4 -#define UDR0_5 5 -#define UDR0_6 6 -#define UDR0_7 7 - -#define UCSR1A _SFR_MEM8(0xC8) -#define MPCM1 0 -#define U2X1 1 -#define UPE1 2 -#define DOR1 3 -#define FE1 4 -#define UDRE1 5 -#define TXC1 6 -#define RXC1 7 - -#define UCSR1B _SFR_MEM8(0xC9) -#define TXB81 0 -#define RXB81 1 -#define UCSZ12 2 -#define TXEN1 3 -#define RXEN1 4 -#define UDRIE1 5 -#define TXCIE1 6 -#define RXCIE1 7 - -#define UCSR1C _SFR_MEM8(0xCA) -#define UCPOL1 0 -#define UCSZ10 1 -#define UCSZ11 2 -#define USBS1 3 -#define UPM10 4 -#define UPM11 5 -#define UMSEL10 6 -#define UMSEL11 7 - -#define UBRR1 _SFR_MEM16(0xCC) - -#define UBRR1L _SFR_MEM8(0xCC) -#define UBRR1_0 0 -#define UBRR1_1 1 -#define UBRR1_2 2 -#define UBRR1_3 3 -#define UBRR1_4 4 -#define UBRR1_5 5 -#define UBRR1_6 6 -#define UBRR1_7 7 - -#define UBRR1H _SFR_MEM8(0xCD) -#define UBRR1_8 0 -#define UBRR1_9 1 -#define UBRR1_10 2 -#define UBRR1_11 3 - -#define UDR1 _SFR_MEM8(0xCE) -#define UDR1_0 0 -#define UDR1_1 1 -#define UDR1_2 2 -#define UDR1_3 3 -#define UDR1_4 4 -#define UDR1_5 5 -#define UDR1_6 6 -#define UDR1_7 7 - - -/* Interrupt Vectors */ -/* Interrupt Vector 0 is the reset vector. */ - -#define INT0_vect _VECTOR(1) /* External Interrupt Request 0 */ -#define INT1_vect _VECTOR(2) /* External Interrupt Request 1 */ -#define INT2_vect _VECTOR(3) /* External Interrupt Request 2 */ -#define PCINT0_vect _VECTOR(4) /* Pin Change Interrupt Request 0 */ -#define PCINT1_vect _VECTOR(5) /* Pin Change Interrupt Request 1 */ -#define PCINT2_vect _VECTOR(6) /* Pin Change Interrupt Request 2 */ -#define PCINT3_vect _VECTOR(7) /* Pin Change Interrupt Request 3 */ -#define WDT_vect _VECTOR(8) /* Watchdog Time-out Interrupt */ -#define TIMER2_COMPA_vect _VECTOR(9) /* Timer/Counter2 Compare Match A */ -#define TIMER2_COMPB_vect _VECTOR(10) /* Timer/Counter2 Compare Match B */ -#define TIMER2_OVF_vect _VECTOR(11) /* Timer/Counter2 Overflow */ -#define TIMER1_CAPT_vect _VECTOR(12) /* Timer/Counter1 Capture Event */ -#define TIMER1_COMPA_vect _VECTOR(13) /* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPB_vect _VECTOR(14) /* Timer/Counter1 Compare Match B */ -#define TIMER1_OVF_vect _VECTOR(15) /* Timer/Counter1 Overflow */ -#define TIMER0_COMPA_vect _VECTOR(16) /* Timer/Counter0 Compare Match A */ -#define TIMER0_COMPB_vect _VECTOR(17) /* Timer/Counter0 Compare Match B */ -#define TIMER0_OVF_vect _VECTOR(18) /* Timer/Counter0 Overflow */ -#define SPI_STC_vect _VECTOR(19) /* SPI Serial Transfer Complete */ -#define USART0_RX_vect _VECTOR(20) /* USART0, Rx Complete */ -#define USART0_UDRE_vect _VECTOR(21) /* USART0 Data register Empty */ -#define USART0_TX_vect _VECTOR(22) /* USART0, Tx Complete */ -#define ANALOG_COMP_vect _VECTOR(23) /* Analog Comparator */ -#define ADC_vect _VECTOR(24) /* ADC Conversion Complete */ -#define EE_READY_vect _VECTOR(25) /* EEPROM Ready */ -#define TWI_vect _VECTOR(26) /* 2-wire Serial Interface */ -#define SPM_READY_vect _VECTOR(27) /* Store Program Memory Read */ -#define USART1_RX_vect _VECTOR(28) /* USART1 RX complete */ -#define USART1_UDRE_vect _VECTOR(29) /* USART1 Data Register Empty */ -#define USART1_TX_vect _VECTOR(30) /* USART1 TX complete */ -#define TIMER3_CAPT_vect _VECTOR(31) /* Timer/Counter3 Capture Event */ -#define TIMER3_COMPA_vect _VECTOR(32) /* Timer/Counter3 Compare Match A */ -#define TIMER3_COMPB_vect _VECTOR(33) /* Timer/Counter3 Compare Match B */ -#define TIMER3_OVF_vect _VECTOR(34) /* Timer/Counter3 Overflow */ - -#define _VECTORS_SIZE (35 * 4) - - -/* Constants */ -#define SPM_PAGESIZE 256 -#define RAMEND 0x40FF /* Last On-Chip SRAM Location */ -#define XRAMSIZE 0 -#define XRAMEND (RAMEND + XRAMSIZE) -#define E2END 0xFFF -#define E2PAGESIZE 8 -#define FLASHEND 0x1FFFF - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) /* Select Clock Source */ -#define FUSE_CKSEL1 (unsigned char)~_BV(1) /* Select Clock Source */ -#define FUSE_CKSEL2 (unsigned char)~_BV(2) /* Select Clock Source */ -#define FUSE_CKSEL3 (unsigned char)~_BV(3) /* Select Clock Source */ -#define FUSE_SUT0 (unsigned char)~_BV(4) /* Select start-up time */ -#define FUSE_SUT1 (unsigned char)~_BV(5) /* Select start-up time */ -#define FUSE_CKOUT (unsigned char)~_BV(6) /* Clock output */ -#define FUSE_CKDIV8 (unsigned char)~_BV(7) /* Divide clock by 8 */ -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_SUT1 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) /* Select Reset Vector */ -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) /* Select Boot Size */ -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) /* Select Boot Size */ -#define FUSE_EESAVE (unsigned char)~_BV(3) /* EEPROM memory is preserved through chip erase */ -#define FUSE_WDTON (unsigned char)~_BV(4) /* Watchdog timer always on */ -#define FUSE_SPIEN (unsigned char)~_BV(5) /* Enable Serial programming and Data Downloading */ -#define FUSE_JTAGEN (unsigned char)~_BV(6) /* Enable JTAG */ -#define FUSE_OCDEN (unsigned char)~_BV(7) /* Enable OCD */ -#define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_SPIEN & FUSE_JTAGEN) - -/* Extended Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) /* Brown-out Detector trigger level */ -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) /* Brown-out Detector trigger level */ -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) /* Brown-out Detector trigger level */ -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x97 -#define SIGNATURE_2 0x05 - - -#endif /* _AVR_IOM1284P_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom16.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom16.h deleted file mode 100644 index 70b47eb1d..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom16.h +++ /dev/null @@ -1,614 +0,0 @@ -/* Copyright (c) 2004 Eric B. Weddington - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iom16.h,v 1.14.2.5 2008/10/17 23:27:47 arcanum Exp $ */ - -/* avr/iom16.h - definitions for ATmega16 */ - -#ifndef _AVR_IOM16_H_ -#define _AVR_IOM16_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iom16.h" -#else -# error "Attempt to include more than one file." -#endif - -/* Registers and associated bit numbers */ - -#define TWBR _SFR_IO8(0x00) - -#define TWSR _SFR_IO8(0x01) -#define TWPS0 0 -#define TWPS1 1 -#define TWS3 3 -#define TWS4 4 -#define TWS5 5 -#define TWS6 6 -#define TWS7 7 - -#define TWAR _SFR_IO8(0x02) -#define TWGCE 0 -#define TWA0 1 -#define TWA1 2 -#define TWA2 3 -#define TWA3 4 -#define TWA4 5 -#define TWA5 6 -#define TWA6 7 - -#define TWDR _SFR_IO8(0x03) - -/* Combine ADCL and ADCH */ -#ifndef __ASSEMBLER__ -#define ADC _SFR_IO16(0x04) -#endif -#define ADCW _SFR_IO16(0x04) -#define ADCL _SFR_IO8(0x04) -#define ADCH _SFR_IO8(0x05) - -#define ADCSRA _SFR_IO8(0x06) -#define ADPS0 0 -#define ADPS1 1 -#define ADPS2 2 -#define ADIE 3 -#define ADIF 4 -#define ADATE 5 -#define ADSC 6 -#define ADEN 7 - -#define ADMUX _SFR_IO8(0x07) -#define MUX0 0 -#define MUX1 1 -#define MUX2 2 -#define MUX3 3 -#define MUX4 4 -#define ADLAR 5 -#define REFS0 6 -#define REFS1 7 - -#define ACSR _SFR_IO8(0x08) -#define ACIS0 0 -#define ACIS1 1 -#define ACIC 2 -#define ACIE 3 -#define ACI 4 -#define ACO 5 -#define ACBG 6 -#define ACD 7 - -#define UBRRL _SFR_IO8(0x09) - -#define UCSRB _SFR_IO8(0x0A) -#define TXB8 0 -#define RXB8 1 -#define UCSZ2 2 -#define TXEN 3 -#define RXEN 4 -#define UDRIE 5 -#define TXCIE 6 -#define RXCIE 7 - -#define UCSRA _SFR_IO8(0x0B) -#define MPCM 0 -#define U2X 1 -#define PE 2 -#define DOR 3 -#define FE 4 -#define UDRE 5 -#define TXC 6 -#define RXC 7 - -#define UDR _SFR_IO8(0x0C) - -#define SPCR _SFR_IO8(0x0D) -#define SPR0 0 -#define SPR1 1 -#define CPHA 2 -#define CPOL 3 -#define MSTR 4 -#define DORD 5 -#define SPE 6 -#define SPIE 7 - -#define SPSR _SFR_IO8(0x0E) -#define SPI2X 0 -#define WCOL 6 -#define SPIF 7 - -#define SPDR _SFR_IO8(0x0F) - -#define PIND _SFR_IO8(0x10) -#define PIND0 0 -#define PIND1 1 -#define PIND2 2 -#define PIND3 3 -#define PIND4 4 -#define PIND5 5 -#define PIND6 6 -#define PIND7 7 - -#define DDRD _SFR_IO8(0x11) -#define DDD0 0 -#define DDD1 1 -#define DDD2 2 -#define DDD3 3 -#define DDD4 4 -#define DDD5 5 -#define DDD6 6 -#define DDD7 7 - -#define PORTD _SFR_IO8(0x12) -#define PD0 0 -#define PD1 1 -#define PD2 2 -#define PD3 3 -#define PD4 4 -#define PD5 5 -#define PD6 6 -#define PD7 7 - -#define PINC _SFR_IO8(0x13) -#define PINC0 0 -#define PINC1 1 -#define PINC2 2 -#define PINC3 3 -#define PINC4 4 -#define PINC5 5 -#define PINC6 6 -#define PINC7 7 - -#define DDRC _SFR_IO8(0x14) -#define DDC0 0 -#define DDC1 1 -#define DDC2 2 -#define DDC3 3 -#define DDC4 4 -#define DDC5 5 -#define DDC6 6 -#define DDC7 7 - -#define PORTC _SFR_IO8(0x15) -#define PC0 0 -#define PC1 1 -#define PC2 2 -#define PC3 3 -#define PC4 4 -#define PC5 5 -#define PC6 6 -#define PC7 7 - -#define PINB _SFR_IO8(0x16) -#define PINB0 0 -#define PINB1 1 -#define PINB2 2 -#define PINB3 3 -#define PINB4 4 -#define PINB5 5 -#define PINB6 6 -#define PINB7 7 - -#define DDRB _SFR_IO8(0x17) -#define DDB0 0 -#define DDB1 1 -#define DDB2 2 -#define DDB3 3 -#define DDB4 4 -#define DDB5 5 -#define DDB6 6 -#define DDB7 7 - -#define PORTB _SFR_IO8(0x18) -#define PB0 0 -#define PB1 1 -#define PB2 2 -#define PB3 3 -#define PB4 4 -#define PB5 5 -#define PB6 6 -#define PB7 7 - -#define PINA _SFR_IO8(0x19) -#define PINA0 0 -#define PINA1 1 -#define PINA2 2 -#define PINA3 3 -#define PINA4 4 -#define PINA5 5 -#define PINA6 6 -#define PINA7 7 - -#define DDRA _SFR_IO8(0x1A) -#define DDA0 0 -#define DDA1 1 -#define DDA2 2 -#define DDA3 3 -#define DDA4 4 -#define DDA5 5 -#define DDA6 6 -#define DDA7 7 - -#define PORTA _SFR_IO8(0x1B) -#define PA0 0 -#define PA1 1 -#define PA2 2 -#define PA3 3 -#define PA4 4 -#define PA5 5 -#define PA6 6 -#define PA7 7 - -/* EEPROM Control Register */ -#define EECR _SFR_IO8(0x1C) -#define EERE 0 -#define EEWE 1 -#define EEMWE 2 -#define EERIE 3 - -/* EEPROM Data Register */ -#define EEDR _SFR_IO8(0x1D) - -/* EEPROM Address Register */ -#define EEAR _SFR_IO16(0x1E) -#define EEARL _SFR_IO8(0x1E) -#define EEARH _SFR_IO8(0x1F) - -#define UCSRC _SFR_IO8(0x20) -#define UCPOL 0 -#define UCSZ0 1 -#define UCSZ1 2 -#define USBS 3 -#define UPM0 4 -#define UPM1 5 -#define UMSEL 6 -#define URSEL 7 - -#define UBRRH _SFR_IO8(0x20) -#define URSEL 7 - -#define WDTCR _SFR_IO8(0x21) -#define WDP0 0 -#define WDP1 1 -#define WDP2 2 -#define WDE 3 -#define WDTOE 4 - -#define ASSR _SFR_IO8(0x22) -#define TCR2UB 0 -#define OCR2UB 1 -#define TCN2UB 2 -#define AS2 3 - -#define OCR2 _SFR_IO8(0x23) - -#define TCNT2 _SFR_IO8(0x24) - -#define TCCR2 _SFR_IO8(0x25) -#define CS20 0 -#define CS21 1 -#define CS22 2 -#define WGM21 3 -#define COM20 4 -#define COM21 5 -#define WGM20 6 -#define FOC2 7 - -/* Combine ICR1L and ICR1H */ -#define ICR1 _SFR_IO16(0x26) - -#define ICR1L _SFR_IO8(0x26) -#define ICR1H _SFR_IO8(0x27) - -/* Combine OCR1BL and OCR1BH */ -#define OCR1B _SFR_IO16(0x28) - -#define OCR1BL _SFR_IO8(0x28) -#define OCR1BH _SFR_IO8(0x29) - -/* Combine OCR1AL and OCR1AH */ -#define OCR1A _SFR_IO16(0x2A) - -#define OCR1AL _SFR_IO8(0x2A) -#define OCR1AH _SFR_IO8(0x2B) - -/* Combine TCNT1L and TCNT1H */ -#define TCNT1 _SFR_IO16(0x2C) - -#define TCNT1L _SFR_IO8(0x2C) -#define TCNT1H _SFR_IO8(0x2D) - -#define TCCR1B _SFR_IO8(0x2E) -#define CS10 0 -#define CS11 1 -#define CS12 2 -#define WGM12 3 -#define WGM13 4 -#define ICES1 6 -#define ICNC1 7 - -#define TCCR1A _SFR_IO8(0x2F) -#define WGM10 0 -#define WGM11 1 -#define FOC1B 2 -#define FOC1A 3 -#define COM1B0 4 -#define COM1B1 5 -#define COM1A0 6 -#define COM1A1 7 - -/* - The ADHSM bit has been removed from all documentation, - as being not needed at all since the comparator has proven - to be fast enough even without feeding it more power. -*/ - -#define SFIOR _SFR_IO8(0x30) -#define PSR10 0 -#define PSR2 1 -#define PUD 2 -#define ACME 3 -#define ADTS0 5 -#define ADTS1 6 -#define ADTS2 7 - -#define OSCCAL _SFR_IO8(0x31) - -#define OCDR _SFR_IO8(0x31) - -#define TCNT0 _SFR_IO8(0x32) - -#define TCCR0 _SFR_IO8(0x33) -#define CS00 0 -#define CS01 1 -#define CS02 2 -#define WGM01 3 -#define COM00 4 -#define COM01 5 -#define WGM00 6 -#define FOC0 7 - -#define MCUCSR _SFR_IO8(0x34) -#define PORF 0 -#define EXTRF 1 -#define BORF 2 -#define WDRF 3 -#define JTRF 4 -#define ISC2 6 -#define JTD 7 - -#define MCUCR _SFR_IO8(0x35) -#define ISC00 0 -#define ISC01 1 -#define ISC10 2 -#define ISC11 3 -#define SM0 4 -#define SM1 5 -#define SE 6 -#define SM2 7 - -#define TWCR _SFR_IO8(0x36) -#define TWIE 0 -#define TWEN 2 -#define TWWC 3 -#define TWSTO 4 -#define TWSTA 5 -#define TWEA 6 -#define TWINT 7 - -#define SPMCR _SFR_IO8(0x37) -#define SPMEN 0 -#define PGERS 1 -#define PGWRT 2 -#define BLBSET 3 -#define RWWSRE 4 -#define RWWSB 6 -#define SPMIE 7 - -#define TIFR _SFR_IO8(0x38) -#define TOV0 0 -#define OCF0 1 -#define TOV1 2 -#define OCF1B 3 -#define OCF1A 4 -#define ICF1 5 -#define TOV2 6 -#define OCF2 7 - -#define TIMSK _SFR_IO8(0x39) -#define TOIE0 0 -#define OCIE0 1 -#define TOIE1 2 -#define OCIE1B 3 -#define OCIE1A 4 -#define TICIE1 5 -#define TOIE2 6 -#define OCIE2 7 - -#define GIFR _SFR_IO8(0x3A) -#define INTF2 5 -#define INTF0 6 -#define INTF1 7 - -#define GICR _SFR_IO8(0x3B) -#define IVCE 0 -#define IVSEL 1 -#define INT2 5 -#define INT0 6 -#define INT1 7 - -#define OCR0 _SFR_IO8(0x3C) - -/* SP [0x3D..0x3E] */ -/* SREG [0x3F] */ - - -/* Interrupt vectors */ -/* Vector 0 is the reset vector. */ -/* External Interrupt Request 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* External Interrupt Request 1 */ -#define INT1_vect _VECTOR(2) -#define SIG_INTERRUPT1 _VECTOR(2) - -/* Timer/Counter2 Compare Match */ -#define TIMER2_COMP_vect _VECTOR(3) -#define SIG_OUTPUT_COMPARE2 _VECTOR(3) - -/* Timer/Counter2 Overflow */ -#define TIMER2_OVF_vect _VECTOR(4) -#define SIG_OVERFLOW2 _VECTOR(4) - -/* Timer/Counter1 Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(5) -#define SIG_INPUT_CAPTURE1 _VECTOR(5) - -/* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPA_vect _VECTOR(6) -#define SIG_OUTPUT_COMPARE1A _VECTOR(6) - -/* Timer/Counter1 Compare Match B */ -#define TIMER1_COMPB_vect _VECTOR(7) -#define SIG_OUTPUT_COMPARE1B _VECTOR(7) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(8) -#define SIG_OVERFLOW1 _VECTOR(8) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(9) -#define SIG_OVERFLOW0 _VECTOR(9) - -/* Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(10) -#define SIG_SPI _VECTOR(10) - -/* USART, Rx Complete */ -#define USART_RXC_vect _VECTOR(11) -#define SIG_USART_RECV _VECTOR(11) -#define SIG_UART_RECV _VECTOR(11) - -/* USART Data Register Empty */ -#define USART_UDRE_vect _VECTOR(12) -#define SIG_USART_DATA _VECTOR(12) -#define SIG_UART_DATA _VECTOR(12) - -/* USART, Tx Complete */ -#define USART_TXC_vect _VECTOR(13) -#define SIG_USART_TRANS _VECTOR(13) -#define SIG_UART_TRANS _VECTOR(13) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(14) -#define SIG_ADC _VECTOR(14) - -/* EEPROM Ready */ -#define EE_RDY_vect _VECTOR(15) -#define SIG_EEPROM_READY _VECTOR(15) - -/* Analog Comparator */ -#define ANA_COMP_vect _VECTOR(16) -#define SIG_COMPARATOR _VECTOR(16) - -/* 2-wire Serial Interface */ -#define TWI_vect _VECTOR(17) -#define SIG_2WIRE_SERIAL _VECTOR(17) - -/* External Interrupt Request 2 */ -#define INT2_vect _VECTOR(18) -#define SIG_INTERRUPT2 _VECTOR(18) - -/* Timer/Counter0 Compare Match */ -#define TIMER0_COMP_vect _VECTOR(19) -#define SIG_OUTPUT_COMPARE0 _VECTOR(19) - -/* Store Program Memory Ready */ -#define SPM_RDY_vect _VECTOR(20) -#define SIG_SPM_READY _VECTOR(20) - -#define _VECTORS_SIZE 84 - - -/* Constants */ -#define SPM_PAGESIZE 128 -#define RAMEND 0x45F -#define XRAMEND 0x45F -#define E2END 0x1FF -#define E2PAGESIZE 4 -#define FLASHEND 0x3FFF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 2 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_BODEN (unsigned char)~_BV(6) -#define FUSE_BODLEVEL (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL1 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_CKOPT (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_JTAGEN (unsigned char)~_BV(6) -#define FUSE_OCDEN (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_SPIEN & FUSE_JTAGEN) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x94 -#define SIGNATURE_2 0x03 - - -#endif /* _AVR_IOM16_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom161.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom161.h deleted file mode 100644 index 118651cfb..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom161.h +++ /dev/null @@ -1,673 +0,0 @@ -/* Copyright (c) 2002, Marek Michalkiewicz - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iom161.h,v 1.10.2.5 2008/10/17 23:27:47 arcanum Exp $ */ - -/* avr/iom161.h - definitions for ATmega161 */ - -#ifndef _AVR_IOM161_H_ -#define _AVR_IOM161_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iom161.h" -#else -# error "Attempt to include more than one file." -#endif - -/* I/O registers */ - -/* UART1 Baud Rate Register */ -#define UBRR1 _SFR_IO8(0x00) - -/* UART1 Control and Status Registers */ -#define UCSR1B _SFR_IO8(0x01) -#define UCSR1A _SFR_IO8(0x02) - -/* UART1 I/O Data Register */ -#define UDR1 _SFR_IO8(0x03) - -/* 0x04 reserved */ - -/* Input Pins, Port E */ -#define PINE _SFR_IO8(0x05) - -/* Data Direction Register, Port E */ -#define DDRE _SFR_IO8(0x06) - -/* Data Register, Port E */ -#define PORTE _SFR_IO8(0x07) - -/* Analog Comparator Control and Status Register */ -#define ACSR _SFR_IO8(0x08) - -/* UART0 Baud Rate Register */ -#define UBRR0 _SFR_IO8(0x09) - -/* UART0 Control and Status Registers */ -#define UCSR0B _SFR_IO8(0x0A) -#define UCSR0A _SFR_IO8(0x0B) - -/* UART0 I/O Data Register */ -#define UDR0 _SFR_IO8(0x0C) - -/* SPI Control Register */ -#define SPCR _SFR_IO8(0x0D) - -/* SPI Status Register */ -#define SPSR _SFR_IO8(0x0E) - -/* SPI I/O Data Register */ -#define SPDR _SFR_IO8(0x0F) - -/* Input Pins, Port D */ -#define PIND _SFR_IO8(0x10) - -/* Data Direction Register, Port D */ -#define DDRD _SFR_IO8(0x11) - -/* Data Register, Port D */ -#define PORTD _SFR_IO8(0x12) - -/* Input Pins, Port C */ -#define PINC _SFR_IO8(0x13) - -/* Data Direction Register, Port C */ -#define DDRC _SFR_IO8(0x14) - -/* Data Register, Port C */ -#define PORTC _SFR_IO8(0x15) - -/* Input Pins, Port B */ -#define PINB _SFR_IO8(0x16) - -/* Data Direction Register, Port B */ -#define DDRB _SFR_IO8(0x17) - -/* Data Register, Port B */ -#define PORTB _SFR_IO8(0x18) - -/* Input Pins, Port A */ -#define PINA _SFR_IO8(0x19) - -/* Data Direction Register, Port A */ -#define DDRA _SFR_IO8(0x1A) - -/* Data Register, Port A */ -#define PORTA _SFR_IO8(0x1B) - -/* EEPROM Control Register */ -#define EECR _SFR_IO8(0x1C) - -/* EEPROM Data Register */ -#define EEDR _SFR_IO8(0x1D) - -/* EEPROM Address Register */ -#define EEAR _SFR_IO16(0x1E) -#define EEARL _SFR_IO8(0x1E) -#define EEARH _SFR_IO8(0x1F) - -/* UART Baud Register HIgh */ -#define UBRRH _SFR_IO8(0x20) - -/* Watchdog Timer Control Register */ -#define WDTCR _SFR_IO8(0x21) - -/* Timer/Counter2 Output Compare Register */ -#define OCR2 _SFR_IO8(0x22) - -/* Timer/Counter2 (8-bit) */ -#define TCNT2 _SFR_IO8(0x23) - -/* Timer/Counter1 Input Capture Register */ -#define ICR1 _SFR_IO16(0x24) -#define ICR1L _SFR_IO8(0x24) -#define ICR1H _SFR_IO8(0x25) - -/* ASynchronous mode Status Register */ -#define ASSR _SFR_IO8(0x26) - -/* Timer/Counter2 Control Register */ -#define TCCR2 _SFR_IO8(0x27) - -/* Timer/Counter1 Output Compare RegisterB */ -#define OCR1B _SFR_IO16(0x28) -#define OCR1BL _SFR_IO8(0x28) -#define OCR1BH _SFR_IO8(0x29) - -/* Timer/Counter1 Output Compare RegisterA */ -#define OCR1A _SFR_IO16(0x2A) -#define OCR1AL _SFR_IO8(0x2A) -#define OCR1AH _SFR_IO8(0x2B) - -/* Timer/Counter1 */ -#define TCNT1 _SFR_IO16(0x2C) -#define TCNT1L _SFR_IO8(0x2C) -#define TCNT1H _SFR_IO8(0x2D) - -/* Timer/Counter1 Control Register B */ -#define TCCR1B _SFR_IO8(0x2E) - -/* Timer/Counter1 Control Register A */ -#define TCCR1A _SFR_IO8(0x2F) - -/* Special Function IO Register */ -#define SFIOR _SFR_IO8(0x30) - -/* Timer/Counter0 Output Compare Register */ -#define OCR0 _SFR_IO8(0x31) - -/* Timer/Counter0 (8-bit) */ -#define TCNT0 _SFR_IO8(0x32) - -/* Timer/Counter0 Control Register */ -#define TCCR0 _SFR_IO8(0x33) - -/* MCU general Status Register */ -#define MCUSR _SFR_IO8(0x34) - -/* MCU general Control Register */ -#define MCUCR _SFR_IO8(0x35) - -/* Extended MCU general Control Register */ -#define EMCUCR _SFR_IO8(0x36) - -/* Store Program Memory Control Register */ -#define SPMCR _SFR_IO8(0x37) - -/* Timer/Counter Interrupt Flag Register */ -#define TIFR _SFR_IO8(0x38) - -/* Timer/Counter Interrupt MaSK Register */ -#define TIMSK _SFR_IO8(0x39) - -/* General Interrupt Flag Register */ -#define GIFR _SFR_IO8(0x3A) - -/* General Interrupt MaSK register */ -#define GIMSK _SFR_IO8(0x3B) - -/* 0x3C reserved */ - -/* 0x3D..0x3E SP */ - -/* 0x3F SREG */ - -/* Interrupt vectors */ - -/* External Interrupt 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* External Interrupt 1 */ -#define INT1_vect _VECTOR(2) -#define SIG_INTERRUPT1 _VECTOR(2) - -/* External Interrupt 2 */ -#define INT2_vect _VECTOR(3) -#define SIG_INTERRUPT2 _VECTOR(3) - -/* Timer/Counter2 Compare Match */ -#define TIMER2_COMP_vect _VECTOR(4) -#define SIG_OUTPUT_COMPARE2 _VECTOR(4) - -/* Timer/Counter2 Overflow */ -#define TIMER2_OVF_vect _VECTOR(5) -#define SIG_OVERFLOW2 _VECTOR(5) - -/* Timer/Counter1 Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(6) -#define SIG_INPUT_CAPTURE1 _VECTOR(6) - -/* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPA_vect _VECTOR(7) -#define SIG_OUTPUT_COMPARE1A _VECTOR(7) - -/* Timer/Counter1 Compare Match B */ -#define TIMER1_COMPB_vect _VECTOR(8) -#define SIG_OUTPUT_COMPARE1B _VECTOR(8) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(9) -#define SIG_OVERFLOW1 _VECTOR(9) - -/* Timer/Counter0 Compare Match */ -#define TIMER0_COMP_vect _VECTOR(10) -#define SIG_OUTPUT_COMPARE0 _VECTOR(10) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(11) -#define SIG_OVERFLOW0 _VECTOR(11) - -/* Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(12) -#define SIG_SPI _VECTOR(12) - -/* UART0, Rx Complete */ -#define UART0_RX_vect _VECTOR(13) -#define SIG_UART0_RECV _VECTOR(13) - -/* UART1, Rx Complete */ -#define UART1_RX_vect _VECTOR(14) -#define SIG_UART1_RECV _VECTOR(14) - -/* UART0 Data Register Empty */ -#define UART0_UDRE_vect _VECTOR(15) -#define SIG_UART0_DATA _VECTOR(15) - -/* UART1 Data Register Empty */ -#define UART1_UDRE_vect _VECTOR(16) -#define SIG_UART1_DATA _VECTOR(16) - -/* UART0, Tx Complete */ -#define UART0_TX_vect _VECTOR(17) -#define SIG_UART0_TRANS _VECTOR(17) - -/* UART1, Tx Complete */ -#define UART1_TX_vect _VECTOR(18) -#define SIG_UART1_TRANS _VECTOR(18) - -/* EEPROM Ready */ -#define EE_RDY_vect _VECTOR(19) -#define SIG_EEPROM_READY _VECTOR(19) - -/* Analog Comparator */ -#define ANA_COMP_vect _VECTOR(20) -#define SIG_COMPARATOR _VECTOR(20) - -#define _VECTORS_SIZE 84 - -/* Bit numbers */ - -/* GIMSK */ -#define INT1 7 -#define INT0 6 -#define INT2 5 - -/* GIFR */ -#define INTF1 7 -#define INTF0 6 -#define INTF2 5 - -/* TIMSK */ -#define TOIE1 7 -#define OCIE1A 6 -#define OCIE1B 5 -#define TOIE2 4 -#define TICIE1 3 -#define OCIE2 2 -#define TOIE0 1 -#define OCIE0 0 - -/* TIFR */ -#define TOV1 7 -#define OCF1A 6 -#define OCF1B 5 -#define TOV2 4 -#define ICF1 3 -#define OCF2 2 -#define TOV0 1 -#define OCF0 0 - -/* MCUCR */ -#define SRE 7 -#define SRW10 6 -#define SE 5 -#define SM1 4 -#define ISC11 3 -#define ISC10 2 -#define ISC01 1 -#define ISC00 0 - -/* EMCUCR */ -#define SM0 7 -#define SRL2 6 -#define SRL1 5 -#define SRL0 4 -#define SRW01 3 -#define SRW00 2 -#define SRW11 1 -#define ISC2 0 - -/* SPMCR */ -#define BLBSET 3 -#define PGWRT 2 -#define PGERS 1 -#define SPMEN 0 - -/* SFIOR */ -#define PSR2 1 -#define PSR10 0 - -/* TCCR0 */ -#define FOC0 7 -#define PWM0 6 -#define COM01 5 -#define COM00 4 -#define CTC0 3 -#define CS02 2 -#define CS01 1 -#define CS00 0 - -/* TCCR2 */ -#define FOC2 7 -#define PWM2 6 -#define COM21 5 -#define COM20 4 -#define CTC2 3 -#define CS22 2 -#define CS21 1 -#define CS20 0 - -/* ASSR */ -#define AS2 3 -#define TCN2UB 2 -#define OCR2UB 1 -#define TCR2UB 0 - -/* TCCR1A */ -#define COM1A1 7 -#define COM1A0 6 -#define COM1B1 5 -#define COM1B0 4 -#define FOC1A 3 -#define FOC1B 2 -#define PWM11 1 -#define PWM10 0 - -/* TCCR1B */ -#define ICNC1 7 -#define ICES1 6 -#define CTC1 3 -#define CS12 2 -#define CS11 1 -#define CS10 0 - -/* WDTCR */ -#define WDTOE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -/* PORTA */ -#define PA7 7 -#define PA6 6 -#define PA5 5 -#define PA4 4 -#define PA3 3 -#define PA2 2 -#define PA1 1 -#define PA0 0 - -/* DDRA */ -#define DDA7 7 -#define DDA6 6 -#define DDA5 5 -#define DDA4 4 -#define DDA3 3 -#define DDA2 2 -#define DDA1 1 -#define DDA0 0 - -/* PINA */ -#define PINA7 7 -#define PINA6 6 -#define PINA5 5 -#define PINA4 4 -#define PINA3 3 -#define PINA2 2 -#define PINA1 1 -#define PINA0 0 - -/* - PB7 = SCK - PB6 = MISO - PB5 = MOSI - PB4 = SS# - PB3 = TXD1 / AIN1 - PB2 = RXD1 / AIN0 - PB1 = OC2 / T1 - PB0 = OC0 / T0 - */ - -/* PORTB */ -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -/* DDRB */ -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -/* PINB */ -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -/* PORTC */ -#define PC7 7 -#define PC6 6 -#define PC5 5 -#define PC4 4 -#define PC3 3 -#define PC2 2 -#define PC1 1 -#define PC0 0 - -/* DDRC */ -#define DDC7 7 -#define DDC6 6 -#define DDC5 5 -#define DDC4 4 -#define DDC3 3 -#define DDC2 2 -#define DDC1 1 -#define DDC0 0 - -/* PINC */ -#define PINC7 7 -#define PINC6 6 -#define PINC5 5 -#define PINC4 4 -#define PINC3 3 -#define PINC2 2 -#define PINC1 1 -#define PINC0 0 - -/* - PD7 = RD# - PD6 = WR# - PD5 = TOSC2 / OC1A - PD4 = TOSC1 - PD3 = INT1 - PD2 = INT0 - PD1 = TXD0 - PD0 = RXD0 - */ - -/* PORTD */ -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -/* DDRD */ -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -/* PIND */ -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -/* - PE2 = ALE - PE1 = OC1B - PE0 = ICP / INT2 - */ - -/* PORTE */ -#define PE2 2 -#define PE1 1 -#define PE0 0 - -/* DDRE */ -#define DDE2 2 -#define DDE1 1 -#define DDE0 0 - -/* PINE */ -#define PINE2 2 -#define PINE1 1 -#define PINE0 0 - -/* SPSR */ -#define SPIF 7 -#define WCOL 6 -#define SPI2X 0 - -/* SPCR */ -#define SPIE 7 -#define SPE 6 -#define DORD 5 -#define MSTR 4 -#define CPOL 3 -#define CPHA 2 -#define SPR1 1 -#define SPR0 0 - -/* UCSR0A, UCSR1A */ -#define RXC 7 -#define TXC 6 -#define UDRE 5 -#define FE 4 -#define DOR 3 -#define U2X 1 -#define MPCM 0 - -/* UCSR0B, UCSR1B */ -#define RXCIE 7 -#define TXCIE 6 -#define UDRIE 5 -#define RXEN 4 -#define TXEN 3 -#define CHR9 2 -#define RXB8 1 -#define TXB8 0 - -/* ACSR */ -#define ACD 7 -#define AINBG 6 -#define ACO 5 -#define ACI 4 -#define ACIE 3 -#define ACIC 2 -#define ACIS1 1 -#define ACIS0 0 - -/* EEPROM Control Register */ -#define EERIE 3 -#define EEMWE 2 -#define EEWE 1 -#define EERE 0 - -/* Constants */ -#define SPM_PAGESIZE 128 -#define RAMEND 0x45F -#define XRAMEND 0xFFFF -#define E2END 0x1FF -#define E2PAGESIZE 0 -#define FLASHEND 0x3FFF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 1 - -/* Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_SUT (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_BOOTRST (unsigned char)~_BV(6) -#define FUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_SPIEN) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x94 -#define SIGNATURE_2 0x01 - - -#endif /* _AVR_IOM161_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom162.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom162.h deleted file mode 100644 index 12726b5c9..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom162.h +++ /dev/null @@ -1,951 +0,0 @@ -/* Copyright (c) 2002, Nils Kristian Strom - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iom162.h,v 1.13.2.5 2008/10/17 23:27:47 arcanum Exp $ */ - -/* iom162.h - definitions for ATmega162 */ - -#ifndef _AVR_IOM162_H_ -#define _AVR_IOM162_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iom162.h" -#else -# error "Attempt to include more than one file." -#endif - -/* Memory mapped I/O registers */ - -/* Timer/Counter3 Control Register A */ -#define TCCR3A _SFR_MEM8(0x8B) - -/* Timer/Counter3 Control Register B */ -#define TCCR3B _SFR_MEM8(0x8A) - -/* Timer/Counter3 - Counter Register */ -#define TCNT3H _SFR_MEM8(0x89) -#define TCNT3L _SFR_MEM8(0x88) -#define TCNT3 _SFR_MEM16(0x88) - -/* Timer/Counter3 - Output Compare Register A */ -#define OCR3AH _SFR_MEM8(0x87) -#define OCR3AL _SFR_MEM8(0x86) -#define OCR3A _SFR_MEM16(0x86) - -/* Timer/Counter3 - Output Compare Register B */ -#define OCR3BH _SFR_MEM8(0x85) -#define OCR3BL _SFR_MEM8(0x84) -#define OCR3B _SFR_MEM16(0x84) - -/* Timer/Counter3 - Input Capture Register */ -#define ICR3H _SFR_MEM8(0x81) -#define ICR3L _SFR_MEM8(0x80) -#define ICR3 _SFR_MEM16(0x80) - -/* Extended Timer/Counter Interrupt Mask */ -#define ETIMSK _SFR_MEM8(0x7D) - -/* Extended Timer/Counter Interrupt Flag Register */ -#define ETIFR _SFR_MEM8(0x7C) - -/* Pin Change Mask Register 1 */ -#define PCMSK1 _SFR_MEM8(0x6C) - -/* Pin Change Mask Register 0 */ -#define PCMSK0 _SFR_MEM8(0x6B) - -/* Clock PRescale */ -#define CLKPR _SFR_MEM8(0x61) - - -/* Standard I/O registers */ - -/* 0x3F SREG */ -/* 0x3D..0x3E SP */ -#define UBRR1H _SFR_IO8(0x3C) /* USART 1 Baud Rate Register High Byte, Shared with UCSR1C */ -#define UCSR1C _SFR_IO8(0x3C) /* USART 1 Control and Status Register, Shared with UBRR1H */ -#define GICR _SFR_IO8(0x3B) /* General Interrupt Control Register */ -#define GIFR _SFR_IO8(0x3A) /* General Interrupt Flag Register */ -#define TIMSK _SFR_IO8(0x39) /* Timer Interrupt Mask */ -#define TIFR _SFR_IO8(0x38) /* Timer Interrupt Flag Register */ -#define SPMCR _SFR_IO8(0x37) /* Store Program Memory Control Register */ -#define EMCUCR _SFR_IO8(0x36) /* Extended MCU Control Register */ -#define MCUCR _SFR_IO8(0x35) /* MCU Control Register */ -#define MCUCSR _SFR_IO8(0x34) /* MCU Control and Status Register */ -#define TCCR0 _SFR_IO8(0x33) /* Timer/Counter 0 Control Register */ -#define TCNT0 _SFR_IO8(0x32) /* TImer/Counter 0 */ -#define OCR0 _SFR_IO8(0x31) /* Output Compare Register 0 */ -#define SFIOR _SFR_IO8(0x30) /* Special Function I/O Register */ -#define TCCR1A _SFR_IO8(0x2F) /* Timer/Counter 1 Control Register A */ -#define TCCR1B _SFR_IO8(0x2E) /* Timer/Counter 1 Control Register A */ -#define TCNT1H _SFR_IO8(0x2D) /* Timer/Counter 1 High Byte */ -#define TCNT1L _SFR_IO8(0x2C) /* Timer/Counter 1 Low Byte */ -#define TCNT1 _SFR_IO16(0x2C) /* Timer/Counter 1 */ -#define OCR1AH _SFR_IO8(0x2B) /* Timer/Counter 1 Output Compare Register A High Byte */ -#define OCR1AL _SFR_IO8(0x2A) /* Timer/Counter 1 Output Compare Register A Low Byte */ -#define OCR1A _SFR_IO16(0x2A) /* Timer/Counter 1 Output Compare Register A */ -#define OCR1BH _SFR_IO8(0x29) /* Timer/Counter 1 Output Compare Register B High Byte */ -#define OCR1BL _SFR_IO8(0x28) /* Timer/Counter 1 Output Compare Register B Low Byte */ -#define OCR1B _SFR_IO16(0x28) /* Timer/Counter 1 Output Compare Register B */ -#define TCCR2 _SFR_IO8(0x27) /* Timer/Counter 2 Control Register */ -#define ASSR _SFR_IO8(0x26) /* Asynchronous Status Register */ -#define ICR1H _SFR_IO8(0x25) /* Input Capture Register 1 High Byte */ -#define ICR1L _SFR_IO8(0x24) /* Input Capture Register 1 Low Byte */ -#define ICR1 _SFR_IO16(0x24) /* Input Capture Register 1 */ -#define TCNT2 _SFR_IO8(0x23) /* Timer/Counter 2 */ -#define OCR2 _SFR_IO8(0x22) /* Timer/Counter 2 Output Compare Register */ -#define WDTCR _SFR_IO8(0x21) /* Watchdow Timer Control Register */ -#define UBRR0H _SFR_IO8(0x20) /* USART 0 Baud-Rate Register High Byte, Shared with UCSR0C */ -#define UCSR0C _SFR_IO8(0x20) /* USART 0 Control and Status Register C, Shared with UBRR0H */ -#define EEARH _SFR_IO8(0x1F) /* EEPROM Address Register High Byte */ -#define EEARL _SFR_IO8(0x1E) /* EEPROM Address Register Low Byte */ -#define EEAR _SFR_IO16(0x1E) /* EEPROM Address Register */ -#define EEDR _SFR_IO8(0x1D) /* EEPROM Data Register */ -#define EECR _SFR_IO8(0x1C) /* EEPROM Control Register */ -#define PORTA _SFR_IO8(0x1B) /* Port A */ -#define DDRA _SFR_IO8(0x1A) /* Port A Data Direction Register */ -#define PINA _SFR_IO8(0x19) /* Port A Pin Register */ -#define PORTB _SFR_IO8(0x18) /* Port B */ -#define DDRB _SFR_IO8(0x17) /* Port B Data Direction Register */ -#define PINB _SFR_IO8(0x16) /* Port B Pin Register */ -#define PORTC _SFR_IO8(0x15) /* Port C */ -#define DDRC _SFR_IO8(0x14) /* Port C Data Direction Register */ -#define PINC _SFR_IO8(0x13) /* Port C Pin Register */ -#define PORTD _SFR_IO8(0x12) /* Port D */ -#define DDRD _SFR_IO8(0x11) /* Port D Data Direction Register */ -#define PIND _SFR_IO8(0x10) /* Port D Pin Register */ -#define SPDR _SFR_IO8(0x0F) /* SPI Data Register */ -#define SPSR _SFR_IO8(0x0E) /* SPI Status Register */ -#define SPCR _SFR_IO8(0x0D) /* SPI Control Register */ -#define UDR0 _SFR_IO8(0x0C) /* USART 0 Data Register */ -#define UCSR0A _SFR_IO8(0x0B) /* USART 0 Control and Status Register A */ -#define UCSR0B _SFR_IO8(0x0A) /* USART 0 Control and Status Register B */ -#define UBRR0L _SFR_IO8(0x09) /* USART 0 Baud-Rate Register Low Byte */ -#define ACSR _SFR_IO8(0x08) /* Analog Comparator Status Register */ -#define PORTE _SFR_IO8(0x07) /* Port E */ -#define DDRE _SFR_IO8(0x06) /* Port E Data Direction Register */ -#define PINE _SFR_IO8(0x05) /* Port E Pin Register */ -#define OSCCAL _SFR_IO8(0x04) /* Oscillator Calibration, Shared with OCDR */ -#define OCDR _SFR_IO8(0x04) /* On-Chip Debug Register, Shared with OSCCAL */ -#define UDR1 _SFR_IO8(0x03) /* USART 1 Data Register */ -#define UCSR1A _SFR_IO8(0x02) /* USART 1 Control and Status Register A */ -#define UCSR1B _SFR_IO8(0x01) /* USART 1 Control and Status Register B */ -#define UBRR1L _SFR_IO8(0x00) /* USART 0 Baud Rate Register High Byte */ - - -/* Interrupt vectors (byte addresses) */ - -/* External Interrupt Request 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* External Interrupt Request 1 */ -#define INT1_vect _VECTOR(2) -#define SIG_INTERRUPT1 _VECTOR(2) - -/* External Interrupt Request 2 */ -#define INT2_vect _VECTOR(3) -#define SIG_INTERRUPT2 _VECTOR(3) - -/* Pin Change Interrupt Request 0 */ -#define PCINT0_vect _VECTOR(4) -#define SIG_PIN_CHANGE0 _VECTOR(4) - -/* Pin Change Interrupt Request 1 */ -#define PCINT1_vect _VECTOR(5) -#define SIG_PIN_CHANGE1 _VECTOR(5) - -/* Timer/Counter3 Capture Event */ -#define TIMER3_CAPT_vect _VECTOR(6) -#define SIG_INPUT_CAPTURE3 _VECTOR(6) - -/* Timer/Counter3 Compare Match A */ -#define TIMER3_COMPA_vect _VECTOR(7) -#define SIG_OUTPUT_COMPARE3A _VECTOR(7) - -/* Timer/Counter3 Compare Match B */ -#define TIMER3_COMPB_vect _VECTOR(8) -#define SIG_OUTPUT_COMPARE3B _VECTOR(8) - -/* Timer/Counter3 Overflow */ -#define TIMER3_OVF_vect _VECTOR(9) -#define SIG_OVERFLOW3 _VECTOR(9) - -/* Timer/Counter2 Compare Match */ -#define TIMER2_COMP_vect _VECTOR(10) -#define SIG_OUTPUT_COMPARE2 _VECTOR(10) - -/* Timer/Counter2 Overflow */ -#define TIMER2_OVF_vect _VECTOR(11) -#define SIG_OVERFLOW2 _VECTOR(11) - -/* Timer/Counter1 Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(12) -#define SIG_INPUT_CAPTURE1 _VECTOR(12) - -/* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPA_vect _VECTOR(13) -#define SIG_OUTPUT_COMPARE1A _VECTOR(13) - -/* Timer/Counter Compare Match B */ -#define TIMER1_COMPB_vect _VECTOR(14) -#define SIG_OUTPUT_COMPARE1B _VECTOR(14) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(15) -#define SIG_OVERFLOW1 _VECTOR(15) - -/* Timer/Counter0 Compare Match */ -#define TIMER0_COMP_vect _VECTOR(16) -#define SIG_OUTPUT_COMPARE0 _VECTOR(16) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(17) -#define SIG_OVERFLOW0 _VECTOR(17) - -/* SPI Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(18) -#define SIG_SPI _VECTOR(18) - -/* USART0, Rx Complete */ -#define USART0_RXC_vect _VECTOR(19) -#define SIG_USART0_RECV _VECTOR(19) - -/* USART1, Rx Complete */ -#define USART1_RXC_vect _VECTOR(20) -#define SIG_USART1_RECV _VECTOR(20) - -/* USART0 Data register Empty */ -#define USART0_UDRE_vect _VECTOR(21) -#define SIG_USART0_DATA _VECTOR(21) - -/* USART1, Data register Empty */ -#define USART1_UDRE_vect _VECTOR(22) -#define SIG_USART1_DATA _VECTOR(22) - -/* USART0, Tx Complete */ -#define USART0_TXC_vect _VECTOR(23) -#define SIG_USART0_TRANS _VECTOR(23) - -/* USART1, Tx Complete */ -#define USART1_TXC_vect _VECTOR(24) -#define SIG_USART1_TRANS _VECTOR(24) - -/* EEPROM Ready */ -#define EE_RDY_vect _VECTOR(25) -#define SIG_EEPROM_READY _VECTOR(25) - -/* Analog Comparator */ -#define ANA_COMP_vect _VECTOR(26) -#define SIG_COMPARATOR _VECTOR(26) - -/* Store Program Memory Read */ -#define SPM_RDY_vect _VECTOR(27) -#define SIG_SPM_READY _VECTOR(27) - -#define _VECTORS_SIZE 112 /* = (num vec+1) * 4 */ - - - - - -/* TCCR3B bit definitions, memory mapped I/O */ - -#define ICNC3 7 -#define ICES3 6 -#define WGM33 4 -#define WGM32 3 -#define CS32 2 -#define CS31 1 -#define CS30 0 - - - -/* TCCR3A bit definitions, memory mapped I/O */ - -#define COM3A1 7 -#define COM3A0 6 -#define COM3B1 5 -#define COM3B0 4 -#define FOC3A 3 -#define FOC3B 2 -#define WGM31 1 -#define WGM30 0 - - - -/* ETIMSK bit definitions, memory mapped I/O */ - -#define TICIE3 5 -#define OCIE3A 4 -#define OCIE3B 3 -#define TOIE3 2 - - - -/* ETIFR bit definitions, memory mapped I/O */ - -#define ICF3 5 -#define OCF3A 4 -#define OCF3B 3 -#define TOV3 2 - - - -/* PCMSK1 bit definitions, memory mapped I/O */ -#define PCINT15 7 -#define PCINT14 6 -#define PCINT13 5 -#define PCINT12 4 -#define PCINT11 3 -#define PCINT10 2 -#define PCINT9 1 -#define PCINT8 0 - - - -/* PCMSK0 bit definitions, memory mapped I/O */ - -#define PCINT7 7 -#define PCINT6 6 -#define PCINT5 5 -#define PCINT4 4 -#define PCINT3 3 -#define PCINT2 2 -#define PCINT1 1 -#define PCINT0 0 - - - -/* CLKPR bit definitions, memory mapped I/O */ - -#define CLKPCE 7 -#define CLKPS3 3 -#define CLKPS2 2 -#define CLKPS1 1 -#define CLKPS0 0 - - - -/* SPH bit definitions */ - -#define SP15 15 -#define SP14 14 -#define SP13 13 -#define SP12 12 -#define SP11 11 -#define SP10 10 -#define SP9 9 -#define SP8 8 - - - -/* SPL bit definitions */ - -#define SP7 7 -#define SP6 6 -#define SP5 5 -#define SP4 4 -#define SP3 3 -#define SP2 2 -#define SP1 1 -#define SP0 0 - - - -/* UBRR1H bit definitions */ - -#define URSEL1 7 -#define UBRR111 3 -#define UBRR110 2 -#define UBRR19 1 -#define UBRR18 0 - - - -/* UCSR1C bit definitions */ - -#define URSEL1 7 -#define UMSEL1 6 -#define UPM11 5 -#define UPM10 4 -#define USBS1 3 -#define UCSZ11 2 -#define UCSZ10 1 -#define UCPOL1 0 - - - -/* GICR bit definitions */ - -#define INT1 7 -#define INT0 6 -#define INT2 5 -#define PCIE1 4 -#define PCIE0 3 -#define IVSEL 1 -#define IVCE 0 - - - -/* GIFR bit definitions */ - -#define INTF1 7 -#define INTF0 6 -#define INTF2 5 -#define PCIF1 4 -#define PCIF0 3 - - - -/* TIMSK bit definitions */ - -#define TOIE1 7 -#define OCIE1A 6 -#define OCIE1B 5 -#define OCIE2 4 -#define TICIE1 3 -#define TOIE2 2 -#define TOIE0 1 -#define OCIE0 0 - - - -/* TIFR bit definitions */ - -#define TOV1 7 -#define OCF1A 6 -#define OCF1B 5 -#define OCF2 4 -#define ICF1 3 -#define TOV2 2 -#define TOV0 1 -#define OCF0 0 - - - -/* SPMCR bit definitions */ - -#define SPMIE 7 -#define RWWSB 6 -#define RWWSRE 4 -#define BLBSET 3 -#define PGWRT 2 -#define PGERS 1 -#define SPMEN 0 - - - -/* EMCUCR bit definitions */ - -#define SM0 7 -#define SRL2 6 -#define SRL1 5 -#define SRL0 4 -#define SRW01 3 -#define SRW00 2 -#define SRW11 1 -#define ISC2 0 - - - -/* MCUCR bit definitions */ - -#define SRE 7 -#define SRW10 6 -#define SE 5 -#define SM1 4 -#define ISC11 3 -#define ISC10 2 -#define ISC01 1 -#define ISC00 0 - - - -/* MCUCSR bit definitions */ - -#define JTD 7 -#define SM2 5 -#define JTRF 4 -#define WDRF 3 -#define BORF 2 -#define EXTRF 1 -#define PORF 0 - - - -/* TCCR0 bit definitions */ - -#define FOC0 7 -#define WGM00 6 -#define COM01 5 -#define COM00 4 -#define WGM01 3 -#define CS02 2 -#define CS01 1 -#define CS00 0 - - - -/* SFIOR bit definitions */ - -#define TSM 7 -#define XMBK 6 -#define XMM2 5 -#define XMM1 4 -#define XMM0 3 -#define PUD 2 -#define PSR2 1 -#define PSR310 0 - - - -/* TCCR1A bit definitions */ - -#define COM1A1 7 -#define COM1A0 6 -#define COM1B1 5 -#define COM1B0 4 -#define FOC1A 3 -#define FOC1B 2 -#define WGM11 1 -#define WGM10 0 - - - - -/* TCCR1B bit definitions */ - -#define ICNC1 7 /* Input Capture Noise Canceler */ -#define ICES1 6 /* Input Capture Edge Select */ -#define WGM13 4 /* Waveform Generation Mode 3 */ -#define WGM12 3 /* Waveform Generation Mode 2 */ -#define CS12 2 /* Clock Select 2 */ -#define CS11 1 /* Clock Select 1 */ -#define CS10 0 /* Clock Select 0 */ - - - -/* TCCR2 bit definitions */ - -#define FOC2 7 -#define WGM20 6 -#define COM21 5 -#define COM20 4 -#define WGM21 3 -#define CS22 2 -#define CS21 1 -#define CS20 0 - - - -/* ASSR bit definitions */ - -#define AS2 3 -#define TCON2UB 2 -#define OCR2UB 1 -#define TCR2UB 0 - - - -/* WDTCR bit definitions */ - -#define WDCE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - - - -/* UBRR0H bif definitions */ - -#define URSEL0 7 -#define UBRR011 3 -#define UBRR010 2 -#define UBRR09 1 -#define UBRR08 0 - - - -/* UCSR0C bit definitions */ - -#define URSEL0 7 -#define UMSEL0 6 -#define UPM01 5 -#define UPM00 4 -#define USBS0 3 -#define UCSZ01 2 -#define UCSZ00 1 -#define UCPOL0 0 - - - -/* EEARH bit definitions */ - -#define EEAR8 0 - - - -/* EECR bit definitions */ - -#define EERIE 3 -#define EEMWE 2 -#define EEWE 1 -#define EERE 0 - - - -/* PORTA bit definitions */ - -#define PA7 7 -#define PA6 6 -#define PA5 5 -#define PA4 4 -#define PA3 3 -#define PA2 2 -#define PA1 1 -#define PA0 0 - - - -/* DDRA bit definitions */ - -#define DDA7 7 -#define DDA6 6 -#define DDA5 5 -#define DDA4 4 -#define DDA3 3 -#define DDA2 2 -#define DDA1 1 -#define DDA0 0 - - - -/* PINA bit definitions */ - -#define PINA7 7 -#define PINA6 6 -#define PINA5 5 -#define PINA4 4 -#define PINA3 3 -#define PINA2 2 -#define PINA1 1 -#define PINA0 0 - - -/* PORTB bit definitions */ - -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - - - -/* DDRB bit definitions */ - -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - - - -/* PINB bit definitions */ - -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - - - -/* PORTC bit definitions */ - -#define PC7 7 -#define PC6 6 -#define PC5 5 -#define PC4 4 -#define PC3 3 -#define PC2 2 -#define PC1 1 -#define PC0 0 - - - -/* DDRC bit definitions */ - -#define DDC7 7 -#define DDC6 6 -#define DDC5 5 -#define DDC4 4 -#define DDC3 3 -#define DDC2 2 -#define DDC1 1 -#define DDC0 0 - - - -/* PINC bit definitions */ - -#define PINC7 7 -#define PINC6 6 -#define PINC5 5 -#define PINC4 4 -#define PINC3 3 -#define PINC2 2 -#define PINC1 1 -#define PINC0 0 - - - -/* PORTD bit definitions */ - -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - - - -/* DDRD bit definitions */ - -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - - - -/* PIND bit definitions */ - -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - - - -/* SPSR bit definitions */ - -#define SPIF 7 -#define WCOL 6 -#define SPI2X 0 - - - -/* SPCR bit definitions */ - -#define SPIE 7 -#define SPE 6 -#define DORD 5 -#define MSTR 4 -#define CPOL 3 -#define CPHA 2 -#define SPR1 1 -#define SPR0 0 - - - -/* UCSR0A bit definitions */ - -#define RXC0 7 -#define TXC0 6 -#define UDRE0 5 -#define FE0 4 -#define DOR0 3 -#define UPE0 2 -#define U2X0 1 -#define MPCM0 0 - - - -/* UCSR0B bit definitions */ - -#define RXCIE0 7 -#define TXCIE0 6 -#define UDRIE0 5 -#define RXEN0 4 -#define TXEN0 3 -#define UCSZ02 2 -#define RXB80 1 -#define TXB80 0 - - - -/* ACSR bit definitions */ - -#define ACD 7 -#define ACBG 6 -#define ACO 5 -#define ACI 4 -#define ACIE 3 -#define ACIC 2 -#define ACIS1 1 -#define ACIS0 0 - - - -/* PORTE bit definitions */ - -#define PE2 2 -#define PE1 1 -#define PE0 0 - - - -/* DDRE bit definitions */ - -#define DDE2 2 -#define DDE1 1 -#define DDE0 0 - - - -/* PINE bit definitions */ - -#define PINE2 2 -#define PINE1 1 -#define PINE0 0 - - - -/* UCSR1A bit definitions */ - -#define RXC1 7 -#define TXC1 6 -#define UDRE1 5 -#define FE1 4 -#define DOR1 3 -#define UPE1 2 -#define U2X1 1 -#define MPCM1 0 - - - -/* UCSR1B bit definitions */ - -#define RXCIE1 7 -#define TXCIE1 6 -#define UDRIE1 5 -#define RXEN1 4 -#define TXEN1 3 -#define UCSZ12 2 -#define RXB81 1 -#define TXB81 0 - - -/* Constants */ -#define SPM_PAGESIZE 128 -#define RAMEND 0x4FF -#define XRAMEND 0xFFFF -#define E2END 0x1FF -#define E2PAGESIZE 4 -#define FLASHEND 0x3FFF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_JTAGEN (unsigned char)~_BV(6) -#define FUSE_OCDEN (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_SPIEN & FUSE_JTAGEN) - -/* Extended Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(2) -#define FUSE_BODLEVEL2 (unsigned char)~_BV(3) -#define FUSE_M161C (unsigned char)~_BV(4) -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x94 -#define SIGNATURE_2 0x04 - - -#endif /* _AVR_IOM162_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom163.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom163.h deleted file mode 100644 index 35b0f0c65..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom163.h +++ /dev/null @@ -1,639 +0,0 @@ -/* Copyright (c) 2002, Marek Michalkiewicz - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iom163.h,v 1.14.2.5 2008/10/17 23:27:47 arcanum Exp $ */ - -/* avr/iom163.h - definitions for ATmega163 */ - -#ifndef _AVR_IOM163_H_ -#define _AVR_IOM163_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iom163.h" -#else -# error "Attempt to include more than one file." -#endif - -/* I/O registers */ - -#define TWBR _SFR_IO8(0x00) -#define TWSR _SFR_IO8(0x01) -#define TWAR _SFR_IO8(0x02) -#define TWDR _SFR_IO8(0x03) - -/* ADC */ -#ifndef __ASSEMBLER__ -#define ADC _SFR_IO16(0x04) -#endif -#define ADCW _SFR_IO16(0x04) -#define ADCL _SFR_IO8(0x04) -#define ADCH _SFR_IO8(0x05) -#define ADCSR _SFR_IO8(0x06) -#define ADMUX _SFR_IO8(0x07) - -/* analog comparator */ -#define ACSR _SFR_IO8(0x08) - -/* UART */ -#define UBRR _SFR_IO8(0x09) -#define UCSRB _SFR_IO8(0x0A) -#define UCSRA _SFR_IO8(0x0B) -#define UDR _SFR_IO8(0x0C) - -/* SPI */ -#define SPCR _SFR_IO8(0x0D) -#define SPSR _SFR_IO8(0x0E) -#define SPDR _SFR_IO8(0x0F) - -/* Port D */ -#define PIND _SFR_IO8(0x10) -#define DDRD _SFR_IO8(0x11) -#define PORTD _SFR_IO8(0x12) - -/* Port C */ -#define PINC _SFR_IO8(0x13) -#define DDRC _SFR_IO8(0x14) -#define PORTC _SFR_IO8(0x15) - -/* Port B */ -#define PINB _SFR_IO8(0x16) -#define DDRB _SFR_IO8(0x17) -#define PORTB _SFR_IO8(0x18) - -/* Port A */ -#define PINA _SFR_IO8(0x19) -#define DDRA _SFR_IO8(0x1A) -#define PORTA _SFR_IO8(0x1B) - -/* EEPROM Control Register */ -#define EECR _SFR_IO8(0x1C) - -/* EEPROM Data Register */ -#define EEDR _SFR_IO8(0x1D) - -/* EEPROM Address Register */ -#define EEAR _SFR_IO16(0x1E) -#define EEARL _SFR_IO8(0x1E) -#define EEARH _SFR_IO8(0x1F) - -#define UBRRHI _SFR_IO8(0x20) - -#define WDTCR _SFR_IO8(0x21) - -#define ASSR _SFR_IO8(0x22) - -/* Timer 2 */ -#define OCR2 _SFR_IO8(0x23) -#define TCNT2 _SFR_IO8(0x24) -#define TCCR2 _SFR_IO8(0x25) - -/* Timer 1 */ -#define ICR1 _SFR_IO16(0x26) -#define ICR1L _SFR_IO8(0x26) -#define ICR1H _SFR_IO8(0x27) -#define OCR1B _SFR_IO16(0x28) -#define OCR1BL _SFR_IO8(0x28) -#define OCR1BH _SFR_IO8(0x29) -#define OCR1A _SFR_IO16(0x2A) -#define OCR1AL _SFR_IO8(0x2A) -#define OCR1AH _SFR_IO8(0x2B) -#define TCNT1 _SFR_IO16(0x2C) -#define TCNT1L _SFR_IO8(0x2C) -#define TCNT1H _SFR_IO8(0x2D) -#define TCCR1B _SFR_IO8(0x2E) -#define TCCR1A _SFR_IO8(0x2F) - -#define SFIOR _SFR_IO8(0x30) - -#define OSCCAL _SFR_IO8(0x31) - -/* Timer 0 */ -#define TCNT0 _SFR_IO8(0x32) -#define TCCR0 _SFR_IO8(0x33) - -#define MCUSR _SFR_IO8(0x34) -#define MCUCR _SFR_IO8(0x35) - -#define TWCR _SFR_IO8(0x36) - -#define SPMCR _SFR_IO8(0x37) - -#define TIFR _SFR_IO8(0x38) -#define TIMSK _SFR_IO8(0x39) - -#define GIFR _SFR_IO8(0x3A) -#define GIMSK _SFR_IO8(0x3B) - -/* 0x3C reserved */ - -/* 0x3D..0x3E SP */ - -/* 0x3F SREG */ - -/* Interrupt vectors */ - -/* External Interrupt 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* External Interrupt 1 */ -#define INT1_vect _VECTOR(2) -#define SIG_INTERRUPT1 _VECTOR(2) - -/* Timer/Counter2 Compare Match */ -#define TIMER2_COMP_vect _VECTOR(3) -#define SIG_OUTPUT_COMPARE2 _VECTOR(3) - -/* Timer/Counter2 Overflow */ -#define TIMER2_OVF_vect _VECTOR(4) -#define SIG_OVERFLOW2 _VECTOR(4) - -/* Timer/Counter1 Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(5) -#define SIG_INPUT_CAPTURE1 _VECTOR(5) - -/* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPA_vect _VECTOR(6) -#define SIG_OUTPUT_COMPARE1A _VECTOR(6) - -/* Timer/Counter1 Compare Match B */ -#define TIMER1_COMPB_vect _VECTOR(7) -#define SIG_OUTPUT_COMPARE1B _VECTOR(7) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(8) -#define SIG_OVERFLOW1 _VECTOR(8) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(9) -#define SIG_OVERFLOW0 _VECTOR(9) - -/* SPI Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(10) -#define SIG_SPI _VECTOR(10) - -/* UART, RX Complete */ -#define UART_RX_vect _VECTOR(11) -#define SIG_UART_RECV _VECTOR(11) - -/* UART Data Register Empty */ -#define UART_UDRE_vect _VECTOR(12) -#define SIG_UART_DATA _VECTOR(12) - -/* UART, TX Complete */ -#define UART_TX_vect _VECTOR(13) -#define SIG_UART_TRANS _VECTOR(13) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(14) -#define SIG_ADC _VECTOR(14) - -/* EEPROM Ready */ -#define EE_RDY_vect _VECTOR(15) -#define SIG_EEPROM_READY _VECTOR(15) - -/* Analog Comparator */ -#define ANA_COMP_vect _VECTOR(16) -#define SIG_COMPARATOR _VECTOR(16) - -/* 2-Wire Serial Interface */ -#define TWI_vect _VECTOR(17) -#define SIG_2WIRE_SERIAL _VECTOR(17) - -#define _VECTORS_SIZE 72 - -/* Bit numbers */ - -/* GIMSK */ -#define INT1 7 -#define INT0 6 -/* bit 5 reserved, undefined */ -/* bits 4-0 reserved */ - -/* GIFR */ -#define INTF1 7 -#define INTF0 6 -/* bits 5-0 reserved */ - -/* TIMSK */ -#define OCIE2 7 -#define TOIE2 6 -#define TICIE1 5 -#define OCIE1A 4 -#define OCIE1B 3 -#define TOIE1 2 -/* bit 1 reserved */ -#define TOIE0 0 - -/* TIFR */ -#define OCF2 7 -#define TOV2 6 -#define ICF1 5 -#define OCF1A 4 -#define OCF1B 3 -#define TOV1 2 -/* bit 1 reserved, undefined */ -#define TOV0 0 - -/* SPMCR */ -/* bit 7 reserved */ -#define ASB 6 -/* bit 5 reserved */ -#define ASRE 4 -#define BLBSET 3 -#define PGWRT 2 -#define PGERS 1 -#define SPMEN 0 - -/* TWCR */ -#define TWINT 7 -#define TWEA 6 -#define TWSTA 5 -#define TWSTO 4 -#define TWWC 3 -#define TWEN 2 -/* bit 1 reserved */ -#define TWIE 0 - -/* TWAR */ -#define TWGCE 0 - -/* TWSR */ -#define TWS7 7 -#define TWS6 6 -#define TWS5 5 -#define TWS4 4 -#define TWS3 3 -/* bits 2-0 reserved */ - -/* MCUCR */ -/* bit 7 reserved */ -#define SE 6 -#define SM1 5 -#define SM0 4 -#define ISC11 3 -#define ISC10 2 -#define ISC01 1 -#define ISC00 0 - -/* MCUSR */ -/* bits 7-4 reserved */ -#define WDRF 3 -#define BORF 2 -#define EXTRF 1 -#define PORF 0 - -/* SFIOR */ -/* bits 7-4 reserved */ -#define ACME 3 -#define PUD 2 -#define PSR2 1 -#define PSR10 0 - -/* TCCR0 */ -/* bits 7-3 reserved */ -#define CS02 2 -#define CS01 1 -#define CS00 0 - -/* TCCR2 */ -#define FOC2 7 -#define PWM2 6 -#define COM21 5 -#define COM20 4 -#define CTC2 3 -#define CS22 2 -#define CS21 1 -#define CS20 0 - -/* ASSR */ -/* bits 7-4 reserved */ -#define AS2 3 -#define TCN2UB 2 -#define OCR2UB 1 -#define TCR2UB 0 - -/* TCCR1A */ -#define COM1A1 7 -#define COM1A0 6 -#define COM1B1 5 -#define COM1B0 4 -#define FOC1A 3 -#define FOC1B 2 -#define PWM11 1 -#define PWM10 0 - -/* TCCR1B */ -#define ICNC1 7 -#define ICES1 6 -/* bits 5-4 reserved */ -#define CTC1 3 -#define CS12 2 -#define CS11 1 -#define CS10 0 - -/* WDTCR */ -/* bits 7-5 reserved */ -#define WDTOE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -/* PA7-PA0 = ADC7-ADC0 */ -/* PORTA */ -#define PA7 7 -#define PA6 6 -#define PA5 5 -#define PA4 4 -#define PA3 3 -#define PA2 2 -#define PA1 1 -#define PA0 0 - -/* DDRA */ -#define DDA7 7 -#define DDA6 6 -#define DDA5 5 -#define DDA4 4 -#define DDA3 3 -#define DDA2 2 -#define DDA1 1 -#define DDA0 0 - -/* PINA */ -#define PINA7 7 -#define PINA6 6 -#define PINA5 5 -#define PINA4 4 -#define PINA3 3 -#define PINA2 2 -#define PINA1 1 -#define PINA0 0 - -/* - PB7 = SCK - PB6 = MISO - PB5 = MOSI - PB4 = SS# - PB3 = AIN1 - PB2 = AIN0 - PB1 = T1 - PB0 = T0 - */ - -/* PORTB */ -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -/* DDRB */ -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -/* PINB */ -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -/* - PC7 = TOSC2 - PC6 = TOSC1 - PC1 = SDA - PC0 = SCL - */ -/* PORTC */ -#define PC7 7 -#define PC6 6 -#define PC5 5 -#define PC4 4 -#define PC3 3 -#define PC2 2 -#define PC1 1 -#define PC0 0 - -/* DDRC */ -#define DDC7 7 -#define DDC6 6 -#define DDC5 5 -#define DDC4 4 -#define DDC3 3 -#define DDC2 2 -#define DDC1 1 -#define DDC0 0 - -/* PINC */ -#define PINC7 7 -#define PINC6 6 -#define PINC5 5 -#define PINC4 4 -#define PINC3 3 -#define PINC2 2 -#define PINC1 1 -#define PINC0 0 - -/* - PD7 = OC2 - PD6 = ICP - PD5 = OC1A - PD4 = OC1B - PD3 = INT1 - PD2 = INT0 - PD1 = TXD - PD0 = RXD - */ - -/* PORTD */ -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -/* DDRD */ -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -/* PIND */ -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -/* SPSR */ -#define SPIF 7 -#define WCOL 6 -/* bits 5-1 reserved */ -#define SPI2X 0 - -/* SPCR */ -#define SPIE 7 -#define SPE 6 -#define DORD 5 -#define MSTR 4 -#define CPOL 3 -#define CPHA 2 -#define SPR1 1 -#define SPR0 0 - -/* UCSRA */ -#define RXC 7 -#define TXC 6 -#define UDRE 5 -#define FE 4 -#define DOR 3 -/* bit 2 reserved */ -#define U2X 1 -#define MPCM 0 - -/* UCSRB */ -#define RXCIE 7 -#define TXCIE 6 -#define UDRIE 5 -#define RXEN 4 -#define TXEN 3 -#define CHR9 2 -#define RXB8 1 -#define TXB8 0 - -/* ACSR */ -#define ACD 7 -#define AINBG 6 -#define ACO 5 -#define ACI 4 -#define ACIE 3 -#define ACIC 2 -#define ACIS1 1 -#define ACIS0 0 - -/* ADCSR */ -#define ADEN 7 -#define ADSC 6 -#define ADFR 5 -#define ADIF 4 -#define ADIE 3 -#define ADPS2 2 -#define ADPS1 1 -#define ADPS0 0 - -/* ADMUX */ -#define REFS1 7 -#define REFS0 6 -#define ADLAR 5 -#define MUX4 4 -#define MUX3 3 -#define MUX2 2 -#define MUX1 1 -#define MUX0 0 - -/* EEPROM Control Register */ -#define EERIE 3 -#define EEMWE 2 -#define EEWE 1 -#define EERE 0 - -/* Constants */ -#define SPM_PAGESIZE 128 -#define RAMEND 0x45F -#define XRAMEND 0x45F -#define E2END 0x1FF -#define E2PAGESIZE 0 -#define FLASHEND 0x3FFF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 2 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_BODEN (unsigned char)~_BV(6) -#define FUSE_BODLEVEL (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SPIEN) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define HFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x94 -#define SIGNATURE_2 0x02 - - -#endif /* _AVR_IOM163_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom164.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom164.h deleted file mode 100644 index a6a4c0a2a..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom164.h +++ /dev/null @@ -1,88 +0,0 @@ -/* Copyright (c) 2005, 2006 Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* avr/iom164.h - definitions for ATmega164 */ - -/* $Id: iom164.h,v 1.3.2.4 2008/08/14 00:08:01 arcanum Exp $ */ - -#ifndef _AVR_IOM164_H_ -#define _AVR_IOM164_H_ 1 - -#include - -/* Constants */ -#define SPM_PAGESIZE 128 -#define RAMEND 0x04FF -#define XRAMEND 0x04FF -#define E2END 0x1FF -#define E2PAGESIZE 4 -#define FLASHEND 0x3FFF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_SUT1 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_JTAGEN (unsigned char)~_BV(6) -#define FUSE_OCDEN (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_SPIEN & FUSE_JTAGEN) - -/* Extended Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -#endif /* _AVR_IOM164_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom165.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom165.h deleted file mode 100644 index 35cdb0a7f..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom165.h +++ /dev/null @@ -1,820 +0,0 @@ -/* Copyright (c) 2004,2005,2006 Eric B. Weddington - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iom165.h,v 1.10.2.6 2008/10/17 23:27:47 arcanum Exp $ */ - -/* avr/iom165.h - definitions for ATmega165 */ - -#ifndef _AVR_IOM165_H_ -#define _AVR_IOM165_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iom165.h" -#else -# error "Attempt to include more than one file." -#endif - -/* Registers and associated bit numbers */ - -#define PINA _SFR_IO8(0x00) -#define PINA7 7 -#define PINA6 6 -#define PINA5 5 -#define PINA4 4 -#define PINA3 3 -#define PINA2 2 -#define PINA1 1 -#define PINA0 0 - -#define DDRA _SFR_IO8(0x01) -#define DDA7 7 -#define DDA6 6 -#define DDA5 5 -#define DDA4 4 -#define DDA3 3 -#define DDA2 2 -#define DDA1 1 -#define DDA0 0 - -#define PORTA _SFR_IO8(0x02) -#define PA7 7 -#define PA6 6 -#define PA5 5 -#define PA4 4 -#define PA3 3 -#define PA2 2 -#define PA1 1 -#define PA0 0 - -#define PINB _SFR_IO8(0x03) -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -#define DDRB _SFR_IO8(0x04) -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -#define PORTB _SFR_IO8(0x05) -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -#define PINC _SFR_IO8(0x06) -#define PINC7 7 -#define PINC6 6 -#define PINC5 5 -#define PINC4 4 -#define PINC3 3 -#define PINC2 2 -#define PINC1 1 -#define PINC0 0 - -#define DDRC _SFR_IO8(0x07) -#define DDC7 7 -#define DDC6 6 -#define DDC5 5 -#define DDC4 4 -#define DDC3 3 -#define DDC2 2 -#define DDC1 1 -#define DDC0 0 - -#define PORTC _SFR_IO8(0x08) -#define PC7 7 -#define PC6 6 -#define PC5 5 -#define PC4 4 -#define PC3 3 -#define PC2 2 -#define PC1 1 -#define PC0 0 - -#define PIND _SFR_IO8(0x09) -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -#define DDRD _SFR_IO8(0x0A) -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -#define PORTD _SFR_IO8(0x0B) -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -#define PINE _SFR_IO8(0x0C) -#define PINE7 7 -#define PINE6 6 -#define PINE5 5 -#define PINE4 4 -#define PINE3 3 -#define PINE2 2 -#define PINE1 1 -#define PINE0 0 - -#define DDRE _SFR_IO8(0x0D) -#define DDE7 7 -#define DDE6 6 -#define DDE5 5 -#define DDE4 4 -#define DDE3 3 -#define DDE2 2 -#define DDE1 1 -#define DDE0 0 - -#define PORTE _SFR_IO8(0x0E) -#define PE7 7 -#define PE6 6 -#define PE5 5 -#define PE4 4 -#define PE3 3 -#define PE2 2 -#define PE1 1 -#define PE0 0 - -#define PINF _SFR_IO8(0x0F) -#define PINF7 7 -#define PINF6 6 -#define PINF5 5 -#define PINF4 4 -#define PINF3 3 -#define PINF2 2 -#define PINF1 1 -#define PINF0 0 - -#define DDRF _SFR_IO8(0x10) -#define DDF7 7 -#define DDF6 6 -#define DDF5 5 -#define DDF4 4 -#define DDF3 3 -#define DDF2 2 -#define DDF1 1 -#define DDF0 0 - -#define PORTF _SFR_IO8(0x11) -#define PF7 7 -#define PF6 6 -#define PF5 5 -#define PF4 4 -#define PF3 3 -#define PF2 2 -#define PF1 1 -#define PF0 0 - -#define PING _SFR_IO8(0x12) -#define PING4 4 -#define PING3 3 -#define PING2 2 -#define PING1 1 -#define PING0 0 - -#define DDRG _SFR_IO8(0x13) -#define DDG4 4 -#define DDG3 3 -#define DDG2 2 -#define DDG1 1 -#define DDG0 0 - -#define PORTG _SFR_IO8(0x14) -#define PG4 4 -#define PG3 3 -#define PG2 2 -#define PG1 1 -#define PG0 0 - -#define TIFR0 _SFR_IO8(0x15) -#define TOV0 0 -#define OCF0A 1 - -#define TIFR1 _SFR_IO8(0x16) -#define TOV1 0 -#define OCF1A 1 -#define OCF1B 2 -#define ICF1 5 - -#define TIFR2 _SFR_IO8(0x17) -#define TOV2 0 -#define OCF2A 1 - -/* Reserved [0x18..0x1B] */ - -#define EIFR _SFR_IO8(0x1C) -#define INTF0 0 -#define PCIF0 6 -#define PCIF1 7 - -#define EIMSK _SFR_IO8(0x1D) -#define INT0 0 -#define PCIE0 6 -#define PCIE1 7 - -#define GPIOR0 _SFR_IO8(0x1E) - -#define EECR _SFR_IO8(0x1F) -#define EERE 0 -#define EEWE 1 -#define EEMWE 2 -#define EERIE 3 - -#define EEDR _SFR_IO8(0X20) - -/* Combine EEARL and EEARH */ -#define EEAR _SFR_IO16(0x21) -#define EEARL _SFR_IO8(0x21) -#define EEARH _SFR_IO8(0X22) - -/* 6-char sequence denoting where to find the EEPROM registers in memory space. - Adresses denoted in hex syntax with uppercase letters. Used by the EEPROM - subroutines. - First two letters: EECR address. - Second two letters: EEDR address. - Last two letters: EEAR address. */ -#define __EEPROM_REG_LOCATIONS__ 1F2021 - -#define GTCCR _SFR_IO8(0x23) -#define PSR10 0 -#define PSR2 1 -#define TSM 7 - -#define TCCR0A _SFR_IO8(0x24) -#define CS00 0 -#define CS01 1 -#define CS02 2 -#define WGM01 3 -#define COM0A0 4 -#define COM0A1 5 -#define WGM00 6 -#define FOC0A 7 - -/* Reserved [0x25] */ - -#define TCNT0 _SFR_IO8(0X26) - -#define OCR0A _SFR_IO8(0X27) - -/* Reserved [0x28..0x29] */ - -#define GPIOR1 _SFR_IO8(0x2A) - -#define GPIOR2 _SFR_IO8(0x2B) - -#define SPCR _SFR_IO8(0x2C) -#define SPR0 0 -#define SPR1 1 -#define CPHA 2 -#define CPOL 3 -#define MSTR 4 -#define DORD 5 -#define SPE 6 -#define SPIE 7 - -#define SPSR _SFR_IO8(0x2D) -#define SPI2X 0 -#define WCOL 6 -#define SPIF 7 - -#define SPDR _SFR_IO8(0X2E) - -/* Reserved [0x2F] */ - -#define ACSR _SFR_IO8(0x30) -#define ACIS0 0 -#define ACIS1 1 -#define ACIC 2 -#define ACIE 3 -#define ACI 4 -#define ACO 5 -#define ACBG 6 -#define ACD 7 - -#define OCDR _SFR_IO8(0x31) -#define OCDR0 0 -#define OCDR1 1 -#define OCDR2 2 -#define OCDR3 3 -#define OCDR4 4 -#define OCDR5 5 -#define OCDR6 6 -#define OCD 7 // The datasheet defines this but IMO it should be OCDR7. -#define OCDR7 7 -#define IDRD 7 - -/* Reserved [0x32] */ - -#define SMCR _SFR_IO8(0x33) -#define SE 0 -#define SM0 1 -#define SM1 2 -#define SM2 3 - -#define MCUSR _SFR_IO8(0x34) -#define PORF 0 -#define EXTRF 1 -#define BORF 2 -#define WDRF 3 -#define JTRF 4 - -#define MCUCR _SFR_IO8(0X35) -#define IVCE 0 -#define IVSEL 1 -#define PUD 4 -#define JTD 7 - -/* Reserved [0x36] */ - -#define SPMCSR _SFR_IO8(0x37) -#define SPMEN 0 -#define PGERS 1 -#define PGWRT 2 -#define BLBSET 3 -#define RWWSRE 4 -#define RWWSB 6 -#define SPMIE 7 - -/* Reserved [0x38..0x3C] */ - -/* SP [0x3D..0x3E] */ -/* SREG [0x3F] */ - -#define WDTCR _SFR_MEM8(0x60) -#define WDP0 0 -#define WDP1 1 -#define WDP2 2 -#define WDE 3 -#define WDCE 4 - -#define CLKPR _SFR_MEM8(0x61) -#define CLKPS0 0 -#define CLKPS1 1 -#define CLKPS2 2 -#define CLKPS3 3 -#define CLKPCE 7 - -/* Reserved [0x62..0x63] */ - -#define PRR _SFR_MEM8(0x64) -#define PRADC 0 -#define PRUSART0 1 -#define PRSPI 2 -#define PRTIM1 3 - -/* Reserved [0x65] */ - -#define OSCCAL _SFR_MEM8(0x66) - -/* Reserved [0x67..0x68] */ - -#define EICRA _SFR_MEM8(0x69) -#define ISC00 0 -#define ISC01 1 - -/* Reserved [0x6A] */ - -/* Combine PCMSK0 and PCMSK1 */ -#define PCMSK _SFR_MEM16(0x6B) - -#define PCMSK0 _SFR_MEM8(0x6B) -#define PCINT0 0 -#define PCINT1 1 -#define PCINT2 2 -#define PCINT3 3 -#define PCINT4 4 -#define PCINT5 5 -#define PCINT6 6 -#define PCINT7 7 - -#define PCMSK1 _SFR_MEM8(0x6C) -#define PCINT8 0 -#define PCINT9 1 -#define PCINT10 2 -#define PCINT11 3 -#define PCINT12 4 -#define PCINT13 5 -#define PCINT14 6 -#define PCINT15 7 - -/* Reserved [0x6D] */ - -#define TIMSK0 _SFR_MEM8(0x6E) -#define TOIE0 0 -#define OCIE0A 1 - -#define TIMSK1 _SFR_MEM8(0x6F) -#define TOIE1 0 -#define OCIE1A 1 -#define OCIE1B 2 -#define ICIE1 5 - -#define TIMSK2 _SFR_MEM8(0x70) -#define TOIE2 0 -#define OCIE2A 1 - -/* Reserved [0x71..0x77] */ - -/* Combine ADCL and ADCH */ -#ifndef __ASSEMBLER__ -#define ADC _SFR_MEM16(0x78) -#endif -#define ADCW _SFR_MEM16(0x78) -#define ADCL _SFR_MEM8(0x78) -#define ADCH _SFR_MEM8(0x79) - -#define ADCSRA _SFR_MEM8(0x7A) -#define ADPS0 0 -#define ADPS1 1 -#define ADPS2 2 -#define ADIE 3 -#define ADIF 4 -#define ADATE 5 -#define ADSC 6 -#define ADEN 7 - -#define ADCSRB _SFR_MEM8(0x7B) -#define ADTS0 0 -#define ADTS1 1 -#define ADTS2 2 -#define ACME 6 - -#define ADMUX _SFR_MEM8(0x7C) -#define MUX0 0 -#define MUX1 1 -#define MUX2 2 -#define MUX3 3 -#define MUX4 4 -#define ADLAR 5 -#define REFS0 6 -#define REFS1 7 - -/* Reserved [0x7D] */ - -#define DIDR0 _SFR_MEM8(0x7E) -#define ADC0D 0 -#define ADC1D 1 -#define ADC2D 2 -#define ADC3D 3 -#define ADC4D 4 -#define ADC5D 5 -#define ADC6D 6 -#define ADC7D 7 - -#define DIDR1 _SFR_MEM8(0x7F) -#define AIN0D 0 -#define AIN1D 1 - -#define TCCR1A _SFR_MEM8(0X80) -#define WGM10 0 -#define WGM11 1 -#define COM1B0 4 -#define COM1B1 5 -#define COM1A0 6 -#define COM1A1 7 - -#define TCCR1B _SFR_MEM8(0X81) -#define CS10 0 -#define CS11 1 -#define CS12 2 -#define WGM12 3 -#define WGM13 4 -#define ICES1 6 -#define ICNC1 7 - -#define TCCR1C _SFR_MEM8(0x82) -#define FOC1B 6 -#define FOC1A 7 - -/* Reserved [0x83] */ - -/* Combine TCNT1L and TCNT1H */ -#define TCNT1 _SFR_MEM16(0x84) - -#define TCNT1L _SFR_MEM8(0x84) -#define TCNT1H _SFR_MEM8(0x85) - -/* Combine ICR1L and ICR1H */ -#define ICR1 _SFR_MEM16(0x86) - -#define ICR1L _SFR_MEM8(0x86) -#define ICR1H _SFR_MEM8(0x87) - -/* Combine OCR1AL and OCR1AH */ -#define OCR1A _SFR_MEM16(0x88) - -#define OCR1AL _SFR_MEM8(0x88) -#define OCR1AH _SFR_MEM8(0x89) - -/* Combine OCR1BL and OCR1BH */ -#define OCR1B _SFR_MEM16(0x8A) - -#define OCR1BL _SFR_MEM8(0x8A) -#define OCR1BH _SFR_MEM8(0x8B) - -/* Reserved [0x8C..0xAF] */ - -#define TCCR2A _SFR_MEM8(0xB0) -#define CS20 0 -#define CS21 1 -#define CS22 2 -#define WGM21 3 -#define COM2A0 4 -#define COM2A1 5 -#define WGM20 6 -#define FOC2A 7 - -/* Reserved [0xB1] */ - -#define TCNT2 _SFR_MEM8(0xB2) - -#define OCR2A _SFR_MEM8(0xB3) - -/* Reserved [0xB4..0xB5] */ - -#define ASSR _SFR_MEM8(0xB6) -#define TCR2UB 0 -#define OCR2UB 1 -#define TCN2UB 2 -#define AS2 3 -#define EXCLK 4 - -/* Reserved [0xB7] */ - -#define USICR _SFR_MEM8(0xB8) -#define USITC 0 -#define USICLK 1 -#define USICS0 2 -#define USICS1 3 -#define USIWM0 4 -#define USIWM1 5 -#define USIOIE 6 -#define USISIE 7 - -#define USISR _SFR_MEM8(0xB9) -#define USICNT0 0 -#define USICNT1 1 -#define USICNT2 2 -#define USICNT3 3 -#define USIDC 4 -#define USIPF 5 -#define USIOIF 6 -#define USISIF 7 - -#define USIDR _SFR_MEM8(0xBA) - -/* Reserved [0xBB..0xBF] */ - -#define UCSRA _SFR_MEM8(0xC0) -#define MPCM 0 -#define U2X 1 -#define UPE 2 -#define DOR 3 -#define FE 4 -#define UDRE 5 -#define TXC 6 -#define RXC 7 - -#define UCSRB _SFR_MEM8(0XC1) -#define TXB8 0 -#define RXB8 1 -#define UCSZ2 2 -#define TXEN 3 -#define RXEN 4 -#define UDRIE 5 -#define TXCIE 6 -#define RXCIE 7 - -#define UCSRC _SFR_MEM8(0xC2) -#define UCPOL 0 -#define UCSZ0 1 -#define UCSZ1 2 -#define USBS 3 -#define UPM0 4 -#define UPM1 5 -#define UMSEL 6 - -/* Reserved [0xC3] */ - -/* Combine UBRRL and UBRRH */ -#define UBRR _SFR_MEM16(0xC4) - -#define UBRRL _SFR_MEM8(0xC4) -#define UBRRH _SFR_MEM8(0xC5) - -#define UDR _SFR_MEM8(0XC6) - -/* Reserved [0xC7..0xFF] */ - - -/* Interrupt vectors */ -/* Vector 0 is the reset vector */ -/* External Interrupt Request 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* Pin Change Interrupt Request 0 */ -#define PCINT0_vect _VECTOR(2) -#define SIG_PIN_CHANGE0 _VECTOR(2) - -/* Pin Change Interrupt Request 1 */ -#define PCINT1_vect _VECTOR(3) -#define SIG_PIN_CHANGE1 _VECTOR(3) - -/* Timer/Counter2 Compare Match */ -#define TIMER2_COMP_vect _VECTOR(4) -#define SIG_OUTPUT_COMPARE2 _VECTOR(4) - -/* Timer/Counter2 Overflow */ -#define TIMER2_OVF_vect _VECTOR(5) -#define SIG_OVERFLOW2 _VECTOR(5) - -/* Timer/Counter1 Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(6) -#define SIG_INPUT_CAPTURE1 _VECTOR(6) - -/* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPA_vect _VECTOR(7) -#define SIG_OUTPUT_COMPARE1A _VECTOR(7) - -/* Timer/Counter Compare Match B */ -#define TIMER1_COMPB_vect _VECTOR(8) -#define SIG_OUTPUT_COMPARE1B _VECTOR(8) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(9) -#define SIG_OVERFLOW1 _VECTOR(9) - -/* Timer/Counter0 Compare Match */ -#define TIMER0_COMP_vect _VECTOR(10) -#define SIG_OUTPUT_COMPARE0 _VECTOR(10) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(11) -#define SIG_OVERFLOW0 _VECTOR(11) - -/* SPI Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(12) -#define SIG_SPI _VECTOR(12) - -/* USART0, Rx Complete */ -#define USART0_RX_vect _VECTOR(13) -#define USART_RX_vect _VECTOR(13) /* Alias */ -#define SIG_UART_RECV _VECTOR(13) - -/* USART0 Data register Empty */ -#define USART0_UDRE_vect _VECTOR(14) -#define USART_UDRE_vect _VECTOR(14) /* Alias */ -#define SIG_UART_DATA _VECTOR(14) - -/* USART0, Tx Complete */ -#define USART0_TX_vect _VECTOR(15) -#define USART_TX_vect _VECTOR(15) /* Alias */ -#define SIG_UART_TRANS _VECTOR(15) - -/* USI Start Condition */ -#define USI_START_vect _VECTOR(16) -#define SIG_USI_START _VECTOR(16) - -/* USI Overflow */ -#define USI_OVERFLOW_vect _VECTOR(17) -#define SIG_USI_OVERFLOW _VECTOR(17) - -/* Analog Comparator */ -#define ANALOG_COMP_vect _VECTOR(18) -#define SIG_COMPARATOR _VECTOR(18) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(19) -#define SIG_ADC _VECTOR(19) - -/* EEPROM Ready */ -#define EE_READY_vect _VECTOR(20) -#define SIG_EEPROM_READY _VECTOR(20) - -/* Store Program Memory Read */ -#define SPM_READY_vect _VECTOR(21) -#define SIG_SPM_READY _VECTOR(21) - -#define _VECTORS_SIZE 88 - - -/* Constants */ -#define SPM_PAGESIZE 128 -#define RAMEND 0x4FF -#define XRAMEND 0x4FF -#define E2END 0x1FF -#define E2PAGESIZE 4 -#define FLASHEND 0x3FFF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_JTAGEN (unsigned char)~_BV(6) -#define FUSE_OCDEN (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_SPIEN & FUSE_JTAGEN) - -/* Extended Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(2) -#define FUSE_BODLEVEL2 (unsigned char)~_BV(3) -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x94 -#define SIGNATURE_2 0x07 - - -#endif /* _AVR_IOM165_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom165p.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom165p.h deleted file mode 100644 index 6c54c817f..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom165p.h +++ /dev/null @@ -1,822 +0,0 @@ -/* Copyright (c) 2004,2005,2006 Eric B. Weddington - Copyright (c) 2006 Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iom165p.h,v 1.2.2.6 2008/10/17 23:27:47 arcanum Exp $ */ - -/* avr/iom165p.h - definitions for ATmega165P */ - -#ifndef _AVR_IOM165P_H_ -#define _AVR_IOM165P_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iom165p.h" -#else -# error "Attempt to include more than one file." -#endif - -/* Registers and associated bit numbers */ - -#define PINA _SFR_IO8(0x00) -#define PINA7 7 -#define PINA6 6 -#define PINA5 5 -#define PINA4 4 -#define PINA3 3 -#define PINA2 2 -#define PINA1 1 -#define PINA0 0 - -#define DDRA _SFR_IO8(0x01) -#define DDA7 7 -#define DDA6 6 -#define DDA5 5 -#define DDA4 4 -#define DDA3 3 -#define DDA2 2 -#define DDA1 1 -#define DDA0 0 - -#define PORTA _SFR_IO8(0x02) -#define PA7 7 -#define PA6 6 -#define PA5 5 -#define PA4 4 -#define PA3 3 -#define PA2 2 -#define PA1 1 -#define PA0 0 - -#define PINB _SFR_IO8(0x03) -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -#define DDRB _SFR_IO8(0x04) -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -#define PORTB _SFR_IO8(0x05) -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -#define PINC _SFR_IO8(0x06) -#define PINC7 7 -#define PINC6 6 -#define PINC5 5 -#define PINC4 4 -#define PINC3 3 -#define PINC2 2 -#define PINC1 1 -#define PINC0 0 - -#define DDRC _SFR_IO8(0x07) -#define DDC7 7 -#define DDC6 6 -#define DDC5 5 -#define DDC4 4 -#define DDC3 3 -#define DDC2 2 -#define DDC1 1 -#define DDC0 0 - -#define PORTC _SFR_IO8(0x08) -#define PC7 7 -#define PC6 6 -#define PC5 5 -#define PC4 4 -#define PC3 3 -#define PC2 2 -#define PC1 1 -#define PC0 0 - -#define PIND _SFR_IO8(0x09) -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -#define DDRD _SFR_IO8(0x0A) -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -#define PORTD _SFR_IO8(0x0B) -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -#define PINE _SFR_IO8(0x0C) -#define PINE7 7 -#define PINE6 6 -#define PINE5 5 -#define PINE4 4 -#define PINE3 3 -#define PINE2 2 -#define PINE1 1 -#define PINE0 0 - -#define DDRE _SFR_IO8(0x0D) -#define DDE7 7 -#define DDE6 6 -#define DDE5 5 -#define DDE4 4 -#define DDE3 3 -#define DDE2 2 -#define DDE1 1 -#define DDE0 0 - -#define PORTE _SFR_IO8(0x0E) -#define PE7 7 -#define PE6 6 -#define PE5 5 -#define PE4 4 -#define PE3 3 -#define PE2 2 -#define PE1 1 -#define PE0 0 - -#define PINF _SFR_IO8(0x0F) -#define PINF7 7 -#define PINF6 6 -#define PINF5 5 -#define PINF4 4 -#define PINF3 3 -#define PINF2 2 -#define PINF1 1 -#define PINF0 0 - -#define DDRF _SFR_IO8(0x10) -#define DDF7 7 -#define DDF6 6 -#define DDF5 5 -#define DDF4 4 -#define DDF3 3 -#define DDF2 2 -#define DDF1 1 -#define DDF0 0 - -#define PORTF _SFR_IO8(0x11) -#define PF7 7 -#define PF6 6 -#define PF5 5 -#define PF4 4 -#define PF3 3 -#define PF2 2 -#define PF1 1 -#define PF0 0 - -#define PING _SFR_IO8(0x12) -#define PING5 5 -#define PING4 4 -#define PING3 3 -#define PING2 2 -#define PING1 1 -#define PING0 0 - -#define DDRG _SFR_IO8(0x13) -#define DDG4 4 -#define DDG3 3 -#define DDG2 2 -#define DDG1 1 -#define DDG0 0 - -#define PORTG _SFR_IO8(0x14) -#define PG4 4 -#define PG3 3 -#define PG2 2 -#define PG1 1 -#define PG0 0 - -#define TIFR0 _SFR_IO8(0x15) -#define TOV0 0 -#define OCF0A 1 - -#define TIFR1 _SFR_IO8(0x16) -#define TOV1 0 -#define OCF1A 1 -#define OCF1B 2 -#define ICF1 5 - -#define TIFR2 _SFR_IO8(0x17) -#define TOV2 0 -#define OCF2A 1 - -/* Reserved [0x18..0x1B] */ - -#define EIFR _SFR_IO8(0x1C) -#define INTF0 0 -#define PCIF0 6 -#define PCIF1 7 - -#define EIMSK _SFR_IO8(0x1D) -#define INT0 0 -#define PCIE0 6 -#define PCIE1 7 - -#define GPIOR0 _SFR_IO8(0x1E) - -#define EECR _SFR_IO8(0x1F) -#define EERE 0 -#define EEWE 1 -#define EEMWE 2 -#define EERIE 3 - -#define EEDR _SFR_IO8(0X20) - -/* Combine EEARL and EEARH */ -#define EEAR _SFR_IO16(0x21) -#define EEARL _SFR_IO8(0x21) -#define EEARH _SFR_IO8(0X22) - -/* 6-char sequence denoting where to find the EEPROM registers in memory space. - Adresses denoted in hex syntax with uppercase letters. Used by the EEPROM - subroutines. - First two letters: EECR address. - Second two letters: EEDR address. - Last two letters: EEAR address. */ -#define __EEPROM_REG_LOCATIONS__ 1F2021 - -#define GTCCR _SFR_IO8(0x23) -#define PSR10 0 -#define PSR2 1 -#define TSM 7 - -#define TCCR0A _SFR_IO8(0x24) -#define CS00 0 -#define CS01 1 -#define CS02 2 -#define WGM01 3 -#define COM0A0 4 -#define COM0A1 5 -#define WGM00 6 -#define FOC0A 7 - -/* Reserved [0x25] */ - -#define TCNT0 _SFR_IO8(0X26) - -#define OCR0A _SFR_IO8(0X27) - -/* Reserved [0x28..0x29] */ - -#define GPIOR1 _SFR_IO8(0x2A) - -#define GPIOR2 _SFR_IO8(0x2B) - -#define SPCR _SFR_IO8(0x2C) -#define SPR0 0 -#define SPR1 1 -#define CPHA 2 -#define CPOL 3 -#define MSTR 4 -#define DORD 5 -#define SPE 6 -#define SPIE 7 - -#define SPSR _SFR_IO8(0x2D) -#define SPI2X 0 -#define WCOL 6 -#define SPIF 7 - -#define SPDR _SFR_IO8(0X2E) - -/* Reserved [0x2F] */ - -#define ACSR _SFR_IO8(0x30) -#define ACIS0 0 -#define ACIS1 1 -#define ACIC 2 -#define ACIE 3 -#define ACI 4 -#define ACO 5 -#define ACBG 6 -#define ACD 7 - -#define OCDR _SFR_IO8(0x31) -#define OCDR0 0 -#define OCDR1 1 -#define OCDR2 2 -#define OCDR3 3 -#define OCDR4 4 -#define OCDR5 5 -#define OCDR6 6 -#define OCD 7 // The datasheet defines this but IMO it should be OCDR7. -#define OCDR7 7 -#define IDRD 7 - -/* Reserved [0x32] */ - -#define SMCR _SFR_IO8(0x33) -#define SE 0 -#define SM0 1 -#define SM1 2 -#define SM2 3 - -#define MCUSR _SFR_IO8(0x34) -#define PORF 0 -#define EXTRF 1 -#define BORF 2 -#define WDRF 3 -#define JTRF 4 - -#define MCUCR _SFR_IO8(0X35) -#define IVCE 0 -#define IVSEL 1 -#define PUD 4 -#define JTD 7 - -/* Reserved [0x36] */ - -#define SPMCSR _SFR_IO8(0x37) -#define SPMEN 0 -#define PGERS 1 -#define PGWRT 2 -#define BLBSET 3 -#define RWWSRE 4 -#define RWWSB 6 -#define SPMIE 7 - -/* Reserved [0x38..0x3C] */ - -/* SP [0x3D..0x3E] */ -/* SREG [0x3F] */ - -#define WDTCR _SFR_MEM8(0x60) -#define WDP0 0 -#define WDP1 1 -#define WDP2 2 -#define WDE 3 -#define WDCE 4 - -#define CLKPR _SFR_MEM8(0x61) -#define CLKPS0 0 -#define CLKPS1 1 -#define CLKPS2 2 -#define CLKPS3 3 -#define CLKPCE 7 - -/* Reserved [0x62..0x63] */ - -#define PRR _SFR_MEM8(0x64) -#define PRADC 0 -#define PRUSART0 1 -#define PRSPI 2 -#define PRTIM1 3 - -/* Reserved [0x65] */ - -#define OSCCAL _SFR_MEM8(0x66) - -/* Reserved [0x67..0x68] */ - -#define EICRA _SFR_MEM8(0x69) -#define ISC00 0 -#define ISC01 1 - -/* Reserved [0x6A] */ - -/* Combine PCMSK0 and PCMSK1 */ -#define PCMSK _SFR_MEM16(0x6B) - -#define PCMSK0 _SFR_MEM8(0x6B) -#define PCINT0 0 -#define PCINT1 1 -#define PCINT2 2 -#define PCINT3 3 -#define PCINT4 4 -#define PCINT5 5 -#define PCINT6 6 -#define PCINT7 7 - -#define PCMSK1 _SFR_MEM8(0x6C) -#define PCINT8 0 -#define PCINT9 1 -#define PCINT10 2 -#define PCINT11 3 -#define PCINT12 4 -#define PCINT13 5 -#define PCINT14 6 -#define PCINT15 7 - -/* Reserved [0x6D] */ - -#define TIMSK0 _SFR_MEM8(0x6E) -#define TOIE0 0 -#define OCIE0A 1 - -#define TIMSK1 _SFR_MEM8(0x6F) -#define TOIE1 0 -#define OCIE1A 1 -#define OCIE1B 2 -#define ICIE1 5 - -#define TIMSK2 _SFR_MEM8(0x70) -#define TOIE2 0 -#define OCIE2A 1 - -/* Reserved [0x71..0x77] */ - -/* Combine ADCL and ADCH */ -#ifndef __ASSEMBLER__ -#define ADC _SFR_MEM16(0x78) -#endif -#define ADCW _SFR_MEM16(0x78) -#define ADCL _SFR_MEM8(0x78) -#define ADCH _SFR_MEM8(0x79) - -#define ADCSRA _SFR_MEM8(0x7A) -#define ADPS0 0 -#define ADPS1 1 -#define ADPS2 2 -#define ADIE 3 -#define ADIF 4 -#define ADATE 5 -#define ADSC 6 -#define ADEN 7 - -#define ADCSRB _SFR_MEM8(0x7B) -#define ADTS0 0 -#define ADTS1 1 -#define ADTS2 2 -#define ACME 6 - -#define ADMUX _SFR_MEM8(0x7C) -#define MUX0 0 -#define MUX1 1 -#define MUX2 2 -#define MUX3 3 -#define MUX4 4 -#define ADLAR 5 -#define REFS0 6 -#define REFS1 7 - -/* Reserved [0x7D] */ - -#define DIDR0 _SFR_MEM8(0x7E) -#define ADC0D 0 -#define ADC1D 1 -#define ADC2D 2 -#define ADC3D 3 -#define ADC4D 4 -#define ADC5D 5 -#define ADC6D 6 -#define ADC7D 7 - -#define DIDR1 _SFR_MEM8(0x7F) -#define AIN0D 0 -#define AIN1D 1 - -#define TCCR1A _SFR_MEM8(0X80) -#define WGM10 0 -#define WGM11 1 -#define COM1B0 4 -#define COM1B1 5 -#define COM1A0 6 -#define COM1A1 7 - -#define TCCR1B _SFR_MEM8(0X81) -#define CS10 0 -#define CS11 1 -#define CS12 2 -#define WGM12 3 -#define WGM13 4 -#define ICES1 6 -#define ICNC1 7 - -#define TCCR1C _SFR_MEM8(0x82) -#define FOC1B 6 -#define FOC1A 7 - -/* Reserved [0x83] */ - -/* Combine TCNT1L and TCNT1H */ -#define TCNT1 _SFR_MEM16(0x84) - -#define TCNT1L _SFR_MEM8(0x84) -#define TCNT1H _SFR_MEM8(0x85) - -/* Combine ICR1L and ICR1H */ -#define ICR1 _SFR_MEM16(0x86) - -#define ICR1L _SFR_MEM8(0x86) -#define ICR1H _SFR_MEM8(0x87) - -/* Combine OCR1AL and OCR1AH */ -#define OCR1A _SFR_MEM16(0x88) - -#define OCR1AL _SFR_MEM8(0x88) -#define OCR1AH _SFR_MEM8(0x89) - -/* Combine OCR1BL and OCR1BH */ -#define OCR1B _SFR_MEM16(0x8A) - -#define OCR1BL _SFR_MEM8(0x8A) -#define OCR1BH _SFR_MEM8(0x8B) - -/* Reserved [0x8C..0xAF] */ - -#define TCCR2A _SFR_MEM8(0xB0) -#define CS20 0 -#define CS21 1 -#define CS22 2 -#define WGM21 3 -#define COM2A0 4 -#define COM2A1 5 -#define WGM20 6 -#define FOC2A 7 - -/* Reserved [0xB1] */ - -#define TCNT2 _SFR_MEM8(0xB2) - -#define OCR2A _SFR_MEM8(0xB3) - -/* Reserved [0xB4..0xB5] */ - -#define ASSR _SFR_MEM8(0xB6) -#define TCR2UB 0 -#define OCR2UB 1 -#define TCN2UB 2 -#define AS2 3 -#define EXCLK 4 - -/* Reserved [0xB7] */ - -#define USICR _SFR_MEM8(0xB8) -#define USITC 0 -#define USICLK 1 -#define USICS0 2 -#define USICS1 3 -#define USIWM0 4 -#define USIWM1 5 -#define USIOIE 6 -#define USISIE 7 - -#define USISR _SFR_MEM8(0xB9) -#define USICNT0 0 -#define USICNT1 1 -#define USICNT2 2 -#define USICNT3 3 -#define USIDC 4 -#define USIPF 5 -#define USIOIF 6 -#define USISIF 7 - -#define USIDR _SFR_MEM8(0xBA) - -/* Reserved [0xBB..0xBF] */ - -#define UCSR0A _SFR_MEM8(0xC0) -#define MPCM0 0 -#define U2X0 1 -#define UPE0 2 -#define DOR0 3 -#define FE0 4 -#define UDRE0 5 -#define TXC0 6 -#define RXC0 7 - -#define UCSR0B _SFR_MEM8(0XC1) -#define TXB80 0 -#define RXB80 1 -#define UCSZ02 2 -#define TXEN0 3 -#define RXEN0 4 -#define UDRIE0 5 -#define TXCIE0 6 -#define RXCIE0 7 - -#define UCSR0C _SFR_MEM8(0xC2) -#define UCPOL0 0 -#define UCSZ00 1 -#define UCSZ01 2 -#define USBS0 3 -#define UPM00 4 -#define UPM01 5 -#define UMSEL0 6 - -/* Reserved [0xC3] */ - -/* Combine UBRRL and UBRRH */ -#define UBRR0 _SFR_MEM16(0xC4) - -#define UBRR0L _SFR_MEM8(0xC4) -#define UBRR0H _SFR_MEM8(0xC5) - -#define UDR0 _SFR_MEM8(0XC6) - -/* Reserved [0xC7..0xFF] */ - - -/* Interrupt vectors */ -/* Vector 0 is the reset vector */ -/* External Interrupt Request 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* Pin Change Interrupt Request 0 */ -#define PCINT0_vect _VECTOR(2) -#define SIG_PIN_CHANGE0 _VECTOR(2) - -/* Pin Change Interrupt Request 1 */ -#define PCINT1_vect _VECTOR(3) -#define SIG_PIN_CHANGE1 _VECTOR(3) - -/* Timer/Counter2 Compare Match */ -#define TIMER2_COMP_vect _VECTOR(4) -#define SIG_OUTPUT_COMPARE2 _VECTOR(4) - -/* Timer/Counter2 Overflow */ -#define TIMER2_OVF_vect _VECTOR(5) -#define SIG_OVERFLOW2 _VECTOR(5) - -/* Timer/Counter1 Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(6) -#define SIG_INPUT_CAPTURE1 _VECTOR(6) - -/* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPA_vect _VECTOR(7) -#define SIG_OUTPUT_COMPARE1A _VECTOR(7) - -/* Timer/Counter Compare Match B */ -#define TIMER1_COMPB_vect _VECTOR(8) -#define SIG_OUTPUT_COMPARE1B _VECTOR(8) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(9) -#define SIG_OVERFLOW1 _VECTOR(9) - -/* Timer/Counter0 Compare Match */ -#define TIMER0_COMP_vect _VECTOR(10) -#define SIG_OUTPUT_COMPARE0 _VECTOR(10) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(11) -#define SIG_OVERFLOW0 _VECTOR(11) - -/* SPI Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(12) -#define SIG_SPI _VECTOR(12) - -/* USART0, Rx Complete */ -#define USART0_RX_vect _VECTOR(13) -#define USART_RX_vect _VECTOR(13) /* Alias */ -#define SIG_UART_RECV _VECTOR(13) - -/* USART0 Data register Empty */ -#define USART0_UDRE_vect _VECTOR(14) -#define USART_UDRE_vect _VECTOR(14) /* Alias */ -#define SIG_UART_DATA _VECTOR(14) - -/* USART0, Tx Complete */ -#define USART0_TX_vect _VECTOR(15) -#define USART_TX_vect _VECTOR(15) /* Alias */ -#define SIG_UART_TRANS _VECTOR(15) - -/* USI Start Condition */ -#define USI_START_vect _VECTOR(16) -#define SIG_USI_START _VECTOR(16) - -/* USI Overflow */ -#define USI_OVERFLOW_vect _VECTOR(17) -#define SIG_USI_OVERFLOW _VECTOR(17) - -/* Analog Comparator */ -#define ANALOG_COMP_vect _VECTOR(18) -#define SIG_COMPARATOR _VECTOR(18) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(19) -#define SIG_ADC _VECTOR(19) - -/* EEPROM Ready */ -#define EE_READY_vect _VECTOR(20) -#define SIG_EEPROM_READY _VECTOR(20) - -/* Store Program Memory Read */ -#define SPM_READY_vect _VECTOR(21) -#define SIG_SPM_READY _VECTOR(21) - -#define _VECTORS_SIZE 88 - - -/* Constants */ -#define SPM_PAGESIZE 128 -#define RAMEND 0x4FF -#define XRAMEND 0x4FF -#define E2END 0x1FF -#define E2PAGESIZE 4 -#define FLASHEND 0x3FFF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_JTAGEN (unsigned char)~_BV(6) -#define FUSE_OCDEN (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_SPIEN & FUSE_JTAGEN) - -/* Extended Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(2) -#define FUSE_BODLEVEL2 (unsigned char)~_BV(3) -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x94 -#define SIGNATURE_2 0x07 - - -#endif /* _AVR_IOM165P_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom168.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom168.h deleted file mode 100644 index b64ed29f1..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom168.h +++ /dev/null @@ -1,91 +0,0 @@ -/* Copyright (c) 2004, Theodore A. Roth - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iom168.h,v 1.4.2.5 2008/10/17 23:27:47 arcanum Exp $ */ - -#ifndef _AVR_IOM168_H_ -#define _AVR_IOM168_H_ 1 - -#include - -/* Constants */ -#define SPM_PAGESIZE 128 -#define RAMEND 0x4FF -#define XRAMEND 0x4FF -#define E2END 0x1FF -#define E2PAGESIZE 4 -#define FLASHEND 0x3FFF - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) /* Select Clock Source */ -#define FUSE_CKSEL1 (unsigned char)~_BV(1) /* Select Clock Source */ -#define FUSE_CKSEL2 (unsigned char)~_BV(2) /* Select Clock Source */ -#define FUSE_CKSEL3 (unsigned char)~_BV(3) /* Select Clock Source */ -#define FUSE_SUT0 (unsigned char)~_BV(4) /* Select start-up time */ -#define FUSE_SUT1 (unsigned char)~_BV(5) /* Select start-up time */ -#define FUSE_CKOUT (unsigned char)~_BV(6) /* Clock output */ -#define FUSE_CKDIV8 (unsigned char)~_BV(7) /* Divide clock by 8 */ -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) /* Brown-out Detector trigger level */ -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) /* Brown-out Detector trigger level */ -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) /* Brown-out Detector trigger level */ -#define FUSE_EESAVE (unsigned char)~_BV(3) /* EEPROM memory is preserved through chip erase */ -#define FUSE_WDTON (unsigned char)~_BV(4) /* Watchdog Timer Always On */ -#define FUSE_SPIEN (unsigned char)~_BV(5) /* Enable Serial programming and Data Downloading */ -#define FUSE_DWEN (unsigned char)~_BV(6) /* debugWIRE Enable */ -#define FUSE_RSTDISBL (unsigned char)~_BV(7) /* External reset disable */ -#define HFUSE_DEFAULT (FUSE_SPIEN) - -/* Extended Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define EFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x94 -#define SIGNATURE_2 0x06 - - -#endif /* _AVR_IOM168_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom168p.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom168p.h deleted file mode 100644 index b08d391d0..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom168p.h +++ /dev/null @@ -1,874 +0,0 @@ -/* Copyright (c) 2007 Atmel Corporation - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. -*/ - -/* $Id: iom168p.h,v 1.3.2.10 2008/10/17 23:27:48 arcanum Exp $ */ - -/* avr/iom168p.h - definitions for ATmega168P. */ - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iom168p.h" -#else -# error "Attempt to include more than one file." -#endif - - -#ifndef _AVR_IOM168P_H_ -#define _AVR_IOM168P_H_ 1 - -/* Registers and associated bit numbers */ - -#define PINB _SFR_IO8(0x03) -#define PINB0 0 -#define PINB1 1 -#define PINB2 2 -#define PINB3 3 -#define PINB4 4 -#define PINB5 5 -#define PINB6 6 -#define PINB7 7 - -#define DDRB _SFR_IO8(0x04) -#define DDB0 0 -#define DDB1 1 -#define DDB2 2 -#define DDB3 3 -#define DDB4 4 -#define DDB5 5 -#define DDB6 6 -#define DDB7 7 - -#define PORTB _SFR_IO8(0x05) -#define PORTB0 0 -#define PORTB1 1 -#define PORTB2 2 -#define PORTB3 3 -#define PORTB4 4 -#define PORTB5 5 -#define PORTB6 6 -#define PORTB7 7 - -#define PINC _SFR_IO8(0x06) -#define PINC0 0 -#define PINC1 1 -#define PINC2 2 -#define PINC3 3 -#define PINC4 4 -#define PINC5 5 -#define PINC6 6 - -#define DDRC _SFR_IO8(0x07) -#define DDC0 0 -#define DDC1 1 -#define DDC2 2 -#define DDC3 3 -#define DDC4 4 -#define DDC5 5 -#define DDC6 6 - -#define PORTC _SFR_IO8(0x08) -#define PORTC0 0 -#define PORTC1 1 -#define PORTC2 2 -#define PORTC3 3 -#define PORTC4 4 -#define PORTC5 5 -#define PORTC6 6 - -#define PIND _SFR_IO8(0x09) -#define PIND0 0 -#define PIND1 1 -#define PIND2 2 -#define PIND3 3 -#define PIND4 4 -#define PIND5 5 -#define PIND6 6 -#define PIND7 7 - -#define DDRD _SFR_IO8(0x0A) -#define DDD0 0 -#define DDD1 1 -#define DDD2 2 -#define DDD3 3 -#define DDD4 4 -#define DDD5 5 -#define DDD6 6 -#define DDD7 7 - -#define PORTD _SFR_IO8(0x0B) -#define PORTD0 0 -#define PORTD1 1 -#define PORTD2 2 -#define PORTD3 3 -#define PORTD4 4 -#define PORTD5 5 -#define PORTD6 6 -#define PORTD7 7 - -#define TIFR0 _SFR_IO8(0x15) -#define TOV0 0 -#define OCF0A 1 -#define OCF0B 2 - -#define TIFR1 _SFR_IO8(0x16) -#define TOV1 0 -#define OCF1A 1 -#define OCF1B 2 -#define ICF1 5 - -#define TIFR2 _SFR_IO8(0x17) -#define TOV2 0 -#define OCF2A 1 -#define OCF2B 2 - -#define PCIFR _SFR_IO8(0x1B) -#define PCIF0 0 -#define PCIF1 1 -#define PCIF2 2 - -#define EIFR _SFR_IO8(0x1C) -#define INTF0 0 -#define INTF1 1 - -#define EIMSK _SFR_IO8(0x1D) -#define INT0 0 -#define INT1 1 - -#define GPIOR0 _SFR_IO8(0x1E) -#define GPIOR00 0 -#define GPIOR01 1 -#define GPIOR02 2 -#define GPIOR03 3 -#define GPIOR04 4 -#define GPIOR05 5 -#define GPIOR06 6 -#define GPIOR07 7 - -#define EECR _SFR_IO8(0x1F) -#define EERE 0 -#define EEPE 1 -#define EEMPE 2 -#define EERIE 3 -#define EEPM0 4 -#define EEPM1 5 - -#define EEDR _SFR_IO8(0x20) -#define EEDR0 0 -#define EEDR1 1 -#define EEDR2 2 -#define EEDR3 3 -#define EEDR4 4 -#define EEDR5 5 -#define EEDR6 6 -#define EEDR7 7 - -#define EEAR _SFR_IO16(0x21) - -#define EEARL _SFR_IO8(0x21) -#define EEAR0 0 -#define EEAR1 1 -#define EEAR2 2 -#define EEAR3 3 -#define EEAR4 4 -#define EEAR5 5 -#define EEAR6 6 -#define EEAR7 7 - -#define EEARH _SFR_IO8(0x22) -#define EEAR8 0 - -#define EEPROM_REG_LOCATIONS 1F2021 - -#define GTCCR _SFR_IO8(0x23) -#define PSRSYNC 0 -#define PSRASY 1 -#define TSM 7 - -#define TCCR0A _SFR_IO8(0x24) -#define WGM00 0 -#define WGM01 1 -#define COM0B0 4 -#define COM0B1 5 -#define COM0A0 6 -#define COM0A1 7 - -#define TCCR0B _SFR_IO8(0x25) -#define CS00 0 -#define CS01 1 -#define CS02 2 -#define WGM02 3 -#define FOC0B 6 -#define FOC0A 7 - -#define TCNT0 _SFR_IO8(0x26) -#define TCNT0_0 0 -#define TCNT0_1 1 -#define TCNT0_2 2 -#define TCNT0_3 3 -#define TCNT0_4 4 -#define TCNT0_5 5 -#define TCNT0_6 6 -#define TCNT0_7 7 - -#define OCR0A _SFR_IO8(0x27) -#define OCROA_0 0 -#define OCROA_1 1 -#define OCROA_2 2 -#define OCROA_3 3 -#define OCROA_4 4 -#define OCROA_5 5 -#define OCROA_6 6 -#define OCROA_7 7 - -#define OCR0B _SFR_IO8(0x28) -#define OCR0B_0 0 -#define OCR0B_1 1 -#define OCR0B_2 2 -#define OCR0B_3 3 -#define OCR0B_4 4 -#define OCR0B_5 5 -#define OCR0B_6 6 -#define OCR0B_7 7 - -#define GPIOR1 _SFR_IO8(0x2A) -#define GPIOR10 0 -#define GPIOR11 1 -#define GPIOR12 2 -#define GPIOR13 3 -#define GPIOR14 4 -#define GPIOR15 5 -#define GPIOR16 6 -#define GPIOR17 7 - -#define GPIOR2 _SFR_IO8(0x2B) -#define GPIOR20 0 -#define GPIOR21 1 -#define GPIOR22 2 -#define GPIOR23 3 -#define GPIOR24 4 -#define GPIOR25 5 -#define GPIOR26 6 -#define GPIOR27 7 - -#define SPCR _SFR_IO8(0x2C) -#define SPR0 0 -#define SPR1 1 -#define CPHA 2 -#define CPOL 3 -#define MSTR 4 -#define DORD 5 -#define SPE 6 -#define SPIE 7 - -#define SPSR _SFR_IO8(0x2D) -#define SPI2X 0 -#define WCOL 6 -#define SPIF 7 - -#define SPDR _SFR_IO8(0x2E) -#define SPDR0 0 -#define SPDR1 1 -#define SPDR2 2 -#define SPDR3 3 -#define SPDR4 4 -#define SPDR5 5 -#define SPDR6 6 -#define SPDR7 7 - -#define ACSR _SFR_IO8(0x30) -#define ACIS0 0 -#define ACIS1 1 -#define ACIC 2 -#define ACIE 3 -#define ACI 4 -#define ACO 5 -#define ACBG 6 -#define ACD 7 - -#define SMCR _SFR_IO8(0x33) -#define SE 0 -#define SM0 1 -#define SM1 2 -#define SM2 3 - -#define MCUSR _SFR_IO8(0x34) -#define PORF 0 -#define EXTRF 1 -#define BORF 2 -#define WDRF 3 - -#define MCUCR _SFR_IO8(0x35) -#define IVCE 0 -#define IVSEL 1 -#define PUD 4 -#define BODSE 5 -#define BODS 6 - -#define SPMCSR _SFR_IO8(0x37) -#define SELFPRGEN 0 -#define PGERS 1 -#define PGWRT 2 -#define BLBSET 3 -#define RWWSRE 4 -#define RWWSB 6 -#define SPMIE 7 - -#define WDTCSR _SFR_MEM8(0x60) -#define WDP0 0 -#define WDP1 1 -#define WDP2 2 -#define WDE 3 -#define WDCE 4 -#define WDP3 5 -#define WDIE 6 -#define WDIF 7 - -#define CLKPR _SFR_MEM8(0x61) -#define CLKPS0 0 -#define CLKPS1 1 -#define CLKPS2 2 -#define CLKPS3 3 -#define CLKPCE 7 - -#define PRR _SFR_MEM8(0x64) -#define PRADC 0 -#define PRUSART0 1 -#define PRSPI 2 -#define PRTIM1 3 -#define PRTIM0 5 -#define PRTIM2 6 -#define PRTWI 7 - -#define OSCCAL _SFR_MEM8(0x66) -#define CAL0 0 -#define CAL1 1 -#define CAL2 2 -#define CAL3 3 -#define CAL4 4 -#define CAL5 5 -#define CAL6 6 -#define CAL7 7 - -#define PCICR _SFR_MEM8(0x68) -#define PCIE0 0 -#define PCIE1 1 -#define PCIE2 2 - -#define EICRA _SFR_MEM8(0x69) -#define ISC00 0 -#define ISC01 1 -#define ISC10 2 -#define ISC11 3 - -#define PCMSK0 _SFR_MEM8(0x6B) -#define PCINT0 0 -#define PCINT1 1 -#define PCINT2 2 -#define PCINT3 3 -#define PCINT4 4 -#define PCINT5 5 -#define PCINT6 6 -#define PCINT7 7 - -#define PCMSK1 _SFR_MEM8(0x6C) -#define PCINT8 0 -#define PCINT9 1 -#define PCINT10 2 -#define PCINT11 3 -#define PCINT12 4 -#define PCINT13 5 -#define PCINT14 6 - -#define PCMSK2 _SFR_MEM8(0x6D) -#define PCINT16 0 -#define PCINT17 1 -#define PCINT18 2 -#define PCINT19 3 -#define PCINT20 4 -#define PCINT21 5 -#define PCINT22 6 -#define PCINT23 7 - -#define TIMSK0 _SFR_MEM8(0x6E) -#define TOIE0 0 -#define OCIE0A 1 -#define OCIE0B 2 - -#define TIMSK1 _SFR_MEM8(0x6F) -#define TOIE1 0 -#define OCIE1A 1 -#define OCIE1B 2 -#define ICIE1 5 - -#define TIMSK2 _SFR_MEM8(0x70) -#define TOIE2 0 -#define OCIE2A 1 -#define OCIE2B 2 - -#ifndef __ASSEMBLER__ -#define ADC _SFR_MEM16(0x78) -#endif -#define ADCW _SFR_MEM16(0x78) - -#define ADCL _SFR_MEM8(0x78) -#define ADCL0 0 -#define ADCL1 1 -#define ADCL2 2 -#define ADCL3 3 -#define ADCL4 4 -#define ADCL5 5 -#define ADCL6 6 -#define ADCL7 7 - -#define ADCH _SFR_MEM8(0x79) -#define ADCH0 0 -#define ADCH1 1 -#define ADCH2 2 -#define ADCH3 3 -#define ADCH4 4 -#define ADCH5 5 -#define ADCH6 6 -#define ADCH7 7 - -#define ADCSRA _SFR_MEM8(0x7A) -#define ADPS0 0 -#define ADPS1 1 -#define ADPS2 2 -#define ADIE 3 -#define ADIF 4 -#define ADATE 5 -#define ADSC 6 -#define ADEN 7 - -#define ADCSRB _SFR_MEM8(0x7B) -#define ADTS0 0 -#define ADTS1 1 -#define ADTS2 2 -#define ACME 6 - -#define ADMUX _SFR_MEM8(0x7C) -#define MUX0 0 -#define MUX1 1 -#define MUX2 2 -#define MUX3 3 -#define ADLAR 5 -#define REFS0 6 -#define REFS1 7 - -#define DIDR0 _SFR_MEM8(0x7E) -#define ADC0D 0 -#define ADC1D 1 -#define ADC2D 2 -#define ADC3D 3 -#define ADC4D 4 -#define ADC5D 5 - -#define DIDR1 _SFR_MEM8(0x7F) -#define AIN0D 0 -#define AIN1D 1 - -#define TCCR1A _SFR_MEM8(0x80) -#define WGM10 0 -#define WGM11 1 -#define COM1B0 4 -#define COM1B1 5 -#define COM1A0 6 -#define COM1A1 7 - -#define TCCR1B _SFR_MEM8(0x81) -#define CS10 0 -#define CS11 1 -#define CS12 2 -#define WGM12 3 -#define WGM13 4 -#define ICES1 6 -#define ICNC1 7 - -#define TCCR1C _SFR_MEM8(0x82) -#define FOC1B 6 -#define FOC1A 7 - -#define TCNT1 _SFR_MEM16(0x84) - -#define TCNT1L _SFR_MEM8(0x84) -#define TCNT1L0 0 -#define TCNT1L1 1 -#define TCNT1L2 2 -#define TCNT1L3 3 -#define TCNT1L4 4 -#define TCNT1L5 5 -#define TCNT1L6 6 -#define TCNT1L7 7 - -#define TCNT1H _SFR_MEM8(0x85) -#define TCNT1H0 0 -#define TCNT1H1 1 -#define TCNT1H2 2 -#define TCNT1H3 3 -#define TCNT1H4 4 -#define TCNT1H5 5 -#define TCNT1H6 6 -#define TCNT1H7 7 - -#define ICR1 _SFR_MEM16(0x86) - -#define ICR1L _SFR_MEM8(0x86) -#define ICR1L0 0 -#define ICR1L1 1 -#define ICR1L2 2 -#define ICR1L3 3 -#define ICR1L4 4 -#define ICR1L5 5 -#define ICR1L6 6 -#define ICR1L7 7 - -#define ICR1H _SFR_MEM8(0x87) -#define ICR1H0 0 -#define ICR1H1 1 -#define ICR1H2 2 -#define ICR1H3 3 -#define ICR1H4 4 -#define ICR1H5 5 -#define ICR1H6 6 -#define ICR1H7 7 - -#define OCR1A _SFR_MEM16(0x88) - -#define OCR1AL _SFR_MEM8(0x88) -#define OCR1AL0 0 -#define OCR1AL1 1 -#define OCR1AL2 2 -#define OCR1AL3 3 -#define OCR1AL4 4 -#define OCR1AL5 5 -#define OCR1AL6 6 -#define OCR1AL7 7 - -#define OCR1AH _SFR_MEM8(0x89) -#define OCR1AH0 0 -#define OCR1AH1 1 -#define OCR1AH2 2 -#define OCR1AH3 3 -#define OCR1AH4 4 -#define OCR1AH5 5 -#define OCR1AH6 6 -#define OCR1AH7 7 - -#define OCR1B _SFR_MEM16(0x8A) - -#define OCR1BL _SFR_MEM8(0x8A) -#define OCR1BL0 0 -#define OCR1BL1 1 -#define OCR1BL2 2 -#define OCR1BL3 3 -#define OCR1BL4 4 -#define OCR1BL5 5 -#define OCR1BL6 6 -#define OCR1BL7 7 - -#define OCR1BH _SFR_MEM8(0x8B) -#define OCR1BH0 0 -#define OCR1BH1 1 -#define OCR1BH2 2 -#define OCR1BH3 3 -#define OCR1BH4 4 -#define OCR1BH5 5 -#define OCR1BH6 6 -#define OCR1BH7 7 - -#define TCCR2A _SFR_MEM8(0xB0) -#define WGM20 0 -#define WGM21 1 -#define COM2B0 4 -#define COM2B1 5 -#define COM2A0 6 -#define COM2A1 7 - -#define TCCR2B _SFR_MEM8(0xB1) -#define CS20 0 -#define CS21 1 -#define CS22 2 -#define WGM22 3 -#define FOC2B 6 -#define FOC2A 7 - -#define TCNT2 _SFR_MEM8(0xB2) -#define TCNT2_0 0 -#define TCNT2_1 1 -#define TCNT2_2 2 -#define TCNT2_3 3 -#define TCNT2_4 4 -#define TCNT2_5 5 -#define TCNT2_6 6 -#define TCNT2_7 7 - -#define OCR2A _SFR_MEM8(0xB3) -#define OCR2_0 0 -#define OCR2_1 1 -#define OCR2_2 2 -#define OCR2_3 3 -#define OCR2_4 4 -#define OCR2_5 5 -#define OCR2_6 6 -#define OCR2_7 7 - -#define OCR2B _SFR_MEM8(0xB4) -#define OCR2_0 0 -#define OCR2_1 1 -#define OCR2_2 2 -#define OCR2_3 3 -#define OCR2_4 4 -#define OCR2_5 5 -#define OCR2_6 6 -#define OCR2_7 7 - -#define ASSR _SFR_MEM8(0xB6) -#define TCR2BUB 0 -#define TCR2AUB 1 -#define OCR2BUB 2 -#define OCR2AUB 3 -#define TCN2UB 4 -#define AS2 5 -#define EXCLK 6 - -#define TWBR _SFR_MEM8(0xB8) -#define TWBR0 0 -#define TWBR1 1 -#define TWBR2 2 -#define TWBR3 3 -#define TWBR4 4 -#define TWBR5 5 -#define TWBR6 6 -#define TWBR7 7 - -#define TWSR _SFR_MEM8(0xB9) -#define TWPS0 0 -#define TWPS1 1 -#define TWS3 3 -#define TWS4 4 -#define TWS5 5 -#define TWS6 6 -#define TWS7 7 - -#define TWAR _SFR_MEM8(0xBA) -#define TWGCE 0 -#define TWA0 1 -#define TWA1 2 -#define TWA2 3 -#define TWA3 4 -#define TWA4 5 -#define TWA5 6 -#define TWA6 7 - -#define TWDR _SFR_MEM8(0xBB) -#define TWD0 0 -#define TWD1 1 -#define TWD2 2 -#define TWD3 3 -#define TWD4 4 -#define TWD5 5 -#define TWD6 6 -#define TWD7 7 - -#define TWCR _SFR_MEM8(0xBC) -#define TWIE 0 -#define TWEN 2 -#define TWWC 3 -#define TWSTO 4 -#define TWSTA 5 -#define TWEA 6 -#define TWINT 7 - -#define TWAMR _SFR_MEM8(0xBD) -#define TWAM0 0 -#define TWAM1 1 -#define TWAM2 2 -#define TWAM3 3 -#define TWAM4 4 -#define TWAM5 5 -#define TWAM6 6 - -#define UCSR0A _SFR_MEM8(0xC0) -#define MPCM0 0 -#define U2X0 1 -#define UPE0 2 -#define DOR0 3 -#define FE0 4 -#define UDRE0 5 -#define TXC0 6 -#define RXC0 7 - -#define UCSR0B _SFR_MEM8(0xC1) -#define TXB80 0 -#define RXB80 1 -#define UCSZ02 2 -#define TXEN0 3 -#define RXEN0 4 -#define UDRIE0 5 -#define TXCIE0 6 -#define RXCIE0 7 - -#define UCSR0C _SFR_MEM8(0xC2) -#define UCPOL0 0 -#define UCSZ00 1 -#define UCPHA0 1 -#define UCSZ01 2 -#define UDORD0 2 -#define USBS0 3 -#define UPM00 4 -#define UPM01 5 -#define UMSEL00 6 -#define UMSEL01 7 - -#define UBRR0 _SFR_MEM16(0xC4) - -#define UBRR0L _SFR_MEM8(0xC4) -#define UBRR0_0 0 -#define UBRR0_1 1 -#define UBRR0_2 2 -#define UBRR0_3 3 -#define UBRR0_4 4 -#define UBRR0_5 5 -#define UBRR0_6 6 -#define UBRR0_7 7 - -#define UBRR0H _SFR_MEM8(0xC5) -#define UBRR0_8 0 -#define UBRR0_9 1 -#define UBRR0_10 2 -#define UBRR0_11 3 - -#define UDR0 _SFR_MEM8(0xC6) -#define UDR0_0 0 -#define UDR0_1 1 -#define UDR0_2 2 -#define UDR0_3 3 -#define UDR0_4 4 -#define UDR0_5 5 -#define UDR0_6 6 -#define UDR0_7 7 - - - -/* Interrupt Vectors */ -/* Interrupt Vector 0 is the reset vector. */ -#define INT0_vect _VECTOR(1) /* External Interrupt Request 0 */ -#define INT1_vect _VECTOR(2) /* External Interrupt Request 1 */ -#define PCINT0_vect _VECTOR(3) /* Pin Change Interrupt Request 0 */ -#define PCINT1_vect _VECTOR(4) /* Pin Change Interrupt Request 0 */ -#define PCINT2_vect _VECTOR(5) /* Pin Change Interrupt Request 1 */ -#define WDT_vect _VECTOR(6) /* Watchdog Time-out Interrupt */ -#define TIMER2_COMPA_vect _VECTOR(7) /* Timer/Counter2 Compare Match A */ -#define TIMER2_COMPB_vect _VECTOR(8) /* Timer/Counter2 Compare Match A */ -#define TIMER2_OVF_vect _VECTOR(9) /* Timer/Counter2 Overflow */ -#define TIMER1_CAPT_vect _VECTOR(10) /* Timer/Counter1 Capture Event */ -#define TIMER1_COMPA_vect _VECTOR(11) /* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPB_vect _VECTOR(12) /* Timer/Counter1 Compare Match B */ -#define TIMER1_OVF_vect _VECTOR(13) /* Timer/Counter1 Overflow */ -#define TIMER0_COMPA_vect _VECTOR(14) /* TimerCounter0 Compare Match A */ -#define TIMER0_COMPB_vect _VECTOR(15) /* TimerCounter0 Compare Match B */ -#define TIMER0_OVF_vect _VECTOR(16) /* Timer/Couner0 Overflow */ -#define SPI_STC_vect _VECTOR(17) /* SPI Serial Transfer Complete */ -#define USART_RX_vect _VECTOR(18) /* USART Rx Complete */ -#define USART_UDRE_vect _VECTOR(19) /* USART, Data Register Empty */ -#define USART_TX_vect _VECTOR(20) /* USART Tx Complete */ -#define ADC_vect _VECTOR(21) /* ADC Conversion Complete */ -#define EE_READY_vect _VECTOR(22) /* EEPROM Ready */ -#define ANALOG_COMP_vect _VECTOR(23) /* Analog Comparator */ -#define TWI_vect _VECTOR(24) /* Two-wire Serial Interface */ -#define SPM_READY_vect _VECTOR(25) /* Store Program Memory Read */ - -#define _VECTORS_SIZE (26 * 4) - - - -/* Constants */ -#define SPM_PAGESIZE 128 -#define RAMEND 0x4FF /* Last On-Chip SRAM Location */ -#define XRAMSIZE 0 -#define XRAMEND (RAMEND + XRAMSIZE) -#define E2END 0x1FF -#define E2PAGESIZE 4 -#define FLASHEND 0x3FFF - - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) /* Select Clock Source */ -#define FUSE_CKSEL1 (unsigned char)~_BV(1) /* Select Clock Source */ -#define FUSE_CKSEL2 (unsigned char)~_BV(2) /* Select Clock Source */ -#define FUSE_CKSEL3 (unsigned char)~_BV(3) /* Select Clock Source */ -#define FUSE_SUT0 (unsigned char)~_BV(4) /* Select start-up time */ -#define FUSE_SUT1 (unsigned char)~_BV(5) /* Select start-up time */ -#define FUSE_CKOUT (unsigned char)~_BV(6) /* Clock output */ -#define FUSE_CKDIV8 (unsigned char)~_BV(7) /* Divide clock by 8 */ -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) /* Brown-out Detector trigger level */ -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) /* Brown-out Detector trigger level */ -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) /* Brown-out Detector trigger level */ -#define FUSE_EESAVE (unsigned char)~_BV(3) /* EEPROM memory is preserved through chip erase */ -#define FUSE_WDTON (unsigned char)~_BV(4) /* Watchdog Timer Always On */ -#define FUSE_SPIEN (unsigned char)~_BV(5) /* Enable Serial programming and Data Downloading */ -#define FUSE_DWEN (unsigned char)~_BV(6) /* debugWIRE Enable */ -#define FUSE_RSTDISBL (unsigned char)~_BV(7) /* External reset disable */ -#define HFUSE_DEFAULT (FUSE_SPIEN) - -/* Extended Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define EFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1) - - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x94 -#define SIGNATURE_2 0x0B - - -#endif /* _AVR_IOM168P_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom169.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom169.h deleted file mode 100644 index f62177117..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom169.h +++ /dev/null @@ -1,1107 +0,0 @@ -/* Copyright (c) 2002, 2003, 2004, 2005 - Juergen Schilling - Eric B. Weddington - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iom169.h,v 1.26.2.5 2008/10/17 23:27:48 arcanum Exp $ */ - -/* iom169.h - definitions for ATmega169 */ - -/* This should be up to date with data sheet version 2514J-AVR-12/03. */ - -#ifndef _AVR_IOM169_H_ -#define _AVR_IOM169_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iom169.h" -#else -# error "Attempt to include more than one file." -#endif - -/* I/O registers */ - -/* Port A */ -#define PINA _SFR_IO8(0x00) -#define DDRA _SFR_IO8(0x01) -#define PORTA _SFR_IO8(0x02) - -/* Port B */ -#define PINB _SFR_IO8(0x03) -#define DDRB _SFR_IO8(0x04) -#define PORTB _SFR_IO8(0x05) - -/* Port C */ -#define PINC _SFR_IO8(0x06) -#define DDRC _SFR_IO8(0x07) -#define PORTC _SFR_IO8(0x08) - -/* Port D */ -#define PIND _SFR_IO8(0x09) -#define DDRD _SFR_IO8(0x0A) -#define PORTD _SFR_IO8(0x0B) - -/* Port E */ -#define PINE _SFR_IO8(0x0C) -#define DDRE _SFR_IO8(0x0D) -#define PORTE _SFR_IO8(0x0E) - -/* Port F */ -#define PINF _SFR_IO8(0x0F) -#define DDRF _SFR_IO8(0x10) -#define PORTF _SFR_IO8(0x11) - -/* Port G */ -#define PING _SFR_IO8(0x12) -#define DDRG _SFR_IO8(0x13) -#define PORTG _SFR_IO8(0x14) - -/* Timer/Counter 0 interrupt Flag Register */ -#define TIFR0 _SFR_IO8(0x15) - -/* Timer/Counter 1 interrupt Flag Register */ -#define TIFR1 _SFR_IO8(0x16) - -/* Timer/Counter 2 interrupt Flag Register */ -#define TIFR2 _SFR_IO8(0x17) - -/* External Interrupt Flag Register */ -#define EIFR _SFR_IO8(0x1C) - -/* External Interrupt Mask Register */ -#define EIMSK _SFR_IO8(0x1D) - -/* General Purpose I/O Register 0 */ -#define GPIOR0 _SFR_IO8(0x1E) - -#define EECR _SFR_IO8(0x1F) - -#define EEDR _SFR_IO8(0X20) - -/* Combine EEARL and EEARH */ -#define EEAR _SFR_IO16(0x21) -#define EEARL _SFR_IO8(0x21) -#define EEARH _SFR_IO8(0X22) - -/* 6-char sequence denoting where to find the EEPROM registers in memory space. - Adresses denoted in hex syntax with uppercase letters. Used by the EEPROM - subroutines. - First two letters: EECR address. - Second two letters: EEDR address. - Last two letters: EEAR address. */ -#define __EEPROM_REG_LOCATIONS__ 1F2021 - -/* General Timer/Counter Control Register */ -#define GTCCR _SFR_IO8(0x23) - -/* Timer/Counter Control Register A */ -#define TCCR0A _SFR_IO8(0x24) - -/* Timer/Counter Register */ -#define TCNT0 _SFR_IO8(0x26) - -/* Output Compare Register A */ -#define OCR0A _SFR_IO8(0x27) - -/* General Purpose I/O Register 1 */ -#define GPIOR1 _SFR_IO8(0x2A) - -/* General Purpose I/O Register 2 */ -#define GPIOR2 _SFR_IO8(0x2B) - -/* SPI Control Register */ -#define SPCR _SFR_IO8(0x2C) - -/* SPI Status Register */ -#define SPSR _SFR_IO8(0x2D) - -/* SPI Data Register */ -#define SPDR _SFR_IO8(0x2E) - -/* Analog Comperator Control and Status Register */ -#define ACSR _SFR_IO8(0x30) - -/* On-chip Debug Register */ -#define OCDR _SFR_IO8(0x31) - -/* Sleep Mode Control Register */ -#define SMCR _SFR_IO8(0x33) - -/* MCU Status Register */ -#define MCUSR _SFR_IO8(0x34) - -/* MCU Control Rgeister */ -#define MCUCR _SFR_IO8(0x35) - -/* Store Program Memory Control and Status Register */ -#define SPMCSR _SFR_IO8(0x37) - -/* Watchdog Timer Control Register */ -#define WDTCR _SFR_MEM8(0x60) - -/* Clock Prescale Register */ -#define CLKPR _SFR_MEM8(0x61) - -#define PRR _SFR_MEM8(0x64) -#define PRADC 0 -#define PRUSART0 1 -#define PRSPI 2 -#define PRTIM1 3 -#define PRLCD 4 - -/* Oscillator Calibration Register */ -#define OSCCAL _SFR_MEM8(0x66) - -/* External Interrupt Control Register A */ -#define EICRA _SFR_MEM8(0x69) - -/* Pin Change Mask Register */ -#define PCMSK _SFR_MEM16(0x6B) -#define PCMSK0 _SFR_MEM8(0x6B) -#define PCMSK1 _SFR_MEM8(0x6C) - -/* Timer/Counter 0 Interrupt Mask Register */ -#define TIMSK0 _SFR_MEM8(0x6E) - -/* Timer/Counter 1 Interrupt Mask Register */ -#define TIMSK1 _SFR_MEM8(0x6F) - -/* Timer/Counter 2 Interrupt Mask Register */ -#define TIMSK2 _SFR_MEM8(0x70) - -/* ADC Data Register */ -#ifndef __ASSEMBLER__ -#define ADC _SFR_MEM16(0x78) -#endif -#define ADCW _SFR_MEM16(0x78) -#define ADCL _SFR_MEM8(0x78) -#define ADCH _SFR_MEM8(0x79) - -/* ADC Control and Status Register A */ -#define ADCSRA _SFR_MEM8(0x7A) - -/* ADC Control and Status Register B */ -#define ADCSRB _SFR_MEM8(0x7B) - -/* ADC Multiplex Selection Register */ -#define ADMUX _SFR_MEM8(0x7C) - -/* NOTE: DIDR0 and DIDR1 are swapped in the register summary of the data sheet - (2514D-AVR-01/03), but seem to be correct in the discussions of the - registers. */ - -/* Digital Input Disable Register 0 */ -#define DIDR0 _SFR_MEM8(0x7E) - -/* Digital Input Disable Register 1 */ -#define DIDR1 _SFR_MEM8(0x7F) - -/* Timer/Counter1 Control Register A */ -#define TCCR1A _SFR_MEM8(0x80) - -/* Timer/Counter1 Control Register B */ -#define TCCR1B _SFR_MEM8(0x81) - -/* Timer/Counter1 Control Register C */ -#define TCCR1C _SFR_MEM8(0x82) - -/* Timer/Counter1 Register */ -#define TCNT1 _SFR_MEM16(0x84) -#define TCNT1L _SFR_MEM8(0x84) -#define TCNT1H _SFR_MEM8(0x85) - -/* Timer/Counter1 Input Capture Register */ -#define ICR1 _SFR_MEM16(0x86) -#define ICR1L _SFR_MEM8(0x86) -#define ICR1H _SFR_MEM8(0x87) - -/* Timer/Counter1 Output Compare Register A */ -#define OCR1A _SFR_MEM16(0x88) -#define OCR1AL _SFR_MEM8(0x88) -#define OCR1AH _SFR_MEM8(0x89) - -/* Timer/Counter1 Output Compare Registare B */ -#define OCR1B _SFR_MEM16(0x8A) -#define OCR1BL _SFR_MEM8(0x8A) -#define OCR1BH _SFR_MEM8(0x8B) - -/* Timer/Counter2 Control Register A */ -#define TCCR2A _SFR_MEM8(0xB0) - -/* Timer/Counter2 Register */ -#define TCNT2 _SFR_MEM8(0xB2) - -/* Timer/Counter2 Output Compare Register */ -#define OCR2A _SFR_MEM8(0xB3) - -/* Asynchronous Status Register */ -#define ASSR _SFR_MEM8(0xB6) - -/* USI Control Register */ -#define USICR _SFR_MEM8(0xB8) - -/* USI Status Register */ -#define USISR _SFR_MEM8(0xB9) - -/* USI Data Register */ -#define USIDR _SFR_MEM8(0xBA) - -/* USART0 Control and Status Register A */ -#define UCSRA _SFR_MEM8(0xC0) - -/* USART0 Control and Status Register B */ -#define UCSRB _SFR_MEM8(0xC1) - -/* USART0 Control and Status Register C */ -#define UCSRC _SFR_MEM8(0xC2) - -/* USART0 Baud Rate Register */ -#define UBRR _SFR_MEM16(0xC4) -#define UBRRL _SFR_MEM8(0xC4) -#define UBRRH _SFR_MEM8(0xC5) - -/* USART0 I/O Data Register */ -#define UDR _SFR_MEM8(0xC6) - -/* LCD Control and Status Register A */ -#define LCDCRA _SFR_MEM8(0xE4) - -/* LCD Control and Status Register B */ -#define LCDCRB _SFR_MEM8(0xE5) - -/* LCD Frame Rate Register */ -#define LCDFRR _SFR_MEM8(0xE6) - -/* LCD Contrast Control Register */ -#define LCDCCR _SFR_MEM8(0xE7) - -/* LCD Memory mapping */ -#define LCDDR0 _SFR_MEM8(0xEC) -#define LCDDR1 _SFR_MEM8(0xED) -#define LCDDR2 _SFR_MEM8(0xEE) -#define LCDDR3 _SFR_MEM8(0xEF) -#define LCDDR5 _SFR_MEM8(0xF1) -#define LCDDR6 _SFR_MEM8(0xF2) -#define LCDDR7 _SFR_MEM8(0xF3) -#define LCDDR8 _SFR_MEM8(0xF4) -#define LCDDR10 _SFR_MEM8(0xF6) -#define LCDDR11 _SFR_MEM8(0xF7) -#define LCDDR12 _SFR_MEM8(0xF8) -#define LCDDR13 _SFR_MEM8(0xF9) -#define LCDDR15 _SFR_MEM8(0xFB) -#define LCDDR16 _SFR_MEM8(0xFC) -#define LCDDR17 _SFR_MEM8(0xFD) -#define LCDDR18 _SFR_MEM8(0xFE) - -/* Interrupt vectors */ - -/* External Interrupt Request 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* Pin Change Interrupt Request 0 */ -#define PCINT0_vect _VECTOR(2) -#define SIG_PIN_CHANGE0 _VECTOR(2) - -/* Pin Change Interrupt Request 1 */ -#define PCINT1_vect _VECTOR(3) -#define SIG_PIN_CHANGE1 _VECTOR(3) - -/* Timer/Counter2 Compare Match */ -#define TIMER2_COMP_vect _VECTOR(4) -#define SIG_OUTPUT_COMPARE2 _VECTOR(4) - -/* Timer/Counter2 Overflow */ -#define TIMER2_OVF_vect _VECTOR(5) -#define SIG_OVERFLOW2 _VECTOR(5) - -/* Timer/Counter1 Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(6) -#define SIG_INPUT_CAPTURE1 _VECTOR(6) - -/* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPA_vect _VECTOR(7) -#define SIG_OUTPUT_COMPARE1A _VECTOR(7) - -/* Timer/Counter Compare Match B */ -#define TIMER1_COMPB_vect _VECTOR(8) -#define SIG_OUTPUT_COMPARE1B _VECTOR(8) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(9) -#define SIG_OVERFLOW1 _VECTOR(9) - -/* Timer/Counter0 Compare Match */ -#define TIMER0_COMP_vect _VECTOR(10) -#define SIG_OUTPUT_COMPARE0 _VECTOR(10) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(11) -#define SIG_OVERFLOW0 _VECTOR(11) - -/* SPI Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(12) -#define SIG_SPI _VECTOR(12) - -/* USART0, Rx Complete */ -#define USART0_RX_vect _VECTOR(13) -#define SIG_USART_RECV _VECTOR(13) - -/* USART0 Data register Empty */ -#define USART0_UDRE_vect _VECTOR(14) -#define SIG_USART_DATA _VECTOR(14) - -/* USART0, Tx Complete */ -#define USART0_TX_vect _VECTOR(15) -#define SIG_USART_TRANS _VECTOR(15) - -/* USI Start Condition */ -#define USI_START_vect _VECTOR(16) -#define SIG_USI_START _VECTOR(16) - -/* USI Overflow */ -#define USI_OVERFLOW_vect _VECTOR(17) -#define SIG_USI_OVERFLOW _VECTOR(17) - -/* Analog Comparator */ -#define ANALOG_COMP_vect _VECTOR(18) -#define SIG_COMPARATOR _VECTOR(18) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(19) -#define SIG_ADC _VECTOR(19) - -/* EEPROM Ready */ -#define EE_READY_vect _VECTOR(20) -#define SIG_EEPROM_READY _VECTOR(20) - -/* Store Program Memory Read */ -#define SPM_READY_vect _VECTOR(21) -#define SIG_SPM_READY _VECTOR(21) - -/* LCD Start of Frame */ -#define LCD_vect _VECTOR(22) -#define SIG_LCD _VECTOR(22) - -#define _VECTORS_SIZE 92 - -/* Bit numbers */ - -/* - PA7 = SEG3 - PA6 = SEG2 - PA5 = SEG1 - PA4 = SEG0 - PA3 = COM3 - PA2 = COM2 - PA1 = COM1 - PA0 = COM0 -*/ - -/* PORTA */ -#define PA7 7 -#define PA6 6 -#define PA5 5 -#define PA4 4 -#define PA3 3 -#define PA2 2 -#define PA1 1 -#define PA0 0 - -/* DDRA */ -#define DDA7 7 -#define DDA6 6 -#define DDA5 5 -#define DDA4 4 -#define DDA3 3 -#define DDA2 2 -#define DDA1 1 -#define DDA0 0 - -/* PINA */ -#define PINA7 7 -#define PINA6 6 -#define PINA5 5 -#define PINA4 4 -#define PINA3 3 -#define PINA2 2 -#define PINA1 1 -#define PINA0 0 - -/* - PB7 = OC2A / PCINT15 - PB6 = OC1B / PCINT14 - PB5 = OC1A / PCINT13 - PB4 = OC0A / PCINT12 - PB3 = MISO / PCINT11 - PB2 = MOSI / PCINT10 - PB1 = SCK / PCINT9 - PB0 = SS# / PCINT8 - */ - -/* PORTB */ -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -/* DDRB */ -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -/* PINB */ -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -/* - PC7 = SEG5 - PC6 = SEG6 - PC5 = SEG7 - PC4 = SEG8 - PC3 = SEG9 - PC2 = SEG10 - PC1 = SEG11 - PC0 = SEG12 -*/ - -/* PORTC */ -#define PC7 7 -#define PC6 6 -#define PC5 5 -#define PC4 4 -#define PC3 3 -#define PC2 2 -#define PC1 1 -#define PC0 0 - -/* DDRC */ -#define DDC7 7 -#define DDC6 6 -#define DDC5 5 -#define DDC4 4 -#define DDC3 3 -#define DDC2 2 -#define DDC1 1 -#define DDC0 0 - -/* PINC */ -#define PINC7 7 -#define PINC6 6 -#define PINC5 5 -#define PINC4 4 -#define PINC3 3 -#define PINC2 2 -#define PINC1 1 -#define PINC0 0 - -/* - PD7 = SEG15 - PD6 = SEG16 - PD5 = SEG17 - PD4 = SEG18 - PD3 = SEG19 - PD2 = SEG20 - PD1 = INT0 / SEG21 - PD0 = ICP / SEG22 - */ - -/* PORTD */ -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -/* DDRD */ -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -/* PIND */ -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -/* - PE7 = CLK0 / PCINT7 - PE6 = DO / PCINT6 - PE5 = DI / SDA / PCINT5 - PE4 = USCK / SCL / PCINT4 - PE3 = AIN1 / PCINT3 - PE2 = XCK / AIN0 / PCINT2 - PE1 = TXD / PCINT1 - PE0 = RXD / PCINT0 - */ - -/* PORTE */ -#define PE7 7 -#define PE6 6 -#define PE5 5 -#define PE4 4 -#define PE3 3 -#define PE2 2 -#define PE1 1 -#define PE0 0 - -/* DDRE */ -#define DDE7 7 -#define DDE6 6 -#define DDE5 5 -#define DDE4 4 -#define DDE3 3 -#define DDE2 2 -#define DDE1 1 -#define DDE0 0 - -/* PINE */ -#define PINE7 7 -#define PINE6 6 -#define PINE5 5 -#define PINE4 4 -#define PINE3 3 -#define PINE2 2 -#define PINE1 1 -#define PINE0 0 - -/* - PF7 = ADC7 / TDI - PF6 = ADC6 / TDO - PF5 = ADC5 / TMS - PF4 = ADC4 / TCK - PF3 = ADC3 - PF2 = ADC2 - PF1 = ADC1 - PF0 = ADC0 - */ - -/* PORTF */ -#define PF7 7 -#define PF6 6 -#define PF5 5 -#define PF4 4 -#define PF3 3 -#define PF2 2 -#define PF1 1 -#define PF0 0 - -/* DDRF */ -#define DDF7 7 -#define DDF6 6 -#define DDF5 5 -#define DDF4 4 -#define DDF3 3 -#define DDF2 2 -#define DDF1 1 -#define DDF0 0 - -/* PINF */ -#define PINF7 7 -#define PINF6 6 -#define PINF5 5 -#define PINF4 4 -#define PINF3 3 -#define PINF2 2 -#define PINF1 1 -#define PINF0 0 - -/* - PG5 = RESET# - PG4 = T0 / SEG23 - PG3 = T1 / SEG24 - PG2 = SEG4 - PG1 = SEG13 - PG0 = SEG14 - */ - -/* PORTG */ -#define PG4 4 -#define PG3 3 -#define PG2 2 -#define PG1 1 -#define PG0 0 - -/* DDRG */ -#define DDG4 4 -#define DDG3 3 -#define DDG2 2 -#define DDG1 1 -#define DDG0 0 - -/* PING */ -#define PING5 5 -#define PING4 4 -#define PING3 3 -#define PING2 2 -#define PING1 1 -#define PING0 0 - -/* TIFR0 */ -#define OCF0A 1 -#define TOV0 0 - -/* TIFR1 */ -#define ICF1 5 -#define OCF1B 2 -#define OCF1A 1 -#define TOV1 0 - -/* TIFR2 */ -#define OCF2A 1 -#define TOV2 0 - -/* EIFR */ -#define PCIF1 7 -#define PCIF0 6 -#define INTF0 0 - -/* EIMSK */ -#define PCIE1 7 -#define PCIE0 6 -#define INT0 0 - -/* EECR */ -#define EERIE 3 -#define EEMWE 2 -#define EEWE 1 -#define EERE 0 - -/* GTCCR */ -#define TSM 7 -#define PSR2 1 -#define PSR10 0 - -/* TCCR0A */ -#define FOC0A 7 -#define WGM00 6 -#define COM0A1 5 -#define COM0A0 4 -#define WGM01 3 -#define CS02 2 -#define CS01 1 -#define CS00 0 - -/* SPCR */ -#define SPIE 7 -#define SPE 6 -#define DORD 5 -#define MSTR 4 -#define CPOL 3 -#define CPHA 2 -#define SPR1 1 -#define SPR0 0 - -/* SPSR */ -#define SPIF 7 -#define WCOL 6 -#define SPI2X 0 - -/* ACSR */ -#define ACD 7 -#define ACBG 6 -#define ACO 5 -#define ACI 4 -#define ACIE 3 -#define ACIC 2 -#define ACIS1 1 -#define ACIS0 0 - -/* OCDR */ -#define IDRD 7 -#define OCD 7 -#define OCDR6 6 -#define OCDR5 5 -#define OCDR4 4 -#define OCDR3 3 -#define OCDR2 2 -#define OCDR1 1 -#define OCDR0 0 - -/* SMCR */ -#define SM2 3 -#define SM1 2 -#define SM0 1 -#define SE 0 - -/* MCUSR */ -#define JTRF 4 -#define WDRF 3 -#define BORF 2 -#define EXTRF 1 -#define PORF 0 - -/* MCUCR */ -#define JTD 7 -#define PUD 4 -#define IVSEL 1 -#define IVCE 0 - -/* SPMCSR */ -#define SPMIE 7 -#define RWWSB 6 -#define RWWSRE 4 -#define BLBSET 3 -#define PGWRT 2 -#define PGERS 1 -#define SPMEN 0 - -/* WDTCR */ -#define WDCE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -/* CLKPR */ -#define CLKPCE 7 -#define CLKPS3 3 -#define CLKPS2 2 -#define CLKPS1 1 -#define CLKPS0 0 - -/* EICRA */ -#define ISC01 1 -#define ISC00 0 - -/* PCMSK0 */ -#define PCINT7 7 -#define PCINT6 6 -#define PCINT5 5 -#define PCINT4 4 -#define PCINT3 3 -#define PCINT2 2 -#define PCINT1 1 -#define PCINT0 0 - -/* PCMSK1 */ -#define PCINT15 7 -#define PCINT14 6 -#define PCINT13 5 -#define PCINT12 4 -#define PCINT11 3 -#define PCINT10 2 -#define PCINT9 1 -#define PCINT8 0 - -/* TIMSK0 */ -#define OCIE0A 1 -#define TOIE0 0 - -/* TIMSK1 */ -#define ICIE1 5 -#define OCIE1B 2 -#define OCIE1A 1 -#define TOIE1 0 - -/* TIMSK2 */ -#define OCIE2A 1 -#define TOIE2 0 - -/* ADCSRA */ -#define ADEN 7 -#define ADSC 6 -#define ADATE 5 -#define ADIF 4 -#define ADIE 3 -#define ADPS2 2 -#define ADPS1 1 -#define ADPS0 0 - -/* ADCSRB */ -#define ACME 6 -#define ADTS2 2 -#define ADTS1 1 -#define ADTS0 0 - -/* ADMUX */ -#define REFS1 7 -#define REFS0 6 -#define ADLAR 5 -#define MUX4 4 -#define MUX3 3 -#define MUX2 2 -#define MUX1 1 -#define MUX0 0 - -/* DIDR1 */ -#define AIN1D 1 -#define AIN0D 0 - -/* DIDR0 */ -#define ADC7D 7 -#define ADC6D 6 -#define ADC5D 5 -#define ADC4D 4 -#define ADC3D 3 -#define ADC2D 2 -#define ADC1D 1 -#define ADC0D 0 - -/* TCCR1A */ -#define COM1A1 7 -#define COM1A0 6 -#define COM1B1 5 -#define COM1B0 4 -#define WGM11 1 -#define WGM10 0 - -/* TCCR1B */ -#define ICNC1 7 -#define ICES1 6 -#define WGM13 4 -#define WGM12 3 -#define CS12 2 -#define CS11 1 -#define CS10 0 - -/* TCCR1C */ -#define FOC1A 7 -#define FOC1B 6 - -/* TCCR2A */ -#define FOC2A 7 -#define WGM20 6 -#define COM2A1 5 -#define COM2A0 4 -#define WGM21 3 -#define CS22 2 -#define CS21 1 -#define CS20 0 - -/* ASSR */ -#define EXCLK 4 -#define AS2 3 -#define TCN2UB 2 -#define OCR2UB 1 -#define TCR2UB 0 - -/* USICR */ -#define USISIE 7 -#define USIOIE 6 -#define USIWM1 5 -#define USIWM0 4 -#define USICS1 3 -#define USICS0 2 -#define USICLK 1 -#define USITC 0 - -/* USISR */ -#define USISIF 7 -#define USIOIF 6 -#define USIPF 5 -#define USIDC 4 -#define USICNT3 3 -#define USICNT2 2 -#define USICNT1 1 -#define USICNT0 0 - -/* UCSRA */ -#define RXC 7 -#define TXC 6 -#define UDRE 5 -#define FE 4 -#define DOR 3 -#define UPE 2 -#define U2X 1 -#define MPCM 0 - -/* UCSRB */ -#define RXCIE 7 -#define TXCIE 6 -#define UDRIE 5 -#define RXEN 4 -#define TXEN 3 -#define UCSZ2 2 -#define RXB8 1 -#define TXB8 0 - -/* UCSRC */ -#define UMSEL 6 -#define UPM1 5 -#define UPM0 4 -#define USBS 3 -#define UCSZ1 2 -#define UCSZ0 1 -#define UCPOL 0 - -/* LCDCRA */ -#define LCDEN 7 -#define LCDAB 6 -#define LCDIF 4 -#define LCDIE 3 -#define LCDBD 2 /* Only in Rev. F */ -#define LCDCCD 1 /* Only in Rev. F */ -#define LCDBL 0 - -/* LCDCRB */ -#define LCDCS 7 -#define LCD2B 6 -#define LCDMUX1 5 -#define LCDMUX0 4 -#define LCDPM2 2 -#define LCDPM1 1 -#define LCDPM0 0 - -/* LCDFRR */ -#define LCDPS2 6 -#define LCDPS1 5 -#define LCDPS0 4 -#define LCDCD2 2 -#define LCDCD1 1 -#define LCDCD0 0 - -/* LCDCCR */ -#define LCDDC2 7 -#define LCDDC1 6 -#define LCDDC0 5 -#define LCDMDT 4 /* Only in Rev. F */ -#define LCDCC3 3 -#define LCDCC2 2 -#define LCDCC1 1 -#define LCDCC0 0 - -/* LCDDR0-18 */ -#define SEG24 0 - -#define SEG23 7 -#define SEG22 6 -#define SEG21 5 -#define SEG20 4 -#define SEG19 3 -#define SEG18 2 -#define SEG17 1 -#define SEG16 0 - -#define SEG15 7 -#define SEG14 6 -#define SEG13 5 -#define SEG12 4 -#define SEG11 3 -#define SEG10 2 -#define SEG9 1 -#define SEG8 0 - -#define SEG7 7 -#define SEG6 6 -#define SEG5 5 -#define SEG4 4 -#define SEG3 3 -#define SEG2 2 -#define SEG1 1 -#define SEG0 0 - -/* Constants */ -#define SPM_PAGESIZE 128 -#define RAMEND 0x4FF -#define XRAMEND 0x4FF -#define E2END 0x1FF -#define E2PAGESIZE 4 -#define FLASHEND 0x3FFF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_JTAGEN (unsigned char)~_BV(6) -#define FUSE_OCDEN (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_SPIEN & FUSE_JTAGEN) - -/* Extended Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(2) -#define FUSE_BODLEVEL2 (unsigned char)~_BV(3) -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x94 -#define SIGNATURE_2 0x05 - - -#endif /* _AVR_IOM169_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom169p.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom169p.h deleted file mode 100644 index 82543d7b7..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom169p.h +++ /dev/null @@ -1,1030 +0,0 @@ -/* Copyright (c) 2002, 2003, 2004, 2005, 2006 - Juergen Schilling - Eric B. Weddington - Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iom169p.h,v 1.2.2.5 2008/10/17 23:27:48 arcanum Exp $ */ - -/* iom169p.h - definitions for ATmega169P */ - -#ifndef _AVR_IOM169P_H_ -#define _AVR_IOM169P_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iom169p.h" -#else -# error "Attempt to include more than one file." -#endif - -/* I/O registers */ - -/* Port A */ -#define PINA _SFR_IO8(0x00) -#define PINA7 7 -#define PINA6 6 -#define PINA5 5 -#define PINA4 4 -#define PINA3 3 -#define PINA2 2 -#define PINA1 1 -#define PINA0 0 - -#define DDRA _SFR_IO8(0x01) -#define DDA7 7 -#define DDA6 6 -#define DDA5 5 -#define DDA4 4 -#define DDA3 3 -#define DDA2 2 -#define DDA1 1 -#define DDA0 0 - -#define PORTA _SFR_IO8(0x02) -#define PA7 7 -#define PA6 6 -#define PA5 5 -#define PA4 4 -#define PA3 3 -#define PA2 2 -#define PA1 1 -#define PA0 0 - -/* Port B */ -#define PINB _SFR_IO8(0x03) -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -#define DDRB _SFR_IO8(0x04) -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -#define PORTB _SFR_IO8(0x05) -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -/* Port C */ -#define PINC _SFR_IO8(0x06) -#define PINC7 7 -#define PINC6 6 -#define PINC5 5 -#define PINC4 4 -#define PINC3 3 -#define PINC2 2 -#define PINC1 1 -#define PINC0 0 - -#define DDRC _SFR_IO8(0x07) -#define DDC7 7 -#define DDC6 6 -#define DDC5 5 -#define DDC4 4 -#define DDC3 3 -#define DDC2 2 -#define DDC1 1 -#define DDC0 0 - -#define PORTC _SFR_IO8(0x08) -#define PC7 7 -#define PC6 6 -#define PC5 5 -#define PC4 4 -#define PC3 3 -#define PC2 2 -#define PC1 1 -#define PC0 0 - -/* Port D */ -#define PIND _SFR_IO8(0x09) -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -#define DDRD _SFR_IO8(0x0A) -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -#define PORTD _SFR_IO8(0x0B) -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -/* Port E */ -#define PINE _SFR_IO8(0x0C) -#define PINE7 7 -#define PINE6 6 -#define PINE5 5 -#define PINE4 4 -#define PINE3 3 -#define PINE2 2 -#define PINE1 1 -#define PINE0 0 - -#define DDRE _SFR_IO8(0x0D) -#define DDE7 7 -#define DDE6 6 -#define DDE5 5 -#define DDE4 4 -#define DDE3 3 -#define DDE2 2 -#define DDE1 1 -#define DDE0 0 - -#define PORTE _SFR_IO8(0x0E) -#define PE7 7 -#define PE6 6 -#define PE5 5 -#define PE4 4 -#define PE3 3 -#define PE2 2 -#define PE1 1 -#define PE0 0 - -/* Port F */ -#define PINF _SFR_IO8(0x0F) -#define PINF7 7 -#define PINF6 6 -#define PINF5 5 -#define PINF4 4 -#define PINF3 3 -#define PINF2 2 -#define PINF1 1 -#define PINF0 0 - -#define DDRF _SFR_IO8(0x10) -#define DDF7 7 -#define DDF6 6 -#define DDF5 5 -#define DDF4 4 -#define DDF3 3 -#define DDF2 2 -#define DDF1 1 -#define DDF0 0 - -#define PORTF _SFR_IO8(0x11) -#define PF7 7 -#define PF6 6 -#define PF5 5 -#define PF4 4 -#define PF3 3 -#define PF2 2 -#define PF1 1 -#define PF0 0 - -/* Port G */ -#define PING _SFR_IO8(0x12) -#define PING5 5 -#define PING4 4 -#define PING3 3 -#define PING2 2 -#define PING1 1 -#define PING0 0 - -#define DDRG _SFR_IO8(0x13) -#define DDG4 4 -#define DDG3 3 -#define DDG2 2 -#define DDG1 1 -#define DDG0 0 - -#define PORTG _SFR_IO8(0x14) -#define PG4 4 -#define PG3 3 -#define PG2 2 -#define PG1 1 -#define PG0 0 - -/* Timer/Counter 0 interrupt Flag Register */ -#define TIFR0 _SFR_IO8(0x15) -#define OCF0A 1 -#define TOV0 0 - -/* Timer/Counter 1 interrupt Flag Register */ -#define TIFR1 _SFR_IO8(0x16) -#define ICF1 5 -#define OCF1B 2 -#define OCF1A 1 -#define TOV1 0 - -/* Timer/Counter 2 interrupt Flag Register */ -#define TIFR2 _SFR_IO8(0x17) -#define OCF2A 1 -#define TOV2 0 - -/* External Interrupt Flag Register */ -#define EIFR _SFR_IO8(0x1C) -#define PCIF1 7 -#define PCIF0 6 -#define INTF0 0 - -/* External Interrupt Mask Register */ -#define EIMSK _SFR_IO8(0x1D) -#define PCIE1 7 -#define PCIE0 6 -#define INT0 0 - -/* General Purpose I/O Register 0 */ -#define GPIOR0 _SFR_IO8(0x1E) - -#define EECR _SFR_IO8(0x1F) -#define EERIE 3 -#define EEMWE 2 -#define EEWE 1 -#define EERE 0 - -#define EEDR _SFR_IO8(0X20) - -/* Combine EEARL and EEARH */ -#define EEAR _SFR_IO16(0x21) -#define EEARL _SFR_IO8(0x21) -#define EEARH _SFR_IO8(0X22) - -/* 6-char sequence denoting where to find the EEPROM registers in memory space. - Adresses denoted in hex syntax with uppercase letters. Used by the EEPROM - subroutines. - First two letters: EECR address. - Second two letters: EEDR address. - Last two letters: EEAR address. */ -#define __EEPROM_REG_LOCATIONS__ 1F2021 - -/* General Timer/Counter Control Register */ -#define GTCCR _SFR_IO8(0x23) -#define TSM 7 -#define PSR2 1 -#define PSR10 0 - -/* Timer/Counter Control Register A */ -#define TCCR0A _SFR_IO8(0x24) -#define FOC0A 7 -#define WGM00 6 -#define COM0A1 5 -#define COM0A0 4 -#define WGM01 3 -#define CS02 2 -#define CS01 1 -#define CS00 0 - -/* Timer/Counter Register */ -#define TCNT0 _SFR_IO8(0x26) - -/* Output Compare Register A */ -#define OCR0A _SFR_IO8(0x27) - -/* General Purpose I/O Register 1 */ -#define GPIOR1 _SFR_IO8(0x2A) - -/* General Purpose I/O Register 2 */ -#define GPIOR2 _SFR_IO8(0x2B) - -/* SPI Control Register */ -#define SPCR _SFR_IO8(0x2C) -#define SPIE 7 -#define SPE 6 -#define DORD 5 -#define MSTR 4 -#define CPOL 3 -#define CPHA 2 -#define SPR1 1 -#define SPR0 0 - -/* SPI Status Register */ -#define SPSR _SFR_IO8(0x2D) -#define SPIF 7 -#define WCOL 6 -#define SPI2X 0 - -/* SPI Data Register */ -#define SPDR _SFR_IO8(0x2E) - -/* Analog Comperator Control and Status Register */ -#define ACSR _SFR_IO8(0x30) -#define ACD 7 -#define ACBG 6 -#define ACO 5 -#define ACI 4 -#define ACIE 3 -#define ACIC 2 -#define ACIS1 1 -#define ACIS0 0 - -/* On-chip Debug Register */ -#define OCDR _SFR_IO8(0x31) -#define IDRD 7 -#define OCDR7 7 -#define OCDR6 6 -#define OCDR5 5 -#define OCDR4 4 -#define OCDR3 3 -#define OCDR2 2 -#define OCDR1 1 -#define OCDR0 0 - -/* Sleep Mode Control Register */ -#define SMCR _SFR_IO8(0x33) -#define SM2 3 -#define SM1 2 -#define SM0 1 -#define SE 0 - -/* MCU Status Register */ -#define MCUSR _SFR_IO8(0x34) -#define JTRF 4 -#define WDRF 3 -#define BORF 2 -#define EXTRF 1 -#define PORF 0 - -/* MCU Control Rgeister */ -#define MCUCR _SFR_IO8(0x35) -#define JTD 7 -#define PUD 4 -#define IVSEL 1 -#define IVCE 0 - -/* Store Program Memory Control and Status Register */ -#define SPMCSR _SFR_IO8(0x37) -#define SPMIE 7 -#define RWWSB 6 -#define RWWSRE 4 -#define BLBSET 3 -#define PGWRT 2 -#define PGERS 1 -#define SPMEN 0 - -/* Watchdog Timer Control Register */ -#define WDTCR _SFR_MEM8(0x60) -#define WDCE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -/* Clock Prescale Register */ -#define CLKPR _SFR_MEM8(0x61) -#define CLKPCE 7 -#define CLKPS3 3 -#define CLKPS2 2 -#define CLKPS1 1 -#define CLKPS0 0 - -#define PRR _SFR_MEM8(0x64) -#define PRADC 0 -#define PRUSART0 1 -#define PRSPI 2 -#define PRTIM1 3 -#define PRLCD 4 - -/* Oscillator Calibration Register */ -#define OSCCAL _SFR_MEM8(0x66) - -/* External Interrupt Control Register A */ -#define EICRA _SFR_MEM8(0x69) -#define ISC01 1 -#define ISC00 0 - -/* Pin Change Mask Register */ -#define PCMSK _SFR_MEM16(0x6B) - -#define PCMSK0 _SFR_MEM8(0x6B) -#define PCINT7 7 -#define PCINT6 6 -#define PCINT5 5 -#define PCINT4 4 -#define PCINT3 3 -#define PCINT2 2 -#define PCINT1 1 -#define PCINT0 0 - -#define PCMSK1 _SFR_MEM8(0x6C) -#define PCINT15 7 -#define PCINT14 6 -#define PCINT13 5 -#define PCINT12 4 -#define PCINT11 3 -#define PCINT10 2 -#define PCINT9 1 -#define PCINT8 0 - -/* Timer/Counter 0 Interrupt Mask Register */ -#define TIMSK0 _SFR_MEM8(0x6E) -#define OCIE0A 1 -#define TOIE0 0 - -/* Timer/Counter 1 Interrupt Mask Register */ -#define TIMSK1 _SFR_MEM8(0x6F) -#define ICIE1 5 -#define OCIE1B 2 -#define OCIE1A 1 -#define TOIE1 0 - -/* Timer/Counter 2 Interrupt Mask Register */ -#define TIMSK2 _SFR_MEM8(0x70) -#define OCIE2A 1 -#define TOIE2 0 - -/* ADC Data Register */ -#ifndef __ASSEMBLER__ -#define ADC _SFR_MEM16(0x78) -#endif -#define ADCW _SFR_MEM16(0x78) -#define ADCL _SFR_MEM8(0x78) -#define ADCH _SFR_MEM8(0x79) - -/* ADC Control and Status Register A */ -#define ADCSRA _SFR_MEM8(0x7A) -#define ADEN 7 -#define ADSC 6 -#define ADATE 5 -#define ADIF 4 -#define ADIE 3 -#define ADPS2 2 -#define ADPS1 1 -#define ADPS0 0 - - -/* ADC Control and Status Register B */ -#define ADCSRB _SFR_MEM8(0x7B) -#define ACME 6 -#define ADTS2 2 -#define ADTS1 1 -#define ADTS0 0 - -/* ADC Multiplex Selection Register */ -#define ADMUX _SFR_MEM8(0x7C) -/* ADMUX */ -#define REFS1 7 -#define REFS0 6 -#define ADLAR 5 -#define MUX4 4 -#define MUX3 3 -#define MUX2 2 -#define MUX1 1 -#define MUX0 0 - -/* Digital Input Disable Register 0 */ -#define DIDR0 _SFR_MEM8(0x7E) -#define ADC7D 7 -#define ADC6D 6 -#define ADC5D 5 -#define ADC4D 4 -#define ADC3D 3 -#define ADC2D 2 -#define ADC1D 1 -#define ADC0D 0 - -/* Digital Input Disable Register 1 */ -#define DIDR1 _SFR_MEM8(0x7F) -#define AIN1D 1 -#define AIN0D 0 - -/* Timer/Counter1 Control Register A */ -#define TCCR1A _SFR_MEM8(0x80) -#define COM1A1 7 -#define COM1A0 6 -#define COM1B1 5 -#define COM1B0 4 -#define WGM11 1 -#define WGM10 0 - -/* Timer/Counter1 Control Register B */ -#define TCCR1B _SFR_MEM8(0x81) -#define ICNC1 7 -#define ICES1 6 -#define WGM13 4 -#define WGM12 3 -#define CS12 2 -#define CS11 1 -#define CS10 0 - -/* Timer/Counter1 Control Register C */ -#define TCCR1C _SFR_MEM8(0x82) -#define FOC1A 7 -#define FOC1B 6 - -/* Timer/Counter1 Register */ -#define TCNT1 _SFR_MEM16(0x84) -#define TCNT1L _SFR_MEM8(0x84) -#define TCNT1H _SFR_MEM8(0x85) - -/* Timer/Counter1 Input Capture Register */ -#define ICR1 _SFR_MEM16(0x86) -#define ICR1L _SFR_MEM8(0x86) -#define ICR1H _SFR_MEM8(0x87) - -/* Timer/Counter1 Output Compare Register A */ -#define OCR1A _SFR_MEM16(0x88) -#define OCR1AL _SFR_MEM8(0x88) -#define OCR1AH _SFR_MEM8(0x89) - -/* Timer/Counter1 Output Compare Registare B */ -#define OCR1B _SFR_MEM16(0x8A) -#define OCR1BL _SFR_MEM8(0x8A) -#define OCR1BH _SFR_MEM8(0x8B) - -/* Timer/Counter2 Control Register A */ -#define TCCR2A _SFR_MEM8(0xB0) -#define FOC2A 7 -#define WGM20 6 -#define COM2A1 5 -#define COM2A0 4 -#define WGM21 3 -#define CS22 2 -#define CS21 1 -#define CS20 0 - -/* Timer/Counter2 Register */ -#define TCNT2 _SFR_MEM8(0xB2) - -/* Timer/Counter2 Output Compare Register */ -#define OCR2A _SFR_MEM8(0xB3) - -/* Asynchronous Status Register */ -#define ASSR _SFR_MEM8(0xB6) -#define EXCLK 4 -#define AS2 3 -#define TCN2UB 2 -#define OCR2UB 1 -#define TCR2UB 0 - -/* USI Control Register */ -#define USICR _SFR_MEM8(0xB8) -#define USISIE 7 -#define USIOIE 6 -#define USIWM1 5 -#define USIWM0 4 -#define USICS1 3 -#define USICS0 2 -#define USICLK 1 -#define USITC 0 - -/* USI Status Register */ -#define USISR _SFR_MEM8(0xB9) -#define USISIF 7 -#define USIOIF 6 -#define USIPF 5 -#define USIDC 4 -#define USICNT3 3 -#define USICNT2 2 -#define USICNT1 1 -#define USICNT0 0 - -/* USI Data Register */ -#define USIDR _SFR_MEM8(0xBA) - -/* USART0 Control and Status Register A */ -#define UCSR0A _SFR_MEM8(0xC0) -#define RXC0 7 -#define TXC0 6 -#define UDRE0 5 -#define FE0 4 -#define DOR0 3 -#define UPE0 2 -#define U2X0 1 -#define MPCM0 0 - -/* USART0 Control and Status Register B */ -#define UCSR0B _SFR_MEM8(0xC1) -#define RXCIE0 7 -#define TXCIE0 6 -#define UDRIE0 5 -#define RXEN0 4 -#define TXEN0 3 -#define UCSZ02 2 -#define RXB80 1 -#define TXB80 0 - -/* USART0 Control and Status Register C */ -#define UCSR0C _SFR_MEM8(0xC2) -#define UMSEL0 6 -#define UPM01 5 -#define UPM00 4 -#define USBS0 3 -#define UCSZ01 2 -#define UCSZ00 1 -#define UCPOL0 0 - -/* USART0 Baud Rate Register */ -#define UBRR0 _SFR_MEM16(0xC4) -#define UBRR0L _SFR_MEM8(0xC4) -#define UBRR0H _SFR_MEM8(0xC5) - -/* USART0 I/O Data Register */ -#define UDR0 _SFR_MEM8(0xC6) - -/* LCD Control and Status Register A */ -#define LCDCRA _SFR_MEM8(0xE4) -#define LCDEN 7 -#define LCDAB 6 -#define LCDIF 4 -#define LCDIE 3 -#define LCDBD 2 -#define LCDCCD 1 -#define LCDBL 0 - -/* LCD Control and Status Register B */ -#define LCDCRB _SFR_MEM8(0xE5) -#define LCDCS 7 -#define LCD2B 6 -#define LCDMUX1 5 -#define LCDMUX0 4 -#define LCDPM2 2 -#define LCDPM1 1 -#define LCDPM0 0 - -/* LCD Frame Rate Register */ -#define LCDFRR _SFR_MEM8(0xE6) -#define LCDPS2 6 -#define LCDPS1 5 -#define LCDPS0 4 -#define LCDCD2 2 -#define LCDCD1 1 -#define LCDCD0 0 - -/* LCD Contrast Control Register */ -#define LCDCCR _SFR_MEM8(0xE7) -#define LCDDC2 7 -#define LCDDC1 6 -#define LCDDC0 5 -#define LCDMDT 4 -#define LCDCC3 3 -#define LCDCC2 2 -#define LCDCC1 1 -#define LCDCC0 0 - -/* LCD Memory mapping */ -#define LCDDR0 _SFR_MEM8(0xEC) -#define SEG007 7 -#define SEG006 6 -#define SEG005 5 -#define SEG004 4 -#define SEG003 3 -#define SEG002 2 -#define SEG001 1 -#define SEG000 0 - -#define LCDDR1 _SFR_MEM8(0xED) -#define SEG015 7 -#define SEG014 6 -#define SEG013 5 -#define SEG012 4 -#define SEG011 3 -#define SEG010 2 -#define SEG009 1 -#define SEG008 0 - -#define LCDDR2 _SFR_MEM8(0xEE) -#define SEG023 7 -#define SEG022 6 -#define SEG021 5 -#define SEG020 4 -#define SEG019 3 -#define SEG018 2 -#define SEG017 1 -#define SEG016 0 - -#define LCDDR3 _SFR_MEM8(0xEF) -#define SEG024 0 - -#define LCDDR5 _SFR_MEM8(0xF1) -#define SEG107 7 -#define SEG106 6 -#define SEG105 5 -#define SEG104 4 -#define SEG103 3 -#define SEG102 2 -#define SEG101 1 -#define SEG100 0 - -#define LCDDR6 _SFR_MEM8(0xF2) -#define SEG115 7 -#define SEG114 6 -#define SEG113 5 -#define SEG112 4 -#define SEG111 3 -#define SEG110 2 -#define SEG109 1 -#define SEG108 0 - -#define LCDDR7 _SFR_MEM8(0xF3) -#define SEG123 7 -#define SEG122 6 -#define SEG121 5 -#define SEG120 4 -#define SEG119 3 -#define SEG118 2 -#define SEG117 1 -#define SEG116 0 - -#define LCDDR8 _SFR_MEM8(0xF4) -#define SEG124 0 - -#define LCDDR10 _SFR_MEM8(0xF6) -#define SEG207 7 -#define SEG206 6 -#define SEG205 5 -#define SEG204 4 -#define SEG203 3 -#define SEG202 2 -#define SEG201 1 -#define SEG200 0 - -#define LCDDR11 _SFR_MEM8(0xF7) -#define SEG215 7 -#define SEG214 6 -#define SEG213 5 -#define SEG212 4 -#define SEG211 3 -#define SEG210 2 -#define SEG209 1 -#define SEG208 0 - -#define LCDDR12 _SFR_MEM8(0xF8) -#define SEG223 7 -#define SEG222 6 -#define SEG221 5 -#define SEG220 4 -#define SEG219 3 -#define SEG218 2 -#define SEG217 1 -#define SEG216 0 - -#define LCDDR13 _SFR_MEM8(0xF9) -#define SEG224 0 - -#define LCDDR15 _SFR_MEM8(0xFB) -#define SEG307 7 -#define SEG306 6 -#define SEG305 5 -#define SEG304 4 -#define SEG303 3 -#define SEG302 2 -#define SEG301 1 -#define SEG300 0 - -#define LCDDR16 _SFR_MEM8(0xFC) -#define SEG315 7 -#define SEG314 6 -#define SEG313 5 -#define SEG312 4 -#define SEG311 3 -#define SEG310 2 -#define SEG309 1 -#define SEG308 0 - -#define LCDDR17 _SFR_MEM8(0xFD) -#define SEG323 7 -#define SEG322 6 -#define SEG321 5 -#define SEG320 4 -#define SEG319 3 -#define SEG318 2 -#define SEG317 1 -#define SEG316 0 - -#define LCDDR18 _SFR_MEM8(0xFE) -#define SEG324 0 - -/* LCDDR0-18 */ -#define SEG24 0 - -#define SEG23 7 -#define SEG22 6 -#define SEG21 5 -#define SEG20 4 -#define SEG19 3 -#define SEG18 2 -#define SEG17 1 -#define SEG16 0 - -#define SEG15 7 -#define SEG14 6 -#define SEG13 5 -#define SEG12 4 -#define SEG11 3 -#define SEG10 2 -#define SEG9 1 -#define SEG8 0 - -#define SEG7 7 -#define SEG6 6 -#define SEG5 5 -#define SEG4 4 -#define SEG3 3 -#define SEG2 2 -#define SEG1 1 -#define SEG0 0 - -/* Interrupt vectors */ - -/* External Interrupt Request 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* Pin Change Interrupt Request 0 */ -#define PCINT0_vect _VECTOR(2) -#define SIG_PIN_CHANGE0 _VECTOR(2) - -/* Pin Change Interrupt Request 1 */ -#define PCINT1_vect _VECTOR(3) -#define SIG_PIN_CHANGE1 _VECTOR(3) - -/* Timer/Counter2 Compare Match */ -#define TIMER2_COMP_vect _VECTOR(4) -#define SIG_OUTPUT_COMPARE2 _VECTOR(4) - -/* Timer/Counter2 Overflow */ -#define TIMER2_OVF_vect _VECTOR(5) -#define SIG_OVERFLOW2 _VECTOR(5) - -/* Timer/Counter1 Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(6) -#define SIG_INPUT_CAPTURE1 _VECTOR(6) - -/* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPA_vect _VECTOR(7) -#define SIG_OUTPUT_COMPARE1A _VECTOR(7) - -/* Timer/Counter Compare Match B */ -#define TIMER1_COMPB_vect _VECTOR(8) -#define SIG_OUTPUT_COMPARE1B _VECTOR(8) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(9) -#define SIG_OVERFLOW1 _VECTOR(9) - -/* Timer/Counter0 Compare Match */ -#define TIMER0_COMP_vect _VECTOR(10) -#define SIG_OUTPUT_COMPARE0 _VECTOR(10) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(11) -#define SIG_OVERFLOW0 _VECTOR(11) - -/* SPI Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(12) -#define SIG_SPI _VECTOR(12) - -/* USART0, Rx Complete */ -#define USART0_RX_vect _VECTOR(13) -#define SIG_USART_RECV _VECTOR(13) - -/* USART0 Data register Empty */ -#define USART0_UDRE_vect _VECTOR(14) -#define SIG_USART_DATA _VECTOR(14) - -/* USART0, Tx Complete */ -#define USART0_TX_vect _VECTOR(15) -#define SIG_USART_TRANS _VECTOR(15) - -/* USI Start Condition */ -#define USI_START_vect _VECTOR(16) -#define SIG_USI_START _VECTOR(16) - -/* USI Overflow */ -#define USI_OVERFLOW_vect _VECTOR(17) -#define SIG_USI_OVERFLOW _VECTOR(17) - -/* Analog Comparator */ -#define ANALOG_COMP_vect _VECTOR(18) -#define SIG_COMPARATOR _VECTOR(18) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(19) -#define SIG_ADC _VECTOR(19) - -/* EEPROM Ready */ -#define EE_READY_vect _VECTOR(20) -#define SIG_EEPROM_READY _VECTOR(20) - -/* Store Program Memory Read */ -#define SPM_READY_vect _VECTOR(21) -#define SIG_SPM_READY _VECTOR(21) - -/* LCD Start of Frame */ -#define LCD_vect _VECTOR(22) -#define SIG_LCD _VECTOR(22) - -#define _VECTORS_SIZE 92 - -/* Constants */ -#define SPM_PAGESIZE 128 -#define RAMEND 0x4FF -#define XRAMEND 0x4FF -#define E2END 0x1FF -#define E2PAGESIZE 4 -#define FLASHEND 0x3FFF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_JTAGEN (unsigned char)~_BV(6) -#define FUSE_OCDEN (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_SPIEN & FUSE_JTAGEN) - -/* Extended Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(2) -#define FUSE_BODLEVEL2 (unsigned char)~_BV(3) -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x94 -#define SIGNATURE_2 0x05 - - -#endif /* _AVR_IOM169P_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom16hva.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom16hva.h deleted file mode 100644 index 33adf154e..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom16hva.h +++ /dev/null @@ -1,75 +0,0 @@ -/* Copyright (c) 2007, Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iom16hva.h,v 1.2.2.5 2008/10/17 23:27:48 arcanum Exp $ */ - -/* iom16hva.h - definitions for ATmega16HVA. */ - -#ifndef _AVR_IOM16HVA_H_ -#define _AVR_IOM16HVA_H_ 1 - -#include - -/* Constants */ -#define SPM_PAGESIZE 128 -#define RAMEND 0x2FF -#define XRAMEND 0x2FF -#define E2END 0xFF -#define E2PAGESIZE 4 -#define FLASHEND 0x3FFF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 1 - -/* Low Fuse Byte */ -#define FUSE_SUT0 (unsigned char)~_BV(0) -#define FUSE_SUT1 (unsigned char)~_BV(1) -#define FUSE_SUT2 (unsigned char)~_BV(2) -#define FUSE_SELFPRGEN (unsigned char)~_BV(3) -#define FUSE_DWEN (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_EESAVE (unsigned char)~_BV(6) -#define FUSE_WDTON (unsigned char)~_BV(7) -#define FUSE_DEFAULT (FUSE_SPIEN) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x94 -#define SIGNATURE_2 0x0C - - -#endif /* _AVR_IOM16HVA_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom2560.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom2560.h deleted file mode 100644 index 07039ad7e..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom2560.h +++ /dev/null @@ -1,94 +0,0 @@ -/* Copyright (c) 2005 Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id */ - -/* avr/iom2560.h - definitions for ATmega2560 */ - -#ifndef _AVR_IOM2560_H_ -#define _AVR_IOM2560_H_ 1 - -#include - -/* Constants */ -#define SPM_PAGESIZE 256 -#define RAMEND 0x21FF -#define XRAMEND 0xFFFF -#define E2END 0xFFF -#define E2PAGESIZE 8 -#define FLASHEND 0x3FFFF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_JTAGEN (unsigned char)~_BV(6) -#define FUSE_OCDEN (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_SPIEN & FUSE_JTAGEN) - -/* Extended Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x98 -#define SIGNATURE_2 0x01 - - -#endif /* _AVR_IOM2560_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom2561.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom2561.h deleted file mode 100644 index fd379a259..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom2561.h +++ /dev/null @@ -1,94 +0,0 @@ -/* Copyright (c) 2005 Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id */ - -/* avr/iom2561.h - definitions for ATmega2561 */ - -#ifndef _AVR_IOM2561_H_ -#define _AVR_IOM2561_H_ 1 - -#include - -/* Constants */ -#define SPM_PAGESIZE 256 -#define RAMEND 0x21FF -#define XRAMEND 0xFFFF -#define E2END 0xFFF -#define E2PAGESIZE 8 -#define FLASHEND 0x3FFFF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_JTAGEN (unsigned char)~_BV(6) -#define FUSE_OCDEN (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_SPIEN & FUSE_JTAGEN) - -/* Extended Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x98 -#define SIGNATURE_2 0x02 - - -#endif /* _AVR_IOM2561_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom32.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom32.h deleted file mode 100644 index 0b912e50f..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom32.h +++ /dev/null @@ -1,696 +0,0 @@ -/* Copyright (c) 2002, Steinar Haugen - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iom32.h,v 1.11.2.5 2008/10/17 23:27:48 arcanum Exp $ */ - -/* avr/iom32.h - definitions for ATmega32 */ - -#ifndef _AVR_IOM32_H_ -#define _AVR_IOM32_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iom32.h" -#else -# error "Attempt to include more than one file." -#endif - -/* I/O registers */ - -/* TWI stands for "Two Wire Interface" or "TWI Was I2C(tm)" */ -#define TWBR _SFR_IO8(0x00) -#define TWSR _SFR_IO8(0x01) -#define TWAR _SFR_IO8(0x02) -#define TWDR _SFR_IO8(0x03) - -/* ADC */ -#ifndef __ASSEMBLER__ -#define ADC _SFR_IO16(0x04) -#endif -#define ADCW _SFR_IO16(0x04) -#define ADCL _SFR_IO8(0x04) -#define ADCH _SFR_IO8(0x05) -#define ADCSRA _SFR_IO8(0x06) -#define ADMUX _SFR_IO8(0x07) - -/* analog comparator */ -#define ACSR _SFR_IO8(0x08) - -/* USART */ -#define UBRRL _SFR_IO8(0x09) -#define UCSRB _SFR_IO8(0x0A) -#define UCSRA _SFR_IO8(0x0B) -#define UDR _SFR_IO8(0x0C) - -/* SPI */ -#define SPCR _SFR_IO8(0x0D) -#define SPSR _SFR_IO8(0x0E) -#define SPDR _SFR_IO8(0x0F) - -/* Port D */ -#define PIND _SFR_IO8(0x10) -#define DDRD _SFR_IO8(0x11) -#define PORTD _SFR_IO8(0x12) - -/* Port C */ -#define PINC _SFR_IO8(0x13) -#define DDRC _SFR_IO8(0x14) -#define PORTC _SFR_IO8(0x15) - -/* Port B */ -#define PINB _SFR_IO8(0x16) -#define DDRB _SFR_IO8(0x17) -#define PORTB _SFR_IO8(0x18) - -/* Port A */ -#define PINA _SFR_IO8(0x19) -#define DDRA _SFR_IO8(0x1A) -#define PORTA _SFR_IO8(0x1B) - -/* EEPROM Control Register */ -#define EECR _SFR_IO8(0x1C) - -/* EEPROM Data Register */ -#define EEDR _SFR_IO8(0x1D) - -/* EEPROM Address Register */ -#define EEAR _SFR_IO16(0x1E) -#define EEARL _SFR_IO8(0x1E) -#define EEARH _SFR_IO8(0x1F) - -#define UBRRH _SFR_IO8(0x20) -#define UCSRC UBRRH - -#define WDTCR _SFR_IO8(0x21) - -#define ASSR _SFR_IO8(0x22) - -/* Timer 2 */ -#define OCR2 _SFR_IO8(0x23) -#define TCNT2 _SFR_IO8(0x24) -#define TCCR2 _SFR_IO8(0x25) - -/* Timer 1 */ -#define ICR1 _SFR_IO16(0x26) -#define ICR1L _SFR_IO8(0x26) -#define ICR1H _SFR_IO8(0x27) -#define OCR1B _SFR_IO16(0x28) -#define OCR1BL _SFR_IO8(0x28) -#define OCR1BH _SFR_IO8(0x29) -#define OCR1A _SFR_IO16(0x2A) -#define OCR1AL _SFR_IO8(0x2A) -#define OCR1AH _SFR_IO8(0x2B) -#define TCNT1 _SFR_IO16(0x2C) -#define TCNT1L _SFR_IO8(0x2C) -#define TCNT1H _SFR_IO8(0x2D) -#define TCCR1B _SFR_IO8(0x2E) -#define TCCR1A _SFR_IO8(0x2F) - -#define SFIOR _SFR_IO8(0x30) - -#define OSCCAL _SFR_IO8(0x31) -#define OCDR OSCCAL - -/* Timer 0 */ -#define TCNT0 _SFR_IO8(0x32) -#define TCCR0 _SFR_IO8(0x33) - -#define MCUSR _SFR_IO8(0x34) -#define MCUCSR MCUSR -#define MCUCR _SFR_IO8(0x35) - -#define TWCR _SFR_IO8(0x36) - -#define SPMCR _SFR_IO8(0x37) - -#define TIFR _SFR_IO8(0x38) -#define TIMSK _SFR_IO8(0x39) - -#define GIFR _SFR_IO8(0x3A) -#define GIMSK _SFR_IO8(0x3B) -#define GICR GIMSK - -#define OCR0 _SFR_IO8(0x3C) - -/* 0x3D..0x3E SP */ - -/* 0x3F SREG */ - -/* Interrupt vectors */ - -/* External Interrupt Request 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* External Interrupt Request 1 */ -#define INT1_vect _VECTOR(2) -#define SIG_INTERRUPT1 _VECTOR(2) - -/* External Interrupt Request 2 */ -#define INT2_vect _VECTOR(3) -#define SIG_INTERRUPT2 _VECTOR(3) - -/* Timer/Counter2 Compare Match */ -#define TIMER2_COMP_vect _VECTOR(4) -#define SIG_OUTPUT_COMPARE2 _VECTOR(4) - -/* Timer/Counter2 Overflow */ -#define TIMER2_OVF_vect _VECTOR(5) -#define SIG_OVERFLOW2 _VECTOR(5) - -/* Timer/Counter1 Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(6) -#define SIG_INPUT_CAPTURE1 _VECTOR(6) - -/* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPA_vect _VECTOR(7) -#define SIG_OUTPUT_COMPARE1A _VECTOR(7) - -/* Timer/Counter1 Compare Match B */ -#define TIMER1_COMPB_vect _VECTOR(8) -#define SIG_OUTPUT_COMPARE1B _VECTOR(8) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(9) -#define SIG_OVERFLOW1 _VECTOR(9) - -/* Timer/Counter0 Compare Match */ -#define TIMER0_COMP_vect _VECTOR(10) -#define SIG_OUTPUT_COMPARE0 _VECTOR(10) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(11) -#define SIG_OVERFLOW0 _VECTOR(11) - -/* Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(12) -#define SIG_SPI _VECTOR(12) - -/* USART, Rx Complete */ -#define USART_RXC_vect _VECTOR(13) -#define SIG_USART_RECV _VECTOR(13) -#define SIG_UART_RECV _VECTOR(13) - -/* USART Data Register Empty */ -#define USART_UDRE_vect _VECTOR(14) -#define SIG_USART_DATA _VECTOR(14) -#define SIG_UART_DATA _VECTOR(14) - -/* USART, Tx Complete */ -#define USART_TXC_vect _VECTOR(15) -#define SIG_USART_TRANS _VECTOR(15) -#define SIG_UART_TRANS _VECTOR(15) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(16) -#define SIG_ADC _VECTOR(16) - -/* EEPROM Ready */ -#define EE_RDY_vect _VECTOR(17) -#define SIG_EEPROM_READY _VECTOR(17) - -/* Analog Comparator */ -#define ANA_COMP_vect _VECTOR(18) -#define SIG_COMPARATOR _VECTOR(18) - -/* 2-wire Serial Interface */ -#define TWI_vect _VECTOR(19) -#define SIG_2WIRE_SERIAL _VECTOR(19) - -/* Store Program Memory Ready */ -#define SPM_RDY_vect _VECTOR(20) -#define SIG_SPM_READY _VECTOR(20) - -#define _VECTORS_SIZE 84 - -/* Bit numbers */ - -/* GICR */ -#define INT1 7 -#define INT0 6 -#define INT2 5 -#define IVSEL 1 -#define IVCE 0 - -/* GIFR */ -#define INTF1 7 -#define INTF0 6 -#define INTF2 5 - -/* TIMSK */ -#define OCIE2 7 -#define TOIE2 6 -#define TICIE1 5 -#define OCIE1A 4 -#define OCIE1B 3 -#define TOIE1 2 -#define OCIE0 1 -#define TOIE0 0 - -/* TIFR */ -#define OCF2 7 -#define TOV2 6 -#define ICF1 5 -#define OCF1A 4 -#define OCF1B 3 -#define TOV1 2 -#define OCF0 1 -#define TOV0 0 - -/* SPMCR */ -#define SPMIE 7 -#define RWWSB 6 -/* bit 5 reserved */ -#define RWWSRE 4 -#define BLBSET 3 -#define PGWRT 2 -#define PGERS 1 -#define SPMEN 0 - -/* TWCR */ -#define TWINT 7 -#define TWEA 6 -#define TWSTA 5 -#define TWSTO 4 -#define TWWC 3 -#define TWEN 2 -/* bit 1 reserved */ -#define TWIE 0 - -/* TWAR */ -#define TWA6 7 -#define TWA5 6 -#define TWA4 5 -#define TWA3 4 -#define TWA2 3 -#define TWA1 2 -#define TWA0 1 -#define TWGCE 0 - -/* TWSR */ -#define TWS7 7 -#define TWS6 6 -#define TWS5 5 -#define TWS4 4 -#define TWS3 3 -/* bit 2 reserved */ -#define TWPS1 1 -#define TWPS0 0 - -/* MCUCR */ -#define SE 7 -#define SM2 6 -#define SM1 5 -#define SM0 4 -#define ISC11 3 -#define ISC10 2 -#define ISC01 1 -#define ISC00 0 - -/* MCUCSR */ -#define JTD 7 -#define ISC2 6 -/* bit 5 reserved */ -#define JTRF 4 -#define WDRF 3 -#define BORF 2 -#define EXTRF 1 -#define PORF 0 - -/* SFIOR */ -#define ADTS2 7 -#define ADTS1 6 -#define ADTS0 5 -/* bit 4 reserved */ -#define ACME 3 -#define PUD 2 -#define PSR2 1 -#define PSR10 0 - -/* TCCR0 */ -#define FOC0 7 -#define WGM00 6 -#define COM01 5 -#define COM00 4 -#define WGM01 3 -#define CS02 2 -#define CS01 1 -#define CS00 0 - -/* TCCR2 */ -#define FOC2 7 -#define WGM20 6 -#define COM21 5 -#define COM20 4 -#define WGM21 3 -#define CS22 2 -#define CS21 1 -#define CS20 0 - -/* ASSR */ -/* bits 7-4 reserved */ -#define AS2 3 -#define TCN2UB 2 -#define OCR2UB 1 -#define TCR2UB 0 - -/* TCCR1A */ -#define COM1A1 7 -#define COM1A0 6 -#define COM1B1 5 -#define COM1B0 4 -#define FOC1A 3 -#define FOC1B 2 -#define WGM11 1 -#define WGM10 0 - -/* TCCR1B */ -#define ICNC1 7 -#define ICES1 6 -/* bit 5 reserved */ -#define WGM13 4 -#define WGM12 3 -#define CS12 2 -#define CS11 1 -#define CS10 0 - -/* WDTCR */ -/* bits 7-5 reserved */ -#define WDTOE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -/* PA7-PA0 = ADC7-ADC0 */ -/* PORTA */ -#define PA7 7 -#define PA6 6 -#define PA5 5 -#define PA4 4 -#define PA3 3 -#define PA2 2 -#define PA1 1 -#define PA0 0 - -/* DDRA */ -#define DDA7 7 -#define DDA6 6 -#define DDA5 5 -#define DDA4 4 -#define DDA3 3 -#define DDA2 2 -#define DDA1 1 -#define DDA0 0 - -/* PINA */ -#define PINA7 7 -#define PINA6 6 -#define PINA5 5 -#define PINA4 4 -#define PINA3 3 -#define PINA2 2 -#define PINA1 1 -#define PINA0 0 - -/* - PB7 = SCK - PB6 = MISO - PB5 = MOSI - PB4 = SS# - PB3 = OC0/AIN1 - PB2 = INT2/AIN0 - PB1 = T1 - PB0 = XCK/T0 - */ - -/* PORTB */ -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -/* DDRB */ -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -/* PINB */ -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -/* - PC7 = TOSC2 - PC6 = TOSC1 - PC1 = SDA - PC0 = SCL - */ -/* PORTC */ -#define PC7 7 -#define PC6 6 -#define PC5 5 -#define PC4 4 -#define PC3 3 -#define PC2 2 -#define PC1 1 -#define PC0 0 - -/* DDRC */ -#define DDC7 7 -#define DDC6 6 -#define DDC5 5 -#define DDC4 4 -#define DDC3 3 -#define DDC2 2 -#define DDC1 1 -#define DDC0 0 - -/* PINC */ -#define PINC7 7 -#define PINC6 6 -#define PINC5 5 -#define PINC4 4 -#define PINC3 3 -#define PINC2 2 -#define PINC1 1 -#define PINC0 0 - -/* - PD7 = OC2 - PD6 = ICP - PD5 = OC1A - PD4 = OC1B - PD3 = INT1 - PD2 = INT0 - PD1 = TXD - PD0 = RXD - */ - -/* PORTD */ -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -/* DDRD */ -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -/* PIND */ -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -/* SPSR */ -#define SPIF 7 -#define WCOL 6 -/* bits 5-1 reserved */ -#define SPI2X 0 - -/* SPCR */ -#define SPIE 7 -#define SPE 6 -#define DORD 5 -#define MSTR 4 -#define CPOL 3 -#define CPHA 2 -#define SPR1 1 -#define SPR0 0 - -/* UCSRA */ -#define RXC 7 -#define TXC 6 -#define UDRE 5 -#define FE 4 -#define DOR 3 -#define PE 2 -#define U2X 1 -#define MPCM 0 - -/* UCSRB */ -#define RXCIE 7 -#define TXCIE 6 -#define UDRIE 5 -#define RXEN 4 -#define TXEN 3 -#define UCSZ2 2 -#define RXB8 1 -#define TXB8 0 - -/* UCSRC */ -#define URSEL 7 -#define UMSEL 6 -#define UPM1 5 -#define UPM0 4 -#define USBS 3 -#define UCSZ1 2 -#define UCSZ0 1 -#define UCPOL 0 - -/* ACSR */ -#define ACD 7 -#define ACBG 6 -#define ACO 5 -#define ACI 4 -#define ACIE 3 -#define ACIC 2 -#define ACIS1 1 -#define ACIS0 0 - -/* ADCSRA */ -#define ADEN 7 -#define ADSC 6 -#define ADATE 5 -#define ADIF 4 -#define ADIE 3 -#define ADPS2 2 -#define ADPS1 1 -#define ADPS0 0 - -/* ADMUX */ -#define REFS1 7 -#define REFS0 6 -#define ADLAR 5 -#define MUX4 4 -#define MUX3 3 -#define MUX2 2 -#define MUX1 1 -#define MUX0 0 - -/* EEPROM Control Register */ -#define EERIE 3 -#define EEMWE 2 -#define EEWE 1 -#define EERE 0 - -/* Constants */ -#define SPM_PAGESIZE 128 -#define RAMEND 0x85F -#define XRAMEND 0x85F -#define E2END 0x3FF -#define E2PAGESIZE 4 -#define FLASHEND 0x7FFF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 2 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_BODEN (unsigned char)~_BV(6) -#define FUSE_BODLEVEL (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL1 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_CKOPT (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_JTAGEN (unsigned char)~_BV(6) -#define FUSE_OCDEN (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_SPIEN & FUSE_JTAGEN) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x95 -#define SIGNATURE_2 0x02 - - -#endif /* _AVR_IOM32_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom323.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom323.h deleted file mode 100644 index a661205ca..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom323.h +++ /dev/null @@ -1,688 +0,0 @@ -/* Copyright (c) 2002, Marek Michalkiewicz - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iom323.h,v 1.13.2.5 2008/10/17 23:27:48 arcanum Exp $ */ - -/* avr/iom323.h - definitions for ATmega323 */ - -#ifndef _AVR_IOM323_H_ -#define _AVR_IOM323_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iom323.h" -#else -# error "Attempt to include more than one file." -#endif - -/* I/O registers */ - -/* TWI stands for "Two Wire Interface" or "TWI Was I2C(tm)" */ -#define TWBR _SFR_IO8(0x00) -#define TWSR _SFR_IO8(0x01) -#define TWAR _SFR_IO8(0x02) -#define TWDR _SFR_IO8(0x03) - -/* ADC */ -#ifndef __ASSEMBLER__ -#define ADC _SFR_IO16(0x04) -#endif -#define ADCW _SFR_IO16(0x04) -#define ADCL _SFR_IO8(0x04) -#define ADCH _SFR_IO8(0x05) -#define ADCSR _SFR_IO8(0x06) -#define ADMUX _SFR_IO8(0x07) - -/* analog comparator */ -#define ACSR _SFR_IO8(0x08) - -/* UART */ -#define UBRR _SFR_IO8(0x09) -#define UBRRL UBRR -#define UCSRB _SFR_IO8(0x0A) -#define UCSRA _SFR_IO8(0x0B) -#define UDR _SFR_IO8(0x0C) - -/* SPI */ -#define SPCR _SFR_IO8(0x0D) -#define SPSR _SFR_IO8(0x0E) -#define SPDR _SFR_IO8(0x0F) - -/* Port D */ -#define PIND _SFR_IO8(0x10) -#define DDRD _SFR_IO8(0x11) -#define PORTD _SFR_IO8(0x12) - -/* Port C */ -#define PINC _SFR_IO8(0x13) -#define DDRC _SFR_IO8(0x14) -#define PORTC _SFR_IO8(0x15) - -/* Port B */ -#define PINB _SFR_IO8(0x16) -#define DDRB _SFR_IO8(0x17) -#define PORTB _SFR_IO8(0x18) - -/* Port A */ -#define PINA _SFR_IO8(0x19) -#define DDRA _SFR_IO8(0x1A) -#define PORTA _SFR_IO8(0x1B) - -/* EEPROM Control Register */ -#define EECR _SFR_IO8(0x1C) - -/* EEPROM Data Register */ -#define EEDR _SFR_IO8(0x1D) - -/* EEPROM Address Register */ -#define EEAR _SFR_IO16(0x1E) -#define EEARL _SFR_IO8(0x1E) -#define EEARH _SFR_IO8(0x1F) - -#define UBRRH _SFR_IO8(0x20) -#define UCSRC UBRRH - -#define WDTCR _SFR_IO8(0x21) - -#define ASSR _SFR_IO8(0x22) - -/* Timer 2 */ -#define OCR2 _SFR_IO8(0x23) -#define TCNT2 _SFR_IO8(0x24) -#define TCCR2 _SFR_IO8(0x25) - -/* Timer 1 */ -#define ICR1 _SFR_IO16(0x26) -#define ICR1L _SFR_IO8(0x26) -#define ICR1H _SFR_IO8(0x27) -#define OCR1B _SFR_IO16(0x28) -#define OCR1BL _SFR_IO8(0x28) -#define OCR1BH _SFR_IO8(0x29) -#define OCR1A _SFR_IO16(0x2A) -#define OCR1AL _SFR_IO8(0x2A) -#define OCR1AH _SFR_IO8(0x2B) -#define TCNT1 _SFR_IO16(0x2C) -#define TCNT1L _SFR_IO8(0x2C) -#define TCNT1H _SFR_IO8(0x2D) -#define TCCR1B _SFR_IO8(0x2E) -#define TCCR1A _SFR_IO8(0x2F) - -#define SFIOR _SFR_IO8(0x30) - -#define OSCCAL _SFR_IO8(0x31) - -/* Timer 0 */ -#define TCNT0 _SFR_IO8(0x32) -#define TCCR0 _SFR_IO8(0x33) - -#define MCUSR _SFR_IO8(0x34) -#define MCUCSR MCUSR -#define MCUCR _SFR_IO8(0x35) - -#define TWCR _SFR_IO8(0x36) - -#define SPMCR _SFR_IO8(0x37) - -#define TIFR _SFR_IO8(0x38) -#define TIMSK _SFR_IO8(0x39) - -#define GIFR _SFR_IO8(0x3A) -#define GIMSK _SFR_IO8(0x3B) -#define GICR GIMSK - -#define OCR0 _SFR_IO8(0x3C) - -/* 0x3D..0x3E SP */ - -/* 0x3F SREG */ - -/* Interrupt vectors */ - -/* External Interrupt Request 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* External Interrupt Request 1 */ -#define INT1_vect _VECTOR(2) -#define SIG_INTERRUPT1 _VECTOR(2) - -/* External Interrupt Request 2 */ -#define INT2_vect _VECTOR(3) -#define SIG_INTERRUPT2 _VECTOR(3) - -/* Timer/Counter2 Compare Match */ -#define TIMER2_COMP_vect _VECTOR(4) -#define SIG_OUTPUT_COMPARE2 _VECTOR(4) - -/* Timer/Counter2 Overflow */ -#define TIMER2_OVF_vect _VECTOR(5) -#define SIG_OVERFLOW2 _VECTOR(5) - -/* Timer/Counter1 Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(6) -#define SIG_INPUT_CAPTURE1 _VECTOR(6) - -/* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPA_vect _VECTOR(7) -#define SIG_OUTPUT_COMPARE1A _VECTOR(7) - -/* Timer/Counter1 Compare Match B */ -#define TIMER1_COMPB_vect _VECTOR(8) -#define SIG_OUTPUT_COMPARE1B _VECTOR(8) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(9) -#define SIG_OVERFLOW1 _VECTOR(9) - -/* Timer/Counter0 Compare Match */ -#define TIMER0_COMP_vect _VECTOR(10) -#define SIG_OUTPUT_COMPARE0 _VECTOR(10) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(11) -#define SIG_OVERFLOW0 _VECTOR(11) - -/* Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(12) -#define SIG_SPI _VECTOR(12) - -/* USART, Rx Complete */ -#define USART_RXC_vect _VECTOR(13) -#define SIG_UART_RECV _VECTOR(13) - -/* USART Data Register Empty */ -#define USART_UDRE_vect _VECTOR(14) -#define SIG_UART_DATA _VECTOR(14) - -/* USART, Tx Complete */ -#define USART_TXC_vect _VECTOR(15) -#define SIG_UART_TRANS _VECTOR(15) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(16) -#define SIG_ADC _VECTOR(16) - -/* EEPROM Ready */ -#define EE_RDY_vect _VECTOR(17) -#define SIG_EEPROM_READY _VECTOR(17) - -/* Analog Comparator */ -#define ANA_COMP_vect _VECTOR(18) -#define SIG_COMPARATOR _VECTOR(18) - -/* 2-wire Serial Interface */ -#define TWI_vect _VECTOR(19) -#define SIG_2WIRE_SERIAL _VECTOR(19) - -/* Store Program Memory Ready */ -#define SPM_RDY_vect _VECTOR(20) - -#define _VECTORS_SIZE 80 - - -/* Bit numbers */ - -/* GIMSK */ -#define INT1 7 -#define INT0 6 -#define INT2 5 -#define IVSEL 1 -#define IVCE 0 - -/* GIFR */ -#define INTF1 7 -#define INTF0 6 -#define INTF2 5 - -/* TIMSK */ -#define OCIE2 7 -#define TOIE2 6 -#define TICIE1 5 -#define OCIE1A 4 -#define OCIE1B 3 -#define TOIE1 2 -#define OCIE0 1 -#define TOIE0 0 - -/* TIFR */ -#define OCF2 7 -#define TOV2 6 -#define ICF1 5 -#define OCF1A 4 -#define OCF1B 3 -#define TOV1 2 -#define OCF0 1 -#define TOV0 0 - -/* SPMCR */ -#define SPMIE 7 -#define ASB 6 -/* bit 5 reserved */ -#define ASRE 4 -#define BLBSET 3 -#define PGWRT 2 -#define PGERS 1 -#define SPMEN 0 - -/* TWCR */ -#define TWINT 7 -#define TWEA 6 -#define TWSTA 5 -#define TWSTO 4 -#define TWWC 3 -#define TWEN 2 -#define TWI_TST 1 -#define TWIE 0 - -/* TWAR */ -#define TWGCE 0 - -/* TWSR */ -#define TWS7 7 -#define TWS6 6 -#define TWS5 5 -#define TWS4 4 -#define TWS3 3 -/* bits 2-0 reserved */ - -/* MCUCR */ -/* bit 7 reserved (SM2?) */ -#define SE 7 -#define SM2 6 -#define SM1 5 -#define SM0 4 -#define ISC11 3 -#define ISC10 2 -#define ISC01 1 -#define ISC00 0 - -/* MCUCSR */ -#define JTD 7 -#define ISC2 6 -#define EIH 5 -#define JTRF 4 -#define WDRF 3 -#define BORF 2 -#define EXTRF 1 -#define PORF 0 - -/* SFIOR */ -#define RPDD 7 -#define RPDC 6 -#define RPDB 5 -#define RPDA 4 -#define ACME 3 -#define PUD 2 -#define PSR2 1 -#define PSR10 0 - -/* TCCR0 */ -#define FOC0 7 -#define PWM0 6 -#define COM01 5 -#define COM00 4 -#define CTC0 3 -#define CS02 2 -#define CS01 1 -#define CS00 0 - -/* TCCR2 */ -#define FOC2 7 -#define PWM2 6 -#define COM21 5 -#define COM20 4 -#define CTC2 3 -#define CS22 2 -#define CS21 1 -#define CS20 0 - -/* ASSR */ -/* bits 7-4 reserved */ -#define AS2 3 -#define TCN2UB 2 -#define OCR2UB 1 -#define TCR2UB 0 - -/* TCCR1A */ -#define COM1A1 7 -#define COM1A0 6 -#define COM1B1 5 -#define COM1B0 4 -#define FOC1A 3 -#define FOC1B 2 -#define PWM11 1 -#define PWM10 0 - -/* TCCR1B */ -#define ICNC1 7 -#define ICES1 6 -/* bit 5 reserved */ -#define CTC11 4 -#define CTC10 3 -#define CS12 2 -#define CS11 1 -#define CS10 0 - -/* WDTCR */ -/* bits 7-5 reserved */ -#define WDTOE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -/* PA7-PA0 = ADC7-ADC0 */ -/* PORTA */ -#define PA7 7 -#define PA6 6 -#define PA5 5 -#define PA4 4 -#define PA3 3 -#define PA2 2 -#define PA1 1 -#define PA0 0 - -/* DDRA */ -#define DDA7 7 -#define DDA6 6 -#define DDA5 5 -#define DDA4 4 -#define DDA3 3 -#define DDA2 2 -#define DDA1 1 -#define DDA0 0 - -/* PINA */ -#define PINA7 7 -#define PINA6 6 -#define PINA5 5 -#define PINA4 4 -#define PINA3 3 -#define PINA2 2 -#define PINA1 1 -#define PINA0 0 - -/* - PB7 = SCK - PB6 = MISO - PB5 = MOSI - PB4 = SS# - PB3 = AIN1 - PB2 = AIN0 - PB1 = T1 - PB0 = T0 - */ - -/* PORTB */ -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -/* DDRB */ -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -/* PINB */ -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -/* - PC7 = TOSC2 - PC6 = TOSC1 - PC1 = SDA - PC0 = SCL - */ -/* PORTC */ -#define PC7 7 -#define PC6 6 -#define PC5 5 -#define PC4 4 -#define PC3 3 -#define PC2 2 -#define PC1 1 -#define PC0 0 - -/* DDRC */ -#define DDC7 7 -#define DDC6 6 -#define DDC5 5 -#define DDC4 4 -#define DDC3 3 -#define DDC2 2 -#define DDC1 1 -#define DDC0 0 - -/* PINC */ -#define PINC7 7 -#define PINC6 6 -#define PINC5 5 -#define PINC4 4 -#define PINC3 3 -#define PINC2 2 -#define PINC1 1 -#define PINC0 0 - -/* - PD7 = OC2 - PD6 = ICP - PD5 = OC1A - PD4 = OC1B - PD3 = INT1 - PD2 = INT0 - PD1 = TXD - PD0 = RXD - */ - -/* PORTD */ -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -/* DDRD */ -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -/* PIND */ -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -/* - PE2 = ALE - PE1 = OC1B - PE0 = ICP / INT2 - */ - -/* SPSR */ -#define SPIF 7 -#define WCOL 6 -#define SPI2X 0 - -/* SPCR */ -#define SPIE 7 -#define SPE 6 -#define DORD 5 -#define MSTR 4 -#define CPOL 3 -#define CPHA 2 -#define SPR1 1 -#define SPR0 0 - -/* UCSRA */ -#define RXC 7 -#define TXC 6 -#define UDRE 5 -#define FE 4 -#define DOR 3 -#define PE 2 -#define U2X 1 -#define MPCM 0 - -/* UCSRB */ -#define RXCIE 7 -#define TXCIE 6 -#define UDRIE 5 -#define RXEN 4 -#define TXEN 3 -#define UCSZ2 2 -#define CHR9 2 -#define RXB8 1 -#define TXB8 0 - -/* UCSRC */ -#define URSEL 7 -#define UMSEL 6 -#define UPM1 5 -#define UPM0 4 -#define USBS 3 -#define UCSZ1 2 -#define UCSZ0 1 -#define UCPOL 0 - -/* ACSR */ -#define ACD 7 -#define AINBG 6 -#define ACO 5 -#define ACI 4 -#define ACIE 3 -#define ACIC 2 -#define ACIS1 1 -#define ACIS0 0 - -/* ADCSR */ -#define ADEN 7 -#define ADSC 6 -#define ADFR 5 -#define ADIF 4 -#define ADIE 3 -#define ADPS2 2 -#define ADPS1 1 -#define ADPS0 0 - -/* ADMUX */ -#define REFS1 7 -#define REFS0 6 -#define ADLAR 5 -#define MUX4 4 -#define MUX3 3 -#define MUX2 2 -#define MUX1 1 -#define MUX0 0 - -/* EEPROM Control Register */ -#define EERIE 3 -#define EEMWE 2 -#define EEWE 1 -#define EERE 0 - -/* Constants */ -#define SPM_PAGESIZE 128 -#define RAMEND 0x85F -#define XRAMEND 0x85F -#define E2END 0x3FF -#define E2PAGESIZE 0 -#define FLASHEND 0x7FFF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 2 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_BODEN (unsigned char)~_BV(6) -#define FUSE_BODLEVEL (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_JTAGEN (unsigned char)~_BV(6) -#define FUSE_OCDEN (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_SPIEN & FUSE_JTAGEN) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x95 -#define SIGNATURE_2 0x01 - - -#endif /* _AVR_IOM323_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom324.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom324.h deleted file mode 100644 index 8ecfd838b..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom324.h +++ /dev/null @@ -1,88 +0,0 @@ -/* Copyright (c) 2005, 2006 Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* avr/iom324.h - definitions for ATmega324 */ - -/* $Id: iom324.h,v 1.3.2.4 2008/08/14 00:08:02 arcanum Exp $ */ - -#ifndef _AVR_IOM324_H_ -#define _AVR_IOM324_H_ 1 - -#include - -/* Constants */ -#define SPM_PAGESIZE 128 -#define RAMEND 0x08FF -#define XRAMEND 0x08FF -#define E2END 0x3FF -#define E2PAGESIZE 4 -#define FLASHEND 0x7FFF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_SUT1 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_JTAGEN (unsigned char)~_BV(6) -#define FUSE_OCDEN (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_SPIEN & FUSE_JTAGEN) - -/* Extended Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -#endif /* _AVR_IOM324_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom325.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom325.h deleted file mode 100644 index abca23b6e..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom325.h +++ /dev/null @@ -1,821 +0,0 @@ -/* Copyright (c) 2004, 2005, 2006, 2007 Eric B. Weddington - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iom325.h,v 1.12.2.5 2008/10/17 23:27:48 arcanum Exp $ */ - -/* avr/iom325.h - definitions for ATmega325 and ATmega325P. */ - -#ifndef _AVR_IOM325_H_ -#define _AVR_IOM325_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iom325.h" -#else -# error "Attempt to include more than one file." -#endif - -/* Registers and associated bit numbers */ - -#define PINA _SFR_IO8(0x00) -#define PINA7 7 -#define PINA6 6 -#define PINA5 5 -#define PINA4 4 -#define PINA3 3 -#define PINA2 2 -#define PINA1 1 -#define PINA0 0 - -#define DDRA _SFR_IO8(0x01) -#define DDA7 7 -#define DDA6 6 -#define DDA5 5 -#define DDA4 4 -#define DDA3 3 -#define DDA2 2 -#define DDA1 1 -#define DDA0 0 - -#define PORTA _SFR_IO8(0x02) -#define PA7 7 -#define PA6 6 -#define PA5 5 -#define PA4 4 -#define PA3 3 -#define PA2 2 -#define PA1 1 -#define PA0 0 - -#define PINB _SFR_IO8(0x03) -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -#define DDRB _SFR_IO8(0x04) -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -#define PORTB _SFR_IO8(0x05) -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -#define PINC _SFR_IO8(0x06) -#define PINC7 7 -#define PINC6 6 -#define PINC5 5 -#define PINC4 4 -#define PINC3 3 -#define PINC2 2 -#define PINC1 1 -#define PINC0 0 - -#define DDRC _SFR_IO8(0x07) -#define DDC7 7 -#define DDC6 6 -#define DDC5 5 -#define DDC4 4 -#define DDC3 3 -#define DDC2 2 -#define DDC1 1 -#define DDC0 0 - -#define PORTC _SFR_IO8(0x08) -#define PC7 7 -#define PC6 6 -#define PC5 5 -#define PC4 4 -#define PC3 3 -#define PC2 2 -#define PC1 1 -#define PC0 0 - -#define PIND _SFR_IO8(0x09) -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -#define DDRD _SFR_IO8(0x0A) -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -#define PORTD _SFR_IO8(0x0B) -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -#define PINE _SFR_IO8(0x0C) -#define PINE7 7 -#define PINE6 6 -#define PINE5 5 -#define PINE4 4 -#define PINE3 3 -#define PINE2 2 -#define PINE1 1 -#define PINE0 0 - -#define DDRE _SFR_IO8(0x0D) -#define DDE7 7 -#define DDE6 6 -#define DDE5 5 -#define DDE4 4 -#define DDE3 3 -#define DDE2 2 -#define DDE1 1 -#define DDE0 0 - -#define PORTE _SFR_IO8(0x0E) -#define PE7 7 -#define PE6 6 -#define PE5 5 -#define PE4 4 -#define PE3 3 -#define PE2 2 -#define PE1 1 -#define PE0 0 - -#define PINF _SFR_IO8(0x0F) -#define PINF7 7 -#define PINF6 6 -#define PINF5 5 -#define PINF4 4 -#define PINF3 3 -#define PINF2 2 -#define PINF1 1 -#define PINF0 0 - -#define DDRF _SFR_IO8(0x10) -#define DDF7 7 -#define DDF6 6 -#define DDF5 5 -#define DDF4 4 -#define DDF3 3 -#define DDF2 2 -#define DDF1 1 -#define DDF0 0 - -#define PORTF _SFR_IO8(0x11) -#define PF7 7 -#define PF6 6 -#define PF5 5 -#define PF4 4 -#define PF3 3 -#define PF2 2 -#define PF1 1 -#define PF0 0 - -#define PING _SFR_IO8(0x12) -#define PING5 5 -#define PING4 4 -#define PING3 3 -#define PING2 2 -#define PING1 1 -#define PING0 0 - -#define DDRG _SFR_IO8(0x13) -#define DDG4 4 -#define DDG3 3 -#define DDG2 2 -#define DDG1 1 -#define DDG0 0 - -#define PORTG _SFR_IO8(0x14) -#define PG4 4 -#define PG3 3 -#define PG2 2 -#define PG1 1 -#define PG0 0 - -#define TIFR0 _SFR_IO8(0x15) -#define TOV0 0 -#define OCF0A 1 - -#define TIFR1 _SFR_IO8(0x16) -#define TOV1 0 -#define OCF1A 1 -#define OCF1B 2 -#define ICF1 5 - -#define TIFR2 _SFR_IO8(0x17) -#define TOV2 0 -#define OCF2A 1 - -/* Reserved [0x18..0x1B] */ - -#define EIFR _SFR_IO8(0x1C) -#define INTF0 0 -#define PCIF0 4 -#define PCIF1 5 - -#define EIMSK _SFR_IO8(0x1D) -#define INT0 0 -#define PCIE0 4 -#define PCIE1 5 - -#define GPIOR0 _SFR_IO8(0x1E) - -#define EECR _SFR_IO8(0x1F) -#define EERE 0 -#define EEWE 1 -#define EEMWE 2 -#define EERIE 3 - -#define EEDR _SFR_IO8(0X20) - -/* Combine EEARL and EEARH */ -#define EEAR _SFR_IO16(0x21) -#define EEARL _SFR_IO8(0x21) -#define EEARH _SFR_IO8(0X22) - -/* 6-char sequence denoting where to find the EEPROM registers in memory space. - Adresses denoted in hex syntax with uppercase letters. Used by the EEPROM - subroutines. - First two letters: EECR address. - Second two letters: EEDR address. - Last two letters: EEAR address. */ -#define __EEPROM_REG_LOCATIONS__ 1F2021 - - -#define GTCCR _SFR_IO8(0x23) -#define PSR10 0 -#define PSR2 1 -#define TSM 7 - -#define TCCR0A _SFR_IO8(0x24) -#define CS00 0 -#define CS01 1 -#define CS02 2 -#define WGM01 3 -#define COM0A0 4 -#define COM0A1 5 -#define WGM00 6 -#define FOC0A 7 - -/* Reserved [0x25] */ - -#define TCNT0 _SFR_IO8(0X26) - -#define OCR0A _SFR_IO8(0X27) - -/* Reserved [0x28..0x29] */ - -#define GPIOR1 _SFR_IO8(0x2A) - -#define GPIOR2 _SFR_IO8(0x2B) - -#define SPCR _SFR_IO8(0x2C) -#define SPR0 0 -#define SPR1 1 -#define CPHA 2 -#define CPOL 3 -#define MSTR 4 -#define DORD 5 -#define SPE 6 -#define SPIE 7 - -#define SPSR _SFR_IO8(0x2D) -#define SPI2X 0 -#define WCOL 6 -#define SPIF 7 - -#define SPDR _SFR_IO8(0X2E) - -/* Reserved [0x2F] */ - -#define ACSR _SFR_IO8(0x30) -#define ACIS0 0 -#define ACIS1 1 -#define ACIC 2 -#define ACIE 3 -#define ACI 4 -#define ACO 5 -#define ACBG 6 -#define ACD 7 - -#define OCDR _SFR_IO8(0x31) -#define OCDR0 0 -#define OCDR1 1 -#define OCDR2 2 -#define OCDR3 3 -#define OCDR4 4 -#define OCDR5 5 -#define OCDR6 6 -#define OCDR7 7 -#define IDRD 7 - -/* Reserved [0x32] */ - -#define SMCR _SFR_IO8(0x33) -#define SE 0 -#define SM0 1 -#define SM1 2 -#define SM2 3 - -#define MCUSR _SFR_IO8(0x34) -#define PORF 0 -#define EXTRF 1 -#define BORF 2 -#define WDRF 3 -#define JTRF 4 - -#define MCUCR _SFR_IO8(0X35) -#define IVCE 0 -#define IVSEL 1 -#define PUD 4 -#if defined(__AVR_ATmega325P__) -#define BODSE 5 -#define BODS 6 -#endif -#define JTD 7 - -/* Reserved [0x36] */ - -#define SPMCSR _SFR_IO8(0x37) -#define SPMEN 0 -#define PGERS 1 -#define PGWRT 2 -#define BLBSET 3 -#define RWWSRE 4 -#define RWWSB 6 -#define SPMIE 7 - -/* Reserved [0x38..0x3C] */ - -/* SP [0x3D..0x3E] */ -/* SREG [0x3F] */ - -#define WDTCR _SFR_MEM8(0x60) -#define WDP0 0 -#define WDP1 1 -#define WDP2 2 -#define WDE 3 -#define WDCE 4 - -#define CLKPR _SFR_MEM8(0x61) -#define CLKPS0 0 -#define CLKPS1 1 -#define CLKPS2 2 -#define CLKPS3 3 -#define CLKPCE 7 - -/* Reserved [0x62..0x63] */ - -#define PRR _SFR_MEM8(0x64) -#define PRADC 0 -#define PRUSART0 1 -#define PRSPI 2 -#define PRTIM1 3 - -/* Reserved [0x65] */ - -#define OSCCAL _SFR_MEM8(0x66) - -/* Reserved [0x67..0x68] */ - -#define EICRA _SFR_MEM8(0x69) -#define ISC00 0 -#define ISC01 1 - -/* Reserved [0x6A] */ - -#define PCMSK0 _SFR_MEM8(0x6B) -#define PCINT0 0 -#define PCINT1 1 -#define PCINT2 2 -#define PCINT3 3 -#define PCINT4 4 -#define PCINT5 5 -#define PCINT6 6 -#define PCINT7 7 - -#define PCMSK1 _SFR_MEM8(0x6C) -#define PCINT8 0 -#define PCINT9 1 -#define PCINT10 2 -#define PCINT11 3 -#define PCINT12 4 -#define PCINT13 5 -#define PCINT14 6 -#define PCINT15 7 - -/* Reserved [0x6D] */ - -#define TIMSK0 _SFR_MEM8(0x6E) -#define TOIE0 0 -#define OCIE0A 1 - -#define TIMSK1 _SFR_MEM8(0x6F) -#define TOIE1 0 -#define OCIE1A 1 -#define OCIE1B 2 -#define ICIE1 5 - -#define TIMSK2 _SFR_MEM8(0x70) -#define TOIE2 0 -#define OCIE2A 1 - -/* Reserved [0x71..0x77] */ - -/* Combine ADCL and ADCH */ -#ifndef __ASSEMBLER__ -#define ADC _SFR_MEM16(0x78) -#endif -#define ADCW _SFR_MEM16(0x78) -#define ADCL _SFR_MEM8(0x78) -#define ADCH _SFR_MEM8(0x79) - -#define ADCSRA _SFR_MEM8(0x7A) -#define ADPS0 0 -#define ADPS1 1 -#define ADPS2 2 -#define ADIE 3 -#define ADIF 4 -#define ADATE 5 -#define ADSC 6 -#define ADEN 7 - -#define ADCSRB _SFR_MEM8(0x7B) -#define ADTS0 0 -#define ADTS1 1 -#define ADTS2 2 -#define ACME 6 - -#define ADMUX _SFR_MEM8(0x7C) -#define MUX0 0 -#define MUX1 1 -#define MUX2 2 -#define MUX3 3 -#define MUX4 4 -#define ADLAR 5 -#define REFS0 6 -#define REFS1 7 - -/* Reserved [0x7D] */ - -#define DIDR0 _SFR_MEM8(0x7E) -#define ADC0D 0 -#define ADC1D 1 -#define ADC2D 2 -#define ADC3D 3 -#define ADC4D 4 -#define ADC5D 5 -#define ADC6D 6 -#define ADC7D 7 - -#define DIDR1 _SFR_MEM8(0x7F) -#define AIN0D 0 -#define AIN1D 1 - -#define TCCR1A _SFR_MEM8(0X80) -#define WGM10 0 -#define WGM11 1 -#define COM1B0 4 -#define COM1B1 5 -#define COM1A0 6 -#define COM1A1 7 - -#define TCCR1B _SFR_MEM8(0X81) -#define CS10 0 -#define CS11 1 -#define CS12 2 -#define WGM12 3 -#define WGM13 4 -#define ICES1 6 -#define ICNC1 7 - -#define TCCR1C _SFR_MEM8(0x82) -#define FOC1B 6 -#define FOC1A 7 - -/* Reserved [0x83] */ - -/* Combine TCNT1L and TCNT1H */ -#define TCNT1 _SFR_MEM16(0x84) - -#define TCNT1L _SFR_MEM8(0x84) -#define TCNT1H _SFR_MEM8(0x85) - -/* Combine ICR1L and ICR1H */ -#define ICR1 _SFR_MEM16(0x86) - -#define ICR1L _SFR_MEM8(0x86) -#define ICR1H _SFR_MEM8(0x87) - -/* Combine OCR1AL and OCR1AH */ -#define OCR1A _SFR_MEM16(0x88) - -#define OCR1AL _SFR_MEM8(0x88) -#define OCR1AH _SFR_MEM8(0x89) - -/* Combine OCR1BL and OCR1BH */ -#define OCR1B _SFR_MEM16(0x8A) - -#define OCR1BL _SFR_MEM8(0x8A) -#define OCR1BH _SFR_MEM8(0x8B) - -/* Reserved [0x8C..0xAF] */ - -#define TCCR2A _SFR_MEM8(0xB0) -#define CS20 0 -#define CS21 1 -#define CS22 2 -#define WGM21 3 -#define COM2A0 4 -#define COM2A1 5 -#define WGM20 6 -#define FOC2A 7 - -/* Reserved [0xB1] */ - -#define TCNT2 _SFR_MEM8(0xB2) - -#define OCR2A _SFR_MEM8(0xB3) - -/* Reserved [0xB4..0xB5] */ - -#define ASSR _SFR_MEM8(0xB6) -#define TCR2UB 0 -#define OCR2UB 1 -#define TCN2UB 2 -#define AS2 3 -#define EXCLK 4 - -/* Reserved [0xB7] */ - -#define USICR _SFR_MEM8(0xB8) -#define USITC 0 -#define USICLK 1 -#define USICS0 2 -#define USICS1 3 -#define USIWM0 4 -#define USIWM1 5 -#define USIOIE 6 -#define USISIE 7 - -#define USISR _SFR_MEM8(0xB9) -#define USICNT0 0 -#define USICNT1 1 -#define USICNT2 2 -#define USICNT3 3 -#define USIDC 4 -#define USIPF 5 -#define USIOIF 6 -#define USISIF 7 - -#define USIDR _SFR_MEM8(0xBA) - -/* Reserved [0xBB..0xBF] */ - -#define UCSR0A _SFR_MEM8(0xC0) -#define MPCM0 0 -#define U2X0 1 -#define UPE0 2 -#define DOR0 3 -#define FE0 4 -#define UDRE0 5 -#define TXC0 6 -#define RXC0 7 - -#define UCSR0B _SFR_MEM8(0XC1) -#define TXB80 0 -#define RXB80 1 -#define UCSZ02 2 -#define TXEN0 3 -#define RXEN0 4 -#define UDRIE0 5 -#define TXCIE0 6 -#define RXCIE0 7 - -#define UCSR0C _SFR_MEM8(0xC2) -#define UCPOL0 0 -#define UCSZ00 1 -#define UCSZ01 2 -#define USBS0 3 -#define UPM00 4 -#define UPM01 5 -#define UMSEL0 6 - -/* Reserved [0xC3] */ - -/* Combine UBRR0L and UBRR0H */ -#define UBRR0 _SFR_MEM16(0xC4) - -#define UBRR0L _SFR_MEM8(0xC4) -#define UBRR0H _SFR_MEM8(0xC5) - -#define UDR0 _SFR_MEM8(0XC6) - -/* Reserved [0xC7..0xFF] */ - - -/* Interrupt vectors */ -/* Vector 0 is the reset vector */ -/* External Interrupt Request 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* Pin Change Interrupt Request 0 */ -#define PCINT0_vect _VECTOR(2) -#define SIG_PIN_CHANGE0 _VECTOR(2) - -/* Pin Change Interrupt Request 1 */ -#define PCINT1_vect _VECTOR(3) -#define SIG_PIN_CHANGE1 _VECTOR(3) - -/* Timer/Counter2 Compare Match */ -#define TIMER2_COMP_vect _VECTOR(4) -#define SIG_OUTPUT_COMPARE2 _VECTOR(4) - -/* Timer/Counter2 Overflow */ -#define TIMER2_OVF_vect _VECTOR(5) -#define SIG_OVERFLOW2 _VECTOR(5) - -/* Timer/Counter1 Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(6) -#define SIG_INPUT_CAPTURE1 _VECTOR(6) - -/* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPA_vect _VECTOR(7) -#define SIG_OUTPUT_COMPARE1A _VECTOR(7) - -/* Timer/Counter Compare Match B */ -#define TIMER1_COMPB_vect _VECTOR(8) -#define SIG_OUTPUT_COMPARE1B _VECTOR(8) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(9) -#define SIG_OVERFLOW1 _VECTOR(9) - -/* Timer/Counter0 Compare Match */ -#define TIMER0_COMP_vect _VECTOR(10) -#define SIG_OUTPUT_COMPARE0 _VECTOR(10) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(11) -#define SIG_OVERFLOW0 _VECTOR(11) - -/* SPI Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(12) -#define SIG_SPI _VECTOR(12) - -/* USART0, Rx Complete */ -#define USART0_RX_vect _VECTOR(13) -#define SIG_UART_RECV _VECTOR(13) - -/* USART0 Data register Empty */ -#define USART0_UDRE_vect _VECTOR(14) -#define SIG_UART_DATA _VECTOR(14) - -/* USART0, Tx Complete */ -#define USART0_TX_vect _VECTOR(15) -#define SIG_UART_TRANS _VECTOR(15) - -/* USI Start Condition */ -#define USI_START_vect _VECTOR(16) -#define SIG_USI_START _VECTOR(16) - -/* USI Overflow */ -#define USI_OVERFLOW_vect _VECTOR(17) -#define SIG_USI_OVERFLOW _VECTOR(17) - -/* Analog Comparator */ -#define ANALOG_COMP_vect _VECTOR(18) -#define SIG_COMPARATOR _VECTOR(18) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(19) -#define SIG_ADC _VECTOR(19) - -/* EEPROM Ready */ -#define EE_READY_vect _VECTOR(20) -#define SIG_EEPROM_READY _VECTOR(20) - -/* Store Program Memory Read */ -#define SPM_READY_vect _VECTOR(21) -#define SIG_SPM_READY _VECTOR(21) - -/* Vector 22 is Reserved */ - -#define _VECTORS_SIZE 92 - - -/* Constants */ -#define SPM_PAGESIZE 128 -#define RAMEND 0x8FF -#define XRAMEND 0x8FF -#define E2END 0x3FF -#define E2PAGESIZE 4 -#define FLASHEND 0x7FFF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_JTAGEN (unsigned char)~_BV(6) -#define FUSE_OCDEN (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_SPIEN & FUSE_JTAGEN) - -/* Extended Fuse Byte */ -#define FUSE_RSTDISBL (unsigned char)~_BV(0) -#define FUSE_BODLEVEL0 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(2) -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x95 -#define SIGNATURE_2 0x05 - - -#endif /* _AVR_IOM325_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom3250.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom3250.h deleted file mode 100644 index 444cac4eb..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom3250.h +++ /dev/null @@ -1,911 +0,0 @@ -/* Copyright (c) 2004, 2005, 2006, 2007 Eric B. Weddington - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iom3250.h,v 1.12.2.6 2008/10/17 23:27:48 arcanum Exp $ */ - -/* avr/iom3250.h - definitions for ATmega3250 and ATmega3250P. */ - -#ifndef _AVR_IOM3250_H_ -#define _AVR_IOM3250_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iom3250.h" -#else -# error "Attempt to include more than one file." -#endif - -/* Registers and associated bit numbers */ - -#define PINA _SFR_IO8(0x00) -#define PINA7 7 -#define PINA6 6 -#define PINA5 5 -#define PINA4 4 -#define PINA3 3 -#define PINA2 2 -#define PINA1 1 -#define PINA0 0 - -#define DDRA _SFR_IO8(0x01) -#define DDA7 7 -#define DDA6 6 -#define DDA5 5 -#define DDA4 4 -#define DDA3 3 -#define DDA2 2 -#define DDA1 1 -#define DDA0 0 - -#define PORTA _SFR_IO8(0x02) -#define PA7 7 -#define PA6 6 -#define PA5 5 -#define PA4 4 -#define PA3 3 -#define PA2 2 -#define PA1 1 -#define PA0 0 - -#define PINB _SFR_IO8(0x03) -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -#define DDRB _SFR_IO8(0x04) -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -#define PORTB _SFR_IO8(0x05) -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -#define PINC _SFR_IO8(0x06) -#define PINC7 7 -#define PINC6 6 -#define PINC5 5 -#define PINC4 4 -#define PINC3 3 -#define PINC2 2 -#define PINC1 1 -#define PINC0 0 - -#define DDRC _SFR_IO8(0x07) -#define DDC7 7 -#define DDC6 6 -#define DDC5 5 -#define DDC4 4 -#define DDC3 3 -#define DDC2 2 -#define DDC1 1 -#define DDC0 0 - -#define PORTC _SFR_IO8(0x08) -#define PC7 7 -#define PC6 6 -#define PC5 5 -#define PC4 4 -#define PC3 3 -#define PC2 2 -#define PC1 1 -#define PC0 0 - -#define PIND _SFR_IO8(0x09) -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -#define DDRD _SFR_IO8(0x0A) -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -#define PORTD _SFR_IO8(0x0B) -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -#define PINE _SFR_IO8(0x0C) -#define PINE7 7 -#define PINE6 6 -#define PINE5 5 -#define PINE4 4 -#define PINE3 3 -#define PINE2 2 -#define PINE1 1 -#define PINE0 0 - -#define DDRE _SFR_IO8(0x0D) -#define DDE7 7 -#define DDE6 6 -#define DDE5 5 -#define DDE4 4 -#define DDE3 3 -#define DDE2 2 -#define DDE1 1 -#define DDE0 0 - -#define PORTE _SFR_IO8(0x0E) -#define PE7 7 -#define PE6 6 -#define PE5 5 -#define PE4 4 -#define PE3 3 -#define PE2 2 -#define PE1 1 -#define PE0 0 - -#define PINF _SFR_IO8(0x0F) -#define PINF7 7 -#define PINF6 6 -#define PINF5 5 -#define PINF4 4 -#define PINF3 3 -#define PINF2 2 -#define PINF1 1 -#define PINF0 0 - -#define DDRF _SFR_IO8(0x10) -#define DDF7 7 -#define DDF6 6 -#define DDF5 5 -#define DDF4 4 -#define DDF3 3 -#define DDF2 2 -#define DDF1 1 -#define DDF0 0 - -#define PORTF _SFR_IO8(0x11) -#define PF7 7 -#define PF6 6 -#define PF5 5 -#define PF4 4 -#define PF3 3 -#define PF2 2 -#define PF1 1 -#define PF0 0 - -#define PING _SFR_IO8(0x12) -#define PING5 5 -#define PING4 4 -#define PING3 3 -#define PING2 2 -#define PING1 1 -#define PING0 0 - -#define DDRG _SFR_IO8(0x13) -#define DDG4 4 -#define DDG3 3 -#define DDG2 2 -#define DDG1 1 -#define DDG0 0 - -#define PORTG _SFR_IO8(0x14) -#define PG4 4 -#define PG3 3 -#define PG2 2 -#define PG1 1 -#define PG0 0 - -#define TIFR0 _SFR_IO8(0x15) -#define TOV0 0 -#define OCF0A 1 - -#define TIFR1 _SFR_IO8(0x16) -#define TOV1 0 -#define OCF1A 1 -#define OCF1B 2 -#define ICF1 5 - -#define TIFR2 _SFR_IO8(0x17) -#define TOV2 0 -#define OCF2A 1 - -/* Reserved [0x18..0x1B] */ - -#define EIFR _SFR_IO8(0x1C) -#define INTF0 0 -#define PCIF0 4 -#define PCIF1 5 -#define PCIF2 6 -#define PCIF3 7 - -#define EIMSK _SFR_IO8(0x1D) -#define INT0 0 -#define PCIE0 4 -#define PCIE1 5 -#define PCIE2 6 -#define PCIE3 7 - -#define GPIOR0 _SFR_IO8(0x1E) - -#define EECR _SFR_IO8(0x1F) -#define EERE 0 -#define EEWE 1 -#define EEMWE 2 -#define EERIE 3 - -#define EEDR _SFR_IO8(0X20) - -/* Combine EEARL and EEARH */ -#define EEAR _SFR_IO16(0x21) -#define EEARL _SFR_IO8(0x21) -#define EEARH _SFR_IO8(0X22) - -/* 6-char sequence denoting where to find the EEPROM registers in memory space. - Adresses denoted in hex syntax with uppercase letters. Used by the EEPROM - subroutines. - First two letters: EECR address. - Second two letters: EEDR address. - Last two letters: EEAR address. */ -#define __EEPROM_REG_LOCATIONS__ 1F2021 - -#define GTCCR _SFR_IO8(0x23) -#define PSR10 0 -#define PSR2 1 -#define TSM 7 - -#define TCCR0A _SFR_IO8(0x24) -#define CS00 0 -#define CS01 1 -#define CS02 2 -#define WGM01 3 -#define COM0A0 4 -#define COM0A1 5 -#define WGM00 6 -#define FOC0A 7 - -/* Reserved [0x25] */ - -#define TCNT0 _SFR_IO8(0X26) - -#define OCR0A _SFR_IO8(0X27) - -/* Reserved [0x28..0x29] */ - -#define GPIOR1 _SFR_IO8(0x2A) - -#define GPIOR2 _SFR_IO8(0x2B) - -#define SPCR _SFR_IO8(0x2C) -#define SPR0 0 -#define SPR1 1 -#define CPHA 2 -#define CPOL 3 -#define MSTR 4 -#define DORD 5 -#define SPE 6 -#define SPIE 7 - -#define SPSR _SFR_IO8(0x2D) -#define SPI2X 0 -#define WCOL 6 -#define SPIF 7 - -#define SPDR _SFR_IO8(0X2E) - -/* Reserved [0x2F] */ - -#define ACSR _SFR_IO8(0x30) -#define ACIS0 0 -#define ACIS1 1 -#define ACIC 2 -#define ACIE 3 -#define ACI 4 -#define ACO 5 -#define ACBG 6 -#define ACD 7 - -#define OCDR _SFR_IO8(0x31) -#define OCDR0 0 -#define OCDR1 1 -#define OCDR2 2 -#define OCDR3 3 -#define OCDR4 4 -#define OCDR5 5 -#define OCDR6 6 -#define OCDR7 7 -#define IDRD 7 - -/* Reserved [0x32] */ - -#define SMCR _SFR_IO8(0x33) -#define SE 0 -#define SM0 1 -#define SM1 2 -#define SM2 3 - -#define MCUSR _SFR_IO8(0x34) -#define PORF 0 -#define EXTRF 1 -#define BORF 2 -#define WDRF 3 -#define JTRF 4 - -#define MCUCR _SFR_IO8(0X35) -#define IVCE 0 -#define IVSEL 1 -#define PUD 4 -#if defined(__AVR_ATmega3250P__) -#define BODSE 5 -#define BODS 6 -#endif -#define JTD 7 - -/* Reserved [0x36] */ - -#define SPMCSR _SFR_IO8(0x37) -#define SPMEN 0 -#define PGERS 1 -#define PGWRT 2 -#define BLBSET 3 -#define RWWSRE 4 -#define RWWSB 6 -#define SPMIE 7 - -/* Reserved [0x38..0x3C] */ - -/* SP [0x3D..0x3E] */ -/* SREG [0x3F] */ - -#define WDTCR _SFR_MEM8(0x60) -#define WDP0 0 -#define WDP1 1 -#define WDP2 2 -#define WDE 3 -#define WDCE 4 - -#define CLKPR _SFR_MEM8(0x61) -#define CLKPS0 0 -#define CLKPS1 1 -#define CLKPS2 2 -#define CLKPS3 3 -#define CLKPCE 7 - -/* Reserved [0x62..0x63] */ - -#define PRR _SFR_MEM8(0x64) -#define PRADC 0 -#define PRUSART0 1 -#define PRSPI 2 -#define PRTIM1 3 - -/* Reserved [0x65] */ - -#define OSCCAL _SFR_MEM8(0x66) - -/* Reserved [0x67..0x68] */ - -#define EICRA _SFR_MEM8(0x69) -#define ISC00 0 -#define ISC01 1 - -/* Reserved [0x6A] */ - -#define PCMSK0 _SFR_MEM8(0x6B) -#define PCINT0 0 -#define PCINT1 1 -#define PCINT2 2 -#define PCINT3 3 -#define PCINT4 4 -#define PCINT5 5 -#define PCINT6 6 -#define PCINT7 7 - -#define PCMSK1 _SFR_MEM8(0x6C) -#define PCINT8 0 -#define PCINT9 1 -#define PCINT10 2 -#define PCINT11 3 -#define PCINT12 4 -#define PCINT13 5 -#define PCINT14 6 -#define PCINT15 7 - -#define PCMSK2 _SFR_MEM8(0x6D) -#define PCINT16 0 -#define PCINT17 1 -#define PCINT18 2 -#define PCINT19 3 -#define PCINT20 4 -#define PCINT21 5 -#define PCINT22 6 -#define PCINT23 7 - -#define TIMSK0 _SFR_MEM8(0x6E) -#define TOIE0 0 -#define OCIE0A 1 - -#define TIMSK1 _SFR_MEM8(0x6F) -#define TOIE1 0 -#define OCIE1A 1 -#define OCIE1B 2 -#define ICIE1 5 - -#define TIMSK2 _SFR_MEM8(0x70) -#define TOIE2 0 -#define OCIE2A 1 - -/* Reserved [0x71..0x72] */ - -#define PCMSK3 _SFR_MEM8(0x73) -#define PCINT24 0 -#define PCINT25 1 -#define PCINT26 2 -#define PCINT27 3 -#define PCINT28 4 -#define PCINT29 5 -#define PCINT30 6 - -/* Reserved [0x74..0x77] */ - -/* Combine ADCL and ADCH */ -#ifndef __ASSEMBLER__ -#define ADC _SFR_MEM16(0x78) -#endif -#define ADCW _SFR_MEM16(0x78) -#define ADCL _SFR_MEM8(0x78) -#define ADCH _SFR_MEM8(0x79) - -#define ADCSRA _SFR_MEM8(0x7A) -#define ADPS0 0 -#define ADPS1 1 -#define ADPS2 2 -#define ADIE 3 -#define ADIF 4 -#define ADATE 5 -#define ADSC 6 -#define ADEN 7 - -#define ADCSRB _SFR_MEM8(0x7B) -#define ADTS0 0 -#define ADTS1 1 -#define ADTS2 2 -#define ACME 6 - -#define ADMUX _SFR_MEM8(0x7C) -#define MUX0 0 -#define MUX1 1 -#define MUX2 2 -#define MUX3 3 -#define MUX4 4 -#define ADLAR 5 -#define REFS0 6 -#define REFS1 7 - -/* Reserved [0x7D] */ - -#define DIDR0 _SFR_MEM8(0x7E) -#define ADC0D 0 -#define ADC1D 1 -#define ADC2D 2 -#define ADC3D 3 -#define ADC4D 4 -#define ADC5D 5 -#define ADC6D 6 -#define ADC7D 7 - -#define DIDR1 _SFR_MEM8(0x7F) -#define AIN0D 0 -#define AIN1D 1 - -#define TCCR1A _SFR_MEM8(0X80) -#define WGM10 0 -#define WGM11 1 -#define COM1B0 4 -#define COM1B1 5 -#define COM1A0 6 -#define COM1A1 7 - -#define TCCR1B _SFR_MEM8(0X81) -#define CS10 0 -#define CS11 1 -#define CS12 2 -#define WGM12 3 -#define WGM13 4 -#define ICES1 6 -#define ICNC1 7 - -#define TCCR1C _SFR_MEM8(0x82) -#define FOC1B 6 -#define FOC1A 7 - -/* Reserved [0x83] */ - -/* Combine TCNT1L and TCNT1H */ -#define TCNT1 _SFR_MEM16(0x84) - -#define TCNT1L _SFR_MEM8(0x84) -#define TCNT1H _SFR_MEM8(0x85) - -/* Combine ICR1L and ICR1H */ -#define ICR1 _SFR_MEM16(0x86) - -#define ICR1L _SFR_MEM8(0x86) -#define ICR1H _SFR_MEM8(0x87) - -/* Combine OCR1AL and OCR1AH */ -#define OCR1A _SFR_MEM16(0x88) - -#define OCR1AL _SFR_MEM8(0x88) -#define OCR1AH _SFR_MEM8(0x89) - -/* Combine OCR1BL and OCR1BH */ -#define OCR1B _SFR_MEM16(0x8A) - -#define OCR1BL _SFR_MEM8(0x8A) -#define OCR1BH _SFR_MEM8(0x8B) - -/* Reserved [0x8C..0xAF] */ - -#define TCCR2A _SFR_MEM8(0xB0) -#define CS20 0 -#define CS21 1 -#define CS22 2 -#define WGM21 3 -#define COM2A0 4 -#define COM2A1 5 -#define WGM20 6 -#define FOC2A 7 - -/* Reserved [0xB1] */ - -#define TCNT2 _SFR_MEM8(0xB2) - -#define OCR2A _SFR_MEM8(0xB3) - -/* Reserved [0xB4..0xB5] */ - -#define ASSR _SFR_MEM8(0xB6) -#define TCR2UB 0 -#define OCR2UB 1 -#define TCN2UB 2 -#define AS2 3 -#define EXCLK 4 - -/* Reserved [0xB7] */ - -#define USICR _SFR_MEM8(0xB8) -#define USITC 0 -#define USICLK 1 -#define USICS0 2 -#define USICS1 3 -#define USIWM0 4 -#define USIWM1 5 -#define USIOIE 6 -#define USISIE 7 - -#define USISR _SFR_MEM8(0xB9) -#define USICNT0 0 -#define USICNT1 1 -#define USICNT2 2 -#define USICNT3 3 -#define USIDC 4 -#define USIPF 5 -#define USIOIF 6 -#define USISIF 7 - -#define USIDR _SFR_MEM8(0xBA) - -/* Reserved [0xBB..0xBF] */ - -#define UCSR0A _SFR_MEM8(0xC0) -#define MPCM0 0 -#define U2X0 1 -#define UPE0 2 -#define DOR0 3 -#define FE0 4 -#define UDRE0 5 -#define TXC0 6 -#define RXC0 7 - -#define UCSR0B _SFR_MEM8(0XC1) -#define TXB80 0 -#define RXB80 1 -#define UCSZ02 2 -#define TXEN0 3 -#define RXEN0 4 -#define UDRIE0 5 -#define TXCIE0 6 -#define RXCIE0 7 - -#define UCSR0C _SFR_MEM8(0xC2) -#define UCPOL0 0 -#define UCSZ00 1 -#define UCSZ01 2 -#define USBS0 3 -#define UPM00 4 -#define UPM01 5 -#define UMSEL0 6 - -/* Reserved [0xC3] */ - -/* Combine UBRR0L and UBRR0H */ -#define UBRR0 _SFR_MEM16(0xC4) - -#define UBRR0L _SFR_MEM8(0xC4) -#define UBRR0H _SFR_MEM8(0xC5) - -#define UDR0 _SFR_MEM8(0XC6) - -/* Reserved [0xC7..0xD7] */ - -#define PINH _SFR_MEM8(0xD8) -#define PINH7 7 -#define PINH6 6 -#define PINH5 5 -#define PINH4 4 -#define PINH3 3 -#define PINH2 2 -#define PINH1 1 -#define PINH0 0 - -#define DDRH _SFR_MEM8(0xD9) -#define DDH7 7 -#define DDH6 6 -#define DDH5 5 -#define DDH4 4 -#define DDH3 3 -#define DDH2 2 -#define DDH1 1 -#define DDH0 0 - -#define PORTH _SFR_MEM8(0xDA) -#define PH7 7 -#define PH6 6 -#define PH5 5 -#define PH4 4 -#define PH3 3 -#define PH2 2 -#define PH1 1 -#define PH0 0 - -#define PINJ _SFR_MEM8(0xDB) -#define PINJ6 6 -#define PINJ5 5 -#define PINJ4 4 -#define PINJ3 3 -#define PINJ2 2 -#define PINJ1 1 -#define PINJ0 0 - -#define DDRJ _SFR_MEM8(0xDC) -#define DDJ6 6 -#define DDJ5 5 -#define DDJ4 4 -#define DDJ3 3 -#define DDJ2 2 -#define DDJ1 1 -#define DDJ0 0 - -#define PORTJ _SFR_MEM8(0xDD) -#define PJ6 6 -#define PJ5 5 -#define PJ4 4 -#define PJ3 3 -#define PJ2 2 -#define PJ1 1 -#define PJ0 0 - -/* Reserved [0xDE..0xFF] */ - - -/* Interrupt vectors */ -/* Vector 0 is the reset vector */ -/* External Interrupt Request 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* Pin Change Interrupt Request 0 */ -#define PCINT0_vect _VECTOR(2) -#define SIG_PIN_CHANGE0 _VECTOR(2) - -/* Pin Change Interrupt Request 1 */ -#define PCINT1_vect _VECTOR(3) -#define SIG_PIN_CHANGE1 _VECTOR(3) - -/* Timer/Counter2 Compare Match */ -#define TIMER2_COMP_vect _VECTOR(4) -#define SIG_OUTPUT_COMPARE2 _VECTOR(4) - -/* Timer/Counter2 Overflow */ -#define TIMER2_OVF_vect _VECTOR(5) -#define SIG_OVERFLOW2 _VECTOR(5) - -/* Timer/Counter1 Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(6) -#define SIG_INPUT_CAPTURE1 _VECTOR(6) - -/* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPA_vect _VECTOR(7) -#define SIG_OUTPUT_COMPARE1A _VECTOR(7) - -/* Timer/Counter Compare Match B */ -#define TIMER1_COMPB_vect _VECTOR(8) -#define SIG_OUTPUT_COMPARE1B _VECTOR(8) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(9) -#define SIG_OVERFLOW1 _VECTOR(9) - -/* Timer/Counter0 Compare Match */ -#define TIMER0_COMP_vect _VECTOR(10) -#define SIG_OUTPUT_COMPARE0 _VECTOR(10) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(11) -#define SIG_OVERFLOW0 _VECTOR(11) - -/* SPI Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(12) -#define SIG_SPI _VECTOR(12) - -/* USART, Rx Complete */ -#define USART_RX_vect _VECTOR(13) -#define USART0_RX_vect _VECTOR(13) /* Alias */ -#define SIG_UART_RECV _VECTOR(13) - -/* USART Data register Empty */ -#define USART_UDRE_vect _VECTOR(14) -#define USART0_UDRE_vect _VECTOR(14) /* Alias */ -#define SIG_UART_DATA _VECTOR(14) - -/* USART0, Tx Complete */ -#define USART0_TX_vect _VECTOR(15) -#define USART_TX_vect _VECTOR(15) /* Alias */ -#define SIG_UART_TRANS _VECTOR(15) - -/* USI Start Condition */ -#define USI_START_vect _VECTOR(16) -#define SIG_USI_START _VECTOR(16) - -/* USI Overflow */ -#define USI_OVERFLOW_vect _VECTOR(17) -#define SIG_USI_OVERFLOW _VECTOR(17) - -/* Analog Comparator */ -#define ANALOG_COMP_vect _VECTOR(18) -#define SIG_COMPARATOR _VECTOR(18) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(19) -#define SIG_ADC _VECTOR(19) - -/* EEPROM Ready */ -#define EE_READY_vect _VECTOR(20) -#define SIG_EEPROM_READY _VECTOR(20) - -/* Store Program Memory Read */ -#define SPM_READY_vect _VECTOR(21) -#define SIG_SPM_READY _VECTOR(21) - -/* Pin Change Interrupt Request 2 */ -#define PCINT2_vect _VECTOR(23) -#define SIG_PIN_CHANGE2 _VECTOR(23) - -/* Pin Change Interrupt Request 3 */ -#define PCINT3_vect _VECTOR(24) -#define SIG_PIN_CHANGE3 _VECTOR(24) - -#define _VECTORS_SIZE 100 - - -/* Constants */ -#define SPM_PAGESIZE 128 -#define RAMEND 0x8FF -#define XRAMEND 0x8FF -#define E2END 0x3FF -#define E2PAGESIZE 4 -#define FLASHEND 0x7FFF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_JTAGEN (unsigned char)~_BV(6) -#define FUSE_OCDEN (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_SPIEN & FUSE_JTAGEN) - -/* Extended Fuse Byte */ -#define FUSE_RSTDISBL (unsigned char)~_BV(0) -#define FUSE_BODLEVEL0 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(2) -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x95 -#define SIGNATURE_2 0x06 - - -#endif /* _AVR_IOM3250_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom328p.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom328p.h deleted file mode 100644 index 74ba36094..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom328p.h +++ /dev/null @@ -1,875 +0,0 @@ -/* Copyright (c) 2007 Atmel Corporation - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. -*/ - -/* $Id: iom328p.h,v 1.3.2.12 2008/10/17 23:27:49 arcanum Exp $ */ - -/* avr/iom328p.h - definitions for ATmega328P. */ - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iom328p.h" -#else -# error "Attempt to include more than one file." -#endif - - -#ifndef _AVR_IOM328P_H_ -#define _AVR_IOM328P_H_ 1 - -/* Registers and associated bit numbers */ - -#define PINB _SFR_IO8(0x03) -#define PINB0 0 -#define PINB1 1 -#define PINB2 2 -#define PINB3 3 -#define PINB4 4 -#define PINB5 5 -#define PINB6 6 -#define PINB7 7 - -#define DDRB _SFR_IO8(0x04) -#define DDB0 0 -#define DDB1 1 -#define DDB2 2 -#define DDB3 3 -#define DDB4 4 -#define DDB5 5 -#define DDB6 6 -#define DDB7 7 - -#define PORTB _SFR_IO8(0x05) -#define PORTB0 0 -#define PORTB1 1 -#define PORTB2 2 -#define PORTB3 3 -#define PORTB4 4 -#define PORTB5 5 -#define PORTB6 6 -#define PORTB7 7 - -#define PINC _SFR_IO8(0x06) -#define PINC0 0 -#define PINC1 1 -#define PINC2 2 -#define PINC3 3 -#define PINC4 4 -#define PINC5 5 -#define PINC6 6 - -#define DDRC _SFR_IO8(0x07) -#define DDC0 0 -#define DDC1 1 -#define DDC2 2 -#define DDC3 3 -#define DDC4 4 -#define DDC5 5 -#define DDC6 6 - -#define PORTC _SFR_IO8(0x08) -#define PORTC0 0 -#define PORTC1 1 -#define PORTC2 2 -#define PORTC3 3 -#define PORTC4 4 -#define PORTC5 5 -#define PORTC6 6 - -#define PIND _SFR_IO8(0x09) -#define PIND0 0 -#define PIND1 1 -#define PIND2 2 -#define PIND3 3 -#define PIND4 4 -#define PIND5 5 -#define PIND6 6 -#define PIND7 7 - -#define DDRD _SFR_IO8(0x0A) -#define DDD0 0 -#define DDD1 1 -#define DDD2 2 -#define DDD3 3 -#define DDD4 4 -#define DDD5 5 -#define DDD6 6 -#define DDD7 7 - -#define PORTD _SFR_IO8(0x0B) -#define PORTD0 0 -#define PORTD1 1 -#define PORTD2 2 -#define PORTD3 3 -#define PORTD4 4 -#define PORTD5 5 -#define PORTD6 6 -#define PORTD7 7 - -#define TIFR0 _SFR_IO8(0x15) -#define TOV0 0 -#define OCF0A 1 -#define OCF0B 2 - -#define TIFR1 _SFR_IO8(0x16) -#define TOV1 0 -#define OCF1A 1 -#define OCF1B 2 -#define ICF1 5 - -#define TIFR2 _SFR_IO8(0x17) -#define TOV2 0 -#define OCF2A 1 -#define OCF2B 2 - -#define PCIFR _SFR_IO8(0x1B) -#define PCIF0 0 -#define PCIF1 1 -#define PCIF2 2 - -#define EIFR _SFR_IO8(0x1C) -#define INTF0 0 -#define INTF1 1 - -#define EIMSK _SFR_IO8(0x1D) -#define INT0 0 -#define INT1 1 - -#define GPIOR0 _SFR_IO8(0x1E) -#define GPIOR00 0 -#define GPIOR01 1 -#define GPIOR02 2 -#define GPIOR03 3 -#define GPIOR04 4 -#define GPIOR05 5 -#define GPIOR06 6 -#define GPIOR07 7 - -#define EECR _SFR_IO8(0x1F) -#define EERE 0 -#define EEPE 1 -#define EEMPE 2 -#define EERIE 3 -#define EEPM0 4 -#define EEPM1 5 - -#define EEDR _SFR_IO8(0x20) -#define EEDR0 0 -#define EEDR1 1 -#define EEDR2 2 -#define EEDR3 3 -#define EEDR4 4 -#define EEDR5 5 -#define EEDR6 6 -#define EEDR7 7 - -#define EEAR _SFR_IO16(0x21) - -#define EEARL _SFR_IO8(0x21) -#define EEAR0 0 -#define EEAR1 1 -#define EEAR2 2 -#define EEAR3 3 -#define EEAR4 4 -#define EEAR5 5 -#define EEAR6 6 -#define EEAR7 7 - -#define EEARH _SFR_IO8(0x22) -#define EEAR8 0 -#define EEAR9 1 - -#define _EEPROM_REG_LOCATIONS_ 1F2021 - -#define GTCCR _SFR_IO8(0x23) -#define PSRSYNC 0 -#define PSRASY 1 -#define TSM 7 - -#define TCCR0A _SFR_IO8(0x24) -#define WGM00 0 -#define WGM01 1 -#define COM0B0 4 -#define COM0B1 5 -#define COM0A0 6 -#define COM0A1 7 - -#define TCCR0B _SFR_IO8(0x25) -#define CS00 0 -#define CS01 1 -#define CS02 2 -#define WGM02 3 -#define FOC0B 6 -#define FOC0A 7 - -#define TCNT0 _SFR_IO8(0x26) -#define TCNT0_0 0 -#define TCNT0_1 1 -#define TCNT0_2 2 -#define TCNT0_3 3 -#define TCNT0_4 4 -#define TCNT0_5 5 -#define TCNT0_6 6 -#define TCNT0_7 7 - -#define OCR0A _SFR_IO8(0x27) -#define OCROA_0 0 -#define OCROA_1 1 -#define OCROA_2 2 -#define OCROA_3 3 -#define OCROA_4 4 -#define OCROA_5 5 -#define OCROA_6 6 -#define OCROA_7 7 - -#define OCR0B _SFR_IO8(0x28) -#define OCR0B_0 0 -#define OCR0B_1 1 -#define OCR0B_2 2 -#define OCR0B_3 3 -#define OCR0B_4 4 -#define OCR0B_5 5 -#define OCR0B_6 6 -#define OCR0B_7 7 - -#define GPIOR1 _SFR_IO8(0x2A) -#define GPIOR10 0 -#define GPIOR11 1 -#define GPIOR12 2 -#define GPIOR13 3 -#define GPIOR14 4 -#define GPIOR15 5 -#define GPIOR16 6 -#define GPIOR17 7 - -#define GPIOR2 _SFR_IO8(0x2B) -#define GPIOR20 0 -#define GPIOR21 1 -#define GPIOR22 2 -#define GPIOR23 3 -#define GPIOR24 4 -#define GPIOR25 5 -#define GPIOR26 6 -#define GPIOR27 7 - -#define SPCR _SFR_IO8(0x2C) -#define SPR0 0 -#define SPR1 1 -#define CPHA 2 -#define CPOL 3 -#define MSTR 4 -#define DORD 5 -#define SPE 6 -#define SPIE 7 - -#define SPSR _SFR_IO8(0x2D) -#define SPI2X 0 -#define WCOL 6 -#define SPIF 7 - -#define SPDR _SFR_IO8(0x2E) -#define SPDR0 0 -#define SPDR1 1 -#define SPDR2 2 -#define SPDR3 3 -#define SPDR4 4 -#define SPDR5 5 -#define SPDR6 6 -#define SPDR7 7 - -#define ACSR _SFR_IO8(0x30) -#define ACIS0 0 -#define ACIS1 1 -#define ACIC 2 -#define ACIE 3 -#define ACI 4 -#define ACO 5 -#define ACBG 6 -#define ACD 7 - -#define SMCR _SFR_IO8(0x33) -#define SE 0 -#define SM0 1 -#define SM1 2 -#define SM2 3 - -#define MCUSR _SFR_IO8(0x34) -#define PORF 0 -#define EXTRF 1 -#define BORF 2 -#define WDRF 3 - -#define MCUCR _SFR_IO8(0x35) -#define IVCE 0 -#define IVSEL 1 -#define PUD 4 -#define BODSE 5 -#define BODS 6 - -#define SPMCSR _SFR_IO8(0x37) -#define SELFPRGEN 0 -#define PGERS 1 -#define PGWRT 2 -#define BLBSET 3 -#define RWWSRE 4 -#define RWWSB 6 -#define SPMIE 7 - -#define WDTCSR _SFR_MEM8(0x60) -#define WDP0 0 -#define WDP1 1 -#define WDP2 2 -#define WDE 3 -#define WDCE 4 -#define WDP3 5 -#define WDIE 6 -#define WDIF 7 - -#define CLKPR _SFR_MEM8(0x61) -#define CLKPS0 0 -#define CLKPS1 1 -#define CLKPS2 2 -#define CLKPS3 3 -#define CLKPCE 7 - -#define PRR _SFR_MEM8(0x64) -#define PRADC 0 -#define PRUSART0 1 -#define PRSPI 2 -#define PRTIM1 3 -#define PRTIM0 5 -#define PRTIM2 6 -#define PRTWI 7 - -#define OSCCAL _SFR_MEM8(0x66) -#define CAL0 0 -#define CAL1 1 -#define CAL2 2 -#define CAL3 3 -#define CAL4 4 -#define CAL5 5 -#define CAL6 6 -#define CAL7 7 - -#define PCICR _SFR_MEM8(0x68) -#define PCIE0 0 -#define PCIE1 1 -#define PCIE2 2 - -#define EICRA _SFR_MEM8(0x69) -#define ISC00 0 -#define ISC01 1 -#define ISC10 2 -#define ISC11 3 - -#define PCMSK0 _SFR_MEM8(0x6B) -#define PCINT0 0 -#define PCINT1 1 -#define PCINT2 2 -#define PCINT3 3 -#define PCINT4 4 -#define PCINT5 5 -#define PCINT6 6 -#define PCINT7 7 - -#define PCMSK1 _SFR_MEM8(0x6C) -#define PCINT8 0 -#define PCINT9 1 -#define PCINT10 2 -#define PCINT11 3 -#define PCINT12 4 -#define PCINT13 5 -#define PCINT14 6 - -#define PCMSK2 _SFR_MEM8(0x6D) -#define PCINT16 0 -#define PCINT17 1 -#define PCINT18 2 -#define PCINT19 3 -#define PCINT20 4 -#define PCINT21 5 -#define PCINT22 6 -#define PCINT23 7 - -#define TIMSK0 _SFR_MEM8(0x6E) -#define TOIE0 0 -#define OCIE0A 1 -#define OCIE0B 2 - -#define TIMSK1 _SFR_MEM8(0x6F) -#define TOIE1 0 -#define OCIE1A 1 -#define OCIE1B 2 -#define ICIE1 5 - -#define TIMSK2 _SFR_MEM8(0x70) -#define TOIE2 0 -#define OCIE2A 1 -#define OCIE2B 2 - -#ifndef __ASSEMBLER__ -#define ADC _SFR_MEM16(0x78) -#endif -#define ADCW _SFR_MEM16(0x78) - -#define ADCL _SFR_MEM8(0x78) -#define ADCL0 0 -#define ADCL1 1 -#define ADCL2 2 -#define ADCL3 3 -#define ADCL4 4 -#define ADCL5 5 -#define ADCL6 6 -#define ADCL7 7 - -#define ADCH _SFR_MEM8(0x79) -#define ADCH0 0 -#define ADCH1 1 -#define ADCH2 2 -#define ADCH3 3 -#define ADCH4 4 -#define ADCH5 5 -#define ADCH6 6 -#define ADCH7 7 - -#define ADCSRA _SFR_MEM8(0x7A) -#define ADPS0 0 -#define ADPS1 1 -#define ADPS2 2 -#define ADIE 3 -#define ADIF 4 -#define ADATE 5 -#define ADSC 6 -#define ADEN 7 - -#define ADCSRB _SFR_MEM8(0x7B) -#define ADTS0 0 -#define ADTS1 1 -#define ADTS2 2 -#define ACME 6 - -#define ADMUX _SFR_MEM8(0x7C) -#define MUX0 0 -#define MUX1 1 -#define MUX2 2 -#define MUX3 3 -#define ADLAR 5 -#define REFS0 6 -#define REFS1 7 - -#define DIDR0 _SFR_MEM8(0x7E) -#define ADC0D 0 -#define ADC1D 1 -#define ADC2D 2 -#define ADC3D 3 -#define ADC4D 4 -#define ADC5D 5 - -#define DIDR1 _SFR_MEM8(0x7F) -#define AIN0D 0 -#define AIN1D 1 - -#define TCCR1A _SFR_MEM8(0x80) -#define WGM10 0 -#define WGM11 1 -#define COM1B0 4 -#define COM1B1 5 -#define COM1A0 6 -#define COM1A1 7 - -#define TCCR1B _SFR_MEM8(0x81) -#define CS10 0 -#define CS11 1 -#define CS12 2 -#define WGM12 3 -#define WGM13 4 -#define ICES1 6 -#define ICNC1 7 - -#define TCCR1C _SFR_MEM8(0x82) -#define FOC1B 6 -#define FOC1A 7 - -#define TCNT1 _SFR_MEM16(0x84) - -#define TCNT1L _SFR_MEM8(0x84) -#define TCNT1L0 0 -#define TCNT1L1 1 -#define TCNT1L2 2 -#define TCNT1L3 3 -#define TCNT1L4 4 -#define TCNT1L5 5 -#define TCNT1L6 6 -#define TCNT1L7 7 - -#define TCNT1H _SFR_MEM8(0x85) -#define TCNT1H0 0 -#define TCNT1H1 1 -#define TCNT1H2 2 -#define TCNT1H3 3 -#define TCNT1H4 4 -#define TCNT1H5 5 -#define TCNT1H6 6 -#define TCNT1H7 7 - -#define ICR1 _SFR_MEM16(0x86) - -#define ICR1L _SFR_MEM8(0x86) -#define ICR1L0 0 -#define ICR1L1 1 -#define ICR1L2 2 -#define ICR1L3 3 -#define ICR1L4 4 -#define ICR1L5 5 -#define ICR1L6 6 -#define ICR1L7 7 - -#define ICR1H _SFR_MEM8(0x87) -#define ICR1H0 0 -#define ICR1H1 1 -#define ICR1H2 2 -#define ICR1H3 3 -#define ICR1H4 4 -#define ICR1H5 5 -#define ICR1H6 6 -#define ICR1H7 7 - -#define OCR1A _SFR_MEM16(0x88) - -#define OCR1AL _SFR_MEM8(0x88) -#define OCR1AL0 0 -#define OCR1AL1 1 -#define OCR1AL2 2 -#define OCR1AL3 3 -#define OCR1AL4 4 -#define OCR1AL5 5 -#define OCR1AL6 6 -#define OCR1AL7 7 - -#define OCR1AH _SFR_MEM8(0x89) -#define OCR1AH0 0 -#define OCR1AH1 1 -#define OCR1AH2 2 -#define OCR1AH3 3 -#define OCR1AH4 4 -#define OCR1AH5 5 -#define OCR1AH6 6 -#define OCR1AH7 7 - -#define OCR1B _SFR_MEM16(0x8A) - -#define OCR1BL _SFR_MEM8(0x8A) -#define OCR1BL0 0 -#define OCR1BL1 1 -#define OCR1BL2 2 -#define OCR1BL3 3 -#define OCR1BL4 4 -#define OCR1BL5 5 -#define OCR1BL6 6 -#define OCR1BL7 7 - -#define OCR1BH _SFR_MEM8(0x8B) -#define OCR1BH0 0 -#define OCR1BH1 1 -#define OCR1BH2 2 -#define OCR1BH3 3 -#define OCR1BH4 4 -#define OCR1BH5 5 -#define OCR1BH6 6 -#define OCR1BH7 7 - -#define TCCR2A _SFR_MEM8(0xB0) -#define WGM20 0 -#define WGM21 1 -#define COM2B0 4 -#define COM2B1 5 -#define COM2A0 6 -#define COM2A1 7 - -#define TCCR2B _SFR_MEM8(0xB1) -#define CS20 0 -#define CS21 1 -#define CS22 2 -#define WGM22 3 -#define FOC2B 6 -#define FOC2A 7 - -#define TCNT2 _SFR_MEM8(0xB2) -#define TCNT2_0 0 -#define TCNT2_1 1 -#define TCNT2_2 2 -#define TCNT2_3 3 -#define TCNT2_4 4 -#define TCNT2_5 5 -#define TCNT2_6 6 -#define TCNT2_7 7 - -#define OCR2A _SFR_MEM8(0xB3) -#define OCR2_0 0 -#define OCR2_1 1 -#define OCR2_2 2 -#define OCR2_3 3 -#define OCR2_4 4 -#define OCR2_5 5 -#define OCR2_6 6 -#define OCR2_7 7 - -#define OCR2B _SFR_MEM8(0xB4) -#define OCR2_0 0 -#define OCR2_1 1 -#define OCR2_2 2 -#define OCR2_3 3 -#define OCR2_4 4 -#define OCR2_5 5 -#define OCR2_6 6 -#define OCR2_7 7 - -#define ASSR _SFR_MEM8(0xB6) -#define TCR2BUB 0 -#define TCR2AUB 1 -#define OCR2BUB 2 -#define OCR2AUB 3 -#define TCN2UB 4 -#define AS2 5 -#define EXCLK 6 - -#define TWBR _SFR_MEM8(0xB8) -#define TWBR0 0 -#define TWBR1 1 -#define TWBR2 2 -#define TWBR3 3 -#define TWBR4 4 -#define TWBR5 5 -#define TWBR6 6 -#define TWBR7 7 - -#define TWSR _SFR_MEM8(0xB9) -#define TWPS0 0 -#define TWPS1 1 -#define TWS3 3 -#define TWS4 4 -#define TWS5 5 -#define TWS6 6 -#define TWS7 7 - -#define TWAR _SFR_MEM8(0xBA) -#define TWGCE 0 -#define TWA0 1 -#define TWA1 2 -#define TWA2 3 -#define TWA3 4 -#define TWA4 5 -#define TWA5 6 -#define TWA6 7 - -#define TWDR _SFR_MEM8(0xBB) -#define TWD0 0 -#define TWD1 1 -#define TWD2 2 -#define TWD3 3 -#define TWD4 4 -#define TWD5 5 -#define TWD6 6 -#define TWD7 7 - -#define TWCR _SFR_MEM8(0xBC) -#define TWIE 0 -#define TWEN 2 -#define TWWC 3 -#define TWSTO 4 -#define TWSTA 5 -#define TWEA 6 -#define TWINT 7 - -#define TWAMR _SFR_MEM8(0xBD) -#define TWAM0 0 -#define TWAM1 1 -#define TWAM2 2 -#define TWAM3 3 -#define TWAM4 4 -#define TWAM5 5 -#define TWAM6 6 - -#define UCSR0A _SFR_MEM8(0xC0) -#define MPCM0 0 -#define U2X0 1 -#define UPE0 2 -#define DOR0 3 -#define FE0 4 -#define UDRE0 5 -#define TXC0 6 -#define RXC0 7 - -#define UCSR0B _SFR_MEM8(0xC1) -#define TXB80 0 -#define RXB80 1 -#define UCSZ02 2 -#define TXEN0 3 -#define RXEN0 4 -#define UDRIE0 5 -#define TXCIE0 6 -#define RXCIE0 7 - -#define UCSR0C _SFR_MEM8(0xC2) -#define UCPOL0 0 -#define UCSZ00 1 -#define UCPHA0 1 -#define UCSZ01 2 -#define UDORD0 2 -#define USBS0 3 -#define UPM00 4 -#define UPM01 5 -#define UMSEL00 6 -#define UMSEL01 7 - -#define UBRR0 _SFR_MEM16(0xC4) - -#define UBRR0L _SFR_MEM8(0xC4) -#define UBRR0_0 0 -#define UBRR0_1 1 -#define UBRR0_2 2 -#define UBRR0_3 3 -#define UBRR0_4 4 -#define UBRR0_5 5 -#define UBRR0_6 6 -#define UBRR0_7 7 - -#define UBRR0H _SFR_MEM8(0xC5) -#define UBRR0_8 0 -#define UBRR0_9 1 -#define UBRR0_10 2 -#define UBRR0_11 3 - -#define UDR0 _SFR_MEM8(0xC6) -#define UDR0_0 0 -#define UDR0_1 1 -#define UDR0_2 2 -#define UDR0_3 3 -#define UDR0_4 4 -#define UDR0_5 5 -#define UDR0_6 6 -#define UDR0_7 7 - - - -/* Interrupt Vectors */ -/* Interrupt Vector 0 is the reset vector. */ -#define INT0_vect _VECTOR(1) /* External Interrupt Request 0 */ -#define INT1_vect _VECTOR(2) /* External Interrupt Request 1 */ -#define PCINT0_vect _VECTOR(3) /* Pin Change Interrupt Request 0 */ -#define PCINT1_vect _VECTOR(4) /* Pin Change Interrupt Request 0 */ -#define PCINT2_vect _VECTOR(5) /* Pin Change Interrupt Request 1 */ -#define WDT_vect _VECTOR(6) /* Watchdog Time-out Interrupt */ -#define TIMER2_COMPA_vect _VECTOR(7) /* Timer/Counter2 Compare Match A */ -#define TIMER2_COMPB_vect _VECTOR(8) /* Timer/Counter2 Compare Match A */ -#define TIMER2_OVF_vect _VECTOR(9) /* Timer/Counter2 Overflow */ -#define TIMER1_CAPT_vect _VECTOR(10) /* Timer/Counter1 Capture Event */ -#define TIMER1_COMPA_vect _VECTOR(11) /* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPB_vect _VECTOR(12) /* Timer/Counter1 Compare Match B */ -#define TIMER1_OVF_vect _VECTOR(13) /* Timer/Counter1 Overflow */ -#define TIMER0_COMPA_vect _VECTOR(14) /* TimerCounter0 Compare Match A */ -#define TIMER0_COMPB_vect _VECTOR(15) /* TimerCounter0 Compare Match B */ -#define TIMER0_OVF_vect _VECTOR(16) /* Timer/Couner0 Overflow */ -#define SPI_STC_vect _VECTOR(17) /* SPI Serial Transfer Complete */ -#define USART_RX_vect _VECTOR(18) /* USART Rx Complete */ -#define USART_UDRE_vect _VECTOR(19) /* USART, Data Register Empty */ -#define USART_TX_vect _VECTOR(20) /* USART Tx Complete */ -#define ADC_vect _VECTOR(21) /* ADC Conversion Complete */ -#define EE_READY_vect _VECTOR(22) /* EEPROM Ready */ -#define ANALOG_COMP_vect _VECTOR(23) /* Analog Comparator */ -#define TWI_vect _VECTOR(24) /* Two-wire Serial Interface */ -#define SPM_READY_vect _VECTOR(25) /* Store Program Memory Read */ - -#define _VECTORS_SIZE (26 * 4) - - - -/* Constants */ -#define SPM_PAGESIZE 128 -#define RAMEND 0x8FF /* Last On-Chip SRAM Location */ -#define XRAMSIZE 0 -#define XRAMEND (RAMEND + XRAMSIZE) -#define E2END 0x3FF -#define E2PAGESIZE 4 -#define FLASHEND 0x7FFF - - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) /* Select Clock Source */ -#define FUSE_CKSEL1 (unsigned char)~_BV(1) /* Select Clock Source */ -#define FUSE_CKSEL2 (unsigned char)~_BV(2) /* Select Clock Source */ -#define FUSE_CKSEL3 (unsigned char)~_BV(3) /* Select Clock Source */ -#define FUSE_SUT0 (unsigned char)~_BV(4) /* Select start-up time */ -#define FUSE_SUT1 (unsigned char)~_BV(5) /* Select start-up time */ -#define FUSE_CKOUT (unsigned char)~_BV(6) /* Clock output */ -#define FUSE_CKDIV8 (unsigned char)~_BV(7) /* Divide clock by 8 */ -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) /* Brown-out Detector trigger level */ -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) /* Brown-out Detector trigger level */ -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) /* Brown-out Detector trigger level */ -#define FUSE_EESAVE (unsigned char)~_BV(3) /* EEPROM memory is preserved through chip erase */ -#define FUSE_WDTON (unsigned char)~_BV(4) /* Watchdog Timer Always On */ -#define FUSE_SPIEN (unsigned char)~_BV(5) /* Enable Serial programming and Data Downloading */ -#define FUSE_DWEN (unsigned char)~_BV(6) /* debugWIRE Enable */ -#define FUSE_RSTDISBL (unsigned char)~_BV(7) /* External reset disable */ -#define HFUSE_DEFAULT (FUSE_SPIEN) - -/* Extended Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define EFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1) - - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x95 -#define SIGNATURE_2 0x0F - - -#endif /* _AVR_IOM328P_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom329.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom329.h deleted file mode 100644 index a34a0e98a..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom329.h +++ /dev/null @@ -1,1003 +0,0 @@ -/* Copyright (c) 2004 Eric B. Weddington - Copyright (c) 2005, 2006, 2007 Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* avr/iom329.h - definitions for ATmega329 and ATmega329P. */ - -#ifndef _AVR_IOM329_H_ -#define _AVR_IOM329_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iom329.h" -#else -# error "Attempt to include more than one file." -#endif - -/* Registers and associated bit numbers */ - -#define PINA _SFR_IO8(0x00) -#define PINA7 7 -#define PINA6 6 -#define PINA5 5 -#define PINA4 4 -#define PINA3 3 -#define PINA2 2 -#define PINA1 1 -#define PINA0 0 - -#define DDRA _SFR_IO8(0x01) -#define DDA7 7 -#define DDA6 6 -#define DDA5 5 -#define DDA4 4 -#define DDA3 3 -#define DDA2 2 -#define DDA1 1 -#define DDA0 0 - -#define PORTA _SFR_IO8(0x02) -#define PA7 7 -#define PA6 6 -#define PA5 5 -#define PA4 4 -#define PA3 3 -#define PA2 2 -#define PA1 1 -#define PA0 0 - -#define PINB _SFR_IO8(0x03) -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -#define DDRB _SFR_IO8(0x04) -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -#define PORTB _SFR_IO8(0x05) -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -#define PINC _SFR_IO8(0x06) -#define PINC7 7 -#define PINC6 6 -#define PINC5 5 -#define PINC4 4 -#define PINC3 3 -#define PINC2 2 -#define PINC1 1 -#define PINC0 0 - -#define DDRC _SFR_IO8(0x07) -#define DDC7 7 -#define DDC6 6 -#define DDC5 5 -#define DDC4 4 -#define DDC3 3 -#define DDC2 2 -#define DDC1 1 -#define DDC0 0 - -#define PORTC _SFR_IO8(0x08) -#define PC7 7 -#define PC6 6 -#define PC5 5 -#define PC4 4 -#define PC3 3 -#define PC2 2 -#define PC1 1 -#define PC0 0 - -#define PIND _SFR_IO8(0x09) -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -#define DDRD _SFR_IO8(0x0A) -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -#define PORTD _SFR_IO8(0x0B) -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -#define PINE _SFR_IO8(0x0C) -#define PINE7 7 -#define PINE6 6 -#define PINE5 5 -#define PINE4 4 -#define PINE3 3 -#define PINE2 2 -#define PINE1 1 -#define PINE0 0 - -#define DDRE _SFR_IO8(0x0D) -#define DDE7 7 -#define DDE6 6 -#define DDE5 5 -#define DDE4 4 -#define DDE3 3 -#define DDE2 2 -#define DDE1 1 -#define DDE0 0 - -#define PORTE _SFR_IO8(0x0E) -#define PE7 7 -#define PE6 6 -#define PE5 5 -#define PE4 4 -#define PE3 3 -#define PE2 2 -#define PE1 1 -#define PE0 0 - -#define PINF _SFR_IO8(0x0F) -#define PINF7 7 -#define PINF6 6 -#define PINF5 5 -#define PINF4 4 -#define PINF3 3 -#define PINF2 2 -#define PINF1 1 -#define PINF0 0 - -#define DDRF _SFR_IO8(0x10) -#define DDF7 7 -#define DDF6 6 -#define DDF5 5 -#define DDF4 4 -#define DDF3 3 -#define DDF2 2 -#define DDF1 1 -#define DDF0 0 - -#define PORTF _SFR_IO8(0x11) -#define PF7 7 -#define PF6 6 -#define PF5 5 -#define PF4 4 -#define PF3 3 -#define PF2 2 -#define PF1 1 -#define PF0 0 - -#define PING _SFR_IO8(0x12) -#define PING5 5 -#define PING4 4 -#define PING3 3 -#define PING2 2 -#define PING1 1 -#define PING0 0 - -#define DDRG _SFR_IO8(0x13) -#define DDG4 4 -#define DDG3 3 -#define DDG2 2 -#define DDG1 1 -#define DDG0 0 - -#define PORTG _SFR_IO8(0x14) -#define PG4 4 -#define PG3 3 -#define PG2 2 -#define PG1 1 -#define PG0 0 - -#define TIFR0 _SFR_IO8(0x15) -#define TOV0 0 -#define OCF0A 1 - -#define TIFR1 _SFR_IO8(0x16) -#define TOV1 0 -#define OCF1A 1 -#define OCF1B 2 -#define ICF1 5 - -#define TIFR2 _SFR_IO8(0x17) -#define TOV2 0 -#define OCF2A 1 - -/* Reserved [0x18..0x1B] */ - -#define EIFR _SFR_IO8(0x1C) -#define INTF0 0 -#define PCIF0 4 -#define PCIF1 5 - -#define EIMSK _SFR_IO8(0x1D) -#define INT0 0 -#define PCIE0 4 -#define PCIE1 5 - -#define GPIOR0 _SFR_IO8(0x1E) - -#define EECR _SFR_IO8(0x1F) -#define EERIE 3 -#define EEMWE 2 -#define EEWE 1 -#define EERE 0 - -#define EEDR _SFR_IO8(0X20) - -/* Combine EEARL and EEARH */ -#define EEAR _SFR_IO16(0x21) -#define EEARL _SFR_IO8(0x21) -#define EEARH _SFR_IO8(0X22) - -/* 6-char sequence denoting where to find the EEPROM registers in memory space. - Adresses denoted in hex syntax with uppercase letters. Used by the EEPROM - subroutines. - First two letters: EECR address. - Second two letters: EEDR address. - Last two letters: EEAR address. */ -#define __EEPROM_REG_LOCATIONS__ 1F2021 - -#define GTCCR _SFR_IO8(0x23) -#define PSR10 0 -#define PSR2 1 -#define TSM 7 - -#define TCCR0A _SFR_IO8(0x24) -#define CS00 0 -#define CS01 1 -#define CS02 2 -#define WGM01 3 -#define COM0A0 4 -#define COM0A1 5 -#define WGM00 6 -#define FOC0A 7 - -/* Reserved [0x25] */ - -#define TCNT0 _SFR_IO8(0X26) - -#define OCR0A _SFR_IO8(0X27) - -/* Reserved [0x28..0x29] */ - -#define GPIOR1 _SFR_IO8(0x2A) - -#define GPIOR2 _SFR_IO8(0x2B) - -#define SPCR _SFR_IO8(0x2C) -#define SPR0 0 -#define SPR1 1 -#define CPHA 2 -#define CPOL 3 -#define MSTR 4 -#define DORD 5 -#define SPE 6 -#define SPIE 7 - -#define SPSR _SFR_IO8(0x2D) -#define SPI2X 0 -#define WCOL 6 -#define SPIF 7 - -#define SPDR _SFR_IO8(0X2E) - -/* Reserved [0x2F] */ - -#define ACSR _SFR_IO8(0x30) -#define ACIS0 0 -#define ACIS1 1 -#define ACIC 2 -#define ACIE 3 -#define ACI 4 -#define ACO 5 -#define ACBG 6 -#define ACD 7 - -#define OCDR _SFR_IO8(0x31) -#define OCDR0 0 -#define OCDR1 1 -#define OCDR2 2 -#define OCDR3 3 -#define OCDR4 4 -#define OCDR5 5 -#define OCDR6 6 -#define OCDR7 7 -#define IDRD 7 - -/* Reserved [0x32] */ - -#define SMCR _SFR_IO8(0x33) -#define SE 0 -#define SM0 1 -#define SM1 2 -#define SM2 3 - -#define MCUSR _SFR_IO8(0x34) -#define PORF 0 -#define EXTRF 1 -#define BORF 2 -#define WDRF 3 -#define JTRF 4 - -#define MCUCR _SFR_IO8(0X35) -#define IVCE 0 -#define IVSEL 1 -#define PUD 4 -#if defined(__AVR_ATmega329P__) -#define BODSE 5 -#define BODS 6 -#endif -#define JTD 7 - -/* Reserved [0x36] */ - -#define SPMCSR _SFR_IO8(0x37) -#define SPMEN 0 -#define PGERS 1 -#define PGWRT 2 -#define BLBSET 3 -#define RWWSRE 4 -#define RWWSB 6 -#define SPMIE 7 - -/* Reserved [0x38..0x3C] */ - -/* SP [0x3D..0x3E] */ -/* SREG [0x3F] */ - -#define WDTCR _SFR_MEM8(0x60) -#define WDP0 0 -#define WDP1 1 -#define WDP2 2 -#define WDE 3 -#define WDCE 4 - -#define CLKPR _SFR_MEM8(0x61) -#define CLKPS0 0 -#define CLKPS1 1 -#define CLKPS2 2 -#define CLKPS3 3 -#define CLKPCE 7 - -/* Reserved [0x62..0x63] */ - -#define PRR _SFR_MEM8(0x64) -#define PRADC 0 -#define PRUSART0 1 -#define PRSPI 2 -#define PRTIM1 3 -#define PRLCD 4 - -/* Reserved [0x65] */ - -#define OSCCAL _SFR_MEM8(0x66) - -/* Reserved [0x67..0x68] */ - -#define EICRA _SFR_MEM8(0x69) -#define ISC00 0 -#define ISC01 1 - -/* Reserved [0x6A] */ - -#define PCMSK0 _SFR_MEM8(0x6B) -#define PCINT0 0 -#define PCINT1 1 -#define PCINT2 2 -#define PCINT3 3 -#define PCINT4 4 -#define PCINT5 5 -#define PCINT6 6 -#define PCINT7 7 - -#define PCMSK1 _SFR_MEM8(0x6C) -#define PCINT8 0 -#define PCINT9 1 -#define PCINT10 2 -#define PCINT11 3 -#define PCINT12 4 -#define PCINT13 5 -#define PCINT14 6 -#define PCINT15 7 - -/* Reserved [0x6D] */ - -#define TIMSK0 _SFR_MEM8(0x6E) -#define TOIE0 0 -#define OCIE0A 1 - -#define TIMSK1 _SFR_MEM8(0x6F) -#define TOIE1 0 -#define OCIE1A 1 -#define OCIE1B 2 -#define ICIE1 5 - -#define TIMSK2 _SFR_MEM8(0x70) -#define TOIE2 0 -#define OCIE2A 1 - -/* Reserved [0x71..0x77] */ - -/* Combine ADCL and ADCH */ -#ifndef __ASSEMBLER__ -#define ADC _SFR_MEM16(0x78) -#endif -#define ADCW _SFR_MEM16(0x78) -#define ADCL _SFR_MEM8(0x78) -#define ADCH _SFR_MEM8(0x79) - -#define ADCSRA _SFR_MEM8(0x7A) -#define ADPS0 0 -#define ADPS1 1 -#define ADPS2 2 -#define ADIE 3 -#define ADIF 4 -#define ADATE 5 -#define ADSC 6 -#define ADEN 7 - -#define ADCSRB _SFR_MEM8(0x7B) -#define ADTS0 0 -#define ADTS1 1 -#define ADTS2 2 -#define ACME 6 - -#define ADMUX _SFR_MEM8(0x7C) -#define MUX0 0 -#define MUX1 1 -#define MUX2 2 -#define MUX3 3 -#define MUX4 4 -#define ADLAR 5 -#define REFS0 6 -#define REFS1 7 - -/* Reserved [0x7D] */ - -#define DIDR0 _SFR_MEM8(0x7E) -#define ADC0D 0 -#define ADC1D 1 -#define ADC2D 2 -#define ADC3D 3 -#define ADC4D 4 -#define ADC5D 5 -#define ADC6D 6 -#define ADC7D 7 - -#define DIDR1 _SFR_MEM8(0x7F) -#define AIN0D 0 -#define AIN1D 1 - -#define TCCR1A _SFR_MEM8(0X80) -#define WGM10 0 -#define WGM11 1 -#define COM1B0 4 -#define COM1B1 5 -#define COM1A0 6 -#define COM1A1 7 - -#define TCCR1B _SFR_MEM8(0X81) -#define CS10 0 -#define CS11 1 -#define CS12 2 -#define WGM12 3 -#define WGM13 4 -#define ICES1 6 -#define ICNC1 7 - -#define TCCR1C _SFR_MEM8(0x82) -#define FOC1B 6 -#define FOC1A 7 - -/* Reserved [0x83] */ - -/* Combine TCNT1L and TCNT1H */ -#define TCNT1 _SFR_MEM16(0x84) - -#define TCNT1L _SFR_MEM8(0x84) -#define TCNT1H _SFR_MEM8(0x85) - -/* Combine ICR1L and ICR1H */ -#define ICR1 _SFR_MEM16(0x86) - -#define ICR1L _SFR_MEM8(0x86) -#define ICR1H _SFR_MEM8(0x87) - -/* Combine OCR1AL and OCR1AH */ -#define OCR1A _SFR_MEM16(0x88) - -#define OCR1AL _SFR_MEM8(0x88) -#define OCR1AH _SFR_MEM8(0x89) - -/* Combine OCR1BL and OCR1BH */ -#define OCR1B _SFR_MEM16(0x8A) - -#define OCR1BL _SFR_MEM8(0x8A) -#define OCR1BH _SFR_MEM8(0x8B) - -/* Reserved [0x8C..0xAF] */ - -#define TCCR2A _SFR_MEM8(0xB0) -#define CS20 0 -#define CS21 1 -#define CS22 2 -#define WGM21 3 -#define COM2A0 4 -#define COM2A1 5 -#define WGM20 6 -#define FOC2A 7 - -/* Reserved [0xB1] */ - -#define TCNT2 _SFR_MEM8(0xB2) - -#define OCR2A _SFR_MEM8(0xB3) - -/* Reserved [0xB4..0xB5] */ - -#define ASSR _SFR_MEM8(0xB6) -#define TCR2UB 0 -#define OCR2UB 1 -#define TCN2UB 2 -#define AS2 3 -#define EXCLK 4 - -/* Reserved [0xB7] */ - -#define USICR _SFR_MEM8(0xB8) -#define USITC 0 -#define USICLK 1 -#define USICS0 2 -#define USICS1 3 -#define USIWM0 4 -#define USIWM1 5 -#define USIOIE 6 -#define USISIE 7 - -#define USISR _SFR_MEM8(0xB9) -#define USICNT0 0 -#define USICNT1 1 -#define USICNT2 2 -#define USICNT3 3 -#define USIDC 4 -#define USIPF 5 -#define USIOIF 6 -#define USISIF 7 - -#define USIDR _SFR_MEM8(0xBA) - -/* Reserved [0xBB..0xBF] */ - -#define UCSR0A _SFR_MEM8(0xC0) -#define MPCM0 0 -#define U2X0 1 -#define UPE0 2 -#define DOR0 3 -#define FE0 4 -#define UDRE0 5 -#define TXC0 6 -#define RXC0 7 - -#define UCSR0B _SFR_MEM8(0XC1) -#define TXB80 0 -#define RXB80 1 -#define UCSZ02 2 -#define TXEN0 3 -#define RXEN0 4 -#define UDRIE0 5 -#define TXCIE0 6 -#define RXCIE0 7 - -#define UCSR0C _SFR_MEM8(0xC2) -#define UCPOL0 0 -#define UCSZ00 1 -#define UCSZ01 2 -#define USBS0 3 -#define UPM00 4 -#define UPM01 5 -#define UMSEL0 6 - -/* Reserved [0xC3] */ - -/* Combine UBRR0L and UBRR0H */ -#define UBRR0 _SFR_MEM16(0xC4) - -#define UBRR0L _SFR_MEM8(0xC4) -#define UBRR0H _SFR_MEM8(0xC5) - -#define UDR0 _SFR_MEM8(0XC6) - -/* Reserved [0xC7..0xE3] */ - -#define LCDCRA _SFR_MEM8(0XE4) -#define LCDBL 0 -#if defined(__AVR_ATmega329P__) -#define LCDCCD 1 -#define LCDBD 2 -#endif -#define LCDIE 3 -#define LCDIF 4 -#define LCDAB 6 -#define LCDEN 7 - -#define LCDCRB _SFR_MEM8(0XE5) -#define LCDPM0 0 -#define LCDPM1 1 -#define LCDPM2 2 -#define LCDMUX0 4 -#define LCDMUX1 5 -#define LCD2B 6 -#define LCDCS 7 - -#define LCDFRR _SFR_MEM8(0XE6) -#define LCDCD0 0 -#define LCDCD1 1 -#define LCDCD2 2 -#define LCDPS0 4 -#define LCDPS1 5 -#define LCDPS2 6 - -#define LCDCCR _SFR_MEM8(0XE7) -#define LCDCC0 0 -#define LCDCC1 1 -#define LCDCC2 2 -#define LCDCC3 3 -#if defined(__AVR_ATmega329P__) -#define LCDMDT 4 -#endif -#define LCDDC0 5 -#define LCDDC1 6 -#define LCDDC2 7 - -/* Reserved [0xE8..0xEB] */ - -#define LCDDR00 _SFR_MEM8(0XEC) -#define SEG000 0 -#define SEG001 1 -#define SEG002 2 -#define SEG003 3 -#define SEG004 4 -#define SEG005 5 -#define SEG006 6 -#define SEG007 7 - -#define LCDDR01 _SFR_MEM8(0XED) -#define SEG008 0 -#define SEG009 1 -#define SEG010 2 -#define SEG011 3 -#define SEG012 4 -#define SEG013 5 -#define SEG014 6 -#define SEG015 7 - -#define LCDDR02 _SFR_MEM8(0XEE) -#define SEG016 0 -#define SEG017 1 -#define SEG018 2 -#define SEG019 3 -#define SEG020 4 -#define SEG021 5 -#define SEG022 6 -#define SEG023 7 - -#define LCDDR03 _SFR_MEM8(0XEF) -#define SEG024 0 - -/* Reserved [0xF0] */ - -#define LCDDR05 _SFR_MEM8(0XF1) -#define SEG100 0 -#define SEG101 1 -#define SEG102 2 -#define SEG103 3 -#define SEG104 4 -#define SEG105 5 -#define SEG106 6 -#define SEG107 7 - -#define LCDDR06 _SFR_MEM8(0XF2) -#define SEG108 0 -#define SEG109 1 -#define SEG110 2 -#define SEG111 3 -#define SEG112 4 -#define SEG113 5 -#define SEG114 6 -#define SEG115 7 - -#define LCDDR07 _SFR_MEM8(0XF3) -#define SEG116 0 -#define SEG117 1 -#define SEG118 2 -#define SEG119 3 -#define SEG120 4 -#define SEG121 5 -#define SEG122 6 -#define SEG123 7 - -#define LCDDR08 _SFR_MEM8(0XF4) -#define SEG124 0 - -/* Reserved [0xF5] */ - -#define LCDDR10 _SFR_MEM8(0XF6) -#define SEG200 0 -#define SEG201 1 -#define SEG202 2 -#define SEG203 3 -#define SEG204 4 -#define SEG205 5 -#define SEG206 6 -#define SEG207 7 - -#define LCDDR11 _SFR_MEM8(0XF7) -#define SEG208 0 -#define SEG209 1 -#define SEG210 2 -#define SEG211 3 -#define SEG212 4 -#define SEG213 5 -#define SEG214 6 -#define SEG215 7 - -#define LCDDR12 _SFR_MEM8(0XF8) -#define SEG216 0 -#define SEG217 1 -#define SEG218 2 -#define SEG219 3 -#define SEG220 4 -#define SEG221 5 -#define SEG222 6 -#define SEG223 7 - -#define LCDDR13 _SFR_MEM8(0XF9) -#define SEG224 0 - -/* Reserved [0xFA] */ - -#define LCDDR15 _SFR_MEM8(0XFB) -#define SEG300 0 -#define SEG301 1 -#define SEG302 2 -#define SEG303 3 -#define SEG304 4 -#define SEG305 5 -#define SEG306 6 -#define SEG307 7 - -#define LCDDR16 _SFR_MEM8(0XFC) -#define SEG308 0 -#define SEG309 1 -#define SEG310 2 -#define SEG311 3 -#define SEG312 4 -#define SEG313 5 -#define SEG314 6 -#define SEG315 7 - -#define LCDDR17 _SFR_MEM8(0XFD) -#define SEG316 0 -#define SEG217 1 -#define SEG318 2 -#define SEG319 3 -#define SEG320 4 -#define SEG321 5 -#define SEG322 6 -#define SEG323 7 - -#define LCDDR18 _SFR_MEM8(0XFE) -#define SEG324 0 - -/* Reserved [0xFF] */ - -/* Interrupt vectors */ -/* Vector 0 is the reset vector */ -/* External Interrupt Request 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* Pin Change Interrupt Request 0 */ -#define PCINT0_vect _VECTOR(2) -#define SIG_PIN_CHANGE0 _VECTOR(2) - -/* Pin Change Interrupt Request 1 */ -#define PCINT1_vect _VECTOR(3) -#define SIG_PIN_CHANGE1 _VECTOR(3) - -/* Timer/Counter2 Compare Match */ -#define TIMER2_COMP_vect _VECTOR(4) -#define SIG_OUTPUT_COMPARE2 _VECTOR(4) - -/* Timer/Counter2 Overflow */ -#define TIMER2_OVF_vect _VECTOR(5) -#define SIG_OVERFLOW2 _VECTOR(5) - -/* Timer/Counter1 Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(6) -#define SIG_INPUT_CAPTURE1 _VECTOR(6) - -/* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPA_vect _VECTOR(7) -#define SIG_OUTPUT_COMPARE1A _VECTOR(7) - -/* Timer/Counter Compare Match B */ -#define TIMER1_COMPB_vect _VECTOR(8) -#define SIG_OUTPUT_COMPARE1B _VECTOR(8) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(9) -#define SIG_OVERFLOW1 _VECTOR(9) - -/* Timer/Counter0 Compare Match */ -#define TIMER0_COMP_vect _VECTOR(10) -#define SIG_OUTPUT_COMPARE0 _VECTOR(10) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(11) -#define SIG_OVERFLOW0 _VECTOR(11) - -/* SPI Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(12) -#define SIG_SPI _VECTOR(12) - -/* USART0, Rx Complete */ -#define USART0_RX_vect _VECTOR(13) -#define SIG_UART_RECV _VECTOR(13) - -/* USART0 Data register Empty */ -#define USART0_UDRE_vect _VECTOR(14) -#define SIG_UART_DATA _VECTOR(14) - -/* USART0, Tx Complete */ -#define USART0_TX_vect _VECTOR(15) -#define SIG_UART_TRANS _VECTOR(15) - -/* USI Start Condition */ -#define USI_START_vect _VECTOR(16) -#define SIG_USI_START _VECTOR(16) - -/* USI Overflow */ -#define USI_OVERFLOW_vect _VECTOR(17) -#define SIG_USI_OVERFLOW _VECTOR(17) - -/* Analog Comparator */ -#define ANALOG_COMP_vect _VECTOR(18) -#define SIG_COMPARATOR _VECTOR(18) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(19) -#define SIG_ADC _VECTOR(19) - -/* EEPROM Ready */ -#define EE_READY_vect _VECTOR(20) -#define SIG_EEPROM_READY _VECTOR(20) - -/* Store Program Memory Read */ -#define SPM_READY_vect _VECTOR(21) -#define SIG_SPM_READY _VECTOR(21) - -/* LCD Start of Frame */ -#define LCD_vect _VECTOR(22) -#define SIG_LCD _VECTOR(22) - -#define _VECTORS_SIZE 92 - - -/* Constants */ -#define SPM_PAGESIZE 128 -#define RAMEND 0x8FF -#define XRAMEND 0x8FF -#define E2END 0x3FF -#define E2PAGESIZE 4 -#define FLASHEND 0x7FFF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_JTAGEN (unsigned char)~_BV(6) -#define FUSE_OCDEN (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_SPIEN & FUSE_JTAGEN) - -/* Extended Fuse Byte */ -#define FUSE_RSTDISBL (unsigned char)~_BV(0) -#define FUSE_BODLEVEL0 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(2) -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x95 -#define SIGNATURE_2 0x03 - - -#endif /* _AVR_IOM329_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom3290.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom3290.h deleted file mode 100644 index 50ec7932e..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom3290.h +++ /dev/null @@ -1,1155 +0,0 @@ -/* Copyright (c) 2004 Eric B. Weddington - Copyright (c) 2005, 2006, 2007 Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* avr/iom3290.h - definitions for ATmega3290 and ATmega3290P. */ - -#ifndef _AVR_IOM3290_H_ -#define _AVR_IOM3290_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iom3290.h" -#else -# error "Attempt to include more than one file." -#endif - -/* Registers and associated bit numbers */ - -#define PINA _SFR_IO8(0x00) -#define PINA7 7 -#define PINA6 6 -#define PINA5 5 -#define PINA4 4 -#define PINA3 3 -#define PINA2 2 -#define PINA1 1 -#define PINA0 0 - -#define DDRA _SFR_IO8(0x01) -#define DDA7 7 -#define DDA6 6 -#define DDA5 5 -#define DDA4 4 -#define DDA3 3 -#define DDA2 2 -#define DDA1 1 -#define DDA0 0 - -#define PORTA _SFR_IO8(0x02) -#define PA7 7 -#define PA6 6 -#define PA5 5 -#define PA4 4 -#define PA3 3 -#define PA2 2 -#define PA1 1 -#define PA0 0 - -#define PINB _SFR_IO8(0x03) -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -#define DDRB _SFR_IO8(0x04) -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -#define PORTB _SFR_IO8(0x05) -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -#define PINC _SFR_IO8(0x06) -#define PINC7 7 -#define PINC6 6 -#define PINC5 5 -#define PINC4 4 -#define PINC3 3 -#define PINC2 2 -#define PINC1 1 -#define PINC0 0 - -#define DDRC _SFR_IO8(0x07) -#define DDC7 7 -#define DDC6 6 -#define DDC5 5 -#define DDC4 4 -#define DDC3 3 -#define DDC2 2 -#define DDC1 1 -#define DDC0 0 - -#define PORTC _SFR_IO8(0x08) -#define PC7 7 -#define PC6 6 -#define PC5 5 -#define PC4 4 -#define PC3 3 -#define PC2 2 -#define PC1 1 -#define PC0 0 - -#define PIND _SFR_IO8(0x09) -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -#define DDRD _SFR_IO8(0x0A) -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -#define PORTD _SFR_IO8(0x0B) -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -#define PINE _SFR_IO8(0x0C) -#define PINE7 7 -#define PINE6 6 -#define PINE5 5 -#define PINE4 4 -#define PINE3 3 -#define PINE2 2 -#define PINE1 1 -#define PINE0 0 - -#define DDRE _SFR_IO8(0x0D) -#define DDE7 7 -#define DDE6 6 -#define DDE5 5 -#define DDE4 4 -#define DDE3 3 -#define DDE2 2 -#define DDE1 1 -#define DDE0 0 - -#define PORTE _SFR_IO8(0x0E) -#define PE7 7 -#define PE6 6 -#define PE5 5 -#define PE4 4 -#define PE3 3 -#define PE2 2 -#define PE1 1 -#define PE0 0 - -#define PINF _SFR_IO8(0x0F) -#define PINF7 7 -#define PINF6 6 -#define PINF5 5 -#define PINF4 4 -#define PINF3 3 -#define PINF2 2 -#define PINF1 1 -#define PINF0 0 - -#define DDRF _SFR_IO8(0x10) -#define DDF7 7 -#define DDF6 6 -#define DDF5 5 -#define DDF4 4 -#define DDF3 3 -#define DDF2 2 -#define DDF1 1 -#define DDF0 0 - -#define PORTF _SFR_IO8(0x11) -#define PF7 7 -#define PF6 6 -#define PF5 5 -#define PF4 4 -#define PF3 3 -#define PF2 2 -#define PF1 1 -#define PF0 0 - -#define PING _SFR_IO8(0x12) -#define PING5 5 -#define PING4 4 -#define PING3 3 -#define PING2 2 -#define PING1 1 -#define PING0 0 - -#define DDRG _SFR_IO8(0x13) -#define DDG4 4 -#define DDG3 3 -#define DDG2 2 -#define DDG1 1 -#define DDG0 0 - -#define PORTG _SFR_IO8(0x14) -#define PG4 4 -#define PG3 3 -#define PG2 2 -#define PG1 1 -#define PG0 0 - -#define TIFR0 _SFR_IO8(0x15) -#define TOV0 0 -#define OCF0A 1 - -#define TIFR1 _SFR_IO8(0x16) -#define TOV1 0 -#define OCF1A 1 -#define OCF1B 2 -#define ICF1 5 - -#define TIFR2 _SFR_IO8(0x17) -#define TOV2 0 -#define OCF2A 1 - -/* Reserved [0x18..0x1B] */ - -#define EIFR _SFR_IO8(0x1C) -#define INTF0 0 -#define PCIF0 4 -#define PCIF1 5 -#define PCIF2 6 -#define PCIF3 7 - -#define EIMSK _SFR_IO8(0x1D) -#define INT0 0 -#define PCIE0 4 -#define PCIE1 5 -#define PCIE2 6 -#define PCIE3 7 - -#define GPIOR0 _SFR_IO8(0x1E) - -#define EECR _SFR_IO8(0x1F) -#define EERIE 3 -#define EEMWE 2 -#define EEWE 1 -#define EERE 0 - -#define EEDR _SFR_IO8(0X20) - -/* Combine EEARL and EEARH */ -#define EEAR _SFR_IO16(0x21) -#define EEARL _SFR_IO8(0x21) -#define EEARH _SFR_IO8(0X22) - -/* 6-char sequence denoting where to find the EEPROM registers in memory space. - Adresses denoted in hex syntax with uppercase letters. Used by the EEPROM - subroutines. - First two letters: EECR address. - Second two letters: EEDR address. - Last two letters: EEAR address. */ -#define __EEPROM_REG_LOCATIONS__ 1F2021 - -#define GTCCR _SFR_IO8(0x23) -#define PSR10 0 -#define PSR2 1 -#define TSM 7 - -#define TCCR0A _SFR_IO8(0x24) -#define CS00 0 -#define CS01 1 -#define CS02 2 -#define WGM01 3 -#define COM0A0 4 -#define COM0A1 5 -#define WGM00 6 -#define FOC0A 7 - -/* Reserved [0x25] */ - -#define TCNT0 _SFR_IO8(0X26) - -#define OCR0A _SFR_IO8(0X27) - -/* Reserved [0x28..0x29] */ - -#define GPIOR1 _SFR_IO8(0x2A) - -#define GPIOR2 _SFR_IO8(0x2B) - -#define SPCR _SFR_IO8(0x2C) -#define SPR0 0 -#define SPR1 1 -#define CPHA 2 -#define CPOL 3 -#define MSTR 4 -#define DORD 5 -#define SPE 6 -#define SPIE 7 - -#define SPSR _SFR_IO8(0x2D) -#define SPI2X 0 -#define WCOL 6 -#define SPIF 7 - -#define SPDR _SFR_IO8(0X2E) - -/* Reserved [0x2F] */ - -#define ACSR _SFR_IO8(0x30) -#define ACIS0 0 -#define ACIS1 1 -#define ACIC 2 -#define ACIE 3 -#define ACI 4 -#define ACO 5 -#define ACBG 6 -#define ACD 7 - -#define OCDR _SFR_IO8(0x31) -#define OCDR0 0 -#define OCDR1 1 -#define OCDR2 2 -#define OCDR3 3 -#define OCDR4 4 -#define OCDR5 5 -#define OCDR6 6 -#define OCDR7 7 -#define IDRD 7 - -/* Reserved [0x32] */ - -#define SMCR _SFR_IO8(0x33) -#define SE 0 -#define SM0 1 -#define SM1 2 -#define SM2 3 - -#define MCUSR _SFR_IO8(0x34) -#define PORF 0 -#define EXTRF 1 -#define BORF 2 -#define WDRF 3 -#define JTRF 4 - -#define MCUCR _SFR_IO8(0X35) -#define IVCE 0 -#define IVSEL 1 -#define PUD 4 -#if defined(__AVR_ATmega3290P__) -#define BODSE 5 -#define BODS 6 -#endif -#define JTD 7 - -/* Reserved [0x36] */ - -#define SPMCSR _SFR_IO8(0x37) -#define SPMEN 0 -#define PGERS 1 -#define PGWRT 2 -#define BLBSET 3 -#define RWWSRE 4 -#define RWWSB 6 -#define SPMIE 7 - -/* Reserved [0x38..0x3C] */ - -/* SP [0x3D..0x3E] */ -/* SREG [0x3F] */ - -#define WDTCR _SFR_MEM8(0x60) -#define WDP0 0 -#define WDP1 1 -#define WDP2 2 -#define WDE 3 -#define WDCE 4 - -#define CLKPR _SFR_MEM8(0x61) -#define CLKPS0 0 -#define CLKPS1 1 -#define CLKPS2 2 -#define CLKPS3 3 -#define CLKPCE 7 - -/* Reserved [0x62..0x63] */ - -#define PRR _SFR_MEM8(0x64) -#define PRADC 0 -#define PRUSART0 1 -#define PRSPI 2 -#define PRTIM1 3 -#define PRLCD 4 - -/* Reserved [0x65] */ - -#define OSCCAL _SFR_MEM8(0x66) - -/* Reserved [0x67..0x68] */ - -#define EICRA _SFR_MEM8(0x69) -#define ISC00 0 -#define ISC01 1 - -/* Reserved [0x6A] */ - -#define PCMSK0 _SFR_MEM8(0x6B) -#define PCINT0 0 -#define PCINT1 1 -#define PCINT2 2 -#define PCINT3 3 -#define PCINT4 4 -#define PCINT5 5 -#define PCINT6 6 -#define PCINT7 7 - -#define PCMSK1 _SFR_MEM8(0x6C) -#define PCINT8 0 -#define PCINT9 1 -#define PCINT10 2 -#define PCINT11 3 -#define PCINT12 4 -#define PCINT13 5 -#define PCINT14 6 -#define PCINT15 7 - -#define PCMSK2 _SFR_MEM8(0x6D) -#define PCINT16 0 -#define PCINT17 1 -#define PCINT18 2 -#define PCINT19 3 -#define PCINT20 4 -#define PCINT21 5 -#define PCINT22 6 -#define PCINT23 7 - -#define TIMSK0 _SFR_MEM8(0x6E) -#define TOIE0 0 -#define OCIE0A 1 - -#define TIMSK1 _SFR_MEM8(0x6F) -#define TOIE1 0 -#define OCIE1A 1 -#define OCIE1B 2 -#define ICIE1 5 - -#define TIMSK2 _SFR_MEM8(0x70) -#define TOIE2 0 -#define OCIE2A 1 - -/* Reserved [0x71..0x72] */ - -#define PCMSK3 _SFR_MEM8(0x73) -#define PCINT24 0 -#define PCINT25 1 -#define PCINT26 2 -#define PCINT27 3 -#define PCINT28 4 -#define PCINT29 5 -#define PCINT30 6 - -/* Reserved [0x74..0x77] */ - -/* Combine ADCL and ADCH */ -#ifndef __ASSEMBLER__ -#define ADC _SFR_MEM16(0x78) -#endif -#define ADCW _SFR_MEM16(0x78) -#define ADCL _SFR_MEM8(0x78) -#define ADCH _SFR_MEM8(0x79) - -#define ADCSRA _SFR_MEM8(0x7A) -#define ADPS0 0 -#define ADPS1 1 -#define ADPS2 2 -#define ADIE 3 -#define ADIF 4 -#define ADATE 5 -#define ADSC 6 -#define ADEN 7 - -#define ADCSRB _SFR_MEM8(0x7B) -#define ADTS0 0 -#define ADTS1 1 -#define ADTS2 2 -#define ACME 6 - -#define ADMUX _SFR_MEM8(0x7C) -#define MUX0 0 -#define MUX1 1 -#define MUX2 2 -#define MUX3 3 -#define MUX4 4 -#define ADLAR 5 -#define REFS0 6 -#define REFS1 7 - -/* Reserved [0x7D] */ - -#define DIDR0 _SFR_MEM8(0x7E) -#define ADC0D 0 -#define ADC1D 1 -#define ADC2D 2 -#define ADC3D 3 -#define ADC4D 4 -#define ADC5D 5 -#define ADC6D 6 -#define ADC7D 7 - -#define DIDR1 _SFR_MEM8(0x7F) -#define AIN0D 0 -#define AIN1D 1 - -#define TCCR1A _SFR_MEM8(0X80) -#define WGM10 0 -#define WGM11 1 -#define COM1B0 4 -#define COM1B1 5 -#define COM1A0 6 -#define COM1A1 7 - -#define TCCR1B _SFR_MEM8(0X81) -#define CS10 0 -#define CS11 1 -#define CS12 2 -#define WGM12 3 -#define WGM13 4 -#define ICES1 6 -#define ICNC1 7 - -#define TCCR1C _SFR_MEM8(0x82) -#define FOC1B 6 -#define FOC1A 7 - -/* Reserved [0x83] */ - -/* Combine TCNT1L and TCNT1H */ -#define TCNT1 _SFR_MEM16(0x84) - -#define TCNT1L _SFR_MEM8(0x84) -#define TCNT1H _SFR_MEM8(0x85) - -/* Combine ICR1L and ICR1H */ -#define ICR1 _SFR_MEM16(0x86) - -#define ICR1L _SFR_MEM8(0x86) -#define ICR1H _SFR_MEM8(0x87) - -/* Combine OCR1AL and OCR1AH */ -#define OCR1A _SFR_MEM16(0x88) - -#define OCR1AL _SFR_MEM8(0x88) -#define OCR1AH _SFR_MEM8(0x89) - -/* Combine OCR1BL and OCR1BH */ -#define OCR1B _SFR_MEM16(0x8A) - -#define OCR1BL _SFR_MEM8(0x8A) -#define OCR1BH _SFR_MEM8(0x8B) - -/* Reserved [0x8C..0xAF] */ - -#define TCCR2A _SFR_MEM8(0xB0) -#define CS20 0 -#define CS21 1 -#define CS22 2 -#define WGM21 3 -#define COM2A0 4 -#define COM2A1 5 -#define WGM20 6 -#define FOC2A 7 - -/* Reserved [0xB1] */ - -#define TCNT2 _SFR_MEM8(0xB2) - -#define OCR2A _SFR_MEM8(0xB3) - -/* Reserved [0xB4..0xB5] */ - -#define ASSR _SFR_MEM8(0xB6) -#define TCR2UB 0 -#define OCR2UB 1 -#define TCN2UB 2 -#define AS2 3 -#define EXCLK 4 - -/* Reserved [0xB7] */ - -#define USICR _SFR_MEM8(0xB8) -#define USITC 0 -#define USICLK 1 -#define USICS0 2 -#define USICS1 3 -#define USIWM0 4 -#define USIWM1 5 -#define USIOIE 6 -#define USISIE 7 - -#define USISR _SFR_MEM8(0xB9) -#define USICNT0 0 -#define USICNT1 1 -#define USICNT2 2 -#define USICNT3 3 -#define USIDC 4 -#define USIPF 5 -#define USIOIF 6 -#define USISIF 7 - -#define USIDR _SFR_MEM8(0xBA) - -/* Reserved [0xBB..0xBF] */ - -#define UCSR0A _SFR_MEM8(0xC0) -#define MPCM0 0 -#define U2X0 1 -#define UPE0 2 -#define DOR0 3 -#define FE0 4 -#define UDRE0 5 -#define TXC0 6 -#define RXC0 7 - -#define UCSR0B _SFR_MEM8(0XC1) -#define TXB80 0 -#define RXB80 1 -#define UCSZ02 2 -#define TXEN0 3 -#define RXEN0 4 -#define UDRIE0 5 -#define TXCIE0 6 -#define RXCIE0 7 - -#define UCSR0C _SFR_MEM8(0xC2) -#define UCPOL0 0 -#define UCSZ00 1 -#define UCSZ01 2 -#define USBS0 3 -#define UPM00 4 -#define UPM01 5 -#define UMSEL0 6 - -/* Reserved [0xC3] */ - -/* Combine UBRR0L and UBRR0H */ -#define UBRR0 _SFR_MEM16(0xC4) - -#define UBRR0L _SFR_MEM8(0xC4) -#define UBRR0H _SFR_MEM8(0xC5) - -#define UDR0 _SFR_MEM8(0XC6) - -/* Reserved [0xC7..0xD7] */ - -#define PINH _SFR_MEM8(0xD8) -#define PINH7 7 -#define PINH6 6 -#define PINH5 5 -#define PINH4 4 -#define PINH3 3 -#define PINH2 2 -#define PINH1 1 -#define PINH0 0 - -#define DDRH _SFR_MEM8(0xD9) -#define DDH7 7 -#define DDH6 6 -#define DDH5 5 -#define DDH4 4 -#define DDH3 3 -#define DDH2 2 -#define DDH1 1 -#define DDH0 0 - -#define PORTH _SFR_MEM8(0xDA) -#define PH7 7 -#define PH6 6 -#define PH5 5 -#define PH4 4 -#define PH3 3 -#define PH2 2 -#define PH1 1 -#define PH0 0 - -#define PINJ _SFR_MEM8(0xDB) -#define PINJ6 6 -#define PINJ5 5 -#define PINJ4 4 -#define PINJ3 3 -#define PINJ2 2 -#define PINJ1 1 -#define PINJ0 0 - -#define DDRJ _SFR_MEM8(0xDC) -#define DDJ6 6 -#define DDJ5 5 -#define DDJ4 4 -#define DDJ3 3 -#define DDJ2 2 -#define DDJ1 1 -#define DDJ0 0 - -#define PORTJ _SFR_MEM8(0xDD) -#define PJ6 6 -#define PJ5 5 -#define PJ4 4 -#define PJ3 3 -#define PJ2 2 -#define PJ1 1 -#define PJ0 0 - -/* Reserved [0xDE..0xE3] */ - -#define LCDCRA _SFR_MEM8(0XE4) -#define LCDBL 0 -#if defined(__AVR_ATmega3290P__) -#define LCDCCD 1 -#define LCDBD 2 -#endif -#define LCDIE 3 -#define LCDIF 4 -#define LCDAB 6 -#define LCDEN 7 - -#define LCDCRB _SFR_MEM8(0XE5) -#define LCDPM0 0 -#define LCDPM1 1 -#define LCDPM2 2 -#define LCDPM3 3 -#define LCDMUX0 4 -#define LCDMUX1 5 -#define LCD2B 6 -#define LCDCS 7 - -#define LCDFRR _SFR_MEM8(0XE6) -#define LCDCD0 0 -#define LCDCD1 1 -#define LCDCD2 2 -#define LCDPS0 4 -#define LCDPS1 5 -#define LCDPS2 6 - -#define LCDCCR _SFR_MEM8(0XE7) -#define LCDCC0 0 -#define LCDCC1 1 -#define LCDCC2 2 -#define LCDCC3 3 -#if defined(__AVR_ATmega3290P__) -#define LCDMDT 4 -#endif -#define LCDDC0 5 -#define LCDDC1 6 -#define LCDDC2 7 - -/* Reserved [0xE8..0xEB] */ - -#define LCDDR00 _SFR_MEM8(0XEC) -#define SEG000 0 -#define SEG001 1 -#define SEG002 2 -#define SEG003 3 -#define SEG004 4 -#define SEG005 5 -#define SEG006 6 -#define SEG007 7 - -#define LCDDR01 _SFR_MEM8(0XED) -#define SEG008 0 -#define SEG009 1 -#define SEG010 2 -#define SEG011 3 -#define SEG012 4 -#define SEG013 5 -#define SEG014 6 -#define SEG015 7 - -#define LCDDR02 _SFR_MEM8(0XEE) -#define SEG016 0 -#define SEG017 1 -#define SEG018 2 -#define SEG019 3 -#define SEG020 4 -#define SEG021 5 -#define SEG022 6 -#define SEG023 7 - -#define LCDDR03 _SFR_MEM8(0XEF) -#define SEG024 0 -#define SEG025 1 -#define SEG026 2 -#define SEG027 3 -#define SEG028 4 -#define SEG029 5 -#define SEG030 6 -#define SEG031 7 - -#define LCDDR04 _SFR_MEM8(0XF0) -#define SEG032 0 -#define SEG033 1 -#define SEG034 2 -#define SEG035 3 -#define SEG036 4 -#define SEG037 5 -#define SEG038 6 -#define SEG039 7 - -#define LCDDR05 _SFR_MEM8(0XF1) -#define SEG100 0 -#define SEG101 1 -#define SEG102 2 -#define SEG103 3 -#define SEG104 4 -#define SEG105 5 -#define SEG106 6 -#define SEG107 7 - -#define LCDDR06 _SFR_MEM8(0XF2) -#define SEG108 0 -#define SEG109 1 -#define SEG110 2 -#define SEG111 3 -#define SEG112 4 -#define SEG113 5 -#define SEG114 6 -#define SEG115 7 - -#define LCDDR07 _SFR_MEM8(0XF3) -#define SEG116 0 -#define SEG117 1 -#define SEG118 2 -#define SEG119 3 -#define SEG120 4 -#define SEG121 5 -#define SEG122 6 -#define SEG123 7 - -#define LCDDR08 _SFR_MEM8(0XF4) -#define SEG124 0 -#define SEG125 1 -#define SEG126 2 -#define SEG127 3 -#define SEG128 4 -#define SEG129 5 -#define SEG130 6 -#define SEG131 7 - -#define LCDDR09 _SFR_MEM8(0XF5) -#define SEG132 0 -#define SEG133 1 -#define SEG134 2 -#define SEG135 3 -#define SEG136 4 -#define SEG137 5 -#define SEG138 6 -#define SEG139 7 - -#define LCDDR10 _SFR_MEM8(0XF6) -#define SEG200 0 -#define SEG201 1 -#define SEG202 2 -#define SEG203 3 -#define SEG204 4 -#define SEG205 5 -#define SEG206 6 -#define SEG207 7 - -#define LCDDR11 _SFR_MEM8(0XF7) -#define SEG208 0 -#define SEG209 1 -#define SEG210 2 -#define SEG211 3 -#define SEG212 4 -#define SEG213 5 -#define SEG214 6 -#define SEG215 7 - -#define LCDDR12 _SFR_MEM8(0XF8) -#define SEG216 0 -#define SEG217 1 -#define SEG218 2 -#define SEG219 3 -#define SEG220 4 -#define SEG221 5 -#define SEG222 6 -#define SEG223 7 - -#define LCDDR13 _SFR_MEM8(0XF9) -#define SEG224 0 -#define SEG225 1 -#define SEG226 2 -#define SEG227 3 -#define SEG228 4 -#define SEG229 5 -#define SEG230 6 -#define SEG231 7 - -#define LCDDR14 _SFR_MEM8(0XFA) -#define SEG232 0 -#define SEG233 1 -#define SEG234 2 -#define SEG235 3 -#define SEG236 4 -#define SEG237 5 -#define SEG238 6 -#define SEG239 7 - -#define LCDDR15 _SFR_MEM8(0XFB) -#define SEG300 0 -#define SEG301 1 -#define SEG302 2 -#define SEG303 3 -#define SEG304 4 -#define SEG305 5 -#define SEG306 6 -#define SEG307 7 - -#define LCDDR16 _SFR_MEM8(0XFC) -#define SEG308 0 -#define SEG309 1 -#define SEG310 2 -#define SEG311 3 -#define SEG312 4 -#define SEG313 5 -#define SEG314 6 -#define SEG315 7 - -#define LCDDR17 _SFR_MEM8(0XFD) -#define SEG316 0 -#define SEG217 1 -#define SEG318 2 -#define SEG319 3 -#define SEG320 4 -#define SEG321 5 -#define SEG322 6 -#define SEG323 7 - -#define LCDDR18 _SFR_MEM8(0XFE) -#define SEG324 0 -#define SEG325 1 -#define SEG326 2 -#define SEG327 3 -#define SEG328 4 -#define SEG329 5 -#define SEG330 6 -#define SEG331 7 - -#define LCDDR19 _SFR_MEM8(0XFF) -#define SEG332 0 -#define SEG333 1 -#define SEG334 2 -#define SEG335 3 -#define SEG336 4 -#define SEG337 5 -#define SEG338 6 -#define SEG339 7 - - -/* Interrupt vectors */ -/* Vector 0 is the reset vector */ -/* External Interrupt Request 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* Pin Change Interrupt Request 0 */ -#define PCINT0_vect _VECTOR(2) -#define SIG_PIN_CHANGE0 _VECTOR(2) - -/* Pin Change Interrupt Request 1 */ -#define PCINT1_vect _VECTOR(3) -#define SIG_PIN_CHANGE1 _VECTOR(3) - -/* Timer/Counter2 Compare Match */ -#define TIMER2_COMP_vect _VECTOR(4) -#define SIG_OUTPUT_COMPARE2 _VECTOR(4) - -/* Timer/Counter2 Overflow */ -#define TIMER2_OVF_vect _VECTOR(5) -#define SIG_OVERFLOW2 _VECTOR(5) - -/* Timer/Counter1 Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(6) -#define SIG_INPUT_CAPTURE1 _VECTOR(6) - -/* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPA_vect _VECTOR(7) -#define SIG_OUTPUT_COMPARE1A _VECTOR(7) - -/* Timer/Counter Compare Match B */ -#define TIMER1_COMPB_vect _VECTOR(8) -#define SIG_OUTPUT_COMPARE1B _VECTOR(8) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(9) -#define SIG_OVERFLOW1 _VECTOR(9) - -/* Timer/Counter0 Compare Match */ -#define TIMER0_COMP_vect _VECTOR(10) -#define SIG_OUTPUT_COMPARE0 _VECTOR(10) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(11) -#define SIG_OVERFLOW0 _VECTOR(11) - -/* SPI Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(12) -#define SIG_SPI _VECTOR(12) - -/* USART, Rx Complete */ -#define USART_RX_vect _VECTOR(13) -#define SIG_UART_RECV _VECTOR(13) - -/* USART Data register Empty */ -#define USART_UDRE_vect _VECTOR(14) -#define SIG_UART_DATA _VECTOR(14) - -/* USART0, Tx Complete */ -#define USART0_TX_vect _VECTOR(15) -#define SIG_UART_TRANS _VECTOR(15) - -/* USI Start Condition */ -#define USI_START_vect _VECTOR(16) -#define SIG_USI_START _VECTOR(16) - -/* USI Overflow */ -#define USI_OVERFLOW_vect _VECTOR(17) -#define SIG_USI_OVERFLOW _VECTOR(17) - -/* Analog Comparator */ -#define ANALOG_COMP_vect _VECTOR(18) -#define SIG_COMPARATOR _VECTOR(18) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(19) -#define SIG_ADC _VECTOR(19) - -/* EEPROM Ready */ -#define EE_READY_vect _VECTOR(20) -#define SIG_EEPROM_READY _VECTOR(20) - -/* Store Program Memory Read */ -#define SPM_READY_vect _VECTOR(21) -#define SIG_SPM_READY _VECTOR(21) - -/* LCD Start of Frame */ -#define LCD_vect _VECTOR(22) -#define SIG_LCD _VECTOR(22) - -/* Pin Change Interrupt Request 2 */ -#define PCINT2_vect _VECTOR(23) -#define SIG_PIN_CHANGE2 _VECTOR(23) - -/* Pin Change Interrupt Request 3 */ -#define PCINT3_vect _VECTOR(24) -#define SIG_PIN_CHANGE3 _VECTOR(24) - -#define _VECTORS_SIZE 100 - - -/* Constants */ -#define SPM_PAGESIZE 128 -#define RAMEND 0x8FF -#define XRAMEND 0x8FF -#define E2END 0x3FF -#define E2PAGESIZE 4 -#define FLASHEND 0x7FFF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_JTAGEN (unsigned char)~_BV(6) -#define FUSE_OCDEN (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_SPIEN & FUSE_JTAGEN) - -/* Extended Fuse Byte */ -#define FUSE_RSTDISBL (unsigned char)~_BV(0) -#define FUSE_BODLEVEL0 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(2) -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x95 -#define SIGNATURE_2 0x04 - - -#endif /* _AVR_IOM3290_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom32c1.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom32c1.h deleted file mode 100644 index 68b29acec..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom32c1.h +++ /dev/null @@ -1,1146 +0,0 @@ -/* Copyright (c) 2008 Atmel Corporation - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. -*/ - -/* $Id: iom32c1.h,v 1.1.2.7 2008/10/17 23:27:49 arcanum Exp $ */ - -/* avr/iom32c1.h - definitions for ATmega32C1. */ - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iom32c1.h" -#else -# error "Attempt to include more than one file." -#endif - - -#ifndef _AVR_IOM32C1_H_ -#define _AVR_IOM32C1_H_ 1 - -/* Registers and associated bit numbers */ - -#define PINB _SFR_IO8(0x03) -#define PINB0 0 -#define PINB1 1 -#define PINB2 2 -#define PINB3 3 -#define PINB4 4 -#define PINB5 5 -#define PINB6 6 -#define PINB7 7 - -#define DDRB _SFR_IO8(0x04) -#define DDB0 0 -#define DDB1 1 -#define DDB2 2 -#define DDB3 3 -#define DDB4 4 -#define DDB5 5 -#define DDB6 6 -#define DDB7 7 - -#define PORTB _SFR_IO8(0x05) -#define PORTB0 0 -#define PORTB1 1 -#define PORTB2 2 -#define PORTB3 3 -#define PORTB4 4 -#define PORTB5 5 -#define PORTB6 6 -#define PORTB7 7 - -#define PINC _SFR_IO8(0x06) -#define PINC0 0 -#define PINC1 1 -#define PINC2 2 -#define PINC3 3 -#define PINC4 4 -#define PINC5 5 -#define PINC6 6 -#define PINC7 7 - -#define DDRC _SFR_IO8(0x07) -#define DDC0 0 -#define DDC1 1 -#define DDC2 2 -#define DDC3 3 -#define DDC4 4 -#define DDC5 5 -#define DDC6 6 -#define DDC7 7 - -#define PORTC _SFR_IO8(0x08) -#define PORTC0 0 -#define PORTC1 1 -#define PORTC2 2 -#define PORTC3 3 -#define PORTC4 4 -#define PORTC5 5 -#define PORTC6 6 -#define PORTC7 7 - -#define PIND _SFR_IO8(0x09) -#define PIND0 0 -#define PIND1 1 -#define PIND2 2 -#define PIND3 3 -#define PIND4 4 -#define PIND5 5 -#define PIND6 6 -#define PIND7 7 - -#define DDRD _SFR_IO8(0x0A) -#define DDD0 0 -#define DDD1 1 -#define DDD2 2 -#define DDD3 3 -#define DDD4 4 -#define DDD5 5 -#define DDD6 6 -#define DDD7 7 - -#define PORTD _SFR_IO8(0x0B) -#define PORTD0 0 -#define PORTD1 1 -#define PORTD2 2 -#define PORTD3 3 -#define PORTD4 4 -#define PORTD5 5 -#define PORTD6 6 -#define PORTD7 7 - -#define PINE _SFR_IO8(0x0C) -#define PINE0 0 -#define PINE1 1 -#define PINE2 2 - -#define DDRE _SFR_IO8(0x0D) -#define DDE0 0 -#define DDE1 1 -#define DDE2 2 - -#define PORTE _SFR_IO8(0x0E) -#define PORTE0 0 -#define PORTE1 1 -#define PORTE2 2 - -#define TIFR0 _SFR_IO8(0x15) -#define TOV0 0 -#define OCF0A 1 -#define OCF0B 2 - -#define TIFR1 _SFR_IO8(0x16) -#define TOV1 0 -#define OCF1A 1 -#define OCF1B 2 -#define ICF1 5 - -#define GPIOR1 _SFR_IO8(0x19) -#define GPIOR10 0 -#define GPIOR11 1 -#define GPIOR12 2 -#define GPIOR13 3 -#define GPIOR14 4 -#define GPIOR15 5 -#define GPIOR16 6 -#define GPIOR17 7 - -#define GPIOR2 _SFR_IO8(0x1A) -#define GPIOR20 0 -#define GPIOR21 1 -#define GPIOR22 2 -#define GPIOR23 3 -#define GPIOR24 4 -#define GPIOR25 5 -#define GPIOR26 6 -#define GPIOR27 7 - -#define PCIFR _SFR_IO8(0x1B) - -#define EIFR _SFR_IO8(0x1C) -#define INTF0 0 -#define INTF1 1 -#define INTF2 2 -#define INTF3 3 - -#define EIMSK _SFR_IO8(0x1D) -#define INT0 0 -#define INT1 1 -#define INT2 2 -#define INT3 3 - -#define GPIOR0 _SFR_IO8(0x1E) -#define GPIOR00 0 -#define GPIOR01 1 -#define GPIOR02 2 -#define GPIOR03 3 -#define GPIOR04 4 -#define GPIOR05 5 -#define GPIOR06 6 -#define GPIOR07 7 - -#define EECR _SFR_IO8(0x1F) -#define EERE 0 -#define EEPE 1 -#define EEMPE 2 -#define EERIE 3 -#define EEPM0 4 -#define EEPM1 5 - -#define EEDR _SFR_IO8(0x20) -#define EEDR0 0 -#define EEDR1 1 -#define EEDR2 2 -#define EEDR3 3 -#define EEDR4 4 -#define EEDR5 5 -#define EEDR6 6 -#define EEDR7 7 - -#define EEAR _SFR_IO16(0x21) - -#define EEARL _SFR_IO8(0x21) -#define EEAR0 0 -#define EEAR1 1 -#define EEAR2 2 -#define EEAR3 3 -#define EEAR4 4 -#define EEAR5 5 -#define EEAR6 6 -#define EEAR7 7 - -#define EEARH _SFR_IO8(0x22) -#define EEAR8 0 -#define EEAR9 1 - -#define GTCCR _SFR_IO8(0x23) -#define PSR10 0 -#define PSRSYNC 0 -#define ICPSEL1 6 -#define TSM 7 - -#define TCCR0A _SFR_IO8(0x24) -#define WGM00 0 -#define WGM01 1 -#define COM0B0 4 -#define COM0B1 5 -#define COM0A0 6 -#define COM0A1 7 - -#define TCCR0B _SFR_IO8(0x25) -#define CS00 0 -#define CS01 1 -#define CS02 2 -#define WGM02 3 -#define FOC0B 6 -#define FOC0A 7 - -#define TCNT0 _SFR_IO8(0x26) -#define TCNT0_0 0 -#define TCNT0_1 1 -#define TCNT0_2 2 -#define TCNT0_3 3 -#define TCNT0_4 4 -#define TCNT0_5 5 -#define TCNT0_6 6 -#define TCNT0_7 7 - -#define OCR0A _SFR_IO8(0x27) -#define OCR0A_0 0 -#define OCR0A_1 1 -#define OCR0A_2 2 -#define OCR0A_3 3 -#define OCR0A_4 4 -#define OCR0A_5 5 -#define OCR0A_6 6 -#define OCR0A_7 7 - -#define OCR0B _SFR_IO8(0x28) -#define OCR0B_0 0 -#define OCR0B_1 1 -#define OCR0B_2 2 -#define OCR0B_3 3 -#define OCR0B_4 4 -#define OCR0B_5 5 -#define OCR0B_6 6 -#define OCR0B_7 7 - -#define PLLCSR _SFR_IO8(0x29) -#define PLOCK 0 -#define PLLE 1 -#define PLLF 2 - -#define SPCR _SFR_IO8(0x2C) -#define SPR0 0 -#define SPR1 1 -#define CPHA 2 -#define CPOL 3 -#define MSTR 4 -#define DORD 5 -#define SPE 6 -#define SPIE 7 - -#define SPSR _SFR_IO8(0x2D) -#define SPI2X 0 -#define WCOL 6 -#define SPIF 7 - -#define SPDR _SFR_IO8(0x2E) -#define SPDR0 0 -#define SPDR1 1 -#define SPDR2 2 -#define SPDR3 3 -#define SPDR4 4 -#define SPDR5 5 -#define SPDR6 6 -#define SPDR7 7 - -#define ACSR _SFR_IO8(0x30) -#define AC0O 0 -#define AC1O 1 -#define AC2O 2 -#define AC3O 3 -#define AC0IF 4 -#define AC1IF 5 -#define AC2IF 6 -#define AC3IF 7 - -#define DWDR _SFR_IO8(0x31) - -#define SMCR _SFR_IO8(0x33) -#define SE 0 -#define SM0 1 -#define SM1 2 -#define SM2 3 - -#define MCUSR _SFR_IO8(0x34) -#define PORF 0 -#define EXTRF 1 -#define BORF 2 -#define WDRF 3 - -#define MCUCR _SFR_IO8(0x35) -#define IVCE 0 -#define IVSEL 1 -#define PUD 4 -#define SPIPS 7 - -#define SPMCSR _SFR_IO8(0x37) -#define SPMEN 0 -#define PGERS 1 -#define PGWRT 2 -#define BLBSET 3 -#define RWWSRE 4 -#define RWWSB 6 -#define SPMIE 7 - -#define WDTCSR _SFR_MEM8(0x60) -#define WDP0 0 -#define WDP1 1 -#define WDP2 2 -#define WDE 3 -#define WDCE 4 -#define WDP3 5 -#define WDIE 6 -#define WDIF 7 - -#define CLKPR _SFR_MEM8(0x61) -#define CLKPS0 0 -#define CLKPS1 1 -#define CLKPS2 2 -#define CLKPS3 3 -#define CLKPCE 7 - -#define PRR _SFR_MEM8(0x64) -#define PRADC 0 -#define PRLIN 1 -#define PRSPI 2 -#define PRTIM0 3 -#define PRTIM1 4 -#define PRPSC 5 -#define PRCAN 6 - -#define OSCCAL _SFR_MEM8(0x66) -#define CAL0 0 -#define CAL1 1 -#define CAL2 2 -#define CAL3 3 -#define CAL4 4 -#define CAL5 5 -#define CAL6 6 - -#define EICRA _SFR_MEM8(0x69) -#define ISC00 0 -#define ISC01 1 -#define ISC10 2 -#define ISC11 3 -#define ISC20 4 -#define ISC21 5 -#define ISC30 6 -#define ISC31 7 - -#define PCMSK0 _SFR_MEM8(0x6A) - -#define PCMSK1 _SFR_MEM8(0x6B) - -#define PCMSK2 _SFR_MEM8(0x6C) - -#define PCMSK3 _SFR_MEM8(0x6D) - -#define TIMSK0 _SFR_MEM8(0x6E) -#define TOIE0 0 -#define OCIE0A 1 -#define OCIE0B 2 - -#define TIMSK1 _SFR_MEM8(0x6F) -#define TOIE1 0 -#define OCIE1A 1 -#define OCIE1B 2 -#define ICIE1 5 - -#define AMP0CSR _SFR_MEM8(0x75) -#define AMP0TS0 0 -#define AMP0TS1 1 -#define AMP0TS2 2 -#define AMPCMP0 3 -#define AMP0G0 4 -#define AMP0G1 5 -#define AMP0IS 6 -#define AMP0EN 7 - -#define AMP1CSR _SFR_MEM8(0x76) -#define AMP1TS0 0 -#define AMP1TS1 1 -#define AMP1TS2 2 -#define AMPCMP1 3 -#define AMP1G0 4 -#define AMP1G1 5 -#define AMP1IS 6 -#define AMP1EN 7 - -#define AMP2CSR _SFR_MEM8(0x77) -#define AMP2TS0 0 -#define AMP2TS1 1 -#define AMP2TS2 2 -#define AMPCMP2 3 -#define AMP2G0 4 -#define AMP2G1 5 -#define AMP2IS 6 -#define AMP2EN 7 - -#ifndef __ASSEMBLER__ -#define ADC _SFR_MEM16(0x78) -#endif -#define ADCW _SFR_MEM16(0x78) - -#define ADCL _SFR_MEM8(0x78) -#define ADCL0 0 -#define ADCL1 1 -#define ADCL2 2 -#define ADCL3 3 -#define ADCL4 4 -#define ADCL5 5 -#define ADCL6 6 -#define ADCL7 7 - -#define ADCH _SFR_MEM8(0x79) -#define ADCH0 0 -#define ADCH1 1 -#define ADCH2 2 -#define ADCH3 3 -#define ADCH4 4 -#define ADCH5 5 -#define ADCH6 6 -#define ADCH7 7 - -#define ADCSRA _SFR_MEM8(0x7A) -#define ADPS0 0 -#define ADPS1 1 -#define ADPS2 2 -#define ADIE 3 -#define ADIF 4 -#define ADATE 5 -#define ADSC 6 -#define ADEN 7 - -#define ADCSRB _SFR_MEM8(0x7B) -#define ADTS0 0 -#define ADTS1 1 -#define ADTS2 2 -#define ADTS3 3 -#define AREFEN 5 -#define ISRCEN 6 -#define ADHSM 7 - -#define ADMUX _SFR_MEM8(0x7C) -#define MUX0 0 -#define MUX1 1 -#define MUX2 2 -#define MUX3 3 -#define ADLAR 5 -#define REFS0 6 -#define REFS1 7 - -#define DIDR0 _SFR_MEM8(0x7E) -#define ADC0D 0 -#define ADC1D 1 -#define ADC2D 2 -#define ADC3D 3 -#define ADC4D 4 -#define ADC5D 5 -#define ADC6D 6 -#define ADC7D 7 - -#define DIDR1 _SFR_MEM8(0x7F) -#define ADC8D 0 -#define ADC9D 1 -#define ADC10D 2 -#define AMP0ND 3 -#define AMP0PD 4 -#define ACMP0D 5 -#define AMP2PD 6 - -#define TCCR1A _SFR_MEM8(0x80) -#define WGM10 0 -#define WGM11 1 -#define COM1B0 4 -#define COM1B1 5 -#define COM1A0 6 -#define COM1A1 7 - -#define TCCR1B _SFR_MEM8(0x81) -#define CS10 0 -#define CS11 1 -#define CS12 2 -#define WGM12 3 -#define WGM13 4 -#define ICES1 6 -#define ICNC1 7 - -#define TCCR1C _SFR_MEM8(0x82) -#define FOC1B 6 -#define FOC1A 7 - -#define TCNT1 _SFR_MEM16(0x84) - -#define TCNT1L _SFR_MEM8(0x84) -#define TCNT1L0 0 -#define TCNT1L1 1 -#define TCNT1L2 2 -#define TCNT1L3 3 -#define TCNT1L4 4 -#define TCNT1L5 5 -#define TCNT1L6 6 -#define TCNT1L7 7 - -#define TCNT1H _SFR_MEM8(0x85) -#define TCNT1H0 0 -#define TCNT1H1 1 -#define TCNT1H2 2 -#define TCNT1H3 3 -#define TCNT1H4 4 -#define TCNT1H5 5 -#define TCNT1H6 6 -#define TCNT1H7 7 - -#define ICR1 _SFR_MEM16(0x86) - -#define ICR1L _SFR_MEM8(0x86) -#define ICR1L0 0 -#define ICR1L1 1 -#define ICR1L2 2 -#define ICR1L3 3 -#define ICR1L4 4 -#define ICR1L5 5 -#define ICR1L6 6 -#define ICR1L7 7 - -#define ICR1H _SFR_MEM8(0x87) -#define ICR1H0 0 -#define ICR1H1 1 -#define ICR1H2 2 -#define ICR1H3 3 -#define ICR1H4 4 -#define ICR1H5 5 -#define ICR1H6 6 -#define ICR1H7 7 - -#define OCR1A _SFR_MEM16(0x88) - -#define OCR1AL _SFR_MEM8(0x88) -#define OCR1AL0 0 -#define OCR1AL1 1 -#define OCR1AL2 2 -#define OCR1AL3 3 -#define OCR1AL4 4 -#define OCR1AL5 5 -#define OCR1AL6 6 -#define OCR1AL7 7 - -#define OCR1AH _SFR_MEM8(0x89) -#define OCR1AH0 0 -#define OCR1AH1 1 -#define OCR1AH2 2 -#define OCR1AH3 3 -#define OCR1AH4 4 -#define OCR1AH5 5 -#define OCR1AH6 6 -#define OCR1AH7 7 - -#define OCR1B _SFR_MEM16(0x8A) - -#define OCR1BL _SFR_MEM8(0x8A) -#define OCR1BL0 0 -#define OCR1BL1 1 -#define OCR1BL2 2 -#define OCR1BL3 3 -#define OCR1BL4 4 -#define OCR1BL5 5 -#define OCR1BL6 6 -#define OCR1BL7 7 - -#define OCR1BH _SFR_MEM8(0x8B) -#define OCR1BH0 0 -#define OCR1BH1 1 -#define OCR1BH2 2 -#define OCR1BH3 3 -#define OCR1BH4 4 -#define OCR1BH5 5 -#define OCR1BH6 6 -#define OCR1BH7 7 - -#define DACON _SFR_MEM8(0x90) -#define DAEN 0 -#define DAOE 1 -#define DALA 2 -#define DATS0 4 -#define DATS1 5 -#define DATS2 6 -#define DAATE 7 - -#define DAC _SFR_MEM16(0x91) - -#define DACL _SFR_MEM8(0x91) -#define DACL0 0 -#define DACL1 1 -#define DACL2 2 -#define DACL3 3 -#define DACL4 4 -#define DACL5 5 -#define DACL6 6 -#define DACL7 7 - -#define DACH _SFR_MEM8(0x92) -#define DACH0 0 -#define DACH1 1 -#define DACH2 2 -#define DACH3 3 -#define DACH4 4 -#define DACH5 5 -#define DACH6 6 -#define DACH7 7 - -#define AC0CON _SFR_MEM8(0x94) -#define AC0M0 0 -#define AC0M1 1 -#define AC0M2 2 -#define ACCKSEL 3 -#define AC0IS0 4 -#define AC0IS1 5 -#define AC0IE 6 -#define AC0EN 7 - -#define AC1CON _SFR_MEM8(0x95) -#define AC1M0 0 -#define AC1M1 1 -#define AC1M2 2 -#define AC1ICE 3 -#define AC1IS0 4 -#define AC1IS1 5 -#define AC1IE 6 -#define AC1EN 7 - -#define AC2CON _SFR_MEM8(0x96) -#define AC2M0 0 -#define AC2M1 1 -#define AC2M2 2 -#define AC2IS0 4 -#define AC2IS1 5 -#define AC2IE 6 -#define AC2EN 7 - -#define AC3CON _SFR_MEM8(0x97) -#define AC3M0 0 -#define AC3M1 1 -#define AC3M2 2 -#define AC3IS0 4 -#define AC3IS1 5 -#define AC3IE 6 -#define AC3EN 7 - -#define LINCR _SFR_MEM8(0xC8) -#define LCMD0 0 -#define LCMD1 1 -#define LCMD2 2 -#define LENA 3 -#define LCONF0 4 -#define LCONF1 5 -#define LIN13 6 -#define LSWRES 7 - -#define LINSIR _SFR_MEM8(0xC9) -#define LRXOK 0 -#define LTXOK 1 -#define LIDOK 2 -#define LERR 3 -#define LBUSY 4 -#define LIDST0 5 -#define LIDST1 6 -#define LIDST2 7 - -#define LINENIR _SFR_MEM8(0xCA) -#define LENRXOK 0 -#define LENTXOK 1 -#define LENIDOK 2 -#define LENERR 3 - -#define LINERR _SFR_MEM8(0xCB) -#define LBERR 0 -#define LCERR 1 -#define LPERR 2 -#define LSERR 3 -#define LFERR 4 -#define LOVERR 5 -#define LTOERR 6 -#define LABORT 7 - -#define LINBTR _SFR_MEM8(0xCC) -#define LBT0 0 -#define LBT1 1 -#define LBT2 2 -#define LBT3 3 -#define LBT4 4 -#define LBT5 5 -#define LDISR 7 - -#define LINBRR _SFR_MEM16(0xCD) - -#define LINBRRL _SFR_MEM8(0xCD) -#define LDIV0 0 -#define LDIV1 1 -#define LDIV2 2 -#define LDIV3 3 -#define LDIV4 4 -#define LDIV5 5 -#define LDIV6 6 -#define LDIV7 7 - -#define LINBRRH _SFR_MEM8(0xCE) -#define LDIV8 0 -#define LDIV9 1 -#define LDIV10 2 -#define LDIV11 3 - -#define LINDLR _SFR_MEM8(0xCF) -#define LRXDL0 0 -#define LRXDL1 1 -#define LRXDL2 2 -#define LRXDL3 3 -#define LTXDL0 4 -#define LTXDL1 5 -#define LTXDL2 6 -#define LTXDL3 7 - -#define LINIDR _SFR_MEM8(0xD0) -#define LID0 0 -#define LID1 1 -#define LID2 2 -#define LID3 3 -#define LID4 4 -#define LID5 5 -#define LP0 6 -#define LP1 7 - -#define LINSEL _SFR_MEM8(0xD1) -#define LINDX0 0 -#define LINDX1 1 -#define LINDX2 2 -#define LAINC 3 - -#define LINDAT _SFR_MEM8(0xD2) -#define LDATA0 0 -#define LDATA1 1 -#define LDATA2 2 -#define LDATA3 3 -#define LDATA4 4 -#define LDATA5 5 -#define LDATA6 6 -#define LDATA7 7 - -#define CANGCON _SFR_MEM8(0xD8) -#define SWRES 0 -#define ENASTB 1 -#define TEST 2 -#define LISTEN 3 -#define SYNTTC 4 -#define TTC 5 -#define OVRQ 6 -#define ABRQ 7 - -#define CANGSTA _SFR_MEM8(0xD9) -#define ERRP 0 -#define BOFF 1 -#define ENFG 2 -#define RXBSY 3 -#define TXBSY 4 -#define OVFG 6 - -#define CANGIT _SFR_MEM8(0xDA) -#define AERG 0 -#define FERG 1 -#define CERG 2 -#define SERG 3 -#define BXOK 4 -#define OVRTIM 5 -#define BOFFIT 6 -#define CANIT 7 - -#define CANGIE _SFR_MEM8(0xDB) -#define ENOVRT 0 -#define ENERG 1 -#define ENBX 2 -#define ENERR 3 -#define ENTX 4 -#define ENRX 5 -#define ENBOFF 6 -#define ENIT 7 - -#define CANEN2 _SFR_MEM8(0xDC) -#define ENMOB0 0 -#define ENMOB1 1 -#define ENMOB2 2 -#define ENMOB3 3 -#define ENMOB4 4 -#define ENMOB5 5 - -#define CANEN1 _SFR_MEM8(0xDD) - -#define CANIE2 _SFR_MEM8(0xDE) -#define IEMOB0 0 -#define IEMOB1 1 -#define IEMOB2 2 -#define IEMOB3 3 -#define IEMOB4 4 -#define IEMOB5 5 - -#define CANIE1 _SFR_MEM8(0xDF) - -#define CANSIT2 _SFR_MEM8(0xE0) -#define SIT0 0 -#define SIT1 1 -#define SIT2 2 -#define SIT3 3 -#define SIT4 4 -#define SIT5 5 - -#define CANSIT1 _SFR_MEM8(0xE1) - -#define CANBT1 _SFR_MEM8(0xE2) -#define BRP0 0 -#define BRP1 1 -#define BRP2 2 -#define BRP3 3 -#define BRP4 4 -#define BRP5 5 - -#define CANBT2 _SFR_MEM8(0xE3) -#define PRS0 1 -#define PRS1 2 -#define PRS2 3 -#define SJW0 5 -#define SJW1 6 - -#define CANBT3 _SFR_MEM8(0xE4) -#define SMP 0 -#define PHS10 1 -#define PHS11 2 -#define PHS12 3 -#define PHS20 4 -#define PHS21 5 -#define PHS22 6 - -#define CANTCON _SFR_MEM8(0xE5) - -#define CANTIM _SFR_MEM16(0xE6) - -#define CANTIML _SFR_MEM8(0xE6) - -#define CANTIMH _SFR_MEM8(0xE7) - -#define CANTTC _SFR_MEM16(0xE8) - -#define CANTTCL _SFR_MEM8(0xE8) - -#define CANTTCH _SFR_MEM8(0xE9) - -#define CANTEC _SFR_MEM8(0xEA) - -#define CANREC _SFR_MEM8(0xEB) - -#define CANHPMOB _SFR_MEM8(0xEC) -#define CGP0 0 -#define CGP1 1 -#define CGP2 2 -#define CGP3 3 -#define HPMOB0 4 -#define HPMOB1 5 -#define HPMOB2 6 -#define HPMOB3 7 - -#define CANPAGE _SFR_MEM8(0xED) -#define INDX0 0 -#define INDX1 1 -#define INDX2 2 -#define AINC 3 -#define MOBNB0 4 -#define MOBNB1 5 -#define MOBNB2 6 -#define MOBNB3 7 - -#define CANSTMOB _SFR_MEM8(0xEE) -#define AERR 0 -#define FERR 1 -#define CERR 2 -#define SERR 3 -#define BERR 4 -#define RXOK 5 -#define TXOK 6 -#define DLCW 7 - -#define CANCDMOB _SFR_MEM8(0xEF) -#define DLC0 0 -#define DLC1 1 -#define DLC2 2 -#define DLC3 3 -#define IDE 4 -#define RPLV 5 -#define CONMOB0 6 -#define CONMOB1 7 - -#define CANIDT4 _SFR_MEM8(0xF0) -#define RB0TAG 0 -#define RB1TAG 1 -#define RTRTAG 2 -#define IDT0 3 -#define IDT1 4 -#define IDT2 5 -#define IDT3 6 -#define IDT4 7 - -#define CANIDT3 _SFR_MEM8(0xF1) -#define IDT5 0 -#define IDT6 1 -#define IDT7 2 -#define IDT8 3 -#define IDT9 4 -#define IDT10 5 -#define IDT11 6 -#define IDT12 7 - -#define CANIDT2 _SFR_MEM8(0xF2) -#define IDT13 0 -#define IDT14 1 -#define IDT15 2 -#define IDT16 3 -#define IDT17 4 -#define IDT18 5 -#define IDT19 6 -#define IDT20 7 - -#define CANIDT1 _SFR_MEM8(0xF3) -#define IDT21 0 -#define IDT22 1 -#define IDT23 2 -#define IDT24 3 -#define IDT25 4 -#define IDT26 5 -#define IDT27 6 -#define IDT28 7 - -#define CANIDM4 _SFR_MEM8(0xF4) -#define IDEMSK 0 -#define RTRMSK 2 -#define IDMSK0 3 -#define IDMSK1 4 -#define IDMSK2 5 -#define IDMSK3 6 -#define IDMSK4 7 - -#define CANIDM3 _SFR_MEM8(0xF5) -#define IDMSK5 0 -#define IDMSK6 1 -#define IDMSK7 2 -#define IDMSK8 3 -#define IDMSK9 4 -#define IDMSK10 5 -#define IDMSK11 6 -#define IDMSK12 7 - -#define CANIDM2 _SFR_MEM8(0xF6) -#define IDMSK13 0 -#define IDMSK14 1 -#define IDMSK15 2 -#define IDMSK16 3 -#define IDMSK17 4 -#define IDMSK18 5 -#define IDMSK19 6 -#define IDMSK20 7 - -#define CANIDM1 _SFR_MEM8(0xF7) -#define IDMSK21 0 -#define IDMSK22 1 -#define IDMSK23 2 -#define IDMSK24 3 -#define IDMSK25 4 -#define IDMSK26 5 -#define IDMSK27 6 -#define IDMSK28 7 - -#define CANSTM _SFR_MEM16(0xF8) - -#define CANSTML _SFR_MEM8(0xF8) - -#define CANSTMH _SFR_MEM8(0xF9) - -#define CANMSG _SFR_MEM8(0xFA) - - - -/* Interrupt Vectors */ -/* Interrupt Vector 0 is the reset vector. */ -#define ANACOMP0_vect _VECTOR(1) /* Analog Comparator 0 */ -#define ANACOMP1_vect _VECTOR(2) /* Analog Comparator 1 */ -#define ANACOMP2_vect _VECTOR(3) /* Analog Comparator 2 */ -#define ANACOMP3_vect _VECTOR(4) /* Analog Comparator 3 */ -#define PSC_FAULT_vect _VECTOR(5) /* PSC Fault */ -#define PSC_EC_vect _VECTOR(6) /* PSC End of Cycle */ -#define INT0_vect _VECTOR(7) /* External Interrupt Request 0 */ -#define INT1_vect _VECTOR(8) /* External Interrupt Request 1 */ -#define INT2_vect _VECTOR(9) /* External Interrupt Request 2 */ -#define INT3_vect _VECTOR(10) /* External Interrupt Request 3 */ -#define TIMER1_CAPT_vect _VECTOR(11) /* Timer/Counter1 Capture Event */ -#define TIMER1_COMPA_vect _VECTOR(12) /* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPB_vect _VECTOR(13) /* Timer/Counter1 Compare Match B */ -#define TIMER1_OVF_vect _VECTOR(14) /* Timer1/Counter1 Overflow */ -#define TIMER0_COMPA_vect _VECTOR(15) /* Timer/Counter0 Compare Match A */ -#define TIMER0_COMPB_vect _VECTOR(16) /* Timer/Counter0 Compare Match B */ -#define TIMER0_OVF_vect _VECTOR(17) /* Timer/Counter0 Overflow */ -#define CAN_INT_vect _VECTOR(18) /* CAN MOB, Burst, General Errors */ -#define CAN_TOVF_vect _VECTOR(19) /* CAN Timer Overflow */ -#define LIN_TC_vect _VECTOR(20) /* LIN Transfer Complete */ -#define LIN_ERR_vect _VECTOR(21) /* LIN Error */ -#define PCINT0_vect _VECTOR(22) /* Pin Change Interrupt Request 0 */ -#define PCINT1_vect _VECTOR(23) /* Pin Change Interrupt Request 1 */ -#define PCINT2_vect _VECTOR(24) /* Pin Change Interrupt Request 2 */ -#define PCINT3_vect _VECTOR(25) /* Pin Change Interrupt Request 3 */ -#define SPI_STC_vect _VECTOR(26) /* SPI Serial Transfer Complete */ -#define ADC_vect _VECTOR(27) /* ADC Conversion Complete */ -#define WDT_vect _VECTOR(28) /* Watchdog Time-Out Interrupt */ -#define EE_READY_vect _VECTOR(29) /* EEPROM Ready */ -#define SPM_READY_vect _VECTOR(30) /* Store Program Memory Read */ - -#define _VECTORS_SIZE (31 * 4) - - -/* Constants */ -#define SPM_PAGESIZE (64) -#define RAMSTART (0x100) -#define RAMSIZE (0x800) -#define RAMEND (RAMSTART + RAMSIZE - 1) /* Last On-Chip SRAM Location */ -#define XRAMSIZE (0x800) -#define XRAMEND (RAMEND + XRAMSIZE) -#define E2END (0x3FF) -#define E2PAGESIZE (4) -#define FLASHEND (0x7FFF) - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) /* Select Clock Source */ -#define FUSE_CKSEL1 (unsigned char)~_BV(1) /* Select Clock Source */ -#define FUSE_CKSEL2 (unsigned char)~_BV(2) /* Select Clock Source */ -#define FUSE_CKSEL3 (unsigned char)~_BV(3) /* Select Clock Source */ -#define FUSE_SUT0 (unsigned char)~_BV(4) /* Select start-up time */ -#define FUSE_SUT1 (unsigned char)~_BV(5) /* Select start-up time */ -#define FUSE_CKOUT (unsigned char)~_BV(6) /* Oscillator output option */ -#define FUSE_CKDIV8 (unsigned char)~_BV(7) /* Divide clock by 8 */ -#define LFUSE_DEFAULT (FUSE_CKSEL1 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_SUT1 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) /* Select Reset Vector */ -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) /* Select Boot Size */ -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) /* Select Boot Size */ -#define FUSE_EESAVE (unsigned char)~_BV(3) /* EEPROM memory is preserved through chip erase */ -#define FUSE_WDTON (unsigned char)~_BV(4) /* Watchdog timer always on */ -#define FUSE_SPIEN (unsigned char)~_BV(5) /* Enable Serial programming and Data Downloading */ -#define FUSE_DWEN (unsigned char)~_BV(6) /* debugWIRE Enable */ -#define FUSE_RSTDISBL (unsigned char)~_BV(7) /* External Reset Disable */ -#define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_SPIEN) - -/* Extended Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) /* Brown-out Detector Trigger Level */ -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) /* Brown-out Detector Trigger Level */ -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) /* Brown-out Detector Trigger Level */ -#define FUSE_PSCRVB (unsigned char)~_BV(3) /* PSC Outputs xB Reset Value */ -#define FUSE_PSCRVA (unsigned char)~_BV(4) /* PSC Outputs xA Reset Value */ -#define FUSE_PSCRB (unsigned char)~_BV(5) /* PSC Reset Behavior */ -#define EFUSE_DEFAULT (FUSE_BODLEVEL1 & FUSE_BODLEVEL2) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x95 -#define SIGNATURE_2 0x86 - - -#endif /* _AVR_IOM32C1_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom32hvb.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom32hvb.h deleted file mode 100644 index 5355b38d9..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom32hvb.h +++ /dev/null @@ -1,885 +0,0 @@ -/* Copyright (c) 2007 Atmel Corporation - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. -*/ - -/* $Id: iom32hvb.h,v 1.3.2.4 2008/08/06 22:45:05 arcanum Exp $ */ - -/* avr/iom32hvb.h - definitions for ATmega32HVB. */ - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iom32hvb.h" -#else -# error "Attempt to include more than one file." -#endif - - -#ifndef _AVR_IOM32HVB_H_ -#define _AVR_IOM32HVB_H_ 1 - -/* Registers and associated bit numbers */ - -#define PINA _SFR_IO8(0x00) -#define PINA0 0 -#define PINA1 1 -#define PINA2 2 -#define PINA3 3 - -#define DDRA _SFR_IO8(0x01) -#define DDA0 0 -#define DDA1 1 -#define DDA2 2 -#define DDA3 3 - -#define PORTA _SFR_IO8(0x02) -#define PORTA0 0 -#define PORTA1 1 -#define PORTA2 2 -#define PORTA3 3 - -#define PINB _SFR_IO8(0x03) -#define PINB0 0 -#define PINB1 1 -#define PINB2 2 -#define PINB3 3 -#define PINB4 4 -#define PINB5 5 -#define PINB6 6 -#define PINB7 7 - -#define DDRB _SFR_IO8(0x04) -#define DDB0 0 -#define DDB1 1 -#define DDB2 2 -#define DDB3 3 -#define DDB4 4 -#define DDB5 5 -#define DDB6 6 -#define DDB7 7 - -#define PORTB _SFR_IO8(0x05) -#define PORTB0 0 -#define PORTB1 1 -#define PORTB2 2 -#define PORTB3 3 -#define PORTB4 4 -#define PORTB5 5 -#define PORTB6 6 -#define PORTB7 7 - -#define PINC _SFR_IO8(0x06) -#define PINC0 0 -#define PINC1 1 -#define PINC2 2 -#define PINC3 3 -#define PINC4 4 - -#define PORTC _SFR_IO8(0x08) -#define PORTC0 0 -#define PORTC1 1 -#define PORTC2 2 -#define PORTC3 3 -#define PORTC4 4 -#define PORTC5 5 - -#define TIFR0 _SFR_IO8(0x15) -#define TOV0 0 -#define OCF0A 1 -#define OCF0B 2 -#define ICF0 3 - -#define TIFR1 _SFR_IO8(0x16) -#define TOV1 0 -#define OCF1A 1 -#define OCF1B 2 -#define ICF1 3 - -#define OSICSR _SFR_IO8(0x17) -#define OSIEN 0 -#define OSIST 1 -#define OSISEL0 4 - -#define PCIFR _SFR_IO8(0x1B) -#define PCIF0 0 -#define PCIF1 1 - -#define EIFR _SFR_IO8(0x1C) -#define INTF0 0 -#define INTF1 1 -#define INTF2 2 -#define INTF3 3 - -#define EIMSK _SFR_IO8(0x1D) -#define INT0 0 -#define INT1 1 -#define INT2 2 -#define INT3 3 - -#define GPIOR0 _SFR_IO8(0x1E) -#define GPIOR00 0 -#define GPIOR01 1 -#define GPIOR02 2 -#define GPIOR03 3 -#define GPIOR04 4 -#define GPIOR05 5 -#define GPIOR06 6 -#define GPIOR07 7 - -#define EECR _SFR_IO8(0x1F) -#define EERE 0 -#define EEPE 1 -#define EEMPE 2 -#define EERIE 3 -#define EEPM0 4 -#define EEPM1 5 - -#define EEDR _SFR_IO8(0x20) -#define EEDR0 0 -#define EEDR1 1 -#define EEDR2 2 -#define EEDR3 3 -#define EEDR4 4 -#define EEDR5 5 -#define EEDR6 6 -#define EEDR7 7 - -#define EEAR _SFR_IO16(0x21) - -#define EEARL _SFR_IO8(0x21) -#define EEAR0 0 -#define EEAR1 1 -#define EEAR2 2 -#define EEAR3 3 -#define EEAR4 4 -#define EEAR5 5 -#define EEAR6 6 -#define EEAR7 7 - -#define EEARH _SFR_IO8(0x22) -#define EEAR8 0 -#define EEAR9 1 - -#define GTCCR _SFR_IO8(0x23) -#define PSRSYNC 0 -#define TSM 7 - -#define TCCR0A _SFR_IO8(0x24) -#define WGM00 0 -#define ICS0 3 -#define ICES0 4 -#define ICNC0 5 -#define ICEN0 6 -#define TCW0 7 - -#define TCCR0B _SFR_IO8(0x25) -#define CS00 0 -#define CS01 1 -#define CS02 2 - -#define TCNT0 _SFR_IO16(0x26) - -#define TCNT0L _SFR_IO8(0x26) -#define TCNT0L0 0 -#define TCNT0L1 1 -#define TCNT0L2 2 -#define TCNT0L3 3 -#define TCNT0L4 4 -#define TCNT0L5 5 -#define TCNT0L6 6 -#define TCNT0L7 7 - -#define TCNT0H _SFR_IO8(0x27) -#define TCNT0H0 0 -#define TCNT0H1 1 -#define TCNT0H2 2 -#define TCNT0H3 3 -#define TCNT0H4 4 -#define TCNT0H5 5 -#define TCNT0H6 6 -#define TCNT0H7 7 - -#define OCR0A _SFR_IO8(0x28) -#define OCR0A0 0 -#define OCR0A1 1 -#define OCR0A2 2 -#define OCR0A3 3 -#define OCR0A4 4 -#define OCR0A5 5 -#define OCR0A6 6 -#define OCR0A7 7 - -#define OCR0B _SFR_IO8(0x29) -#define OCR0B0 0 -#define OCR0B1 1 -#define OCR0B2 2 -#define OCR0B3 3 -#define OCR0B4 4 -#define OCR0B5 5 -#define OCR0B6 6 -#define OCR0B7 7 - -#define GPIOR1 _SFR_IO8(0x2A) -#define GPIOR10 0 -#define GPIOR11 1 -#define GPIOR12 2 -#define GPIOR13 3 -#define GPIOR14 4 -#define GPIOR15 5 -#define GPIOR16 6 -#define GPIOR17 7 - -#define GPIOR2 _SFR_IO8(0x2B) -#define GPIOR20 0 -#define GPIOR21 1 -#define GPIOR22 2 -#define GPIOR23 3 -#define GPIOR24 4 -#define GPIOR25 5 -#define GPIOR26 6 -#define GPIOR27 7 - -#define SPCR _SFR_IO8(0x2C) -#define SPR0 0 -#define SPR1 1 -#define CPHA 2 -#define CPOL 3 -#define MSTR 4 -#define DORD 5 -#define SPE 6 -#define SPIE 7 - -#define SPSR _SFR_IO8(0x2D) -#define SPI2X 0 -#define WCOL 6 -#define SPIF 7 - -#define SPDR _SFR_IO8(0x2E) -#define SPDR0 0 -#define SPDR1 1 -#define SPDR2 2 -#define SPDR3 3 -#define SPDR4 4 -#define SPDR5 5 -#define SPDR6 6 -#define SPDR7 7 - -#define SMCR _SFR_IO8(0x33) -#define SE 0 -#define SM0 1 -#define SM1 2 -#define SM2 3 - -#define MCUSR _SFR_IO8(0x34) -#define PORF 0 -#define EXTRF 1 -#define BODRF 2 -#define WDRF 3 -#define OCDRF 4 - -#define MCUCR _SFR_IO8(0x35) -#define IVCE 0 -#define IVSEL 1 -#define PUD 4 -#define CKOE 5 - -#define SPMCSR _SFR_IO8(0x37) -#define SPMEN 0 -#define PGERS 1 -#define PGWRT 2 -#define LBSET 3 -#define RWWSRE 4 -#define SIGRD 5 -#define RWWSB 6 -#define SPMIE 7 - -#define WDTCSR _SFR_MEM8(0x60) -#define WDP0 0 -#define WDP1 1 -#define WDP2 2 -#define WDE 3 -#define WDCE 4 -#define WDP3 5 -#define WDIE 6 -#define WDIF 7 - -#define CLKPR _SFR_MEM8(0x61) -#define CLKPS0 0 -#define CLKPS1 1 -#define CLKPCE 7 - -#define PRR0 _SFR_MEM8(0x64) -#define PRVADC 0 -#define PRTIM0 1 -#define PRTIM1 2 -#define PRSPI 3 -#define PRVRM 5 -#define PRTWI 6 - -#define FOSCCAL _SFR_MEM8(0x66) -#define FCAL0 0 -#define FCAL1 1 -#define FCAL2 2 -#define FCAL3 3 -#define FCAL4 4 -#define FCAL5 5 -#define FCAL6 6 -#define FCAL7 7 - -#define PCICR _SFR_MEM8(0x68) -#define PCIE0 0 -#define PCIE1 1 - -#define EICRA _SFR_MEM8(0x69) -#define ISC00 0 -#define ISC01 1 -#define ISC10 2 -#define ISC11 3 -#define ISC20 4 -#define ISC21 5 -#define ISC30 6 -#define ISC31 7 - -#define PCMSK0 _SFR_MEM8(0x6B) -#define PCINT0 0 -#define PCINT1 1 -#define PCINT2 2 -#define PCINT3 3 - -#define PCMSK1 _SFR_MEM8(0x6C) -#define PCINT4 0 -#define PCINT5 1 -#define PCINT6 2 -#define PCINT7 3 -#define PCINT8 4 -#define PCINT9 5 -#define PCINT10 6 -#define PCINT11 7 - -#define TIMSK0 _SFR_MEM8(0x6E) -#define TOIE0 0 -#define OCIE0A 1 -#define OCIE0B 2 -#define ICIE0 3 - -#define TIMSK1 _SFR_MEM8(0x6F) -#define TOIE1 0 -#define OCIE1A 1 -#define OCIE1B 2 -#define ICIE1 3 - -#define VADC _SFR_MEM16(0x78) - -#define VADCL _SFR_MEM8(0x78) -#define VADC0 0 -#define VADC1 1 -#define VADC2 2 -#define VADC3 3 -#define VADC4 4 -#define VADC5 5 -#define VADC6 6 -#define VADC7 7 - -#define VADCH _SFR_MEM8(0x79) -#define VADC8 0 -#define VADC9 1 -#define VADC10 2 -#define VADC11 3 - -#define VADCSR _SFR_MEM8(0x7A) -#define VADCCIE 0 -#define VADCCIF 1 -#define VADSC 2 -#define VADEN 3 - -#define VADMUX _SFR_MEM8(0x7C) -#define VADMUX0 0 -#define VADMUX1 1 -#define VADMUX2 2 -#define VADMUX3 3 - -#define DIDR0 _SFR_MEM8(0x7E) -#define PA0DID 0 -#define PA1DID 1 - -#define TCCR1A _SFR_MEM8(0x80) -#define WGM10 0 -#define ICS1 3 -#define ICES1 4 -#define ICNC1 5 -#define ICEN1 6 -#define TCW1 7 - -#define TCCR1B _SFR_MEM8(0x81) -#define CS10 0 -#define CS11 1 -#define CS12 2 - -#define TCNT1 _SFR_MEM16(0x84) - -#define TCNT1L _SFR_MEM8(0x84) -#define TCNT1L0 0 -#define TCNT1L1 1 -#define TCNT1L2 2 -#define TCNT1L3 3 -#define TCNT1L4 4 -#define TCNT1L5 5 -#define TCNT1L6 6 -#define TCNT1L7 7 - -#define TCNT1H _SFR_MEM8(0x85) -#define TCNT1H0 0 -#define TCNT1H1 1 -#define TCNT1H2 2 -#define TCNT1H3 3 -#define TCNT1H4 4 -#define TCNT1H5 5 -#define TCNT1H6 6 -#define TCNT1H7 7 - -#define OCR1A _SFR_MEM8(0x88) -#define OCR1A0 0 -#define OCR1A1 1 -#define OCR1A2 2 -#define OCR1A3 3 -#define OCR1A4 4 -#define OCR1A5 5 -#define OCR1A6 6 -#define OCR1A7 7 - -#define OCR1B _SFR_MEM8(0x89) -#define OCR1B0 0 -#define OCR1B1 1 -#define OCR1B2 2 -#define OCR1B3 3 -#define OCR1B4 4 -#define OCR1B5 5 -#define OCR1B6 6 -#define OCR1B7 7 - -#define TWBR _SFR_MEM8(0xB8) -#define TWBR0 0 -#define TWBR1 1 -#define TWBR2 2 -#define TWBR3 3 -#define TWBR4 4 -#define TWBR5 5 -#define TWBR6 6 -#define TWBR7 7 - -#define TWSR _SFR_MEM8(0xB9) -#define TWPS0 0 -#define TWPS1 1 -#define TWS3 3 -#define TWS4 4 -#define TWS5 5 -#define TWS6 6 -#define TWS7 7 - -#define TWAR _SFR_MEM8(0xBA) -#define TWGCE 0 -#define TWA0 1 -#define TWA1 2 -#define TWA2 3 -#define TWA3 4 -#define TWA4 5 -#define TWA5 6 -#define TWA6 7 - -#define TWDR _SFR_MEM8(0xBB) -#define TWD0 0 -#define TWD1 1 -#define TWD2 2 -#define TWD3 3 -#define TWD4 4 -#define TWD5 5 -#define TWD6 6 -#define TWD7 7 - -#define TWCR _SFR_MEM8(0xBC) -#define TWIE 0 -#define TWEN 2 -#define TWWC 3 -#define TWSTO 4 -#define TWSTA 5 -#define TWEA 6 -#define TWINT 7 - -#define TWAMR _SFR_MEM8(0xBD) -#define TWAM0 0 -#define TWAM1 1 -#define TWAM2 2 -#define TWAM3 3 -#define TWAM4 4 -#define TWAM5 5 -#define TWAM6 6 - -#define TWBCSR _SFR_MEM8(0xBE) -#define TWBCIP 0 -#define TWBDT0 1 -#define TWBDT1 2 -#define TWBCIE 6 -#define TWBCIF 7 - -#define ROCR _SFR_MEM8(0xC8) -#define ROCWIE 0 -#define ROCWIF 1 -#define ROCD 4 -#define ROCS 7 - -#define BGCCR _SFR_MEM8(0xD0) -#define BGCC0 0 -#define BGCC1 1 -#define BGCC2 2 -#define BGCC3 3 -#define BGCC4 4 -#define BGCC5 5 - -#define BGCRR _SFR_MEM8(0xD1) -#define BGCR0 0 -#define BGCR1 1 -#define BGCR2 2 -#define BGCR3 3 -#define BGCR4 4 -#define BGCR5 5 -#define BGCR6 6 -#define BGCR7 7 - -#define BGCSR _SFR_MEM8(0xD2) -#define BGSCDIE 0 -#define BGSCDIF 1 -#define BGSCDE 4 -#define BGD 5 - -#define CHGDCSR _SFR_MEM8(0xD4) -#define CHGDIE 0 -#define CHGDIF 1 -#define CHGDISC0 2 -#define CHGDISC1 3 -#define BATTPVL 4 - -#define CADAC _SFR_MEM32(0xE0) - -#define CADAC0 _SFR_MEM8(0xE0) -#define CADAC00 0 -#define CADAC01 1 -#define CADAC02 2 -#define CADAC03 3 -#define CADAC04 4 -#define CADAC05 5 -#define CADAC06 6 -#define CADAC07 7 - -#define CADAC1 _SFR_MEM8(0xE1) -#define CADAC08 0 -#define CADAC09 1 -#define CADAC10 2 -#define CADAC11 3 -#define CADAC12 4 -#define CADAC13 5 -#define CADAC14 6 -#define CADAC15 7 - -#define CADAC2 _SFR_MEM8(0xE2) -#define CADAC16 0 -#define CADAC17 1 -#define CADAC18 2 -#define CADAC19 3 -#define CADAC20 4 -#define CADAC21 5 -#define CADAC22 6 -#define CADAC23 7 - -#define CADAC3 _SFR_MEM8(0xE3) -#define CADAC24 0 -#define CADAC25 1 -#define CADAC26 2 -#define CADAC27 3 -#define CADAC28 4 -#define CADAC29 5 -#define CADAC30 6 -#define CADAC31 7 - -#define CADIC _SFR_MEM16(0xE4) - -#define CADICL _SFR_MEM8(0xE4) -#define CADICL0 0 -#define CADICL1 1 -#define CADICL2 2 -#define CADICL3 3 -#define CADICL4 4 -#define CADICL5 5 -#define CADICL6 6 -#define CADICL7 7 - -#define CADICH _SFR_MEM8(0xE5) -#define CADICH0 0 -#define CADICH1 1 -#define CADICH2 2 -#define CADICH3 3 -#define CADICH4 4 -#define CADICH5 5 -#define CADICH6 6 -#define CADICH7 7 - -#define CADCSRA _SFR_MEM8(0xE6) -#define CADSE 0 -#define CADSI0 1 -#define CADSI1 2 -#define CADAS0 3 -#define CADAS1 4 -#define CADUB 5 -#define CADPOL 6 -#define CADEN 7 - -#define CADCSRB _SFR_MEM8(0xE7) -#define CADICIF 0 -#define CADRCIF 1 -#define CADACIF 2 -#define CADICIE 4 -#define CADRCIE 5 -#define CADACIE 6 - -#define CADCSRC _SFR_MEM8(0xE8) -#define CADVSE 0 - -#define CADRCC _SFR_MEM8(0xE9) -#define CADRCC0 0 -#define CADRCC1 1 -#define CADRCC2 2 -#define CADRCC3 3 -#define CADRCC4 4 -#define CADRCC5 5 -#define CADRCC6 6 -#define CADRCC7 7 - -#define CADRDC _SFR_MEM8(0xEA) -#define CADRDC0 0 -#define CADRDC1 1 -#define CADRDC2 2 -#define CADRDC3 3 -#define CADRDC4 4 -#define CADRDC5 5 -#define CADRDC6 6 -#define CADRDC7 7 - -#define FCSR _SFR_MEM8(0xF0) -#define CFE 0 -#define DFE 1 -#define CPS 2 -#define DUVRD 3 - -#define CBCR _SFR_MEM8(0xF1) -#define CBE1 0 -#define CBE2 1 -#define CBE3 2 -#define CBE4 3 - -#define BPIMSK _SFR_MEM8(0xF2) -#define CHCIE 0 -#define DHCIE 1 -#define COCIE 2 -#define DOCIE 3 -#define SCIE 4 - -#define BPIFR _SFR_MEM8(0xF3) -#define CHCIF 0 -#define DHCIF 1 -#define COCIF 2 -#define DOCIF 3 -#define SCIF 4 - -#define BPSCD _SFR_MEM8(0xF5) -#define SCDL0 0 -#define SCDL1 1 -#define SCDL2 2 -#define SCDL3 3 -#define SCDL4 4 -#define SCDL5 5 -#define SCDL6 6 -#define SCDL7 7 - -#define BPDOCD _SFR_MEM8(0xF6) -#define DOCDL0 0 -#define DOCDL1 1 -#define DOCDL2 2 -#define DOCDL3 3 -#define DOCDL4 4 -#define DOCDL5 5 -#define DOCDL6 6 -#define DOCDL7 7 - -#define BPCOCD _SFR_MEM8(0xF7) -#define COCDL0 0 -#define COCDL1 1 -#define COCDL2 2 -#define COCDL3 3 -#define COCDL4 4 -#define COCDL5 5 -#define COCDL6 6 -#define COCDL7 7 - -#define BPDHCD _SFR_MEM8(0xF8) -#define DHCDL0 0 -#define DHCDL1 1 -#define DHCDL2 2 -#define DHCDL3 3 -#define DHCDL4 4 -#define DHCDL5 5 -#define DHCDL6 6 -#define DHCDL7 7 - -#define BPCHCD _SFR_MEM8(0xF9) -#define CHCDL0 0 -#define CHCDL1 1 -#define CHCDL2 2 -#define CHCDL3 3 -#define CHCDL4 4 -#define CHCDL5 5 -#define CHCDL6 6 -#define CHCDL7 7 - -#define BPSCTR _SFR_MEM8(0xFA) -#define SCPT0 0 -#define SCPT1 1 -#define SCPT2 2 -#define SCPT3 3 -#define SCPT4 4 -#define SCPT5 5 -#define SCPT6 6 - -#define BPOCTR _SFR_MEM8(0xFB) -#define OCPT0 0 -#define OCPT1 1 -#define OCPT2 2 -#define OCPT3 3 -#define OCPT4 4 -#define OCPT5 5 - -#define BPHCTR _SFR_MEM8(0xFC) -#define HCPT0 0 -#define HCPT1 1 -#define HCPT2 2 -#define HCPT3 3 -#define HCPT4 4 -#define HCPT5 5 - -#define BPCR _SFR_MEM8(0xFD) -#define CHCD 0 -#define DHCD 1 -#define COCD 2 -#define DOCD 3 -#define SCD 4 -#define EPID 5 - -#define BPPLR _SFR_MEM8(0xFE) -#define BPPL 0 -#define BPPLE 1 - - - -/* Interrupt Vectors */ -/* Interrupt Vector 0 is the reset vector. */ - -#define BPINT_vect _VECTOR(1) /* Battery Protection Interrupt */ -#define VREGMON_vect _VECTOR(2) /* Voltage regulator monitor interrupt */ -#define INT0_vect _VECTOR(3) /* External Interrupt Request 0 */ -#define INT1_vect _VECTOR(4) /* External Interrupt Request 1 */ -#define INT2_vect _VECTOR(5) /* External Interrupt Request 2 */ -#define INT3_vect _VECTOR(6) /* External Interrupt Request 3 */ -#define PCINT0_vect _VECTOR(7) /* Pin Change Interrupt 0 */ -#define PCINT1_vect _VECTOR(8) /* Pin Change Interrupt 1 */ -#define WDT_vect _VECTOR(9) /* Watchdog Timeout Interrupt */ -#define BGSCD_vect _VECTOR(10) /* Bandgap Buffer Short Circuit Detected */ -#define CHDET_vect _VECTOR(11) /* Charger Detect */ -#define TIMER1_IC_vect _VECTOR(12) /* Timer 1 Input capture */ -#define TIMER1_COMPA_vect _VECTOR(13) /* Timer 1 Compare Match A */ -#define TIMER1_COMPB_vect _VECTOR(14) /* Timer 1 Compare Match B */ -#define TIMER1_OVF_vect _VECTOR(15) /* Timer 1 overflow */ -#define TIMER0_IC_vect _VECTOR(16) /* Timer 0 Input Capture */ -#define TIMER0_COMPA_vect _VECTOR(17) /* Timer 0 Comapre Match A */ -#define TIMER0_COMPB_vect _VECTOR(18) /* Timer 0 Compare Match B */ -#define TIMER0_OVF_vect _VECTOR(19) /* Timer 0 Overflow */ -#define TWIBUSCD_vect _VECTOR(20) /* Two-Wire Bus Connect/Disconnect */ -#define TWI_vect _VECTOR(21) /* Two-Wire Serial Interface */ -#define SPI_STC_vect _VECTOR(22) /* SPI Serial transfer complete */ -#define VADC_vect _VECTOR(23) /* Voltage ADC Conversion Complete */ -#define CCADC_CONV_vect _VECTOR(24) /* Coulomb Counter ADC Conversion Complete */ -#define CCADC_REG_CUR_vect _VECTOR(25) /* Coloumb Counter ADC Regular Current */ -#define CCADC_ACC_vect _VECTOR(26) /* Coloumb Counter ADC Accumulator */ -#define EE_READY_vect _VECTOR(27) /* EEPROM Ready */ -#define SPM_vect _VECTOR(28) /* SPM Ready */ - -#define _VECTORS_SIZE (29 * 4) - - -/* Constants */ -#define SPM_PAGESIZE 64 -#define RAMEND 0x8FF /* Last On-Chip SRAM Location */ -#define XRAMSIZE 0 -#define XRAMEND (RAMEND + XRAMSIZE) -#define E2END 0x3FF -#define FLASHEND 0x7FFF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 2 - -/* Low Fuse Byte */ -#define FUSE_WDTON (unsigned char)~_BV(7) /* Watchdog Timer Always On */ -#define FUSE_EESAVE (unsigned char)~_BV(6) /* EEPROM memory is preserved through chip erase */ -#define FUSE_SPIEN (unsigned char)~_BV(5) /* Enable Serial programming and Data Downloading */ -#define FUSE_SUT2 (unsigned char)~_BV(4) /* Select start-up time */ -#define FUSE_SUT1 (unsigned char)~_BV(3) /* Select start-up time */ -#define FUSE_SUT0 (unsigned char)~_BV(2) /* Select start-up time */ -#define FUSE_OSCSEL1 (unsigned char)~_BV(1) /* Oscillator Select */ -#define FUSE_OSCSEL0 (unsigned char)~_BV(0) /* Oscillator Select */ -#define LFUSE_DEFAULT (FUSE_OSCSEL0 & FUSE_SPIEN) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) /* Select Reset Vector */ -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) /* Select Boot Size */ -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) /* Select Boot Size */ -#define FUSE_DWEN (unsigned char)~_BV(3) /* Enable debugWire */ -#define FUSE_DUVRDINIT (unsigned char)~_BV(4) /* Reset Value of DUVRDRegister */ -#define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_DUVRDINIT) - - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST - - -#endif /* _AVR_IOM32HVB_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom32m1.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom32m1.h deleted file mode 100644 index f4a9f5e9a..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom32m1.h +++ /dev/null @@ -1,1394 +0,0 @@ -/* Copyright (c) 2008 Atmel Corporation - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. -*/ - -/* $Id: iom32m1.h,v 1.1.2.7 2008/10/17 23:27:49 arcanum Exp $ */ - -/* avr/iom32m1.h - definitions for ATmega32M1. */ - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iom32m1.h" -#else -# error "Attempt to include more than one file." -#endif - - -#ifndef _AVR_IOM32M1_H_ -#define _AVR_IOM32M1_H_ 1 - -/* Registers and associated bit numbers */ - - -#define PINB _SFR_IO8(0x03) -#define PINB0 0 -#define PINB1 1 -#define PINB2 2 -#define PINB3 3 -#define PINB4 4 -#define PINB5 5 -#define PINB6 6 -#define PINB7 7 - -#define DDRB _SFR_IO8(0x04) -#define DDB0 0 -#define DDB1 1 -#define DDB2 2 -#define DDB3 3 -#define DDB4 4 -#define DDB5 5 -#define DDB6 6 -#define DDB7 7 - -#define PORTB _SFR_IO8(0x05) -#define PORTB0 0 -#define PORTB1 1 -#define PORTB2 2 -#define PORTB3 3 -#define PORTB4 4 -#define PORTB5 5 -#define PORTB6 6 -#define PORTB7 7 - -#define PINC _SFR_IO8(0x06) -#define PINC0 0 -#define PINC1 1 -#define PINC2 2 -#define PINC3 3 -#define PINC4 4 -#define PINC5 5 -#define PINC6 6 -#define PINC7 7 - -#define DDRC _SFR_IO8(0x07) -#define DDC0 0 -#define DDC1 1 -#define DDC2 2 -#define DDC3 3 -#define DDC4 4 -#define DDC5 5 -#define DDC6 6 -#define DDC7 7 - -#define PORTC _SFR_IO8(0x08) -#define PORTC0 0 -#define PORTC1 1 -#define PORTC2 2 -#define PORTC3 3 -#define PORTC4 4 -#define PORTC5 5 -#define PORTC6 6 -#define PORTC7 7 - -#define PIND _SFR_IO8(0x09) -#define PIND0 0 -#define PIND1 1 -#define PIND2 2 -#define PIND3 3 -#define PIND4 4 -#define PIND5 5 -#define PIND6 6 -#define PIND7 7 - -#define DDRD _SFR_IO8(0x0A) -#define DDD0 0 -#define DDD1 1 -#define DDD2 2 -#define DDD3 3 -#define DDD4 4 -#define DDD5 5 -#define DDD6 6 -#define DDD7 7 - -#define PORTD _SFR_IO8(0x0B) -#define PORTD0 0 -#define PORTD1 1 -#define PORTD2 2 -#define PORTD3 3 -#define PORTD4 4 -#define PORTD5 5 -#define PORTD6 6 -#define PORTD7 7 - -#define PINE _SFR_IO8(0x0C) -#define PINE0 0 -#define PINE1 1 -#define PINE2 2 - -#define DDRE _SFR_IO8(0x0D) -#define DDE0 0 -#define DDE1 1 -#define DDE2 2 - -#define PORTE _SFR_IO8(0x0E) -#define PORTE0 0 -#define PORTE1 1 -#define PORTE2 2 - -#define TIFR0 _SFR_IO8(0x15) -#define TOV0 0 -#define OCF0A 1 -#define OCF0B 2 - -#define TIFR1 _SFR_IO8(0x16) -#define TOV1 0 -#define OCF1A 1 -#define OCF1B 2 -#define ICF1 5 - -#define GPIOR1 _SFR_IO8(0x19) -#define GPIOR10 0 -#define GPIOR11 1 -#define GPIOR12 2 -#define GPIOR13 3 -#define GPIOR14 4 -#define GPIOR15 5 -#define GPIOR16 6 -#define GPIOR17 7 - -#define GPIOR2 _SFR_IO8(0x1A) -#define GPIOR20 0 -#define GPIOR21 1 -#define GPIOR22 2 -#define GPIOR23 3 -#define GPIOR24 4 -#define GPIOR25 5 -#define GPIOR26 6 -#define GPIOR27 7 - -#define PCIFR _SFR_IO8(0x1B) - -#define EIFR _SFR_IO8(0x1C) -#define INTF0 0 -#define INTF1 1 -#define INTF2 2 -#define INTF3 3 - -#define EIMSK _SFR_IO8(0x1D) -#define INT0 0 -#define INT1 1 -#define INT2 2 -#define INT3 3 - -#define GPIOR0 _SFR_IO8(0x1E) -#define GPIOR00 0 -#define GPIOR01 1 -#define GPIOR02 2 -#define GPIOR03 3 -#define GPIOR04 4 -#define GPIOR05 5 -#define GPIOR06 6 -#define GPIOR07 7 - -#define EECR _SFR_IO8(0x1F) -#define EERE 0 -#define EEPE 1 -#define EEMPE 2 -#define EERIE 3 -#define EEPM0 4 -#define EEPM1 5 - -#define EEDR _SFR_IO8(0x20) -#define EEDR0 0 -#define EEDR1 1 -#define EEDR2 2 -#define EEDR3 3 -#define EEDR4 4 -#define EEDR5 5 -#define EEDR6 6 -#define EEDR7 7 - -#define EEAR _SFR_IO16(0x21) - -#define EEARL _SFR_IO8(0x21) -#define EEAR0 0 -#define EEAR1 1 -#define EEAR2 2 -#define EEAR3 3 -#define EEAR4 4 -#define EEAR5 5 -#define EEAR6 6 -#define EEAR7 7 - -#define EEARH _SFR_IO8(0x22) -#define EEAR8 0 -#define EEAR9 1 - -#define __EEPROM_REG_LOCATIONS__ 1F2021 - -#define GTCCR _SFR_IO8(0x23) -#define PSR10 0 -#define PSRSYNC 0 -#define ICPSEL1 6 -#define TSM 7 - -#define TCCR0A _SFR_IO8(0x24) -#define WGM00 0 -#define WGM01 1 -#define COM0B0 4 -#define COM0B1 5 -#define COM0A0 6 -#define COM0A1 7 - -#define TCCR0B _SFR_IO8(0x25) -#define CS00 0 -#define CS01 1 -#define CS02 2 -#define WGM02 3 -#define FOC0B 6 -#define FOC0A 7 - -#define TCNT0 _SFR_IO8(0x26) -#define TCNT0_0 0 -#define TCNT0_1 1 -#define TCNT0_2 2 -#define TCNT0_3 3 -#define TCNT0_4 4 -#define TCNT0_5 5 -#define TCNT0_6 6 -#define TCNT0_7 7 - -#define OCR0A _SFR_IO8(0x27) -#define OCR0A_0 0 -#define OCR0A_1 1 -#define OCR0A_2 2 -#define OCR0A_3 3 -#define OCR0A_4 4 -#define OCR0A_5 5 -#define OCR0A_6 6 -#define OCR0A_7 7 - -#define OCR0B _SFR_IO8(0x28) -#define OCR0B_0 0 -#define OCR0B_1 1 -#define OCR0B_2 2 -#define OCR0B_3 3 -#define OCR0B_4 4 -#define OCR0B_5 5 -#define OCR0B_6 6 -#define OCR0B_7 7 - -#define PLLCSR _SFR_IO8(0x29) -#define PLOCK 0 -#define PLLE 1 -#define PLLF 2 - -#define SPCR _SFR_IO8(0x2C) -#define SPR0 0 -#define SPR1 1 -#define CPHA 2 -#define CPOL 3 -#define MSTR 4 -#define DORD 5 -#define SPE 6 -#define SPIE 7 - -#define SPSR _SFR_IO8(0x2D) -#define SPI2X 0 -#define WCOL 6 -#define SPIF 7 - -#define SPDR _SFR_IO8(0x2E) -#define SPDR0 0 -#define SPDR1 1 -#define SPDR2 2 -#define SPDR3 3 -#define SPDR4 4 -#define SPDR5 5 -#define SPDR6 6 -#define SPDR7 7 - -#define ACSR _SFR_IO8(0x30) -#define AC0O 0 -#define AC1O 1 -#define AC2O 2 -#define AC3O 3 -#define AC0IF 4 -#define AC1IF 5 -#define AC2IF 6 -#define AC3IF 7 - -#define DWDR _SFR_IO8(0x31) - -#define SMCR _SFR_IO8(0x33) -#define SE 0 -#define SM0 1 -#define SM1 2 -#define SM2 3 - -#define MCUSR _SFR_IO8(0x34) -#define PORF 0 -#define EXTRF 1 -#define BORF 2 -#define WDRF 3 - -#define MCUCR _SFR_IO8(0x35) -#define IVCE 0 -#define IVSEL 1 -#define PUD 4 -#define SPIPS 7 - -#define SPMCSR _SFR_IO8(0x37) -#define SPMEN 0 -#define PGERS 1 -#define PGWRT 2 -#define BLBSET 3 -#define RWWSRE 4 -#define RWWSB 6 -#define SPMIE 7 - -#define WDTCSR _SFR_MEM8(0x60) -#define WDP0 0 -#define WDP1 1 -#define WDP2 2 -#define WDE 3 -#define WDCE 4 -#define WDP3 5 -#define WDIE 6 -#define WDIF 7 - -#define CLKPR _SFR_MEM8(0x61) -#define CLKPS0 0 -#define CLKPS1 1 -#define CLKPS2 2 -#define CLKPS3 3 -#define CLKPCE 7 - -#define PRR _SFR_MEM8(0x64) -#define PRADC 0 -#define PRLIN 1 -#define PRSPI 2 -#define PRTIM0 3 -#define PRTIM1 4 -#define PRPSC 5 -#define PRCAN 6 - -#define OSCCAL _SFR_MEM8(0x66) -#define CAL0 0 -#define CAL1 1 -#define CAL2 2 -#define CAL3 3 -#define CAL4 4 -#define CAL5 5 -#define CAL6 6 - -#define EICRA _SFR_MEM8(0x69) -#define ISC00 0 -#define ISC01 1 -#define ISC10 2 -#define ISC11 3 -#define ISC20 4 -#define ISC21 5 -#define ISC30 6 -#define ISC31 7 - -#define PCMSK0 _SFR_MEM8(0x6A) - -#define PCMSK1 _SFR_MEM8(0x6B) - -#define PCMSK2 _SFR_MEM8(0x6C) - -#define PCMSK3 _SFR_MEM8(0x6D) - -#define TIMSK0 _SFR_MEM8(0x6E) -#define TOIE0 0 -#define OCIE0A 1 -#define OCIE0B 2 - -#define TIMSK1 _SFR_MEM8(0x6F) -#define TOIE1 0 -#define OCIE1A 1 -#define OCIE1B 2 -#define ICIE1 5 - -#define AMP0CSR _SFR_MEM8(0x75) -#define AMP0TS0 0 -#define AMP0TS1 1 -#define AMP0TS2 2 -#define AMPCMP0 3 -#define AMP0G0 4 -#define AMP0G1 5 -#define AMP0IS 6 -#define AMP0EN 7 - -#define AMP1CSR _SFR_MEM8(0x76) -#define AMP1TS0 0 -#define AMP1TS1 1 -#define AMP1TS2 2 -#define AMPCMP1 3 -#define AMP1G0 4 -#define AMP1G1 5 -#define AMP1IS 6 -#define AMP1EN 7 - -#define AMP2CSR _SFR_MEM8(0x77) -#define AMP2TS0 0 -#define AMP2TS1 1 -#define AMP2TS2 2 -#define AMPCMP2 3 -#define AMP2G0 4 -#define AMP2G1 5 -#define AMP2IS 6 -#define AMP2EN 7 - -#ifndef __ASSEMBLER__ -#define ADC _SFR_MEM16(0x78) -#endif -#define ADCW _SFR_MEM16(0x78) - -#define ADCL _SFR_MEM8(0x78) -#define ADCL0 0 -#define ADCL1 1 -#define ADCL2 2 -#define ADCL3 3 -#define ADCL4 4 -#define ADCL5 5 -#define ADCL6 6 -#define ADCL7 7 - -#define ADCH _SFR_MEM8(0x79) -#define ADCH0 0 -#define ADCH1 1 -#define ADCH2 2 -#define ADCH3 3 -#define ADCH4 4 -#define ADCH5 5 -#define ADCH6 6 -#define ADCH7 7 - -#define ADCSRA _SFR_MEM8(0x7A) -#define ADPS0 0 -#define ADPS1 1 -#define ADPS2 2 -#define ADIE 3 -#define ADIF 4 -#define ADATE 5 -#define ADSC 6 -#define ADEN 7 - -#define ADCSRB _SFR_MEM8(0x7B) -#define ADTS0 0 -#define ADTS1 1 -#define ADTS2 2 -#define ADTS3 3 -#define AREFEN 4 -#define ISRCEN 5 -#define ADHSM 6 - -#define ADMUX _SFR_MEM8(0x7C) -#define MUX0 0 -#define MUX1 1 -#define MUX2 2 -#define MUX3 3 -#define ADLAR 5 -#define REFS0 6 -#define REFS1 7 - -#define DIDR0 _SFR_MEM8(0x7E) -#define ADC0D 0 -#define ADC1D 1 -#define ADC2D 2 -#define ADC3D 3 -#define ADC4D 4 -#define ADC5D 5 -#define ADC6D 6 -#define ADC7D 7 - -#define DIDR1 _SFR_MEM8(0x7F) -#define ADC8D 0 -#define ADC9D 1 -#define ADC10D 2 -#define AMP0ND 3 -#define AMP0PD 4 -#define ACMP0D 5 -#define AMP2PD 6 - -#define TCCR1A _SFR_MEM8(0x80) -#define WGM10 0 -#define WGM11 1 -#define COM1B0 4 -#define COM1B1 5 -#define COM1A0 6 -#define COM1A1 7 - -#define TCCR1B _SFR_MEM8(0x81) -#define CS10 0 -#define CS11 1 -#define CS12 2 -#define WGM12 3 -#define WGM13 4 -#define ICES1 6 -#define ICNC1 7 - -#define TCCR1C _SFR_MEM8(0x82) -#define FOC1B 6 -#define FOC1A 7 - -#define TCNT1 _SFR_MEM16(0x84) - -#define TCNT1L _SFR_MEM8(0x84) -#define TCNT1L0 0 -#define TCNT1L1 1 -#define TCNT1L2 2 -#define TCNT1L3 3 -#define TCNT1L4 4 -#define TCNT1L5 5 -#define TCNT1L6 6 -#define TCNT1L7 7 - -#define TCNT1H _SFR_MEM8(0x85) -#define TCNT1H0 0 -#define TCNT1H1 1 -#define TCNT1H2 2 -#define TCNT1H3 3 -#define TCNT1H4 4 -#define TCNT1H5 5 -#define TCNT1H6 6 -#define TCNT1H7 7 - -#define ICR1 _SFR_MEM16(0x86) - -#define ICR1L _SFR_MEM8(0x86) -#define ICR1L0 0 -#define ICR1L1 1 -#define ICR1L2 2 -#define ICR1L3 3 -#define ICR1L4 4 -#define ICR1L5 5 -#define ICR1L6 6 -#define ICR1L7 7 - -#define ICR1H _SFR_MEM8(0x87) -#define ICR1H0 0 -#define ICR1H1 1 -#define ICR1H2 2 -#define ICR1H3 3 -#define ICR1H4 4 -#define ICR1H5 5 -#define ICR1H6 6 -#define ICR1H7 7 - -#define OCR1A _SFR_MEM16(0x88) - -#define OCR1AL _SFR_MEM8(0x88) -#define OCR1AL0 0 -#define OCR1AL1 1 -#define OCR1AL2 2 -#define OCR1AL3 3 -#define OCR1AL4 4 -#define OCR1AL5 5 -#define OCR1AL6 6 -#define OCR1AL7 7 - -#define OCR1AH _SFR_MEM8(0x89) -#define OCR1AH0 0 -#define OCR1AH1 1 -#define OCR1AH2 2 -#define OCR1AH3 3 -#define OCR1AH4 4 -#define OCR1AH5 5 -#define OCR1AH6 6 -#define OCR1AH7 7 - -#define OCR1B _SFR_MEM16(0x8A) - -#define OCR1BL _SFR_MEM8(0x8A) -#define OCR1BL0 0 -#define OCR1BL1 1 -#define OCR1BL2 2 -#define OCR1BL3 3 -#define OCR1BL4 4 -#define OCR1BL5 5 -#define OCR1BL6 6 -#define OCR1BL7 7 - -#define OCR1BH _SFR_MEM8(0x8B) -#define OCR1BH0 0 -#define OCR1BH1 1 -#define OCR1BH2 2 -#define OCR1BH3 3 -#define OCR1BH4 4 -#define OCR1BH5 5 -#define OCR1BH6 6 -#define OCR1BH7 7 - -#define DACON _SFR_MEM8(0x90) -#define DAEN 0 -#define DAOE 1 -#define DALA 2 -#define DATS0 4 -#define DATS1 5 -#define DATS2 6 -#define DAATE 7 - -#define DAC _SFR_MEM16(0x91) - -#define DACL _SFR_MEM8(0x91) -#define DACL0 0 -#define DACL1 1 -#define DACL2 2 -#define DACL3 3 -#define DACL4 4 -#define DACL5 5 -#define DACL6 6 -#define DACL7 7 - -#define DACH _SFR_MEM8(0x92) -#define DACH0 0 -#define DACH1 1 -#define DACH2 2 -#define DACH3 3 -#define DACH4 4 -#define DACH5 5 -#define DACH6 6 -#define DACH7 7 - -#define AC0CON _SFR_MEM8(0x94) -#define AC0M0 0 -#define AC0M1 1 -#define AC0M2 2 -#define ACCKSEL 3 -#define AC0IS0 4 -#define AC0IS1 5 -#define AC0IE 6 -#define AC0EN 7 - -#define AC1CON _SFR_MEM8(0x95) -#define AC1M0 0 -#define AC1M1 1 -#define AC1M2 2 -#define AC1ICE 3 -#define AC1IS0 4 -#define AC1IS1 5 -#define AC1IE 6 -#define AC1EN 7 - -#define AC2CON _SFR_MEM8(0x96) -#define AC2M0 0 -#define AC2M1 1 -#define AC2M2 2 -#define AC2IS0 4 -#define AC2IS1 5 -#define AC2IE 6 -#define AC2EN 7 - -#define AC3CON _SFR_MEM8(0x97) -#define AC3M0 0 -#define AC3M1 1 -#define AC3M2 2 -#define AC3IS0 4 -#define AC3IS1 5 -#define AC3IE 6 -#define AC3EN 7 - -#define POCR0SA _SFR_MEM16(0xA0) - -#define POCR0SAL _SFR_MEM8(0xA0) -#define POCR0SA_0 0 -#define POCR0SA_1 1 -#define POCR0SA_2 2 -#define POCR0SA_3 3 -#define POCR0SA_4 4 -#define POCR0SA_5 5 -#define POCR0SA_6 6 -#define POCR0SA_7 7 - -#define POCR0SAH _SFR_MEM8(0xA1) -#define POCR0SA_8 0 -#define POCR0SA_9 1 -#define POCR0SA_00 2 -#define POCR0SA_01 3 - -#define POCR0RA _SFR_MEM16(0xA2) - -#define POCR0RAL _SFR_MEM8(0xA2) -#define POCR0RA_0 0 -#define POCR0RA_1 1 -#define POCR0RA_2 2 -#define POCR0RA_3 3 -#define POCR0RA_4 4 -#define POCR0RA_5 5 -#define POCR0RA_6 6 -#define POCR0RA_7 7 - -#define POCR0RAH _SFR_MEM8(0xA3) -#define POCR0RA_8 0 -#define POCR0RA_9 1 -#define POCR0RA_00 2 -#define POCR0RA_01 3 - -#define POCR0SB _SFR_MEM16(0xA4) - -#define POCR0SBL _SFR_MEM8(0xA4) -#define POCR0SB_0 0 -#define POCR0SB_1 1 -#define POCR0SB_2 2 -#define POCR0SB_3 3 -#define POCR0SB_4 4 -#define POCR0SB_5 5 -#define POCR0SB_6 6 -#define POCR0SB_7 7 - -#define POCR0SBH _SFR_MEM8(0xA5) -#define POCR0SB_8 0 -#define POCR0SB_9 1 -#define POCR0SB_00 2 -#define POCR0SB_01 3 - -#define POCR1SA _SFR_MEM16(0xA6) - -#define POCR1SAL _SFR_MEM8(0xA6) -#define POCR1SA_0 0 -#define POCR1SA_1 1 -#define POCR1SA_2 2 -#define POCR1SA_3 3 -#define POCR1SA_4 4 -#define POCR1SA_5 5 -#define POCR1SA_6 6 -#define POCR1SA_7 7 - -#define POCR1SAH _SFR_MEM8(0xA7) -#define POCR1SA_8 0 -#define POCR1SA_9 1 -#define POCR1SA_00 2 -#define POCR1SA_01 3 - -#define POCR1RA _SFR_MEM16(0xA8) - -#define POCR1RAL _SFR_MEM8(0xA8) -#define POCR1RA_0 0 -#define POCR1RA_1 1 -#define POCR1RA_2 2 -#define POCR1RA_3 3 -#define POCR1RA_4 4 -#define POCR1RA_5 5 -#define POCR1RA_6 6 -#define POCR1RA_7 7 - -#define POCR1RAH _SFR_MEM8(0xA9) -#define POCR1RA_8 0 -#define POCR1RA_9 1 -#define POCR1RA_00 2 -#define POCR1RA_01 4 - -#define POCR1SB _SFR_MEM16(0xAA) - -#define POCR1SBL _SFR_MEM8(0xAA) -#define POCR1SB_0 0 -#define POCR1SB_1 1 -#define POCR1SB_2 2 -#define POCR1SB_3 3 -#define POCR1SB_4 4 -#define POCR1SB_5 5 -#define POCR1SB_6 6 -#define POCR1SB_7 7 - -#define POCR1SBH _SFR_MEM8(0xAB) -#define POCR1SB_8 0 -#define POCR1SB_9 1 -#define POCR1SB_00 2 -#define POCR1SB_01 3 - -#define POCR2SA _SFR_MEM16(0xAC) - -#define POCR2SAL _SFR_MEM8(0xAC) -#define POCR2SA_0 0 -#define POCR2SA_1 1 -#define POCR2SA_2 2 -#define POCR2SA_3 3 -#define POCR2SA_4 4 -#define POCR2SA_5 5 -#define POCR2SA_6 6 -#define POCR2SA_7 7 - -#define POCR2SAH _SFR_MEM8(0xAD) -#define POCR2SA_8 0 -#define POCR2SA_9 1 -#define POCR2SA_00 2 -#define POCR2SA_01 3 - -#define POCR2RA _SFR_MEM16(0xAE) - -#define POCR2RAL _SFR_MEM8(0xAE) -#define POCR2RA_0 0 -#define POCR2RA_1 1 -#define POCR2RA_2 2 -#define POCR2RA_3 3 -#define POCR2RA_4 4 -#define POCR2RA_5 5 -#define POCR2RA_6 6 -#define POCR2RA_7 7 - -#define POCR2RAH _SFR_MEM8(0xAF) -#define POCR2RA_8 0 -#define POCR2RA_9 1 -#define POCR2RA_00 2 -#define POCR2RA_01 3 - -#define POCR2SB _SFR_MEM16(0xB0) - -#define POCR2SBL _SFR_MEM8(0xB0) -#define POCR2SB_0 0 -#define POCR2SB_1 1 -#define POCR2SB_2 2 -#define POCR2SB_3 3 -#define POCR2SB_4 4 -#define POCR2SB_5 5 -#define POCR2SB_6 6 -#define POCR2SB_7 7 - -#define POCR2SBH _SFR_MEM8(0xB1) -#define POCR2SB_8 0 -#define POCR2SB_9 1 -#define POCR2SB_00 2 -#define POCR2SB_01 3 - -#define POCRxRB _SFR_MEM16(0xB2) - -#define POCRxRBL _SFR_MEM8(0xB2) -#define POCR_RB_0 0 -#define POCR_RB_1 1 -#define POCR_RB_2 2 -#define POCR_RB_3 3 -#define POCR_RB_4 4 -#define POCR_RB_5 5 -#define POCR_RB_6 6 -#define POCR_RB_7 7 - -#define POCRxRBH _SFR_MEM8(0xB3) -#define POCR_RB_8 0 -#define POCR_RB_9 1 -#define POCR_RB_00 2 -#define POCR_RB_01 3 - -#define PSYNC _SFR_MEM8(0xB4) -#define PSYNC00 0 -#define PSYNC01 1 -#define PSYNC10 2 -#define PSYNC11 3 -#define PSYNC20 4 -#define PSYNC21 5 - -#define PCNF _SFR_MEM8(0xB5) -#define POPA 2 -#define POPB 3 -#define PMODE 4 -#define PULOCK 5 - -#define POC _SFR_MEM8(0xB6) -#define POEN0A 0 -#define POEN0B 1 -#define POEN1A 2 -#define POEN1B 3 -#define POEN2A 4 -#define POEN2B 5 - -#define PCTL _SFR_MEM8(0xB7) -#define PRUN 0 -#define PCCYC 1 -#define PCLKSEL 5 -#define PPRE0 6 -#define PPRE1 7 - -#define PMIC0 _SFR_MEM8(0xB8) -#define PRFM00 0 -#define PRFM01 1 -#define PRFM02 2 -#define PAOC0 3 -#define PFLTE0 4 -#define PELEV0 5 -#define PISEL0 6 -#define POVEN0 7 - -#define PMIC1 _SFR_MEM8(0xB9) -#define PRFM10 0 -#define PRFM11 1 -#define PRFM12 2 -#define PAOC1 3 -#define PFLTE1 4 -#define PELEV1 5 -#define PISEL1 6 -#define POVEN1 7 - -#define PMIC2 _SFR_MEM8(0xBA) -#define PRFM20 0 -#define PRFM21 1 -#define PRFM22 2 -#define PAOC2 3 -#define PFLTE2 4 -#define PELEV2 5 -#define PISEL2 6 -#define POVEN2 7 - -#define PIM _SFR_MEM8(0xBB) -#define PEOPE 0 -#define PEVE0 1 -#define PEVE1 2 -#define PEVE2 3 - -#define PIFR _SFR_MEM8(0xBC) -#define PEOP 0 -#define PEV0 1 -#define PEV1 2 -#define PEV2 3 - -#define LINCR _SFR_MEM8(0xC8) -#define LCMD0 0 -#define LCMD1 1 -#define LCMD2 2 -#define LENA 3 -#define LCONF0 4 -#define LCONF1 5 -#define LIN13 6 -#define LSWRES 7 - -#define LINSIR _SFR_MEM8(0xC9) -#define LRXOK 0 -#define LTXOK 1 -#define LIDOK 2 -#define LERR 3 -#define LBUSY 4 -#define LIDST0 5 -#define LIDST1 6 -#define LIDST2 7 - -#define LINENIR _SFR_MEM8(0xCA) -#define LENRXOK 0 -#define LENTXOK 1 -#define LENIDOK 2 -#define LENERR 3 - -#define LINERR _SFR_MEM8(0xCB) -#define LBERR 0 -#define LCERR 1 -#define LPERR 2 -#define LSERR 3 -#define LFERR 4 -#define LOVERR 5 -#define LTOERR 6 -#define LABORT 7 - -#define LINBTR _SFR_MEM8(0xCC) -#define LBT0 0 -#define LBT1 1 -#define LBT2 2 -#define LBT3 3 -#define LBT4 4 -#define LBT5 5 -#define LDISR 7 - -#define LINBRR _SFR_MEM16(0xCD) - -#define LINBRRL _SFR_MEM8(0xCD) -#define LDIV0 0 -#define LDIV1 1 -#define LDIV2 2 -#define LDIV3 3 -#define LDIV4 4 -#define LDIV5 5 -#define LDIV6 6 -#define LDIV7 7 - -#define LINBRRH _SFR_MEM8(0xCE) -#define LDIV8 0 -#define LDIV9 1 -#define LDIV10 2 -#define LDIV11 3 - -#define LINDLR _SFR_MEM8(0xCF) -#define LRXDL0 0 -#define LRXDL1 1 -#define LRXDL2 2 -#define LRXDL3 3 -#define LTXDL0 4 -#define LTXDL1 5 -#define LTXDL2 6 -#define LTXDL3 7 - -#define LINIDR _SFR_MEM8(0xD0) -#define LID0 0 -#define LID1 1 -#define LID2 2 -#define LID3 3 -#define LID4 4 -#define LID5 5 -#define LP0 6 -#define LP1 7 - -#define LINSEL _SFR_MEM8(0xD1) -#define LINDX0 0 -#define LINDX1 1 -#define LINDX2 2 -#define LAINC 3 - -#define LINDAT _SFR_MEM8(0xD2) -#define LDATA0 0 -#define LDATA1 1 -#define LDATA2 2 -#define LDATA3 3 -#define LDATA4 4 -#define LDATA5 5 -#define LDATA6 6 -#define LDATA7 7 - -#define CANGCON _SFR_MEM8(0xD8) -#define SWRES 0 -#define ENASTB 1 -#define TEST 2 -#define LISTEN 3 -#define SYNTTC 4 -#define TTC 5 -#define OVRQ 6 -#define ABRQ 7 - -#define CANGSTA _SFR_MEM8(0xD9) -#define ERRP 0 -#define BOFF 1 -#define ENFG 2 -#define RXBSY 3 -#define TXBSY 4 -#define OVFG 6 - -#define CANGIT _SFR_MEM8(0xDA) -#define AERG 0 -#define FERG 1 -#define CERG 2 -#define SERG 3 -#define BXOK 4 -#define OVRTIM 5 -#define BOFFIT 6 -#define CANIT 7 - -#define CANGIE _SFR_MEM8(0xDB) -#define ENOVRT 0 -#define ENERG 1 -#define ENBX 2 -#define ENERR 3 -#define ENTX 4 -#define ENRX 5 -#define ENBOFF 6 -#define ENIT 7 - -#define CANEN2 _SFR_MEM8(0xDC) -#define ENMOB0 0 -#define ENMOB1 1 -#define ENMOB2 2 -#define ENMOB3 3 -#define ENMOB4 4 -#define ENMOB5 5 - -#define CANEN1 _SFR_MEM8(0xDD) - -#define CANIE2 _SFR_MEM8(0xDE) -#define IEMOB0 0 -#define IEMOB1 1 -#define IEMOB2 2 -#define IEMOB3 3 -#define IEMOB4 4 -#define IEMOB5 5 - -#define CANIE1 _SFR_MEM8(0xDF) - -#define CANSIT2 _SFR_MEM8(0xE0) -#define SIT0 0 -#define SIT1 1 -#define SIT2 2 -#define SIT3 3 -#define SIT4 4 -#define SIT5 5 - -#define CANSIT1 _SFR_MEM8(0xE1) - -#define CANBT1 _SFR_MEM8(0xE2) -#define BRP0 1 -#define BRP1 2 -#define BRP2 3 -#define BRP3 4 -#define BRP4 5 -#define BRP5 6 - -#define CANBT2 _SFR_MEM8(0xE3) -#define PRS0 1 -#define PRS1 2 -#define PRS2 3 -#define SJW0 5 -#define SJW1 6 - -#define CANBT3 _SFR_MEM8(0xE4) -#define SMP 0 -#define PHS10 1 -#define PHS11 2 -#define PHS12 3 -#define PHS20 4 -#define PHS21 5 -#define PHS22 6 - -#define CANTCON _SFR_MEM8(0xE5) - -#define CANTIML _SFR_MEM8(0xE6) - -#define CANTIMH _SFR_MEM8(0xE7) - -#define CANTTCL _SFR_MEM8(0xE8) - -#define CANTTCH _SFR_MEM8(0xE9) - -#define CANTEC _SFR_MEM8(0xEA) - -#define CANREC _SFR_MEM8(0xEB) - -#define CANHPMOB _SFR_MEM8(0xEC) -#define CGP0 0 -#define CGP1 1 -#define CGP2 2 -#define CGP3 3 -#define HPMOB0 4 -#define HPMOB1 5 -#define HPMOB2 6 -#define HPMOB3 7 - -#define CANPAGE _SFR_MEM8(0xED) -#define INDX0 0 -#define INDX1 1 -#define INDX2 2 -#define AINC 3 -#define MOBNB0 4 -#define MOBNB1 5 -#define MOBNB2 6 -#define MOBNB3 7 - -#define CANSTMOB _SFR_MEM8(0xEE) -#define AERR 0 -#define FERR 1 -#define CERR 2 -#define SERR 3 -#define BERR 4 -#define RXOK 5 -#define TXOK 6 -#define DLCW 7 - -#define CANCDMOB _SFR_MEM8(0xEF) -#define DLC0 0 -#define DLC1 1 -#define DLC2 2 -#define DLC3 3 -#define IDE 4 -#define RPLV 5 -#define CONMOB0 6 -#define CONMOB1 7 - -#define CANIDT4 _SFR_MEM8(0xF0) -#define RB0TAG 0 -#define RB1TAG 1 -#define RTRTAG 2 -#define IDT0 3 -#define IDT1 4 -#define IDT2 5 -#define IDT3 6 -#define IDT4 7 - -#define CANIDT3 _SFR_MEM8(0xF1) -#define IDT5 0 -#define IDT6 1 -#define IDT7 2 -#define IDT8 3 -#define IDT9 4 -#define IDT10 5 -#define IDT11 6 -#define IDT12 7 - -#define CANIDT2 _SFR_MEM8(0xF2) -#define IDT13 0 -#define IDT14 1 -#define IDT15 2 -#define IDT16 3 -#define IDT17 4 -#define IDT18 5 -#define IDT19 6 -#define IDT20 7 - -#define CANIDT1 _SFR_MEM8(0xF3) -#define IDT21 0 -#define IDT22 1 -#define IDT23 2 -#define IDT24 3 -#define IDT25 4 -#define IDT26 5 -#define IDT27 6 -#define IDT28 7 - -#define CANIDM4 _SFR_MEM8(0xF4) -#define IDEMSK 0 -#define RTRMSK 2 -#define IDMSK0 3 -#define IDMSK1 4 -#define IDMSK2 5 -#define IDMSK3 6 -#define IDMSK4 7 - -#define CANIDM3 _SFR_MEM8(0xF5) -#define IDMSK5 0 -#define IDMSK6 1 -#define IDMSK7 2 -#define IDMSK8 3 -#define IDMSK9 4 -#define IDMSK10 5 -#define IDMSK11 6 -#define IDMSK12 7 - -#define CANIDM2 _SFR_MEM8(0xF6) -#define IDMSK13 0 -#define IDMSK14 1 -#define IDMSK15 2 -#define IDMSK16 3 -#define IDMSK17 4 -#define IDMSK18 5 -#define IDMSK19 6 -#define IDMSK20 7 - -#define CANIDM1 _SFR_MEM8(0xF7) -#define IDMSK21 0 -#define IDMSK22 1 -#define IDMSK23 2 -#define IDMSK24 3 -#define IDMSK25 4 -#define IDMSK26 5 -#define IDMSK27 6 -#define IDMSK28 7 - -#define CANSTML _SFR_MEM8(0xF8) - -#define CANSTMH _SFR_MEM8(0xF9) - -#define CANMSG _SFR_MEM8(0xFA) - - - -/* Interrupt Vectors */ -/* Interrupt Vector 0 is the reset vector. */ -#define ANACOMP0_vect _VECTOR(1) /* Analog Comparator 0 */ -#define ANACOMP1_vect _VECTOR(2) /* Analog Comparator 1 */ -#define ANACOMP2_vect _VECTOR(3) /* Analog Comparator 2 */ -#define ANACOMP3_vect _VECTOR(4) /* Analog Comparator 3 */ -#define PSC_FAULT_vect _VECTOR(5) /* PSC Fault */ -#define PSC_EC_vect _VECTOR(6) /* PSC End of Cycle */ -#define INT0_vect _VECTOR(7) /* External Interrupt Request 0 */ -#define INT1_vect _VECTOR(8) /* External Interrupt Request 1 */ -#define INT2_vect _VECTOR(9) /* External Interrupt Request 2 */ -#define INT3_vect _VECTOR(10) /* External Interrupt Request 3 */ -#define TIMER1_CAPT_vect _VECTOR(11) /* Timer/Counter1 Capture Event */ -#define TIMER1_COMPA_vect _VECTOR(12) /* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPB_vect _VECTOR(13) /* Timer/Counter1 Compare Match B */ -#define TIMER1_OVF_vect _VECTOR(14) /* Timer1/Counter1 Overflow */ -#define TIMER0_COMPA_vect _VECTOR(15) /* Timer/Counter0 Compare Match A */ -#define TIMER0_COMPB_vect _VECTOR(16) /* Timer/Counter0 Compare Match B */ -#define TIMER0_OVF_vect _VECTOR(17) /* Timer/Counter0 Overflow */ -#define CAN_INT_vect _VECTOR(18) /* CAN MOB, Burst, General Errors */ -#define CAN_TOVF_vect _VECTOR(19) /* CAN Timer Overflow */ -#define LIN_TC_vect _VECTOR(20) /* LIN Transfer Complete */ -#define LIN_ERR_vect _VECTOR(21) /* LIN Error */ -#define PCINT0_vect _VECTOR(22) /* Pin Change Interrupt Request 0 */ -#define PCINT1_vect _VECTOR(23) /* Pin Change Interrupt Request 1 */ -#define PCINT2_vect _VECTOR(24) /* Pin Change Interrupt Request 2 */ -#define PCINT3_vect _VECTOR(25) /* Pin Change Interrupt Request 3 */ -#define SPI_STC_vect _VECTOR(26) /* SPI Serial Transfer Complete */ -#define ADC_vect _VECTOR(27) /* ADC Conversion Complete */ -#define WDT_vect _VECTOR(28) /* Watchdog Time-Out Interrupt */ -#define EE_READY_vect _VECTOR(29) /* EEPROM Ready */ -#define SPM_READY_vect _VECTOR(30) /* Store Program Memory Read */ - -#define _VECTORS_SIZE (31 * 4) - - -/* Constants */ -#define SPM_PAGESIZE (64) -#define RAMSTART (0x100) -#define RAMSIZE (0x800) -#define RAMEND (RAMSTART + RAMSIZE - 1) /* Last On-Chip SRAM Location */ -#define XRAMSIZE (0) -#define XRAMEND (RAMEND + XRAMSIZE) -#define E2END (0x3FF) -#define E2PAGESIZE (4) -#define FLASHEND (0x7FFF) - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) /* Select Clock Source */ -#define FUSE_CKSEL1 (unsigned char)~_BV(1) /* Select Clock Source */ -#define FUSE_CKSEL2 (unsigned char)~_BV(2) /* Select Clock Source */ -#define FUSE_CKSEL3 (unsigned char)~_BV(3) /* Select Clock Source */ -#define FUSE_SUT0 (unsigned char)~_BV(4) /* Select start-up time */ -#define FUSE_SUT1 (unsigned char)~_BV(5) /* Select start-up time */ -#define FUSE_CKOUT (unsigned char)~_BV(6) /* Oscillator output option */ -#define FUSE_CKDIV8 (unsigned char)~_BV(7) /* Divide clock by 8 */ -#define LFUSE_DEFAULT (FUSE_CKSEL1 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_SUT1 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) /* Select Reset Vector */ -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) /* Select Boot Size */ -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) /* Select Boot Size */ -#define FUSE_EESAVE (unsigned char)~_BV(3) /* EEPROM memory is preserved through chip erase */ -#define FUSE_WDTON (unsigned char)~_BV(4) /* Watchdog timer always on */ -#define FUSE_SPIEN (unsigned char)~_BV(5) /* Enable Serial programming and Data Downloading */ -#define FUSE_DWEN (unsigned char)~_BV(6) /* debugWIRE Enable */ -#define FUSE_RSTDISBL (unsigned char)~_BV(7) /* External Reset Disable */ -#define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_SPIEN) - -/* Extended Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) /* Brown-out Detector Trigger Level */ -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) /* Brown-out Detector Trigger Level */ -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) /* Brown-out Detector Trigger Level */ -#define FUSE_PSCRVB (unsigned char)~_BV(3) /* PSC Outputs xB Reset Value */ -#define FUSE_PSCRVA (unsigned char)~_BV(4) /* PSC Outputs xA Reset Value */ -#define FUSE_PSCRB (unsigned char)~_BV(5) /* PSC Reset Behavior */ -#define EFUSE_DEFAULT (FUSE_BODLEVEL1 & FUSE_BODLEVEL2) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x95 -#define SIGNATURE_2 0x84 - - -#endif /* _AVR_IOM32M1_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom32u4.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom32u4.h deleted file mode 100644 index ca351f8ba..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom32u4.h +++ /dev/null @@ -1,1504 +0,0 @@ -/* Copyright (c) 2008 Atmel Corporation - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. -*/ - -/* $Id: iom32u4.h,v 1.1.2.10 2008/08/06 22:45:06 arcanum Exp $ */ - -/* avr/iom32u4.h - definitions for ATmega32U4. */ - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iom32u4.h" -#else -# error "Attempt to include more than one file." -#endif - - -#ifndef _AVR_IOM32U4_H_ -#define _AVR_IOM32U4_H_ 1 - - -/* Registers and associated bit numbers */ - -#define PINB _SFR_IO8(0x03) -#define PINB0 0 -#define PINB1 1 -#define PINB2 2 -#define PINB3 3 -#define PINB4 4 -#define PINB5 5 -#define PINB6 6 -#define PINB7 7 - -#define DDRB _SFR_IO8(0x04) -#define DDB0 0 -#define DDB1 1 -#define DDB2 2 -#define DDB3 3 -#define DDB4 4 -#define DDB5 5 -#define DDB6 6 -#define DDB7 7 - -#define PORTB _SFR_IO8(0x05) -#define PORTB0 0 -#define PORTB1 1 -#define PORTB2 2 -#define PORTB3 3 -#define PORTB4 4 -#define PORTB5 5 -#define PORTB6 6 -#define PORTB7 7 - -#define PINC _SFR_IO8(0x06) -#define PINC6 6 -#define PINC7 7 - -#define DDRC _SFR_IO8(0x07) -#define DDC6 6 -#define DDC7 7 - -#define PORTC _SFR_IO8(0x08) -#define PORTC6 6 -#define PORTC7 7 - -#define PIND _SFR_IO8(0x09) -#define PIND0 0 -#define PIND1 1 -#define PIND2 2 -#define PIND3 3 -#define PIND4 4 -#define PIND5 5 -#define PIND6 6 -#define PIND7 7 - -#define DDRD _SFR_IO8(0x0A) -#define DDD0 0 -#define DDD1 1 -#define DDD2 2 -#define DDD3 3 -#define DDD4 4 -#define DDD5 5 -#define DDD6 6 -#define DDD7 7 - -#define PORTD _SFR_IO8(0x0B) -#define PORTD0 0 -#define PORTD1 1 -#define PORTD2 2 -#define PORTD3 3 -#define PORTD4 4 -#define PORTD5 5 -#define PORTD6 6 -#define PORTD7 7 - -#define PINE _SFR_IO8(0x0C) -#define PINE2 2 -#define PINE6 6 - -#define DDRE _SFR_IO8(0x0D) -#define DDE2 2 -#define DDE6 6 - -#define PORTE _SFR_IO8(0x0E) -#define PORTE2 2 -#define PORTE6 6 - -#define PINF _SFR_IO8(0x0F) -#define PINF0 0 -#define PINF1 1 -#define PINF4 4 -#define PINF5 5 -#define PINF6 6 -#define PINF7 7 - -#define DDRF _SFR_IO8(0x10) -#define DDF0 0 -#define DDF1 1 -#define DDF4 4 -#define DDF5 5 -#define DDF6 6 -#define DDF7 7 - -#define PORTF _SFR_IO8(0x11) -#define PORTF0 0 -#define PORTF1 1 -#define PORTF4 4 -#define PORTF5 5 -#define PORTF6 6 -#define PORTF7 7 - -#define TIFR0 _SFR_IO8(0x15) -#define TOV0 0 -#define OCF0A 1 -#define OCF0B 2 - -#define TIFR1 _SFR_IO8(0x16) -#define TOV1 0 -#define OCF1A 1 -#define OCF1B 2 -#define OCF1C 3 -#define ICF1 5 - -#define TIFR2 _SFR_IO8(0x17) -#define TOV2 0 -#define OCF2A 1 -#define OCF2B 2 - -#define TIFR3 _SFR_IO8(0x18) -#define TOV3 0 -#define OCF3A 1 -#define OCF3B 2 -#define OCF3C 3 -#define ICF3 5 - -#define TIFR4 _SFR_IO8(0x19) -#define TOV4 2 -#define OCF4B 5 -#define OCF4A 6 -#define OCF4D 7 - -#define TIFR5 _SFR_IO8(0x1A) - -#define PCIFR _SFR_IO8(0x1B) -#define PCIF0 0 - -#define EIFR _SFR_IO8(0x1C) -#define INTF0 0 -#define INTF1 1 -#define INTF2 2 -#define INTF3 3 -#define INTF4 4 -#define INTF5 5 -#define INTF6 6 -#define INTF7 7 - -#define EIMSK _SFR_IO8(0x1D) -#define INT0 0 -#define INT1 1 -#define INT2 2 -#define INT3 3 -#define INT4 4 -#define INT5 5 -#define INT6 6 -#define INT7 7 - -#define GPIOR0 _SFR_IO8(0x1E) -#define GPIOR00 0 -#define GPIOR01 1 -#define GPIOR02 2 -#define GPIOR03 3 -#define GPIOR04 4 -#define GPIOR05 5 -#define GPIOR06 6 -#define GPIOR07 7 - -#define EECR _SFR_IO8(0x1F) -#define EERE 0 -#define EEPE 1 -#define EEMPE 2 -#define EERIE 3 -#define EEPM0 4 -#define EEPM1 5 - -#define EEDR _SFR_IO8(0x20) -#define EEDR0 0 -#define EEDR1 1 -#define EEDR2 2 -#define EEDR3 3 -#define EEDR4 4 -#define EEDR5 5 -#define EEDR6 6 -#define EEDR7 7 - -#define EEAR _SFR_IO16(0x21) - -#define EEARL _SFR_IO8(0x21) -#define EEAR0 0 -#define EEAR1 1 -#define EEAR2 2 -#define EEAR3 3 -#define EEAR4 4 -#define EEAR5 5 -#define EEAR6 6 -#define EEAR7 7 - -#define EEARH _SFR_IO8(0x22) -#define EEAR8 0 -#define EEAR9 1 -#define EEAR10 2 -#define EEAR11 3 - -#define GTCCR _SFR_IO8(0x23) -#define PSRSYNC 0 -#define PSRASY 1 -#define TSM 7 - -#define TCCR0A _SFR_IO8(0x24) -#define WGM00 0 -#define WGM01 1 -#define COM0B0 4 -#define COM0B1 5 -#define COM0A0 6 -#define COM0A1 7 - -#define TCCR0B _SFR_IO8(0x25) -#define CS00 0 -#define CS01 1 -#define CS02 2 -#define WGM02 3 -#define FOC0B 6 -#define FOC0A 7 - -#define TCNT0 _SFR_IO8(0x26) -#define TCNT0_0 0 -#define TCNT0_1 1 -#define TCNT0_2 2 -#define TCNT0_3 3 -#define TCNT0_4 4 -#define TCNT0_5 5 -#define TCNT0_6 6 -#define TCNT0_7 7 - -#define OCR0A _SFR_IO8(0x27) -#define OCR0A_0 0 -#define OCR0A_1 1 -#define OCR0A_2 2 -#define OCR0A_3 3 -#define OCR0A_4 4 -#define OCR0A_5 5 -#define OCR0A_6 6 -#define OCR0A_7 7 - -#define OCR0B _SFR_IO8(0x28) -#define OCR0B_0 0 -#define OCR0B_1 1 -#define OCR0B_2 2 -#define OCR0B_3 3 -#define OCR0B_4 4 -#define OCR0B_5 5 -#define OCR0B_6 6 -#define OCR0B_7 7 - -#define PLLCSR _SFR_IO8(0x29) -#define PLOCK 0 -#define PLLE 1 -#define PINDIV 4 - -#define GPIOR1 _SFR_IO8(0x2A) -#define GPIOR10 0 -#define GPIOR11 1 -#define GPIOR12 2 -#define GPIOR13 3 -#define GPIOR14 4 -#define GPIOR15 5 -#define GPIOR16 6 -#define GPIOR17 7 - -#define GPIOR2 _SFR_IO8(0x2B) -#define GPIOR20 0 -#define GPIOR21 1 -#define GPIOR22 2 -#define GPIOR23 3 -#define GPIOR24 4 -#define GPIOR25 5 -#define GPIOR26 6 -#define GPIOR27 7 - -#define SPCR _SFR_IO8(0x2C) -#define SPR0 0 -#define SPR1 1 -#define CPHA 2 -#define CPOL 3 -#define MSTR 4 -#define DORD 5 -#define SPE 6 -#define SPIE 7 - -#define SPSR _SFR_IO8(0x2D) -#define SPI2X 0 -#define WCOL 6 -#define SPIF 7 - -#define SPDR _SFR_IO8(0x2E) -#define SPDR0 0 -#define SPDR1 1 -#define SPDR2 2 -#define SPDR3 3 -#define SPDR4 4 -#define SPDR5 5 -#define SPDR6 6 -#define SPDR7 7 - -#define ACSR _SFR_IO8(0x30) -#define ACIS0 0 -#define ACIS1 1 -#define ACIC 2 -#define ACIE 3 -#define ACI 4 -#define ACO 5 -#define ACBG 6 -#define ACD 7 - -#define OCDR _SFR_IO8(0x31) -#define OCDR0 0 -#define OCDR1 1 -#define OCDR2 2 -#define OCDR3 3 -#define OCDR4 4 -#define OCDR5 5 -#define OCDR6 6 -#define OCDR7 7 - -#define PLLFRQ _SFR_IO8(0x32) -#define PDIV0 0 -#define PDIV1 1 -#define PDIV2 2 -#define PDIV3 3 -#define PLLTM0 4 -#define PLLTM1 5 -#define PLLUSB 6 -#define PINMUX 7 - -#define SMCR _SFR_IO8(0x33) -#define SE 0 -#define SM0 1 -#define SM1 2 -#define SM2 3 - -#define MCUSR _SFR_IO8(0x34) -#define PORF 0 -#define EXTRF 1 -#define BORF 2 -#define WDRF 3 -#define JTRF 4 - -#define MCUCR _SFR_IO8(0x35) -#define IVCE 0 -#define IVSEL 1 -#define PUD 4 -#define JTD 7 - -#define SPMCSR _SFR_IO8(0x37) -#define SPMEN 0 -#define PGERS 1 -#define PGWRT 2 -#define BLBSET 3 -#define RWWSRE 4 -#define SIGRD 5 -#define RWWSB 6 -#define SPMIE 7 - -#define RAMPZ _SFR_IO8(0x3B) -#define RAMPZ0 0 - -#define EIND _SFR_IO8(0x3C) -#define EIND0 0 - -#define WDTCSR _SFR_MEM8(0x60) -#define WDP0 0 -#define WDP1 1 -#define WDP2 2 -#define WDE 3 -#define WDCE 4 -#define WDP3 5 -#define WDIE 6 -#define WDIF 7 - -#define CLKPR _SFR_MEM8(0x61) -#define CLKPS0 0 -#define CLKPS1 1 -#define CLKPS2 2 -#define CLKPS3 3 -#define CLKPCE 7 - -#define PRR0 _SFR_MEM8(0x64) -#define PRADC 0 -#define PRUSART0 1 -#define PRSPI 2 -#define PRTIM1 3 -#define PRTIM0 5 -#define PRTIM2 6 -#define PRTWI 7 - -#define PRR1 _SFR_MEM8(0x65) -#define PRUSART1 0 -#define PRTIM3 3 -#define PRUSB 7 - -#define OSCCAL _SFR_MEM8(0x66) -#define CAL0 0 -#define CAL1 1 -#define CAL2 2 -#define CAL3 3 -#define CAL4 4 -#define CAL5 5 -#define CAL6 6 -#define CAL7 7 - -#define RCCTRL _SFR_MEM8(0x67) -#define RCFREQ 0 - -#define PCICR _SFR_MEM8(0x68) -#define PCIE0 0 - -#define EICRA _SFR_MEM8(0x69) -#define ISC00 0 -#define ISC01 1 -#define ISC10 2 -#define ISC11 3 -#define ISC20 4 -#define ISC21 5 -#define ISC30 6 -#define ISC31 7 - -#define EICRB _SFR_MEM8(0x6A) -#define ISC40 0 -#define ISC41 1 -#define ISC50 2 -#define ISC51 3 -#define ISC60 4 -#define ISC61 5 -#define ISC70 6 -#define ISC71 7 - -#define PCMSK0 _SFR_MEM8(0x6B) -#define PCINT0 0 -#define PCINT1 1 -#define PCINT2 2 -#define PCINT3 3 -#define PCINT4 4 -#define PCINT5 5 -#define PCINT6 6 -#define PCINT7 7 - -#define PCMSK1 _SFR_MEM8(0x6C) - -#define PCMSK2 _SFR_MEM8(0x6D) - -#define TIMSK0 _SFR_MEM8(0x6E) -#define TOIE0 0 -#define OCIE0A 1 -#define OCIE0B 2 - -#define TIMSK1 _SFR_MEM8(0x6F) -#define TOIE1 0 -#define OCIE1A 1 -#define OCIE1B 2 -#define OCIE1C 3 -#define ICIE1 5 - -#define TIMSK2 _SFR_MEM8(0x70) -#define TOIE2 0 -#define OCIE2A 1 -#define OCIE2B 2 - -#define TIMSK3 _SFR_MEM8(0x71) -#define TOIE3 0 -#define OCIE3A 1 -#define OCIE3B 2 -#define OCIE3C 3 -#define ICIE3 5 - -#define TIMSK4 _SFR_MEM8(0x72) -#define TOIE4 2 -#define OCIE4B 5 -#define OCIE4A 6 -#define OCIE4D 7 - -#define TIMSK5 _SFR_MEM8(0x73) - -#define ADC _SFR_MEM16(0x78) - -#define ADCL _SFR_MEM8(0x78) -#define ADCL0 0 -#define ADCL1 1 -#define ADCL2 2 -#define ADCL3 3 -#define ADCL4 4 -#define ADCL5 5 -#define ADCL6 6 -#define ADCL7 7 - -#define ADCH _SFR_MEM8(0x79) -#define ADCH0 0 -#define ADCH1 1 -#define ADCH2 2 -#define ADCH3 3 -#define ADCH4 4 -#define ADCH5 5 -#define ADCH6 6 -#define ADCH7 7 - -#define ADCSRA _SFR_MEM8(0x7A) -#define ADPS0 0 -#define ADPS1 1 -#define ADPS2 2 -#define ADIE 3 -#define ADIF 4 -#define ADATE 5 -#define ADSC 6 -#define ADEN 7 - -#define ADCSRB _SFR_MEM8(0x7B) -#define ADTS0 0 -#define ADTS1 1 -#define ADTS2 2 -#define ADTS3 4 -#define MUX5 5 -#define ACME 6 -#define ADHSM 7 - -#define ADMUX _SFR_MEM8(0x7C) -#define MUX0 0 -#define MUX1 1 -#define MUX2 2 -#define MUX3 3 -#define MUX4 4 -#define ADLAR 5 -#define REFS0 6 -#define REFS1 7 - -#define DIDR2 _SFR_MEM8(0x7D) -#define ADC8D 0 -#define ADC9D 1 -#define ADC10D 2 -#define ADC11D 3 -#define ADC12D 4 -#define ADC13D 5 - -#define DIDR0 _SFR_MEM8(0x7E) -#define ADC0D 0 -#define ADC1D 1 -#define ADC2D 2 -#define ADC3D 3 -#define ADC4D 4 -#define ADC5D 5 -#define ADC6D 6 -#define ADC7D 7 - -#define DIDR1 _SFR_MEM8(0x7F) -#define AIN0D 0 -#define AIN1D 1 - -#define TCCR1A _SFR_MEM8(0x80) -#define WGM10 0 -#define WGM11 1 -#define COM1C0 2 -#define COM1C1 3 -#define COM1B0 4 -#define COM1B1 5 -#define COM1A0 6 -#define COM1A1 7 - -#define TCCR1B _SFR_MEM8(0x81) -#define CS10 0 -#define CS11 1 -#define CS12 2 -#define WGM12 3 -#define WGM13 4 -#define ICES1 6 -#define ICNC1 7 - -#define TCCR1C _SFR_MEM8(0x82) -#define FOC1C 5 -#define FOC1B 6 -#define FOC1A 7 - -#define TCNT1 _SFR_MEM16(0x84) - -#define TCNT1L _SFR_MEM8(0x84) -#define TCNT1L0 0 -#define TCNT1L1 1 -#define TCNT1L2 2 -#define TCNT1L3 3 -#define TCNT1L4 4 -#define TCNT1L5 5 -#define TCNT1L6 6 -#define TCNT1L7 7 - -#define TCNT1H _SFR_MEM8(0x85) -#define TCNT1H0 0 -#define TCNT1H1 1 -#define TCNT1H2 2 -#define TCNT1H3 3 -#define TCNT1H4 4 -#define TCNT1H5 5 -#define TCNT1H6 6 -#define TCNT1H7 7 - -#define ICR1 _SFR_MEM16(0x86) - -#define ICR1L _SFR_MEM8(0x86) -#define ICR1L0 0 -#define ICR1L1 1 -#define ICR1L2 2 -#define ICR1L3 3 -#define ICR1L4 4 -#define ICR1L5 5 -#define ICR1L6 6 -#define ICR1L7 7 - -#define ICR1H _SFR_MEM8(0x87) -#define ICR1H0 0 -#define ICR1H1 1 -#define ICR1H2 2 -#define ICR1H3 3 -#define ICR1H4 4 -#define ICR1H5 5 -#define ICR1H6 6 -#define ICR1H7 7 - -#define OCR1A _SFR_MEM16(0x88) - -#define OCR1AL _SFR_MEM8(0x88) -#define OCR1AL0 0 -#define OCR1AL1 1 -#define OCR1AL2 2 -#define OCR1AL3 3 -#define OCR1AL4 4 -#define OCR1AL5 5 -#define OCR1AL6 6 -#define OCR1AL7 7 - -#define OCR1AH _SFR_MEM8(0x89) -#define OCR1AH0 0 -#define OCR1AH1 1 -#define OCR1AH2 2 -#define OCR1AH3 3 -#define OCR1AH4 4 -#define OCR1AH5 5 -#define OCR1AH6 6 -#define OCR1AH7 7 - -#define OCR1B _SFR_MEM16(0x8A) - -#define OCR1BL _SFR_MEM8(0x8A) -#define OCR1BL0 0 -#define OCR1BL1 1 -#define OCR1BL2 2 -#define OCR1BL3 3 -#define OCR1BL4 4 -#define OCR1BL5 5 -#define OCR1BL6 6 -#define OCR1BL7 7 - -#define OCR1BH _SFR_MEM8(0x8B) -#define OCR1BH0 0 -#define OCR1BH1 1 -#define OCR1BH2 2 -#define OCR1BH3 3 -#define OCR1BH4 4 -#define OCR1BH5 5 -#define OCR1BH6 6 -#define OCR1BH7 7 - -#define OCR1C _SFR_MEM16(0x8C) - -#define OCR1CL _SFR_MEM8(0x8C) -#define OCR1CL0 0 -#define OCR1CL1 1 -#define OCR1CL2 2 -#define OCR1CL3 3 -#define OCR1CL4 4 -#define OCR1CL5 5 -#define OCR1CL6 6 -#define OCR1CL7 7 - -#define OCR1CH _SFR_MEM8(0x8D) -#define OCR1CH0 0 -#define OCR1CH1 1 -#define OCR1CH2 2 -#define OCR1CH3 3 -#define OCR1CH4 4 -#define OCR1CH5 5 -#define OCR1CH6 6 -#define OCR1CH7 7 - -#define TCCR3A _SFR_MEM8(0x90) -#define WGM30 0 -#define WGM31 1 -#define COM3C0 2 -#define COM3C1 3 -#define COM3B0 4 -#define COM3B1 5 -#define COM3A0 6 -#define COM3A1 7 - -#define TCCR3B _SFR_MEM8(0x91) -#define CS30 0 -#define CS31 1 -#define CS32 2 -#define WGM32 3 -#define WGM33 4 -#define ICES3 6 -#define ICNC3 7 - -#define TCCR3C _SFR_MEM8(0x92) -#define FOC3C 5 -#define FOC3B 6 -#define FOC3A 7 - -#define TCNT3 _SFR_MEM16(0x94) - -#define TCNT3L _SFR_MEM8(0x94) -#define TCNT3L0 0 -#define TCNT3L1 1 -#define TCNT3L2 2 -#define TCNT3L3 3 -#define TCNT3L4 4 -#define TCNT3L5 5 -#define TCNT3L6 6 -#define TCNT3L7 7 - -#define TCNT3H _SFR_MEM8(0x95) -#define TCNT3H0 0 -#define TCNT3H1 1 -#define TCNT3H2 2 -#define TCNT3H3 3 -#define TCNT3H4 4 -#define TCNT3H5 5 -#define TCNT3H6 6 -#define TCNT3H7 7 - -#define ICR3 _SFR_MEM16(0x96) - -#define ICR3L _SFR_MEM8(0x96) -#define ICR3L0 0 -#define ICR3L1 1 -#define ICR3L2 2 -#define ICR3L3 3 -#define ICR3L4 4 -#define ICR3L5 5 -#define ICR3L6 6 -#define ICR3L7 7 - -#define ICR3H _SFR_MEM8(0x97) -#define ICR3H0 0 -#define ICR3H1 1 -#define ICR3H2 2 -#define ICR3H3 3 -#define ICR3H4 4 -#define ICR3H5 5 -#define ICR3H6 6 -#define ICR3H7 7 - -#define OCR3A _SFR_MEM16(0x98) - -#define OCR3AL _SFR_MEM8(0x98) -#define OCR3AL0 0 -#define OCR3AL1 1 -#define OCR3AL2 2 -#define OCR3AL3 3 -#define OCR3AL4 4 -#define OCR3AL5 5 -#define OCR3AL6 6 -#define OCR3AL7 7 - -#define OCR3AH _SFR_MEM8(0x99) -#define OCR3AH0 0 -#define OCR3AH1 1 -#define OCR3AH2 2 -#define OCR3AH3 3 -#define OCR3AH4 4 -#define OCR3AH5 5 -#define OCR3AH6 6 -#define OCR3AH7 7 - -#define OCR3B _SFR_MEM16(0x9A) - -#define OCR3BL _SFR_MEM8(0x9A) -#define OCR3BL0 0 -#define OCR3BL1 1 -#define OCR3BL2 2 -#define OCR3BL3 3 -#define OCR3BL4 4 -#define OCR3BL5 5 -#define OCR3BL6 6 -#define OCR3BL7 7 - -#define OCR3BH _SFR_MEM8(0x9B) -#define OCR3BH0 0 -#define OCR3BH1 1 -#define OCR3BH2 2 -#define OCR3BH3 3 -#define OCR3BH4 4 -#define OCR3BH5 5 -#define OCR3BH6 6 -#define OCR3BH7 7 - -#define OCR3C _SFR_MEM16(0x9C) - -#define OCR3CL _SFR_MEM8(0x9C) -#define OCR3CL0 0 -#define OCR3CL1 1 -#define OCR3CL2 2 -#define OCR3CL3 3 -#define OCR3CL4 4 -#define OCR3CL5 5 -#define OCR3CL6 6 -#define OCR3CL7 7 - -#define OCR3CH _SFR_MEM8(0x9D) -#define OCR3CH0 0 -#define OCR3CH1 1 -#define OCR3CH2 2 -#define OCR3CH3 3 -#define OCR3CH4 4 -#define OCR3CH5 5 -#define OCR3CH6 6 -#define OCR3CH7 7 - -#define UHCON _SFR_MEM8(0x9E) - -#define UHINT _SFR_MEM8(0x9F) - -#define UHIEN _SFR_MEM8(0xA0) - -#define UHADDR _SFR_MEM8(0xA1) - -#define UHFNUM _SFR_MEM16(0xA2) - -#define UHFNUML _SFR_MEM8(0xA2) - -#define UHFNUMH _SFR_MEM8(0xA3) - -#define UHFLEN _SFR_MEM8(0xA4) - -#define UPINRQX _SFR_MEM8(0xA5) - -#define UPINTX _SFR_MEM8(0xA6) - -#define UPNUM _SFR_MEM8(0xA7) - -#define UPRST _SFR_MEM8(0xA8) - -#define UPCONX _SFR_MEM8(0xA9) - -#define UPCFG0X _SFR_MEM8(0xAA) - -#define UPCFG1X _SFR_MEM8(0xAB) - -#define UPSTAX _SFR_MEM8(0xAC) - -#define UPCFG2X _SFR_MEM8(0xAD) - -#define UPIENX _SFR_MEM8(0xAE) - -#define UPDATX _SFR_MEM8(0xAF) - -#define TCCR2A _SFR_MEM8(0xB0) -#define WGM20 0 -#define WGM21 1 -#define COM2B0 4 -#define COM2B1 5 -#define COM2A0 6 -#define COM2A1 7 - -#define TCCR2B _SFR_MEM8(0xB1) -#define CS20 0 -#define CS21 1 -#define CS22 2 -#define WGM22 3 -#define FOC2B 6 -#define FOC2A 7 - -#define TCNT2 _SFR_MEM8(0xB2) -#define TCNT2_0 0 -#define TCNT2_1 1 -#define TCNT2_2 2 -#define TCNT2_3 3 -#define TCNT2_4 4 -#define TCNT2_5 5 -#define TCNT2_6 6 -#define TCNT2_7 7 - -#define OCR2A _SFR_MEM8(0xB3) -#define OCR2_0 0 -#define OCR2_1 1 -#define OCR2_2 2 -#define OCR2_3 3 -#define OCR2_4 4 -#define OCR2_5 5 -#define OCR2_6 6 -#define OCR2_7 7 - -#define OCR2B _SFR_MEM8(0xB4) -#define OCR2_0 0 -#define OCR2_1 1 -#define OCR2_2 2 -#define OCR2_3 3 -#define OCR2_4 4 -#define OCR2_5 5 -#define OCR2_6 6 -#define OCR2_7 7 - -#define TWBR _SFR_MEM8(0xB8) -#define TWBR0 0 -#define TWBR1 1 -#define TWBR2 2 -#define TWBR3 3 -#define TWBR4 4 -#define TWBR5 5 -#define TWBR6 6 -#define TWBR7 7 - -#define TWSR _SFR_MEM8(0xB9) -#define TWPS0 0 -#define TWPS1 1 -#define TWS3 3 -#define TWS4 4 -#define TWS5 5 -#define TWS6 6 -#define TWS7 7 - -#define TWAR _SFR_MEM8(0xBA) -#define TWGCE 0 -#define TWA0 1 -#define TWA1 2 -#define TWA2 3 -#define TWA3 4 -#define TWA4 5 -#define TWA5 6 -#define TWA6 7 - -#define TWDR _SFR_MEM8(0xBB) -#define TWD0 0 -#define TWD1 1 -#define TWD2 2 -#define TWD3 3 -#define TWD4 4 -#define TWD5 5 -#define TWD6 6 -#define TWD7 7 - -#define TWCR _SFR_MEM8(0xBC) -#define TWIE 0 -#define TWEN 2 -#define TWWC 3 -#define TWSTO 4 -#define TWSTA 5 -#define TWEA 6 -#define TWINT 7 - -#define TWAMR _SFR_MEM8(0xBD) -#define TWAM0 1 -#define TWAM1 2 -#define TWAM2 3 -#define TWAM3 4 -#define TWAM4 5 -#define TWAM5 6 -#define TWAM6 7 - -#define TCNT4 _SFR_MEM16(0xBE) - -#define TCNT4L _SFR_MEM8(0xBE) -#define TC40 0 -#define TC41 1 -#define TC42 2 -#define TC43 3 -#define TC44 4 -#define TC45 5 -#define TC46 6 -#define TC47 7 - -#define TCNT4H _SFR_MEM8(0xBF) /* Alias for naming consistency. */ -#define TC4H _SFR_MEM8(0xBF) /* Per XML device file. */ -#define TC48 0 -#define TC49 1 -#define TC410 2 - -#define TCCR4A _SFR_MEM8(0xC0) -#define PWM4B 0 -#define PWM4A 1 -#define FOC4B 2 -#define FOC4A 3 -#define COM4B0 4 -#define COM4B1 5 -#define COM4A0 6 -#define COM4A1 7 - -#define TCCR4B _SFR_MEM8(0xC1) -#define CS40 0 -#define CS41 1 -#define CS42 2 -#define CS43 3 -#define DTPS40 4 -#define DTPS41 5 -#define PSR4 6 -#define PWM4X 7 - -#define TCCR4C _SFR_MEM8(0xC2) -#define PWM4D 0 -#define FOC4D 1 -#define COM4D0 2 -#define COM4D1 3 -#define COM4B0S 4 -#define COM4B1S 5 -#define COM4A0S 6 -#define COM4A1S 7 - -#define TCCR4D _SFR_MEM8(0xC3) -#define WGM40 0 -#define WGM41 1 -#define FPF4 2 -#define FPAC4 3 -#define FPES4 4 -#define FPNC4 5 -#define FPEN4 6 -#define FPIE4 7 - -#define TCCR4E _SFR_MEM8(0xC4) -#define OC4OE0 0 -#define OC4OE1 1 -#define OC4OE2 2 -#define OC4OE3 3 -#define OC4OE4 4 -#define OC4OE5 5 -#define ENHC4 6 -#define TLOCK4 7 - -#define CLKSEL0 _SFR_MEM8(0xC5) -#define CLKS 0 -#define EXTE 2 -#define RCE 3 -#define EXSUT0 4 -#define EXSUT1 5 -#define RCSUT0 6 -#define RCSUT1 7 - -#define CLKSEL1 _SFR_MEM8(0xC6) -#define EXCKSEL0 0 -#define EXCKSEL1 1 -#define EXCKSEL2 2 -#define EXCKSEL3 3 -#define RCCKSEL0 4 -#define RCCKSEL1 5 -#define RCCKSEL2 6 -#define RCCKSEL3 7 - -#define CLKSTA _SFR_MEM8(0xC7) -#define EXTON 0 -#define RCON 1 - -#define UCSR1A _SFR_MEM8(0xC8) -#define MPCM1 0 -#define U2X1 1 -#define UPE1 2 -#define DOR1 3 -#define FE1 4 -#define UDRE1 5 -#define TXC1 6 -#define RXC1 7 - -#define UCSR1B _SFR_MEM8(0xC9) -#define TXB81 0 -#define RXB81 1 -#define UCSZ12 2 -#define TXEN1 3 -#define RXEN1 4 -#define UDRIE1 5 -#define TXCIE1 6 -#define RXCIE1 7 - -#define UCSR1C _SFR_MEM8(0xCA) -#define UCPOL1 0 -#define UCSZ10 1 -#define UCSZ11 2 -#define USBS1 3 -#define UPM10 4 -#define UPM11 5 -#define UMSEL10 6 -#define UMSEL11 7 - -#define UBRR1 _SFR_MEM16(0xCC) - -#define UBRR1L _SFR_MEM8(0xCC) - -#define UBRR1H _SFR_MEM8(0xCD) - -#define UDR1 _SFR_MEM8(0xCE) -#define UDR1_0 0 -#define UDR1_1 1 -#define UDR1_2 2 -#define UDR1_3 3 -#define UDR1_4 4 -#define UDR1_5 5 -#define UDR1_6 6 -#define UDR1_7 7 - -#define OCR4A _SFR_MEM8(0xCF) -#define OCR4A0 0 -#define OCR4A1 1 -#define OCR4A2 2 -#define OCR4A3 3 -#define OCR4A4 4 -#define OCR4A5 5 -#define OCR4A6 6 -#define OCR4A7 7 - -#define OCR4B _SFR_MEM8(0xD0) -#define OCR4B0 0 -#define OCR4B1 1 -#define OCR4B2 2 -#define OCR4B3 3 -#define OCR4B4 4 -#define OCR4B5 5 -#define OCR4B6 6 -#define OCR4B7 7 - -#define OCR4C _SFR_MEM8(0xD1) -#define OCR4C0 0 -#define OCR4C1 1 -#define OCR4C2 2 -#define OCR4C3 3 -#define OCR4C4 4 -#define OCR4C5 5 -#define OCR4C6 6 -#define OCR4C7 7 - -#define OCR4D _SFR_MEM8(0xD2) -#define OCR4D0 0 -#define OCR4D1 1 -#define OCR4D2 2 -#define OCR4D3 3 -#define OCR4D4 4 -#define OCR4D5 5 -#define OCR4D6 6 -#define OCR4D7 7 - -#define DT4 _SFR_MEM8(0xD4) -#define DT4L0 0 -#define DT4L1 1 -#define DT4L2 2 -#define DT4L3 3 -#define DT4L4 4 -#define DT4L5 5 -#define DT4L6 6 -#define DT4L7 7 - -#define UHWCON _SFR_MEM8(0xD7) -#define UVREGE 0 - -#define USBCON _SFR_MEM8(0xD8) -#define VBUSTE 0 -#define OTGPADE 4 -#define FRZCLK 5 -#define USBE 7 - -#define USBSTA _SFR_MEM8(0xD9) -#define VBUS 0 -#define SPEED 3 - -#define USBINT _SFR_MEM8(0xDA) -#define VBUSTI 0 - -#define OTGCON _SFR_MEM8(0xDD) - -#define OTGIEN _SFR_MEM8(0xDE) - -#define OTGINT _SFR_MEM8(0xDF) - -#define UDCON _SFR_MEM8(0xE0) -#define DETACH 0 -#define RMWKUP 1 -#define LSM 2 -#define RSTCPU 3 - -#define UDINT _SFR_MEM8(0xE1) -#define SUSPI 0 -#define SOFI 2 -#define EORSTI 3 -#define WAKEUPI 4 -#define EORSMI 5 -#define UPRSMI 6 - -#define UDIEN _SFR_MEM8(0xE2) -#define SUSPE 0 -#define SOFE 2 -#define EORSTE 3 -#define WAKEUPE 4 -#define EORSME 5 -#define UPRSME 6 - -#define UDADDR _SFR_MEM8(0xE3) -#define UADD0 0 -#define UADD1 1 -#define UADD2 2 -#define UADD3 3 -#define UADD4 4 -#define UADD5 5 -#define UADD6 6 -#define ADDEN 7 - -#define UDFNUM _SFR_MEM16(0xE4) - -#define UDFNUML _SFR_MEM8(0xE4) -#define FNUM0 0 -#define FNUM1 1 -#define FNUM2 2 -#define FNUM3 3 -#define FNUM4 4 -#define FNUM5 5 -#define FNUM6 6 -#define FNUM7 7 - -#define UDFNUMH _SFR_MEM8(0xE5) -#define FNUM8 0 -#define FNUM9 1 -#define FNUM10 2 - -#define UDMFN _SFR_MEM8(0xE6) -#define FNCERR 4 - -#define UDTST _SFR_MEM8(0xE7) - -#define UEINTX _SFR_MEM8(0xE8) -#define TXINI 0 -#define STALLEDI 1 -#define RXOUTI 2 -#define RXSTPI 3 -#define NAKOUTI 4 -#define RWAL 5 -#define NAKINI 6 -#define FIFOCON 7 - -#define UENUM _SFR_MEM8(0xE9) -#define UENUM_0 0 -#define UENUM_1 1 -#define UENUM_2 2 - -#define UERST _SFR_MEM8(0xEA) -#define EPRST0 0 -#define EPRST1 1 -#define EPRST2 2 -#define EPRST3 3 -#define EPRST4 4 -#define EPRST5 5 -#define EPRST6 6 - -#define UECONX _SFR_MEM8(0xEB) -#define EPEN 0 -#define RSTDT 3 -#define STALLRQC 4 -#define STALLRQ 5 - -#define UECFG0X _SFR_MEM8(0xEC) -#define EPDIR 0 -#define EPTYPE0 6 -#define EPTYPE1 7 - -#define UECFG1X _SFR_MEM8(0xED) -#define ALLOC 1 -#define EPBK0 2 -#define EPBK1 3 -#define EPSIZE0 4 -#define EPSIZE1 5 -#define EPSIZE2 6 - -#define UESTA0X _SFR_MEM8(0xEE) -#define NBUSYBK0 0 -#define NBUSYBK1 1 -#define DTSEQ0 2 -#define DTSEQ1 3 -#define UNDERFI 5 -#define OVERFI 6 -#define CFGOK 7 - -#define UESTA1X _SFR_MEM8(0xEF) -#define CURRBK0 0 -#define CURRBK1 1 -#define CTRLDIR 2 - -#define UEIENX _SFR_MEM8(0xF0) -#define TXINE 0 -#define STALLEDE 1 -#define RXOUTE 2 -#define RXSTPE 3 -#define NAKOUTE 4 -#define NAKINE 6 -#define FLERRE 7 - -#define UEDATX _SFR_MEM8(0xF1) -#define DAT0 0 -#define DAT1 1 -#define DAT2 2 -#define DAT3 3 -#define DAT4 4 -#define DAT5 5 -#define DAT6 6 -#define DAT7 7 - -#define UEBCX _SFR_MEM16(0xF2) - -#define UEBCLX _SFR_MEM8(0xF2) -#define BYCT0 0 -#define BYCT1 1 -#define BYCT2 2 -#define BYCT3 3 -#define BYCT4 4 -#define BYCT5 5 -#define BYCT6 6 -#define BYCT7 7 - -#define UEBCHX _SFR_MEM8(0xF3) - -#define UEINT _SFR_MEM8(0xF4) -#define EPINT0 0 -#define EPINT1 1 -#define EPINT2 2 -#define EPINT3 3 -#define EPINT4 4 -#define EPINT5 5 -#define EPINT6 6 - -#define UPERRX _SFR_MEM8(0xF5) - -#define UPBCLX _SFR_MEM8(0xF6) - -#define UPBCHX _SFR_MEM8(0xF7) - -#define UPINT _SFR_MEM8(0xF8) - -#define OTGTCON _SFR_MEM8(0xF9) - - - -/* Interrupt Vectors */ -/* Interrupt Vector 0 is the reset vector. */ -#define INT0_vect _VECTOR(1) /* External Interrupt Request 0 */ -#define INT1_vect _VECTOR(2) /* External Interrupt Request 1 */ -#define INT2_vect _VECTOR(3) /* External Interrupt Request 2 */ -#define INT3_vect _VECTOR(4) /* External Interrupt Request 3 */ -#define INT6_vect _VECTOR(7) /* External Interrupt Request 6 */ -#define PCINT0_vect _VECTOR(9) /* Pin Change Interrupt Request 0 */ -#define USB_GEN_vect _VECTOR(10) /* USB General Interrupt Request */ -#define USB_COM_vect _VECTOR(11) /* USB Endpoint/Pipe Interrupt Communication Request */ -#define WDT_vect _VECTOR(12) /* Watchdog Time-out Interrupt */ -#define TIMER1_CAPT_vect _VECTOR(16) /* Timer/Counter1 Capture Event */ -#define TIMER1_COMPA_vect _VECTOR(17) /* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPB_vect _VECTOR(18) /* Timer/Counter1 Compare Match B */ -#define TIMER1_COMPC_vect _VECTOR(19) /* Timer/Counter1 Compare Match C */ -#define TIMER1_OVF_vect _VECTOR(20) /* Timer/Counter1 Overflow */ -#define TIMER0_COMPA_vect _VECTOR(21) /* Timer/Counter0 Compare Match A */ -#define TIMER0_COMPB_vect _VECTOR(22) /* Timer/Counter0 Compare Match B */ -#define TIMER0_OVF_vect _VECTOR(23) /* Timer/Counter0 Overflow */ -#define SPI_STC_vect _VECTOR(24) /* SPI Serial Transfer Complete */ -#define USART1_RX_vect _VECTOR(25) /* USART1, Rx Complete */ -#define USART1_UDRE_vect _VECTOR(26) /* USART1 Data register Empty */ -#define USART1_TX_vect _VECTOR(27) /* USART1, Tx Complete */ -#define ANALOG_COMP_vect _VECTOR(28) /* Analog Comparator */ -#define ADC_vect _VECTOR(29) /* ADC Conversion Complete */ -#define EE_READY_vect _VECTOR(30) /* EEPROM Ready */ -#define TIMER3_CAPT_vect _VECTOR(31) /* Timer/Counter3 Capture Event */ -#define TIMER3_COMPA_vect _VECTOR(32) /* Timer/Counter3 Compare Match A */ -#define TIMER3_COMPB_vect _VECTOR(33) /* Timer/Counter3 Compare Match B */ -#define TIMER3_COMPC_vect _VECTOR(34) /* Timer/Counter3 Compare Match C */ -#define TIMER3_OVF_vect _VECTOR(35) /* Timer/Counter3 Overflow */ -#define TWI_vect _VECTOR(36) /* 2-wire Serial Interface */ -#define SPM_READY_vect _VECTOR(37) /* Store Program Memory Read */ -#define TIMER4_COMPA_vect _VECTOR(38) /* Timer/Counter4 Compare Match A */ -#define TIMER4_COMPB_vect _VECTOR(39) /* Timer/Counter4 Compare Match B */ -#define TIMER4_COMPD_vect _VECTOR(40) /* Timer/Counter4 Compare Match D */ -#define TIMER4_OVF_vect _VECTOR(41) /* Timer/Counter4 Overflow */ -#define TIMER4_FPF_vect _VECTOR(42) /* Timer/Counter4 Fault Protection Interrupt */ - -#define _VECTORS_SIZE (43 * 4) - - - -/* Constants */ -#define SPM_PAGESIZE (128) -#define RAMSTART (0x100) -#define RAMSIZE (0xA00) -#define RAMEND (RAMSTART + RAMSIZE - 1) /* Last On-Chip SRAM Location */ -#define XRAMSTART (0x2200) -#define XRAMSIZE (0x10000) -#define XRAMEND (XRAMSTART + XRAMSIZE - 1) -#define E2END (0x3FF) -#define E2PAGESIZE (4) -#define FLASHEND (0x7FFF) - - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) /* Select Clock Source */ -#define FUSE_CKSEL1 (unsigned char)~_BV(1) /* Select Clock Source */ -#define FUSE_CKSEL2 (unsigned char)~_BV(2) /* Select Clock Source */ -#define FUSE_CKSEL3 (unsigned char)~_BV(3) /* Select Clock Source */ -#define FUSE_SUT0 (unsigned char)~_BV(4) /* Select start-up time */ -#define FUSE_SUT1 (unsigned char)~_BV(5) /* Select start-up time */ -#define FUSE_CKOUT (unsigned char)~_BV(6) /* Oscillator options */ -#define FUSE_CKDIV8 (unsigned char)~_BV(7) /* Divide clock by 8 */ -#define LFUSE_DEFAULT (FUSE_CKSEL1 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT1 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) /* Select Reset Vector */ -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) /* Select Boot Size */ -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) /* Select Boot Size */ -#define FUSE_EESAVE (unsigned char)~_BV(3) /* EEPROM memory is preserved through chip erase */ -#define FUSE_WDTON (unsigned char)~_BV(4) /* Watchdog timer always on */ -#define FUSE_SPIEN (unsigned char)~_BV(5) /* Enable Serial programming and Data Downloading */ -#define FUSE_JTAGEN (unsigned char)~_BV(6) /* Enable JTAG */ -#define FUSE_OCDEN (unsigned char)~_BV(7) /* Enable OCD */ -#define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_SPIEN) - -/* Extended Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) /* Brown-out Detector trigger level */ -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) /* Brown-out Detector trigger level */ -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) /* Brown-out Detector trigger level */ -#define FUSE_HWBE (unsigned char)~_BV(3) /* Hardware Boot Enable */ -#define EFUSE_DEFAULT (0xFF) - - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x95 -#define SIGNATURE_2 0x87 - - - -#endif /* _AVR_IOM32U4_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom32u6.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom32u6.h deleted file mode 100644 index 44c1e5cd6..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom32u6.h +++ /dev/null @@ -1,1411 +0,0 @@ -/* Copyright (c) 2008 Atmel Corporation - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iom32u6.h,v 1.1.2.2 2008/10/30 22:04:09 arcanum Exp $ */ - -/* avr/iom32u6.h - definitions for ATmega32U6 */ - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iom32u6.h" -#else -# error "Attempt to include more than one file." -#endif - - -#ifndef _AVR_ATmega32U6_H_ -#define _AVR_ATmega32U6_H_ 1 - - -/* Registers and associated bit numbers. */ - -#define PINA _SFR_IO8(0x00) -#define PINA0 0 -#define PINA1 1 -#define PINA2 2 -#define PINA3 3 -#define PINA4 4 -#define PINA5 5 -#define PINA6 6 -#define PINA7 7 - -#define DDRA _SFR_IO8(0x01) -#define DDA0 0 -#define DDA1 1 -#define DDA2 2 -#define DDA3 3 -#define DDA4 4 -#define DDA5 5 -#define DDA6 6 -#define DDA7 7 - -#define PORTA _SFR_IO8(0x02) -#define PORTA0 0 -#define PORTA1 1 -#define PORTA2 2 -#define PORTA3 3 -#define PORTA4 4 -#define PORTA5 5 -#define PORTA6 6 -#define PORTA7 7 - -#define PINB _SFR_IO8(0x03) -#define PINB0 0 -#define PINB1 1 -#define PINB2 2 -#define PINB3 3 -#define PINB4 4 -#define PINB5 5 -#define PINB6 6 -#define PINB7 7 - -#define DDRB _SFR_IO8(0x04) -#define DDB0 0 -#define DDB1 1 -#define DDB2 2 -#define DDB3 3 -#define DDB4 4 -#define DDB5 5 -#define DDB6 6 -#define DDB7 7 - -#define PORTB _SFR_IO8(0x05) -#define PORTB0 0 -#define PORTB1 1 -#define PORTB2 2 -#define PORTB3 3 -#define PORTB4 4 -#define PORTB5 5 -#define PORTB6 6 -#define PORTB7 7 - -#define PINC _SFR_IO8(0x06) -#define PINC0 0 -#define PINC1 1 -#define PINC2 2 -#define PINC3 3 -#define PINC4 4 -#define PINC5 5 -#define PINC6 6 -#define PINC7 7 - -#define DDRC _SFR_IO8(0x07) -#define DDC0 0 -#define DDC1 1 -#define DDC2 2 -#define DDC3 3 -#define DDC4 4 -#define DDC5 5 -#define DDC6 6 -#define DDC7 7 - -#define PORTC _SFR_IO8(0x08) -#define PORTC0 0 -#define PORTC1 1 -#define PORTC2 2 -#define PORTC3 3 -#define PORTC4 4 -#define PORTC5 5 -#define PORTC6 6 -#define PORTC7 7 - -#define PIND _SFR_IO8(0x09) -#define PIND0 0 -#define PIND1 1 -#define PIND2 2 -#define PIND3 3 -#define PIND4 4 -#define PIND5 5 -#define PIND6 6 -#define PIND7 7 - -#define DDRD _SFR_IO8(0x0A) -#define DDD0 0 -#define DDD1 1 -#define DDD2 2 -#define DDD3 3 -#define DDD4 4 -#define DDD5 5 -#define DDD6 6 -#define DDD7 7 - -#define PORTD _SFR_IO8(0x0B) -#define PORTD0 0 -#define PORTD1 1 -#define PORTD2 2 -#define PORTD3 3 -#define PORTD4 4 -#define PORTD5 5 -#define PORTD6 6 -#define PORTD7 7 - -#define PINE _SFR_IO8(0x0C) -#define PINE0 0 -#define PINE1 1 -#define PINE2 2 -#define PINE3 3 -#define PINE4 4 -#define PINE5 5 -#define PINE6 6 -#define PINE7 7 - -#define DDRE _SFR_IO8(0x0D) -#define DDE0 0 -#define DDE1 1 -#define DDE2 2 -#define DDE3 3 -#define DDE4 4 -#define DDE5 5 -#define DDE6 6 -#define DDE7 7 - -#define PORTE _SFR_IO8(0x0E) -#define PORTE0 0 -#define PORTE1 1 -#define PORTE2 2 -#define PORTE3 3 -#define PORTE4 4 -#define PORTE5 5 -#define PORTE6 6 -#define PORTE7 7 - -#define PINF _SFR_IO8(0x0F) -#define PINF0 0 -#define PINF1 1 -#define PINF2 2 -#define PINF3 3 -#define PINF4 4 -#define PINF5 5 -#define PINF6 6 -#define PINF7 7 - -#define DDRF _SFR_IO8(0x10) -#define DDF0 0 -#define DDF1 1 -#define DDF2 2 -#define DDF3 3 -#define DDF4 4 -#define DDF5 5 -#define DDF6 6 -#define DDF7 7 - -#define PORTF _SFR_IO8(0x11) -#define PORTF0 0 -#define PORTF1 1 -#define PORTF2 2 -#define PORTF3 3 -#define PORTF4 4 -#define PORTF5 5 -#define PORTF6 6 -#define PORTF7 7 - -#define TIFR0 _SFR_IO8(0x15) -#define TOV0 0 -#define OCF0A 1 -#define OCF0B 2 - -#define TIFR1 _SFR_IO8(0x16) -#define TOV1 0 -#define OCF1A 1 -#define OCF1B 2 -#define OCF1C 3 -#define ICF1 5 - -#define TIFR2 _SFR_IO8(0x17) -#define TOV2 0 -#define OCF2A 1 -#define OCF2B 2 - -#define TIFR3 _SFR_IO8(0x18) -#define TOV3 0 -#define OCF3A 1 -#define OCF3B 2 -#define OCF3C 3 -#define ICF3 5 - -#define PCIFR _SFR_IO8(0x1B) -#define PCIF0 0 - -#define EIFR _SFR_IO8(0x1C) -#define INTF0 0 -#define INTF1 1 -#define INTF2 2 -#define INTF3 3 -#define INTF4 4 -#define INTF5 5 -#define INTF6 6 -#define INTF7 7 - -#define EIMSK _SFR_IO8(0x1D) -#define INT0 0 -#define INT1 1 -#define INT2 2 -#define INT3 3 -#define INT4 4 -#define INT5 5 -#define INT6 6 -#define INT7 7 - -#define GPIOR0 _SFR_IO8(0x1E) -#define GPIOR00 0 -#define GPIOR01 1 -#define GPIOR02 2 -#define GPIOR03 3 -#define GPIOR04 4 -#define GPIOR05 5 -#define GPIOR06 6 -#define GPIOR07 7 - -#define EECR _SFR_IO8(0x1F) -#define EERE 0 -#define EEPE 1 -#define EEMPE 2 -#define EERIE 3 -#define EEPM0 4 -#define EEPM1 5 - -#define EEDR _SFR_IO8(0x20) -#define EEDR0 0 -#define EEDR1 1 -#define EEDR2 2 -#define EEDR3 3 -#define EEDR4 4 -#define EEDR5 5 -#define EEDR6 6 -#define EEDR7 7 - -#define EEAR _SFR_IO16(0x21) - -#define EEARL _SFR_IO8(0x21) -#define EEAR0 0 -#define EEAR1 1 -#define EEAR2 2 -#define EEAR3 3 -#define EEAR4 4 -#define EEAR5 5 -#define EEAR6 6 -#define EEAR7 7 - -#define EEARH _SFR_IO8(0x22) -#define EEAR8 0 -#define EEAR9 1 -#define EEAR10 2 -#define EEAR11 3 - -#define GTCCR _SFR_IO8(0x23) -#define PSRSYNC 0 -#define PSRASY 1 -#define TSM 7 - -#define TCCR0A _SFR_IO8(0x24) -#define WGM00 0 -#define WGM01 1 -#define COM0B0 4 -#define COM0B1 5 -#define COM0A0 6 -#define COM0A1 7 - -#define TCCR0B _SFR_IO8(0x25) -#define CS00 0 -#define CS01 1 -#define CS02 2 -#define WGM02 3 -#define FOC0B 6 -#define FOC0A 7 - -#define TCNT0 _SFR_IO8(0x26) -#define TCNT0_0 0 -#define TCNT0_1 1 -#define TCNT0_2 2 -#define TCNT0_3 3 -#define TCNT0_4 4 -#define TCNT0_5 5 -#define TCNT0_6 6 -#define TCNT0_7 7 - -#define OCR0A _SFR_IO8(0x27) -#define OCROA_0 0 -#define OCROA_1 1 -#define OCROA_2 2 -#define OCROA_3 3 -#define OCROA_4 4 -#define OCROA_5 5 -#define OCROA_6 6 -#define OCROA_7 7 - -#define OCR0B _SFR_IO8(0x28) -#define OCR0B_0 0 -#define OCR0B_1 1 -#define OCR0B_2 2 -#define OCR0B_3 3 -#define OCR0B_4 4 -#define OCR0B_5 5 -#define OCR0B_6 6 -#define OCR0B_7 7 - -#define PLLCSR _SFR_IO8(0x29) -#define PLOCK 0 -#define PLLE 1 -#define PLLP0 2 -#define PLLP1 3 -#define PLLP2 4 - -#define GPIOR1 _SFR_IO8(0x2A) -#define GPIOR10 0 -#define GPIOR11 1 -#define GPIOR12 2 -#define GPIOR13 3 -#define GPIOR14 4 -#define GPIOR15 5 -#define GPIOR16 6 -#define GPIOR17 7 - -#define GPIOR2 _SFR_IO8(0x2B) -#define GPIOR20 0 -#define GPIOR21 1 -#define GPIOR22 2 -#define GPIOR23 3 -#define GPIOR24 4 -#define GPIOR25 5 -#define GPIOR26 6 -#define GPIOR27 7 - -#define SPCR _SFR_IO8(0x2C) -#define SPR0 0 -#define SPR1 1 -#define CPHA 2 -#define CPOL 3 -#define MSTR 4 -#define DORD 5 -#define SPE 6 -#define SPIE 7 - -#define SPSR _SFR_IO8(0x2D) -#define SPI2X 0 -#define WCOL 6 -#define SPIF 7 - -#define SPDR _SFR_IO8(0x2E) -#define SPDR0 0 -#define SPDR1 1 -#define SPDR2 2 -#define SPDR3 3 -#define SPDR4 4 -#define SPDR5 5 -#define SPDR6 6 -#define SPDR7 7 - -#define ACSR _SFR_IO8(0x30) -#define ACIS0 0 -#define ACIS1 1 -#define ACIC 2 -#define ACIE 3 -#define ACI 4 -#define ACO 5 -#define ACBG 6 -#define ACD 7 - -#define OCDR _SFR_IO8(0x31) -#define OCDR0 0 -#define OCDR1 1 -#define OCDR2 2 -#define OCDR3 3 -#define OCDR4 4 -#define OCDR5 5 -#define OCDR6 6 -#define OCDR7 7 - -#define SMCR _SFR_IO8(0x33) -#define SE 0 -#define SM0 1 -#define SM1 2 -#define SM2 3 - -#define MCUSR _SFR_IO8(0x34) -#define PORF 0 -#define EXTRF 1 -#define BORF 2 -#define WDRF 3 -#define JTRF 4 - -#define MCUCR _SFR_IO8(0x35) -#define IVCE 0 -#define IVSEL 1 -#define PUD 4 -#define JTD 7 - -#define SPMCSR _SFR_IO8(0x37) -#define SPMEN 0 -#define PGERS 1 -#define PGWRT 2 -#define BLBSET 3 -#define RWWSRE 4 -#define SIGRD 5 -#define RWWSB 6 -#define SPMIE 7 - -#define WDTCSR _SFR_MEM8(0x60) -#define WDP0 0 -#define WDP1 1 -#define WDP2 2 -#define WDE 3 -#define WDCE 4 -#define WDP3 5 -#define WDIE 6 -#define WDIF 7 - -#define CLKPR _SFR_MEM8(0x61) -#define CLKPS0 0 -#define CLKPS1 1 -#define CLKPS2 2 -#define CLKPS3 3 -#define CLKPCE 7 - -#define PRR0 _SFR_MEM8(0x64) -#define PRADC 0 -#define PRSPI 2 -#define PRTIM1 3 -#define PRTIM0 5 -#define PRTIM2 6 -#define PRTWI 7 - -#define PRR1 _SFR_MEM8(0x65) -#define PRUSART1 0 -#define PRTIM3 3 -#define PRUSB 7 - -#define OSCCAL _SFR_MEM8(0x66) -#define CAL0 0 -#define CAL1 1 -#define CAL2 2 -#define CAL3 3 -#define CAL4 4 -#define CAL5 5 -#define CAL6 6 -#define CAL7 7 - -#define PCICR _SFR_MEM8(0x68) -#define PCIE0 0 - -#define EICRA _SFR_MEM8(0x69) -#define ISC00 0 -#define ISC01 1 -#define ISC10 2 -#define ISC11 3 -#define ISC20 4 -#define ISC21 5 -#define ISC30 6 -#define ISC31 7 - -#define EICRB _SFR_MEM8(0x6A) -#define ISC40 0 -#define ISC41 1 -#define ISC50 2 -#define ISC51 3 -#define ISC60 4 -#define ISC61 5 -#define ISC70 6 -#define ISC71 7 - -#define PCMSK0 _SFR_MEM8(0x6B) -#define PCINT0 0 -#define PCINT1 1 -#define PCINT2 2 -#define PCINT3 3 -#define PCINT4 4 -#define PCINT5 5 -#define PCINT6 6 -#define PCINT7 7 - -#define TIMSK0 _SFR_MEM8(0x6E) -#define TOIE0 0 -#define OCIE0A 1 -#define OCIE0B 2 - -#define TIMSK1 _SFR_MEM8(0x6F) -#define TOIE1 0 -#define OCIE1A 1 -#define OCIE1B 2 -#define OCIE1C 3 -#define ICIE1 5 - -#define TIMSK2 _SFR_MEM8(0x70) -#define TOIE2 0 -#define OCIE2A 1 -#define OCIE2B 2 - -#define TIMSK3 _SFR_MEM8(0x71) -#define TOIE3 0 -#define OCIE3A 1 -#define OCIE3B 2 -#define OCIE3C 3 -#define ICIE3 5 - -#define XMCRA _SFR_MEM8(0x74) -#define SRW00 0 -#define SRW01 1 -#define SRW10 2 -#define SRW11 3 -#define SRL0 4 -#define SRL1 5 -#define SRL2 6 -#define SRE 7 - -#define XMCRB _SFR_MEM8(0x75) -#define XMM0 0 -#define XMM1 1 -#define XMM2 2 -#define XMBK 7 - -#ifndef __ASSEMBLER__ -#define ADC _SFR_MEM16(0x78) -#endif -#define ADCW _SFR_MEM16(0x78) - -#define ADCL _SFR_MEM8(0x78) -#define ADCL0 0 -#define ADCL1 1 -#define ADCL2 2 -#define ADCL3 3 -#define ADCL4 4 -#define ADCL5 5 -#define ADCL6 6 -#define ADCL7 7 - -#define ADCH _SFR_MEM8(0x79) -#define ADCH0 0 -#define ADCH1 1 -#define ADCH2 2 -#define ADCH3 3 -#define ADCH4 4 -#define ADCH5 5 -#define ADCH6 6 -#define ADCH7 7 - -#define ADCSRA _SFR_MEM8(0x7A) -#define ADPS0 0 -#define ADPS1 1 -#define ADPS2 2 -#define ADIE 3 -#define ADIF 4 -#define ADATE 5 -#define ADSC 6 -#define ADEN 7 - -#define ADCSRB _SFR_MEM8(0x7B) -#define ADTS0 0 -#define ADTS1 1 -#define ADTS2 2 -#define ACME 6 -#define ADHSM 7 - -#define ADMUX _SFR_MEM8(0x7C) -#define MUX0 0 -#define MUX1 1 -#define MUX2 2 -#define MUX3 3 -#define MUX4 4 -#define ADLAR 5 -#define REFS0 6 -#define REFS1 7 - -#define DIDR0 _SFR_MEM8(0x7E) -#define ADC0D 0 -#define ADC1D 1 -#define ADC2D 2 -#define ADC3D 3 -#define ADC4D 4 -#define ADC5D 5 -#define ADC6D 6 -#define ADC7D 7 - -#define DIDR1 _SFR_MEM8(0x7F) -#define AIN0D 0 -#define AIN1D 1 - -#define TCCR1A _SFR_MEM8(0x80) -#define WGM10 0 -#define WGM11 1 -#define COM1C0 2 -#define COM1C1 3 -#define COM1B0 4 -#define COM1B1 5 -#define COM1A0 6 -#define COM1A1 7 - -#define TCCR1B _SFR_MEM8(0x81) -#define CS10 0 -#define CS11 1 -#define CS12 2 -#define WGM12 3 -#define WGM13 4 -#define ICES1 6 -#define ICNC1 7 - -#define TCCR1C _SFR_MEM8(0x82) -#define FOC1C 5 -#define FOC1B 6 -#define FOC1A 7 - -#define TCNT1 _SFR_MEM16(0x84) - -#define TCNT1L _SFR_MEM8(0x84) -#define TCNT1L0 0 -#define TCNT1L1 1 -#define TCNT1L2 2 -#define TCNT1L3 3 -#define TCNT1L4 4 -#define TCNT1L5 5 -#define TCNT1L6 6 -#define TCNT1L7 7 - -#define TCNT1H _SFR_MEM8(0x85) -#define TCNT1H0 0 -#define TCNT1H1 1 -#define TCNT1H2 2 -#define TCNT1H3 3 -#define TCNT1H4 4 -#define TCNT1H5 5 -#define TCNT1H6 6 -#define TCNT1H7 7 - -#define ICR1 _SFR_MEM16(0x86) - -#define ICR1L _SFR_MEM8(0x86) -#define ICR1L0 0 -#define ICR1L1 1 -#define ICR1L2 2 -#define ICR1L3 3 -#define ICR1L4 4 -#define ICR1L5 5 -#define ICR1L6 6 -#define ICR1L7 7 - -#define ICR1H _SFR_MEM8(0x87) -#define ICR1H0 0 -#define ICR1H1 1 -#define ICR1H2 2 -#define ICR1H3 3 -#define ICR1H4 4 -#define ICR1H5 5 -#define ICR1H6 6 -#define ICR1H7 7 - -#define OCR1A _SFR_MEM16(0x88) - -#define OCR1AL _SFR_MEM8(0x88) -#define OCR1AL0 0 -#define OCR1AL1 1 -#define OCR1AL2 2 -#define OCR1AL3 3 -#define OCR1AL4 4 -#define OCR1AL5 5 -#define OCR1AL6 6 -#define OCR1AL7 7 - -#define OCR1AH _SFR_MEM8(0x89) -#define OCR1AH0 0 -#define OCR1AH1 1 -#define OCR1AH2 2 -#define OCR1AH3 3 -#define OCR1AH4 4 -#define OCR1AH5 5 -#define OCR1AH6 6 -#define OCR1AH7 7 - -#define OCR1B _SFR_MEM16(0x8A) - -#define OCR1BL _SFR_MEM8(0x8A) -#define OCR1BL0 0 -#define OCR1BL1 1 -#define OCR1BL2 2 -#define OCR1BL3 3 -#define OCR1BL4 4 -#define OCR1BL5 5 -#define OCR1BL6 6 -#define OCR1BL7 7 - -#define OCR1BH _SFR_MEM8(0x8B) -#define OCR1BH0 0 -#define OCR1BH1 1 -#define OCR1BH2 2 -#define OCR1BH3 3 -#define OCR1BH4 4 -#define OCR1BH5 5 -#define OCR1BH6 6 -#define OCR1BH7 7 - -#define OCR1C _SFR_MEM16(0x8C) - -#define OCR1CL _SFR_MEM8(0x8C) -#define OCR1CL0 0 -#define OCR1CL1 1 -#define OCR1CL2 2 -#define OCR1CL3 3 -#define OCR1CL4 4 -#define OCR1CL5 5 -#define OCR1CL6 6 -#define OCR1CL7 7 - -#define OCR1CH _SFR_MEM8(0x8D) -#define OCR1CH0 0 -#define OCR1CH1 1 -#define OCR1CH2 2 -#define OCR1CH3 3 -#define OCR1CH4 4 -#define OCR1CH5 5 -#define OCR1CH6 6 -#define OCR1CH7 7 - -#define TCCR3A _SFR_MEM8(0x90) -#define WGM30 0 -#define WGM31 1 -#define COM3C0 2 -#define COM3C1 3 -#define COM3B0 4 -#define COM3B1 5 -#define COM3A0 6 -#define COM3A1 7 - -#define TCCR3B _SFR_MEM8(0x91) -#define CS30 0 -#define CS31 1 -#define CS32 2 -#define WGM32 3 -#define WGM33 4 -#define ICES3 6 -#define ICNC3 7 - -#define TCCR3C _SFR_MEM8(0x92) -#define FOC3C 5 -#define FOC3B 6 -#define FOC3A 7 - -#define TCNT3 _SFR_MEM16(0x94) - -#define TCNT3L _SFR_MEM8(0x94) -#define TCNT3L0 0 -#define TCNT3L1 1 -#define TCNT3L2 2 -#define TCNT3L3 3 -#define TCNT3L4 4 -#define TCNT3L5 5 -#define TCNT3L6 6 -#define TCNT3L7 7 - -#define TCNT3H _SFR_MEM8(0x95) -#define TCNT3H0 0 -#define TCNT3H1 1 -#define TCNT3H2 2 -#define TCNT3H3 3 -#define TCNT3H4 4 -#define TCNT3H5 5 -#define TCNT3H6 6 -#define TCNT3H7 7 - -#define ICR3 _SFR_MEM16(0x96) - -#define ICR3L _SFR_MEM8(0x96) -#define ICR3L0 0 -#define ICR3L1 1 -#define ICR3L2 2 -#define ICR3L3 3 -#define ICR3L4 4 -#define ICR3L5 5 -#define ICR3L6 6 -#define ICR3L7 7 - -#define ICR3H _SFR_MEM8(0x97) -#define ICR3H0 0 -#define ICR3H1 1 -#define ICR3H2 2 -#define ICR3H3 3 -#define ICR3H4 4 -#define ICR3H5 5 -#define ICR3H6 6 -#define ICR3H7 7 - -#define OCR3A _SFR_MEM16(0x98) - -#define OCR3AL _SFR_MEM8(0x98) -#define OCR3AL0 0 -#define OCR3AL1 1 -#define OCR3AL2 2 -#define OCR3AL3 3 -#define OCR3AL4 4 -#define OCR3AL5 5 -#define OCR3AL6 6 -#define OCR3AL7 7 - -#define OCR3AH _SFR_MEM8(0x99) -#define OCR3AH0 0 -#define OCR3AH1 1 -#define OCR3AH2 2 -#define OCR3AH3 3 -#define OCR3AH4 4 -#define OCR3AH5 5 -#define OCR3AH6 6 -#define OCR3AH7 7 - -#define OCR3B _SFR_MEM16(0x9A) - -#define OCR3BL _SFR_MEM8(0x9A) -#define OCR3BL0 0 -#define OCR3BL1 1 -#define OCR3BL2 2 -#define OCR3BL3 3 -#define OCR3BL4 4 -#define OCR3BL5 5 -#define OCR3BL6 6 -#define OCR3BL7 7 - -#define OCR3BH _SFR_MEM8(0x9B) -#define OCR3BH0 0 -#define OCR3BH1 1 -#define OCR3BH2 2 -#define OCR3BH3 3 -#define OCR3BH4 4 -#define OCR3BH5 5 -#define OCR3BH6 6 -#define OCR3BH7 7 - -#define OCR3C _SFR_MEM16(0x9C) - -#define OCR3CL _SFR_MEM8(0x9C) -#define OCR3CL0 0 -#define OCR3CL1 1 -#define OCR3CL2 2 -#define OCR3CL3 3 -#define OCR3CL4 4 -#define OCR3CL5 5 -#define OCR3CL6 6 -#define OCR3CL7 7 - -#define OCR3CH _SFR_MEM8(0x9D) -#define OCR3CH0 0 -#define OCR3CH1 1 -#define OCR3CH2 2 -#define OCR3CH3 3 -#define OCR3CH4 4 -#define OCR3CH5 5 -#define OCR3CH6 6 -#define OCR3CH7 7 - -#define TCCR2A _SFR_MEM8(0xB0) -#define WGM20 0 -#define WGM21 1 -#define COM2B0 4 -#define COM2B1 5 -#define COM2A0 6 -#define COM2A1 7 - -#define TCCR2B _SFR_MEM8(0xB1) -#define CS20 0 -#define CS21 1 -#define CS22 2 -#define WGM22 3 -#define FOC2B 6 -#define FOC2A 7 - -#define TCNT2 _SFR_MEM8(0xB2) -#define TCNT2_0 0 -#define TCNT2_1 1 -#define TCNT2_2 2 -#define TCNT2_3 3 -#define TCNT2_4 4 -#define TCNT2_5 5 -#define TCNT2_6 6 -#define TCNT2_7 7 - -#define OCR2A _SFR_MEM8(0xB3) -#define OCR2A_0 0 -#define OCR2A_1 1 -#define OCR2A_2 2 -#define OCR2A_3 3 -#define OCR2A_4 4 -#define OCR2A_5 5 -#define OCR2A_6 6 -#define OCR2A_7 7 - -#define OCR2B _SFR_MEM8(0xB4) -#define OCR2B_0 0 -#define OCR2B_1 1 -#define OCR2B_2 2 -#define OCR2B_3 3 -#define OCR2B_4 4 -#define OCR2B_5 5 -#define OCR2B_6 6 -#define OCR2B_7 7 - -#define ASSR _SFR_MEM8(0xB6) -#define TCR2BUB 0 -#define TCR2AUB 1 -#define OCR2BUB 2 -#define OCR2AUB 3 -#define TCN2UB 4 -#define AS2 5 -#define EXCLK 6 - -#define TWBR _SFR_MEM8(0xB8) -#define TWBR0 0 -#define TWBR1 1 -#define TWBR2 2 -#define TWBR3 3 -#define TWBR4 4 -#define TWBR5 5 -#define TWBR6 6 -#define TWBR7 7 - -#define TWSR _SFR_MEM8(0xB9) -#define TWPS0 0 -#define TWPS1 1 -#define TWS3 3 -#define TWS4 4 -#define TWS5 5 -#define TWS6 6 -#define TWS7 7 - -#define TWAR _SFR_MEM8(0xBA) -#define TWGCE 0 -#define TWA0 1 -#define TWA1 2 -#define TWA2 3 -#define TWA3 4 -#define TWA4 5 -#define TWA5 6 -#define TWA6 7 - -#define TWDR _SFR_MEM8(0xBB) -#define TWD0 0 -#define TWD1 1 -#define TWD2 2 -#define TWD3 3 -#define TWD4 4 -#define TWD5 5 -#define TWD6 6 -#define TWD7 7 - -#define TWCR _SFR_MEM8(0xBC) -#define TWIE 0 -#define TWEN 2 -#define TWWC 3 -#define TWSTO 4 -#define TWSTA 5 -#define TWEA 6 -#define TWINT 7 - -#define TWAMR _SFR_MEM8(0xBD) -#define TWAM0 1 -#define TWAM1 2 -#define TWAM2 3 -#define TWAM3 4 -#define TWAM4 5 -#define TWAM5 6 -#define TWAM6 7 - -#define UCSR1A _SFR_MEM8(0xC8) -#define MPCM1 0 -#define U2X1 1 -#define UPE1 2 -#define DOR1 3 -#define FE1 4 -#define UDRE1 5 -#define TXC1 6 -#define RXC1 7 - -#define UCSR1B _SFR_MEM8(0xC9) -#define TXB81 0 -#define RXB81 1 -#define UCSZ12 2 -#define TXEN1 3 -#define RXEN1 4 -#define UDRIE1 5 -#define TXCIE1 6 -#define RXCIE1 7 - -#define UCSR1C _SFR_MEM8(0xCA) -#define UCPOL1 0 -#define UCSZ10 1 -#define UCSZ11 2 -#define USBS1 3 -#define UPM10 4 -#define UPM11 5 -#define UMSEL10 6 -#define UMSEL11 7 - -#define UBRR1 _SFR_MEM16(0xCC) - -#define UBRR1L _SFR_MEM8(0xCC) -#define UBRR_0 0 -#define UBRR_1 1 -#define UBRR_2 2 -#define UBRR_3 3 -#define UBRR_4 4 -#define UBRR_5 5 -#define UBRR_6 6 -#define UBRR_7 7 - -#define UBRR1H _SFR_MEM8(0xCD) -#define UBRR_8 0 -#define UBRR_9 1 -#define UBRR_10 2 -#define UBRR_11 3 - -#define UDR1 _SFR_MEM8(0xCE) -#define UDR1_0 0 -#define UDR1_1 1 -#define UDR1_2 2 -#define UDR1_3 3 -#define UDR1_4 4 -#define UDR1_5 5 -#define UDR1_6 6 -#define UDR1_7 7 - -#define UHWCON _SFR_MEM8(0xD7) -#define UVREGE 0 -#define UVCONE 4 -#define UIDE 6 -#define UIMOD 7 - -#define USBCON _SFR_MEM8(0xD8) -#define VBUSTE 0 -#define IDTE 1 -#define OTGPADE 4 -#define FRZCLK 5 -#define HOST 6 -#define USBE 7 - -#define USBSTA _SFR_MEM8(0xD9) -#define VBUS 0 -#define ID 1 -#define SPEED 3 - -#define USBINT _SFR_MEM8(0xDA) -#define VBUSTI 0 -#define IDTI 1 - -#define UDCON _SFR_MEM8(0xE0) -#define DETACH 0 -#define RMWKUP 1 -#define LSM 2 - -#define UDINT _SFR_MEM8(0xE1) -#define SUSPI 0 -#define SOFI 2 -#define EORSTI 3 -#define WAKEUPI 4 -#define EORSMI 5 -#define UPRSMI 6 - -#define UDIEN _SFR_MEM8(0xE2) -#define SUSPE 0 -#define SOFE 2 -#define EORSTE 3 -#define WAKEUPE 4 -#define EORSME 5 -#define UPRSME 6 - -#define UDADDR _SFR_MEM8(0xE3) -#define UADD0 0 -#define UADD1 1 -#define UADD2 2 -#define UADD3 3 -#define UADD4 4 -#define UADD5 5 -#define UADD6 6 -#define ADDEN 7 - -#define UDFNUM _SFR_MEM16(0xE4) - -#define UDFNUML _SFR_MEM8(0xE4) -#define UDFNUML_0 0 -#define UDFNUML_1 1 -#define UDFNUML_2 2 -#define UDFNUML_3 3 -#define UDFNUML_4 4 -#define UDFNUML_5 5 -#define UDFNUML_6 6 -#define UDFNUML_7 7 - -#define UDFNUMH _SFR_MEM8(0xE5) -#define UDFNUMH_0 0 -#define UDFNUMH_1 1 -#define UDFNUMH_2 2 - -#define UDMFN _SFR_MEM8(0xE6) -#define FNCERR 4 - -#define UEINTX _SFR_MEM8(0xE8) -#define TXINI 0 -#define STALLEDI 1 -#define RXOUTI 2 -#define RXSTPI 3 -#define NAKOUTI 4 -#define RWAL 5 -#define NAKINI 6 -#define FIFOCON 7 - -#define UENUM _SFR_MEM8(0xE9) -#define UENUM_0 0 -#define UENUM_1 1 -#define UENUM_2 2 - -#define UERST _SFR_MEM8(0xEA) -#define EPRST0 0 -#define EPRST1 1 -#define EPRST2 2 -#define EPRST3 3 -#define EPRST4 4 -#define EPRST5 5 -#define EPRST6 6 - -#define UECONX _SFR_MEM8(0xEB) -#define EPEN 0 -#define RSTDT 3 -#define STALLRQC 4 -#define STALLRQ 5 - -#define UECFG0X _SFR_MEM8(0xEC) -#define EPDIR 0 -#define EPTYPE0 6 -#define EPTYPE1 7 - -#define UECFG1X _SFR_MEM8(0xED) -#define ALLOC 1 -#define EPBK0 2 -#define EPBK1 3 -#define EPSIZE0 4 -#define EPSIZE1 5 -#define EPSIZE2 6 - -#define UESTA0X _SFR_MEM8(0xEE) -#define NBUSYBK0 0 -#define NBUSYBK1 1 -#define DTSEQ0 2 -#define DTSEQ1 3 -#define UNDERFI 5 -#define OVERFI 6 -#define CFGOK 7 - -#define UESTA1X _SFR_MEM8(0xEF) -#define CURRBK0 0 -#define CURRBK1 1 -#define CTRLDIR 2 - -#define UEIENX _SFR_MEM8(0xF0) -#define TXINE 0 -#define STALLEDE 1 -#define RXOUTE 2 -#define RXSTPE 3 -#define NAKOUTE 4 -#define NAKINE 6 -#define FLERRE 7 - -#define UEDATX _SFR_MEM8(0xF1) -#define UEDATX_0 0 -#define UEDATX_1 1 -#define UEDATX_2 2 -#define UEDATX_3 3 -#define UEDATX_4 4 -#define UEDATX_5 5 -#define UEDATX_6 6 -#define UEDATX_7 7 - -#define UEBCLX _SFR_MEM8(0xF2) -#define UEBCLX_0 0 -#define UEBCLX_1 1 -#define UEBCLX_2 2 -#define UEBCLX_3 3 -#define UEBCLX_4 4 -#define UEBCLX_5 5 -#define UEBCLX_6 6 -#define UEBCLX_7 7 - -#define UEBCHX _SFR_MEM8(0xF3) -#define UEBCHX_0 0 -#define UEBCHX_1 1 -#define UEBCHX_2 2 - -#define UEINT _SFR_MEM8(0xF4) -#define EPINT0 0 -#define EPINT1 1 -#define EPINT2 2 -#define EPINT3 3 -#define EPINT4 4 -#define EPINT5 5 -#define EPINT6 6 - - -/* Interrupt vectors */ -/* Vector 0 is the reset vector */ -#define INT0_vect_num 1 -#define INT0_vect _VECTOR(1) /* External Interrupt Request 0 */ -#define INT1_vect_num 2 -#define INT1_vect _VECTOR(2) /* External Interrupt Request 1 */ -#define INT2_vect_num 3 -#define INT2_vect _VECTOR(3) /* External Interrupt Request 2 */ -#define INT3_vect_num 4 -#define INT3_vect _VECTOR(4) /* External Interrupt Request 3 */ -#define INT4_vect_num 5 -#define INT4_vect _VECTOR(5) /* External Interrupt Request 4 */ -#define INT5_vect_num 6 -#define INT5_vect _VECTOR(6) /* External Interrupt Request 5 */ -#define INT6_vect_num 7 -#define INT6_vect _VECTOR(7) /* External Interrupt Request 6 */ -#define INT7_vect_num 8 -#define INT7_vect _VECTOR(8) /* External Interrupt Request 7 */ -#define PCINT0_vect_num 9 -#define PCINT0_vect _VECTOR(9) /* Pin Change Interrupt Request 0 */ -#define USB_GEN_vect_num 10 -#define USB_GEN_vect _VECTOR(10) /* USB General Interrupt Request */ -#define USB_COM_vect_num 11 -#define USB_COM_vect _VECTOR(11) /* USB Endpoint/Pipe Interrupt Communication Request */ -#define WDT_vect_num 12 -#define WDT_vect _VECTOR(12) /* Watchdog Time-out Interrupt */ -#define TIMER2_COMPA_vect_num 13 -#define TIMER2_COMPA_vect _VECTOR(13) /* Timer/Counter2 Compare Match A */ -#define TIMER2_COMPB_vect_num 14 -#define TIMER2_COMPB_vect _VECTOR(14) /* Timer/Counter2 Compare Match B */ -#define TIMER2_OVF_vect_num 15 -#define TIMER2_OVF_vect _VECTOR(15) /* Timer/Counter2 Overflow */ -#define TIMER1_CAPT_vect_num 16 -#define TIMER1_CAPT_vect _VECTOR(16) /* Timer/Counter1 Capture Event */ -#define TIMER1_COMPA_vect_num 17 -#define TIMER1_COMPA_vect _VECTOR(17) /* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPB_vect_num 18 -#define TIMER1_COMPB_vect _VECTOR(18) /* Timer/Counter1 Compare Match B */ -#define TIMER1_COMPC_vect_num 19 -#define TIMER1_COMPC_vect _VECTOR(19) /* Timer/Counter1 Compare Match C */ -#define TIMER1_OVF_vect_num 20 -#define TIMER1_OVF_vect _VECTOR(20) /* Timer/Counter1 Overflow */ -#define TIMER0_COMPA_vect_num 21 -#define TIMER0_COMPA_vect _VECTOR(21) /* Timer/Counter0 Compare Match A */ -#define TIMER0_COMPB_vect_num 22 -#define TIMER0_COMPB_vect _VECTOR(22) /* Timer/Counter0 Compare Match B */ -#define TIMER0_OVF_vect_num 23 -#define TIMER0_OVF_vect _VECTOR(23) /* Timer/Counter0 Overflow */ -#define SPI_STC_vect_num 24 -#define SPI_STC_vect _VECTOR(24) /* SPI Serial Transfer Complete */ -#define USART1_RX_vect_num 25 -#define USART1_RX_vect _VECTOR(25) /* USART1, Rx Complete */ -#define USART1_UDRE_vect_num 26 -#define USART1_UDRE_vect _VECTOR(26) /* USART1 Data register Empty */ -#define USART1_TX_vect_num 27 -#define USART1_TX_vect _VECTOR(27) /* USART1, Tx Complete */ -#define ANALOG_COMP_vect_num 28 -#define ANALOG_COMP_vect _VECTOR(28) /* Analog Comparator */ -#define ADC_vect_num 29 -#define ADC_vect _VECTOR(29) /* ADC Conversion Complete */ -#define EE_READY_vect_num 30 -#define EE_READY_vect _VECTOR(30) /* EEPROM Ready */ -#define TIMER3_CAPT_vect_num 31 -#define TIMER3_CAPT_vect _VECTOR(31) /* Timer/Counter3 Capture Event */ -#define TIMER3_COMPA_vect_num 32 -#define TIMER3_COMPA_vect _VECTOR(32) /* Timer/Counter3 Compare Match A */ -#define TIMER3_COMPB_vect_num 33 -#define TIMER3_COMPB_vect _VECTOR(33) /* Timer/Counter3 Compare Match B */ -#define TIMER3_COMPC_vect_num 34 -#define TIMER3_COMPC_vect _VECTOR(34) /* Timer/Counter3 Compare Match C */ -#define TIMER3_OVF_vect_num 35 -#define TIMER3_OVF_vect _VECTOR(35) /* Timer/Counter3 Overflow */ -#define TWI_vect_num 36 -#define TWI_vect _VECTOR(36) /* 2-wire Serial Interface */ -#define SPM_READY_vect_num 37 -#define SPM_READY_vect _VECTOR(37) /* Store Program Memory Read */ - -#define _VECTOR_SIZE 4 /* Size of individual vector. */ -#define _VECTORS_SIZE (38 * _VECTOR_SIZE) - - -/* Constants */ -#define SPM_PAGESIZE (128) -#define RAMSTART (0x100) -#define RAMSIZE (2560) -#define RAMEND (RAMSTART + RAMSIZE - 1) -#define XRAMSTART (0x2200) -#define XRAMSIZE (65536) -#define XRAMEND (XRAMSTART + XRAMSIZE - 1) -#define E2END (0x3FF) -#define E2PAGESIZE (4) -#define FLASHEND (0x7FFF) - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) /* Select Clock Source */ -#define FUSE_CKSEL1 (unsigned char)~_BV(1) /* Select Clock Source */ -#define FUSE_CKSEL2 (unsigned char)~_BV(2) /* Select Clock Source */ -#define FUSE_CKSEL3 (unsigned char)~_BV(3) /* Select Clock Source */ -#define FUSE_SUT0 (unsigned char)~_BV(4) /* Select start-up time */ -#define FUSE_SUT1 (unsigned char)~_BV(5) /* Select start-up time */ -#define FUSE_CKOUT (unsigned char)~_BV(6) /* Oscillator options */ -#define FUSE_CKDIV8 (unsigned char)~_BV(7) /* Divide clock by 8 */ -#define LFUSE_DEFAULT (FUSE_CKDIV8 & FUSE_SUT1 & FUSE_SUT0 & FUSE_CKSEL3 & FUSE_CKSEL2 & FUSE_CKSEL1) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) /* Select Reset Vector */ -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) /* Select Boot Size */ -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) /* Select Boot Size */ -#define FUSE_EESAVE (unsigned char)~_BV(3) /* EEPROM memory is preserved through chip erase */ -#define FUSE_WDTON (unsigned char)~_BV(4) /* Watchdog timer always on */ -#define FUSE_SPIEN (unsigned char)~_BV(5) /* Enable Serial programming and Data Downloading */ -#define FUSE_JTAGEN (unsigned char)~_BV(6) /* Enable JTAG */ -#define FUSE_OCDEN (unsigned char)~_BV(7) /* Enable OCD */ -#define HFUSE_DEFAULT (FUSE_JTAGEN & FUSE_SPIEN & FUSE_BOOTSZ1 & FUSE_BOOTSZ0) - -/* Extended Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) /* Brown-out Detector trigger level */ -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) /* Brown-out Detector trigger level */ -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) /* Brown-out Detector trigger level */ -#define FUSE_HWBE (unsigned char)~_BV(3) /* Hardware Boot Enable */ -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x95 -#define SIGNATURE_2 0x88 - - -#endif /* _AVR_ATmega32U6_H_ */ - diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom406.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom406.h deleted file mode 100644 index f3b68892a..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom406.h +++ /dev/null @@ -1,768 +0,0 @@ -/* Copyright (c) 2006, Pieter Conradie - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iom406.h,v 1.3.2.5 2008/10/17 23:27:49 arcanum Exp $ */ - -/* avr/iom406.h - definitions for ATmega406 */ - -#ifndef _AVR_IOM406_H_ -#define _AVR_IOM406_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iom406.h" -#else -# error "Attempt to include more than one file." -#endif - -/* I/O registers */ - -#define PINA _SFR_IO8(0x00) -#define PINA7 7 -#define PINA6 6 -#define PINA5 5 -#define PINA4 4 -#define PINA3 3 -#define PINA2 2 -#define PINA1 1 -#define PINA0 0 - -#define DDRA _SFR_IO8(0x01) -#define DDA7 7 -#define DDA6 6 -#define DDA5 5 -#define DDA4 4 -#define DDA3 3 -#define DDA2 2 -#define DDA1 1 -#define DDA0 0 - -#define PORTA _SFR_IO8(0x02) -#define PA7 7 -#define PA6 6 -#define PA5 5 -#define PA4 4 -#define PA3 3 -#define PA2 2 -#define PA1 1 -#define PA0 0 - -#define PINB _SFR_IO8(0x03) -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -#define DDRB _SFR_IO8(0x04) -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -#define PORTB _SFR_IO8(0x05) -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -/* Reserved [0x06..0x07] */ - -#define PORTC _SFR_IO8(0x08) -#define PC0 0 - -#define PIND _SFR_IO8(0x09) -#define PIND1 1 -#define PIND0 0 - -#define DDRD _SFR_IO8(0x0A) -#define DDD1 1 -#define DDD0 0 - -#define PORTD _SFR_IO8(0x0B) -#define PD1 1 -#define PD0 0 - -/* Reserved [0x0C..0x14] */ - -/* Timer/Counter0 Interrupt Flag Register */ -#define TIFR0 _SFR_IO8(0x15) -#define OCF0B 2 -#define OCF0A 1 -#define TOV0 0 - -/* Timer/Counter1 Interrupt Flag Register */ -#define TIFR1 _SFR_IO8(0x16) -#define OCF1A 1 -#define TOV1 0 - -/* Reserved [0x17..0x1A] */ - -/* Pin Change Interrupt Control Register */ -#define PCIFR _SFR_IO8(0x1B) -#define PCIF1 1 -#define PCIF0 0 - -/* External Interrupt Flag Register */ -#define EIFR _SFR_IO8(0x1C) -#define INTF3 3 -#define INTF2 2 -#define INTF1 1 -#define INTF0 0 - -/* External Interrupt MaSK register */ -#define EIMSK _SFR_IO8(0x1D) -#define INT3 3 -#define INT2 2 -#define INT1 1 -#define INT0 0 - -/* General Purpose I/O Register 0 */ -#define GPIOR0 _SFR_IO8(0x1E) - -/* EEPROM Control Register */ -#define EECR _SFR_IO8(0x1F) -#define EEPM1 5 -#define EEPM0 4 -#define EERIE 3 -#define EEMPE 2 -#define EEPE 1 -#define EERE 0 - -/* EEPROM Data Register */ -#define EEDR _SFR_IO8(0x20) - -/* EEPROM Address Register */ -#define EEAR _SFR_IO16(0x21) -#define EEARL _SFR_IO8(0x21) -#define EEARH _SFR_IO8(0x22) - -/* 6-char sequence denoting where to find the EEPROM registers in memory space. - Adresses denoted in hex syntax with uppercase letters. Used by the EEPROM - subroutines. - First two letters: EECR address. - Second two letters: EEDR address. - Last two letters: EEAR address. */ -#define __EEPROM_REG_LOCATIONS__ 1F2021 - -/* General Timer/Counter Control Register */ -#define GTCCR _SFR_IO8(0x23) -#define TSM 7 -#define PSRSYNC 0 - -/* Timer/Counter Control Register A */ -#define TCCR0A _SFR_IO8(0x24) -#define COM0A1 7 -#define COM0A0 6 -#define COM0B1 5 -#define COM0B0 4 -#define WGM01 1 -#define WGM00 0 - -/* Timer/Counter Control Register B */ -#define TCCR0B _SFR_IO8(0x25) -#define FOC0A 7 -#define FOC0B 6 -#define WGM02 3 -#define CS02 2 -#define CS01 1 -#define CS00 0 - -/* Timer/Counter 0 */ -#define TCNT0 _SFR_IO8(0x26) - -/* Output Compare Register A */ -#define OCR0A _SFR_IO8(0x27) - -/* Output Compare Register B */ -#define OCR0B _SFR_IO8(0x28) - -/* Reserved [0x29] */ - -/* General Purpose I/O Register 1 */ -#define GPIOR1 _SFR_IO8(0x2A) - -/* General Purpose I/O Register 2 */ -#define GPIOR2 _SFR_IO8(0x2B) - -/* Reserved [0x2C..0x30] */ - -/* On-chip Debug Register */ -#define OCDR _SFR_IO8(0x31) - -/* Reserved [0x32] */ - -/* Sleep Mode Control Register */ -#define SMCR _SFR_IO8(0x33) -#define SM2 3 -#define SM1 2 -#define SM0 1 -#define SE 0 - -/* MCU Status Register */ -#define MCUSR _SFR_IO8(0x34) -#define JTRF 4 -#define WDRF 3 -#define BODRF 2 -#define EXTRF 1 -#define PORF 0 - -/* MCU general Control Register */ -#define MCUCR _SFR_IO8(0x35) -#define JTD 7 -#define PUD 4 -#define IVSEL 1 -#define IVCE 0 - -/* Reserved [0x36] */ - -/* Store Program Memory Control and Status Register */ -#define SPMCSR _SFR_IO8(0x37) -#define SPMIE 7 -#define RWWSB 6 -#define SIGRD 5 -#define RWWSRE 4 -#define BLBSET 3 -#define PGWRT 2 -#define PGERS 1 -#define SPMEN 0 - -/* Reserved [0x36..0x3C] */ - -/* 0x3D..0x3E SP */ - -/* 0x3F SREG */ - -/* Extended I/O registers */ - -/* Watchdog Timer Control Register */ -#define WDTCSR _SFR_MEM8(0x60) -#define WDIF 7 -#define WDIE 6 -#define WDP3 5 -#define WDCE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -/* Reserved [0x61] */ - -/* Wake-up Timer Control and Status Register */ -#define WUTCSR _SFR_MEM8(0x62) -#define WUTIF 7 -#define WUTIE 6 -#define WUTCF 5 -#define WUTR 4 -#define WUTE 3 -#define WUTP2 2 -#define WUTP1 1 -#define WUTP0 0 - -/* Reserved [0x63] */ - -/* Power Reduction Register 0 */ -#define PRR0 _SFR_MEM8(0x64) -#define PRTWI 3 -#define PRTIM1 2 -#define PRTIM0 1 -#define PRVADC 0 - -/* Reserved [0x65] */ - -/* Fast Oscillator Calibration Register */ -#define FOSCCAL _SFR_MEM8(0x66) - -/* Reserved [0x67] */ - -/* Pin Change Interrupt Control Register */ -#define PCICR _SFR_MEM8(0x68) -#define PCIE1 1 -#define PCIE0 0 - -/* External Interrupt Control Register A */ -#define EICRA _SFR_MEM8(0x69) -#define ISC31 7 -#define ISC30 6 -#define ISC21 5 -#define ISC20 4 -#define ISC11 3 -#define ISC10 2 -#define ISC01 1 -#define ISC00 0 - -/* Reserved [0x6A] */ - -/* Pin Change Mask Register 0 */ -#define PCMSK0 _SFR_MEM8(0x6B) -#define PCINT7 7 -#define PCINT6 6 -#define PCINT5 5 -#define PCINT4 4 -#define PCINT3 3 -#define PCINT2 2 -#define PCINT1 1 -#define PCINT0 0 - -/* Pin Change Mask Register 1 */ -#define PCMSK1 _SFR_MEM8(0x6C) -#define PCINT15 7 -#define PCINT14 6 -#define PCINT13 5 -#define PCINT12 4 -#define PCINT11 3 -#define PCINT10 2 -#define PCINT9 1 -#define PCINT8 0 - -/* Reserved [0x6D] */ - -/* Timer/Counter Interrupt MaSK register 0 */ -#define TIMSK0 _SFR_MEM8(0x6E) -#define OCIE0B 2 -#define OCIE0A 1 -#define TOIE0 0 - -/* Timer/Counter Interrupt MaSK register 1 */ -#define TIMSK1 _SFR_MEM8(0x6F) -#define OCIE1A 1 -#define TOIE1 0 - -/* Reserved [0x70..0x77] */ - -/* V-ADC Data Register */ -#define VADC _SFR_MEM16(0x78) -#define VADCL _SFR_MEM8(0x78) -#define VADCH _SFR_MEM8(0x79) - -/* V-ADC Control and Status Register */ -#define VADCSR _SFR_MEM8(0x7A) -#define VADEN 3 -#define VADSC 2 -#define VADCCIF 1 -#define VADCCIE 0 - -/* Reserved [0x7B] */ - -/* V-ADC Multiplexer Selection Register */ -#define VADMUX _SFR_MEM8(0x7C) -#define VADMUX3 3 -#define VADMUX2 2 -#define VADMUX1 1 -#define VADMUX0 0 - -/* Reserved [0x7D] */ - -/* Digital Input Disable Register 0 */ -#define DIDR0 _SFR_MEM8(0x7E) -#define VADC3D 3 -#define VADC2D 2 -#define VADC1D 1 -#define VADC0D 0 - -/* Reserved [0x82..0x83] */ - -/* Timer/Counter 1 Control and Status Register */ -#define TCCR1B _SFR_MEM8(0x81) -#define CTC1 3 -#define CS12 2 -#define CS11 1 -#define CS10 0 - -/* Reserved [0x82..0x83] */ - -/* Timer/Counter 1 */ -#define TCNT1 _SFR_MEM16(0x84) -#define TCNT1L _SFR_MEM8(0x84) -#define TCNT1H _SFR_MEM8(0x85) - -/* Reserved [0x86..0x87] */ - -/* Timer/Counter1 Output Compare Register A */ -#define OCR1A _SFR_MEM16(0x88) -#define OCR1AL _SFR_MEM8(0x88) -#define OCR1AH _SFR_MEM8(0x89) - -/* Reserved [0x8A..0xB7] */ - -/* 2-wire Serial Interface Bit Rate Register */ -#define TWBR _SFR_MEM8(0xB8) - -/* 2-wire Serial Interface Status Register */ -#define TWSR _SFR_MEM8(0xB9) -#define TWS7 7 -#define TWS6 6 -#define TWS5 5 -#define TWS4 4 -#define TWS3 3 -#define TWPS1 1 -#define TWPS0 0 - -/* 2-wire Serial Interface Address Register */ -#define TWAR _SFR_MEM8(0xBA) -#define TWA6 7 -#define TWA5 6 -#define TWA4 5 -#define TWA3 4 -#define TWA2 3 -#define TWA1 2 -#define TWA0 1 -#define TWGCE 0 - -/* 2-wire Serial Interface Data Register */ -#define TWDR _SFR_MEM8(0xBB) - -/* 2-wire Serial Interface Control Register */ -#define TWCR _SFR_MEM8(0xBC) -#define TWINT 7 -#define TWEA 6 -#define TWSTA 5 -#define TWSTO 4 -#define TWWC 3 -#define TWEN 2 -#define TWIE 0 - -/* 2-wire Serial (Slave) Address Mask Register */ -#define TWAMR _SFR_MEM8(0xBD) -#define TWAM6 7 -#define TWAM5 6 -#define TWAM4 5 -#define TWAM3 4 -#define TWAM2 3 -#define TWAM1 2 -#define TWAM0 1 - -/* 2-wire Serial Bus Control and Status Register */ -#define TWBCSR _SFR_MEM8(0xBE) -#define TWBCIF 7 -#define TWBCIE 6 -#define TWBDT1 2 -#define TWBDT0 1 -#define TWBCIP 0 - -/* Reserved [0xBF] */ - -/* Clock Control Status Register */ -#define CCSR _SFR_MEM8(0xC0) -#define XOE 1 -#define ACS 0 - -/* Reserved [0xC1..0xCF] */ - -/* Bandgap Calibration C Register */ -#define BGCCR _SFR_MEM8(0xD0) -#define BGEN 7 -#define BGCC5 5 -#define BGCC4 4 -#define BGCC3 3 -#define BGCC2 2 -#define BGCC1 1 -#define BGCC0 0 - -/* Bandgap Calibration R Register */ -#define BGCRR _SFR_MEM8(0xD1) -#define BGCR7 7 -#define BGCR6 6 -#define BGCR5 5 -#define BGCR4 4 -#define BGCR3 3 -#define BGCR2 2 -#define BGCR1 1 -#define BGCR0 0 - -/* Reserved [0xD2..0xDF] */ - -/* CC-ADC Accumulate Current */ -/* TODO: Add _SFR_MEM32 */ -/* #define CADAC _SFR_MEM32(0xE0) */ -#define CADAC0 _SFR_MEM8(0xE0) -#define CADAC1 _SFR_MEM8(0xE1) -#define CADAC2 _SFR_MEM8(0xE2) -#define CADAC3 _SFR_MEM8(0xE3) - -/* CC-ADC Control and Status Register A */ -#define CADCSRA _SFR_MEM8(0xE4) -#define CADEN 7 -#define CADUB 5 -#define CADAS1 4 -#define CADAS0 3 -#define CADSI1 2 -#define CADSI0 1 -#define CADSE 0 - -/* CC-ADC Control and Status Register B */ -#define CADCSRB _SFR_MEM8(0xE5) -#define CADACIE 6 -#define CADRCIE 5 -#define CADICIE 4 -#define CADACIF 2 -#define CADRCIF 1 -#define CADICIF 0 - -/* CC-ADC Regular Charge Current */ -#define CADRCC _SFR_MEM8(0xE6) - -/* CC-ADC Regular Discharge Current */ -#define CADRDC _SFR_MEM8(0xE7) - -/* CC-ADC Instantaneous Current */ -#define CADIC _SFR_MEM16(0xE8) -#define CADICL _SFR_MEM8(0xE8) -#define CADICH _SFR_MEM8(0xE9) - -/* Reserved [0xEA..0xEF] */ - -/* FET Control and Status Register */ -#define FCSR _SFR_MEM8(0xF0) -#define PWMOC 5 -#define PWMOPC 4 -#define CPS 3 -#define DFE 2 -#define CFE 1 -#define PFD 0 - -/* Cell Balancing Control Register */ -#define CBCR _SFR_MEM8(0xF1) -#define CBE4 3 -#define CBE3 2 -#define CBE2 1 -#define CBE1 0 - -/* Battery Protection Interrupt Register */ -#define BPIR _SFR_MEM8(0xF2) -#define DUVIF 7 -#define COCIF 6 -#define DOCIF 5 -#define SCIF 4 -#define DUVIE 3 -#define COCIE 2 -#define DOCIE 1 -#define SCIE 0 - -/* Battery Protection Deep Under Voltage Register */ -#define BPDUV _SFR_MEM8(0xF3) -#define DUVT1 5 -#define DUVT0 4 -#define DUDL3 3 -#define DUDL2 2 -#define DUDL1 1 -#define DUDL0 0 - -/* Battery Protection Short-circuit Detection Level Register */ -#define BPSCD _SFR_MEM8(0xF4) -#define SCDL3 3 -#define SCDL2 2 -#define SCDL1 1 -#define SCDL0 0 - -/* Battery Protection Over-current Detection Level Register */ -#define BPOCD _SFR_MEM8(0xF5) -#define DCDL3 7 -#define DCDL2 6 -#define DCDL1 5 -#define DCDL0 4 -#define CCDL3 3 -#define CCDL2 2 -#define CCDL1 1 -#define CCDL0 0 - -/* Current Battery Protection Timing Register */ -#define CBPTR _SFR_MEM8(0xF6) -#define SCPT3 7 -#define SCPT2 6 -#define SCPT1 5 -#define SCPT0 4 -#define OCPT3 3 -#define OCPT2 2 -#define OCPT1 1 -#define OCPT0 0 - -/* Battery Protection Control Register */ -#define BPCR _SFR_MEM8(0xF7) -#define DUVD 3 -#define SCD 2 -#define DCD 1 -#define CCD 0 - -/* Battery Protection Parameter Lock Register */ -#define BPPLR _SFR_MEM8(0xF8) -#define BPPLE 1 -#define BPPL 0 - -/* Reserved [0xF9..0xFF] */ - -/* Interrupt vectors */ -/* Battery Protection Interrupt */ -#define BPINT_vect _VECTOR(1) - - -/* External Interrupt Request 0 */ -#define INT0_vect _VECTOR(2) - - -/* External Interrupt Request 1 */ -#define INT1_vect _VECTOR(3) - - -/* External Interrupt Request 2 */ -#define INT2_vect _VECTOR(4) - - -/* External Interrupt Request 3 */ -#define INT3_vect _VECTOR(5) - - -/* Pin Change Interrupt 0 */ -#define PCINT0_vect _VECTOR(6) - - -/* Pin Change Interrupt 1 */ -#define PCINT1_vect _VECTOR(7) - - -/* Watchdog Timeout Interrupt */ -#define WDT_vect _VECTOR(8) - - -/* Wakeup timer overflow */ -#define WAKE_UP_vect _VECTOR(9) - - -/* Timer/Counter 1 Compare Match */ -#define TIM1_COMP_vect _VECTOR(10) - - -/* Timer/Counter 1 Overflow */ -#define TIM1_OVF_vect _VECTOR(11) - - -/* Timer/Counter0 Compare A Match */ -#define TIM0_COMPA_vect _VECTOR(12) - - -/* Timer/Counter0 Compare B Match */ -#define TIM0_COMPB_vect _VECTOR(13) - - -/* Timer/Counter0 Overflow */ -#define TIM0_OVF_vect _VECTOR(14) - - -/* Two-Wire Bus Connect/Disconnect */ -#define TWI_BUS_CD_vect _VECTOR(15) - - -/* Two-Wire Serial Interface */ -#define TWI_vect _VECTOR(16) - - -/* Voltage ADC Conversion Complete */ -#define VADC_vect _VECTOR(17) - - -/* Coulomb Counter ADC Conversion Complete */ -#define CCADC_CONV_vect _VECTOR(18) - -/* Coloumb Counter ADC Regular Current */ -#define CCADC_REG_CUR_vect _VECTOR(19) - - -/* Coloumb Counter ADC Accumulator */ -#define CCADC_ACC_vect _VECTOR(20) - - -/* EEPROM Ready */ -#define EE_READY_vect _VECTOR(21) - - -/* Store Program Memory Ready */ -#define SPM_READY_vect _VECTOR(22) - -#define _VECTORS_SIZE 92 - -/* Constants */ -#define SPM_PAGESIZE 128 -#define RAMEND 0x8FF -#define XRAMEND 0x8FF -#define E2END 0x1FF -#define E2PAGESIZE 4 -#define FLASHEND 0x9FFF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 2 - -/* Low Fuse Byte */ -#define FUSE_CKSEL (unsigned char)~_BV(0) -#define FUSE_SUT0 (unsigned char)~_BV(1) -#define FUSE_SUT1 (unsigned char)~_BV(2) -#define FUSE_BOOTRST (unsigned char)~_BV(3) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(4) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(5) -#define FUSE_EESAVE (unsigned char)~_BV(6) -#define FUSE_WDTON (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_SUT0 & FUSE_BOOTSZ0 & FUSE_BOOTSZ1) - -/* High Fuse Byte */ -#define FUSE_JTAGEN (unsigned char)~_BV(0) -#define FUSE_OCDEN (unsigned char)~_BV(1) -#define HFUSE_DEFAULT (FUSE_JTAGEN) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x95 -#define SIGNATURE_2 0x07 - - -#endif /* _AVR_IOM406_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom48.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom48.h deleted file mode 100644 index 226b9bc84..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom48.h +++ /dev/null @@ -1,87 +0,0 @@ -/* Copyright (c) 2004, Theodore A. Roth - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iom48.h,v 1.3.2.3 2008/08/14 00:08:03 arcanum Exp $ */ - -#ifndef _AVR_IOM48_H_ -#define _AVR_IOM48_H_ 1 - -#include - -/* Constants */ -#define SPM_PAGESIZE 64 -#define RAMEND 0x2FF -#define XRAMEND 0x2FF -#define E2END 0xFF -#define E2PAGESIZE 4 -#define FLASHEND 0xFFF - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) /* Select Clock Source */ -#define FUSE_CKSEL1 (unsigned char)~_BV(1) /* Select Clock Source */ -#define FUSE_CKSEL2 (unsigned char)~_BV(2) /* Select Clock Source */ -#define FUSE_CKSEL3 (unsigned char)~_BV(3) /* Select Clock Source */ -#define FUSE_SUT0 (unsigned char)~_BV(4) /* Select start-up time */ -#define FUSE_SUT1 (unsigned char)~_BV(5) /* Select start-up time */ -#define FUSE_CKOUT (unsigned char)~_BV(6) /* Clock output */ -#define FUSE_CKDIV8 (unsigned char)~_BV(7) /* Divide clock by 8 */ -#define LFUSE_DEFAULT (FUSE_CKDIV8 & FUSE_SUT0 & FUSE_CKSEL3 & FUSE_CKSEL2 & FUSE_CKSEL0) - -/* High Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) /* Brown-out Detector trigger level */ -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) /* Brown-out Detector trigger level */ -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) /* Brown-out Detector trigger level */ -#define FUSE_EESAVE (unsigned char)~_BV(3) /* EEPROM memory is preserved through chip erase */ -#define FUSE_WDTON (unsigned char)~_BV(4) /* Watchdog Timer Always On */ -#define FUSE_SPIEN (unsigned char)~_BV(5) /* Enable Serial programming and Data Downloading */ -#define FUSE_DWEN (unsigned char)~_BV(6) /* debugWIRE Enable */ -#define FUSE_RSTDISBL (unsigned char)~_BV(7) /* External reset disable */ -#define HFUSE_DEFAULT (FUSE_SPIEN) - -/* Extended Fuse Byte */ -#define FUSE_SELFPRGEN (unsigned char)~_BV(0) /* Self Programming Enable */ -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x92 -#define SIGNATURE_2 0x05 - - -#endif /* _AVR_IOM48_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom48p.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom48p.h deleted file mode 100644 index 070bca136..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom48p.h +++ /dev/null @@ -1,868 +0,0 @@ -/* Copyright (c) 2007 Atmel Corporation - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. -*/ - -/* $Id: iom48p.h,v 1.3.2.11 2008/10/17 23:27:49 arcanum Exp $ */ - -/* avr/iom48p.h - definitions for ATmega48P. */ - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iom48p.h" -#else -# error "Attempt to include more than one file." -#endif - - -#ifndef _AVR_IOM48P_H_ -#define _AVR_IOM48P_H_ 1 - -/* Registers and associated bit numbers */ - -#define PINB _SFR_IO8(0x03) -#define PINB0 0 -#define PINB1 1 -#define PINB2 2 -#define PINB3 3 -#define PINB4 4 -#define PINB5 5 -#define PINB6 6 -#define PINB7 7 - -#define DDRB _SFR_IO8(0x04) -#define DDB0 0 -#define DDB1 1 -#define DDB2 2 -#define DDB3 3 -#define DDB4 4 -#define DDB5 5 -#define DDB6 6 -#define DDB7 7 - -#define PORTB _SFR_IO8(0x05) -#define PORTB0 0 -#define PORTB1 1 -#define PORTB2 2 -#define PORTB3 3 -#define PORTB4 4 -#define PORTB5 5 -#define PORTB6 6 -#define PORTB7 7 - -#define PINC _SFR_IO8(0x06) -#define PINC0 0 -#define PINC1 1 -#define PINC2 2 -#define PINC3 3 -#define PINC4 4 -#define PINC5 5 -#define PINC6 6 - -#define DDRC _SFR_IO8(0x07) -#define DDC0 0 -#define DDC1 1 -#define DDC2 2 -#define DDC3 3 -#define DDC4 4 -#define DDC5 5 -#define DDC6 6 - -#define PORTC _SFR_IO8(0x08) -#define PORTC0 0 -#define PORTC1 1 -#define PORTC2 2 -#define PORTC3 3 -#define PORTC4 4 -#define PORTC5 5 -#define PORTC6 6 - -#define PIND _SFR_IO8(0x09) -#define PIND0 0 -#define PIND1 1 -#define PIND2 2 -#define PIND3 3 -#define PIND4 4 -#define PIND5 5 -#define PIND6 6 -#define PIND7 7 - -#define DDRD _SFR_IO8(0x0A) -#define DDD0 0 -#define DDD1 1 -#define DDD2 2 -#define DDD3 3 -#define DDD4 4 -#define DDD5 5 -#define DDD6 6 -#define DDD7 7 - -#define PORTD _SFR_IO8(0x0B) -#define PORTD0 0 -#define PORTD1 1 -#define PORTD2 2 -#define PORTD3 3 -#define PORTD4 4 -#define PORTD5 5 -#define PORTD6 6 -#define PORTD7 7 - -#define TIFR0 _SFR_IO8(0x15) -#define TOV0 0 -#define OCF0A 1 -#define OCF0B 2 - -#define TIFR1 _SFR_IO8(0x16) -#define TOV1 0 -#define OCF1A 1 -#define OCF1B 2 -#define ICF1 5 - -#define TIFR2 _SFR_IO8(0x17) -#define TOV2 0 -#define OCF2A 1 -#define OCF2B 2 - -#define PCIFR _SFR_IO8(0x1B) -#define PCIF0 0 -#define PCIF1 1 -#define PCIF2 2 - -#define EIFR _SFR_IO8(0x1C) -#define INTF0 0 -#define INTF1 1 - -#define EIMSK _SFR_IO8(0x1D) -#define INT0 0 -#define INT1 1 - -#define GPIOR0 _SFR_IO8(0x1E) -#define GPIOR00 0 -#define GPIOR01 1 -#define GPIOR02 2 -#define GPIOR03 3 -#define GPIOR04 4 -#define GPIOR05 5 -#define GPIOR06 6 -#define GPIOR07 7 - -#define EECR _SFR_IO8(0x1F) -#define EERE 0 -#define EEPE 1 -#define EEMPE 2 -#define EERIE 3 -#define EEPM0 4 -#define EEPM1 5 - -#define EEDR _SFR_IO8(0x20) -#define EEDR0 0 -#define EEDR1 1 -#define EEDR2 2 -#define EEDR3 3 -#define EEDR4 4 -#define EEDR5 5 -#define EEDR6 6 -#define EEDR7 7 - -#define EEARL _SFR_IO8(0x21) -#define EEAR0 0 -#define EEAR1 1 -#define EEAR2 2 -#define EEAR3 3 -#define EEAR4 4 -#define EEAR5 5 -#define EEAR6 6 -#define EEAR7 7 - -/* Only valid for ATmega88P-168P-328P */ -/* EEARH _SFR_IO8(0x22) */ - -#define EEPROM_REG_LOCATIONS 1F2021 - -#define GTCCR _SFR_IO8(0x23) -#define PSRSYNC 0 -#define PSRASY 1 -#define TSM 7 - -#define TCCR0A _SFR_IO8(0x24) -#define WGM00 0 -#define WGM01 1 -#define COM0B0 4 -#define COM0B1 5 -#define COM0A0 6 -#define COM0A1 7 - -#define TCCR0B _SFR_IO8(0x25) -#define CS00 0 -#define CS01 1 -#define CS02 2 -#define WGM02 3 -#define FOC0B 6 -#define FOC0A 7 - -#define TCNT0 _SFR_IO8(0x26) -#define TCNT0_0 0 -#define TCNT0_1 1 -#define TCNT0_2 2 -#define TCNT0_3 3 -#define TCNT0_4 4 -#define TCNT0_5 5 -#define TCNT0_6 6 -#define TCNT0_7 7 - -#define OCR0A _SFR_IO8(0x27) -#define OCROA_0 0 -#define OCROA_1 1 -#define OCROA_2 2 -#define OCROA_3 3 -#define OCROA_4 4 -#define OCROA_5 5 -#define OCROA_6 6 -#define OCROA_7 7 - -#define OCR0B _SFR_IO8(0x28) -#define OCR0B_0 0 -#define OCR0B_1 1 -#define OCR0B_2 2 -#define OCR0B_3 3 -#define OCR0B_4 4 -#define OCR0B_5 5 -#define OCR0B_6 6 -#define OCR0B_7 7 - -#define GPIOR1 _SFR_IO8(0x2A) -#define GPIOR10 0 -#define GPIOR11 1 -#define GPIOR12 2 -#define GPIOR13 3 -#define GPIOR14 4 -#define GPIOR15 5 -#define GPIOR16 6 -#define GPIOR17 7 - -#define GPIOR2 _SFR_IO8(0x2B) -#define GPIOR20 0 -#define GPIOR21 1 -#define GPIOR22 2 -#define GPIOR23 3 -#define GPIOR24 4 -#define GPIOR25 5 -#define GPIOR26 6 -#define GPIOR27 7 - -#define SPCR _SFR_IO8(0x2C) -#define SPR0 0 -#define SPR1 1 -#define CPHA 2 -#define CPOL 3 -#define MSTR 4 -#define DORD 5 -#define SPE 6 -#define SPIE 7 - -#define SPSR _SFR_IO8(0x2D) -#define SPI2X 0 -#define WCOL 6 -#define SPIF 7 - -#define SPDR _SFR_IO8(0x2E) -#define SPDR0 0 -#define SPDR1 1 -#define SPDR2 2 -#define SPDR3 3 -#define SPDR4 4 -#define SPDR5 5 -#define SPDR6 6 -#define SPDR7 7 - -#define ACSR _SFR_IO8(0x30) -#define ACIS0 0 -#define ACIS1 1 -#define ACIC 2 -#define ACIE 3 -#define ACI 4 -#define ACO 5 -#define ACBG 6 -#define ACD 7 - -#define SMCR _SFR_IO8(0x33) -#define SE 0 -#define SM0 1 -#define SM1 2 -#define SM2 3 - -#define MCUSR _SFR_IO8(0x34) -#define PORF 0 -#define EXTRF 1 -#define BORF 2 -#define WDRF 3 - -#define MCUCR _SFR_IO8(0x35) -#define PUD 4 -#define BODSE 5 -#define BODS 6 - -#define SPMCSR _SFR_IO8(0x37) -#define SELFPRGEN 0 -#define PGERS 1 -#define PGWRT 2 -#define BLBSET 3 -#define RWWSRE 4 -#define RWWSB 6 -#define SPMIE 7 - -#define WDTCSR _SFR_MEM8(0x60) -#define WDP0 0 -#define WDP1 1 -#define WDP2 2 -#define WDE 3 -#define WDCE 4 -#define WDP3 5 -#define WDIE 6 -#define WDIF 7 - -#define CLKPR _SFR_MEM8(0x61) -#define CLKPS0 0 -#define CLKPS1 1 -#define CLKPS2 2 -#define CLKPS3 3 -#define CLKPCE 7 - -#define PRR _SFR_MEM8(0x64) -#define PRADC 0 -#define PRUSART0 1 -#define PRSPI 2 -#define PRTIM1 3 -#define PRTIM0 5 -#define PRTIM2 6 -#define PRTWI 7 - -#define OSCCAL _SFR_MEM8(0x66) -#define CAL0 0 -#define CAL1 1 -#define CAL2 2 -#define CAL3 3 -#define CAL4 4 -#define CAL5 5 -#define CAL6 6 -#define CAL7 7 - -#define PCICR _SFR_MEM8(0x68) -#define PCIE0 0 -#define PCIE1 1 -#define PCIE2 2 - -#define EICRA _SFR_MEM8(0x69) -#define ISC00 0 -#define ISC01 1 -#define ISC10 2 -#define ISC11 3 - -#define PCMSK0 _SFR_MEM8(0x6B) -#define PCINT0 0 -#define PCINT1 1 -#define PCINT2 2 -#define PCINT3 3 -#define PCINT4 4 -#define PCINT5 5 -#define PCINT6 6 -#define PCINT7 7 - -#define PCMSK1 _SFR_MEM8(0x6C) -#define PCINT8 0 -#define PCINT9 1 -#define PCINT10 2 -#define PCINT11 3 -#define PCINT12 4 -#define PCINT13 5 -#define PCINT14 6 - -#define PCMSK2 _SFR_MEM8(0x6D) -#define PCINT16 0 -#define PCINT17 1 -#define PCINT18 2 -#define PCINT19 3 -#define PCINT20 4 -#define PCINT21 5 -#define PCINT22 6 -#define PCINT23 7 - -#define TIMSK0 _SFR_MEM8(0x6E) -#define TOIE0 0 -#define OCIE0A 1 -#define OCIE0B 2 - -#define TIMSK1 _SFR_MEM8(0x6F) -#define TOIE1 0 -#define OCIE1A 1 -#define OCIE1B 2 -#define ICIE1 5 - -#define TIMSK2 _SFR_MEM8(0x70) -#define TOIE2 0 -#define OCIE2A 1 -#define OCIE2B 2 - -#ifndef __ASSEMBLER__ -#define ADC _SFR_MEM16(0x78) -#endif -#define ADCW _SFR_MEM16(0x78) - -#define ADCL _SFR_MEM8(0x78) -#define ADCL0 0 -#define ADCL1 1 -#define ADCL2 2 -#define ADCL3 3 -#define ADCL4 4 -#define ADCL5 5 -#define ADCL6 6 -#define ADCL7 7 - -#define ADCH _SFR_MEM8(0x79) -#define ADCH0 0 -#define ADCH1 1 -#define ADCH2 2 -#define ADCH3 3 -#define ADCH4 4 -#define ADCH5 5 -#define ADCH6 6 -#define ADCH7 7 - -#define ADCSRA _SFR_MEM8(0x7A) -#define ADPS0 0 -#define ADPS1 1 -#define ADPS2 2 -#define ADIE 3 -#define ADIF 4 -#define ADATE 5 -#define ADSC 6 -#define ADEN 7 - -#define ADCSRB _SFR_MEM8(0x7B) -#define ADTS0 0 -#define ADTS1 1 -#define ADTS2 2 -#define ACME 6 - -#define ADMUX _SFR_MEM8(0x7C) -#define MUX0 0 -#define MUX1 1 -#define MUX2 2 -#define MUX3 3 -#define ADLAR 5 -#define REFS0 6 -#define REFS1 7 - -#define DIDR0 _SFR_MEM8(0x7E) -#define ADC0D 0 -#define ADC1D 1 -#define ADC2D 2 -#define ADC3D 3 -#define ADC4D 4 -#define ADC5D 5 - -#define DIDR1 _SFR_MEM8(0x7F) -#define AIN0D 0 -#define AIN1D 1 - -#define TCCR1A _SFR_MEM8(0x80) -#define WGM10 0 -#define WGM11 1 -#define COM1B0 4 -#define COM1B1 5 -#define COM1A0 6 -#define COM1A1 7 - -#define TCCR1B _SFR_MEM8(0x81) -#define CS10 0 -#define CS11 1 -#define CS12 2 -#define WGM12 3 -#define WGM13 4 -#define ICES1 6 -#define ICNC1 7 - -#define TCCR1C _SFR_MEM8(0x82) -#define FOC1B 6 -#define FOC1A 7 - -#define TCNT1 _SFR_MEM16(0x84) - -#define TCNT1L _SFR_MEM8(0x84) -#define TCNT1L0 0 -#define TCNT1L1 1 -#define TCNT1L2 2 -#define TCNT1L3 3 -#define TCNT1L4 4 -#define TCNT1L5 5 -#define TCNT1L6 6 -#define TCNT1L7 7 - -#define TCNT1H _SFR_MEM8(0x85) -#define TCNT1H0 0 -#define TCNT1H1 1 -#define TCNT1H2 2 -#define TCNT1H3 3 -#define TCNT1H4 4 -#define TCNT1H5 5 -#define TCNT1H6 6 -#define TCNT1H7 7 - -#define ICR1 _SFR_MEM16(0x86) - -#define ICR1L _SFR_MEM8(0x86) -#define ICR1L0 0 -#define ICR1L1 1 -#define ICR1L2 2 -#define ICR1L3 3 -#define ICR1L4 4 -#define ICR1L5 5 -#define ICR1L6 6 -#define ICR1L7 7 - -#define ICR1H _SFR_MEM8(0x87) -#define ICR1H0 0 -#define ICR1H1 1 -#define ICR1H2 2 -#define ICR1H3 3 -#define ICR1H4 4 -#define ICR1H5 5 -#define ICR1H6 6 -#define ICR1H7 7 - -#define OCR1A _SFR_MEM16(0x88) - -#define OCR1AL _SFR_MEM8(0x88) -#define OCR1AL0 0 -#define OCR1AL1 1 -#define OCR1AL2 2 -#define OCR1AL3 3 -#define OCR1AL4 4 -#define OCR1AL5 5 -#define OCR1AL6 6 -#define OCR1AL7 7 - -#define OCR1AH _SFR_MEM8(0x89) -#define OCR1AH0 0 -#define OCR1AH1 1 -#define OCR1AH2 2 -#define OCR1AH3 3 -#define OCR1AH4 4 -#define OCR1AH5 5 -#define OCR1AH6 6 -#define OCR1AH7 7 - -#define OCR1B _SFR_MEM16(0x8A) - -#define OCR1BL _SFR_MEM8(0x8A) -#define OCR1BL0 0 -#define OCR1BL1 1 -#define OCR1BL2 2 -#define OCR1BL3 3 -#define OCR1BL4 4 -#define OCR1BL5 5 -#define OCR1BL6 6 -#define OCR1BL7 7 - -#define OCR1BH _SFR_MEM8(0x8B) -#define OCR1BH0 0 -#define OCR1BH1 1 -#define OCR1BH2 2 -#define OCR1BH3 3 -#define OCR1BH4 4 -#define OCR1BH5 5 -#define OCR1BH6 6 -#define OCR1BH7 7 - -#define TCCR2A _SFR_MEM8(0xB0) -#define WGM20 0 -#define WGM21 1 -#define COM2B0 4 -#define COM2B1 5 -#define COM2A0 6 -#define COM2A1 7 - -#define TCCR2B _SFR_MEM8(0xB1) -#define CS20 0 -#define CS21 1 -#define CS22 2 -#define WGM22 3 -#define FOC2B 6 -#define FOC2A 7 - -#define TCNT2 _SFR_MEM8(0xB2) -#define TCNT2_0 0 -#define TCNT2_1 1 -#define TCNT2_2 2 -#define TCNT2_3 3 -#define TCNT2_4 4 -#define TCNT2_5 5 -#define TCNT2_6 6 -#define TCNT2_7 7 - -#define OCR2A _SFR_MEM8(0xB3) -#define OCR2_0 0 -#define OCR2_1 1 -#define OCR2_2 2 -#define OCR2_3 3 -#define OCR2_4 4 -#define OCR2_5 5 -#define OCR2_6 6 -#define OCR2_7 7 - -#define OCR2B _SFR_MEM8(0xB4) -#define OCR2_0 0 -#define OCR2_1 1 -#define OCR2_2 2 -#define OCR2_3 3 -#define OCR2_4 4 -#define OCR2_5 5 -#define OCR2_6 6 -#define OCR2_7 7 - -#define ASSR _SFR_MEM8(0xB6) -#define TCR2BUB 0 -#define TCR2AUB 1 -#define OCR2BUB 2 -#define OCR2AUB 3 -#define TCN2UB 4 -#define AS2 5 -#define EXCLK 6 - -#define TWBR _SFR_MEM8(0xB8) -#define TWBR0 0 -#define TWBR1 1 -#define TWBR2 2 -#define TWBR3 3 -#define TWBR4 4 -#define TWBR5 5 -#define TWBR6 6 -#define TWBR7 7 - -#define TWSR _SFR_MEM8(0xB9) -#define TWPS0 0 -#define TWPS1 1 -#define TWS3 3 -#define TWS4 4 -#define TWS5 5 -#define TWS6 6 -#define TWS7 7 - -#define TWAR _SFR_MEM8(0xBA) -#define TWGCE 0 -#define TWA0 1 -#define TWA1 2 -#define TWA2 3 -#define TWA3 4 -#define TWA4 5 -#define TWA5 6 -#define TWA6 7 - -#define TWDR _SFR_MEM8(0xBB) -#define TWD0 0 -#define TWD1 1 -#define TWD2 2 -#define TWD3 3 -#define TWD4 4 -#define TWD5 5 -#define TWD6 6 -#define TWD7 7 - -#define TWCR _SFR_MEM8(0xBC) -#define TWIE 0 -#define TWEN 2 -#define TWWC 3 -#define TWSTO 4 -#define TWSTA 5 -#define TWEA 6 -#define TWINT 7 - -#define TWAMR _SFR_MEM8(0xBD) -#define TWAM0 0 -#define TWAM1 1 -#define TWAM2 2 -#define TWAM3 3 -#define TWAM4 4 -#define TWAM5 5 -#define TWAM6 6 - -#define UCSR0A _SFR_MEM8(0xC0) -#define MPCM0 0 -#define U2X0 1 -#define UPE0 2 -#define DOR0 3 -#define FE0 4 -#define UDRE0 5 -#define TXC0 6 -#define RXC0 7 - -#define UCSR0B _SFR_MEM8(0xC1) -#define TXB80 0 -#define RXB80 1 -#define UCSZ02 2 -#define TXEN0 3 -#define RXEN0 4 -#define UDRIE0 5 -#define TXCIE0 6 -#define RXCIE0 7 - -#define UCSR0C _SFR_MEM8(0xC2) -#define UCPOL0 0 -#define UCSZ00 1 -#define UCPHA0 1 -#define UCSZ01 2 -#define UDORD0 2 -#define USBS0 3 -#define UPM00 4 -#define UPM01 5 -#define UMSEL00 6 -#define UMSEL01 7 - -#define UBRR0 _SFR_MEM16(0xC4) - -#define UBRR0L _SFR_MEM8(0xC4) -#define UBRR0_0 0 -#define UBRR0_1 1 -#define UBRR0_2 2 -#define UBRR0_3 3 -#define UBRR0_4 4 -#define UBRR0_5 5 -#define UBRR0_6 6 -#define UBRR0_7 7 - -#define UBRR0H _SFR_MEM8(0xC5) -#define UBRR0_8 0 -#define UBRR0_9 1 -#define UBRR0_10 2 -#define UBRR0_11 3 - -#define UDR0 _SFR_MEM8(0xC6) -#define UDR0_0 0 -#define UDR0_1 1 -#define UDR0_2 2 -#define UDR0_3 3 -#define UDR0_4 4 -#define UDR0_5 5 -#define UDR0_6 6 -#define UDR0_7 7 - - - -/* Interrupt Vectors */ -/* Interrupt Vector 0 is the reset vector. */ -#define INT0_vect _VECTOR(1) /* External Interrupt Request 0 */ -#define INT1_vect _VECTOR(2) /* External Interrupt Request 1 */ -#define PCINT0_vect _VECTOR(3) /* Pin Change Interrupt Request 0 */ -#define PCINT1_vect _VECTOR(4) /* Pin Change Interrupt Request 0 */ -#define PCINT2_vect _VECTOR(5) /* Pin Change Interrupt Request 1 */ -#define WDT_vect _VECTOR(6) /* Watchdog Time-out Interrupt */ -#define TIMER2_COMPA_vect _VECTOR(7) /* Timer/Counter2 Compare Match A */ -#define TIMER2_COMPB_vect _VECTOR(8) /* Timer/Counter2 Compare Match A */ -#define TIMER2_OVF_vect _VECTOR(9) /* Timer/Counter2 Overflow */ -#define TIMER1_CAPT_vect _VECTOR(10) /* Timer/Counter1 Capture Event */ -#define TIMER1_COMPA_vect _VECTOR(11) /* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPB_vect _VECTOR(12) /* Timer/Counter1 Compare Match B */ -#define TIMER1_OVF_vect _VECTOR(13) /* Timer/Counter1 Overflow */ -#define TIMER0_COMPA_vect _VECTOR(14) /* TimerCounter0 Compare Match A */ -#define TIMER0_COMPB_vect _VECTOR(15) /* TimerCounter0 Compare Match B */ -#define TIMER0_OVF_vect _VECTOR(16) /* Timer/Couner0 Overflow */ -#define SPI_STC_vect _VECTOR(17) /* SPI Serial Transfer Complete */ -#define USART_RX_vect _VECTOR(18) /* USART Rx Complete */ -#define USART_UDRE_vect _VECTOR(19) /* USART, Data Register Empty */ -#define USART_TX_vect _VECTOR(20) /* USART Tx Complete */ -#define ADC_vect _VECTOR(21) /* ADC Conversion Complete */ -#define EE_READY_vect _VECTOR(22) /* EEPROM Ready */ -#define ANALOG_COMP_vect _VECTOR(23) /* Analog Comparator */ -#define TWI_vect _VECTOR(24) /* Two-wire Serial Interface */ -#define SPM_READY_vect _VECTOR(25) /* Store Program Memory Read */ - -#define _VECTORS_SIZE (26 * 2) - - - -/* Constants */ -#define SPM_PAGESIZE 64 -#define RAMEND 0x2FF /* Last On-Chip SRAM Location */ -#define XRAMSIZE 0 -#define XRAMEND (RAMEND + XRAMSIZE) -#define E2END 0xFF -#define E2PAGESIZE 4 -#define FLASHEND 0xFFF - - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) /* Select Clock Source */ -#define FUSE_CKSEL1 (unsigned char)~_BV(1) /* Select Clock Source */ -#define FUSE_CKSEL2 (unsigned char)~_BV(2) /* Select Clock Source */ -#define FUSE_CKSEL3 (unsigned char)~_BV(3) /* Select Clock Source */ -#define FUSE_SUT0 (unsigned char)~_BV(4) /* Select start-up time */ -#define FUSE_SUT1 (unsigned char)~_BV(5) /* Select start-up time */ -#define FUSE_CKOUT (unsigned char)~_BV(6) /* Clock output */ -#define FUSE_CKDIV8 (unsigned char)~_BV(7) /* Divide clock by 8 */ -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) /* Brown-out Detector trigger level */ -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) /* Brown-out Detector trigger level */ -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) /* Brown-out Detector trigger level */ -#define FUSE_EESAVE (unsigned char)~_BV(3) /* EEPROM memory is preserved through chip erase */ -#define FUSE_WDTON (unsigned char)~_BV(4) /* Watchdog Timer Always On */ -#define FUSE_SPIEN (unsigned char)~_BV(5) /* Enable Serial programming and Data Downloading */ -#define FUSE_DWEN (unsigned char)~_BV(6) /* debugWIRE Enable */ -#define FUSE_RSTDISBL (unsigned char)~_BV(7) /* External reset disable */ -#define HFUSE_DEFAULT (FUSE_SPIEN) - -/* Extended Fuse Byte */ -#define FUSE_SELFPRGEN (unsigned char)~_BV(0) /* Self Programming Enable */ -#define EFUSE_DEFAULT (0xFF) - - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x92 -#define SIGNATURE_2 0x0A - - -#endif /* _AVR_IOM48P_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom64.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom64.h deleted file mode 100644 index 457d93aec..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom64.h +++ /dev/null @@ -1,1227 +0,0 @@ -/* Copyright (c) 2002, Steinar Haugen - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iom64.h,v 1.14.2.5 2008/10/17 23:27:49 arcanum Exp $ */ - -/* avr/iom64.h - defines for ATmega64 - - As of 2002-11-23: - - This should be up to date with data sheet Rev. 2490C-AVR-09/02 */ - -#ifndef _AVR_IOM64_H_ -#define _AVR_IOM64_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iom64.h" -#else -# error "Attempt to include more than one file." -#endif - -/* I/O registers */ - -/* Input Pins, Port F */ -#define PINF _SFR_IO8(0x00) - -/* Input Pins, Port E */ -#define PINE _SFR_IO8(0x01) - -/* Data Direction Register, Port E */ -#define DDRE _SFR_IO8(0x02) - -/* Data Register, Port E */ -#define PORTE _SFR_IO8(0x03) - -/* ADC Data Register */ -#define ADCW _SFR_IO16(0x04) /* for backwards compatibility */ -#ifndef __ASSEMBLER__ -#define ADC _SFR_IO16(0x04) -#endif -#define ADCL _SFR_IO8(0x04) -#define ADCH _SFR_IO8(0x05) - -/* ADC Control and Status Register A */ -#define ADCSR _SFR_IO8(0x06) /* for backwards compatibility */ -#define ADCSRA _SFR_IO8(0x06) - -/* ADC Multiplexer select */ -#define ADMUX _SFR_IO8(0x07) - -/* Analog Comparator Control and Status Register */ -#define ACSR _SFR_IO8(0x08) - -/* USART0 Baud Rate Register Low */ -#define UBRR0L _SFR_IO8(0x09) - -/* USART0 Control and Status Register B */ -#define UCSR0B _SFR_IO8(0x0A) - -/* USART0 Control and Status Register A */ -#define UCSR0A _SFR_IO8(0x0B) - -/* USART0 I/O Data Register */ -#define UDR0 _SFR_IO8(0x0C) - -/* SPI Control Register */ -#define SPCR _SFR_IO8(0x0D) - -/* SPI Status Register */ -#define SPSR _SFR_IO8(0x0E) - -/* SPI I/O Data Register */ -#define SPDR _SFR_IO8(0x0F) - -/* Input Pins, Port D */ -#define PIND _SFR_IO8(0x10) - -/* Data Direction Register, Port D */ -#define DDRD _SFR_IO8(0x11) - -/* Data Register, Port D */ -#define PORTD _SFR_IO8(0x12) - -/* Input Pins, Port C */ -#define PINC _SFR_IO8(0x13) - -/* Data Direction Register, Port C */ -#define DDRC _SFR_IO8(0x14) - -/* Data Register, Port C */ -#define PORTC _SFR_IO8(0x15) - -/* Input Pins, Port B */ -#define PINB _SFR_IO8(0x16) - -/* Data Direction Register, Port B */ -#define DDRB _SFR_IO8(0x17) - -/* Data Register, Port B */ -#define PORTB _SFR_IO8(0x18) - -/* Input Pins, Port A */ -#define PINA _SFR_IO8(0x19) - -/* Data Direction Register, Port A */ -#define DDRA _SFR_IO8(0x1A) - -/* Data Register, Port A */ -#define PORTA _SFR_IO8(0x1B) - -/* EEPROM Control Register */ -#define EECR _SFR_IO8(0x1C) - -/* EEPROM Data Register */ -#define EEDR _SFR_IO8(0x1D) - -/* EEPROM Address Register */ -#define EEAR _SFR_IO16(0x1E) -#define EEARL _SFR_IO8(0x1E) -#define EEARH _SFR_IO8(0x1F) - -/* Special Function I/O Register */ -#define SFIOR _SFR_IO8(0x20) - -/* Watchdog Timer Control Register */ -#define WDTCR _SFR_IO8(0x21) - -/* On-chip Debug Register */ -#define OCDR _SFR_IO8(0x22) - -/* Timer2 Output Compare Register */ -#define OCR2 _SFR_IO8(0x23) - -/* Timer/Counter 2 */ -#define TCNT2 _SFR_IO8(0x24) - -/* Timer/Counter 2 Control register */ -#define TCCR2 _SFR_IO8(0x25) - -/* T/C 1 Input Capture Register */ -#define ICR1 _SFR_IO16(0x26) -#define ICR1L _SFR_IO8(0x26) -#define ICR1H _SFR_IO8(0x27) - -/* Timer/Counter1 Output Compare Register B */ -#define OCR1B _SFR_IO16(0x28) -#define OCR1BL _SFR_IO8(0x28) -#define OCR1BH _SFR_IO8(0x29) - -/* Timer/Counter1 Output Compare Register A */ -#define OCR1A _SFR_IO16(0x2A) -#define OCR1AL _SFR_IO8(0x2A) -#define OCR1AH _SFR_IO8(0x2B) - -/* Timer/Counter 1 */ -#define TCNT1 _SFR_IO16(0x2C) -#define TCNT1L _SFR_IO8(0x2C) -#define TCNT1H _SFR_IO8(0x2D) - -/* Timer/Counter 1 Control and Status Register */ -#define TCCR1B _SFR_IO8(0x2E) - -/* Timer/Counter 1 Control Register */ -#define TCCR1A _SFR_IO8(0x2F) - -/* Timer/Counter 0 Asynchronous Control & Status Register */ -#define ASSR _SFR_IO8(0x30) - -/* Output Compare Register 0 */ -#define OCR0 _SFR_IO8(0x31) - -/* Timer/Counter 0 */ -#define TCNT0 _SFR_IO8(0x32) - -/* Timer/Counter 0 Control Register */ -#define TCCR0 _SFR_IO8(0x33) - -/* MCU Status Register */ -#define MCUSR _SFR_IO8(0x34) /* for backwards compatibility */ -#define MCUCSR _SFR_IO8(0x34) - -/* MCU general Control Register */ -#define MCUCR _SFR_IO8(0x35) - -/* Timer/Counter Interrupt Flag Register */ -#define TIFR _SFR_IO8(0x36) - -/* Timer/Counter Interrupt MaSK register */ -#define TIMSK _SFR_IO8(0x37) - -/* External Interrupt Flag Register */ -#define EIFR _SFR_IO8(0x38) - -/* External Interrupt MaSK register */ -#define EIMSK _SFR_IO8(0x39) - -/* External Interrupt Control Register B */ -#define EICRB _SFR_IO8(0x3A) - -/* XDIV Divide control register */ -#define XDIV _SFR_IO8(0x3C) - -/* 0x3D..0x3E SP */ - -/* 0x3F SREG */ - -/* Extended I/O registers */ - -/* Data Direction Register, Port F */ -#define DDRF _SFR_MEM8(0x61) - -/* Data Register, Port F */ -#define PORTF _SFR_MEM8(0x62) - -/* Input Pins, Port G */ -#define PING _SFR_MEM8(0x63) - -/* Data Direction Register, Port G */ -#define DDRG _SFR_MEM8(0x64) - -/* Data Register, Port G */ -#define PORTG _SFR_MEM8(0x65) - -/* Store Program Memory Control and Status Register */ -#define SPMCR _SFR_MEM8(0x68) -#define SPMCSR _SFR_MEM8(0x68) /* for backwards compatibility with m128*/ - -/* External Interrupt Control Register A */ -#define EICRA _SFR_MEM8(0x6A) - -/* External Memory Control Register B */ -#define XMCRB _SFR_MEM8(0x6C) - -/* External Memory Control Register A */ -#define XMCRA _SFR_MEM8(0x6D) - -/* Oscillator Calibration Register */ -#define OSCCAL _SFR_MEM8(0x6F) - -/* 2-wire Serial Interface Bit Rate Register */ -#define TWBR _SFR_MEM8(0x70) - -/* 2-wire Serial Interface Status Register */ -#define TWSR _SFR_MEM8(0x71) - -/* 2-wire Serial Interface Address Register */ -#define TWAR _SFR_MEM8(0x72) - -/* 2-wire Serial Interface Data Register */ -#define TWDR _SFR_MEM8(0x73) - -/* 2-wire Serial Interface Control Register */ -#define TWCR _SFR_MEM8(0x74) - -/* Time Counter 1 Output Compare Register C */ -#define OCR1C _SFR_MEM16(0x78) -#define OCR1CL _SFR_MEM8(0x78) -#define OCR1CH _SFR_MEM8(0x79) - -/* Timer/Counter 1 Control Register C */ -#define TCCR1C _SFR_MEM8(0x7A) - -/* Extended Timer Interrupt Flag Register */ -#define ETIFR _SFR_MEM8(0x7C) - -/* Extended Timer Interrupt Mask Register */ -#define ETIMSK _SFR_MEM8(0x7D) - -/* Timer/Counter 3 Input Capture Register */ -#define ICR3 _SFR_MEM16(0x80) -#define ICR3L _SFR_MEM8(0x80) -#define ICR3H _SFR_MEM8(0x81) - -/* Timer/Counter 3 Output Compare Register C */ -#define OCR3C _SFR_MEM16(0x82) -#define OCR3CL _SFR_MEM8(0x82) -#define OCR3CH _SFR_MEM8(0x83) - -/* Timer/Counter 3 Output Compare Register B */ -#define OCR3B _SFR_MEM16(0x84) -#define OCR3BL _SFR_MEM8(0x84) -#define OCR3BH _SFR_MEM8(0x85) - -/* Timer/Counter 3 Output Compare Register A */ -#define OCR3A _SFR_MEM16(0x86) -#define OCR3AL _SFR_MEM8(0x86) -#define OCR3AH _SFR_MEM8(0x87) - -/* Timer/Counter 3 Counter Register */ -#define TCNT3 _SFR_MEM16(0x88) -#define TCNT3L _SFR_MEM8(0x88) -#define TCNT3H _SFR_MEM8(0x89) - -/* Timer/Counter 3 Control Register B */ -#define TCCR3B _SFR_MEM8(0x8A) - -/* Timer/Counter 3 Control Register A */ -#define TCCR3A _SFR_MEM8(0x8B) - -/* Timer/Counter 3 Control Register C */ -#define TCCR3C _SFR_MEM8(0x8C) - -/* ADC Control and Status Register B */ -#define ADCSRB _SFR_MEM8(0x8E) - -/* USART0 Baud Rate Register High */ -#define UBRR0H _SFR_MEM8(0x90) - -/* USART0 Control and Status Register C */ -#define UCSR0C _SFR_MEM8(0x95) - -/* USART1 Baud Rate Register High */ -#define UBRR1H _SFR_MEM8(0x98) - -/* USART1 Baud Rate Register Low*/ -#define UBRR1L _SFR_MEM8(0x99) - -/* USART1 Control and Status Register B */ -#define UCSR1B _SFR_MEM8(0x9A) - -/* USART1 Control and Status Register A */ -#define UCSR1A _SFR_MEM8(0x9B) - -/* USART1 I/O Data Register */ -#define UDR1 _SFR_MEM8(0x9C) - -/* USART1 Control and Status Register C */ -#define UCSR1C _SFR_MEM8(0x9D) - -/* Interrupt vectors */ - -/* External Interrupt Request 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* External Interrupt Request 1 */ -#define INT1_vect _VECTOR(2) -#define SIG_INTERRUPT1 _VECTOR(2) - -/* External Interrupt Request 2 */ -#define INT2_vect _VECTOR(3) -#define SIG_INTERRUPT2 _VECTOR(3) - -/* External Interrupt Request 3 */ -#define INT3_vect _VECTOR(4) -#define SIG_INTERRUPT3 _VECTOR(4) - -/* External Interrupt Request 4 */ -#define INT4_vect _VECTOR(5) -#define SIG_INTERRUPT4 _VECTOR(5) - -/* External Interrupt Request 5 */ -#define INT5_vect _VECTOR(6) -#define SIG_INTERRUPT5 _VECTOR(6) - -/* External Interrupt Request 6 */ -#define INT6_vect _VECTOR(7) -#define SIG_INTERRUPT6 _VECTOR(7) - -/* External Interrupt Request 7 */ -#define INT7_vect _VECTOR(8) -#define SIG_INTERRUPT7 _VECTOR(8) - -/* Timer/Counter2 Compare Match */ -#define TIMER2_COMP_vect _VECTOR(9) -#define SIG_OUTPUT_COMPARE2 _VECTOR(9) - -/* Timer/Counter2 Overflow */ -#define TIMER2_OVF_vect _VECTOR(10) -#define SIG_OVERFLOW2 _VECTOR(10) - -/* Timer/Counter1 Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(11) -#define SIG_INPUT_CAPTURE1 _VECTOR(11) - -/* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPA_vect _VECTOR(12) -#define SIG_OUTPUT_COMPARE1A _VECTOR(12) - -/* Timer/Counter Compare Match B */ -#define TIMER1_COMPB_vect _VECTOR(13) -#define SIG_OUTPUT_COMPARE1B _VECTOR(13) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(14) -#define SIG_OVERFLOW1 _VECTOR(14) - -/* Timer/Counter0 Compare Match */ -#define TIMER0_COMP_vect _VECTOR(15) -#define SIG_OUTPUT_COMPARE0 _VECTOR(15) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(16) -#define SIG_OVERFLOW0 _VECTOR(16) - -/* SPI Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(17) -#define SIG_SPI _VECTOR(17) - -/* USART0, Rx Complete */ -#define USART0_RX_vect _VECTOR(18) -#define SIG_UART0_RECV _VECTOR(18) - -/* USART0 Data Register Empty */ -#define USART0_UDRE_vect _VECTOR(19) -#define SIG_UART0_DATA _VECTOR(19) - -/* USART0, Tx Complete */ -#define USART0_TX_vect _VECTOR(20) -#define SIG_UART0_TRANS _VECTOR(20) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(21) -#define SIG_ADC _VECTOR(21) - -/* EEPROM Ready */ -#define EE_READY_vect _VECTOR(22) -#define SIG_EEPROM_READY _VECTOR(22) - -/* Analog Comparator */ -#define ANALOG_COMP_vect _VECTOR(23) -#define SIG_COMPARATOR _VECTOR(23) - -/* Timer/Counter1 Compare Match C */ -#define TIMER1_COMPC_vect _VECTOR(24) -#define SIG_OUTPUT_COMPARE1C _VECTOR(24) - -/* Timer/Counter3 Capture Event */ -#define TIMER3_CAPT_vect _VECTOR(25) -#define SIG_INPUT_CAPTURE3 _VECTOR(25) - -/* Timer/Counter3 Compare Match A */ -#define TIMER3_COMPA_vect _VECTOR(26) -#define SIG_OUTPUT_COMPARE3A _VECTOR(26) - -/* Timer/Counter3 Compare Match B */ -#define TIMER3_COMPB_vect _VECTOR(27) -#define SIG_OUTPUT_COMPARE3B _VECTOR(27) - -/* Timer/Counter3 Compare Match C */ -#define TIMER3_COMPC_vect _VECTOR(28) -#define SIG_OUTPUT_COMPARE3C _VECTOR(28) - -/* Timer/Counter3 Overflow */ -#define TIMER3_OVF_vect _VECTOR(29) -#define SIG_OVERFLOW3 _VECTOR(29) - -/* USART1, Rx Complete */ -#define USART1_RX_vect _VECTOR(30) -#define SIG_UART1_RECV _VECTOR(30) - -/* USART1, Data Register Empty */ -#define USART1_UDRE_vect _VECTOR(31) -#define SIG_UART1_DATA _VECTOR(31) - -/* USART1, Tx Complete */ -#define USART1_TX_vect _VECTOR(32) -#define SIG_UART1_TRANS _VECTOR(32) - -/* 2-wire Serial Interface */ -#define TWI_vect _VECTOR(33) -#define SIG_2WIRE_SERIAL _VECTOR(33) - -/* Store Program Memory Read */ -#define SPM_READY_vect _VECTOR(34) -#define SIG_SPM_READY _VECTOR(34) - -#define _VECTORS_SIZE 140 - -/* - The Register Bit names are represented by their bit number (0-7). -*/ - -/* 2-wire Control Register - TWCR */ -#define TWINT 7 -#define TWEA 6 -#define TWSTA 5 -#define TWSTO 4 -#define TWWC 3 -#define TWEN 2 -#define TWIE 0 - -/* 2-wire Address Register - TWAR */ -#define TWA6 7 -#define TWA5 6 -#define TWA4 5 -#define TWA3 4 -#define TWA2 3 -#define TWA1 2 -#define TWA0 1 -#define TWGCE 0 - -/* 2-wire Status Register - TWSR */ -#define TWS7 7 -#define TWS6 6 -#define TWS5 5 -#define TWS4 4 -#define TWS3 3 -#define TWPS1 1 -#define TWPS0 0 - -/* External Memory Control Register A - XMCRA */ -#define SRL2 6 -#define SRL1 5 -#define SRL0 4 -#define SRW01 3 -#define SRW00 2 -#define SRW11 1 - -/* External Memory Control Register B - XMCRA */ -#define XMBK 7 -#define XMM2 2 -#define XMM1 1 -#define XMM0 0 - -/* XDIV Divide control register - XDIV */ -#define XDIVEN 7 -#define XDIV6 6 -#define XDIV5 5 -#define XDIV4 4 -#define XDIV3 3 -#define XDIV2 2 -#define XDIV1 1 -#define XDIV0 0 - -/* External Interrupt Control Register A - EICRA */ -#define ISC31 7 -#define ISC30 6 -#define ISC21 5 -#define ISC20 4 -#define ISC11 3 -#define ISC10 2 -#define ISC01 1 -#define ISC00 0 - -/* External Interrupt Control Register B - EICRB */ -#define ISC71 7 -#define ISC70 6 -#define ISC61 5 -#define ISC60 4 -#define ISC51 3 -#define ISC50 2 -#define ISC41 1 -#define ISC40 0 - -/* Store Program Memory Control Register - SPMCSR, SPMCR */ -#define SPMIE 7 -#define RWWSB 6 -#define RWWSRE 4 -#define BLBSET 3 -#define PGWRT 2 -#define PGERS 1 -#define SPMEN 0 - -/* External Interrupt MaSK register - EIMSK */ -#define INT7 7 -#define INT6 6 -#define INT5 5 -#define INT4 4 -#define INT3 3 -#define INT2 2 -#define INT1 1 -#define INT0 0 - -/* External Interrupt Flag Register - EIFR */ -#define INTF7 7 -#define INTF6 6 -#define INTF5 5 -#define INTF4 4 -#define INTF3 3 -#define INTF2 2 -#define INTF1 1 -#define INTF0 0 - -/* Timer/Counter Interrupt MaSK register - TIMSK */ -#define OCIE2 7 -#define TOIE2 6 -#define TICIE1 5 -#define OCIE1A 4 -#define OCIE1B 3 -#define TOIE1 2 -#define OCIE0 1 -#define TOIE0 0 - -/* Timer/Counter Interrupt Flag Register - TIFR */ -#define OCF2 7 -#define TOV2 6 -#define ICF1 5 -#define OCF1A 4 -#define OCF1B 3 -#define TOV1 2 -#define OCF0 1 -#define TOV0 0 - -/* Extended Timer Interrupt MaSK register - ETIMSK */ -#define TICIE3 5 -#define OCIE3A 4 -#define OCIE3B 3 -#define TOIE3 2 -#define OCIE3C 1 -#define OCIE1C 0 - -/* Extended Timer Interrupt Flag Register - ETIFR */ -#define ICF3 5 -#define OCF3A 4 -#define OCF3B 3 -#define TOV3 2 -#define OCF3C 1 -#define OCF1C 0 - -/* MCU Control Register - MCUCR */ -#define SRE 7 -#define SRW10 6 -#define SE 5 -#define SM1 4 -#define SM0 3 -#define SM2 2 -#define IVSEL 1 -#define IVCE 0 - -/* MCU Control And Status Register - MCUCSR */ -#define JTD 7 -#define JTRF 4 -#define WDRF 3 -#define BORF 2 -#define EXTRF 1 -#define PORF 0 - -/* Timer/Counter Control Register (generic) */ -#define FOC 7 -#define WGM0 6 -#define COM1 5 -#define COM0 4 -#define WGM1 3 -#define CS2 2 -#define CS1 1 -#define CS0 0 - -/* Timer/Counter 0 Control Register - TCCR0 */ -#define FOC0 7 -#define WGM00 6 -#define COM01 5 -#define COM00 4 -#define WGM01 3 -#define CS02 2 -#define CS01 1 -#define CS00 0 - -/* Timer/Counter 2 Control Register - TCCR2 */ -#define FOC2 7 -#define WGM20 6 -#define COM21 5 -#define COM20 4 -#define WGM21 3 -#define CS22 2 -#define CS21 1 -#define CS20 0 - -/* Timer/Counter 0 Asynchronous Control & Status Register - ASSR */ -#define AS0 3 -#define TCN0UB 2 -#define OCR0UB 1 -#define TCR0UB 0 - -/* Timer/Counter Control Register A (generic) */ -#define COMA1 7 -#define COMA0 6 -#define COMB1 5 -#define COMB0 4 -#define COMC1 3 -#define COMC0 2 -#define WGMA1 1 -#define WGMA0 0 - -/* Timer/Counter 1 Control and Status Register A - TCCR1A */ -#define COM1A1 7 -#define COM1A0 6 -#define COM1B1 5 -#define COM1B0 4 -#define COM1C1 3 -#define COM1C0 2 -#define WGM11 1 -#define WGM10 0 - -/* Timer/Counter 3 Control and Status Register A - TCCR3A */ -#define COM3A1 7 -#define COM3A0 6 -#define COM3B1 5 -#define COM3B0 4 -#define COM3C1 3 -#define COM3C0 2 -#define WGM31 1 -#define WGM30 0 - -/* Timer/Counter Control and Status Register B (generic) */ -#define ICNC 7 -#define ICES 6 -#define WGMB3 4 -#define WGMB2 3 -#define CSB2 2 -#define CSB1 1 -#define CSB0 0 - -/* Timer/Counter 1 Control and Status Register B - TCCR1B */ -#define ICNC1 7 -#define ICES1 6 -#define WGM13 4 -#define WGM12 3 -#define CS12 2 -#define CS11 1 -#define CS10 0 - -/* Timer/Counter 3 Control and Status Register B - TCCR3B */ -#define ICNC3 7 -#define ICES3 6 -#define WGM33 4 -#define WGM32 3 -#define CS32 2 -#define CS31 1 -#define CS30 0 - -/* Timer/Counter Control Register C (generic) */ -#define FOCA 7 -#define FOCB 6 -#define FOCC 5 - -/* Timer/Counter 3 Control Register C - TCCR3C */ -#define FOC3A 7 -#define FOC3B 6 -#define FOC3C 5 - -/* Timer/Counter 1 Control Register C - TCCR1C */ -#define FOC1A 7 -#define FOC1B 6 -#define FOC1C 5 - -/* On-chip Debug Register - OCDR */ -#define IDRD 7 -#define OCDR7 7 -#define OCDR6 6 -#define OCDR5 5 -#define OCDR4 4 -#define OCDR3 3 -#define OCDR2 2 -#define OCDR1 1 -#define OCDR0 0 - -/* Watchdog Timer Control Register - WDTCR */ -#define WDCE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -/* - The ADHSM bit has been removed from all documentation, - as being not needed at all since the comparator has proven - to be fast enough even without feeding it more power. -*/ - -/* Special Function I/O Register - SFIOR */ -#define TSM 7 -#define ACME 3 -#define PUD 2 -#define PSR0 1 -#define PSR321 0 - -/* Port Data Register (generic) */ -#define PORT7 7 -#define PORT6 6 -#define PORT5 5 -#define PORT4 4 -#define PORT3 3 -#define PORT2 2 -#define PORT1 1 -#define PORT0 0 - -/* Port Data Direction Register (generic) */ -#define DD7 7 -#define DD6 6 -#define DD5 5 -#define DD4 4 -#define DD3 3 -#define DD2 2 -#define DD1 1 -#define DD0 0 - -/* Port Input Pins (generic) */ -#define PIN7 7 -#define PIN6 6 -#define PIN5 5 -#define PIN4 4 -#define PIN3 3 -#define PIN2 2 -#define PIN1 1 -#define PIN0 0 - -/* SPI Status Register - SPSR */ -#define SPIF 7 -#define WCOL 6 -#define SPI2X 0 - -/* SPI Control Register - SPCR */ -#define SPIE 7 -#define SPE 6 -#define DORD 5 -#define MSTR 4 -#define CPOL 3 -#define CPHA 2 -#define SPR1 1 -#define SPR0 0 - -/* USART Register C (generic) */ -#define UMSEL 6 -#define UPM1 5 -#define UPM0 4 -#define USBS 3 -#define UCSZ1 2 -#define UCSZ0 1 -#define UCPOL 0 - -/* USART1 Register C - UCSR1C */ -#define UMSEL1 6 -#define UPM11 5 -#define UPM10 4 -#define USBS1 3 -#define UCSZ11 2 -#define UCSZ10 1 -#define UCPOL1 0 - -/* USART0 Register C - UCSR0C */ -#define UMSEL0 6 -#define UPM01 5 -#define UPM00 4 -#define USBS0 3 -#define UCSZ01 2 -#define UCSZ00 1 -#define UCPOL0 0 - -/* USART Status Register A (generic) */ -#define RXC 7 -#define TXC 6 -#define UDRE 5 -#define FE 4 -#define DOR 3 -#define UPE 2 -#define U2X 1 -#define MPCM 0 - -/* USART1 Status Register A - UCSR1A */ -#define RXC1 7 -#define TXC1 6 -#define UDRE1 5 -#define FE1 4 -#define DOR1 3 -#define UPE1 2 -#define U2X1 1 -#define MPCM1 0 - -/* USART0 Status Register A - UCSR0A */ -#define RXC0 7 -#define TXC0 6 -#define UDRE0 5 -#define FE0 4 -#define DOR0 3 -#define UPE0 2 -#define U2X0 1 -#define MPCM0 0 - -/* USART Control Register B (generic) */ -#define RXCIE 7 -#define TXCIE 6 -#define UDRIE 5 -#define RXEN 4 -#define TXEN 3 -#define UCSZ 2 -#define UCSZ2 2 /* new name in datasheet (2467E-AVR-05/02) */ -#define RXB8 1 -#define TXB8 0 - -/* USART1 Control Register B - UCSR1B */ -#define RXCIE1 7 -#define TXCIE1 6 -#define UDRIE1 5 -#define RXEN1 4 -#define TXEN1 3 -#define UCSZ12 2 -#define RXB81 1 -#define TXB81 0 - -/* USART0 Control Register B - UCSR0B */ -#define RXCIE0 7 -#define TXCIE0 6 -#define UDRIE0 5 -#define RXEN0 4 -#define TXEN0 3 -#define UCSZ02 2 -#define RXB80 1 -#define TXB80 0 - -/* Analog Comparator Control and Status Register - ACSR */ -#define ACD 7 -#define ACBG 6 -#define ACO 5 -#define ACI 4 -#define ACIE 3 -#define ACIC 2 -#define ACIS1 1 -#define ACIS0 0 - -/* ADC Control and Status Register B - ADCSRB */ -#define ADTS2 2 -#define ADTS1 1 -#define ADTS0 0 - -/* ADC Control and status Register A - ADCSRA */ -#define ADEN 7 -#define ADSC 6 -#define ADATE 5 -#define ADIF 4 -#define ADIE 3 -#define ADPS2 2 -#define ADPS1 1 -#define ADPS0 0 - -/* ADC Multiplexer select - ADMUX */ -#define REFS1 7 -#define REFS0 6 -#define ADLAR 5 -#define MUX4 4 -#define MUX3 3 -#define MUX2 2 -#define MUX1 1 -#define MUX0 0 - -/* Port A Data Register - PORTA */ -#define PA7 7 -#define PA6 6 -#define PA5 5 -#define PA4 4 -#define PA3 3 -#define PA2 2 -#define PA1 1 -#define PA0 0 - -/* Port A Data Direction Register - DDRA */ -#define DDA7 7 -#define DDA6 6 -#define DDA5 5 -#define DDA4 4 -#define DDA3 3 -#define DDA2 2 -#define DDA1 1 -#define DDA0 0 - -/* Port A Input Pins - PINA */ -#define PINA7 7 -#define PINA6 6 -#define PINA5 5 -#define PINA4 4 -#define PINA3 3 -#define PINA2 2 -#define PINA1 1 -#define PINA0 0 - -/* Port B Data Register - PORTB */ -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -/* Port B Data Direction Register - DDRB */ -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -/* Port B Input Pins - PINB */ -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -/* Port C Data Register - PORTC */ -#define PC7 7 -#define PC6 6 -#define PC5 5 -#define PC4 4 -#define PC3 3 -#define PC2 2 -#define PC1 1 -#define PC0 0 - -/* Port C Data Direction Register - DDRC */ -#define DDC7 7 -#define DDC6 6 -#define DDC5 5 -#define DDC4 4 -#define DDC3 3 -#define DDC2 2 -#define DDC1 1 -#define DDC0 0 - -/* Port C Input Pins - PINC */ -#define PINC7 7 -#define PINC6 6 -#define PINC5 5 -#define PINC4 4 -#define PINC3 3 -#define PINC2 2 -#define PINC1 1 -#define PINC0 0 - -/* Port D Data Register - PORTD */ -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -/* Port D Data Direction Register - DDRD */ -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -/* Port D Input Pins - PIND */ -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -/* Port E Data Register - PORTE */ -#define PE7 7 -#define PE6 6 -#define PE5 5 -#define PE4 4 -#define PE3 3 -#define PE2 2 -#define PE1 1 -#define PE0 0 - -/* Port E Data Direction Register - DDRE */ -#define DDE7 7 -#define DDE6 6 -#define DDE5 5 -#define DDE4 4 -#define DDE3 3 -#define DDE2 2 -#define DDE1 1 -#define DDE0 0 - -/* Port E Input Pins - PINE */ -#define PINE7 7 -#define PINE6 6 -#define PINE5 5 -#define PINE4 4 -#define PINE3 3 -#define PINE2 2 -#define PINE1 1 -#define PINE0 0 - -/* Port F Data Register - PORTF */ -#define PF7 7 -#define PF6 6 -#define PF5 5 -#define PF4 4 -#define PF3 3 -#define PF2 2 -#define PF1 1 -#define PF0 0 - -/* Port F Data Direction Register - DDRF */ -#define DDF7 7 -#define DDF6 6 -#define DDF5 5 -#define DDF4 4 -#define DDF3 3 -#define DDF2 2 -#define DDF1 1 -#define DDF0 0 - -/* Port F Input Pins - PINF */ -#define PINF7 7 -#define PINF6 6 -#define PINF5 5 -#define PINF4 4 -#define PINF3 3 -#define PINF2 2 -#define PINF1 1 -#define PINF0 0 - -/* Port G Data Register - PORTG */ -#define PG4 4 -#define PG3 3 -#define PG2 2 -#define PG1 1 -#define PG0 0 - -/* Port G Data Direction Register - DDRG */ -#define DDG4 4 -#define DDG3 3 -#define DDG2 2 -#define DDG1 1 -#define DDG0 0 - -/* Port G Input Pins - PING */ -#define PING4 4 -#define PING3 3 -#define PING2 2 -#define PING1 1 -#define PING0 0 - -/* EEPROM Control Register */ -#define EERIE 3 -#define EEMWE 2 -#define EEWE 1 -#define EERE 0 - -/* Constants */ -#define SPM_PAGESIZE 256 -#define RAMEND 0x10FF /* Last On-Chip SRAM Location */ -#define XRAMEND 0xFFFF -#define E2END 0x07FF -#define E2PAGESIZE 8 -#define FLASHEND 0xFFFF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_BODEN (unsigned char)~_BV(6) -#define FUSE_BODLEVEL (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL1 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_CKOPT (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_JTAGEN (unsigned char)~_BV(6) -#define FUSE_OCDEN (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_SPIEN & FUSE_JTAGEN) - -/* Extended Fuse Byte */ -#define FUSE_WDTON (unsigned char)~_BV(0) -#define FUSE_M103C (unsigned char)~_BV(1) -#define EFUSE_DEFAULT (FUSE_M103C) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x96 -#define SIGNATURE_2 0x02 - - -#endif /* _AVR_IOM64_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom640.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom640.h deleted file mode 100644 index 6341a08bd..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom640.h +++ /dev/null @@ -1,94 +0,0 @@ -/* Copyright (c) 2005 Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iom640.h,v 1.2.2.5 2008/10/17 23:27:49 arcanum Exp $ */ - -/* avr/iom640.h - definitions for ATmega640 */ - -#ifndef _AVR_IOM640_H_ -#define _AVR_IOM640_H_ 1 - -#include - -/* Constants */ -#define SPM_PAGESIZE 256 -#define RAMEND 0x21FF -#define XRAMEND 0xFFFF -#define E2END 0xFFF -#define E2PAGESIZE 8 -#define FLASHEND 0xFFFF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_JTAGEN (unsigned char)~_BV(6) -#define FUSE_OCDEN (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_SPIEN & FUSE_JTAGEN) - -/* Extended Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x96 -#define SIGNATURE_2 0x08 - - -#endif /* _AVR_IOM640_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom644.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom644.h deleted file mode 100644 index 367348f53..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom644.h +++ /dev/null @@ -1,94 +0,0 @@ -/* Copyright (c) 2005 Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* avr/iom644.h - definitions for ATmega644 */ - -/* $Id: iom644.h,v 1.2.2.5 2008/10/17 23:27:50 arcanum Exp $ */ - -#ifndef _AVR_IOM644_H_ -#define _AVR_IOM644_H_ 1 - -#include - -/* Constants */ -#define SPM_PAGESIZE 256 -#define RAMEND 0x10FF -#define XRAMEND 0x10FF -#define E2END 0x7FF -#define E2PAGESIZE 8 -#define FLASHEND 0xFFFF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_SUT1 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_JTAGEN (unsigned char)~_BV(6) -#define FUSE_OCDEN (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_SPIEN & FUSE_JTAGEN) - -/* Extended Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x96 -#define SIGNATURE_2 0x09 - - -#endif /* _AVR_IOM644_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom645.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom645.h deleted file mode 100644 index 35796539c..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom645.h +++ /dev/null @@ -1,816 +0,0 @@ -/* Copyright (c) 2004,2005,2006 Eric B. Weddington - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iom645.h,v 1.11.2.5 2008/10/17 23:27:50 arcanum Exp $ */ - -/* avr/iom645.h - definitions for ATmega645 */ - -#ifndef _AVR_IOM645_H_ -#define _AVR_IOM645_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iom645.h" -#else -# error "Attempt to include more than one file." -#endif - -/* Registers and associated bit numbers */ - -#define PINA _SFR_IO8(0x00) -#define PINA7 7 -#define PINA6 6 -#define PINA5 5 -#define PINA4 4 -#define PINA3 3 -#define PINA2 2 -#define PINA1 1 -#define PINA0 0 - -#define DDRA _SFR_IO8(0x01) -#define DDA7 7 -#define DDA6 6 -#define DDA5 5 -#define DDA4 4 -#define DDA3 3 -#define DDA2 2 -#define DDA1 1 -#define DDA0 0 - -#define PORTA _SFR_IO8(0x02) -#define PA7 7 -#define PA6 6 -#define PA5 5 -#define PA4 4 -#define PA3 3 -#define PA2 2 -#define PA1 1 -#define PA0 0 - -#define PINB _SFR_IO8(0x03) -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -#define DDRB _SFR_IO8(0x04) -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -#define PORTB _SFR_IO8(0x05) -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -#define PINC _SFR_IO8(0x06) -#define PINC7 7 -#define PINC6 6 -#define PINC5 5 -#define PINC4 4 -#define PINC3 3 -#define PINC2 2 -#define PINC1 1 -#define PINC0 0 - -#define DDRC _SFR_IO8(0x07) -#define DDC7 7 -#define DDC6 6 -#define DDC5 5 -#define DDC4 4 -#define DDC3 3 -#define DDC2 2 -#define DDC1 1 -#define DDC0 0 - -#define PORTC _SFR_IO8(0x08) -#define PC7 7 -#define PC6 6 -#define PC5 5 -#define PC4 4 -#define PC3 3 -#define PC2 2 -#define PC1 1 -#define PC0 0 - -#define PIND _SFR_IO8(0x09) -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -#define DDRD _SFR_IO8(0x0A) -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -#define PORTD _SFR_IO8(0x0B) -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -#define PINE _SFR_IO8(0x0C) -#define PINE7 7 -#define PINE6 6 -#define PINE5 5 -#define PINE4 4 -#define PINE3 3 -#define PINE2 2 -#define PINE1 1 -#define PINE0 0 - -#define DDRE _SFR_IO8(0x0D) -#define DDE7 7 -#define DDE6 6 -#define DDE5 5 -#define DDE4 4 -#define DDE3 3 -#define DDE2 2 -#define DDE1 1 -#define DDE0 0 - -#define PORTE _SFR_IO8(0x0E) -#define PE7 7 -#define PE6 6 -#define PE5 5 -#define PE4 4 -#define PE3 3 -#define PE2 2 -#define PE1 1 -#define PE0 0 - -#define PINF _SFR_IO8(0x0F) -#define PINF7 7 -#define PINF6 6 -#define PINF5 5 -#define PINF4 4 -#define PINF3 3 -#define PINF2 2 -#define PINF1 1 -#define PINF0 0 - -#define DDRF _SFR_IO8(0x10) -#define DDF7 7 -#define DDF6 6 -#define DDF5 5 -#define DDF4 4 -#define DDF3 3 -#define DDF2 2 -#define DDF1 1 -#define DDF0 0 - -#define PORTF _SFR_IO8(0x11) -#define PF7 7 -#define PF6 6 -#define PF5 5 -#define PF4 4 -#define PF3 3 -#define PF2 2 -#define PF1 1 -#define PF0 0 - -#define PING _SFR_IO8(0x12) -#define PING5 5 -#define PING4 4 -#define PING3 3 -#define PING2 2 -#define PING1 1 -#define PING0 0 - -#define DDRG _SFR_IO8(0x13) -#define DDG4 4 -#define DDG3 3 -#define DDG2 2 -#define DDG1 1 -#define DDG0 0 - -#define PORTG _SFR_IO8(0x14) -#define PG4 4 -#define PG3 3 -#define PG2 2 -#define PG1 1 -#define PG0 0 - -#define TIFR0 _SFR_IO8(0x15) -#define TOV0 0 -#define OCF0A 1 - -#define TIFR1 _SFR_IO8(0x16) -#define TOV1 0 -#define OCF1A 1 -#define OCF1B 2 -#define ICF1 5 - -#define TIFR2 _SFR_IO8(0x17) -#define TOV2 0 -#define OCF2A 1 - -/* Reserved [0x18..0x1B] */ - -#define EIFR _SFR_IO8(0x1C) -#define INTF0 0 -#define PCIF0 4 -#define PCIF1 5 - -#define EIMSK _SFR_IO8(0x1D) -#define INT0 0 -#define PCIE0 4 -#define PCIE1 5 - -#define GPIOR0 _SFR_IO8(0x1E) - -#define EECR _SFR_IO8(0x1F) -#define EERE 0 -#define EEWE 1 -#define EEMWE 2 -#define EERIE 3 - -#define EEDR _SFR_IO8(0X20) - -/* Combine EEARL and EEARH */ -#define EEAR _SFR_IO16(0x21) -#define EEARL _SFR_IO8(0x21) -#define EEARH _SFR_IO8(0X22) - -/* 6-char sequence denoting where to find the EEPROM registers in memory space. - Adresses denoted in hex syntax with uppercase letters. Used by the EEPROM - subroutines. - First two letters: EECR address. - Second two letters: EEDR address. - Last two letters: EEAR address. */ -#define __EEPROM_REG_LOCATIONS__ 1F2021 - -#define GTCCR _SFR_IO8(0x23) -#define PSR10 0 -#define PSR2 1 -#define TSM 7 - -#define TCCR0A _SFR_IO8(0x24) -#define CS00 0 -#define CS01 1 -#define CS02 2 -#define WGM01 3 -#define COM0A0 4 -#define COM0A1 5 -#define WGM00 6 -#define FOC0A 7 - -/* Reserved [0x25] */ - -#define TCNT0 _SFR_IO8(0X26) - -#define OCR0A _SFR_IO8(0X27) - -/* Reserved [0x28..0x29] */ - -#define GPIOR1 _SFR_IO8(0x2A) - -#define GPIOR2 _SFR_IO8(0x2B) - -#define SPCR _SFR_IO8(0x2C) -#define SPR0 0 -#define SPR1 1 -#define CPHA 2 -#define CPOL 3 -#define MSTR 4 -#define DORD 5 -#define SPE 6 -#define SPIE 7 - -#define SPSR _SFR_IO8(0x2D) -#define SPI2X 0 -#define WCOL 6 -#define SPIF 7 - -#define SPDR _SFR_IO8(0X2E) - -/* Reserved [0x2F] */ - -#define ACSR _SFR_IO8(0x30) -#define ACIS0 0 -#define ACIS1 1 -#define ACIC 2 -#define ACIE 3 -#define ACI 4 -#define ACO 5 -#define ACBG 6 -#define ACD 7 - -#define OCDR _SFR_IO8(0x31) -#define OCDR0 0 -#define OCDR1 1 -#define OCDR2 2 -#define OCDR3 3 -#define OCDR4 4 -#define OCDR5 5 -#define OCDR6 6 -#define OCDR7 7 -#define IDRD 7 - -/* Reserved [0x32] */ - -#define SMCR _SFR_IO8(0x33) -#define SE 0 -#define SM0 1 -#define SM1 2 -#define SM2 3 - -#define MCUSR _SFR_IO8(0x34) -#define PORF 0 -#define EXTRF 1 -#define BORF 2 -#define WDRF 3 -#define JTRF 4 - -#define MCUCR _SFR_IO8(0X35) -#define IVCE 0 -#define IVSEL 1 -#define PUD 4 -#define JTD 7 - -/* Reserved [0x36] */ - -#define SPMCSR _SFR_IO8(0x37) -#define SPMEN 0 -#define PGERS 1 -#define PGWRT 2 -#define BLBSET 3 -#define RWWSRE 4 -#define RWWSB 6 -#define SPMIE 7 - -/* Reserved [0x38..0x3C] */ - -/* SP [0x3D..0x3E] */ -/* SREG [0x3F] */ - -#define WDTCR _SFR_MEM8(0x60) -#define WDP0 0 -#define WDP1 1 -#define WDP2 2 -#define WDE 3 -#define WDCE 4 - -#define CLKPR _SFR_MEM8(0x61) -#define CLKPS0 0 -#define CLKPS1 1 -#define CLKPS2 2 -#define CLKPS3 3 -#define CLKPCE 7 - -/* Reserved [0x62..0x63] */ - -#define PRR _SFR_MEM8(0x64) -#define PRADC 0 -#define PRUSART0 1 -#define PRSPI 2 -#define PRTIM1 3 - -/* Reserved [0x65] */ - -#define OSCCAL _SFR_MEM8(0x66) - -/* Reserved [0x67..0x68] */ - -#define EICRA _SFR_MEM8(0x69) -#define ISC00 0 -#define ISC01 1 - -/* Reserved [0x6A] */ - -#define PCMSK0 _SFR_MEM8(0x6B) -#define PCINT0 0 -#define PCINT1 1 -#define PCINT2 2 -#define PCINT3 3 -#define PCINT4 4 -#define PCINT5 5 -#define PCINT6 6 -#define PCINT7 7 - -#define PCMSK1 _SFR_MEM8(0x6C) -#define PCINT8 0 -#define PCINT9 1 -#define PCINT10 2 -#define PCINT11 3 -#define PCINT12 4 -#define PCINT13 5 -#define PCINT14 6 -#define PCINT15 7 - -/* Reserved [0x6D] */ - -#define TIMSK0 _SFR_MEM8(0x6E) -#define TOIE0 0 -#define OCIE0A 1 - -#define TIMSK1 _SFR_MEM8(0x6F) -#define TOIE1 0 -#define OCIE1A 1 -#define OCIE1B 2 -#define ICIE1 5 - -#define TIMSK2 _SFR_MEM8(0x70) -#define TOIE2 0 -#define OCIE2A 1 - -/* Reserved [0x71..0x77] */ - -/* Combine ADCL and ADCH */ -#ifndef __ASSEMBLER__ -#define ADC _SFR_MEM16(0x78) -#endif -#define ADCW _SFR_MEM16(0x78) -#define ADCL _SFR_MEM8(0x78) -#define ADCH _SFR_MEM8(0x79) - -#define ADCSRA _SFR_MEM8(0x7A) -#define ADPS0 0 -#define ADPS1 1 -#define ADPS2 2 -#define ADIE 3 -#define ADIF 4 -#define ADATE 5 -#define ADSC 6 -#define ADEN 7 - -#define ADCSRB _SFR_MEM8(0x7B) -#define ADTS0 0 -#define ADTS1 1 -#define ADTS2 2 -#define ACME 6 - -#define ADMUX _SFR_MEM8(0x7C) -#define MUX0 0 -#define MUX1 1 -#define MUX2 2 -#define MUX3 3 -#define MUX4 4 -#define ADLAR 5 -#define REFS0 6 -#define REFS1 7 - -/* Reserved [0x7D] */ - -#define DIDR0 _SFR_MEM8(0x7E) -#define ADC0D 0 -#define ADC1D 1 -#define ADC2D 2 -#define ADC3D 3 -#define ADC4D 4 -#define ADC5D 5 -#define ADC6D 6 -#define ADC7D 7 - -#define DIDR1 _SFR_MEM8(0x7F) -#define AIN0D 0 -#define AIN1D 1 - -#define TCCR1A _SFR_MEM8(0X80) -#define WGM10 0 -#define WGM11 1 -#define COM1B0 4 -#define COM1B1 5 -#define COM1A0 6 -#define COM1A1 7 - -#define TCCR1B _SFR_MEM8(0X81) -#define CS10 0 -#define CS11 1 -#define CS12 2 -#define WGM12 3 -#define WGM13 4 -#define ICES1 6 -#define ICNC1 7 - -#define TCCR1C _SFR_MEM8(0x82) -#define FOC1B 6 -#define FOC1A 7 - -/* Reserved [0x83] */ - -/* Combine TCNT1L and TCNT1H */ -#define TCNT1 _SFR_MEM16(0x84) - -#define TCNT1L _SFR_MEM8(0x84) -#define TCNT1H _SFR_MEM8(0x85) - -/* Combine ICR1L and ICR1H */ -#define ICR1 _SFR_MEM16(0x86) - -#define ICR1L _SFR_MEM8(0x86) -#define ICR1H _SFR_MEM8(0x87) - -/* Combine OCR1AL and OCR1AH */ -#define OCR1A _SFR_MEM16(0x88) - -#define OCR1AL _SFR_MEM8(0x88) -#define OCR1AH _SFR_MEM8(0x89) - -/* Combine OCR1BL and OCR1BH */ -#define OCR1B _SFR_MEM16(0x8A) - -#define OCR1BL _SFR_MEM8(0x8A) -#define OCR1BH _SFR_MEM8(0x8B) - -/* Reserved [0x8C..0xAF] */ - -#define TCCR2A _SFR_MEM8(0xB0) -#define CS20 0 -#define CS21 1 -#define CS22 2 -#define WGM21 3 -#define COM2A0 4 -#define COM2A1 5 -#define WGM20 6 -#define FOC2A 7 - -/* Reserved [0xB1] */ - -#define TCNT2 _SFR_MEM8(0xB2) - -#define OCR2A _SFR_MEM8(0xB3) - -/* Reserved [0xB4..0xB5] */ - -#define ASSR _SFR_MEM8(0xB6) -#define TCR2UB 0 -#define OCR2UB 1 -#define TCN2UB 2 -#define AS2 3 -#define EXCLK 4 - -/* Reserved [0xB7] */ - -#define USICR _SFR_MEM8(0xB8) -#define USITC 0 -#define USICLK 1 -#define USICS0 2 -#define USICS1 3 -#define USIWM0 4 -#define USIWM1 5 -#define USIOIE 6 -#define USISIE 7 - -#define USISR _SFR_MEM8(0xB9) -#define USICNT0 0 -#define USICNT1 1 -#define USICNT2 2 -#define USICNT3 3 -#define USIDC 4 -#define USIPF 5 -#define USIOIF 6 -#define USISIF 7 - -#define USIDR _SFR_MEM8(0xBA) - -/* Reserved [0xBB..0xBF] */ - -#define UCSR0A _SFR_MEM8(0xC0) -#define MPCM0 0 -#define U2X0 1 -#define UPE0 2 -#define DOR0 3 -#define FE0 4 -#define UDRE0 5 -#define TXC0 6 -#define RXC0 7 - -#define UCSR0B _SFR_MEM8(0XC1) -#define TXB80 0 -#define RXB80 1 -#define UCSZ02 2 -#define TXEN0 3 -#define RXEN0 4 -#define UDRIE0 5 -#define TXCIE0 6 -#define RXCIE0 7 - -#define UCSR0C _SFR_MEM8(0xC2) -#define UCPOL0 0 -#define UCSZ00 1 -#define UCSZ01 2 -#define USBS0 3 -#define UPM00 4 -#define UPM01 5 -#define UMSEL0 6 - -/* Reserved [0xC3] */ - -/* Combine UBRR0L and UBRR0H */ -#define UBRR0 _SFR_MEM16(0xC4) - -#define UBRR0L _SFR_MEM8(0xC4) -#define UBRR0H _SFR_MEM8(0xC5) - -#define UDR0 _SFR_MEM8(0XC6) - -/* Reserved [0xC7..0xFF] */ - - -/* Interrupt vectors */ -/* Vector 0 is the reset vector */ -/* External Interrupt Request 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* Pin Change Interrupt Request 0 */ -#define PCINT0_vect _VECTOR(2) -#define SIG_PIN_CHANGE0 _VECTOR(2) - -/* Pin Change Interrupt Request 1 */ -#define PCINT1_vect _VECTOR(3) -#define SIG_PIN_CHANGE1 _VECTOR(3) - -/* Timer/Counter2 Compare Match */ -#define TIMER2_COMP_vect _VECTOR(4) -#define SIG_OUTPUT_COMPARE2 _VECTOR(4) - -/* Timer/Counter2 Overflow */ -#define TIMER2_OVF_vect _VECTOR(5) -#define SIG_OVERFLOW2 _VECTOR(5) - -/* Timer/Counter1 Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(6) -#define SIG_INPUT_CAPTURE1 _VECTOR(6) - -/* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPA_vect _VECTOR(7) -#define SIG_OUTPUT_COMPARE1A _VECTOR(7) - -/* Timer/Counter Compare Match B */ -#define TIMER1_COMPB_vect _VECTOR(8) -#define SIG_OUTPUT_COMPARE1B _VECTOR(8) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(9) -#define SIG_OVERFLOW1 _VECTOR(9) - -/* Timer/Counter0 Compare Match */ -#define TIMER0_COMP_vect _VECTOR(10) -#define SIG_OUTPUT_COMPARE0 _VECTOR(10) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(11) -#define SIG_OVERFLOW0 _VECTOR(11) - -/* SPI Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(12) -#define SIG_SPI _VECTOR(12) - -/* USART0, Rx Complete */ -#define USART0_RX_vect _VECTOR(13) -#define SIG_UART_RECV _VECTOR(13) - -/* USART0 Data register Empty */ -#define USART0_UDRE_vect _VECTOR(14) -#define SIG_UART_DATA _VECTOR(14) - -/* USART0, Tx Complete */ -#define USART0_TX_vect _VECTOR(15) -#define SIG_UART_TRANS _VECTOR(15) - -/* USI Start Condition */ -#define USI_START_vect _VECTOR(16) -#define SIG_USI_START _VECTOR(16) - -/* USI Overflow */ -#define USI_OVERFLOW_vect _VECTOR(17) -#define SIG_USI_OVERFLOW _VECTOR(17) - -/* Analog Comparator */ -#define ANALOG_COMP_vect _VECTOR(18) -#define SIG_COMPARATOR _VECTOR(18) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(19) -#define SIG_ADC _VECTOR(19) - -/* EEPROM Ready */ -#define EE_READY_vect _VECTOR(20) -#define SIG_EEPROM_READY _VECTOR(20) - -/* Store Program Memory Read */ -#define SPM_READY_vect _VECTOR(21) -#define SIG_SPM_READY _VECTOR(21) - -/* Vector 22 is Reserved */ - -#define _VECTORS_SIZE 92 - - -/* Constants */ -#define SPM_PAGESIZE 256 -#define RAMEND 0x10FF -#define XRAMEND 0x10FF -#define E2END 0x7FF -#define E2PAGESIZE 8 -#define FLASHEND 0xFFFF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_JTAGEN (unsigned char)~_BV(6) -#define FUSE_OCDEN (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_SPIEN & FUSE_JTAGEN) - -/* Extended Fuse Byte */ -#define FUSE_RSTDISBL (unsigned char)~_BV(0) -#define FUSE_BODLEVEL0 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(2) -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x96 -#define SIGNATURE_2 0x05 - - -#endif /* _AVR_IOM645_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom6450.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom6450.h deleted file mode 100644 index d67777f46..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom6450.h +++ /dev/null @@ -1,907 +0,0 @@ -/* Copyright (c) 2004,2005,2006 Eric B. Weddington - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iom6450.h,v 1.11.2.6 2008/10/17 23:27:50 arcanum Exp $ */ - -/* avr/iom6450.h - definitions for ATmega6450 */ - -#ifndef _AVR_IOM6450_H_ -#define _AVR_IOM6450_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iom6450.h" -#else -# error "Attempt to include more than one file." -#endif - -/* Registers and associated bit numbers */ - -#define PINA _SFR_IO8(0x00) -#define PINA7 7 -#define PINA6 6 -#define PINA5 5 -#define PINA4 4 -#define PINA3 3 -#define PINA2 2 -#define PINA1 1 -#define PINA0 0 - -#define DDRA _SFR_IO8(0x01) -#define DDA7 7 -#define DDA6 6 -#define DDA5 5 -#define DDA4 4 -#define DDA3 3 -#define DDA2 2 -#define DDA1 1 -#define DDA0 0 - -#define PORTA _SFR_IO8(0x02) -#define PA7 7 -#define PA6 6 -#define PA5 5 -#define PA4 4 -#define PA3 3 -#define PA2 2 -#define PA1 1 -#define PA0 0 - -#define PINB _SFR_IO8(0x03) -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -#define DDRB _SFR_IO8(0x04) -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -#define PORTB _SFR_IO8(0x05) -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -#define PINC _SFR_IO8(0x06) -#define PINC7 7 -#define PINC6 6 -#define PINC5 5 -#define PINC4 4 -#define PINC3 3 -#define PINC2 2 -#define PINC1 1 -#define PINC0 0 - -#define DDRC _SFR_IO8(0x07) -#define DDC7 7 -#define DDC6 6 -#define DDC5 5 -#define DDC4 4 -#define DDC3 3 -#define DDC2 2 -#define DDC1 1 -#define DDC0 0 - -#define PORTC _SFR_IO8(0x08) -#define PC7 7 -#define PC6 6 -#define PC5 5 -#define PC4 4 -#define PC3 3 -#define PC2 2 -#define PC1 1 -#define PC0 0 - -#define PIND _SFR_IO8(0x09) -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -#define DDRD _SFR_IO8(0x0A) -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -#define PORTD _SFR_IO8(0x0B) -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -#define PINE _SFR_IO8(0x0C) -#define PINE7 7 -#define PINE6 6 -#define PINE5 5 -#define PINE4 4 -#define PINE3 3 -#define PINE2 2 -#define PINE1 1 -#define PINE0 0 - -#define DDRE _SFR_IO8(0x0D) -#define DDE7 7 -#define DDE6 6 -#define DDE5 5 -#define DDE4 4 -#define DDE3 3 -#define DDE2 2 -#define DDE1 1 -#define DDE0 0 - -#define PORTE _SFR_IO8(0x0E) -#define PE7 7 -#define PE6 6 -#define PE5 5 -#define PE4 4 -#define PE3 3 -#define PE2 2 -#define PE1 1 -#define PE0 0 - -#define PINF _SFR_IO8(0x0F) -#define PINF7 7 -#define PINF6 6 -#define PINF5 5 -#define PINF4 4 -#define PINF3 3 -#define PINF2 2 -#define PINF1 1 -#define PINF0 0 - -#define DDRF _SFR_IO8(0x10) -#define DDF7 7 -#define DDF6 6 -#define DDF5 5 -#define DDF4 4 -#define DDF3 3 -#define DDF2 2 -#define DDF1 1 -#define DDF0 0 - -#define PORTF _SFR_IO8(0x11) -#define PF7 7 -#define PF6 6 -#define PF5 5 -#define PF4 4 -#define PF3 3 -#define PF2 2 -#define PF1 1 -#define PF0 0 - -#define PING _SFR_IO8(0x12) -#define PING5 5 -#define PING4 4 -#define PING3 3 -#define PING2 2 -#define PING1 1 -#define PING0 0 - -#define DDRG _SFR_IO8(0x13) -#define DDG4 4 -#define DDG3 3 -#define DDG2 2 -#define DDG1 1 -#define DDG0 0 - -#define PORTG _SFR_IO8(0x14) -#define PG4 4 -#define PG3 3 -#define PG2 2 -#define PG1 1 -#define PG0 0 - -#define TIFR0 _SFR_IO8(0x15) -#define TOV0 0 -#define OCF0A 1 - -#define TIFR1 _SFR_IO8(0x16) -#define TOV1 0 -#define OCF1A 1 -#define OCF1B 2 -#define ICF1 5 - -#define TIFR2 _SFR_IO8(0x17) -#define TOV2 0 -#define OCF2A 1 - -/* Reserved [0x18..0x1B] */ - -#define EIFR _SFR_IO8(0x1C) -#define INTF0 0 -#define PCIF0 4 -#define PCIF1 5 -#define PCIF2 6 -#define PCIF3 7 - -#define EIMSK _SFR_IO8(0x1D) -#define INT0 0 -#define PCIE0 4 -#define PCIE1 5 -#define PCIE2 6 -#define PCIE3 7 - -#define GPIOR0 _SFR_IO8(0x1E) - -#define EECR _SFR_IO8(0x1F) -#define EERE 0 -#define EEWE 1 -#define EEMWE 2 -#define EERIE 3 - -#define EEDR _SFR_IO8(0X20) - -/* Combine EEARL and EEARH */ -#define EEAR _SFR_IO16(0x21) -#define EEARL _SFR_IO8(0x21) -#define EEARH _SFR_IO8(0X22) - -/* 6-char sequence denoting where to find the EEPROM registers in memory space. - Adresses denoted in hex syntax with uppercase letters. Used by the EEPROM - subroutines. - First two letters: EECR address. - Second two letters: EEDR address. - Last two letters: EEAR address. */ -#define __EEPROM_REG_LOCATIONS__ 1F2021 - -#define GTCCR _SFR_IO8(0x23) -#define PSR10 0 -#define PSR2 1 -#define TSM 7 - -#define TCCR0A _SFR_IO8(0x24) -#define CS00 0 -#define CS01 1 -#define CS02 2 -#define WGM01 3 -#define COM0A0 4 -#define COM0A1 5 -#define WGM00 6 -#define FOC0A 7 - -/* Reserved [0x25] */ - -#define TCNT0 _SFR_IO8(0X26) - -#define OCR0A _SFR_IO8(0X27) - -/* Reserved [0x28..0x29] */ - -#define GPIOR1 _SFR_IO8(0x2A) - -#define GPIOR2 _SFR_IO8(0x2B) - -#define SPCR _SFR_IO8(0x2C) -#define SPR0 0 -#define SPR1 1 -#define CPHA 2 -#define CPOL 3 -#define MSTR 4 -#define DORD 5 -#define SPE 6 -#define SPIE 7 - -#define SPSR _SFR_IO8(0x2D) -#define SPI2X 0 -#define WCOL 6 -#define SPIF 7 - -#define SPDR _SFR_IO8(0X2E) - -/* Reserved [0x2F] */ - -#define ACSR _SFR_IO8(0x30) -#define ACIS0 0 -#define ACIS1 1 -#define ACIC 2 -#define ACIE 3 -#define ACI 4 -#define ACO 5 -#define ACBG 6 -#define ACD 7 - -#define OCDR _SFR_IO8(0x31) -#define OCDR0 0 -#define OCDR1 1 -#define OCDR2 2 -#define OCDR3 3 -#define OCDR4 4 -#define OCDR5 5 -#define OCDR6 6 -#define OCDR7 7 -#define IDRD 7 - -/* Reserved [0x32] */ - -#define SMCR _SFR_IO8(0x33) -#define SE 0 -#define SM0 1 -#define SM1 2 -#define SM2 3 - -#define MCUSR _SFR_IO8(0x34) -#define PORF 0 -#define EXTRF 1 -#define BORF 2 -#define WDRF 3 -#define JTRF 4 - -#define MCUCR _SFR_IO8(0X35) -#define IVCE 0 -#define IVSEL 1 -#define PUD 4 -#define JTD 7 - -/* Reserved [0x36] */ - -#define SPMCSR _SFR_IO8(0x37) -#define SPMEN 0 -#define PGERS 1 -#define PGWRT 2 -#define BLBSET 3 -#define RWWSRE 4 -#define RWWSB 6 -#define SPMIE 7 - -/* Reserved [0x38..0x3C] */ - -/* SP [0x3D..0x3E] */ -/* SREG [0x3F] */ - -#define WDTCR _SFR_MEM8(0x60) -#define WDP0 0 -#define WDP1 1 -#define WDP2 2 -#define WDE 3 -#define WDCE 4 - -#define CLKPR _SFR_MEM8(0x61) -#define CLKPS0 0 -#define CLKPS1 1 -#define CLKPS2 2 -#define CLKPS3 3 -#define CLKPCE 7 - -/* Reserved [0x62..0x63] */ - -#define PRR _SFR_MEM8(0x64) -#define PRADC 0 -#define PRUSART0 1 -#define PRSPI 2 -#define PRTIM1 3 - -/* Reserved [0x65] */ - -#define OSCCAL _SFR_MEM8(0x66) - -/* Reserved [0x67..0x68] */ - -#define EICRA _SFR_MEM8(0x69) -#define ISC00 0 -#define ISC01 1 - -/* Reserved [0x6A] */ - -#define PCMSK0 _SFR_MEM8(0x6B) -#define PCINT0 0 -#define PCINT1 1 -#define PCINT2 2 -#define PCINT3 3 -#define PCINT4 4 -#define PCINT5 5 -#define PCINT6 6 -#define PCINT7 7 - -#define PCMSK1 _SFR_MEM8(0x6C) -#define PCINT8 0 -#define PCINT9 1 -#define PCINT10 2 -#define PCINT11 3 -#define PCINT12 4 -#define PCINT13 5 -#define PCINT14 6 -#define PCINT15 7 - -#define PCMSK2 _SFR_MEM8(0x6D) -#define PCINT16 0 -#define PCINT17 1 -#define PCINT18 2 -#define PCINT19 3 -#define PCINT20 4 -#define PCINT21 5 -#define PCINT22 6 -#define PCINT23 7 - -#define TIMSK0 _SFR_MEM8(0x6E) -#define TOIE0 0 -#define OCIE0A 1 - -#define TIMSK1 _SFR_MEM8(0x6F) -#define TOIE1 0 -#define OCIE1A 1 -#define OCIE1B 2 -#define ICIE1 5 - -#define TIMSK2 _SFR_MEM8(0x70) -#define TOIE2 0 -#define OCIE2A 1 - -/* Reserved [0x71..0x72] */ - -#define PCMSK3 _SFR_MEM8(0x73) -#define PCINT24 0 -#define PCINT25 1 -#define PCINT26 2 -#define PCINT27 3 -#define PCINT28 4 -#define PCINT29 5 -#define PCINT30 6 - -/* Reserved [0x74..0x77] */ - -/* Combine ADCL and ADCH */ -#ifndef __ASSEMBLER__ -#define ADC _SFR_MEM16(0x78) -#endif -#define ADCW _SFR_MEM16(0x78) -#define ADCL _SFR_MEM8(0x78) -#define ADCH _SFR_MEM8(0x79) - -#define ADCSRA _SFR_MEM8(0x7A) -#define ADPS0 0 -#define ADPS1 1 -#define ADPS2 2 -#define ADIE 3 -#define ADIF 4 -#define ADATE 5 -#define ADSC 6 -#define ADEN 7 - -#define ADCSRB _SFR_MEM8(0x7B) -#define ADTS0 0 -#define ADTS1 1 -#define ADTS2 2 -#define ACME 6 - -#define ADMUX _SFR_MEM8(0x7C) -#define MUX0 0 -#define MUX1 1 -#define MUX2 2 -#define MUX3 3 -#define MUX4 4 -#define ADLAR 5 -#define REFS0 6 -#define REFS1 7 - -/* Reserved [0x7D] */ - -#define DIDR0 _SFR_MEM8(0x7E) -#define ADC0D 0 -#define ADC1D 1 -#define ADC2D 2 -#define ADC3D 3 -#define ADC4D 4 -#define ADC5D 5 -#define ADC6D 6 -#define ADC7D 7 - -#define DIDR1 _SFR_MEM8(0x7F) -#define AIN0D 0 -#define AIN1D 1 - -#define TCCR1A _SFR_MEM8(0X80) -#define WGM10 0 -#define WGM11 1 -#define COM1B0 4 -#define COM1B1 5 -#define COM1A0 6 -#define COM1A1 7 - -#define TCCR1B _SFR_MEM8(0X81) -#define CS10 0 -#define CS11 1 -#define CS12 2 -#define WGM12 3 -#define WGM13 4 -#define ICES1 6 -#define ICNC1 7 - -#define TCCR1C _SFR_MEM8(0x82) -#define FOC1B 6 -#define FOC1A 7 - -/* Reserved [0x83] */ - -/* Combine TCNT1L and TCNT1H */ -#define TCNT1 _SFR_MEM16(0x84) - -#define TCNT1L _SFR_MEM8(0x84) -#define TCNT1H _SFR_MEM8(0x85) - -/* Combine ICR1L and ICR1H */ -#define ICR1 _SFR_MEM16(0x86) - -#define ICR1L _SFR_MEM8(0x86) -#define ICR1H _SFR_MEM8(0x87) - -/* Combine OCR1AL and OCR1AH */ -#define OCR1A _SFR_MEM16(0x88) - -#define OCR1AL _SFR_MEM8(0x88) -#define OCR1AH _SFR_MEM8(0x89) - -/* Combine OCR1BL and OCR1BH */ -#define OCR1B _SFR_MEM16(0x8A) - -#define OCR1BL _SFR_MEM8(0x8A) -#define OCR1BH _SFR_MEM8(0x8B) - -/* Reserved [0x8C..0xAF] */ - -#define TCCR2A _SFR_MEM8(0xB0) -#define CS20 0 -#define CS21 1 -#define CS22 2 -#define WGM21 3 -#define COM2A0 4 -#define COM2A1 5 -#define WGM20 6 -#define FOC2A 7 - -/* Reserved [0xB1] */ - -#define TCNT2 _SFR_MEM8(0xB2) - -#define OCR2A _SFR_MEM8(0xB3) - -/* Reserved [0xB4..0xB5] */ - -#define ASSR _SFR_MEM8(0xB6) -#define TCR2UB 0 -#define OCR2UB 1 -#define TCN2UB 2 -#define AS2 3 -#define EXCLK 4 - -/* Reserved [0xB7] */ - -#define USICR _SFR_MEM8(0xB8) -#define USITC 0 -#define USICLK 1 -#define USICS0 2 -#define USICS1 3 -#define USIWM0 4 -#define USIWM1 5 -#define USIOIE 6 -#define USISIE 7 - -#define USISR _SFR_MEM8(0xB9) -#define USICNT0 0 -#define USICNT1 1 -#define USICNT2 2 -#define USICNT3 3 -#define USIDC 4 -#define USIPF 5 -#define USIOIF 6 -#define USISIF 7 - -#define USIDR _SFR_MEM8(0xBA) - -/* Reserved [0xBB..0xBF] */ - -#define UCSR0A _SFR_MEM8(0xC0) -#define MPCM0 0 -#define U2X0 1 -#define UPE0 2 -#define DOR0 3 -#define FE0 4 -#define UDRE0 5 -#define TXC0 6 -#define RXC0 7 - -#define UCSR0B _SFR_MEM8(0XC1) -#define TXB80 0 -#define RXB80 1 -#define UCSZ02 2 -#define TXEN0 3 -#define RXEN0 4 -#define UDRIE0 5 -#define TXCIE0 6 -#define RXCIE0 7 - -#define UCSR0C _SFR_MEM8(0xC2) -#define UCPOL0 0 -#define UCSZ00 1 -#define UCSZ01 2 -#define USBS0 3 -#define UPM00 4 -#define UPM01 5 -#define UMSEL0 6 - -/* Reserved [0xC3] */ - -/* Combine UBRR0L and UBRR0H */ -#define UBRR0 _SFR_MEM16(0xC4) - -#define UBRR0L _SFR_MEM8(0xC4) -#define UBRR0H _SFR_MEM8(0xC5) - -#define UDR0 _SFR_MEM8(0XC6) - -/* Reserved [0xC7..0xD7] */ - -#define PINH _SFR_MEM8(0xD8) -#define PINH7 7 -#define PINH6 6 -#define PINH5 5 -#define PINH4 4 -#define PINH3 3 -#define PINH2 2 -#define PINH1 1 -#define PINH0 0 - -#define DDRH _SFR_MEM8(0xD9) -#define DDH7 7 -#define DDH6 6 -#define DDH5 5 -#define DDH4 4 -#define DDH3 3 -#define DDH2 2 -#define DDH1 1 -#define DDH0 0 - -#define PORTH _SFR_MEM8(0xDA) -#define PH7 7 -#define PH6 6 -#define PH5 5 -#define PH4 4 -#define PH3 3 -#define PH2 2 -#define PH1 1 -#define PH0 0 - -#define PINJ _SFR_MEM8(0xDB) -#define PINJ6 6 -#define PINJ5 5 -#define PINJ4 4 -#define PINJ3 3 -#define PINJ2 2 -#define PINJ1 1 -#define PINJ0 0 - -#define DDRJ _SFR_MEM8(0xDC) -#define DDJ6 6 -#define DDJ5 5 -#define DDJ4 4 -#define DDJ3 3 -#define DDJ2 2 -#define DDJ1 1 -#define DDJ0 0 - -#define PORTJ _SFR_MEM8(0xDD) -#define PJ6 6 -#define PJ5 5 -#define PJ4 4 -#define PJ3 3 -#define PJ2 2 -#define PJ1 1 -#define PJ0 0 - -/* Reserved [0xDE..0xFF] */ - - -/* Interrupt vectors */ -/* Vector 0 is the reset vector */ -/* External Interrupt Request 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* Pin Change Interrupt Request 0 */ -#define PCINT0_vect _VECTOR(2) -#define SIG_PIN_CHANGE0 _VECTOR(2) - -/* Pin Change Interrupt Request 1 */ -#define PCINT1_vect _VECTOR(3) -#define SIG_PIN_CHANGE1 _VECTOR(3) - -/* Timer/Counter2 Compare Match */ -#define TIMER2_COMP_vect _VECTOR(4) -#define SIG_OUTPUT_COMPARE2 _VECTOR(4) - -/* Timer/Counter2 Overflow */ -#define TIMER2_OVF_vect _VECTOR(5) -#define SIG_OVERFLOW2 _VECTOR(5) - -/* Timer/Counter1 Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(6) -#define SIG_INPUT_CAPTURE1 _VECTOR(6) - -/* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPA_vect _VECTOR(7) -#define SIG_OUTPUT_COMPARE1A _VECTOR(7) - -/* Timer/Counter Compare Match B */ -#define TIMER1_COMPB_vect _VECTOR(8) -#define SIG_OUTPUT_COMPARE1B _VECTOR(8) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(9) -#define SIG_OVERFLOW1 _VECTOR(9) - -/* Timer/Counter0 Compare Match */ -#define TIMER0_COMP_vect _VECTOR(10) -#define SIG_OUTPUT_COMPARE0 _VECTOR(10) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(11) -#define SIG_OVERFLOW0 _VECTOR(11) - -/* SPI Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(12) -#define SIG_SPI _VECTOR(12) - -/* USART, Rx Complete */ -#define USART_RX_vect _VECTOR(13) -#define USART0_RX_vect _VECTOR(13) /* Alias */ -#define SIG_UART_RECV _VECTOR(13) - -/* USART Data register Empty */ -#define USART_UDRE_vect _VECTOR(14) -#define USART0_UDRE_vect _VECTOR(14) /* Alias */ -#define SIG_UART_DATA _VECTOR(14) - -/* USART0, Tx Complete */ -#define USART0_TX_vect _VECTOR(15) -#define USART_TX_vect _VECTOR(15) /* Alias */ -#define SIG_UART_TRANS _VECTOR(15) - -/* USI Start Condition */ -#define USI_START_vect _VECTOR(16) -#define SIG_USI_START _VECTOR(16) - -/* USI Overflow */ -#define USI_OVERFLOW_vect _VECTOR(17) -#define SIG_USI_OVERFLOW _VECTOR(17) - -/* Analog Comparator */ -#define ANALOG_COMP_vect _VECTOR(18) -#define SIG_COMPARATOR _VECTOR(18) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(19) -#define SIG_ADC _VECTOR(19) - -/* EEPROM Ready */ -#define EE_READY_vect _VECTOR(20) -#define SIG_EEPROM_READY _VECTOR(20) - -/* Store Program Memory Read */ -#define SPM_READY_vect _VECTOR(21) -#define SIG_SPM_READY _VECTOR(21) - -/* Pin Change Interrupt Request 2 */ -#define PCINT2_vect _VECTOR(23) -#define SIG_PIN_CHANGE2 _VECTOR(23) - -/* Pin Change Interrupt Request 3 */ -#define PCINT3_vect _VECTOR(24) -#define SIG_PIN_CHANGE3 _VECTOR(24) - -#define _VECTORS_SIZE 100 - - -/* Constants */ -#define SPM_PAGESIZE 256 -#define RAMEND 0x10FF -#define XRAMEND 0x10FF -#define E2END 0x7FF -#define E2PAGESIZE 8 -#define FLASHEND 0xFFFF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_JTAGEN (unsigned char)~_BV(6) -#define FUSE_OCDEN (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_SPIEN & FUSE_JTAGEN) - -/* Extended Fuse Byte */ -#define FUSE_RSTDISBL (unsigned char)~_BV(0) -#define FUSE_BODLEVEL0 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(2) -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x96 -#define SIGNATURE_2 0x06 - - -#endif /* _AVR_IOM6450_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom649.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom649.h deleted file mode 100644 index 382b8bbc0..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom649.h +++ /dev/null @@ -1,992 +0,0 @@ -/* Copyright (c) 2004 Eric B. Weddington - Copyright (c) 2005,2006 Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* avr/iom649.h - definitions for ATmega649 */ - -#ifndef _AVR_IOM649_H_ -#define _AVR_IOM649_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iom649.h" -#else -# error "Attempt to include more than one file." -#endif - -/* Registers and associated bit numbers */ - -#define PINA _SFR_IO8(0x00) -#define PINA7 7 -#define PINA6 6 -#define PINA5 5 -#define PINA4 4 -#define PINA3 3 -#define PINA2 2 -#define PINA1 1 -#define PINA0 0 - -#define DDRA _SFR_IO8(0x01) -#define DDA7 7 -#define DDA6 6 -#define DDA5 5 -#define DDA4 4 -#define DDA3 3 -#define DDA2 2 -#define DDA1 1 -#define DDA0 0 - -#define PORTA _SFR_IO8(0x02) -#define PA7 7 -#define PA6 6 -#define PA5 5 -#define PA4 4 -#define PA3 3 -#define PA2 2 -#define PA1 1 -#define PA0 0 - -#define PINB _SFR_IO8(0x03) -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -#define DDRB _SFR_IO8(0x04) -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -#define PORTB _SFR_IO8(0x05) -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -#define PINC _SFR_IO8(0x06) -#define PINC7 7 -#define PINC6 6 -#define PINC5 5 -#define PINC4 4 -#define PINC3 3 -#define PINC2 2 -#define PINC1 1 -#define PINC0 0 - -#define DDRC _SFR_IO8(0x07) -#define DDC7 7 -#define DDC6 6 -#define DDC5 5 -#define DDC4 4 -#define DDC3 3 -#define DDC2 2 -#define DDC1 1 -#define DDC0 0 - -#define PORTC _SFR_IO8(0x08) -#define PC7 7 -#define PC6 6 -#define PC5 5 -#define PC4 4 -#define PC3 3 -#define PC2 2 -#define PC1 1 -#define PC0 0 - -#define PIND _SFR_IO8(0x09) -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -#define DDRD _SFR_IO8(0x0A) -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -#define PORTD _SFR_IO8(0x0B) -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -#define PINE _SFR_IO8(0x0C) -#define PINE7 7 -#define PINE6 6 -#define PINE5 5 -#define PINE4 4 -#define PINE3 3 -#define PINE2 2 -#define PINE1 1 -#define PINE0 0 - -#define DDRE _SFR_IO8(0x0D) -#define DDE7 7 -#define DDE6 6 -#define DDE5 5 -#define DDE4 4 -#define DDE3 3 -#define DDE2 2 -#define DDE1 1 -#define DDE0 0 - -#define PORTE _SFR_IO8(0x0E) -#define PE7 7 -#define PE6 6 -#define PE5 5 -#define PE4 4 -#define PE3 3 -#define PE2 2 -#define PE1 1 -#define PE0 0 - -#define PINF _SFR_IO8(0x0F) -#define PINF7 7 -#define PINF6 6 -#define PINF5 5 -#define PINF4 4 -#define PINF3 3 -#define PINF2 2 -#define PINF1 1 -#define PINF0 0 - -#define DDRF _SFR_IO8(0x10) -#define DDF7 7 -#define DDF6 6 -#define DDF5 5 -#define DDF4 4 -#define DDF3 3 -#define DDF2 2 -#define DDF1 1 -#define DDF0 0 - -#define PORTF _SFR_IO8(0x11) -#define PF7 7 -#define PF6 6 -#define PF5 5 -#define PF4 4 -#define PF3 3 -#define PF2 2 -#define PF1 1 -#define PF0 0 - -#define PING _SFR_IO8(0x12) -#define PING5 5 -#define PING4 4 -#define PING3 3 -#define PING2 2 -#define PING1 1 -#define PING0 0 - -#define DDRG _SFR_IO8(0x13) -#define DDG4 4 -#define DDG3 3 -#define DDG2 2 -#define DDG1 1 -#define DDG0 0 - -#define PORTG _SFR_IO8(0x14) -#define PG4 4 -#define PG3 3 -#define PG2 2 -#define PG1 1 -#define PG0 0 - -#define TIFR0 _SFR_IO8(0x15) -#define TOV0 0 -#define OCF0A 1 - -#define TIFR1 _SFR_IO8(0x16) -#define TOV1 0 -#define OCF1A 1 -#define OCF1B 2 -#define ICF1 5 - -#define TIFR2 _SFR_IO8(0x17) -#define TOV2 0 -#define OCF2A 1 - -/* Reserved [0x18..0x1B] */ - -#define EIFR _SFR_IO8(0x1C) -#define INTF0 0 -#define PCIF0 4 -#define PCIF1 5 - -#define EIMSK _SFR_IO8(0x1D) -#define INT0 0 -#define PCIE0 4 -#define PCIE1 5 - -#define GPIOR0 _SFR_IO8(0x1E) - -#define EECR _SFR_IO8(0x1F) -#define EERIE 3 -#define EEMWE 2 -#define EEWE 1 -#define EERE 0 - -#define EEDR _SFR_IO8(0X20) - -/* Combine EEARL and EEARH */ -#define EEAR _SFR_IO16(0x21) -#define EEARL _SFR_IO8(0x21) -#define EEARH _SFR_IO8(0X22) - -/* 6-char sequence denoting where to find the EEPROM registers in memory space. - Adresses denoted in hex syntax with uppercase letters. Used by the EEPROM - subroutines. - First two letters: EECR address. - Second two letters: EEDR address. - Last two letters: EEAR address. */ -#define __EEPROM_REG_LOCATIONS__ 1F2021 - -#define GTCCR _SFR_IO8(0x23) -#define PSR10 0 -#define PSR2 1 -#define TSM 7 - -#define TCCR0A _SFR_IO8(0x24) -#define CS00 0 -#define CS01 1 -#define CS02 2 -#define WGM01 3 -#define COM0A0 4 -#define COM0A1 5 -#define WGM00 6 -#define FOC0A 7 - -/* Reserved [0x25] */ - -#define TCNT0 _SFR_IO8(0X26) - -#define OCR0A _SFR_IO8(0X27) - -/* Reserved [0x28..0x29] */ - -#define GPIOR1 _SFR_IO8(0x2A) - -#define GPIOR2 _SFR_IO8(0x2B) - -#define SPCR _SFR_IO8(0x2C) -#define SPR0 0 -#define SPR1 1 -#define CPHA 2 -#define CPOL 3 -#define MSTR 4 -#define DORD 5 -#define SPE 6 -#define SPIE 7 - -#define SPSR _SFR_IO8(0x2D) -#define SPI2X 0 -#define WCOL 6 -#define SPIF 7 - -#define SPDR _SFR_IO8(0X2E) - -/* Reserved [0x2F] */ - -#define ACSR _SFR_IO8(0x30) -#define ACIS0 0 -#define ACIS1 1 -#define ACIC 2 -#define ACIE 3 -#define ACI 4 -#define ACO 5 -#define ACBG 6 -#define ACD 7 - -#define OCDR _SFR_IO8(0x31) -#define OCDR0 0 -#define OCDR1 1 -#define OCDR2 2 -#define OCDR3 3 -#define OCDR4 4 -#define OCDR5 5 -#define OCDR6 6 -#define OCDR7 7 -#define IDRD 7 - -/* Reserved [0x32] */ - -#define SMCR _SFR_IO8(0x33) -#define SE 0 -#define SM0 1 -#define SM1 2 -#define SM2 3 - -#define MCUSR _SFR_IO8(0x34) -#define PORF 0 -#define EXTRF 1 -#define BORF 2 -#define WDRF 3 -#define JTRF 4 - -#define MCUCR _SFR_IO8(0X35) -#define IVCE 0 -#define IVSEL 1 -#define PUD 4 -#define JTD 7 - -/* Reserved [0x36] */ - -#define SPMCSR _SFR_IO8(0x37) -#define SPMEN 0 -#define PGERS 1 -#define PGWRT 2 -#define BLBSET 3 -#define RWWSRE 4 -#define RWWSB 6 -#define SPMIE 7 - -/* Reserved [0x38..0x3C] */ - -/* SP [0x3D..0x3E] */ -/* SREG [0x3F] */ - -#define WDTCR _SFR_MEM8(0x60) -#define WDP0 0 -#define WDP1 1 -#define WDP2 2 -#define WDE 3 -#define WDCE 4 - -#define CLKPR _SFR_MEM8(0x61) -#define CLKPS0 0 -#define CLKPS1 1 -#define CLKPS2 2 -#define CLKPS3 3 -#define CLKPCE 7 - -/* Reserved [0x62..0x63] */ - -#define PRR _SFR_MEM8(0x64) -#define PRADC 0 -#define PRUSART0 1 -#define PRSPI 2 -#define PRTIM1 3 -#define PRLCD 4 - -/* Reserved [0x65] */ - -#define OSCCAL _SFR_MEM8(0x66) - -/* Reserved [0x67..0x68] */ - -#define EICRA _SFR_MEM8(0x69) -#define ISC00 0 -#define ISC01 1 - -/* Reserved [0x6A] */ - -#define PCMSK0 _SFR_MEM8(0x6B) -#define PCINT0 0 -#define PCINT1 1 -#define PCINT2 2 -#define PCINT3 3 -#define PCINT4 4 -#define PCINT5 5 -#define PCINT6 6 -#define PCINT7 7 - -#define PCMSK1 _SFR_MEM8(0x6C) -#define PCINT8 0 -#define PCINT9 1 -#define PCINT10 2 -#define PCINT11 3 -#define PCINT12 4 -#define PCINT13 5 -#define PCINT14 6 -#define PCINT15 7 - -/* Reserved [0x6D] */ - -#define TIMSK0 _SFR_MEM8(0x6E) -#define TOIE0 0 -#define OCIE0A 1 - -#define TIMSK1 _SFR_MEM8(0x6F) -#define TOIE1 0 -#define OCIE1A 1 -#define OCIE1B 2 -#define ICIE1 5 - -#define TIMSK2 _SFR_MEM8(0x70) -#define TOIE2 0 -#define OCIE2A 1 - -/* Reserved [0x71..0x77] */ - -/* Combine ADCL and ADCH */ -#ifndef __ASSEMBLER__ -#define ADC _SFR_MEM16(0x78) -#endif -#define ADCW _SFR_MEM16(0x78) -#define ADCL _SFR_MEM8(0x78) -#define ADCH _SFR_MEM8(0x79) - -#define ADCSRA _SFR_MEM8(0x7A) -#define ADPS0 0 -#define ADPS1 1 -#define ADPS2 2 -#define ADIE 3 -#define ADIF 4 -#define ADATE 5 -#define ADSC 6 -#define ADEN 7 - -#define ADCSRB _SFR_MEM8(0x7B) -#define ADTS0 0 -#define ADTS1 1 -#define ADTS2 2 -#define ACME 6 - -#define ADMUX _SFR_MEM8(0x7C) -#define MUX0 0 -#define MUX1 1 -#define MUX2 2 -#define MUX3 3 -#define MUX4 4 -#define ADLAR 5 -#define REFS0 6 -#define REFS1 7 - -/* Reserved [0x7D] */ - -#define DIDR0 _SFR_MEM8(0x7E) -#define ADC0D 0 -#define ADC1D 1 -#define ADC2D 2 -#define ADC3D 3 -#define ADC4D 4 -#define ADC5D 5 -#define ADC6D 6 -#define ADC7D 7 - -#define DIDR1 _SFR_MEM8(0x7F) -#define AIN0D 0 -#define AIN1D 1 - -#define TCCR1A _SFR_MEM8(0X80) -#define WGM10 0 -#define WGM11 1 -#define COM1B0 4 -#define COM1B1 5 -#define COM1A0 6 -#define COM1A1 7 - -#define TCCR1B _SFR_MEM8(0X81) -#define CS10 0 -#define CS11 1 -#define CS12 2 -#define WGM12 3 -#define WGM13 4 -#define ICES1 6 -#define ICNC1 7 - -#define TCCR1C _SFR_MEM8(0x82) -#define FOC1B 6 -#define FOC1A 7 - -/* Reserved [0x83] */ - -/* Combine TCNT1L and TCNT1H */ -#define TCNT1 _SFR_MEM16(0x84) - -#define TCNT1L _SFR_MEM8(0x84) -#define TCNT1H _SFR_MEM8(0x85) - -/* Combine ICR1L and ICR1H */ -#define ICR1 _SFR_MEM16(0x86) - -#define ICR1L _SFR_MEM8(0x86) -#define ICR1H _SFR_MEM8(0x87) - -/* Combine OCR1AL and OCR1AH */ -#define OCR1A _SFR_MEM16(0x88) - -#define OCR1AL _SFR_MEM8(0x88) -#define OCR1AH _SFR_MEM8(0x89) - -/* Combine OCR1BL and OCR1BH */ -#define OCR1B _SFR_MEM16(0x8A) - -#define OCR1BL _SFR_MEM8(0x8A) -#define OCR1BH _SFR_MEM8(0x8B) - -/* Reserved [0x8C..0xAF] */ - -#define TCCR2A _SFR_MEM8(0xB0) -#define CS20 0 -#define CS21 1 -#define CS22 2 -#define WGM21 3 -#define COM2A0 4 -#define COM2A1 5 -#define WGM20 6 -#define FOC2A 7 - -/* Reserved [0xB1] */ - -#define TCNT2 _SFR_MEM8(0xB2) - -#define OCR2A _SFR_MEM8(0xB3) - -/* Reserved [0xB4..0xB5] */ - -#define ASSR _SFR_MEM8(0xB6) -#define TCR2UB 0 -#define OCR2UB 1 -#define TCN2UB 2 -#define AS2 3 -#define EXCLK 4 - -/* Reserved [0xB7] */ - -#define USICR _SFR_MEM8(0xB8) -#define USITC 0 -#define USICLK 1 -#define USICS0 2 -#define USICS1 3 -#define USIWM0 4 -#define USIWM1 5 -#define USIOIE 6 -#define USISIE 7 - -#define USISR _SFR_MEM8(0xB9) -#define USICNT0 0 -#define USICNT1 1 -#define USICNT2 2 -#define USICNT3 3 -#define USIDC 4 -#define USIPF 5 -#define USIOIF 6 -#define USISIF 7 - -#define USIDR _SFR_MEM8(0xBA) - -/* Reserved [0xBB..0xBF] */ - -#define UCSR0A _SFR_MEM8(0xC0) -#define MPCM0 0 -#define U2X0 1 -#define UPE0 2 -#define DOR0 3 -#define FE0 4 -#define UDRE0 5 -#define TXC0 6 -#define RXC0 7 - -#define UCSR0B _SFR_MEM8(0XC1) -#define TXB80 0 -#define RXB80 1 -#define UCSZ02 2 -#define TXEN0 3 -#define RXEN0 4 -#define UDRIE0 5 -#define TXCIE0 6 -#define RXCIE0 7 - -#define UCSR0C _SFR_MEM8(0xC2) -#define UCPOL0 0 -#define UCSZ00 1 -#define UCSZ01 2 -#define USBS0 3 -#define UPM00 4 -#define UPM01 5 -#define UMSEL0 6 - -/* Reserved [0xC3] */ - -/* Combine UBRR0L and UBRR0H */ -#define UBRR0 _SFR_MEM16(0xC4) - -#define UBRR0L _SFR_MEM8(0xC4) -#define UBRR0H _SFR_MEM8(0xC5) - -#define UDR0 _SFR_MEM8(0XC6) - -/* Reserved [0xC7..0xE3] */ - -#define LCDCRA _SFR_MEM8(0XE4) -#define LCDBL 0 -#define LCDIE 3 -#define LCDIF 4 -#define LCDAB 6 -#define LCDEN 7 - -#define LCDCRB _SFR_MEM8(0XE5) -#define LCDPM0 0 -#define LCDPM1 1 -#define LCDPM2 2 -#define LCDMUX0 4 -#define LCDMUX1 5 -#define LCD2B 6 -#define LCDCS 7 - -#define LCDFRR _SFR_MEM8(0XE6) -#define LCDCD0 0 -#define LCDCD1 1 -#define LCDCD2 2 -#define LCDPS0 4 -#define LCDPS1 5 -#define LCDPS2 6 - -#define LCDCCR _SFR_MEM8(0XE7) -#define LCDCC0 0 -#define LCDCC1 1 -#define LCDCC2 2 -#define LCDCC3 3 -#define LCDDC0 5 -#define LCDDC1 6 -#define LCDDC2 7 - -/* Reserved [0xE8..0xEB] */ - -#define LCDDR00 _SFR_MEM8(0XEC) -#define SEG000 0 -#define SEG001 1 -#define SEG002 2 -#define SEG003 3 -#define SEG004 4 -#define SEG005 5 -#define SEG006 6 -#define SEG007 7 - -#define LCDDR01 _SFR_MEM8(0XED) -#define SEG008 0 -#define SEG009 1 -#define SEG010 2 -#define SEG011 3 -#define SEG012 4 -#define SEG013 5 -#define SEG014 6 -#define SEG015 7 - -#define LCDDR02 _SFR_MEM8(0XEE) -#define SEG016 0 -#define SEG017 1 -#define SEG018 2 -#define SEG019 3 -#define SEG020 4 -#define SEG021 5 -#define SEG022 6 -#define SEG023 7 - -#define LCDDR03 _SFR_MEM8(0XEF) -#define SEG024 0 - -/* Reserved [0xF0] */ - -#define LCDDR05 _SFR_MEM8(0XF1) -#define SEG100 0 -#define SEG101 1 -#define SEG102 2 -#define SEG103 3 -#define SEG104 4 -#define SEG105 5 -#define SEG106 6 -#define SEG107 7 - -#define LCDDR06 _SFR_MEM8(0XF2) -#define SEG108 0 -#define SEG109 1 -#define SEG110 2 -#define SEG111 3 -#define SEG112 4 -#define SEG113 5 -#define SEG114 6 -#define SEG115 7 - -#define LCDDR07 _SFR_MEM8(0XF3) -#define SEG116 0 -#define SEG117 1 -#define SEG118 2 -#define SEG119 3 -#define SEG120 4 -#define SEG121 5 -#define SEG122 6 -#define SEG123 7 - -#define LCDDR08 _SFR_MEM8(0XF4) -#define SEG124 0 - -/* Reserved [0xF5] */ - -#define LCDDR10 _SFR_MEM8(0XF6) -#define SEG200 0 -#define SEG201 1 -#define SEG202 2 -#define SEG203 3 -#define SEG204 4 -#define SEG205 5 -#define SEG206 6 -#define SEG207 7 - -#define LCDDR11 _SFR_MEM8(0XF7) -#define SEG208 0 -#define SEG209 1 -#define SEG210 2 -#define SEG211 3 -#define SEG212 4 -#define SEG213 5 -#define SEG214 6 -#define SEG215 7 - -#define LCDDR12 _SFR_MEM8(0XF8) -#define SEG216 0 -#define SEG217 1 -#define SEG218 2 -#define SEG219 3 -#define SEG220 4 -#define SEG221 5 -#define SEG222 6 -#define SEG223 7 - -#define LCDDR13 _SFR_MEM8(0XF9) -#define SEG224 0 - -/* Reserved [0xFA] */ - -#define LCDDR15 _SFR_MEM8(0XFB) -#define SEG300 0 -#define SEG301 1 -#define SEG302 2 -#define SEG303 3 -#define SEG304 4 -#define SEG305 5 -#define SEG306 6 -#define SEG307 7 - -#define LCDDR16 _SFR_MEM8(0XFC) -#define SEG308 0 -#define SEG309 1 -#define SEG310 2 -#define SEG311 3 -#define SEG312 4 -#define SEG313 5 -#define SEG314 6 -#define SEG315 7 - -#define LCDDR17 _SFR_MEM8(0XFD) -#define SEG316 0 -#define SEG217 1 -#define SEG318 2 -#define SEG319 3 -#define SEG320 4 -#define SEG321 5 -#define SEG322 6 -#define SEG323 7 - -#define LCDDR18 _SFR_MEM8(0XFE) -#define SEG324 0 - -/* Reserved [0xFF] */ - -/* Interrupt vectors */ -/* Vector 0 is the reset vector */ -/* External Interrupt Request 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* Pin Change Interrupt Request 0 */ -#define PCINT0_vect _VECTOR(2) -#define SIG_PIN_CHANGE0 _VECTOR(2) - -/* Pin Change Interrupt Request 1 */ -#define PCINT1_vect _VECTOR(3) -#define SIG_PIN_CHANGE1 _VECTOR(3) - -/* Timer/Counter2 Compare Match */ -#define TIMER2_COMP_vect _VECTOR(4) -#define SIG_OUTPUT_COMPARE2 _VECTOR(4) - -/* Timer/Counter2 Overflow */ -#define TIMER2_OVF_vect _VECTOR(5) -#define SIG_OVERFLOW2 _VECTOR(5) - -/* Timer/Counter1 Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(6) -#define SIG_INPUT_CAPTURE1 _VECTOR(6) - -/* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPA_vect _VECTOR(7) -#define SIG_OUTPUT_COMPARE1A _VECTOR(7) - -/* Timer/Counter Compare Match B */ -#define TIMER1_COMPB_vect _VECTOR(8) -#define SIG_OUTPUT_COMPARE1B _VECTOR(8) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(9) -#define SIG_OVERFLOW1 _VECTOR(9) - -/* Timer/Counter0 Compare Match */ -#define TIMER0_COMP_vect _VECTOR(10) -#define SIG_OUTPUT_COMPARE0 _VECTOR(10) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(11) -#define SIG_OVERFLOW0 _VECTOR(11) - -/* SPI Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(12) -#define SIG_SPI _VECTOR(12) - -/* USART0, Rx Complete */ -#define USART0_RX_vect _VECTOR(13) -#define SIG_UART_RECV _VECTOR(13) - -/* USART0 Data register Empty */ -#define USART0_UDRE_vect _VECTOR(14) -#define SIG_UART_DATA _VECTOR(14) - -/* USART0, Tx Complete */ -#define USART0_TX_vect _VECTOR(15) -#define SIG_UART_TRANS _VECTOR(15) - -/* USI Start Condition */ -#define USI_START_vect _VECTOR(16) -#define SIG_USI_START _VECTOR(16) - -/* USI Overflow */ -#define USI_OVERFLOW_vect _VECTOR(17) -#define SIG_USI_OVERFLOW _VECTOR(17) - -/* Analog Comparator */ -#define ANALOG_COMP_vect _VECTOR(18) -#define SIG_COMPARATOR _VECTOR(18) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(19) -#define SIG_ADC _VECTOR(19) - -/* EEPROM Ready */ -#define EE_READY_vect _VECTOR(20) -#define SIG_EEPROM_READY _VECTOR(20) - -/* Store Program Memory Read */ -#define SPM_READY_vect _VECTOR(21) -#define SIG_SPM_READY _VECTOR(21) - -/* LCD Start of Frame */ -#define LCD_vect _VECTOR(22) -#define SIG_LCD _VECTOR(22) - -#define _VECTORS_SIZE 92 - - -/* Constants */ -#define SPM_PAGESIZE 256 -#define RAMEND 0x10FF -#define XRAMEND 0x10FF -#define E2END 0x7FF -#define E2PAGESIZE 8 -#define FLASHEND 0xFFFF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_JTAGEN (unsigned char)~_BV(6) -#define FUSE_OCDEN (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_SPIEN & FUSE_JTAGEN) - -/* Extended Fuse Byte */ -#define FUSE_RSTDISBL (unsigned char)~_BV(0) -#define FUSE_BODLEVEL0 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(2) -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x96 -#define SIGNATURE_2 0x03 - - -#endif /* _AVR_IOM649_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom6490.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom6490.h deleted file mode 100644 index bb243cf47..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom6490.h +++ /dev/null @@ -1,1144 +0,0 @@ -/* Copyright (c) 2004 Eric B. Weddington - Copyright (c) 2005,2006 Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* avr/iom6490.h - definitions for ATmega6490 */ - -#ifndef _AVR_IOM6490_H_ -#define _AVR_IOM6490_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iom6490.h" -#else -# error "Attempt to include more than one file." -#endif - -/* Registers and associated bit numbers */ - -#define PINA _SFR_IO8(0x00) -#define PINA7 7 -#define PINA6 6 -#define PINA5 5 -#define PINA4 4 -#define PINA3 3 -#define PINA2 2 -#define PINA1 1 -#define PINA0 0 - -#define DDRA _SFR_IO8(0x01) -#define DDA7 7 -#define DDA6 6 -#define DDA5 5 -#define DDA4 4 -#define DDA3 3 -#define DDA2 2 -#define DDA1 1 -#define DDA0 0 - -#define PORTA _SFR_IO8(0x02) -#define PA7 7 -#define PA6 6 -#define PA5 5 -#define PA4 4 -#define PA3 3 -#define PA2 2 -#define PA1 1 -#define PA0 0 - -#define PINB _SFR_IO8(0x03) -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -#define DDRB _SFR_IO8(0x04) -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -#define PORTB _SFR_IO8(0x05) -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -#define PINC _SFR_IO8(0x06) -#define PINC7 7 -#define PINC6 6 -#define PINC5 5 -#define PINC4 4 -#define PINC3 3 -#define PINC2 2 -#define PINC1 1 -#define PINC0 0 - -#define DDRC _SFR_IO8(0x07) -#define DDC7 7 -#define DDC6 6 -#define DDC5 5 -#define DDC4 4 -#define DDC3 3 -#define DDC2 2 -#define DDC1 1 -#define DDC0 0 - -#define PORTC _SFR_IO8(0x08) -#define PC7 7 -#define PC6 6 -#define PC5 5 -#define PC4 4 -#define PC3 3 -#define PC2 2 -#define PC1 1 -#define PC0 0 - -#define PIND _SFR_IO8(0x09) -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -#define DDRD _SFR_IO8(0x0A) -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -#define PORTD _SFR_IO8(0x0B) -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -#define PINE _SFR_IO8(0x0C) -#define PINE7 7 -#define PINE6 6 -#define PINE5 5 -#define PINE4 4 -#define PINE3 3 -#define PINE2 2 -#define PINE1 1 -#define PINE0 0 - -#define DDRE _SFR_IO8(0x0D) -#define DDE7 7 -#define DDE6 6 -#define DDE5 5 -#define DDE4 4 -#define DDE3 3 -#define DDE2 2 -#define DDE1 1 -#define DDE0 0 - -#define PORTE _SFR_IO8(0x0E) -#define PE7 7 -#define PE6 6 -#define PE5 5 -#define PE4 4 -#define PE3 3 -#define PE2 2 -#define PE1 1 -#define PE0 0 - -#define PINF _SFR_IO8(0x0F) -#define PINF7 7 -#define PINF6 6 -#define PINF5 5 -#define PINF4 4 -#define PINF3 3 -#define PINF2 2 -#define PINF1 1 -#define PINF0 0 - -#define DDRF _SFR_IO8(0x10) -#define DDF7 7 -#define DDF6 6 -#define DDF5 5 -#define DDF4 4 -#define DDF3 3 -#define DDF2 2 -#define DDF1 1 -#define DDF0 0 - -#define PORTF _SFR_IO8(0x11) -#define PF7 7 -#define PF6 6 -#define PF5 5 -#define PF4 4 -#define PF3 3 -#define PF2 2 -#define PF1 1 -#define PF0 0 - -#define PING _SFR_IO8(0x12) -#define PING5 5 -#define PING4 4 -#define PING3 3 -#define PING2 2 -#define PING1 1 -#define PING0 0 - -#define DDRG _SFR_IO8(0x13) -#define DDG4 4 -#define DDG3 3 -#define DDG2 2 -#define DDG1 1 -#define DDG0 0 - -#define PORTG _SFR_IO8(0x14) -#define PG4 4 -#define PG3 3 -#define PG2 2 -#define PG1 1 -#define PG0 0 - -#define TIFR0 _SFR_IO8(0x15) -#define TOV0 0 -#define OCF0A 1 - -#define TIFR1 _SFR_IO8(0x16) -#define TOV1 0 -#define OCF1A 1 -#define OCF1B 2 -#define ICF1 5 - -#define TIFR2 _SFR_IO8(0x17) -#define TOV2 0 -#define OCF2A 1 - -/* Reserved [0x18..0x1B] */ - -#define EIFR _SFR_IO8(0x1C) -#define INTF0 0 -#define PCIF0 4 -#define PCIF1 5 -#define PCIF2 6 -#define PCIF3 7 - -#define EIMSK _SFR_IO8(0x1D) -#define INT0 0 -#define PCIE0 4 -#define PCIE1 5 -#define PCIE2 6 -#define PCIE3 7 - -#define GPIOR0 _SFR_IO8(0x1E) - -#define EECR _SFR_IO8(0x1F) -#define EERIE 3 -#define EEMWE 2 -#define EEWE 1 -#define EERE 0 - -#define EEDR _SFR_IO8(0X20) - -/* Combine EEARL and EEARH */ -#define EEAR _SFR_IO16(0x21) -#define EEARL _SFR_IO8(0x21) -#define EEARH _SFR_IO8(0X22) - -/* 6-char sequence denoting where to find the EEPROM registers in memory space. - Adresses denoted in hex syntax with uppercase letters. Used by the EEPROM - subroutines. - First two letters: EECR address. - Second two letters: EEDR address. - Last two letters: EEAR address. */ -#define __EEPROM_REG_LOCATIONS__ 1F2021 - -#define GTCCR _SFR_IO8(0x23) -#define PSR10 0 -#define PSR2 1 -#define TSM 7 - -#define TCCR0A _SFR_IO8(0x24) -#define CS00 0 -#define CS01 1 -#define CS02 2 -#define WGM01 3 -#define COM0A0 4 -#define COM0A1 5 -#define WGM00 6 -#define FOC0A 7 - -/* Reserved [0x25] */ - -#define TCNT0 _SFR_IO8(0X26) - -#define OCR0A _SFR_IO8(0X27) - -/* Reserved [0x28..0x29] */ - -#define GPIOR1 _SFR_IO8(0x2A) - -#define GPIOR2 _SFR_IO8(0x2B) - -#define SPCR _SFR_IO8(0x2C) -#define SPR0 0 -#define SPR1 1 -#define CPHA 2 -#define CPOL 3 -#define MSTR 4 -#define DORD 5 -#define SPE 6 -#define SPIE 7 - -#define SPSR _SFR_IO8(0x2D) -#define SPI2X 0 -#define WCOL 6 -#define SPIF 7 - -#define SPDR _SFR_IO8(0X2E) - -/* Reserved [0x2F] */ - -#define ACSR _SFR_IO8(0x30) -#define ACIS0 0 -#define ACIS1 1 -#define ACIC 2 -#define ACIE 3 -#define ACI 4 -#define ACO 5 -#define ACBG 6 -#define ACD 7 - -#define OCDR _SFR_IO8(0x31) -#define OCDR0 0 -#define OCDR1 1 -#define OCDR2 2 -#define OCDR3 3 -#define OCDR4 4 -#define OCDR5 5 -#define OCDR6 6 -#define OCDR7 7 -#define IDRD 7 - -/* Reserved [0x32] */ - -#define SMCR _SFR_IO8(0x33) -#define SE 0 -#define SM0 1 -#define SM1 2 -#define SM2 3 - -#define MCUSR _SFR_IO8(0x34) -#define PORF 0 -#define EXTRF 1 -#define BORF 2 -#define WDRF 3 -#define JTRF 4 - -#define MCUCR _SFR_IO8(0X35) -#define IVCE 0 -#define IVSEL 1 -#define PUD 4 -#define JTD 7 - -/* Reserved [0x36] */ - -#define SPMCSR _SFR_IO8(0x37) -#define SPMEN 0 -#define PGERS 1 -#define PGWRT 2 -#define BLBSET 3 -#define RWWSRE 4 -#define RWWSB 6 -#define SPMIE 7 - -/* Reserved [0x38..0x3C] */ - -/* SP [0x3D..0x3E] */ -/* SREG [0x3F] */ - -#define WDTCR _SFR_MEM8(0x60) -#define WDP0 0 -#define WDP1 1 -#define WDP2 2 -#define WDE 3 -#define WDCE 4 - -#define CLKPR _SFR_MEM8(0x61) -#define CLKPS0 0 -#define CLKPS1 1 -#define CLKPS2 2 -#define CLKPS3 3 -#define CLKPCE 7 - -/* Reserved [0x62..0x63] */ - -#define PRR _SFR_MEM8(0x64) -#define PRADC 0 -#define PRUSART0 1 -#define PRSPI 2 -#define PRTIM1 3 -#define PRLCD 4 - -/* Reserved [0x65] */ - -#define OSCCAL _SFR_MEM8(0x66) - -/* Reserved [0x67..0x68] */ - -#define EICRA _SFR_MEM8(0x69) -#define ISC00 0 -#define ISC01 1 - -/* Reserved [0x6A] */ - -#define PCMSK0 _SFR_MEM8(0x6B) -#define PCINT0 0 -#define PCINT1 1 -#define PCINT2 2 -#define PCINT3 3 -#define PCINT4 4 -#define PCINT5 5 -#define PCINT6 6 -#define PCINT7 7 - -#define PCMSK1 _SFR_MEM8(0x6C) -#define PCINT8 0 -#define PCINT9 1 -#define PCINT10 2 -#define PCINT11 3 -#define PCINT12 4 -#define PCINT13 5 -#define PCINT14 6 -#define PCINT15 7 - -#define PCMSK2 _SFR_MEM8(0x6D) -#define PCINT16 0 -#define PCINT17 1 -#define PCINT18 2 -#define PCINT19 3 -#define PCINT20 4 -#define PCINT21 5 -#define PCINT22 6 -#define PCINT23 7 - -#define TIMSK0 _SFR_MEM8(0x6E) -#define TOIE0 0 -#define OCIE0A 1 - -#define TIMSK1 _SFR_MEM8(0x6F) -#define TOIE1 0 -#define OCIE1A 1 -#define OCIE1B 2 -#define ICIE1 5 - -#define TIMSK2 _SFR_MEM8(0x70) -#define TOIE2 0 -#define OCIE2A 1 - -/* Reserved [0x71..0x72] */ - -#define PCMSK3 _SFR_MEM8(0x73) -#define PCINT24 0 -#define PCINT25 1 -#define PCINT26 2 -#define PCINT27 3 -#define PCINT28 4 -#define PCINT29 5 -#define PCINT30 6 - -/* Reserved [0x74..0x77] */ - -/* Combine ADCL and ADCH */ -#ifndef __ASSEMBLER__ -#define ADC _SFR_MEM16(0x78) -#endif -#define ADCW _SFR_MEM16(0x78) -#define ADCL _SFR_MEM8(0x78) -#define ADCH _SFR_MEM8(0x79) - -#define ADCSRA _SFR_MEM8(0x7A) -#define ADPS0 0 -#define ADPS1 1 -#define ADPS2 2 -#define ADIE 3 -#define ADIF 4 -#define ADATE 5 -#define ADSC 6 -#define ADEN 7 - -#define ADCSRB _SFR_MEM8(0x7B) -#define ADTS0 0 -#define ADTS1 1 -#define ADTS2 2 -#define ACME 6 - -#define ADMUX _SFR_MEM8(0x7C) -#define MUX0 0 -#define MUX1 1 -#define MUX2 2 -#define MUX3 3 -#define MUX4 4 -#define ADLAR 5 -#define REFS0 6 -#define REFS1 7 - -/* Reserved [0x7D] */ - -#define DIDR0 _SFR_MEM8(0x7E) -#define ADC0D 0 -#define ADC1D 1 -#define ADC2D 2 -#define ADC3D 3 -#define ADC4D 4 -#define ADC5D 5 -#define ADC6D 6 -#define ADC7D 7 - -#define DIDR1 _SFR_MEM8(0x7F) -#define AIN0D 0 -#define AIN1D 1 - -#define TCCR1A _SFR_MEM8(0X80) -#define WGM10 0 -#define WGM11 1 -#define COM1B0 4 -#define COM1B1 5 -#define COM1A0 6 -#define COM1A1 7 - -#define TCCR1B _SFR_MEM8(0X81) -#define CS10 0 -#define CS11 1 -#define CS12 2 -#define WGM12 3 -#define WGM13 4 -#define ICES1 6 -#define ICNC1 7 - -#define TCCR1C _SFR_MEM8(0x82) -#define FOC1B 6 -#define FOC1A 7 - -/* Reserved [0x83] */ - -/* Combine TCNT1L and TCNT1H */ -#define TCNT1 _SFR_MEM16(0x84) - -#define TCNT1L _SFR_MEM8(0x84) -#define TCNT1H _SFR_MEM8(0x85) - -/* Combine ICR1L and ICR1H */ -#define ICR1 _SFR_MEM16(0x86) - -#define ICR1L _SFR_MEM8(0x86) -#define ICR1H _SFR_MEM8(0x87) - -/* Combine OCR1AL and OCR1AH */ -#define OCR1A _SFR_MEM16(0x88) - -#define OCR1AL _SFR_MEM8(0x88) -#define OCR1AH _SFR_MEM8(0x89) - -/* Combine OCR1BL and OCR1BH */ -#define OCR1B _SFR_MEM16(0x8A) - -#define OCR1BL _SFR_MEM8(0x8A) -#define OCR1BH _SFR_MEM8(0x8B) - -/* Reserved [0x8C..0xAF] */ - -#define TCCR2A _SFR_MEM8(0xB0) -#define CS20 0 -#define CS21 1 -#define CS22 2 -#define WGM21 3 -#define COM2A0 4 -#define COM2A1 5 -#define WGM20 6 -#define FOC2A 7 - -/* Reserved [0xB1] */ - -#define TCNT2 _SFR_MEM8(0xB2) - -#define OCR2A _SFR_MEM8(0xB3) - -/* Reserved [0xB4..0xB5] */ - -#define ASSR _SFR_MEM8(0xB6) -#define TCR2UB 0 -#define OCR2UB 1 -#define TCN2UB 2 -#define AS2 3 -#define EXCLK 4 - -/* Reserved [0xB7] */ - -#define USICR _SFR_MEM8(0xB8) -#define USITC 0 -#define USICLK 1 -#define USICS0 2 -#define USICS1 3 -#define USIWM0 4 -#define USIWM1 5 -#define USIOIE 6 -#define USISIE 7 - -#define USISR _SFR_MEM8(0xB9) -#define USICNT0 0 -#define USICNT1 1 -#define USICNT2 2 -#define USICNT3 3 -#define USIDC 4 -#define USIPF 5 -#define USIOIF 6 -#define USISIF 7 - -#define USIDR _SFR_MEM8(0xBA) - -/* Reserved [0xBB..0xBF] */ - -#define UCSR0A _SFR_MEM8(0xC0) -#define MPCM0 0 -#define U2X0 1 -#define UPE0 2 -#define DOR0 3 -#define FE0 4 -#define UDRE0 5 -#define TXC0 6 -#define RXC0 7 - -#define UCSR0B _SFR_MEM8(0XC1) -#define TXB80 0 -#define RXB80 1 -#define UCSZ02 2 -#define TXEN0 3 -#define RXEN0 4 -#define UDRIE0 5 -#define TXCIE0 6 -#define RXCIE0 7 - -#define UCSR0C _SFR_MEM8(0xC2) -#define UCPOL0 0 -#define UCSZ00 1 -#define UCSZ01 2 -#define USBS0 3 -#define UPM00 4 -#define UPM01 5 -#define UMSEL0 6 - -/* Reserved [0xC3] */ - -/* Combine UBRR0L and UBRR0H */ -#define UBRR0 _SFR_MEM16(0xC4) - -#define UBRR0L _SFR_MEM8(0xC4) -#define UBRR0H _SFR_MEM8(0xC5) - -#define UDR0 _SFR_MEM8(0XC6) - -/* Reserved [0xC7..0xD7] */ - -#define PINH _SFR_MEM8(0xD8) -#define PINH7 7 -#define PINH6 6 -#define PINH5 5 -#define PINH4 4 -#define PINH3 3 -#define PINH2 2 -#define PINH1 1 -#define PINH0 0 - -#define DDRH _SFR_MEM8(0xD9) -#define DDH7 7 -#define DDH6 6 -#define DDH5 5 -#define DDH4 4 -#define DDH3 3 -#define DDH2 2 -#define DDH1 1 -#define DDH0 0 - -#define PORTH _SFR_MEM8(0xDA) -#define PH7 7 -#define PH6 6 -#define PH5 5 -#define PH4 4 -#define PH3 3 -#define PH2 2 -#define PH1 1 -#define PH0 0 - -#define PINJ _SFR_MEM8(0xDB) -#define PINJ6 6 -#define PINJ5 5 -#define PINJ4 4 -#define PINJ3 3 -#define PINJ2 2 -#define PINJ1 1 -#define PINJ0 0 - -#define DDRJ _SFR_MEM8(0xDC) -#define DDJ6 6 -#define DDJ5 5 -#define DDJ4 4 -#define DDJ3 3 -#define DDJ2 2 -#define DDJ1 1 -#define DDJ0 0 - -#define PORTJ _SFR_MEM8(0xDD) -#define PJ6 6 -#define PJ5 5 -#define PJ4 4 -#define PJ3 3 -#define PJ2 2 -#define PJ1 1 -#define PJ0 0 - -/* Reserved [0xDE..0xE3] */ - -#define LCDCRA _SFR_MEM8(0XE4) -#define LCDBL 0 -#define LCDIE 3 -#define LCDIF 4 -#define LCDAB 6 -#define LCDEN 7 - -#define LCDCRB _SFR_MEM8(0XE5) -#define LCDPM0 0 -#define LCDPM1 1 -#define LCDPM2 2 -#define LCDPM3 3 -#define LCDMUX0 4 -#define LCDMUX1 5 -#define LCD2B 6 -#define LCDCS 7 - -#define LCDFRR _SFR_MEM8(0XE6) -#define LCDCD0 0 -#define LCDCD1 1 -#define LCDCD2 2 -#define LCDPS0 4 -#define LCDPS1 5 -#define LCDPS2 6 - -#define LCDCCR _SFR_MEM8(0XE7) -#define LCDCC0 0 -#define LCDCC1 1 -#define LCDCC2 2 -#define LCDCC3 3 -#define LCDDC0 5 -#define LCDDC1 6 -#define LCDDC2 7 - -/* Reserved [0xE8..0xEB] */ - -#define LCDDR00 _SFR_MEM8(0XEC) -#define SEG000 0 -#define SEG001 1 -#define SEG002 2 -#define SEG003 3 -#define SEG004 4 -#define SEG005 5 -#define SEG006 6 -#define SEG007 7 - -#define LCDDR01 _SFR_MEM8(0XED) -#define SEG008 0 -#define SEG009 1 -#define SEG010 2 -#define SEG011 3 -#define SEG012 4 -#define SEG013 5 -#define SEG014 6 -#define SEG015 7 - -#define LCDDR02 _SFR_MEM8(0XEE) -#define SEG016 0 -#define SEG017 1 -#define SEG018 2 -#define SEG019 3 -#define SEG020 4 -#define SEG021 5 -#define SEG022 6 -#define SEG023 7 - -#define LCDDR03 _SFR_MEM8(0XEF) -#define SEG024 0 -#define SEG025 1 -#define SEG026 2 -#define SEG027 3 -#define SEG028 4 -#define SEG029 5 -#define SEG030 6 -#define SEG031 7 - -#define LCDDR04 _SFR_MEM8(0XF0) -#define SEG032 0 -#define SEG033 1 -#define SEG034 2 -#define SEG035 3 -#define SEG036 4 -#define SEG037 5 -#define SEG038 6 -#define SEG039 7 - -#define LCDDR05 _SFR_MEM8(0XF1) -#define SEG100 0 -#define SEG101 1 -#define SEG102 2 -#define SEG103 3 -#define SEG104 4 -#define SEG105 5 -#define SEG106 6 -#define SEG107 7 - -#define LCDDR06 _SFR_MEM8(0XF2) -#define SEG108 0 -#define SEG109 1 -#define SEG110 2 -#define SEG111 3 -#define SEG112 4 -#define SEG113 5 -#define SEG114 6 -#define SEG115 7 - -#define LCDDR07 _SFR_MEM8(0XF3) -#define SEG116 0 -#define SEG117 1 -#define SEG118 2 -#define SEG119 3 -#define SEG120 4 -#define SEG121 5 -#define SEG122 6 -#define SEG123 7 - -#define LCDDR08 _SFR_MEM8(0XF4) -#define SEG124 0 -#define SEG125 1 -#define SEG126 2 -#define SEG127 3 -#define SEG128 4 -#define SEG129 5 -#define SEG130 6 -#define SEG131 7 - -#define LCDDR09 _SFR_MEM8(0XF5) -#define SEG132 0 -#define SEG133 1 -#define SEG134 2 -#define SEG135 3 -#define SEG136 4 -#define SEG137 5 -#define SEG138 6 -#define SEG139 7 - -#define LCDDR10 _SFR_MEM8(0XF6) -#define SEG200 0 -#define SEG201 1 -#define SEG202 2 -#define SEG203 3 -#define SEG204 4 -#define SEG205 5 -#define SEG206 6 -#define SEG207 7 - -#define LCDDR11 _SFR_MEM8(0XF7) -#define SEG208 0 -#define SEG209 1 -#define SEG210 2 -#define SEG211 3 -#define SEG212 4 -#define SEG213 5 -#define SEG214 6 -#define SEG215 7 - -#define LCDDR12 _SFR_MEM8(0XF8) -#define SEG216 0 -#define SEG217 1 -#define SEG218 2 -#define SEG219 3 -#define SEG220 4 -#define SEG221 5 -#define SEG222 6 -#define SEG223 7 - -#define LCDDR13 _SFR_MEM8(0XF9) -#define SEG224 0 -#define SEG225 1 -#define SEG226 2 -#define SEG227 3 -#define SEG228 4 -#define SEG229 5 -#define SEG230 6 -#define SEG231 7 - -#define LCDDR14 _SFR_MEM8(0XFA) -#define SEG232 0 -#define SEG233 1 -#define SEG234 2 -#define SEG235 3 -#define SEG236 4 -#define SEG237 5 -#define SEG238 6 -#define SEG239 7 - -#define LCDDR15 _SFR_MEM8(0XFB) -#define SEG300 0 -#define SEG301 1 -#define SEG302 2 -#define SEG303 3 -#define SEG304 4 -#define SEG305 5 -#define SEG306 6 -#define SEG307 7 - -#define LCDDR16 _SFR_MEM8(0XFC) -#define SEG308 0 -#define SEG309 1 -#define SEG310 2 -#define SEG311 3 -#define SEG312 4 -#define SEG313 5 -#define SEG314 6 -#define SEG315 7 - -#define LCDDR17 _SFR_MEM8(0XFD) -#define SEG316 0 -#define SEG217 1 -#define SEG318 2 -#define SEG319 3 -#define SEG320 4 -#define SEG321 5 -#define SEG322 6 -#define SEG323 7 - -#define LCDDR18 _SFR_MEM8(0XFE) -#define SEG324 0 -#define SEG325 1 -#define SEG326 2 -#define SEG327 3 -#define SEG328 4 -#define SEG329 5 -#define SEG330 6 -#define SEG331 7 - -#define LCDDR19 _SFR_MEM8(0XFF) -#define SEG332 0 -#define SEG333 1 -#define SEG334 2 -#define SEG335 3 -#define SEG336 4 -#define SEG337 5 -#define SEG338 6 -#define SEG339 7 - - -/* Interrupt vectors */ -/* Vector 0 is the reset vector */ -/* External Interrupt Request 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* Pin Change Interrupt Request 0 */ -#define PCINT0_vect _VECTOR(2) -#define SIG_PIN_CHANGE0 _VECTOR(2) - -/* Pin Change Interrupt Request 1 */ -#define PCINT1_vect _VECTOR(3) -#define SIG_PIN_CHANGE1 _VECTOR(3) - -/* Timer/Counter2 Compare Match */ -#define TIMER2_COMP_vect _VECTOR(4) -#define SIG_OUTPUT_COMPARE2 _VECTOR(4) - -/* Timer/Counter2 Overflow */ -#define TIMER2_OVF_vect _VECTOR(5) -#define SIG_OVERFLOW2 _VECTOR(5) - -/* Timer/Counter1 Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(6) -#define SIG_INPUT_CAPTURE1 _VECTOR(6) - -/* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPA_vect _VECTOR(7) -#define SIG_OUTPUT_COMPARE1A _VECTOR(7) - -/* Timer/Counter Compare Match B */ -#define TIMER1_COMPB_vect _VECTOR(8) -#define SIG_OUTPUT_COMPARE1B _VECTOR(8) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(9) -#define SIG_OVERFLOW1 _VECTOR(9) - -/* Timer/Counter0 Compare Match */ -#define TIMER0_COMP_vect _VECTOR(10) -#define SIG_OUTPUT_COMPARE0 _VECTOR(10) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(11) -#define SIG_OVERFLOW0 _VECTOR(11) - -/* SPI Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(12) -#define SIG_SPI _VECTOR(12) - -/* USART, Rx Complete */ -#define USART_RX_vect _VECTOR(13) -#define SIG_UART_RECV _VECTOR(13) - -/* USART Data register Empty */ -#define USART_UDRE_vect _VECTOR(14) -#define SIG_UART_DATA _VECTOR(14) - -/* USART0, Tx Complete */ -#define USART0_TX_vect _VECTOR(15) -#define SIG_UART_TRANS _VECTOR(15) - -/* USI Start Condition */ -#define USI_START_vect _VECTOR(16) -#define SIG_USI_START _VECTOR(16) - -/* USI Overflow */ -#define USI_OVERFLOW_vect _VECTOR(17) -#define SIG_USI_OVERFLOW _VECTOR(17) - -/* Analog Comparator */ -#define ANALOG_COMP_vect _VECTOR(18) -#define SIG_COMPARATOR _VECTOR(18) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(19) -#define SIG_ADC _VECTOR(19) - -/* EEPROM Ready */ -#define EE_READY_vect _VECTOR(20) -#define SIG_EEPROM_READY _VECTOR(20) - -/* Store Program Memory Read */ -#define SPM_READY_vect _VECTOR(21) -#define SIG_SPM_READY _VECTOR(21) - -/* LCD Start of Frame */ -#define LCD_vect _VECTOR(22) -#define SIG_LCD _VECTOR(22) - -/* Pin Change Interrupt Request 2 */ -#define PCINT2_vect _VECTOR(23) -#define SIG_PIN_CHANGE2 _VECTOR(23) - -/* Pin Change Interrupt Request 3 */ -#define PCINT3_vect _VECTOR(24) -#define SIG_PIN_CHANGE3 _VECTOR(24) - -#define _VECTORS_SIZE 100 - - -/* Constants */ -#define SPM_PAGESIZE 256 -#define RAMEND 0x10FF -#define XRAMEND 0x10FF -#define E2END 0x7FF -#define E2PAGESIZE 8 -#define FLASHEND 0xFFFF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_JTAGEN (unsigned char)~_BV(6) -#define FUSE_OCDEN (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_SPIEN & FUSE_JTAGEN) - -/* Extended Fuse Byte */ -#define FUSE_RSTDISBL (unsigned char)~_BV(0) -#define FUSE_BODLEVEL0 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(2) -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x96 -#define SIGNATURE_2 0x04 - - -#endif /* _AVR_IOM6490_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom8.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom8.h deleted file mode 100644 index b88c62586..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom8.h +++ /dev/null @@ -1,614 +0,0 @@ -/* Copyright (c) 2002, Marek Michalkiewicz - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iom8.h,v 1.14.2.6 2008/10/17 23:27:50 arcanum Exp $ */ - -/* avr/iom8.h - definitions for ATmega8 */ - -#ifndef _AVR_IOM8_H_ -#define _AVR_IOM8_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iom8.h" -#else -# error "Attempt to include more than one file." -#endif - -/* I/O registers */ - -/* TWI stands for "Two Wire Interface" or "TWI Was I2C(tm)" */ -#define TWBR _SFR_IO8(0x00) -#define TWSR _SFR_IO8(0x01) -#define TWAR _SFR_IO8(0x02) -#define TWDR _SFR_IO8(0x03) - -/* ADC */ -#define ADCW _SFR_IO16(0x04) -#ifndef __ASSEMBLER__ -#define ADC _SFR_IO16(0x04) -#endif -#define ADCL _SFR_IO8(0x04) -#define ADCH _SFR_IO8(0x05) -#define ADCSR _SFR_IO8(0x06) -#define ADCSRA _SFR_IO8(0x06) /* Changed in 2486H-AVR-09/02 */ -#define ADMUX _SFR_IO8(0x07) - -/* analog comparator */ -#define ACSR _SFR_IO8(0x08) - -/* USART */ -#define UBRRL _SFR_IO8(0x09) -#define UCSRB _SFR_IO8(0x0A) -#define UCSRA _SFR_IO8(0x0B) -#define UDR _SFR_IO8(0x0C) - -/* SPI */ -#define SPCR _SFR_IO8(0x0D) -#define SPSR _SFR_IO8(0x0E) -#define SPDR _SFR_IO8(0x0F) - -/* Port D */ -#define PIND _SFR_IO8(0x10) -#define DDRD _SFR_IO8(0x11) -#define PORTD _SFR_IO8(0x12) - -/* Port C */ -#define PINC _SFR_IO8(0x13) -#define DDRC _SFR_IO8(0x14) -#define PORTC _SFR_IO8(0x15) - -/* Port B */ -#define PINB _SFR_IO8(0x16) -#define DDRB _SFR_IO8(0x17) -#define PORTB _SFR_IO8(0x18) - -/* EEPROM Control Register */ -#define EECR _SFR_IO8(0x1C) - -/* EEPROM Data Register */ -#define EEDR _SFR_IO8(0x1D) - -/* EEPROM Address Register */ -#define EEAR _SFR_IO16(0x1E) -#define EEARL _SFR_IO8(0x1E) -#define EEARH _SFR_IO8(0x1F) - -#define UCSRC _SFR_IO8(0x20) -#define UBRRH _SFR_IO8(0x20) - -#define WDTCR _SFR_IO8(0x21) -#define ASSR _SFR_IO8(0x22) - -/* Timer 2 */ -#define OCR2 _SFR_IO8(0x23) -#define TCNT2 _SFR_IO8(0x24) -#define TCCR2 _SFR_IO8(0x25) - -/* Timer 1 */ -#define ICR1 _SFR_IO16(0x26) -#define ICR1L _SFR_IO8(0x26) -#define ICR1H _SFR_IO8(0x27) -#define OCR1B _SFR_IO16(0x28) -#define OCR1BL _SFR_IO8(0x28) -#define OCR1BH _SFR_IO8(0x29) -#define OCR1A _SFR_IO16(0x2A) -#define OCR1AL _SFR_IO8(0x2A) -#define OCR1AH _SFR_IO8(0x2B) -#define TCNT1 _SFR_IO16(0x2C) -#define TCNT1L _SFR_IO8(0x2C) -#define TCNT1H _SFR_IO8(0x2D) -#define TCCR1B _SFR_IO8(0x2E) -#define TCCR1A _SFR_IO8(0x2F) - -#define SFIOR _SFR_IO8(0x30) - -#define OSCCAL _SFR_IO8(0x31) - -/* Timer 0 */ -#define TCNT0 _SFR_IO8(0x32) -#define TCCR0 _SFR_IO8(0x33) - -#define MCUCSR _SFR_IO8(0x34) -#define MCUSR _SFR_IO8(0x34) /* Defined as an alias for MCUCSR. */ - -#define MCUCR _SFR_IO8(0x35) - -#define TWCR _SFR_IO8(0x36) - -#define SPMCR _SFR_IO8(0x37) - -#define TIFR _SFR_IO8(0x38) -#define TIMSK _SFR_IO8(0x39) - -#define GIFR _SFR_IO8(0x3A) -#define GIMSK _SFR_IO8(0x3B) -#define GICR _SFR_IO8(0x3B) /* Changed in 2486H-AVR-09/02 */ - -/* 0x3C reserved (OCR0?) */ - -/* 0x3D..0x3E SP */ - -/* 0x3F SREG */ - -/* Interrupt vectors */ - -/* External Interrupt Request 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* External Interrupt Request 1 */ -#define INT1_vect _VECTOR(2) -#define SIG_INTERRUPT1 _VECTOR(2) - -/* Timer/Counter2 Compare Match */ -#define TIMER2_COMP_vect _VECTOR(3) -#define SIG_OUTPUT_COMPARE2 _VECTOR(3) - -/* Timer/Counter2 Overflow */ -#define TIMER2_OVF_vect _VECTOR(4) -#define SIG_OVERFLOW2 _VECTOR(4) - -/* Timer/Counter1 Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(5) -#define SIG_INPUT_CAPTURE1 _VECTOR(5) - -/* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPA_vect _VECTOR(6) -#define SIG_OUTPUT_COMPARE1A _VECTOR(6) - -/* Timer/Counter1 Compare Match B */ -#define TIMER1_COMPB_vect _VECTOR(7) -#define SIG_OUTPUT_COMPARE1B _VECTOR(7) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(8) -#define SIG_OVERFLOW1 _VECTOR(8) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(9) -#define SIG_OVERFLOW0 _VECTOR(9) - -/* Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(10) -#define SIG_SPI _VECTOR(10) - -/* USART, Rx Complete */ -#define USART_RXC_vect _VECTOR(11) -#define SIG_UART_RECV _VECTOR(11) - -/* USART Data Register Empty */ -#define USART_UDRE_vect _VECTOR(12) -#define SIG_UART_DATA _VECTOR(12) - -/* USART, Tx Complete */ -#define USART_TXC_vect _VECTOR(13) -#define SIG_UART_TRANS _VECTOR(13) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(14) -#define SIG_ADC _VECTOR(14) - -/* EEPROM Ready */ -#define EE_RDY_vect _VECTOR(15) -#define SIG_EEPROM_READY _VECTOR(15) - -/* Analog Comparator */ -#define ANA_COMP_vect _VECTOR(16) -#define SIG_COMPARATOR _VECTOR(16) - -/* 2-wire Serial Interface */ -#define TWI_vect _VECTOR(17) -#define SIG_2WIRE_SERIAL _VECTOR(17) - -/* Store Program Memory Ready */ -#define SPM_RDY_vect _VECTOR(18) -#define SIG_SPM_READY _VECTOR(18) - -#define _VECTORS_SIZE 38 - -/* Bit numbers */ - -/* GIMSK / GICR */ -#define INT1 7 -#define INT0 6 -#define IVSEL 1 -#define IVCE 0 - -/* GIFR */ -#define INTF1 7 -#define INTF0 6 - -/* TIMSK */ -#define OCIE2 7 -#define TOIE2 6 -#define TICIE1 5 -#define OCIE1A 4 -#define OCIE1B 3 -#define TOIE1 2 -/* bit 1 reserved (OCIE0?) */ -#define TOIE0 0 - -/* TIFR */ -#define OCF2 7 -#define TOV2 6 -#define ICF1 5 -#define OCF1A 4 -#define OCF1B 3 -#define TOV1 2 -/* bit 1 reserved (OCF0?) */ -#define TOV0 0 - -/* SPMCR */ -#define SPMIE 7 -#define RWWSB 6 -/* bit 5 reserved */ -#define RWWSRE 4 -#define BLBSET 3 -#define PGWRT 2 -#define PGERS 1 -#define SPMEN 0 - -/* TWCR */ -#define TWINT 7 -#define TWEA 6 -#define TWSTA 5 -#define TWSTO 4 -#define TWWC 3 -#define TWEN 2 -/* bit 1 reserved (TWI_TST?) */ -#define TWIE 0 - -/* TWAR */ -#define TWA6 7 -#define TWA5 6 -#define TWA4 5 -#define TWA3 4 -#define TWA2 3 -#define TWA1 2 -#define TWA0 1 -#define TWGCE 0 - -/* TWSR */ -#define TWS7 7 -#define TWS6 6 -#define TWS5 5 -#define TWS4 4 -#define TWS3 3 -/* bit 2 reserved */ -#define TWPS1 1 -#define TWPS0 0 - -/* MCUCR */ -#define SE 7 -#define SM2 6 -#define SM1 5 -#define SM0 4 -#define ISC11 3 -#define ISC10 2 -#define ISC01 1 -#define ISC00 0 - -/* MCUCSR */ -/* bits 7-4 reserved */ -#define WDRF 3 -#define BORF 2 -#define EXTRF 1 -#define PORF 0 - -/* - The ADHSM bit has been removed from all documentation, - as being not needed at all since the comparator has proven - to be fast enough even without feeding it more power. -*/ - -/* SFIOR */ -/* bits 7-5 reserved */ -#define ACME 3 -#define PUD 2 -#define PSR2 1 -#define PSR10 0 - -/* TCCR0 */ -/* bits 7-3 reserved */ -#define CS02 2 -#define CS01 1 -#define CS00 0 - -/* TCCR2 */ -#define FOC2 7 -#define WGM20 6 -#define COM21 5 -#define COM20 4 -#define WGM21 3 -#define CS22 2 -#define CS21 1 -#define CS20 0 - -/* ASSR */ -/* bits 7-4 reserved */ -#define AS2 3 -#define TCN2UB 2 -#define OCR2UB 1 -#define TCR2UB 0 - -/* TCCR1A */ -#define COM1A1 7 -#define COM1A0 6 -#define COM1B1 5 -#define COM1B0 4 -#define FOC1A 3 -#define FOC1B 2 -#define WGM11 1 -#define WGM10 0 - -/* TCCR1B */ -#define ICNC1 7 -#define ICES1 6 -/* bit 5 reserved */ -#define WGM13 4 -#define WGM12 3 -#define CS12 2 -#define CS11 1 -#define CS10 0 - -/* WDTCR */ -/* bits 7-5 reserved */ -#define WDCE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -/* UBRRH */ -#define URSEL 7 - -/* UCSRC */ -#define URSEL 7 -#define UMSEL 6 -#define UPM1 5 -#define UPM0 4 -#define USBS 3 -#define UCSZ1 2 -#define UCSZ0 1 -#define UCPOL 0 - -/* PORTB */ -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -/* DDRB */ -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -/* PINB */ -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -/* PORTC */ -#define PC6 6 -#define PC5 5 -#define PC4 4 -#define PC3 3 -#define PC2 2 -#define PC1 1 -#define PC0 0 - -/* DDRC */ -#define DDC6 6 -#define DDC5 5 -#define DDC4 4 -#define DDC3 3 -#define DDC2 2 -#define DDC1 1 -#define DDC0 0 - -/* PINC */ -#define PINC6 6 -#define PINC5 5 -#define PINC4 4 -#define PINC3 3 -#define PINC2 2 -#define PINC1 1 -#define PINC0 0 - -/* PORTD */ -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -/* DDRD */ -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -/* PIND */ -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -/* SPSR */ -#define SPIF 7 -#define WCOL 6 -#define SPI2X 0 - -/* SPCR */ -#define SPIE 7 -#define SPE 6 -#define DORD 5 -#define MSTR 4 -#define CPOL 3 -#define CPHA 2 -#define SPR1 1 -#define SPR0 0 - -/* UCSRA */ -#define RXC 7 -#define TXC 6 -#define UDRE 5 -#define FE 4 -#define DOR 3 -#define PE 2 -#define U2X 1 -#define MPCM 0 - -/* UCSRB */ -#define RXCIE 7 -#define TXCIE 6 -#define UDRIE 5 -#define RXEN 4 -#define TXEN 3 -#define UCSZ2 2 -#define RXB8 1 -#define TXB8 0 - -/* ACSR */ -#define ACD 7 -#define ACBG 6 -#define ACO 5 -#define ACI 4 -#define ACIE 3 -#define ACIC 2 -#define ACIS1 1 -#define ACIS0 0 - -/* ADCSR / ADCSRA */ -#define ADEN 7 -#define ADSC 6 -#define ADFR 5 -#define ADIF 4 -#define ADIE 3 -#define ADPS2 2 -#define ADPS1 1 -#define ADPS0 0 - -/* ADMUX */ -#define REFS1 7 -#define REFS0 6 -#define ADLAR 5 -/* bit 4 reserved */ -#define MUX3 3 -#define MUX2 2 -#define MUX1 1 -#define MUX0 0 - -/* EEPROM Control Register */ -#define EERIE 3 -#define EEMWE 2 -#define EEWE 1 -#define EERE 0 - -/* Constants */ -#define SPM_PAGESIZE 64 -#define RAMEND 0x45F -#define XRAMEND 0x45F -#define E2END 0x1FF -#define E2PAGESIZE 4 -#define FLASHEND 0x1FFF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 2 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_BODEN (unsigned char)~_BV(6) -#define FUSE_BODLEVEL (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_SUT0 & FUSE_CKSEL3 & FUSE_CKSEL2 & FUSE_CKSEL1) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_CKOPT (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_WDTON (unsigned char)~_BV(6) -#define FUSE_RSTDISBL (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_SPIEN & FUSE_BOOTSZ1 & FUSE_BOOTSZ0) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x93 -#define SIGNATURE_2 0x07 - - -#endif /* _AVR_IOM8_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom8515.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom8515.h deleted file mode 100644 index 04663ae62..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom8515.h +++ /dev/null @@ -1,636 +0,0 @@ -/* Copyright (c) 2002, Steinar Haugen - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iom8515.h,v 1.10.2.5 2008/10/17 23:27:50 arcanum Exp $ */ - -/* avr/iom8515.h - definitions for ATmega8515 */ - -#ifndef _AVR_IOM8515_H_ -#define _AVR_IOM8515_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iom8515.h" -#else -# error "Attempt to include more than one file." -#endif - -/* I/O registers */ - -/* Oscillator Calibration Register */ -#define OSCCAL _SFR_IO8(0x04) - -/* Input Pins, Port E */ -#define PINE _SFR_IO8(0x05) - -/* Data Direction Register, Port E */ -#define DDRE _SFR_IO8(0x06) - -/* Data Register, Port E */ -#define PORTE _SFR_IO8(0x07) - -/* Analog Comparator Control and Status Register */ -#define ACSR _SFR_IO8(0x08) - -/* USART Baud Rate Register */ -#define UBRRL _SFR_IO8(0x09) - -/* USART Control and Status Register B */ -#define UCSRB _SFR_IO8(0x0A) - -/* USART Control and Status Register A */ -#define UCSRA _SFR_IO8(0x0B) - -/* USART I/O Data Register */ -#define UDR _SFR_IO8(0x0C) - -/* SPI Control Register */ -#define SPCR _SFR_IO8(0x0D) - -/* SPI Status Register */ -#define SPSR _SFR_IO8(0x0E) - -/* SPI I/O Data Register */ -#define SPDR _SFR_IO8(0x0F) - -/* Input Pins, Port D */ -#define PIND _SFR_IO8(0x10) - -/* Data Direction Register, Port D */ -#define DDRD _SFR_IO8(0x11) - -/* Data Register, Port D */ -#define PORTD _SFR_IO8(0x12) - -/* Input Pins, Port C */ -#define PINC _SFR_IO8(0x13) - -/* Data Direction Register, Port C */ -#define DDRC _SFR_IO8(0x14) - -/* Data Register, Port C */ -#define PORTC _SFR_IO8(0x15) - -/* Input Pins, Port B */ -#define PINB _SFR_IO8(0x16) - -/* Data Direction Register, Port B */ -#define DDRB _SFR_IO8(0x17) - -/* Data Register, Port B */ -#define PORTB _SFR_IO8(0x18) - -/* Input Pins, Port A */ -#define PINA _SFR_IO8(0x19) - -/* Data Direction Register, Port A */ -#define DDRA _SFR_IO8(0x1A) - -/* Data Register, Port A */ -#define PORTA _SFR_IO8(0x1B) - -/* EEPROM Control Register */ -#define EECR _SFR_IO8(0x1C) - -/* EEPROM Data Register */ -#define EEDR _SFR_IO8(0x1D) - -/* EEPROM Address Register */ -#define EEAR _SFR_IO16(0x1E) -#define EEARL _SFR_IO8(0x1E) -#define EEARH _SFR_IO8(0x1F) - -/* USART Baud Rate Register HI */ -/* USART Control and Status Register C */ -#define UBRRH _SFR_IO8(0x20) -#define UCSRC UBRRH - -/* Watchdog Timer Control Register */ -#define WDTCR _SFR_IO8(0x21) - -/* T/C 1 Input Capture Register */ -#define ICR1 _SFR_IO16(0x24) -#define ICR1L _SFR_IO8(0x24) -#define ICR1H _SFR_IO8(0x25) - -/* Timer/Counter1 Output Compare Register B */ -#define OCR1B _SFR_IO16(0x28) -#define OCR1BL _SFR_IO8(0x28) -#define OCR1BH _SFR_IO8(0x29) - -/* Timer/Counter1 Output Compare Register A */ -#define OCR1A _SFR_IO16(0x2A) -#define OCR1AL _SFR_IO8(0x2A) -#define OCR1AH _SFR_IO8(0x2B) - -/* Timer/Counter 1 */ -#define TCNT1 _SFR_IO16(0x2C) -#define TCNT1L _SFR_IO8(0x2C) -#define TCNT1H _SFR_IO8(0x2D) - -/* Timer/Counter 1 Control and Status Register */ -#define TCCR1B _SFR_IO8(0x2E) - -/* Timer/Counter 1 Control Register */ -#define TCCR1A _SFR_IO8(0x2F) - -/* Special Function IO Register */ -#define SFIOR _SFR_IO8(0x30) - -/* Timer/Counter 0 Output Compare Register */ -#define OCR0 _SFR_IO8(0x31) - -/* Timer/Counter 0 */ -#define TCNT0 _SFR_IO8(0x32) - -/* Timer/Counter 0 Control Register */ -#define TCCR0 _SFR_IO8(0x33) - -/* MCU Control and Status Register */ -#define MCUCSR _SFR_IO8(0x34) - -/* MCU Control Register */ -#define MCUCR _SFR_IO8(0x35) - -/* Extended MCU Control Register */ -#define EMCUCR _SFR_IO8(0x36) - -/* Store Program Memory Control Register */ -#define SPMCR _SFR_IO8(0x37) - -/* Timer/Counter Interrupt Flag register */ -#define TIFR _SFR_IO8(0x38) - -/* Timer/Counter Interrupt MaSK register */ -#define TIMSK _SFR_IO8(0x39) - -/* General Interrupt Flag Register */ -#define GIFR _SFR_IO8(0x3A) - -/* General Interrupt Control Register */ -#define GICR _SFR_IO8(0x3B) - -/* 0x3D..0x3E SP */ - -/* 0x3F SREG */ - -/* Interrupt vectors */ - -/* External Interrupt Request 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* External Interrupt Request 1 */ -#define INT1_vect _VECTOR(2) -#define SIG_INTERRUPT1 _VECTOR(2) - -/* Timer/Counter1 Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(3) -#define SIG_INPUT_CAPTURE1 _VECTOR(3) - -/* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPA_vect _VECTOR(4) -#define SIG_OUTPUT_COMPARE1A _VECTOR(4) - -/* Timer/Counter1 Compare MatchB */ -#define TIMER1_COMPB_vect _VECTOR(5) -#define SIG_OUTPUT_COMPARE1B _VECTOR(5) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(6) -#define SIG_OVERFLOW1 _VECTOR(6) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(7) -#define SIG_OVERFLOW0 _VECTOR(7) - -/* Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(8) -#define SIG_SPI _VECTOR(8) - -/* UART, Rx Complete */ -#define USART_RX_vect _VECTOR(9) -#define UART_RX_vect _VECTOR(9) /* For compatability only */ -#define SIG_UART_RECV _VECTOR(9) /* For compatability only */ - -/* UART Data Register Empty */ -#define USART_UDRE_vect _VECTOR(10) -#define UART_UDRE_vect _VECTOR(10) /* For compatability only */ -#define SIG_UART_DATA _VECTOR(10) /* For compatability only */ - -/* UART, Tx Complete */ -#define USART_TX_vect _VECTOR(11) -#define UART_TX_vect _VECTOR(11) /* For compatability only */ -#define SIG_UART_TRANS _VECTOR(11) /* For compatability only */ - -/* Analog Comparator */ -#define ANA_COMP_vect _VECTOR(12) -#define SIG_COMPARATOR _VECTOR(12) - -/* External Interrupt Request 2 */ -#define INT2_vect _VECTOR(13) -#define SIG_INTERRUPT2 _VECTOR(13) - -/* Timer 0 Compare Match */ -#define TIMER0_COMP_vect _VECTOR(14) -#define SIG_OUTPUT_COMPARE0 _VECTOR(14) - -/* EEPROM Ready */ -#define EE_RDY_vect _VECTOR(15) -#define SIG_EEPROM_READY _VECTOR(15) - -/* Store Program Memory Ready */ -#define SPM_RDY_vect _VECTOR(16) -#define SIG_SPM_READY _VECTOR(16) - -#define _VECTORS_SIZE 34 - -/* - The Register Bit names are represented by their bit number (0-7). -*/ - -/* General Interrupt Control Register */ -#define INT1 7 -#define INT0 6 -#define INT2 5 -#define IVSEL 1 -#define IVCE 0 - -/* General Interrupt Flag Register */ -#define INTF1 7 -#define INTF0 6 -#define INTF2 5 - -/* Timer/Counter Interrupt MaSK Register */ -#define TOIE1 7 -#define OCIE1A 6 -#define OCIE1B 5 -#define TICIE1 3 -#define TOIE0 1 -#define OCIE0 0 - -/* Timer/Counter Interrupt Flag Register */ -#define TOV1 7 -#define OCF1A 6 -#define OCF1B 5 -#define ICF1 3 -#define TOV0 1 -#define OCF0 0 - -/* Store Program Memory Control Register */ -#define SPMIE 7 -#define RWWSB 6 -#define RWWSRE 4 -#define BLBSET 3 -#define PGWRT 2 -#define PGERS 1 -#define SPMEN 0 - -/* Extended MCU Control Register */ -#define SM0 7 -#define SRL2 6 -#define SRL1 5 -#define SRL0 4 -#define SRW01 3 -#define SRW00 2 -#define SRW11 1 -#define ISC2 0 - -/* MCU Control Register */ -#define SRE 7 -#define SRW10 6 -#define SE 5 -#define SM1 4 -#define ISC11 3 -#define ISC10 2 -#define ISC01 1 -#define ISC00 0 - -/* MCU Control and Status Register */ -#define SM2 5 -#define WDRF 3 -#define BORF 2 -#define EXTRF 1 -#define PORF 0 - -/* Timer/Counter 0 Control Register */ -#define FOC0 7 -#define WGM00 6 -#define COM01 5 -#define COM00 4 -#define WGM01 3 -#define CS02 2 -#define CS01 1 -#define CS00 0 - -/* Special Function IO Register */ -#define XMBK 6 -#define XMM2 5 -#define XMM1 4 -#define XMM0 3 -#define PUD 2 -#define PSR10 0 - -/* Timer/Counter 1 Control Register */ -#define COM1A1 7 -#define COM1A0 6 -#define COM1B1 5 -#define COM1B0 4 -#define FOC1A 3 -#define FOC1B 2 -#define WGM11 1 -#define WGM10 0 - -/* Timer/Counter 1 Control and Status Register */ -#define ICNC1 7 -#define ICES1 6 -#define WGM13 4 -#define WGM12 3 -#define CS12 2 -#define CS11 1 -#define CS10 0 - -/* Watchdog Timer Control Register */ -#define WDCE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -/* USART Control and Status Register C */ -#define URSEL 7 -#define UMSEL 6 -#define UPM1 5 -#define UPM0 4 -#define USBS 3 -#define UCSZ1 2 -#define UCSZ0 1 -#define UCPOL 0 - -/* Data Register, Port A */ -#define PA7 7 -#define PA6 6 -#define PA5 5 -#define PA4 4 -#define PA3 3 -#define PA2 2 -#define PA1 1 -#define PA0 0 - -/* Data Direction Register, Port A */ -#define DDA7 7 -#define DDA6 6 -#define DDA5 5 -#define DDA4 4 -#define DDA3 3 -#define DDA2 2 -#define DDA1 1 -#define DDA0 0 - -/* Input Pins, Port A */ -#define PINA7 7 -#define PINA6 6 -#define PINA5 5 -#define PINA4 4 -#define PINA3 3 -#define PINA2 2 -#define PINA1 1 -#define PINA0 0 - -/* Data Register, Port B */ -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -/* Data Direction Register, Port B */ -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -/* Input Pins, Port B */ -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -/* Data Register, Port C */ -#define PC7 7 -#define PC6 6 -#define PC5 5 -#define PC4 4 -#define PC3 3 -#define PC2 2 -#define PC1 1 -#define PC0 0 - -/* Data Direction Register, Port C */ -#define DDC7 7 -#define DDC6 6 -#define DDC5 5 -#define DDC4 4 -#define DDC3 3 -#define DDC2 2 -#define DDC1 1 -#define DDC0 0 - -/* Input Pins, Port C */ -#define PINC7 7 -#define PINC6 6 -#define PINC5 5 -#define PINC4 4 -#define PINC3 3 -#define PINC2 2 -#define PINC1 1 -#define PINC0 0 - -/* Data Register, Port D */ -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -/* Data Direction Register, Port D */ -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -/* Input Pins, Port D */ -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -/* SPI Status Register */ -#define SPIF 7 -#define WCOL 6 -#define SPI2X 0 - -/* SPI Control Register */ -#define SPIE 7 -#define SPE 6 -#define DORD 5 -#define MSTR 4 -#define CPOL 3 -#define CPHA 2 -#define SPR1 1 -#define SPR0 0 - -/* USART Control and Status Register A */ -#define RXC 7 -#define TXC 6 -#define UDRE 5 -#define FE 4 -#define DOR 3 -#define PE 2 -#define U2X 1 -#define MPCM 0 - -/* USART Control and Status Register B */ -#define RXCIE 7 -#define TXCIE 6 -#define UDRIE 5 -#define RXEN 4 -#define TXEN 3 -#define UCSZ2 2 -#define RXB8 1 -#define TXB8 0 - -/* Analog Comparator Control and Status Register */ -#define ACD 7 -#define ACBG 6 -#define ACO 5 -#define ACI 4 -#define ACIE 3 -#define ACIC 2 -#define ACIS1 1 -#define ACIS0 0 - -/* Data Register, Port E */ -#define PE2 2 -#define PE1 1 -#define PE0 0 - -/* Data Direction Register, Port E */ -#define DDE2 2 -#define DDE1 1 -#define DDE0 0 - -/* Input Pins, Port E */ -#define PINE2 2 -#define PINE1 1 -#define PINE0 0 - -/* EEPROM Control Register */ -#define EERIE 3 -#define EEMWE 2 -#define EEWE 1 -#define EERE 0 - -/* Constants */ -#define SPM_PAGESIZE 64 -#define RAMEND 0x25F /* Last On-Chip SRAM Location */ -#define XRAMEND 0xFFFF -#define E2END 0x1FF -#define E2PAGESIZE 4 -#define FLASHEND 0x1FFF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 2 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_BODEN (unsigned char)~_BV(6) -#define FUSE_BODLEVEL (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL1 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_CKOPT (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_WDTON (unsigned char)~_BV(6) -#define FUSE_S8515C (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_SPIEN) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x93 -#define SIGNATURE_2 0x06 - - -#endif /* _AVR_IOM8515_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom8535.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom8535.h deleted file mode 100644 index 0a20da6f6..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom8535.h +++ /dev/null @@ -1,715 +0,0 @@ -/* Copyright (c) 2002, Steinar Haugen - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iom8535.h,v 1.11.2.5 2008/10/17 23:27:50 arcanum Exp $ */ - -/* avr/iom8535.h - definitions for ATmega8535 */ - -#ifndef _AVR_IOM8535_H_ -#define _AVR_IOM8535_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iom8535.h" -#else -# error "Attempt to include more than one file." -#endif - -/* I/O registers */ - -/* TWI stands for "Two Wire Interface" or "TWI Was I2C(tm)" */ -#define TWBR _SFR_IO8(0x00) -#define TWSR _SFR_IO8(0x01) -#define TWAR _SFR_IO8(0x02) -#define TWDR _SFR_IO8(0x03) - -/* ADC Data register */ -#ifndef __ASSEMBLER__ -#define ADC _SFR_IO16(0x04) -#endif -#define ADCW _SFR_IO16(0x04) -#define ADCL _SFR_IO8(0x04) -#define ADCH _SFR_IO8(0x05) - -/* ADC Control and Status Register */ -#define ADCSRA _SFR_IO8(0x06) - -/* ADC MUX */ -#define ADMUX _SFR_IO8(0x07) - -/* Analog Comparator Control and Status Register */ -#define ACSR _SFR_IO8(0x08) - -/* USART Baud Rate Register */ -#define UBRRL _SFR_IO8(0x09) - -/* USART Control and Status Register B */ -#define UCSRB _SFR_IO8(0x0A) - -/* USART Control and Status Register A */ -#define UCSRA _SFR_IO8(0x0B) - -/* USART I/O Data Register */ -#define UDR _SFR_IO8(0x0C) - -/* SPI Control Register */ -#define SPCR _SFR_IO8(0x0D) - -/* SPI Status Register */ -#define SPSR _SFR_IO8(0x0E) - -/* SPI I/O Data Register */ -#define SPDR _SFR_IO8(0x0F) - -/* Input Pins, Port D */ -#define PIND _SFR_IO8(0x10) - -/* Data Direction Register, Port D */ -#define DDRD _SFR_IO8(0x11) - -/* Data Register, Port D */ -#define PORTD _SFR_IO8(0x12) - -/* Input Pins, Port C */ -#define PINC _SFR_IO8(0x13) - -/* Data Direction Register, Port C */ -#define DDRC _SFR_IO8(0x14) - -/* Data Register, Port C */ -#define PORTC _SFR_IO8(0x15) - -/* Input Pins, Port B */ -#define PINB _SFR_IO8(0x16) - -/* Data Direction Register, Port B */ -#define DDRB _SFR_IO8(0x17) - -/* Data Register, Port B */ -#define PORTB _SFR_IO8(0x18) - -/* Input Pins, Port A */ -#define PINA _SFR_IO8(0x19) - -/* Data Direction Register, Port A */ -#define DDRA _SFR_IO8(0x1A) - -/* Data Register, Port A */ -#define PORTA _SFR_IO8(0x1B) - -/* EEPROM Control Register */ -#define EECR _SFR_IO8(0x1C) - -/* EEPROM Data Register */ -#define EEDR _SFR_IO8(0x1D) - -/* EEPROM Address Register */ -#define EEAR _SFR_IO16(0x1E) -#define EEARL _SFR_IO8(0x1E) -#define EEARH _SFR_IO8(0x1F) - -/* USART Baud Rate Register HI */ -/* USART Control and Status Register C */ -#define UBRRH _SFR_IO8(0x20) -#define UCSRC UBRRH - -/* Watchdog Timer Control Register */ -#define WDTCR _SFR_IO8(0x21) - -/* Asynchronous mode Status Register */ -#define ASSR _SFR_IO8(0x22) - -/* Timer/Counter2 Output Compare Register */ -#define OCR2 _SFR_IO8(0x23) - -/* Timer/Counter 2 */ -#define TCNT2 _SFR_IO8(0x24) - -/* Timer/Counter 2 Control Register */ -#define TCCR2 _SFR_IO8(0x25) - -/* T/C 1 Input Capture Register */ -#define ICR1 _SFR_IO16(0x26) -#define ICR1L _SFR_IO8(0x26) -#define ICR1H _SFR_IO8(0x27) - -/* Timer/Counter1 Output Compare Register B */ -#define OCR1B _SFR_IO16(0x28) -#define OCR1BL _SFR_IO8(0x28) -#define OCR1BH _SFR_IO8(0x29) - -/* Timer/Counter1 Output Compare Register A */ -#define OCR1A _SFR_IO16(0x2A) -#define OCR1AL _SFR_IO8(0x2A) -#define OCR1AH _SFR_IO8(0x2B) - -/* Timer/Counter 1 */ -#define TCNT1 _SFR_IO16(0x2C) -#define TCNT1L _SFR_IO8(0x2C) -#define TCNT1H _SFR_IO8(0x2D) - -/* Timer/Counter 1 Control and Status Register */ -#define TCCR1B _SFR_IO8(0x2E) - -/* Timer/Counter 1 Control Register */ -#define TCCR1A _SFR_IO8(0x2F) - -/* Special Function IO Register */ -#define SFIOR _SFR_IO8(0x30) - -/* Oscillator Calibration Register */ -#define OSCCAL _SFR_IO8(0x31) - -/* Timer/Counter 0 */ -#define TCNT0 _SFR_IO8(0x32) - -/* Timer/Counter 0 Control Register */ -#define TCCR0 _SFR_IO8(0x33) - -/* MCU Control and Status Register */ -#define MCUCSR _SFR_IO8(0x34) - -/* MCU Control Register */ -#define MCUCR _SFR_IO8(0x35) - -/* TWI Control Register */ -#define TWCR _SFR_IO8(0x36) - -/* Store Program Memory Control Register */ -#define SPMCR _SFR_IO8(0x37) - -/* Timer/Counter Interrupt Flag register */ -#define TIFR _SFR_IO8(0x38) - -/* Timer/Counter Interrupt MaSK register */ -#define TIMSK _SFR_IO8(0x39) - -/* General Interrupt Flag Register */ -#define GIFR _SFR_IO8(0x3A) - -/* General Interrupt MaSK register */ -#define GICR _SFR_IO8(0x3B) - -/* Timer/Counter 0 Output Compare Register */ -#define OCR0 _SFR_IO8(0x3C) - -/* 0x3D..0x3E SP */ - -/* 0x3F SREG */ - -/* Interrupt vectors */ - -/* External Interrupt 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* External Interrupt 1 */ -#define INT1_vect _VECTOR(2) -#define SIG_INTERRUPT1 _VECTOR(2) - -/* Timer/Counter2 Compare Match */ -#define TIMER2_COMP_vect _VECTOR(3) -#define SIG_OUTPUT_COMPARE2 _VECTOR(3) - -/* Timer/Counter2 Overflow */ -#define TIMER2_OVF_vect _VECTOR(4) -#define SIG_OVERFLOW2 _VECTOR(4) - -/* Timer/Counter1 Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(5) -#define SIG_INPUT_CAPTURE1 _VECTOR(5) - -/* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPA_vect _VECTOR(6) -#define SIG_OUTPUT_COMPARE1A _VECTOR(6) - -/* Timer/Counter1 Compare Match B */ -#define TIMER1_COMPB_vect _VECTOR(7) -#define SIG_OUTPUT_COMPARE1B _VECTOR(7) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(8) -#define SIG_OVERFLOW1 _VECTOR(8) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(9) -#define SIG_OVERFLOW0 _VECTOR(9) - -/* SPI Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(10) -#define SIG_SPI _VECTOR(10) - -/* USART, RX Complete */ -#define USART_RX_vect _VECTOR(11) -#define SIG_UART_RECV _VECTOR(11) - -/* USART Data Register Empty */ -#define USART_UDRE_vect _VECTOR(12) -#define SIG_UART_DATA _VECTOR(12) - -/* USART, TX Complete */ -#define USART_TX_vect _VECTOR(13) -#define SIG_UART_TRANS _VECTOR(13) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(14) -#define SIG_ADC _VECTOR(14) - -/* EEPROM Ready */ -#define EE_RDY_vect _VECTOR(15) -#define SIG_EEPROM_READY _VECTOR(15) - -/* Analog Comparator */ -#define ANA_COMP_vect _VECTOR(16) -#define SIG_COMPARATOR _VECTOR(16) - -/* Two-wire Serial Interface */ -#define TWI_vect _VECTOR(17) -#define SIG_2WIRE_SERIAL _VECTOR(17) - -/* External Interrupt Request 2 */ -#define INT2_vect _VECTOR(18) -#define SIG_INTERRUPT2 _VECTOR(18) - -/* TimerCounter0 Compare Match */ -#define TIMER0_COMP_vect _VECTOR(19) -#define SIG_OUTPUT_COMPARE0 _VECTOR(19) - -/* Store Program Memory Read */ -#define SPM_RDY_vect _VECTOR(20) -#define SIG_SPM_READY _VECTOR(20) - -#define _VECTORS_SIZE 42 - -/* - The Register Bit names are represented by their bit number (0-7). -*/ - -/* General Interrupt Control Register */ -#define INT1 7 -#define INT0 6 -#define INT2 5 -#define IVSEL 1 -#define IVCE 0 - -/* General Interrupt Flag Register */ -#define INTF1 7 -#define INTF0 6 -#define INTF2 5 - -/* Timer/Counter Interrupt MaSK register */ -#define OCIE2 7 -#define TOIE2 6 -#define TICIE1 5 -#define OCIE1A 4 -#define OCIE1B 3 -#define TOIE1 2 -#define OCIE0 1 -#define TOIE0 0 - -/* Timer/Counter Interrupt Flag register */ -#define OCF2 7 -#define TOV2 6 -#define ICF1 5 -#define OCF1A 4 -#define OCF1B 3 -#define TOV1 2 -#define OCF0 1 -#define TOV0 0 - -/* Store Program Memory Control Register */ -#define SPMIE 7 -#define RWWSB 6 -#define RWWSRE 4 -#define BLBSET 3 -#define PGWRT 2 -#define PGERS 1 -#define SPMEN 0 - -/* TWI Control Register */ -#define TWINT 7 -#define TWEA 6 -#define TWSTA 5 -#define TWSTO 4 -#define TWWC 3 -#define TWEN 2 -#define TWIE 0 - -/* MCU Control Register */ -#define SM2 7 -#define SE 6 -#define SM1 5 -#define SM0 4 -#define ISC11 3 -#define ISC10 2 -#define ISC01 1 -#define ISC00 0 - -/* MCU Control and Status Register */ -#define ISC2 6 -#define WDRF 3 -#define BORF 2 -#define EXTRF 1 -#define PORF 0 - -/* Timer/Counter 0 Control Register */ -#define FOC0 7 -#define WGM00 6 -#define COM01 5 -#define COM00 4 -#define WGM01 3 -#define CS02 2 -#define CS01 1 -#define CS00 0 - -/* - The ADHSM bit has been removed from all documentation, - as being not needed at all since the comparator has proven - to be fast enough even without feeding it more power. -*/ - -/* Special Function IO Register */ -#define ADTS2 7 -#define ADTS1 6 -#define ADTS0 5 -#define ACME 3 -#define PUD 2 -#define PSR2 1 -#define PSR10 0 - -/* Timer/Counter 1 Control Register */ -#define COM1A1 7 -#define COM1A0 6 -#define COM1B1 5 -#define COM1B0 4 -#define FOC1A 3 -#define FOC1B 2 -#define WGM11 1 -#define WGM10 0 - -/* Timer/Counter 1 Control and Status Register */ -#define ICNC1 7 -#define ICES1 6 -#define WGM13 4 -#define WGM12 3 -#define CS12 2 -#define CS11 1 -#define CS10 0 - -/* Timer/Counter 2 Control Register */ -#define FOC2 7 -#define WGM20 6 -#define COM21 5 -#define COM20 4 -#define WGM21 3 -#define CS22 2 -#define CS21 1 -#define CS20 0 - -/* Asynchronous mode Status Register */ -#define AS2 3 -#define TCN2UB 2 -#define OCR2UB 1 -#define TCR2UB 0 - -/* Watchdog Timer Control Register */ -#define WDCE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -/* USART Control and Status Register C */ -#define URSEL 7 -#define UMSEL 6 -#define UPM1 5 -#define UPM0 4 -#define USBS 3 -#define UCSZ1 2 -#define UCSZ0 1 -#define UCPOL 0 - -/* Data Register, Port A */ -#define PA7 7 -#define PA6 6 -#define PA5 5 -#define PA4 4 -#define PA3 3 -#define PA2 2 -#define PA1 1 -#define PA0 0 - -/* Data Direction Register, Port A */ -#define DDA7 7 -#define DDA6 6 -#define DDA5 5 -#define DDA4 4 -#define DDA3 3 -#define DDA2 2 -#define DDA1 1 -#define DDA0 0 - -/* Input Pins, Port A */ -#define PINA7 7 -#define PINA6 6 -#define PINA5 5 -#define PINA4 4 -#define PINA3 3 -#define PINA2 2 -#define PINA1 1 -#define PINA0 0 - -/* Data Register, Port B */ -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -/* Data Direction Register, Port B */ -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -/* Input Pins, Port B */ -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -/* Data Register, Port C */ -#define PC7 7 -#define PC6 6 -#define PC5 5 -#define PC4 4 -#define PC3 3 -#define PC2 2 -#define PC1 1 -#define PC0 0 - -/* Data Direction Register, Port C */ -#define DDC7 7 -#define DDC6 6 -#define DDC5 5 -#define DDC4 4 -#define DDC3 3 -#define DDC2 2 -#define DDC1 1 -#define DDC0 0 - -/* Input Pins, Port C */ -#define PINC7 7 -#define PINC6 6 -#define PINC5 5 -#define PINC4 4 -#define PINC3 3 -#define PINC2 2 -#define PINC1 1 -#define PINC0 0 - -/* Data Register, Port D */ -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -/* Data Direction Register, Port D */ -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -/* Input Pins, Port D */ -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -/* SPI Status Register */ -#define SPIF 7 -#define WCOL 6 -#define SPI2X 0 - -/* SPI Control Register */ -#define SPIE 7 -#define SPE 6 -#define DORD 5 -#define MSTR 4 -#define CPOL 3 -#define CPHA 2 -#define SPR1 1 -#define SPR0 0 - -/* USART Control and Status Register A */ -#define RXC 7 -#define TXC 6 -#define UDRE 5 -#define FE 4 -#define DOR 3 -#define PE 2 -#define U2X 1 -#define MPCM 0 - -/* USART Control and Status Register B */ -#define RXCIE 7 -#define TXCIE 6 -#define UDRIE 5 -#define RXEN 4 -#define TXEN 3 -#define UCSZ2 2 -#define RXB8 1 -#define TXB8 0 - -/* Analog Comparator Control and Status Register */ -#define ACD 7 -#define ACBG 6 -#define ACO 5 -#define ACI 4 -#define ACIE 3 -#define ACIC 2 -#define ACIS1 1 -#define ACIS0 0 - -/* ADC Multiplexer Selection Register */ -#define REFS1 7 -#define REFS0 6 -#define ADLAR 5 -#define MUX4 4 -#define MUX3 3 -#define MUX2 2 -#define MUX1 1 -#define MUX0 0 - -/* ADC Control and Status Register */ -#define ADEN 7 -#define ADSC 6 -#define ADATE 5 -#define ADIF 4 -#define ADIE 3 -#define ADPS2 2 -#define ADPS1 1 -#define ADPS0 0 - -/* TWI (Slave) Address Register */ -#define TWGCE 0 - -/* TWI Status Register */ -#define TWS7 7 -#define TWS6 6 -#define TWS5 5 -#define TWS4 4 -#define TWS3 3 -#define TWPS1 1 -#define TWPS0 0 - -/* EEPROM Control Register */ -#define EERIE 3 -#define EEMWE 2 -#define EEWE 1 -#define EERE 0 - -/* Constants */ -#define SPM_PAGESIZE 64 -#define RAMEND 0x25F /* Last On-Chip SRAM Location */ -#define XRAMEND 0x25F -#define E2END 0x1FF -#define E2PAGESIZE 4 -#define FLASHEND 0x1FFF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 2 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_BODEN (unsigned char)~_BV(6) -#define FUSE_BODLEVEL (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL1 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_SUT1) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_CKOPT (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_WDTON (unsigned char)~_BV(6) -#define FUSE_S8535C (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_SPIEN) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x93 -#define SIGNATURE_2 0x08 - - -#endif /* _AVR_IOM8535_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom88.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom88.h deleted file mode 100644 index 32e93063d..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom88.h +++ /dev/null @@ -1,91 +0,0 @@ -/* Copyright (c) 2004, Theodore A. Roth - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iom88.h,v 1.4.2.5 2008/10/17 23:27:50 arcanum Exp $ */ - -#ifndef _AVR_IOM88_H_ -#define _AVR_IOM88_H_ 1 - -#include - -/* Constants */ -#define SPM_PAGESIZE 64 -#define RAMEND 0x4FF -#define XRAMEND 0x4FF -#define E2END 0x1FF -#define E2PAGESIZE 4 -#define FLASHEND 0x1FFF - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) /* Select Clock Source */ -#define FUSE_CKSEL1 (unsigned char)~_BV(1) /* Select Clock Source */ -#define FUSE_CKSEL2 (unsigned char)~_BV(2) /* Select Clock Source */ -#define FUSE_CKSEL3 (unsigned char)~_BV(3) /* Select Clock Source */ -#define FUSE_SUT0 (unsigned char)~_BV(4) /* Select start-up time */ -#define FUSE_SUT1 (unsigned char)~_BV(5) /* Select start-up time */ -#define FUSE_CKOUT (unsigned char)~_BV(6) /* Clock output */ -#define FUSE_CKDIV8 (unsigned char)~_BV(7) /* Divide clock by 8 */ -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) /* Brown-out Detector trigger level */ -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) /* Brown-out Detector trigger level */ -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) /* Brown-out Detector trigger level */ -#define FUSE_EESAVE (unsigned char)~_BV(3) /* EEPROM memory is preserved through chip erase */ -#define FUSE_WDTON (unsigned char)~_BV(4) /* Watchdog Timer Always On */ -#define FUSE_SPIEN (unsigned char)~_BV(5) /* Enable Serial programming and Data Downloading */ -#define FUSE_DWEN (unsigned char)~_BV(6) /* debugWIRE Enable */ -#define FUSE_RSTDISBL (unsigned char)~_BV(7) /* External reset disable */ -#define HFUSE_DEFAULT (FUSE_SPIEN) - -/* Extended Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define EFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x93 -#define SIGNATURE_2 0x0A - - -#endif /* _AVR_IOM88_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom88p.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom88p.h deleted file mode 100644 index ed3ab1524..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom88p.h +++ /dev/null @@ -1,874 +0,0 @@ -/* Copyright (c) 2007 Atmel Corporation - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. -*/ - -/* $Id: iom88p.h,v 1.3.2.11 2008/10/17 23:27:51 arcanum Exp $ */ - -/* avr/iom88p.h - definitions for ATmega88P. */ - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iom88p.h" -#else -# error "Attempt to include more than one file." -#endif - - -#ifndef _AVR_IOM88P_H_ -#define _AVR_IOM88P_H_ 1 - -/* Registers and associated bit numbers */ - -#define PINB _SFR_IO8(0x03) -#define PINB0 0 -#define PINB1 1 -#define PINB2 2 -#define PINB3 3 -#define PINB4 4 -#define PINB5 5 -#define PINB6 6 -#define PINB7 7 - -#define DDRB _SFR_IO8(0x04) -#define DDB0 0 -#define DDB1 1 -#define DDB2 2 -#define DDB3 3 -#define DDB4 4 -#define DDB5 5 -#define DDB6 6 -#define DDB7 7 - -#define PORTB _SFR_IO8(0x05) -#define PORTB0 0 -#define PORTB1 1 -#define PORTB2 2 -#define PORTB3 3 -#define PORTB4 4 -#define PORTB5 5 -#define PORTB6 6 -#define PORTB7 7 - -#define PINC _SFR_IO8(0x06) -#define PINC0 0 -#define PINC1 1 -#define PINC2 2 -#define PINC3 3 -#define PINC4 4 -#define PINC5 5 -#define PINC6 6 - -#define DDRC _SFR_IO8(0x07) -#define DDC0 0 -#define DDC1 1 -#define DDC2 2 -#define DDC3 3 -#define DDC4 4 -#define DDC5 5 -#define DDC6 6 - -#define PORTC _SFR_IO8(0x08) -#define PORTC0 0 -#define PORTC1 1 -#define PORTC2 2 -#define PORTC3 3 -#define PORTC4 4 -#define PORTC5 5 -#define PORTC6 6 - -#define PIND _SFR_IO8(0x09) -#define PIND0 0 -#define PIND1 1 -#define PIND2 2 -#define PIND3 3 -#define PIND4 4 -#define PIND5 5 -#define PIND6 6 -#define PIND7 7 - -#define DDRD _SFR_IO8(0x0A) -#define DDD0 0 -#define DDD1 1 -#define DDD2 2 -#define DDD3 3 -#define DDD4 4 -#define DDD5 5 -#define DDD6 6 -#define DDD7 7 - -#define PORTD _SFR_IO8(0x0B) -#define PORTD0 0 -#define PORTD1 1 -#define PORTD2 2 -#define PORTD3 3 -#define PORTD4 4 -#define PORTD5 5 -#define PORTD6 6 -#define PORTD7 7 - -#define TIFR0 _SFR_IO8(0x15) -#define TOV0 0 -#define OCF0A 1 -#define OCF0B 2 - -#define TIFR1 _SFR_IO8(0x16) -#define TOV1 0 -#define OCF1A 1 -#define OCF1B 2 -#define ICF1 5 - -#define TIFR2 _SFR_IO8(0x17) -#define TOV2 0 -#define OCF2A 1 -#define OCF2B 2 - -#define PCIFR _SFR_IO8(0x1B) -#define PCIF0 0 -#define PCIF1 1 -#define PCIF2 2 - -#define EIFR _SFR_IO8(0x1C) -#define INTF0 0 -#define INTF1 1 - -#define EIMSK _SFR_IO8(0x1D) -#define INT0 0 -#define INT1 1 - -#define GPIOR0 _SFR_IO8(0x1E) -#define GPIOR00 0 -#define GPIOR01 1 -#define GPIOR02 2 -#define GPIOR03 3 -#define GPIOR04 4 -#define GPIOR05 5 -#define GPIOR06 6 -#define GPIOR07 7 - -#define EECR _SFR_IO8(0x1F) -#define EERE 0 -#define EEPE 1 -#define EEMPE 2 -#define EERIE 3 -#define EEPM0 4 -#define EEPM1 5 - -#define EEDR _SFR_IO8(0x20) -#define EEDR0 0 -#define EEDR1 1 -#define EEDR2 2 -#define EEDR3 3 -#define EEDR4 4 -#define EEDR5 5 -#define EEDR6 6 -#define EEDR7 7 - -#define EEAR _SFR_IO16(0x21) - -#define EEARL _SFR_IO8(0x21) -#define EEAR0 0 -#define EEAR1 1 -#define EEAR2 2 -#define EEAR3 3 -#define EEAR4 4 -#define EEAR5 5 -#define EEAR6 6 -#define EEAR7 7 - -#define EEARH _SFR_IO8(0x22) -#define EEAR8 0 - -#define EEPROM_REG_LOCATIONS 1F2021 - -#define GTCCR _SFR_IO8(0x23) -#define PSRSYNC 0 -#define PSRASY 1 -#define TSM 7 - -#define TCCR0A _SFR_IO8(0x24) -#define WGM00 0 -#define WGM01 1 -#define COM0B0 4 -#define COM0B1 5 -#define COM0A0 6 -#define COM0A1 7 - -#define TCCR0B _SFR_IO8(0x25) -#define CS00 0 -#define CS01 1 -#define CS02 2 -#define WGM02 3 -#define FOC0B 6 -#define FOC0A 7 - -#define TCNT0 _SFR_IO8(0x26) -#define TCNT0_0 0 -#define TCNT0_1 1 -#define TCNT0_2 2 -#define TCNT0_3 3 -#define TCNT0_4 4 -#define TCNT0_5 5 -#define TCNT0_6 6 -#define TCNT0_7 7 - -#define OCR0A _SFR_IO8(0x27) -#define OCROA_0 0 -#define OCROA_1 1 -#define OCROA_2 2 -#define OCROA_3 3 -#define OCROA_4 4 -#define OCROA_5 5 -#define OCROA_6 6 -#define OCROA_7 7 - -#define OCR0B _SFR_IO8(0x28) -#define OCR0B_0 0 -#define OCR0B_1 1 -#define OCR0B_2 2 -#define OCR0B_3 3 -#define OCR0B_4 4 -#define OCR0B_5 5 -#define OCR0B_6 6 -#define OCR0B_7 7 - -#define GPIOR1 _SFR_IO8(0x2A) -#define GPIOR10 0 -#define GPIOR11 1 -#define GPIOR12 2 -#define GPIOR13 3 -#define GPIOR14 4 -#define GPIOR15 5 -#define GPIOR16 6 -#define GPIOR17 7 - -#define GPIOR2 _SFR_IO8(0x2B) -#define GPIOR20 0 -#define GPIOR21 1 -#define GPIOR22 2 -#define GPIOR23 3 -#define GPIOR24 4 -#define GPIOR25 5 -#define GPIOR26 6 -#define GPIOR27 7 - -#define SPCR _SFR_IO8(0x2C) -#define SPR0 0 -#define SPR1 1 -#define CPHA 2 -#define CPOL 3 -#define MSTR 4 -#define DORD 5 -#define SPE 6 -#define SPIE 7 - -#define SPSR _SFR_IO8(0x2D) -#define SPI2X 0 -#define WCOL 6 -#define SPIF 7 - -#define SPDR _SFR_IO8(0x2E) -#define SPDR0 0 -#define SPDR1 1 -#define SPDR2 2 -#define SPDR3 3 -#define SPDR4 4 -#define SPDR5 5 -#define SPDR6 6 -#define SPDR7 7 - -#define ACSR _SFR_IO8(0x30) -#define ACIS0 0 -#define ACIS1 1 -#define ACIC 2 -#define ACIE 3 -#define ACI 4 -#define ACO 5 -#define ACBG 6 -#define ACD 7 - -#define SMCR _SFR_IO8(0x33) -#define SE 0 -#define SM0 1 -#define SM1 2 -#define SM2 3 - -#define MCUSR _SFR_IO8(0x34) -#define PORF 0 -#define EXTRF 1 -#define BORF 2 -#define WDRF 3 - -#define MCUCR _SFR_IO8(0x35) -#define IVCE 0 -#define IVSEL 1 -#define PUD 4 -#define BODSE 5 -#define BODS 6 - -#define SPMCSR _SFR_IO8(0x37) -#define SELFPRGEN 0 -#define PGERS 1 -#define PGWRT 2 -#define BLBSET 3 -#define RWWSRE 4 -#define RWWSB 6 -#define SPMIE 7 - -#define WDTCSR _SFR_MEM8(0x60) -#define WDP0 0 -#define WDP1 1 -#define WDP2 2 -#define WDE 3 -#define WDCE 4 -#define WDP3 5 -#define WDIE 6 -#define WDIF 7 - -#define CLKPR _SFR_MEM8(0x61) -#define CLKPS0 0 -#define CLKPS1 1 -#define CLKPS2 2 -#define CLKPS3 3 -#define CLKPCE 7 - -#define PRR _SFR_MEM8(0x64) -#define PRADC 0 -#define PRUSART0 1 -#define PRSPI 2 -#define PRTIM1 3 -#define PRTIM0 5 -#define PRTIM2 6 -#define PRTWI 7 - -#define OSCCAL _SFR_MEM8(0x66) -#define CAL0 0 -#define CAL1 1 -#define CAL2 2 -#define CAL3 3 -#define CAL4 4 -#define CAL5 5 -#define CAL6 6 -#define CAL7 7 - -#define PCICR _SFR_MEM8(0x68) -#define PCIE0 0 -#define PCIE1 1 -#define PCIE2 2 - -#define EICRA _SFR_MEM8(0x69) -#define ISC00 0 -#define ISC01 1 -#define ISC10 2 -#define ISC11 3 - -#define PCMSK0 _SFR_MEM8(0x6B) -#define PCINT0 0 -#define PCINT1 1 -#define PCINT2 2 -#define PCINT3 3 -#define PCINT4 4 -#define PCINT5 5 -#define PCINT6 6 -#define PCINT7 7 - -#define PCMSK1 _SFR_MEM8(0x6C) -#define PCINT8 0 -#define PCINT9 1 -#define PCINT10 2 -#define PCINT11 3 -#define PCINT12 4 -#define PCINT13 5 -#define PCINT14 6 - -#define PCMSK2 _SFR_MEM8(0x6D) -#define PCINT16 0 -#define PCINT17 1 -#define PCINT18 2 -#define PCINT19 3 -#define PCINT20 4 -#define PCINT21 5 -#define PCINT22 6 -#define PCINT23 7 - -#define TIMSK0 _SFR_MEM8(0x6E) -#define TOIE0 0 -#define OCIE0A 1 -#define OCIE0B 2 - -#define TIMSK1 _SFR_MEM8(0x6F) -#define TOIE1 0 -#define OCIE1A 1 -#define OCIE1B 2 -#define ICIE1 5 - -#define TIMSK2 _SFR_MEM8(0x70) -#define TOIE2 0 -#define OCIE2A 1 -#define OCIE2B 2 - -#ifndef __ASSEMBLER__ -#define ADC _SFR_MEM16(0x78) -#endif -#define ADCW _SFR_MEM16(0x78) - -#define ADCL _SFR_MEM8(0x78) -#define ADCL0 0 -#define ADCL1 1 -#define ADCL2 2 -#define ADCL3 3 -#define ADCL4 4 -#define ADCL5 5 -#define ADCL6 6 -#define ADCL7 7 - -#define ADCH _SFR_MEM8(0x79) -#define ADCH0 0 -#define ADCH1 1 -#define ADCH2 2 -#define ADCH3 3 -#define ADCH4 4 -#define ADCH5 5 -#define ADCH6 6 -#define ADCH7 7 - -#define ADCSRA _SFR_MEM8(0x7A) -#define ADPS0 0 -#define ADPS1 1 -#define ADPS2 2 -#define ADIE 3 -#define ADIF 4 -#define ADATE 5 -#define ADSC 6 -#define ADEN 7 - -#define ADCSRB _SFR_MEM8(0x7B) -#define ADTS0 0 -#define ADTS1 1 -#define ADTS2 2 -#define ACME 6 - -#define ADMUX _SFR_MEM8(0x7C) -#define MUX0 0 -#define MUX1 1 -#define MUX2 2 -#define MUX3 3 -#define ADLAR 5 -#define REFS0 6 -#define REFS1 7 - -#define DIDR0 _SFR_MEM8(0x7E) -#define ADC0D 0 -#define ADC1D 1 -#define ADC2D 2 -#define ADC3D 3 -#define ADC4D 4 -#define ADC5D 5 - -#define DIDR1 _SFR_MEM8(0x7F) -#define AIN0D 0 -#define AIN1D 1 - -#define TCCR1A _SFR_MEM8(0x80) -#define WGM10 0 -#define WGM11 1 -#define COM1B0 4 -#define COM1B1 5 -#define COM1A0 6 -#define COM1A1 7 - -#define TCCR1B _SFR_MEM8(0x81) -#define CS10 0 -#define CS11 1 -#define CS12 2 -#define WGM12 3 -#define WGM13 4 -#define ICES1 6 -#define ICNC1 7 - -#define TCCR1C _SFR_MEM8(0x82) -#define FOC1B 6 -#define FOC1A 7 - -#define TCNT1 _SFR_MEM16(0x84) - -#define TCNT1L _SFR_MEM8(0x84) -#define TCNT1L0 0 -#define TCNT1L1 1 -#define TCNT1L2 2 -#define TCNT1L3 3 -#define TCNT1L4 4 -#define TCNT1L5 5 -#define TCNT1L6 6 -#define TCNT1L7 7 - -#define TCNT1H _SFR_MEM8(0x85) -#define TCNT1H0 0 -#define TCNT1H1 1 -#define TCNT1H2 2 -#define TCNT1H3 3 -#define TCNT1H4 4 -#define TCNT1H5 5 -#define TCNT1H6 6 -#define TCNT1H7 7 - -#define ICR1 _SFR_MEM16(0x86) - -#define ICR1L _SFR_MEM8(0x86) -#define ICR1L0 0 -#define ICR1L1 1 -#define ICR1L2 2 -#define ICR1L3 3 -#define ICR1L4 4 -#define ICR1L5 5 -#define ICR1L6 6 -#define ICR1L7 7 - -#define ICR1H _SFR_MEM8(0x87) -#define ICR1H0 0 -#define ICR1H1 1 -#define ICR1H2 2 -#define ICR1H3 3 -#define ICR1H4 4 -#define ICR1H5 5 -#define ICR1H6 6 -#define ICR1H7 7 - -#define OCR1A _SFR_MEM16(0x88) - -#define OCR1AL _SFR_MEM8(0x88) -#define OCR1AL0 0 -#define OCR1AL1 1 -#define OCR1AL2 2 -#define OCR1AL3 3 -#define OCR1AL4 4 -#define OCR1AL5 5 -#define OCR1AL6 6 -#define OCR1AL7 7 - -#define OCR1AH _SFR_MEM8(0x89) -#define OCR1AH0 0 -#define OCR1AH1 1 -#define OCR1AH2 2 -#define OCR1AH3 3 -#define OCR1AH4 4 -#define OCR1AH5 5 -#define OCR1AH6 6 -#define OCR1AH7 7 - -#define OCR1B _SFR_MEM16(0x8A) - -#define OCR1BL _SFR_MEM8(0x8A) -#define OCR1BL0 0 -#define OCR1BL1 1 -#define OCR1BL2 2 -#define OCR1BL3 3 -#define OCR1BL4 4 -#define OCR1BL5 5 -#define OCR1BL6 6 -#define OCR1BL7 7 - -#define OCR1BH _SFR_MEM8(0x8B) -#define OCR1BH0 0 -#define OCR1BH1 1 -#define OCR1BH2 2 -#define OCR1BH3 3 -#define OCR1BH4 4 -#define OCR1BH5 5 -#define OCR1BH6 6 -#define OCR1BH7 7 - -#define TCCR2A _SFR_MEM8(0xB0) -#define WGM20 0 -#define WGM21 1 -#define COM2B0 4 -#define COM2B1 5 -#define COM2A0 6 -#define COM2A1 7 - -#define TCCR2B _SFR_MEM8(0xB1) -#define CS20 0 -#define CS21 1 -#define CS22 2 -#define WGM22 3 -#define FOC2B 6 -#define FOC2A 7 - -#define TCNT2 _SFR_MEM8(0xB2) -#define TCNT2_0 0 -#define TCNT2_1 1 -#define TCNT2_2 2 -#define TCNT2_3 3 -#define TCNT2_4 4 -#define TCNT2_5 5 -#define TCNT2_6 6 -#define TCNT2_7 7 - -#define OCR2A _SFR_MEM8(0xB3) -#define OCR2_0 0 -#define OCR2_1 1 -#define OCR2_2 2 -#define OCR2_3 3 -#define OCR2_4 4 -#define OCR2_5 5 -#define OCR2_6 6 -#define OCR2_7 7 - -#define OCR2B _SFR_MEM8(0xB4) -#define OCR2_0 0 -#define OCR2_1 1 -#define OCR2_2 2 -#define OCR2_3 3 -#define OCR2_4 4 -#define OCR2_5 5 -#define OCR2_6 6 -#define OCR2_7 7 - -#define ASSR _SFR_MEM8(0xB6) -#define TCR2BUB 0 -#define TCR2AUB 1 -#define OCR2BUB 2 -#define OCR2AUB 3 -#define TCN2UB 4 -#define AS2 5 -#define EXCLK 6 - -#define TWBR _SFR_MEM8(0xB8) -#define TWBR0 0 -#define TWBR1 1 -#define TWBR2 2 -#define TWBR3 3 -#define TWBR4 4 -#define TWBR5 5 -#define TWBR6 6 -#define TWBR7 7 - -#define TWSR _SFR_MEM8(0xB9) -#define TWPS0 0 -#define TWPS1 1 -#define TWS3 3 -#define TWS4 4 -#define TWS5 5 -#define TWS6 6 -#define TWS7 7 - -#define TWAR _SFR_MEM8(0xBA) -#define TWGCE 0 -#define TWA0 1 -#define TWA1 2 -#define TWA2 3 -#define TWA3 4 -#define TWA4 5 -#define TWA5 6 -#define TWA6 7 - -#define TWDR _SFR_MEM8(0xBB) -#define TWD0 0 -#define TWD1 1 -#define TWD2 2 -#define TWD3 3 -#define TWD4 4 -#define TWD5 5 -#define TWD6 6 -#define TWD7 7 - -#define TWCR _SFR_MEM8(0xBC) -#define TWIE 0 -#define TWEN 2 -#define TWWC 3 -#define TWSTO 4 -#define TWSTA 5 -#define TWEA 6 -#define TWINT 7 - -#define TWAMR _SFR_MEM8(0xBD) -#define TWAM0 0 -#define TWAM1 1 -#define TWAM2 2 -#define TWAM3 3 -#define TWAM4 4 -#define TWAM5 5 -#define TWAM6 6 - -#define UCSR0A _SFR_MEM8(0xC0) -#define MPCM0 0 -#define U2X0 1 -#define UPE0 2 -#define DOR0 3 -#define FE0 4 -#define UDRE0 5 -#define TXC0 6 -#define RXC0 7 - -#define UCSR0B _SFR_MEM8(0xC1) -#define TXB80 0 -#define RXB80 1 -#define UCSZ02 2 -#define TXEN0 3 -#define RXEN0 4 -#define UDRIE0 5 -#define TXCIE0 6 -#define RXCIE0 7 - -#define UCSR0C _SFR_MEM8(0xC2) -#define UCPOL0 0 -#define UCSZ00 1 -#define UCPHA0 1 -#define UCSZ01 2 -#define UDORD0 2 -#define USBS0 3 -#define UPM00 4 -#define UPM01 5 -#define UMSEL00 6 -#define UMSEL01 7 - -#define UBRR0 _SFR_MEM16(0xC4) - -#define UBRR0L _SFR_MEM8(0xC4) -#define UBRR0_0 0 -#define UBRR0_1 1 -#define UBRR0_2 2 -#define UBRR0_3 3 -#define UBRR0_4 4 -#define UBRR0_5 5 -#define UBRR0_6 6 -#define UBRR0_7 7 - -#define UBRR0H _SFR_MEM8(0xC5) -#define UBRR0_8 0 -#define UBRR0_9 1 -#define UBRR0_10 2 -#define UBRR0_11 3 - -#define UDR0 _SFR_MEM8(0xC6) -#define UDR0_0 0 -#define UDR0_1 1 -#define UDR0_2 2 -#define UDR0_3 3 -#define UDR0_4 4 -#define UDR0_5 5 -#define UDR0_6 6 -#define UDR0_7 7 - - - -/* Interrupt Vectors */ -/* Interrupt Vector 0 is the reset vector. */ -#define INT0_vect _VECTOR(1) /* External Interrupt Request 0 */ -#define INT1_vect _VECTOR(2) /* External Interrupt Request 1 */ -#define PCINT0_vect _VECTOR(3) /* Pin Change Interrupt Request 0 */ -#define PCINT1_vect _VECTOR(4) /* Pin Change Interrupt Request 0 */ -#define PCINT2_vect _VECTOR(5) /* Pin Change Interrupt Request 1 */ -#define WDT_vect _VECTOR(6) /* Watchdog Time-out Interrupt */ -#define TIMER2_COMPA_vect _VECTOR(7) /* Timer/Counter2 Compare Match A */ -#define TIMER2_COMPB_vect _VECTOR(8) /* Timer/Counter2 Compare Match A */ -#define TIMER2_OVF_vect _VECTOR(9) /* Timer/Counter2 Overflow */ -#define TIMER1_CAPT_vect _VECTOR(10) /* Timer/Counter1 Capture Event */ -#define TIMER1_COMPA_vect _VECTOR(11) /* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPB_vect _VECTOR(12) /* Timer/Counter1 Compare Match B */ -#define TIMER1_OVF_vect _VECTOR(13) /* Timer/Counter1 Overflow */ -#define TIMER0_COMPA_vect _VECTOR(14) /* TimerCounter0 Compare Match A */ -#define TIMER0_COMPB_vect _VECTOR(15) /* TimerCounter0 Compare Match B */ -#define TIMER0_OVF_vect _VECTOR(16) /* Timer/Couner0 Overflow */ -#define SPI_STC_vect _VECTOR(17) /* SPI Serial Transfer Complete */ -#define USART_RX_vect _VECTOR(18) /* USART Rx Complete */ -#define USART_UDRE_vect _VECTOR(19) /* USART, Data Register Empty */ -#define USART_TX_vect _VECTOR(20) /* USART Tx Complete */ -#define ADC_vect _VECTOR(21) /* ADC Conversion Complete */ -#define EE_READY_vect _VECTOR(22) /* EEPROM Ready */ -#define ANALOG_COMP_vect _VECTOR(23) /* Analog Comparator */ -#define TWI_vect _VECTOR(24) /* Two-wire Serial Interface */ -#define SPM_READY_vect _VECTOR(25) /* Store Program Memory Read */ - -#define _VECTORS_SIZE (26 * 2) - - - -/* Constants */ -#define SPM_PAGESIZE 64 -#define RAMEND 0x4FF /* Last On-Chip SRAM Location */ -#define XRAMSIZE 0 -#define XRAMEND (RAMEND + XRAMSIZE) -#define E2END 0x1FF -#define E2PAGESIZE 4 -#define FLASHEND 0x1FFF - - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) /* Select Clock Source */ -#define FUSE_CKSEL1 (unsigned char)~_BV(1) /* Select Clock Source */ -#define FUSE_CKSEL2 (unsigned char)~_BV(2) /* Select Clock Source */ -#define FUSE_CKSEL3 (unsigned char)~_BV(3) /* Select Clock Source */ -#define FUSE_SUT0 (unsigned char)~_BV(4) /* Select start-up time */ -#define FUSE_SUT1 (unsigned char)~_BV(5) /* Select start-up time */ -#define FUSE_CKOUT (unsigned char)~_BV(6) /* Clock output */ -#define FUSE_CKDIV8 (unsigned char)~_BV(7) /* Divide clock by 8 */ -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) /* Brown-out Detector trigger level */ -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) /* Brown-out Detector trigger level */ -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) /* Brown-out Detector trigger level */ -#define FUSE_EESAVE (unsigned char)~_BV(3) /* EEPROM memory is preserved through chip erase */ -#define FUSE_WDTON (unsigned char)~_BV(4) /* Watchdog Timer Always On */ -#define FUSE_SPIEN (unsigned char)~_BV(5) /* Enable Serial programming and Data Downloading */ -#define FUSE_DWEN (unsigned char)~_BV(6) /* debugWIRE Enable */ -#define FUSE_RSTDISBL (unsigned char)~_BV(7) /* External reset disable */ -#define HFUSE_DEFAULT (FUSE_SPIEN) - -/* Extended Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define EFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1) - - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x93 -#define SIGNATURE_2 0x0F - - -#endif /* _AVR_IOM88P_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom8hva.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom8hva.h deleted file mode 100644 index d9101d3d7..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iom8hva.h +++ /dev/null @@ -1,70 +0,0 @@ -/* Copyright (c) 2007, Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iom8hva.h,v 1.2.2.4 2008/08/14 00:08:05 arcanum Exp $ */ - -/* iom8hva.h - definitions for ATmega8HVA. */ - -#ifndef _AVR_IOM8HVA_H_ -#define _AVR_IOM8HVA_H_ 1 - -#include - -/* Constants */ -#define SPM_PAGESIZE 128 -#define RAMEND 0x2FF -#define XRAMEND 0x2FF -#define E2END 0xFF -#define E2PAGESIZE 4 -#define FLASHEND 0x1FFF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 1 - -/* Low Fuse Byte */ -#define FUSE_SUT0 (unsigned char)~_BV(0) -#define FUSE_SUT1 (unsigned char)~_BV(1) -#define FUSE_SUT2 (unsigned char)~_BV(2) -#define FUSE_SELFPRGEN (unsigned char)~_BV(3) -#define FUSE_DWEN (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_EESAVE (unsigned char)~_BV(6) -#define FUSE_WDTON (unsigned char)~_BV(7) -#define FUSE_DEFAULT (FUSE_SPIEN) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST - - -#endif /* _AVR_IOM8HVA_H_ */ - diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iomx8.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iomx8.h deleted file mode 100644 index cdbb84351..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iomx8.h +++ /dev/null @@ -1,735 +0,0 @@ -/* Copyright (c) 2004,2005, Theodore A. Roth - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iomx8.h,v 1.13 2007/12/12 14:00:49 arcanum Exp $ */ - -/* avr/iomx8.h - definitions for ATmega48, ATmega88 and ATmega168 */ - -#ifndef _AVR_IOMX8_H_ -#define _AVR_IOMX8_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iomx8.h" -#else -# error "Attempt to include more than one file." -#endif - -/* I/O registers */ - -/* Port B */ - -#define PINB _SFR_IO8 (0x03) -/* PINB */ -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -#define DDRB _SFR_IO8 (0x04) -/* DDRB */ -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -#define PORTB _SFR_IO8 (0x05) -/* PORTB */ -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -/* Port C */ - -#define PINC _SFR_IO8 (0x06) -/* PINC */ -#define PINC6 6 -#define PINC5 5 -#define PINC4 4 -#define PINC3 3 -#define PINC2 2 -#define PINC1 1 -#define PINC0 0 - -#define DDRC _SFR_IO8 (0x07) -/* DDRC */ -#define DDC6 6 -#define DDC5 5 -#define DDC4 4 -#define DDC3 3 -#define DDC2 2 -#define DDC1 1 -#define DDC0 0 - -#define PORTC _SFR_IO8 (0x08) -/* PORTC */ -#define PC6 6 -#define PC5 5 -#define PC4 4 -#define PC3 3 -#define PC2 2 -#define PC1 1 -#define PC0 0 - -/* Port D */ - -#define PIND _SFR_IO8 (0x09) -/* PIND */ -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -#define DDRD _SFR_IO8 (0x0A) -/* DDRD */ -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -#define PORTD _SFR_IO8 (0x0B) -/* PORTD */ -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -#define TIFR0 _SFR_IO8 (0x15) -/* TIFR0 */ -#define OCF0B 2 -#define OCF0A 1 -#define TOV0 0 - -#define TIFR1 _SFR_IO8 (0x16) -/* TIFR1 */ -#define ICF1 5 -#define OCF1B 2 -#define OCF1A 1 -#define TOV1 0 - -#define TIFR2 _SFR_IO8 (0x17) -/* TIFR2 */ -#define OCF2B 2 -#define OCF2A 1 -#define TOV2 0 - -#define PCIFR _SFR_IO8 (0x1B) -/* PCIFR */ -#define PCIF2 2 -#define PCIF1 1 -#define PCIF0 0 - -#define EIFR _SFR_IO8 (0x1C) -/* EIFR */ -#define INTF1 1 -#define INTF0 0 - -#define EIMSK _SFR_IO8 (0x1D) -/* EIMSK */ -#define INT1 1 -#define INT0 0 - -#define GPIOR0 _SFR_IO8 (0x1E) - -#define EECR _SFR_IO8(0x1F) -/* EECT - EEPROM Control Register */ -#define EEPM1 5 -#define EEPM0 4 -#define EERIE 3 -#define EEMPE 2 -#define EEPE 1 -#define EERE 0 - -#define EEDR _SFR_IO8(0X20) - -/* Combine EEARL and EEARH */ -#define EEAR _SFR_IO16(0x21) -#define EEARL _SFR_IO8(0x21) -#define EEARH _SFR_IO8(0X22) -/* -Even though EEARH is not used by the mega48, the EEAR8 bit in the register -must be written to 0, according to the datasheet, hence the EEARH register -must be defined for the mega48. -*/ -/* 6-char sequence denoting where to find the EEPROM registers in memory space. - Adresses denoted in hex syntax with uppercase letters. Used by the EEPROM - subroutines. - First two letters: EECR address. - Second two letters: EEDR address. - Last two letters: EEAR address. */ -#define __EEPROM_REG_LOCATIONS__ 1F2021 - - -#define GTCCR _SFR_IO8 (0x23) -/* GTCCR */ -#define TSM 7 -#define PSRASY 1 -#define PSRSYNC 0 - -#define TCCR0A _SFR_IO8 (0x24) -/* TCCR0A */ -#define COM0A1 7 -#define COM0A0 6 -#define COM0B1 5 -#define COM0B0 4 -#define WGM01 1 -#define WGM00 0 - -#define TCCR0B _SFR_IO8 (0x25) -/* TCCR0A */ -#define FOC0A 7 -#define FOC0B 6 -#define WGM02 3 -#define CS02 2 -#define CS01 1 -#define CS00 0 - -#define TCNT0 _SFR_IO8 (0x26) -#define OCR0A _SFR_IO8 (0x27) -#define OCR0B _SFR_IO8 (0x28) - -#define GPIOR1 _SFR_IO8 (0x2A) -#define GPIOR2 _SFR_IO8 (0x2B) - -#define SPCR _SFR_IO8 (0x2C) -/* SPCR */ -#define SPIE 7 -#define SPE 6 -#define DORD 5 -#define MSTR 4 -#define CPOL 3 -#define CPHA 2 -#define SPR1 1 -#define SPR0 0 - -#define SPSR _SFR_IO8 (0x2D) -/* SPSR */ -#define SPIF 7 -#define WCOL 6 -#define SPI2X 0 - -#define SPDR _SFR_IO8 (0x2E) - -#define ACSR _SFR_IO8 (0x30) -/* ACSR */ -#define ACD 7 -#define ACBG 6 -#define ACO 5 -#define ACI 4 -#define ACIE 3 -#define ACIC 2 -#define ACIS1 1 -#define ACIS0 0 - -#define MONDR _SFR_IO8 (0x31) - -#define SMCR _SFR_IO8 (0x33) -/* SMCR */ -#define SM2 3 -#define SM1 2 -#define SM0 1 -#define SE 0 - -#define MCUSR _SFR_IO8 (0x34) -/* MCUSR */ -#define WDRF 3 -#define BORF 2 -#define EXTRF 1 -#define PORF 0 - -#define MCUCR _SFR_IO8 (0x35) -/* MCUCR */ -#define PUD 4 -#if defined (__AVR_ATmega88__) || defined (__AVR_ATmega168__) -#define IVSEL 1 -#define IVCE 0 -#endif - -#define SPMCSR _SFR_IO8 (0x37) -/* SPMCSR */ -#define SPMIE 7 -#if defined (__AVR_ATmega88__) || defined (__AVR_ATmega168__) -# define RWWSB 6 -# define RWWSRE 4 -#endif -#define BLBSET 3 -#define PGWRT 2 -#define PGERS 1 -#define SELFPRGEN 0 -#define SPMEN 0 - -/* 0x3D..0x3E SP [defined in ] */ -/* 0x3F SREG [defined in ] */ - -#define WDTCSR _SFR_MEM8 (0x60) -/* WDTCSR */ -#define WDIF 7 -#define WDIE 6 -#define WDP3 5 -#define WDCE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -#define CLKPR _SFR_MEM8 (0x61) -/* CLKPR */ -#define CLKPCE 7 -#define CLKPS3 3 -#define CLKPS2 2 -#define CLKPS1 1 -#define CLKPS0 0 - -#define PRR _SFR_MEM8 (0x64) -/* PRR */ -#define PRTWI 7 -#define PRTIM2 6 -#define PRTIM0 5 -#define PRTIM1 3 -#define PRSPI 2 -#define PRUSART0 1 -#define PRADC 0 - -#define OSCCAL _SFR_MEM8 (0x66) - -#define PCICR _SFR_MEM8 (0x68) -/* PCICR */ -#define PCIE2 2 -#define PCIE1 1 -#define PCIE0 0 - -#define EICRA _SFR_MEM8 (0x69) -/* EICRA */ -#define ISC11 3 -#define ISC10 2 -#define ISC01 1 -#define ISC00 0 - -#define PCMSK0 _SFR_MEM8 (0x6B) -/* PCMSK0 */ -#define PCINT7 7 -#define PCINT6 6 -#define PCINT5 5 -#define PCINT4 4 -#define PCINT3 3 -#define PCINT2 2 -#define PCINT1 1 -#define PCINT0 0 - -#define PCMSK1 _SFR_MEM8 (0x6C) -/* PCMSK1 */ -#define PCINT14 6 -#define PCINT13 5 -#define PCINT12 4 -#define PCINT11 3 -#define PCINT10 2 -#define PCINT9 1 -#define PCINT8 0 - -#define PCMSK2 _SFR_MEM8 (0x6D) -/* PCMSK2 */ -#define PCINT23 7 -#define PCINT22 6 -#define PCINT21 5 -#define PCINT20 4 -#define PCINT19 3 -#define PCINT18 2 -#define PCINT17 1 -#define PCINT16 0 - -#define TIMSK0 _SFR_MEM8 (0x6E) -/* TIMSK0 */ -#define OCIE0B 2 -#define OCIE0A 1 -#define TOIE0 0 - -#define TIMSK1 _SFR_MEM8 (0x6F) -/* TIMSK1 */ -#define ICIE1 5 -#define OCIE1B 2 -#define OCIE1A 1 -#define TOIE1 0 - -#define TIMSK2 _SFR_MEM8 (0x70) -/* TIMSK2 */ -#define OCIE2B 2 -#define OCIE2A 1 -#define TOIE2 0 - -#ifndef __ASSEMBLER__ -#define ADC _SFR_MEM16 (0x78) -#endif -#define ADCW _SFR_MEM16 (0x78) -#define ADCL _SFR_MEM8 (0x78) -#define ADCH _SFR_MEM8 (0x79) - -#define ADCSRA _SFR_MEM8 (0x7A) -/* ADCSRA */ -#define ADEN 7 -#define ADSC 6 -#define ADATE 5 -#define ADIF 4 -#define ADIE 3 -#define ADPS2 2 -#define ADPS1 1 -#define ADPS0 0 - -#define ADCSRB _SFR_MEM8 (0x7B) -/* ADCSRB */ -#define ACME 6 -#define ADTS2 2 -#define ADTS1 1 -#define ADTS0 0 - -#define ADMUX _SFR_MEM8 (0x7C) -/* ADMUX */ -#define REFS1 7 -#define REFS0 6 -#define ADLAR 5 -#define MUX3 3 -#define MUX2 2 -#define MUX1 1 -#define MUX0 0 - -#define DIDR0 _SFR_MEM8 (0x7E) -/* DIDR0 */ -#define ADC5D 5 -#define ADC4D 4 -#define ADC3D 3 -#define ADC2D 2 -#define ADC1D 1 -#define ADC0D 0 - -#define DIDR1 _SFR_MEM8 (0x7F) -/* DIDR1 */ -#define AIN1D 1 -#define AIN0D 0 - -#define TCCR1A _SFR_MEM8 (0x80) -/* TCCR1A */ -#define COM1A1 7 -#define COM1A0 6 -#define COM1B1 5 -#define COM1B0 4 -#define WGM11 1 -#define WGM10 0 - -#define TCCR1B _SFR_MEM8 (0x81) -/* TCCR1B */ -#define ICNC1 7 -#define ICES1 6 -#define WGM13 4 -#define WGM12 3 -#define CS12 2 -#define CS11 1 -#define CS10 0 - -#define TCCR1C _SFR_MEM8 (0x82) -/* TCCR1C */ -#define FOC1A 7 -#define FOC1B 6 - -#define TCNT1 _SFR_MEM16 (0x84) -#define TCNT1L _SFR_MEM8 (0x84) -#define TCNT1H _SFR_MEM8 (0x85) - -#define ICR1 _SFR_MEM16 (0x86) -#define ICR1L _SFR_MEM8 (0x86) -#define ICR1H _SFR_MEM8 (0x87) - -#define OCR1A _SFR_MEM16 (0x88) -#define OCR1AL _SFR_MEM8 (0x88) -#define OCR1AH _SFR_MEM8 (0x89) - -#define OCR1B _SFR_MEM16 (0x8A) -#define OCR1BL _SFR_MEM8 (0x8A) -#define OCR1BH _SFR_MEM8 (0x8B) - -#define TCCR2A _SFR_MEM8 (0xB0) -/* TCCR2A */ -#define COM2A1 7 -#define COM2A0 6 -#define COM2B1 5 -#define COM2B0 4 -#define WGM21 1 -#define WGM20 0 - -#define TCCR2B _SFR_MEM8 (0xB1) -/* TCCR2B */ -#define FOC2A 7 -#define FOC2B 6 -#define WGM22 3 -#define CS22 2 -#define CS21 1 -#define CS20 0 - -#define TCNT2 _SFR_MEM8 (0xB2) -#define OCR2A _SFR_MEM8 (0xB3) -#define OCR2B _SFR_MEM8 (0xB4) - -#define ASSR _SFR_MEM8 (0xB6) -/* ASSR */ -#define EXCLK 6 -#define AS2 5 -#define TCN2UB 4 -#define OCR2AUB 3 -#define OCR2BUB 2 -#define TCR2AUB 1 -#define TCR2BUB 0 - -#define TWBR _SFR_MEM8 (0xB8) - -#define TWSR _SFR_MEM8 (0xB9) -/* TWSR */ -#define TWS7 7 -#define TWS6 6 -#define TWS5 5 -#define TWS4 4 -#define TWS3 3 -#define TWPS1 1 -#define TWPS0 0 - -#define TWAR _SFR_MEM8 (0xBA) -/* TWAR */ -#define TWA6 7 -#define TWA5 6 -#define TWA4 5 -#define TWA3 4 -#define TWA2 3 -#define TWA1 2 -#define TWA0 1 -#define TWGCE 0 - -#define TWDR _SFR_MEM8 (0xBB) - -#define TWCR _SFR_MEM8 (0xBC) -/* TWCR */ -#define TWINT 7 -#define TWEA 6 -#define TWSTA 5 -#define TWSTO 4 -#define TWWC 3 -#define TWEN 2 -#define TWIE 0 - -#define TWAMR _SFR_MEM8 (0xBD) -/* TWAMR */ -#define TWAM6 7 -#define TWAM5 6 -#define TWAM4 5 -#define TWAM3 4 -#define TWAM2 3 -#define TWAM1 2 -#define TWAM0 1 - -#define UCSR0A _SFR_MEM8 (0xC0) -/* UCSR0A */ -#define RXC0 7 -#define TXC0 6 -#define UDRE0 5 -#define FE0 4 -#define DOR0 3 -#define UPE0 2 -#define U2X0 1 -#define MPCM0 0 - -#define UCSR0B _SFR_MEM8 (0xC1) -/* UCSR0B */ -#define RXCIE0 7 -#define TXCIE0 6 -#define UDRIE0 5 -#define RXEN0 4 -#define TXEN0 3 -#define UCSZ02 2 -#define RXB80 1 -#define TXB80 0 - -#define UCSR0C _SFR_MEM8 (0xC2) -/* UCSR0C */ -#define UMSEL01 7 -#define UMSEL00 6 -#define UPM01 5 -#define UPM00 4 -#define USBS0 3 -#define UCSZ01 2 -#define UDORD0 2 -#define UCSZ00 1 -#define UCPHA0 1 -#define UCPOL0 0 - -#define UBRR0 _SFR_MEM16 (0xC4) -#define UBRR0L _SFR_MEM8 (0xC4) -#define UBRR0H _SFR_MEM8 (0xC5) -#define UDR0 _SFR_MEM8 (0xC6) - -/* Interrupt vectors */ - -/* External Interrupt Request 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* External Interrupt Request 1 */ -#define INT1_vect _VECTOR(2) -#define SIG_INTERRUPT1 _VECTOR(2) - -/* Pin Change Interrupt Request 0 */ -#define PCINT0_vect _VECTOR(3) -#define SIG_PIN_CHANGE0 _VECTOR(3) - -/* Pin Change Interrupt Request 0 */ -#define PCINT1_vect _VECTOR(4) -#define SIG_PIN_CHANGE1 _VECTOR(4) - -/* Pin Change Interrupt Request 1 */ -#define PCINT2_vect _VECTOR(5) -#define SIG_PIN_CHANGE2 _VECTOR(5) - -/* Watchdog Time-out Interrupt */ -#define WDT_vect _VECTOR(6) -#define SIG_WATCHDOG_TIMEOUT _VECTOR(6) - -/* Timer/Counter2 Compare Match A */ -#define TIMER2_COMPA_vect _VECTOR(7) -#define SIG_OUTPUT_COMPARE2A _VECTOR(7) - -/* Timer/Counter2 Compare Match A */ -#define TIMER2_COMPB_vect _VECTOR(8) -#define SIG_OUTPUT_COMPARE2B _VECTOR(8) - -/* Timer/Counter2 Overflow */ -#define TIMER2_OVF_vect _VECTOR(9) -#define SIG_OVERFLOW2 _VECTOR(9) - -/* Timer/Counter1 Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(10) -#define SIG_INPUT_CAPTURE1 _VECTOR(10) - -/* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPA_vect _VECTOR(11) -#define SIG_OUTPUT_COMPARE1A _VECTOR(11) - -/* Timer/Counter1 Compare Match B */ -#define TIMER1_COMPB_vect _VECTOR(12) -#define SIG_OUTPUT_COMPARE1B _VECTOR(12) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(13) -#define SIG_OVERFLOW1 _VECTOR(13) - -/* TimerCounter0 Compare Match A */ -#define TIMER0_COMPA_vect _VECTOR(14) -#define SIG_OUTPUT_COMPARE0A _VECTOR(14) - -/* TimerCounter0 Compare Match B */ -#define TIMER0_COMPB_vect _VECTOR(15) -#define SIG_OUTPUT_COMPARE0B _VECTOR(15) - -/* Timer/Couner0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(16) -#define SIG_OVERFLOW0 _VECTOR(16) - -/* SPI Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(17) -#define SIG_SPI _VECTOR(17) - -/* USART Rx Complete */ -#define USART_RX_vect _VECTOR(18) -#define SIG_USART_RECV _VECTOR(18) - -/* USART, Data Register Empty */ -#define USART_UDRE_vect _VECTOR(19) -#define SIG_USART_DATA _VECTOR(19) - -/* USART Tx Complete */ -#define USART_TX_vect _VECTOR(20) -#define SIG_USART_TRANS _VECTOR(20) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(21) -#define SIG_ADC _VECTOR(21) - -/* EEPROM Ready */ -#define EE_READY_vect _VECTOR(22) -#define SIG_EEPROM_READY _VECTOR(22) - -/* Analog Comparator */ -#define ANALOG_COMP_vect _VECTOR(23) -#define SIG_COMPARATOR _VECTOR(23) - -/* Two-wire Serial Interface */ -#define TWI_vect _VECTOR(24) -#define SIG_TWI _VECTOR(24) -#define SIG_2WIRE_SERIAL _VECTOR(24) - -/* Store Program Memory Read */ -#define SPM_READY_vect _VECTOR(25) -#define SIG_SPM_READY _VECTOR(25) - -/* The mega48 and mega88 vector tables are single instruction entries (16 bits - per entry for an RJMP) while the mega168 table has double instruction - entries (32 bits per entry for a JMP). */ - -#if defined (__AVR_ATmega168__) -# define _VECTORS_SIZE 104 -#else -# define _VECTORS_SIZE 52 -#endif - -#endif /* _AVR_IOM8_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iomxx0_1.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iomxx0_1.h deleted file mode 100644 index c1e7d4d19..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iomxx0_1.h +++ /dev/null @@ -1,1553 +0,0 @@ -/* Copyright (c) 2005 Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iomxx0_1.h,v 1.12 2007/12/12 14:00:49 arcanum Exp $ */ - -/* avr/iomxx0_1.h - definitions for ATmega640, Atmega1280, ATmega1281, - ATmega2560 and ATmega2561. */ - -#ifndef _AVR_IOMXX0_1_H_ -#define _AVR_IOMXX0_1_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iomxx0_1.h" -#else -# error "Attempt to include more than one file." -#endif - -#if defined(__AVR_ATmega640__) || defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__) -# define __ATmegaxx0__ -#elif defined(__AVR_ATmega1281__) || defined(__AVR_ATmega2561__) -# define __ATmegaxx1__ -#endif - -/* Registers and associated bit numbers */ - -#define PINA _SFR_IO8(0X00) -#define PINA7 7 -#define PINA6 6 -#define PINA5 5 -#define PINA4 4 -#define PINA3 3 -#define PINA2 2 -#define PINA1 1 -#define PINA0 0 - -#define DDRA _SFR_IO8(0X01) -#define DDA7 7 -#define DDA6 6 -#define DDA5 5 -#define DDA4 4 -#define DDA3 3 -#define DDA2 2 -#define DDA1 1 -#define DDA0 0 - -#define PORTA _SFR_IO8(0X02) -#define PA7 7 -#define PA6 6 -#define PA5 5 -#define PA4 4 -#define PA3 3 -#define PA2 2 -#define PA1 1 -#define PA0 0 - -#define PINB _SFR_IO8(0X03) -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -#define DDRB _SFR_IO8(0x04) -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -#define PORTB _SFR_IO8(0x05) -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -#define PINC _SFR_IO8(0x06) -#define PINC7 7 -#define PINC6 6 -#define PINC5 5 -#define PINC4 4 -#define PINC3 3 -#define PINC2 2 -#define PINC1 1 -#define PINC0 0 - -#define DDRC _SFR_IO8(0x07) -#define DDC7 7 -#define DDC6 6 -#define DDC5 5 -#define DDC4 4 -#define DDC3 3 -#define DDC2 2 -#define DDC1 1 -#define DDC0 0 - -#define PORTC _SFR_IO8(0x08) -#define PC7 7 -#define PC6 6 -#define PC5 5 -#define PC4 4 -#define PC3 3 -#define PC2 2 -#define PC1 1 -#define PC0 0 - -#define PIND _SFR_IO8(0x09) -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -#define DDRD _SFR_IO8(0x0A) -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -#define PORTD _SFR_IO8(0x0B) -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -#define PINE _SFR_IO8(0x0C) -#define PINE7 7 -#define PINE6 6 -#define PINE5 5 -#define PINE4 4 -#define PINE3 3 -#define PINE2 2 -#define PINE1 1 -#define PINE0 0 - -#define DDRE _SFR_IO8(0x0D) -#define DDE7 7 -#define DDE6 6 -#define DDE5 5 -#define DDE4 4 -#define DDE3 3 -#define DDE2 2 -#define DDE1 1 -#define DDE0 0 - -#define PORTE _SFR_IO8(0x0E) -#define PE7 7 -#define PE6 6 -#define PE5 5 -#define PE4 4 -#define PE3 3 -#define PE2 2 -#define PE1 1 -#define PE0 0 - -#define PINF _SFR_IO8(0x0F) -#define PINF7 7 -#define PINF6 6 -#define PINF5 5 -#define PINF4 4 -#define PINF3 3 -#define PINF2 2 -#define PINF1 1 -#define PINF0 0 - -#define DDRF _SFR_IO8(0x10) -#define DDF7 7 -#define DDF6 6 -#define DDF5 5 -#define DDF4 4 -#define DDF3 3 -#define DDF2 2 -#define DDF1 1 -#define DDF0 0 - -#define PORTF _SFR_IO8(0x11) -#define PF7 7 -#define PF6 6 -#define PF5 5 -#define PF4 4 -#define PF3 3 -#define PF2 2 -#define PF1 1 -#define PF0 0 - -#define PING _SFR_IO8(0x12) -#define PING5 5 -#define PING4 4 -#define PING3 3 -#define PING2 2 -#define PING1 1 -#define PING0 0 - -#define DDRG _SFR_IO8(0x13) -#define DDG5 5 -#define DDG4 4 -#define DDG3 3 -#define DDG2 2 -#define DDG1 1 -#define DDG0 0 - -#define PORTG _SFR_IO8(0x14) -#define PG5 5 -#define PG4 4 -#define PG3 3 -#define PG2 2 -#define PG1 1 -#define PG0 0 - -#define TIFR0 _SFR_IO8(0x15) -#define OCF0B 2 -#define OCF0A 1 -#define TOV0 0 - -#define TIFR1 _SFR_IO8(0x16) -#define ICF1 5 -#define OCF1C 3 -#define OCF1B 2 -#define OCF1A 1 -#define TOV1 0 - -#define TIFR2 _SFR_IO8(0x17) -#define OCF2B 2 -#define OCF2A 1 -#define TOV2 0 - -#define TIFR3 _SFR_IO8(0x18) -#define ICF3 5 -#define OCF3C 3 -#define OCF3B 2 -#define OCF3A 1 -#define TOV3 0 - -#define TIFR4 _SFR_IO8(0x19) -#define ICF4 5 -#define OCF4C 3 -#define OCF4B 2 -#define OCF4A 1 -#define TOV4 0 - -#define TIFR5 _SFR_IO8(0x1A) -#define ICF5 5 -#define OCF5C 3 -#define OCF5B 2 -#define OCF5A 1 -#define TOV5 0 - -#define PCIFR _SFR_IO8(0x1B) -#if defined(__ATmegaxx0__) -# define PCIF2 2 -#endif /* __ATmegaxx0__ */ -#define PCIF1 1 -#define PCIF0 0 - -#define EIFR _SFR_IO8(0x1C) -#define INTF7 7 -#define INTF6 6 -#define INTF5 5 -#define INTF4 4 -#define INTF3 3 -#define INTF2 2 -#define INTF1 1 -#define INTF0 0 - -#define EIMSK _SFR_IO8(0x1D) -#define INT7 7 -#define INT6 6 -#define INT5 5 -#define INT4 4 -#define INT3 3 -#define INT2 2 -#define INT1 1 -#define INT0 0 - -#define GPIOR0 _SFR_IO8(0x1E) - -#define EECR _SFR_IO8(0x1F) -#define EEPM1 5 -#define EEPM0 4 -#define EERIE 3 -#define EEMPE 2 -#define EEPE 1 -#define EERE 0 - -#define EEDR _SFR_IO8(0X20) - -/* Combine EEARL and EEARH */ -#define EEAR _SFR_IO16(0x21) - -#define EEARL _SFR_IO8(0x21) -#define EEARH _SFR_IO8(0X22) - -/* 6-char sequence denoting where to find the EEPROM registers in memory space. - Adresses denoted in hex syntax with uppercase letters. Used by the EEPROM - subroutines. - First two letters: EECR address. - Second two letters: EEDR address. - Last two letters: EEAR address. */ -#define __EEPROM_REG_LOCATIONS__ 1F2021 - -#define GTCCR _SFR_IO8(0x23) -#define TSM 7 -#define PSRASY 1 -#define PSRSYNC 0 - -#define TCCR0A _SFR_IO8(0x24) -#define COM0A1 7 -#define COM0A0 6 -#define COM0B1 5 -#define COM0B0 4 -#define WGM01 1 -#define WGM00 0 - -#define TCCR0B _SFR_IO8(0x25) -#define FOC0A 7 -#define FOC0B 6 -#define WGM02 3 -#define CS02 2 -#define CS01 1 -#define CS00 0 - -#define TCNT0 _SFR_IO8(0X26) - -#define OCR0A _SFR_IO8(0X27) - -#define OCR0B _SFR_IO8(0X28) - -/* Reserved [0x29] */ - -#define GPIOR1 _SFR_IO8(0x2A) - -#define GPIOR2 _SFR_IO8(0x2B) - -#define SPCR _SFR_IO8(0x2C) -#define SPIE 7 -#define SPE 6 -#define DORD 5 -#define MSTR 4 -#define CPOL 3 -#define CPHA 2 -#define SPR1 1 -#define SPR0 0 - -#define SPSR _SFR_IO8(0x2D) -#define SPIF 7 -#define WCOL 6 -#define SPI2X 0 - -#define SPDR _SFR_IO8(0X2E) - -/* Reserved [0x2F] */ - -#define ACSR _SFR_IO8(0x30) -#define ACD 7 -#define ACBG 6 -#define ACO 5 -#define ACI 4 -#define ACIE 3 -#define ACIC 2 -#define ACIS1 1 -#define ACIS0 0 - -#define MONDR _SFR_IO8(0x31) -#define OCDR _SFR_IO8(0x31) -#define IDRD 7 -#define OCDR7 7 -#define OCDR6 6 -#define OCDR5 5 -#define OCDR4 4 -#define OCDR3 3 -#define OCDR2 2 -#define OCDR1 1 -#define OCDR0 0 - -/* Reserved [0x32] */ - -#define SMCR _SFR_IO8(0x33) -#define SM2 3 -#define SM1 2 -#define SM0 1 -#define SE 0 - -#define MCUSR _SFR_IO8(0x34) -#define JTRF 4 -#define WDRF 3 -#define BORF 2 -#define EXTRF 1 -#define PORF 0 - -#define MCUCR _SFR_IO8(0X35) -#define JTD 7 -#define PUD 4 -#define IVSEL 1 -#define IVCE 0 - -/* Reserved [0x36] */ - -#define SPMCSR _SFR_IO8(0x37) -#define SPMIE 7 -#define RWWSB 6 -#define SIGRD 5 -#define RWWSRE 4 -#define BLBSET 3 -#define PGWRT 2 -#define PGERS 1 -#define SPMEN 0 - -/* Reserved [0x38..0x3A] */ - -#define RAMPZ _SFR_IO8(0X3B) -#define RAMPZ0 0 - -#define EIND _SFR_IO8(0X3C) -#define EIND0 0 - -/* SP [0x3D..0x3E] */ -/* SREG [0x3F] */ - -#define WDTCSR _SFR_MEM8(0x60) -#define WDIF 7 -#define WDIE 6 -#define WDP3 5 -#define WDCE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -#define CLKPR _SFR_MEM8(0x61) -#define CLKPCE 7 -#define CLKPS3 3 -#define CLKPS2 2 -#define CLKPS1 1 -#define CLKPS0 0 - -/* Reserved [0x62..0x63] */ - -#define PRR0 _SFR_MEM8(0x64) -#define PRTWI 7 -#define PRTIM2 6 -#define PRTIM0 5 -#define PRTIM1 3 -#define PRSPI 2 -#define PRUSART0 1 -#define PRADC 0 - -#define PRR1 _SFR_MEM8(0x65) -#define PRTIM5 5 -#define PRTIM4 4 -#define PRTIM3 3 -#define PRUSART3 2 -#define PRUSART2 1 -#define PRUSART1 0 - -#define OSCCAL _SFR_MEM8(0x66) - -/* Reserved [0x67] */ - -#define PCICR _SFR_MEM8(0x68) -#if defined(__ATmegaxx0__) -# define PCIE2 2 -#endif /* __ATmegaxx0__ */ -#define PCIE1 1 -#define PCIE0 0 - -#define EICRA _SFR_MEM8(0x69) -#define ISC31 7 -#define ISC30 6 -#define ISC21 5 -#define ISC20 4 -#define ISC11 3 -#define ISC10 2 -#define ISC01 1 -#define ISC00 0 - -#define EICRB _SFR_MEM8(0x6A) -#define ISC71 7 -#define ISC70 6 -#define ISC61 5 -#define ISC60 4 -#define ISC51 3 -#define ISC50 2 -#define ISC41 1 -#define ISC40 0 - -#define PCMSK0 _SFR_MEM8(0x6B) -#define PCINT7 7 -#define PCINT6 6 -#define PCINT5 5 -#define PCINT4 4 -#define PCINT3 3 -#define PCINT2 2 -#define PCINT1 1 -#define PCINT0 0 - -#define PCMSK1 _SFR_MEM8(0x6C) -#define PCINT15 7 -#define PCINT14 6 -#define PCINT13 5 -#define PCINT12 4 -#define PCINT11 3 -#define PCINT10 2 -#define PCINT9 1 -#define PCINT8 0 - -#if defined(__ATmegaxx0__) -# define PCMSK2 _SFR_MEM8(0x6D) -# define PCINT23 7 -# define PCINT22 6 -# define PCINT21 5 -# define PCINT20 4 -# define PCINT19 3 -# define PCINT18 2 -# define PCINT17 1 -# define PCINT16 0 -#endif /* __ATmegaxx0__ */ - -#define TIMSK0 _SFR_MEM8(0x6E) -#define OCIE0B 2 -#define OCIE0A 1 -#define TOIE0 0 - -#define TIMSK1 _SFR_MEM8(0x6F) -#define ICIE1 5 -#define OCIE1C 3 -#define OCIE1B 2 -#define OCIE1A 1 -#define TOIE1 0 - -#define TIMSK2 _SFR_MEM8(0x70) -#define OCIE2B 2 -#define OCIE2A 1 -#define TOIE2 0 - -#define TIMSK3 _SFR_MEM8(0x71) -#define ICIE3 5 -#define OCIE3C 3 -#define OCIE3B 2 -#define OCIE3A 1 -#define TOIE3 0 - -#define TIMSK4 _SFR_MEM8(0x72) -#define ICIE4 5 -#define OCIE4C 3 -#define OCIE4B 2 -#define OCIE4A 1 -#define TOIE4 0 - -#define TIMSK5 _SFR_MEM8(0x73) -#define ICIE5 5 -#define OCIE5C 3 -#define OCIE5B 2 -#define OCIE5A 1 -#define TOIE5 0 - -#define XMCRA _SFR_MEM8(0x74) -#define SRE 7 -#define SRL2 6 -#define SRL1 5 -#define SRL0 4 -#define SRW11 3 -#define SRW10 2 -#define SRW01 1 -#define SRW00 0 - -#define XMCRB _SFR_MEM8(0x75) -#define XMBK 7 -#define XMM2 2 -#define XMM1 1 -#define XMM0 0 - -/* Reserved [0x76..0x77] */ - -/* Combine ADCL and ADCH */ -#ifndef __ASSEMBLER__ -#define ADC _SFR_MEM16(0x78) -#endif -#define ADCW _SFR_MEM16(0x78) -#define ADCL _SFR_MEM8(0x78) -#define ADCH _SFR_MEM8(0x79) - -#define ADCSRA _SFR_MEM8(0x7A) -#define ADEN 7 -#define ADSC 6 -#define ADATE 5 -#define ADIF 4 -#define ADIE 3 -#define ADPS2 2 -#define ADPS1 1 -#define ADPS0 0 - -#define ADCSRB _SFR_MEM8(0x7B) -#define ACME 6 -#if defined(__ATmegaxx0__) -# define MUX5 3 -#endif /* __ATmegaxx0__ */ -#define ADTS2 2 -#define ADTS1 1 -#define ADTS0 0 - -#define ADMUX _SFR_MEM8(0x7C) -#define REFS1 7 -#define REFS0 6 -#define ADLAR 5 -#define MUX4 4 -#define MUX3 3 -#define MUX2 2 -#define MUX1 1 -#define MUX0 0 - -#define DIDR2 _SFR_MEM8(0x7D) -#define ADC15D 7 -#define ADC14D 6 -#define ADC13D 5 -#define ADC12D 4 -#define ADC11D 3 -#define ADC10D 2 -#define ADC9D 1 -#define ADC8D 0 - -#define DIDR0 _SFR_MEM8(0x7E) -#define ADC7D 7 -#define ADC6D 6 -#define ADC5D 5 -#define ADC4D 4 -#define ADC3D 3 -#define ADC2D 2 -#define ADC1D 1 -#define ADC0D 0 - -#define DIDR1 _SFR_MEM8(0x7F) -#define AIN1D 1 -#define AIN0D 0 - -#define TCCR1A _SFR_MEM8(0x80) -#define COM1A1 7 -#define COM1A0 6 -#define COM1B1 5 -#define COM1B0 4 -#define COM1C1 3 -#define COM1C0 2 -#define WGM11 1 -#define WGM10 0 - -#define TCCR1B _SFR_MEM8(0x81) -#define ICNC1 7 -#define ICES1 6 -#define WGM13 4 -#define WGM12 3 -#define CS12 2 -#define CS11 1 -#define CS10 0 - -#define TCCR1C _SFR_MEM8(0x82) -#define FOC1A 7 -#define FOC1B 6 -#define FOC1C 5 - -/* Reserved [0x83] */ - -/* Combine TCNT1L and TCNT1H */ -#define TCNT1 _SFR_MEM16(0x84) - -#define TCNT1L _SFR_MEM8(0x84) -#define TCNT1H _SFR_MEM8(0x85) - -/* Combine ICR1L and ICR1H */ -#define ICR1 _SFR_MEM16(0x86) - -#define ICR1L _SFR_MEM8(0x86) -#define ICR1H _SFR_MEM8(0x87) - -/* Combine OCR1AL and OCR1AH */ -#define OCR1A _SFR_MEM16(0x88) - -#define OCR1AL _SFR_MEM8(0x88) -#define OCR1AH _SFR_MEM8(0x89) - -/* Combine OCR1BL and OCR1BH */ -#define OCR1B _SFR_MEM16(0x8A) - -#define OCR1BL _SFR_MEM8(0x8A) -#define OCR1BH _SFR_MEM8(0x8B) - -/* Combine OCR1CL and OCR1CH */ -#define OCR1C _SFR_MEM16(0x8C) - -#define OCR1CL _SFR_MEM8(0x8C) -#define OCR1CH _SFR_MEM8(0x8D) - -/* Reserved [0x8E..0x8F] */ - -#define TCCR3A _SFR_MEM8(0x90) -#define COM3A1 7 -#define COM3A0 6 -#define COM3B1 5 -#define COM3B0 4 -#define COM3C1 3 -#define COM3C0 2 -#define WGM31 1 -#define WGM30 0 - -#define TCCR3B _SFR_MEM8(0x91) -#define ICNC3 7 -#define ICES3 6 -#define WGM33 4 -#define WGM32 3 -#define CS32 2 -#define CS31 1 -#define CS30 0 - -#define TCCR3C _SFR_MEM8(0x92) -#define FOC3A 7 -#define FOC3B 6 -#define FOC3C 5 - -/* Reserved [0x93] */ - -/* Combine TCNT3L and TCNT3H */ -#define TCNT3 _SFR_MEM16(0x94) - -#define TCNT3L _SFR_MEM8(0x94) -#define TCNT3H _SFR_MEM8(0x95) - -/* Combine ICR3L and ICR3H */ -#define ICR3 _SFR_MEM16(0x96) - -#define ICR3L _SFR_MEM8(0x96) -#define ICR3H _SFR_MEM8(0x97) - -/* Combine OCR3AL and OCR3AH */ -#define OCR3A _SFR_MEM16(0x98) - -#define OCR3AL _SFR_MEM8(0x98) -#define OCR3AH _SFR_MEM8(0x99) - -/* Combine OCR3BL and OCR3BH */ -#define OCR3B _SFR_MEM16(0x9A) - -#define OCR3BL _SFR_MEM8(0x9A) -#define OCR3BH _SFR_MEM8(0x9B) - -/* Combine OCR3CL and OCR3CH */ -#define OCR3C _SFR_MEM16(0x9C) - -#define OCR3CL _SFR_MEM8(0x9C) -#define OCR3CH _SFR_MEM8(0x9D) - -/* Reserved [0x9E..0x9F] */ - -#define TCCR4A _SFR_MEM8(0xA0) -#define COM4A1 7 -#define COM4A0 6 -#define COM4B1 5 -#define COM4B0 4 -#define COM4C1 3 -#define COM4C0 2 -#define WGM41 1 -#define WGM40 0 - -#define TCCR4B _SFR_MEM8(0xA1) -#define ICNC4 7 -#define ICES4 6 -#define WGM43 4 -#define WGM42 3 -#define CS42 2 -#define CS41 1 -#define CS40 0 - -#define TCCR4C _SFR_MEM8(0xA2) -#define FOC4A 7 -#define FOC4B 6 -#define FOC4C 5 - -/* Reserved [0xA3] */ - -/* Combine TCNT4L and TCNT4H */ -#define TCNT4 _SFR_MEM16(0xA4) - -#define TCNT4L _SFR_MEM8(0xA4) -#define TCNT4H _SFR_MEM8(0xA5) - -/* Combine ICR4L and ICR4H */ -#define ICR4 _SFR_MEM16(0xA6) - -#define ICR4L _SFR_MEM8(0xA6) -#define ICR4H _SFR_MEM8(0xA7) - -/* Combine OCR4AL and OCR4AH */ -#define OCR4A _SFR_MEM16(0xA8) - -#define OCR4AL _SFR_MEM8(0xA8) -#define OCR4AH _SFR_MEM8(0xA9) - -/* Combine OCR4BL and OCR4BH */ -#define OCR4B _SFR_MEM16(0xAA) - -#define OCR4BL _SFR_MEM8(0xAA) -#define OCR4BH _SFR_MEM8(0xAB) - -/* Combine OCR4CL and OCR4CH */ -#define OCR4C _SFR_MEM16(0xAC) - -#define OCR4CL _SFR_MEM8(0xAC) -#define OCR4CH _SFR_MEM8(0xAD) - -/* Reserved [0xAE..0xAF] */ - -#define TCCR2A _SFR_MEM8(0xB0) -#define COM2A1 7 -#define COM2A0 6 -#define COM2B1 5 -#define COM2B0 4 -#define WGM21 1 -#define WGM20 0 - -#define TCCR2B _SFR_MEM8(0xB1) -#define FOC2A 7 -#define FOC2B 6 -#define WGM22 3 -#define CS22 2 -#define CS21 1 -#define CS20 0 - -#define TCNT2 _SFR_MEM8(0xB2) - -#define OCR2A _SFR_MEM8(0xB3) - -#define OCR2B _SFR_MEM8(0xB4) - -/* Reserved [0xB5] */ - -#define ASSR _SFR_MEM8(0xB6) -#define EXCLK 6 -#define AS2 5 -#define TCN2UB 4 -#define OCR2AUB 3 -#define OCR2BUB 2 -#define TCR2AUB 1 -#define TCR2BUB 0 - -/* Reserved [0xB7] */ - -#define TWBR _SFR_MEM8(0xB8) - -#define TWSR _SFR_MEM8(0xB9) -#define TWS7 7 -#define TWS6 6 -#define TWS5 5 -#define TWS4 4 -#define TWS3 3 -#define TWPS1 1 -#define TWPS0 0 - -#define TWAR _SFR_MEM8(0xBA) -#define TWA6 7 -#define TWA5 6 -#define TWA4 5 -#define TWA3 4 -#define TWA2 3 -#define TWA1 2 -#define TWA0 1 -#define TWGCE 0 - -#define TWDR _SFR_MEM8(0xBB) - -#define TWCR _SFR_MEM8(0xBC) -#define TWINT 7 -#define TWEA 6 -#define TWSTA 5 -#define TWSTO 4 -#define TWWC 3 -#define TWEN 2 -#define TWIE 0 - -#define TWAMR _SFR_MEM8(0xBD) -#define TWAM6 7 -#define TWAM5 6 -#define TWAM4 5 -#define TWAM3 4 -#define TWAM2 3 -#define TWAM1 2 -#define TWAM0 1 - -/* Reserved [0xBE..0xBF] */ - -#define UCSR0A _SFR_MEM8(0xC0) -#define RXC0 7 -#define TXC0 6 -#define UDRE0 5 -#define FE0 4 -#define DOR0 3 -#define UPE0 2 -#define U2X0 1 -#define MPCM0 0 - -#define UCSR0B _SFR_MEM8(0XC1) -#define RXCIE0 7 -#define TXCIE0 6 -#define UDRIE0 5 -#define RXEN0 4 -#define TXEN0 3 -#define UCSZ02 2 -#define RXB80 1 -#define TXB80 0 - -#define UCSR0C _SFR_MEM8(0xC2) -#define UMSEL01 7 -#define UMSEL00 6 -#define UPM01 5 -#define UPM00 4 -#define USBS0 3 -#define UCSZ01 2 -#define UCSZ00 1 -#define UCPOL0 0 - -/* Reserved [0xC3] */ - -/* Combine UBRR0L and UBRR0H */ -#define UBRR0 _SFR_MEM16(0xC4) - -#define UBRR0L _SFR_MEM8(0xC4) -#define UBRR0H _SFR_MEM8(0xC5) - -#define UDR0 _SFR_MEM8(0XC6) - -/* Reserved [0xC7] */ - -#define UCSR1A _SFR_MEM8(0xC8) -#define RXC1 7 -#define TXC1 6 -#define UDRE1 5 -#define FE1 4 -#define DOR1 3 -#define UPE1 2 -#define U2X1 1 -#define MPCM1 0 - -#define UCSR1B _SFR_MEM8(0XC9) -#define RXCIE1 7 -#define TXCIE1 6 -#define UDRIE1 5 -#define RXEN1 4 -#define TXEN1 3 -#define UCSZ12 2 -#define RXB81 1 -#define TXB81 0 - -#define UCSR1C _SFR_MEM8(0xCA) -#define UMSEL11 7 -#define UMSEL10 6 -#define UPM11 5 -#define UPM10 4 -#define USBS1 3 -#define UCSZ11 2 -#define UCSZ10 1 -#define UCPOL1 0 - -/* Reserved [0xCB] */ - -/* Combine UBRR1L and UBRR1H */ -#define UBRR1 _SFR_MEM16(0xCC) - -#define UBRR1L _SFR_MEM8(0xCC) -#define UBRR1H _SFR_MEM8(0xCD) - -#define UDR1 _SFR_MEM8(0XCE) - -/* Reserved [0xCF] */ - -#if defined(__ATmegaxx0__) - -# define UCSR2A _SFR_MEM8(0xD0) -# define RXC2 7 -# define TXC2 6 -# define UDRE2 5 -# define FE2 4 -# define DOR2 3 -# define UPE2 2 -# define U2X2 1 -# define MPCM2 0 - -# define UCSR2B _SFR_MEM8(0XD1) -# define RXCIE2 7 -# define TXCIE2 6 -# define UDRIE2 5 -# define RXEN2 4 -# define TXEN2 3 -# define UCSZ22 2 -# define RXB82 1 -# define TXB82 0 - -# define UCSR2C _SFR_MEM8(0xD2) -# define UMSEL21 7 -# define UMSEL20 6 -# define UPM21 5 -# define UPM20 4 -# define USBS2 3 -# define UCSZ21 2 -# define UCSZ20 1 -# define UCPOL2 0 - -/* Reserved [0xD3] */ - -/* Combine UBRR2L and UBRR2H */ -# define UBRR2 _SFR_MEM16(0xD4) - -# define UBRR2L _SFR_MEM8(0xD4) -# define UBRR2H _SFR_MEM8(0xD5) - -# define UDR2 _SFR_MEM8(0XD6) - -#endif /* __ATmegaxx0__ */ - -/* Reserved [0xD7..0xFF] */ - -#if defined(__ATmegaxx0__) - -# define PINH _SFR_MEM8(0x100) -# define PINH7 7 -# define PINH6 6 -# define PINH5 5 -# define PINH4 4 -# define PINH3 3 -# define PINH2 2 -# define PINH1 1 -# define PINH0 0 - -# define DDRH _SFR_MEM8(0x101) -# define DDH7 7 -# define DDH6 6 -# define DDH5 5 -# define DDH4 4 -# define DDH3 3 -# define DDH2 2 -# define DDH1 1 -# define DDH0 0 - -# define PORTH _SFR_MEM8(0x102) -# define PH7 7 -# define PH6 6 -# define PH5 5 -# define PH4 4 -# define PH3 3 -# define PH2 2 -# define PH1 1 -# define PH0 0 - -# define PINJ _SFR_MEM8(0x103) -# define PINJ7 7 -# define PINJ6 6 -# define PINJ5 5 -# define PINJ4 4 -# define PINJ3 3 -# define PINJ2 2 -# define PINJ1 1 -# define PINJ0 0 - -# define DDRJ _SFR_MEM8(0x104) -# define DDJ7 7 -# define DDJ6 6 -# define DDJ5 5 -# define DDJ4 4 -# define DDJ3 3 -# define DDJ2 2 -# define DDJ1 1 -# define DDJ0 0 - -# define PORTJ _SFR_MEM8(0x105) -# define PJ7 7 -# define PJ6 6 -# define PJ5 5 -# define PJ4 4 -# define PJ3 3 -# define PJ2 2 -# define PJ1 1 -# define PJ0 0 - -# define PINK _SFR_MEM8(0x106) -# define PINK7 7 -# define PINK6 6 -# define PINK5 5 -# define PINK4 4 -# define PINK3 3 -# define PINK2 2 -# define PINK1 1 -# define PINK0 0 - -# define DDRK _SFR_MEM8(0x107) -# define DDK7 7 -# define DDK6 6 -# define DDK5 5 -# define DDK4 4 -# define DDK3 3 -# define DDK2 2 -# define DDK1 1 -# define DDK0 0 - -# define PORTK _SFR_MEM8(0x108) -# define PK7 7 -# define PK6 6 -# define PK5 5 -# define PK4 4 -# define PK3 3 -# define PK2 2 -# define PK1 1 -# define PK0 0 - -# define PINL _SFR_MEM8(0x109) -# define PINL7 7 -# define PINL6 6 -# define PINL5 5 -# define PINL4 4 -# define PINL3 3 -# define PINL2 2 -# define PINL1 1 -# define PINL0 0 - -# define DDRL _SFR_MEM8(0x10A) -# define DDL7 7 -# define DDL6 6 -# define DDL5 5 -# define DDL4 4 -# define DDL3 3 -# define DDL2 2 -# define DDL1 1 -# define DDL0 0 - -# define PORTL _SFR_MEM8(0x10B) -# define PL7 7 -# define PL6 6 -# define PL5 5 -# define PL4 4 -# define PL3 3 -# define PL2 2 -# define PL1 1 -# define PL0 0 - -#endif /* __ATmegaxx0__ */ - -/* Reserved [0x10C..0x11F] */ - -#define TCCR5A _SFR_MEM8(0x120) -#define COM5A1 7 -#define COM5A0 6 -#define COM5B1 5 -#define COM5B0 4 -#define COM5C1 3 -#define COM5C0 2 -#define WGM51 1 -#define WGM50 0 - -#define TCCR5B _SFR_MEM8(0x121) -#define ICNC5 7 -#define ICES5 6 -#define WGM53 4 -#define WGM52 3 -#define CS52 2 -#define CS51 1 -#define CS50 0 - -#define TCCR5C _SFR_MEM8(0x122) -#define FOC5A 7 -#define FOC5B 6 -#define FOC5C 5 - -/* Reserved [0x123] */ - -/* Combine TCNT5L and TCNT5H */ -#define TCNT5 _SFR_MEM16(0x124) - -#define TCNT5L _SFR_MEM8(0x124) -#define TCNT5H _SFR_MEM8(0x125) - -/* Combine ICR5L and ICR5H */ -#define ICR5 _SFR_MEM16(0x126) - -#define ICR5L _SFR_MEM8(0x126) -#define ICR5H _SFR_MEM8(0x127) - -/* Combine OCR5AL and OCR5AH */ -#define OCR5A _SFR_MEM16(0x128) - -#define OCR5AL _SFR_MEM8(0x128) -#define OCR5AH _SFR_MEM8(0x129) - -/* Combine OCR5BL and OCR5BH */ -#define OCR5B _SFR_MEM16(0x12A) - -#define OCR5BL _SFR_MEM8(0x12A) -#define OCR5BH _SFR_MEM8(0x12B) - -/* Combine OCR5CL and OCR5CH */ -#define OCR5C _SFR_MEM16(0x12C) - -#define OCR5CL _SFR_MEM8(0x12C) -#define OCR5CH _SFR_MEM8(0x12D) - -/* Reserved [0x12E..0x12F] */ - -#if defined(__ATmegaxx0__) - -# define UCSR3A _SFR_MEM8(0x130) -# define RXC3 7 -# define TXC3 6 -# define UDRE3 5 -# define FE3 4 -# define DOR3 3 -# define UPE3 2 -# define U2X3 1 -# define MPCM3 0 - -# define UCSR3B _SFR_MEM8(0X131) -# define RXCIE3 7 -# define TXCIE3 6 -# define UDRIE3 5 -# define RXEN3 4 -# define TXEN3 3 -# define UCSZ32 2 -# define RXB83 1 -# define TXB83 0 - -# define UCSR3C _SFR_MEM8(0x132) -# define UMSEL31 7 -# define UMSEL30 6 -# define UPM31 5 -# define UPM30 4 -# define USBS3 3 -# define UCSZ31 2 -# define UCSZ30 1 -# define UCPOL3 0 - -/* Reserved [0x133] */ - -/* Combine UBRR3L and UBRR3H */ -# define UBRR3 _SFR_MEM16(0x134) - -# define UBRR3L _SFR_MEM8(0x134) -# define UBRR3H _SFR_MEM8(0x135) - -# define UDR3 _SFR_MEM8(0X136) - -#endif /* __ATmegaxx0__ */ - -/* Reserved [0x137..1FF] */ - -/* Interrupt vectors */ -/* Vector 0 is the reset vector */ -/* External Interrupt Request 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* External Interrupt Request 1 */ -#define INT1_vect _VECTOR(2) -#define SIG_INTERRUPT1 _VECTOR(2) - -/* External Interrupt Request 2 */ -#define INT2_vect _VECTOR(3) -#define SIG_INTERRUPT2 _VECTOR(3) - -/* External Interrupt Request 3 */ -#define INT3_vect _VECTOR(4) -#define SIG_INTERRUPT3 _VECTOR(4) - -/* External Interrupt Request 4 */ -#define INT4_vect _VECTOR(5) -#define SIG_INTERRUPT4 _VECTOR(5) - -/* External Interrupt Request 5 */ -#define INT5_vect _VECTOR(6) -#define SIG_INTERRUPT5 _VECTOR(6) - -/* External Interrupt Request 6 */ -#define INT6_vect _VECTOR(7) -#define SIG_INTERRUPT6 _VECTOR(7) - -/* External Interrupt Request 7 */ -#define INT7_vect _VECTOR(8) -#define SIG_INTERRUPT7 _VECTOR(8) - -/* Pin Change Interrupt Request 0 */ -#define PCINT0_vect _VECTOR(9) -#define SIG_PIN_CHANGE0 _VECTOR(9) - -/* Pin Change Interrupt Request 1 */ -#define PCINT1_vect _VECTOR(10) -#define SIG_PIN_CHANGE1 _VECTOR(10) - -#if defined(__ATmegaxx0__) -/* Pin Change Interrupt Request 2 */ -#define PCINT2_vect _VECTOR(11) -#define SIG_PIN_CHANGE2 _VECTOR(11) - -#endif /* __ATmegaxx0__ */ - -/* Watchdog Time-out Interrupt */ -#define WDT_vect _VECTOR(12) -#define SIG_WATCHDOG_TIMEOUT _VECTOR(12) - -/* Timer/Counter2 Compare Match A */ -#define TIMER2_COMPA_vect _VECTOR(13) -#define SIG_OUTPUT_COMPARE2A _VECTOR(13) - -/* Timer/Counter2 Compare Match B */ -#define TIMER2_COMPB_vect _VECTOR(14) -#define SIG_OUTPUT_COMPARE2B _VECTOR(14) - -/* Timer/Counter2 Overflow */ -#define TIMER2_OVF_vect _VECTOR(15) -#define SIG_OVERFLOW2 _VECTOR(15) - -/* Timer/Counter1 Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(16) -#define SIG_INPUT_CAPTURE1 _VECTOR(16) - -/* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPA_vect _VECTOR(17) -#define SIG_OUTPUT_COMPARE1A _VECTOR(17) - -/* Timer/Counter1 Compare Match B */ -#define TIMER1_COMPB_vect _VECTOR(18) -#define SIG_OUTPUT_COMPARE1B _VECTOR(18) - -/* Timer/Counter1 Compare Match C */ -#define TIMER1_COMPC_vect _VECTOR(19) -#define SIG_OUTPUT_COMPARE1C _VECTOR(19) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(20) -#define SIG_OVERFLOW1 _VECTOR(20) - -/* Timer/Counter0 Compare Match A */ -#define TIMER0_COMPA_vect _VECTOR(21) -#define SIG_OUTPUT_COMPARE0A _VECTOR(21) - -/* Timer/Counter0 Compare Match B */ -#define TIMER0_COMPB_vect _VECTOR(22) -#define SIG_OUTPUT_COMPARE0B _VECTOR(22) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(23) -#define SIG_OVERFLOW0 _VECTOR(23) - -/* SPI Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(24) -#define SIG_SPI _VECTOR(24) - -/* USART0, Rx Complete */ -#define USART0_RX_vect _VECTOR(25) -#define SIG_USART0_RECV _VECTOR(25) - -/* USART0 Data register Empty */ -#define USART0_UDRE_vect _VECTOR(26) -#define SIG_USART0_DATA _VECTOR(26) - -/* USART0, Tx Complete */ -#define USART0_TX_vect _VECTOR(27) -#define SIG_USART0_TRANS _VECTOR(27) - -/* Analog Comparator */ -#define ANALOG_COMP_vect _VECTOR(28) -#define SIG_COMPARATOR _VECTOR(28) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(29) -#define SIG_ADC _VECTOR(29) - -/* EEPROM Ready */ -#define EE_READY_vect _VECTOR(30) -#define SIG_EEPROM_READY _VECTOR(30) - -/* Timer/Counter3 Capture Event */ -#define TIMER3_CAPT_vect _VECTOR(31) -#define SIG_INPUT_CAPTURE3 _VECTOR(31) - -/* Timer/Counter3 Compare Match A */ -#define TIMER3_COMPA_vect _VECTOR(32) -#define SIG_OUTPUT_COMPARE3A _VECTOR(32) - -/* Timer/Counter3 Compare Match B */ -#define TIMER3_COMPB_vect _VECTOR(33) -#define SIG_OUTPUT_COMPARE3B _VECTOR(33) - -/* Timer/Counter3 Compare Match C */ -#define TIMER3_COMPC_vect _VECTOR(34) -#define SIG_OUTPUT_COMPARE3C _VECTOR(34) - -/* Timer/Counter3 Overflow */ -#define TIMER3_OVF_vect _VECTOR(35) -#define SIG_OVERFLOW3 _VECTOR(35) - -/* USART1, Rx Complete */ -#define USART1_RX_vect _VECTOR(36) -#define SIG_USART1_RECV _VECTOR(36) - -/* USART1 Data register Empty */ -#define USART1_UDRE_vect _VECTOR(37) -#define SIG_USART1_DATA _VECTOR(37) - -/* USART1, Tx Complete */ -#define USART1_TX_vect _VECTOR(38) -#define SIG_USART1_TRANS _VECTOR(38) - -/* 2-wire Serial Interface */ -#define TWI_vect _VECTOR(39) -#define SIG_2WIRE_SERIAL _VECTOR(39) - -/* Store Program Memory Read */ -#define SPM_READY_vect _VECTOR(40) -#define SIG_SPM_READY _VECTOR(40) - -#if defined(__ATmegaxx0__) -/* Timer/Counter4 Capture Event */ -#define TIMER4_CAPT_vect _VECTOR(41) -#define SIG_INPUT_CAPTURE4 _VECTOR(41) - -#endif /* __ATmegaxx0__ */ - -/* Timer/Counter4 Compare Match A */ -#define TIMER4_COMPA_vect _VECTOR(42) -#define SIG_OUTPUT_COMPARE4A _VECTOR(42) - -/* Timer/Counter4 Compare Match B */ -#define TIMER4_COMPB_vect _VECTOR(43) -#define SIG_OUTPUT_COMPARE4B _VECTOR(43) - -/* Timer/Counter4 Compare Match C */ -#define TIMER4_COMPC_vect _VECTOR(44) -#define SIG_OUTPUT_COMPARE4C _VECTOR(44) - -/* Timer/Counter4 Overflow */ -#define TIMER4_OVF_vect _VECTOR(45) -#define SIG_OVERFLOW4 _VECTOR(45) - -#if defined(__ATmegaxx0__) -/* Timer/Counter5 Capture Event */ -#define TIMER5_CAPT_vect _VECTOR(46) -#define SIG_INPUT_CAPTURE5 _VECTOR(46) - -#endif /* __ATmegaxx0__ */ - -/* Timer/Counter5 Compare Match A */ -#define TIMER5_COMPA_vect _VECTOR(47) -#define SIG_OUTPUT_COMPARE5A _VECTOR(47) - -/* Timer/Counter5 Compare Match B */ -#define TIMER5_COMPB_vect _VECTOR(48) -#define SIG_OUTPUT_COMPARE5B _VECTOR(48) - -/* Timer/Counter5 Compare Match C */ -#define TIMER5_COMPC_vect _VECTOR(49) -#define SIG_OUTPUT_COMPARE5C _VECTOR(49) - -/* Timer/Counter5 Overflow */ -#define TIMER5_OVF_vect _VECTOR(50) -#define SIG_OVERFLOW5 _VECTOR(50) - -#if defined(__ATmegaxx1__) - -# define _VECTORS_SIZE 204 - -#else - -/* USART2, Rx Complete */ -#define USART2_RX_vect _VECTOR(51) -#define SIG_USART2_RECV _VECTOR(51) - -/* USART2 Data register Empty */ -#define USART2_UDRE_vect _VECTOR(52) -#define SIG_USART2_DATA _VECTOR(52) - -/* USART2, Tx Complete */ -#define USART2_TX_vect _VECTOR(53) -#define SIG_USART2_TRANS _VECTOR(53) - -/* USART3, Rx Complete */ -#define USART3_RX_vect _VECTOR(54) -#define SIG_USART3_RECV _VECTOR(54) - -/* USART3 Data register Empty */ -#define USART3_UDRE_vect _VECTOR(55) -#define SIG_USART3_DATA _VECTOR(55) - -/* USART3, Tx Complete */ -#define USART3_TX_vect _VECTOR(56) -#define SIG_USART3_TRANS _VECTOR(56) - -# define _VECTORS_SIZE 228 - -#endif /* __ATmegaxx1__ */ - -#if defined(__ATmegaxx0__) -# undef __ATmegaxx0__ -#endif - -#if defined(__ATmegaxx1__) -# undef __ATmegaxx1__ -#endif - -#endif /* _AVR_IOMXX0_1_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iomxx4.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iomxx4.h deleted file mode 100644 index 26a396453..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iomxx4.h +++ /dev/null @@ -1,867 +0,0 @@ -/* Copyright (c) 2005, 2006, 2007 Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* avr/iomXX4.h - definitions for ATmega164P/324P/644P and ATmega644 */ - -/* $Id: iomxx4.h,v 1.13.2.4 2008/08/10 17:02:46 arcanum Exp $ */ - -#ifndef _AVR_IOMXX4_H_ -#define _AVR_IOMXX4_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iom164.h" -#else -# error "Attempt to include more than one file." -#endif - -/* Registers and associated bit numbers */ - -#define PINA _SFR_IO8(0X00) -#define PINA7 7 -#define PINA6 6 -#define PINA5 5 -#define PINA4 4 -#define PINA3 3 -#define PINA2 2 -#define PINA1 1 -#define PINA0 0 - -#define DDRA _SFR_IO8(0X01) -#define DDA7 7 -#define DDA6 6 -#define DDA5 5 -#define DDA4 4 -#define DDA3 3 -#define DDA2 2 -#define DDA1 1 -#define DDA0 0 - -#define PORTA _SFR_IO8(0X02) -#define PA7 7 -#define PA6 6 -#define PA5 5 -#define PA4 4 -#define PA3 3 -#define PA2 2 -#define PA1 1 -#define PA0 0 - -#define PINB _SFR_IO8(0X03) -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -#define DDRB _SFR_IO8(0x04) -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -#define PORTB _SFR_IO8(0x05) -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -#define PINC _SFR_IO8(0x06) -#define PINC7 7 -#define PINC6 6 -#define PINC5 5 -#define PINC4 4 -#define PINC3 3 -#define PINC2 2 -#define PINC1 1 -#define PINC0 0 - -#define DDRC _SFR_IO8(0x07) -#define DDC7 7 -#define DDC6 6 -#define DDC5 5 -#define DDC4 4 -#define DDC3 3 -#define DDC2 2 -#define DDC1 1 -#define DDC0 0 - -#define PORTC _SFR_IO8(0x08) -#define PC7 7 -#define PC6 6 -#define PC5 5 -#define PC4 4 -#define PC3 3 -#define PC2 2 -#define PC1 1 -#define PC0 0 - -#define PIND _SFR_IO8(0x09) -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -#define DDRD _SFR_IO8(0x0A) -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -#define PORTD _SFR_IO8(0x0B) -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -/* Reserved [0x0C..0x14] */ - -#define TIFR0 _SFR_IO8(0x15) -#define OCF0B 2 -#define OCF0A 1 -#define TOV0 0 - -#define TIFR1 _SFR_IO8(0x16) -#define ICF1 5 -#define OCF1B 2 -#define OCF1A 1 -#define TOV1 0 - -#define TIFR2 _SFR_IO8(0x17) -#define OCF2B 2 -#define OCF2A 1 -#define TOV2 0 - -/* Reserved [0x18..0x1A] */ - -#define PCIFR _SFR_IO8(0x1B) -#define PCIF3 3 -#define PCIF2 2 -#define PCIF1 1 -#define PCIF0 0 - -#define EIFR _SFR_IO8(0x1C) -#define INTF2 2 -#define INTF1 1 -#define INTF0 0 - -#define EIMSK _SFR_IO8(0x1D) -#define INT2 2 -#define INT1 1 -#define INT0 0 - -#define GPIOR0 _SFR_IO8(0x1E) - -#define EECR _SFR_IO8(0x1F) -/* EECR - EEPROM Control Register */ -#define EEPM1 5 -#define EEPM0 4 -#define EERIE 3 -#define EEMPE 2 -#define EEPE 1 -#define EERE 0 - -#define EEDR _SFR_IO8(0X20) - -/* Combine EEARL and EEARH */ -#define EEAR _SFR_IO16(0x21) -#define EEARL _SFR_IO8(0x21) -#define EEARH _SFR_IO8(0X22) - -/* 6-char sequence denoting where to find the EEPROM registers in memory space. - Adresses denoted in hex syntax with uppercase letters. Used by the EEPROM - subroutines. - First two letters: EECR address. - Second two letters: EEDR address. - Last two letters: EEAR address. */ -#define __EEPROM_REG_LOCATIONS__ 1F2021 - -#define GTCCR _SFR_IO8(0x23) -#define TSM 7 -#define PSRASY 1 -#define PSRSYNC 0 - -#define TCCR0A _SFR_IO8(0x24) -#define COM0A1 7 -#define COM0A0 6 -#define COM0B1 5 -#define COM0B0 4 -#define WGM01 1 -#define WGM00 0 - -#define TCCR0B _SFR_IO8(0x25) -#define FOC0A 7 -#define FOC0B 6 -#define WGM02 3 -#define CS02 2 -#define CS01 1 -#define CS00 0 - -#define TCNT0 _SFR_IO8(0X26) - -#define OCR0A _SFR_IO8(0X27) - -#define OCR0B _SFR_IO8(0X28) - -/* Reserved [0x29] */ - -#define GPIOR1 _SFR_IO8(0x2A) - -#define GPIOR2 _SFR_IO8(0x2B) - -#define SPCR _SFR_IO8(0x2C) -#define SPIE 7 -#define SPE 6 -#define DORD 5 -#define MSTR 4 -#define CPOL 3 -#define CPHA 2 -#define SPR1 1 -#define SPR0 0 - -#define SPSR _SFR_IO8(0x2D) -#define SPIF 7 -#define WCOL 6 -#define SPI2X 0 - -#define SPDR _SFR_IO8(0x2E) - -/* Reserved [0x2F] */ - -#define ACSR _SFR_IO8(0x30) -#define ACD 7 -#define ACBG 6 -#define ACO 5 -#define ACI 4 -#define ACIE 3 -#define ACIC 2 -#define ACIS1 1 -#define ACIS0 0 - -#define MONDR _SFR_IO8(0x31) -#define OCDR _SFR_IO8(0x31) -#define IDRD 7 -#define OCDR7 7 -#define OCDR6 6 -#define OCDR5 5 -#define OCDR4 4 -#define OCDR3 3 -#define OCDR2 2 -#define OCDR1 1 -#define OCDR0 0 - -/* Reserved [0x32] */ - -#define SMCR _SFR_IO8(0x33) -#define SM2 3 -#define SM1 2 -#define SM0 1 -#define SE 0 - -#define MCUSR _SFR_IO8(0x34) -#define JTRF 4 -#define WDRF 3 -#define BORF 2 -#define EXTRF 1 -#define PORF 0 - -#define MCUCR _SFR_IO8(0X35) -#define JTD 7 -#define BODS 6 -#define BODSE 5 -#define PUD 4 -#define IVSEL 1 -#define IVCE 0 - -/* Reserved [0x36] */ - -#define SPMCSR _SFR_IO8(0x37) -#define SPMIE 7 -#define RWWSB 6 -#define SIGRD 5 -#define RWWSRE 4 -#define BLBSET 3 -#define PGWRT 2 -#define PGERS 1 -#define SPMEN 0 - -/* Reserved [0x38..0x3C] */ - -/* SP [0x3D..0x3E] */ -/* SREG [0x3F] */ - -#define WDTCSR _SFR_MEM8(0x60) -#define WDIF 7 -#define WDIE 6 -#define WDP3 5 -#define WDCE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -#define CLKPR _SFR_MEM8(0x61) -#define CLKPCE 7 -#define CLKPS3 3 -#define CLKPS2 2 -#define CLKPS1 1 -#define CLKPS0 0 - -/* Reserved [0x62..0x63] */ - -#define PRR _SFR_MEM8(0x64) /* Datasheets: ATmega164P/324P/644P 8011DAVR02/07 - and ATmega644 2593LAVR02/07. */ -#define PRR0 _SFR_MEM8(0x64) /* AVR Studio 4.13, build 524. */ -#define PRTWI 7 -#define PRTIM2 6 -#define PRTIM0 5 -#if !defined(__AVR_ATmega644__) -# define PRUSART1 4 -#endif -#define PRTIM1 3 -#define PRSPI 2 -#define PRUSART0 1 -#define PRADC 0 - -/* Reserved [0x65] */ - -#define OSCCAL _SFR_MEM8(0x66) - -/* Reserved [0x67] */ - -#define PCICR _SFR_MEM8(0x68) -#define PCIE3 3 -#define PCIE2 2 -#define PCIE1 1 -#define PCIE0 0 - -#define EICRA _SFR_MEM8(0x69) -#define ISC21 5 -#define ISC20 4 -#define ISC11 3 -#define ISC10 2 -#define ISC01 1 -#define ISC00 0 - -/* Reserved [0x6A] */ - -#define PCMSK0 _SFR_MEM8(0x6B) -#define PCINT7 7 -#define PCINT6 6 -#define PCINT5 5 -#define PCINT4 4 -#define PCINT3 3 -#define PCINT2 2 -#define PCINT1 1 -#define PCINT0 0 - -#define PCMSK1 _SFR_MEM8(0x6C) -#define PCINT15 7 -#define PCINT14 6 -#define PCINT13 5 -#define PCINT12 4 -#define PCINT11 3 -#define PCINT10 2 -#define PCINT9 1 -#define PCINT8 0 - -#define PCMSK2 _SFR_MEM8(0x6D) -#define PCINT23 7 -#define PCINT22 6 -#define PCINT21 5 -#define PCINT20 4 -#define PCINT19 3 -#define PCINT18 2 -#define PCINT17 1 -#define PCINT16 0 - -#define TIMSK0 _SFR_MEM8(0x6E) -#define OCIE0B 2 -#define OCIE0A 1 -#define TOIE0 0 - -#define TIMSK1 _SFR_MEM8(0x6F) -#define ICIE1 5 -#define OCIE1B 2 -#define OCIE1A 1 -#define TOIE1 0 - -#define TIMSK2 _SFR_MEM8(0x70) -#define OCIE2B 2 -#define OCIE2A 1 -#define TOIE2 0 - -/* Reserved [0x71..0x72] */ - -#define PCMSK3 _SFR_MEM8(0x73) -#define PCINT31 7 -#define PCINT30 6 -#define PCINT29 5 -#define PCINT28 4 -#define PCINT27 3 -#define PCINT26 2 -#define PCINT25 1 -#define PCINT24 0 - -/* Reserved [0x74..0x77] */ - -/* Combine ADCL and ADCH */ -#ifndef __ASSEMBLER__ -#define ADC _SFR_MEM16(0x78) -#endif -#define ADCW _SFR_MEM16(0x78) -#define ADCL _SFR_MEM8(0x78) -#define ADCH _SFR_MEM8(0x79) - -#define ADCSRA _SFR_MEM8(0x7A) -#define ADEN 7 -#define ADSC 6 -#define ADATE 5 -#define ADIF 4 -#define ADIE 3 -#define ADPS2 2 -#define ADPS1 1 -#define ADPS0 0 - -#define ADCSRB _SFR_MEM8(0x7B) -#define ACME 6 -#define ADTS2 2 -#define ADTS1 1 -#define ADTS0 0 - -#define ADMUX _SFR_MEM8(0x7C) -#define REFS1 7 -#define REFS0 6 -#define ADLAR 5 -#define MUX4 4 -#define MUX3 3 -#define MUX2 2 -#define MUX1 1 -#define MUX0 0 - -/* Reserved [0x7D] */ - -#define DIDR0 _SFR_MEM8(0x7E) -#define ADC7D 7 -#define ADC6D 6 -#define ADC5D 5 -#define ADC4D 4 -#define ADC3D 3 -#define ADC2D 2 -#define ADC1D 1 -#define ADC0D 0 - -#define DIDR1 _SFR_MEM8(0x7F) -#define AIN1D 1 -#define AIN0D 0 - -#define TCCR1A _SFR_MEM8(0x80) -#define COM1A1 7 -#define COM1A0 6 -#define COM1B1 5 -#define COM1B0 4 -#define WGM11 1 -#define WGM10 0 - -#define TCCR1B _SFR_MEM8(0x81) -#define ICNC1 7 -#define ICES1 6 -#define WGM13 4 -#define WGM12 3 -#define CS12 2 -#define CS11 1 -#define CS10 0 - -#define TCCR1C _SFR_MEM8(0x82) -#define FOC1A 7 -#define FOC1B 6 - -/* Reserved [0x83] */ - -/* Combine TCNT1L and TCNT1H */ -#define TCNT1 _SFR_MEM16(0x84) - -#define TCNT1L _SFR_MEM8(0x84) -#define TCNT1H _SFR_MEM8(0x85) - -/* Combine ICR1L and ICR1H */ -#define ICR1 _SFR_MEM16(0x86) - -#define ICR1L _SFR_MEM8(0x86) -#define ICR1H _SFR_MEM8(0x87) - -/* Combine OCR1AL and OCR1AH */ -#define OCR1A _SFR_MEM16(0x88) - -#define OCR1AL _SFR_MEM8(0x88) -#define OCR1AH _SFR_MEM8(0x89) - -/* Combine OCR1BL and OCR1BH */ -#define OCR1B _SFR_MEM16(0x8A) - -#define OCR1BL _SFR_MEM8(0x8A) -#define OCR1BH _SFR_MEM8(0x8B) - -/* Reserved [0x8C..0xAF] */ - -#define TCCR2A _SFR_MEM8(0xB0) -#define COM2A1 7 -#define COM2A0 6 -#define COM2B1 5 -#define COM2B0 4 -#define WGM21 1 -#define WGM20 0 - -#define TCCR2B _SFR_MEM8(0xB1) -#define FOC2A 7 -#define FOC2B 6 -#define WGM22 3 -#define CS22 2 -#define CS21 1 -#define CS20 0 - -#define TCNT2 _SFR_MEM8(0xB2) - -#define OCR2A _SFR_MEM8(0xB3) - -#define OCR2B _SFR_MEM8(0xB4) - -/* Reserved [0xB5] */ - -#define ASSR _SFR_MEM8(0xB6) -#define EXCLK 6 -#define AS2 5 -#define TCN2UB 4 -#define OCR2AUB 3 -#define OCR2BUB 2 -#define TCR2AUB 1 -#define TCR2BUB 0 - -/* Reserved [0xB7] */ - -#define TWBR _SFR_MEM8(0xB8) - -#define TWSR _SFR_MEM8(0xB9) -#define TWS7 7 -#define TWS6 6 -#define TWS5 5 -#define TWS4 4 -#define TWS3 3 -#define TWPS1 1 -#define TWPS0 0 - -#define TWAR _SFR_MEM8(0xBA) -#define TWA6 7 -#define TWA5 6 -#define TWA4 5 -#define TWA3 4 -#define TWA2 3 -#define TWA1 2 -#define TWA0 1 -#define TWGCE 0 - -#define TWDR _SFR_MEM8(0xBB) - -#define TWCR _SFR_MEM8(0xBC) -#define TWINT 7 -#define TWEA 6 -#define TWSTA 5 -#define TWSTO 4 -#define TWWC 3 -#define TWEN 2 -#define TWIE 0 - -#define TWAMR _SFR_MEM8(0xBD) -#define TWAM6 7 -#define TWAM5 6 -#define TWAM4 5 -#define TWAM3 4 -#define TWAM2 3 -#define TWAM1 2 -#define TWAM0 1 - -/* Reserved [0xBE..0xBF] */ - -#define UCSR0A _SFR_MEM8(0xC0) -#define RXC0 7 -#define TXC0 6 -#define UDRE0 5 -#define FE0 4 -#define DOR0 3 -#define UPE0 2 -#define U2X0 1 -#define MPCM0 0 - -#define UCSR0B _SFR_MEM8(0XC1) -#define RXCIE0 7 -#define TXCIE0 6 -#define UDRIE0 5 -#define RXEN0 4 -#define TXEN0 3 -#define UCSZ02 2 -#define RXB80 1 -#define TXB80 0 - -#define UCSR0C _SFR_MEM8(0xC2) -#define UMSEL01 7 -#define UMSEL00 6 -#define UPM01 5 -#define UPM00 4 -#define USBS0 3 -#define UCSZ01 2 -#define UCSZ00 1 -#define UCPHA0 1 -#define UCPOL0 0 - -/* Reserved [0xC3] */ - -/* Combine UBRR0L and UBRR0H */ -#define UBRR0 _SFR_MEM16(0xC4) - -#define UBRR0L _SFR_MEM8(0xC4) -#define UBRR0H _SFR_MEM8(0xC5) - -#define UDR0 _SFR_MEM8(0XC6) - -#if !defined(__AVR_ATmega644__) -/* - * Only ATmega164P/324P/644P have a second USART. - */ -/* Reserved [0xC7] */ - -#define UCSR1A _SFR_MEM8(0xC8) -#define RXC1 7 -#define TXC1 6 -#define UDRE1 5 -#define FE1 4 -#define DOR1 3 -#define UPE1 2 -#define U2X1 1 -#define MPCM1 0 - -#define UCSR1B _SFR_MEM8(0XC9) -#define RXCIE1 7 -#define TXCIE1 6 -#define UDRIE1 5 -#define RXEN1 4 -#define TXEN1 3 -#define UCSZ12 2 -#define RXB81 1 -#define TXB81 0 - -#define UCSR1C _SFR_MEM8(0xCA) -#define UMSEL11 7 -#define UMSEL10 6 -#define UPM11 5 -#define UPM10 4 -#define USBS1 3 -#define UCSZ11 2 -#define UCSZ10 1 -#define UCPHA1 1 -#define UCPOL1 0 - -/* Reserved [0xCB] */ - -/* Combine UBRR1L and UBRR1H */ -#define UBRR1 _SFR_MEM16(0xCC) - -#define UBRR1L _SFR_MEM8(0xCC) -#define UBRR1H _SFR_MEM8(0xCD) - -#define UDR1 _SFR_MEM8(0XCE) -#endif /* !defined(__AVR_ATmega644) */ - -/* Reserved [0xCF..0xFF] */ - -/* Interrupt vectors */ -/* Vector 0 is the reset vector */ -/* External Interrupt Request 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* External Interrupt Request 1 */ -#define INT1_vect _VECTOR(2) -#define SIG_INTERRUPT1 _VECTOR(2) - -/* External Interrupt Request 2 */ -#define INT2_vect _VECTOR(3) -#define SIG_INTERRUPT2 _VECTOR(3) - -/* Pin Change Interrupt Request 0 */ -#define PCINT0_vect _VECTOR(4) -#define SIG_PIN_CHANGE0 _VECTOR(4) - -/* Pin Change Interrupt Request 1 */ -#define PCINT1_vect _VECTOR(5) -#define SIG_PIN_CHANGE1 _VECTOR(5) - -/* Pin Change Interrupt Request 2 */ -#define PCINT2_vect _VECTOR(6) -#define SIG_PIN_CHANGE2 _VECTOR(6) - -/* Pin Change Interrupt Request 3 */ -#define PCINT3_vect _VECTOR(7) -#define SIG_PIN_CHANGE3 _VECTOR(7) - -/* Watchdog Time-out Interrupt */ -#define WDT_vect _VECTOR(8) -#define SIG_WATCHDOG_TIMEOUT _VECTOR(8) - -/* Timer/Counter2 Compare Match A */ -#define TIMER2_COMPA_vect _VECTOR(9) -#define SIG_OUTPUT_COMPARE2A _VECTOR(9) - -/* Timer/Counter2 Compare Match B */ -#define TIMER2_COMPB_vect _VECTOR(10) -#define SIG_OUTPUT_COMPARE2B _VECTOR(10) - -/* Timer/Counter2 Overflow */ -#define TIMER2_OVF_vect _VECTOR(11) -#define SIG_OVERFLOW2 _VECTOR(11) - -/* Timer/Counter1 Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(12) -#define SIG_INPUT_CAPTURE1 _VECTOR(12) - -/* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPA_vect _VECTOR(13) -#define SIG_OUTPUT_COMPARE1A _VECTOR(13) - -/* Timer/Counter1 Compare Match B */ -#define TIMER1_COMPB_vect _VECTOR(14) -#define SIG_OUTPUT_COMPARE1B _VECTOR(14) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(15) -#define SIG_OVERFLOW1 _VECTOR(15) - -/* Timer/Counter0 Compare Match A */ -#define TIMER0_COMPA_vect _VECTOR(16) -#define SIG_OUTPUT_COMPARE0A _VECTOR(16) - -/* Timer/Counter0 Compare Match B */ -#define TIMER0_COMPB_vect _VECTOR(17) -#define SIG_OUTPUT_COMPARE0B _VECTOR(17) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(18) -#define SIG_OVERFLOW0 _VECTOR(18) - -/* SPI Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(19) -#define SIG_SPI _VECTOR(19) - -/* USART0, Rx Complete */ -#define USART0_RX_vect _VECTOR(20) -#define SIG_USART_RECV _VECTOR(20) - -/* USART0 Data register Empty */ -#define USART0_UDRE_vect _VECTOR(21) -#define SIG_USART_DATA _VECTOR(21) - -/* USART0, Tx Complete */ -#define USART0_TX_vect _VECTOR(22) -#define SIG_USART_TRANS _VECTOR(22) - -/* Analog Comparator */ -#define ANALOG_COMP_vect _VECTOR(23) -#define SIG_COMPARATOR _VECTOR(23) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(24) -#define SIG_ADC _VECTOR(24) - -/* EEPROM Ready */ -#define EE_READY_vect _VECTOR(25) -#define SIG_EEPROM_READY _VECTOR(25) - -/* 2-wire Serial Interface */ -#define TWI_vect _VECTOR(26) -#define SIG_2WIRE_SERIAL _VECTOR(26) - -/* Store Program Memory Read */ -#define SPM_READY_vect _VECTOR(27) -#define SIG_SPM_READY _VECTOR(27) - -#if defined(__AVR_ATmega644__) - -# define _VECTORS_SIZE 112 - -#else /* !defined(__AVR_ATmega644__) */ - -/* USART1, Rx Complete */ -/* USART1 RX complete */ -#define USART1_RX_vect _VECTOR(28) -#define SIG_USART1_RECV _VECTOR(28) - -/* USART1 Data register Empty */ -/* USART1 Data Register Empty */ -#define USART1_UDRE_vect _VECTOR(29) -#define SIG_USART1_DATA _VECTOR(29) - -/* USART1, Tx Complete */ -/* USART1 TX complete */ -#define USART1_TX_vect _VECTOR(30) -#define SIG_USART1_TRANS _VECTOR(30) - -# define _VECTORS_SIZE 124 - -#endif /* defined(__AVR_ATmega644__) */ - - -#endif /* _AVR_IOMXX4_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iomxxhva.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iomxxhva.h deleted file mode 100644 index b965eb530..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iomxxhva.h +++ /dev/null @@ -1,523 +0,0 @@ -/* Copyright (c) 2007, Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iomxxhva.h,v 1.1 2007/05/13 20:21:05 aesok Exp $ */ - -/* iomxxhva.h - definitions for ATmega8HVA and ATmega16HVA. */ - -#ifndef _AVR_IOMXXHVA_H_ -#define _AVR_IOMXXHVA_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iomxxhva.h" -#else -# error "Attempt to include more than one file." -#endif - -/* Registers and associated bit numbers */ - -#define PINA _SFR_IO8(0X00) -#define PINA1 1 -#define PINA0 0 - -#define DDRA _SFR_IO8(0x01) -#define DDA1 1 -#define DDA0 0 - -#define PORTA _SFR_IO8(0x02) -#define PA1 1 -#define PA0 0 - -#define PINB _SFR_IO8(0X03) -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -#define DDRB _SFR_IO8(0x04) -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -#define PORTB _SFR_IO8(0x05) -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -#define PINC _SFR_IO8(0x06) -#define PINC0 0 - -/* Reserved [0x7] */ - -#define PORTC _SFR_IO8(0x08) -#define PC0 0 - -/* Reserved [0x9..0x14] */ - -#define TIFR0 _SFR_IO8(0x15) -#define ICF0 3 -#define OCF0B 2 -#define OCF0A 1 -#define TOV0 0 - -#define TIFR1 _SFR_IO8(0x16) -#define ICF1 3 -#define OCF1B 2 -#define OCF1A 1 -#define TOV1 0 - -#define OSICSR _SFR_IO8(0x17) -#define OSISEL0 4 -#define OSIST 1 -#define OSIEN 0 - -/* Reserved [0x18..0x1B] */ - -#define EIFR _SFR_IO8(0x1C) -#define INTF2 2 -#define INTF1 1 -#define INTF0 0 - -#define EIMSK _SFR_IO8(0x1D) -#define INT2 2 -#define INT1 1 -#define INT0 0 - -#define GPIOR0 _SFR_IO8(0x1E) - -#define EECR _SFR_IO8(0x1F) -#define EEPM1 5 -#define EEPM0 4 -#define EERIE 3 -#define EEMPE 2 -#define EEPE 1 -#define EERE 0 - -#define EEDR _SFR_IO8(0x20) - -#define EEAR _SFR_IO8(0x21) -#define EEARL _SFR_IO8(0x21) - -/* 6-char sequence denoting where to find the EEPROM registers in memory space. - Adresses denoted in hex syntax with uppercase letters. Used by the EEPROM - subroutines. - First two letters: EECR address. - Second two letters: EEDR address. - Last two letters: EEAR address. */ -#define __EEPROM_REG_LOCATIONS__ 1F2021 - -/* Reserved [0x22] */ - -#define GTCCR _SFR_IO8(0x23) -#define TSM 7 -#define PSRSYNC 0 - -#define TCCR0A _SFR_IO8(0x24) -#define TCW0 7 -#define ICEN0 6 -#define ICNC0 5 -#define ICES0 4 -#define ICS0 3 -#define WGM00 0 - -#define TCCR0B _SFR_IO8(0x25) -#define CS02 2 -#define CS01 1 -#define CS00 0 - -#define TCNT0 _SFR_IO16(0X26) -#define TCNT0L _SFR_IO8(0X26) -#define TCNT0H _SFR_IO8(0X27) - -#define OCR0A _SFR_IO8(0x28) - -#define OCR0B _SFR_IO8(0X29) - -#define GPIOR1 _SFR_IO8(0x2A) - -#define GPIOR2 _SFR_IO8(0x2B) - -#define SPCR _SFR_IO8(0x2C) -#define SPIE 7 -#define SPE 6 -#define DORD 5 -#define MSTR 4 -#define CPOL 3 -#define CPHA 2 -#define SPR1 1 -#define SPR0 0 - -#define SPSR _SFR_IO8(0x2D) -#define SPIF 7 -#define WCOL 6 -#define SPI2X 0 - -#define SPDR _SFR_IO8(0x2E) - -/* Reserved [0x2F..0x30] */ - -#define DWDR _SFR_IO8(0x31) -#define IDRD 7 - -/* Reserved [0x32] */ - -#define SMCR _SFR_IO8(0x33) -#define SM2 3 -#define SM1 2 -#define SM0 1 -#define SE 0 - -#define MCUSR _SFR_IO8(0x34) -#define OCDRF 4 -#define WDRF 3 -#define BORF 2 -#define EXTRF 1 -#define PORF 0 - -#define MCUCR _SFR_IO8(0x35) -#define CKOE 5 -#define PUD 4 - -/* Reserved [0x36] */ - -#define SPMCSR _SFR_IO8(0x37) -#define SIGRD 5 -#define CTPB 4 -#define RFLB 3 -#define PGWRT 2 -#define PGERS 1 -#define SPMEN 0 - -/* Reserved [0x38..0x3C] */ - -/* SP [0x3D..0x3E] */ -/* SREG [0x3F] */ - -#define WDTCSR _SFR_MEM8(0x60) -#define WDIF 7 -#define WDIE 6 -#define WDP3 5 -#define WDCE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -#define CLKPR _SFR_MEM8(0x61) -#define CLKPCE 7 -#define CLKPS1 1 -#define CLKPS0 0 - -/* Reserved [0x62..0x63] */ - -#define PRR0 _SFR_MEM8(0x64) -#define PRVRM 5 -#define PRSPI 3 -#define PRTIM1 2 -#define PRTIM0 1 -#define PRVADC 0 - -/* Reserved [0x65] */ - -#define FOSCCAL _SFR_MEM8(0x66) - -/* Reserved [0x67..0x68] */ - -#define EICRA _SFR_MEM8(0x69) -#define ISC21 5 -#define ISC20 4 -#define ISC11 3 -#define ISC10 2 -#define ISC01 1 -#define ISC00 0 - -/* Reserved [0x6A..0x6D] */ - -#define TIMSK0 _SFR_MEM8(0x6E) -#define ICIE0 3 -#define OCIE0B 2 -#define OCIE0A 1 -#define TOIE0 0 - -#define TIMSK1 _SFR_MEM8(0x6F) -#define ICIE1 3 -#define OCIE1B 2 -#define OCIE1A 1 -#define TOIE1 0 - -/* Reserved [0x70..0x77] */ - -#define VADC _SFR_MEM16(0x78) -#define VADCL _SFR_MEM8(0x78) -#define VADCH _SFR_MEM8(0x79) - -#define VADCSR _SFR_MEM8(0x7A) -#define VADEN 3 -#define VADSC 2 -#define VADCCIF 1 -#define VADCCIE 0 - -/* Reserved [0x7B] */ - -#define VADMUX _SFR_MEM8(0x7C) -#define VADMUX3 3 -#define VADMUX2 2 -#define VADMUX1 1 -#define VADMUX0 0 - -/* Reserved [0x7D] */ - -#define DIDR0 _SFR_MEM8(0x7E) -#define PA1DID 1 -#define PA0DID 0 - -/* Reserved [0x7F] */ - -#define TCCR1A _SFR_MEM8(0x80) -#define TCW1 7 -#define ICEN1 6 -#define ICNC1 5 -#define ICES1 4 -#define ICS1 3 -#define WGM10 0 - -#define TCCR1B _SFR_MEM8(0x81) -#define CS12 2 -#define CS11 1 -#define CS10 0 - -/* Reserved [0x82..0x83] */ - -#define TCNT1 _SFR_MEM16(0x84) -#define TCNT1L _SFR_MEM8(0x84) -#define TCNT1H _SFR_MEM8(0x85) - -/* Reserved [0x86..0x87] */ - -#define OCR1A _SFR_MEM8(0x88) - -#define OCR1B _SFR_MEM8(0x89) - -/* Reserved [0x8A..0xC7] */ - -#define ROCR _SFR_MEM8(0xC8) -#define ROCS 7 -#define ROCWIF 1 -#define ROCWIE 0 - -/* Reserved [0xC9..0xCF] */ - -#define BGCCR _SFR_MEM8(0xD0) -#define BGD 7 -#define BGCC5 5 -#define BGCC4 4 -#define BGCC3 3 -#define BGCC2 2 -#define BGCC1 1 -#define BGCC0 0 - -#define BGCRR _SFR_MEM8(0xD1) -#define BGCR7 7 -#define BGCR6 6 -#define BGCR5 5 -#define BGCR4 4 -#define BGCR3 3 -#define BGCR2 2 -#define BGCR1 1 -#define BGCR0 0 - -/* Reserved [0xD2..0xDF] */ - -/* CC-ADC Accumulate Current */ -/* TODO: Add _SFR_MEM32 */ -/* #define CADAC _SFR_MEM32(0xE0) */ -#define CADAC0 _SFR_MEM8(0xE0) -#define CADAC1 _SFR_MEM8(0xE1) -#define CADAC2 _SFR_MEM8(0xE2) -#define CADAC3 _SFR_MEM8(0xE3) - -#define CADCSRA _SFR_MEM8(0xE4) -#define CADEN 7 -#define CADPOL 6 -#define CADUB 5 -#define CADAS1 4 -#define CADAS0 3 -#define CADSI1 2 -#define CADSI0 1 -#define CADSE 0 - -#define CADCSRB _SFR_MEM8(0xE5) -#define CADACIE 6 -#define CADRCIE 5 -#define CADICIE 4 -#define CADACIF 2 -#define CADRCIF 1 -#define CADICIF 0 - -#define CADRC _SFR_MEM8(0xE6) - -/* Reserved [0xE7] */ - -#define CADIC _SFR_MEM16(0xE8) -#define CADICL _SFR_MEM8(0xE8) -#define CADICH _SFR_MEM8(0xE9) - -/* Reserved [0xEA..0xEF] */ - -#define FCSR _SFR_MEM8(0xF0) -#define DUVRD 3 -#define CPS 2 -#define DFE 1 -#define CFE 0 - -/* Reserved [0xF1] */ - -#define BPIMSK _SFR_MEM8(0xF2) -#define SCIE 4 -#define DOCIE 3 -#define COCIE 2 -#define DHCIE 1 -#define CHCIE 0 - -#define BPIFR _SFR_MEM8(0xF3) -#define SCIF 4 -#define DOCIF 3 -#define COCIF 2 -#define DHCIF 1 -#define CHCIF 0 - -/* Reserved [0xF4] */ - -#define BPSCD _SFR_MEM8(0xF5) - -#define BPDOCD _SFR_MEM8(0xF6) - -#define BPCOCD _SFR_MEM8(0xF7) - -#define BPDHCD _SFR_MEM8(0xF8) - -#define BPCHCD _SFR_MEM8(0xF9) - -#define BPSCTR _SFR_MEM8(0xFA) - -#define BPOCTR _SFR_MEM8(0xFB) - -#define BPHCTR _SFR_MEM8(0xFC) - -#define BPCR _SFR_MEM8(0xFD) -#define SCD 4 -#define DOCD 3 -#define COCD 2 -#define DHCD 1 -#define CHCD 0 - -#define BPPLR _SFR_MEM8(0xFE) -#define BPPLE 1 -#define BPPL 0 - -/* Reserved [0xFF] */ - -/* Interrupt vectors */ -/* Battery Protection Interrupt */ -#define BPINT_vect _VECTOR(1) - -/* Voltage Regulator Monitor Interrupt */ -#define VREGMON_vect _VECTOR(2) - -/* External Interrupt Request 0 */ -#define INT0_vect _VECTOR(3) - -/* External Interrupt Request 1 */ -#define INT1_vect _VECTOR(4) - -/* External Interrupt Request 2 */ -#define INT2_vect _VECTOR(5) - -/* Watchdog Timeout Interrupt */ -#define WDT_vect _VECTOR(6) - -/* Timer/Counter 1 Input Capture */ -#define TIMER1_IC_vect _VECTOR(7) - -/* Timer/Counter 1 Compare A Match */ -#define TIMER1_COMPA_vect _VECTOR(8) - -/* Timer/Counter 1 Compare B Match */ -#define TIMER1_COMPB_vect _VECTOR(9) - -/* Timer/Counter 1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(10) - -/* Timer/Counter 0 Input Capture */ -#define TIMER0_IC_vect _VECTOR(11) - -/* Timer/Counter0 Compare A Match */ -#define TIMER0_COMPA_vect _VECTOR(12) - -/* Timer/Counter0 Compare B Match */ -#define TIMER0_COMPB_vect _VECTOR(13) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(14) - -/* SPI Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(15) - -/* Voltage ADC Conversion Complete */ -#define VADC_vect _VECTOR(16) - -/* Coulomb Counter ADC Conversion Complete */ -#define CCADC_CONV_vect _VECTOR(17) - -/* Coloumb Counter ADC Regular Current */ -#define CCADC_REG_CUR_vect _VECTOR(18) - -/* Coloumb Counter ADC Accumulator */ -#define CCADC_ACC_vect _VECTOR(19) - -/* EEPROM Ready */ -#define EE_READY_vect _VECTOR(20) - -#if defined (__AVR_ATmega16HVA__) -# define _VECTORS_SIZE 84 -#else -# define _VECTORS_SIZE 42 -#endif - - -#endif /* _AVR_IOMXXHVA_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn11.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn11.h deleted file mode 100644 index 4b2d8a6e3..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn11.h +++ /dev/null @@ -1,234 +0,0 @@ -/* Copyright (c) 2002,2005 Marek Michalkiewicz - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iotn11.h,v 1.9.2.5 2008/10/17 23:27:51 arcanum Exp $ */ - -/* avr/iotn11.h - definitions for ATtiny10/11 */ - -#ifndef _AVR_IOTN11_H_ -#define _AVR_IOTN11_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iotn11.h" -#else -# error "Attempt to include more than one file." -#endif - -#ifndef __ASSEMBLER__ -# warning "MCU not supported by the C compiler" -#endif - -/* I/O registers */ - -/* 0x00..0x07 reserved */ - -/* Analog Comparator Control and Status Register */ -#define ACSR _SFR_IO8(0x08) - -/* 0x09..0x15 reserved */ - -/* Input Pins, Port B */ -#define PINB _SFR_IO8(0x16) - -/* Data Direction Register, Port B */ -#define DDRB _SFR_IO8(0x17) - -/* Data Register, Port B */ -#define PORTB _SFR_IO8(0x18) - -/* 0x19..0x20 reserved */ - -/* Watchdog Timer Control Register */ -#define WDTCR _SFR_IO8(0x21) - -/* 0x22..0x31 reserved */ - -/* Timer/Counter0 (8-bit) */ -#define TCNT0 _SFR_IO8(0x32) - -/* Timer/Counter0 Control Register */ -#define TCCR0 _SFR_IO8(0x33) - -/* MCU general Status Register */ -#define MCUSR _SFR_IO8(0x34) - -/* MCU general Control Register */ -#define MCUCR _SFR_IO8(0x35) - -/* 0x36..0x37 reserved */ - -/* Timer/Counter Interrupt Flag Register */ -#define TIFR _SFR_IO8(0x38) - -/* Timer/Counter Interrupt MaSK Register */ -#define TIMSK _SFR_IO8(0x39) - -/* General Interrupt Flag Register */ -#define GIFR _SFR_IO8(0x3A) - -/* General Interrupt MaSK register */ -#define GIMSK _SFR_IO8(0x3B) - -/* 0x3C..0x3E reserved */ - -/* 0x3F SREG */ - -/* Interrupt vectors */ - -/* External Interrupt 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* External Interrupt Request 0 */ -#define IO_PINS_vect _VECTOR(2) -#define SIG_PIN _VECTOR(2) -#define SIG_PIN_CHANGE _VECTOR(2) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(3) -#define SIG_OVERFLOW0 _VECTOR(3) - -/* Analog Comparator */ -#define ANA_COMP_vect _VECTOR(4) -#define SIG_COMPARATOR _VECTOR(4) - -#define _VECTORS_SIZE 10 - -/* Bit numbers */ - -/* GIMSK */ -#define INT0 6 -#define PCIE 5 - -/* GIFR */ -#define INTF0 6 -#define PCIF 5 - -/* TIMSK */ -#define TOIE0 1 - -/* TIFR */ -#define TOV0 1 - -/* MCUCR */ -#define SE 5 -#define SM 4 -#define ISC01 1 -#define ISC00 0 - -/* TCCR0 */ -#define CS02 2 -#define CS01 1 -#define CS00 0 - -/* WDTCR */ -#define WDTOE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -/* - PB5 = RESET# - PB4 = XTAL2 - PB3 = XTAL1 - PB2 = T0 - PB1 = INT0 / AIN1 - PB0 = AIN0 - */ - -/* PORTB */ -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -/* DDRB */ -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -/* PINB */ -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -/* ACSR */ -#define ACD 7 -#define ACO 5 -#define ACI 4 -#define ACIE 3 -#define ACIS1 1 -#define ACIS0 0 - -/* Last memory addresses */ -#define RAMEND 0x1F -#define XRAMEND 0x0 -#define E2END 0x0 -#define E2PAGESIZE 2 -#define FLASHEND 0x3FF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 1 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_RSTDISBL (unsigned char)~_BV(3) -#define FUSE_FSTRT (unsigned char)~_BV(4) -#define FUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL1) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x90 -#define SIGNATURE_2 0x04 - - -#endif /* _AVR_IOTN11_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn12.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn12.h deleted file mode 100644 index 396c1b8d0..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn12.h +++ /dev/null @@ -1,265 +0,0 @@ -/* Copyright (c) 2002,2005 Marek Michalkiewicz - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iotn12.h,v 1.10.2.5 2008/10/17 23:27:51 arcanum Exp $ */ - -/* avr/iotn12.h - definitions for ATtiny12 */ - -#ifndef _AVR_IOTN12_H_ -#define _AVR_IOTN12_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iotn12.h" -#else -# error "Attempt to include more than one file." -#endif - -#ifndef __ASSEMBLER__ -# warning "MCU not supported by the C compiler" -#endif - -/* I/O registers */ - -/* 0x00..0x07 reserved */ - -/* Analog Comparator Control and Status Register */ -#define ACSR _SFR_IO8(0x08) - -/* 0x09..0x15 reserved */ - -/* Input Pins, Port B */ -#define PINB _SFR_IO8(0x16) - -/* Data Direction Register, Port B */ -#define DDRB _SFR_IO8(0x17) - -/* Data Register, Port B */ -#define PORTB _SFR_IO8(0x18) - -/* 0x19..0x1B reserved */ - -/* EEPROM Control Register */ -#define EECR _SFR_IO8(0x1C) - -/* EEPROM Data Register */ -#define EEDR _SFR_IO8(0x1D) - -/* EEPROM Address Register */ -#define EEAR _SFR_IO8(0x1E) -#define EEARL _SFR_IO8(0x1E) - -/* 0x1F..0x20 reserved */ - -/* Watchdog Timer Control Register */ -#define WDTCR _SFR_IO8(0x21) - -/* 0x22..0x30 reserved */ - -/* Oscillator Calibration Register */ -#define OSCCAL _SFR_IO8(0x31) - -/* Timer/Counter0 (8-bit) */ -#define TCNT0 _SFR_IO8(0x32) - -/* Timer/Counter0 Control Register */ -#define TCCR0 _SFR_IO8(0x33) - -/* MCU general Status Register */ -#define MCUSR _SFR_IO8(0x34) - -/* MCU general Control Register */ -#define MCUCR _SFR_IO8(0x35) - -/* 0x36..0x37 reserved */ - -/* Timer/Counter Interrupt Flag Register */ -#define TIFR _SFR_IO8(0x38) - -/* Timer/Counter Interrupt MaSK Register */ -#define TIMSK _SFR_IO8(0x39) - -/* General Interrupt Flag Register */ -#define GIFR _SFR_IO8(0x3A) - -/* General Interrupt MaSK register */ -#define GIMSK _SFR_IO8(0x3B) - -/* 0x3C..0x3E reserved */ - -/* 0x3F SREG */ - -/* Interrupt vectors */ - -/* External Interrupt 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* External Interrupt Request 0 */ -#define IO_PINS_vect _VECTOR(2) -#define SIG_PIN _VECTOR(2) -#define SIG_PIN_CHANGE _VECTOR(2) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(3) -#define SIG_OVERFLOW0 _VECTOR(3) - -/* EEPROM Ready */ -#define EE_RDY_vect _VECTOR(4) -#define SIG_EEPROM_READY _VECTOR(4) - -/* Analog Comparator */ -#define ANA_COMP_vect _VECTOR(5) -#define SIG_COMPARATOR _VECTOR(5) - -#define _VECTORS_SIZE 12 - -/* Bit numbers */ - -/* GIMSK */ -#define INT0 6 -#define PCIE 5 - -/* GIFR */ -#define INTF0 6 -#define PCIF 5 - -/* TIMSK */ -#define TOIE0 1 - -/* TIFR */ -#define TOV0 1 - -/* MCUCR */ -#define PUD 6 -#define SE 5 -#define SM 4 -#define ISC01 1 -#define ISC00 0 - -/* TCCR0 */ -#define CS02 2 -#define CS01 1 -#define CS00 0 - -/* WDTCR */ -#define WDTOE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -/* - PB5 = RESET# - PB4 = XTAL2 - PB3 = XTAL1 - PB2 = T0 / SCK - PB1 = INT0 / AIN1 / MISO - PB0 = AIN0 / MOSI - */ - -/* PORTB */ -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -/* DDRB */ -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -/* PINB */ -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -/* ACSR */ -#define ACD 7 -#define AINBG 6 -#define ACO 5 -#define ACI 4 -#define ACIE 3 -#define ACIS1 1 -#define ACIS0 0 - -/* EEPROM Control Register */ -#define EERIE 3 -#define EEMWE 2 -#define EEWE 1 -#define EERE 0 - -/* Last memory addresses */ -#define RAMEND 0x1F -#define XRAMEND 0x0 -#define E2END 0x3F -#define E2PAGESIZE 2 -#define FLASHEND 0x3FF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 1 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_RSTDISBL (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_BODEN (unsigned char)~_BV(6) -#define FUSE_BODLEVEL (unsigned char)~_BV(7) -#define FUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SPIEN & FUSE_BODLEVEL) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x90 -#define SIGNATURE_2 0x05 - - -#endif /* _AVR_IOTN12_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn13.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn13.h deleted file mode 100644 index 7900e29cc..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn13.h +++ /dev/null @@ -1,364 +0,0 @@ -/* Copyright (c) 2004, Theodore A. Roth - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iotn13.h,v 1.8.2.6 2008/10/17 23:27:51 arcanum Exp $ */ - -/* avr/iotn13.h - definitions for ATtiny13 */ - -/* Verified 5/20/04 by Bruce Graham */ - -#ifndef _AVR_IOTN13_H_ -#define _AVR_IOTN13_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iotn13.h" -#else -# error "Attempt to include more than one file." -#endif - -/* I/O registers and bit names */ - -/* ADC Control and Status Register B */ -#define ADCSRB _SFR_IO8(0x03) -# define ACME 6 -# define ADTS2 2 -# define ADTS1 1 -# define ADTS0 0 - -/* ADC Data Register */ -#ifndef __ASSEMBLER__ -#define ADC _SFR_IO16 (0x04) -#endif -#define ADCW _SFR_IO16 (0x04) -#define ADCL _SFR_IO8(0x04) -#define ADCH _SFR_IO8(0x05) - -/* ADC Control and Status Register A */ -#define ADCSRA _SFR_IO8(0x06) -# define ADEN 7 -# define ADSC 6 -# define ADATE 5 -# define ADIF 4 -# define ADIE 3 -# define ADPS2 2 -# define ADPS1 1 -# define ADPS0 0 - -/* ADC Multiplex Selection Register */ -#define ADMUX _SFR_IO8(0x07) -# define REFS0 6 -# define ADLAR 5 -# define MUX1 1 -# define MUX0 0 - -/* Analog Comparator Control and Status Register */ -#define ACSR _SFR_IO8(0x08) -# define ACD 7 -# define ACBG 6 -# define ACO 5 -# define ACI 4 -# define ACIE 3 -# define ACIS1 1 -# define ACIS0 0 - -/* Digital Input Disable Register 0 */ -#define DIDR0 _SFR_IO8(0x14) -# define ADC0D 5 -# define ADC2D 4 -# define ADC3D 3 -# define ADC1D 2 -# define AIN1D 1 -# define AIN0D 0 - -/* PIN Change Mask Register */ -#define PCMSK _SFR_IO8(0x15) -# define PCINT5 5 -# define PCINT4 4 -# define PCINT3 3 -# define PCINT2 2 -# define PCINT1 1 -# define PCINT0 0 - -/* Port B Pin Utilization [2535D-AVR-04/04] - - PORTB5 = PCINT5/RESET#/ADC0/dW - - PORTB4 = PCINT4/ADC2 - - PORTB3 = PCINT3/CLKI/ADC3 - - PORTB2 = SCK/ADC1/T0/PCINT2 - - PORTB1 = MISO/AIN1/OC0B/INT0/PCINT1 - - PORTB0 = MOSI/AIN0/OC0A/PCINT0 */ - -/* Input Pins, Port B */ -#define PINB _SFR_IO8(0x16) -# define PINB5 5 -# define PINB4 4 -# define PINB3 3 -# define PINB2 2 -# define PINB1 1 -# define PINB0 0 - -/* Data Direction Register, Port B */ -#define DDRB _SFR_IO8(0x17) -# define DDB5 5 -# define DDB4 4 -# define DDB3 3 -# define DDB2 2 -# define DDB1 1 -# define DDB0 0 - -/* Data Register, Port B */ -#define PORTB _SFR_IO8(0x18) -# define PB5 5 -# define PB4 4 -# define PB3 3 -# define PB2 2 -# define PB1 1 -# define PB0 0 - -/* ATtiny EEPROM Control Register EECR */ -#define EECR _SFR_IO8(0x1C) -#define EEPM1 5 -#define EEPM0 4 -#define EERIE 3 -#define EEMPE 2 -#define EEPE 1 -#define EERE 0 - -/* EEPROM Data Register */ -#define EEDR _SFR_IO8(0x1D) - -/* The EEPROM Address Register EEAR[6:0] */ -#define EEAR _SFR_IO8(0x1E) -#define EEARL _SFR_IO8(0x1E) - -/* Watchdog Timer Control Register */ -#define WDTCR _SFR_IO8(0x21) -# define WDTIF 7 -# define WDTIE 6 -# define WDP3 5 -# define WDCE 4 -# define WDE 3 -# define WDP2 2 -# define WDP1 1 -# define WDP0 0 - -/* Clock Prescale Register */ -#define CLKPR _SFR_IO8(0x26) -# define CLKPCE 7 -# define CLKPS3 3 -# define CLKPS2 2 -# define CLKPS1 1 -# define CLKPS0 0 - -/* General Timer/Counter Control Register */ -#define GTCCR _SFR_IO8(0x28) -# define TSM 7 -# define PSR10 0 - -/* Output Compare 0 Register B */ -#define OCR0B _SFR_IO8(0x29) - -/* debugWIRE Data Register */ -#define DWDR _SFR_IO8(0x2e) - -/* Timer/Counter 0 Control Register A */ -#define TCCR0A _SFR_IO8(0x2f) -# define COM0A1 7 -# define COM0A0 6 -# define COM0B1 5 -# define COM0B0 4 -# define WGM01 1 -# define WGM00 0 - -/* Oscillator Calibration Register */ -#define OSCCAL _SFR_IO8(0x31) - -/* Timer/Counter0 (8-bit) */ -#define TCNT0 _SFR_IO8(0x32) - -/* Timer/Counter 0 Control Register B */ -#define TCCR0B _SFR_IO8(0x33) -# define FOC0A 7 -# define FOC0B 6 -# define WGM02 3 -# define CS02 2 -# define CS01 1 -# define CS00 0 - -/* MCU General Status Register */ -#define MCUSR _SFR_IO8(0x34) -# define WDRF 3 -# define BORF 2 -# define EXTRF 1 -# define PORF 0 - -/* MCU General Control Register */ -#define MCUCR _SFR_IO8(0x35) -# define PUD 6 -# define SE 5 -# define SM1 4 -# define SM0 3 -# define ISC01 1 -# define ISC00 0 - -/* Output Compare 0 REgister A */ -#define OCR0A _SFR_IO8(0x36) - -/* Store Program Memory Control and Status Register */ -#define SPMCSR _SFR_IO8(0x37) -# define CTPB 4 -# define RFLB 3 -# define PGWRT 2 -# define PGERS 1 -# define SPMEN 0 -# define SELFPRGEN 0 - -/* Timer/Counter 0 Interrupt Flag Register */ -#define TIFR0 _SFR_IO8(0x38) -# define OCF0B 3 -# define OCF0A 2 -# define TOV0 1 - -/* Timer/Counter 0 Interrupt MaSK Register */ -#define TIMSK0 _SFR_IO8(0x39) -# define OCIE0B 3 -# define OCIE0A 2 -# define TOIE0 1 - -/* General Interrupt Flag Register */ -#define GIFR _SFR_IO8(0x3a) -# define INTF0 6 -# define PCIF 5 - -/* General Interrupt MaSK register */ -#define GIMSK _SFR_IO8(0x3b) -# define INT0 6 -# define PCIE 5 - -/* SPL and SREG are defined in */ - -/* From the datasheet: - 1 0x0000 RESET External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset - 2 0x0001 INT0 External Interrupt Request 0 - 3 0x0002 PCINT0 Pin Change Interrupt Request 0 - 4 0x0003 TIM0_OVF Timer/Counter Overflow - 5 0x0004 EE_RDY EEPROM Ready - 6 0x0005 ANA_COMP Analog Comparator - 7 0x0006 TIM0_COMPA Timer/Counter Compare Match A - 8 0x0007 TIM0_COMPB Timer/Counter Compare Match B - 9 0x0008 WDT Watchdog Time-out - 10 0x0009 ADC ADC Conversion Complete */ - -/* External Interrupt 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* External Interrupt Request 0 */ -#define PCINT0_vect _VECTOR(2) -#define SIG_PIN_CHANGE0 _VECTOR(2) - -/* Timer/Counter0 Overflow */ -#define TIM0_OVF_vect _VECTOR(3) -#define SIG_OVERFLOW0 _VECTOR(3) - -/* EEPROM Ready */ -#define EE_RDY_vect _VECTOR(4) -#define SIG_EEPROM_READY _VECTOR(4) - -/* Analog Comparator */ -#define ANA_COMP_vect _VECTOR(5) -#define SIG_COMPARATOR _VECTOR(5) - -/* Timer/Counter Compare Match A */ -#define TIM0_COMPA_vect _VECTOR(6) -#define SIG_OUTPUT_COMPARE0A _VECTOR(6) - -/* Timer/Counter Compare Match B */ -#define TIM0_COMPB_vect _VECTOR(7) -#define SIG_OUTPUT_COMPARE0B _VECTOR(7) - -/* Watchdog Time-out */ -#define WDT_vect _VECTOR(8) -#define SIG_WATCHDOG_TIMEOUT _VECTOR(8) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(9) -#define SIG_ADC _VECTOR(9) - -#define _VECTORS_SIZE 20 - -#define SPM_PAGESIZE 32 -#define RAMEND 0x9F -#define XRAMEND 0x9F -#define E2END 0x3F -#define E2PAGESIZE 4 -#define FLASHEND 0x3FF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 2 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_SUT0 (unsigned char)~_BV(2) -#define FUSE_SUT1 (unsigned char)~_BV(3) -#define FUSE_CKDIV8 (unsigned char)~_BV(4) -#define FUSE_WDTON (unsigned char)~_BV(5) -#define FUSE_EESAVE (unsigned char)~_BV(6) -#define FUSE_SPIEN (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_SUT0 & FUSE_CKDIV8 & FUSE_SPIEN) - -/* High Fuse Byte */ -#define FUSE_RSTDISBL (unsigned char)~_BV(0) -#define FUSE_BODLEVEL0 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(2) -#define FUSE_DWEN (unsigned char)~_BV(3) -#define FUSE_SPMEN (unsigned char)~_BV(4) -#define HFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x90 -#define SIGNATURE_2 0x07 - - -#endif /* _AVR_IOTN13_H_*/ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn13a.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn13a.h deleted file mode 100644 index 10a8dd89c..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn13a.h +++ /dev/null @@ -1,389 +0,0 @@ -/* Copyright (c) 2008 Atmel Corporation - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iotn13a.h,v 1.1.2.5 2008/08/06 22:45:08 arcanum Exp $ */ - -/* avr/iotn13a.h - definitions for ATtiny13 */ - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iotn13a.h" -#else -# error "Attempt to include more than one file." -#endif - - -#ifndef _AVR_ATTINY13A_H_ -#define _AVR_ATTINY13A_H_ 1 - - -/* Registers and associated bit numbers. */ - -#define ADCSRB _SFR_IO8(0x03) -#define ADTS0 0 -#define ADTS1 1 -#define ADTS2 2 -#define ACME 6 - -#ifndef __ASSEMBLER__ -#define ADC _SFR_IO16(0x04) -#endif -#define ADCW _SFR_IO16(0x04) - -#define ADCL _SFR_IO8(0x04) -#define ADCL0 0 -#define ADCL1 1 -#define ADCL2 2 -#define ADCL3 3 -#define ADCL4 4 -#define ADCL5 5 -#define ADCL6 6 -#define ADCL7 7 - -#define ADCH _SFR_IO8(0x05) -#define ADCH0 0 -#define ADCH1 1 -#define ADCH2 2 -#define ADCH3 3 -#define ADCH4 4 -#define ADCH5 5 -#define ADCH6 6 -#define ADCH7 7 - -#define ADCSRA _SFR_IO8(0x06) -#define ADPS0 0 -#define ADPS1 1 -#define ADPS2 2 -#define ADIE 3 -#define ADIF 4 -#define ADATE 5 -#define ADSC 6 -#define ADEN 7 - -#define ADMUX _SFR_IO8(0x07) -#define MUX0 0 -#define MUX1 1 -#define ADLAR 5 -#define REFS0 6 - -#define ACSR _SFR_IO8(0x08) -#define ACIS0 0 -#define ACIS1 1 -#define ACIE 3 -#define ACI 4 -#define ACO 5 -#define ACBG 6 -#define ACD 7 - -#define DIDR0 _SFR_IO8(0x14) -#define AIN0D 0 -#define AIN1D 1 -#define ADC1D 2 -#define ADC3D 3 -#define ADC2D 4 -#define ADC0D 5 - -#define PCMSK _SFR_IO8(0x15) -#define PCINT0 0 -#define PCINT1 1 -#define PCINT2 2 -#define PCINT3 3 -#define PCINT4 4 -#define PCINT5 5 - -#define PINB _SFR_IO8(0x16) -#define PINB0 0 -#define PINB1 1 -#define PINB2 2 -#define PINB3 3 -#define PINB4 4 -#define PINB5 5 - -#define DDRB _SFR_IO8(0x17) -#define DDB0 0 -#define DDB1 1 -#define DDB2 2 -#define DDB3 3 -#define DDB4 4 -#define DDB5 5 - -#define PORTB _SFR_IO8(0x18) -#define PORTB0 0 -#define PORTB1 1 -#define PORTB2 2 -#define PORTB3 3 -#define PORTB4 4 -#define PORTB5 5 - -#define EECR _SFR_IO8(0x1C) -#define EERE 0 -#define EEWE 1 -#define EEMWE 2 -#define EERIE 3 -#define EEPM0 4 -#define EEPM1 5 - -#define EEDR _SFR_IO8(0x1D) -#define EEDR0 0 -#define EEDR1 1 -#define EEDR2 2 -#define EEDR3 3 -#define EEDR4 4 -#define EEDR5 5 -#define EEDR6 6 -#define EEDR7 7 - -#define EEARL _SFR_IO8(0x1E) - -#define EEAR _SFR_IO8(0x1E) -#define EEAR0 0 -#define EEAR1 1 -#define EEAR2 2 -#define EEAR3 3 -#define EEAR4 4 -#define EEAR5 5 - -#define WDTCR _SFR_IO8(0x21) -#define WDP0 0 -#define WDP1 1 -#define WDP2 2 -#define WDE 3 -#define WDCE 4 -#define WDP3 5 -#define WDTIE 6 -#define WDTIF 7 - -#define PRR _SFR_IO8(0x25) -#define PRADC 0 -#define PRSPI 1 -#define PRTIM0 2 - -#define CLKPR _SFR_IO8(0x26) -#define CLKPS0 0 -#define CLKPS1 1 -#define CLKPS2 2 -#define CLKPS3 3 -#define CLKPCE 7 - -#define GTCCR _SFR_IO8(0x28) -#define PSR10 0 -#define TSM 7 - -#define OCR0B _SFR_IO8(0x29) -#define OCR0B_0 0 -#define OCR0B_1 1 -#define OCR0B_2 2 -#define OCR0B_3 3 -#define OCR0B_4 4 -#define OCR0B_5 5 -#define OCR0B_6 6 -#define OCR0B_7 7 - -#define DWDR _SFR_IO8(0x2E) -#define DWDR0 0 -#define DWDR1 1 -#define DWDR2 2 -#define DWDR3 3 -#define DWDR4 4 -#define DWDR5 5 -#define DWDR6 6 -#define DWDR7 7 - -#define TCCR0A _SFR_IO8(0x2F) -#define WGM00 0 -#define WGM01 1 -#define COM0B0 4 -#define COM0B1 5 -#define COM0A0 6 -#define COM0A1 7 - -#define BODCR _SFR_IO8(0x30) -#define BPDSE 0 -#define BPDS 1 - -#define OSCCAL _SFR_IO8(0x31) -#define CAL0 0 -#define CAL1 1 -#define CAL2 2 -#define CAL3 3 -#define CAL4 4 -#define CAL5 5 -#define CAL6 6 - -#define TCNT0 _SFR_IO8(0x32) -#define TCNT0_0 0 -#define TCNT0_1 1 -#define TCNT0_2 2 -#define TCNT0_3 3 -#define TCNT0_4 4 -#define TCNT0_5 5 -#define TCNT0_6 6 -#define TCNT0_7 7 - -#define TCCR0B _SFR_IO8(0x33) -#define CS00 0 -#define CS01 1 -#define CS02 2 -#define WGM02 3 -#define FOC0B 6 -#define FOC0A 7 - -#define MCUSR _SFR_IO8(0x34) -#define PORF 0 -#define EXTRF 1 -#define BORF 2 -#define WDRF 3 - -#define MCUCR _SFR_IO8(0x35) -#define ISC00 0 -#define ISC01 1 -#define SM0 3 -#define SM1 4 -#define SE 5 -#define PUD 6 - -#define OCR0A _SFR_IO8(0x36) -#define OCR0A_0 0 -#define OCR0A_1 1 -#define OCR0A_2 2 -#define OCR0A_3 3 -#define OCR0A_4 4 -#define OCR0A_5 5 -#define OCR0A_6 6 -#define OCR0A_7 7 - -#define SPMCSR _SFR_IO8(0x37) -#define SPMEN 0 -#define PGERS 1 -#define PGWRT 2 -#define RFLB 3 -#define CTPB 4 - -#define TIFR0 _SFR_IO8(0x38) -#define TOV0 1 -#define OCF0A 2 -#define OCF0B 3 - -#define TIMSK0 _SFR_IO8(0x39) -#define TOIE0 1 -#define OCIE0A 2 -#define OCIE0B 3 - -#define GIFR _SFR_IO8(0x3A) -#define PCIF 5 -#define INTF0 6 - -#define GIMSK _SFR_IO8(0x3B) -#define PCIE 5 -#define INT0 6 - - -/* Interrupt vectors */ -/* Vector 0 is the reset vector */ -#define INT0_vect_num 1 -#define INT0_vect _VECTOR(1) /* External Interrupt 0 */ -#define PCINT0_vect_num 2 -#define PCINT0_vect _VECTOR(2) /* External Interrupt Request 0 */ -#define TIM0_OVF_vect_num 3 -#define TIM0_OVF_vect _VECTOR(3) /* Timer/Counter0 Overflow */ -#define EE_RDY_vect_num 4 -#define EE_RDY_vect _VECTOR(4) /* EEPROM Ready */ -#define ANA_COMP_vect_num 5 -#define ANA_COMP_vect _VECTOR(5) /* Analog Comparator */ -#define TIM0_COMPA_vect_num 6 -#define TIM0_COMPA_vect _VECTOR(6) /* Timer/Counter Compare Match A */ -#define TIM0_COMPB_vect_num 7 -#define TIM0_COMPB_vect _VECTOR(7) /* Timer/Counter Compare Match B */ -#define WDT_vect_num 8 -#define WDT_vect _VECTOR(8) /* Watchdog Time-out */ -#define ADC_vect_num 9 -#define ADC_vect _VECTOR(9) /* ADC Conversion Complete */ - -#define _VECTOR_SIZE 2 /* Size of individual vector. */ -#define _VECTORS_SIZE (10 * _VECTOR_SIZE) - - -/* Constants */ -#define SPM_PAGESIZE (32) -#define RAMSTART (0x60) -#define RAMSIZE (64) -#define RAMEND (RAMSTART + RAMSIZE - 1) -#define XRAMSTART (NA) -#define XRAMSIZE (0) -#if XRAMSIZE > 0 && XRAMSTART > 0 -#define XRAMEND (XRAMSTART + XRAMSIZE - 1) -#else -#define XRAMEND (RAMEND + XRAMSIZE) -#endif -#define E2END (64 - 1) -#define E2PAGESIZE (4) -#define FLASHEND (1024 - 1) - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 2 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) /* Select Clock Source */ -#define FUSE_CKSEL1 (unsigned char)~_BV(1) /* Select Clock Source */ -#define FUSE_SUT0 (unsigned char)~_BV(2) /* Select start-up time */ -#define FUSE_SUT1 (unsigned char)~_BV(3) /* Select start-up time */ -#define FUSE_CKDIV8 (unsigned char)~_BV(4) /* Start up with system clock divided by 8 */ -#define FUSE_WDTON (unsigned char)~_BV(5) /* Watch dog timer always on */ -#define FUSE_EESAVE (unsigned char)~_BV(6) /* Keep EEprom contents during chip erase */ -#define FUSE_SPIEN (unsigned char)~_BV(7) /* SPI programming enable */ -#define LFUSE_DEFAULT (FUSE_SPIEN & FUSE_CKDIV8 & FUSE_SUT0 & FUSE_CKSEL0) - -/* High Fuse Byte */ -#define FUSE_RSTDISBL (unsigned char)~_BV(0) /* Disable external reset */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(1) /* Enable BOD and select level */ -#define FUSE_BODLEVEL1 (unsigned char)~_BV(2) /* Enable BOD and select level */ -#define FUSE_DWEN (unsigned char)~_BV(3) /* DebugWire Enable */ -#define FUSE_SELFPRGEN (unsigned char)~_BV(4) /* Self Programming Enable */ -#define HFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x90 -#define SIGNATURE_2 0x07 - - -#endif /* _AVR_ATTINY13A_H_ */ - diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn15.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn15.h deleted file mode 100644 index e5a1334f4..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn15.h +++ /dev/null @@ -1,333 +0,0 @@ -/* Copyright (c) 2002,2005 Marek Michalkiewicz - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iotn15.h,v 1.12.2.5 2008/10/17 23:27:51 arcanum Exp $ */ - -/* avr/iotn15.h - definitions for ATtiny15 */ - -#ifndef _AVR_IOTN15_H_ -#define _AVR_IOTN15_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iotn15.h" -#else -# error "Attempt to include more than one file." -#endif - -#ifndef __ASSEMBLER__ -# warning "MCU not supported by the C compiler" -#endif - -/* I/O registers */ - -/* 0x00..0x03 reserved */ - -#ifndef __ASSEMBLER__ -#define ADC _SFR_IO16 (0x04) -#endif -#define ADCW _SFR_IO16(0x04) -#define ADCL _SFR_IO8(0x04) -#define ADCH _SFR_IO8(0x05) -#define ADCSR _SFR_IO8(0x06) -#define ADMUX _SFR_IO8(0x07) - -/* Analog Comparator Control and Status Register */ -#define ACSR _SFR_IO8(0x08) - -/* 0x09..0x15 reserved */ - -/* Input Pins, Port B */ -#define PINB _SFR_IO8(0x16) - -/* Data Direction Register, Port B */ -#define DDRB _SFR_IO8(0x17) - -/* Data Register, Port B */ -#define PORTB _SFR_IO8(0x18) - -/* 0x19..0x1B reserved */ - -/* EEPROM Control Register */ -#define EECR _SFR_IO8(0x1C) - -/* EEPROM Data Register */ -#define EEDR _SFR_IO8(0x1D) - -/* EEPROM Address Register */ -#define EEAR _SFR_IO8(0x1E) -#define EEARL _SFR_IO8(0x1E) - -/* 0x1F..0x20 reserved */ - -/* Watchdog Timer Control Register */ -#define WDTCR _SFR_IO8(0x21) - -/* 0x22..0x2B reserved */ -#define SFIOR _SFR_IO8(0x2C) - -#define OCR1B _SFR_IO8(0x2D) -#define OCR1A _SFR_IO8(0x2E) -#define TCNT1 _SFR_IO8(0x2F) -#define TCCR1 _SFR_IO8(0x30) - -/* Oscillator Calibration Register */ -#define OSCCAL _SFR_IO8(0x31) - -/* Timer/Counter0 (8-bit) */ -#define TCNT0 _SFR_IO8(0x32) - -/* Timer/Counter0 Control Register */ -#define TCCR0 _SFR_IO8(0x33) - -/* MCU general Status Register */ -#define MCUSR _SFR_IO8(0x34) - -/* MCU general Control Register */ -#define MCUCR _SFR_IO8(0x35) - -/* 0x36..0x37 reserved */ - -/* Timer/Counter Interrupt Flag Register */ -#define TIFR _SFR_IO8(0x38) - -/* Timer/Counter Interrupt MaSK Register */ -#define TIMSK _SFR_IO8(0x39) - -/* General Interrupt Flag Register */ -#define GIFR _SFR_IO8(0x3A) - -/* General Interrupt MaSK register */ -#define GIMSK _SFR_IO8(0x3B) - -/* 0x3C..0x3E reserved */ - -/* 0x3F SREG */ - -/* Interrupt vectors */ - -/* External Interrupt 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* External Interrupt Request 0 */ -#define IO_PINS_vect _VECTOR(2) -#define SIG_PIN _VECTOR(2) -#define SIG_PIN_CHANGE _VECTOR(2) - -/* Timer/Counter1 Compare Match */ -#define TIMER1_COMP_vect _VECTOR(3) -#define SIG_OUTPUT_COMPARE1A _VECTOR(3) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(4) -#define SIG_OVERFLOW1 _VECTOR(4) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(5) -#define SIG_OVERFLOW0 _VECTOR(5) - -/* EEPROM Ready */ -#define EE_RDY_vect _VECTOR(6) -#define SIG_EEPROM_READY _VECTOR(6) - -/* Analog Comparator */ -#define ANA_COMP_vect _VECTOR(7) -#define SIG_COMPARATOR _VECTOR(7) - -/* ADC Conversion Ready */ -#define ADC_vect _VECTOR(8) -#define SIG_ADC _VECTOR(8) - -#define _VECTORS_SIZE 18 - -/* Bit numbers */ - -/* GIMSK */ -#define INT0 6 -#define PCIE 5 - -/* GIFR */ -#define INTF0 6 -#define PCIF 5 - -/* TIMSK */ -#define OCIE1 6 -#define TOIE1 2 -#define TOIE0 1 - -/* TIFR */ -#define OCF1 6 -#define TOV1 2 -#define TOV0 1 - -/* MCUCR */ -#define PUD 6 -#define SE 5 -#define SM1 4 -#define SM0 3 -#define ISC01 1 -#define ISC00 0 - -/* MCUSR */ -#define WDRF 3 -#define BORF 2 -#define EXTRF 1 -#define PORF 0 - -/* TCCR0 */ -#define CS02 2 -#define CS01 1 -#define CS00 0 - -/* TCCR1 */ -#define CTC1 7 -#define PWM1 6 -#define COM1A1 5 -#define COM1A0 4 -#define CS13 3 -#define CS12 2 -#define CS11 1 -#define CS10 0 - -/* SFIOR */ -#define FOC1A 2 -#define PSR1 1 -#define PSR0 0 - -/* WDTCR */ -#define WDTOE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -/* - PB5 = RESET# / ADC0 - PB4 = ADC3 - PB3 = ADC2 - PB2 = SCK / ADC1 / T0 / INT0 - PB1 = MISO / AIN1 / OCP - PB0 = MOSI / AIN0 / AREF - */ - -/* PORTB */ -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -/* DDRB */ -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -/* PINB */ -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -/* ACSR */ -#define ACD 7 -#define GREF 6 -#define ACO 5 -#define ACI 4 -#define ACIE 3 -#define ACIS1 1 -#define ACIS0 0 - -/* ADMUX */ -#define REFS1 7 -#define REFS0 6 -#define ADLAR 5 -#define MUX2 2 -#define MUX1 1 -#define MUX0 0 - -/* ADCSR */ -#define ADEN 7 -#define ADSC 6 -#define ADFR 5 -#define ADIF 4 -#define ADIE 3 -#define ADPS2 2 -#define ADPS1 1 -#define ADPS0 0 - -/* EEPROM Control Register */ -#define EERIE 3 -#define EEMWE 2 -#define EEWE 1 -#define EERE 0 - -/* Last memory addresses */ -#define RAMEND 0x1F -#define XRAMEND 0x0 -#define E2END 0x3F -#define E2PAGESIZE 2 -#define FLASHEND 0x3FF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 1 - -/* Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_RSTDISBL (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_BODEN (unsigned char)~_BV(6) -#define FUSE_BODLEVEL (unsigned char)~_BV(7) -#define FUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL1 & FUSE_SPIEN) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x90 -#define SIGNATURE_2 0x06 - - -#endif /* _AVR_IOTN15_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn167.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn167.h deleted file mode 100644 index 48ed1089b..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn167.h +++ /dev/null @@ -1,832 +0,0 @@ -/* Copyright (c) 2008 Atmel Corporation - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. -*/ - -/* $Id: iotn167.h,v 1.1.2.5 2008/08/06 22:45:08 arcanum Exp $ */ - -/* avr/iotn167.h - definitions for ATtiny167. */ - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iotn167.h" -#else -# error "Attempt to include more than one file." -#endif - - -#ifndef _AVR_IOTN167_H_ -#define _AVR_IOTN167_H_ 1 - - -/* Registers and associated bit numbers */ - -#define PINA _SFR_IO8(0x00) -#define PINA0 0 -#define PINA1 1 -#define PINA2 2 -#define PINA3 3 -#define PINA4 4 -#define PINA5 5 -#define PINA6 6 -#define PINA7 7 - -#define DDRA _SFR_IO8(0x01) -#define DDA0 0 -#define DDA1 1 -#define DDA2 2 -#define DDA3 3 -#define DDA4 4 -#define DDA5 5 -#define DDA6 6 -#define DDA7 7 - -#define PORTA _SFR_IO8(0x02) -#define PORTA0 0 -#define PORTA1 1 -#define PORTA2 2 -#define PORTA3 3 -#define PORTA4 4 -#define PORTA5 5 -#define PORTA6 6 -#define PORTA7 7 - -#define PINB _SFR_IO8(0x03) -#define PINB0 0 -#define PINB1 1 -#define PINB2 2 -#define PINB3 3 -#define PINB4 4 -#define PINB5 5 -#define PINB6 6 -#define PINB7 7 - -#define DDRB _SFR_IO8(0x04) -#define DDB0 0 -#define DDB1 1 -#define DDB2 2 -#define DDB3 3 -#define DDB4 4 -#define DDB5 5 -#define DDB6 6 -#define DDB7 7 - -#define PORTB _SFR_IO8(0x05) -#define PORTB0 0 -#define PORTB1 1 -#define PORTB2 2 -#define PORTB3 3 -#define PORTB4 4 -#define PORTB5 5 -#define PORTB6 6 -#define PORTB7 7 - -#define PORTCR _SFR_IO8(0x12) -#define PUDA 0 -#define PUDB 2 -#define BBMA 4 -#define BBMB 5 - -#define TIFR0 _SFR_IO8(0x15) -#define TOV0 0 -#define OCF0A 1 - -#define TIFR1 _SFR_IO8(0x16) -#define TOV1 0 -#define OCF1A 1 -#define OCF1B 2 -#define ICF1 5 - -#define PCIFR _SFR_IO8(0x1B) -#define PCIF0 0 -#define PCIF1 1 - -#define EIFR _SFR_IO8(0x1C) -#define INTF0 0 -#define INTF1 1 - -#define EIMSK _SFR_IO8(0x1D) -#define INT0 0 -#define INT1 1 - -#define GPIOR0 _SFR_IO8(0x1E) -#define GPIOR00 0 -#define GPIOR01 1 -#define GPIOR02 2 -#define GPIOR03 3 -#define GPIOR04 4 -#define GPIOR05 5 -#define GPIOR06 6 -#define GPIOR07 7 - -#define EECR _SFR_IO8(0x1F) -#define EERE 0 -#define EEPE 1 -#define EEMPE 2 -#define EERIE 3 -#define EEPM0 4 -#define EEPM1 5 - -#define EEDR _SFR_IO8(0x20) -#define EEDR0 0 -#define EEDR1 1 -#define EEDR2 2 -#define EEDR3 3 -#define EEDR4 4 -#define EEDR5 5 -#define EEDR6 6 -#define EEDR7 7 - -#define EEAR _SFR_IO16(0x21) - -#define EEARL _SFR_IO8(0x21) -#define EEAR0 0 -#define EEAR1 1 -#define EEAR2 2 -#define EEAR3 3 -#define EEAR4 4 -#define EEAR5 5 -#define EEAR6 6 -#define EEAR7 7 - -#define EEARH _SFR_IO8(0x22) -#define EEAR8 0 - -#define GTCCR _SFR_IO8(0x23) -#define PSR1 0 -#define PSR0 1 -#define TSM 7 - -#define TCCR0A _SFR_IO8(0x25) -#define WGM00 0 -#define WGM01 1 -#define COM0A0 6 -#define COM0A1 7 - -#define TCCR0B _SFR_IO8(0x26) -#define CS00 0 -#define CS01 1 -#define CS02 2 -#define FOC0A 7 - -#define TCNT0 _SFR_IO8(0x27) -#define TCNT00 0 -#define TCNT01 1 -#define TCNT02 2 -#define TCNT03 3 -#define TCNT04 4 -#define TCNT05 5 -#define TCNT06 6 -#define TCNT07 7 - -#define OCR0A _SFR_IO8(0x28) -#define OCR00 0 -#define OCR01 1 -#define OCR02 2 -#define OCR03 3 -#define OCR04 4 -#define OCR05 5 -#define OCR06 6 -#define OCR07 7 - -#define GPIOR1 _SFR_IO8(0x2A) -#define GPIOR10 0 -#define GPIOR11 1 -#define GPIOR12 2 -#define GPIOR13 3 -#define GPIOR14 4 -#define GPIOR15 5 -#define GPIOR16 6 -#define GPIOR17 7 - -#define GPIOR2 _SFR_IO8(0x2B) -#define GPIOR20 0 -#define GPIOR21 1 -#define GPIOR22 2 -#define GPIOR23 3 -#define GPIOR24 4 -#define GPIOR25 5 -#define GPIOR26 6 -#define GPIOR27 7 - -#define SPCR _SFR_IO8(0x2C) -#define SPR0 0 -#define SPR1 1 -#define CPHA 2 -#define CPOL 3 -#define MSTR 4 -#define DORD 5 -#define SPE 6 -#define SPIE 7 - -#define SPSR _SFR_IO8(0x2D) -#define SPI2X 0 -#define WCOL 6 -#define SPIF 7 - -#define SPDR _SFR_IO8(0x2E) -#define SPDR0 0 -#define SPDR1 1 -#define SPDR2 2 -#define SPDR3 3 -#define SPDR4 4 -#define SPDR5 5 -#define SPDR6 6 -#define SPDR7 7 - -#define ACSR _SFR_IO8(0x30) -#define ACIS0 0 -#define ACIS1 1 -#define ACIC 2 -#define ACIE 3 -#define ACI 4 -#define ACO 5 -#define ACIRS 6 -#define ACD 7 - -#define DWDR _SFR_IO8(0x31) -#define DWDR0 0 -#define DWDR1 1 -#define DWDR2 2 -#define DWDR3 3 -#define DWDR4 4 -#define DWDR5 5 -#define DWDR6 6 -#define DWDR7 7 - -#define SMCR _SFR_IO8(0x33) -#define SE 0 -#define SM0 1 -#define SM1 2 - -#define MCUSR _SFR_IO8(0x34) -#define PORF 0 -#define EXTRF 1 -#define BORF 2 -#define WDRF 3 - -#define MCUCR _SFR_IO8(0x35) -#define PUD 4 -#define BODS 5 -#define BODSE 6 - -#define SPMCSR _SFR_IO8(0x37) -#define SPMEN 0 -#define PGERS 1 -#define PGWRT 2 -#define RFLB 3 -#define CTPB 4 -#define SIGRD 5 -#define RWWSB 6 - -#define WDTCR _SFR_MEM8(0x60) -#define WDP0 0 -#define WDP1 1 -#define WDP2 2 -#define WDE 3 -#define WDCE 4 -#define WDP3 5 -#define WDIE 6 -#define WDIF 7 - -#define CLKPR _SFR_MEM8(0x61) -#define CLKPS0 0 -#define CLKPS1 1 -#define CLKPS2 2 -#define CLKPS3 3 -#define CLKPCE 7 - -#define CLKCSR _SFR_MEM8(0x62) -#define CLKC0 0 -#define CLKC1 1 -#define CLKC2 2 -#define CLKC3 3 -#define CLKRDY 4 -#define CLKCCE 7 - -#define CLKSELR _SFR_MEM8(0x63) -#define CSEL0 0 -#define CSEL1 1 -#define CSEL2 2 -#define CSEL3 3 -#define CSUT0 4 -#define CSUT1 5 -#define COUT 6 - -#define PRR _SFR_MEM8(0x64) -#define PRADC 0 -#define PRUSI 1 -#define PRTIM0 2 -#define PRTIM1 3 -#define PRSPI 4 -#define PRLIN 5 - -#define OSCCAL _SFR_MEM8(0x66) -#define CAL0 0 -#define CAL1 1 -#define CAL2 2 -#define CAL3 3 -#define CAL4 4 -#define CAL5 5 -#define CAL6 6 -#define CAL7 7 - -#define PCICR _SFR_MEM8(0x68) -#define PCIE0 0 -#define PCIE1 1 - -#define EICRA _SFR_MEM8(0x69) -#define ISC00 0 -#define ISC01 1 -#define ISC10 2 -#define ISC11 3 - -#define PCMSK0 _SFR_MEM8(0x6B) -#define PCINT0 0 -#define PCINT1 1 -#define PCINT2 2 -#define PCINT3 3 -#define PCINT4 4 -#define PCINT5 5 -#define PCINT6 6 -#define PCINT7 7 - -#define PCMSK1 _SFR_MEM8(0x6C) -#define PCINT8 0 -#define PCINT9 1 -#define PCINT10 2 -#define PCINT11 3 -#define PCINT12 4 -#define PCINT13 5 -#define PCINT14 6 -#define PCINT15 7 - -#define TIMSK0 _SFR_MEM8(0x6E) -#define TOIE0 0 -#define OCIE0A 1 - -#define TIMSK1 _SFR_MEM8(0x6F) -#define TOIE1 0 -#define OCIE1A 1 -#define OCIE1B 2 -#define ICIE1 5 - -#define AMISCR _SFR_MEM8(0x77) -#define ISRCEN 0 -#define XREFEN 1 -#define AREFEN 2 - -#ifndef __ASSEMBLER__ -#define ADC _SFR_MEM16(0x78) -#endif -#define ADCW _SFR_MEM16(0x78) - -#define ADCL _SFR_MEM8(0x78) -#define ADCL0 0 -#define ADCL1 1 -#define ADCL2 2 -#define ADCL3 3 -#define ADCL4 4 -#define ADCL5 5 -#define ADCL6 6 -#define ADCL7 7 - -#define ADCH _SFR_MEM8(0x79) -#define ADCH0 0 -#define ADCH1 1 -#define ADCH2 2 -#define ADCH3 3 -#define ADCH4 4 -#define ADCH5 5 -#define ADCH6 6 -#define ADCH7 7 - -#define ADCSRA _SFR_MEM8(0x7A) -#define ADPS0 0 -#define ADPS1 1 -#define ADPS2 2 -#define ADIE 3 -#define ADIF 4 -#define ADATE 5 -#define ADSC 6 -#define ADEN 7 - -#define ADCSRB _SFR_MEM8(0x7B) -#define ADTS0 0 -#define ADTS1 1 -#define ADTS2 2 -#define ACIR0 4 -#define ACIR1 5 -#define ACME 6 -#define BIN 7 - -#define ADMUX _SFR_MEM8(0x7C) -#define MUX0 0 -#define MUX1 1 -#define MUX2 2 -#define MUX3 3 -#define MUX4 4 -#define ADLAR 5 -#define REFS0 6 -#define REFS1 7 - -#define DIDR0 _SFR_MEM8(0x7E) -#define ADC0D 0 -#define ADC1D 1 -#define ADC2D 2 -#define ADC3D 3 -#define ADC4D 4 -#define ADC5D 5 -#define ADC6D 6 -#define ADC7D 7 - -#define DIDR1 _SFR_MEM8(0x7F) -#define ADC8D 0 -#define ADC9D 1 -#define ADC10D 2 - -#define TCCR1A _SFR_MEM8(0x80) -#define WGM10 0 -#define WGM11 1 -#define COM1B0 4 -#define COM1B1 5 -#define COM1A0 6 -#define COM1A1 7 - -#define TCCR1B _SFR_MEM8(0x81) -#define CS10 0 -#define CS11 1 -#define CS12 2 -#define WGM12 3 -#define WGM13 4 -#define ICES1 6 -#define ICNC1 7 - -#define TCCR1C _SFR_MEM8(0x82) -#define FOC1B 6 -#define FOC1A 7 - -#define TCCR1D _SFR_MEM8(0x83) -#define OC1AU 0 -#define OC1AV 1 -#define OC1AW 2 -#define OC1AX 3 -#define OC1BU 4 -#define OC1BV 5 -#define OC1BW 6 -#define OC1BX 7 - -#define TCNT1 _SFR_MEM16(0x84) - -#define TCNT1L _SFR_MEM8(0x84) -#define TCNT1L0 0 -#define TCNT1L1 1 -#define TCNT1L2 2 -#define TCNT1L3 3 -#define TCNT1L4 4 -#define TCNT1L5 5 -#define TCNT1L6 6 -#define TCNT1L7 7 - -#define TCNT1H _SFR_MEM8(0x85) -#define TCNT1H0 0 -#define TCNT1H1 1 -#define TCNT1H2 2 -#define TCNT1H3 3 -#define TCNT1H4 4 -#define TCNT1H5 5 -#define TCNT1H6 6 -#define TCNT1H7 7 - -#define ICR1 _SFR_MEM8(0x86) - -#define ICR1L _SFR_MEM8(0x86) -#define ICR1L0 0 -#define ICR1L1 1 -#define ICR1L2 2 -#define ICR1L3 3 -#define ICR1L4 4 -#define ICR1L5 5 -#define ICR1L6 6 -#define ICR1L7 7 - -#define ICR1H _SFR_MEM8(0x87) -#define ICR1H0 0 -#define ICR1H1 1 -#define ICR1H2 2 -#define ICR1H3 3 -#define ICR1H4 4 -#define ICR1H5 5 -#define ICR1H6 6 -#define ICR1H7 7 - -#define OCR1A _SFR_MEM16(0x88) - -#define OCR1AL _SFR_MEM8(0x88) -#define OCR1AL0 0 -#define OCR1AL1 1 -#define OCR1AL2 2 -#define OCR1AL3 3 -#define OCR1AL4 4 -#define OCR1AL5 5 -#define OCR1AL6 6 -#define OCR1AL7 7 - -#define OCR1AH _SFR_MEM8(0x89) -#define OCR1AH0 0 -#define OCR1AH1 1 -#define OCR1AH2 2 -#define OCR1AH3 3 -#define OCR1AH4 4 -#define OCR1AH5 5 -#define OCR1AH6 6 -#define OCR1AH7 7 - -#define OCR1B _SFR_MEM16(0x8A) - -#define OCR1BL _SFR_MEM8(0x8A) -#define OCR1AL0 0 -#define OCR1AL1 1 -#define OCR1AL2 2 -#define OCR1AL3 3 -#define OCR1AL4 4 -#define OCR1AL5 5 -#define OCR1AL6 6 -#define OCR1AL7 7 - -#define OCR1BH _SFR_MEM8(0x8B) -#define OCR1AH0 0 -#define OCR1AH1 1 -#define OCR1AH2 2 -#define OCR1AH3 3 -#define OCR1AH4 4 -#define OCR1AH5 5 -#define OCR1AH6 6 -#define OCR1AH7 7 - -#define ASSR _SFR_MEM8(0xB6) -#define TCR0BUB 0 -#define TCR0AUB 1 -#define OCR0AUB 3 -#define TCN0UB 4 -#define AS0 5 -#define EXCLK 6 - -#define USICR _SFR_MEM8(0xB8) -#define USITC 0 -#define USICLK 1 -#define USICS0 2 -#define USICS1 3 -#define USIWM0 4 -#define USIWM1 5 -#define USIOIE 6 -#define USISIE 7 - -#define USISR _SFR_MEM8(0xB9) -#define USICNT0 0 -#define USICNT1 1 -#define USICNT2 2 -#define USICNT3 3 -#define USIDC 4 -#define USIPF 5 -#define USIOIF 6 -#define USISIF 7 - -#define USIDR _SFR_MEM8(0xBA) -#define USIDR0 0 -#define USIDR1 1 -#define USIDR2 2 -#define USIDR3 3 -#define USIDR4 4 -#define USIDR5 5 -#define USIDR6 6 -#define USIDR7 7 - -#define USIBR _SFR_MEM8(0xBB) -#define USIBR0 0 -#define USIBR1 1 -#define USIBR2 2 -#define USIBR3 3 -#define USIBR4 4 -#define USIBR5 5 -#define USIBR6 6 -#define USIBR7 7 - -#define USIPP _SFR_MEM8(0xBC) -#define USIPOS 0 - -#define LINCR _SFR_MEM8(0xC8) -#define LCMD0 0 -#define LCMD1 1 -#define LCMD2 2 -#define LENA 3 -#define LCONF0 4 -#define LCONF1 5 -#define LIN13 6 -#define LSWRES 7 - -#define LINSIR _SFR_MEM8(0xC9) -#define LRXOK 0 -#define LTXOK 1 -#define LIDOK 2 -#define LERR 3 -#define LBUSY 4 -#define LIDST0 5 -#define LIDST1 6 -#define LIDST2 7 - -#define LINENIR _SFR_MEM8(0xCA) -#define LENRXOK 0 -#define LENTXOK 1 -#define LENIDOK 2 -#define LENERR 3 - -#define LINERR _SFR_MEM8(0xCB) -#define LBERR 0 -#define LCERR 1 -#define LPERR 2 -#define LSERR 3 -#define LFERR 4 -#define LOVERR 5 -#define LTOERR 6 -#define LABORT 7 - -#define LINBTR _SFR_MEM8(0xCC) -#define LBT0 0 -#define LBT1 1 -#define LBT2 2 -#define LBT3 3 -#define LBT4 4 -#define LBT5 5 -#define LDISR 7 - -#define LINBRR _SFR_MEM16(0xCD) - -#define LINBRRL _SFR_MEM8(0xCD) -#define LDIV0 0 -#define LDIV1 1 -#define LDIV2 2 -#define LDIV3 3 -#define LDIV4 4 -#define LDIV5 5 -#define LDIV6 6 -#define LDIV7 7 - -#define LINBRRH _SFR_MEM8(0xCE) -#define LDIV8 0 -#define LDIV9 1 -#define LDIV10 2 -#define LDIV11 3 - -#define LINDLR _SFR_MEM8(0xCF) -#define LRXDL0 0 -#define LRXDL1 1 -#define LRXDL2 2 -#define LRXDL3 3 -#define LTXDL0 4 -#define LTXDL1 5 -#define LTXDL2 6 -#define LTXDL3 7 - -#define LINIDR _SFR_MEM8(0xD0) -#define LID0 0 -#define LID1 1 -#define LID2 2 -#define LID3 3 -#define LID4 4 -#define LID5 5 -#define LP0 6 -#define LP1 7 - -#define LINSEL _SFR_MEM8(0xD1) -#define LINDX0 0 -#define LINDX1 1 -#define LINDX2 2 -#define LAINC 3 - -#define LINDAT _SFR_MEM8(0xD2) -#define LDATA0 0 -#define LDATA1 1 -#define LDATA2 2 -#define LDATA3 3 -#define LDATA4 4 -#define LDATA5 5 -#define LDATA6 6 -#define LDATA7 7 - - - -/* Interrupt Vectors */ -/* Interrupt Vector 0 is the reset vector. */ -#define INT0_vect _VECTOR(1) /* External Interrupt Request 0 */ -#define INT1_vect _VECTOR(2) /* External Interrupt Request 1 */ -#define PCINT0_vect _VECTOR(3) /* Pin Change Interrupt Request 0 */ -#define PCINT1_vect _VECTOR(4) /* Pin Change Interrupt Request 1 */ -#define WDT_vect _VECTOR(5) /* Watchdog Time-Out Interrupt */ -#define TIMER1_CAPT_vect _VECTOR(6) /* Timer/Counter1 Capture Event */ -#define TIMER1_COMPA_vect _VECTOR(7) /* Timer/Counter1 Compare Match 1A */ -#define TIMER1_COMPB_vect _VECTOR(8) /* Timer/Counter1 Compare Match 1B */ -#define TIMER1_OVF_vect _VECTOR(9) /* Timer/Counter1 Overflow */ -#define TIMER0_COMPA_vect _VECTOR(10) /* Timer/Counter0 Compare Match 0A */ -#define TIMER0_OVF_vect _VECTOR(11) /* Timer/Counter0 Overflow */ -#define LIN_TC_vect _VECTOR(12) /* LIN Transfer Complete */ -#define LIN_ERR_vect _VECTOR(13) /* LIN Error */ -#define SPI_STC_vect _VECTOR(14) /* SPI Serial Transfer Complete */ -#define ADC_vect _VECTOR(15) /* ADC Conversion Complete */ -#define EE_RDY_vect _VECTOR(16) /* EEPROM Ready */ -#define ANA_COMP_vect _VECTOR(17) /* Analog Comparator */ -#define USI_START_vect _VECTOR(18) /* USI Start */ -#define USI_OVF_vect _VECTOR(19) /* USI Overflow */ - -#define _VECTORS_SIZE (20 * 4) - - - -/* Constants */ -#define SPM_PAGESIZE (64) -#define RAMSTART (0x100) -#define RAMSIZE (0x1FF) -#define RAMEND (RAMSTART + RAMSIZE - 1) /* Last On-Chip SRAM Location */ -#define XRAMSIZE (0) -#define XRAMEND (RAMEND + XRAMSIZE) -#define E2END (0x1FF) -#define E2PAGESIZE (4) -#define FLASHEND (0x3FFF) - - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) /* Select Clock source */ -#define FUSE_CKSEL1 (unsigned char)~_BV(1) /* Select Clock source */ -#define FUSE_CKSEL2 (unsigned char)~_BV(2) /* Select Clock source */ -#define FUSE_CKSEL3 (unsigned char)~_BV(3) /* Select Clock source */ -#define FUSE_SUT0 (unsigned char)~_BV(4) /* Select start-up time */ -#define FUSE_SUT1 (unsigned char)~_BV(5) /* Select start-up time */ -#define FUSE_CKOUT (unsigned char)~_BV(6) /* Clock Output Enable */ -#define FUSE_CKDIV8 (unsigned char)~_BV(7) /* Divide clock by 8 */ -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) /* Brown-out Detector trigger level */ -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) /* Brown-out Detector trigger level */ -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) /* Brown-out Detector trigger level */ -#define FUSE_EESAVE (unsigned char)~_BV(3) /* EEPROM memory is preserved through the Chip Erase */ -#define FUSE_WDTON (unsigned char)~_BV(4) /* Watchdog Timer always ON */ -#define FUSE_SPIEN (unsigned char)~_BV(5) /* Enable Serial Program and Data Downloading */ -#define FUSE_DWEN (unsigned char)~_BV(6) /* DebugWIRE Enable */ -#define FUSE_RSTDISBL (unsigned char)~_BV(7) /* External Reset disable */ -#define HFUSE_DEFAULT (FUSE_SPIEN) - -/* Extended Fuse Byte */ -#define FUSE_SELFPRGEN (unsigned char)~_BV(0) /* Self-Programming Enable */ -#define EFUSE_DEFAULT (0xFF) - - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST - - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x94 -#define SIGNATURE_2 0x87 - - - -#endif /* _AVR_IOTN167_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn22.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn22.h deleted file mode 100644 index 04fa10ce7..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn22.h +++ /dev/null @@ -1,205 +0,0 @@ -/* Copyright (c) 2002, Marek Michalkiewicz - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iotn22.h,v 1.9.2.5 2008/10/17 23:27:51 arcanum Exp $ */ - -/* avr/iotn22.h - definitions for ATtiny22 */ - -#ifndef _AVR_IOTN22_H_ -#define _AVR_IOTN22_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iotn22.h" -#else -# error "Attempt to include more than one file." -#endif - -/* I/O registers */ - -/* Input Pins, Port B */ -#define PINB _SFR_IO8(0x16) - -/* Data Direction Register, Port B */ -#define DDRB _SFR_IO8(0x17) - -/* Data Register, Port B */ -#define PORTB _SFR_IO8(0x18) - -/* EEPROM Control Register */ -#define EECR _SFR_IO8(0x1C) - -/* EEPROM Data Register */ -#define EEDR _SFR_IO8(0x1D) - -/* EEPROM Address Register */ -#define EEAR _SFR_IO8(0x1E) -#define EEARL _SFR_IO8(0x1E) - -/* Watchdog Timer Control Register */ -#define WDTCR _SFR_IO8(0x21) - -/* Timer/Counter 0 */ -#define TCNT0 _SFR_IO8(0x32) - -/* Timer/Counter 0 Control Register */ -#define TCCR0 _SFR_IO8(0x33) - -/* MCU Status Register */ -#define MCUSR _SFR_IO8(0x34) - -/* MCU general Control Register */ -#define MCUCR _SFR_IO8(0x35) - -/* Timer/Counter Interrupt Flag register */ -#define TIFR _SFR_IO8(0x38) - -/* Timer/Counter Interrupt MaSK register */ -#define TIMSK _SFR_IO8(0x39) - -/* General Interrupt Flag register */ -#define GIFR _SFR_IO8(0x3A) - -/* General Interrupt MaSK register */ -#define GIMSK _SFR_IO8(0x3B) - -/* 0x3D SP */ - -/* 0x3F SREG */ - -/* Interrupt vectors */ - -/* External Interrupt 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF0_vect _VECTOR(2) -#define SIG_OVERFLOW0 _VECTOR(2) - -#define _VECTORS_SIZE 6 - -/* - The Register Bit names are represented by their bit number (0-7). - */ - -/* General Interrupt MaSK register */ -#define INT0 6 -#define INTF0 6 - -/* General Interrupt Flag Register */ -#define TOIE0 1 -#define TOV0 1 - -/* MCU general Control Register */ -#define SE 5 -#define SM 4 -#define ISC01 1 -#define ISC00 0 - -/* Timer/Counter 0 Control Register */ -#define CS02 2 -#define CS01 1 -#define CS00 0 - -/* Watchdog Timer Control Register */ -#define WDTOE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -/* - PB2 = SCK/T0 - PB1 = MISO/INT0 - PB0 = MOSI - */ - -/* Data Register, Port B */ -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -/* Data Direction Register, Port B */ -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -/* Input Pins, Port B */ -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -/* EEPROM Control Register */ -#define EERIE 3 -#define EEMWE 2 -#define EEWE 1 -#define EERE 0 - -/* Constants */ -#define RAMEND 0xDF -#define XRAMEND 0xDF -#define E2END 0x7F -#define E2PAGESIZE 0 -#define FLASHEND 0x07FF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 1 - -/* Fuse Byte */ -#define FUSE_CKSEL (unsigned char)~_BV(0) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_DEFAULT (FUSE_SPIEN) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x91 -#define SIGNATURE_2 0x06 - - -#endif /* _AVR_IOTN22_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn2313.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn2313.h deleted file mode 100644 index 8edd23066..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn2313.h +++ /dev/null @@ -1,633 +0,0 @@ -/* Copyright (c) 2004, 2005, 2006 Bob Paddock - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iotn2313.h,v 1.14.2.6 2008/10/17 23:27:51 arcanum Exp $ */ - -/* iotn2313.h derived from io2313.h by Bob Paddock. - - The changes between the AT90S2313 and the ATtiny2313 are extensive. - - Atmel has renamed several registers, and bits. See Atmel application note - AVR091, as well as the errata at the end of the current ATtiny2313 data - sheet. Some of the names have changed more than once during the sampling - period of the ATtiny2313. - - Where there is no conflict the new and old names are both supported. - - In the case of a new feature in a register, only the new name is used. - This intentionally breaks old code, so that there are no silent bugs. The - source code must be updated to the new name in this case. - - The hardware interrupt vector table has changed from that of the AT90S2313. - - ATtiny2313 programs in page mode rather than the byte mode of the - AT90S2313. Beware of programming the ATtiny2313 as a AT90S2313 device, - when programming the Flash. - - ATtiny2313 has Signature Bytes: 0x1E 0x91 0x0A. - - Changes and/or additions are noted by "ATtiny" in the comments below. */ - -/* avr/iotn2313.h - definitions for ATtiny2313 */ - -#ifndef _AVR_IOTN2313_H_ -#define _AVR_IOTN2313_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iotn2313.h" -#else -# error "Attempt to include more than one file." -#endif - -/* I/O registers */ - -/* - * The Register Bit names are represented by their bit number (0-7). - * Example: PORTB |= _BV(PORTB7); Set MSB of PORTB. - */ - -/* 0x00 Reserved */ - -/* ATtiny Digital Input Disable Register DIDR */ -#define DIDR _SFR_IO8(0x01) - -#define AIN1D 1 -#define AIN0D 0 - -/* ATtiny USART Baud Rate Register High UBBRH[11:8] */ -#define UBRRH _SFR_IO8(0x02) - -/* ATtiny USART Control and Status Register C UCSRC */ -#define UCSRC _SFR_IO8(0x03) - -#define UMSEL 6 -#define UPM1 5 -#define UPM0 4 -#define USBS 3 -#define UCSZ1 2 -#define UCSZ0 1 -#define UCPOL 0 - -/* 0x04 -> 0x07 Reserved */ - -/* ATtiny Analog Comparator Control and Status Register ACSR */ -#define ACSR _SFR_IO8(0x08) - -#define ACD 7 -#define ACBG 6 -#define ACO 5 -#define ACI 4 -#define ACIE 3 -#define ACIC 2 -#define ACIS1 1 -#define ACIS0 0 - -/* USART Baud Rate Register Low UBBRL[7:0] */ -#define UBRRL _SFR_IO8(0x09) - -/* ATtiny USART Control Register UCSRB */ -#define UCSRB _SFR_IO8(0x0A) - -#define RXCIE 7 -#define TXCIE 6 -#define UDRIE 5 -#define RXEN 4 -#define TXEN 3 -#define UCSZ2 2 -#define RXB8 1 -#define TXB8 0 - -/* ATtiny USART Status Register UCSRA */ -#define UCSRA _SFR_IO8(0x0B) - -#define RXC 7 -#define TXC 6 -#define UDRE 5 -#define FE 4 -#define DOR 3 -#define UPE 2 -#define U2X 1 -#define MPCM 0 - -/* USART I/O Data Register UBR or RXB[7:0], TXB[7:0] */ -#define UDR _SFR_IO8(0x0C) -#define RXB _SFR_IO8(0x0C) -#define TXB _SFR_IO8(0x0C) - -/* ATtiny USI Control Register USICR */ -#define USICR _SFR_IO8(0x0D) - -#define USISIE 7 -#define USIOIE 6 -#define USIWM1 5 -#define USIWM0 4 -#define USICS1 3 -#define USICS0 2 -#define USICLK 1 -#define USITC 0 - -/* ATtiny USI Status Register USISR */ -#define USISR _SFR_IO8(0x0E) - -#define USISIF 7 -#define USIOIF 6 -#define USIPF 5 -#define USIDC 4 -#define USICNT3 3 -#define USICNT2 2 -#define USICNT1 1 -#define USICNT0 0 - -/* ATtiny USI Data Register USIDR[7:0] */ -#define USIDR _SFR_IO8(0x0F) - -/* Input Pins, Port D PIND[6:0] */ -#define PIND _SFR_IO8(0x10) - -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -/* Data Direction Register, Port D DDRD[6:0] */ -#define DDRD _SFR_IO8(0x11) - -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -/* Data Register, Port D PORTD[6:0] */ -#define PORTD _SFR_IO8(0x12) - -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -/* ATtiny General Purpose I/O Register Zero GPIOR0[7:0] */ -#define GPIOR0 _SFR_IO8(0x13) - -/* ATtiny General Purpose I/O Register One GPIOR1[7:0] */ -#define GPIOR1 _SFR_IO8(0x14) - -/* ATtiny General Purpose I/O Register Two One GPIOR2[7:0] */ -#define GPIOR2 _SFR_IO8(0x15) - -/* Input Pins, Port B PORTB[7:0] */ -#define PINB _SFR_IO8(0x16) - -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -/* Data Direction Register, Port B PORTB[7:0] */ -#define DDRB _SFR_IO8(0x17) - -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -/* Data Register, Port B PORTB[7:0] */ -#define PORTB _SFR_IO8(0x18) - -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -/* Port A Input Pins Address PINA[2:0] */ -#define PINA _SFR_IO8(0x19) - -#define PINA2 2 -#define PINA1 1 -#define PINA0 0 - -/* Port A Data Direction Register DDRA[2:0] */ -#define DDRA _SFR_IO8(0x1A) - -#define DDRA2 2 -#define DDRA1 1 -#define DDRA0 0 - -/* Port A Data Register PORTA[2:0] */ -#define PORTA _SFR_IO8(0x1B) - -#define PA2 2 -#define PA1 1 -#define PA0 0 - -/* ATtiny EEPROM Control Register EECR */ -#define EECR _SFR_IO8(0x1C) -#define EEPM1 5 -#define EEPM0 4 -#define EERIE 3 -#define EEMPE 2 -#define EEPE 1 -#define EERE 0 - -/* EEPROM Data Register */ -#define EEDR _SFR_IO8(0x1D) - -/* The EEPROM Address Register EEAR[6:0] */ -#define EEAR _SFR_IO8(0x1E) -#define EEARL _SFR_IO8(0x1E) -#define EEAR6 6 -#define EEAR5 5 -#define EEAR4 4 -#define EEAR3 3 -#define EEAR2 2 -#define EEAR1 1 -#define EEAR0 0 - -/* 0x1F Reserved */ - -/* ATtiny Pin Change Mask Register PCMSK PCINT[7:0] */ -#define PCMSK _SFR_IO8(0x20) - -#define PCINT7 7 -#define PCINT6 6 -#define PCINT5 5 -#define PCINT4 4 -#define PCINT3 3 -#define PCINT2 2 -#define PCINT1 1 -#define PCINT0 0 - -/* ATtiny Watchdog Timer Control Register WDTCSR */ -#define WDTCSR _SFR_IO8(0x21) - -#define WDIF 7 -#define WDIE 6 -#define WDP3 5 -#define WDCE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -/* ATtiny Timer/Counter1 Control Register C TCCR1C */ -#define TCCR1C _SFR_IO8(0x22) - -#define FOC1A 7 -#define FOC1B 6 - -/* General Timer/Counter Control Register GTCCR */ -#define GTCCR _SFR_IO8(0x23) - -#define PSR10 0 - -/* T/C 1 Input Capture Register ICR1[15:0] */ -#define ICR1 _SFR_IO16(0x24) -#define ICR1L _SFR_IO8(0x24) -#define ICR1H _SFR_IO8(0x25) - -/* ATtiny Clock Prescale Register */ -#define CLKPR _SFR_IO8(0x26) - -#define CLKPCE 7 -#define CLKPS3 3 -#define CLKPS2 2 -#define CLKPS1 1 -#define CLKPS0 0 - -/* 0x27 Reserved */ - -/* ATtiny Output Compare Register 1 B OCR1B[15:0] */ -#define OCR1B _SFR_IO16(0x28) -#define OCR1BL _SFR_IO8(0x28) -#define OCR1BH _SFR_IO8(0x29) - -/* Output Compare Register 1 OCR1A[15:0] */ -#define OCR1 _SFR_IO16(0x2A) -#define OCR1L _SFR_IO8(0x2A) -#define OCR1H _SFR_IO8(0x2B) -#define OCR1A _SFR_IO16(0x2A) -#define OCR1AL _SFR_IO8(0x2A) -#define OCR1AH _SFR_IO8(0x2B) - -/* Timer/Counter 1 TCNT1[15:0] */ -#define TCNT1 _SFR_IO16(0x2C) -#define TCNT1L _SFR_IO8(0x2C) -#define TCNT1H _SFR_IO8(0x2D) - -/* ATtiny Timer/Counter 1 Control and Status Register TCCR1B */ -#define TCCR1B _SFR_IO8(0x2E) - -#define ICNC1 7 -#define ICES1 6 -#define WGM13 4 -#define WGM12 3 /* Was CTC1 in AT90S2313 */ -#define CS12 2 -#define CS11 1 -#define CS10 0 - -/* ATtiny Timer/Counter 1 Control Register TCCR1A */ -#define TCCR1A _SFR_IO8(0x2F) - -#define COM1A1 7 -#define COM1A0 6 -#define COM1B1 5 -#define COM1B0 4 -#define WGM11 1 /* Was PWM11 in AT90S2313 */ -#define WGM10 0 /* Was PWM10 in AT90S2313 */ - -/* ATtiny Timer/Counter Control Register A TCCR0A */ -#define TCCR0A _SFR_IO8(0x30) - -#define COM0A1 7 -#define COM0A0 6 -#define COM0B1 5 -#define COM0B0 4 -#define WGM01 1 -#define WGM00 0 - -/* ATtiny Oscillator Calibration Register OSCCAL[6:0] */ -#define OSCCAL _SFR_IO8(0x31) - -#define CAL6 6 -#define CAL5 5 -#define CAL4 4 -#define CAL3 3 -#define CAL2 2 -#define CAL1 1 -#define CAL0 0 - -/* Timer/Counter 0 TCNT0[7:0] */ -#define TCNT0 _SFR_IO8(0x32) - -/* ATtiny Timer/Counter 0 Control Register TCCR0B */ -#define TCCR0B _SFR_IO8(0x33) - -#define FOC0A 7 -#define FOC0B 6 -#define WGM02 3 -#define CS02 2 -#define CS01 1 -#define CS00 0 - -/* ATtiny MCU Status Register MCUSR */ -#define MCUSR _SFR_IO8(0x34) - -#define WDRF 3 -#define BORF 2 -#define EXTRF 1 -#define PORF 0 - -/* ATtiny MCU general Control Register MCUCR */ -#define MCUCR _SFR_IO8(0x35) - -#define PUD 7 -#define SM1 6 -#define SE 5 -#define SM0 4 /* Some preliminary ATtiny2313 data sheets incorrectly refer - to this bit as SMD; was SM in AT90S2313. */ -#define ISC11 3 -#define ISC10 2 -#define ISC01 1 -#define ISC00 0 - -/* ATtiny Output Compare Register A OCR0A[7:0] */ -#define OCR0A _SFR_IO8(0x36) - -/* ATtiny Store Program Memory Control and Status Register SPMCSR */ -#define SPMCSR _SFR_IO8(0x37) - -#define CTPB 4 -#define RFLB 3 -#define PGWRT 2 -#define PGERS 1 -#define SPMEN 0 /* The name is used in ATtiny2313.xml file. */ -#define SELFPRGEN 0 /* The name is used in datasheet. */ -#define SELFPRGE 0 /* The name is left for compatibility. */ - -/* ATtiny Timer/Counter Interrupt Flag register TIFR */ -#define TIFR _SFR_IO8(0x38) - -#define TOV1 7 -#define OCF1A 6 -#define OCF1B 5 -#define ICF1 3 -#define OCF0B 2 -#define TOV0 1 -#define OCF0A 0 - -/* ATtiny Timer/Counter Interrupt MaSK register TIMSK */ -#define TIMSK _SFR_IO8(0x39) - -#define TOIE1 7 -#define OCIE1A 6 -#define OCIE1B 5 -#define ICIE1 3 -#define OCIE0B 2 -#define TOIE0 1 -#define OCIE0A 0 - -/* ATtiny External Interrupt Flag Register EIFR, was GIFR */ -#define EIFR _SFR_IO8(0x3A) - -#define INTF1 7 -#define INTF0 6 -#define PCIF 5 - -/* ATtiny General Interrupt MaSK register GIMSK */ -#define GIMSK _SFR_IO8(0x3B) - -#define INT1 7 -#define INT0 6 -#define PCIE 5 - -/* ATtiny Output Compare Register B OCR0B[7:0] */ -#define OCR0B _SFR_IO8(0x3C) - -/* Interrupt vectors: */ - -/* External Interrupt Request 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) -#define SIG_INT0 _VECTOR(1) - -/* External Interrupt Request 1 */ -#define INT1_vect _VECTOR(2) -#define SIG_INTERRUPT1 _VECTOR(2) -#define SIG_INT1 _VECTOR(2) - -/* Timer/Counter1 Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(3) -#define SIG_INPUT_CAPTURE1 _VECTOR(3) -#define SIG_TIMER1_CAPT _VECTOR(3) - -/* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPA_vect _VECTOR(4) -#define SIG_OUTPUT_COMPARE1A _VECTOR(4) -#define SIG_TIMER1_COMPA _VECTOR(4) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(5) -#define SIG_OVERFLOW1 _VECTOR(5) -#define SIG_TIMER1_OVF _VECTOR(5) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(6) -#define SIG_OVERFLOW0 _VECTOR(6) -#define SIG_TIMER0_OVF _VECTOR(6) - -/* USART, Rx Complete */ -#define USART_RX_vect _VECTOR(7) -#define SIG_USART0_RECV _VECTOR(7) -#define SIG_USART0_RX _VECTOR(7) - -/* USART Data Register Empty */ -#define USART_UDRE_vect _VECTOR(8) -#define SIG_USART0_DATA _VECTOR(8) -#define SIG_USART0_UDRE _VECTOR(8) - -/* USART, Tx Complete */ -#define USART_TX_vect _VECTOR(9) -#define SIG_USART0_TRANS _VECTOR(9) -#define SIG_USART0_TX _VECTOR(9) - -/* Analog Comparator */ -#define ANA_COMP_vect _VECTOR(10) -#define SIG_COMPARATOR _VECTOR(10) -#define SIG_ANALOG_COMP _VECTOR(10) -#define PCINT_vect _VECTOR(11) -#define SIG_PIN_CHANGE _VECTOR(11) -#define SIG_PCINT _VECTOR(11) -#define TIMER1_COMPB_vect _VECTOR(12) -#define SIG_OUTPUT_COMPARE1B _VECTOR(12) -#define SIG_TIMER1_COMPB _VECTOR(12) -#define TIMER0_COMPA_vect _VECTOR(13) -#define SIG_OUTPUT_COMPARE0A _VECTOR(13) -#define SIG_TIMER0_COMPA _VECTOR(13) -#define TIMER0_COMPB_vect _VECTOR(14) -#define SIG_OUTPUT_COMPARE0B _VECTOR(14) -#define SIG_TIMER0_COMPB _VECTOR(14) - -/* USI Start Condition */ -#define USI_START_vect _VECTOR(15) -#define SIG_USI_START _VECTOR(15) -#define SIG_USI_START _VECTOR(15) - -/* USI Overflow */ -#define USI_OVERFLOW_vect _VECTOR(16) -#define SIG_USI_OVERFLOW _VECTOR(16) -#define SIG_USI_OVERFLOW _VECTOR(16) -#define EEPROM_READY_vect _VECTOR(17) -#define SIG_EEPROM_READY _VECTOR(17) -#define SIG_EE_READY _VECTOR(17) - -/* Watchdog Timer Overflow */ -#define WDT_OVERFLOW_vect _VECTOR(18) -#define SIG_WATCHDOG_TIMEOUT _VECTOR(18) -#define SIG_WDT_OVERFLOW _VECTOR(18) - -/* 38 = (18*2)+2: Number of vectors times two, plus the reset vector */ -#define _VECTORS_SIZE 38 - -/* Constants */ -#define SPM_PAGESIZE 32 -#define RAMEND 0xDF -#define XRAMEND 0xDF -#define E2END 0x7F -#define E2PAGESIZE 4 -#define FLASHEND 0x07FF - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_RSTDISBL (unsigned char)~_BV(0) -#define FUSE_BODLEVEL0 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(2) -#define FUSE_BODLEVEL2 (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_EESAVE (unsigned char)~_BV(6) -#define FUSE_DWEN (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_SPIEN) - -/* Extended Fuse Byte */ -#define FUSE_SELFPRGEN (unsigned char)~_BV(0) -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x91 -#define SIGNATURE_2 0x0A - - -#endif /* _AVR_IOTN2313_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn24.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn24.h deleted file mode 100644 index 177c75b91..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn24.h +++ /dev/null @@ -1,89 +0,0 @@ -/* Copyright (c) 2005, Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iotn24.h,v 1.3.2.5 2008/10/17 23:27:51 arcanum Exp $ */ - -/* avr/iotn24.h - definitions for ATtiny24 */ - -#ifndef _AVR_IOTN24_H_ -#define _AVR_IOTN24_H_ 1 - -#include - -#define SPM_PAGESIZE 32 -#define RAMEND 0xDF -#define XRAMEND 0xDF -#define E2END 0x7F -#define E2PAGESIZE 4 -#define FLASHEND 0x7FF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_DWEN (unsigned char)~_BV(6) -#define FUSE_RSTDISBL (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_SPIEN) - -/* Extended Fuse Byte */ -#define FUSE_SELFPRGEN (unsigned char)~_BV(0) -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x91 -#define SIGNATURE_2 0x0B - - -#endif /* _AVR_IOTN24_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn25.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn25.h deleted file mode 100644 index 8a6f3cdc9..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn25.h +++ /dev/null @@ -1,89 +0,0 @@ -/* Copyright (c) 2005, Joerg Wunsch - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iotn25.h,v 1.3.2.5 2008/10/17 23:27:51 arcanum Exp $ */ - -/* avr/iotn25.h - definitions for ATtiny25 */ - -#ifndef _AVR_IOTN25_H_ -#define _AVR_IOTN25_H_ 1 - -#include - -#define SPM_PAGESIZE 32 -#define RAMEND 0xDF -#define XRAMEND 0xDF -#define E2END 0x7F -#define E2PAGESIZE 4 -#define FLASHEND 0x7FF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_DWEN (unsigned char)~_BV(6) -#define FUSE_RSTDISBL (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_SPIEN) - -/* Extended Fuse Byte */ -#define FUSE_SELFPRGEN (unsigned char)~_BV(0) -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x91 -#define SIGNATURE_2 0x08 - - -#endif /* _AVR_IOTN25_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn26.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn26.h deleted file mode 100644 index 35d9cc93a..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn26.h +++ /dev/null @@ -1,385 +0,0 @@ -/* Copyright (c) 2004,2005 Eric B. Weddington - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iotn26.h,v 1.15.2.6 2008/10/17 23:27:52 arcanum Exp $ */ - -/* avr/iotn26.h - definitions for ATtiny26 */ - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iotn26.h" -#else -# error "Attempt to include more than one file." -#endif - -#ifndef _AVR_IOTN26_H_ -#define _AVR_IOTN26_H_ 1 - -/* Registers and associated bit numbers */ - -/* Reserved [0x00..0x03] */ - -#define ADCW _SFR_IO16(0x04) -#ifndef __ASSEMBLER__ -#define ADC _SFR_IO16(0x04) -#endif - -#define ADCL _SFR_IO8(0x04) -#define ADCH _SFR_IO8(0x05) - -#define ADCSR _SFR_IO8(0x06) -#define ADPS0 0 -#define ADPS1 1 -#define ADPS2 2 -#define ADIE 3 -#define ADIF 4 -#define ADFR 5 -#define ADSC 6 -#define ADEN 7 - -#define ADMUX _SFR_IO8(0x07) -#define MUX0 0 -#define MUX1 1 -#define MUX2 2 -#define MUX3 3 -#define MUX4 4 -#define ADLAR 5 -#define REFS0 6 -#define REFS1 7 - -#define ACSR _SFR_IO8(0x08) -#define ACIS0 0 -#define ACIS1 1 -#define ACME 2 -#define ACIE 3 -#define ACI 4 -#define ACO 5 -#define ACBG 6 -#define ACD 7 - -/* Reserved [0x09..0x0C] */ - -#define USICR _SFR_IO8(0x0D) -#define USITC 0 -#define USICLK 1 -#define USICS0 2 -#define USICS1 3 -#define USIWM0 4 -#define USIWM1 5 -#define USIOIE 6 -#define USISIE 7 - -#define USISR _SFR_IO8(0x0E) -#define USICNT0 0 -#define USICNT1 1 -#define USICNT2 2 -#define USICNT3 3 -#define USIDC 4 -#define USIPF 5 -#define USIOIF 6 -#define USISIF 7 - -#define USIDR _SFR_IO8(0x0F) - -/* Reserved [0x10..0x15] */ - - -#define PINB _SFR_IO8(0x16) -#define PINB0 0 -#define PINB1 1 -#define PINB2 2 -#define PINB3 3 -#define PINB4 4 -#define PINB5 5 -#define PINB6 6 -#define PINB7 7 - -#define DDRB _SFR_IO8(0x17) -#define DDB0 0 -#define DDB1 1 -#define DDB2 2 -#define DDB3 3 -#define DDB4 4 -#define DDB5 5 -#define DDB6 6 -#define DDB7 7 - -#define PORTB _SFR_IO8(0x18) -#define PB0 0 -#define PB1 1 -#define PB2 2 -#define PB3 3 -#define PB4 4 -#define PB5 5 -#define PB6 6 -#define PB7 7 - -#define PINA _SFR_IO8(0x19) -#define PINA0 0 -#define PINA1 1 -#define PINA2 2 -#define PINA3 3 -#define PINA4 4 -#define PINA5 5 -#define PINA6 6 -#define PINA7 7 - -#define DDRA _SFR_IO8(0x1A) -#define DDA0 0 -#define DDA1 1 -#define DDA2 2 -#define DDA3 3 -#define DDA4 4 -#define DDA5 5 -#define DDA6 6 -#define DDA7 7 - -#define PORTA _SFR_IO8(0x1B) -#define PA0 0 -#define PA1 1 -#define PA2 2 -#define PA3 3 -#define PA4 4 -#define PA5 5 -#define PA6 6 -#define PA7 7 - -/* EEPROM Control Register */ -#define EECR _SFR_IO8(0x1C) -#define EERE 0 -#define EEWE 1 -#define EEMWE 2 -#define EERIE 3 - -/* EEPROM Data Register */ -#define EEDR _SFR_IO8(0x1D) - -/* EEPROM Address Register */ -#define EEAR _SFR_IO8(0x1E) -#define EEARL _SFR_IO8(0x1E) - -/* Reserved [0x1F..0x20] */ - -#define WDTCR _SFR_IO8(0x21) -#define WDP0 0 -#define WDP1 1 -#define WDP2 2 -#define WDE 3 -#define WDCE 4 - -/* Reserved [0x22..0x28] */ - -#define PLLCSR _SFR_IO8(0x29) -#define PLOCK 0 -#define PLLE 1 -#define PCKE 2 - -/* Reserved [0x2A] */ - -#define OCR1C _SFR_IO8(0x2B) - -#define OCR1B _SFR_IO8(0x2C) - -#define OCR1A _SFR_IO8(0x2D) - -#define TCNT1 _SFR_IO8(0x2E) - -#define TCCR1B _SFR_IO8(0x2F) -#define CS10 0 -#define CS11 1 -#define CS12 2 -#define CS13 3 -#define PSR1 6 -#define CTC1 7 - -#define TCCR1A _SFR_IO8(0x30) -#define PWM1B 0 -#define PWM1A 1 -#define FOC1B 2 -#define FOC1A 3 -#define COM1B0 4 -#define COM1B1 5 -#define COM1A0 6 -#define COM1A1 7 - -#define OSCCAL _SFR_IO8(0x31) - -#define TCNT0 _SFR_IO8(0x32) - -#define TCCR0 _SFR_IO8(0x33) -#define CS00 0 -#define CS01 1 -#define CS02 2 -#define PSR0 3 - -#define MCUSR _SFR_IO8(0x34) -#define PORF 0 -#define EXTRF 1 -#define BORF 2 -#define WDRF 3 - -#define MCUCR _SFR_IO8(0x35) -#define ISC00 0 -#define ISC01 1 -#define SM0 3 -#define SM1 4 -#define SE 5 -#define PUD 6 - -/* Reserved [0x36..0x37] */ - -#define TIFR _SFR_IO8(0x38) -#define TOV0 1 -#define TOV1 2 -#define OCF1B 5 -#define OCF1A 6 - -#define TIMSK _SFR_IO8(0x39) -#define TOIE0 1 -#define TOIE1 2 -#define OCIE1B 5 -#define OCIE1A 6 - -#define GIFR _SFR_IO8(0x3A) -#define PCIF 5 -#define INTF0 6 - -#define GIMSK _SFR_IO8(0x3B) -#define PCIE0 4 -#define PCIE1 5 -#define INT0 6 - -/* Reserved [0x3C] */ - -/* SP [0x3D] */ - -/* Reserved [0x3E] */ - -/* SREG [0x3F] */ - - -/* Interrupt vectors */ -/* Interrupt vector 0 is the reset vector. */ -/* External Interrupt 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* External Interrupt Request 0 */ -#define IO_PINS_vect _VECTOR(2) -#define SIG_PIN_CHANGE _VECTOR(2) - -/* Timer/Counter1 Compare Match 1A */ -#define TIMER1_CMPA_vect _VECTOR(3) -#define SIG_OUTPUT_COMPARE1A _VECTOR(3) - -/* Timer/Counter1 Compare Match 1B */ -#define TIMER1_CMPB_vect _VECTOR(4) -#define SIG_OUTPUT_COMPARE1B _VECTOR(4) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF1_vect _VECTOR(5) -#define SIG_OVERFLOW1 _VECTOR(5) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF0_vect _VECTOR(6) -#define SIG_OVERFLOW0 _VECTOR(6) - -/* USI Start */ -#define USI_STRT_vect _VECTOR(7) -#define SIG_USI_START _VECTOR(7) - -/* USI Overflow */ -#define USI_OVF_vect _VECTOR(8) -#define SIG_USI_OVERFLOW _VECTOR(8) - -/* EEPROM Ready */ -#define EE_RDY_vect _VECTOR(9) -#define SIG_EEPROM_READY _VECTOR(9) - -/* Analog Comparator */ -#define ANA_COMP_vect _VECTOR(10) -#define SIG_ANA_COMP _VECTOR(10) -#define SIG_COMPARATOR _VECTOR(10) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(11) -#define SIG_ADC _VECTOR(11) - -#define _VECTORS_SIZE 24 - - -/* Constants */ -#define RAMEND 0xDF -#define XRAMEND 0xDF -#define E2END 0x7F -#define E2PAGESIZE 4 -#define FLASHEND 0x07FF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 2 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOPT (unsigned char)~_BV(6) -#define FUSE_PLLCK (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL1 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0) - -/* High Fuse Byte */ -#define FUSE_BODEN (unsigned char)~_BV(0) -#define FUSE_BODLEVEL (unsigned char)~_BV(1) -#define FUSE_EESAVE (unsigned char)~_BV(2) -#define FUSE_SPIEN (unsigned char)~_BV(3) -#define FUSE_RSTDISBL (unsigned char)~_BV(4) -#define HFUSE_DEFAULT (FUSE_SPIEN) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x91 -#define SIGNATURE_2 0x09 - - -#endif /* _AVR_IOTN26_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn261.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn261.h deleted file mode 100644 index 79bb77087..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn261.h +++ /dev/null @@ -1,88 +0,0 @@ -/* Copyright (c) 2006, Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iotn261.h,v 1.3.2.5 2008/10/17 23:27:52 arcanum Exp $ */ - -/* avr/iotn261.h - definitions for ATtiny261 */ - -#ifndef _AVR_IOTN261_H_ -#define _AVR_IOTN261_H_ 1 - -#include - -#define SPM_PAGESIZE 32 -#define RAMEND 0xDF -#define XRAMEND 0xDF -#define E2END 0x7F -#define E2PAGESIZE 4 -#define FLASHEND 0x7FF - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_DWEN (unsigned char)~_BV(6) -#define FUSE_RSTDISBL (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_SPIEN) - -/* Extended Fuse Byte */ -#define FUSE_SELFPRGEN (unsigned char)~_BV(0) -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x91 -#define SIGNATURE_2 0x0C - - -#endif /* _AVR_IOTN261_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn28.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn28.h deleted file mode 100644 index fe02d8d3b..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn28.h +++ /dev/null @@ -1,275 +0,0 @@ -/* Copyright (c) 2002, Marek Michalkiewicz - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iotn28.h,v 1.9.2.5 2008/10/17 23:27:52 arcanum Exp $ */ - -/* avr/iotn28.h - definitions for ATtiny28 */ - -#ifndef _AVR_IOTN28_H_ -#define _AVR_IOTN28_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iotn28.h" -#else -# error "Attempt to include more than one file." -#endif - -#ifndef __ASSEMBLER__ -# warning "MCU not supported by the C compiler" -#endif - -/* I/O registers */ - -#define OSCCAL _SFR_IO8(0x00) - -#define WDTCR _SFR_IO8(0x01) - -#define MODCR _SFR_IO8(0x02) - -#define TCNT0 _SFR_IO8(0x03) -#define TCCR0 _SFR_IO8(0x04) - -#define IFR _SFR_IO8(0x05) -#define ICR _SFR_IO8(0x06) - -#define MCUCS _SFR_IO8(0x07) - -#define ACSR _SFR_IO8(0x08) - -/* 0x09..0x0F reserved */ - -#define PIND _SFR_IO8(0x10) -#define DDRD _SFR_IO8(0x11) -#define PORTD _SFR_IO8(0x12) - -/* 0x13..0x15 reserved */ - -#define PINB _SFR_IO8(0x16) - -/* 0x17..0x18 reserved */ - -#define PINA _SFR_IO8(0x19) -#define PACR _SFR_IO8(0x1A) -#define PORTA _SFR_IO8(0x1B) - -/* 0x1C..0x3E reserved */ - -/* 0x3F SREG */ - -/* Interrupt vectors */ - -/* External Interrupt 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* External Interrupt 1 */ -#define INT1_vect _VECTOR(2) -#define SIG_INTERRUPT1 _VECTOR(2) - -/* Low-level Input on Port B */ -#define LOWLEVEL_IO_PINS_vect _VECTOR(3) -#define SIG_PIN _VECTOR(3) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(4) -#define SIG_OVERFLOW0 _VECTOR(4) - -/* Analog Comparator */ -#define ANA_COMP_vect _VECTOR(5) -#define SIG_COMPARATOR _VECTOR(5) - -#define _VECTORS_SIZE 12 - - -/* Bit numbers */ - -/* ICR */ -#define INT1 7 -#define INT0 6 -#define LLIE 5 -#define TOIE0 4 -#define ISC11 3 -#define ISC10 2 -#define ISC01 1 -#define ISC00 - -/* IFR */ -#define INTF1 7 -#define INTF0 6 -#define TOV0 4 - -/* MCUCS */ -#define PLUPB 7 -#define SE 5 -#define SM 4 -#define WDRF 3 -#define EXTRF 1 -#define PORF 0 - -/* TCCR0 */ -#define FOV0 7 -#define OOM01 4 -#define OOM00 3 -#define CS02 2 -#define CS01 1 -#define CS00 0 - -/* MODCR */ -#define ONTIM4 7 -#define ONTIM3 6 -#define ONTIM2 5 -#define ONTIM1 4 -#define ONTIM0 3 -#define MCONF2 2 -#define MCONF1 1 -#define MCONF0 0 - -/* WDTCR */ -#define WDTOE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -/* - PA2 = IR - */ - -/* PORTA */ -#define PA3 3 -#define PA2 2 -#define PA1 1 -#define PA0 0 - -/* PACR */ -#define DDA3 3 -#define PA2HC 2 -#define DDA1 1 -#define DDA0 0 - -/* PINA */ -#define PINA3 3 -#define PINA1 1 -#define PINA0 0 - -/* - PB4 = INT1 - PB3 = INT0 - PB2 = T0 - PB1 = AIN1 - PB0 = AIN0 - */ - -/* PINB */ -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -/* PORTD */ -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -/* DDRD */ -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -/* PIND */ -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -/* ACSR */ -#define ACD 7 -#define ACO 5 -#define ACI 4 -#define ACIE 3 -#define ACIS1 1 -#define ACIS0 0 - -/* Last memory addresses */ -#define RAMEND 0x1F -#define XRAMEND 0x0 -#define E2END 0x0 -#define E2PAGESIZE 0 -#define FLASHEND 0x7FF - - -/* Fuses */ - -#define FUSE_MEMORY_SIZE 1 - -/* Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_INTCAP (unsigned char)~_BV(4) -#define FUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x91 -#define SIGNATURE_2 0x07 - - -#endif /* _AVR_IOTN28_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn43u.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn43u.h deleted file mode 100644 index 5df208a31..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn43u.h +++ /dev/null @@ -1,575 +0,0 @@ -/* Copyright (c) 2007 Atmel Corporation - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. -*/ - -/* $Id: iotn43u.h,v 1.4.2.5 2008/10/17 23:27:52 arcanum Exp $ */ - -/* avr/iotn43u.h - definitions for ATtiny43U */ - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iotn43u.h" -#else -# error "Attempt to include more than one file." -#endif - - -#ifndef _AVR_IOTN43U_H_ -#define _AVR_IOTN43U_H_ 1 - -/* Registers and associated bit numbers */ - -#define PRR _SFR_IO8(0x00) -#define PRADC 0 -#define PRUSI 1 -#define PRTIM0 2 -#define PRTIM1 3 - -#define DIDR0 _SFR_IO8(0x01) -#define ADC0D 0 -#define ADC1D 1 -#define ADC2D 2 -#define ADC3D 3 -#define AIN0D 4 -#define AIN1D 5 - -/* Reserved [0x02] */ - -#define ADCSRB _SFR_IO8(0x03) -#define ADTS0 0 -#define ADTS1 1 -#define ADTS2 2 -#define ADLAR 4 -#define ACME 6 - -#define ADC _SFR_IO16(0x04) - -#define ADCL _SFR_IO8(0x04) -#define ADCL0 0 -#define ADCL1 1 -#define ADCL2 2 -#define ADCL3 3 -#define ADCL4 4 -#define ADCL5 5 -#define ADCL6 6 -#define ADCL7 7 - -#define ADCH _SFR_IO8(0x05) -#define ADCH0 0 -#define ADCH1 1 -#define ADCH2 2 -#define ADCH3 3 -#define ADCH4 4 -#define ADCH5 5 -#define ADCH6 6 -#define ADCH7 7 - -#define ADCSRA _SFR_IO8(0x06) -#define ADPS0 0 -#define ADPS1 1 -#define ADPS2 2 -#define ADIE 3 -#define ADIF 4 -#define ADATE 5 -#define ADSC 6 -#define ADEN 7 - -#define ADMUX _SFR_IO8(0x07) -#define MUX0 0 -#define MUX1 1 -#define MUX2 2 -#define REFS0 6 - -#define ACSR _SFR_IO8(0x08) -#define ACIS0 0 -#define ACIS1 1 -#define ACIE 3 -#define ACI 4 -#define ACO 5 -#define ACBG 6 -#define ACD 7 - -/* Reserved [0x09], [0x0A] */ - -#define TIFR1 _SFR_IO8(0x0B) -#define TOV1 0 -#define OCF1A 1 -#define OCF1B 2 - -#define TIMSK1 _SFR_IO8(0x0C) -#define TOIE1 0 -#define OCIE1A 1 -#define OCIE1B 2 - -#define USICR _SFR_IO8(0x0D) -#define USITC 0 -#define USICLK 1 -#define USICS0 2 -#define USICS1 3 -#define USIWM0 4 -#define USIWM1 5 -#define USIOIE 6 -#define USISIE 7 - -#define USISR _SFR_IO8(0x0E) -#define USICNT0 0 -#define USICNT1 1 -#define USICNT2 2 -#define USICNT3 3 -#define USIDC 4 -#define USIPF 5 -#define USIOIF 6 -#define USISIF 7 - -#define USIDR _SFR_IO8(0x0F) -#define USIDR0 0 -#define USIDR1 1 -#define USIDR2 2 -#define USIDR3 3 -#define USIDR4 4 -#define USIDR5 5 -#define USIDR6 6 -#define USIDR7 7 - -#define USIBR _SFR_IO8(0x10) -#define USIBR0 0 -#define USIBR1 1 -#define USIBR2 2 -#define USIBR3 3 -#define USIBR4 4 -#define USIBR5 5 -#define USIBR6 6 -#define USIBR7 7 - -/* Reserved [0x11] */ - -#define PCMSK0 _SFR_IO8(0x12) -#define PCINT0 0 -#define PCINT1 1 -#define PCINT2 2 -#define PCINT3 3 -#define PCINT4 4 -#define PCINT5 5 -#define PCINT6 6 -#define PCINT7 7 - -#define GPIOR0 _SFR_IO8(0x13) -#define GPIOR00 0 -#define GPIOR01 1 -#define GPIOR02 2 -#define GPIOR03 3 -#define GPIOR04 4 -#define GPIOR05 5 -#define GPIOR06 6 -#define GPIOR07 7 - -#define GPIOR1 _SFR_IO8(0x14) -#define GPIOR10 0 -#define GPIOR11 1 -#define GPIOR12 2 -#define GPIOR13 3 -#define GPIOR14 4 -#define GPIOR15 5 -#define GPIOR16 6 -#define GPIOR17 7 - -#define GPIOR2 _SFR_IO8(0x15) -#define GPIOR20 0 -#define GPIOR21 1 -#define GPIOR22 2 -#define GPIOR23 3 -#define GPIOR24 4 -#define GPIOR25 5 -#define GPIOR26 6 -#define GPIOR27 7 - -#define PINB _SFR_IO8(0x16) -#define PINB0 0 -#define PINB1 1 -#define PINB2 2 -#define PINB3 3 -#define PINB4 4 -#define PINB5 5 -#define PINB6 6 -#define PINB7 7 - -#define DDRB _SFR_IO8(0x17) -#define DDB0 0 -#define DDB1 1 -#define DDB2 2 -#define DDB3 3 -#define DDB4 4 -#define DDB5 5 -#define DDB6 6 -#define DDB7 7 - -#define PORTB _SFR_IO8(0x18) -#define PORTB0 0 -#define PORTB1 1 -#define PORTB2 2 -#define PORTB3 3 -#define PORTB4 4 -#define PORTB5 5 -#define PORTB6 6 -#define PORTB7 7 - -#define PINA _SFR_IO8(0x19) -#define PINA0 0 -#define PINA1 1 -#define PINA2 2 -#define PINA3 3 -#define PINA4 4 -#define PINA5 5 -#define PINA6 6 -#define PINA7 7 - -#define DDRA _SFR_IO8(0x1A) -#define DDA0 0 -#define DDA1 1 -#define DDA2 2 -#define DDA3 3 -#define DDA4 4 -#define DDA5 5 -#define DDA6 6 -#define DDA7 7 - -#define PORTA _SFR_IO8(0x1B) -#define PORTA0 0 -#define PORTA1 1 -#define PORTA2 2 -#define PORTA3 3 -#define PORTA4 4 -#define PORTA5 5 -#define PORTA6 6 -#define PORTA7 7 - -/* EEPROM Control Register */ -#define EECR _SFR_IO8(0x1C) -#define EERE 0 -#define EEPE 1 -#define EEMPE 2 -#define EERIE 3 -#define EEPM0 4 -#define EEPM1 5 - -/* EEPROM Data Register */ -#define EEDR _SFR_IO8(0x1D) - -/* EEPROM Address Register */ -#define EEARL _SFR_IO8(0x1E) - -/* Reserved [0x1F] */ - -#define PCMSK1 _SFR_IO8(0x20) -#define PCINT8 0 -#define PCINT9 1 -#define PCINT10 2 -#define PCINT11 3 - -#define WDTCSR _SFR_IO8(0x21) -#define WDP0 0 -#define WDP1 1 -#define WDP2 2 -#define WDE 3 -#define WDCE 4 -#define WDP3 5 -#define WDIE 6 -#define WDIF 7 - -/* Reserved [0x22] */ - -#define GTCCR _SFR_IO8(0x23) -#define PSR10 0 -#define TSM 7 - -/* Reserved [0x24], [0x25] */ - -#define CLKPR _SFR_IO8(0x26) -#define CLKPS0 0 -#define CLKPS1 1 -#define CLKPS2 2 -#define CLKPS3 3 -#define CLKPCE 7 - -/* Reserved [0x27],[0x28],[0x29],[0x2A] */ - -#define OCR1B _SFR_IO8(0x2B) -#define OCR1B_0 0 -#define OCR1B_1 1 -#define OCR1B_2 2 -#define OCR1B_3 3 -#define OCR1B_4 4 -#define OCR1B_5 5 -#define OCR1B_6 6 -#define OCR1B_7 7 - -#define OCR1A _SFR_IO8(0x2C) -#define OCR1A_0 0 -#define OCR1A_1 1 -#define OCRA1_2 2 -#define OCRA1_3 3 -#define OCRA1_4 4 -#define OCRA1_5 5 -#define OCRA1_6 6 -#define OCRA1_7 7 - -#define TCNT1 _SFR_IO8(0x2D) -#define TCNT1_0 0 -#define TCNT1_1 1 -#define TCNT1_2 2 -#define TCNT1_3 3 -#define TCNT1_4 4 -#define TCNT1_5 5 -#define TCNT1_6 6 -#define TCNT1_7 7 - -#define TCCR1B _SFR_IO8(0x2E) -#define CS10 0 -#define CS11 1 -#define CS12 2 -#define WGM12 3 -#define FOC1B 6 -#define FOC1A 7 - -#define TCCR1A _SFR_IO8(0x2F) -#define WGM10 0 -#define WGM11 1 -#define COM1B0 4 -#define COM1B1 5 -#define COM1A0 6 -#define COM1A1 7 - -#define TCCR0A _SFR_IO8(0x30) -#define WGM00 0 -#define WGM01 1 -#define COM0B0 4 -#define COM0B1 5 -#define COM0A0 6 -#define COM0A1 7 - -#define OSCCAL _SFR_IO8(0x31) -#define CAL0 0 -#define CAL1 1 -#define CAL2 2 -#define CAL3 3 -#define CAL4 4 -#define CAL5 5 -#define CAL6 6 -#define CAL7 7 - -#define TCNT0 _SFR_IO8(0x32) -#define TCNT0_0 0 -#define TCNT0_1 1 -#define TCNT0_2 2 -#define TCNT0_3 3 -#define TCNT0_4 4 -#define TCNT0_5 5 -#define TCNT0_6 6 -#define TCNT0_7 7 - -#define TCCR0B _SFR_IO8(0x33) -#define CS00 0 -#define CS01 1 -#define CS02 2 -#define WGM02 3 -#define FOC0B 6 -#define FOC0A 7 - -#define MCUSR _SFR_IO8(0x34) -#define PORF 0 -#define EXTRF 1 -#define BORF 2 -#define WDRF 3 - -#define MCUCR _SFR_IO8(0x35) -#define ISC00 0 -#define ISC01 1 -#define BODSE 2 -#define SM0 3 -#define SM1 4 -#define SE 5 -#define PUD 6 -#define BODS 7 - -#define OCR0A _SFR_IO8(0x36) -#define OCR0A_0 0 -#define OCR0A_1 1 -#define OCR0A_2 2 -#define OCR0A_3 3 -#define OCR0A_4 4 -#define OCR0A_5 5 -#define OCR0A_6 6 -#define OCR0A_7 7 - -#define SPMCSR _SFR_IO8(0x37) -#define SPMEN 0 -#define PGERS 1 -#define PGWRT 2 -#define RFLB 3 -#define CTPB 4 - -#define TIFR0 _SFR_IO8(0x38) -#define TOV0 0 -#define OCF0A 1 -#define OCF0B 2 - -#define TIMSK0 _SFR_IO8(0x39) -#define TOIE0 0 -#define OCIE0A 1 -#define OCIE0B 2 - -#define GIFR _SFR_IO8(0x3A) -#define PCIF0 4 -#define PCIF1 5 -#define INTF0 6 - -#define GIMSK _SFR_IO8(0x3B) -#define PCIE0 4 -#define PCIE1 5 -#define INT0 6 - -#define OCR0B _SFR_IO8(0x3C) -#define OCR0B_0 0 -#define OCR0B_1 1 -#define OCR0B_2 2 -#define OCR0B_3 3 -#define OCR0B_4 4 -#define OCR0B_5 5 -#define OCR0B_6 6 -#define OCR0B_7 7 - - - -/* Interrupt Vectors */ -/* Interrupt vector 0 is the reset vector. */ - -/* External Interrupt Request 0 */ -#define INT0_vect _VECTOR(1) - -/* Pin Change Interrupt Request 0 */ -#define PCINT0_vect _VECTOR(2) - -/* Pin Change Interrupt Request 1 */ -#define PCINT1_vect _VECTOR(3) - -/* Watchdog Time-out */ -#define WDT_vect _VECTOR(4) - -/* Timer/Counter1 Compare Match A */ -#define TIM1_COMPA_vect _VECTOR(5) - -/* Timer/Counter1 Compare Match B */ -#define TIM1_COMPB_vect _VECTOR(6) - -/* Timer/Counter1 Overflow */ -#define TIM1_OVF_vect _VECTOR(7) - -/* Timer/Counter0 Compare Match A */ -#define TIM0_COMPA_vect _VECTOR(8) - -/* Timer/Counter0 Compare Match B */ -#define TIM0_COMPB_vect _VECTOR(9) - -/* Timer/Counter0 Overflow */ -#define TIM0_OVF_vect _VECTOR(10) - -/* Analog Comparator */ -#define ANA_COMP_vect _VECTOR(11) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(12) - -/* EEPROM Ready */ -#define EE_RDY_vect _VECTOR(13) - -/* USI START */ -#define USI_START_vect _VECTOR(14) - -/* USI Overflow */ -#define USI_OVF_vect _VECTOR(15) - -#define _VECTORS_SIZE 32 - - -/* Constants */ -#define SPM_PAGESIZE 64 -#define RAMEND 0x15F -#define XRAMEND 0x00 -#define E2END 0x3F -#define E2PAGESIZE 4 -#define FLASHEND 0xFFF - - -/* Fuse Information */ -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_DWEN (unsigned char)~_BV(6) -#define FUSE_RSTDISBL (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_SPIEN) - -/* Extended Fuse Byte */ -#define FUSE_SELFPRGEN (unsigned char)~_BV(0) -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x92 -#define SIGNATURE_2 0x0C - - -#endif /* _AVR_IOTN43U_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn44.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn44.h deleted file mode 100644 index 46132ba5c..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn44.h +++ /dev/null @@ -1,89 +0,0 @@ -/* Copyright (c) 2005, Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iotn44.h,v 1.3.2.5 2008/10/17 23:27:52 arcanum Exp $ */ - -/* avr/iotn44.h - definitions for ATtiny44 */ - -#ifndef _AVR_IOTN44_H_ -#define _AVR_IOTN44_H_ 1 - -#include - -/* Constants */ -#define SPM_PAGESIZE 64 -#define RAMEND 0x15F -#define XRAMEND 0x15F -#define E2END 0xFF -#define E2PAGESIZE 4 -#define FLASHEND 0xFFF - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_DWEN (unsigned char)~_BV(6) -#define FUSE_RSTDISBL (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_SPIEN) - -/* Extended Fuse Byte */ -#define FUSE_SELFPRGEN (unsigned char)~_BV(0) -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x92 -#define SIGNATURE_2 0x07 - - -#endif /* _AVR_IOTN44_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn45.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn45.h deleted file mode 100644 index af9aec810..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn45.h +++ /dev/null @@ -1,89 +0,0 @@ -/* Copyright (c) 2005, Joerg Wunsch - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iotn45.h,v 1.3.2.5 2008/10/17 23:27:52 arcanum Exp $ */ - -/* avr/iotn45.h - definitions for ATtiny45 */ - -#ifndef _AVR_IOTN45_H_ -#define _AVR_IOTN45_H_ 1 - -#include - -/* Constants */ -#define SPM_PAGESIZE 64 -#define RAMEND 0x15F -#define XRAMEND 0x15F -#define E2END 0xFF -#define E2PAGESIZE 4 -#define FLASHEND 0xFFF - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_DWEN (unsigned char)~_BV(6) -#define FUSE_RSTDISBL (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_SPIEN) - -/* Extended Fuse Byte */ -#define FUSE_SELFPRGEN (unsigned char)~_BV(0) -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x92 -#define SIGNATURE_2 0x06 - - -#endif /* _AVR_IOTN45_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn461.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn461.h deleted file mode 100644 index fe986ea60..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn461.h +++ /dev/null @@ -1,89 +0,0 @@ -/* Copyright (c) 2006, Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iotn461.h,v 1.3.2.5 2008/10/17 23:27:52 arcanum Exp $ */ - -/* avr/iotn461.h - definitions for ATtiny461 */ - -#ifndef _AVR_IOTN461_H_ -#define _AVR_IOTN461_H_ 1 - -#include - -/* Constants */ -#define SPM_PAGESIZE 64 -#define RAMEND 0x15F -#define XRAMEND 0x15F -#define E2END 0xFF -#define E2PAGESIZE 4 -#define FLASHEND 0xFFF - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_DWEN (unsigned char)~_BV(6) -#define FUSE_RSTDISBL (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_SPIEN) - -/* Extended Fuse Byte */ -#define FUSE_SELFPRGEN (unsigned char)~_BV(0) -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x92 -#define SIGNATURE_2 0x08 - - -#endif /* _AVR_IOTN461_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn48.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn48.h deleted file mode 100644 index 37d4fcfca..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn48.h +++ /dev/null @@ -1,759 +0,0 @@ -/* Copyright (c) 2007 Atmel Corporation - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. -*/ - -/* $Id: iotn48.h,v 1.4.2.9 2008/10/17 23:27:52 arcanum Exp $ */ - -/* avr/iotn48.h - definitions for ATtiny43U */ - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iotn48.h" -#else -# error "Attempt to include more than one file." -#endif - - -#ifndef _AVR_IOTN48_H_ -#define _AVR_IOTN48_H_ 1 - -/* Registers and associated bit numbers */ - -#define PINB _SFR_IO8(0x03) -#define PINB0 0 -#define PINB1 1 -#define PINB2 2 -#define PINB3 3 -#define PINB4 4 -#define PINB5 5 -#define PINB6 6 -#define PINB7 7 - -#define DDRB _SFR_IO8(0x04) -#define DDB0 0 -#define DDB1 1 -#define DDB2 2 -#define DDB3 3 -#define DDB4 4 -#define DDB5 5 -#define DDB6 6 -#define DDB7 7 - -#define PORTB _SFR_IO8(0x05) -#define PORTB0 0 -#define PORTB1 1 -#define PORTB2 2 -#define PORTB3 3 -#define PORTB4 4 -#define PORTB5 5 -#define PORTB6 6 -#define PORTB7 7 - -#define PINC _SFR_IO8(0x06) -#define PINC0 0 -#define PINC1 1 -#define PINC2 2 -#define PINC3 3 -#define PINC4 4 -#define PINC5 5 -#define PINC6 6 -#define PINC7 7 - -#define DDRC _SFR_IO8(0x07) -#define DDC0 0 -#define DDC1 1 -#define DDC2 2 -#define DDC3 3 -#define DDC4 4 -#define DDC5 5 -#define DDC6 6 -#define DDC7 7 - -#define PORTC _SFR_IO8(0x08) -#define PORTC0 0 -#define PORTC1 1 -#define PORTC2 2 -#define PORTC3 3 -#define PORTC4 4 -#define PORTC5 5 -#define PORTC6 6 -#define PORTC7 7 - -#define PIND _SFR_IO8(0x09) -#define PIND0 0 -#define PIND1 1 -#define PIND2 2 -#define PIND3 3 -#define PIND4 4 -#define PIND5 5 -#define PIND6 6 -#define PIND7 7 - -#define DDRD _SFR_IO8(0x0A) -#define DDD0 0 -#define DDD1 1 -#define DDD2 2 -#define DDD3 3 -#define DDD4 4 -#define DDD5 5 -#define DDD6 6 -#define DDD7 7 - -#define PORTD _SFR_IO8(0x0B) -#define PORTD0 0 -#define PORTD1 1 -#define PORTD2 2 -#define PORTD3 3 -#define PORTD4 4 -#define PORTD5 5 -#define PORTD6 6 -#define PORTD7 7 - -#define PINA _SFR_IO8(0x0C) -#define PINA0 0 -#define PINA1 1 -#define PINA2 2 -#define PINA3 3 - -#define DDRA _SFR_IO8(0x0D) -#define DDA0 0 -#define DDA1 1 -#define DDA2 2 -#define DDA3 3 - -#define PORTA _SFR_IO8(0x0E) -#define PORTA0 0 -#define PORTA1 1 -#define PORTA2 2 -#define PORTA3 3 - -#define PORTCR _SFR_IO8(0x12) -#define PUDA 0 -#define PUDB 1 -#define PUDC 2 -#define PUDD 3 -#define BBMA 4 -#define BBMB 5 -#define BBMC 6 -#define BBMD 7 - -#define TIFR0 _SFR_IO8(0x15) -#define TOV0 0 -#define OCF0A 1 -#define OCF0B 2 - -#define TIFR1 _SFR_IO8(0x16) -#define TOV1 0 -#define OCF1A 1 -#define OCF1B 2 -#define ICF1 5 - -#define PCIFR _SFR_IO8(0x1B) -#define PCIF0 0 -#define PCIF1 1 -#define PCIF2 2 -#define PCIF3 3 - -#define EIFR _SFR_IO8(0x1C) -#define INTF0 0 -#define INTF1 1 - -#define EIMSK _SFR_IO8(0x1D) -#define INT0 0 -#define INT1 1 - -#define GPIOR0 _SFR_IO8(0x1E) -#define GPIOR00 0 -#define GPIOR01 1 -#define GPIOR02 2 -#define GPIOR03 3 -#define GPIOR04 4 -#define GPIOR05 5 -#define GPIOR06 6 -#define GPIOR07 7 - -#define EECR _SFR_IO8(0x1F) -#define EERE 0 -#define EEPE 1 -#define EEMPE 2 -#define EERIE 3 -#define EEPM0 4 -#define EEPM1 5 - -#define EEDR _SFR_IO8(0x20) -#define EEDR0 0 -#define EEDR1 1 -#define EEDR2 2 -#define EEDR3 3 -#define EEDR4 4 -#define EEDR5 5 -#define EEDR6 6 -#define EEDR7 7 - -#define EEARL _SFR_IO8(0x21) -#define EEAR0 0 -#define EEAR1 1 -#define EEAR2 2 -#define EEAR3 3 -#define EEAR4 4 -#define EEAR5 5 -#define EEAR6 6 -#define EEAR7 7 - -#define GTCCR _SFR_IO8(0x23) -#define PSRSYNC 0 -#define TSM 7 - -#define TCCR0A _SFR_IO8(0x25) -#define CS00 0 -#define CS01 1 -#define CS02 2 -#define CTC0 3 - -#define TCNT0 _SFR_IO8(0x26) -#define TCNT0_0 0 -#define TCNT0_1 1 -#define TCNT0_2 2 -#define TCNT0_3 3 -#define TCNT0_4 4 -#define TCNT0_5 5 -#define TCNT0_6 6 -#define TCNT0_7 7 - -#define OCR0A _SFR_IO8(0x27) -#define OCROA_0 0 -#define OCROA_1 1 -#define OCROA_2 2 -#define OCROA_3 3 -#define OCROA_4 4 -#define OCROA_5 5 -#define OCROA_6 6 -#define OCROA_7 7 - -#define OCR0B _SFR_IO8(0x28) -#define OCR0B_0 0 -#define OCR0B_1 1 -#define OCR0B_2 2 -#define OCR0B_3 3 -#define OCR0B_4 4 -#define OCR0B_5 5 -#define OCR0B_6 6 -#define OCR0B_7 7 - -#define GPIOR1 _SFR_IO8(0x2A) -#define GPIOR10 0 -#define GPIOR11 1 -#define GPIOR12 2 -#define GPIOR13 3 -#define GPIOR14 4 -#define GPIOR15 5 -#define GPIOR16 6 -#define GPIOR17 7 - -#define GPIOR2 _SFR_IO8(0x2B) -#define GPIOR20 0 -#define GPIOR21 1 -#define GPIOR22 2 -#define GPIOR23 3 -#define GPIOR24 4 -#define GPIOR25 5 -#define GPIOR26 6 -#define GPIOR27 7 - -#define SPCR _SFR_IO8(0x2C) -#define SPR0 0 -#define SPR1 1 -#define CPHA 2 -#define CPOL 3 -#define MSTR 4 -#define DORD 5 -#define SPE 6 -#define SPIE 7 - -#define SPSR _SFR_IO8(0x2D) -#define SPI2X 0 -#define WCOL 6 -#define SPIF 7 - -#define SPDR _SFR_IO8(0x2E) -#define SPDR0 0 -#define SPDR1 1 -#define SPDR2 2 -#define SPDR3 3 -#define SPDR4 4 -#define SPDR5 5 -#define SPDR6 6 -#define SPDR7 7 - -#define ACSR _SFR_IO8(0x30) -#define ACIS0 0 -#define ACIS1 1 -#define ACIC 2 -#define ACIE 3 -#define ACI 4 -#define ACO 5 -#define ACBG 6 -#define ACD 7 - -#define SMCR _SFR_IO8(0x33) -#define SE 0 -#define SM0 1 -#define SM1 2 -#define SM2 3 - -#define MCUSR _SFR_IO8(0x34) -#define PORF 0 -#define EXTRF 1 -#define BORF 2 -#define WDRF 3 - -#define MCUCR _SFR_IO8(0x35) -#define PUD 4 -#define BODSE 5 -#define BODS 6 - -#define SPMCSR _SFR_IO8(0x37) -#define SELFPRGEN 0 -#define PGERS 1 -#define PGWRT 2 -#define RFLB 3 -#define CTPB 4 -#define RWWSB 6 - -#define WDTCSR _SFR_MEM8(0x60) -#define WDP0 0 -#define WDP1 1 -#define WDP2 2 -#define WDE 3 -#define WDCE 4 -#define WDP3 5 -#define WDIE 6 -#define WDIF 7 - -#define CLKPR _SFR_MEM8(0x61) -#define CLKPS0 0 -#define CLKPS1 1 -#define CLKPS2 2 -#define CLKPS3 3 -#define CLKPCE 7 - -#define PRR _SFR_MEM8(0x64) -#define PRADC 0 -#define PRSPI 2 -#define PRTIM1 3 -#define PRTIM0 5 -#define PRTWI 7 - -#define OSCCAL _SFR_MEM8(0x66) -#define CAL0 0 -#define CAL1 1 -#define CAL2 2 -#define CAL3 3 -#define CAL4 4 -#define CAL5 5 -#define CAL6 6 -#define CAL7 7 - -#define PCICR _SFR_MEM8(0x68) -#define PCIE0 0 -#define PCIE1 1 -#define PCIE2 2 -#define PCIE3 3 - -#define EICRA _SFR_MEM8(0x69) -#define ISC00 0 -#define ISC01 1 -#define ISC10 2 -#define ISC11 3 - -#define PCMSK3 _SFR_MEM8(0x6A) -#define PCINT24 0 -#define PCINT25 1 -#define PCINT26 2 -#define PCINT27 3 - -#define PCMSK0 _SFR_MEM8(0x6B) -#define PCINT0 0 -#define PCINT1 1 -#define PCINT2 2 -#define PCINT3 3 -#define PCINT4 4 -#define PCINT5 5 -#define PCINT6 6 -#define PCINT7 7 - -#define PCMSK1 _SFR_MEM8(0x6C) -#define PCINT8 0 -#define PCINT9 1 -#define PCINT10 2 -#define PCINT11 3 -#define PCINT12 4 -#define PCINT13 5 -#define PCINT14 6 -#define PCINT15 7 - -#define PCMSK2 _SFR_MEM8(0x6D) -#define PCINT16 0 -#define PCINT17 1 -#define PCINT18 2 -#define PCINT19 3 -#define PCINT20 4 -#define PCINT21 5 -#define PCINT22 6 -#define PCINT23 7 - -#define TIMSK0 _SFR_MEM8(0x6E) -#define TOIE0 0 -#define OCIE0A 1 -#define OCIE0B 2 - -#define TIMSK1 _SFR_MEM8(0x6F) -#define TOIE1 0 -#define OCIE1A 1 -#define OCIE1B 2 -#define ICIE1 5 - -#ifndef __ASSEMBLER__ -#define ADC _SFR_MEM16(0x78) -#endif -#define ADCW _SFR_MEM16(0x78) - -#define ADCL _SFR_MEM8(0x78) -#define ADCL0 0 -#define ADCL1 1 -#define ADCL2 2 -#define ADCL3 3 -#define ADCL4 4 -#define ADCL5 5 -#define ADCL6 6 -#define ADCL7 7 - -#define ADCH _SFR_MEM8(0x79) -#define ADCH0 0 -#define ADCH1 1 -#define ADCH2 2 -#define ADCH3 3 -#define ADCH4 4 -#define ADCH5 5 -#define ADCH6 6 -#define ADCH7 7 - -#define ADCSRA _SFR_MEM8(0x7A) -#define ADPS0 0 -#define ADPS1 1 -#define ADPS2 2 -#define ADIE 3 -#define ADIF 4 -#define ADATE 5 -#define ADSC 6 -#define ADEN 7 - -#define ADCSRB _SFR_MEM8(0x7B) -#define ADTS0 0 -#define ADTS1 1 -#define ADTS2 2 -#define ACME 6 - -#define ADMUX _SFR_MEM8(0x7C) -#define MUX0 0 -#define MUX1 1 -#define MUX2 2 -#define MUX3 3 -#define ADLAR 5 -#define REFS0 6 -#define REFS1 7 - -#define DIDR0 _SFR_MEM8(0x7E) -#define ADC0D 0 -#define ADC1D 1 -#define ADC2D 2 -#define ADC3D 3 -#define ADC4D 4 -#define ADC5D 5 -#define ADC6D 6 -#define ADC7D 7 - -#define DIDR1 _SFR_MEM8(0x7F) -#define AIN0D 0 -#define AIN1D 1 -#define AREFD 2 - -#define TCCR1A _SFR_MEM8(0x80) -#define WGM10 0 -#define WGM11 1 -#define COM1B0 4 -#define COM1B1 5 -#define COM1A0 6 -#define COM1A1 7 - -#define TCCR1B _SFR_MEM8(0x81) -#define CS10 0 -#define CS11 1 -#define CS12 2 -#define WGM12 3 -#define WGM13 4 -#define ICES1 6 -#define ICNC1 7 - -#define TCCR1C _SFR_MEM8(0x82) -#define FOC1B 6 -#define FOC1A 7 - -#define TCNT1 _SFR_MEM16(0x84) - -#define TCNT1L _SFR_MEM8(0x84) -#define TCNT1L0 0 -#define TCNT1L1 1 -#define TCNT1L2 2 -#define TCNT1L3 3 -#define TCNT1L4 4 -#define TCNT1L5 5 -#define TCNT1L6 6 -#define TCNT1L7 7 - -#define TCNT1H _SFR_MEM8(0x85) -#define TCNT1H0 0 -#define TCNT1H1 1 -#define TCNT1H2 2 -#define TCNT1H3 3 -#define TCNT1H4 4 -#define TCNT1H5 5 -#define TCNT1H6 6 -#define TCNT1H7 7 - -#define ICR1 _SFR_MEM16(0x86) - -#define ICR1L _SFR_MEM8(0x86) -#define ICR1L0 0 -#define ICR1L1 1 -#define ICR1L2 2 -#define ICR1L3 3 -#define ICR1L4 4 -#define ICR1L5 5 -#define ICR1L6 6 -#define ICR1L7 7 - -#define ICR1H _SFR_MEM8(0x87) -#define ICR1H0 0 -#define ICR1H1 1 -#define ICR1H2 2 -#define ICR1H3 3 -#define ICR1H4 4 -#define ICR1H5 5 -#define ICR1H6 6 -#define ICR1H7 7 - -#define OCR1A _SFR_MEM16(0x88) - -#define OCR1AL _SFR_MEM8(0x88) -#define OCR1AL0 0 -#define OCR1AL1 1 -#define OCR1AL2 2 -#define OCR1AL3 3 -#define OCR1AL4 4 -#define OCR1AL5 5 -#define OCR1AL6 6 -#define OCR1AL7 7 - -#define OCR1AH _SFR_MEM8(0x89) -#define OCR1AH0 0 -#define OCR1AH1 1 -#define OCR1AH2 2 -#define OCR1AH3 3 -#define OCR1AH4 4 -#define OCR1AH5 5 -#define OCR1AH6 6 -#define OCR1AH7 7 - -#define OCR1B _SFR_MEM16(0x8A) - -#define OCR1BL _SFR_MEM8(0x8A) -#define OCR1BL0 0 -#define OCR1BL1 1 -#define OCR1BL2 2 -#define OCR1BL3 3 -#define OCR1BL4 4 -#define OCR1BL5 5 -#define OCR1BL6 6 -#define OCR1BL7 7 - -#define OCR1BH _SFR_MEM8(0x8B) -#define OCR1BH0 0 -#define OCR1BH1 1 -#define OCR1BH2 2 -#define OCR1BH3 3 -#define OCR1BH4 4 -#define OCR1BH5 5 -#define OCR1BH6 6 -#define OCR1BH7 7 - -#define TWBR _SFR_MEM8(0xB8) -#define TWBR0 0 -#define TWBR1 1 -#define TWBR2 2 -#define TWBR3 3 -#define TWBR4 4 -#define TWBR5 5 -#define TWBR6 6 -#define TWBR7 7 - -#define TWSR _SFR_MEM8(0xB9) -#define TWPS0 0 -#define TWPS1 1 -#define TWS3 2 -#define TWS4 3 -#define TWS5 4 -#define TWS6 5 -#define TWS7 6 - -#define TWAR _SFR_MEM8(0xBA) -#define TWGCE 0 -#define TWA0 1 -#define TWA1 2 -#define TWA2 3 -#define TWA3 4 -#define TWA4 5 -#define TWA5 6 -#define TWA6 7 - -#define TWDR _SFR_MEM8(0xBB) -#define TWD0 0 -#define TWD1 1 -#define TWD2 2 -#define TWD3 3 -#define TWD4 4 -#define TWD5 5 -#define TWD6 6 -#define TWD7 7 - -#define TWCR _SFR_MEM8(0xBC) -#define TWIE 0 -#define TWEN 2 -#define TWWC 3 -#define TWSTO 4 -#define TWSTA 5 -#define TWEA 6 -#define TWINT 7 - -#define TWAMR _SFR_MEM8(0xBD) -#define TWAM0 1 -#define TWAM1 2 -#define TWAM2 3 -#define TWAM3 4 -#define TWAM4 5 -#define TWAM5 6 -#define TWAM6 7 - -#define TWIHSR _SFR_MEM8(0xBE) -#define TWIHS 0 - - -/* Interrupt Vectors */ -/* Interrupt vector 0 is the reset vector. */ - -#define INT0_vect _VECTOR(1) -#define INT1_vect _VECTOR(2) -#define PCINT0_vect _VECTOR(3) -#define PCINT1_vect _VECTOR(4) -#define PCINT2_vect _VECTOR(5) -#define PCINT3_vect _VECTOR(6) -#define WDT_vect _VECTOR(7) -#define TIMER1_CAPT_vect _VECTOR(8) -#define TIMER1_COMPA_vect _VECTOR(9) -#define TIMER1_COMPB_vect _VECTOR(10) -#define TIMER1_OVF_vect _VECTOR(11) -#define TIMER0_COMPA_vect _VECTOR(12) -#define TIMER0_COMPB_vect _VECTOR(13) -#define TIMER0_OVF_vect _VECTOR(14) -#define SPI_STC_vect _VECTOR(15) -#define ADC_vect _VECTOR(16) -#define EE_READY_vect _VECTOR(17) -#define ANALOG_COMP_vect _VECTOR(18) -#define TWI_vect _VECTOR(19) - -#define _VECTORS_SIZE 40 - - -/* Constants */ -#define SPM_PAGESIZE 32 -#define RAMEND 0x1FF -#define XRAMSIZE 0 -#define XRAMEND (RAMEND + XRAMSIZE) -#define E2END 0x3F -#define E2PAGESIZE 4 -#define FLASHEND 0xFFF - - -/* Fuse Information */ -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKDIV8 (unsigned char)~_BV(7) /* Divide clock by 8 */ -#define FUSE_CKOUT (unsigned char)~_BV(6) /* Clock output */ -#define FUSE_SUT1 (unsigned char)~_BV(5) /* Select start-up time */ -#define FUSE_SUT0 (unsigned char)~_BV(4) /* Select start-up time */ -#define FUSE_CKSEL3 (unsigned char)~_BV(3) /* Select Clock Source */ -#define FUSE_CKSEL2 (unsigned char)~_BV(2) /* Select Clock Source */ -#define FUSE_CKSEL1 (unsigned char)~_BV(1) /* Select Clock Source */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) /* Select Clock Source */ -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) /* Brown-out Detector trigger level */ -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) /* Brown-out Detector trigger level */ -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) /* Brown-out Detector trigger level */ -#define FUSE_EESAVE (unsigned char)~_BV(3) /* EEPROM memory is preserved through chip erase */ -#define FUSE_WDTON (unsigned char)~_BV(4) /* Watchdog Timer Always On */ -#define FUSE_SPIEN (unsigned char)~_BV(5) /* Enable Serial programming and Data Downloading */ -#define FUSE_DWEN (unsigned char)~_BV(6) /* debugWIRE Enable */ -#define FUSE_RSTDISBL (unsigned char)~_BV(7) /* External reset disable */ -#define HFUSE_DEFAULT (FUSE_SPIEN) - -/* Extended Fuse Byte */ -#define FUSE_SELFPRGEN (unsigned char)~_BV(0) /* Self Programming Enable */ -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x92 -#define SIGNATURE_2 0x09 - - -#endif /* _AVR_IOTN48_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn84.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn84.h deleted file mode 100644 index 673141288..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn84.h +++ /dev/null @@ -1,89 +0,0 @@ -/* Copyright (c) 2005, Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iotn84.h,v 1.3.2.5 2008/10/17 23:27:52 arcanum Exp $ */ - -/* avr/iotn84.h - definitions for ATtiny84 */ - -#ifndef _AVR_IOTN84_H_ -#define _AVR_IOTN84_H_ 1 - -#include - -/* Constants */ -#define SPM_PAGESIZE 64 -#define RAMEND 0x25F -#define XRAMEND 0x25F -#define E2END 0x1FF -#define E2PAGESIZE 4 -#define FLASHEND 0x1FFF - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_DWEN (unsigned char)~_BV(6) -#define FUSE_RSTDISBL (unsigned char)~_BV(7) -#define FUSE_HFUSE_DEFAULT (FUSE_SPIEN) - -/* Extended Fuse Byte */ -#define FUSE_SELFPRGEN (unsigned char)~_BV(0) -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x93 -#define SIGNATURE_2 0x0C - - -#endif /* _AVR_IOTN84_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn85.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn85.h deleted file mode 100644 index 4e6365496..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn85.h +++ /dev/null @@ -1,89 +0,0 @@ -/* Copyright (c) 2005, Joerg Wunsch - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iotn85.h,v 1.3.2.5 2008/10/17 23:27:52 arcanum Exp $ */ - -/* avr/iotn85.h - definitions for ATtiny85 */ - -#ifndef _AVR_IOTN85_H_ -#define _AVR_IOTN85_H_ 1 - -#include - -/* Constants */ -#define SPM_PAGESIZE 64 -#define RAMEND 0x25F -#define XRAMEND 0x25F -#define E2END 0x1FF -#define E2PAGESIZE 4 -#define FLASHEND 0x1FFF - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_DWEN (unsigned char)~_BV(6) -#define FUSE_RSTDISBL (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_SPIEN) - -/* Extended Fuse Byte */ -#define FUSE_SELFPRGEN (unsigned char)~_BV(0) -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x93 -#define SIGNATURE_2 0x0B - - -#endif /* _AVR_IOTN85_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn861.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn861.h deleted file mode 100644 index 857a386d0..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn861.h +++ /dev/null @@ -1,89 +0,0 @@ -/* Copyright (c) 2006, Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iotn861.h,v 1.3.2.5 2008/10/17 23:27:53 arcanum Exp $ */ - -/* avr/iotn861.h - definitions for ATtiny861 */ - -#ifndef _AVR_IOTN861_H_ -#define _AVR_IOTN861_H_ 1 - -#include - -/* Constants */ -#define SPM_PAGESIZE 64 -#define RAMEND 0x25F -#define XRAMEND 0x25F -#define E2END 0x1FF -#define E2PAGESIZE 4 -#define FLASHEND 0x1FFF - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_DWEN (unsigned char)~_BV(6) -#define FUSE_RSTDISBL (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_SPIEN) - -/* Extended Fuse Byte */ -#define FUSE_SELFPRGEN (unsigned char)~_BV(0) -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x93 -#define SIGNATURE_2 0x0D - - -#endif /* _AVR_IOTN861_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn88.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn88.h deleted file mode 100644 index 13ef305e9..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotn88.h +++ /dev/null @@ -1,760 +0,0 @@ -/* Copyright (c) 2007 Atmel Corporation - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. -*/ - -/* $Id: iotn88.h,v 1.2.2.7 2008/10/17 23:27:53 arcanum Exp $ */ - -/* avr/iotn88.h - definitions for ATtiny88 */ - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iotn88.h" -#else -# error "Attempt to include more than one file." -#endif - - -#ifndef _AVR_IOTN88_H_ -#define _AVR_IOTN88_H_ 1 - -/* Registers and associated bit numbers */ - -#define PINB _SFR_IO8(0x03) -#define PINB0 0 -#define PINB1 1 -#define PINB2 2 -#define PINB3 3 -#define PINB4 4 -#define PINB5 5 -#define PINB6 6 -#define PINB7 7 - -#define DDRB _SFR_IO8(0x04) -#define DDB0 0 -#define DDB1 1 -#define DDB2 2 -#define DDB3 3 -#define DDB4 4 -#define DDB5 5 -#define DDB6 6 -#define DDB7 7 - -#define PORTB _SFR_IO8(0x05) -#define PORTB0 0 -#define PORTB1 1 -#define PORTB2 2 -#define PORTB3 3 -#define PORTB4 4 -#define PORTB5 5 -#define PORTB6 6 -#define PORTB7 7 - -#define PINC _SFR_IO8(0x06) -#define PINC0 0 -#define PINC1 1 -#define PINC2 2 -#define PINC3 3 -#define PINC4 4 -#define PINC5 5 -#define PINC6 6 -#define PINC7 7 - -#define DDRC _SFR_IO8(0x07) -#define DDC0 0 -#define DDC1 1 -#define DDC2 2 -#define DDC3 3 -#define DDC4 4 -#define DDC5 5 -#define DDC6 6 -#define DDC7 7 - -#define PORTC _SFR_IO8(0x08) -#define PORTC0 0 -#define PORTC1 1 -#define PORTC2 2 -#define PORTC3 3 -#define PORTC4 4 -#define PORTC5 5 -#define PORTC6 6 -#define PORTC7 7 - -#define PIND _SFR_IO8(0x09) -#define PIND0 0 -#define PIND1 1 -#define PIND2 2 -#define PIND3 3 -#define PIND4 4 -#define PIND5 5 -#define PIND6 6 -#define PIND7 7 - -#define DDRD _SFR_IO8(0x0A) -#define DDD0 0 -#define DDD1 1 -#define DDD2 2 -#define DDD3 3 -#define DDD4 4 -#define DDD5 5 -#define DDD6 6 -#define DDD7 7 - -#define PORTD _SFR_IO8(0x0B) -#define PORTD0 0 -#define PORTD1 1 -#define PORTD2 2 -#define PORTD3 3 -#define PORTD4 4 -#define PORTD5 5 -#define PORTD6 6 -#define PORTD7 7 - -#define PINA _SFR_IO8(0x0C) -#define PINA0 0 -#define PINA1 1 -#define PINA2 2 -#define PINA3 3 - -#define DDRA _SFR_IO8(0x0D) -#define DDA0 0 -#define DDA1 1 -#define DDA2 2 -#define DDA3 3 - -#define PORTA _SFR_IO8(0x0E) -#define PORTA0 0 -#define PORTA1 1 -#define PORTA2 2 -#define PORTA3 3 - -#define PORTCR _SFR_IO8(0x12) -#define PUDA 0 -#define PUDB 1 -#define PUDC 2 -#define PUDD 3 -#define BBMA 4 -#define BBMB 5 -#define BBMC 6 -#define BBMD 7 - -#define TIFR0 _SFR_IO8(0x15) -#define TOV0 0 -#define OCF0A 1 -#define OCF0B 2 - -#define TIFR1 _SFR_IO8(0x16) -#define TOV1 0 -#define OCF1A 1 -#define OCF1B 2 -#define ICF1 5 - -#define PCIFR _SFR_IO8(0x1B) -#define PCIF0 0 -#define PCIF1 1 -#define PCIF2 2 -#define PCIF3 3 - -#define EIFR _SFR_IO8(0x1C) -#define INTF0 0 -#define INTF1 1 - -#define EIMSK _SFR_IO8(0x1D) -#define INT0 0 -#define INT1 1 - -#define GPIOR0 _SFR_IO8(0x1E) -#define GPIOR00 0 -#define GPIOR01 1 -#define GPIOR02 2 -#define GPIOR03 3 -#define GPIOR04 4 -#define GPIOR05 5 -#define GPIOR06 6 -#define GPIOR07 7 - -#define EECR _SFR_IO8(0x1F) -#define EERE 0 -#define EEPE 1 -#define EEMPE 2 -#define EERIE 3 -#define EEPM0 4 -#define EEPM1 5 - -#define EEDR _SFR_IO8(0x20) -#define EEDR0 0 -#define EEDR1 1 -#define EEDR2 2 -#define EEDR3 3 -#define EEDR4 4 -#define EEDR5 5 -#define EEDR6 6 -#define EEDR7 7 - -#define EEARL _SFR_IO8(0x21) -#define EEAR0 0 -#define EEAR1 1 -#define EEAR2 2 -#define EEAR3 3 -#define EEAR4 4 -#define EEAR5 5 -#define EEAR6 6 -#define EEAR7 7 - -#define GTCCR _SFR_IO8(0x23) -#define PSRSYNC 0 -#define TSM 7 - -#define TCCR0A _SFR_IO8(0x25) -#define CS00 0 -#define CS01 1 -#define CS02 2 -#define CTC0 7 - -#define TCNT0 _SFR_IO8(0x26) -#define TCNT0_0 0 -#define TCNT0_1 1 -#define TCNT0_2 2 -#define TCNT0_3 3 -#define TCNT0_4 4 -#define TCNT0_5 5 -#define TCNT0_6 6 -#define TCNT0_7 7 - -#define OCR0A _SFR_IO8(0x27) -#define OCR0A_0 0 -#define OCR0A_1 1 -#define OCR0A_2 2 -#define OCR0A_3 3 -#define OCR0A_4 4 -#define OCR0A_5 5 -#define OCR0A_6 6 -#define OCR0A_7 7 - -#define OCR0B _SFR_IO8(0x28) -#define OCR0B_0 0 -#define OCR0B_1 1 -#define OCR0B_2 2 -#define OCR0B_3 3 -#define OCR0B_4 4 -#define OCR0B_5 5 -#define OCR0B_6 6 -#define OCR0B_7 7 - -#define GPIOR1 _SFR_IO8(0x2A) -#define GPIOR10 0 -#define GPIOR11 1 -#define GPIOR12 2 -#define GPIOR13 3 -#define GPIOR14 4 -#define GPIOR15 5 -#define GPIOR16 6 -#define GPIOR17 7 - -#define GPIOR2 _SFR_IO8(0x2B) -#define GPIOR20 0 -#define GPIOR21 1 -#define GPIOR22 2 -#define GPIOR23 3 -#define GPIOR24 4 -#define GPIOR25 5 -#define GPIOR26 6 -#define GPIOR27 7 - -#define SPCR _SFR_IO8(0x2C) -#define SPR0 0 -#define SPR1 1 -#define CPHA 2 -#define CPOL 3 -#define MSTR 4 -#define DORD 5 -#define SPE 6 -#define SPIE 7 - -#define SPSR _SFR_IO8(0x2D) -#define SPI2X 0 -#define WCOL 6 -#define SPIF 7 - -#define SPDR _SFR_IO8(0x2E) -#define SPDR0 0 -#define SPDR1 1 -#define SPDR2 2 -#define SPDR3 3 -#define SPDR4 4 -#define SPDR5 5 -#define SPDR6 6 -#define SPDR7 7 - -#define ACSR _SFR_IO8(0x30) -#define ACIS0 0 -#define ACIS1 1 -#define ACIC 2 -#define ACIE 3 -#define ACI 4 -#define ACO 5 -#define ACBG 6 -#define ACD 7 - -#define SMCR _SFR_IO8(0x33) -#define SE 0 -#define SM0 1 -#define SM1 2 -#define SM2 3 - -#define MCUSR _SFR_IO8(0x34) -#define PORF 0 -#define EXTRF 1 -#define BORF 2 -#define WDRF 3 - -#define MCUCR _SFR_IO8(0x35) -#define PUD 4 -#define BODSE 5 -#define BODS 6 - -#define SPMCSR _SFR_IO8(0x37) -#define SELFPRGEN 0 -#define PGERS 1 -#define PGWRT 2 -#define RFLB 3 -#define CTPB 4 -#define RWWSB 6 - -#define WDTCSR _SFR_MEM8(0x60) -#define WDP0 0 -#define WDP1 1 -#define WDP2 2 -#define WDE 3 -#define WDCE 4 -#define WDP3 5 -#define WDIE 6 -#define WDIF 7 - -#define CLKPR _SFR_MEM8(0x61) -#define CLKPS0 0 -#define CLKPS1 1 -#define CLKPS2 2 -#define CLKPS3 3 -#define CLKPCE 7 - -#define PRR _SFR_MEM8(0x64) -#define PRADC 0 -#define PRSPI 2 -#define PRTIM1 3 -#define PRTIM0 5 -#define PRTWI 7 - -#define OSCCAL _SFR_MEM8(0x66) -#define CAL0 0 -#define CAL1 1 -#define CAL2 2 -#define CAL3 3 -#define CAL4 4 -#define CAL5 5 -#define CAL6 6 -#define CAL7 7 - -#define PCICR _SFR_MEM8(0x68) -#define PCIE0 0 -#define PCIE1 1 -#define PCIE2 2 -#define PCIE3 3 - -#define EICRA _SFR_MEM8(0x69) -#define ISC00 0 -#define ISC01 1 -#define ISC10 2 -#define ISC11 3 - -#define PCMSK3 _SFR_MEM8(0x6A) -#define PCINT24 0 -#define PCINT25 1 -#define PCINT26 2 -#define PCINT27 3 - -#define PCMSK0 _SFR_MEM8(0x6B) -#define PCINT0 0 -#define PCINT1 1 -#define PCINT2 2 -#define PCINT3 3 -#define PCINT4 4 -#define PCINT5 5 -#define PCINT6 6 -#define PCINT7 7 - -#define PCMSK1 _SFR_MEM8(0x6C) -#define PCINT8 0 -#define PCINT9 1 -#define PCINT10 2 -#define PCINT11 3 -#define PCINT12 4 -#define PCINT13 5 -#define PCINT14 6 -#define PCINT15 7 - -#define PCMSK2 _SFR_MEM8(0x6D) -#define PCINT16 0 -#define PCINT17 1 -#define PCINT18 2 -#define PCINT19 3 -#define PCINT20 4 -#define PCINT21 5 -#define PCINT22 6 -#define PCINT23 7 - -#define TIMSK0 _SFR_MEM8(0x6E) -#define TOIE0 0 -#define OCIE0A 1 -#define OCIE0B 2 - -#define TIMSK1 _SFR_MEM8(0x6F) -#define TOIE1 0 -#define OCIE1A 1 -#define OCIE1B 2 -#define ICIE1 5 - -#ifndef __ASSEMBLER__ -#define ADC _SFR_MEM16(0x78) -#endif -#define ADCW _SFR_MEM16(0x78) - -#define ADCL _SFR_MEM8(0x78) -#define ADCL0 0 -#define ADCL1 1 -#define ADCL2 2 -#define ADCL3 3 -#define ADCL4 4 -#define ADCL5 5 -#define ADCL6 6 -#define ADCL7 7 - -#define ADCH _SFR_MEM8(0x79) -#define ADCH0 0 -#define ADCH1 1 -#define ADCH2 2 -#define ADCH3 3 -#define ADCH4 4 -#define ADCH5 5 -#define ADCH6 6 -#define ADCH7 7 - -#define ADCSRA _SFR_MEM8(0x7A) -#define ADPS0 0 -#define ADPS1 1 -#define ADPS2 2 -#define ADIE 3 -#define ADIF 4 -#define ADATE 5 -#define ADSC 6 -#define ADEN 7 - -#define ADCSRB _SFR_MEM8(0x7B) -#define ADTS0 0 -#define ADTS1 1 -#define ADTS2 2 -#define ACME 6 - -#define ADMUX _SFR_MEM8(0x7C) -#define MUX0 0 -#define MUX1 1 -#define MUX2 2 -#define MUX3 3 -#define ADLAR 5 -#define REFS0 6 -#define REFS1 7 - -#define DIDR0 _SFR_MEM8(0x7E) -#define ADC0D 0 -#define ADC1D 1 -#define ADC2D 2 -#define ADC3D 3 -#define ADC4D 4 -#define ADC5D 5 -#define ADC6D 6 -#define ADC7D 7 - -#define DIDR1 _SFR_MEM8(0x7F) -#define AIN0D 0 -#define AIN1D 1 -#define AREFD 2 - -#define TCCR1A _SFR_MEM8(0x80) -#define WGM10 0 -#define WGM11 1 -#define COM1B0 4 -#define COM1B1 5 -#define COM1A0 6 -#define COM1A1 7 - -#define TCCR1B _SFR_MEM8(0x81) -#define CS10 0 -#define CS11 1 -#define CS12 2 -#define WGM12 3 -#define WGM13 4 -#define ICES1 6 -#define ICNC1 7 - -#define TCCR1C _SFR_MEM8(0x82) -#define FOC1B 6 -#define FOC1A 7 - -#define TCNT1 _SFR_MEM16(0x84) - -#define TCNT1L _SFR_MEM8(0x84) -#define TCNT1L0 0 -#define TCNT1L1 1 -#define TCNT1L2 2 -#define TCNT1L3 3 -#define TCNT1L4 4 -#define TCNT1L5 5 -#define TCNT1L6 6 -#define TCNT1L7 7 - -#define TCNT1H _SFR_MEM8(0x85) -#define TCNT1H0 0 -#define TCNT1H1 1 -#define TCNT1H2 2 -#define TCNT1H3 3 -#define TCNT1H4 4 -#define TCNT1H5 5 -#define TCNT1H6 6 -#define TCNT1H7 7 - -#define ICR1 _SFR_MEM16(0x86) - -#define ICR1L _SFR_MEM8(0x86) -#define ICR1L0 0 -#define ICR1L1 1 -#define ICR1L2 2 -#define ICR1L3 3 -#define ICR1L4 4 -#define ICR1L5 5 -#define ICR1L6 6 -#define ICR1L7 7 - -#define ICR1H _SFR_MEM8(0x87) -#define ICR1H0 0 -#define ICR1H1 1 -#define ICR1H2 2 -#define ICR1H3 3 -#define ICR1H4 4 -#define ICR1H5 5 -#define ICR1H6 6 -#define ICR1H7 7 - -#define OCR1A _SFR_MEM16(0x88) - -#define OCR1AL _SFR_MEM8(0x88) -#define OCR1AL0 0 -#define OCR1AL1 1 -#define OCR1AL2 2 -#define OCR1AL3 3 -#define OCR1AL4 4 -#define OCR1AL5 5 -#define OCR1AL6 6 -#define OCR1AL7 7 - -#define OCR1AH _SFR_MEM8(0x89) -#define OCR1AH0 0 -#define OCR1AH1 1 -#define OCR1AH2 2 -#define OCR1AH3 3 -#define OCR1AH4 4 -#define OCR1AH5 5 -#define OCR1AH6 6 -#define OCR1AH7 7 - -#define OCR1B _SFR_MEM16(0x8A) - -#define OCR1BL _SFR_MEM8(0x8A) -#define OCR1BL0 0 -#define OCR1BL1 1 -#define OCR1BL2 2 -#define OCR1BL3 3 -#define OCR1BL4 4 -#define OCR1BL5 5 -#define OCR1BL6 6 -#define OCR1BL7 7 - -#define OCR1BH _SFR_MEM8(0x8B) -#define OCR1BH0 0 -#define OCR1BH1 1 -#define OCR1BH2 2 -#define OCR1BH3 3 -#define OCR1BH4 4 -#define OCR1BH5 5 -#define OCR1BH6 6 -#define OCR1BH7 7 - -#define TWBR _SFR_MEM8(0xB8) -#define TWBR0 0 -#define TWBR1 1 -#define TWBR2 2 -#define TWBR3 3 -#define TWBR4 4 -#define TWBR5 5 -#define TWBR6 6 -#define TWBR7 7 - -#define TWSR _SFR_MEM8(0xB9) -#define TWPS0 0 -#define TWPS1 1 -#define TWS3 3 -#define TWS4 4 -#define TWS5 5 -#define TWS6 6 -#define TWS7 7 - -#define TWAR _SFR_MEM8(0xBA) -#define TWGCE 0 -#define TWA0 1 -#define TWA1 2 -#define TWA2 3 -#define TWA3 4 -#define TWA4 5 -#define TWA5 6 -#define TWA6 7 - -#define TWDR _SFR_MEM8(0xBB) -#define TWD0 0 -#define TWD1 1 -#define TWD2 2 -#define TWD3 3 -#define TWD4 4 -#define TWD5 5 -#define TWD6 6 -#define TWD7 7 - -#define TWCR _SFR_MEM8(0xBC) -#define TWIE 0 -#define TWEN 2 -#define TWWC 3 -#define TWSTO 4 -#define TWSTA 5 -#define TWEA 6 -#define TWINT 7 - -#define TWAMR _SFR_MEM8(0xBD) -#define TWAM0 1 -#define TWAM1 2 -#define TWAM2 3 -#define TWAM3 4 -#define TWAM4 5 -#define TWAM5 6 -#define TWAM6 7 - -#define TWHSR _SFR_MEM8(0xBE) -#define TWIHS 0 - - - -/* Interrupt Vectors */ -/* Interrupt vector 0 is the reset vector. */ - -#define INT0_vect _VECTOR(1) -#define INT1_vect _VECTOR(2) -#define PCINT0_vect _VECTOR(3) -#define PCINT1_vect _VECTOR(4) -#define PCINT2_vect _VECTOR(5) -#define PCINT3_vect _VECTOR(6) -#define WDT_vect _VECTOR(7) -#define TIMER1_CAPT_vect _VECTOR(8) -#define TIMER1_COMPA_vect _VECTOR(9) -#define TIMER1_COMPB_vect _VECTOR(10) -#define TIMER1_OVF_vect _VECTOR(11) -#define TIMER0_COMPA_vect _VECTOR(12) -#define TIMER0_COMPB_vect _VECTOR(13) -#define TIMER0_OVF_vect _VECTOR(14) -#define SPI_STC_vect _VECTOR(15) -#define ADC_vect _VECTOR(16) -#define EE_READY_vect _VECTOR(17) -#define ANALOG_COMP_vect _VECTOR(18) -#define TWI_vect _VECTOR(19) - -#define _VECTORS_SIZE 40 - - -/* Constants */ -#define RAMEND 0x1FF -#define XRAMSIZE 0 -#define XRAMEND (RAMEND + XRAMSIZE) -#define E2END 0x3F -#define E2PAGESIZE 4 -#define FLASHEND 0x1FFF -#define SPM_PAGESIZE 32 - - -/* Fuse Information */ -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) /* Select Clock Source */ -#define FUSE_CKSEL1 (unsigned char)~_BV(1) /* Select Clock Source */ -#define FUSE_CKSEL2 (unsigned char)~_BV(2) /* Select Clock Source */ -#define FUSE_CKSEL3 (unsigned char)~_BV(3) /* Select Clock Source */ -#define FUSE_SUT0 (unsigned char)~_BV(4) /* Select start-up time */ -#define FUSE_SUT1 (unsigned char)~_BV(5) /* Select start-up time */ -#define FUSE_CKOUT (unsigned char)~_BV(6) /* Clock output */ -#define FUSE_CKDIV8 (unsigned char)~_BV(7) /* Divide clock by 8 */ -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) /* Brown-out Detector trigger level */ -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) /* Brown-out Detector trigger level */ -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) /* Brown-out Detector trigger level */ -#define FUSE_EESAVE (unsigned char)~_BV(3) /* EEPROM memory is preserved through chip erase */ -#define FUSE_WDTON (unsigned char)~_BV(4) /* Watchdog Timer Always On */ -#define FUSE_SPIEN (unsigned char)~_BV(5) /* Enable Serial programming and Data Downloading */ -#define FUSE_DWEN (unsigned char)~_BV(6) /* debugWIRE Enable */ -#define FUSE_RSTDISBL (unsigned char)~_BV(7) /* External reset disable */ -#define HFUSE_DEFAULT (FUSE_SPIEN) - -/* Extended Fuse Byte */ -#define FUSE_SELFPRGEN ~_BV(0) /* Self Programming Enable */ -#define EFUSE_DEFAULT (0xFF) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x93 -#define SIGNATURE_2 0x11 - - -#endif /* _AVR_IOTN88_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotnx4.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotnx4.h deleted file mode 100644 index 58dd8408b..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotnx4.h +++ /dev/null @@ -1,453 +0,0 @@ -/* Copyright (c) 2005,2007 Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iotnx4.h,v 1.4 2007/05/14 22:21:41 joerg_wunsch Exp $ */ - -/* avr/iotnx4.h - definitions for ATtiny24, ATtiny44 and ATtiny84 */ - -#ifndef _AVR_IOTNX4_H_ -#define _AVR_IOTNX4_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iotnx4.h" -#else -# error "Attempt to include more than one file." -#endif - -/* I/O registers */ - -#define PRR _SFR_IO8 (0x00) -#define PRTIM1 3 -#define PRTIM0 2 -#define PRUSI 1 -#define PRADC 0 - -#define DIDR0 _SFR_IO8(0x01) -#define ADC7D 7 -#define ADC6D 6 -#define ADC5D 5 -#define ADC4D 4 -#define ADC3D 3 -#define ADC2D 2 -#define ADC1D 1 -#define ADC0D 0 - -/* Reserved [0x02] */ - -#define ADCSRB _SFR_IO8 (0x03) -#define BIN 7 -#define ACME 6 -#define ADLAR 4 -#define ADTS2 2 -#define ADTS1 1 -#define ADTS0 0 - -#ifndef __ASSEMBLER__ -#define ADC _SFR_IO16(0x04) -#endif -#define ADCW _SFR_IO16(0x04) -#define ADCL _SFR_IO8(0x04) -#define ADCH _SFR_IO8(0x05) - -#define ADCSRA _SFR_IO8 (0x06) -#define ADEN 7 -#define ADSC 6 -#define ADATE 5 -#define ADIF 4 -#define ADIE 3 -#define ADPS2 2 -#define ADPS1 1 -#define ADPS0 0 - -#define ADMUX _SFR_IO8(0x07) -#define REFS1 7 -#define REFS0 6 -#define MUX5 5 -#define MUX4 4 -#define MUX3 3 -#define MUX2 2 -#define MUX1 1 -#define MUX0 0 - -#define ACSR _SFR_IO8(0x08) -#define ACD 7 -#define ACBG 6 -#define ACO 5 -#define ACI 4 -#define ACIE 3 -#define ACIC 2 -#define ACIS1 1 -#define ACIS0 0 - -/* Reserved [0x09..0x0A] */ - -#define TIFR1 _SFR_IO8(0x0B) -#define ICF1 5 -#define OCF1B 2 -#define OCF1A 1 -#define TOV1 0 - -#define TIMSK1 _SFR_IO8(0x0C) -#define ICIE1 5 -#define OCIE1B 2 -#define OCIE1A 1 -#define TOIE1 0 - -#define USICR _SFR_IO8(0x0D) -#define USISIE 7 -#define USIOIE 6 -#define USIWM1 5 -#define USIWM0 4 -#define USICS1 3 -#define USICS0 2 -#define USICLK 1 -#define USITC 0 - -#define USISR _SFR_IO8(0x0E) -#define USISIF 7 -#define USIOIF 6 -#define USIPF 5 -#define USIDC 4 -#define USICNT3 3 -#define USICNT2 2 -#define USICNT1 1 -#define USICNT0 0 - -#define USIDR _SFR_IO8(0x0F) - -#define USIBR _SFR_IO8(0x10) - -/* Reserved [0x11] */ - -#define PCMSK0 _SFR_IO8(0x12) -#define PCINT7 7 -#define PCINT6 6 -#define PCINT5 5 -#define PCINT4 4 -#define PCINT3 3 -#define PCINT2 2 -#define PCINT1 1 -#define PCINT0 0 - -#define GPIOR0 _SFR_IO8(0x13) - -#define GPIOR1 _SFR_IO8(0x14) - -#define GPIOR2 _SFR_IO8(0x15) - -#define PINB _SFR_IO8(0x16) -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -#define DDRB _SFR_IO8(0x17) -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -#define PORTB _SFR_IO8(0x18) -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -#define PINA _SFR_IO8(0x19) -#define PINA7 7 -#define PINA6 6 -#define PINA5 5 -#define PINA4 4 -#define PINA3 3 -#define PINA2 2 -#define PINA1 1 -#define PINA0 0 - -#define DDRA _SFR_IO8(0x1A) -#define DDA7 7 -#define DDA6 6 -#define DDA5 5 -#define DDA4 4 -#define DDA3 3 -#define DDA2 2 -#define DDA1 1 -#define DDA0 0 - -#define PORTA _SFR_IO8(0x1B) -#define PA7 7 -#define PA6 6 -#define PA5 5 -#define PA4 4 -#define PA3 3 -#define PA2 2 -#define PA1 1 -#define PA0 0 - -/* EEPROM Control Register EECR */ -#define EECR _SFR_IO8(0x1C) -#define EEPM1 5 -#define EEPM0 4 -#define EERIE 3 -#define EEMPE 2 -#define EEPE 1 -#define EERE 0 - -/* EEPROM Data Register */ -#define EEDR _SFR_IO8(0x1D) - -/* EEPROM Address Register */ -#define EEAR _SFR_IO16(0x1E) -#define EEARL _SFR_IO8(0x1E) -#define EEARH _SFR_IO8(0x1F) - -#define PCMSK1 _SFR_IO8(0x20) -#define PCINT11 3 -#define PCINT10 2 -#define PCINT9 1 -#define PCINT8 0 - -#define WDTCSR _SFR_IO8(0x21) -#define WDIF 7 -#define WDIE 6 -#define WDP3 5 -#define WDCE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -#define TCCR1C _SFR_IO8(0x22) -#define FOC1A 7 -#define FOC1B 6 - -#define GTCCR _SFR_IO8(0x23) -#define TSM 7 -#define PSR10 0 - -#define ICR1 _SFR_IO16(0x24) -#define ICR1L _SFR_IO8(0x24) -#define ICR1H _SFR_IO8(0x25) - -#define CLKPR _SFR_IO8(0x26) -#define CLKPCE 7 -#define CLKPS3 3 -#define CLKPS2 2 -#define CLKPS1 1 -#define CLKPS0 0 - -#define DWDR _SFR_IO8(0x27) - -#define OCR1B _SFR_IO16(0x28) -#define OCR1BL _SFR_IO8(0x28) -#define OCR1BH _SFR_IO8(0x29) - -#define OCR1A _SFR_IO16(0x2A) -#define OCR1AL _SFR_IO8(0x2A) -#define OCR1AH _SFR_IO8(0x2B) - -/* keep misspelled names from avr-libc 1.4.[0..1] for compatibility */ -#define OCRB1 _SFR_IO16(0x28) -#define OCRB1L _SFR_IO8(0x28) -#define OCRB1H _SFR_IO8(0x29) - -#define OCRA1 _SFR_IO16(0x2A) -#define OCRA1L _SFR_IO8(0x2A) -#define OCRA1H _SFR_IO8(0x2B) - -#define TCNT1 _SFR_IO16(0x2C) -#define TCNT1L _SFR_IO8(0x2C) -#define TCNT1H _SFR_IO8(0x2D) - -#define TCCR1B _SFR_IO8(0x2E) -#define ICNC1 7 -#define ICES1 6 -#define WGM13 4 -#define WGM12 3 -#define CS12 2 -#define CS11 1 -#define CS10 0 - -#define TCCR1A _SFR_IO8(0x2F) -#define COM1A1 7 -#define COM1A0 6 -#define COM1B1 5 -#define COM1B0 4 -#define WGM11 1 -#define WGM10 0 - -#define TCCR0A _SFR_IO8(0x30) -#define COM0A1 7 -#define COM0A0 6 -#define COM0B1 5 -#define COM0B0 4 -#define WGM01 1 -#define WGM00 0 - -#define OSCCAL _SFR_IO8(0x31) - -#define TCNT0 _SFR_IO8(0x32) - -#define TCCR0B _SFR_IO8(0x33) -#define FOC0A 7 -#define FOC0B 6 -#define WGM02 3 -#define CS02 2 -#define CS01 1 -#define CS00 0 - -#define MCUSR _SFR_IO8(0x34) -#define WDRF 3 -#define BORF 2 -#define EXTRF 1 -#define PORF 0 - -#define MCUCR _SFR_IO8(0x35) -#define PUD 6 -#define SE 5 -#define SM1 4 -#define SM0 3 -#define ISC01 1 -#define ISC00 0 - -#define OCR0A _SFR_IO8(0x36) - -#define SPMCSR _SFR_IO8(0x37) -#define CTPB 4 -#define RFLB 3 -#define PGWRT 2 -#define PGERS 1 -#define SPMEN 0 - -#define TIFR0 _SFR_IO8(0x38) -#define OCF0B 2 -#define OCF0A 1 -#define TOV0 0 - -#define TIMSK0 _SFR_IO8(0x39) -#define OCIE0B 2 -#define OCIE0A 1 -#define TOIE0 0 - -#define GIFR _SFR_IO8(0x3A) -#define INTF0 6 -#define PCIF1 5 -#define PCIF0 4 - -#define GIMSK _SFR_IO8(0x3B) -#define INT0 6 -#define PCIE1 5 -#define PCIE0 4 - -#define OCR0B _SFR_IO8(0x3C) - -/* 0x3D..0x3E SP [defined in ] */ -/* 0x3F SREG [defined in ] */ - -///--- - -/* Interrupt vectors */ -/* Interrupt vector 0 is the reset vector. */ -/* External Interrupt Request 0 */ -#define INT0_vect _VECTOR(1) -#define EXT_INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* Pin Change Interrupt Request 0 */ -#define PCINT0_vect _VECTOR(2) -#define SIG_PIN_CHANGE0 _VECTOR(2) - -/* Pin Change Interrupt Request 1 */ -#define PCINT1_vect _VECTOR(3) -#define SIG_PIN_CHANGE1 _VECTOR(3) - -/* Watchdog Time-out */ -#define WDT_vect _VECTOR(4) -#define WATCHDOG_vect _VECTOR(4) -#define SIG_WATCHDOG_TIMEOUT _VECTOR(4) - -/* Timer/Counter1 Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(5) -#define TIM1_CAPT_vect _VECTOR(5) -#define SIG_INPUT_CAPTURE1 _VECTOR(5) - -/* Timer/Counter1 Compare Match A */ -#define TIM1_COMPA_vect _VECTOR(6) -#define SIG_OUTPUT_COMPARE1A _VECTOR(6) - -/* Timer/Counter1 Compare Match B */ -#define TIM1_COMPB_vect _VECTOR(7) -#define SIG_OUTPUT_COMPARE1B _VECTOR(7) - -/* Timer/Counter1 Overflow */ -#define TIM1_OVF_vect _VECTOR(8) -#define SIG_OVERFLOW1 _VECTOR(8) - -/* Timer/Counter0 Compare Match A */ -#define TIM0_COMPA_vect _VECTOR(9) -#define SIG_OUTPUT_COMPARE0A _VECTOR(9) - -/* Timer/Counter0 Compare Match B */ -#define TIM0_COMPB_vect _VECTOR(10) -#define SIG_OUTPUT_COMPARE0B _VECTOR(10) - -/* Timer/Counter0 Overflow */ -#define TIM0_OVF_vect _VECTOR(11) -#define SIG_OVERFLOW0 _VECTOR(11) - -/* Analog Comparator */ -#define ANA_COMP_vect _VECTOR(12) -#define SIG_COMPARATOR _VECTOR(12) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(13) -#define SIG_ADC _VECTOR(13) - -/* EEPROM Ready */ -#define EE_RDY_vect _VECTOR(14) -#define SIG_EEPROM_READY _VECTOR(14) - -/* USI START */ -#define USI_START_vect _VECTOR(15) -#define USI_STR_vect _VECTOR(15) -#define SIG_USI_START _VECTOR(15) - -/* USI Overflow */ -#define USI_OVF_vect _VECTOR(16) -#define SIG_USI_OVERFLOW _VECTOR(16) - -#define _VECTORS_SIZE 34 - -#endif /* _AVR_IOTNX4_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotnx5.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotnx5.h deleted file mode 100644 index 4f04cb9d9..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotnx5.h +++ /dev/null @@ -1,413 +0,0 @@ -/* Copyright (c) 2005,2007 Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iotnx5.h,v 1.7 2007/10/30 10:39:06 joerg_wunsch Exp $ */ - -/* avr/iotnx5.h - definitions for ATtiny25, ATtiny45 and ATtiny85 */ - -#ifndef _AVR_IOTNX5_H_ -#define _AVR_IOTNX5_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iotnx5.h" -#else -# error "Attempt to include more than one file." -#endif - -/* I/O registers */ - -/* Reserved [0x00..0x02] */ - -#define ADCSRB _SFR_IO8 (0x03) -#define BIN 7 -#define ACME 6 -#define IPR 5 -#define ADTS2 2 -#define ADTS1 1 -#define ADTS0 0 - -#ifndef __ASSEMBLER__ -#define ADC _SFR_IO16(0x04) -#endif -#define ADCW _SFR_IO16(0x04) -#define ADCL _SFR_IO8(0x04) -#define ADCH _SFR_IO8(0x05) - -#define ADCSRA _SFR_IO8 (0x06) -#define ADEN 7 -#define ADSC 6 -#define ADATE 5 -#define ADIF 4 -#define ADIE 3 -#define ADPS2 2 -#define ADPS1 1 -#define ADPS0 0 - -#define ADMUX _SFR_IO8(0x07) -#define REFS1 7 -#define REFS0 6 -#define ADLAR 5 -#define REFS2 4 -#define MUX3 3 -#define MUX2 2 -#define MUX1 1 -#define MUX0 0 - -#define ACSR _SFR_IO8(0x08) -#define ACD 7 -#define ACBG 6 -#define ACO 5 -#define ACI 4 -#define ACIE 3 -#define ACIS1 1 -#define ACIS0 0 - -/* Reserved [0x09..0x0C] */ - -#define USICR _SFR_IO8(0x0D) -#define USISIE 7 -#define USIOIE 6 -#define USIWM1 5 -#define USIWM0 4 -#define USICS1 3 -#define USICS0 2 -#define USICLK 1 -#define USITC 0 - -#define USISR _SFR_IO8(0x0E) -#define USISIF 7 -#define USIOIF 6 -#define USIPF 5 -#define USIDC 4 -#define USICNT3 3 -#define USICNT2 2 -#define USICNT1 1 -#define USICNT0 0 - -#define USIDR _SFR_IO8(0x0F) -#define USIBR _SFR_IO8(0x10) - -#define GPIOR0 _SFR_IO8(0x11) -#define GPIOR1 _SFR_IO8(0x12) -#define GPIOR2 _SFR_IO8(0x13) - -#define DIDR0 _SFR_IO8(0x14) -#define ADC0D 5 -#define ADC2D 4 -#define ADC3D 3 -#define ADC1D 2 -#define AIN1D 1 -#define AIN0D 0 - -#define PCMSK _SFR_IO8(0x15) -#define PCINT5 5 -#define PCINT4 4 -#define PCINT3 3 -#define PCINT2 2 -#define PCINT1 1 -#define PCINT0 0 - -#define PINB _SFR_IO8(0x16) -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -#define DDRB _SFR_IO8(0x17) -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -#define PORTB _SFR_IO8(0x18) -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -/* Reserved [0x19..0x1B] */ - -/* EEPROM Control Register EECR */ -#define EECR _SFR_IO8(0x1C) -#define EEPM1 5 -#define EEPM0 4 -#define EERIE 3 -#define EEMPE 2 -#define EEPE 1 -#define EERE 0 - -/* EEPROM Data Register */ -#define EEDR _SFR_IO8(0x1D) - -/* EEPROM Address Register */ -#define EEAR _SFR_IO16(0x1E) -#define EEARL _SFR_IO8(0x1E) -#define EEARH _SFR_IO8(0x1F) - -#define PRR _SFR_IO8(0x20) -#define PRTIM1 3 -#define PRTIM0 2 -#define PRUSI 1 -#define PRADC 0 - -#define WDTCR _SFR_IO8(0x21) -#define WDIF 7 -#define WDIE 6 -#define WDP3 5 -#define WDCE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -#define DWDR _SFR_IO8(0x22) - -#define DTPS1 _SFR_IO8(0x23) -#define DTPS11 1 -#define DTPS10 0 - -#define DT1B _SFR_IO8(0x24) -#define DT1BH3 7 -#define DT1BH2 6 -#define DT1BH1 5 -#define DT1BH0 4 -#define DT1BL3 3 -#define DT1BL2 2 -#define DT1BL1 1 -#define DT1BL0 0 - -#define DT1A _SFR_IO8(0x25) -#define DT1AH3 7 -#define DT1AH2 6 -#define DT1AH1 5 -#define DT1AH0 4 -#define DT1AL3 3 -#define DT1AL2 2 -#define DT1AL1 1 -#define DT1AL0 0 - -#define CLKPR _SFR_IO8(0x26) -#define CLKPCE 7 -#define CLKPS3 3 -#define CLKPS2 2 -#define CLKPS1 1 -#define CLKPS0 0 - -#define PLLCSR _SFR_IO8(0x27) -#define LSM 7 -#define PCKE 2 -#define PLLE 1 -#define PLOCK 0 - -#define OCR0B _SFR_IO8(0x28) - -#define OCR0A _SFR_IO8(0x29) - -#define TCCR0A _SFR_IO8(0x2A) -#define COM0A1 7 -#define COM0A0 6 -#define COM0B1 5 -#define COM0B0 4 -#define WGM01 1 -#define WGM00 0 - -#define OCR1B _SFR_IO8(0x2B) - -#define GTCCR _SFR_IO8(0x2C) -#define TSM 7 -#define PWM1B 6 -#define COM1B1 5 -#define COM1B0 4 -#define FOC1B 3 -#define FOC1A 2 -#define PSR1 1 -#define PSR0 0 - -#define OCR1C _SFR_IO8(0x2D) - -#define OCR1A _SFR_IO8(0x2E) - -#define TCNT1 _SFR_IO8(0x2F) - -#define TCCR1 _SFR_IO8(0x30) -#define CTC1 7 -#define PWM1A 6 -#define COM1A1 5 -#define COM1A0 4 -#define CS13 3 -#define CS12 2 -#define CS11 1 -#define CS10 0 - -#define OSCCAL _SFR_IO8(0x31) - -#define TCNT0 _SFR_IO8(0x32) - -#define TCCR0B _SFR_IO8(0x33) -#define FOC0A 7 -#define FOC0B 6 -#define WGM02 3 -#define CS02 2 -#define CS01 1 -#define CS00 0 - -#define MCUSR _SFR_IO8(0x34) -#define WDRF 3 -#define BORF 2 -#define EXTRF 1 -#define PORF 0 - -#define MCUCR _SFR_IO8(0x35) -#define PUD 6 -#define SE 5 -#define SM1 4 -#define SM0 3 -#define ISC01 1 -#define ISC00 0 - -/* Reserved [0x36] */ - -#define SPMCSR _SFR_IO8(0x37) -#define CTPB 4 -#define RFLB 3 -#define PGWRT 2 -#define PGERS 1 -#define SPMEN 0 - -#define TIFR _SFR_IO8(0x38) -#define OCF1A 6 -#define OCF1B 5 -#define OCF0A 4 -#define OCF0B 3 -#define TOV1 2 -#define TOV0 1 - -#define TIMSK _SFR_IO8(0x39) -#define OCIE1A 6 -#define OCIE1B 5 -#define OCIE0A 4 -#define OCIE0B 3 -#define TOIE1 2 -#define TOIE0 1 - -#define GIFR _SFR_IO8(0x3A) -#define INTF0 6 -#define PCIF 5 - -#define GIMSK _SFR_IO8(0x3B) -#define INT0 6 -#define PCIE 5 - -/* Reserved [0x3C] */ - -/* 0x3D..0x3E SP [defined in ] */ -/* 0x3F SREG [defined in ] */ - -///--- - -/* Interrupt vectors */ -/* Interrupt vector 0 is the reset vector. */ -/* External Interrupt 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* Pin change Interrupt Request 0 */ -#define PCINT0_vect _VECTOR(2) -#define SIG_PIN_CHANGE _VECTOR(2) - -/* Timer/Counter1 Compare Match 1A */ -#define TIM1_COMPA_vect _VECTOR(3) -#define TIMER1_COMPA_vect _VECTOR(3) -#define SIG_OUTPUT_COMPARE1A _VECTOR(3) - -/* Timer/Counter1 Overflow */ -#define TIM1_OVF_vect _VECTOR(4) -#define TIMER1_OVF_vect _VECTOR(4) -#define SIG_OVERFLOW1 _VECTOR(4) - -/* Timer/Counter0 Overflow */ -#define TIM0_OVF_vect _VECTOR(5) -#define TIMER0_OVF_vect _VECTOR(5) -#define SIG_OVERFLOW0 _VECTOR(5) - -/* EEPROM Ready */ -#define EE_RDY_vect _VECTOR(6) -#define SIG_EEPROM_READY _VECTOR(6) - -/* Analog comparator */ -#define ANA_COMP_vect _VECTOR(7) -#define SIG_COMPARATOR _VECTOR(7) - -/* ADC Conversion ready */ -#define ADC_vect _VECTOR(8) -#define SIG_ADC _VECTOR(8) - -/* Timer/Counter1 Compare Match B */ -#define TIM1_COMPB_vect _VECTOR(9) -#define TIMER1_COMPB_vect _VECTOR(9) -#define SIG_OUTPUT_COMPARE1B _VECTOR(9) - -/* Timer/Counter0 Compare Match A */ -#define TIM0_COMPA_vect _VECTOR(10) -#define TIMER0_COMPA_vect _VECTOR(10) -#define SIG_OUTPUT_COMPARE0A _VECTOR(10) - -/* Timer/Counter0 Compare Match B */ -#define TIM0_COMPB_vect _VECTOR(11) -#define TIMER0_COMPB_vect _VECTOR(11) -#define SIG_OUTPUT_COMPARE0B _VECTOR(11) - -/* Watchdog Time-out */ -#define WDT_vect _VECTOR(12) -#define SIG_WATCHDOG_TIMEOUT _VECTOR(12) - -/* USI START */ -#define USI_START_vect _VECTOR(13) -#define SIG_USI_START _VECTOR(13) - -/* USI Overflow */ -#define USI_OVF_vect _VECTOR(14) -#define SIG_USI_OVERFLOW _VECTOR(14) - -#define _VECTORS_SIZE 30 - -#endif /* _AVR_IOTNX5_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotnx61.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotnx61.h deleted file mode 100644 index 20063237b..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iotnx61.h +++ /dev/null @@ -1,515 +0,0 @@ -/* Copyright (c) 2006, 2007 Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iotnx61.h,v 1.6.2.1 2008/09/08 16:47:37 arcanum Exp $ */ - -/* avr/iotnx61.h - definitions for ATtiny261, ATtiny461 and ATtiny861 */ - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iotnx61.h" -#else -# error "Attempt to include more than one file." -#endif - -#ifndef _AVR_IOTNx61_H_ -#define _AVR_IOTNx61_H_ 1 - -/* Registers and associated bit numbers */ - -#define TCCR1E _SFR_IO8(0x00) -#define OC1OE0 0 -#define OC1OE1 1 -#define OC1OE2 2 -#define OC1OE3 3 -#define OC1OE4 4 -#define OC1OE5 5 - -#define DIDR0 _SFR_IO8(0x01) -#define ADC0D 0 -#define ADC1D 1 -#define ADC2D 2 -#define AREFD 3 -#define ADC3D 4 -#define ADC4D 5 -#define ADC5D 6 -#define ADC6D 7 - -#define DIDR1 _SFR_IO8(0x02) -#define ADC7D 4 -#define ADC8D 5 -#define ADC9D 6 -#define ADC10D 7 - -#define ADCSRB _SFR_IO8(0x03) -#define ADTS0 0 -#define ADTS1 1 -#define ADTS2 2 -#define MUX5 3 -#define REFS2 4 -#define IRP 5 -#define GSEL 6 -#define BIN 7 - -#define ADCW _SFR_IO16(0x04) -#ifndef __ASSEMBLER__ -#define ADC _SFR_IO16(0x04) -#endif - -#define ADCL _SFR_IO8(0x04) -#define ADCH _SFR_IO8(0x05) - -#define ADCSRA _SFR_IO8(0x06) -#define ADPS0 0 -#define ADPS1 1 -#define ADPS2 2 -#define ADIE 3 -#define ADIF 4 -#define ADATE 5 -#define ADSC 6 -#define ADEN 7 - -#define ADMUX _SFR_IO8(0x07) -#define MUX0 0 -#define MUX1 1 -#define MUX2 2 -#define MUX3 3 -#define MUX4 4 -#define ADLAR 5 -#define REFS0 6 -#define REFS1 7 - -#define ACSRA _SFR_IO8(0x08) -#define ACIS0 0 -#define ACIS1 1 -#define ACME 2 -#define ACIE 3 -#define ACI 4 -#define ACO 5 -#define ACBG 6 -#define ACD 7 - -#define ACSRB _SFR_IO8(0x09) -#define ACM0 0 -#define ACM1 1 -#define ACM2 2 -#define HLEV 6 -#define HSEL 7 - -#define GPIOR0 _SFR_IO8(0x0A) - -#define GPIOR1 _SFR_IO8(0x0B) - -#define GPIOR2 _SFR_IO8(0x0C) - -#define USICR _SFR_IO8(0x0D) -#define USITC 0 -#define USICLK 1 -#define USICS0 2 -#define USICS1 3 -#define USIWM0 4 -#define USIWM1 5 -#define USIOIE 6 -#define USISIE 7 - -#define USISR _SFR_IO8(0x0E) -#define USICNT0 0 -#define USICNT1 1 -#define USICNT2 2 -#define USICNT3 3 -#define USIDC 4 -#define USIPF 5 -#define USIOIF 6 -#define USISIF 7 - -#define USIDR _SFR_IO8(0x0F) - -#define USIBR _SFR_IO8(0x10) - -#define USIPP _SFR_IO8(0x11) -#define USIPOS 0 - -#define OCR0B _SFR_IO8(0x12) - -#define OCR0A _SFR_IO8(0x13) - -#define TCNT0H _SFR_IO8(0x14) - -#define TCCR0A _SFR_IO8(0x15) -#define WGM00 0 -#define ACIC0 3 -#define ICES0 4 -#define ICNC0 5 -#define ICEN0 6 -#define TCW0 7 - -#define PINB _SFR_IO8(0x16) -#define PINB0 0 -#define PINB1 1 -#define PINB2 2 -#define PINB3 3 -#define PINB4 4 -#define PINB5 5 -#define PINB6 6 -#define PINB7 7 - -#define DDRB _SFR_IO8(0x17) -#define DDB0 0 -#define DDB1 1 -#define DDB2 2 -#define DDB3 3 -#define DDB4 4 -#define DDB5 5 -#define DDB6 6 -#define DDB7 7 - -#define PORTB _SFR_IO8(0x18) -#define PB0 0 -#define PB1 1 -#define PB2 2 -#define PB3 3 -#define PB4 4 -#define PB5 5 -#define PB6 6 -#define PB7 7 - -#define PINA _SFR_IO8(0x19) -#define PINA0 0 -#define PINA1 1 -#define PINA2 2 -#define PINA3 3 -#define PINA4 4 -#define PINA5 5 -#define PINA6 6 -#define PINA7 7 - -#define DDRA _SFR_IO8(0x1A) -#define DDA0 0 -#define DDA1 1 -#define DDA2 2 -#define DDA3 3 -#define DDA4 4 -#define DDA5 5 -#define DDA6 6 -#define DDA7 7 - -#define PORTA _SFR_IO8(0x1B) -#define PA0 0 -#define PA1 1 -#define PA2 2 -#define PA3 3 -#define PA4 4 -#define PA5 5 -#define PA6 6 -#define PA7 7 - -/* EEPROM Control Register */ -#define EECR _SFR_IO8(0x1C) -#define EERE 0 -#define EEPE 1 -#define EEMPE 2 -#define EERIE 3 -#define EEPM0 4 -#define EEPM1 5 - -/* EEPROM Data Register */ -#define EEDR _SFR_IO8(0x1D) - -/* EEPROM Address Register */ -#define EEAR _SFR_IO16(0x1E) -#define EEARL _SFR_IO8(0x1E) -#define EEARH _SFR_IO8(0x1F) - -#define DWDR _SFR_IO8(0x20) - -#define WDTCR _SFR_IO8(0x21) -#define WDP0 0 -#define WDP1 1 -#define WDP2 2 -#define WDE 3 -#define WDCE 4 -#define WDP3 5 -#define WDIE 6 -#define WDIF 7 - -#define PCMSK1 _SFR_IO8(0x22) -#define PCINT8 0 -#define PCINT9 1 -#define PCINT10 2 -#define PCINT11 3 -#define PCINT12 4 -#define PCINT13 5 -#define PCINT14 6 -#define PCINT15 7 - -#define PCMSK0 _SFR_IO8(0x23) -#define PCINT0 0 -#define PCINT1 1 -#define PCINT2 2 -#define PCINT3 3 -#define PCINT4 4 -#define PCINT5 5 -#define PCINT6 6 -#define PCINT7 7 - -#define DT1 _SFR_IO8(0x24) -#define DT1L0 0 -#define DT1L1 1 -#define DT1L2 2 -#define DT1L3 3 -#define DT1H0 4 -#define DT1H1 5 -#define DT1H2 6 -#define DT1H3 7 - -#define TC1H _SFR_IO8(0x25) -#define TC18 0 -#define TC19 1 - -#define TCCR1D _SFR_IO8(0x26) -#define WGM10 0 -#define WGM11 1 -#define FPF1 2 -#define FPAC1 3 -#define FPES1 4 -#define FPNC1 5 -#define FPEN1 6 -#define FPIE1 7 - -#define TCCR1C _SFR_IO8(0x27) -#define PWM1D 0 -#define FOC1D 1 -#define COM1D0 2 -#define COM1D1 3 -#define COM1B0S 4 -#define COM1B1S 5 -#define COM1A0S 6 -#define COM1A1S 7 - -#define CLKPR _SFR_IO8(0x28) -#define CLKPS0 0 -#define CLKPS1 1 -#define CLKPS2 2 -#define CLKPS3 3 -#define CLKPCE 7 - -#define PLLCSR _SFR_IO8(0x29) -#define PLOCK 0 -#define PLLE 1 -#define PCKE 2 -#define LSM 7 - -#define OCR1D _SFR_IO8(0x2A) - -#define OCR1C _SFR_IO8(0x2B) - -#define OCR1B _SFR_IO8(0x2C) - -#define OCR1A _SFR_IO8(0x2D) - -#define TCNT1 _SFR_IO8(0x2E) - -#define TCCR1B _SFR_IO8(0x2F) -#define CS10 0 -#define CS11 1 -#define CS12 2 -#define CS13 3 -#define DTPS10 4 -#define DTPS11 5 -#define PSR1 6 -#define PWM1X 7 - -#define TCCR1A _SFR_IO8(0x30) -#define PWM1B 0 -#define PWM1A 1 -#define FOC1B 2 -#define FOC1A 3 -#define COM1B0 4 -#define COM1B1 5 -#define COM1A0 6 -#define COM1A1 7 - -#define OSCCAL _SFR_IO8(0x31) - -#define TCNT0L _SFR_IO8(0x32) - -#define TCCR0B _SFR_IO8(0x33) -#define CS00 0 -#define CS01 1 -#define CS02 2 -#define PSR0 3 -#define TSM 4 - -#define MCUSR _SFR_IO8(0x34) -#define PORF 0 -#define EXTRF 1 -#define BORF 2 -#define WDRF 3 - -#define MCUCR _SFR_IO8(0x35) -#define ISC00 0 -#define ISC01 1 -#define SM0 3 -#define SM1 4 -#define SE 5 -#define PUD 6 - -#define PRR _SFR_IO8(0x36) -#define PRADC 0 -#define PRUSI 1 -#define PRTIM0 2 -#define PRTIM1 3 - -#define SPMCSR _SFR_IO8(0x37) -#define SPMEN 0 -#define PGERS 1 -#define PGWRT 2 -#define RFLB 3 -#define CTPB 4 - -#define TIFR _SFR_IO8(0x38) -#define ICF0 0 -#define TOV0 1 -#define TOV1 2 -#define OCF0B 3 -#define OCF0A 4 -#define OCF1B 5 -#define OCF1A 6 -#define OCF1D 7 - -#define TIMSK _SFR_IO8(0x39) -#define TICIE0 0 -#define TOIE0 1 -#define TOIE1 2 -#define OCIE0B 3 -#define OCIE0A 4 -#define OCIE1B 5 -#define OCIE1A 6 -#define OCIE1D 7 - -#define GIFR _SFR_IO8(0x3A) -#define PCIF 5 -#define INTF0 6 -#define INTF1 7 - -#define GIMSK _SFR_IO8(0x3B) -#define PCIE0 4 -#define PCIE1 5 -#define INT0 6 -#define INT1 7 - -/* Reserved [0x3C] */ - -/* 0x3D..0x3E SP [defined in ] */ -/* 0x3F SREG [defined in ] */ - - -/* Interrupt vectors */ -/* Interrupt vector 0 is the reset vector. */ -/* External Interrupt 0 */ -#define INT0_vect _VECTOR(1) -#define SIG_INTERRUPT0 _VECTOR(1) - -/* Pin Change Interrupt */ -#define PCINT_vect _VECTOR(2) -#define SIG_PIN_CHANGE _VECTOR(2) - -/* Timer/Counter1 Compare Match 1A */ -#define TIMER1_COMPA_vect _VECTOR(3) -#define SIG_OUTPUT_COMPARE1A _VECTOR(3) - -/* Timer/Counter1 Compare Match 1B */ -#define TIMER1_COMPB_vect _VECTOR(4) -#define SIG_OUTPUT_COMPARE1B _VECTOR(4) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(5) -#define SIG_OVERFLOW1 _VECTOR(5) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(6) -#define SIG_OVERFLOW0 _VECTOR(6) - -/* USI Start */ -#define USI_START_vect _VECTOR(7) -#define SIG_USI_START _VECTOR(7) - -/* USI Overflow */ -#define USI_OVF_vect _VECTOR(8) -#define SIG_USI_OVERFLOW _VECTOR(8) - -/* EEPROM Ready */ -#define EE_RDY_vect _VECTOR(9) -#define SIG_EEPROM_READY _VECTOR(9) - -/* Analog Comparator */ -#define ANA_COMP_vect _VECTOR(10) -#define SIG_ANA_COMP _VECTOR(10) -#define SIG_COMPARATOR _VECTOR(10) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(11) -#define SIG_ADC _VECTOR(11) - -/* Watchdog Time-Out */ -#define WDT_vect _VECTOR(12) -#define SIG_WDT _VECTOR(12) - -/* External Interrupt 1 */ -#define INT1_vect _VECTOR(13) -#define SIG_INTERRUPT1 _VECTOR(13) - -/* Timer/Counter0 Compare Match A */ -#define TIMER0_COMPA_vect _VECTOR(14) -#define SIG_OUTPUT_COMPARE0A _VECTOR(14) - -/* Timer/Counter0 Compare Match B */ -#define TIMER0_COMPB_vect _VECTOR(15) -#define SIG_OUTPUT_COMPARE0B _VECTOR(15) - -/* ADC Conversion Complete */ -#define TIMER0_CAPT_vect _VECTOR(16) -#define SIG_INPUT_CAPTURE0 _VECTOR(16) - -/* Timer/Counter1 Compare Match D */ -#define TIMER1_COMPD_vect _VECTOR(17) -#define SIG_OUTPUT_COMPARE0D _VECTOR(17) - -/* Timer/Counter1 Fault Protection */ -#define FAULT_PROTECTION_vect _VECTOR(18) - -#define _VECTORS_SIZE 38 - -#endif /* _AVR_IOTNx61_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iousb1286.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iousb1286.h deleted file mode 100644 index 708c94a78..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iousb1286.h +++ /dev/null @@ -1,94 +0,0 @@ -/* Copyright (c) 2006 Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iousb1286.h,v 1.2.2.5 2008/10/17 23:27:53 arcanum Exp $ */ - -/* avr/iousb1286.h - definitions for AT90USB1286 */ - -#ifndef _AVR_AT90USB1286_H_ -#define _AVR_AT90USB1286_H_ 1 - -#include - -/* Constants */ -#define SPM_PAGESIZE 256 -#define RAMEND 0x20FF -#define XRAMEND 0xFFFF -#define E2END 0xFFF -#define E2PAGESIZE 8 -#define FLASHEND 0x1FFFF - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_JTAGEN (unsigned char)~_BV(6) -#define FUSE_OCDEN (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_SPIEN & FUSE_JTAGEN) - -/* Extended Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) -#define FUSE_HWBE (unsigned char)~_BV(3) -#define EFUSE_DEFAULT (FUSE_BODLEVEL2 & FUSE_HWBE) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x97 -#define SIGNATURE_2 0x82 - - -#endif /* _AVR_AT90USB1286_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iousb1287.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iousb1287.h deleted file mode 100644 index 311eac02f..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iousb1287.h +++ /dev/null @@ -1,94 +0,0 @@ -/* Copyright (c) 2006 Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iousb1287.h,v 1.2.2.5 2008/10/17 23:27:53 arcanum Exp $ */ - -/* avr/iousb1287.h - definitions for AT90USB1287 */ - -#ifndef _AVR_AT90USB1287_H_ -#define _AVR_AT90USB1287_H_ 1 - -#include - -/* Constants */ -#define SPM_PAGESIZE 256 -#define RAMEND 0x20FF -#define XRAMEND 0xFFFF -#define E2END 0xFFF -#define E2PAGESIZE 8 -#define FLASHEND 0x1FFFF - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_JTAGEN (unsigned char)~_BV(6) -#define FUSE_OCDEN (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_SPIEN & FUSE_JTAGEN) - -/* Extended Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) -#define FUSE_HWBE (unsigned char)~_BV(3) -#define EFUSE_DEFAULT (FUSE_BODLEVEL2 & FUSE_HWBE) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x97 -#define SIGNATURE_2 0x82 - - -#endif /* _AVR_AT90USB1287_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iousb162.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iousb162.h deleted file mode 100644 index 3931130bf..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iousb162.h +++ /dev/null @@ -1,94 +0,0 @@ -/* Copyright (c) 2007 Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iousb162.h,v 1.2.2.4 2008/10/17 23:27:53 arcanum Exp $ */ - -/* avr/iousb162.h - definitions for AT90USB162 */ - -#ifndef _AVR_AT90USB162_H_ -#define _AVR_AT90USB162_H_ 1 - -#include - -/* Constants */ -#define SPM_PAGESIZE 128 -#define RAMEND 0x2FF -#define XRAMEND 0x2FF -#define E2END 0x1FF -#define E2PAGESIZE 4 -#define FLASHEND 0x3FFF - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (CKSEL0 & SUT1 & CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_RSTDSBL (unsigned char)~_BV(6) -#define FUSE_DWEN (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (BOOTSZ0 & BOOTSZ1 & SPIEN) - -/* Extended Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) -#define FUSE_HWBE (unsigned char)~_BV(3) -#define EFUSE_DEFAULT (BODLEVEL0 & BODLEVEL1 & HWBE) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x94 -#define SIGNATURE_2 0x82 - - -#endif /* _AVR_AT90USB162_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iousb646.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iousb646.h deleted file mode 100644 index a0e709525..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iousb646.h +++ /dev/null @@ -1,94 +0,0 @@ -/* Copyright (c) 2006 Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iousb646.h,v 1.2.2.4 2008/10/17 23:27:53 arcanum Exp $ */ - -/* avr/iousb646.h - definitions for AT90USB646 */ - -#ifndef _AVR_AT90USB646_H_ -#define _AVR_AT90USB646_H_ 1 - -#include - -/* Constants */ -#define SPM_PAGESIZE 256 -#define RAMEND 0x10FF -#define XRAMEND 0xFFFF -#define E2END 0x7FF -#define E2PAGESIZE 8 -#define FLASHEND 0xFFFF - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (CKSEL0 & CKSEL2 & CKSEL3 & SUT0 & CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_JTAGEN (unsigned char)~_BV(6) -#define FUSE_OCDEN (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (BOOTSZ0 & BOOTSZ1 & SPIEN & JTAGEN) - -/* Extended Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) -#define FUSE_HWBE (unsigned char)~_BV(3) -#define EFUSE_DEFAULT (BODLEVEL2 & HWBE) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x96 -#define SIGNATURE_2 0x82 - - -#endif /* _AVR_AT90USB646_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iousb647.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iousb647.h deleted file mode 100644 index 7a6d0435a..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iousb647.h +++ /dev/null @@ -1,94 +0,0 @@ -/* Copyright (c) 2006 Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iousb647.h,v 1.2.2.4 2008/10/17 23:27:53 arcanum Exp $ */ - -/* avr/iousb647.h - definitions for AT90USB647 */ - -#ifndef _AVR_AT90USB647_H_ -#define _AVR_AT90USB647_H_ 1 - -#include - -/* Constants */ -#define SPM_PAGESIZE 256 -#define RAMEND 0x10FF -#define XRAMEND 0xFFFF -#define E2END 0x7FF -#define E2PAGESIZE 8 -#define FLASHEND 0xFFFF - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (CKSEL0 & CKSEL2 & CKSEL3 & SUT0 & CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_JTAGEN (unsigned char)~_BV(6) -#define FUSE_OCDEN (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (BOOTSZ0 & BOOTSZ1 & SPIEN & JTAGEN) - -/* Extended Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) -#define FUSE_HWBE (unsigned char)~_BV(3) -#define EFUSE_DEFAULT (BODLEVEL2 & HWBE) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -/* Signature */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x96 -#define SIGNATURE_2 0x82 - - -#endif /* _AVR_AT90USB647_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iousb82.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iousb82.h deleted file mode 100644 index 09684f135..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iousb82.h +++ /dev/null @@ -1,88 +0,0 @@ -/* Copyright (c) 2007 Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iousb82.h,v 1.2.2.3 2008/08/14 00:08:08 arcanum Exp $ */ - -/* avr/iousb82.h - definitions for AT90USB82 */ - -#ifndef _AVR_AT90USB82_H_ -#define _AVR_AT90USB82_H_ 1 - -#include - -/* Constants */ -#define SPM_PAGESIZE 128 -#define RAMEND 0x2FF -#define XRAMEND 0x2FF -#define E2END 0x1FF -#define E2PAGESIZE 4 -#define FLASHEND 0x1FFF - - -/* Fuses */ -#define FUSE_MEMORY_SIZE 3 - -/* Low Fuse Byte */ -#define FUSE_CKSEL0 (unsigned char)~_BV(0) -#define FUSE_CKSEL1 (unsigned char)~_BV(1) -#define FUSE_CKSEL2 (unsigned char)~_BV(2) -#define FUSE_CKSEL3 (unsigned char)~_BV(3) -#define FUSE_SUT0 (unsigned char)~_BV(4) -#define FUSE_SUT1 (unsigned char)~_BV(5) -#define FUSE_CKOUT (unsigned char)~_BV(6) -#define FUSE_CKDIV8 (unsigned char)~_BV(7) -#define LFUSE_DEFAULT (CKSEL0 & SUT1 & CKDIV8) - -/* High Fuse Byte */ -#define FUSE_BOOTRST (unsigned char)~_BV(0) -#define FUSE_BOOTSZ0 (unsigned char)~_BV(1) -#define FUSE_BOOTSZ1 (unsigned char)~_BV(2) -#define FUSE_EESAVE (unsigned char)~_BV(3) -#define FUSE_WDTON (unsigned char)~_BV(4) -#define FUSE_SPIEN (unsigned char)~_BV(5) -#define FUSE_RSTDSBL (unsigned char)~_BV(6) -#define FUSE_DWEN (unsigned char)~_BV(7) -#define HFUSE_DEFAULT (BOOTSZ0 & BOOTSZ1 & SPIEN) - -/* Extended Fuse Byte */ -#define FUSE_BODLEVEL0 (unsigned char)~_BV(0) -#define FUSE_BODLEVEL1 (unsigned char)~_BV(1) -#define FUSE_BODLEVEL2 (unsigned char)~_BV(2) -#define FUSE_HWBE (unsigned char)~_BV(3) -#define EFUSE_DEFAULT (BODLEVEL0 & BODLEVEL1 & HWBE) - - -/* Lock Bits */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_BITS_0_EXIST -#define __BOOT_LOCK_BITS_1_EXIST - - -#endif /* _AVR_AT90USB82_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iousbxx2.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iousbxx2.h deleted file mode 100644 index 0373cebd0..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iousbxx2.h +++ /dev/null @@ -1,766 +0,0 @@ -/* Copyright (c) 2007 Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iousbxx2.h,v 1.3 2007/05/12 11:40:46 aesok Exp $ */ - -/* iousbxx2.h - definitions for AT90USB82 and AT90USB162. */ - -#ifndef _AVR_IOUSBXX2_H_ -#define _AVR_IOUSBXX2_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iousbxx2.h" -#else -# error "Attempt to include more than one file." -#endif - -/* Registers and associated bit numbers */ - -/* Reserved [0x00..0x02] */ - -#define PINB _SFR_IO8(0X03) -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -#define DDRB _SFR_IO8(0x04) -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -#define PORTB _SFR_IO8(0x05) -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -#define PINC _SFR_IO8(0x06) -#define PINC7 7 -#define PINC6 6 -#define PINC5 5 -#define PINC4 4 -#define PINC2 2 -#define PINC1 1 -#define PINC0 0 - -#define DDRC _SFR_IO8(0x07) -#define DDC7 7 -#define DDC6 6 -#define DDC5 5 -#define DDC4 4 -#define DDC2 2 -#define DDC1 1 -#define DDC0 0 - -#define PORTC _SFR_IO8(0x08) -#define PC7 7 -#define PC6 6 -#define PC5 5 -#define PC4 4 -#define PC2 2 -#define PC1 1 -#define PC0 0 - -#define PIND _SFR_IO8(0x09) -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -#define DDRD _SFR_IO8(0x0A) -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -#define PORTD _SFR_IO8(0x0B) -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -/* Reserved [0xC..0x14] */ - -#define TIFR0 _SFR_IO8(0x15) -#define OCF0B 2 -#define OCF0A 1 -#define TOV0 0 - -#define TIFR1 _SFR_IO8(0x16) -#define ICF1 5 -#define OCF1C 3 -#define OCF1B 2 -#define OCF1A 1 -#define TOV1 0 - -/* Reserved [0x17..0x1A] */ - -#define PCIFR _SFR_IO8(0x1B) -#define PCIF1 1 -#define PCIF0 0 - -#define EIFR _SFR_IO8(0x1C) -#define INTF7 7 -#define INTF6 6 -#define INTF5 5 -#define INTF4 4 -#define INTF3 3 -#define INTF2 2 -#define INTF1 1 -#define INTF0 0 - -#define EIMSK _SFR_IO8(0x1D) -#define INT7 7 -#define INT6 6 -#define INT5 5 -#define INT4 4 -#define INT3 3 -#define INT2 2 -#define INT1 1 -#define INT0 0 - -#define GPIOR0 _SFR_IO8(0x1E) - -#define EECR _SFR_IO8(0x1F) -#define EEPM1 5 -#define EEPM0 4 -#define EERIE 3 -#define EEMPE 2 -#define EEPE 1 -#define EERE 0 - -#define EEDR _SFR_IO8(0x20) - -#define EEAR _SFR_IO16(0x21) -#define EEARL _SFR_IO8(0x21) -#define EEARH _SFR_IO8(0x22) - -/* 6-char sequence denoting where to find the EEPROM registers in memory space. - Adresses denoted in hex syntax with uppercase letters. Used by the EEPROM - subroutines. - First two letters: EECR address. - Second two letters: EEDR address. - Last two letters: EEAR address. */ -#define __EEPROM_REG_LOCATIONS__ 1F2021 - -#define GTCCR _SFR_IO8(0x23) -#define TSM 7 -#define PSRASY 1 -#define PSRSYNC 0 - -#define TCCR0A _SFR_IO8(0x24) -#define COM0A1 7 -#define COM0A0 6 -#define COM0B1 5 -#define COM0B0 4 -#define WGM01 1 -#define WGM00 0 - -#define TCCR0B _SFR_IO8(0x25) -#define FOC0A 7 -#define FOC0B 6 -#define WGM02 3 -#define CS02 2 -#define CS01 1 -#define CS00 0 - -#define TCNT0 _SFR_IO8(0X26) - -#define OCR0A _SFR_IO8(0x27) - -#define OCR0B _SFR_IO8(0X28) - -#define PLLCSR _SFR_IO8(0x29) -#define PLLP2 4 -#define PLLP1 3 -#define PLLP0 2 -#define PLLE 1 -#define PLOCK 0 - -#define GPIOR1 _SFR_IO8(0x2A) - -#define GPIOR2 _SFR_IO8(0x2B) - -#define SPCR _SFR_IO8(0x2C) -#define SPIE 7 -#define SPE 6 -#define DORD 5 -#define MSTR 4 -#define CPOL 3 -#define CPHA 2 -#define SPR1 1 -#define SPR0 0 - -#define SPSR _SFR_IO8(0x2D) -#define SPIF 7 -#define WCOL 6 -#define SPI2X 0 - -#define SPDR _SFR_IO8(0x2E) - -/* Reserved [0x2F] */ - -#define ACSR _SFR_IO8(0x30) -#define ACD 7 -#define ACBG 6 -#define ACO 5 -#define ACI 4 -#define ACIE 3 -#define ACIC 2 -#define ACIS1 1 -#define ACIS0 0 - -#define DWDR _SFR_IO8(0x31) -#define IDRD 7 - -/* Reserved [0x32] */ - -#define SMCR _SFR_IO8(0x33) -#define SM2 3 -#define SM1 2 -#define SM0 1 -#define SE 0 - -#define MCUSR _SFR_IO8(0x34) -#define USBRF 5 -#define WDRF 3 -#define BORF 2 -#define EXTRF 1 -#define PORF 0 - -#define MCUCR _SFR_IO8(0x35) -#define IVSEL 1 -#define IVCE 0 - -/* Reserved [0x36] */ - -#define SPMCSR _SFR_IO8(0x37) -#define SPMIE 7 -#define RWWSB 6 -#define SIGRD 5 -#define RWWSRE 4 -#define BLBSET 3 -#define PGWRT 2 -#define PGERS 1 -#define SPMEN 0 - -/* Reserved [0x38..0x3C] */ - -/* SP [0x3D..0x3E] */ -/* SREG [0x3F] */ - -#define WDTCSR _SFR_MEM8(0x60) -#define WDIF 7 -#define WDIE 6 -#define WDP3 5 -#define WDCE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -#define CLKPR _SFR_MEM8(0x61) -#define CLKPCE 7 -#define CLKPS3 3 -#define CLKPS2 2 -#define CLKPS1 1 -#define CLKPS0 0 - -#define WDTCKD _SFR_MEM8(0x62) -#define WDEWIF 3 -#define WDEWIE 2 -#define WCLKD1 1 -#define WCLKD0 0 - -#define REGCR _SFR_MEM8(0x63) -#define REGDIS 0 - -#define PRR0 _SFR_MEM8(0x64) -#define PRTIM0 5 -#define PRTIM1 3 -#define PRSPI 2 - -#define PRR1 _SFR_MEM8(0x65) -#define PRUSB 7 -#define PRUSART1 0 - -#define OSCCAL _SFR_MEM8(0x66) - -/* Reserved [0x67] */ - -#define PCICR _SFR_MEM8(0x68) -#define PCIE1 1 -#define PCIE0 0 - -#define EICRA _SFR_MEM8(0x69) -#define ISC31 7 -#define ISC30 6 -#define ISC21 5 -#define ISC20 4 -#define ISC11 3 -#define ISC10 2 -#define ISC01 1 -#define ISC00 0 - -#define EICRB _SFR_MEM8(0x6A) -#define ISC71 7 -#define ISC70 6 -#define ISC61 5 -#define ISC60 4 -#define ISC51 3 -#define ISC50 2 -#define ISC41 1 -#define ISC40 0 - -#define PCMSK0 _SFR_MEM8(0x6B) -#define PCINT7 7 -#define PCINT6 6 -#define PCINT5 5 -#define PCINT4 4 -#define PCINT3 3 -#define PCINT2 2 -#define PCINT1 1 -#define PCINT0 0 - -#define PCMSK1 _SFR_MEM8(0x6C) -#define PCINT12 4 -#define PCINT11 3 -#define PCINT10 2 -#define PCINT9 1 -#define PCINT8 0 - -/* Reserved [0x6D] */ - -#define TIMSK0 _SFR_MEM8(0x6E) -#define OCIE0B 2 -#define OCIE0A 1 -#define TOIE0 0 - -#define TIMSK1 _SFR_MEM8(0x6F) -#define ICIE1 5 -#define OCIE1C 3 -#define OCIE1B 2 -#define OCIE1A 1 -#define TOIE1 0 - -/* Reserved [0x70..0x7F] */ - -#define TCCR1A _SFR_MEM8(0x80) -#define COM1A1 7 -#define COM1A0 6 -#define COM1B1 5 -#define COM1B0 4 -#define COM1C1 3 -#define COM1C0 2 -#define WGM11 1 -#define WGM10 0 - -#define TCCR1B _SFR_MEM8(0x81) -#define ICNC1 7 -#define ICES1 6 -#define WGM13 4 -#define WGM12 3 -#define CS12 2 -#define CS11 1 -#define CS10 0 - -#define TCCR1C _SFR_MEM8(0x82) -#define FOC1A 7 -#define FOC1B 6 -#define FOC1C 5 - -/* Reserved [0x83] */ - -/* Combine TCNT1L and TCNT1H */ -#define TCNT1 _SFR_MEM16(0x84) - -#define TCNT1L _SFR_MEM8(0x84) -#define TCNT1H _SFR_MEM8(0x85) - -/* Combine ICR1L and ICR1H */ -#define ICR1 _SFR_MEM16(0x86) - -#define ICR1L _SFR_MEM8(0x86) -#define ICR1H _SFR_MEM8(0x87) - -/* Combine OCR1AL and OCR1AH */ -#define OCR1A _SFR_MEM16(0x88) - -#define OCR1AL _SFR_MEM8(0x88) -#define OCR1AH _SFR_MEM8(0x89) - -/* Combine OCR1BL and OCR1BH */ -#define OCR1B _SFR_MEM16(0x8A) - -#define OCR1BL _SFR_MEM8(0x8A) -#define OCR1BH _SFR_MEM8(0x8B) - -/* Combine OCR1CL and OCR1CH */ -#define OCR1C _SFR_MEM16(0x8C) - -#define OCR1CL _SFR_MEM8(0x8C) -#define OCR1CH _SFR_MEM8(0x8D) - -/* Reserved [0x8E..0xC7] */ - -#define UCSR1A _SFR_MEM8(0xC8) -#define RXC1 7 -#define TXC1 6 -#define UDRE1 5 -#define FE1 4 -#define DOR1 3 -#define UPE1 2 -#define U2X1 1 -#define MPCM1 0 - -#define UCSR1B _SFR_MEM8(0XC9) -#define RXCIE1 7 -#define TXCIE1 6 -#define UDRIE1 5 -#define RXEN1 4 -#define TXEN1 3 -#define UCSZ12 2 -#define RXB81 1 -#define TXB81 0 - -#define UCSR1C _SFR_MEM8(0xCA) -#define UMSEL11 7 -#define UMSEL10 6 -#define UPM11 5 -#define UPM10 4 -#define USBS1 3 -#define UCSZ11 2 -#define UCSZ10 1 -#define UCPOL1 0 - -#define UCSR1D _SFR_MEM8(0xCB) -#define CTSEN 1 -#define RTSEN 0 - -/* Combine UBRR1L and UBRR1H */ -#define UBRR1 _SFR_MEM16(0xCC) - -#define UBRR1L _SFR_MEM8(0xCC) -#define UBRR1H _SFR_MEM8(0xCD) - -#define UDR1 _SFR_MEM8(0XCE) - -/* Reserved [0xCF] */ - -#define CKSEL0 _SFR_MEM8(0XD0) -#define RCSUT1 7 -#define RCSUT0 6 -#define EXSUT1 5 -#define EXSUT0 4 -#define RCE 3 -#define EXTE 2 -#define CLKS 0 - -#define CKSEL1 _SFR_MEM8(0XD1) -#define RCCKSEL3 7 -#define RCCKSEL2 6 -#define RCCKSEL1 5 -#define RCCKSEL0 4 -#define EXCKSEL3 3 -#define EXCKSEL2 2 -#define EXCKSEL1 1 -#define EXCKSEL0 0 - -#define CKSTA _SFR_MEM8(0XD2) -#define RCON 1 -#define EXTON 0 - -/* Reserved [0xD3..0xD7] */ - -#define USBCON _SFR_MEM8(0XD8) -#define USBE 7 -#define FRZCLK 5 - -/* Reserved [0xD9..0xDA] */ - -/* Combine UDPADDL and UDPADDH */ -#define UDPADD _SFR_MEM16(0xDB) - -#define UDPADDL _SFR_MEM8(0xDB) -#define UDPADDH _SFR_MEM8(0xDC) -#define DPACC 7 - -/* Reserved [0xDD..0xDF] */ - -#define UDCON _SFR_MEM8(0XE0) -#define RSTCPU 2 -#define RMWKUP 1 -#define DETACH 0 - -#define UDINT _SFR_MEM8(0XE1) -#define UPRSMI 6 -#define EORSMI 5 -#define WAKEUPI 4 -#define EORSTI 3 -#define SOFI 2 -#define SUSPI 0 - -#define UDIEN _SFR_MEM8(0XE2) -#define UPRSME 6 -#define EORSME 5 -#define WAKEUPE 4 -#define EORSTE 3 -#define SOFE 2 -#define SUSPE 0 - -#define UDADDR _SFR_MEM8(0XE3) -#define ADDEN 7 - -/* Combine UDFNUML and UDFNUMH */ -#define UDFNUM _SFR_MEM16(0xE4) - -#define UDFNUML _SFR_MEM8(0xE4) -#define UDFNUMH _SFR_MEM8(0xE5) - -#define UDMFN _SFR_MEM8(0XE6) -#define FNCERR 4 - -/* Reserved [0xE7] */ - -#define UEINTX _SFR_MEM8(0XE8) -#define FIFOCON 7 -#define NAKINI 6 -#define RWAL 5 -#define NAKOUTI 4 -#define RXSTPI 3 -#define RXOUTI 2 -#define STALLEDI 1 -#define TXINI 0 - -#define UENUM _SFR_MEM8(0XE9) -#define EPNUM2 2 -#define EPNUM1 1 -#define EPNUM0 0 - -#define UERST _SFR_MEM8(0XEA) -#define EPRST4 4 -#define EPRST3 3 -#define EPRST2 2 -#define EPRST1 1 -#define EPRST0 0 - -#define UECONX _SFR_MEM8(0XEB) -#define STALLRQ 5 -#define STALLRQC 4 -#define RSTDT 3 -#define EPEN 0 - -#define UECFG0X _SFR_MEM8(0XEC) -#define EPTYPE1 7 -#define EPTYPE0 6 -#define EPDIR 0 - -#define UECFG1X _SFR_MEM8(0XED) -#define EPSIZE2 6 -#define EPSIZE1 5 -#define EPSIZE0 4 -#define EPBK1 3 -#define EPBK0 2 -#define ALLOC 1 - -#define UESTA0X _SFR_MEM8(0XEE) -#define CFGOK 7 -#define OVERFI 6 -#define UNDERFI 5 -#define DTSEQ1 3 -#define DTSEQ0 2 -#define NBUSYBK1 1 -#define NBUSYBK0 0 - -#define UESTA1X _SFR_MEM8(0XEF) -#define CTRLDIR 2 -#define CURRBK1 1 -#define CURRBK0 0 - -#define UEIENX _SFR_MEM8(0XF0) -#define FLERRE 7 -#define NAKINE 6 -#define NAKOUTE 4 -#define RXSTPE 3 -#define RXOUTE 2 -#define STALLEDE 1 -#define TXINE 0 - -#define UEDATX _SFR_MEM8(0XF1) - -#define UEBCLX _SFR_MEM8(0xF2) - -/* Reserved [0xF3] */ - -#define UEINT _SFR_MEM8(0XF4) -#define EPINT4 4 -#define EPINT3 3 -#define EPINT2 2 -#define EPINT1 1 -#define EPINT0 0 - -/* Reserved [0xF5..0xF9] */ - -#define PS2CON _SFR_MEM8(0XFA) -#define PS2EN 0 - -#define UPOE _SFR_MEM8(0XFB) -#define UPWE1 7 -#define UPWE0 6 -#define UPDRV1 5 -#define UPDRV0 4 -#define SCKI 3 -#define DATAI 2 -#define DPI 1 -#define DMI 0 - -/* Reserved [0xFC..0xFF] */ - -/* Interrupt vectors */ - -/* External Interrupt Request 0 */ -#define INT0_vect _VECTOR(1) - -/* External Interrupt Request 1 */ -#define INT1_vect _VECTOR(2) - -/* External Interrupt Request 2 */ -#define INT2_vect _VECTOR(3) - -/* External Interrupt Request 3 */ -#define INT3_vect _VECTOR(4) - -/* External Interrupt Request 4 */ -#define INT4_vect _VECTOR(5) - -/* External Interrupt Request 5 */ -#define INT5_vect _VECTOR(6) - -/* External Interrupt Request 6 */ -#define INT6_vect _VECTOR(7) - -/* External Interrupt Request 7 */ -#define INT7_vect _VECTOR(8) - -/* Pin Change Interrupt Request 0 */ -#define PCINT0_vect _VECTOR(9) - -/* Pin Change Interrupt Request 1 */ -#define PCINT1_vect _VECTOR(10) - -/* USB General Interrupt Request */ -#define USB_GEN_vect _VECTOR(11) - -/* USB Endpoint/Pipe Interrupt Communication Request */ -#define USB_COM_vect _VECTOR(12) - -/* Watchdog Time-out Interrupt */ -#define WDT_vect _VECTOR(13) - -/* Timer/Counter2 Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(14) - -/* Timer/Counter2 Compare Match B */ -#define TIMER1_COMPA_vect _VECTOR(15) - -/* Timer/Counter2 Compare Match B */ -#define TIMER1_COMPB_vect _VECTOR(16) - -/* Timer/Counter2 Compare Match C */ -#define TIMER1_COMPC_vect _VECTOR(17) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(18) - -/* Timer/Counter0 Compare Match A */ -#define TIMER0_COMPA_vect _VECTOR(19) - -/* Timer/Counter0 Compare Match B */ -#define TIMER0_COMPB_vect _VECTOR(20) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(21) - -/* SPI Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(22) - -/* USART1, Rx Complete */ -#define USART1_RX_vect _VECTOR(23) - -/* USART1 Data register Empty */ -#define USART1_UDRE_vect _VECTOR(24) - -/* USART1, Tx Complete */ -#define USART1_TX_vect _VECTOR(25) - -/* Analog Comparator */ -#define ANALOG_COMP_vect _VECTOR(26) - -/* EEPROM Ready */ -#define EE_READY_vect _VECTOR(27) - -/* Store Program Memory Read */ -#define SPM_READY_vect _VECTOR(28) - -#define _VECTORS_SIZE 116 - -#endif /* _AVR_IOUSBXX2_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iousbxx6_7.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iousbxx6_7.h deleted file mode 100644 index 520df8830..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iousbxx6_7.h +++ /dev/null @@ -1,1285 +0,0 @@ -/* Copyright (c) 2006, Anatoly Sokolov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iousbxx6_7.h,v 1.4.2.1 2008/05/05 01:58:21 arcanum Exp $ */ - -/* iousbxx6_7.h - definitions for AT90USB646, AT90USB647, AT90USB1286 - and AT90USB1287 */ - -#ifndef _AVR_IOUSBXX6_7_H_ -#define _AVR_IOUSBXX6_7_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iousbxx6_7.h" -#else -# error "Attempt to include more than one file." -#endif - -#if defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB1286__) -# define __AT90USBxx6__ 1 -#elif defined(__AVR_AT90USB647__) || defined(__AVR_AT90USB1287__) -# define __AT90USBxx7__ 1 -#endif - -/* Registers and associated bit numbers */ - -#define PINA _SFR_IO8(0X00) -#define PINA7 7 -#define PINA6 6 -#define PINA5 5 -#define PINA4 4 -#define PINA3 3 -#define PINA2 2 -#define PINA1 1 -#define PINA0 0 - -#define DDRA _SFR_IO8(0X01) -#define DDA7 7 -#define DDA6 6 -#define DDA5 5 -#define DDA4 4 -#define DDA3 3 -#define DDA2 2 -#define DDA1 1 -#define DDA0 0 - -#define PORTA _SFR_IO8(0X02) -#define PA7 7 -#define PA6 6 -#define PA5 5 -#define PA4 4 -#define PA3 3 -#define PA2 2 -#define PA1 1 -#define PA0 0 - -#define PINB _SFR_IO8(0X03) -#define PINB7 7 -#define PINB6 6 -#define PINB5 5 -#define PINB4 4 -#define PINB3 3 -#define PINB2 2 -#define PINB1 1 -#define PINB0 0 - -#define DDRB _SFR_IO8(0x04) -#define DDB7 7 -#define DDB6 6 -#define DDB5 5 -#define DDB4 4 -#define DDB3 3 -#define DDB2 2 -#define DDB1 1 -#define DDB0 0 - -#define PORTB _SFR_IO8(0x05) -#define PB7 7 -#define PB6 6 -#define PB5 5 -#define PB4 4 -#define PB3 3 -#define PB2 2 -#define PB1 1 -#define PB0 0 - -#define PINC _SFR_IO8(0x06) -#define PINC7 7 -#define PINC6 6 -#define PINC5 5 -#define PINC4 4 -#define PINC3 3 -#define PINC2 2 -#define PINC1 1 -#define PINC0 0 - -#define DDRC _SFR_IO8(0x07) -#define DDC7 7 -#define DDC6 6 -#define DDC5 5 -#define DDC4 4 -#define DDC3 3 -#define DDC2 2 -#define DDC1 1 -#define DDC0 0 - -#define PORTC _SFR_IO8(0x08) -#define PC7 7 -#define PC6 6 -#define PC5 5 -#define PC4 4 -#define PC3 3 -#define PC2 2 -#define PC1 1 -#define PC0 0 - -#define PIND _SFR_IO8(0x09) -#define PIND7 7 -#define PIND6 6 -#define PIND5 5 -#define PIND4 4 -#define PIND3 3 -#define PIND2 2 -#define PIND1 1 -#define PIND0 0 - -#define DDRD _SFR_IO8(0x0A) -#define DDD7 7 -#define DDD6 6 -#define DDD5 5 -#define DDD4 4 -#define DDD3 3 -#define DDD2 2 -#define DDD1 1 -#define DDD0 0 - -#define PORTD _SFR_IO8(0x0B) -#define PD7 7 -#define PD6 6 -#define PD5 5 -#define PD4 4 -#define PD3 3 -#define PD2 2 -#define PD1 1 -#define PD0 0 - -#define PINE _SFR_IO8(0x0C) -#define PINE7 7 -#define PINE6 6 -#define PINE5 5 -#define PINE4 4 -#define PINE3 3 -#define PINE2 2 -#define PINE1 1 -#define PINE0 0 - -#define DDRE _SFR_IO8(0x0D) -#define DDE7 7 -#define DDE6 6 -#define DDE5 5 -#define DDE4 4 -#define DDE3 3 -#define DDE2 2 -#define DDE1 1 -#define DDE0 0 - -#define PORTE _SFR_IO8(0x0E) -#define PE7 7 -#define PE6 6 -#define PE5 5 -#define PE4 4 -#define PE3 3 -#define PE2 2 -#define PE1 1 -#define PE0 0 - -#define PINF _SFR_IO8(0x0F) -#define PINF7 7 -#define PINF6 6 -#define PINF5 5 -#define PINF4 4 -#define PINF3 3 -#define PINF2 2 -#define PINF1 1 -#define PINF0 0 - -#define DDRF _SFR_IO8(0x10) -#define DDF7 7 -#define DDF6 6 -#define DDF5 5 -#define DDF4 4 -#define DDF3 3 -#define DDF2 2 -#define DDF1 1 -#define DDF0 0 - -#define PORTF _SFR_IO8(0x11) -#define PF7 7 -#define PF6 6 -#define PF5 5 -#define PF4 4 -#define PF3 3 -#define PF2 2 -#define PF1 1 -#define PF0 0 - -/* Reserved [0x12..0x14] */ - -#define TIFR0 _SFR_IO8(0x15) -#define OCF0B 2 -#define OCF0A 1 -#define TOV0 0 - -#define TIFR1 _SFR_IO8(0x16) -#define ICF1 5 -#define OCF1C 3 -#define OCF1B 2 -#define OCF1A 1 -#define TOV1 0 - -#define TIFR2 _SFR_IO8(0x17) -#define OCF2B 2 -#define OCF2A 1 -#define TOV2 0 - -#define TIFR3 _SFR_IO8(0x18) -#define ICF3 5 -#define OCF3C 3 -#define OCF3B 2 -#define OCF3A 1 -#define TOV3 0 - -/* Reserved [0x19..0x1A] */ - -#define PCIFR _SFR_IO8(0x1B) -#define PCIF0 0 - -#define EIFR _SFR_IO8(0x1C) -#define INTF7 7 -#define INTF6 6 -#define INTF5 5 -#define INTF4 4 -#define INTF3 3 -#define INTF2 2 -#define INTF1 1 -#define INTF0 0 - -#define EIMSK _SFR_IO8(0x1D) -#define INT7 7 -#define INT6 6 -#define INT5 5 -#define INT4 4 -#define INT3 3 -#define INT2 2 -#define INT1 1 -#define INT0 0 - -#define GPIOR0 _SFR_IO8(0x1E) - -#define EECR _SFR_IO8(0x1F) -#define EEPM1 5 -#define EEPM0 4 -#define EERIE 3 -#define EEMPE 2 -#define EEPE 1 -#define EERE 0 - -#define EEDR _SFR_IO8(0x20) - -#define EEAR _SFR_IO16(0x21) -#define EEARL _SFR_IO8(0x21) -#define EEARH _SFR_IO8(0x22) - -/* 6-char sequence denoting where to find the EEPROM registers in memory space. - Adresses denoted in hex syntax with uppercase letters. Used by the EEPROM - subroutines. - First two letters: EECR address. - Second two letters: EEDR address. - Last two letters: EEAR address. */ -#define __EEPROM_REG_LOCATIONS__ 1F2021 - -#define GTCCR _SFR_IO8(0x23) -#define TSM 7 -#define PSRASY 1 -#define PSRSYNC 0 - -#define TCCR0A _SFR_IO8(0x24) -#define COM0A1 7 -#define COM0A0 6 -#define COM0B1 5 -#define COM0B0 4 -#define WGM01 1 -#define WGM00 0 - -#define TCCR0B _SFR_IO8(0x25) -#define FOC0A 7 -#define FOC0B 6 -#define WGM02 3 -#define CS02 2 -#define CS01 1 -#define CS00 0 - -#define TCNT0 _SFR_IO8(0X26) - -#define OCR0A _SFR_IO8(0x27) - -#define OCR0B _SFR_IO8(0X28) - -#define PLLCSR _SFR_IO8(0x29) -#define PLLP2 4 -#define PLLP1 3 -#define PLLP0 2 -#define PLLE 1 -#define PLOCK 0 - -#define GPIOR1 _SFR_IO8(0x2A) - -#define GPIOR2 _SFR_IO8(0x2B) - -#define SPCR _SFR_IO8(0x2C) -#define SPIE 7 -#define SPE 6 -#define DORD 5 -#define MSTR 4 -#define CPOL 3 -#define CPHA 2 -#define SPR1 1 -#define SPR0 0 - -#define SPSR _SFR_IO8(0x2D) -#define SPIF 7 -#define WCOL 6 -#define SPI2X 0 - -#define SPDR _SFR_IO8(0x2E) - -/* Reserved [0x2F] */ - -#define ACSR _SFR_IO8(0x30) -#define ACD 7 -#define ACBG 6 -#define ACO 5 -#define ACI 4 -#define ACIE 3 -#define ACIC 2 -#define ACIS1 1 -#define ACIS0 0 - -#define MONDR _SFR_IO8(0x31) -#define OCDR _SFR_IO8(0x31) -#define IDRD 7 -#define OCDR7 7 -#define OCDR6 6 -#define OCDR5 5 -#define OCDR4 4 -#define OCDR3 3 -#define OCDR2 2 -#define OCDR1 1 -#define OCDR0 0 - -/* Reserved [0x32] */ - -#define SMCR _SFR_IO8(0x33) -#define SM2 3 -#define SM1 2 -#define SM0 1 -#define SE 0 - -#define MCUSR _SFR_IO8(0x34) -#define JTRF 4 -#define WDRF 3 -#define BORF 2 -#define EXTRF 1 -#define PORF 0 - -#define MCUCR _SFR_IO8(0x35) -#define JTD 7 -#define PUD 4 -#define IVSEL 1 -#define IVCE 0 - -/* Reserved [0x36] */ - -#define SPMCSR _SFR_IO8(0x37) -#define SPMIE 7 -#define RWWSB 6 -#define SIGRD 5 -#define RWWSRE 4 -#define BLBSET 3 -#define PGWRT 2 -#define PGERS 1 -#define SPMEN 0 - -/* Reserved [0x38..0x3A] */ - -#if defined(__AVR_AT90USB1286__) || defined(__AVR_AT90USB1287__) -#define RAMPZ _SFR_IO8(0x3B) -#endif - -/* Reserved [0x3C] */ - -/* SP [0x3D..0x3E] */ -/* SREG [0x3F] */ - -#define WDTCSR _SFR_MEM8(0x60) -#define WDIF 7 -#define WDIE 6 -#define WDP3 5 -#define WDCE 4 -#define WDE 3 -#define WDP2 2 -#define WDP1 1 -#define WDP0 0 - -#define CLKPR _SFR_MEM8(0x61) -#define CLKPCE 7 -#define CLKPS3 3 -#define CLKPS2 2 -#define CLKPS1 1 -#define CLKPS0 0 - -/* Reserved [0x62..0x63] */ - -#define PRR0 _SFR_MEM8(0x64) -#define PRTWI 7 -#define PRTIM2 6 -#define PRTIM0 5 -#define PRTIM1 3 -#define PRSPI 2 -#define PRADC 0 - -#define PRR1 _SFR_MEM8(0x65) -#define PRUSB 7 -#define PRTIM3 3 -#define PRUSART1 0 - -#define OSCCAL _SFR_MEM8(0x66) - -/* Reserved [0x67] */ - -#define PCICR _SFR_MEM8(0x68) -#define PCIE0 0 - -#define EICRA _SFR_MEM8(0x69) -#define ISC31 7 -#define ISC30 6 -#define ISC21 5 -#define ISC20 4 -#define ISC11 3 -#define ISC10 2 -#define ISC01 1 -#define ISC00 0 - -#define EICRB _SFR_MEM8(0x6A) -#define ISC71 7 -#define ISC70 6 -#define ISC61 5 -#define ISC60 4 -#define ISC51 3 -#define ISC50 2 -#define ISC41 1 -#define ISC40 0 - -#define PCMSK0 _SFR_MEM8(0x6B) -#define PCINT7 7 -#define PCINT6 6 -#define PCINT5 5 -#define PCINT4 4 -#define PCINT3 3 -#define PCINT2 2 -#define PCINT1 1 -#define PCINT0 0 - -/* Reserved [0x6C..0x6D] */ - -#define TIMSK0 _SFR_MEM8(0x6E) -#define OCIE0B 2 -#define OCIE0A 1 -#define TOIE0 0 - -#define TIMSK1 _SFR_MEM8(0x6F) -#define ICIE1 5 -#define OCIE1C 3 -#define OCIE1B 2 -#define OCIE1A 1 -#define TOIE1 0 - -#define TIMSK2 _SFR_MEM8(0x70) -#define OCIE2B 2 -#define OCIE2A 1 -#define TOIE2 0 - -#define TIMSK3 _SFR_MEM8(0x71) -#define ICIE3 5 -#define OCIE3C 3 -#define OCIE3B 2 -#define OCIE3A 1 -#define TOIE3 0 - -/* Reserved [0x72..0x73] */ - -#define XMCRA _SFR_MEM8(0x74) -#define SRE 7 -#define SRL2 6 -#define SRL1 5 -#define SRL0 4 -#define SRW11 3 -#define SRW10 2 -#define SRW01 1 -#define SRW00 0 - -#define XMCRB _SFR_MEM8(0x75) -#define XMBK 7 -#define XMM2 2 -#define XMM1 1 -#define XMM0 0 - -/* Reserved [0x76..0x77] */ - -/* RegDef: ADC Data Register */ -#ifndef __ASSEMBLER__ -#define ADC _SFR_MEM16(0x78) -#endif -#define ADCW _SFR_MEM16(0x78) -#define ADCL _SFR_MEM8(0x78) -#define ADCH _SFR_MEM8(0x79) - -#define ADCSRA _SFR_MEM8(0x7A) -#define ADEN 7 -#define ADSC 6 -#define ADATE 5 -#define ADIF 4 -#define ADIE 3 -#define ADPS2 2 -#define ADPS1 1 -#define ADPS0 0 - -#define ADCSRB _SFR_MEM8(0x7B) -#define ACME 6 -#define ADTS2 2 -#define ADTS1 1 -#define ADTS0 0 - -#define ADMUX _SFR_MEM8(0x7C) -#define REFS1 7 -#define REFS0 6 -#define ADLAR 5 -#define MUX4 4 -#define MUX3 3 -#define MUX2 2 -#define MUX1 1 -#define MUX0 0 - -/* Reserved [0x7D] */ - -#define DIDR0 _SFR_MEM8(0x7E) -#define ADC7D 7 -#define ADC6D 6 -#define ADC5D 5 -#define ADC4D 4 -#define ADC3D 3 -#define ADC2D 2 -#define ADC1D 1 -#define ADC0D 0 - -#define DIDR1 _SFR_MEM8(0x7F) -#define AIN1D 1 -#define AIN0D 0 - -#define TCCR1A _SFR_MEM8(0x80) -#define COM1A1 7 -#define COM1A0 6 -#define COM1B1 5 -#define COM1B0 4 -#define COM1C1 3 -#define COM1C0 2 -#define WGM11 1 -#define WGM10 0 - -#define TCCR1B _SFR_MEM8(0x81) -#define ICNC1 7 -#define ICES1 6 -#define WGM13 4 -#define WGM12 3 -#define CS12 2 -#define CS11 1 -#define CS10 0 - -#define TCCR1C _SFR_MEM8(0x82) -#define FOC1A 7 -#define FOC1B 6 -#define FOC1C 5 - -/* Reserved [0x83] */ - -/* Combine TCNT1L and TCNT1H */ -#define TCNT1 _SFR_MEM16(0x84) - -#define TCNT1L _SFR_MEM8(0x84) -#define TCNT1H _SFR_MEM8(0x85) - -/* Combine ICR1L and ICR1H */ -#define ICR1 _SFR_MEM16(0x86) - -#define ICR1L _SFR_MEM8(0x86) -#define ICR1H _SFR_MEM8(0x87) - -/* Combine OCR1AL and OCR1AH */ -#define OCR1A _SFR_MEM16(0x88) - -#define OCR1AL _SFR_MEM8(0x88) -#define OCR1AH _SFR_MEM8(0x89) - -/* Combine OCR1BL and OCR1BH */ -#define OCR1B _SFR_MEM16(0x8A) - -#define OCR1BL _SFR_MEM8(0x8A) -#define OCR1BH _SFR_MEM8(0x8B) - -/* Combine OCR1CL and OCR1CH */ -#define OCR1C _SFR_MEM16(0x8C) - -#define OCR1CL _SFR_MEM8(0x8C) -#define OCR1CH _SFR_MEM8(0x8D) - -/* Reserved [0x8E..0x8F] */ - -#define TCCR3A _SFR_MEM8(0x90) -#define COM3A1 7 -#define COM3A0 6 -#define COM3B1 5 -#define COM3B0 4 -#define COM3C1 3 -#define COM3C0 2 -#define WGM31 1 -#define WGM30 0 - -#define TCCR3B _SFR_MEM8(0x91) -#define ICNC3 7 -#define ICES3 6 -#define WGM33 4 -#define WGM32 3 -#define CS32 2 -#define CS31 1 -#define CS30 0 - -#define TCCR3C _SFR_MEM8(0x92) -#define FOC3A 7 -#define FOC3B 6 -#define FOC3C 5 - -/* Reserved [0x93] */ - -/* Combine TCNT3L and TCNT3H */ -#define TCNT3 _SFR_MEM16(0x94) - -#define TCNT3L _SFR_MEM8(0x94) -#define TCNT3H _SFR_MEM8(0x95) - -/* Combine ICR3L and ICR3H */ -#define ICR3 _SFR_MEM16(0x96) - -#define ICR3L _SFR_MEM8(0x96) -#define ICR3H _SFR_MEM8(0x97) - -/* Combine OCR3AL and OCR3AH */ -#define OCR3A _SFR_MEM16(0x98) - -#define OCR3AL _SFR_MEM8(0x98) -#define OCR3AH _SFR_MEM8(0x99) - -/* Combine OCR3BL and OCR3BH */ -#define OCR3B _SFR_MEM16(0x9A) - -#define OCR3BL _SFR_MEM8(0x9A) -#define OCR3BH _SFR_MEM8(0x9B) - -/* Combine OCR3CL and OCR3CH */ -#define OCR3C _SFR_MEM16(0x9C) - -#define OCR3CL _SFR_MEM8(0x9C) -#define OCR3CH _SFR_MEM8(0x9D) - -#if defined(__AT90USBxx7__) - -#define UHCON _SFR_MEM8(0x9E) -#define RESUME 2 -#define RESET 1 -#define SOFEN 0 - -#define UHINT _SFR_MEM8(0x9F) -#define HWUPI 6 -#define HSOFI 5 -#define RXRSMI 4 -#define RSMEDI 3 -#define RSTI 2 -#define DDISCI 1 -#define DCONNI 0 - -#define UHIEN _SFR_MEM8(0xA0) -#define HWUPE 6 -#define HSOFE 5 -#define RXRSME 4 -#define RSMEDE 3 -#define RSTE 2 -#define DDISCE 1 -#define DCONNE 0 - -#define UHADDR _SFR_MEM8(0xA1) - -/* Combine UHFNUML and UHFNUMH */ -#define UHFNUM _SFR_MEM16(0xA2) - -#define UHFNUML _SFR_MEM8(0xA2) -#define UHFNUMH _SFR_MEM8(0xA3) - -#define UHFLEN _SFR_MEM8(0xA4) - -#define UPINRQX _SFR_MEM8(0xA5) - -#define UPINTX _SFR_MEM8(0xA6) -#define FIFOCON 7 -#define NAKEDI 6 -#define RWAL 5 -#define PERRI 4 -#define TXSTPI 3 -#define TXOUTI 2 -#define RXSTALLI 1 -#define RXINI 0 - -#define UPNUM _SFR_MEM8(0xA7) - -#define UPRST _SFR_MEM8(0xA8) -#define PRST6 6 -#define PRST5 5 -#define PRST4 4 -#define PRST3 3 -#define PRST2 2 -#define PRST1 1 -#define PRST0 0 - -#define UPCONX _SFR_MEM8(0xA9) -#define PFREEZE 6 -#define INMODE 5 -/* #define AUTOSW 4 */ /* Reserved */ -#define RSTDT 3 -#define PEN 0 - -#define UPCFG0X _SFR_MEM8(0XAA) -#define PTYPE1 7 -#define PTYPE0 6 -#define PTOKEN1 5 -#define PTOKEN0 4 -#define PEPNUM3 3 -#define PEPNUM2 2 -#define PEPNUM1 1 -#define PEPNUM0 0 - -#define UPCFG1X _SFR_MEM8(0XAB) -#define PSIZE2 6 -#define PSIZE1 5 -#define PSIZE0 4 -#define PBK1 3 -#define PBK0 2 -#define ALLOC 1 - -#define UPSTAX _SFR_MEM8(0XAC) -#define CFGOK 7 -#define OVERFI 6 -#define UNDERFI 5 -#define DTSEQ1 3 -#define DTSEQ0 2 -#define NBUSYBK1 1 -#define NBUSYBK0 0 - -#define UPCFG2X _SFR_MEM8(0XAD) - -#define UPIENX _SFR_MEM8(0XAE) -#define FLERRE 7 -#define NAKEDE 6 -#define PERRE 4 -#define TXSTPE 3 -#define TXOUTE 2 -#define RXSTALLE 1 -#define RXINE 0 - -#define UPDATX _SFR_MEM8(0XAF) - -#endif /* __AT90USBxx7__ */ - -#define TCCR2A _SFR_MEM8(0xB0) -#define COM2A1 7 -#define COM2A0 6 -#define COM2B1 5 -#define COM2B0 4 -#define WGM21 1 -#define WGM20 0 - -#define TCCR2B _SFR_MEM8(0xB1) -#define FOC2A 7 -#define FOC2B 6 -#define WGM22 3 -#define CS22 2 -#define CS21 1 -#define CS20 0 - -#define TCNT2 _SFR_MEM8(0xB2) - -#define OCR2A _SFR_MEM8(0xB3) - -#define OCR2B _SFR_MEM8(0xB4) - -/* Reserved [0xB5] */ - -#define ASSR _SFR_MEM8(0xB6) -#define EXCLK 6 -#define AS2 5 -#define TCN2UB 4 -#define OCR2AUB 3 -#define OCR2BUB 2 -#define TCR2AUB 1 -#define TCR2BUB 0 - -/* Reserved [0xB7] */ - -#define TWBR _SFR_MEM8(0xB8) - -#define TWSR _SFR_MEM8(0xB9) -#define TWS7 7 -#define TWS6 6 -#define TWS5 5 -#define TWS4 4 -#define TWS3 3 -#define TWPS1 1 -#define TWPS0 0 - -#define TWAR _SFR_MEM8(0xBA) -#define TWA6 7 -#define TWA5 6 -#define TWA4 5 -#define TWA3 4 -#define TWA2 3 -#define TWA1 2 -#define TWA0 1 -#define TWGCE 0 - -#define TWDR _SFR_MEM8(0xBB) - -#define TWCR _SFR_MEM8(0xBC) -#define TWINT 7 -#define TWEA 6 -#define TWSTA 5 -#define TWSTO 4 -#define TWWC 3 -#define TWEN 2 -#define TWIE 0 - -#define TWAMR _SFR_MEM8(0xBD) -#define TWAM6 7 -#define TWAM5 6 -#define TWAM4 5 -#define TWAM3 4 -#define TWAM2 3 -#define TWAM1 2 -#define TWAM0 1 - -/* Reserved [0xBE..0xC7] */ - -#define UCSR1A _SFR_MEM8(0xC8) -#define RXC1 7 -#define TXC1 6 -#define UDRE1 5 -#define FE1 4 -#define DOR1 3 -#define UPE1 2 -#define U2X1 1 -#define MPCM1 0 - -#define UCSR1B _SFR_MEM8(0XC9) -#define RXCIE1 7 -#define TXCIE1 6 -#define UDRIE1 5 -#define RXEN1 4 -#define TXEN1 3 -#define UCSZ12 2 -#define RXB81 1 -#define TXB81 0 - -#define UCSR1C _SFR_MEM8(0xCA) -#define UMSEL11 7 -#define UMSEL10 6 -#define UPM11 5 -#define UPM10 4 -#define USBS1 3 -#define UCSZ11 2 -#define UCSZ10 1 -#define UCPOL1 0 - -/* Reserved [0xCB] */ - -/* Combine UBRR1L and UBRR1H */ -#define UBRR1 _SFR_MEM16(0xCC) - -#define UBRR1L _SFR_MEM8(0xCC) -#define UBRR1H _SFR_MEM8(0xCD) - -#define UDR1 _SFR_MEM8(0XCE) - -/* Reserved [0xCF..0xD6] */ - -#define UHWCON _SFR_MEM8(0XD7) -#define UIMOD 7 -#define UIDE 6 -#define UVCONE 4 -#define UVREGE 0 - -#define USBCON _SFR_MEM8(0XD8) -#define USBE 7 -#define HOST 6 -#define FRZCLK 5 -#define OTGPADE 4 -#define IDTE 1 -#define VBUSTE 0 - -#define USBSTA _SFR_MEM8(0XD9) -#define SPEED 3 -#define ID 1 -#define VBUS 0 - -#define USBINT _SFR_MEM8(0XDA) -#define IDTI 1 -#define VBUSTI 0 - -/* Combine UDPADDL and UDPADDH */ -#define UDPADD _SFR_MEM16(0xDB) - -#define UDPADDL _SFR_MEM8(0xDB) -#define UDPADDH _SFR_MEM8(0xDC) -#define DPACC 7 - -#if defined(__AT90USBxx7__) - -#define OTGCON _SFR_MEM8(0XDD) -#define HNPREQ 5 -#define SRPREQ 4 -#define SRPSEL 3 -#define VBUSHWC 2 -#define VBUSREQ 1 -#define VBUSRQC 0 - -#define OTGIEN _SFR_MEM8(0XDE) -#define STOE 5 -#define HNPERRE 4 -#define ROLEEXE 3 -#define BCERRE 2 -#define VBERRE 1 -#define SRPE 0 - -#define OTGINT _SFR_MEM8(0XDF) -#define STOI 5 -#define HNPERRI 4 -#define ROLEEXI 3 -#define BCERRI 2 -#define VBERRI 1 -#define SRPI 0 - -#endif /* __AT90USBxx7__ */ - -#define UDCON _SFR_MEM8(0XE0) -#define LSM 2 -#define RMWKUP 1 -#define DETACH 0 - -#define UDINT _SFR_MEM8(0XE1) -#define UPRSMI 6 -#define EORSMI 5 -#define WAKEUPI 4 -#define EORSTI 3 -#define SOFI 2 -/* #define MSOFI 1 */ /* Reserved */ -#define SUSPI 0 - -#define UDIEN _SFR_MEM8(0XE2) -#define UPRSME 6 -#define EORSME 5 -#define WAKEUPE 4 -#define EORSTE 3 -#define SOFE 2 -/* #define MSOFE 1 */ /* Reserved */ -#define SUSPE 0 - -#define UDADDR _SFR_MEM8(0XE3) -#define ADDEN 7 - -/* Combine UDFNUML and UDFNUMH */ -#define UDFNUM _SFR_MEM16(0xE4) - -#define UDFNUML _SFR_MEM8(0xE4) -#define UDFNUMH _SFR_MEM8(0xE5) - -#define UDMFN _SFR_MEM8(0XE6) -#define FNCERR 4 - -#define UDTST _SFR_MEM8(0XE7) -#define OPMODE2 5 -#define TSTPCKT 4 -#define TSTK 3 -#define TSTJ 2 - -#define UEINTX _SFR_MEM8(0XE8) -#define FIFOCON 7 -#define NAKINI 6 -#define RWAL 5 -#define NAKOUTI 4 -#define RXSTPI 3 -#define RXOUTI 2 -#define STALLEDI 1 -#define TXINI 0 - -#define UENUM _SFR_MEM8(0XE9) - -#define UERST _SFR_MEM8(0XEA) -#define EPRST6 6 -#define EPRST5 5 -#define EPRST4 4 -#define EPRST3 3 -#define EPRST2 2 -#define EPRST1 1 -#define EPRST0 0 - -#define UECONX _SFR_MEM8(0XEB) -#define STALLRQ 5 -#define STALLRQC 4 -#define RSTDT 3 -#define EPEN 0 - -#define UECFG0X _SFR_MEM8(0XEC) -#define EPTYPE1 7 -#define EPTYPE0 6 -/* #define ISOSW 3 */ /* Reserved */ -/* #define AUTOSW 2 */ /* Reserved */ -/* #define NYETSDIS 1 */ /* Reserved */ -#define EPDIR 0 - -#define UECFG1X _SFR_MEM8(0XED) -#define EPSIZE2 6 -#define EPSIZE1 5 -#define EPSIZE0 4 -#define EPBK1 3 -#define EPBK0 2 -#define ALLOC 1 - -#define UESTA0X _SFR_MEM8(0XEE) -#define CFGOK 7 -#define OVERFI 6 -#define UNDERFI 5 -#define ZLPSEEN 4 -#define DTSEQ1 3 -#define DTSEQ0 2 -#define NBUSYBK1 1 -#define NBUSYBK0 0 - -#define UESTA1X _SFR_MEM8(0XEF) -#define CTRLDIR 2 -#define CURRBK1 1 -#define CURRBK0 0 - -#define UEIENX _SFR_MEM8(0XF0) -#define FLERRE 7 -#define NAKINE 6 -#define NAKOUTE 4 -#define RXSTPE 3 -#define RXOUTE 2 -#define STALLEDE 1 -#define TXINE 0 - -#define UEDATX _SFR_MEM8(0XF1) - -/* Combine UEBCLX and UEBCHX */ -#define UEBCX _SFR_MEM16(0xF2) - -#define UEBCLX _SFR_MEM8(0xF2) -#define UEBCHX _SFR_MEM8(0xF3) - -#define UEINT _SFR_MEM8(0XF4) -#define EPINT6 6 -#define EPINT5 5 -#define EPINT4 4 -#define EPINT3 3 -#define EPINT2 2 -#define EPINT1 1 -#define EPINT0 0 - -#if defined(__AT90USBxx7__) - -#define UPERRX _SFR_MEM8(0XF5) -#define COUNTER1 6 -#define COUNTER0 5 -#define CRC16 4 -#define TIMEOUT 3 -#define PID 2 -#define DATAPID 1 -#define DATATGL 0 - -/* Combine UPBCLX and UPBCHX */ -#define UPBCX _SFR_MEM16(0xF6) - -#define UPBCLX _SFR_MEM8(0xF6) -#define UPBCHX _SFR_MEM8(0xF7) - -#define UPINT _SFR_MEM8(0XF8) -#define PINT6 6 -#define PINT5 5 -#define PINT4 4 -#define PINT3 3 -#define PINT2 2 -#define PINT1 1 -#define PINT0 0 - -#define OTGTCON _SFR_MEM8(0XF9) -#define PAGE1 6 -#define PAGE0 5 -#define VALUE1 1 -#define VALUE0 0 - -#endif /* __AT90USBxx7__ */ - -/* Reserved [0xFA..0xFF] */ - -/* Interrupt vectors */ - -/* External Interrupt Request 0 */ -#define INT0_vect _VECTOR(1) - -/* External Interrupt Request 1 */ -#define INT1_vect _VECTOR(2) - -/* External Interrupt Request 2 */ -#define INT2_vect _VECTOR(3) - -/* External Interrupt Request 3 */ -#define INT3_vect _VECTOR(4) - -/* External Interrupt Request 4 */ -#define INT4_vect _VECTOR(5) - -/* External Interrupt Request 5 */ -#define INT5_vect _VECTOR(6) - -/* External Interrupt Request 6 */ -#define INT6_vect _VECTOR(7) - -/* External Interrupt Request 7 */ -#define INT7_vect _VECTOR(8) - -/* Pin Change Interrupt Request 0 */ -#define PCINT0_vect _VECTOR(9) - -/* USB General Interrupt Request */ -#define USB_GEN_vect _VECTOR(10) - -/* USB Endpoint/Pipe Interrupt Communication Request */ -#define USB_COM_vect _VECTOR(11) - -/* Watchdog Time-out Interrupt */ -#define WDT_vect _VECTOR(12) - -/* Timer/Counter2 Compare Match A */ -#define TIMER2_COMPA_vect _VECTOR(13) - -/* Timer/Counter2 Compare Match B */ -#define TIMER2_COMPB_vect _VECTOR(14) - -/* Timer/Counter2 Overflow */ -#define TIMER2_OVF_vect _VECTOR(15) - -/* Timer/Counter1 Capture Event */ -#define TIMER1_CAPT_vect _VECTOR(16) - -/* Timer/Counter1 Compare Match A */ -#define TIMER1_COMPA_vect _VECTOR(17) - -/* Timer/Counter1 Compare Match B */ -#define TIMER1_COMPB_vect _VECTOR(18) - -/* Timer/Counter1 Compare Match C */ -#define TIMER1_COMPC_vect _VECTOR(19) - -/* Timer/Counter1 Overflow */ -#define TIMER1_OVF_vect _VECTOR(20) - -/* Timer/Counter0 Compare Match A */ -#define TIMER0_COMPA_vect _VECTOR(21) - -/* Timer/Counter0 Compare Match B */ -#define TIMER0_COMPB_vect _VECTOR(22) - -/* Timer/Counter0 Overflow */ -#define TIMER0_OVF_vect _VECTOR(23) - -/* SPI Serial Transfer Complete */ -#define SPI_STC_vect _VECTOR(24) - -/* USART1, Rx Complete */ -#define USART1_RX_vect _VECTOR(25) - -/* USART1 Data register Empty */ -#define USART1_UDRE_vect _VECTOR(26) - -/* USART1, Tx Complete */ -#define USART1_TX_vect _VECTOR(27) - -/* Analog Comparator */ -#define ANALOG_COMP_vect _VECTOR(28) - -/* ADC Conversion Complete */ -#define ADC_vect _VECTOR(29) - -/* EEPROM Ready */ -#define EE_READY_vect _VECTOR(30) - -/* Timer/Counter3 Capture Event */ -#define TIMER3_CAPT_vect _VECTOR(31) - -/* Timer/Counter3 Compare Match A */ -#define TIMER3_COMPA_vect _VECTOR(32) - -/* Timer/Counter3 Compare Match B */ -#define TIMER3_COMPB_vect _VECTOR(33) - -/* Timer/Counter3 Compare Match C */ -#define TIMER3_COMPC_vect _VECTOR(34) - -/* Timer/Counter3 Overflow */ -#define TIMER3_OVF_vect _VECTOR(35) - -/* 2-wire Serial Interface */ -#define TWI_vect _VECTOR(36) - -/* Store Program Memory Read */ -#define SPM_READY_vect _VECTOR(37) - -#define _VECTORS_SIZE 152 - -#if defined(__AT90USBxx6__) -# undef __AT90USBxx6__ -#endif /* __AT90USBxx6__ */ - -#if defined(__AT90USBxx7__) -# undef __AT90USBxx7__ -#endif /* __AT90USBxx7__ */ - -#endif /* _AVR_IOUSBXX6_7_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iox128a1.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iox128a1.h deleted file mode 100644 index c05dce60b..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iox128a1.h +++ /dev/null @@ -1,7099 +0,0 @@ -/* Copyright (c) 2008 Atmel Corporation - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iox128a1.h,v 1.1.2.11 2008/11/03 04:13:14 arcanum Exp $ */ - -/* avr/iox128a1.h - definitions for ATxmega128A1 */ - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iox128a1.h" -#else -# error "Attempt to include more than one file." -#endif - - -#ifndef _AVR_ATxmega128A1_H_ -#define _AVR_ATxmega128A1_H_ 1 - - -/* Ungrouped common registers */ -#define GPIO0 _SFR_MEM8(0x0000) /* General Purpose IO Register 0 */ -#define GPIO1 _SFR_MEM8(0x0001) /* General Purpose IO Register 1 */ -#define GPIO2 _SFR_MEM8(0x0002) /* General Purpose IO Register 2 */ -#define GPIO3 _SFR_MEM8(0x0003) /* General Purpose IO Register 3 */ -#define GPIO4 _SFR_MEM8(0x0004) /* General Purpose IO Register 4 */ -#define GPIO5 _SFR_MEM8(0x0005) /* General Purpose IO Register 5 */ -#define GPIO6 _SFR_MEM8(0x0006) /* General Purpose IO Register 6 */ -#define GPIO7 _SFR_MEM8(0x0007) /* General Purpose IO Register 7 */ -#define GPIO8 _SFR_MEM8(0x0008) /* General Purpose IO Register 8 */ -#define GPIO9 _SFR_MEM8(0x0009) /* General Purpose IO Register 9 */ -#define GPIOA _SFR_MEM8(0x000A) /* General Purpose IO Register 10 */ -#define GPIOB _SFR_MEM8(0x000B) /* General Purpose IO Register 11 */ -#define GPIOC _SFR_MEM8(0x000C) /* General Purpose IO Register 12 */ -#define GPIOD _SFR_MEM8(0x000D) /* General Purpose IO Register 13 */ -#define GPIOE _SFR_MEM8(0x000E) /* General Purpose IO Register 14 */ -#define GPIOF _SFR_MEM8(0x000F) /* General Purpose IO Register 15 */ - -#define CCP _SFR_MEM8(0x0034) /* Configuration Change Protection */ -#define RAMPD _SFR_MEM8(0x0038) /* Ramp D */ -#define RAMPX _SFR_MEM8(0x0039) /* Ramp X */ -#define RAMPY _SFR_MEM8(0x003A) /* Ramp Y */ -#define RAMPZ _SFR_MEM8(0x003B) /* Ramp Z */ -#define EIND _SFR_MEM8(0x003C) /* Extended Indirect Jump */ -#define SPL _SFR_MEM8(0x003D) /* Stack Pointer Low */ -#define SPH _SFR_MEM8(0x003E) /* Stack Pointer High */ -#define SREG _SFR_MEM8(0x003F) /* Status Register */ - - -/* C Language Only */ -#if !defined (__ASSEMBLER__) - -#include - -typedef volatile uint8_t register8_t; -typedef volatile uint16_t register16_t; -typedef volatile uint32_t register32_t; - - -#ifdef _WORDREGISTER -#undef _WORDREGISTER -#endif -#define _WORDREGISTER(regname) \ - union \ - { \ - register16_t regname; \ - struct \ - { \ - register8_t regname ## L; \ - register8_t regname ## H; \ - }; \ - } - -#ifdef _DWORDREGISTER -#undef _DWORDREGISTER -#endif -#define _DWORDREGISTER(regname) \ - union \ - { \ - register32_t regname; \ - struct \ - { \ - register8_t regname ## 0; \ - register8_t regname ## 1; \ - register8_t regname ## 2; \ - register8_t regname ## 3; \ - }; \ - } - - -/* -========================================================================== -IO Module Structures -========================================================================== -*/ - - -/* --------------------------------------------------------------------------- -XOCD - On-Chip Debug System --------------------------------------------------------------------------- -*/ - -/* On-Chip Debug System */ -typedef struct OCD_struct -{ - register8_t OCDR0; /* OCD Register 0 */ - register8_t OCDR1; /* OCD Register 1 */ -} OCD_t; - - -/* CCP signatures */ -typedef enum CCP_enum -{ - CCP_SPM_gc = (0x9D<<0), /* SPM Instruction Protection */ - CCP_IOREG_gc = (0xD8<<0), /* IO Register Protection */ -} CCP_t; - - -/* --------------------------------------------------------------------------- -CLK - Clock System --------------------------------------------------------------------------- -*/ - -/* Clock System */ -typedef struct CLK_struct -{ - register8_t CTRL; /* Control Register */ - register8_t PSCTRL; /* Prescaler Control Register */ - register8_t LOCK; /* Lock register */ - register8_t RTCCTRL; /* RTC Control Register */ -} CLK_t; - -/* --------------------------------------------------------------------------- -CLK - Clock System --------------------------------------------------------------------------- -*/ - -/* Power Reduction */ -typedef struct PR_struct -{ - register8_t PR; /* General Power Reduction */ - register8_t PRPA; /* Power Reduction Port A */ - register8_t PRPB; /* Power Reduction Port B */ - register8_t PRPC; /* Power Reduction Port C */ - register8_t PRPD; /* Power Reduction Port D */ - register8_t PRPE; /* Power Reduction Port E */ - register8_t PRPF; /* Power Reduction Port F */ -} PR_t; - -/* System Clock Selection */ -typedef enum CLK_SCLKSEL_enum -{ - CLK_SCLKSEL_RC2M_gc = (0x00<<0), /* Internal 2MHz RC Oscillator */ - CLK_SCLKSEL_RC32M_gc = (0x01<<0), /* Internal 32MHz RC Oscillator */ - CLK_SCLKSEL_RC32K_gc = (0x02<<0), /* Internal 32kHz RC Oscillator */ - CLK_SCLKSEL_XOSC_gc = (0x03<<0), /* External Crystal Oscillator or Clock */ - CLK_SCLKSEL_PLL_gc = (0x04<<0), /* Phase Locked Loop */ -} CLK_SCLKSEL_t; - -/* Prescaler A Division Factor */ -typedef enum CLK_PSADIV_enum -{ - CLK_PSADIV_1_gc = (0x00<<2), /* Divide by 1 */ - CLK_PSADIV_2_gc = (0x01<<2), /* Divide by 2 */ - CLK_PSADIV_4_gc = (0x03<<2), /* Divide by 4 */ - CLK_PSADIV_8_gc = (0x05<<2), /* Divide by 8 */ - CLK_PSADIV_16_gc = (0x07<<2), /* Divide by 16 */ - CLK_PSADIV_32_gc = (0x09<<2), /* Divide by 32 */ - CLK_PSADIV_64_gc = (0x0B<<2), /* Divide by 64 */ - CLK_PSADIV_128_gc = (0x0D<<2), /* Divide by 128 */ - CLK_PSADIV_256_gc = (0x0F<<2), /* Divide by 256 */ - CLK_PSADIV_512_gc = (0x11<<2), /* Divide by 512 */ -} CLK_PSADIV_t; - -/* Prescaler B and C Division Factor */ -typedef enum CLK_PSBCDIV_enum -{ - CLK_PSBCDIV_1_1_gc = (0x00<<0), /* Divide B by 1 and C by 1 */ - CLK_PSBCDIV_1_2_gc = (0x01<<0), /* Divide B by 1 and C by 2 */ - CLK_PSBCDIV_4_1_gc = (0x02<<0), /* Divide B by 4 and C by 1 */ - CLK_PSBCDIV_2_2_gc = (0x03<<0), /* Divide B by 2 and C by 2 */ -} CLK_PSBCDIV_t; - -/* RTC Clock Source */ -typedef enum CLK_RTCSRC_enum -{ - CLK_RTCSRC_ULP_gc = (0x00<<1), /* 1kHz from internal 32kHz ULP */ - CLK_RTCSRC_TOSC_gc = (0x01<<1), /* 1kHz from 32kHz crystal oscillator on TOSC */ - CLK_RTCSRC_RCOSC_gc = (0x02<<1), /* 1kHz from internal 32kHz RC oscillator */ - CLK_RTCSRC_TOSC32_gc = (0x05<<1), /* 32kHz from 32kHz crystal oscillator on TOSC */ -} CLK_RTCSRC_t; - - -/* --------------------------------------------------------------------------- -SLEEP - Sleep Controller --------------------------------------------------------------------------- -*/ - -/* Sleep Controller */ -typedef struct SLEEP_struct -{ - register8_t CTRL; /* Control Register */ -} SLEEP_t; - -/* Sleep Mode */ -typedef enum SLEEP_SMODE_enum -{ - SLEEP_SMODE_IDLE_gc = (0x00<<1), /* Idle mode */ - SLEEP_SMODE_PDOWN_gc = (0x02<<1), /* Power-down Mode */ - SLEEP_SMODE_PSAVE_gc = (0x03<<1), /* Power-save Mode */ - SLEEP_SMODE_STDBY_gc = (0x06<<1), /* Standby Mode */ - SLEEP_SMODE_ESTDBY_gc = (0x07<<1), /* Extended Standby Mode */ -} SLEEP_SMODE_t; - - -/* --------------------------------------------------------------------------- -OSC - Oscillator --------------------------------------------------------------------------- -*/ - -/* Oscillator */ -typedef struct OSC_struct -{ - register8_t CTRL; /* Control Register */ - register8_t STATUS; /* Status Register */ - register8_t XOSCCTRL; /* External Oscillator Control Register */ - register8_t XOSCFAIL; /* External Oscillator Failure Detection Register */ - register8_t RC32KCAL; /* 32kHz Internal Oscillator Calibration Register */ - register8_t PLLCTRL; /* PLL Control REgister */ - register8_t DFLLCTRL; /* DFLL Control Register */ -} OSC_t; - -/* Oscillator Frequency Range */ -typedef enum OSC_FRQRANGE_enum -{ - OSC_FRQRANGE_04TO2_gc = (0x00<<6), /* 0.4 - 2 MHz */ - OSC_FRQRANGE_2TO9_gc = (0x01<<6), /* 2 - 9 MHz */ - OSC_FRQRANGE_9TO12_gc = (0x02<<6), /* 9 - 12 MHz */ - OSC_FRQRANGE_12TO16_gc = (0x03<<6), /* 12 - 16 MHz */ -} OSC_FRQRANGE_t; - -/* External Oscillator Selection and Startup Time */ -typedef enum OSC_XOSCSEL_enum -{ - OSC_XOSCSEL_EXTCLK_gc = (0x00<<0), /* External Clock - 6 CLK */ - OSC_XOSCSEL_32KHz_gc = (0x02<<0), /* 32kHz TOSC - 32K CLK */ - OSC_XOSCSEL_XTAL_256CLK_gc = (0x03<<0), /* 0.4-16MHz XTAL - 256 CLK */ - OSC_XOSCSEL_XTAL_1KCLK_gc = (0x07<<0), /* 0.4-16MHz XTAL - 1K CLK */ - OSC_XOSCSEL_XTAL_16KCLK_gc = (0x0B<<0), /* 0.4-16MHz XTAL - 16K CLK */ -} OSC_XOSCSEL_t; - -/* PLL Clock Source */ -typedef enum OSC_PLLSRC_enum -{ - OSC_PLLSRC_RC2M_gc = (0x00<<6), /* Internal 2MHz RC Oscillator */ - OSC_PLLSRC_RC32M_gc = (0x02<<6), /* Internal 32MHz RC Oscillator */ - OSC_PLLSRC_XOSC_gc = (0x03<<6), /* External Oscillator */ -} OSC_PLLSRC_t; - - -/* --------------------------------------------------------------------------- -DFLL - DFLL --------------------------------------------------------------------------- -*/ - -/* DFLL */ -typedef struct DFLL_struct -{ - register8_t CTRL; /* Control Register */ - register8_t reserved_0x01; - register8_t CALA; /* Calibration Register A */ - register8_t CALB; /* Calibration Register B */ - register8_t OSCCNT0; /* Oscillator Counter Register 0 */ - register8_t OSCCNT1; /* Oscillator Counter Register 1 */ - register8_t OSCCNT2; /* Oscillator Counter Register 2 */ - register8_t reserved_0x07; -} DFLL_t; - - -/* --------------------------------------------------------------------------- -RST - Reset --------------------------------------------------------------------------- -*/ - -/* Reset */ -typedef struct RST_struct -{ - register8_t STATUS; /* Status Register */ - register8_t CTRL; /* Control Register */ -} RST_t; - - -/* --------------------------------------------------------------------------- -WDT - Watch-Dog Timer --------------------------------------------------------------------------- -*/ - -/* Watch-Dog Timer */ -typedef struct WDT_struct -{ - register8_t CTRL; /* Control */ - register8_t WINCTRL; /* Windowed Mode Control */ - register8_t STATUS; /* Status */ -} WDT_t; - -/* Period setting */ -typedef enum WDT_PER_enum -{ - WDT_PER_8CLK_gc = (0x00<<2), /* 8 cycles (8ms @ 3.3V) */ - WDT_PER_16CLK_gc = (0x01<<2), /* 16 cycles (16ms @ 3.3V) */ - WDT_PER_32CLK_gc = (0x02<<2), /* 32 cycles (32ms @ 3.3V) */ - WDT_PER_64CLK_gc = (0x03<<2), /* 64 cycles (64ms @ 3.3V) */ - WDT_PER_128CLK_gc = (0x04<<2), /* 128 cycles (0.125s @ 3.3V) */ - WDT_PER_256CLK_gc = (0x05<<2), /* 256 cycles (0.25s @ 3.3V) */ - WDT_PER_512CLK_gc = (0x06<<2), /* 512 cycles (0.5s @ 3.3V) */ - WDT_PER_1KCLK_gc = (0x07<<2), /* 1K cycles (1s @ 3.3V) */ - WDT_PER_2KCLK_gc = (0x08<<2), /* 2K cycles (2s @ 3.3V) */ - WDT_PER_4KCLK_gc = (0x09<<2), /* 4K cycles (4s @ 3.3V) */ - WDT_PER_8KCLK_gc = (0x0A<<2), /* 8K cycles (8s @ 3.3V) */ -} WDT_PER_t; - -/* Closed window period */ -typedef enum WDT_WPER_enum -{ - WDT_WPER_8CLK_gc = (0x00<<2), /* 8 cycles (8ms @ 3.3V) */ - WDT_WPER_16CLK_gc = (0x01<<2), /* 16 cycles (16ms @ 3.3V) */ - WDT_WPER_32CLK_gc = (0x02<<2), /* 32 cycles (32ms @ 3.3V) */ - WDT_WPER_64CLK_gc = (0x03<<2), /* 64 cycles (64ms @ 3.3V) */ - WDT_WPER_128CLK_gc = (0x04<<2), /* 128 cycles (0.125s @ 3.3V) */ - WDT_WPER_256CLK_gc = (0x05<<2), /* 256 cycles (0.25s @ 3.3V) */ - WDT_WPER_512CLK_gc = (0x06<<2), /* 512 cycles (0.5s @ 3.3V) */ - WDT_WPER_1KCLK_gc = (0x07<<2), /* 1K cycles (1s @ 3.3V) */ - WDT_WPER_2KCLK_gc = (0x08<<2), /* 2K cycles (2s @ 3.3V) */ - WDT_WPER_4KCLK_gc = (0x09<<2), /* 4K cycles (4s @ 3.3V) */ - WDT_WPER_8KCLK_gc = (0x0A<<2), /* 8K cycles (8s @ 3.3V) */ -} WDT_WPER_t; - - -/* --------------------------------------------------------------------------- -MCU - MCU Control --------------------------------------------------------------------------- -*/ - -/* MCU Control */ -typedef struct MCU_struct -{ - register8_t DEVID0; /* Device ID byte 0 */ - register8_t DEVID1; /* Device ID byte 1 */ - register8_t DEVID2; /* Device ID byte 2 */ - register8_t REVID; /* Revision ID */ - register8_t JTAGUID; /* JTAG User ID */ - register8_t reserved_0x05; - register8_t MCUCR; /* MCU Control */ - register8_t reserved_0x07; - register8_t EVSYSLOCK; /* Event System Lock */ - register8_t AWEXLOCK; /* AWEX Lock */ - register8_t reserved_0x0A; - register8_t reserved_0x0B; -} MCU_t; - - -/* --------------------------------------------------------------------------- -PMIC - Programmable Multi-level Interrupt Controller --------------------------------------------------------------------------- -*/ - -/* Programmable Multi-level Interrupt Controller */ -typedef struct PMIC_struct -{ - register8_t STATUS; /* Status Register */ - register8_t INTPRI; /* Interrupt Priority */ - register8_t CTRL; /* Control Register */ -} PMIC_t; - - -/* --------------------------------------------------------------------------- -DMA - DMA Controller --------------------------------------------------------------------------- -*/ - -/* DMA Channel */ -typedef struct DMA_CH_struct -{ - register8_t CTRLA; /* Channel Control */ - register8_t CTRLB; /* Channel Control */ - register8_t ADDRCTRL; /* Address Control */ - register8_t TRIGSRC; /* Channel Trigger Source */ - _WORDREGISTER(TRFCNT); /* Channel Block Transfer Count */ - register8_t REPCNT; /* Channel Repeat Count */ - register8_t reserved_0x07; - register8_t SRCADDR0; /* Channel Source Address 0 */ - register8_t SRCADDR1; /* Channel Source Address 1 */ - register8_t SRCADDR2; /* Channel Source Address 2 */ - register8_t reserved_0x0B; - register8_t DESTADDR0; /* Channel Destination Address 0 */ - register8_t DESTADDR1; /* Channel Destination Address 1 */ - register8_t DESTADDR2; /* Channel Destination Address 2 */ - register8_t reserved_0x0F; -} DMA_CH_t; - -/* --------------------------------------------------------------------------- -DMA - DMA Controller --------------------------------------------------------------------------- -*/ - -/* DMA Controller */ -typedef struct DMA_struct -{ - register8_t CTRL; /* Control */ - register8_t reserved_0x01; - register8_t reserved_0x02; - register8_t INTFLAGS; /* Transfer Interrupt Status */ - register8_t STATUS; /* Status */ - register8_t reserved_0x05; - _WORDREGISTER(TEMP); /* Temporary Register For 16/24-bit Access */ - register8_t reserved_0x08; - register8_t reserved_0x09; - register8_t reserved_0x0A; - register8_t reserved_0x0B; - register8_t reserved_0x0C; - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t reserved_0x0F; - DMA_CH_t CH0; /* DMA Channel 0 */ - DMA_CH_t CH1; /* DMA Channel 1 */ - DMA_CH_t CH2; /* DMA Channel 2 */ - DMA_CH_t CH3; /* DMA Channel 3 */ -} DMA_t; - -/* Burst mode */ -typedef enum DMA_CH_BURSTLEN_enum -{ - DMA_CH_BURSTLEN_1BYTE_gc = (0x00<<0), /* 1-byte burst mode */ - DMA_CH_BURSTLEN_2BYTE_gc = (0x01<<0), /* 2-byte burst mode */ - DMA_CH_BURSTLEN_4BYTE_gc = (0x02<<0), /* 4-byte burst mode */ - DMA_CH_BURSTLEN_8BYTE_gc = (0x03<<0), /* 8-byte burst mode */ -} DMA_CH_BURSTLEN_t; - -/* Source address reload mode */ -typedef enum DMA_CH_SRCRELOAD_enum -{ - DMA_CH_SRCRELOAD_NONE_gc = (0x00<<6), /* No reload */ - DMA_CH_SRCRELOAD_BLOCK_gc = (0x01<<6), /* Reload at end of block */ - DMA_CH_SRCRELOAD_BURST_gc = (0x02<<6), /* Reload at end of burst */ - DMA_CH_SRCRELOAD_TRANSACTION_gc = (0x03<<6), /* Reload at end of transaction */ -} DMA_CH_SRCRELOAD_t; - -/* Source addressing mode */ -typedef enum DMA_CH_SRCDIR_enum -{ - DMA_CH_SRCDIR_FIXED_gc = (0x00<<4), /* Fixed */ - DMA_CH_SRCDIR_INC_gc = (0x01<<4), /* Increment */ - DMA_CH_SRCDIR_DEC_gc = (0x02<<4), /* Decrement */ -} DMA_CH_SRCDIR_t; - -/* Destination adress reload mode */ -typedef enum DMA_CH_DESTRELOAD_enum -{ - DMA_CH_DESTRELOAD_NONE_gc = (0x00<<2), /* No reload */ - DMA_CH_DESTRELOAD_BLOCK_gc = (0x01<<2), /* Reload at end of block */ - DMA_CH_DESTRELOAD_BURST_gc = (0x02<<2), /* Reload at end of burst */ - DMA_CH_DESTRELOAD_TRANSACTION_gc = (0x03<<2), /* Reload at end of transaction */ -} DMA_CH_DESTRELOAD_t; - -/* Destination adressing mode */ -typedef enum DMA_CH_DESTDIR_enum -{ - DMA_CH_DESTDIR_FIXED_gc = (0x00<<0), /* Fixed */ - DMA_CH_DESTDIR_INC_gc = (0x01<<0), /* Increment */ - DMA_CH_DESTDIR_DEC_gc = (0x02<<0), /* Decrement */ -} DMA_CH_DESTDIR_t; - -/* Transfer trigger source */ -typedef enum DMA_CH_TRIGSRC_enum -{ - DMA_CH_TRIGSRC_OFF_gc = (0x00<<0), /* Off software triggers only */ - DMA_CH_TRIGSRC_EVSYS_CH0_gc = (0x01<<0), /* Event System Channel 0 */ - DMA_CH_TRIGSRC_EVSYS_CH1_gc = (0x02<<0), /* Event System Channel 1 */ - DMA_CH_TRIGSRC_EVSYS_CH2_gc = (0x03<<0), /* Event System Channel 2 */ - DMA_CH_TRIGSRC_ADCA_CH0_gc = (0x10<<0), /* ADCA Channel 0 */ - DMA_CH_TRIGSRC_ADCA_CH1_gc = (0x11<<0), /* ADCA Channel 1 */ - DMA_CH_TRIGSRC_ADCA_CH2_gc = (0x12<<0), /* ADCA Channel 2 */ - DMA_CH_TRIGSRC_ADCA_CH3_gc = (0x13<<0), /* ADCA Channel 3 */ - DMA_CH_TRIGSRC_ADCA_CH4_gc = (0x14<<0), /* ADCA Channel 0,1,2,3 combined */ - DMA_CH_TRIGSRC_DACA_CH0_gc = (0x15<<0), /* DACA Channel 0 */ - DMA_CH_TRIGSRC_DACA_CH1_gc = (0x16<<0), /* DACA Channel 1 */ - DMA_CH_TRIGSRC_ADCB_CH0_gc = (0x20<<0), /* ADCB Channel 0 */ - DMA_CH_TRIGSRC_ADCB_CH1_gc = (0x21<<0), /* ADCB Channel 1 */ - DMA_CH_TRIGSRC_ADCB_CH2_gc = (0x22<<0), /* ADCB Channel 2 */ - DMA_CH_TRIGSRC_ADCB_CH3_gc = (0x23<<0), /* ADCB Channel 3 */ - DMA_CH_TRIGSRC_ADCB_CH4_gc = (0x24<<0), /* ADCB Channel 0,1,2,3 combined */ - DMA_CH_TRIGSRC_DACB_CH0_gc = (0x25<<0), /* DACB Channel 0 */ - DMA_CH_TRIGSRC_DACB_CH1_gc = (0x26<<0), /* DACB Channel 1 */ - DMA_CH_TRIGSRC_TCC0_OVF_gc = (0x40<<0), /* Timer/Counter C0 Overflow */ - DMA_CH_TRIGSRC_TCC0_ERR_gc = (0x41<<0), /* Timer/Counter C0 Error */ - DMA_CH_TRIGSRC_TCC0_CCA_gc = (0x42<<0), /* Timer/Counter C0 Compare or Capture A */ - DMA_CH_TRIGSRC_TCC0_CCB_gc = (0x43<<0), /* Timer/Counter C0 Compare or Capture B */ - DMA_CH_TRIGSRC_TCC0_CCC_gc = (0x44<<0), /* Timer/Counter C0 Compare or Capture C */ - DMA_CH_TRIGSRC_TCC0_CCD_gc = (0x45<<0), /* Timer/Counter C0 Compare or Capture D */ - DMA_CH_TRIGSRC_TCC1_OVF_gc = (0x46<<0), /* Timer/Counter C1 Overflow */ - DMA_CH_TRIGSRC_TCC1_ERR_gc = (0x47<<0), /* Timer/Counter C1 Error */ - DMA_CH_TRIGSRC_TCC1_CCA_gc = (0x48<<0), /* Timer/Counter C1 Compare or Capture A */ - DMA_CH_TRIGSRC_TCC1_CCB_gc = (0x49<<0), /* Timer/Counter C1 Compare or Capture B */ - DMA_CH_TRIGSRC_SPIC_gc = (0x4A<<0), /* SPI C Transfer Complete */ - DMA_CH_TRIGSRC_USARTC0_RXC_gc = (0x4B<<0), /* USART C0 Receive Complete */ - DMA_CH_TRIGSRC_USARTC0_DRE_gc = (0x4C<<0), /* USART C0 Data Register Empty */ - DMA_CH_TRIGSRC_USARTC1_RXC_gc = (0x4E<<0), /* USART C1 Receive Complete */ - DMA_CH_TRIGSRC_USARTC1_DRE_gc = (0x4F<<0), /* USART C1 Data Register Empty */ - DMA_CH_TRIGSRC_TCD0_OVF_gc = (0x60<<0), /* Timer/Counter D0 Overflow */ - DMA_CH_TRIGSRC_TCD0_ERR_gc = (0x61<<0), /* Timer/Counter D0 Error */ - DMA_CH_TRIGSRC_TCD0_CCA_gc = (0x62<<0), /* Timer/Counter D0 Compare or Capture A */ - DMA_CH_TRIGSRC_TCD0_CCB_gc = (0x63<<0), /* Timer/Counter D0 Compare or Capture B */ - DMA_CH_TRIGSRC_TCD0_CCC_gc = (0x64<<0), /* Timer/Counter D0 Compare or Capture C */ - DMA_CH_TRIGSRC_TCD0_CCD_gc = (0x65<<0), /* Timer/Counter D0 Compare or Capture D */ - DMA_CH_TRIGSRC_TCD1_OVF_gc = (0x66<<0), /* Timer/Counter D1 Overflow */ - DMA_CH_TRIGSRC_TCD1_ERR_gc = (0x67<<0), /* Timer/Counter D1 Error */ - DMA_CH_TRIGSRC_TCD1_CCA_gc = (0x68<<0), /* Timer/Counter D1 Compare or Capture A */ - DMA_CH_TRIGSRC_TCD1_CCB_gc = (0x69<<0), /* Timer/Counter D1 Compare or Capture B */ - DMA_CH_TRIGSRC_SPID_gc = (0x6A<<0), /* SPI D Transfer Complete */ - DMA_CH_TRIGSRC_USARTD0_RXC_gc = (0x6B<<0), /* USART D0 Receive Complete */ - DMA_CH_TRIGSRC_USARTD0_DRE_gc = (0x6C<<0), /* USART D0 Data Register Empty */ - DMA_CH_TRIGSRC_USARTD1_RXC_gc = (0x6E<<0), /* USART D1 Receive Complete */ - DMA_CH_TRIGSRC_USARTD1_DRE_gc = (0x6F<<0), /* USART D1 Data Register Empty */ - DMA_CH_TRIGSRC_TCE0_OVF_gc = (0x80<<0), /* Timer/Counter E0 Overflow */ - DMA_CH_TRIGSRC_TCE0_ERR_gc = (0x81<<0), /* Timer/Counter E0 Error */ - DMA_CH_TRIGSRC_TCE0_CCA_gc = (0x82<<0), /* Timer/Counter E0 Compare or Capture A */ - DMA_CH_TRIGSRC_TCE0_CCB_gc = (0x83<<0), /* Timer/Counter E0 Compare or Capture B */ - DMA_CH_TRIGSRC_TCE0_CCC_gc = (0x84<<0), /* Timer/Counter E0 Compare or Capture C */ - DMA_CH_TRIGSRC_TCE0_CCD_gc = (0x85<<0), /* Timer/Counter E0 Compare or Capture D */ - DMA_CH_TRIGSRC_TCE1_OVF_gc = (0x86<<0), /* Timer/Counter E1 Overflow */ - DMA_CH_TRIGSRC_TCE1_ERR_gc = (0x87<<0), /* Timer/Counter E1 Error */ - DMA_CH_TRIGSRC_TCE1_CCA_gc = (0x88<<0), /* Timer/Counter E1 Compare or Capture A */ - DMA_CH_TRIGSRC_TCE1_CCB_gc = (0x89<<0), /* Timer/Counter E1 Compare or Capture B */ - DMA_CH_TRIGSRC_SPIE_gc = (0x8A<<0), /* SPI E Transfer Complete */ - DMA_CH_TRIGSRC_USARTE0_RXC_gc = (0x8B<<0), /* USART E0 Receive Complete */ - DMA_CH_TRIGSRC_USARTE0_DRE_gc = (0x8C<<0), /* USART E0 Data Register Empty */ - DMA_CH_TRIGSRC_USARTE1_RXC_gc = (0x8E<<0), /* USART E1 Receive Complete */ - DMA_CH_TRIGSRC_USARTE1_DRE_gc = (0x8F<<0), /* USART E1 Data Register Empty */ - DMA_CH_TRIGSRC_TCF0_OVF_gc = (0xA0<<0), /* Timer/Counter F0 Overflow */ - DMA_CH_TRIGSRC_TCF0_ERR_gc = (0xA1<<0), /* Timer/Counter F0 Error */ - DMA_CH_TRIGSRC_TCF0_CCA_gc = (0xA2<<0), /* Timer/Counter F0 Compare or Capture A */ - DMA_CH_TRIGSRC_TCF0_CCB_gc = (0xA3<<0), /* Timer/Counter F0 Compare or Capture B */ - DMA_CH_TRIGSRC_TCF0_CCC_gc = (0xA4<<0), /* Timer/Counter F0 Compare or Capture C */ - DMA_CH_TRIGSRC_TCF0_CCD_gc = (0xA5<<0), /* Timer/Counter F0 Compare or Capture D */ - DMA_CH_TRIGSRC_TCF1_OVF_gc = (0xA6<<0), /* Timer/Counter F1 Overflow */ - DMA_CH_TRIGSRC_TCF1_ERR_gc = (0xA7<<0), /* Timer/Counter F1 Error */ - DMA_CH_TRIGSRC_TCF1_CCA_gc = (0xA8<<0), /* Timer/Counter F1 Compare or Capture A */ - DMA_CH_TRIGSRC_TCF1_CCB_gc = (0xA9<<0), /* Timer/Counter F1 Compare or Capture B */ - DMA_CH_TRIGSRC_SPIF_gc = (0xAA<<0), /* SPI F Transfer Complete */ - DMA_CH_TRIGSRC_USARTF0_RXC_gc = (0xAB<<0), /* USART F0 Receive Complete */ - DMA_CH_TRIGSRC_USARTF0_DRE_gc = (0xAC<<0), /* USART F0 Data Register Empty */ - DMA_CH_TRIGSRC_USARTF1_RXC_gc = (0xAE<<0), /* USART F1 Receive Complete */ - DMA_CH_TRIGSRC_USARTF1_DRE_gc = (0xAF<<0), /* USART F1 Data Register Empty */ -} DMA_CH_TRIGSRC_t; - -/* Double buffering mode */ -typedef enum DMA_DBUFMODE_enum -{ - DMA_DBUFMODE_DISABLED_gc = (0x00<<2), /* Double buffering disabled */ - DMA_DBUFMODE_CH01_gc = (0x01<<2), /* Double buffering enabled on channel 0/1 */ - DMA_DBUFMODE_CH23_gc = (0x02<<2), /* Double buffering enabled on channel 2/3 */ - DMA_DBUFMODE_CH01CH23_gc = (0x03<<2), /* Double buffering enabled on ch. 0/1 and ch. 2/3 */ -} DMA_DBUFMODE_t; - -/* Priority mode */ -typedef enum DMA_PRIMODE_enum -{ - DMA_PRIMODE_RR0123_gc = (0x00<<0), /* Round Robin */ - DMA_PRIMODE_CH0RR123_gc = (0x01<<0), /* Channel 0 > Round Robin on channel 1/2/3 */ - DMA_PRIMODE_CH01RR23_gc = (0x02<<0), /* Channel 0 > channel 1 > Round Robin on channel 2/3 */ - DMA_PRIMODE_CH0123_gc = (0x03<<0), /* Channel 0 > channel 1 > channel 2 > channel 3 */ -} DMA_PRIMODE_t; - -/* Interrupt level */ -typedef enum DMA_CH_ERRINTLVL_enum -{ - DMA_CH_ERRINTLVL_OFF_gc = (0x00<<2), /* Interrupt disabled */ - DMA_CH_ERRINTLVL_LO_gc = (0x01<<2), /* Low level */ - DMA_CH_ERRINTLVL_MED_gc = (0x02<<2), /* Medium level */ - DMA_CH_ERRINTLVL_HI_gc = (0x03<<2), /* High level */ -} DMA_CH_ERRINTLVL_t; - -/* Interrupt level */ -typedef enum DMA_CH_TRNINTLVL_enum -{ - DMA_CH_TRNINTLVL_OFF_gc = (0x00<<0), /* Interrupt disabled */ - DMA_CH_TRNINTLVL_LO_gc = (0x01<<0), /* Low level */ - DMA_CH_TRNINTLVL_MED_gc = (0x02<<0), /* Medium level */ - DMA_CH_TRNINTLVL_HI_gc = (0x03<<0), /* High level */ -} DMA_CH_TRNINTLVL_t; - - -/* --------------------------------------------------------------------------- -EVSYS - Event System --------------------------------------------------------------------------- -*/ - -/* Event System */ -typedef struct EVSYS_struct -{ - register8_t CH0MUX; /* Event Channel 0 Multiplexer */ - register8_t CH1MUX; /* Event Channel 1 Multiplexer */ - register8_t CH2MUX; /* Event Channel 2 Multiplexer */ - register8_t CH3MUX; /* Event Channel 3 Multiplexer */ - register8_t CH4MUX; /* Event Channel 4 Multiplexer */ - register8_t CH5MUX; /* Event Channel 5 Multiplexer */ - register8_t CH6MUX; /* Event Channel 6 Multiplexer */ - register8_t CH7MUX; /* Event Channel 7 Multiplexer */ - register8_t CH0CTRL; /* Channel 0 Control Register */ - register8_t CH1CTRL; /* Channel 1 Control Register */ - register8_t CH2CTRL; /* Channel 2 Control Register */ - register8_t CH3CTRL; /* Channel 3 Control Register */ - register8_t CH4CTRL; /* Channel 4 Control Register */ - register8_t CH5CTRL; /* Channel 5 Control Register */ - register8_t CH6CTRL; /* Channel 6 Control Register */ - register8_t CH7CTRL; /* Channel 7 Control Register */ - register8_t STROBE; /* Event Strobe */ - register8_t DATA; /* Event Data */ -} EVSYS_t; - -/* Quadrature Decoder Index Recognition Mode */ -typedef enum EVSYS_QDIRM_enum -{ - EVSYS_QDIRM_00_gc = (0x00<<5), /* QDPH0 = 0, QDPH90 = 0 */ - EVSYS_QDIRM_01_gc = (0x01<<5), /* QDPH0 = 0, QDPH90 = 1 */ - EVSYS_QDIRM_10_gc = (0x02<<5), /* QDPH0 = 1, QDPH90 = 0 */ - EVSYS_QDIRM_11_gc = (0x03<<5), /* QDPH0 = 1, QDPH90 = 1 */ -} EVSYS_QDIRM_t; - -/* Digital filter coefficient */ -typedef enum EVSYS_DIGFILT_enum -{ - EVSYS_DIGFILT_1SAMPLE_gc = (0x00<<0), /* 1 SAMPLE */ - EVSYS_DIGFILT_2SAMPLES_gc = (0x01<<0), /* 2 SAMPLES */ - EVSYS_DIGFILT_3SAMPLES_gc = (0x02<<0), /* 3 SAMPLES */ - EVSYS_DIGFILT_4SAMPLES_gc = (0x03<<0), /* 4 SAMPLES */ - EVSYS_DIGFILT_5SAMPLES_gc = (0x04<<0), /* 5 SAMPLES */ - EVSYS_DIGFILT_6SAMPLES_gc = (0x05<<0), /* 6 SAMPLES */ - EVSYS_DIGFILT_7SAMPLES_gc = (0x06<<0), /* 7 SAMPLES */ - EVSYS_DIGFILT_8SAMPLES_gc = (0x07<<0), /* 8 SAMPLES */ -} EVSYS_DIGFILT_t; - -/* Event Channel multiplexer input selection */ -typedef enum EVSYS_CHMUX_enum -{ - EVSYS_CHMUX_OFF_gc = (0x00<<0), /* Off */ - EVSYS_CHMUX_RTC_OVF_gc = (0x08<<0), /* RTC Overflow */ - EVSYS_CHMUX_RTC_CMP_gc = (0x09<<0), /* RTC Compare Match */ - EVSYS_CHMUX_ACA_CH0_gc = (0x10<<0), /* Analog Comparator A Channel 0 */ - EVSYS_CHMUX_ACA_CH1_gc = (0x11<<0), /* Analog Comparator A Channel 1 */ - EVSYS_CHMUX_ACA_WIN_gc = (0x12<<0), /* Analog Comparator A Window */ - EVSYS_CHMUX_ACB_CH0_gc = (0x13<<0), /* Analog Comparator B Channel 0 */ - EVSYS_CHMUX_ACB_CH1_gc = (0x14<<0), /* Analog Comparator B Channel 1 */ - EVSYS_CHMUX_ACB_WIN_gc = (0x15<<0), /* Analog Comparator B Window */ - EVSYS_CHMUX_ADCA_CH0_gc = (0x20<<0), /* ADC A Channel 0 */ - EVSYS_CHMUX_ADCA_CH1_gc = (0x21<<0), /* ADC A Channel 1 */ - EVSYS_CHMUX_ADCA_CH2_gc = (0x22<<0), /* ADC A Channel 2 */ - EVSYS_CHMUX_ADCA_CH3_gc = (0x23<<0), /* ADC A Channel 3 */ - EVSYS_CHMUX_ADCB_CH0_gc = (0x24<<0), /* ADC B Channel 0 */ - EVSYS_CHMUX_ADCB_CH1_gc = (0x25<<0), /* ADC B Channel 1 */ - EVSYS_CHMUX_ADCB_CH2_gc = (0x26<<0), /* ADC B Channel 2 */ - EVSYS_CHMUX_ADCB_CH3_gc = (0x27<<0), /* ADC B Channel 3 */ - EVSYS_CHMUX_PORTA_PIN0_gc = (0x50<<0), /* Port A, Pin0 */ - EVSYS_CHMUX_PORTA_PIN1_gc = (0x51<<0), /* Port A, Pin1 */ - EVSYS_CHMUX_PORTA_PIN2_gc = (0x52<<0), /* Port A, Pin2 */ - EVSYS_CHMUX_PORTA_PIN3_gc = (0x53<<0), /* Port A, Pin3 */ - EVSYS_CHMUX_PORTA_PIN4_gc = (0x54<<0), /* Port A, Pin4 */ - EVSYS_CHMUX_PORTA_PIN5_gc = (0x55<<0), /* Port A, Pin5 */ - EVSYS_CHMUX_PORTA_PIN6_gc = (0x56<<0), /* Port A, Pin6 */ - EVSYS_CHMUX_PORTA_PIN7_gc = (0x57<<0), /* Port A, Pin7 */ - EVSYS_CHMUX_PORTB_PIN0_gc = (0x58<<0), /* Port B, Pin0 */ - EVSYS_CHMUX_PORTB_PIN1_gc = (0x59<<0), /* Port B, Pin1 */ - EVSYS_CHMUX_PORTB_PIN2_gc = (0x5A<<0), /* Port B, Pin2 */ - EVSYS_CHMUX_PORTB_PIN3_gc = (0x5B<<0), /* Port B, Pin3 */ - EVSYS_CHMUX_PORTB_PIN4_gc = (0x5C<<0), /* Port B, Pin4 */ - EVSYS_CHMUX_PORTB_PIN5_gc = (0x5D<<0), /* Port B, Pin5 */ - EVSYS_CHMUX_PORTB_PIN6_gc = (0x5E<<0), /* Port B, Pin6 */ - EVSYS_CHMUX_PORTB_PIN7_gc = (0x5F<<0), /* Port B, Pin7 */ - EVSYS_CHMUX_PORTC_PIN0_gc = (0x60<<0), /* Port C, Pin0 */ - EVSYS_CHMUX_PORTC_PIN1_gc = (0x61<<0), /* Port C, Pin1 */ - EVSYS_CHMUX_PORTC_PIN2_gc = (0x62<<0), /* Port C, Pin2 */ - EVSYS_CHMUX_PORTC_PIN3_gc = (0x63<<0), /* Port C, Pin3 */ - EVSYS_CHMUX_PORTC_PIN4_gc = (0x64<<0), /* Port C, Pin4 */ - EVSYS_CHMUX_PORTC_PIN5_gc = (0x65<<0), /* Port C, Pin5 */ - EVSYS_CHMUX_PORTC_PIN6_gc = (0x66<<0), /* Port C, Pin6 */ - EVSYS_CHMUX_PORTC_PIN7_gc = (0x67<<0), /* Port C, Pin7 */ - EVSYS_CHMUX_PORTD_PIN0_gc = (0x68<<0), /* Port D, Pin0 */ - EVSYS_CHMUX_PORTD_PIN1_gc = (0x69<<0), /* Port D, Pin1 */ - EVSYS_CHMUX_PORTD_PIN2_gc = (0x6A<<0), /* Port D, Pin2 */ - EVSYS_CHMUX_PORTD_PIN3_gc = (0x6B<<0), /* Port D, Pin3 */ - EVSYS_CHMUX_PORTD_PIN4_gc = (0x6C<<0), /* Port D, Pin4 */ - EVSYS_CHMUX_PORTD_PIN5_gc = (0x6D<<0), /* Port D, Pin5 */ - EVSYS_CHMUX_PORTD_PIN6_gc = (0x6E<<0), /* Port D, Pin6 */ - EVSYS_CHMUX_PORTD_PIN7_gc = (0x6F<<0), /* Port D, Pin7 */ - EVSYS_CHMUX_PORTE_PIN0_gc = (0x70<<0), /* Port E, Pin0 */ - EVSYS_CHMUX_PORTE_PIN1_gc = (0x71<<0), /* Port E, Pin1 */ - EVSYS_CHMUX_PORTE_PIN2_gc = (0x72<<0), /* Port E, Pin2 */ - EVSYS_CHMUX_PORTE_PIN3_gc = (0x73<<0), /* Port E, Pin3 */ - EVSYS_CHMUX_PORTE_PIN4_gc = (0x74<<0), /* Port E, Pin4 */ - EVSYS_CHMUX_PORTE_PIN5_gc = (0x75<<0), /* Port E, Pin5 */ - EVSYS_CHMUX_PORTE_PIN6_gc = (0x76<<0), /* Port E, Pin6 */ - EVSYS_CHMUX_PORTE_PIN7_gc = (0x77<<0), /* Port E, Pin7 */ - EVSYS_CHMUX_PORTF_PIN0_gc = (0x78<<0), /* Port F, Pin0 */ - EVSYS_CHMUX_PORTF_PIN1_gc = (0x79<<0), /* Port F, Pin1 */ - EVSYS_CHMUX_PORTF_PIN2_gc = (0x7A<<0), /* Port F, Pin2 */ - EVSYS_CHMUX_PORTF_PIN3_gc = (0x7B<<0), /* Port F, Pin3 */ - EVSYS_CHMUX_PORTF_PIN4_gc = (0x7C<<0), /* Port F, Pin4 */ - EVSYS_CHMUX_PORTF_PIN5_gc = (0x7D<<0), /* Port F, Pin5 */ - EVSYS_CHMUX_PORTF_PIN6_gc = (0x7E<<0), /* Port F, Pin6 */ - EVSYS_CHMUX_PORTF_PIN7_gc = (0x7F<<0), /* Port F, Pin7 */ - EVSYS_CHMUX_PRESCALER_1_gc = (0x80<<0), /* Prescaler, divide by 1 */ - EVSYS_CHMUX_PRESCALER_2_gc = (0x81<<0), /* Prescaler, divide by 2 */ - EVSYS_CHMUX_PRESCALER_4_gc = (0x82<<0), /* Prescaler, divide by 4 */ - EVSYS_CHMUX_PRESCALER_8_gc = (0x83<<0), /* Prescaler, divide by 8 */ - EVSYS_CHMUX_PRESCALER_16_gc = (0x84<<0), /* Prescaler, divide by 16 */ - EVSYS_CHMUX_PRESCALER_32_gc = (0x85<<0), /* Prescaler, divide by 32 */ - EVSYS_CHMUX_PRESCALER_64_gc = (0x86<<0), /* Prescaler, divide by 64 */ - EVSYS_CHMUX_PRESCALER_128_gc = (0x87<<0), /* Prescaler, divide by 128 */ - EVSYS_CHMUX_PRESCALER_256_gc = (0x88<<0), /* Prescaler, divide by 256 */ - EVSYS_CHMUX_PRESCALER_512_gc = (0x89<<0), /* Prescaler, divide by 512 */ - EVSYS_CHMUX_PRESCALER_1024_gc = (0x8A<<0), /* Prescaler, divide by 1024 */ - EVSYS_CHMUX_PRESCALER_2048_gc = (0x8B<<0), /* Prescaler, divide by 2048 */ - EVSYS_CHMUX_PRESCALER_4096_gc = (0x8C<<0), /* Prescaler, divide by 4096 */ - EVSYS_CHMUX_PRESCALER_8192_gc = (0x8D<<0), /* Prescaler, divide by 8192 */ - EVSYS_CHMUX_PRESCALER_16384_gc = (0x8E<<0), /* Prescaler, divide by 16384 */ - EVSYS_CHMUX_PRESCALER_32768_gc = (0x8F<<0), /* Prescaler, divide by 32768 */ - EVSYS_CHMUX_TCC0_OVF_gc = (0xC0<<0), /* Timer/Counter C0 Overflow */ - EVSYS_CHMUX_TCC0_ERR_gc = (0xC1<<0), /* Timer/Counter C0 Error */ - EVSYS_CHMUX_TCC0_CCA_gc = (0xC4<<0), /* Timer/Counter C0 Compare or Capture A */ - EVSYS_CHMUX_TCC0_CCB_gc = (0xC5<<0), /* Timer/Counter C0 Compare or Capture B */ - EVSYS_CHMUX_TCC0_CCC_gc = (0xC6<<0), /* Timer/Counter C0 Compare or Capture C */ - EVSYS_CHMUX_TCC0_CCD_gc = (0xC7<<0), /* Timer/Counter C0 Compare or Capture D */ - EVSYS_CHMUX_TCC1_OVF_gc = (0xC8<<0), /* Timer/Counter C1 Overflow */ - EVSYS_CHMUX_TCC1_ERR_gc = (0xC9<<0), /* Timer/Counter C1 Error */ - EVSYS_CHMUX_TCC1_CCA_gc = (0xCC<<0), /* Timer/Counter C1 Compare or Capture A */ - EVSYS_CHMUX_TCC1_CCB_gc = (0xCD<<0), /* Timer/Counter C1 Compare or Capture B */ - EVSYS_CHMUX_TCD0_OVF_gc = (0xD0<<0), /* Timer/Counter D0 Overflow */ - EVSYS_CHMUX_TCD0_ERR_gc = (0xD1<<0), /* Timer/Counter D0 Error */ - EVSYS_CHMUX_TCD0_CCA_gc = (0xD4<<0), /* Timer/Counter D0 Compare or Capture A */ - EVSYS_CHMUX_TCD0_CCB_gc = (0xD5<<0), /* Timer/Counter D0 Compare or Capture B */ - EVSYS_CHMUX_TCD0_CCC_gc = (0xD6<<0), /* Timer/Counter D0 Compare or Capture C */ - EVSYS_CHMUX_TCD0_CCD_gc = (0xD7<<0), /* Timer/Counter D0 Compare or Capture D */ - EVSYS_CHMUX_TCD1_OVF_gc = (0xD8<<0), /* Timer/Counter D1 Overflow */ - EVSYS_CHMUX_TCD1_ERR_gc = (0xD9<<0), /* Timer/Counter D1 Error */ - EVSYS_CHMUX_TCD1_CCA_gc = (0xDC<<0), /* Timer/Counter D1 Compare or Capture A */ - EVSYS_CHMUX_TCD1_CCB_gc = (0xDD<<0), /* Timer/Counter D1 Compare or Capture B */ - EVSYS_CHMUX_TCE0_OVF_gc = (0xE0<<0), /* Timer/Counter E0 Overflow */ - EVSYS_CHMUX_TCE0_ERR_gc = (0xE1<<0), /* Timer/Counter E0 Error */ - EVSYS_CHMUX_TCE0_CCA_gc = (0xE4<<0), /* Timer/Counter E0 Compare or Capture A */ - EVSYS_CHMUX_TCE0_CCB_gc = (0xE5<<0), /* Timer/Counter E0 Compare or Capture B */ - EVSYS_CHMUX_TCE0_CCC_gc = (0xE6<<0), /* Timer/Counter E0 Compare or Capture C */ - EVSYS_CHMUX_TCE0_CCD_gc = (0xE7<<0), /* Timer/Counter E0 Compare or Capture D */ - EVSYS_CHMUX_TCE1_OVF_gc = (0xE8<<0), /* Timer/Counter E1 Overflow */ - EVSYS_CHMUX_TCE1_ERR_gc = (0xE9<<0), /* Timer/Counter E1 Error */ - EVSYS_CHMUX_TCE1_CCA_gc = (0xEC<<0), /* Timer/Counter E1 Compare or Capture A */ - EVSYS_CHMUX_TCE1_CCB_gc = (0xED<<0), /* Timer/Counter E1 Compare or Capture B */ - EVSYS_CHMUX_TCF0_OVF_gc = (0xF0<<0), /* Timer/Counter F0 Overflow */ - EVSYS_CHMUX_TCF0_ERR_gc = (0xF1<<0), /* Timer/Counter F0 Error */ - EVSYS_CHMUX_TCF0_CCA_gc = (0xF4<<0), /* Timer/Counter F0 Compare or Capture A */ - EVSYS_CHMUX_TCF0_CCB_gc = (0xF5<<0), /* Timer/Counter F0 Compare or Capture B */ - EVSYS_CHMUX_TCF0_CCC_gc = (0xF6<<0), /* Timer/Counter F0 Compare or Capture C */ - EVSYS_CHMUX_TCF0_CCD_gc = (0xF7<<0), /* Timer/Counter F0 Compare or Capture D */ - EVSYS_CHMUX_TCF1_OVF_gc = (0xF8<<0), /* Timer/Counter F1 Overflow */ - EVSYS_CHMUX_TCF1_ERR_gc = (0xF9<<0), /* Timer/Counter F1 Error */ - EVSYS_CHMUX_TCF1_CCA_gc = (0xFC<<0), /* Timer/Counter F1 Compare or Capture A */ - EVSYS_CHMUX_TCF1_CCB_gc = (0xFD<<0), /* Timer/Counter F1 Compare or Capture B */ -} EVSYS_CHMUX_t; - - -/* --------------------------------------------------------------------------- -NVM - Non Volatile Memory Controller --------------------------------------------------------------------------- -*/ - -/* Non-volatile Memory Controller */ -typedef struct NVM_struct -{ - register8_t ADDR0; /* Address Register 0 */ - register8_t ADDR1; /* Address Register 1 */ - register8_t ADDR2; /* Address Register 2 */ - register8_t reserved_0x03; - register8_t DATA0; /* Data Register 0 */ - register8_t DATA1; /* Data Register 1 */ - register8_t DATA2; /* Data Register 2 */ - register8_t reserved_0x07; - register8_t reserved_0x08; - register8_t reserved_0x09; - register8_t CMD; /* Command */ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t INTCTRL; /* Interrupt Control */ - register8_t reserved_0x0E; - register8_t STATUS; /* Status */ - register8_t LOCKBITS; /* Lock Bits */ -} NVM_t; - -/* --------------------------------------------------------------------------- -NVM - Non Volatile Memory Controller --------------------------------------------------------------------------- -*/ - -/* Lock Bits */ -typedef struct NVM_LOCKBITS_struct -{ - register8_t LOCKBITS; /* Lock Bits */ -} NVM_LOCKBITS_t; - -/* --------------------------------------------------------------------------- -NVM - Non Volatile Memory Controller --------------------------------------------------------------------------- -*/ - -/* Fuses */ -typedef struct NVM_FUSES_struct -{ - register8_t FUSEBYTE0; /* JTAG User ID */ - register8_t FUSEBYTE1; /* Watchdog Configuration */ - register8_t FUSEBYTE2; /* Reset Configuration */ - register8_t reserved_0x03; - register8_t FUSEBYTE4; /* Start-up Configuration */ - register8_t FUSEBYTE5; /* EESAVE and BOD Level */ -} NVM_FUSES_t; - -/* --------------------------------------------------------------------------- -NVM - Non Volatile Memory Controller --------------------------------------------------------------------------- -*/ - -/* Production Signatures */ -typedef struct NVM_PROD_SIGNATURES_struct -{ - register8_t RCOSC2M; /* RCOSC 2MHz Calibration Value */ - register8_t reserved_0x01; - register8_t RCOSC32K; /* RCOSC 32kHz Calibration Value */ - register8_t RCOSC32M; /* RCOSC 32MHz Calibration Value */ - register8_t reserved_0x04; - register8_t reserved_0x05; - register8_t reserved_0x06; - register8_t reserved_0x07; - register8_t LOTNUM0; /* Lot Number Byte 0, ASCII */ - register8_t LOTNUM1; /* Lot Number Byte 1, ASCII */ - register8_t LOTNUM2; /* Lot Number Byte 2, ASCII */ - register8_t LOTNUM3; /* Lot Number Byte 3, ASCII */ - register8_t LOTNUM4; /* Lot Number Byte 4, ASCII */ - register8_t LOTNUM5; /* Lot Number Byte 5, ASCII */ - register8_t reserved_0x0E; - register8_t reserved_0x0F; - register8_t WAFNUM; /* Wafer Number */ - register8_t reserved_0x11; - register8_t COORDX0; /* Wafer Coordinate X Byte 0 */ - register8_t COORDX1; /* Wafer Coordinate X Byte 1 */ - register8_t COORDY0; /* Wafer Coordinate Y Byte 0 */ - register8_t COORDY1; /* Wafer Coordinate Y Byte 1 */ - register8_t reserved_0x16; - register8_t reserved_0x17; - register8_t reserved_0x18; - register8_t reserved_0x19; - register8_t reserved_0x1A; - register8_t reserved_0x1B; - register8_t reserved_0x1C; - register8_t reserved_0x1D; - register8_t reserved_0x1E; - register8_t reserved_0x1F; - register8_t ADCACAL0; /* ADCA Calibration Byte 0 */ - register8_t ADCACAL1; /* ADCA Calibration Byte 1 */ - register8_t reserved_0x22; - register8_t reserved_0x23; - register8_t ADCBCAL0; /* ADCB Calibration Byte 0 */ - register8_t ADCBCAL1; /* ADCB Calibration Byte 1 */ - register8_t reserved_0x26; - register8_t reserved_0x27; - register8_t reserved_0x28; - register8_t reserved_0x29; - register8_t reserved_0x2A; - register8_t reserved_0x2B; - register8_t reserved_0x2C; - register8_t reserved_0x2D; - register8_t TEMPSENSE0; /* Temperature Sensor Calibration Byte 0 */ - register8_t TEMPSENSE1; /* Temperature Sensor Calibration Byte 0 */ - register8_t DACAOFFCAL; /* DACA Calibration Byte 0 */ - register8_t DACACAINCAL; /* DACA Calibration Byte 1 */ - register8_t DACBOFFCAL; /* DACB Calibration Byte 0 */ - register8_t DACBGAINCAL; /* DACB Calibration Byte 1 */ - register8_t reserved_0x34; - register8_t reserved_0x35; - register8_t reserved_0x36; - register8_t reserved_0x37; - register8_t reserved_0x38; - register8_t reserved_0x39; - register8_t reserved_0x3A; - register8_t reserved_0x3B; - register8_t reserved_0x3C; - register8_t reserved_0x3D; - register8_t reserved_0x3E; -} NVM_PROD_SIGNATURES_t; - -/* NVM Command */ -typedef enum NVM_CMD_enum -{ - NVM_CMD_NO_OPERATION_gc = (0x00<<0), /* Noop/Ordinary LPM */ - NVM_CMD_READ_CALIB_ROW_gc = (0x02<<0), /* Read calibration row */ - NVM_CMD_READ_USER_SIG_ROW_gc = (0x01<<0), /* Read user signature row */ - NVM_CMD_READ_EEPROM_gc = (0x06<<0), /* Read EEPROM */ - NVM_CMD_READ_FUSES_gc = (0x07<<0), /* Read fuse byte */ - NVM_CMD_WRITE_LOCK_BITS_gc = (0x08<<0), /* Write lock bits */ - NVM_CMD_ERASE_USER_SIG_ROW_gc = (0x18<<0), /* Erase user signature row */ - NVM_CMD_WRITE_USER_SIG_ROW_gc = (0x1A<<0), /* Write user signature row */ - NVM_CMD_ERASE_APP_gc = (0x20<<0), /* Erase Application Section */ - NVM_CMD_ERASE_APP_PAGE_gc = (0x22<<0), /* Erase Application Section page */ - NVM_CMD_LOAD_FLASH_BUFFER_gc = (0x23<<0), /* Load Flash page buffer */ - NVM_CMD_WRITE_APP_PAGE_gc = (0x24<<0), /* Write Application Section page */ - NVM_CMD_ERASE_WRITE_APP_PAGE_gc = (0x25<<0), /* Erase-and-write Application Section page */ - NVM_CMD_ERASE_FLASH_BUFFER_gc = (0x26<<0), /* Erase/flush Flash page buffer */ - NVM_CMD_ERASE_BOOT_PAGE_gc = (0x2A<<0), /* Erase Boot Section page */ - NVM_CMD_WRITE_BOOT_PAGE_gc = (0x2C<<0), /* Write Boot Section page */ - NVM_CMD_ERASE_WRITE_BOOT_PAGE_gc = (0x2D<<0), /* Erase-and-write Boot Section page */ - NVM_CMD_ERASE_EEPROM_gc = (0x30<<0), /* Erase EEPROM */ - NVM_CMD_ERASE_EEPROM_PAGE_gc = (0x32<<0), /* Erase EEPROM page */ - NVM_CMD_LOAD_EEPROM_BUFFER_gc = (0x33<<0), /* Load EEPROM page buffer */ - NVM_CMD_WRITE_EEPROM_PAGE_gc = (0x34<<0), /* Write EEPROM page */ - NVM_CMD_ERASE_WRITE_EEPROM_PAGE_gc = (0x35<<0), /* Erase-and-write EEPROM page */ - NVM_CMD_ERASE_EEPROM_BUFFER_gc = (0x36<<0), /* Erase/flush EEPROM page buffer */ - NVM_CMD_APP_CRC_gc = (0x38<<0), /* Generate Application section CRC */ - NVM_CMD_BOOT_CRC_gc = (0x39<<0), /* Generate Boot Section CRC */ - NVM_CMD_FLASH_RANGE_CRC_gc = (0x3A<<0), /* Generate Flash Range CRC */ -} NVM_CMD_t; - -/* SPM ready interrupt level */ -typedef enum NVM_SPMLVL_enum -{ - NVM_SPMLVL_OFF_gc = (0x00<<2), /* Interrupt disabled */ - NVM_SPMLVL_LO_gc = (0x01<<2), /* Low level */ - NVM_SPMLVL_MED_gc = (0x02<<2), /* Medium level */ - NVM_SPMLVL_HI_gc = (0x03<<2), /* High level */ -} NVM_SPMLVL_t; - -/* EEPROM ready interrupt level */ -typedef enum NVM_EELVL_enum -{ - NVM_EELVL_OFF_gc = (0x00<<0), /* Interrupt disabled */ - NVM_EELVL_LO_gc = (0x01<<0), /* Low level */ - NVM_EELVL_MED_gc = (0x02<<0), /* Medium level */ - NVM_EELVL_HI_gc = (0x03<<0), /* High level */ -} NVM_EELVL_t; - -/* Boot lock bits - boot setcion */ -typedef enum NVM_BLBB_enum -{ - NVM_BLBB_NOLOCK_gc = (0x03<<6), /* No locks */ - NVM_BLBB_WLOCK_gc = (0x02<<6), /* Write not allowed */ - NVM_BLBB_RLOCK_gc = (0x01<<6), /* Read not allowed */ - NVM_BLBB_RWLOCK_gc = (0x00<<6), /* Read and write not allowed */ -} NVM_BLBB_t; - -/* Boot lock bits - application section */ -typedef enum NVM_BLBA_enum -{ - NVM_BLBA_NOLOCK_gc = (0x03<<4), /* No locks */ - NVM_BLBA_WLOCK_gc = (0x02<<4), /* Write not allowed */ - NVM_BLBA_RLOCK_gc = (0x01<<4), /* Read not allowed */ - NVM_BLBA_RWLOCK_gc = (0x00<<4), /* Read and write not allowed */ -} NVM_BLBA_t; - -/* Boot lock bits - application table section */ -typedef enum NVM_BLBAT_enum -{ - NVM_BLBAT_NOLOCK_gc = (0x03<<2), /* No locks */ - NVM_BLBAT_WLOCK_gc = (0x02<<2), /* Write not allowed */ - NVM_BLBAT_RLOCK_gc = (0x01<<2), /* Read not allowed */ - NVM_BLBAT_RWLOCK_gc = (0x00<<2), /* Read and write not allowed */ -} NVM_BLBAT_t; - -/* Lock bits */ -typedef enum NVM_LB_enum -{ - NVM_LB_NOLOCK_gc = (0x03<<0), /* No locks */ - NVM_LB_WLOCK_gc = (0x02<<0), /* Write not allowed */ - NVM_LB_RWLOCK_gc = (0x00<<0), /* Read and write not allowed */ -} NVM_LB_t; - -/* Boot Loader Section Reset Vector */ -typedef enum BOOTRST_enum -{ - BOOTRST_BOOTLDR_gc = (0x00<<6), /* Boot Loader Reset */ - BOOTRST_APPLICATION_gc = (0x01<<6), /* Application Reset */ -} BOOTRST_t; - -/* BOD operation */ -typedef enum BOD_enum -{ - BOD_INSAMPLEDMODE_gc = (0x01<<2), /* BOD enabled in sampled mode */ - BOD_CONTINOUSLY_gc = (0x02<<2), /* BOD enabled continuously */ - BOD_DISABLED_gc = (0x03<<2), /* BOD Disabled */ -} BOD_t; - -/* Watchdog (Window) Timeout Period */ -typedef enum WD_enum -{ - WD_8CLK_gc = (0x00<<4), /* 8 cycles (8ms @ 3.3V) */ - WD_16CLK_gc = (0x01<<4), /* 16 cycles (16ms @ 3.3V) */ - WD_32CLK_gc = (0x02<<4), /* 32 cycles (32ms @ 3.3V) */ - WD_64CLK_gc = (0x03<<4), /* 64 cycles (64ms @ 3.3V) */ - WD_128CLK_gc = (0x04<<4), /* 128 cycles (0.125s @ 3.3V) */ - WD_256CLK_gc = (0x05<<4), /* 256 cycles (0.25s @ 3.3V) */ - WD_512CLK_gc = (0x06<<4), /* 512 cycles (0.5s @ 3.3V) */ - WD_1KCLK_gc = (0x07<<4), /* 1K cycles (1s @ 3.3V) */ - WD_2KCLK_gc = (0x08<<4), /* 2K cycles (2s @ 3.3V) */ - WD_4KCLK_gc = (0x09<<4), /* 4K cycles (4s @ 3.3V) */ - WD_8KCLK_gc = (0x0A<<4), /* 8K cycles (8s @ 3.3V) */ -} WD_t; - -/* Start-up Time */ -typedef enum SUT_enum -{ - SUT_0MS_gc = (0x03<<2), /* 0 ms */ - SUT_4MS_gc = (0x01<<2), /* 4 ms */ - SUT_64MS_gc = (0x00<<2), /* 64 ms */ -} SUT_t; - -/* Brown Out Detection Voltage Level */ -typedef enum BODLVL_enum -{ - BODLVL_1V6_gc = (0x07<<0), /* 1.6 V */ - BODLVL_1V8_gc = (0x06<<0), /* 1.8 V */ - BODLVL_2V0_gc = (0x05<<0), /* 2.0 V */ - BODLVL_2V2_gc = (0x04<<0), /* 2.2 V */ - BODLVL_2V4_gc = (0x03<<0), /* 2.4 V */ - BODLVL_2V7_gc = (0x02<<0), /* 2.7 V */ - BODLVL_2V9_gc = (0x01<<0), /* 2.9 V */ - BODLVL_3V2_gc = (0x00<<0), /* 3.2 V */ -} BODLVL_t; - - -/* --------------------------------------------------------------------------- -AC - Analog Comparator --------------------------------------------------------------------------- -*/ - -/* Analog Comparator */ -typedef struct AC_struct -{ - register8_t AC0CTRL; /* Comparator 0 Control */ - register8_t AC1CTRL; /* Comparator 1 Control */ - register8_t AC0MUXCTRL; /* Comparator 0 MUX Control */ - register8_t AC1MUXCTRL; /* Comparator 1 MUX Control */ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t WINCTRL; /* Window Mode Control */ - register8_t STATUS; /* Status */ -} AC_t; - -/* Interrupt mode */ -typedef enum AC_INTMODE_enum -{ - AC_INTMODE_BOTHEDGES_gc = (0x00<<6), /* Interrupt on both edges */ - AC_INTMODE_FALLING_gc = (0x02<<6), /* Interrupt on falling edge */ - AC_INTMODE_RISING_gc = (0x03<<6), /* Interrupt on rising edge */ -} AC_INTMODE_t; - -/* Interrupt level */ -typedef enum AC_INTLVL_enum -{ - AC_INTLVL_OFF_gc = (0x00<<4), /* Interrupt disabled */ - AC_INTLVL_LO_gc = (0x01<<4), /* Low level */ - AC_INTLVL_MED_gc = (0x02<<4), /* Medium level */ - AC_INTLVL_HI_gc = (0x03<<4), /* High level */ -} AC_INTLVL_t; - -/* Hysteresis mode selection */ -typedef enum AC_HYSMODE_enum -{ - AC_HYSMODE_NO_gc = (0x00<<1), /* No hysteresis */ - AC_HYSMODE_SMALL_gc = (0x01<<1), /* Small hysteresis */ - AC_HYSMODE_LARGE_gc = (0x02<<1), /* Large hysteresis */ -} AC_HYSMODE_t; - -/* Positive input multiplexer selection */ -typedef enum AC_MUXPOS_enum -{ - AC_MUXPOS_PIN0_gc = (0x00<<3), /* Pin 0 */ - AC_MUXPOS_PIN1_gc = (0x01<<3), /* Pin 1 */ - AC_MUXPOS_PIN2_gc = (0x02<<3), /* Pin 2 */ - AC_MUXPOS_PIN3_gc = (0x03<<3), /* Pin 3 */ - AC_MUXPOS_PIN4_gc = (0x04<<3), /* Pin 4 */ - AC_MUXPOS_PIN5_gc = (0x05<<3), /* Pin 5 */ - AC_MUXPOS_PIN6_gc = (0x06<<3), /* Pin 6 */ - AC_MUXPOS_DAC_gc = (0x07<<3), /* DAC output */ -} AC_MUXPOS_t; - -/* Negative input multiplexer selection */ -typedef enum AC_MUXNEG_enum -{ - AC_MUXNEG_PIN0_gc = (0x00<<0), /* Pin 0 */ - AC_MUXNEG_PIN1_gc = (0x01<<0), /* Pin 1 */ - AC_MUXNEG_PIN3_gc = (0x02<<0), /* Pin 3 */ - AC_MUXNEG_PIN5_gc = (0x03<<0), /* Pin 5 */ - AC_MUXNEG_PIN7_gc = (0x04<<0), /* Pin 7 */ - AC_MUXNEG_DAC_gc = (0x05<<0), /* DAC output */ - AC_MUXNEG_BANDGAP_gc = (0x06<<0), /* Bandgap Reference */ - AC_MUXNEG_SCALER_gc = (0x07<<0), /* Internal voltage scaler */ -} AC_MUXNEG_t; - -/* Windows interrupt mode */ -typedef enum AC_WINTMODE_enum -{ - AC_WINTMODE_ABOVE_gc = (0x00<<2), /* Interrupt on above window */ - AC_WINTMODE_INSIDE_gc = (0x01<<2), /* Interrupt on inside window */ - AC_WINTMODE_BELOW_gc = (0x02<<2), /* Interrupt on below window */ - AC_WINTMODE_OUTSIDE_gc = (0x03<<2), /* Interrupt on outside window */ -} AC_WINTMODE_t; - -/* Window interrupt level */ -typedef enum AC_WINTLVL_enum -{ - AC_WINTLVL_OFF_gc = (0x00<<0), /* Interrupt disabled */ - AC_WINTLVL_LO_gc = (0x01<<0), /* Low priority */ - AC_WINTLVL_MED_gc = (0x02<<0), /* Medium priority */ - AC_WINTLVL_HI_gc = (0x03<<0), /* High priority */ -} AC_WINTLVL_t; - -/* Window mode state */ -typedef enum AC_WSTATE_enum -{ - AC_WSTATE_ABOVE_gc = (0x00<<6), /* Signal above window */ - AC_WSTATE_INSIDE_gc = (0x01<<6), /* Signal inside window */ - AC_WSTATE_BELOW_gc = (0x02<<6), /* Signal below window */ -} AC_WSTATE_t; - - -/* --------------------------------------------------------------------------- -ADC - Analog/Digital Converter --------------------------------------------------------------------------- -*/ - -/* ADC Channel */ -typedef struct ADC_CH_struct -{ - register8_t CTRL; /* Control Register */ - register8_t MUXCTRL; /* MUX Control */ - register8_t INTCTRL; /* Channel Interrupt Control */ - register8_t INTFLAGS; /* Interrupt Flags */ - _WORDREGISTER(RES); /* Channel Result */ - register8_t reserved_0x6; - register8_t reserved_0x7; -} ADC_CH_t; - -/* --------------------------------------------------------------------------- -ADC - Analog/Digital Converter --------------------------------------------------------------------------- -*/ - -/* Analog-to-Digital Converter */ -typedef struct ADC_struct -{ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t REFCTRL; /* Reference Control */ - register8_t EVCTRL; /* Event Control */ - register8_t PRESCALER; /* Clock Prescaler */ - register8_t CALCTRL; /* Calibration Control Register */ - register8_t INTFLAGS; /* Interrupt Flags */ - register8_t reserved_0x07; - register8_t reserved_0x08; - register8_t reserved_0x09; - register8_t reserved_0x0A; - register8_t reserved_0x0B; - register8_t CALIB; /* Calibration Value */ - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t reserved_0x0F; - _WORDREGISTER(CH0RES); /* Channel 0 Result */ - _WORDREGISTER(CH1RES); /* Channel 1 Result */ - _WORDREGISTER(CH2RES); /* Channel 2 Result */ - _WORDREGISTER(CH3RES); /* Channel 3 Result */ - _WORDREGISTER(CMP); /* Compare Value */ - register8_t reserved_0x1A; - register8_t reserved_0x1B; - register8_t reserved_0x1C; - register8_t reserved_0x1D; - register8_t reserved_0x1E; - register8_t reserved_0x1F; - ADC_CH_t CH0; /* ADC Channel 0 */ - ADC_CH_t CH1; /* ADC Channel 1 */ - ADC_CH_t CH2; /* ADC Channel 2 */ - ADC_CH_t CH3; /* ADC Channel 3 */ -} ADC_t; - -/* Positive input multiplexer selection */ -typedef enum ADC_CH_MUXPOS_enum -{ - ADC_CH_MUXPOS_PIN0_gc = (0x00<<3), /* Input pin 0 */ - ADC_CH_MUXPOS_PIN1_gc = (0x01<<3), /* Input pin 1 */ - ADC_CH_MUXPOS_PIN2_gc = (0x02<<3), /* Input pin 2 */ - ADC_CH_MUXPOS_PIN3_gc = (0x03<<3), /* Input pin 3 */ - ADC_CH_MUXPOS_PIN4_gc = (0x04<<3), /* Input pin 4 */ - ADC_CH_MUXPOS_PIN5_gc = (0x05<<3), /* Input pin 5 */ - ADC_CH_MUXPOS_PIN6_gc = (0x06<<3), /* Input pin 6 */ - ADC_CH_MUXPOS_PIN7_gc = (0x07<<3), /* Input pin 7 */ -} ADC_CH_MUXPOS_t; - -/* Internal input multiplexer selections */ -typedef enum ADC_CH_MUXINT_enum -{ - ADC_CH_MUXINT_TEMP_gc = (0x00<<3), /* Temperature Reference */ - ADC_CH_MUXINT_BANDGAP_gc = (0x01<<3), /* Bandgap Reference */ - ADC_CH_MUXINT_SCALEDVCC_gc = (0x02<<3), /* 1/10 scaled VCC */ - ADC_CH_MUXINT_DAC_gc = (0x03<<3), /* DAC output */ -} ADC_CH_MUXINT_t; - -/* Negative input multiplexer selection */ -typedef enum ADC_CH_MUXNEG_enum -{ - ADC_CH_MUXNEG_PIN0_gc = (0x00<<0), /* Input pin 0 */ - ADC_CH_MUXNEG_PIN1_gc = (0x01<<0), /* Input pin 1 */ - ADC_CH_MUXNEG_PIN2_gc = (0x02<<0), /* Input pin 2 */ - ADC_CH_MUXNEG_PIN3_gc = (0x03<<0), /* Input pin 3 */ - ADC_CH_MUXNEG_PIN4_gc = (0x04<<0), /* Input pin 4 */ - ADC_CH_MUXNEG_PIN5_gc = (0x05<<0), /* Input pin 5 */ - ADC_CH_MUXNEG_PIN6_gc = (0x06<<0), /* Input pin 6 */ - ADC_CH_MUXNEG_PIN7_gc = (0x07<<0), /* Input pin 7 */ -} ADC_CH_MUXNEG_t; - -/* Input mode */ -typedef enum ADC_CH_INPUTMODE_enum -{ - ADC_CH_INPUTMODE_INTERNAL_gc = (0x00<<0), /* Internal inputs, no gain */ - ADC_CH_INPUTMODE_SINGLEENDED_gc = (0x01<<0), /* Single-ended input, no gain */ - ADC_CH_INPUTMODE_DIFF_gc = (0x02<<0), /* Differential input, no gain */ - ADC_CH_INPUTMODE_DIFFWGAIN_gc = (0x03<<0), /* Differential input, with gain */ -} ADC_CH_INPUTMODE_t; - -/* Gain factor */ -typedef enum ADC_CH_GAIN_enum -{ - ADC_CH_GAIN_1X_gc = (0x00<<2), /* 1x gain */ - ADC_CH_GAIN_2X_gc = (0x01<<2), /* 2x gain */ - ADC_CH_GAIN_4X_gc = (0x02<<2), /* 4x gain */ - ADC_CH_GAIN_8X_gc = (0x03<<2), /* 8x gain */ - ADC_CH_GAIN_16X_gc = (0x04<<2), /* 16x gain */ - ADC_CH_GAIN_32X_gc = (0x05<<2), /* 32x gain */ - ADC_CH_GAIN_64X_gc = (0x06<<2), /* 64x gain */ -} ADC_CH_GAIN_t; - -/* Conversion result resolution */ -typedef enum ADC_RESOLUTION_enum -{ - ADC_RESOLUTION_12BIT_gc = (0x00<<1), /* 12-bit right-adjusted result */ - ADC_RESOLUTION_8BIT_gc = (0x02<<1), /* 8-bit right-adjusted result */ - ADC_RESOLUTION_LEFT12BIT_gc = (0x03<<1), /* 12-bit left-adjusted result */ -} ADC_RESOLUTION_t; - -/* Voltage reference selection */ -typedef enum ADC_REFSEL_enum -{ - ADC_REFSEL_INT1V_gc = (0x00<<4), /* Internal 1V */ - ADC_REFSEL_VCC_gc = (0x01<<4), /* Internal VCC / 1.6V */ - ADC_REFSEL_AREFA_gc = (0x02<<4), /* External reference on PORT A */ - ADC_REFSEL_AREFB_gc = (0x03<<4), /* External reference on PORT B */ -} ADC_REFSEL_t; - -/* Channel sweep selection */ -typedef enum ADC_SWEEP_enum -{ - ADC_SWEEP_0_gc = (0x00<<6), /* ADC Channel 0 */ - ADC_SWEEP_01_gc = (0x01<<6), /* ADC Channel 0,1 */ - ADC_SWEEP_012_gc = (0x02<<6), /* ADC Channel 0,1,2 */ - ADC_SWEEP_0123_gc = (0x03<<6), /* ADC Channel 0,1,2,3 */ -} ADC_SWEEP_t; - -/* Event channel input selection */ -typedef enum ADC_EVSEL_enum -{ - ADC_EVSEL_0123_gc = (0x00<<3), /* Event Channel 0,1,2,3 */ - ADC_EVSEL_1234_gc = (0x01<<3), /* Event Channel 1,2,3,4 */ - ADC_EVSEL_2345_gc = (0x02<<3), /* Event Channel 2,3,4,5 */ - ADC_EVSEL_3456_gc = (0x03<<3), /* Event Channel 3,4,5,6 */ - ADC_EVSEL_4567_gc = (0x04<<3), /* Event Channel 4,5,6,7 */ - ADC_EVSEL_567_gc = (0x05<<3), /* Event Channel 5,6,7 */ - ADC_EVSEL_67_gc = (0x06<<3), /* Event Channel 6,7 */ - ADC_EVSEL_7_gc = (0x07<<3), /* Event Channel 7 */ -} ADC_EVSEL_t; - -/* Event action selection */ -typedef enum ADC_EVACT_enum -{ - ADC_EVACT_NONE_gc = (0x00<<0), /* No event action */ - ADC_EVACT_CH0_gc = (0x01<<0), /* First event triggers channel 0 */ - ADC_EVACT_CH01_gc = (0x02<<0), /* First two events trigger channel 0,1 */ - ADC_EVACT_CH012_gc = (0x03<<0), /* First three events trigger channel 0,1,2 */ - ADC_EVACT_CH0123_gc = (0x04<<0), /* Events trigger channel 0,1,2,3 */ - ADC_EVACT_SWEEP_gc = (0x05<<0), /* First event triggers sweep */ - ADC_EVACT_SYNCHSWEEP_gc = (0x06<<0), /* First event triggers synchronized sweep */ -} ADC_EVACT_t; - -/* Interupt mode */ -typedef enum ADC_CH_INTMODE_enum -{ - ADC_CH_INTMODE_COMPLETE_gc = (0x00<<2), /* Interrupt on conversion complete */ - ADC_CH_INTMODE_BELOW_gc = (0x01<<2), /* Interrupt on result below compare value */ - ADC_CH_INTMODE_ABOVE_gc = (0x03<<2), /* Interrupt on result above compare value */ -} ADC_CH_INTMODE_t; - -/* Interrupt level */ -typedef enum ADC_CH_INTLVL_enum -{ - ADC_CH_INTLVL_OFF_gc = (0x00<<0), /* Interrupt disabled */ - ADC_CH_INTLVL_LO_gc = (0x01<<0), /* Low level */ - ADC_CH_INTLVL_MED_gc = (0x02<<0), /* Medium level */ - ADC_CH_INTLVL_HI_gc = (0x03<<0), /* High level */ -} ADC_CH_INTLVL_t; - -/* DMA request selection */ -typedef enum ADC_DMASEL_enum -{ - ADC_DMASEL_OFF_gc = (0x00<<5), /* Combined DMA request OFF */ - ADC_DMASEL_CH01_gc = (0x01<<5), /* ADC Channel 0 or 1 */ - ADC_DMASEL_CH012_gc = (0x02<<5), /* ADC Channel 0 or 1 or 2 */ - ADC_DMASEL_CH0123_gc = (0x03<<5), /* ADC Channel 0 or 1 or 2 or 3 */ -} ADC_DMASEL_t; - -/* Clock prescaler */ -typedef enum ADC_PRESCALER_enum -{ - ADC_PRESCALER_DIV4_gc = (0x00<<0), /* Divide clock by 4 */ - ADC_PRESCALER_DIV8_gc = (0x01<<0), /* Divide clock by 8 */ - ADC_PRESCALER_DIV16_gc = (0x02<<0), /* Divide clock by 16 */ - ADC_PRESCALER_DIV32_gc = (0x03<<0), /* Divide clock by 32 */ - ADC_PRESCALER_DIV64_gc = (0x04<<0), /* Divide clock by 64 */ - ADC_PRESCALER_DIV128_gc = (0x05<<0), /* Divide clock by 128 */ - ADC_PRESCALER_DIV256_gc = (0x06<<0), /* Divide clock by 256 */ - ADC_PRESCALER_DIV512_gc = (0x07<<0), /* Divide clock by 512 */ -} ADC_PRESCALER_t; - - -/* --------------------------------------------------------------------------- -DAC - Digital/Analog Converter --------------------------------------------------------------------------- -*/ - -/* Digital-to-Analog Converter */ -typedef struct DAC_struct -{ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t CTRLC; /* Control Register C */ - register8_t EVCTRL; /* Event Input Control */ - register8_t TIMCTRL; /* Timing Control */ - register8_t STATUS; /* Status */ - register8_t reserved_0x06; - register8_t reserved_0x07; - register8_t GAINCAL; /* Gain Calibration */ - register8_t OFFSETCAL; /* Offset Calibration */ - register8_t reserved_0x0A; - register8_t reserved_0x0B; - register8_t reserved_0x0C; - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t reserved_0x0F; - register8_t reserved_0x10; - register8_t reserved_0x11; - register8_t reserved_0x12; - register8_t reserved_0x13; - register8_t reserved_0x14; - register8_t reserved_0x15; - register8_t reserved_0x16; - register8_t reserved_0x17; - _WORDREGISTER(CH0DATA); /* Channel 0 Data */ - _WORDREGISTER(CH1DATA); /* Channel 1 Data */ -} DAC_t; - -/* Output channel selection */ -typedef enum DAC_CHSEL_enum -{ - DAC_CHSEL_SINGLE_gc = (0x00<<5), /* Single channel operation (Channel A only) */ - DAC_CHSEL_DUAL_gc = (0x02<<5), /* Dual channel operation (S/H on both channels) */ -} DAC_CHSEL_t; - -/* Reference voltage selection */ -typedef enum DAC_REFSEL_enum -{ - DAC_REFSEL_INT1V_gc = (0x00<<3), /* Internal 1V */ - DAC_REFSEL_AVCC_gc = (0x01<<3), /* Analog supply voltage */ - DAC_REFSEL_AREFA_gc = (0x02<<3), /* External reference on AREF on PORTA */ - DAC_REFSEL_AREFB_gc = (0x03<<3), /* External reference on AREF on PORTB */ -} DAC_REFSEL_t; - -/* Event channel selection */ -typedef enum DAC_EVSEL_enum -{ - DAC_EVSEL_0_gc = (0x00<<0), /* Event Channel 0 */ - DAC_EVSEL_1_gc = (0x01<<0), /* Event Channel 1 */ - DAC_EVSEL_2_gc = (0x02<<0), /* Event Channel 2 */ - DAC_EVSEL_3_gc = (0x03<<0), /* Event Channel 3 */ - DAC_EVSEL_4_gc = (0x04<<0), /* Event Channel 4 */ - DAC_EVSEL_5_gc = (0x05<<0), /* Event Channel 5 */ - DAC_EVSEL_6_gc = (0x06<<0), /* Event Channel 6 */ - DAC_EVSEL_7_gc = (0x07<<0), /* Event Channel 7 */ -} DAC_EVSEL_t; - -/* Conversion interval */ -typedef enum DAC_CONINTVAL_enum -{ - DAC_CONINTVAL_1CLK_gc = (0x00<<4), /* 1 CLK / 2 CLK in S/H mode */ - DAC_CONINTVAL_2CLK_gc = (0x01<<4), /* 2 CLK / 3 CLK in S/H mode */ - DAC_CONINTVAL_4CLK_gc = (0x02<<4), /* 4 CLK / 6 CLK in S/H mode */ - DAC_CONINTVAL_8CLK_gc = (0x03<<4), /* 8 CLK / 12 CLK in S/H mode */ - DAC_CONINTVAL_16CLK_gc = (0x04<<4), /* 16 CLK / 24 CLK in S/H mode */ - DAC_CONINTVAL_32CLK_gc = (0x05<<4), /* 32 CLK / 48 CLK in S/H mode */ - DAC_CONINTVAL_64CLK_gc = (0x06<<4), /* 64 CLK / 96 CLK in S/H mode */ - DAC_CONINTVAL_128CLK_gc = (0x07<<4), /* 128 CLK / 192 CLK in S/H mode */ -} DAC_CONINTVAL_t; - -/* Refresh rate */ -typedef enum DAC_REFRESH_enum -{ - DAC_REFRESH_16CLK_gc = (0x00<<0), /* 16 CLK */ - DAC_REFRESH_32CLK_gc = (0x01<<0), /* 32 CLK */ - DAC_REFRESH_64CLK_gc = (0x02<<0), /* 64 CLK */ - DAC_REFRESH_128CLK_gc = (0x03<<0), /* 128 CLK */ - DAC_REFRESH_256CLK_gc = (0x04<<0), /* 256 CLK */ - DAC_REFRESH_512CLK_gc = (0x05<<0), /* 512 CLK */ - DAC_REFRESH_1024CLK_gc = (0x06<<0), /* 1024 CLK */ - DAC_REFRESH_2048CLK_gc = (0x07<<0), /* 2048 CLK */ - DAC_REFRESH_4086CLK_gc = (0x08<<0), /* 4096 CLK */ - DAC_REFRESH_8192CLK_gc = (0x09<<0), /* 8192 CLK */ - DAC_REFRESH_16384CLK_gc = (0x0A<<0), /* 16384 CLK */ - DAC_REFRESH_32768CLK_gc = (0x0B<<0), /* 32768 CLK */ - DAC_REFRESH_65536CLK_gc = (0x0C<<0), /* 65536 CLK */ - DAC_REFRESH_OFF_gc = (0x0F<<0), /* Auto refresh OFF */ -} DAC_REFRESH_t; - - -/* --------------------------------------------------------------------------- -RTC - Real-Time Clounter --------------------------------------------------------------------------- -*/ - -/* Real-Time Counter */ -typedef struct RTC_struct -{ - register8_t CTRL; /* Control Register */ - register8_t STATUS; /* Status Register */ - register8_t INTCTRL; /* Interrupt Control Register */ - register8_t INTFLAGS; /* Interrupt Flags */ - register8_t TEMP; /* Temporary register */ - register8_t reserved_0x05; - register8_t reserved_0x06; - register8_t reserved_0x07; - _WORDREGISTER(CNT); /* Count Register */ - _WORDREGISTER(PER); /* Period Register */ - _WORDREGISTER(COMP); /* Compare Register */ -} RTC_t; - -/* Prescaler Factor */ -typedef enum RTC_PRESCALER_enum -{ - RTC_PRESCALER_OFF_gc = (0x00<<0), /* RTC Off */ - RTC_PRESCALER_DIV1_gc = (0x01<<0), /* RTC Clock */ - RTC_PRESCALER_DIV2_gc = (0x02<<0), /* RTC Clock / 2 */ - RTC_PRESCALER_DIV8_gc = (0x03<<0), /* RTC Clock / 8 */ - RTC_PRESCALER_DIV16_gc = (0x04<<0), /* RTC Clock / 16 */ - RTC_PRESCALER_DIV64_gc = (0x05<<0), /* RTC Clock / 64 */ - RTC_PRESCALER_DIV256_gc = (0x06<<0), /* RTC Clock / 256 */ - RTC_PRESCALER_DIV1024_gc = (0x07<<0), /* RTC Clock / 1024 */ -} RTC_PRESCALER_t; - -/* Compare Interrupt level */ -typedef enum RTC_COMPINTLVL_enum -{ - RTC_COMPINTLVL_OFF_gc = (0x00<<2), /* Interrupt Disabled */ - RTC_COMPINTLVL_LO_gc = (0x01<<2), /* Low Level */ - RTC_COMPINTLVL_MED_gc = (0x02<<2), /* Medium Level */ - RTC_COMPINTLVL_HI_gc = (0x03<<2), /* High Level */ -} RTC_COMPINTLVL_t; - -/* Overflow Interrupt level */ -typedef enum RTC_OVFINTLVL_enum -{ - RTC_OVFINTLVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - RTC_OVFINTLVL_LO_gc = (0x01<<0), /* Low Level */ - RTC_OVFINTLVL_MED_gc = (0x02<<0), /* Medium Level */ - RTC_OVFINTLVL_HI_gc = (0x03<<0), /* High Level */ -} RTC_OVFINTLVL_t; - - -/* --------------------------------------------------------------------------- -EBI - External Bus Interface --------------------------------------------------------------------------- -*/ - -/* EBI Chip Select Module */ -typedef struct EBI_CS_struct -{ - register8_t CTRLA; /* Chip Select Control Register A */ - register8_t CTRLB; /* Chip Select Control Register B */ - _WORDREGISTER(BASEADDR); /* Chip Select Base Address */ -} EBI_CS_t; - -/* --------------------------------------------------------------------------- -EBI - External Bus Interface --------------------------------------------------------------------------- -*/ - -/* External Bus Interface */ -typedef struct EBI_struct -{ - register8_t CTRL; /* Control */ - register8_t SDRAMCTRLA; /* SDRAM Control Register A */ - register8_t reserved_0x02; - register8_t reserved_0x03; - _WORDREGISTER(REFRESH); /* SDRAM Refresh Period */ - _WORDREGISTER(INITDLY); /* SDRAM Initialization Delay */ - register8_t SDRAMCTRLB; /* SDRAM Control Register B */ - register8_t SDRAMCTRLC; /* SDRAM Control Register C */ - register8_t reserved_0x0A; - register8_t reserved_0x0B; - register8_t reserved_0x0C; - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t reserved_0x0F; - EBI_CS_t CS0; /* Chip Select 0 */ - EBI_CS_t CS1; /* Chip Select 1 */ - EBI_CS_t CS2; /* Chip Select 2 */ - EBI_CS_t CS3; /* Chip Select 3 */ -} EBI_t; - -/* Chip Select adress space */ -typedef enum EBI_CS_ASPACE_enum -{ - EBI_CS_ASPACE_256B_gc = (0x00<<2), /* 256 bytes */ - EBI_CS_ASPACE_512B_gc = (0x01<<2), /* 512 bytes */ - EBI_CS_ASPACE_1KB_gc = (0x02<<2), /* 1K bytes */ - EBI_CS_ASPACE_2KB_gc = (0x03<<2), /* 2K bytes */ - EBI_CS_ASPACE_4KB_gc = (0x04<<2), /* 4K bytes */ - EBI_CS_ASPACE_8KB_gc = (0x05<<2), /* 8K bytes */ - EBI_CS_ASPACE_16KB_gc = (0x06<<2), /* 16K bytes */ - EBI_CS_ASPACE_32KB_gc = (0x07<<2), /* 32K bytes */ - EBI_CS_ASPACE_64KB_gc = (0x08<<2), /* 64K bytes */ - EBI_CS_ASPACE_128KB_gc = (0x09<<2), /* 128K bytes */ - EBI_CS_ASPACE_256KB_gc = (0x0A<<2), /* 256K bytes */ - EBI_CS_ASPACE_512KB_gc = (0x0B<<2), /* 512K bytes */ - EBI_CS_ASPACE_1MB_gc = (0x0C<<2), /* 1M bytes */ - EBI_CS_ASPACE_2MB_gc = (0x0D<<2), /* 2M bytes */ - EBI_CS_ASPACE_4MB_gc = (0x0E<<2), /* 4M bytes */ - EBI_CS_ASPACE_8MB_gc = (0x0F<<2), /* 8M bytes */ - EBI_CS_ASPACE_16M_gc = (0x10<<2), /* 16M bytes */ -} EBI_CS_ASPACE_t; - -/* */ -typedef enum EBI_CS_SRWS_enum -{ - EBI_CS_SRWS_0CLK_gc = (0x00<<0), /* 0 cycles */ - EBI_CS_SRWS_1CLK_gc = (0x01<<0), /* 1 cycle */ - EBI_CS_SRWS_2CLK_gc = (0x02<<0), /* 2 cycles */ - EBI_CS_SRWS_3CLK_gc = (0x03<<0), /* 3 cycles */ - EBI_CS_SRWS_4CLK_gc = (0x04<<0), /* 4 cycles */ - EBI_CS_SRWS_5CLK_gc = (0x05<<0), /* 5 cycle */ - EBI_CS_SRWS_6CLK_gc = (0x06<<0), /* 6 cycles */ - EBI_CS_SRWS_7CLK_gc = (0x07<<0), /* 7 cycles */ -} EBI_CS_SRWS_t; - -/* Chip Select address mode */ -typedef enum EBI_CS_MODE_enum -{ - EBI_CS_MODE_DISABLED_gc = (0x00<<0), /* Chip Select Disabled */ - EBI_CS_MODE_SRAM_gc = (0x01<<0), /* Chip Select in SRAM mode */ - EBI_CS_MODE_LPC_gc = (0x02<<0), /* Chip Select in SRAM LPC mode */ - EBI_CS_MODE_SDRAM_gc = (0x03<<0), /* Chip Select in SDRAM mode */ -} EBI_CS_MODE_t; - -/* Chip Select SDRAM mode */ -typedef enum EBI_CS_SDMODE_enum -{ - EBI_CS_SDMODE_NORMAL_gc = (0x00<<0), /* Normal mode */ - EBI_CS_SDMODE_LOAD_gc = (0x01<<0), /* Load Mode Register command mode */ -} EBI_CS_SDMODE_t; - -/* */ -typedef enum EBI_SDDATAW_enum -{ - EBI_SDDATAW_4BIT_gc = (0x00<<6), /* 4-bit data bus */ - EBI_SDDATAW_8BIT_gc = (0x01<<6), /* 8-bit data bus */ -} EBI_SDDATAW_t; - -/* */ -typedef enum EBI_LPCMODE_enum -{ - EBI_LPCMODE_ALE1_gc = (0x00<<4), /* Data muxed with addr byte 0 */ - EBI_LPCMODE_ALE12_gc = (0x02<<4), /* Data muxed with addr byte 0 and 1 */ -} EBI_LPCMODE_t; - -/* */ -typedef enum EBI_SRMODE_enum -{ - EBI_SRMODE_ALE1_gc = (0x00<<2), /* Addr byte 0 muxed with 1 */ - EBI_SRMODE_ALE2_gc = (0x01<<2), /* Addr byte 0 muxed with 2 */ - EBI_SRMODE_ALE12_gc = (0x02<<2), /* Addr byte 0 muxed with 1 and 2 */ - EBI_SRMODE_NOALE_gc = (0x03<<2), /* No addr muxing */ -} EBI_SRMODE_t; - -/* */ -typedef enum EBI_IFMODE_enum -{ - EBI_IFMODE_DISABLED_gc = (0x00<<0), /* EBI Disabled */ - EBI_IFMODE_3PORT_gc = (0x01<<0), /* 3-port mode */ - EBI_IFMODE_4PORT_gc = (0x02<<0), /* 4-port mode */ - EBI_IFMODE_2PORT_gc = (0x03<<0), /* 2-port mode */ -} EBI_IFMODE_t; - -/* */ -typedef enum EBI_SDCOL_enum -{ - EBI_SDCOL_8BIT_gc = (0x00<<0), /* 8 column bits */ - EBI_SDCOL_9BIT_gc = (0x01<<0), /* 9 column bits */ - EBI_SDCOL_10BIT_gc = (0x02<<0), /* 10 column bits */ - EBI_SDCOL_11BIT_gc = (0x03<<0), /* 11 column bits */ -} EBI_SDCOL_t; - -/* */ -typedef enum EBI_MRDLY_enum -{ - EBI_MRDLY_0CLK_gc = (0x00<<6), /* 0 cycles */ - EBI_MRDLY_1CLK_gc = (0x01<<6), /* 1 cycle */ - EBI_MRDLY_2CLK_gc = (0x02<<6), /* 2 cycles */ - EBI_MRDLY_3CLK_gc = (0x03<<6), /* 3 cycles */ -} EBI_MRDLY_t; - -/* */ -typedef enum EBI_ROWCYCDLY_enum -{ - EBI_ROWCYCDLY_0CLK_gc = (0x00<<3), /* 0 cycles */ - EBI_ROWCYCDLY_1CLK_gc = (0x01<<3), /* 1 cycle */ - EBI_ROWCYCDLY_2CLK_gc = (0x02<<3), /* 2 cycles */ - EBI_ROWCYCDLY_3CLK_gc = (0x03<<3), /* 3 cycles */ - EBI_ROWCYCDLY_4CLK_gc = (0x04<<3), /* 4 cycles */ - EBI_ROWCYCDLY_5CLK_gc = (0x05<<3), /* 5 cycle */ - EBI_ROWCYCDLY_6CLK_gc = (0x06<<3), /* 6 cycles */ - EBI_ROWCYCDLY_7CLK_gc = (0x07<<3), /* 7 cycles */ -} EBI_ROWCYCDLY_t; - -/* */ -typedef enum EBI_RPDLY_enum -{ - EBI_RPDLY_0CLK_gc = (0x00<<0), /* 0 cycles */ - EBI_RPDLY_1CLK_gc = (0x01<<0), /* 1 cycle */ - EBI_RPDLY_2CLK_gc = (0x02<<0), /* 2 cycles */ - EBI_RPDLY_3CLK_gc = (0x03<<0), /* 3 cycles */ - EBI_RPDLY_4CLK_gc = (0x04<<0), /* 4 cycles */ - EBI_RPDLY_5CLK_gc = (0x05<<0), /* 5 cycle */ - EBI_RPDLY_6CLK_gc = (0x06<<0), /* 6 cycles */ - EBI_RPDLY_7CLK_gc = (0x07<<0), /* 7 cycles */ -} EBI_RPDLY_t; - -/* */ -typedef enum EBI_WRDLY_enum -{ - EBI_WRDLY_0CLK_gc = (0x00<<6), /* 0 cycles */ - EBI_WRDLY_1CLK_gc = (0x01<<6), /* 1 cycle */ - EBI_WRDLY_2CLK_gc = (0x02<<6), /* 2 cycles */ - EBI_WRDLY_3CLK_gc = (0x03<<6), /* 3 cycles */ -} EBI_WRDLY_t; - -/* */ -typedef enum EBI_ESRDLY_enum -{ - EBI_ESRDLY_0CLK_gc = (0x00<<3), /* 0 cycles */ - EBI_ESRDLY_1CLK_gc = (0x01<<3), /* 1 cycle */ - EBI_ESRDLY_2CLK_gc = (0x02<<3), /* 2 cycles */ - EBI_ESRDLY_3CLK_gc = (0x03<<3), /* 3 cycles */ - EBI_ESRDLY_4CLK_gc = (0x04<<3), /* 4 cycles */ - EBI_ESRDLY_5CLK_gc = (0x05<<3), /* 5 cycle */ - EBI_ESRDLY_6CLK_gc = (0x06<<3), /* 6 cycles */ - EBI_ESRDLY_7CLK_gc = (0x07<<3), /* 7 cycles */ -} EBI_ESRDLY_t; - -/* */ -typedef enum EBI_ROWCOLDLY_enum -{ - EBI_ROWCOLDLY_0CLK_gc = (0x00<<0), /* 0 cycles */ - EBI_ROWCOLDLY_1CLK_gc = (0x01<<0), /* 1 cycle */ - EBI_ROWCOLDLY_2CLK_gc = (0x02<<0), /* 2 cycles */ - EBI_ROWCOLDLY_3CLK_gc = (0x03<<0), /* 3 cycles */ - EBI_ROWCOLDLY_4CLK_gc = (0x04<<0), /* 4 cycles */ - EBI_ROWCOLDLY_5CLK_gc = (0x05<<0), /* 5 cycle */ - EBI_ROWCOLDLY_6CLK_gc = (0x06<<0), /* 6 cycles */ - EBI_ROWCOLDLY_7CLK_gc = (0x07<<0), /* 7 cycles */ -} EBI_ROWCOLDLY_t; - - -/* --------------------------------------------------------------------------- -TWI - Two-Wire Interface --------------------------------------------------------------------------- -*/ - -/* */ -typedef struct TWI_MASTER_struct -{ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t CTRLC; /* Control Register C */ - register8_t STATUS; /* Status Register */ - register8_t BAUD; /* Baurd Rate Control Register */ - register8_t ADDR; /* Address Register */ - register8_t DATA; /* Data Register */ -} TWI_MASTER_t; - -/* --------------------------------------------------------------------------- -TWI - Two-Wire Interface --------------------------------------------------------------------------- -*/ - -/* */ -typedef struct TWI_SLAVE_struct -{ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t STATUS; /* Status Register */ - register8_t ADDR; /* Address Register */ - register8_t DATA; /* Data Register */ -} TWI_SLAVE_t; - -/* --------------------------------------------------------------------------- -TWI - Two-Wire Interface --------------------------------------------------------------------------- -*/ - -/* Two-Wire Interface */ -typedef struct TWI_struct -{ - register8_t CTRL; /* TWI Common Control Register */ - TWI_MASTER_t MASTER; /* TWI master module */ - TWI_SLAVE_t SLAVE; /* TWI slave module */ -} TWI_t; - -/* Master Interrupt Level */ -typedef enum TWI_MASTER_INTLVL_enum -{ - TWI_MASTER_INTLVL_OFF_gc = (0x00<<6), /* Interrupt Disabled */ - TWI_MASTER_INTLVL_LO_gc = (0x01<<6), /* Low Level */ - TWI_MASTER_INTLVL_MED_gc = (0x02<<6), /* Medium Level */ - TWI_MASTER_INTLVL_HI_gc = (0x03<<6), /* High Level */ -} TWI_MASTER_INTLVL_t; - -/* Inactive Timeout */ -typedef enum TWI_MASTER_TIMEOUT_enum -{ - TWI_MASTER_TIMEOUT_DISABLED_gc = (0x00<<2), /* Bus Timeout Disabled */ - TWI_MASTER_TIMEOUT_50US_gc = (0x01<<2), /* 50 Microseconds */ - TWI_MASTER_TIMEOUT_100US_gc = (0x02<<2), /* 100 Microseconds */ - TWI_MASTER_TIMEOUT_200US_gc = (0x03<<2), /* 200 Microseconds */ -} TWI_MASTER_TIMEOUT_t; - -/* Master Command */ -typedef enum TWI_MASTER_CMD_enum -{ - TWI_MASTER_CMD_NOACT_gc = (0x00<<0), /* No Action */ - TWI_MASTER_CMD_REPSTART_gc = (0x01<<0), /* Issue Repeated Start Condition */ - TWI_MASTER_CMD_RECVTRANS_gc = (0x02<<0), /* Receive or Transmit Data */ - TWI_MASTER_CMD_STOP_gc = (0x03<<0), /* Issue Stop Condition */ -} TWI_MASTER_CMD_t; - -/* Master Bus State */ -typedef enum TWI_MASTER_BUSSTATE_enum -{ - TWI_MASTER_BUSSTATE_UNKNOWN_gc = (0x00<<0), /* Unknown Bus State */ - TWI_MASTER_BUSSTATE_IDLE_gc = (0x01<<0), /* Bus is Idle */ - TWI_MASTER_BUSSTATE_OWNER_gc = (0x02<<0), /* This Module Controls The Bus */ - TWI_MASTER_BUSSTATE_BUSY_gc = (0x03<<0), /* The Bus is Busy */ -} TWI_MASTER_BUSSTATE_t; - -/* Slave Interrupt Level */ -typedef enum TWI_SLAVE_INTLVL_enum -{ - TWI_SLAVE_INTLVL_OFF_gc = (0x00<<6), /* Interrupt Disabled */ - TWI_SLAVE_INTLVL_LO_gc = (0x01<<6), /* Low Level */ - TWI_SLAVE_INTLVL_MED_gc = (0x02<<6), /* Medium Level */ - TWI_SLAVE_INTLVL_HI_gc = (0x03<<6), /* High Level */ -} TWI_SLAVE_INTLVL_t; - -/* Slave Command */ -typedef enum TWI_SLAVE_CMD_enum -{ - TWI_SLAVE_CMD_NOACT_gc = (0x00<<0), /* No Action */ - TWI_SLAVE_CMD_COMPTRANS_gc = (0x02<<0), /* Used To Complete a Transaction */ - TWI_SLAVE_CMD_RESPONSE_gc = (0x03<<0), /* Used in Response to Address/Data Interrupt */ -} TWI_SLAVE_CMD_t; - - -/* --------------------------------------------------------------------------- -PORT - Port Configuration --------------------------------------------------------------------------- -*/ - -/* I/O port Configuration */ -typedef struct PORTCFG_struct -{ - register8_t MPCMASK; /* Multi-pin Configuration Mask */ - register8_t reserved_0x01; - register8_t VPCTRLA; /* Virtual Port Control Register A */ - register8_t VPCTRLB; /* Virtual Port Control Register B */ - register8_t CLKEVOUT; /* Clock and Event Out Register */ -} PORTCFG_t; - -/* --------------------------------------------------------------------------- -PORT - Port Configuration --------------------------------------------------------------------------- -*/ - -/* Virtual Port */ -typedef struct VPORT_struct -{ - register8_t DIR; /* I/O Port Data Direction */ - register8_t OUT; /* I/O Port Output */ - register8_t IN; /* I/O Port Input */ - register8_t INTFLAGS; /* Interrupt Flag Register */ -} VPORT_t; - -/* --------------------------------------------------------------------------- -PORT - Port Configuration --------------------------------------------------------------------------- -*/ - -/* I/O Ports */ -typedef struct PORT_struct -{ - register8_t DIR; /* I/O Port Data Direction */ - register8_t DIRSET; /* I/O Port Data Direction Set */ - register8_t DIRCLR; /* I/O Port Data Direction Clear */ - register8_t DIRTGL; /* I/O Port Data Direction Toggle */ - register8_t OUT; /* I/O Port Output */ - register8_t OUTSET; /* I/O Port Output Set */ - register8_t OUTCLR; /* I/O Port Output Clear */ - register8_t OUTTGL; /* I/O Port Output Toggle */ - register8_t IN; /* I/O port Input */ - register8_t INTCTRL; /* Interrupt Control Register */ - register8_t INT0MASK; /* Port Interrupt 0 Mask */ - register8_t INT1MASK; /* Port Interrupt 1 Mask */ - register8_t INTFLAGS; /* Interrupt Flag Register */ - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t reserved_0x0F; - register8_t PIN0CTRL; /* Pin 0 Control Register */ - register8_t PIN1CTRL; /* Pin 1 Control Register */ - register8_t PIN2CTRL; /* Pin 2 Control Register */ - register8_t PIN3CTRL; /* Pin 3 Control Register */ - register8_t PIN4CTRL; /* Pin 4 Control Register */ - register8_t PIN5CTRL; /* Pin 5 Control Register */ - register8_t PIN6CTRL; /* Pin 6 Control Register */ - register8_t PIN7CTRL; /* Pin 7 Control Register */ -} PORT_t; - -/* Virtual Port 0 Mapping */ -typedef enum PORTCFG_VP0MAP_enum -{ - PORTCFG_VP0MAP_PORTA_gc = (0x00<<0), /* Mapped To PORTA */ - PORTCFG_VP0MAP_PORTB_gc = (0x01<<0), /* Mapped To PORTB */ - PORTCFG_VP0MAP_PORTC_gc = (0x02<<0), /* Mapped To PORTC */ - PORTCFG_VP0MAP_PORTD_gc = (0x03<<0), /* Mapped To PORTD */ - PORTCFG_VP0MAP_PORTE_gc = (0x04<<0), /* Mapped To PORTE */ - PORTCFG_VP0MAP_PORTF_gc = (0x05<<0), /* Mapped To PORTF */ - PORTCFG_VP0MAP_PORTG_gc = (0x06<<0), /* Mapped To PORTG */ - PORTCFG_VP0MAP_PORTH_gc = (0x07<<0), /* Mapped To PORTH */ - PORTCFG_VP0MAP_PORTJ_gc = (0x08<<0), /* Mapped To PORTJ */ - PORTCFG_VP0MAP_PORTK_gc = (0x09<<0), /* Mapped To PORTK */ - PORTCFG_VP0MAP_PORTL_gc = (0x0A<<0), /* Mapped To PORTL */ - PORTCFG_VP0MAP_PORTM_gc = (0x0B<<0), /* Mapped To PORTM */ - PORTCFG_VP0MAP_PORTN_gc = (0x0C<<0), /* Mapped To PORTN */ - PORTCFG_VP0MAP_PORTP_gc = (0x0D<<0), /* Mapped To PORTP */ - PORTCFG_VP0MAP_PORTQ_gc = (0x0E<<0), /* Mapped To PORTQ */ - PORTCFG_VP0MAP_PORTR_gc = (0x0F<<0), /* Mapped To PORTR */ -} PORTCFG_VP0MAP_t; - -/* Virtual Port 1 Mapping */ -typedef enum PORTCFG_VP1MAP_enum -{ - PORTCFG_VP1MAP_PORTA_gc = (0x00<<4), /* Mapped To PORTA */ - PORTCFG_VP1MAP_PORTB_gc = (0x01<<4), /* Mapped To PORTB */ - PORTCFG_VP1MAP_PORTC_gc = (0x02<<4), /* Mapped To PORTC */ - PORTCFG_VP1MAP_PORTD_gc = (0x03<<4), /* Mapped To PORTD */ - PORTCFG_VP1MAP_PORTE_gc = (0x04<<4), /* Mapped To PORTE */ - PORTCFG_VP1MAP_PORTF_gc = (0x05<<4), /* Mapped To PORTF */ - PORTCFG_VP1MAP_PORTG_gc = (0x06<<4), /* Mapped To PORTG */ - PORTCFG_VP1MAP_PORTH_gc = (0x07<<4), /* Mapped To PORTH */ - PORTCFG_VP1MAP_PORTJ_gc = (0x08<<4), /* Mapped To PORTJ */ - PORTCFG_VP1MAP_PORTK_gc = (0x09<<4), /* Mapped To PORTK */ - PORTCFG_VP1MAP_PORTL_gc = (0x0A<<4), /* Mapped To PORTL */ - PORTCFG_VP1MAP_PORTM_gc = (0x0B<<4), /* Mapped To PORTM */ - PORTCFG_VP1MAP_PORTN_gc = (0x0C<<4), /* Mapped To PORTN */ - PORTCFG_VP1MAP_PORTP_gc = (0x0D<<4), /* Mapped To PORTP */ - PORTCFG_VP1MAP_PORTQ_gc = (0x0E<<4), /* Mapped To PORTQ */ - PORTCFG_VP1MAP_PORTR_gc = (0x0F<<4), /* Mapped To PORTR */ -} PORTCFG_VP1MAP_t; - -/* Virtual Port 2 Mapping */ -typedef enum PORTCFG_VP2MAP_enum -{ - PORTCFG_VP2MAP_PORTA_gc = (0x00<<0), /* Mapped To PORTA */ - PORTCFG_VP2MAP_PORTB_gc = (0x01<<0), /* Mapped To PORTB */ - PORTCFG_VP2MAP_PORTC_gc = (0x02<<0), /* Mapped To PORTC */ - PORTCFG_VP2MAP_PORTD_gc = (0x03<<0), /* Mapped To PORTD */ - PORTCFG_VP2MAP_PORTE_gc = (0x04<<0), /* Mapped To PORTE */ - PORTCFG_VP2MAP_PORTF_gc = (0x05<<0), /* Mapped To PORTF */ - PORTCFG_VP2MAP_PORTG_gc = (0x06<<0), /* Mapped To PORTG */ - PORTCFG_VP2MAP_PORTH_gc = (0x07<<0), /* Mapped To PORTH */ - PORTCFG_VP2MAP_PORTJ_gc = (0x08<<0), /* Mapped To PORTJ */ - PORTCFG_VP2MAP_PORTK_gc = (0x09<<0), /* Mapped To PORTK */ - PORTCFG_VP2MAP_PORTL_gc = (0x0A<<0), /* Mapped To PORTL */ - PORTCFG_VP2MAP_PORTM_gc = (0x0B<<0), /* Mapped To PORTM */ - PORTCFG_VP2MAP_PORTN_gc = (0x0C<<0), /* Mapped To PORTN */ - PORTCFG_VP2MAP_PORTP_gc = (0x0D<<0), /* Mapped To PORTP */ - PORTCFG_VP2MAP_PORTQ_gc = (0x0E<<0), /* Mapped To PORTQ */ - PORTCFG_VP2MAP_PORTR_gc = (0x0F<<0), /* Mapped To PORTR */ -} PORTCFG_VP2MAP_t; - -/* Virtual Port 3 Mapping */ -typedef enum PORTCFG_VP3MAP_enum -{ - PORTCFG_VP3MAP_PORTA_gc = (0x00<<4), /* Mapped To PORTA */ - PORTCFG_VP3MAP_PORTB_gc = (0x01<<4), /* Mapped To PORTB */ - PORTCFG_VP3MAP_PORTC_gc = (0x02<<4), /* Mapped To PORTC */ - PORTCFG_VP3MAP_PORTD_gc = (0x03<<4), /* Mapped To PORTD */ - PORTCFG_VP3MAP_PORTE_gc = (0x04<<4), /* Mapped To PORTE */ - PORTCFG_VP3MAP_PORTF_gc = (0x05<<4), /* Mapped To PORTF */ - PORTCFG_VP3MAP_PORTG_gc = (0x06<<4), /* Mapped To PORTG */ - PORTCFG_VP3MAP_PORTH_gc = (0x07<<4), /* Mapped To PORTH */ - PORTCFG_VP3MAP_PORTJ_gc = (0x08<<4), /* Mapped To PORTJ */ - PORTCFG_VP3MAP_PORTK_gc = (0x09<<4), /* Mapped To PORTK */ - PORTCFG_VP3MAP_PORTL_gc = (0x0A<<4), /* Mapped To PORTL */ - PORTCFG_VP3MAP_PORTM_gc = (0x0B<<4), /* Mapped To PORTM */ - PORTCFG_VP3MAP_PORTN_gc = (0x0C<<4), /* Mapped To PORTN */ - PORTCFG_VP3MAP_PORTP_gc = (0x0D<<4), /* Mapped To PORTP */ - PORTCFG_VP3MAP_PORTQ_gc = (0x0E<<4), /* Mapped To PORTQ */ - PORTCFG_VP3MAP_PORTR_gc = (0x0F<<4), /* Mapped To PORTR */ -} PORTCFG_VP3MAP_t; - -/* Clock Output Port */ -typedef enum PORTCFG_CLKOUT_enum -{ - PORTCFG_CLKOUT_OFF_gc = (0x00<<0), /* Clock Output Disabled */ - PORTCFG_CLKOUT_PC7_gc = (0x01<<0), /* Clock Output on Port C pin 7 */ - PORTCFG_CLKOUT_PD7_gc = (0x02<<0), /* Clock Output on Port D pin 7 */ - PORTCFG_CLKOUT_PE7_gc = (0x03<<0), /* Clock Output on Port E pin 7 */ -} PORTCFG_CLKOUT_t; - -/* Event Output Port */ -typedef enum PORTCFG_EVOUT_enum -{ - PORTCFG_EVOUT_OFF_gc = (0x00<<4), /* Event Output Disabled */ - PORTCFG_EVOUT_PC7_gc = (0x01<<4), /* Event Channel 7 Output on Port C pin 7 */ - PORTCFG_EVOUT_PD7_gc = (0x02<<4), /* Event Channel 7 Output on Port D pin 7 */ - PORTCFG_EVOUT_PE7_gc = (0x03<<4), /* Event Channel 7 Output on Port E pin 7 */ -} PORTCFG_EVOUT_t; - -/* Port Interrupt 0 Level */ -typedef enum PORT_INT0LVL_enum -{ - PORT_INT0LVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - PORT_INT0LVL_LO_gc = (0x01<<0), /* Low Level */ - PORT_INT0LVL_MED_gc = (0x02<<0), /* Medium Level */ - PORT_INT0LVL_HI_gc = (0x03<<0), /* High Level */ -} PORT_INT0LVL_t; - -/* Port Interrupt 1 Level */ -typedef enum PORT_INT1LVL_enum -{ - PORT_INT1LVL_OFF_gc = (0x00<<2), /* Interrupt Disabled */ - PORT_INT1LVL_LO_gc = (0x01<<2), /* Low Level */ - PORT_INT1LVL_MED_gc = (0x02<<2), /* Medium Level */ - PORT_INT1LVL_HI_gc = (0x03<<2), /* High Level */ -} PORT_INT1LVL_t; - -/* Output/Pull Configuration */ -typedef enum PORT_OPC_enum -{ - PORT_OPC_TOTEM_gc = (0x00<<3), /* Totempole */ - PORT_OPC_BUSKEEPER_gc = (0x01<<3), /* Totempole w/ Bus keeper on Input and Output */ - PORT_OPC_PULLDOWN_gc = (0x02<<3), /* Totempole w/ Pull-down on Input */ - PORT_OPC_PULLUP_gc = (0x03<<3), /* Totempole w/ Pull-up on Input */ - PORT_OPC_WIREDOR_gc = (0x04<<3), /* Wired OR */ - PORT_OPC_WIREDAND_gc = (0x05<<3), /* Wired AND */ - PORT_OPC_WIREDORPULL_gc = (0x06<<3), /* Wired OR w/ Pull-down */ - PORT_OPC_WIREDANDPULL_gc = (0x07<<3), /* Wired AND w/ Pull-up */ -} PORT_OPC_t; - -/* Input/Sense Configuration */ -typedef enum PORT_ISC_enum -{ - PORT_ISC_BOTHEDGES_gc = (0x00<<0), /* Sense Both Edges */ - PORT_ISC_RISING_gc = (0x01<<0), /* Sense Rising Edge */ - PORT_ISC_FALLING_gc = (0x02<<0), /* Sense Falling Edge */ - PORT_ISC_LEVEL_gc = (0x03<<0), /* Sense Level (Transparent For Events) */ - PORT_ISC_INPUT_DISABLE_gc = (0x07<<0), /* Disable Digital Input Buffer */ -} PORT_ISC_t; - - -/* --------------------------------------------------------------------------- -TC - 16-bit Timer/Counter With PWM --------------------------------------------------------------------------- -*/ - -/* 16-bit Timer/Counter 0 */ -typedef struct TC0_struct -{ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t CTRLC; /* Control register C */ - register8_t CTRLD; /* Control Register D */ - register8_t CTRLE; /* Control Register E */ - register8_t reserved_0x05; - register8_t INTCTRLA; /* Interrupt Control Register A */ - register8_t INTCTRLB; /* Interrupt Control Register B */ - register8_t CTRLFCLR; /* Control Register F Clear */ - register8_t CTRLFSET; /* Control Register F Set */ - register8_t CTRLGCLR; /* Control Register G Clear */ - register8_t CTRLGSET; /* Control Register G Set */ - register8_t INTFLAGS; /* Interrupt Flag Register */ - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t TEMP; /* Temporary Register For 16-bit Access */ - register8_t reserved_0x10; - register8_t reserved_0x11; - register8_t reserved_0x12; - register8_t reserved_0x13; - register8_t reserved_0x14; - register8_t reserved_0x15; - register8_t reserved_0x16; - register8_t reserved_0x17; - register8_t reserved_0x18; - register8_t reserved_0x19; - register8_t reserved_0x1A; - register8_t reserved_0x1B; - register8_t reserved_0x1C; - register8_t reserved_0x1D; - register8_t reserved_0x1E; - register8_t reserved_0x1F; - _WORDREGISTER(CNT); /* Count */ - register8_t reserved_0x22; - register8_t reserved_0x23; - register8_t reserved_0x24; - register8_t reserved_0x25; - _WORDREGISTER(PER); /* Period */ - _WORDREGISTER(CCA); /* Compare or Capture A */ - _WORDREGISTER(CCB); /* Compare or Capture B */ - _WORDREGISTER(CCC); /* Compare or Capture C */ - _WORDREGISTER(CCD); /* Compare or Capture D */ - register8_t reserved_0x30; - register8_t reserved_0x31; - register8_t reserved_0x32; - register8_t reserved_0x33; - register8_t reserved_0x34; - register8_t reserved_0x35; - _WORDREGISTER(PERBUF); /* Period Buffer */ - _WORDREGISTER(CCABUF); /* Compare Or Capture A Buffer */ - _WORDREGISTER(CCBBUF); /* Compare Or Capture B Buffer */ - _WORDREGISTER(CCCBUF); /* Compare Or Capture C Buffer */ - _WORDREGISTER(CCDBUF); /* Compare Or Capture D Buffer */ -} TC0_t; - -/* --------------------------------------------------------------------------- -TC - 16-bit Timer/Counter With PWM --------------------------------------------------------------------------- -*/ - -/* 16-bit Timer/Counter 1 */ -typedef struct TC1_struct -{ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t CTRLC; /* Control register C */ - register8_t CTRLD; /* Control Register D */ - register8_t CTRLE; /* Control Register E */ - register8_t reserved_0x05; - register8_t INTCTRLA; /* Interrupt Control Register A */ - register8_t INTCTRLB; /* Interrupt Control Register B */ - register8_t CTRLFCLR; /* Control Register F Clear */ - register8_t CTRLFSET; /* Control Register F Set */ - register8_t CTRLGCLR; /* Control Register G Clear */ - register8_t CTRLGSET; /* Control Register G Set */ - register8_t INTFLAGS; /* Interrupt Flag Register */ - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t TEMP; /* Temporary Register For 16-bit Access */ - register8_t reserved_0x10; - register8_t reserved_0x11; - register8_t reserved_0x12; - register8_t reserved_0x13; - register8_t reserved_0x14; - register8_t reserved_0x15; - register8_t reserved_0x16; - register8_t reserved_0x17; - register8_t reserved_0x18; - register8_t reserved_0x19; - register8_t reserved_0x1A; - register8_t reserved_0x1B; - register8_t reserved_0x1C; - register8_t reserved_0x1D; - register8_t reserved_0x1E; - register8_t reserved_0x1F; - _WORDREGISTER(CNT); /* Count */ - register8_t reserved_0x22; - register8_t reserved_0x23; - register8_t reserved_0x24; - register8_t reserved_0x25; - _WORDREGISTER(PER); /* Period */ - _WORDREGISTER(CCA); /* Compare or Capture A */ - _WORDREGISTER(CCB); /* Compare or Capture B */ - register8_t reserved_0x2C; - register8_t reserved_0x2D; - register8_t reserved_0x2E; - register8_t reserved_0x2F; - register8_t reserved_0x30; - register8_t reserved_0x31; - register8_t reserved_0x32; - register8_t reserved_0x33; - register8_t reserved_0x34; - register8_t reserved_0x35; - _WORDREGISTER(PERBUF); /* Period Buffer */ - _WORDREGISTER(CCABUF); /* Compare Or Capture A Buffer */ - _WORDREGISTER(CCBBUF); /* Compare Or Capture B Buffer */ -} TC1_t; - -/* --------------------------------------------------------------------------- -TC - 16-bit Timer/Counter With PWM --------------------------------------------------------------------------- -*/ - -/* Advanced Waveform Extension */ -typedef struct AWEX_struct -{ - register8_t CTRL; /* Control Register */ - register8_t reserved_0x01; - register8_t FDEVMASK; /* Fault Detection Event Mask */ - register8_t FDCTRL; /* Fault Detection Control Register */ - register8_t STATUS; /* Status Register */ - register8_t reserved_0x05; - register8_t DTBOTH; /* Dead Time Both Sides */ - register8_t DTBOTHBUF; /* Dead Time Both Sides Buffer */ - register8_t DTLS; /* Dead Time Low Side */ - register8_t DTHS; /* Dead Time High Side */ - register8_t DTLSBUF; /* Dead Time Low Side Buffer */ - register8_t DTHSBUF; /* Dead Time High Side Buffer */ - register8_t OUTOVEN; /* Output Override Enable */ -} AWEX_t; - -/* --------------------------------------------------------------------------- -TC - 16-bit Timer/Counter With PWM --------------------------------------------------------------------------- -*/ - -/* High-Resolution Extension */ -typedef struct HIRES_struct -{ - register8_t CTRL; /* Control Register */ -} HIRES_t; - -/* Clock Selection */ -typedef enum TC_CLKSEL_enum -{ - TC_CLKSEL_OFF_gc = (0x00<<0), /* Timer Off */ - TC_CLKSEL_DIV1_gc = (0x01<<0), /* System Clock */ - TC_CLKSEL_DIV2_gc = (0x02<<0), /* System Clock / 2 */ - TC_CLKSEL_DIV4_gc = (0x03<<0), /* System Clock / 4 */ - TC_CLKSEL_DIV8_gc = (0x04<<0), /* System Clock / 8 */ - TC_CLKSEL_DIV64_gc = (0x05<<0), /* System Clock / 64 */ - TC_CLKSEL_DIV256_gc = (0x06<<0), /* System Clock / 256 */ - TC_CLKSEL_DIV1024_gc = (0x07<<0), /* System Clock / 1024 */ - TC_CLKSEL_EVCH0_gc = (0x08<<0), /* Event Channel 0 */ - TC_CLKSEL_EVCH1_gc = (0x09<<0), /* Event Channel 1 */ - TC_CLKSEL_EVCH2_gc = (0x0A<<0), /* Event Channel 2 */ - TC_CLKSEL_EVCH3_gc = (0x0B<<0), /* Event Channel 3 */ - TC_CLKSEL_EVCH4_gc = (0x0C<<0), /* Event Channel 4 */ - TC_CLKSEL_EVCH5_gc = (0x0D<<0), /* Event Channel 5 */ - TC_CLKSEL_EVCH6_gc = (0x0E<<0), /* Event Channel 6 */ - TC_CLKSEL_EVCH7_gc = (0x0F<<0), /* Event Channel 7 */ -} TC_CLKSEL_t; - -/* Waveform Generation Mode */ -typedef enum TC_WGMODE_enum -{ - TC_WGMODE_NORMAL_gc = (0x00<<0), /* Normal Mode */ - TC_WGMODE_FRQ_gc = (0x01<<0), /* Frequency Generation Mode */ - TC_WGMODE_SS_gc = (0x03<<0), /* Single Slope */ - TC_WGMODE_DS_T_gc = (0x05<<0), /* Dual Slope, Update on TOP */ - TC_WGMODE_DS_TB_gc = (0x06<<0), /* Dual Slope, Update on TOP and BOTTOM */ - TC_WGMODE_DS_B_gc = (0x07<<0), /* Dual Slope, Update on BOTTOM */ -} TC_WGMODE_t; - -/* Event Action */ -typedef enum TC_EVACT_enum -{ - TC_EVACT_OFF_gc = (0x00<<5), /* No Event Action */ - TC_EVACT_CAPT_gc = (0x01<<5), /* Input Capture */ - TC_EVACT_UPDOWN_gc = (0x02<<5), /* Externally Controlled Up/Down Count */ - TC_EVACT_QDEC_gc = (0x03<<5), /* Quadrature Decode */ - TC_EVACT_RESTART_gc = (0x04<<5), /* Restart */ - TC_EVACT_FRW_gc = (0x05<<5), /* Frequency Capture */ - TC_EVACT_PW_gc = (0x06<<5), /* Pulse-width Capture */ -} TC_EVACT_t; - -/* Event Selection */ -typedef enum TC_EVSEL_enum -{ - TC_EVSEL_OFF_gc = (0x00<<0), /* No Event Source */ - TC_EVSEL_CH0_gc = (0x08<<0), /* Event Channel 0 */ - TC_EVSEL_CH1_gc = (0x09<<0), /* Event Channel 1 */ - TC_EVSEL_CH2_gc = (0x0A<<0), /* Event Channel 2 */ - TC_EVSEL_CH3_gc = (0x0B<<0), /* Event Channel 3 */ - TC_EVSEL_CH4_gc = (0x0C<<0), /* Event Channel 4 */ - TC_EVSEL_CH5_gc = (0x0D<<0), /* Event Channel 5 */ - TC_EVSEL_CH6_gc = (0x0E<<0), /* Event Channel 6 */ - TC_EVSEL_CH7_gc = (0x0F<<0), /* Event Channel 7 */ -} TC_EVSEL_t; - -/* Error Interrupt Level */ -typedef enum TC_ERRINTLVL_enum -{ - TC_ERRINTLVL_OFF_gc = (0x00<<2), /* Interrupt Disabled */ - TC_ERRINTLVL_LO_gc = (0x01<<2), /* Low Level */ - TC_ERRINTLVL_MED_gc = (0x02<<2), /* Medium Level */ - TC_ERRINTLVL_HI_gc = (0x03<<2), /* High Level */ -} TC_ERRINTLVL_t; - -/* Overflow Interrupt Level */ -typedef enum TC_OVFINTLVL_enum -{ - TC_OVFINTLVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - TC_OVFINTLVL_LO_gc = (0x01<<0), /* Low Level */ - TC_OVFINTLVL_MED_gc = (0x02<<0), /* Medium Level */ - TC_OVFINTLVL_HI_gc = (0x03<<0), /* High Level */ -} TC_OVFINTLVL_t; - -/* Compare or Capture D Interrupt Level */ -typedef enum TC_CCDINTLVL_enum -{ - TC_CCDINTLVL_OFF_gc = (0x00<<6), /* Interrupt Disabled */ - TC_CCDINTLVL_LO_gc = (0x01<<6), /* Low Level */ - TC_CCDINTLVL_MED_gc = (0x02<<6), /* Medium Level */ - TC_CCDINTLVL_HI_gc = (0x03<<6), /* High Level */ -} TC_CCDINTLVL_t; - -/* Compare or Capture C Interrupt Level */ -typedef enum TC_CCCINTLVL_enum -{ - TC_CCCINTLVL_OFF_gc = (0x00<<4), /* Interrupt Disabled */ - TC_CCCINTLVL_LO_gc = (0x01<<4), /* Low Level */ - TC_CCCINTLVL_MED_gc = (0x02<<4), /* Medium Level */ - TC_CCCINTLVL_HI_gc = (0x03<<4), /* High Level */ -} TC_CCCINTLVL_t; - -/* Compare or Capture B Interrupt Level */ -typedef enum TC_CCBINTLVL_enum -{ - TC_CCBINTLVL_OFF_gc = (0x00<<2), /* Interrupt Disabled */ - TC_CCBINTLVL_LO_gc = (0x01<<2), /* Low Level */ - TC_CCBINTLVL_MED_gc = (0x02<<2), /* Medium Level */ - TC_CCBINTLVL_HI_gc = (0x03<<2), /* High Level */ -} TC_CCBINTLVL_t; - -/* Compare or Capture A Interrupt Level */ -typedef enum TC_CCAINTLVL_enum -{ - TC_CCAINTLVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - TC_CCAINTLVL_LO_gc = (0x01<<0), /* Low Level */ - TC_CCAINTLVL_MED_gc = (0x02<<0), /* Medium Level */ - TC_CCAINTLVL_HI_gc = (0x03<<0), /* High Level */ -} TC_CCAINTLVL_t; - -/* Timer/Counter Command */ -typedef enum TC_CMD_enum -{ - TC_CMD_NONE_gc = (0x00<<2), /* No Command */ - TC_CMD_UPDATE_gc = (0x01<<2), /* Force Update */ - TC_CMD_RESTART_gc = (0x02<<2), /* Force Restart */ - TC_CMD_RESET_gc = (0x03<<2), /* Force Hard Reset */ -} TC_CMD_t; - -/* Fault Detect Action */ -typedef enum AWEX_FDACT_enum -{ - AWEX_FDACT_NONE_gc = (0x00<<0), /* No Fault Protection */ - AWEX_FDACT_CLEAROE_gc = (0x01<<0), /* Clear Output Enable Bits */ - AWEX_FDACT_CLEARDIR_gc = (0x03<<0), /* Clear I/O Port Direction Bits */ -} AWEX_FDACT_t; - -/* High Resolution Enable */ -typedef enum HIRES_HREN_enum -{ - HIRES_HREN_NONE_gc = (0x00<<0), /* No Fault Protection */ - HIRES_HREN_TC0_gc = (0x01<<0), /* Enable High Resolution on Timer/Counter 0 */ - HIRES_HREN_TC1_gc = (0x02<<0), /* Enable High Resolution on Timer/Counter 1 */ - HIRES_HREN_BOTH_gc = (0x03<<0), /* Enable High Resolution both Timer/Counters */ -} HIRES_HREN_t; - - -/* --------------------------------------------------------------------------- -USART - Universal Asynchronous Receiver-Transmitter --------------------------------------------------------------------------- -*/ - -/* Universal Synchronous/Asynchronous Receiver/Transmitter */ -typedef struct USART_struct -{ - register8_t DATA; /* Data Register */ - register8_t STATUS; /* Status Register */ - register8_t reserved_0x02; - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t CTRLC; /* Control Register C */ - register8_t BAUDCTRLA; /* Baud Rate Control Register A */ - register8_t BAUDCTRLB; /* Baud Rate Control Register B */ -} USART_t; - -/* Receive Complete Interrupt level */ -typedef enum USART_RXCINTLVL_enum -{ - USART_RXCINTLVL_OFF_gc = (0x00<<4), /* Interrupt Disabled */ - USART_RXCINTLVL_LO_gc = (0x01<<4), /* Low Level */ - USART_RXCINTLVL_MED_gc = (0x02<<4), /* Medium Level */ - USART_RXCINTLVL_HI_gc = (0x03<<4), /* High Level */ -} USART_RXCINTLVL_t; - -/* Transmit Complete Interrupt level */ -typedef enum USART_TXCINTLVL_enum -{ - USART_TXCINTLVL_OFF_gc = (0x00<<2), /* Interrupt Disabled */ - USART_TXCINTLVL_LO_gc = (0x01<<2), /* Low Level */ - USART_TXCINTLVL_MED_gc = (0x02<<2), /* Medium Level */ - USART_TXCINTLVL_HI_gc = (0x03<<2), /* High Level */ -} USART_TXCINTLVL_t; - -/* Data Register Empty Interrupt level */ -typedef enum USART_DREINTLVL_enum -{ - USART_DREINTLVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - USART_DREINTLVL_LO_gc = (0x01<<0), /* Low Level */ - USART_DREINTLVL_MED_gc = (0x02<<0), /* Medium Level */ - USART_DREINTLVL_HI_gc = (0x03<<0), /* High Level */ -} USART_DREINTLVL_t; - -/* Character Size */ -typedef enum USART_CHSIZE_enum -{ - USART_CHSIZE_5BIT_gc = (0x00<<0), /* Character size: 5 bit */ - USART_CHSIZE_6BIT_gc = (0x01<<0), /* Character size: 6 bit */ - USART_CHSIZE_7BIT_gc = (0x02<<0), /* Character size: 7 bit */ - USART_CHSIZE_8BIT_gc = (0x03<<0), /* Character size: 8 bit */ - USART_CHSIZE_9BIT_gc = (0x07<<0), /* Character size: 9 bit */ -} USART_CHSIZE_t; - -/* Communication Mode */ -typedef enum USART_CMODE_enum -{ - USART_CMODE_ASYNCHRONOUS_gc = (0x00<<6), /* Asynchronous Mode */ - USART_CMODE_SYNCHRONOUS_gc = (0x01<<6), /* Synchronous Mode */ - USART_CMODE_IRDA_gc = (0x02<<6), /* IrDA Mode */ - USART_CMODE_MSPI_gc = (0x03<<6), /* Master SPI Mode */ -} USART_CMODE_t; - -/* Parity Mode */ -typedef enum USART_PMODE_enum -{ - USART_PMODE_DISABLED_gc = (0x00<<4), /* No Parity */ - USART_PMODE_EVEN_gc = (0x02<<4), /* Even Parity */ - USART_PMODE_ODD_gc = (0x03<<4), /* Odd Parity */ -} USART_PMODE_t; - - -/* --------------------------------------------------------------------------- -SPI - Serial Peripheral Interface --------------------------------------------------------------------------- -*/ - -/* Serial Peripheral Interface */ -typedef struct SPI_struct -{ - register8_t CTRL; /* Control Register */ - register8_t INTCTRL; /* Interrupt Control Register */ - register8_t STATUS; /* Status Register */ - register8_t DATA; /* Data Register */ -} SPI_t; - -/* SPI Mode */ -typedef enum SPI_MODE_enum -{ - SPI_MODE_0_gc = (0x00<<2), /* SPI Mode 0 */ - SPI_MODE_1_gc = (0x01<<2), /* SPI Mode 1 */ - SPI_MODE_2_gc = (0x02<<2), /* SPI Mode 2 */ - SPI_MODE_3_gc = (0x03<<2), /* SPI Mode 3 */ -} SPI_MODE_t; - -/* Prescaler setting */ -typedef enum SPI_PRESCALER_enum -{ - SPI_PRESCALER_DIV4_gc = (0x00<<0), /* System Clock / 4 */ - SPI_PRESCALER_DIV16_gc = (0x01<<0), /* System Clock / 16 */ - SPI_PRESCALER_DIV64_gc = (0x02<<0), /* System Clock / 64 */ - SPI_PRESCALER_DIV128_gc = (0x03<<0), /* System Clock / 128 */ -} SPI_PRESCALER_t; - -/* Interrupt level */ -typedef enum SPI_INTLVL_enum -{ - SPI_INTLVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - SPI_INTLVL_LO_gc = (0x01<<0), /* Low Level */ - SPI_INTLVL_MED_gc = (0x02<<0), /* Medium Level */ - SPI_INTLVL_HI_gc = (0x03<<0), /* High Level */ -} SPI_INTLVL_t; - - -/* --------------------------------------------------------------------------- -IRCOM - IR Communication Module --------------------------------------------------------------------------- -*/ - -/* IR Communication Module */ -typedef struct IRCOM_struct -{ - register8_t CTRL; /* Control Register */ - register8_t TXPLCTRL; /* IrDA Transmitter Pulse Length Control Register */ - register8_t RXPLCTRL; /* IrDA Receiver Pulse Length Control Register */ -} IRCOM_t; - -/* Event channel selection */ -typedef enum IRDA_EVSEL_enum -{ - IRDA_EVSEL_OFF_gc = (0x00<<0), /* No Event Source */ - IRDA_EVSEL_0_gc = (0x08<<0), /* Event Channel 0 */ - IRDA_EVSEL_1_gc = (0x09<<0), /* Event Channel 1 */ - IRDA_EVSEL_2_gc = (0x0A<<0), /* Event Channel 2 */ - IRDA_EVSEL_3_gc = (0x0B<<0), /* Event Channel 3 */ - IRDA_EVSEL_4_gc = (0x0C<<0), /* Event Channel 4 */ - IRDA_EVSEL_5_gc = (0x0D<<0), /* Event Channel 5 */ - IRDA_EVSEL_6_gc = (0x0E<<0), /* Event Channel 6 */ - IRDA_EVSEL_7_gc = (0x0F<<0), /* Event Channel 7 */ -} IRDA_EVSEL_t; - - -/* --------------------------------------------------------------------------- -AES - AES Module --------------------------------------------------------------------------- -*/ - -/* AES Module */ -typedef struct AES_struct -{ - register8_t CTRL; /* AES Control Register */ - register8_t STATUS; /* AES Status Register */ - register8_t STATE; /* AES State Register */ - register8_t KEY; /* AES Key Register */ - register8_t INTCTRL; /* AES Interrupt Control Register */ -} AES_t; - -/* Interrupt level */ -typedef enum AES_INTLVL_enum -{ - AES_INTLVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - AES_INTLVL_LO_gc = (0x01<<0), /* Low Level */ - AES_INTLVL_MED_gc = (0x02<<0), /* Medium Level */ - AES_INTLVL_HI_gc = (0x03<<0), /* High Level */ -} AES_INTLVL_t; - - - -/* -========================================================================== -IO Module Instances. Mapped to memory. -========================================================================== -*/ - -#define GPIO (*(GPIO_t *) 0x0000) /* General Purpose IO Registers */ -#define VPORT0 (*(VPORT_t *) 0x0010) /* Virtual Port 0 */ -#define VPORT1 (*(VPORT_t *) 0x0014) /* Virtual Port 1 */ -#define VPORT2 (*(VPORT_t *) 0x0018) /* Virtual Port 2 */ -#define VPORT3 (*(VPORT_t *) 0x001C) /* Virtual Port 3 */ -#define OCD (*(OCD_t *) 0x002E) /* On-Chip Debug System */ -#define CPU (*(CPU_t *) 0x0030) /* CPU Registers */ -#define CLK (*(CLK_t *) 0x0040) /* Clock System */ -#define SLEEP (*(SLEEP_t *) 0x0048) /* Sleep Controller */ -#define OSC (*(OSC_t *) 0x0050) /* Oscillator Control */ -#define DFLLRC32M (*(DFLL_t *) 0x0060) /* DFLL for 32MHz RC Oscillator */ -#define DFLLRC2M (*(DFLL_t *) 0x0068) /* DFLL for 2MHz RC Oscillator */ -#define PR (*(PR_t *) 0x0070) /* Power Reduction */ -#define RST (*(RST_t *) 0x0078) /* Reset Controller */ -#define WDT (*(WDT_t *) 0x0080) /* Watch-Dog Timer */ -#define MCU (*(MCU_t *) 0x0090) /* MCU Control */ -#define PMIC (*(PMIC_t *) 0x00A0) /* Programmable Interrupt Controller */ -#define PORTCFG (*(PORTCFG_t *) 0x00B0) /* Port Configuration */ -#define AES (*(AES_t *) 0x00C0) /* AES Crypto Module */ -#define DMA (*(DMA_t *) 0x0100) /* DMA Controller */ -#define EVSYS (*(EVSYS_t *) 0x0180) /* Event System */ -#define NVM (*(NVM_t *) 0x01C0) /* Non Volatile Memory Controller */ -#define ADCA (*(ADC_t *) 0x0200) /* Analog to Digital Converter A */ -#define ADCB (*(ADC_t *) 0x0240) /* Analog to Digital Converter B */ -#define DACA (*(DAC_t *) 0x0300) /* Digital to Analog Converter A */ -#define DACB (*(DAC_t *) 0x0320) /* Digital to Analog Converter B */ -#define ACA (*(AC_t *) 0x0380) /* Analog Comparator A */ -#define ACB (*(AC_t *) 0x0390) /* Analog Comparator B */ -#define RTC (*(RTC_t *) 0x0400) /* Real-Time Counter */ -#define EBI (*(EBI_t *) 0x0440) /* External Bus Interface */ -#define TWIC (*(TWI_t *) 0x0480) /* Two-Wire Interface C */ -#define TWID (*(TWI_t *) 0x0490) /* Two-Wire Interface D */ -#define TWIE (*(TWI_t *) 0x04A0) /* Two-Wire Interface E */ -#define TWIF (*(TWI_t *) 0x04B0) /* Two-Wire Interface F */ -#define PORTA (*(PORT_t *) 0x0600) /* Port A */ -#define PORTB (*(PORT_t *) 0x0620) /* Port B */ -#define PORTC (*(PORT_t *) 0x0640) /* Port C */ -#define PORTD (*(PORT_t *) 0x0660) /* Port D */ -#define PORTE (*(PORT_t *) 0x0680) /* Port E */ -#define PORTF (*(PORT_t *) 0x06A0) /* Port F */ -#define PORTH (*(PORT_t *) 0x06E0) /* Port H */ -#define PORTJ (*(PORT_t *) 0x0700) /* Port J */ -#define PORTK (*(PORT_t *) 0x0720) /* Port K */ -#define PORTQ (*(PORT_t *) 0x07C0) /* Port Q */ -#define PORTR (*(PORT_t *) 0x07E0) /* Port R */ -#define TCC0 (*(TC0_t *) 0x0800) /* Timer/Counter C0 */ -#define TCC1 (*(TC1_t *) 0x0840) /* Timer/Counter C1 */ -#define AWEXC (*(AWEX_t *) 0x0880) /* Advanced Waveform Extension C */ -#define HIRESC (*(HIRES_t *) 0x0890) /* High-Resolution Extension C */ -#define USARTC0 (*(USART_t *) 0x08A0) /* Universal Asynchronous Receiver-Transmitter C0 */ -#define USARTC1 (*(USART_t *) 0x08B0) /* Universal Asynchronous Receiver-Transmitter C1 */ -#define SPIC (*(SPI_t *) 0x08C0) /* Serial Peripheral Interface C */ -#define IRCOM (*(IRCOM_t *) 0x08F8) /* IR Communication Module */ -#define TCD0 (*(TC0_t *) 0x0900) /* Timer/Counter D0 */ -#define TCD1 (*(TC1_t *) 0x0940) /* Timer/Counter D1 */ -#define HIRESD (*(HIRES_t *) 0x0990) /* High-Resolution Extension D */ -#define USARTD0 (*(USART_t *) 0x09A0) /* Universal Asynchronous Receiver-Transmitter D0 */ -#define USARTD1 (*(USART_t *) 0x09B0) /* Universal Asynchronous Receiver-Transmitter D1 */ -#define SPID (*(SPI_t *) 0x09C0) /* Serial Peripheral Interface D */ -#define TCE0 (*(TC0_t *) 0x0A00) /* Timer/Counter E0 */ -#define TCE1 (*(TC1_t *) 0x0A40) /* Timer/Counter E1 */ -#define AWEXE (*(AWEX_t *) 0x0A80) /* Advanced Waveform Extension E */ -#define HIRESE (*(HIRES_t *) 0x0A90) /* High-Resolution Extension E */ -#define USARTE0 (*(USART_t *) 0x0AA0) /* Universal Asynchronous Receiver-Transmitter E0 */ -#define USARTE1 (*(USART_t *) 0x0AB0) /* Universal Asynchronous Receiver-Transmitter E1 */ -#define SPIE (*(SPI_t *) 0x0AC0) /* Serial Peripheral Interface E */ -#define TCF0 (*(TC0_t *) 0x0B00) /* Timer/Counter F0 */ -#define TCF1 (*(TC1_t *) 0x0B40) /* Timer/Counter F1 */ -#define HIRESF (*(HIRES_t *) 0x0B90) /* High-Resolution Extension F */ -#define USARTF0 (*(USART_t *) 0x0BA0) /* Universal Asynchronous Receiver-Transmitter F0 */ -#define USARTF1 (*(USART_t *) 0x0BB0) /* Universal Asynchronous Receiver-Transmitter F1 */ -#define SPIF (*(SPI_t *) 0x0BC0) /* Serial Peripheral Interface F */ - - -#endif /* !defined (__ASSEMBLER__) */ - - -/* ========== Flattened fully qualified IO register names ========== */ - -/* GPIO - General Purpose IO Registers */ -#define GPIO_GPIO0 _SFR_MEM8(0x0000) -#define GPIO_GPIO1 _SFR_MEM8(0x0001) -#define GPIO_GPIO2 _SFR_MEM8(0x0002) -#define GPIO_GPIO3 _SFR_MEM8(0x0003) -#define GPIO_GPIO4 _SFR_MEM8(0x0004) -#define GPIO_GPIO5 _SFR_MEM8(0x0005) -#define GPIO_GPIO6 _SFR_MEM8(0x0006) -#define GPIO_GPIO7 _SFR_MEM8(0x0007) -#define GPIO_GPIO8 _SFR_MEM8(0x0008) -#define GPIO_GPIO9 _SFR_MEM8(0x0009) -#define GPIO_GPIOA _SFR_MEM8(0x000A) -#define GPIO_GPIOB _SFR_MEM8(0x000B) -#define GPIO_GPIOC _SFR_MEM8(0x000C) -#define GPIO_GPIOD _SFR_MEM8(0x000D) -#define GPIO_GPIOE _SFR_MEM8(0x000E) -#define GPIO_GPIOF _SFR_MEM8(0x000F) - -/* VPORT0 - Virtual Port 0 */ -#define VPORT0_DIR _SFR_MEM8(0x0010) -#define VPORT0_OUT _SFR_MEM8(0x0011) -#define VPORT0_IN _SFR_MEM8(0x0012) -#define VPORT0_INTFLAGS _SFR_MEM8(0x0013) - -/* VPORT1 - Virtual Port 1 */ -#define VPORT1_DIR _SFR_MEM8(0x0014) -#define VPORT1_OUT _SFR_MEM8(0x0015) -#define VPORT1_IN _SFR_MEM8(0x0016) -#define VPORT1_INTFLAGS _SFR_MEM8(0x0017) - -/* VPORT2 - Virtual Port 2 */ -#define VPORT2_DIR _SFR_MEM8(0x0018) -#define VPORT2_OUT _SFR_MEM8(0x0019) -#define VPORT2_IN _SFR_MEM8(0x001A) -#define VPORT2_INTFLAGS _SFR_MEM8(0x001B) - -/* VPORT3 - Virtual Port 3 */ -#define VPORT3_DIR _SFR_MEM8(0x001C) -#define VPORT3_OUT _SFR_MEM8(0x001D) -#define VPORT3_IN _SFR_MEM8(0x001E) -#define VPORT3_INTFLAGS _SFR_MEM8(0x001F) - -/* OCD - On-Chip Debug System */ -#define OCD_OCDR0 _SFR_MEM8(0x002E) -#define OCD_OCDR1 _SFR_MEM8(0x002F) - -/* CPU - CPU Registers */ -#define CPU_CCP _SFR_MEM8(0x0034) -#define CPU_RAMPD _SFR_MEM8(0x0038) -#define CPU_RAMPX _SFR_MEM8(0x0039) -#define CPU_RAMPY _SFR_MEM8(0x003A) -#define CPU_RAMPZ _SFR_MEM8(0x003B) -#define CPU_EIND _SFR_MEM8(0x003C) -#define CPU_SPL _SFR_MEM8(0x003D) -#define CPU_SPH _SFR_MEM8(0x003E) -#define CPU_SREG _SFR_MEM8(0x003F) - -/* CLK - Clock System */ -#define CLK_CTRL _SFR_MEM8(0x0040) -#define CLK_PSCTRL _SFR_MEM8(0x0041) -#define CLK_LOCK _SFR_MEM8(0x0042) -#define CLK_RTCCTRL _SFR_MEM8(0x0043) - -/* SLEEP - Sleep Controller */ -#define SLEEP_CTRL _SFR_MEM8(0x0048) - -/* OSC - Oscillator Control */ -#define OSC_CTRL _SFR_MEM8(0x0050) -#define OSC_STATUS _SFR_MEM8(0x0051) -#define OSC_XOSCCTRL _SFR_MEM8(0x0052) -#define OSC_XOSCFAIL _SFR_MEM8(0x0053) -#define OSC_RC32KCAL _SFR_MEM8(0x0054) -#define OSC_PLLCTRL _SFR_MEM8(0x0055) -#define OSC_DFLLCTRL _SFR_MEM8(0x0056) - -/* DFLLRC32M - DFLL for 32MHz RC Oscillator */ -#define DFLLRC32M_CTRL _SFR_MEM8(0x0060) -#define DFLLRC32M_CALA _SFR_MEM8(0x0062) -#define DFLLRC32M_CALB _SFR_MEM8(0x0063) -#define DFLLRC32M_OSCCNT0 _SFR_MEM8(0x0064) -#define DFLLRC32M_OSCCNT1 _SFR_MEM8(0x0065) -#define DFLLRC32M_OSCCNT2 _SFR_MEM8(0x0066) - -/* DFLLRC2M - DFLL for 2MHz RC Oscillator */ -#define DFLLRC2M_CTRL _SFR_MEM8(0x0068) -#define DFLLRC2M_CALA _SFR_MEM8(0x006A) -#define DFLLRC2M_CALB _SFR_MEM8(0x006B) -#define DFLLRC2M_OSCCNT0 _SFR_MEM8(0x006C) -#define DFLLRC2M_OSCCNT1 _SFR_MEM8(0x006D) -#define DFLLRC2M_OSCCNT2 _SFR_MEM8(0x006E) - -/* PR - Power Reduction */ -#define PR_PR _SFR_MEM8(0x0070) -#define PR_PRPA _SFR_MEM8(0x0071) -#define PR_PRPB _SFR_MEM8(0x0072) -#define PR_PRPC _SFR_MEM8(0x0073) -#define PR_PRPD _SFR_MEM8(0x0074) -#define PR_PRPE _SFR_MEM8(0x0075) -#define PR_PRPF _SFR_MEM8(0x0076) - -/* RST - Reset Controller */ -#define RST_STATUS _SFR_MEM8(0x0078) -#define RST_CTRL _SFR_MEM8(0x0079) - -/* WDT - Watch-Dog Timer */ -#define WDT_CTRL _SFR_MEM8(0x0080) -#define WDT_WINCTRL _SFR_MEM8(0x0081) -#define WDT_STATUS _SFR_MEM8(0x0082) - -/* MCU - MCU Control */ -#define MCU_DEVID0 _SFR_MEM8(0x0090) -#define MCU_DEVID1 _SFR_MEM8(0x0091) -#define MCU_DEVID2 _SFR_MEM8(0x0092) -#define MCU_REVID _SFR_MEM8(0x0093) -#define MCU_JTAGUID _SFR_MEM8(0x0094) -#define MCU_MCUCR _SFR_MEM8(0x0096) -#define MCU_EVSYSLOCK _SFR_MEM8(0x0098) -#define MCU_AWEXLOCK _SFR_MEM8(0x0099) - -/* PMIC - Programmable Interrupt Controller */ -#define PMIC_STATUS _SFR_MEM8(0x00A0) -#define PMIC_INTPRI _SFR_MEM8(0x00A1) -#define PMIC_CTRL _SFR_MEM8(0x00A2) - -/* PORTCFG - Port Configuration */ -#define PORTCFG_MPCMASK _SFR_MEM8(0x00B0) -#define PORTCFG_VPCTRLA _SFR_MEM8(0x00B2) -#define PORTCFG_VPCTRLB _SFR_MEM8(0x00B3) -#define PORTCFG_CLKEVOUT _SFR_MEM8(0x00B4) - -/* AES - AES Crypto Module */ -#define AES_CTRL _SFR_MEM8(0x00C0) -#define AES_STATUS _SFR_MEM8(0x00C1) -#define AES_STATE _SFR_MEM8(0x00C2) -#define AES_KEY _SFR_MEM8(0x00C3) -#define AES_INTCTRL _SFR_MEM8(0x00C4) - -/* DMA - DMA Controller */ -#define DMA_CTRL _SFR_MEM8(0x0100) -#define DMA_INTFLAGS _SFR_MEM8(0x0103) -#define DMA_STATUS _SFR_MEM8(0x0104) -#define DMA_TEMP _SFR_MEM16(0x0106) -#define DMA_CH0_CTRLA _SFR_MEM8(0x0110) -#define DMA_CH0_CTRLB _SFR_MEM8(0x0111) -#define DMA_CH0_ADDRCTRL _SFR_MEM8(0x0112) -#define DMA_CH0_TRIGSRC _SFR_MEM8(0x0113) -#define DMA_CH0_TRFCNT _SFR_MEM16(0x0114) -#define DMA_CH0_REPCNT _SFR_MEM8(0x0116) -#define DMA_CH0_SRCADDR0 _SFR_MEM8(0x0118) -#define DMA_CH0_SRCADDR1 _SFR_MEM8(0x0119) -#define DMA_CH0_SRCADDR2 _SFR_MEM8(0x011A) -#define DMA_CH0_DESTADDR0 _SFR_MEM8(0x011C) -#define DMA_CH0_DESTADDR1 _SFR_MEM8(0x011D) -#define DMA_CH0_DESTADDR2 _SFR_MEM8(0x011E) -#define DMA_CH1_CTRLA _SFR_MEM8(0x0120) -#define DMA_CH1_CTRLB _SFR_MEM8(0x0121) -#define DMA_CH1_ADDRCTRL _SFR_MEM8(0x0122) -#define DMA_CH1_TRIGSRC _SFR_MEM8(0x0123) -#define DMA_CH1_TRFCNT _SFR_MEM16(0x0124) -#define DMA_CH1_REPCNT _SFR_MEM8(0x0126) -#define DMA_CH1_SRCADDR0 _SFR_MEM8(0x0128) -#define DMA_CH1_SRCADDR1 _SFR_MEM8(0x0129) -#define DMA_CH1_SRCADDR2 _SFR_MEM8(0x012A) -#define DMA_CH1_DESTADDR0 _SFR_MEM8(0x012C) -#define DMA_CH1_DESTADDR1 _SFR_MEM8(0x012D) -#define DMA_CH1_DESTADDR2 _SFR_MEM8(0x012E) -#define DMA_CH2_CTRLA _SFR_MEM8(0x0130) -#define DMA_CH2_CTRLB _SFR_MEM8(0x0131) -#define DMA_CH2_ADDRCTRL _SFR_MEM8(0x0132) -#define DMA_CH2_TRIGSRC _SFR_MEM8(0x0133) -#define DMA_CH2_TRFCNT _SFR_MEM16(0x0134) -#define DMA_CH2_REPCNT _SFR_MEM8(0x0136) -#define DMA_CH2_SRCADDR0 _SFR_MEM8(0x0138) -#define DMA_CH2_SRCADDR1 _SFR_MEM8(0x0139) -#define DMA_CH2_SRCADDR2 _SFR_MEM8(0x013A) -#define DMA_CH2_DESTADDR0 _SFR_MEM8(0x013C) -#define DMA_CH2_DESTADDR1 _SFR_MEM8(0x013D) -#define DMA_CH2_DESTADDR2 _SFR_MEM8(0x013E) -#define DMA_CH3_CTRLA _SFR_MEM8(0x0140) -#define DMA_CH3_CTRLB _SFR_MEM8(0x0141) -#define DMA_CH3_ADDRCTRL _SFR_MEM8(0x0142) -#define DMA_CH3_TRIGSRC _SFR_MEM8(0x0143) -#define DMA_CH3_TRFCNT _SFR_MEM16(0x0144) -#define DMA_CH3_REPCNT _SFR_MEM8(0x0146) -#define DMA_CH3_SRCADDR0 _SFR_MEM8(0x0148) -#define DMA_CH3_SRCADDR1 _SFR_MEM8(0x0149) -#define DMA_CH3_SRCADDR2 _SFR_MEM8(0x014A) -#define DMA_CH3_DESTADDR0 _SFR_MEM8(0x014C) -#define DMA_CH3_DESTADDR1 _SFR_MEM8(0x014D) -#define DMA_CH3_DESTADDR2 _SFR_MEM8(0x014E) - -/* EVSYS - Event System */ -#define EVSYS_CH0MUX _SFR_MEM8(0x0180) -#define EVSYS_CH1MUX _SFR_MEM8(0x0181) -#define EVSYS_CH2MUX _SFR_MEM8(0x0182) -#define EVSYS_CH3MUX _SFR_MEM8(0x0183) -#define EVSYS_CH4MUX _SFR_MEM8(0x0184) -#define EVSYS_CH5MUX _SFR_MEM8(0x0185) -#define EVSYS_CH6MUX _SFR_MEM8(0x0186) -#define EVSYS_CH7MUX _SFR_MEM8(0x0187) -#define EVSYS_CH0CTRL _SFR_MEM8(0x0188) -#define EVSYS_CH1CTRL _SFR_MEM8(0x0189) -#define EVSYS_CH2CTRL _SFR_MEM8(0x018A) -#define EVSYS_CH3CTRL _SFR_MEM8(0x018B) -#define EVSYS_CH4CTRL _SFR_MEM8(0x018C) -#define EVSYS_CH5CTRL _SFR_MEM8(0x018D) -#define EVSYS_CH6CTRL _SFR_MEM8(0x018E) -#define EVSYS_CH7CTRL _SFR_MEM8(0x018F) -#define EVSYS_STROBE _SFR_MEM8(0x0190) -#define EVSYS_DATA _SFR_MEM8(0x0191) - -/* NVM - Non Volatile Memory Controller */ -#define NVM_ADDR0 _SFR_MEM8(0x01C0) -#define NVM_ADDR1 _SFR_MEM8(0x01C1) -#define NVM_ADDR2 _SFR_MEM8(0x01C2) -#define NVM_DATA0 _SFR_MEM8(0x01C4) -#define NVM_DATA1 _SFR_MEM8(0x01C5) -#define NVM_DATA2 _SFR_MEM8(0x01C6) -#define NVM_CMD _SFR_MEM8(0x01CA) -#define NVM_CTRLA _SFR_MEM8(0x01CB) -#define NVM_CTRLB _SFR_MEM8(0x01CC) -#define NVM_INTCTRL _SFR_MEM8(0x01CD) -#define NVM_STATUS _SFR_MEM8(0x01CF) -#define NVM_LOCKBITS _SFR_MEM8(0x01D0) - -/* ADCA - Analog to Digital Converter A */ -#define ADCA_CTRLA _SFR_MEM8(0x0200) -#define ADCA_CTRLB _SFR_MEM8(0x0201) -#define ADCA_REFCTRL _SFR_MEM8(0x0202) -#define ADCA_EVCTRL _SFR_MEM8(0x0203) -#define ADCA_PRESCALER _SFR_MEM8(0x0204) -#define ADCA_CALCTRL _SFR_MEM8(0x0205) -#define ADCA_INTFLAGS _SFR_MEM8(0x0206) -#define ADCA_CALIB _SFR_MEM8(0x020C) -#define ADCA_CH0RES _SFR_MEM16(0x0210) -#define ADCA_CH1RES _SFR_MEM16(0x0212) -#define ADCA_CH2RES _SFR_MEM16(0x0214) -#define ADCA_CH3RES _SFR_MEM16(0x0216) -#define ADCA_CMP _SFR_MEM16(0x0218) -#define ADCA_CH0_CTRL _SFR_MEM8(0x0220) -#define ADCA_CH0_MUXCTRL _SFR_MEM8(0x0221) -#define ADCA_CH0_INTCTRL _SFR_MEM8(0x0222) -#define ADCA_CH0_INTFLAGS _SFR_MEM8(0x0223) -#define ADCA_CH0_RES _SFR_MEM16(0x0224) -#define ADCA_CH1_CTRL _SFR_MEM8(0x0228) -#define ADCA_CH1_MUXCTRL _SFR_MEM8(0x0229) -#define ADCA_CH1_INTCTRL _SFR_MEM8(0x022A) -#define ADCA_CH1_INTFLAGS _SFR_MEM8(0x022B) -#define ADCA_CH1_RES _SFR_MEM16(0x022C) -#define ADCA_CH2_CTRL _SFR_MEM8(0x0230) -#define ADCA_CH2_MUXCTRL _SFR_MEM8(0x0231) -#define ADCA_CH2_INTCTRL _SFR_MEM8(0x0232) -#define ADCA_CH2_INTFLAGS _SFR_MEM8(0x0233) -#define ADCA_CH2_RES _SFR_MEM16(0x0234) -#define ADCA_CH3_CTRL _SFR_MEM8(0x0238) -#define ADCA_CH3_MUXCTRL _SFR_MEM8(0x0239) -#define ADCA_CH3_INTCTRL _SFR_MEM8(0x023A) -#define ADCA_CH3_INTFLAGS _SFR_MEM8(0x023B) -#define ADCA_CH3_RES _SFR_MEM16(0x023C) - -/* ADCB - Analog to Digital Converter B */ -#define ADCB_CTRLA _SFR_MEM8(0x0240) -#define ADCB_CTRLB _SFR_MEM8(0x0241) -#define ADCB_REFCTRL _SFR_MEM8(0x0242) -#define ADCB_EVCTRL _SFR_MEM8(0x0243) -#define ADCB_PRESCALER _SFR_MEM8(0x0244) -#define ADCB_CALCTRL _SFR_MEM8(0x0245) -#define ADCB_INTFLAGS _SFR_MEM8(0x0246) -#define ADCB_CALIB _SFR_MEM8(0x024C) -#define ADCB_CH0RES _SFR_MEM16(0x0250) -#define ADCB_CH1RES _SFR_MEM16(0x0252) -#define ADCB_CH2RES _SFR_MEM16(0x0254) -#define ADCB_CH3RES _SFR_MEM16(0x0256) -#define ADCB_CMP _SFR_MEM16(0x0258) -#define ADCB_CH0_CTRL _SFR_MEM8(0x0260) -#define ADCB_CH0_MUXCTRL _SFR_MEM8(0x0261) -#define ADCB_CH0_INTCTRL _SFR_MEM8(0x0262) -#define ADCB_CH0_INTFLAGS _SFR_MEM8(0x0263) -#define ADCB_CH0_RES _SFR_MEM16(0x0264) -#define ADCB_CH1_CTRL _SFR_MEM8(0x0268) -#define ADCB_CH1_MUXCTRL _SFR_MEM8(0x0269) -#define ADCB_CH1_INTCTRL _SFR_MEM8(0x026A) -#define ADCB_CH1_INTFLAGS _SFR_MEM8(0x026B) -#define ADCB_CH1_RES _SFR_MEM16(0x026C) -#define ADCB_CH2_CTRL _SFR_MEM8(0x0270) -#define ADCB_CH2_MUXCTRL _SFR_MEM8(0x0271) -#define ADCB_CH2_INTCTRL _SFR_MEM8(0x0272) -#define ADCB_CH2_INTFLAGS _SFR_MEM8(0x0273) -#define ADCB_CH2_RES _SFR_MEM16(0x0274) -#define ADCB_CH3_CTRL _SFR_MEM8(0x0278) -#define ADCB_CH3_MUXCTRL _SFR_MEM8(0x0279) -#define ADCB_CH3_INTCTRL _SFR_MEM8(0x027A) -#define ADCB_CH3_INTFLAGS _SFR_MEM8(0x027B) -#define ADCB_CH3_RES _SFR_MEM16(0x027C) - -/* DACA - Digital to Analog Converter A */ -#define DACA_CTRLA _SFR_MEM8(0x0300) -#define DACA_CTRLB _SFR_MEM8(0x0301) -#define DACA_CTRLC _SFR_MEM8(0x0302) -#define DACA_EVCTRL _SFR_MEM8(0x0303) -#define DACA_TIMCTRL _SFR_MEM8(0x0304) -#define DACA_STATUS _SFR_MEM8(0x0305) -#define DACA_GAINCAL _SFR_MEM8(0x0308) -#define DACA_OFFSETCAL _SFR_MEM8(0x0309) -#define DACA_CH0DATA _SFR_MEM16(0x0318) -#define DACA_CH1DATA _SFR_MEM16(0x031A) - -/* DACB - Digital to Analog Converter B */ -#define DACB_CTRLA _SFR_MEM8(0x0320) -#define DACB_CTRLB _SFR_MEM8(0x0321) -#define DACB_CTRLC _SFR_MEM8(0x0322) -#define DACB_EVCTRL _SFR_MEM8(0x0323) -#define DACB_TIMCTRL _SFR_MEM8(0x0324) -#define DACB_STATUS _SFR_MEM8(0x0325) -#define DACB_GAINCAL _SFR_MEM8(0x0328) -#define DACB_OFFSETCAL _SFR_MEM8(0x0329) -#define DACB_CH0DATA _SFR_MEM16(0x0338) -#define DACB_CH1DATA _SFR_MEM16(0x033A) - -/* ACA - Analog Comparator A */ -#define ACA_AC0CTRL _SFR_MEM8(0x0380) -#define ACA_AC1CTRL _SFR_MEM8(0x0381) -#define ACA_AC0MUXCTRL _SFR_MEM8(0x0382) -#define ACA_AC1MUXCTRL _SFR_MEM8(0x0383) -#define ACA_CTRLA _SFR_MEM8(0x0384) -#define ACA_CTRLB _SFR_MEM8(0x0385) -#define ACA_WINCTRL _SFR_MEM8(0x0386) -#define ACA_STATUS _SFR_MEM8(0x0387) - -/* ACB - Analog Comparator B */ -#define ACB_AC0CTRL _SFR_MEM8(0x0390) -#define ACB_AC1CTRL _SFR_MEM8(0x0391) -#define ACB_AC0MUXCTRL _SFR_MEM8(0x0392) -#define ACB_AC1MUXCTRL _SFR_MEM8(0x0393) -#define ACB_CTRLA _SFR_MEM8(0x0394) -#define ACB_CTRLB _SFR_MEM8(0x0395) -#define ACB_WINCTRL _SFR_MEM8(0x0396) -#define ACB_STATUS _SFR_MEM8(0x0397) - -/* RTC - Real-Time Counter */ -#define RTC_CTRL _SFR_MEM8(0x0400) -#define RTC_STATUS _SFR_MEM8(0x0401) -#define RTC_INTCTRL _SFR_MEM8(0x0402) -#define RTC_INTFLAGS _SFR_MEM8(0x0403) -#define RTC_TEMP _SFR_MEM8(0x0404) -#define RTC_CNT _SFR_MEM16(0x0408) -#define RTC_PER _SFR_MEM16(0x040A) -#define RTC_COMP _SFR_MEM16(0x040C) - -/* EBI - External Bus Interface */ -#define EBI_CTRL _SFR_MEM8(0x0440) -#define EBI_SDRAMCTRLA _SFR_MEM8(0x0441) -#define EBI_REFRESH _SFR_MEM16(0x0444) -#define EBI_INITDLY _SFR_MEM16(0x0446) -#define EBI_SDRAMCTRLB _SFR_MEM8(0x0448) -#define EBI_SDRAMCTRLC _SFR_MEM8(0x0449) -#define EBI_CS0_CTRLA _SFR_MEM8(0x0450) -#define EBI_CS0_CTRLB _SFR_MEM8(0x0451) -#define EBI_CS0_BASEADDR _SFR_MEM16(0x0452) -#define EBI_CS1_CTRLA _SFR_MEM8(0x0454) -#define EBI_CS1_CTRLB _SFR_MEM8(0x0455) -#define EBI_CS1_BASEADDR _SFR_MEM16(0x0456) -#define EBI_CS2_CTRLA _SFR_MEM8(0x0458) -#define EBI_CS2_CTRLB _SFR_MEM8(0x0459) -#define EBI_CS2_BASEADDR _SFR_MEM16(0x045A) -#define EBI_CS3_CTRLA _SFR_MEM8(0x045C) -#define EBI_CS3_CTRLB _SFR_MEM8(0x045D) -#define EBI_CS3_BASEADDR _SFR_MEM16(0x045E) - -/* TWIC - Two-Wire Interface C */ -#define TWIC_CTRL _SFR_MEM8(0x0480) -#define TWIC_MASTER_CTRLA _SFR_MEM8(0x0481) -#define TWIC_MASTER_CTRLB _SFR_MEM8(0x0482) -#define TWIC_MASTER_CTRLC _SFR_MEM8(0x0483) -#define TWIC_MASTER_STATUS _SFR_MEM8(0x0484) -#define TWIC_MASTER_BAUD _SFR_MEM8(0x0485) -#define TWIC_MASTER_ADDR _SFR_MEM8(0x0486) -#define TWIC_MASTER_DATA _SFR_MEM8(0x0487) -#define TWIC_SLAVE_CTRLA _SFR_MEM8(0x0488) -#define TWIC_SLAVE_CTRLB _SFR_MEM8(0x0489) -#define TWIC_SLAVE_STATUS _SFR_MEM8(0x048A) -#define TWIC_SLAVE_ADDR _SFR_MEM8(0x048B) -#define TWIC_SLAVE_DATA _SFR_MEM8(0x048C) - -/* TWID - Two-Wire Interface D */ -#define TWID_CTRL _SFR_MEM8(0x0490) -#define TWID_MASTER_CTRLA _SFR_MEM8(0x0491) -#define TWID_MASTER_CTRLB _SFR_MEM8(0x0492) -#define TWID_MASTER_CTRLC _SFR_MEM8(0x0493) -#define TWID_MASTER_STATUS _SFR_MEM8(0x0494) -#define TWID_MASTER_BAUD _SFR_MEM8(0x0495) -#define TWID_MASTER_ADDR _SFR_MEM8(0x0496) -#define TWID_MASTER_DATA _SFR_MEM8(0x0497) -#define TWID_SLAVE_CTRLA _SFR_MEM8(0x0498) -#define TWID_SLAVE_CTRLB _SFR_MEM8(0x0499) -#define TWID_SLAVE_STATUS _SFR_MEM8(0x049A) -#define TWID_SLAVE_ADDR _SFR_MEM8(0x049B) -#define TWID_SLAVE_DATA _SFR_MEM8(0x049C) - -/* TWIE - Two-Wire Interface E */ -#define TWIE_CTRL _SFR_MEM8(0x04A0) -#define TWIE_MASTER_CTRLA _SFR_MEM8(0x04A1) -#define TWIE_MASTER_CTRLB _SFR_MEM8(0x04A2) -#define TWIE_MASTER_CTRLC _SFR_MEM8(0x04A3) -#define TWIE_MASTER_STATUS _SFR_MEM8(0x04A4) -#define TWIE_MASTER_BAUD _SFR_MEM8(0x04A5) -#define TWIE_MASTER_ADDR _SFR_MEM8(0x04A6) -#define TWIE_MASTER_DATA _SFR_MEM8(0x04A7) -#define TWIE_SLAVE_CTRLA _SFR_MEM8(0x04A8) -#define TWIE_SLAVE_CTRLB _SFR_MEM8(0x04A9) -#define TWIE_SLAVE_STATUS _SFR_MEM8(0x04AA) -#define TWIE_SLAVE_ADDR _SFR_MEM8(0x04AB) -#define TWIE_SLAVE_DATA _SFR_MEM8(0x04AC) - -/* TWIF - Two-Wire Interface F */ -#define TWIF_CTRL _SFR_MEM8(0x04B0) -#define TWIF_MASTER_CTRLA _SFR_MEM8(0x04B1) -#define TWIF_MASTER_CTRLB _SFR_MEM8(0x04B2) -#define TWIF_MASTER_CTRLC _SFR_MEM8(0x04B3) -#define TWIF_MASTER_STATUS _SFR_MEM8(0x04B4) -#define TWIF_MASTER_BAUD _SFR_MEM8(0x04B5) -#define TWIF_MASTER_ADDR _SFR_MEM8(0x04B6) -#define TWIF_MASTER_DATA _SFR_MEM8(0x04B7) -#define TWIF_SLAVE_CTRLA _SFR_MEM8(0x04B8) -#define TWIF_SLAVE_CTRLB _SFR_MEM8(0x04B9) -#define TWIF_SLAVE_STATUS _SFR_MEM8(0x04BA) -#define TWIF_SLAVE_ADDR _SFR_MEM8(0x04BB) -#define TWIF_SLAVE_DATA _SFR_MEM8(0x04BC) - -/* PORTA - Port A */ -#define PORTA_DIR _SFR_MEM8(0x0600) -#define PORTA_DIRSET _SFR_MEM8(0x0601) -#define PORTA_DIRCLR _SFR_MEM8(0x0602) -#define PORTA_DIRTGL _SFR_MEM8(0x0603) -#define PORTA_OUT _SFR_MEM8(0x0604) -#define PORTA_OUTSET _SFR_MEM8(0x0605) -#define PORTA_OUTCLR _SFR_MEM8(0x0606) -#define PORTA_OUTTGL _SFR_MEM8(0x0607) -#define PORTA_IN _SFR_MEM8(0x0608) -#define PORTA_INTCTRL _SFR_MEM8(0x0609) -#define PORTA_INT0MASK _SFR_MEM8(0x060A) -#define PORTA_INT1MASK _SFR_MEM8(0x060B) -#define PORTA_INTFLAGS _SFR_MEM8(0x060C) -#define PORTA_PIN0CTRL _SFR_MEM8(0x0610) -#define PORTA_PIN1CTRL _SFR_MEM8(0x0611) -#define PORTA_PIN2CTRL _SFR_MEM8(0x0612) -#define PORTA_PIN3CTRL _SFR_MEM8(0x0613) -#define PORTA_PIN4CTRL _SFR_MEM8(0x0614) -#define PORTA_PIN5CTRL _SFR_MEM8(0x0615) -#define PORTA_PIN6CTRL _SFR_MEM8(0x0616) -#define PORTA_PIN7CTRL _SFR_MEM8(0x0617) - -/* PORTB - Port B */ -#define PORTB_DIR _SFR_MEM8(0x0620) -#define PORTB_DIRSET _SFR_MEM8(0x0621) -#define PORTB_DIRCLR _SFR_MEM8(0x0622) -#define PORTB_DIRTGL _SFR_MEM8(0x0623) -#define PORTB_OUT _SFR_MEM8(0x0624) -#define PORTB_OUTSET _SFR_MEM8(0x0625) -#define PORTB_OUTCLR _SFR_MEM8(0x0626) -#define PORTB_OUTTGL _SFR_MEM8(0x0627) -#define PORTB_IN _SFR_MEM8(0x0628) -#define PORTB_INTCTRL _SFR_MEM8(0x0629) -#define PORTB_INT0MASK _SFR_MEM8(0x062A) -#define PORTB_INT1MASK _SFR_MEM8(0x062B) -#define PORTB_INTFLAGS _SFR_MEM8(0x062C) -#define PORTB_PIN0CTRL _SFR_MEM8(0x0630) -#define PORTB_PIN1CTRL _SFR_MEM8(0x0631) -#define PORTB_PIN2CTRL _SFR_MEM8(0x0632) -#define PORTB_PIN3CTRL _SFR_MEM8(0x0633) -#define PORTB_PIN4CTRL _SFR_MEM8(0x0634) -#define PORTB_PIN5CTRL _SFR_MEM8(0x0635) -#define PORTB_PIN6CTRL _SFR_MEM8(0x0636) -#define PORTB_PIN7CTRL _SFR_MEM8(0x0637) - -/* PORTC - Port C */ -#define PORTC_DIR _SFR_MEM8(0x0640) -#define PORTC_DIRSET _SFR_MEM8(0x0641) -#define PORTC_DIRCLR _SFR_MEM8(0x0642) -#define PORTC_DIRTGL _SFR_MEM8(0x0643) -#define PORTC_OUT _SFR_MEM8(0x0644) -#define PORTC_OUTSET _SFR_MEM8(0x0645) -#define PORTC_OUTCLR _SFR_MEM8(0x0646) -#define PORTC_OUTTGL _SFR_MEM8(0x0647) -#define PORTC_IN _SFR_MEM8(0x0648) -#define PORTC_INTCTRL _SFR_MEM8(0x0649) -#define PORTC_INT0MASK _SFR_MEM8(0x064A) -#define PORTC_INT1MASK _SFR_MEM8(0x064B) -#define PORTC_INTFLAGS _SFR_MEM8(0x064C) -#define PORTC_PIN0CTRL _SFR_MEM8(0x0650) -#define PORTC_PIN1CTRL _SFR_MEM8(0x0651) -#define PORTC_PIN2CTRL _SFR_MEM8(0x0652) -#define PORTC_PIN3CTRL _SFR_MEM8(0x0653) -#define PORTC_PIN4CTRL _SFR_MEM8(0x0654) -#define PORTC_PIN5CTRL _SFR_MEM8(0x0655) -#define PORTC_PIN6CTRL _SFR_MEM8(0x0656) -#define PORTC_PIN7CTRL _SFR_MEM8(0x0657) - -/* PORTD - Port D */ -#define PORTD_DIR _SFR_MEM8(0x0660) -#define PORTD_DIRSET _SFR_MEM8(0x0661) -#define PORTD_DIRCLR _SFR_MEM8(0x0662) -#define PORTD_DIRTGL _SFR_MEM8(0x0663) -#define PORTD_OUT _SFR_MEM8(0x0664) -#define PORTD_OUTSET _SFR_MEM8(0x0665) -#define PORTD_OUTCLR _SFR_MEM8(0x0666) -#define PORTD_OUTTGL _SFR_MEM8(0x0667) -#define PORTD_IN _SFR_MEM8(0x0668) -#define PORTD_INTCTRL _SFR_MEM8(0x0669) -#define PORTD_INT0MASK _SFR_MEM8(0x066A) -#define PORTD_INT1MASK _SFR_MEM8(0x066B) -#define PORTD_INTFLAGS _SFR_MEM8(0x066C) -#define PORTD_PIN0CTRL _SFR_MEM8(0x0670) -#define PORTD_PIN1CTRL _SFR_MEM8(0x0671) -#define PORTD_PIN2CTRL _SFR_MEM8(0x0672) -#define PORTD_PIN3CTRL _SFR_MEM8(0x0673) -#define PORTD_PIN4CTRL _SFR_MEM8(0x0674) -#define PORTD_PIN5CTRL _SFR_MEM8(0x0675) -#define PORTD_PIN6CTRL _SFR_MEM8(0x0676) -#define PORTD_PIN7CTRL _SFR_MEM8(0x0677) - -/* PORTE - Port E */ -#define PORTE_DIR _SFR_MEM8(0x0680) -#define PORTE_DIRSET _SFR_MEM8(0x0681) -#define PORTE_DIRCLR _SFR_MEM8(0x0682) -#define PORTE_DIRTGL _SFR_MEM8(0x0683) -#define PORTE_OUT _SFR_MEM8(0x0684) -#define PORTE_OUTSET _SFR_MEM8(0x0685) -#define PORTE_OUTCLR _SFR_MEM8(0x0686) -#define PORTE_OUTTGL _SFR_MEM8(0x0687) -#define PORTE_IN _SFR_MEM8(0x0688) -#define PORTE_INTCTRL _SFR_MEM8(0x0689) -#define PORTE_INT0MASK _SFR_MEM8(0x068A) -#define PORTE_INT1MASK _SFR_MEM8(0x068B) -#define PORTE_INTFLAGS _SFR_MEM8(0x068C) -#define PORTE_PIN0CTRL _SFR_MEM8(0x0690) -#define PORTE_PIN1CTRL _SFR_MEM8(0x0691) -#define PORTE_PIN2CTRL _SFR_MEM8(0x0692) -#define PORTE_PIN3CTRL _SFR_MEM8(0x0693) -#define PORTE_PIN4CTRL _SFR_MEM8(0x0694) -#define PORTE_PIN5CTRL _SFR_MEM8(0x0695) -#define PORTE_PIN6CTRL _SFR_MEM8(0x0696) -#define PORTE_PIN7CTRL _SFR_MEM8(0x0697) - -/* PORTF - Port F */ -#define PORTF_DIR _SFR_MEM8(0x06A0) -#define PORTF_DIRSET _SFR_MEM8(0x06A1) -#define PORTF_DIRCLR _SFR_MEM8(0x06A2) -#define PORTF_DIRTGL _SFR_MEM8(0x06A3) -#define PORTF_OUT _SFR_MEM8(0x06A4) -#define PORTF_OUTSET _SFR_MEM8(0x06A5) -#define PORTF_OUTCLR _SFR_MEM8(0x06A6) -#define PORTF_OUTTGL _SFR_MEM8(0x06A7) -#define PORTF_IN _SFR_MEM8(0x06A8) -#define PORTF_INTCTRL _SFR_MEM8(0x06A9) -#define PORTF_INT0MASK _SFR_MEM8(0x06AA) -#define PORTF_INT1MASK _SFR_MEM8(0x06AB) -#define PORTF_INTFLAGS _SFR_MEM8(0x06AC) -#define PORTF_PIN0CTRL _SFR_MEM8(0x06B0) -#define PORTF_PIN1CTRL _SFR_MEM8(0x06B1) -#define PORTF_PIN2CTRL _SFR_MEM8(0x06B2) -#define PORTF_PIN3CTRL _SFR_MEM8(0x06B3) -#define PORTF_PIN4CTRL _SFR_MEM8(0x06B4) -#define PORTF_PIN5CTRL _SFR_MEM8(0x06B5) -#define PORTF_PIN6CTRL _SFR_MEM8(0x06B6) -#define PORTF_PIN7CTRL _SFR_MEM8(0x06B7) - -/* PORTH - Port H */ -#define PORTH_DIR _SFR_MEM8(0x06E0) -#define PORTH_DIRSET _SFR_MEM8(0x06E1) -#define PORTH_DIRCLR _SFR_MEM8(0x06E2) -#define PORTH_DIRTGL _SFR_MEM8(0x06E3) -#define PORTH_OUT _SFR_MEM8(0x06E4) -#define PORTH_OUTSET _SFR_MEM8(0x06E5) -#define PORTH_OUTCLR _SFR_MEM8(0x06E6) -#define PORTH_OUTTGL _SFR_MEM8(0x06E7) -#define PORTH_IN _SFR_MEM8(0x06E8) -#define PORTH_INTCTRL _SFR_MEM8(0x06E9) -#define PORTH_INT0MASK _SFR_MEM8(0x06EA) -#define PORTH_INT1MASK _SFR_MEM8(0x06EB) -#define PORTH_INTFLAGS _SFR_MEM8(0x06EC) -#define PORTH_PIN0CTRL _SFR_MEM8(0x06F0) -#define PORTH_PIN1CTRL _SFR_MEM8(0x06F1) -#define PORTH_PIN2CTRL _SFR_MEM8(0x06F2) -#define PORTH_PIN3CTRL _SFR_MEM8(0x06F3) -#define PORTH_PIN4CTRL _SFR_MEM8(0x06F4) -#define PORTH_PIN5CTRL _SFR_MEM8(0x06F5) -#define PORTH_PIN6CTRL _SFR_MEM8(0x06F6) -#define PORTH_PIN7CTRL _SFR_MEM8(0x06F7) - -/* PORTJ - Port J */ -#define PORTJ_DIR _SFR_MEM8(0x0700) -#define PORTJ_DIRSET _SFR_MEM8(0x0701) -#define PORTJ_DIRCLR _SFR_MEM8(0x0702) -#define PORTJ_DIRTGL _SFR_MEM8(0x0703) -#define PORTJ_OUT _SFR_MEM8(0x0704) -#define PORTJ_OUTSET _SFR_MEM8(0x0705) -#define PORTJ_OUTCLR _SFR_MEM8(0x0706) -#define PORTJ_OUTTGL _SFR_MEM8(0x0707) -#define PORTJ_IN _SFR_MEM8(0x0708) -#define PORTJ_INTCTRL _SFR_MEM8(0x0709) -#define PORTJ_INT0MASK _SFR_MEM8(0x070A) -#define PORTJ_INT1MASK _SFR_MEM8(0x070B) -#define PORTJ_INTFLAGS _SFR_MEM8(0x070C) -#define PORTJ_PIN0CTRL _SFR_MEM8(0x0710) -#define PORTJ_PIN1CTRL _SFR_MEM8(0x0711) -#define PORTJ_PIN2CTRL _SFR_MEM8(0x0712) -#define PORTJ_PIN3CTRL _SFR_MEM8(0x0713) -#define PORTJ_PIN4CTRL _SFR_MEM8(0x0714) -#define PORTJ_PIN5CTRL _SFR_MEM8(0x0715) -#define PORTJ_PIN6CTRL _SFR_MEM8(0x0716) -#define PORTJ_PIN7CTRL _SFR_MEM8(0x0717) - -/* PORTK - Port K */ -#define PORTK_DIR _SFR_MEM8(0x0720) -#define PORTK_DIRSET _SFR_MEM8(0x0721) -#define PORTK_DIRCLR _SFR_MEM8(0x0722) -#define PORTK_DIRTGL _SFR_MEM8(0x0723) -#define PORTK_OUT _SFR_MEM8(0x0724) -#define PORTK_OUTSET _SFR_MEM8(0x0725) -#define PORTK_OUTCLR _SFR_MEM8(0x0726) -#define PORTK_OUTTGL _SFR_MEM8(0x0727) -#define PORTK_IN _SFR_MEM8(0x0728) -#define PORTK_INTCTRL _SFR_MEM8(0x0729) -#define PORTK_INT0MASK _SFR_MEM8(0x072A) -#define PORTK_INT1MASK _SFR_MEM8(0x072B) -#define PORTK_INTFLAGS _SFR_MEM8(0x072C) -#define PORTK_PIN0CTRL _SFR_MEM8(0x0730) -#define PORTK_PIN1CTRL _SFR_MEM8(0x0731) -#define PORTK_PIN2CTRL _SFR_MEM8(0x0732) -#define PORTK_PIN3CTRL _SFR_MEM8(0x0733) -#define PORTK_PIN4CTRL _SFR_MEM8(0x0734) -#define PORTK_PIN5CTRL _SFR_MEM8(0x0735) -#define PORTK_PIN6CTRL _SFR_MEM8(0x0736) -#define PORTK_PIN7CTRL _SFR_MEM8(0x0737) - -/* PORTQ - Port Q */ -#define PORTQ_DIR _SFR_MEM8(0x07C0) -#define PORTQ_DIRSET _SFR_MEM8(0x07C1) -#define PORTQ_DIRCLR _SFR_MEM8(0x07C2) -#define PORTQ_DIRTGL _SFR_MEM8(0x07C3) -#define PORTQ_OUT _SFR_MEM8(0x07C4) -#define PORTQ_OUTSET _SFR_MEM8(0x07C5) -#define PORTQ_OUTCLR _SFR_MEM8(0x07C6) -#define PORTQ_OUTTGL _SFR_MEM8(0x07C7) -#define PORTQ_IN _SFR_MEM8(0x07C8) -#define PORTQ_INTCTRL _SFR_MEM8(0x07C9) -#define PORTQ_INT0MASK _SFR_MEM8(0x07CA) -#define PORTQ_INT1MASK _SFR_MEM8(0x07CB) -#define PORTQ_INTFLAGS _SFR_MEM8(0x07CC) -#define PORTQ_PIN0CTRL _SFR_MEM8(0x07D0) -#define PORTQ_PIN1CTRL _SFR_MEM8(0x07D1) -#define PORTQ_PIN2CTRL _SFR_MEM8(0x07D2) -#define PORTQ_PIN3CTRL _SFR_MEM8(0x07D3) -#define PORTQ_PIN4CTRL _SFR_MEM8(0x07D4) -#define PORTQ_PIN5CTRL _SFR_MEM8(0x07D5) -#define PORTQ_PIN6CTRL _SFR_MEM8(0x07D6) -#define PORTQ_PIN7CTRL _SFR_MEM8(0x07D7) - -/* PORTR - Port R */ -#define PORTR_DIR _SFR_MEM8(0x07E0) -#define PORTR_DIRSET _SFR_MEM8(0x07E1) -#define PORTR_DIRCLR _SFR_MEM8(0x07E2) -#define PORTR_DIRTGL _SFR_MEM8(0x07E3) -#define PORTR_OUT _SFR_MEM8(0x07E4) -#define PORTR_OUTSET _SFR_MEM8(0x07E5) -#define PORTR_OUTCLR _SFR_MEM8(0x07E6) -#define PORTR_OUTTGL _SFR_MEM8(0x07E7) -#define PORTR_IN _SFR_MEM8(0x07E8) -#define PORTR_INTCTRL _SFR_MEM8(0x07E9) -#define PORTR_INT0MASK _SFR_MEM8(0x07EA) -#define PORTR_INT1MASK _SFR_MEM8(0x07EB) -#define PORTR_INTFLAGS _SFR_MEM8(0x07EC) -#define PORTR_PIN0CTRL _SFR_MEM8(0x07F0) -#define PORTR_PIN1CTRL _SFR_MEM8(0x07F1) -#define PORTR_PIN2CTRL _SFR_MEM8(0x07F2) -#define PORTR_PIN3CTRL _SFR_MEM8(0x07F3) -#define PORTR_PIN4CTRL _SFR_MEM8(0x07F4) -#define PORTR_PIN5CTRL _SFR_MEM8(0x07F5) -#define PORTR_PIN6CTRL _SFR_MEM8(0x07F6) -#define PORTR_PIN7CTRL _SFR_MEM8(0x07F7) - -/* TCC0 - Timer/Counter C0 */ -#define TCC0_CTRLA _SFR_MEM8(0x0800) -#define TCC0_CTRLB _SFR_MEM8(0x0801) -#define TCC0_CTRLC _SFR_MEM8(0x0802) -#define TCC0_CTRLD _SFR_MEM8(0x0803) -#define TCC0_CTRLE _SFR_MEM8(0x0804) -#define TCC0_INTCTRLA _SFR_MEM8(0x0806) -#define TCC0_INTCTRLB _SFR_MEM8(0x0807) -#define TCC0_CTRLFCLR _SFR_MEM8(0x0808) -#define TCC0_CTRLFSET _SFR_MEM8(0x0809) -#define TCC0_CTRLGCLR _SFR_MEM8(0x080A) -#define TCC0_CTRLGSET _SFR_MEM8(0x080B) -#define TCC0_INTFLAGS _SFR_MEM8(0x080C) -#define TCC0_TEMP _SFR_MEM8(0x080F) -#define TCC0_CNT _SFR_MEM16(0x0820) -#define TCC0_PER _SFR_MEM16(0x0826) -#define TCC0_CCA _SFR_MEM16(0x0828) -#define TCC0_CCB _SFR_MEM16(0x082A) -#define TCC0_CCC _SFR_MEM16(0x082C) -#define TCC0_CCD _SFR_MEM16(0x082E) -#define TCC0_PERBUF _SFR_MEM16(0x0836) -#define TCC0_CCABUF _SFR_MEM16(0x0838) -#define TCC0_CCBBUF _SFR_MEM16(0x083A) -#define TCC0_CCCBUF _SFR_MEM16(0x083C) -#define TCC0_CCDBUF _SFR_MEM16(0x083E) - -/* TCC1 - Timer/Counter C1 */ -#define TCC1_CTRLA _SFR_MEM8(0x0840) -#define TCC1_CTRLB _SFR_MEM8(0x0841) -#define TCC1_CTRLC _SFR_MEM8(0x0842) -#define TCC1_CTRLD _SFR_MEM8(0x0843) -#define TCC1_CTRLE _SFR_MEM8(0x0844) -#define TCC1_INTCTRLA _SFR_MEM8(0x0846) -#define TCC1_INTCTRLB _SFR_MEM8(0x0847) -#define TCC1_CTRLFCLR _SFR_MEM8(0x0848) -#define TCC1_CTRLFSET _SFR_MEM8(0x0849) -#define TCC1_CTRLGCLR _SFR_MEM8(0x084A) -#define TCC1_CTRLGSET _SFR_MEM8(0x084B) -#define TCC1_INTFLAGS _SFR_MEM8(0x084C) -#define TCC1_TEMP _SFR_MEM8(0x084F) -#define TCC1_CNT _SFR_MEM16(0x0860) -#define TCC1_PER _SFR_MEM16(0x0866) -#define TCC1_CCA _SFR_MEM16(0x0868) -#define TCC1_CCB _SFR_MEM16(0x086A) -#define TCC1_PERBUF _SFR_MEM16(0x0876) -#define TCC1_CCABUF _SFR_MEM16(0x0878) -#define TCC1_CCBBUF _SFR_MEM16(0x087A) - -/* AWEXC - Advanced Waveform Extension C */ -#define AWEXC_CTRL _SFR_MEM8(0x0880) -#define AWEXC_FDEVMASK _SFR_MEM8(0x0882) -#define AWEXC_FDCTRL _SFR_MEM8(0x0883) -#define AWEXC_STATUS _SFR_MEM8(0x0884) -#define AWEXC_DTBOTH _SFR_MEM8(0x0886) -#define AWEXC_DTBOTHBUF _SFR_MEM8(0x0887) -#define AWEXC_DTLS _SFR_MEM8(0x0888) -#define AWEXC_DTHS _SFR_MEM8(0x0889) -#define AWEXC_DTLSBUF _SFR_MEM8(0x088A) -#define AWEXC_DTHSBUF _SFR_MEM8(0x088B) -#define AWEXC_OUTOVEN _SFR_MEM8(0x088C) - -/* HIRESC - High-Resolution Extension C */ -#define HIRESC_CTRL _SFR_MEM8(0x0890) - -/* USARTC0 - Universal Asynchronous Receiver-Transmitter C0 */ -#define USARTC0_DATA _SFR_MEM8(0x08A0) -#define USARTC0_STATUS _SFR_MEM8(0x08A1) -#define USARTC0_CTRLA _SFR_MEM8(0x08A3) -#define USARTC0_CTRLB _SFR_MEM8(0x08A4) -#define USARTC0_CTRLC _SFR_MEM8(0x08A5) -#define USARTC0_BAUDCTRLA _SFR_MEM8(0x08A6) -#define USARTC0_BAUDCTRLB _SFR_MEM8(0x08A7) - -/* USARTC1 - Universal Asynchronous Receiver-Transmitter C1 */ -#define USARTC1_DATA _SFR_MEM8(0x08B0) -#define USARTC1_STATUS _SFR_MEM8(0x08B1) -#define USARTC1_CTRLA _SFR_MEM8(0x08B3) -#define USARTC1_CTRLB _SFR_MEM8(0x08B4) -#define USARTC1_CTRLC _SFR_MEM8(0x08B5) -#define USARTC1_BAUDCTRLA _SFR_MEM8(0x08B6) -#define USARTC1_BAUDCTRLB _SFR_MEM8(0x08B7) - -/* SPIC - Serial Peripheral Interface C */ -#define SPIC_CTRL _SFR_MEM8(0x08C0) -#define SPIC_INTCTRL _SFR_MEM8(0x08C1) -#define SPIC_STATUS _SFR_MEM8(0x08C2) -#define SPIC_DATA _SFR_MEM8(0x08C3) - -/* IRCOM - IR Communication Module */ -#define IRCOM_CTRL _SFR_MEM8(0x08F8) -#define IRCOM_TXPLCTRL _SFR_MEM8(0x08F9) -#define IRCOM_RXPLCTRL _SFR_MEM8(0x08FA) - -/* TCD0 - Timer/Counter D0 */ -#define TCD0_CTRLA _SFR_MEM8(0x0900) -#define TCD0_CTRLB _SFR_MEM8(0x0901) -#define TCD0_CTRLC _SFR_MEM8(0x0902) -#define TCD0_CTRLD _SFR_MEM8(0x0903) -#define TCD0_CTRLE _SFR_MEM8(0x0904) -#define TCD0_INTCTRLA _SFR_MEM8(0x0906) -#define TCD0_INTCTRLB _SFR_MEM8(0x0907) -#define TCD0_CTRLFCLR _SFR_MEM8(0x0908) -#define TCD0_CTRLFSET _SFR_MEM8(0x0909) -#define TCD0_CTRLGCLR _SFR_MEM8(0x090A) -#define TCD0_CTRLGSET _SFR_MEM8(0x090B) -#define TCD0_INTFLAGS _SFR_MEM8(0x090C) -#define TCD0_TEMP _SFR_MEM8(0x090F) -#define TCD0_CNT _SFR_MEM16(0x0920) -#define TCD0_PER _SFR_MEM16(0x0926) -#define TCD0_CCA _SFR_MEM16(0x0928) -#define TCD0_CCB _SFR_MEM16(0x092A) -#define TCD0_CCC _SFR_MEM16(0x092C) -#define TCD0_CCD _SFR_MEM16(0x092E) -#define TCD0_PERBUF _SFR_MEM16(0x0936) -#define TCD0_CCABUF _SFR_MEM16(0x0938) -#define TCD0_CCBBUF _SFR_MEM16(0x093A) -#define TCD0_CCCBUF _SFR_MEM16(0x093C) -#define TCD0_CCDBUF _SFR_MEM16(0x093E) - -/* TCD1 - Timer/Counter D1 */ -#define TCD1_CTRLA _SFR_MEM8(0x0940) -#define TCD1_CTRLB _SFR_MEM8(0x0941) -#define TCD1_CTRLC _SFR_MEM8(0x0942) -#define TCD1_CTRLD _SFR_MEM8(0x0943) -#define TCD1_CTRLE _SFR_MEM8(0x0944) -#define TCD1_INTCTRLA _SFR_MEM8(0x0946) -#define TCD1_INTCTRLB _SFR_MEM8(0x0947) -#define TCD1_CTRLFCLR _SFR_MEM8(0x0948) -#define TCD1_CTRLFSET _SFR_MEM8(0x0949) -#define TCD1_CTRLGCLR _SFR_MEM8(0x094A) -#define TCD1_CTRLGSET _SFR_MEM8(0x094B) -#define TCD1_INTFLAGS _SFR_MEM8(0x094C) -#define TCD1_TEMP _SFR_MEM8(0x094F) -#define TCD1_CNT _SFR_MEM16(0x0960) -#define TCD1_PER _SFR_MEM16(0x0966) -#define TCD1_CCA _SFR_MEM16(0x0968) -#define TCD1_CCB _SFR_MEM16(0x096A) -#define TCD1_PERBUF _SFR_MEM16(0x0976) -#define TCD1_CCABUF _SFR_MEM16(0x0978) -#define TCD1_CCBBUF _SFR_MEM16(0x097A) - -/* HIRESD - High-Resolution Extension D */ -#define HIRESD_CTRL _SFR_MEM8(0x0990) - -/* USARTD0 - Universal Asynchronous Receiver-Transmitter D0 */ -#define USARTD0_DATA _SFR_MEM8(0x09A0) -#define USARTD0_STATUS _SFR_MEM8(0x09A1) -#define USARTD0_CTRLA _SFR_MEM8(0x09A3) -#define USARTD0_CTRLB _SFR_MEM8(0x09A4) -#define USARTD0_CTRLC _SFR_MEM8(0x09A5) -#define USARTD0_BAUDCTRLA _SFR_MEM8(0x09A6) -#define USARTD0_BAUDCTRLB _SFR_MEM8(0x09A7) - -/* USARTD1 - Universal Asynchronous Receiver-Transmitter D1 */ -#define USARTD1_DATA _SFR_MEM8(0x09B0) -#define USARTD1_STATUS _SFR_MEM8(0x09B1) -#define USARTD1_CTRLA _SFR_MEM8(0x09B3) -#define USARTD1_CTRLB _SFR_MEM8(0x09B4) -#define USARTD1_CTRLC _SFR_MEM8(0x09B5) -#define USARTD1_BAUDCTRLA _SFR_MEM8(0x09B6) -#define USARTD1_BAUDCTRLB _SFR_MEM8(0x09B7) - -/* SPID - Serial Peripheral Interface D */ -#define SPID_CTRL _SFR_MEM8(0x09C0) -#define SPID_INTCTRL _SFR_MEM8(0x09C1) -#define SPID_STATUS _SFR_MEM8(0x09C2) -#define SPID_DATA _SFR_MEM8(0x09C3) - -/* TCE0 - Timer/Counter E0 */ -#define TCE0_CTRLA _SFR_MEM8(0x0A00) -#define TCE0_CTRLB _SFR_MEM8(0x0A01) -#define TCE0_CTRLC _SFR_MEM8(0x0A02) -#define TCE0_CTRLD _SFR_MEM8(0x0A03) -#define TCE0_CTRLE _SFR_MEM8(0x0A04) -#define TCE0_INTCTRLA _SFR_MEM8(0x0A06) -#define TCE0_INTCTRLB _SFR_MEM8(0x0A07) -#define TCE0_CTRLFCLR _SFR_MEM8(0x0A08) -#define TCE0_CTRLFSET _SFR_MEM8(0x0A09) -#define TCE0_CTRLGCLR _SFR_MEM8(0x0A0A) -#define TCE0_CTRLGSET _SFR_MEM8(0x0A0B) -#define TCE0_INTFLAGS _SFR_MEM8(0x0A0C) -#define TCE0_TEMP _SFR_MEM8(0x0A0F) -#define TCE0_CNT _SFR_MEM16(0x0A20) -#define TCE0_PER _SFR_MEM16(0x0A26) -#define TCE0_CCA _SFR_MEM16(0x0A28) -#define TCE0_CCB _SFR_MEM16(0x0A2A) -#define TCE0_CCC _SFR_MEM16(0x0A2C) -#define TCE0_CCD _SFR_MEM16(0x0A2E) -#define TCE0_PERBUF _SFR_MEM16(0x0A36) -#define TCE0_CCABUF _SFR_MEM16(0x0A38) -#define TCE0_CCBBUF _SFR_MEM16(0x0A3A) -#define TCE0_CCCBUF _SFR_MEM16(0x0A3C) -#define TCE0_CCDBUF _SFR_MEM16(0x0A3E) - -/* TCE1 - Timer/Counter E1 */ -#define TCE1_CTRLA _SFR_MEM8(0x0A40) -#define TCE1_CTRLB _SFR_MEM8(0x0A41) -#define TCE1_CTRLC _SFR_MEM8(0x0A42) -#define TCE1_CTRLD _SFR_MEM8(0x0A43) -#define TCE1_CTRLE _SFR_MEM8(0x0A44) -#define TCE1_INTCTRLA _SFR_MEM8(0x0A46) -#define TCE1_INTCTRLB _SFR_MEM8(0x0A47) -#define TCE1_CTRLFCLR _SFR_MEM8(0x0A48) -#define TCE1_CTRLFSET _SFR_MEM8(0x0A49) -#define TCE1_CTRLGCLR _SFR_MEM8(0x0A4A) -#define TCE1_CTRLGSET _SFR_MEM8(0x0A4B) -#define TCE1_INTFLAGS _SFR_MEM8(0x0A4C) -#define TCE1_TEMP _SFR_MEM8(0x0A4F) -#define TCE1_CNT _SFR_MEM16(0x0A60) -#define TCE1_PER _SFR_MEM16(0x0A66) -#define TCE1_CCA _SFR_MEM16(0x0A68) -#define TCE1_CCB _SFR_MEM16(0x0A6A) -#define TCE1_PERBUF _SFR_MEM16(0x0A76) -#define TCE1_CCABUF _SFR_MEM16(0x0A78) -#define TCE1_CCBBUF _SFR_MEM16(0x0A7A) - -/* AWEXE - Advanced Waveform Extension E */ -#define AWEXE_CTRL _SFR_MEM8(0x0A80) -#define AWEXE_FDEVMASK _SFR_MEM8(0x0A82) -#define AWEXE_FDCTRL _SFR_MEM8(0x0A83) -#define AWEXE_STATUS _SFR_MEM8(0x0A84) -#define AWEXE_DTBOTH _SFR_MEM8(0x0A86) -#define AWEXE_DTBOTHBUF _SFR_MEM8(0x0A87) -#define AWEXE_DTLS _SFR_MEM8(0x0A88) -#define AWEXE_DTHS _SFR_MEM8(0x0A89) -#define AWEXE_DTLSBUF _SFR_MEM8(0x0A8A) -#define AWEXE_DTHSBUF _SFR_MEM8(0x0A8B) -#define AWEXE_OUTOVEN _SFR_MEM8(0x0A8C) - -/* HIRESE - High-Resolution Extension E */ -#define HIRESE_CTRL _SFR_MEM8(0x0A90) - -/* USARTE0 - Universal Asynchronous Receiver-Transmitter E0 */ -#define USARTE0_DATA _SFR_MEM8(0x0AA0) -#define USARTE0_STATUS _SFR_MEM8(0x0AA1) -#define USARTE0_CTRLA _SFR_MEM8(0x0AA3) -#define USARTE0_CTRLB _SFR_MEM8(0x0AA4) -#define USARTE0_CTRLC _SFR_MEM8(0x0AA5) -#define USARTE0_BAUDCTRLA _SFR_MEM8(0x0AA6) -#define USARTE0_BAUDCTRLB _SFR_MEM8(0x0AA7) - -/* USARTE1 - Universal Asynchronous Receiver-Transmitter E1 */ -#define USARTE1_DATA _SFR_MEM8(0x0AB0) -#define USARTE1_STATUS _SFR_MEM8(0x0AB1) -#define USARTE1_CTRLA _SFR_MEM8(0x0AB3) -#define USARTE1_CTRLB _SFR_MEM8(0x0AB4) -#define USARTE1_CTRLC _SFR_MEM8(0x0AB5) -#define USARTE1_BAUDCTRLA _SFR_MEM8(0x0AB6) -#define USARTE1_BAUDCTRLB _SFR_MEM8(0x0AB7) - -/* SPIE - Serial Peripheral Interface E */ -#define SPIE_CTRL _SFR_MEM8(0x0AC0) -#define SPIE_INTCTRL _SFR_MEM8(0x0AC1) -#define SPIE_STATUS _SFR_MEM8(0x0AC2) -#define SPIE_DATA _SFR_MEM8(0x0AC3) - -/* TCF0 - Timer/Counter F0 */ -#define TCF0_CTRLA _SFR_MEM8(0x0B00) -#define TCF0_CTRLB _SFR_MEM8(0x0B01) -#define TCF0_CTRLC _SFR_MEM8(0x0B02) -#define TCF0_CTRLD _SFR_MEM8(0x0B03) -#define TCF0_CTRLE _SFR_MEM8(0x0B04) -#define TCF0_INTCTRLA _SFR_MEM8(0x0B06) -#define TCF0_INTCTRLB _SFR_MEM8(0x0B07) -#define TCF0_CTRLFCLR _SFR_MEM8(0x0B08) -#define TCF0_CTRLFSET _SFR_MEM8(0x0B09) -#define TCF0_CTRLGCLR _SFR_MEM8(0x0B0A) -#define TCF0_CTRLGSET _SFR_MEM8(0x0B0B) -#define TCF0_INTFLAGS _SFR_MEM8(0x0B0C) -#define TCF0_TEMP _SFR_MEM8(0x0B0F) -#define TCF0_CNT _SFR_MEM16(0x0B20) -#define TCF0_PER _SFR_MEM16(0x0B26) -#define TCF0_CCA _SFR_MEM16(0x0B28) -#define TCF0_CCB _SFR_MEM16(0x0B2A) -#define TCF0_CCC _SFR_MEM16(0x0B2C) -#define TCF0_CCD _SFR_MEM16(0x0B2E) -#define TCF0_PERBUF _SFR_MEM16(0x0B36) -#define TCF0_CCABUF _SFR_MEM16(0x0B38) -#define TCF0_CCBBUF _SFR_MEM16(0x0B3A) -#define TCF0_CCCBUF _SFR_MEM16(0x0B3C) -#define TCF0_CCDBUF _SFR_MEM16(0x0B3E) - -/* TCF1 - Timer/Counter F1 */ -#define TCF1_CTRLA _SFR_MEM8(0x0B40) -#define TCF1_CTRLB _SFR_MEM8(0x0B41) -#define TCF1_CTRLC _SFR_MEM8(0x0B42) -#define TCF1_CTRLD _SFR_MEM8(0x0B43) -#define TCF1_CTRLE _SFR_MEM8(0x0B44) -#define TCF1_INTCTRLA _SFR_MEM8(0x0B46) -#define TCF1_INTCTRLB _SFR_MEM8(0x0B47) -#define TCF1_CTRLFCLR _SFR_MEM8(0x0B48) -#define TCF1_CTRLFSET _SFR_MEM8(0x0B49) -#define TCF1_CTRLGCLR _SFR_MEM8(0x0B4A) -#define TCF1_CTRLGSET _SFR_MEM8(0x0B4B) -#define TCF1_INTFLAGS _SFR_MEM8(0x0B4C) -#define TCF1_TEMP _SFR_MEM8(0x0B4F) -#define TCF1_CNT _SFR_MEM16(0x0B60) -#define TCF1_PER _SFR_MEM16(0x0B66) -#define TCF1_CCA _SFR_MEM16(0x0B68) -#define TCF1_CCB _SFR_MEM16(0x0B6A) -#define TCF1_PERBUF _SFR_MEM16(0x0B76) -#define TCF1_CCABUF _SFR_MEM16(0x0B78) -#define TCF1_CCBBUF _SFR_MEM16(0x0B7A) - -/* HIRESF - High-Resolution Extension F */ -#define HIRESF_CTRL _SFR_MEM8(0x0B90) - -/* USARTF0 - Universal Asynchronous Receiver-Transmitter F0 */ -#define USARTF0_DATA _SFR_MEM8(0x0BA0) -#define USARTF0_STATUS _SFR_MEM8(0x0BA1) -#define USARTF0_CTRLA _SFR_MEM8(0x0BA3) -#define USARTF0_CTRLB _SFR_MEM8(0x0BA4) -#define USARTF0_CTRLC _SFR_MEM8(0x0BA5) -#define USARTF0_BAUDCTRLA _SFR_MEM8(0x0BA6) -#define USARTF0_BAUDCTRLB _SFR_MEM8(0x0BA7) - -/* USARTF1 - Universal Asynchronous Receiver-Transmitter F1 */ -#define USARTF1_DATA _SFR_MEM8(0x0BB0) -#define USARTF1_STATUS _SFR_MEM8(0x0BB1) -#define USARTF1_CTRLA _SFR_MEM8(0x0BB3) -#define USARTF1_CTRLB _SFR_MEM8(0x0BB4) -#define USARTF1_CTRLC _SFR_MEM8(0x0BB5) -#define USARTF1_BAUDCTRLA _SFR_MEM8(0x0BB6) -#define USARTF1_BAUDCTRLB _SFR_MEM8(0x0BB7) - -/* SPIF - Serial Peripheral Interface F */ -#define SPIF_CTRL _SFR_MEM8(0x0BC0) -#define SPIF_INTCTRL _SFR_MEM8(0x0BC1) -#define SPIF_STATUS _SFR_MEM8(0x0BC2) -#define SPIF_DATA _SFR_MEM8(0x0BC3) - - - -/*================== Bitfield Definitions ================== */ - -/* XOCD - On-Chip Debug System */ -/* OCD.OCDR1 bit masks and bit positions */ -#define OCD_OCDRD_bm 0x01 /* OCDR Dirty bit mask. */ -#define OCD_OCDRD_bp 0 /* OCDR Dirty bit position. */ - - -/* CPU - CPU */ -/* CPU.CCP bit masks and bit positions */ -#define CPU_CCP_gm 0xFF /* CCP signature group mask. */ -#define CPU_CCP_gp 0 /* CCP signature group position. */ -#define CPU_CCP0_bm (1<<0) /* CCP signature bit 0 mask. */ -#define CPU_CCP0_bp 0 /* CCP signature bit 0 position. */ -#define CPU_CCP1_bm (1<<1) /* CCP signature bit 1 mask. */ -#define CPU_CCP1_bp 1 /* CCP signature bit 1 position. */ -#define CPU_CCP2_bm (1<<2) /* CCP signature bit 2 mask. */ -#define CPU_CCP2_bp 2 /* CCP signature bit 2 position. */ -#define CPU_CCP3_bm (1<<3) /* CCP signature bit 3 mask. */ -#define CPU_CCP3_bp 3 /* CCP signature bit 3 position. */ -#define CPU_CCP4_bm (1<<4) /* CCP signature bit 4 mask. */ -#define CPU_CCP4_bp 4 /* CCP signature bit 4 position. */ -#define CPU_CCP5_bm (1<<5) /* CCP signature bit 5 mask. */ -#define CPU_CCP5_bp 5 /* CCP signature bit 5 position. */ -#define CPU_CCP6_bm (1<<6) /* CCP signature bit 6 mask. */ -#define CPU_CCP6_bp 6 /* CCP signature bit 6 position. */ -#define CPU_CCP7_bm (1<<7) /* CCP signature bit 7 mask. */ -#define CPU_CCP7_bp 7 /* CCP signature bit 7 position. */ - - -/* CPU.SREG bit masks and bit positions */ -#define CPU_I_bm 0x80 /* Global Interrupt Enable Flag bit mask. */ -#define CPU_I_bp 7 /* Global Interrupt Enable Flag bit position. */ - -#define CPU_T_bm 0x40 /* Transfer Bit bit mask. */ -#define CPU_T_bp 6 /* Transfer Bit bit position. */ - -#define CPU_H_bm 0x20 /* Half Carry Flag bit mask. */ -#define CPU_H_bp 5 /* Half Carry Flag bit position. */ - -#define CPU_S_bm 0x10 /* N Exclusive Or V Flag bit mask. */ -#define CPU_S_bp 4 /* N Exclusive Or V Flag bit position. */ - -#define CPU_V_bm 0x08 /* Two's Complement Overflow Flag bit mask. */ -#define CPU_V_bp 3 /* Two's Complement Overflow Flag bit position. */ - -#define CPU_N_bm 0x04 /* Negative Flag bit mask. */ -#define CPU_N_bp 2 /* Negative Flag bit position. */ - -#define CPU_Z_bm 0x02 /* Zero Flag bit mask. */ -#define CPU_Z_bp 1 /* Zero Flag bit position. */ - -#define CPU_C_bm 0x01 /* Carry Flag bit mask. */ -#define CPU_C_bp 0 /* Carry Flag bit position. */ - - -/* CLK - Clock System */ -/* CLK.CTRL bit masks and bit positions */ -#define CLK_SCLKSEL_gm 0x07 /* System Clock Selection group mask. */ -#define CLK_SCLKSEL_gp 0 /* System Clock Selection group position. */ -#define CLK_SCLKSEL0_bm (1<<0) /* System Clock Selection bit 0 mask. */ -#define CLK_SCLKSEL0_bp 0 /* System Clock Selection bit 0 position. */ -#define CLK_SCLKSEL1_bm (1<<1) /* System Clock Selection bit 1 mask. */ -#define CLK_SCLKSEL1_bp 1 /* System Clock Selection bit 1 position. */ -#define CLK_SCLKSEL2_bm (1<<2) /* System Clock Selection bit 2 mask. */ -#define CLK_SCLKSEL2_bp 2 /* System Clock Selection bit 2 position. */ - - -/* CLK.PSCTRL bit masks and bit positions */ -#define CLK_PSADIV_gm 0x7C /* Prescaler A Division Factor group mask. */ -#define CLK_PSADIV_gp 2 /* Prescaler A Division Factor group position. */ -#define CLK_PSADIV0_bm (1<<2) /* Prescaler A Division Factor bit 0 mask. */ -#define CLK_PSADIV0_bp 2 /* Prescaler A Division Factor bit 0 position. */ -#define CLK_PSADIV1_bm (1<<3) /* Prescaler A Division Factor bit 1 mask. */ -#define CLK_PSADIV1_bp 3 /* Prescaler A Division Factor bit 1 position. */ -#define CLK_PSADIV2_bm (1<<4) /* Prescaler A Division Factor bit 2 mask. */ -#define CLK_PSADIV2_bp 4 /* Prescaler A Division Factor bit 2 position. */ -#define CLK_PSADIV3_bm (1<<5) /* Prescaler A Division Factor bit 3 mask. */ -#define CLK_PSADIV3_bp 5 /* Prescaler A Division Factor bit 3 position. */ -#define CLK_PSADIV4_bm (1<<6) /* Prescaler A Division Factor bit 4 mask. */ -#define CLK_PSADIV4_bp 6 /* Prescaler A Division Factor bit 4 position. */ - -#define CLK_PSBCDIV_gm 0x03 /* Prescaler B and C Division factor group mask. */ -#define CLK_PSBCDIV_gp 0 /* Prescaler B and C Division factor group position. */ -#define CLK_PSBCDIV0_bm (1<<0) /* Prescaler B and C Division factor bit 0 mask. */ -#define CLK_PSBCDIV0_bp 0 /* Prescaler B and C Division factor bit 0 position. */ -#define CLK_PSBCDIV1_bm (1<<1) /* Prescaler B and C Division factor bit 1 mask. */ -#define CLK_PSBCDIV1_bp 1 /* Prescaler B and C Division factor bit 1 position. */ - - -/* CLK.LOCK bit masks and bit positions */ -#define CLK_LOCK_bm 0x01 /* Clock System Lock bit mask. */ -#define CLK_LOCK_bp 0 /* Clock System Lock bit position. */ - - -/* CLK.RTCCTRL bit masks and bit positions */ -#define CLK_RTCSRC_gm 0x0E /* Clock Source group mask. */ -#define CLK_RTCSRC_gp 1 /* Clock Source group position. */ -#define CLK_RTCSRC0_bm (1<<1) /* Clock Source bit 0 mask. */ -#define CLK_RTCSRC0_bp 1 /* Clock Source bit 0 position. */ -#define CLK_RTCSRC1_bm (1<<2) /* Clock Source bit 1 mask. */ -#define CLK_RTCSRC1_bp 2 /* Clock Source bit 1 position. */ -#define CLK_RTCSRC2_bm (1<<3) /* Clock Source bit 2 mask. */ -#define CLK_RTCSRC2_bp 3 /* Clock Source bit 2 position. */ - -#define CLK_RTCEN_bm 0x01 /* RTC Clock Source Enable bit mask. */ -#define CLK_RTCEN_bp 0 /* RTC Clock Source Enable bit position. */ - - -/* PR.PR bit masks and bit positions */ -#define PR_EBI_bm 0x08 /* External Bus Interface bit mask. */ -#define PR_EBI_bp 3 /* External Bus Interface bit position. */ - -#define PR_RTC_bm 0x04 /* Real-time Counter bit mask. */ -#define PR_RTC_bp 2 /* Real-time Counter bit position. */ - -#define PR_EVSYS_bm 0x02 /* Event System bit mask. */ -#define PR_EVSYS_bp 1 /* Event System bit position. */ - -#define PR_DMA_bm 0x01 /* DMA-Controller bit mask. */ -#define PR_DMA_bp 0 /* DMA-Controller bit position. */ - - -/* PR.PRPA bit masks and bit positions */ -#define PR_DAC_bm 0x04 /* Port A DAC bit mask. */ -#define PR_DAC_bp 2 /* Port A DAC bit position. */ - -#define PR_ADC_bm 0x02 /* Port A ADC bit mask. */ -#define PR_ADC_bp 1 /* Port A ADC bit position. */ - -#define PR_AC_bm 0x01 /* Port A Analog Comparator bit mask. */ -#define PR_AC_bp 0 /* Port A Analog Comparator bit position. */ - - -/* PR.PRPB bit masks and bit positions */ -/* PR_DAC_bm Predefined. */ -/* PR_DAC_bp Predefined. */ - -/* PR_ADC_bm Predefined. */ -/* PR_ADC_bp Predefined. */ - -/* PR_AC_bm Predefined. */ -/* PR_AC_bp Predefined. */ - - -/* PR.PRPC bit masks and bit positions */ -#define PR_TWI_bm 0x40 /* Port C Two-wire Interface bit mask. */ -#define PR_TWI_bp 6 /* Port C Two-wire Interface bit position. */ - -#define PR_USART1_bm 0x20 /* Port C USART1 bit mask. */ -#define PR_USART1_bp 5 /* Port C USART1 bit position. */ - -#define PR_USART0_bm 0x10 /* Port C USART0 bit mask. */ -#define PR_USART0_bp 4 /* Port C USART0 bit position. */ - -#define PR_SPI_bm 0x08 /* Port C SPI bit mask. */ -#define PR_SPI_bp 3 /* Port C SPI bit position. */ - -#define PR_HIRES_bm 0x04 /* Port C AWEX bit mask. */ -#define PR_HIRES_bp 2 /* Port C AWEX bit position. */ - -#define PR_TC1_bm 0x02 /* Port C Timer/Counter1 bit mask. */ -#define PR_TC1_bp 1 /* Port C Timer/Counter1 bit position. */ - -#define PR_TC0_bm 0x01 /* Port C Timer/Counter0 bit mask. */ -#define PR_TC0_bp 0 /* Port C Timer/Counter0 bit position. */ - - -/* PR.PRPD bit masks and bit positions */ -/* PR_TWI_bm Predefined. */ -/* PR_TWI_bp Predefined. */ - -/* PR_USART1_bm Predefined. */ -/* PR_USART1_bp Predefined. */ - -/* PR_USART0_bm Predefined. */ -/* PR_USART0_bp Predefined. */ - -/* PR_SPI_bm Predefined. */ -/* PR_SPI_bp Predefined. */ - -/* PR_HIRES_bm Predefined. */ -/* PR_HIRES_bp Predefined. */ - -/* PR_TC1_bm Predefined. */ -/* PR_TC1_bp Predefined. */ - -/* PR_TC0_bm Predefined. */ -/* PR_TC0_bp Predefined. */ - - -/* PR.PRPE bit masks and bit positions */ -/* PR_TWI_bm Predefined. */ -/* PR_TWI_bp Predefined. */ - -/* PR_USART1_bm Predefined. */ -/* PR_USART1_bp Predefined. */ - -/* PR_USART0_bm Predefined. */ -/* PR_USART0_bp Predefined. */ - -/* PR_SPI_bm Predefined. */ -/* PR_SPI_bp Predefined. */ - -/* PR_HIRES_bm Predefined. */ -/* PR_HIRES_bp Predefined. */ - -/* PR_TC1_bm Predefined. */ -/* PR_TC1_bp Predefined. */ - -/* PR_TC0_bm Predefined. */ -/* PR_TC0_bp Predefined. */ - - -/* PR.PRPF bit masks and bit positions */ -/* PR_TWI_bm Predefined. */ -/* PR_TWI_bp Predefined. */ - -/* PR_USART1_bm Predefined. */ -/* PR_USART1_bp Predefined. */ - -/* PR_USART0_bm Predefined. */ -/* PR_USART0_bp Predefined. */ - -/* PR_SPI_bm Predefined. */ -/* PR_SPI_bp Predefined. */ - -/* PR_HIRES_bm Predefined. */ -/* PR_HIRES_bp Predefined. */ - -/* PR_TC1_bm Predefined. */ -/* PR_TC1_bp Predefined. */ - -/* PR_TC0_bm Predefined. */ -/* PR_TC0_bp Predefined. */ - - -/* SLEEP - Sleep Controller */ -/* SLEEP.CTRL bit masks and bit positions */ -#define SLEEP_SMODE_gm 0x0E /* Sleep Mode group mask. */ -#define SLEEP_SMODE_gp 1 /* Sleep Mode group position. */ -#define SLEEP_SMODE0_bm (1<<1) /* Sleep Mode bit 0 mask. */ -#define SLEEP_SMODE0_bp 1 /* Sleep Mode bit 0 position. */ -#define SLEEP_SMODE1_bm (1<<2) /* Sleep Mode bit 1 mask. */ -#define SLEEP_SMODE1_bp 2 /* Sleep Mode bit 1 position. */ -#define SLEEP_SMODE2_bm (1<<3) /* Sleep Mode bit 2 mask. */ -#define SLEEP_SMODE2_bp 3 /* Sleep Mode bit 2 position. */ - -#define SLEEP_SEN_bm 0x01 /* Sleep Enable bit mask. */ -#define SLEEP_SEN_bp 0 /* Sleep Enable bit position. */ - - -/* OSC - Oscillator */ -/* OSC.CTRL bit masks and bit positions */ -#define OSC_PLLEN_bm 0x10 /* PLL Enable bit mask. */ -#define OSC_PLLEN_bp 4 /* PLL Enable bit position. */ - -#define OSC_XOSCEN_bm 0x08 /* External Oscillator Enable bit mask. */ -#define OSC_XOSCEN_bp 3 /* External Oscillator Enable bit position. */ - -#define OSC_RC32KEN_bm 0x04 /* Internal 32kHz RC Oscillator Enable bit mask. */ -#define OSC_RC32KEN_bp 2 /* Internal 32kHz RC Oscillator Enable bit position. */ - -#define OSC_RC32MEN_bm 0x02 /* Internal 32MHz RC Oscillator Enable bit mask. */ -#define OSC_RC32MEN_bp 1 /* Internal 32MHz RC Oscillator Enable bit position. */ - -#define OSC_RC2MEN_bm 0x01 /* Internal 2MHz RC Oscillator Enable bit mask. */ -#define OSC_RC2MEN_bp 0 /* Internal 2MHz RC Oscillator Enable bit position. */ - - -/* OSC.STATUS bit masks and bit positions */ -#define OSC_PLLRDY_bm 0x10 /* PLL Ready bit mask. */ -#define OSC_PLLRDY_bp 4 /* PLL Ready bit position. */ - -#define OSC_XOSCRDY_bm 0x08 /* External Oscillator Ready bit mask. */ -#define OSC_XOSCRDY_bp 3 /* External Oscillator Ready bit position. */ - -#define OSC_RC32KRDY_bm 0x04 /* Internal 32kHz RC Oscillator Ready bit mask. */ -#define OSC_RC32KRDY_bp 2 /* Internal 32kHz RC Oscillator Ready bit position. */ - -#define OSC_RC32MRDY_bm 0x02 /* Internal 32MHz RC Oscillator Ready bit mask. */ -#define OSC_RC32MRDY_bp 1 /* Internal 32MHz RC Oscillator Ready bit position. */ - -#define OSC_RC2MRDY_bm 0x01 /* Internal 2MHz RC Oscillator Ready bit mask. */ -#define OSC_RC2MRDY_bp 0 /* Internal 2MHz RC Oscillator Ready bit position. */ - - -/* OSC.XOSCCTRL bit masks and bit positions */ -#define OSC_FRQRANGE_gm 0xC0 /* Frequency Range group mask. */ -#define OSC_FRQRANGE_gp 6 /* Frequency Range group position. */ -#define OSC_FRQRANGE0_bm (1<<6) /* Frequency Range bit 0 mask. */ -#define OSC_FRQRANGE0_bp 6 /* Frequency Range bit 0 position. */ -#define OSC_FRQRANGE1_bm (1<<7) /* Frequency Range bit 1 mask. */ -#define OSC_FRQRANGE1_bp 7 /* Frequency Range bit 1 position. */ - -#define OSC_X32KLPM_bm 0x20 /* 32kHz XTAL OSC Low-power Mode bit mask. */ -#define OSC_X32KLPM_bp 5 /* 32kHz XTAL OSC Low-power Mode bit position. */ - -#define OSC_XOSCSEL_gm 0x0F /* External Oscillator Selection and Startup Time group mask. */ -#define OSC_XOSCSEL_gp 0 /* External Oscillator Selection and Startup Time group position. */ -#define OSC_XOSCSEL0_bm (1<<0) /* External Oscillator Selection and Startup Time bit 0 mask. */ -#define OSC_XOSCSEL0_bp 0 /* External Oscillator Selection and Startup Time bit 0 position. */ -#define OSC_XOSCSEL1_bm (1<<1) /* External Oscillator Selection and Startup Time bit 1 mask. */ -#define OSC_XOSCSEL1_bp 1 /* External Oscillator Selection and Startup Time bit 1 position. */ -#define OSC_XOSCSEL2_bm (1<<2) /* External Oscillator Selection and Startup Time bit 2 mask. */ -#define OSC_XOSCSEL2_bp 2 /* External Oscillator Selection and Startup Time bit 2 position. */ -#define OSC_XOSCSEL3_bm (1<<3) /* External Oscillator Selection and Startup Time bit 3 mask. */ -#define OSC_XOSCSEL3_bp 3 /* External Oscillator Selection and Startup Time bit 3 position. */ - - -/* OSC.XOSCFAIL bit masks and bit positions */ -#define OSC_XOSCFDIF_bm 0x02 /* Failure Detection Interrupt Flag bit mask. */ -#define OSC_XOSCFDIF_bp 1 /* Failure Detection Interrupt Flag bit position. */ - -#define OSC_XOSCFDEN_bm 0x01 /* Failure Detection Enable bit mask. */ -#define OSC_XOSCFDEN_bp 0 /* Failure Detection Enable bit position. */ - - -/* OSC.PLLCTRL bit masks and bit positions */ -#define OSC_PLLSRC_gm 0xC0 /* Clock Source group mask. */ -#define OSC_PLLSRC_gp 6 /* Clock Source group position. */ -#define OSC_PLLSRC0_bm (1<<6) /* Clock Source bit 0 mask. */ -#define OSC_PLLSRC0_bp 6 /* Clock Source bit 0 position. */ -#define OSC_PLLSRC1_bm (1<<7) /* Clock Source bit 1 mask. */ -#define OSC_PLLSRC1_bp 7 /* Clock Source bit 1 position. */ - -#define OSC_PLLFAC_gm 0x1F /* Multiplication Factor group mask. */ -#define OSC_PLLFAC_gp 0 /* Multiplication Factor group position. */ -#define OSC_PLLFAC0_bm (1<<0) /* Multiplication Factor bit 0 mask. */ -#define OSC_PLLFAC0_bp 0 /* Multiplication Factor bit 0 position. */ -#define OSC_PLLFAC1_bm (1<<1) /* Multiplication Factor bit 1 mask. */ -#define OSC_PLLFAC1_bp 1 /* Multiplication Factor bit 1 position. */ -#define OSC_PLLFAC2_bm (1<<2) /* Multiplication Factor bit 2 mask. */ -#define OSC_PLLFAC2_bp 2 /* Multiplication Factor bit 2 position. */ -#define OSC_PLLFAC3_bm (1<<3) /* Multiplication Factor bit 3 mask. */ -#define OSC_PLLFAC3_bp 3 /* Multiplication Factor bit 3 position. */ -#define OSC_PLLFAC4_bm (1<<4) /* Multiplication Factor bit 4 mask. */ -#define OSC_PLLFAC4_bp 4 /* Multiplication Factor bit 4 position. */ - - -/* OSC.DFLLCTRL bit masks and bit positions */ -#define OSC_RC32MCREF_bm 0x02 /* 32MHz Calibration Reference bit mask. */ -#define OSC_RC32MCREF_bp 1 /* 32MHz Calibration Reference bit position. */ - -#define OSC_RC2MCREF_bm 0x01 /* 2MHz Calibration Reference bit mask. */ -#define OSC_RC2MCREF_bp 0 /* 2MHz Calibration Reference bit position. */ - - -/* DFLL - DFLL */ -/* DFLL.CTRL bit masks and bit positions */ -#define DFLL_ENABLE_bm 0x01 /* DFLL Enable bit mask. */ -#define DFLL_ENABLE_bp 0 /* DFLL Enable bit position. */ - - -/* DFLL.CALA bit masks and bit positions */ -#define DFLL_CALL_gm 0x7F /* DFLL Calibration bits [6:0] group mask. */ -#define DFLL_CALL_gp 0 /* DFLL Calibration bits [6:0] group position. */ -#define DFLL_CALL0_bm (1<<0) /* DFLL Calibration bits [6:0] bit 0 mask. */ -#define DFLL_CALL0_bp 0 /* DFLL Calibration bits [6:0] bit 0 position. */ -#define DFLL_CALL1_bm (1<<1) /* DFLL Calibration bits [6:0] bit 1 mask. */ -#define DFLL_CALL1_bp 1 /* DFLL Calibration bits [6:0] bit 1 position. */ -#define DFLL_CALL2_bm (1<<2) /* DFLL Calibration bits [6:0] bit 2 mask. */ -#define DFLL_CALL2_bp 2 /* DFLL Calibration bits [6:0] bit 2 position. */ -#define DFLL_CALL3_bm (1<<3) /* DFLL Calibration bits [6:0] bit 3 mask. */ -#define DFLL_CALL3_bp 3 /* DFLL Calibration bits [6:0] bit 3 position. */ -#define DFLL_CALL4_bm (1<<4) /* DFLL Calibration bits [6:0] bit 4 mask. */ -#define DFLL_CALL4_bp 4 /* DFLL Calibration bits [6:0] bit 4 position. */ -#define DFLL_CALL5_bm (1<<5) /* DFLL Calibration bits [6:0] bit 5 mask. */ -#define DFLL_CALL5_bp 5 /* DFLL Calibration bits [6:0] bit 5 position. */ -#define DFLL_CALL6_bm (1<<6) /* DFLL Calibration bits [6:0] bit 6 mask. */ -#define DFLL_CALL6_bp 6 /* DFLL Calibration bits [6:0] bit 6 position. */ - - -/* DFLL.CALB bit masks and bit positions */ -#define DFLL_CALH_gm 0x3F /* DFLL Calibration bits [12:7] group mask. */ -#define DFLL_CALH_gp 0 /* DFLL Calibration bits [12:7] group position. */ -#define DFLL_CALH0_bm (1<<0) /* DFLL Calibration bits [12:7] bit 0 mask. */ -#define DFLL_CALH0_bp 0 /* DFLL Calibration bits [12:7] bit 0 position. */ -#define DFLL_CALH1_bm (1<<1) /* DFLL Calibration bits [12:7] bit 1 mask. */ -#define DFLL_CALH1_bp 1 /* DFLL Calibration bits [12:7] bit 1 position. */ -#define DFLL_CALH2_bm (1<<2) /* DFLL Calibration bits [12:7] bit 2 mask. */ -#define DFLL_CALH2_bp 2 /* DFLL Calibration bits [12:7] bit 2 position. */ -#define DFLL_CALH3_bm (1<<3) /* DFLL Calibration bits [12:7] bit 3 mask. */ -#define DFLL_CALH3_bp 3 /* DFLL Calibration bits [12:7] bit 3 position. */ -#define DFLL_CALH4_bm (1<<4) /* DFLL Calibration bits [12:7] bit 4 mask. */ -#define DFLL_CALH4_bp 4 /* DFLL Calibration bits [12:7] bit 4 position. */ -#define DFLL_CALH5_bm (1<<5) /* DFLL Calibration bits [12:7] bit 5 mask. */ -#define DFLL_CALH5_bp 5 /* DFLL Calibration bits [12:7] bit 5 position. */ - - -/* RST - Reset */ -/* RST.STATUS bit masks and bit positions */ -#define RST_SDRF_bm 0x40 /* Spike Detection Reset Flag bit mask. */ -#define RST_SDRF_bp 6 /* Spike Detection Reset Flag bit position. */ - -#define RST_SRF_bm 0x20 /* Software Reset Flag bit mask. */ -#define RST_SRF_bp 5 /* Software Reset Flag bit position. */ - -#define RST_PDIRF_bm 0x10 /* Programming and Debug Interface Interface Reset Flag bit mask. */ -#define RST_PDIRF_bp 4 /* Programming and Debug Interface Interface Reset Flag bit position. */ - -#define RST_WDRF_bm 0x08 /* Watchdog Reset Flag bit mask. */ -#define RST_WDRF_bp 3 /* Watchdog Reset Flag bit position. */ - -#define RST_BORF_bm 0x04 /* Brown-out Reset Flag bit mask. */ -#define RST_BORF_bp 2 /* Brown-out Reset Flag bit position. */ - -#define RST_EXTRF_bm 0x02 /* External Reset Flag bit mask. */ -#define RST_EXTRF_bp 1 /* External Reset Flag bit position. */ - -#define RST_PORF_bm 0x01 /* Power-on Reset Flag bit mask. */ -#define RST_PORF_bp 0 /* Power-on Reset Flag bit position. */ - - -/* RST.CTRL bit masks and bit positions */ -#define RST_SWRST_bm 0x01 /* Software Reset bit mask. */ -#define RST_SWRST_bp 0 /* Software Reset bit position. */ - - -/* WDT - Watch-Dog Timer */ -/* WDT.CTRL bit masks and bit positions */ -#define WDT_PER_gm 0x3C /* Period group mask. */ -#define WDT_PER_gp 2 /* Period group position. */ -#define WDT_PER0_bm (1<<2) /* Period bit 0 mask. */ -#define WDT_PER0_bp 2 /* Period bit 0 position. */ -#define WDT_PER1_bm (1<<3) /* Period bit 1 mask. */ -#define WDT_PER1_bp 3 /* Period bit 1 position. */ -#define WDT_PER2_bm (1<<4) /* Period bit 2 mask. */ -#define WDT_PER2_bp 4 /* Period bit 2 position. */ -#define WDT_PER3_bm (1<<5) /* Period bit 3 mask. */ -#define WDT_PER3_bp 5 /* Period bit 3 position. */ - -#define WDT_ENABLE_bm 0x02 /* Enable bit mask. */ -#define WDT_ENABLE_bp 1 /* Enable bit position. */ - -#define WDT_CEN_bm 0x01 /* Change Enable bit mask. */ -#define WDT_CEN_bp 0 /* Change Enable bit position. */ - - -/* WDT.WINCTRL bit masks and bit positions */ -#define WDT_WPER_gm 0x3C /* Windowed Mode Period group mask. */ -#define WDT_WPER_gp 2 /* Windowed Mode Period group position. */ -#define WDT_WPER0_bm (1<<2) /* Windowed Mode Period bit 0 mask. */ -#define WDT_WPER0_bp 2 /* Windowed Mode Period bit 0 position. */ -#define WDT_WPER1_bm (1<<3) /* Windowed Mode Period bit 1 mask. */ -#define WDT_WPER1_bp 3 /* Windowed Mode Period bit 1 position. */ -#define WDT_WPER2_bm (1<<4) /* Windowed Mode Period bit 2 mask. */ -#define WDT_WPER2_bp 4 /* Windowed Mode Period bit 2 position. */ -#define WDT_WPER3_bm (1<<5) /* Windowed Mode Period bit 3 mask. */ -#define WDT_WPER3_bp 5 /* Windowed Mode Period bit 3 position. */ - -#define WDT_WEN_bm 0x02 /* Windowed Mode Enable bit mask. */ -#define WDT_WEN_bp 1 /* Windowed Mode Enable bit position. */ - -#define WDT_WCEN_bm 0x01 /* Windowed Mode Change Enable bit mask. */ -#define WDT_WCEN_bp 0 /* Windowed Mode Change Enable bit position. */ - - -/* WDT.STATUS bit masks and bit positions */ -#define WDT_SYNCBUSY_bm 0x01 /* Syncronization busy bit mask. */ -#define WDT_SYNCBUSY_bp 0 /* Syncronization busy bit position. */ - - -/* MCU - MCU Control */ -/* MCU.MCUCR bit masks and bit positions */ -#define MCU_JTAGD_bm 0x01 /* JTAG Disable bit mask. */ -#define MCU_JTAGD_bp 0 /* JTAG Disable bit position. */ - - -/* MCU.EVSYSLOCK bit masks and bit positions */ -#define MCU_EVSYS1LOCK_bm 0x10 /* Event Channel 4-7 Lock bit mask. */ -#define MCU_EVSYS1LOCK_bp 4 /* Event Channel 4-7 Lock bit position. */ - -#define MCU_EVSYS0LOCK_bm 0x01 /* Event Channel 0-3 Lock bit mask. */ -#define MCU_EVSYS0LOCK_bp 0 /* Event Channel 0-3 Lock bit position. */ - - -/* MCU.AWEXLOCK bit masks and bit positions */ -#define MCU_AWEXELOCK_bm 0x04 /* AWeX on T/C E0 Lock bit mask. */ -#define MCU_AWEXELOCK_bp 2 /* AWeX on T/C E0 Lock bit position. */ - -#define MCU_AWEXCLOCK_bm 0x01 /* AWeX on T/C C0 Lock bit mask. */ -#define MCU_AWEXCLOCK_bp 0 /* AWeX on T/C C0 Lock bit position. */ - - -/* PMIC - Programmable Multi-level Interrupt Controller */ -/* PMIC.STATUS bit masks and bit positions */ -#define PMIC_NMIEX_bm 0x80 /* Non-maskable Interrupt Executing bit mask. */ -#define PMIC_NMIEX_bp 7 /* Non-maskable Interrupt Executing bit position. */ - -#define PMIC_HILVLEX_bm 0x04 /* High Level Interrupt Executing bit mask. */ -#define PMIC_HILVLEX_bp 2 /* High Level Interrupt Executing bit position. */ - -#define PMIC_MEDLVLEX_bm 0x02 /* Medium Level Interrupt Executing bit mask. */ -#define PMIC_MEDLVLEX_bp 1 /* Medium Level Interrupt Executing bit position. */ - -#define PMIC_LOLVLEX_bm 0x01 /* Low Level Interrupt Executing bit mask. */ -#define PMIC_LOLVLEX_bp 0 /* Low Level Interrupt Executing bit position. */ - - -/* PMIC.CTRL bit masks and bit positions */ -#define PMIC_RREN_bm 0x80 /* Round-Robin Priority Enable bit mask. */ -#define PMIC_RREN_bp 7 /* Round-Robin Priority Enable bit position. */ - -#define PMIC_IVSEL_bm 0x40 /* Interrupt Vector Select bit mask. */ -#define PMIC_IVSEL_bp 6 /* Interrupt Vector Select bit position. */ - -#define PMIC_HILVLEN_bm 0x04 /* High Level Enable bit mask. */ -#define PMIC_HILVLEN_bp 2 /* High Level Enable bit position. */ - -#define PMIC_MEDLVLEN_bm 0x02 /* Medium Level Enable bit mask. */ -#define PMIC_MEDLVLEN_bp 1 /* Medium Level Enable bit position. */ - -#define PMIC_LOLVLEN_bm 0x01 /* Low Level Enable bit mask. */ -#define PMIC_LOLVLEN_bp 0 /* Low Level Enable bit position. */ - - -/* DMA - DMA Controller */ -/* DMA_CH.CTRLA bit masks and bit positions */ -#define DMA_CH_ENABLE_bm 0x80 /* Channel Enable bit mask. */ -#define DMA_CH_ENABLE_bp 7 /* Channel Enable bit position. */ - -#define DMA_CH_RESET_bm 0x40 /* Channel Software Reset bit mask. */ -#define DMA_CH_RESET_bp 6 /* Channel Software Reset bit position. */ - -#define DMA_CH_REPEAT_bm 0x20 /* Channel Repeat Mode bit mask. */ -#define DMA_CH_REPEAT_bp 5 /* Channel Repeat Mode bit position. */ - -#define DMA_CH_TRFREQ_bm 0x10 /* Channel Transfer Request bit mask. */ -#define DMA_CH_TRFREQ_bp 4 /* Channel Transfer Request bit position. */ - -#define DMA_CH_SINGLE_bm 0x04 /* Channel Single Shot Data Transfer bit mask. */ -#define DMA_CH_SINGLE_bp 2 /* Channel Single Shot Data Transfer bit position. */ - -#define DMA_CH_BURSTLEN_gm 0x03 /* Channel Transfer Mode group mask. */ -#define DMA_CH_BURSTLEN_gp 0 /* Channel Transfer Mode group position. */ -#define DMA_CH_BURSTLEN0_bm (1<<0) /* Channel Transfer Mode bit 0 mask. */ -#define DMA_CH_BURSTLEN0_bp 0 /* Channel Transfer Mode bit 0 position. */ -#define DMA_CH_BURSTLEN1_bm (1<<1) /* Channel Transfer Mode bit 1 mask. */ -#define DMA_CH_BURSTLEN1_bp 1 /* Channel Transfer Mode bit 1 position. */ - - -/* DMA_CH.CTRLB bit masks and bit positions */ -#define DMA_CH_CHBUSY_bm 0x80 /* Block Transfer Busy bit mask. */ -#define DMA_CH_CHBUSY_bp 7 /* Block Transfer Busy bit position. */ - -#define DMA_CH_CHPEND_bm 0x40 /* Block Transfer Pending bit mask. */ -#define DMA_CH_CHPEND_bp 6 /* Block Transfer Pending bit position. */ - -#define DMA_CH_ERRIF_bm 0x20 /* Block Transfer Error Interrupt Flag bit mask. */ -#define DMA_CH_ERRIF_bp 5 /* Block Transfer Error Interrupt Flag bit position. */ - -#define DMA_CH_TRNIF_bm 0x10 /* Transaction Complete Interrup Flag bit mask. */ -#define DMA_CH_TRNIF_bp 4 /* Transaction Complete Interrup Flag bit position. */ - -#define DMA_CH_ERRINTLVL_gm 0x0C /* Transfer Error Interrupt Level group mask. */ -#define DMA_CH_ERRINTLVL_gp 2 /* Transfer Error Interrupt Level group position. */ -#define DMA_CH_ERRINTLVL0_bm (1<<2) /* Transfer Error Interrupt Level bit 0 mask. */ -#define DMA_CH_ERRINTLVL0_bp 2 /* Transfer Error Interrupt Level bit 0 position. */ -#define DMA_CH_ERRINTLVL1_bm (1<<3) /* Transfer Error Interrupt Level bit 1 mask. */ -#define DMA_CH_ERRINTLVL1_bp 3 /* Transfer Error Interrupt Level bit 1 position. */ - -#define DMA_CH_TRNINTLVL_gm 0x03 /* Transaction Complete Interrupt Level group mask. */ -#define DMA_CH_TRNINTLVL_gp 0 /* Transaction Complete Interrupt Level group position. */ -#define DMA_CH_TRNINTLVL0_bm (1<<0) /* Transaction Complete Interrupt Level bit 0 mask. */ -#define DMA_CH_TRNINTLVL0_bp 0 /* Transaction Complete Interrupt Level bit 0 position. */ -#define DMA_CH_TRNINTLVL1_bm (1<<1) /* Transaction Complete Interrupt Level bit 1 mask. */ -#define DMA_CH_TRNINTLVL1_bp 1 /* Transaction Complete Interrupt Level bit 1 position. */ - - -/* DMA_CH.ADDRCTRL bit masks and bit positions */ -#define DMA_CH_SRCRELOAD_gm 0xC0 /* Channel Source Address Reload group mask. */ -#define DMA_CH_SRCRELOAD_gp 6 /* Channel Source Address Reload group position. */ -#define DMA_CH_SRCRELOAD0_bm (1<<6) /* Channel Source Address Reload bit 0 mask. */ -#define DMA_CH_SRCRELOAD0_bp 6 /* Channel Source Address Reload bit 0 position. */ -#define DMA_CH_SRCRELOAD1_bm (1<<7) /* Channel Source Address Reload bit 1 mask. */ -#define DMA_CH_SRCRELOAD1_bp 7 /* Channel Source Address Reload bit 1 position. */ - -#define DMA_CH_SRCDIR_gm 0x30 /* Channel Source Address Mode group mask. */ -#define DMA_CH_SRCDIR_gp 4 /* Channel Source Address Mode group position. */ -#define DMA_CH_SRCDIR0_bm (1<<4) /* Channel Source Address Mode bit 0 mask. */ -#define DMA_CH_SRCDIR0_bp 4 /* Channel Source Address Mode bit 0 position. */ -#define DMA_CH_SRCDIR1_bm (1<<5) /* Channel Source Address Mode bit 1 mask. */ -#define DMA_CH_SRCDIR1_bp 5 /* Channel Source Address Mode bit 1 position. */ - -#define DMA_CH_DESTRELOAD_gm 0x0C /* Channel Destination Address Reload group mask. */ -#define DMA_CH_DESTRELOAD_gp 2 /* Channel Destination Address Reload group position. */ -#define DMA_CH_DESTRELOAD0_bm (1<<2) /* Channel Destination Address Reload bit 0 mask. */ -#define DMA_CH_DESTRELOAD0_bp 2 /* Channel Destination Address Reload bit 0 position. */ -#define DMA_CH_DESTRELOAD1_bm (1<<3) /* Channel Destination Address Reload bit 1 mask. */ -#define DMA_CH_DESTRELOAD1_bp 3 /* Channel Destination Address Reload bit 1 position. */ - -#define DMA_CH_DESTDIR_gm 0x03 /* Channel Destination Address Mode group mask. */ -#define DMA_CH_DESTDIR_gp 0 /* Channel Destination Address Mode group position. */ -#define DMA_CH_DESTDIR0_bm (1<<0) /* Channel Destination Address Mode bit 0 mask. */ -#define DMA_CH_DESTDIR0_bp 0 /* Channel Destination Address Mode bit 0 position. */ -#define DMA_CH_DESTDIR1_bm (1<<1) /* Channel Destination Address Mode bit 1 mask. */ -#define DMA_CH_DESTDIR1_bp 1 /* Channel Destination Address Mode bit 1 position. */ - - -/* DMA_CH.TRIGSRC bit masks and bit positions */ -#define DMA_CH_TRIGSRC_gm 0xFF /* Channel Trigger Source group mask. */ -#define DMA_CH_TRIGSRC_gp 0 /* Channel Trigger Source group position. */ -#define DMA_CH_TRIGSRC0_bm (1<<0) /* Channel Trigger Source bit 0 mask. */ -#define DMA_CH_TRIGSRC0_bp 0 /* Channel Trigger Source bit 0 position. */ -#define DMA_CH_TRIGSRC1_bm (1<<1) /* Channel Trigger Source bit 1 mask. */ -#define DMA_CH_TRIGSRC1_bp 1 /* Channel Trigger Source bit 1 position. */ -#define DMA_CH_TRIGSRC2_bm (1<<2) /* Channel Trigger Source bit 2 mask. */ -#define DMA_CH_TRIGSRC2_bp 2 /* Channel Trigger Source bit 2 position. */ -#define DMA_CH_TRIGSRC3_bm (1<<3) /* Channel Trigger Source bit 3 mask. */ -#define DMA_CH_TRIGSRC3_bp 3 /* Channel Trigger Source bit 3 position. */ -#define DMA_CH_TRIGSRC4_bm (1<<4) /* Channel Trigger Source bit 4 mask. */ -#define DMA_CH_TRIGSRC4_bp 4 /* Channel Trigger Source bit 4 position. */ -#define DMA_CH_TRIGSRC5_bm (1<<5) /* Channel Trigger Source bit 5 mask. */ -#define DMA_CH_TRIGSRC5_bp 5 /* Channel Trigger Source bit 5 position. */ -#define DMA_CH_TRIGSRC6_bm (1<<6) /* Channel Trigger Source bit 6 mask. */ -#define DMA_CH_TRIGSRC6_bp 6 /* Channel Trigger Source bit 6 position. */ -#define DMA_CH_TRIGSRC7_bm (1<<7) /* Channel Trigger Source bit 7 mask. */ -#define DMA_CH_TRIGSRC7_bp 7 /* Channel Trigger Source bit 7 position. */ - - -/* DMA.CTRL bit masks and bit positions */ -#define DMA_ENABLE_bm 0x80 /* Enable bit mask. */ -#define DMA_ENABLE_bp 7 /* Enable bit position. */ - -#define DMA_RESET_bm 0x40 /* Software Reset bit mask. */ -#define DMA_RESET_bp 6 /* Software Reset bit position. */ - -#define DMA_DBUFMODE_gm 0x0C /* Double Buffering Mode group mask. */ -#define DMA_DBUFMODE_gp 2 /* Double Buffering Mode group position. */ -#define DMA_DBUFMODE0_bm (1<<2) /* Double Buffering Mode bit 0 mask. */ -#define DMA_DBUFMODE0_bp 2 /* Double Buffering Mode bit 0 position. */ -#define DMA_DBUFMODE1_bm (1<<3) /* Double Buffering Mode bit 1 mask. */ -#define DMA_DBUFMODE1_bp 3 /* Double Buffering Mode bit 1 position. */ - -#define DMA_PRIMODE_gm 0x03 /* Channel Priority Mode group mask. */ -#define DMA_PRIMODE_gp 0 /* Channel Priority Mode group position. */ -#define DMA_PRIMODE0_bm (1<<0) /* Channel Priority Mode bit 0 mask. */ -#define DMA_PRIMODE0_bp 0 /* Channel Priority Mode bit 0 position. */ -#define DMA_PRIMODE1_bm (1<<1) /* Channel Priority Mode bit 1 mask. */ -#define DMA_PRIMODE1_bp 1 /* Channel Priority Mode bit 1 position. */ - - -/* DMA.INTFLAGS bit masks and bit positions */ -#define DMA_CH3ERRIF_bm 0x80 /* Channel 3 Block Transfer Error Interrupt Flag bit mask. */ -#define DMA_CH3ERRIF_bp 7 /* Channel 3 Block Transfer Error Interrupt Flag bit position. */ - -#define DMA_CH2ERRIF_bm 0x40 /* Channel 2 Block Transfer Error Interrupt Flag bit mask. */ -#define DMA_CH2ERRIF_bp 6 /* Channel 2 Block Transfer Error Interrupt Flag bit position. */ - -#define DMA_CH1ERRIF_bm 0x20 /* Channel 1 Block Transfer Error Interrupt Flag bit mask. */ -#define DMA_CH1ERRIF_bp 5 /* Channel 1 Block Transfer Error Interrupt Flag bit position. */ - -#define DMA_CH0ERRIF_bm 0x10 /* Channel 0 Block Transfer Error Interrupt Flag bit mask. */ -#define DMA_CH0ERRIF_bp 4 /* Channel 0 Block Transfer Error Interrupt Flag bit position. */ - -#define DMA_CH3TRNIF_bm 0x08 /* Channel 3 Transaction Complete Interrupt Flag bit mask. */ -#define DMA_CH3TRNIF_bp 3 /* Channel 3 Transaction Complete Interrupt Flag bit position. */ - -#define DMA_CH2TRNIF_bm 0x04 /* Channel 2 Transaction Complete Interrupt Flag bit mask. */ -#define DMA_CH2TRNIF_bp 2 /* Channel 2 Transaction Complete Interrupt Flag bit position. */ - -#define DMA_CH1TRNIF_bm 0x02 /* Channel 1 Transaction Complete Interrupt Flag bit mask. */ -#define DMA_CH1TRNIF_bp 1 /* Channel 1 Transaction Complete Interrupt Flag bit position. */ - -#define DMA_CH0TRNIF_bm 0x01 /* Channel 0 Transaction Complete Interrupt Flag bit mask. */ -#define DMA_CH0TRNIF_bp 0 /* Channel 0 Transaction Complete Interrupt Flag bit position. */ - - -/* DMA.STATUS bit masks and bit positions */ -#define DMA_CH3BUSY_bm 0x80 /* Channel 3 Block Transfer Busy bit mask. */ -#define DMA_CH3BUSY_bp 7 /* Channel 3 Block Transfer Busy bit position. */ - -#define DMA_CH2BUSY_bm 0x40 /* Channel 2 Block Transfer Busy bit mask. */ -#define DMA_CH2BUSY_bp 6 /* Channel 2 Block Transfer Busy bit position. */ - -#define DMA_CH1BUSY_bm 0x20 /* Channel 1 Block Transfer Busy bit mask. */ -#define DMA_CH1BUSY_bp 5 /* Channel 1 Block Transfer Busy bit position. */ - -#define DMA_CH0BUSY_bm 0x10 /* Channel 0 Block Transfer Busy bit mask. */ -#define DMA_CH0BUSY_bp 4 /* Channel 0 Block Transfer Busy bit position. */ - -#define DMA_CH3PEND_bm 0x08 /* Channel 3 Block Transfer Pending bit mask. */ -#define DMA_CH3PEND_bp 3 /* Channel 3 Block Transfer Pending bit position. */ - -#define DMA_CH2PEND_bm 0x04 /* Channel 2 Block Transfer Pending bit mask. */ -#define DMA_CH2PEND_bp 2 /* Channel 2 Block Transfer Pending bit position. */ - -#define DMA_CH1PEND_bm 0x02 /* Channel 1 Block Transfer Pending bit mask. */ -#define DMA_CH1PEND_bp 1 /* Channel 1 Block Transfer Pending bit position. */ - -#define DMA_CH0PEND_bm 0x01 /* Channel 0 Block Transfer Pending bit mask. */ -#define DMA_CH0PEND_bp 0 /* Channel 0 Block Transfer Pending bit position. */ - - -/* EVSYS - Event System */ -/* EVSYS.CH0MUX bit masks and bit positions */ -#define EVSYS_CHMUX_gm 0xFF /* Event Channel 0 Multiplexer group mask. */ -#define EVSYS_CHMUX_gp 0 /* Event Channel 0 Multiplexer group position. */ -#define EVSYS_CHMUX0_bm (1<<0) /* Event Channel 0 Multiplexer bit 0 mask. */ -#define EVSYS_CHMUX0_bp 0 /* Event Channel 0 Multiplexer bit 0 position. */ -#define EVSYS_CHMUX1_bm (1<<1) /* Event Channel 0 Multiplexer bit 1 mask. */ -#define EVSYS_CHMUX1_bp 1 /* Event Channel 0 Multiplexer bit 1 position. */ -#define EVSYS_CHMUX2_bm (1<<2) /* Event Channel 0 Multiplexer bit 2 mask. */ -#define EVSYS_CHMUX2_bp 2 /* Event Channel 0 Multiplexer bit 2 position. */ -#define EVSYS_CHMUX3_bm (1<<3) /* Event Channel 0 Multiplexer bit 3 mask. */ -#define EVSYS_CHMUX3_bp 3 /* Event Channel 0 Multiplexer bit 3 position. */ -#define EVSYS_CHMUX4_bm (1<<4) /* Event Channel 0 Multiplexer bit 4 mask. */ -#define EVSYS_CHMUX4_bp 4 /* Event Channel 0 Multiplexer bit 4 position. */ -#define EVSYS_CHMUX5_bm (1<<5) /* Event Channel 0 Multiplexer bit 5 mask. */ -#define EVSYS_CHMUX5_bp 5 /* Event Channel 0 Multiplexer bit 5 position. */ -#define EVSYS_CHMUX6_bm (1<<6) /* Event Channel 0 Multiplexer bit 6 mask. */ -#define EVSYS_CHMUX6_bp 6 /* Event Channel 0 Multiplexer bit 6 position. */ -#define EVSYS_CHMUX7_bm (1<<7) /* Event Channel 0 Multiplexer bit 7 mask. */ -#define EVSYS_CHMUX7_bp 7 /* Event Channel 0 Multiplexer bit 7 position. */ - - -/* EVSYS.CH1MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH2MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH3MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH4MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH5MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH6MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH7MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH0CTRL bit masks and bit positions */ -#define EVSYS_QDIRM_gm 0x60 /* Quadrature Decoder Index Recognition Mode group mask. */ -#define EVSYS_QDIRM_gp 5 /* Quadrature Decoder Index Recognition Mode group position. */ -#define EVSYS_QDIRM0_bm (1<<5) /* Quadrature Decoder Index Recognition Mode bit 0 mask. */ -#define EVSYS_QDIRM0_bp 5 /* Quadrature Decoder Index Recognition Mode bit 0 position. */ -#define EVSYS_QDIRM1_bm (1<<6) /* Quadrature Decoder Index Recognition Mode bit 1 mask. */ -#define EVSYS_QDIRM1_bp 6 /* Quadrature Decoder Index Recognition Mode bit 1 position. */ - -#define EVSYS_QDIEN_bm 0x10 /* Quadrature Decoder Index Enable bit mask. */ -#define EVSYS_QDIEN_bp 4 /* Quadrature Decoder Index Enable bit position. */ - -#define EVSYS_QDEN_bm 0x08 /* Quadrature Decoder Enable bit mask. */ -#define EVSYS_QDEN_bp 3 /* Quadrature Decoder Enable bit position. */ - -#define EVSYS_DIGFILT_gm 0x07 /* Digital Filter group mask. */ -#define EVSYS_DIGFILT_gp 0 /* Digital Filter group position. */ -#define EVSYS_DIGFILT0_bm (1<<0) /* Digital Filter bit 0 mask. */ -#define EVSYS_DIGFILT0_bp 0 /* Digital Filter bit 0 position. */ -#define EVSYS_DIGFILT1_bm (1<<1) /* Digital Filter bit 1 mask. */ -#define EVSYS_DIGFILT1_bp 1 /* Digital Filter bit 1 position. */ -#define EVSYS_DIGFILT2_bm (1<<2) /* Digital Filter bit 2 mask. */ -#define EVSYS_DIGFILT2_bp 2 /* Digital Filter bit 2 position. */ - - -/* EVSYS.CH1CTRL bit masks and bit positions */ -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* EVSYS.CH2CTRL bit masks and bit positions */ -/* EVSYS_QDIRM_gm Predefined. */ -/* EVSYS_QDIRM_gp Predefined. */ -/* EVSYS_QDIRM0_bm Predefined. */ -/* EVSYS_QDIRM0_bp Predefined. */ -/* EVSYS_QDIRM1_bm Predefined. */ -/* EVSYS_QDIRM1_bp Predefined. */ - -/* EVSYS_QDIEN_bm Predefined. */ -/* EVSYS_QDIEN_bp Predefined. */ - -/* EVSYS_QDEN_bm Predefined. */ -/* EVSYS_QDEN_bp Predefined. */ - -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* EVSYS.CH3CTRL bit masks and bit positions */ -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* EVSYS.CH4CTRL bit masks and bit positions */ -/* EVSYS_QDIRM_gm Predefined. */ -/* EVSYS_QDIRM_gp Predefined. */ -/* EVSYS_QDIRM0_bm Predefined. */ -/* EVSYS_QDIRM0_bp Predefined. */ -/* EVSYS_QDIRM1_bm Predefined. */ -/* EVSYS_QDIRM1_bp Predefined. */ - -/* EVSYS_QDIEN_bm Predefined. */ -/* EVSYS_QDIEN_bp Predefined. */ - -/* EVSYS_QDEN_bm Predefined. */ -/* EVSYS_QDEN_bp Predefined. */ - -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* EVSYS.CH5CTRL bit masks and bit positions */ -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* EVSYS.CH6CTRL bit masks and bit positions */ -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* EVSYS.CH7CTRL bit masks and bit positions */ -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* NVM - Non Volatile Memory Controller */ -/* NVM.CMD bit masks and bit positions */ -#define NVM_CMD_gm 0xFF /* Command group mask. */ -#define NVM_CMD_gp 0 /* Command group position. */ -#define NVM_CMD0_bm (1<<0) /* Command bit 0 mask. */ -#define NVM_CMD0_bp 0 /* Command bit 0 position. */ -#define NVM_CMD1_bm (1<<1) /* Command bit 1 mask. */ -#define NVM_CMD1_bp 1 /* Command bit 1 position. */ -#define NVM_CMD2_bm (1<<2) /* Command bit 2 mask. */ -#define NVM_CMD2_bp 2 /* Command bit 2 position. */ -#define NVM_CMD3_bm (1<<3) /* Command bit 3 mask. */ -#define NVM_CMD3_bp 3 /* Command bit 3 position. */ -#define NVM_CMD4_bm (1<<4) /* Command bit 4 mask. */ -#define NVM_CMD4_bp 4 /* Command bit 4 position. */ -#define NVM_CMD5_bm (1<<5) /* Command bit 5 mask. */ -#define NVM_CMD5_bp 5 /* Command bit 5 position. */ -#define NVM_CMD6_bm (1<<6) /* Command bit 6 mask. */ -#define NVM_CMD6_bp 6 /* Command bit 6 position. */ -#define NVM_CMD7_bm (1<<7) /* Command bit 7 mask. */ -#define NVM_CMD7_bp 7 /* Command bit 7 position. */ - - -/* NVM.CTRLA bit masks and bit positions */ -#define NVM_CMDEX_bm 0x01 /* Command Execute bit mask. */ -#define NVM_CMDEX_bp 0 /* Command Execute bit position. */ - - -/* NVM.CTRLB bit masks and bit positions */ -#define NVM_EEMAPEN_bm 0x08 /* EEPROM Mapping Enable bit mask. */ -#define NVM_EEMAPEN_bp 3 /* EEPROM Mapping Enable bit position. */ - -#define NVM_FPRM_bm 0x04 /* Flash Power Reduction Enable bit mask. */ -#define NVM_FPRM_bp 2 /* Flash Power Reduction Enable bit position. */ - -#define NVM_EPRM_bm 0x02 /* EEPROM Power Reduction Enable bit mask. */ -#define NVM_EPRM_bp 1 /* EEPROM Power Reduction Enable bit position. */ - -#define NVM_SPMLOCK_bm 0x01 /* SPM Lock bit mask. */ -#define NVM_SPMLOCK_bp 0 /* SPM Lock bit position. */ - - -/* NVM.INTCTRL bit masks and bit positions */ -#define NVM_SPMLVL_gm 0x0C /* SPM Interrupt Level group mask. */ -#define NVM_SPMLVL_gp 2 /* SPM Interrupt Level group position. */ -#define NVM_SPMLVL0_bm (1<<2) /* SPM Interrupt Level bit 0 mask. */ -#define NVM_SPMLVL0_bp 2 /* SPM Interrupt Level bit 0 position. */ -#define NVM_SPMLVL1_bm (1<<3) /* SPM Interrupt Level bit 1 mask. */ -#define NVM_SPMLVL1_bp 3 /* SPM Interrupt Level bit 1 position. */ - -#define NVM_EELVL_gm 0x03 /* EEPROM Interrupt Level group mask. */ -#define NVM_EELVL_gp 0 /* EEPROM Interrupt Level group position. */ -#define NVM_EELVL0_bm (1<<0) /* EEPROM Interrupt Level bit 0 mask. */ -#define NVM_EELVL0_bp 0 /* EEPROM Interrupt Level bit 0 position. */ -#define NVM_EELVL1_bm (1<<1) /* EEPROM Interrupt Level bit 1 mask. */ -#define NVM_EELVL1_bp 1 /* EEPROM Interrupt Level bit 1 position. */ - - -/* NVM.STATUS bit masks and bit positions */ -#define NVM_NVMBUSY_bm 0x80 /* Non-volatile Memory Busy bit mask. */ -#define NVM_NVMBUSY_bp 7 /* Non-volatile Memory Busy bit position. */ - -#define NVM_FBUSY_bm 0x40 /* Flash Memory Busy bit mask. */ -#define NVM_FBUSY_bp 6 /* Flash Memory Busy bit position. */ - -#define NVM_EELOAD_bm 0x02 /* EEPROM Page Buffer Active Loading bit mask. */ -#define NVM_EELOAD_bp 1 /* EEPROM Page Buffer Active Loading bit position. */ - -#define NVM_FLOAD_bm 0x01 /* Flash Page Buffer Active Loading bit mask. */ -#define NVM_FLOAD_bp 0 /* Flash Page Buffer Active Loading bit position. */ - - -/* NVM.LOCKBITS bit masks and bit positions */ -#define NVM_BLBB_gm 0xC0 /* Boot Lock Bits - Boot Section group mask. */ -#define NVM_BLBB_gp 6 /* Boot Lock Bits - Boot Section group position. */ -#define NVM_BLBB0_bm (1<<6) /* Boot Lock Bits - Boot Section bit 0 mask. */ -#define NVM_BLBB0_bp 6 /* Boot Lock Bits - Boot Section bit 0 position. */ -#define NVM_BLBB1_bm (1<<7) /* Boot Lock Bits - Boot Section bit 1 mask. */ -#define NVM_BLBB1_bp 7 /* Boot Lock Bits - Boot Section bit 1 position. */ - -#define NVM_BLBA_gm 0x30 /* Boot Lock Bits - Application Section group mask. */ -#define NVM_BLBA_gp 4 /* Boot Lock Bits - Application Section group position. */ -#define NVM_BLBA0_bm (1<<4) /* Boot Lock Bits - Application Section bit 0 mask. */ -#define NVM_BLBA0_bp 4 /* Boot Lock Bits - Application Section bit 0 position. */ -#define NVM_BLBA1_bm (1<<5) /* Boot Lock Bits - Application Section bit 1 mask. */ -#define NVM_BLBA1_bp 5 /* Boot Lock Bits - Application Section bit 1 position. */ - -#define NVM_BLBAT_gm 0x0C /* Boot Lock Bits - Application Table group mask. */ -#define NVM_BLBAT_gp 2 /* Boot Lock Bits - Application Table group position. */ -#define NVM_BLBAT0_bm (1<<2) /* Boot Lock Bits - Application Table bit 0 mask. */ -#define NVM_BLBAT0_bp 2 /* Boot Lock Bits - Application Table bit 0 position. */ -#define NVM_BLBAT1_bm (1<<3) /* Boot Lock Bits - Application Table bit 1 mask. */ -#define NVM_BLBAT1_bp 3 /* Boot Lock Bits - Application Table bit 1 position. */ - -#define NVM_LB_gm 0x03 /* Lock Bits group mask. */ -#define NVM_LB_gp 0 /* Lock Bits group position. */ -#define NVM_LB0_bm (1<<0) /* Lock Bits bit 0 mask. */ -#define NVM_LB0_bp 0 /* Lock Bits bit 0 position. */ -#define NVM_LB1_bm (1<<1) /* Lock Bits bit 1 mask. */ -#define NVM_LB1_bp 1 /* Lock Bits bit 1 position. */ - - -/* NVM_LOCKBITS.LOCKBITS bit masks and bit positions */ -#define NVM_LOCKBITS_BLBB_gm 0xC0 /* Boot Lock Bits - Boot Section group mask. */ -#define NVM_LOCKBITS_BLBB_gp 6 /* Boot Lock Bits - Boot Section group position. */ -#define NVM_LOCKBITS_BLBB0_bm (1<<6) /* Boot Lock Bits - Boot Section bit 0 mask. */ -#define NVM_LOCKBITS_BLBB0_bp 6 /* Boot Lock Bits - Boot Section bit 0 position. */ -#define NVM_LOCKBITS_BLBB1_bm (1<<7) /* Boot Lock Bits - Boot Section bit 1 mask. */ -#define NVM_LOCKBITS_BLBB1_bp 7 /* Boot Lock Bits - Boot Section bit 1 position. */ - -#define NVM_LOCKBITS_BLBA_gm 0x30 /* Boot Lock Bits - Application Section group mask. */ -#define NVM_LOCKBITS_BLBA_gp 4 /* Boot Lock Bits - Application Section group position. */ -#define NVM_LOCKBITS_BLBA0_bm (1<<4) /* Boot Lock Bits - Application Section bit 0 mask. */ -#define NVM_LOCKBITS_BLBA0_bp 4 /* Boot Lock Bits - Application Section bit 0 position. */ -#define NVM_LOCKBITS_BLBA1_bm (1<<5) /* Boot Lock Bits - Application Section bit 1 mask. */ -#define NVM_LOCKBITS_BLBA1_bp 5 /* Boot Lock Bits - Application Section bit 1 position. */ - -#define NVM_LOCKBITS_BLBAT_gm 0x0C /* Boot Lock Bits - Application Table group mask. */ -#define NVM_LOCKBITS_BLBAT_gp 2 /* Boot Lock Bits - Application Table group position. */ -#define NVM_LOCKBITS_BLBAT0_bm (1<<2) /* Boot Lock Bits - Application Table bit 0 mask. */ -#define NVM_LOCKBITS_BLBAT0_bp 2 /* Boot Lock Bits - Application Table bit 0 position. */ -#define NVM_LOCKBITS_BLBAT1_bm (1<<3) /* Boot Lock Bits - Application Table bit 1 mask. */ -#define NVM_LOCKBITS_BLBAT1_bp 3 /* Boot Lock Bits - Application Table bit 1 position. */ - -#define NVM_LOCKBITS_LB_gm 0x03 /* Lock Bits group mask. */ -#define NVM_LOCKBITS_LB_gp 0 /* Lock Bits group position. */ -#define NVM_LOCKBITS_LB0_bm (1<<0) /* Lock Bits bit 0 mask. */ -#define NVM_LOCKBITS_LB0_bp 0 /* Lock Bits bit 0 position. */ -#define NVM_LOCKBITS_LB1_bm (1<<1) /* Lock Bits bit 1 mask. */ -#define NVM_LOCKBITS_LB1_bp 1 /* Lock Bits bit 1 position. */ - - -/* NVM_FUSES.FUSEBYTE0 bit masks and bit positions */ -#define NVM_FUSES_JTAGUSERID_gm 0xFF /* JTAG User ID group mask. */ -#define NVM_FUSES_JTAGUSERID_gp 0 /* JTAG User ID group position. */ -#define NVM_FUSES_JTAGUSERID0_bm (1<<0) /* JTAG User ID bit 0 mask. */ -#define NVM_FUSES_JTAGUSERID0_bp 0 /* JTAG User ID bit 0 position. */ -#define NVM_FUSES_JTAGUSERID1_bm (1<<1) /* JTAG User ID bit 1 mask. */ -#define NVM_FUSES_JTAGUSERID1_bp 1 /* JTAG User ID bit 1 position. */ -#define NVM_FUSES_JTAGUSERID2_bm (1<<2) /* JTAG User ID bit 2 mask. */ -#define NVM_FUSES_JTAGUSERID2_bp 2 /* JTAG User ID bit 2 position. */ -#define NVM_FUSES_JTAGUSERID3_bm (1<<3) /* JTAG User ID bit 3 mask. */ -#define NVM_FUSES_JTAGUSERID3_bp 3 /* JTAG User ID bit 3 position. */ -#define NVM_FUSES_JTAGUSERID4_bm (1<<4) /* JTAG User ID bit 4 mask. */ -#define NVM_FUSES_JTAGUSERID4_bp 4 /* JTAG User ID bit 4 position. */ -#define NVM_FUSES_JTAGUSERID5_bm (1<<5) /* JTAG User ID bit 5 mask. */ -#define NVM_FUSES_JTAGUSERID5_bp 5 /* JTAG User ID bit 5 position. */ -#define NVM_FUSES_JTAGUSERID6_bm (1<<6) /* JTAG User ID bit 6 mask. */ -#define NVM_FUSES_JTAGUSERID6_bp 6 /* JTAG User ID bit 6 position. */ -#define NVM_FUSES_JTAGUSERID7_bm (1<<7) /* JTAG User ID bit 7 mask. */ -#define NVM_FUSES_JTAGUSERID7_bp 7 /* JTAG User ID bit 7 position. */ - - -/* NVM_FUSES.FUSEBYTE1 bit masks and bit positions */ -#define NVM_FUSES_WDWP_gm 0xF0 /* Watchdog Window Timeout Period group mask. */ -#define NVM_FUSES_WDWP_gp 4 /* Watchdog Window Timeout Period group position. */ -#define NVM_FUSES_WDWP0_bm (1<<4) /* Watchdog Window Timeout Period bit 0 mask. */ -#define NVM_FUSES_WDWP0_bp 4 /* Watchdog Window Timeout Period bit 0 position. */ -#define NVM_FUSES_WDWP1_bm (1<<5) /* Watchdog Window Timeout Period bit 1 mask. */ -#define NVM_FUSES_WDWP1_bp 5 /* Watchdog Window Timeout Period bit 1 position. */ -#define NVM_FUSES_WDWP2_bm (1<<6) /* Watchdog Window Timeout Period bit 2 mask. */ -#define NVM_FUSES_WDWP2_bp 6 /* Watchdog Window Timeout Period bit 2 position. */ -#define NVM_FUSES_WDWP3_bm (1<<7) /* Watchdog Window Timeout Period bit 3 mask. */ -#define NVM_FUSES_WDWP3_bp 7 /* Watchdog Window Timeout Period bit 3 position. */ - -#define NVM_FUSES_WDP_gm 0x0F /* Watchdog Timeout Period group mask. */ -#define NVM_FUSES_WDP_gp 0 /* Watchdog Timeout Period group position. */ -#define NVM_FUSES_WDP0_bm (1<<0) /* Watchdog Timeout Period bit 0 mask. */ -#define NVM_FUSES_WDP0_bp 0 /* Watchdog Timeout Period bit 0 position. */ -#define NVM_FUSES_WDP1_bm (1<<1) /* Watchdog Timeout Period bit 1 mask. */ -#define NVM_FUSES_WDP1_bp 1 /* Watchdog Timeout Period bit 1 position. */ -#define NVM_FUSES_WDP2_bm (1<<2) /* Watchdog Timeout Period bit 2 mask. */ -#define NVM_FUSES_WDP2_bp 2 /* Watchdog Timeout Period bit 2 position. */ -#define NVM_FUSES_WDP3_bm (1<<3) /* Watchdog Timeout Period bit 3 mask. */ -#define NVM_FUSES_WDP3_bp 3 /* Watchdog Timeout Period bit 3 position. */ - - -/* NVM_FUSES.FUSEBYTE2 bit masks and bit positions */ -#define NVM_FUSES_DVSDON_bm 0x80 /* Spike Detector Enable bit mask. */ -#define NVM_FUSES_DVSDON_bp 7 /* Spike Detector Enable bit position. */ - -#define NVM_FUSES_BOOTRST_bm 0x40 /* Boot Loader Section Reset Vector bit mask. */ -#define NVM_FUSES_BOOTRST_bp 6 /* Boot Loader Section Reset Vector bit position. */ - -#define NVM_FUSES_BODACT_gm 0x0C /* BOD Operation in Active Mode group mask. */ -#define NVM_FUSES_BODACT_gp 2 /* BOD Operation in Active Mode group position. */ -#define NVM_FUSES_BODACT0_bm (1<<2) /* BOD Operation in Active Mode bit 0 mask. */ -#define NVM_FUSES_BODACT0_bp 2 /* BOD Operation in Active Mode bit 0 position. */ -#define NVM_FUSES_BODACT1_bm (1<<3) /* BOD Operation in Active Mode bit 1 mask. */ -#define NVM_FUSES_BODACT1_bp 3 /* BOD Operation in Active Mode bit 1 position. */ - -#define NVM_FUSES_BODPD_gm 0x03 /* BOD Operation in Power-Down Mode group mask. */ -#define NVM_FUSES_BODPD_gp 0 /* BOD Operation in Power-Down Mode group position. */ -#define NVM_FUSES_BODPD0_bm (1<<0) /* BOD Operation in Power-Down Mode bit 0 mask. */ -#define NVM_FUSES_BODPD0_bp 0 /* BOD Operation in Power-Down Mode bit 0 position. */ -#define NVM_FUSES_BODPD1_bm (1<<1) /* BOD Operation in Power-Down Mode bit 1 mask. */ -#define NVM_FUSES_BODPD1_bp 1 /* BOD Operation in Power-Down Mode bit 1 position. */ - - -/* NVM_FUSES.FUSEBYTE4 bit masks and bit positions */ -#define NVM_FUSES_SUT_gm 0x0C /* Start-up Time group mask. */ -#define NVM_FUSES_SUT_gp 2 /* Start-up Time group position. */ -#define NVM_FUSES_SUT0_bm (1<<2) /* Start-up Time bit 0 mask. */ -#define NVM_FUSES_SUT0_bp 2 /* Start-up Time bit 0 position. */ -#define NVM_FUSES_SUT1_bm (1<<3) /* Start-up Time bit 1 mask. */ -#define NVM_FUSES_SUT1_bp 3 /* Start-up Time bit 1 position. */ - -#define NVM_FUSES_WDLOCK_bm 0x02 /* Watchdog Timer Lock bit mask. */ -#define NVM_FUSES_WDLOCK_bp 1 /* Watchdog Timer Lock bit position. */ - -#define NVM_FUSES_JTAGEN_bm 0x01 /* JTAG Interface Enable bit mask. */ -#define NVM_FUSES_JTAGEN_bp 0 /* JTAG Interface Enable bit position. */ - - -/* NVM_FUSES.FUSEBYTE5 bit masks and bit positions */ -#define NVM_FUSES_EESAVE_bm 0x08 /* Preserve EEPROM Through Chip Erase bit mask. */ -#define NVM_FUSES_EESAVE_bp 3 /* Preserve EEPROM Through Chip Erase bit position. */ - -#define NVM_FUSES_BODLVL_gm 0x07 /* Brown Out Detection Voltage Level group mask. */ -#define NVM_FUSES_BODLVL_gp 0 /* Brown Out Detection Voltage Level group position. */ -#define NVM_FUSES_BODLVL0_bm (1<<0) /* Brown Out Detection Voltage Level bit 0 mask. */ -#define NVM_FUSES_BODLVL0_bp 0 /* Brown Out Detection Voltage Level bit 0 position. */ -#define NVM_FUSES_BODLVL1_bm (1<<1) /* Brown Out Detection Voltage Level bit 1 mask. */ -#define NVM_FUSES_BODLVL1_bp 1 /* Brown Out Detection Voltage Level bit 1 position. */ -#define NVM_FUSES_BODLVL2_bm (1<<2) /* Brown Out Detection Voltage Level bit 2 mask. */ -#define NVM_FUSES_BODLVL2_bp 2 /* Brown Out Detection Voltage Level bit 2 position. */ - - -/* AC - Analog Comparator */ -/* AC.AC0CTRL bit masks and bit positions */ -#define AC_INTMODE_gm 0xC0 /* Interrupt Mode group mask. */ -#define AC_INTMODE_gp 6 /* Interrupt Mode group position. */ -#define AC_INTMODE0_bm (1<<6) /* Interrupt Mode bit 0 mask. */ -#define AC_INTMODE0_bp 6 /* Interrupt Mode bit 0 position. */ -#define AC_INTMODE1_bm (1<<7) /* Interrupt Mode bit 1 mask. */ -#define AC_INTMODE1_bp 7 /* Interrupt Mode bit 1 position. */ - -#define AC_INTLVL_gm 0x30 /* Interrupt Level group mask. */ -#define AC_INTLVL_gp 4 /* Interrupt Level group position. */ -#define AC_INTLVL0_bm (1<<4) /* Interrupt Level bit 0 mask. */ -#define AC_INTLVL0_bp 4 /* Interrupt Level bit 0 position. */ -#define AC_INTLVL1_bm (1<<5) /* Interrupt Level bit 1 mask. */ -#define AC_INTLVL1_bp 5 /* Interrupt Level bit 1 position. */ - -#define AC_HSMODE_bm 0x08 /* High-speed Mode bit mask. */ -#define AC_HSMODE_bp 3 /* High-speed Mode bit position. */ - -#define AC_HYSMODE_gm 0x06 /* Hysteresis Mode group mask. */ -#define AC_HYSMODE_gp 1 /* Hysteresis Mode group position. */ -#define AC_HYSMODE0_bm (1<<1) /* Hysteresis Mode bit 0 mask. */ -#define AC_HYSMODE0_bp 1 /* Hysteresis Mode bit 0 position. */ -#define AC_HYSMODE1_bm (1<<2) /* Hysteresis Mode bit 1 mask. */ -#define AC_HYSMODE1_bp 2 /* Hysteresis Mode bit 1 position. */ - -#define AC_ENABLE_bm 0x01 /* Enable bit mask. */ -#define AC_ENABLE_bp 0 /* Enable bit position. */ - - -/* AC.AC1CTRL bit masks and bit positions */ -/* AC_INTMODE_gm Predefined. */ -/* AC_INTMODE_gp Predefined. */ -/* AC_INTMODE0_bm Predefined. */ -/* AC_INTMODE0_bp Predefined. */ -/* AC_INTMODE1_bm Predefined. */ -/* AC_INTMODE1_bp Predefined. */ - -/* AC_INTLVL_gm Predefined. */ -/* AC_INTLVL_gp Predefined. */ -/* AC_INTLVL0_bm Predefined. */ -/* AC_INTLVL0_bp Predefined. */ -/* AC_INTLVL1_bm Predefined. */ -/* AC_INTLVL1_bp Predefined. */ - -/* AC_HSMODE_bm Predefined. */ -/* AC_HSMODE_bp Predefined. */ - -/* AC_HYSMODE_gm Predefined. */ -/* AC_HYSMODE_gp Predefined. */ -/* AC_HYSMODE0_bm Predefined. */ -/* AC_HYSMODE0_bp Predefined. */ -/* AC_HYSMODE1_bm Predefined. */ -/* AC_HYSMODE1_bp Predefined. */ - -/* AC_ENABLE_bm Predefined. */ -/* AC_ENABLE_bp Predefined. */ - - -/* AC.AC0MUXCTRL bit masks and bit positions */ -#define AC_MUXPOS_gm 0x38 /* MUX Positive Input group mask. */ -#define AC_MUXPOS_gp 3 /* MUX Positive Input group position. */ -#define AC_MUXPOS0_bm (1<<3) /* MUX Positive Input bit 0 mask. */ -#define AC_MUXPOS0_bp 3 /* MUX Positive Input bit 0 position. */ -#define AC_MUXPOS1_bm (1<<4) /* MUX Positive Input bit 1 mask. */ -#define AC_MUXPOS1_bp 4 /* MUX Positive Input bit 1 position. */ -#define AC_MUXPOS2_bm (1<<5) /* MUX Positive Input bit 2 mask. */ -#define AC_MUXPOS2_bp 5 /* MUX Positive Input bit 2 position. */ - -#define AC_MUXNEG_gm 0x07 /* MUX Negative Input group mask. */ -#define AC_MUXNEG_gp 0 /* MUX Negative Input group position. */ -#define AC_MUXNEG0_bm (1<<0) /* MUX Negative Input bit 0 mask. */ -#define AC_MUXNEG0_bp 0 /* MUX Negative Input bit 0 position. */ -#define AC_MUXNEG1_bm (1<<1) /* MUX Negative Input bit 1 mask. */ -#define AC_MUXNEG1_bp 1 /* MUX Negative Input bit 1 position. */ -#define AC_MUXNEG2_bm (1<<2) /* MUX Negative Input bit 2 mask. */ -#define AC_MUXNEG2_bp 2 /* MUX Negative Input bit 2 position. */ - - -/* AC.AC1MUXCTRL bit masks and bit positions */ -/* AC_MUXPOS_gm Predefined. */ -/* AC_MUXPOS_gp Predefined. */ -/* AC_MUXPOS0_bm Predefined. */ -/* AC_MUXPOS0_bp Predefined. */ -/* AC_MUXPOS1_bm Predefined. */ -/* AC_MUXPOS1_bp Predefined. */ -/* AC_MUXPOS2_bm Predefined. */ -/* AC_MUXPOS2_bp Predefined. */ - -/* AC_MUXNEG_gm Predefined. */ -/* AC_MUXNEG_gp Predefined. */ -/* AC_MUXNEG0_bm Predefined. */ -/* AC_MUXNEG0_bp Predefined. */ -/* AC_MUXNEG1_bm Predefined. */ -/* AC_MUXNEG1_bp Predefined. */ -/* AC_MUXNEG2_bm Predefined. */ -/* AC_MUXNEG2_bp Predefined. */ - - -/* AC.CTRLA bit masks and bit positions */ -#define AC_AC0OUT_bm 0x01 /* Comparator 0 Output Enable bit mask. */ -#define AC_AC0OUT_bp 0 /* Comparator 0 Output Enable bit position. */ - - -/* AC.CTRLB bit masks and bit positions */ -#define AC_SCALEFAC_gm 0x3F /* VCC Voltage Scaler Factor group mask. */ -#define AC_SCALEFAC_gp 0 /* VCC Voltage Scaler Factor group position. */ -#define AC_SCALEFAC0_bm (1<<0) /* VCC Voltage Scaler Factor bit 0 mask. */ -#define AC_SCALEFAC0_bp 0 /* VCC Voltage Scaler Factor bit 0 position. */ -#define AC_SCALEFAC1_bm (1<<1) /* VCC Voltage Scaler Factor bit 1 mask. */ -#define AC_SCALEFAC1_bp 1 /* VCC Voltage Scaler Factor bit 1 position. */ -#define AC_SCALEFAC2_bm (1<<2) /* VCC Voltage Scaler Factor bit 2 mask. */ -#define AC_SCALEFAC2_bp 2 /* VCC Voltage Scaler Factor bit 2 position. */ -#define AC_SCALEFAC3_bm (1<<3) /* VCC Voltage Scaler Factor bit 3 mask. */ -#define AC_SCALEFAC3_bp 3 /* VCC Voltage Scaler Factor bit 3 position. */ -#define AC_SCALEFAC4_bm (1<<4) /* VCC Voltage Scaler Factor bit 4 mask. */ -#define AC_SCALEFAC4_bp 4 /* VCC Voltage Scaler Factor bit 4 position. */ -#define AC_SCALEFAC5_bm (1<<5) /* VCC Voltage Scaler Factor bit 5 mask. */ -#define AC_SCALEFAC5_bp 5 /* VCC Voltage Scaler Factor bit 5 position. */ - - -/* AC.WINCTRL bit masks and bit positions */ -#define AC_WEN_bm 0x10 /* Window Mode Enable bit mask. */ -#define AC_WEN_bp 4 /* Window Mode Enable bit position. */ - -#define AC_WINTMODE_gm 0x0C /* Window Interrupt Mode group mask. */ -#define AC_WINTMODE_gp 2 /* Window Interrupt Mode group position. */ -#define AC_WINTMODE0_bm (1<<2) /* Window Interrupt Mode bit 0 mask. */ -#define AC_WINTMODE0_bp 2 /* Window Interrupt Mode bit 0 position. */ -#define AC_WINTMODE1_bm (1<<3) /* Window Interrupt Mode bit 1 mask. */ -#define AC_WINTMODE1_bp 3 /* Window Interrupt Mode bit 1 position. */ - -#define AC_WINTLVL_gm 0x03 /* Window Interrupt Level group mask. */ -#define AC_WINTLVL_gp 0 /* Window Interrupt Level group position. */ -#define AC_WINTLVL0_bm (1<<0) /* Window Interrupt Level bit 0 mask. */ -#define AC_WINTLVL0_bp 0 /* Window Interrupt Level bit 0 position. */ -#define AC_WINTLVL1_bm (1<<1) /* Window Interrupt Level bit 1 mask. */ -#define AC_WINTLVL1_bp 1 /* Window Interrupt Level bit 1 position. */ - - -/* AC.STATUS bit masks and bit positions */ -#define AC_WSTATE_gm 0xC0 /* Window Mode State group mask. */ -#define AC_WSTATE_gp 6 /* Window Mode State group position. */ -#define AC_WSTATE0_bm (1<<6) /* Window Mode State bit 0 mask. */ -#define AC_WSTATE0_bp 6 /* Window Mode State bit 0 position. */ -#define AC_WSTATE1_bm (1<<7) /* Window Mode State bit 1 mask. */ -#define AC_WSTATE1_bp 7 /* Window Mode State bit 1 position. */ - -#define AC_AC1STATE_bm 0x20 /* Comparator 1 State bit mask. */ -#define AC_AC1STATE_bp 5 /* Comparator 1 State bit position. */ - -#define AC_AC0STATE_bm 0x10 /* Comparator 0 State bit mask. */ -#define AC_AC0STATE_bp 4 /* Comparator 0 State bit position. */ - -#define AC_WIF_bm 0x04 /* Window Mode Interrupt Flag bit mask. */ -#define AC_WIF_bp 2 /* Window Mode Interrupt Flag bit position. */ - -#define AC_AC1IF_bm 0x02 /* Comparator 1 Interrupt Flag bit mask. */ -#define AC_AC1IF_bp 1 /* Comparator 1 Interrupt Flag bit position. */ - -#define AC_AC0IF_bm 0x01 /* Comparator 0 Interrupt Flag bit mask. */ -#define AC_AC0IF_bp 0 /* Comparator 0 Interrupt Flag bit position. */ - - -/* ADC - Analog/Digital Converter */ -/* ADC_CH.CTRL bit masks and bit positions */ -#define ADC_CH_START_bm 0x80 /* Channel Start Conversion bit mask. */ -#define ADC_CH_START_bp 7 /* Channel Start Conversion bit position. */ - -#define ADC_CH_GAINFAC_gm 0x1C /* Gain Factor group mask. */ -#define ADC_CH_GAINFAC_gp 2 /* Gain Factor group position. */ -#define ADC_CH_GAINFAC0_bm (1<<2) /* Gain Factor bit 0 mask. */ -#define ADC_CH_GAINFAC0_bp 2 /* Gain Factor bit 0 position. */ -#define ADC_CH_GAINFAC1_bm (1<<3) /* Gain Factor bit 1 mask. */ -#define ADC_CH_GAINFAC1_bp 3 /* Gain Factor bit 1 position. */ -#define ADC_CH_GAINFAC2_bm (1<<4) /* Gain Factor bit 2 mask. */ -#define ADC_CH_GAINFAC2_bp 4 /* Gain Factor bit 2 position. */ - -#define ADC_CH_INPUTMODE_gm 0x03 /* Input Mode Select group mask. */ -#define ADC_CH_INPUTMODE_gp 0 /* Input Mode Select group position. */ -#define ADC_CH_INPUTMODE0_bm (1<<0) /* Input Mode Select bit 0 mask. */ -#define ADC_CH_INPUTMODE0_bp 0 /* Input Mode Select bit 0 position. */ -#define ADC_CH_INPUTMODE1_bm (1<<1) /* Input Mode Select bit 1 mask. */ -#define ADC_CH_INPUTMODE1_bp 1 /* Input Mode Select bit 1 position. */ - - -/* ADC_CH.MUXCTRL bit masks and bit positions */ -#define ADC_CH_MUXPOS_gm 0x78 /* Positive Input Select group mask. */ -#define ADC_CH_MUXPOS_gp 3 /* Positive Input Select group position. */ -#define ADC_CH_MUXPOS0_bm (1<<3) /* Positive Input Select bit 0 mask. */ -#define ADC_CH_MUXPOS0_bp 3 /* Positive Input Select bit 0 position. */ -#define ADC_CH_MUXPOS1_bm (1<<4) /* Positive Input Select bit 1 mask. */ -#define ADC_CH_MUXPOS1_bp 4 /* Positive Input Select bit 1 position. */ -#define ADC_CH_MUXPOS2_bm (1<<5) /* Positive Input Select bit 2 mask. */ -#define ADC_CH_MUXPOS2_bp 5 /* Positive Input Select bit 2 position. */ -#define ADC_CH_MUXPOS3_bm (1<<6) /* Positive Input Select bit 3 mask. */ -#define ADC_CH_MUXPOS3_bp 6 /* Positive Input Select bit 3 position. */ - -#define ADC_CH_MUXINT_gm 0x78 /* Internal Input Select group mask. */ -#define ADC_CH_MUXINT_gp 3 /* Internal Input Select group position. */ -#define ADC_CH_MUXINT0_bm (1<<3) /* Internal Input Select bit 0 mask. */ -#define ADC_CH_MUXINT0_bp 3 /* Internal Input Select bit 0 position. */ -#define ADC_CH_MUXINT1_bm (1<<4) /* Internal Input Select bit 1 mask. */ -#define ADC_CH_MUXINT1_bp 4 /* Internal Input Select bit 1 position. */ -#define ADC_CH_MUXINT2_bm (1<<5) /* Internal Input Select bit 2 mask. */ -#define ADC_CH_MUXINT2_bp 5 /* Internal Input Select bit 2 position. */ -#define ADC_CH_MUXINT3_bm (1<<6) /* Internal Input Select bit 3 mask. */ -#define ADC_CH_MUXINT3_bp 6 /* Internal Input Select bit 3 position. */ - -#define ADC_CH_MUXNEG_gm 0x03 /* Negative Input Select group mask. */ -#define ADC_CH_MUXNEG_gp 0 /* Negative Input Select group position. */ -#define ADC_CH_MUXNEG0_bm (1<<0) /* Negative Input Select bit 0 mask. */ -#define ADC_CH_MUXNEG0_bp 0 /* Negative Input Select bit 0 position. */ -#define ADC_CH_MUXNEG1_bm (1<<1) /* Negative Input Select bit 1 mask. */ -#define ADC_CH_MUXNEG1_bp 1 /* Negative Input Select bit 1 position. */ - - -/* ADC_CH.INTCTRL bit masks and bit positions */ -#define ADC_CH_INTMODE_gm 0x0C /* Interrupt Mode group mask. */ -#define ADC_CH_INTMODE_gp 2 /* Interrupt Mode group position. */ -#define ADC_CH_INTMODE0_bm (1<<2) /* Interrupt Mode bit 0 mask. */ -#define ADC_CH_INTMODE0_bp 2 /* Interrupt Mode bit 0 position. */ -#define ADC_CH_INTMODE1_bm (1<<3) /* Interrupt Mode bit 1 mask. */ -#define ADC_CH_INTMODE1_bp 3 /* Interrupt Mode bit 1 position. */ - -#define ADC_CH_INTLVL_gm 0x03 /* Interrupt Level group mask. */ -#define ADC_CH_INTLVL_gp 0 /* Interrupt Level group position. */ -#define ADC_CH_INTLVL0_bm (1<<0) /* Interrupt Level bit 0 mask. */ -#define ADC_CH_INTLVL0_bp 0 /* Interrupt Level bit 0 position. */ -#define ADC_CH_INTLVL1_bm (1<<1) /* Interrupt Level bit 1 mask. */ -#define ADC_CH_INTLVL1_bp 1 /* Interrupt Level bit 1 position. */ - - -/* ADC_CH.INTFLAGS bit masks and bit positions */ -#define ADC_CH_CHIF_bm 0x01 /* Channel Interrupt Flag bit mask. */ -#define ADC_CH_CHIF_bp 0 /* Channel Interrupt Flag bit position. */ - - -/* ADC.CTRLA bit masks and bit positions */ -#define ADC_DMASEL_gm 0xE0 /* DMA Selection group mask. */ -#define ADC_DMASEL_gp 5 /* DMA Selection group position. */ -#define ADC_DMASEL0_bm (1<<5) /* DMA Selection bit 0 mask. */ -#define ADC_DMASEL0_bp 5 /* DMA Selection bit 0 position. */ -#define ADC_DMASEL1_bm (1<<6) /* DMA Selection bit 1 mask. */ -#define ADC_DMASEL1_bp 6 /* DMA Selection bit 1 position. */ -#define ADC_DMASEL2_bm (1<<7) /* DMA Selection bit 2 mask. */ -#define ADC_DMASEL2_bp 7 /* DMA Selection bit 2 position. */ - -#define ADC_CH3START_bm 0x20 /* Channel 3 Start Conversion bit mask. */ -#define ADC_CH3START_bp 5 /* Channel 3 Start Conversion bit position. */ - -#define ADC_CH2START_bm 0x10 /* Channel 2 Start Conversion bit mask. */ -#define ADC_CH2START_bp 4 /* Channel 2 Start Conversion bit position. */ - -#define ADC_CH1START_bm 0x08 /* Channel 1 Start Conversion bit mask. */ -#define ADC_CH1START_bp 3 /* Channel 1 Start Conversion bit position. */ - -#define ADC_CH0START_bm 0x04 /* Channel 0 Start Conversion bit mask. */ -#define ADC_CH0START_bp 2 /* Channel 0 Start Conversion bit position. */ - -#define ADC_FLUSH_bm 0x02 /* Flush Pipeline bit mask. */ -#define ADC_FLUSH_bp 1 /* Flush Pipeline bit position. */ - -#define ADC_ENABLE_bm 0x01 /* Enable ADC bit mask. */ -#define ADC_ENABLE_bp 0 /* Enable ADC bit position. */ - - -/* ADC.CTRLB bit masks and bit positions */ -#define ADC_CONMODE_bm 0x10 /* Conversion Mode bit mask. */ -#define ADC_CONMODE_bp 4 /* Conversion Mode bit position. */ - -#define ADC_FREERUN_bm 0x08 /* Free Running Mode Enable bit mask. */ -#define ADC_FREERUN_bp 3 /* Free Running Mode Enable bit position. */ - -#define ADC_RESOLUTION_gm 0x06 /* Result Resolution group mask. */ -#define ADC_RESOLUTION_gp 1 /* Result Resolution group position. */ -#define ADC_RESOLUTION0_bm (1<<1) /* Result Resolution bit 0 mask. */ -#define ADC_RESOLUTION0_bp 1 /* Result Resolution bit 0 position. */ -#define ADC_RESOLUTION1_bm (1<<2) /* Result Resolution bit 1 mask. */ -#define ADC_RESOLUTION1_bp 2 /* Result Resolution bit 1 position. */ - - -/* ADC.REFCTRL bit masks and bit positions */ -#define ADC_REFSEL_gm 0x30 /* Reference Selection group mask. */ -#define ADC_REFSEL_gp 4 /* Reference Selection group position. */ -#define ADC_REFSEL0_bm (1<<4) /* Reference Selection bit 0 mask. */ -#define ADC_REFSEL0_bp 4 /* Reference Selection bit 0 position. */ -#define ADC_REFSEL1_bm (1<<5) /* Reference Selection bit 1 mask. */ -#define ADC_REFSEL1_bp 5 /* Reference Selection bit 1 position. */ - -#define ADC_BANDGAP_bm 0x02 /* Bandgap enable bit mask. */ -#define ADC_BANDGAP_bp 1 /* Bandgap enable bit position. */ - -#define ADC_TEMPREF_bm 0x01 /* Temperature Reference Enable bit mask. */ -#define ADC_TEMPREF_bp 0 /* Temperature Reference Enable bit position. */ - - -/* ADC.EVCTRL bit masks and bit positions */ -#define ADC_SWEEP_gm 0xC0 /* Channel Sweep Selection group mask. */ -#define ADC_SWEEP_gp 6 /* Channel Sweep Selection group position. */ -#define ADC_SWEEP0_bm (1<<6) /* Channel Sweep Selection bit 0 mask. */ -#define ADC_SWEEP0_bp 6 /* Channel Sweep Selection bit 0 position. */ -#define ADC_SWEEP1_bm (1<<7) /* Channel Sweep Selection bit 1 mask. */ -#define ADC_SWEEP1_bp 7 /* Channel Sweep Selection bit 1 position. */ - -#define ADC_EVSEL_gm 0x38 /* Event Input Select group mask. */ -#define ADC_EVSEL_gp 3 /* Event Input Select group position. */ -#define ADC_EVSEL0_bm (1<<3) /* Event Input Select bit 0 mask. */ -#define ADC_EVSEL0_bp 3 /* Event Input Select bit 0 position. */ -#define ADC_EVSEL1_bm (1<<4) /* Event Input Select bit 1 mask. */ -#define ADC_EVSEL1_bp 4 /* Event Input Select bit 1 position. */ -#define ADC_EVSEL2_bm (1<<5) /* Event Input Select bit 2 mask. */ -#define ADC_EVSEL2_bp 5 /* Event Input Select bit 2 position. */ - -#define ADC_EVACT_gm 0x07 /* Event Action Select group mask. */ -#define ADC_EVACT_gp 0 /* Event Action Select group position. */ -#define ADC_EVACT0_bm (1<<0) /* Event Action Select bit 0 mask. */ -#define ADC_EVACT0_bp 0 /* Event Action Select bit 0 position. */ -#define ADC_EVACT1_bm (1<<1) /* Event Action Select bit 1 mask. */ -#define ADC_EVACT1_bp 1 /* Event Action Select bit 1 position. */ -#define ADC_EVACT2_bm (1<<2) /* Event Action Select bit 2 mask. */ -#define ADC_EVACT2_bp 2 /* Event Action Select bit 2 position. */ - - -/* ADC.PRESCALER bit masks and bit positions */ -#define ADC_PRESCALER_gm 0x07 /* Clock Prescaler Selection group mask. */ -#define ADC_PRESCALER_gp 0 /* Clock Prescaler Selection group position. */ -#define ADC_PRESCALER0_bm (1<<0) /* Clock Prescaler Selection bit 0 mask. */ -#define ADC_PRESCALER0_bp 0 /* Clock Prescaler Selection bit 0 position. */ -#define ADC_PRESCALER1_bm (1<<1) /* Clock Prescaler Selection bit 1 mask. */ -#define ADC_PRESCALER1_bp 1 /* Clock Prescaler Selection bit 1 position. */ -#define ADC_PRESCALER2_bm (1<<2) /* Clock Prescaler Selection bit 2 mask. */ -#define ADC_PRESCALER2_bp 2 /* Clock Prescaler Selection bit 2 position. */ - - -/* ADC.CALCTRL bit masks and bit positions */ -#define ADC_CAL_bm 0x01 /* ADC Calibration Start bit mask. */ -#define ADC_CAL_bp 0 /* ADC Calibration Start bit position. */ - - -/* ADC.INTFLAGS bit masks and bit positions */ -#define ADC_CH3IF_bm 0x08 /* Channel 3 Interrupt Flag bit mask. */ -#define ADC_CH3IF_bp 3 /* Channel 3 Interrupt Flag bit position. */ - -#define ADC_CH2IF_bm 0x04 /* Channel 2 Interrupt Flag bit mask. */ -#define ADC_CH2IF_bp 2 /* Channel 2 Interrupt Flag bit position. */ - -#define ADC_CH1IF_bm 0x02 /* Channel 1 Interrupt Flag bit mask. */ -#define ADC_CH1IF_bp 1 /* Channel 1 Interrupt Flag bit position. */ - -#define ADC_CH0IF_bm 0x01 /* Channel 0 Interrupt Flag bit mask. */ -#define ADC_CH0IF_bp 0 /* Channel 0 Interrupt Flag bit position. */ - - -/* DAC - Digital/Analog Converter */ -/* DAC.CTRLA bit masks and bit positions */ -#define DAC_IDOEN_bm 0x10 /* Internal Output Enable bit mask. */ -#define DAC_IDOEN_bp 4 /* Internal Output Enable bit position. */ - -#define DAC_CH1EN_bm 0x08 /* Channel 1 Output Enable bit mask. */ -#define DAC_CH1EN_bp 3 /* Channel 1 Output Enable bit position. */ - -#define DAC_CH0EN_bm 0x04 /* Channel 0 Output Enable bit mask. */ -#define DAC_CH0EN_bp 2 /* Channel 0 Output Enable bit position. */ - -#define DAC_LPMODE_bm 0x02 /* Low Power Mode bit mask. */ -#define DAC_LPMODE_bp 1 /* Low Power Mode bit position. */ - -#define DAC_ENABLE_bm 0x01 /* Enable bit mask. */ -#define DAC_ENABLE_bp 0 /* Enable bit position. */ - - -/* DAC.CTRLB bit masks and bit positions */ -#define DAC_CHSEL_gm 0x60 /* Channel Select group mask. */ -#define DAC_CHSEL_gp 5 /* Channel Select group position. */ -#define DAC_CHSEL0_bm (1<<5) /* Channel Select bit 0 mask. */ -#define DAC_CHSEL0_bp 5 /* Channel Select bit 0 position. */ -#define DAC_CHSEL1_bm (1<<6) /* Channel Select bit 1 mask. */ -#define DAC_CHSEL1_bp 6 /* Channel Select bit 1 position. */ - -#define DAC_CH1TRIG_bm 0x02 /* Channel 1 Event Trig Enable bit mask. */ -#define DAC_CH1TRIG_bp 1 /* Channel 1 Event Trig Enable bit position. */ - -#define DAC_CH0TRIG_bm 0x01 /* Channel 0 Event Trig Enable bit mask. */ -#define DAC_CH0TRIG_bp 0 /* Channel 0 Event Trig Enable bit position. */ - - -/* DAC.CTRLC bit masks and bit positions */ -#define DAC_REFSEL_gm 0x18 /* Reference Select group mask. */ -#define DAC_REFSEL_gp 3 /* Reference Select group position. */ -#define DAC_REFSEL0_bm (1<<3) /* Reference Select bit 0 mask. */ -#define DAC_REFSEL0_bp 3 /* Reference Select bit 0 position. */ -#define DAC_REFSEL1_bm (1<<4) /* Reference Select bit 1 mask. */ -#define DAC_REFSEL1_bp 4 /* Reference Select bit 1 position. */ - -#define DAC_LEFTADJ_bm 0x01 /* Left-adjust Result bit mask. */ -#define DAC_LEFTADJ_bp 0 /* Left-adjust Result bit position. */ - - -/* DAC.EVCTRL bit masks and bit positions */ -#define DAC_EVSEL_gm 0x07 /* Event Input Selection group mask. */ -#define DAC_EVSEL_gp 0 /* Event Input Selection group position. */ -#define DAC_EVSEL0_bm (1<<0) /* Event Input Selection bit 0 mask. */ -#define DAC_EVSEL0_bp 0 /* Event Input Selection bit 0 position. */ -#define DAC_EVSEL1_bm (1<<1) /* Event Input Selection bit 1 mask. */ -#define DAC_EVSEL1_bp 1 /* Event Input Selection bit 1 position. */ -#define DAC_EVSEL2_bm (1<<2) /* Event Input Selection bit 2 mask. */ -#define DAC_EVSEL2_bp 2 /* Event Input Selection bit 2 position. */ - - -/* DAC.TIMCTRL bit masks and bit positions */ -#define DAC_CONINTVAL_gm 0x70 /* Conversion Intercal group mask. */ -#define DAC_CONINTVAL_gp 4 /* Conversion Intercal group position. */ -#define DAC_CONINTVAL0_bm (1<<4) /* Conversion Intercal bit 0 mask. */ -#define DAC_CONINTVAL0_bp 4 /* Conversion Intercal bit 0 position. */ -#define DAC_CONINTVAL1_bm (1<<5) /* Conversion Intercal bit 1 mask. */ -#define DAC_CONINTVAL1_bp 5 /* Conversion Intercal bit 1 position. */ -#define DAC_CONINTVAL2_bm (1<<6) /* Conversion Intercal bit 2 mask. */ -#define DAC_CONINTVAL2_bp 6 /* Conversion Intercal bit 2 position. */ - -#define DAC_REFRESH_gm 0x0F /* Refresh Timing Control group mask. */ -#define DAC_REFRESH_gp 0 /* Refresh Timing Control group position. */ -#define DAC_REFRESH0_bm (1<<0) /* Refresh Timing Control bit 0 mask. */ -#define DAC_REFRESH0_bp 0 /* Refresh Timing Control bit 0 position. */ -#define DAC_REFRESH1_bm (1<<1) /* Refresh Timing Control bit 1 mask. */ -#define DAC_REFRESH1_bp 1 /* Refresh Timing Control bit 1 position. */ -#define DAC_REFRESH2_bm (1<<2) /* Refresh Timing Control bit 2 mask. */ -#define DAC_REFRESH2_bp 2 /* Refresh Timing Control bit 2 position. */ -#define DAC_REFRESH3_bm (1<<3) /* Refresh Timing Control bit 3 mask. */ -#define DAC_REFRESH3_bp 3 /* Refresh Timing Control bit 3 position. */ - - -/* DAC.STATUS bit masks and bit positions */ -#define DAC_CH1DRE_bm 0x02 /* Channel 1 Data Register Empty bit mask. */ -#define DAC_CH1DRE_bp 1 /* Channel 1 Data Register Empty bit position. */ - -#define DAC_CH0DRE_bm 0x01 /* Channel 0 Data Register Empty bit mask. */ -#define DAC_CH0DRE_bp 0 /* Channel 0 Data Register Empty bit position. */ - - -/* RTC - Real-Time Clounter */ -/* RTC.CTRL bit masks and bit positions */ -#define RTC_PRESCALER_gm 0x07 /* Prescaling Factor group mask. */ -#define RTC_PRESCALER_gp 0 /* Prescaling Factor group position. */ -#define RTC_PRESCALER0_bm (1<<0) /* Prescaling Factor bit 0 mask. */ -#define RTC_PRESCALER0_bp 0 /* Prescaling Factor bit 0 position. */ -#define RTC_PRESCALER1_bm (1<<1) /* Prescaling Factor bit 1 mask. */ -#define RTC_PRESCALER1_bp 1 /* Prescaling Factor bit 1 position. */ -#define RTC_PRESCALER2_bm (1<<2) /* Prescaling Factor bit 2 mask. */ -#define RTC_PRESCALER2_bp 2 /* Prescaling Factor bit 2 position. */ - - -/* RTC.STATUS bit masks and bit positions */ -#define RTC_SYNCBUSY_bm 0x01 /* Synchronization Busy Flag bit mask. */ -#define RTC_SYNCBUSY_bp 0 /* Synchronization Busy Flag bit position. */ - - -/* RTC.INTCTRL bit masks and bit positions */ -#define RTC_COMPINTLVL_gm 0x0C /* Compare Match Interrupt Level group mask. */ -#define RTC_COMPINTLVL_gp 2 /* Compare Match Interrupt Level group position. */ -#define RTC_COMPINTLVL0_bm (1<<2) /* Compare Match Interrupt Level bit 0 mask. */ -#define RTC_COMPINTLVL0_bp 2 /* Compare Match Interrupt Level bit 0 position. */ -#define RTC_COMPINTLVL1_bm (1<<3) /* Compare Match Interrupt Level bit 1 mask. */ -#define RTC_COMPINTLVL1_bp 3 /* Compare Match Interrupt Level bit 1 position. */ - -#define RTC_OVFINTLVL_gm 0x03 /* Overflow Interrupt Level group mask. */ -#define RTC_OVFINTLVL_gp 0 /* Overflow Interrupt Level group position. */ -#define RTC_OVFINTLVL0_bm (1<<0) /* Overflow Interrupt Level bit 0 mask. */ -#define RTC_OVFINTLVL0_bp 0 /* Overflow Interrupt Level bit 0 position. */ -#define RTC_OVFINTLVL1_bm (1<<1) /* Overflow Interrupt Level bit 1 mask. */ -#define RTC_OVFINTLVL1_bp 1 /* Overflow Interrupt Level bit 1 position. */ - - -/* RTC.INTFLAGS bit masks and bit positions */ -#define RTC_COMPIF_bm 0x02 /* Compare Match Interrupt Flag bit mask. */ -#define RTC_COMPIF_bp 1 /* Compare Match Interrupt Flag bit position. */ - -#define RTC_OVFIF_bm 0x01 /* Overflow Interrupt Flag bit mask. */ -#define RTC_OVFIF_bp 0 /* Overflow Interrupt Flag bit position. */ - - -/* EBI - External Bus Interface */ -/* EBI_CS.CTRLA bit masks and bit positions */ -#define EBI_CS_ASPACE_gm 0x7C /* Address Space group mask. */ -#define EBI_CS_ASPACE_gp 2 /* Address Space group position. */ -#define EBI_CS_ASPACE0_bm (1<<2) /* Address Space bit 0 mask. */ -#define EBI_CS_ASPACE0_bp 2 /* Address Space bit 0 position. */ -#define EBI_CS_ASPACE1_bm (1<<3) /* Address Space bit 1 mask. */ -#define EBI_CS_ASPACE1_bp 3 /* Address Space bit 1 position. */ -#define EBI_CS_ASPACE2_bm (1<<4) /* Address Space bit 2 mask. */ -#define EBI_CS_ASPACE2_bp 4 /* Address Space bit 2 position. */ -#define EBI_CS_ASPACE3_bm (1<<5) /* Address Space bit 3 mask. */ -#define EBI_CS_ASPACE3_bp 5 /* Address Space bit 3 position. */ -#define EBI_CS_ASPACE4_bm (1<<6) /* Address Space bit 4 mask. */ -#define EBI_CS_ASPACE4_bp 6 /* Address Space bit 4 position. */ - -#define EBI_CS_MODE_gm 0x03 /* Memory Mode group mask. */ -#define EBI_CS_MODE_gp 0 /* Memory Mode group position. */ -#define EBI_CS_MODE0_bm (1<<0) /* Memory Mode bit 0 mask. */ -#define EBI_CS_MODE0_bp 0 /* Memory Mode bit 0 position. */ -#define EBI_CS_MODE1_bm (1<<1) /* Memory Mode bit 1 mask. */ -#define EBI_CS_MODE1_bp 1 /* Memory Mode bit 1 position. */ - - -/* EBI_CS.CTRLB bit masks and bit positions */ -#define EBI_CS_SRWS_gm 0x07 /* SRAM Wait State Cycles group mask. */ -#define EBI_CS_SRWS_gp 0 /* SRAM Wait State Cycles group position. */ -#define EBI_CS_SRWS0_bm (1<<0) /* SRAM Wait State Cycles bit 0 mask. */ -#define EBI_CS_SRWS0_bp 0 /* SRAM Wait State Cycles bit 0 position. */ -#define EBI_CS_SRWS1_bm (1<<1) /* SRAM Wait State Cycles bit 1 mask. */ -#define EBI_CS_SRWS1_bp 1 /* SRAM Wait State Cycles bit 1 position. */ -#define EBI_CS_SRWS2_bm (1<<2) /* SRAM Wait State Cycles bit 2 mask. */ -#define EBI_CS_SRWS2_bp 2 /* SRAM Wait State Cycles bit 2 position. */ - -#define EBI_CS_SDINITDONE_bm 0x80 /* SDRAM Initialization Done bit mask. */ -#define EBI_CS_SDINITDONE_bp 7 /* SDRAM Initialization Done bit position. */ - -#define EBI_CS_SDSREN_bm 0x04 /* SDRAM Self-refresh Enable bit mask. */ -#define EBI_CS_SDSREN_bp 2 /* SDRAM Self-refresh Enable bit position. */ - -#define EBI_CS_SDMODE_gm 0x03 /* SDRAM Mode group mask. */ -#define EBI_CS_SDMODE_gp 0 /* SDRAM Mode group position. */ -#define EBI_CS_SDMODE0_bm (1<<0) /* SDRAM Mode bit 0 mask. */ -#define EBI_CS_SDMODE0_bp 0 /* SDRAM Mode bit 0 position. */ -#define EBI_CS_SDMODE1_bm (1<<1) /* SDRAM Mode bit 1 mask. */ -#define EBI_CS_SDMODE1_bp 1 /* SDRAM Mode bit 1 position. */ - - -/* EBI.CTRL bit masks and bit positions */ -#define EBI_SDDATAW_gm 0xC0 /* SDRAM Data Width Setting group mask. */ -#define EBI_SDDATAW_gp 6 /* SDRAM Data Width Setting group position. */ -#define EBI_SDDATAW0_bm (1<<6) /* SDRAM Data Width Setting bit 0 mask. */ -#define EBI_SDDATAW0_bp 6 /* SDRAM Data Width Setting bit 0 position. */ -#define EBI_SDDATAW1_bm (1<<7) /* SDRAM Data Width Setting bit 1 mask. */ -#define EBI_SDDATAW1_bp 7 /* SDRAM Data Width Setting bit 1 position. */ - -#define EBI_LPCMODE_gm 0x30 /* SRAM LPC Mode group mask. */ -#define EBI_LPCMODE_gp 4 /* SRAM LPC Mode group position. */ -#define EBI_LPCMODE0_bm (1<<4) /* SRAM LPC Mode bit 0 mask. */ -#define EBI_LPCMODE0_bp 4 /* SRAM LPC Mode bit 0 position. */ -#define EBI_LPCMODE1_bm (1<<5) /* SRAM LPC Mode bit 1 mask. */ -#define EBI_LPCMODE1_bp 5 /* SRAM LPC Mode bit 1 position. */ - -#define EBI_SRMODE_gm 0x0C /* SRAM Mode group mask. */ -#define EBI_SRMODE_gp 2 /* SRAM Mode group position. */ -#define EBI_SRMODE0_bm (1<<2) /* SRAM Mode bit 0 mask. */ -#define EBI_SRMODE0_bp 2 /* SRAM Mode bit 0 position. */ -#define EBI_SRMODE1_bm (1<<3) /* SRAM Mode bit 1 mask. */ -#define EBI_SRMODE1_bp 3 /* SRAM Mode bit 1 position. */ - -#define EBI_IFMODE_gm 0x03 /* Interface Mode group mask. */ -#define EBI_IFMODE_gp 0 /* Interface Mode group position. */ -#define EBI_IFMODE0_bm (1<<0) /* Interface Mode bit 0 mask. */ -#define EBI_IFMODE0_bp 0 /* Interface Mode bit 0 position. */ -#define EBI_IFMODE1_bm (1<<1) /* Interface Mode bit 1 mask. */ -#define EBI_IFMODE1_bp 1 /* Interface Mode bit 1 position. */ - - -/* EBI.SDRAMCTRLA bit masks and bit positions */ -#define EBI_SDCAS_bm 0x08 /* SDRAM CAS Latency Setting bit mask. */ -#define EBI_SDCAS_bp 3 /* SDRAM CAS Latency Setting bit position. */ - -#define EBI_SDROW_bm 0x04 /* SDRAM ROW Bits Setting bit mask. */ -#define EBI_SDROW_bp 2 /* SDRAM ROW Bits Setting bit position. */ - -#define EBI_SDCOL_gm 0x03 /* SDRAM Column Bits Setting group mask. */ -#define EBI_SDCOL_gp 0 /* SDRAM Column Bits Setting group position. */ -#define EBI_SDCOL0_bm (1<<0) /* SDRAM Column Bits Setting bit 0 mask. */ -#define EBI_SDCOL0_bp 0 /* SDRAM Column Bits Setting bit 0 position. */ -#define EBI_SDCOL1_bm (1<<1) /* SDRAM Column Bits Setting bit 1 mask. */ -#define EBI_SDCOL1_bp 1 /* SDRAM Column Bits Setting bit 1 position. */ - - -/* EBI.SDRAMCTRLB bit masks and bit positions */ -#define EBI_MRDLY_gm 0xC0 /* SDRAM Mode Register Delay group mask. */ -#define EBI_MRDLY_gp 6 /* SDRAM Mode Register Delay group position. */ -#define EBI_MRDLY0_bm (1<<6) /* SDRAM Mode Register Delay bit 0 mask. */ -#define EBI_MRDLY0_bp 6 /* SDRAM Mode Register Delay bit 0 position. */ -#define EBI_MRDLY1_bm (1<<7) /* SDRAM Mode Register Delay bit 1 mask. */ -#define EBI_MRDLY1_bp 7 /* SDRAM Mode Register Delay bit 1 position. */ - -#define EBI_ROWCYCDLY_gm 0x38 /* SDRAM Row Cycle Delay group mask. */ -#define EBI_ROWCYCDLY_gp 3 /* SDRAM Row Cycle Delay group position. */ -#define EBI_ROWCYCDLY0_bm (1<<3) /* SDRAM Row Cycle Delay bit 0 mask. */ -#define EBI_ROWCYCDLY0_bp 3 /* SDRAM Row Cycle Delay bit 0 position. */ -#define EBI_ROWCYCDLY1_bm (1<<4) /* SDRAM Row Cycle Delay bit 1 mask. */ -#define EBI_ROWCYCDLY1_bp 4 /* SDRAM Row Cycle Delay bit 1 position. */ -#define EBI_ROWCYCDLY2_bm (1<<5) /* SDRAM Row Cycle Delay bit 2 mask. */ -#define EBI_ROWCYCDLY2_bp 5 /* SDRAM Row Cycle Delay bit 2 position. */ - -#define EBI_RPDLY_gm 0x07 /* SDRAM Row-to-Precharge Delay group mask. */ -#define EBI_RPDLY_gp 0 /* SDRAM Row-to-Precharge Delay group position. */ -#define EBI_RPDLY0_bm (1<<0) /* SDRAM Row-to-Precharge Delay bit 0 mask. */ -#define EBI_RPDLY0_bp 0 /* SDRAM Row-to-Precharge Delay bit 0 position. */ -#define EBI_RPDLY1_bm (1<<1) /* SDRAM Row-to-Precharge Delay bit 1 mask. */ -#define EBI_RPDLY1_bp 1 /* SDRAM Row-to-Precharge Delay bit 1 position. */ -#define EBI_RPDLY2_bm (1<<2) /* SDRAM Row-to-Precharge Delay bit 2 mask. */ -#define EBI_RPDLY2_bp 2 /* SDRAM Row-to-Precharge Delay bit 2 position. */ - - -/* EBI.SDRAMCTRLC bit masks and bit positions */ -#define EBI_WRDLY_gm 0xC0 /* SDRAM Write Recovery Delay group mask. */ -#define EBI_WRDLY_gp 6 /* SDRAM Write Recovery Delay group position. */ -#define EBI_WRDLY0_bm (1<<6) /* SDRAM Write Recovery Delay bit 0 mask. */ -#define EBI_WRDLY0_bp 6 /* SDRAM Write Recovery Delay bit 0 position. */ -#define EBI_WRDLY1_bm (1<<7) /* SDRAM Write Recovery Delay bit 1 mask. */ -#define EBI_WRDLY1_bp 7 /* SDRAM Write Recovery Delay bit 1 position. */ - -#define EBI_ESRDLY_gm 0x38 /* SDRAM Exit-Self-refresh-to-Active Delay group mask. */ -#define EBI_ESRDLY_gp 3 /* SDRAM Exit-Self-refresh-to-Active Delay group position. */ -#define EBI_ESRDLY0_bm (1<<3) /* SDRAM Exit-Self-refresh-to-Active Delay bit 0 mask. */ -#define EBI_ESRDLY0_bp 3 /* SDRAM Exit-Self-refresh-to-Active Delay bit 0 position. */ -#define EBI_ESRDLY1_bm (1<<4) /* SDRAM Exit-Self-refresh-to-Active Delay bit 1 mask. */ -#define EBI_ESRDLY1_bp 4 /* SDRAM Exit-Self-refresh-to-Active Delay bit 1 position. */ -#define EBI_ESRDLY2_bm (1<<5) /* SDRAM Exit-Self-refresh-to-Active Delay bit 2 mask. */ -#define EBI_ESRDLY2_bp 5 /* SDRAM Exit-Self-refresh-to-Active Delay bit 2 position. */ - -#define EBI_ROWCOLDLY_gm 0x07 /* SDRAM Row-to-Column Delay group mask. */ -#define EBI_ROWCOLDLY_gp 0 /* SDRAM Row-to-Column Delay group position. */ -#define EBI_ROWCOLDLY0_bm (1<<0) /* SDRAM Row-to-Column Delay bit 0 mask. */ -#define EBI_ROWCOLDLY0_bp 0 /* SDRAM Row-to-Column Delay bit 0 position. */ -#define EBI_ROWCOLDLY1_bm (1<<1) /* SDRAM Row-to-Column Delay bit 1 mask. */ -#define EBI_ROWCOLDLY1_bp 1 /* SDRAM Row-to-Column Delay bit 1 position. */ -#define EBI_ROWCOLDLY2_bm (1<<2) /* SDRAM Row-to-Column Delay bit 2 mask. */ -#define EBI_ROWCOLDLY2_bp 2 /* SDRAM Row-to-Column Delay bit 2 position. */ - - -/* TWI - Two-Wire Interface */ -/* TWI_MASTER.CTRLA bit masks and bit positions */ -#define TWI_MASTER_INTLVL_gm 0xC0 /* Interrupt Level group mask. */ -#define TWI_MASTER_INTLVL_gp 6 /* Interrupt Level group position. */ -#define TWI_MASTER_INTLVL0_bm (1<<6) /* Interrupt Level bit 0 mask. */ -#define TWI_MASTER_INTLVL0_bp 6 /* Interrupt Level bit 0 position. */ -#define TWI_MASTER_INTLVL1_bm (1<<7) /* Interrupt Level bit 1 mask. */ -#define TWI_MASTER_INTLVL1_bp 7 /* Interrupt Level bit 1 position. */ - -#define TWI_MASTER_RIEN_bm 0x20 /* Read Interrupt Enable bit mask. */ -#define TWI_MASTER_RIEN_bp 5 /* Read Interrupt Enable bit position. */ - -#define TWI_MASTER_WIEN_bm 0x10 /* Write Interrupt Enable bit mask. */ -#define TWI_MASTER_WIEN_bp 4 /* Write Interrupt Enable bit position. */ - -#define TWI_MASTER_ENABLE_bm 0x08 /* Enable TWI Master bit mask. */ -#define TWI_MASTER_ENABLE_bp 3 /* Enable TWI Master bit position. */ - - -/* TWI_MASTER.CTRLB bit masks and bit positions */ -#define TWI_MASTER_TIMEOUT_gm 0x0C /* Inactive Bus Timeout group mask. */ -#define TWI_MASTER_TIMEOUT_gp 2 /* Inactive Bus Timeout group position. */ -#define TWI_MASTER_TIMEOUT0_bm (1<<2) /* Inactive Bus Timeout bit 0 mask. */ -#define TWI_MASTER_TIMEOUT0_bp 2 /* Inactive Bus Timeout bit 0 position. */ -#define TWI_MASTER_TIMEOUT1_bm (1<<3) /* Inactive Bus Timeout bit 1 mask. */ -#define TWI_MASTER_TIMEOUT1_bp 3 /* Inactive Bus Timeout bit 1 position. */ - -#define TWI_MASTER_QCEN_bm 0x02 /* Quick Command Enable bit mask. */ -#define TWI_MASTER_QCEN_bp 1 /* Quick Command Enable bit position. */ - -#define TWI_MASTER_SMEN_bm 0x01 /* Smart Mode Enable bit mask. */ -#define TWI_MASTER_SMEN_bp 0 /* Smart Mode Enable bit position. */ - - -/* TWI_MASTER.CTRLC bit masks and bit positions */ -#define TWI_MASTER_ACKACT_bm 0x04 /* Acknowledge Action bit mask. */ -#define TWI_MASTER_ACKACT_bp 2 /* Acknowledge Action bit position. */ - -#define TWI_MASTER_CMD_gm 0x03 /* Command group mask. */ -#define TWI_MASTER_CMD_gp 0 /* Command group position. */ -#define TWI_MASTER_CMD0_bm (1<<0) /* Command bit 0 mask. */ -#define TWI_MASTER_CMD0_bp 0 /* Command bit 0 position. */ -#define TWI_MASTER_CMD1_bm (1<<1) /* Command bit 1 mask. */ -#define TWI_MASTER_CMD1_bp 1 /* Command bit 1 position. */ - - -/* TWI_MASTER.STATUS bit masks and bit positions */ -#define TWI_MASTER_RIF_bm 0x80 /* Read Interrupt Flag bit mask. */ -#define TWI_MASTER_RIF_bp 7 /* Read Interrupt Flag bit position. */ - -#define TWI_MASTER_WIF_bm 0x40 /* Write Interrupt Flag bit mask. */ -#define TWI_MASTER_WIF_bp 6 /* Write Interrupt Flag bit position. */ - -#define TWI_MASTER_CLKHOLD_bm 0x20 /* Clock Hold bit mask. */ -#define TWI_MASTER_CLKHOLD_bp 5 /* Clock Hold bit position. */ - -#define TWI_MASTER_RXACK_bm 0x10 /* Received Acknowledge bit mask. */ -#define TWI_MASTER_RXACK_bp 4 /* Received Acknowledge bit position. */ - -#define TWI_MASTER_ARBLOST_bm 0x08 /* Arbitration Lost bit mask. */ -#define TWI_MASTER_ARBLOST_bp 3 /* Arbitration Lost bit position. */ - -#define TWI_MASTER_BUSERR_bm 0x04 /* Bus Error bit mask. */ -#define TWI_MASTER_BUSERR_bp 2 /* Bus Error bit position. */ - -#define TWI_MASTER_BUSSTATE_gm 0x03 /* Bus State group mask. */ -#define TWI_MASTER_BUSSTATE_gp 0 /* Bus State group position. */ -#define TWI_MASTER_BUSSTATE0_bm (1<<0) /* Bus State bit 0 mask. */ -#define TWI_MASTER_BUSSTATE0_bp 0 /* Bus State bit 0 position. */ -#define TWI_MASTER_BUSSTATE1_bm (1<<1) /* Bus State bit 1 mask. */ -#define TWI_MASTER_BUSSTATE1_bp 1 /* Bus State bit 1 position. */ - - -/* TWI_SLAVE.CTRLA bit masks and bit positions */ -#define TWI_SLAVE_INTLVL_gm 0xC0 /* Interrupt Level group mask. */ -#define TWI_SLAVE_INTLVL_gp 6 /* Interrupt Level group position. */ -#define TWI_SLAVE_INTLVL0_bm (1<<6) /* Interrupt Level bit 0 mask. */ -#define TWI_SLAVE_INTLVL0_bp 6 /* Interrupt Level bit 0 position. */ -#define TWI_SLAVE_INTLVL1_bm (1<<7) /* Interrupt Level bit 1 mask. */ -#define TWI_SLAVE_INTLVL1_bp 7 /* Interrupt Level bit 1 position. */ - -#define TWI_SLAVE_DIEN_bm 0x20 /* Data Interrupt Enable bit mask. */ -#define TWI_SLAVE_DIEN_bp 5 /* Data Interrupt Enable bit position. */ - -#define TWI_SLAVE_APIEN_bm 0x10 /* Address/Stop Interrupt Enable bit mask. */ -#define TWI_SLAVE_APIEN_bp 4 /* Address/Stop Interrupt Enable bit position. */ - -#define TWI_SLAVE_ENABLE_bm 0x08 /* Enable TWI Slave bit mask. */ -#define TWI_SLAVE_ENABLE_bp 3 /* Enable TWI Slave bit position. */ - -#define TWI_SLAVE_PIEN_bm 0x04 /* Stop Interrupt Enable bit mask. */ -#define TWI_SLAVE_PIEN_bp 2 /* Stop Interrupt Enable bit position. */ - -#define TWI_SLAVE_PMEN_bm 0x02 /* Promiscuous Mode Enable bit mask. */ -#define TWI_SLAVE_PMEN_bp 1 /* Promiscuous Mode Enable bit position. */ - -#define TWI_SLAVE_SMEN_bm 0x01 /* Smart Mode Enable bit mask. */ -#define TWI_SLAVE_SMEN_bp 0 /* Smart Mode Enable bit position. */ - - -/* TWI_SLAVE.CTRLB bit masks and bit positions */ -#define TWI_SLAVE_ACKACT_bm 0x04 /* Acknowledge Action bit mask. */ -#define TWI_SLAVE_ACKACT_bp 2 /* Acknowledge Action bit position. */ - -#define TWI_SLAVE_CMD_gm 0x03 /* Command group mask. */ -#define TWI_SLAVE_CMD_gp 0 /* Command group position. */ -#define TWI_SLAVE_CMD0_bm (1<<0) /* Command bit 0 mask. */ -#define TWI_SLAVE_CMD0_bp 0 /* Command bit 0 position. */ -#define TWI_SLAVE_CMD1_bm (1<<1) /* Command bit 1 mask. */ -#define TWI_SLAVE_CMD1_bp 1 /* Command bit 1 position. */ - - -/* TWI_SLAVE.STATUS bit masks and bit positions */ -#define TWI_SLAVE_DIF_bm 0x80 /* Data Interrupt Flag bit mask. */ -#define TWI_SLAVE_DIF_bp 7 /* Data Interrupt Flag bit position. */ - -#define TWI_SLAVE_APIF_bm 0x40 /* Address/Stop Interrupt Flag bit mask. */ -#define TWI_SLAVE_APIF_bp 6 /* Address/Stop Interrupt Flag bit position. */ - -#define TWI_SLAVE_CLKHOLD_bm 0x20 /* Clock Hold bit mask. */ -#define TWI_SLAVE_CLKHOLD_bp 5 /* Clock Hold bit position. */ - -#define TWI_SLAVE_RXACK_bm 0x10 /* Received Acknowledge bit mask. */ -#define TWI_SLAVE_RXACK_bp 4 /* Received Acknowledge bit position. */ - -#define TWI_SLAVE_COLL_bm 0x08 /* Collision bit mask. */ -#define TWI_SLAVE_COLL_bp 3 /* Collision bit position. */ - -#define TWI_SLAVE_BUSERR_bm 0x04 /* Bus Error bit mask. */ -#define TWI_SLAVE_BUSERR_bp 2 /* Bus Error bit position. */ - -#define TWI_SLAVE_DIR_bm 0x02 /* Read/Write Direction bit mask. */ -#define TWI_SLAVE_DIR_bp 1 /* Read/Write Direction bit position. */ - -#define TWI_SLAVE_AP_bm 0x01 /* Slave Address or Stop bit mask. */ -#define TWI_SLAVE_AP_bp 0 /* Slave Address or Stop bit position. */ - - -/* TWI.CTRL bit masks and bit positions */ -#define TWI_SDAHOLD_bm 0x02 /* SDA Hold Time Enable bit mask. */ -#define TWI_SDAHOLD_bp 1 /* SDA Hold Time Enable bit position. */ - -#define TWI_EDIEN_bm 0x01 /* External Driver Interface Enable bit mask. */ -#define TWI_EDIEN_bp 0 /* External Driver Interface Enable bit position. */ - - -/* PORT - Port Configuration */ -/* PORTCFG.VPCTRLA bit masks and bit positions */ -#define PORTCFG_VP1MAP_gm 0xF0 /* Virtual Port 1 Mapping group mask. */ -#define PORTCFG_VP1MAP_gp 4 /* Virtual Port 1 Mapping group position. */ -#define PORTCFG_VP1MAP0_bm (1<<4) /* Virtual Port 1 Mapping bit 0 mask. */ -#define PORTCFG_VP1MAP0_bp 4 /* Virtual Port 1 Mapping bit 0 position. */ -#define PORTCFG_VP1MAP1_bm (1<<5) /* Virtual Port 1 Mapping bit 1 mask. */ -#define PORTCFG_VP1MAP1_bp 5 /* Virtual Port 1 Mapping bit 1 position. */ -#define PORTCFG_VP1MAP2_bm (1<<6) /* Virtual Port 1 Mapping bit 2 mask. */ -#define PORTCFG_VP1MAP2_bp 6 /* Virtual Port 1 Mapping bit 2 position. */ -#define PORTCFG_VP1MAP3_bm (1<<7) /* Virtual Port 1 Mapping bit 3 mask. */ -#define PORTCFG_VP1MAP3_bp 7 /* Virtual Port 1 Mapping bit 3 position. */ - -#define PORTCFG_VP0MAP_gm 0x0F /* Virtual Port 0 Mapping group mask. */ -#define PORTCFG_VP0MAP_gp 0 /* Virtual Port 0 Mapping group position. */ -#define PORTCFG_VP0MAP0_bm (1<<0) /* Virtual Port 0 Mapping bit 0 mask. */ -#define PORTCFG_VP0MAP0_bp 0 /* Virtual Port 0 Mapping bit 0 position. */ -#define PORTCFG_VP0MAP1_bm (1<<1) /* Virtual Port 0 Mapping bit 1 mask. */ -#define PORTCFG_VP0MAP1_bp 1 /* Virtual Port 0 Mapping bit 1 position. */ -#define PORTCFG_VP0MAP2_bm (1<<2) /* Virtual Port 0 Mapping bit 2 mask. */ -#define PORTCFG_VP0MAP2_bp 2 /* Virtual Port 0 Mapping bit 2 position. */ -#define PORTCFG_VP0MAP3_bm (1<<3) /* Virtual Port 0 Mapping bit 3 mask. */ -#define PORTCFG_VP0MAP3_bp 3 /* Virtual Port 0 Mapping bit 3 position. */ - - -/* PORTCFG.VPCTRLB bit masks and bit positions */ -#define PORTCFG_VP3MAP_gm 0xF0 /* Virtual Port 3 Mapping group mask. */ -#define PORTCFG_VP3MAP_gp 4 /* Virtual Port 3 Mapping group position. */ -#define PORTCFG_VP3MAP0_bm (1<<4) /* Virtual Port 3 Mapping bit 0 mask. */ -#define PORTCFG_VP3MAP0_bp 4 /* Virtual Port 3 Mapping bit 0 position. */ -#define PORTCFG_VP3MAP1_bm (1<<5) /* Virtual Port 3 Mapping bit 1 mask. */ -#define PORTCFG_VP3MAP1_bp 5 /* Virtual Port 3 Mapping bit 1 position. */ -#define PORTCFG_VP3MAP2_bm (1<<6) /* Virtual Port 3 Mapping bit 2 mask. */ -#define PORTCFG_VP3MAP2_bp 6 /* Virtual Port 3 Mapping bit 2 position. */ -#define PORTCFG_VP3MAP3_bm (1<<7) /* Virtual Port 3 Mapping bit 3 mask. */ -#define PORTCFG_VP3MAP3_bp 7 /* Virtual Port 3 Mapping bit 3 position. */ - -#define PORTCFG_VP2MAP_gm 0x0F /* Virtual Port 2 Mapping group mask. */ -#define PORTCFG_VP2MAP_gp 0 /* Virtual Port 2 Mapping group position. */ -#define PORTCFG_VP2MAP0_bm (1<<0) /* Virtual Port 2 Mapping bit 0 mask. */ -#define PORTCFG_VP2MAP0_bp 0 /* Virtual Port 2 Mapping bit 0 position. */ -#define PORTCFG_VP2MAP1_bm (1<<1) /* Virtual Port 2 Mapping bit 1 mask. */ -#define PORTCFG_VP2MAP1_bp 1 /* Virtual Port 2 Mapping bit 1 position. */ -#define PORTCFG_VP2MAP2_bm (1<<2) /* Virtual Port 2 Mapping bit 2 mask. */ -#define PORTCFG_VP2MAP2_bp 2 /* Virtual Port 2 Mapping bit 2 position. */ -#define PORTCFG_VP2MAP3_bm (1<<3) /* Virtual Port 2 Mapping bit 3 mask. */ -#define PORTCFG_VP2MAP3_bp 3 /* Virtual Port 2 Mapping bit 3 position. */ - - -/* PORTCFG.CLKEVOUT bit masks and bit positions */ -#define PORTCFG_CLKOUT_gm 0x03 /* Clock Output Port group mask. */ -#define PORTCFG_CLKOUT_gp 0 /* Clock Output Port group position. */ -#define PORTCFG_CLKOUT0_bm (1<<0) /* Clock Output Port bit 0 mask. */ -#define PORTCFG_CLKOUT0_bp 0 /* Clock Output Port bit 0 position. */ -#define PORTCFG_CLKOUT1_bm (1<<1) /* Clock Output Port bit 1 mask. */ -#define PORTCFG_CLKOUT1_bp 1 /* Clock Output Port bit 1 position. */ - -#define PORTCFG_EVOUT_gm 0x30 /* Event Output Port group mask. */ -#define PORTCFG_EVOUT_gp 4 /* Event Output Port group position. */ -#define PORTCFG_EVOUT0_bm (1<<4) /* Event Output Port bit 0 mask. */ -#define PORTCFG_EVOUT0_bp 4 /* Event Output Port bit 0 position. */ -#define PORTCFG_EVOUT1_bm (1<<5) /* Event Output Port bit 1 mask. */ -#define PORTCFG_EVOUT1_bp 5 /* Event Output Port bit 1 position. */ - - -/* VPORT.INTFLAGS bit masks and bit positions */ -#define VPORT_INT1IF_bm 0x02 /* Port Interrupt 1 Flag bit mask. */ -#define VPORT_INT1IF_bp 1 /* Port Interrupt 1 Flag bit position. */ - -#define VPORT_INT0IF_bm 0x01 /* Port Interrupt 0 Flag bit mask. */ -#define VPORT_INT0IF_bp 0 /* Port Interrupt 0 Flag bit position. */ - - -/* PORT.INTCTRL bit masks and bit positions */ -#define PORT_INT1LVL_gm 0x0C /* Port Interrupt 1 Level group mask. */ -#define PORT_INT1LVL_gp 2 /* Port Interrupt 1 Level group position. */ -#define PORT_INT1LVL0_bm (1<<2) /* Port Interrupt 1 Level bit 0 mask. */ -#define PORT_INT1LVL0_bp 2 /* Port Interrupt 1 Level bit 0 position. */ -#define PORT_INT1LVL1_bm (1<<3) /* Port Interrupt 1 Level bit 1 mask. */ -#define PORT_INT1LVL1_bp 3 /* Port Interrupt 1 Level bit 1 position. */ - -#define PORT_INT0LVL_gm 0x03 /* Port Interrupt 0 Level group mask. */ -#define PORT_INT0LVL_gp 0 /* Port Interrupt 0 Level group position. */ -#define PORT_INT0LVL0_bm (1<<0) /* Port Interrupt 0 Level bit 0 mask. */ -#define PORT_INT0LVL0_bp 0 /* Port Interrupt 0 Level bit 0 position. */ -#define PORT_INT0LVL1_bm (1<<1) /* Port Interrupt 0 Level bit 1 mask. */ -#define PORT_INT0LVL1_bp 1 /* Port Interrupt 0 Level bit 1 position. */ - - -/* PORT.INTFLAGS bit masks and bit positions */ -#define PORT_INT1IF_bm 0x02 /* Port Interrupt 1 Flag bit mask. */ -#define PORT_INT1IF_bp 1 /* Port Interrupt 1 Flag bit position. */ - -#define PORT_INT0IF_bm 0x01 /* Port Interrupt 0 Flag bit mask. */ -#define PORT_INT0IF_bp 0 /* Port Interrupt 0 Flag bit position. */ - - -/* PORT.PIN0CTRL bit masks and bit positions */ -#define PORT_SRLEN_bm 0x80 /* Slew Rate Enable bit mask. */ -#define PORT_SRLEN_bp 7 /* Slew Rate Enable bit position. */ - -#define PORT_INVEN_bm 0x40 /* Inverted I/O Enable bit mask. */ -#define PORT_INVEN_bp 6 /* Inverted I/O Enable bit position. */ - -#define PORT_OPC_gm 0x38 /* Output/Pull Configuration group mask. */ -#define PORT_OPC_gp 3 /* Output/Pull Configuration group position. */ -#define PORT_OPC0_bm (1<<3) /* Output/Pull Configuration bit 0 mask. */ -#define PORT_OPC0_bp 3 /* Output/Pull Configuration bit 0 position. */ -#define PORT_OPC1_bm (1<<4) /* Output/Pull Configuration bit 1 mask. */ -#define PORT_OPC1_bp 4 /* Output/Pull Configuration bit 1 position. */ -#define PORT_OPC2_bm (1<<5) /* Output/Pull Configuration bit 2 mask. */ -#define PORT_OPC2_bp 5 /* Output/Pull Configuration bit 2 position. */ - -#define PORT_ISC_gm 0x07 /* Input/Sense Configuration group mask. */ -#define PORT_ISC_gp 0 /* Input/Sense Configuration group position. */ -#define PORT_ISC0_bm (1<<0) /* Input/Sense Configuration bit 0 mask. */ -#define PORT_ISC0_bp 0 /* Input/Sense Configuration bit 0 position. */ -#define PORT_ISC1_bm (1<<1) /* Input/Sense Configuration bit 1 mask. */ -#define PORT_ISC1_bp 1 /* Input/Sense Configuration bit 1 position. */ -#define PORT_ISC2_bm (1<<2) /* Input/Sense Configuration bit 2 mask. */ -#define PORT_ISC2_bp 2 /* Input/Sense Configuration bit 2 position. */ - - -/* PORT.PIN1CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* PORT.PIN2CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* PORT.PIN3CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* PORT.PIN4CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* PORT.PIN5CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* PORT.PIN6CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* PORT.PIN7CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* TC - 16-bit Timer/Counter With PWM */ -/* TC0.CTRLA bit masks and bit positions */ -#define TC0_CLKSEL_gm 0x0F /* Clock Selection group mask. */ -#define TC0_CLKSEL_gp 0 /* Clock Selection group position. */ -#define TC0_CLKSEL0_bm (1<<0) /* Clock Selection bit 0 mask. */ -#define TC0_CLKSEL0_bp 0 /* Clock Selection bit 0 position. */ -#define TC0_CLKSEL1_bm (1<<1) /* Clock Selection bit 1 mask. */ -#define TC0_CLKSEL1_bp 1 /* Clock Selection bit 1 position. */ -#define TC0_CLKSEL2_bm (1<<2) /* Clock Selection bit 2 mask. */ -#define TC0_CLKSEL2_bp 2 /* Clock Selection bit 2 position. */ -#define TC0_CLKSEL3_bm (1<<3) /* Clock Selection bit 3 mask. */ -#define TC0_CLKSEL3_bp 3 /* Clock Selection bit 3 position. */ - - -/* TC0.CTRLB bit masks and bit positions */ -#define TC0_CCDEN_bm 0x80 /* Compare or Capture D Enable bit mask. */ -#define TC0_CCDEN_bp 7 /* Compare or Capture D Enable bit position. */ - -#define TC0_CCCEN_bm 0x40 /* Compare or Capture C Enable bit mask. */ -#define TC0_CCCEN_bp 6 /* Compare or Capture C Enable bit position. */ - -#define TC0_CCBEN_bm 0x20 /* Compare or Capture B Enable bit mask. */ -#define TC0_CCBEN_bp 5 /* Compare or Capture B Enable bit position. */ - -#define TC0_CCAEN_bm 0x10 /* Compare or Capture A Enable bit mask. */ -#define TC0_CCAEN_bp 4 /* Compare or Capture A Enable bit position. */ - -#define TC0_WGMODE_gm 0x07 /* Waveform generation mode group mask. */ -#define TC0_WGMODE_gp 0 /* Waveform generation mode group position. */ -#define TC0_WGMODE0_bm (1<<0) /* Waveform generation mode bit 0 mask. */ -#define TC0_WGMODE0_bp 0 /* Waveform generation mode bit 0 position. */ -#define TC0_WGMODE1_bm (1<<1) /* Waveform generation mode bit 1 mask. */ -#define TC0_WGMODE1_bp 1 /* Waveform generation mode bit 1 position. */ -#define TC0_WGMODE2_bm (1<<2) /* Waveform generation mode bit 2 mask. */ -#define TC0_WGMODE2_bp 2 /* Waveform generation mode bit 2 position. */ - - -/* TC0.CTRLC bit masks and bit positions */ -#define TC0_CMPD_bm 0x08 /* Compare D Output Value bit mask. */ -#define TC0_CMPD_bp 3 /* Compare D Output Value bit position. */ - -#define TC0_CMPC_bm 0x04 /* Compare C Output Value bit mask. */ -#define TC0_CMPC_bp 2 /* Compare C Output Value bit position. */ - -#define TC0_CMPB_bm 0x02 /* Compare B Output Value bit mask. */ -#define TC0_CMPB_bp 1 /* Compare B Output Value bit position. */ - -#define TC0_CMPA_bm 0x01 /* Compare A Output Value bit mask. */ -#define TC0_CMPA_bp 0 /* Compare A Output Value bit position. */ - - -/* TC0.CTRLD bit masks and bit positions */ -#define TC0_EVACT_gm 0xE0 /* Event Action group mask. */ -#define TC0_EVACT_gp 5 /* Event Action group position. */ -#define TC0_EVACT0_bm (1<<5) /* Event Action bit 0 mask. */ -#define TC0_EVACT0_bp 5 /* Event Action bit 0 position. */ -#define TC0_EVACT1_bm (1<<6) /* Event Action bit 1 mask. */ -#define TC0_EVACT1_bp 6 /* Event Action bit 1 position. */ -#define TC0_EVACT2_bm (1<<7) /* Event Action bit 2 mask. */ -#define TC0_EVACT2_bp 7 /* Event Action bit 2 position. */ - -#define TC0_EVDLY_bm 0x10 /* Event Delay bit mask. */ -#define TC0_EVDLY_bp 4 /* Event Delay bit position. */ - -#define TC0_EVSEL_gm 0x0F /* Event Source Select group mask. */ -#define TC0_EVSEL_gp 0 /* Event Source Select group position. */ -#define TC0_EVSEL0_bm (1<<0) /* Event Source Select bit 0 mask. */ -#define TC0_EVSEL0_bp 0 /* Event Source Select bit 0 position. */ -#define TC0_EVSEL1_bm (1<<1) /* Event Source Select bit 1 mask. */ -#define TC0_EVSEL1_bp 1 /* Event Source Select bit 1 position. */ -#define TC0_EVSEL2_bm (1<<2) /* Event Source Select bit 2 mask. */ -#define TC0_EVSEL2_bp 2 /* Event Source Select bit 2 position. */ -#define TC0_EVSEL3_bm (1<<3) /* Event Source Select bit 3 mask. */ -#define TC0_EVSEL3_bp 3 /* Event Source Select bit 3 position. */ - - -/* TC0.CTRLE bit masks and bit positions */ -#define TC0_DTHM_bm 0x02 /* Dead Time Hold Mode bit mask. */ -#define TC0_DTHM_bp 1 /* Dead Time Hold Mode bit position. */ - -#define TC0_BYTEM_bm 0x01 /* Byte Mode bit mask. */ -#define TC0_BYTEM_bp 0 /* Byte Mode bit position. */ - - -/* TC0.INTCTRLA bit masks and bit positions */ -#define TC0_ERRINTLVL_gm 0x0C /* Error Interrupt Level group mask. */ -#define TC0_ERRINTLVL_gp 2 /* Error Interrupt Level group position. */ -#define TC0_ERRINTLVL0_bm (1<<2) /* Error Interrupt Level bit 0 mask. */ -#define TC0_ERRINTLVL0_bp 2 /* Error Interrupt Level bit 0 position. */ -#define TC0_ERRINTLVL1_bm (1<<3) /* Error Interrupt Level bit 1 mask. */ -#define TC0_ERRINTLVL1_bp 3 /* Error Interrupt Level bit 1 position. */ - -#define TC0_OVFINTLVL_gm 0x03 /* Overflow interrupt level group mask. */ -#define TC0_OVFINTLVL_gp 0 /* Overflow interrupt level group position. */ -#define TC0_OVFINTLVL0_bm (1<<0) /* Overflow interrupt level bit 0 mask. */ -#define TC0_OVFINTLVL0_bp 0 /* Overflow interrupt level bit 0 position. */ -#define TC0_OVFINTLVL1_bm (1<<1) /* Overflow interrupt level bit 1 mask. */ -#define TC0_OVFINTLVL1_bp 1 /* Overflow interrupt level bit 1 position. */ - - -/* TC0.INTCTRLB bit masks and bit positions */ -#define TC0_CCDINTLVL_gm 0xC0 /* Compare or Capture D Interrupt Level group mask. */ -#define TC0_CCDINTLVL_gp 6 /* Compare or Capture D Interrupt Level group position. */ -#define TC0_CCDINTLVL0_bm (1<<6) /* Compare or Capture D Interrupt Level bit 0 mask. */ -#define TC0_CCDINTLVL0_bp 6 /* Compare or Capture D Interrupt Level bit 0 position. */ -#define TC0_CCDINTLVL1_bm (1<<7) /* Compare or Capture D Interrupt Level bit 1 mask. */ -#define TC0_CCDINTLVL1_bp 7 /* Compare or Capture D Interrupt Level bit 1 position. */ - -#define TC0_CCCINTLVL_gm 0x30 /* Compare or Capture C Interrupt Level group mask. */ -#define TC0_CCCINTLVL_gp 4 /* Compare or Capture C Interrupt Level group position. */ -#define TC0_CCCINTLVL0_bm (1<<4) /* Compare or Capture C Interrupt Level bit 0 mask. */ -#define TC0_CCCINTLVL0_bp 4 /* Compare or Capture C Interrupt Level bit 0 position. */ -#define TC0_CCCINTLVL1_bm (1<<5) /* Compare or Capture C Interrupt Level bit 1 mask. */ -#define TC0_CCCINTLVL1_bp 5 /* Compare or Capture C Interrupt Level bit 1 position. */ - -#define TC0_CCBINTLVL_gm 0x0C /* Compare or Capture B Interrupt Level group mask. */ -#define TC0_CCBINTLVL_gp 2 /* Compare or Capture B Interrupt Level group position. */ -#define TC0_CCBINTLVL0_bm (1<<2) /* Compare or Capture B Interrupt Level bit 0 mask. */ -#define TC0_CCBINTLVL0_bp 2 /* Compare or Capture B Interrupt Level bit 0 position. */ -#define TC0_CCBINTLVL1_bm (1<<3) /* Compare or Capture B Interrupt Level bit 1 mask. */ -#define TC0_CCBINTLVL1_bp 3 /* Compare or Capture B Interrupt Level bit 1 position. */ - -#define TC0_CCAINTLVL_gm 0x03 /* Compare or Capture A Interrupt Level group mask. */ -#define TC0_CCAINTLVL_gp 0 /* Compare or Capture A Interrupt Level group position. */ -#define TC0_CCAINTLVL0_bm (1<<0) /* Compare or Capture A Interrupt Level bit 0 mask. */ -#define TC0_CCAINTLVL0_bp 0 /* Compare or Capture A Interrupt Level bit 0 position. */ -#define TC0_CCAINTLVL1_bm (1<<1) /* Compare or Capture A Interrupt Level bit 1 mask. */ -#define TC0_CCAINTLVL1_bp 1 /* Compare or Capture A Interrupt Level bit 1 position. */ - - -/* TC0.CTRLFCLR bit masks and bit positions */ -#define TC0_CMD_gm 0x0C /* Command group mask. */ -#define TC0_CMD_gp 2 /* Command group position. */ -#define TC0_CMD0_bm (1<<2) /* Command bit 0 mask. */ -#define TC0_CMD0_bp 2 /* Command bit 0 position. */ -#define TC0_CMD1_bm (1<<3) /* Command bit 1 mask. */ -#define TC0_CMD1_bp 3 /* Command bit 1 position. */ - -#define TC0_LUPD_bm 0x02 /* Lock Update bit mask. */ -#define TC0_LUPD_bp 1 /* Lock Update bit position. */ - -#define TC0_DIR_bm 0x01 /* Direction bit mask. */ -#define TC0_DIR_bp 0 /* Direction bit position. */ - - -/* TC0.CTRLFSET bit masks and bit positions */ -/* TC0_CMD_gm Predefined. */ -/* TC0_CMD_gp Predefined. */ -/* TC0_CMD0_bm Predefined. */ -/* TC0_CMD0_bp Predefined. */ -/* TC0_CMD1_bm Predefined. */ -/* TC0_CMD1_bp Predefined. */ - -/* TC0_LUPD_bm Predefined. */ -/* TC0_LUPD_bp Predefined. */ - -/* TC0_DIR_bm Predefined. */ -/* TC0_DIR_bp Predefined. */ - - -/* TC0.CTRLGCLR bit masks and bit positions */ -#define TC0_CCDBV_bm 0x10 /* Compare or Capture D Buffer Valid bit mask. */ -#define TC0_CCDBV_bp 4 /* Compare or Capture D Buffer Valid bit position. */ - -#define TC0_CCCBV_bm 0x08 /* Compare or Capture C Buffer Valid bit mask. */ -#define TC0_CCCBV_bp 3 /* Compare or Capture C Buffer Valid bit position. */ - -#define TC0_CCBBV_bm 0x04 /* Compare or Capture B Buffer Valid bit mask. */ -#define TC0_CCBBV_bp 2 /* Compare or Capture B Buffer Valid bit position. */ - -#define TC0_CCABV_bm 0x02 /* Compare or Capture A Buffer Valid bit mask. */ -#define TC0_CCABV_bp 1 /* Compare or Capture A Buffer Valid bit position. */ - -#define TC0_PERBV_bm 0x01 /* Period Buffer Valid bit mask. */ -#define TC0_PERBV_bp 0 /* Period Buffer Valid bit position. */ - - -/* TC0.CTRLGSET bit masks and bit positions */ -/* TC0_CCDBV_bm Predefined. */ -/* TC0_CCDBV_bp Predefined. */ - -/* TC0_CCCBV_bm Predefined. */ -/* TC0_CCCBV_bp Predefined. */ - -/* TC0_CCBBV_bm Predefined. */ -/* TC0_CCBBV_bp Predefined. */ - -/* TC0_CCABV_bm Predefined. */ -/* TC0_CCABV_bp Predefined. */ - -/* TC0_PERBV_bm Predefined. */ -/* TC0_PERBV_bp Predefined. */ - - -/* TC0.INTFLAGS bit masks and bit positions */ -#define TC0_CCDIF_bm 0x80 /* Compare or Capture D Interrupt Flag bit mask. */ -#define TC0_CCDIF_bp 7 /* Compare or Capture D Interrupt Flag bit position. */ - -#define TC0_CCCIF_bm 0x40 /* Compare or Capture C Interrupt Flag bit mask. */ -#define TC0_CCCIF_bp 6 /* Compare or Capture C Interrupt Flag bit position. */ - -#define TC0_CCBIF_bm 0x20 /* Compare or Capture B Interrupt Flag bit mask. */ -#define TC0_CCBIF_bp 5 /* Compare or Capture B Interrupt Flag bit position. */ - -#define TC0_CCAIF_bm 0x10 /* Compare or Capture A Interrupt Flag bit mask. */ -#define TC0_CCAIF_bp 4 /* Compare or Capture A Interrupt Flag bit position. */ - -#define TC0_ERRIF_bm 0x02 /* Error Interrupt Flag bit mask. */ -#define TC0_ERRIF_bp 1 /* Error Interrupt Flag bit position. */ - -#define TC0_OVFIF_bm 0x01 /* Overflow Interrupt Flag bit mask. */ -#define TC0_OVFIF_bp 0 /* Overflow Interrupt Flag bit position. */ - - -/* TC1.CTRLA bit masks and bit positions */ -#define TC1_CLKSEL_gm 0x0F /* Clock Selection group mask. */ -#define TC1_CLKSEL_gp 0 /* Clock Selection group position. */ -#define TC1_CLKSEL0_bm (1<<0) /* Clock Selection bit 0 mask. */ -#define TC1_CLKSEL0_bp 0 /* Clock Selection bit 0 position. */ -#define TC1_CLKSEL1_bm (1<<1) /* Clock Selection bit 1 mask. */ -#define TC1_CLKSEL1_bp 1 /* Clock Selection bit 1 position. */ -#define TC1_CLKSEL2_bm (1<<2) /* Clock Selection bit 2 mask. */ -#define TC1_CLKSEL2_bp 2 /* Clock Selection bit 2 position. */ -#define TC1_CLKSEL3_bm (1<<3) /* Clock Selection bit 3 mask. */ -#define TC1_CLKSEL3_bp 3 /* Clock Selection bit 3 position. */ - - -/* TC1.CTRLB bit masks and bit positions */ -#define TC1_CCBEN_bm 0x20 /* Compare or Capture B Enable bit mask. */ -#define TC1_CCBEN_bp 5 /* Compare or Capture B Enable bit position. */ - -#define TC1_CCAEN_bm 0x10 /* Compare or Capture A Enable bit mask. */ -#define TC1_CCAEN_bp 4 /* Compare or Capture A Enable bit position. */ - -#define TC1_WGMODE_gm 0x07 /* Waveform generation mode group mask. */ -#define TC1_WGMODE_gp 0 /* Waveform generation mode group position. */ -#define TC1_WGMODE0_bm (1<<0) /* Waveform generation mode bit 0 mask. */ -#define TC1_WGMODE0_bp 0 /* Waveform generation mode bit 0 position. */ -#define TC1_WGMODE1_bm (1<<1) /* Waveform generation mode bit 1 mask. */ -#define TC1_WGMODE1_bp 1 /* Waveform generation mode bit 1 position. */ -#define TC1_WGMODE2_bm (1<<2) /* Waveform generation mode bit 2 mask. */ -#define TC1_WGMODE2_bp 2 /* Waveform generation mode bit 2 position. */ - - -/* TC1.CTRLC bit masks and bit positions */ -#define TC1_CMPB_bm 0x02 /* Compare B Output Value bit mask. */ -#define TC1_CMPB_bp 1 /* Compare B Output Value bit position. */ - -#define TC1_CMPA_bm 0x01 /* Compare A Output Value bit mask. */ -#define TC1_CMPA_bp 0 /* Compare A Output Value bit position. */ - - -/* TC1.CTRLD bit masks and bit positions */ -#define TC1_EVACT_gm 0xE0 /* Event Action group mask. */ -#define TC1_EVACT_gp 5 /* Event Action group position. */ -#define TC1_EVACT0_bm (1<<5) /* Event Action bit 0 mask. */ -#define TC1_EVACT0_bp 5 /* Event Action bit 0 position. */ -#define TC1_EVACT1_bm (1<<6) /* Event Action bit 1 mask. */ -#define TC1_EVACT1_bp 6 /* Event Action bit 1 position. */ -#define TC1_EVACT2_bm (1<<7) /* Event Action bit 2 mask. */ -#define TC1_EVACT2_bp 7 /* Event Action bit 2 position. */ - -#define TC1_EVDLY_bm 0x10 /* Event Delay bit mask. */ -#define TC1_EVDLY_bp 4 /* Event Delay bit position. */ - -#define TC1_EVSEL_gm 0x0F /* Event Source Select group mask. */ -#define TC1_EVSEL_gp 0 /* Event Source Select group position. */ -#define TC1_EVSEL0_bm (1<<0) /* Event Source Select bit 0 mask. */ -#define TC1_EVSEL0_bp 0 /* Event Source Select bit 0 position. */ -#define TC1_EVSEL1_bm (1<<1) /* Event Source Select bit 1 mask. */ -#define TC1_EVSEL1_bp 1 /* Event Source Select bit 1 position. */ -#define TC1_EVSEL2_bm (1<<2) /* Event Source Select bit 2 mask. */ -#define TC1_EVSEL2_bp 2 /* Event Source Select bit 2 position. */ -#define TC1_EVSEL3_bm (1<<3) /* Event Source Select bit 3 mask. */ -#define TC1_EVSEL3_bp 3 /* Event Source Select bit 3 position. */ - - -/* TC1.CTRLE bit masks and bit positions */ -#define TC1_DTHM_bm 0x02 /* Dead Time Hold Mode bit mask. */ -#define TC1_DTHM_bp 1 /* Dead Time Hold Mode bit position. */ - -#define TC1_BYTEM_bm 0x01 /* Byte Mode bit mask. */ -#define TC1_BYTEM_bp 0 /* Byte Mode bit position. */ - - -/* TC1.INTCTRLA bit masks and bit positions */ -#define TC1_ERRINTLVL_gm 0x0C /* Error Interrupt Level group mask. */ -#define TC1_ERRINTLVL_gp 2 /* Error Interrupt Level group position. */ -#define TC1_ERRINTLVL0_bm (1<<2) /* Error Interrupt Level bit 0 mask. */ -#define TC1_ERRINTLVL0_bp 2 /* Error Interrupt Level bit 0 position. */ -#define TC1_ERRINTLVL1_bm (1<<3) /* Error Interrupt Level bit 1 mask. */ -#define TC1_ERRINTLVL1_bp 3 /* Error Interrupt Level bit 1 position. */ - -#define TC1_OVFINTLVL_gm 0x03 /* Overflow interrupt level group mask. */ -#define TC1_OVFINTLVL_gp 0 /* Overflow interrupt level group position. */ -#define TC1_OVFINTLVL0_bm (1<<0) /* Overflow interrupt level bit 0 mask. */ -#define TC1_OVFINTLVL0_bp 0 /* Overflow interrupt level bit 0 position. */ -#define TC1_OVFINTLVL1_bm (1<<1) /* Overflow interrupt level bit 1 mask. */ -#define TC1_OVFINTLVL1_bp 1 /* Overflow interrupt level bit 1 position. */ - - -/* TC1.INTCTRLB bit masks and bit positions */ -#define TC1_CCBINTLVL_gm 0x0C /* Compare or Capture B Interrupt Level group mask. */ -#define TC1_CCBINTLVL_gp 2 /* Compare or Capture B Interrupt Level group position. */ -#define TC1_CCBINTLVL0_bm (1<<2) /* Compare or Capture B Interrupt Level bit 0 mask. */ -#define TC1_CCBINTLVL0_bp 2 /* Compare or Capture B Interrupt Level bit 0 position. */ -#define TC1_CCBINTLVL1_bm (1<<3) /* Compare or Capture B Interrupt Level bit 1 mask. */ -#define TC1_CCBINTLVL1_bp 3 /* Compare or Capture B Interrupt Level bit 1 position. */ - -#define TC1_CCAINTLVL_gm 0x03 /* Compare or Capture A Interrupt Level group mask. */ -#define TC1_CCAINTLVL_gp 0 /* Compare or Capture A Interrupt Level group position. */ -#define TC1_CCAINTLVL0_bm (1<<0) /* Compare or Capture A Interrupt Level bit 0 mask. */ -#define TC1_CCAINTLVL0_bp 0 /* Compare or Capture A Interrupt Level bit 0 position. */ -#define TC1_CCAINTLVL1_bm (1<<1) /* Compare or Capture A Interrupt Level bit 1 mask. */ -#define TC1_CCAINTLVL1_bp 1 /* Compare or Capture A Interrupt Level bit 1 position. */ - - -/* TC1.CTRLFCLR bit masks and bit positions */ -#define TC1_CMD_gm 0x0C /* Command group mask. */ -#define TC1_CMD_gp 2 /* Command group position. */ -#define TC1_CMD0_bm (1<<2) /* Command bit 0 mask. */ -#define TC1_CMD0_bp 2 /* Command bit 0 position. */ -#define TC1_CMD1_bm (1<<3) /* Command bit 1 mask. */ -#define TC1_CMD1_bp 3 /* Command bit 1 position. */ - -#define TC1_LUPD_bm 0x02 /* Lock Update bit mask. */ -#define TC1_LUPD_bp 1 /* Lock Update bit position. */ - -#define TC1_DIR_bm 0x01 /* Direction bit mask. */ -#define TC1_DIR_bp 0 /* Direction bit position. */ - - -/* TC1.CTRLFSET bit masks and bit positions */ -/* TC1_CMD_gm Predefined. */ -/* TC1_CMD_gp Predefined. */ -/* TC1_CMD0_bm Predefined. */ -/* TC1_CMD0_bp Predefined. */ -/* TC1_CMD1_bm Predefined. */ -/* TC1_CMD1_bp Predefined. */ - -/* TC1_LUPD_bm Predefined. */ -/* TC1_LUPD_bp Predefined. */ - -/* TC1_DIR_bm Predefined. */ -/* TC1_DIR_bp Predefined. */ - - -/* TC1.CTRLGCLR bit masks and bit positions */ -#define TC1_CCBBV_bm 0x04 /* Compare or Capture B Buffer Valid bit mask. */ -#define TC1_CCBBV_bp 2 /* Compare or Capture B Buffer Valid bit position. */ - -#define TC1_CCABV_bm 0x02 /* Compare or Capture A Buffer Valid bit mask. */ -#define TC1_CCABV_bp 1 /* Compare or Capture A Buffer Valid bit position. */ - -#define TC1_PERBV_bm 0x01 /* Period Buffer Valid bit mask. */ -#define TC1_PERBV_bp 0 /* Period Buffer Valid bit position. */ - - -/* TC1.CTRLGSET bit masks and bit positions */ -/* TC1_CCBBV_bm Predefined. */ -/* TC1_CCBBV_bp Predefined. */ - -/* TC1_CCABV_bm Predefined. */ -/* TC1_CCABV_bp Predefined. */ - -/* TC1_PERBV_bm Predefined. */ -/* TC1_PERBV_bp Predefined. */ - - -/* TC1.INTFLAGS bit masks and bit positions */ -#define TC1_CCBIF_bm 0x20 /* Compare or Capture B Interrupt Flag bit mask. */ -#define TC1_CCBIF_bp 5 /* Compare or Capture B Interrupt Flag bit position. */ - -#define TC1_CCAIF_bm 0x10 /* Compare or Capture A Interrupt Flag bit mask. */ -#define TC1_CCAIF_bp 4 /* Compare or Capture A Interrupt Flag bit position. */ - -#define TC1_ERRIF_bm 0x02 /* Error Interrupt Flag bit mask. */ -#define TC1_ERRIF_bp 1 /* Error Interrupt Flag bit position. */ - -#define TC1_OVFIF_bm 0x01 /* Overflow Interrupt Flag bit mask. */ -#define TC1_OVFIF_bp 0 /* Overflow Interrupt Flag bit position. */ - - -/* AWEX.CTRL bit masks and bit positions */ -#define AWEX_PGM_bm 0x20 /* Pattern Generation Mode bit mask. */ -#define AWEX_PGM_bp 5 /* Pattern Generation Mode bit position. */ - -#define AWEX_CWCM_bm 0x10 /* Common Waveform Channel Mode bit mask. */ -#define AWEX_CWCM_bp 4 /* Common Waveform Channel Mode bit position. */ - -#define AWEX_DTICCDEN_bm 0x08 /* Dead Time Insertion Compare Channel D Enable bit mask. */ -#define AWEX_DTICCDEN_bp 3 /* Dead Time Insertion Compare Channel D Enable bit position. */ - -#define AWEX_DTICCCEN_bm 0x04 /* Dead Time Insertion Compare Channel C Enable bit mask. */ -#define AWEX_DTICCCEN_bp 2 /* Dead Time Insertion Compare Channel C Enable bit position. */ - -#define AWEX_DTICCBEN_bm 0x02 /* Dead Time Insertion Compare Channel B Enable bit mask. */ -#define AWEX_DTICCBEN_bp 1 /* Dead Time Insertion Compare Channel B Enable bit position. */ - -#define AWEX_DTICCAEN_bm 0x01 /* Dead Time Insertion Compare Channel A Enable bit mask. */ -#define AWEX_DTICCAEN_bp 0 /* Dead Time Insertion Compare Channel A Enable bit position. */ - - -/* AWEX.FDCTRL bit masks and bit positions */ -#define AWEX_FDDBD_bm 0x10 /* Fault Detect on Disable Break Disable bit mask. */ -#define AWEX_FDDBD_bp 4 /* Fault Detect on Disable Break Disable bit position. */ - -#define AWEX_FDMODE_bm 0x04 /* Fault Detect Mode bit mask. */ -#define AWEX_FDMODE_bp 2 /* Fault Detect Mode bit position. */ - -#define AWEX_FDACT_gm 0x03 /* Fault Detect Action group mask. */ -#define AWEX_FDACT_gp 0 /* Fault Detect Action group position. */ -#define AWEX_FDACT0_bm (1<<0) /* Fault Detect Action bit 0 mask. */ -#define AWEX_FDACT0_bp 0 /* Fault Detect Action bit 0 position. */ -#define AWEX_FDACT1_bm (1<<1) /* Fault Detect Action bit 1 mask. */ -#define AWEX_FDACT1_bp 1 /* Fault Detect Action bit 1 position. */ - - -/* AWEX.STATUS bit masks and bit positions */ -#define AWEX_FDF_bm 0x04 /* Fault Detect Flag bit mask. */ -#define AWEX_FDF_bp 2 /* Fault Detect Flag bit position. */ - -#define AWEX_DTHSBUFV_bm 0x02 /* Dead Time High Side Buffer Valid bit mask. */ -#define AWEX_DTHSBUFV_bp 1 /* Dead Time High Side Buffer Valid bit position. */ - -#define AWEX_DTLSBUFV_bm 0x01 /* Dead Time Low Side Buffer Valid bit mask. */ -#define AWEX_DTLSBUFV_bp 0 /* Dead Time Low Side Buffer Valid bit position. */ - - -/* HIRES.CTRL bit masks and bit positions */ -#define HIRES_HREN_gm 0x03 /* High Resolution Enable group mask. */ -#define HIRES_HREN_gp 0 /* High Resolution Enable group position. */ -#define HIRES_HREN0_bm (1<<0) /* High Resolution Enable bit 0 mask. */ -#define HIRES_HREN0_bp 0 /* High Resolution Enable bit 0 position. */ -#define HIRES_HREN1_bm (1<<1) /* High Resolution Enable bit 1 mask. */ -#define HIRES_HREN1_bp 1 /* High Resolution Enable bit 1 position. */ - - -/* USART - Universal Asynchronous Receiver-Transmitter */ -/* USART.STATUS bit masks and bit positions */ -#define USART_RXCIF_bm 0x80 /* Receive Interrupt Flag bit mask. */ -#define USART_RXCIF_bp 7 /* Receive Interrupt Flag bit position. */ - -#define USART_TXCIF_bm 0x40 /* Transmit Interrupt Flag bit mask. */ -#define USART_TXCIF_bp 6 /* Transmit Interrupt Flag bit position. */ - -#define USART_DREIF_bm 0x20 /* Data Register Empty Flag bit mask. */ -#define USART_DREIF_bp 5 /* Data Register Empty Flag bit position. */ - -#define USART_FERR_bm 0x10 /* Frame Error bit mask. */ -#define USART_FERR_bp 4 /* Frame Error bit position. */ - -#define USART_BUFOVF_bm 0x08 /* Buffer Overflow bit mask. */ -#define USART_BUFOVF_bp 3 /* Buffer Overflow bit position. */ - -#define USART_PERR_bm 0x04 /* Parity Error bit mask. */ -#define USART_PERR_bp 2 /* Parity Error bit position. */ - -#define USART_RXB8_bm 0x01 /* Receive Bit 8 bit mask. */ -#define USART_RXB8_bp 0 /* Receive Bit 8 bit position. */ - - -/* USART.CTRLA bit masks and bit positions */ -#define USART_RXCINTLVL_gm 0x30 /* Receive Interrupt Level group mask. */ -#define USART_RXCINTLVL_gp 4 /* Receive Interrupt Level group position. */ -#define USART_RXCINTLVL0_bm (1<<4) /* Receive Interrupt Level bit 0 mask. */ -#define USART_RXCINTLVL0_bp 4 /* Receive Interrupt Level bit 0 position. */ -#define USART_RXCINTLVL1_bm (1<<5) /* Receive Interrupt Level bit 1 mask. */ -#define USART_RXCINTLVL1_bp 5 /* Receive Interrupt Level bit 1 position. */ - -#define USART_TXCINTLVL_gm 0x0C /* Transmit Interrupt Level group mask. */ -#define USART_TXCINTLVL_gp 2 /* Transmit Interrupt Level group position. */ -#define USART_TXCINTLVL0_bm (1<<2) /* Transmit Interrupt Level bit 0 mask. */ -#define USART_TXCINTLVL0_bp 2 /* Transmit Interrupt Level bit 0 position. */ -#define USART_TXCINTLVL1_bm (1<<3) /* Transmit Interrupt Level bit 1 mask. */ -#define USART_TXCINTLVL1_bp 3 /* Transmit Interrupt Level bit 1 position. */ - -#define USART_DREINTLVL_gm 0x03 /* Data Register Empty Interrupt Level group mask. */ -#define USART_DREINTLVL_gp 0 /* Data Register Empty Interrupt Level group position. */ -#define USART_DREINTLVL0_bm (1<<0) /* Data Register Empty Interrupt Level bit 0 mask. */ -#define USART_DREINTLVL0_bp 0 /* Data Register Empty Interrupt Level bit 0 position. */ -#define USART_DREINTLVL1_bm (1<<1) /* Data Register Empty Interrupt Level bit 1 mask. */ -#define USART_DREINTLVL1_bp 1 /* Data Register Empty Interrupt Level bit 1 position. */ - - -/* USART.CTRLB bit masks and bit positions */ -#define USART_RXEN_bm 0x10 /* Receiver Enable bit mask. */ -#define USART_RXEN_bp 4 /* Receiver Enable bit position. */ - -#define USART_TXEN_bm 0x08 /* Transmitter Enable bit mask. */ -#define USART_TXEN_bp 3 /* Transmitter Enable bit position. */ - -#define USART_CLK2X_bm 0x04 /* Double transmission speed bit mask. */ -#define USART_CLK2X_bp 2 /* Double transmission speed bit position. */ - -#define USART_MPCM_bm 0x02 /* Multi-processor Communication Mode bit mask. */ -#define USART_MPCM_bp 1 /* Multi-processor Communication Mode bit position. */ - -#define USART_TXB8_bm 0x01 /* Transmit bit 8 bit mask. */ -#define USART_TXB8_bp 0 /* Transmit bit 8 bit position. */ - - -/* USART.CTRLC bit masks and bit positions */ -#define USART_CMODE_gm 0xC0 /* Communication Mode group mask. */ -#define USART_CMODE_gp 6 /* Communication Mode group position. */ -#define USART_CMODE0_bm (1<<6) /* Communication Mode bit 0 mask. */ -#define USART_CMODE0_bp 6 /* Communication Mode bit 0 position. */ -#define USART_CMODE1_bm (1<<7) /* Communication Mode bit 1 mask. */ -#define USART_CMODE1_bp 7 /* Communication Mode bit 1 position. */ - -#define USART_PMODE_gm 0x30 /* Parity Mode group mask. */ -#define USART_PMODE_gp 4 /* Parity Mode group position. */ -#define USART_PMODE0_bm (1<<4) /* Parity Mode bit 0 mask. */ -#define USART_PMODE0_bp 4 /* Parity Mode bit 0 position. */ -#define USART_PMODE1_bm (1<<5) /* Parity Mode bit 1 mask. */ -#define USART_PMODE1_bp 5 /* Parity Mode bit 1 position. */ - -#define USART_SBMODE_bm 0x08 /* Stop Bit Mode bit mask. */ -#define USART_SBMODE_bp 3 /* Stop Bit Mode bit position. */ - -#define USART_CHSIZE_gm 0x07 /* Character Size group mask. */ -#define USART_CHSIZE_gp 0 /* Character Size group position. */ -#define USART_CHSIZE0_bm (1<<0) /* Character Size bit 0 mask. */ -#define USART_CHSIZE0_bp 0 /* Character Size bit 0 position. */ -#define USART_CHSIZE1_bm (1<<1) /* Character Size bit 1 mask. */ -#define USART_CHSIZE1_bp 1 /* Character Size bit 1 position. */ -#define USART_CHSIZE2_bm (1<<2) /* Character Size bit 2 mask. */ -#define USART_CHSIZE2_bp 2 /* Character Size bit 2 position. */ - - -/* USART.BAUDCTRLA bit masks and bit positions */ -#define USART_BSEL_gm 0xFF /* Baud Rate Selection Bits [7:0] group mask. */ -#define USART_BSEL_gp 0 /* Baud Rate Selection Bits [7:0] group position. */ -#define USART_BSEL0_bm (1<<0) /* Baud Rate Selection Bits [7:0] bit 0 mask. */ -#define USART_BSEL0_bp 0 /* Baud Rate Selection Bits [7:0] bit 0 position. */ -#define USART_BSEL1_bm (1<<1) /* Baud Rate Selection Bits [7:0] bit 1 mask. */ -#define USART_BSEL1_bp 1 /* Baud Rate Selection Bits [7:0] bit 1 position. */ -#define USART_BSEL2_bm (1<<2) /* Baud Rate Selection Bits [7:0] bit 2 mask. */ -#define USART_BSEL2_bp 2 /* Baud Rate Selection Bits [7:0] bit 2 position. */ -#define USART_BSEL3_bm (1<<3) /* Baud Rate Selection Bits [7:0] bit 3 mask. */ -#define USART_BSEL3_bp 3 /* Baud Rate Selection Bits [7:0] bit 3 position. */ -#define USART_BSEL4_bm (1<<4) /* Baud Rate Selection Bits [7:0] bit 4 mask. */ -#define USART_BSEL4_bp 4 /* Baud Rate Selection Bits [7:0] bit 4 position. */ -#define USART_BSEL5_bm (1<<5) /* Baud Rate Selection Bits [7:0] bit 5 mask. */ -#define USART_BSEL5_bp 5 /* Baud Rate Selection Bits [7:0] bit 5 position. */ -#define USART_BSEL6_bm (1<<6) /* Baud Rate Selection Bits [7:0] bit 6 mask. */ -#define USART_BSEL6_bp 6 /* Baud Rate Selection Bits [7:0] bit 6 position. */ -#define USART_BSEL7_bm (1<<7) /* Baud Rate Selection Bits [7:0] bit 7 mask. */ -#define USART_BSEL7_bp 7 /* Baud Rate Selection Bits [7:0] bit 7 position. */ - - -/* USART.BAUDCTRLB bit masks and bit positions */ -#define USART_BSCALE_gm 0xF0 /* Baud Rate Scale group mask. */ -#define USART_BSCALE_gp 4 /* Baud Rate Scale group position. */ -#define USART_BSCALE0_bm (1<<4) /* Baud Rate Scale bit 0 mask. */ -#define USART_BSCALE0_bp 4 /* Baud Rate Scale bit 0 position. */ -#define USART_BSCALE1_bm (1<<5) /* Baud Rate Scale bit 1 mask. */ -#define USART_BSCALE1_bp 5 /* Baud Rate Scale bit 1 position. */ -#define USART_BSCALE2_bm (1<<6) /* Baud Rate Scale bit 2 mask. */ -#define USART_BSCALE2_bp 6 /* Baud Rate Scale bit 2 position. */ -#define USART_BSCALE3_bm (1<<7) /* Baud Rate Scale bit 3 mask. */ -#define USART_BSCALE3_bp 7 /* Baud Rate Scale bit 3 position. */ - -/* USART_BSEL_gm Predefined. */ -/* USART_BSEL_gp Predefined. */ -/* USART_BSEL0_bm Predefined. */ -/* USART_BSEL0_bp Predefined. */ -/* USART_BSEL1_bm Predefined. */ -/* USART_BSEL1_bp Predefined. */ -/* USART_BSEL2_bm Predefined. */ -/* USART_BSEL2_bp Predefined. */ -/* USART_BSEL3_bm Predefined. */ -/* USART_BSEL3_bp Predefined. */ - - -/* SPI - Serial Peripheral Interface */ -/* SPI.CTRL bit masks and bit positions */ -#define SPI_CLK2X_bm 0x80 /* Enable Double Speed bit mask. */ -#define SPI_CLK2X_bp 7 /* Enable Double Speed bit position. */ - -#define SPI_ENABLE_bm 0x40 /* Enable Module bit mask. */ -#define SPI_ENABLE_bp 6 /* Enable Module bit position. */ - -#define SPI_DORD_bm 0x20 /* Data Order Setting bit mask. */ -#define SPI_DORD_bp 5 /* Data Order Setting bit position. */ - -#define SPI_MASTER_bm 0x10 /* Master Operation Enable bit mask. */ -#define SPI_MASTER_bp 4 /* Master Operation Enable bit position. */ - -#define SPI_MODE_gm 0x0C /* SPI Mode group mask. */ -#define SPI_MODE_gp 2 /* SPI Mode group position. */ -#define SPI_MODE0_bm (1<<2) /* SPI Mode bit 0 mask. */ -#define SPI_MODE0_bp 2 /* SPI Mode bit 0 position. */ -#define SPI_MODE1_bm (1<<3) /* SPI Mode bit 1 mask. */ -#define SPI_MODE1_bp 3 /* SPI Mode bit 1 position. */ - -#define SPI_PRESCALER_gm 0x03 /* Prescaler group mask. */ -#define SPI_PRESCALER_gp 0 /* Prescaler group position. */ -#define SPI_PRESCALER0_bm (1<<0) /* Prescaler bit 0 mask. */ -#define SPI_PRESCALER0_bp 0 /* Prescaler bit 0 position. */ -#define SPI_PRESCALER1_bm (1<<1) /* Prescaler bit 1 mask. */ -#define SPI_PRESCALER1_bp 1 /* Prescaler bit 1 position. */ - - -/* SPI.INTCTRL bit masks and bit positions */ -#define SPI_INTLVL_gm 0x03 /* Interrupt level group mask. */ -#define SPI_INTLVL_gp 0 /* Interrupt level group position. */ -#define SPI_INTLVL0_bm (1<<0) /* Interrupt level bit 0 mask. */ -#define SPI_INTLVL0_bp 0 /* Interrupt level bit 0 position. */ -#define SPI_INTLVL1_bm (1<<1) /* Interrupt level bit 1 mask. */ -#define SPI_INTLVL1_bp 1 /* Interrupt level bit 1 position. */ - - -/* SPI.STATUS bit masks and bit positions */ -#define SPI_IF_bm 0x80 /* Interrupt Flag bit mask. */ -#define SPI_IF_bp 7 /* Interrupt Flag bit position. */ - -#define SPI_WRCOL_bm 0x40 /* Write Collision bit mask. */ -#define SPI_WRCOL_bp 6 /* Write Collision bit position. */ - - -/* IRCOM - IR Communication Module */ -/* IRCOM.CTRL bit masks and bit positions */ -#define IRCOM_EVSEL_gm 0x0F /* Event Channel Select group mask. */ -#define IRCOM_EVSEL_gp 0 /* Event Channel Select group position. */ -#define IRCOM_EVSEL0_bm (1<<0) /* Event Channel Select bit 0 mask. */ -#define IRCOM_EVSEL0_bp 0 /* Event Channel Select bit 0 position. */ -#define IRCOM_EVSEL1_bm (1<<1) /* Event Channel Select bit 1 mask. */ -#define IRCOM_EVSEL1_bp 1 /* Event Channel Select bit 1 position. */ -#define IRCOM_EVSEL2_bm (1<<2) /* Event Channel Select bit 2 mask. */ -#define IRCOM_EVSEL2_bp 2 /* Event Channel Select bit 2 position. */ -#define IRCOM_EVSEL3_bm (1<<3) /* Event Channel Select bit 3 mask. */ -#define IRCOM_EVSEL3_bp 3 /* Event Channel Select bit 3 position. */ - - -/* AES - AES Module */ -/* AES.CTRL bit masks and bit positions */ -#define AES_START_bm 0x80 /* Start/Run bit mask. */ -#define AES_START_bp 7 /* Start/Run bit position. */ - -#define AES_AUTO_bm 0x40 /* Auto Start Trigger bit mask. */ -#define AES_AUTO_bp 6 /* Auto Start Trigger bit position. */ - -#define AES_RESET_bm 0x20 /* AES Software Reset bit mask. */ -#define AES_RESET_bp 5 /* AES Software Reset bit position. */ - -#define AES_DECRYPT_bm 0x10 /* Decryption / Direction bit mask. */ -#define AES_DECRYPT_bp 4 /* Decryption / Direction bit position. */ - -#define AES_XOR_bm 0x04 /* State XOR Load Enable bit mask. */ -#define AES_XOR_bp 2 /* State XOR Load Enable bit position. */ - - -/* AES.STATUS bit masks and bit positions */ -#define AES_ERROR_bm 0x80 /* AES Error bit mask. */ -#define AES_ERROR_bp 7 /* AES Error bit position. */ - -#define AES_SRIF_bm 0x01 /* State Ready Interrupt Flag bit mask. */ -#define AES_SRIF_bp 0 /* State Ready Interrupt Flag bit position. */ - - -/* AES.INTCTRL bit masks and bit positions */ -#define AES_INTLVL_gm 0x03 /* Interrupt level group mask. */ -#define AES_INTLVL_gp 0 /* Interrupt level group position. */ -#define AES_INTLVL0_bm (1<<0) /* Interrupt level bit 0 mask. */ -#define AES_INTLVL0_bp 0 /* Interrupt level bit 0 position. */ -#define AES_INTLVL1_bm (1<<1) /* Interrupt level bit 1 mask. */ -#define AES_INTLVL1_bp 1 /* Interrupt level bit 1 position. */ - - - -// Generic Port Pins - -#define PIN0_bm 0x01 -#define PIN0_bp 0 -#define PIN1_bm 0x02 -#define PIN1_bp 1 -#define PIN2_bm 0x04 -#define PIN2_bp 2 -#define PIN3_bm 0x08 -#define PIN3_bp 3 -#define PIN4_bm 0x10 -#define PIN4_bp 4 -#define PIN5_bm 0x20 -#define PIN5_bp 5 -#define PIN6_bm 0x40 -#define PIN6_bp 6 -#define PIN7_bm 0x80 -#define PIN7_bp 7 - - -/* ========== Interrupt Vector Definitions ========== */ -/* Vector 0 is the reset vector */ - -/* OSC interrupt vectors */ -#define OSC_XOSCF_vect_num 1 -#define OSC_XOSCF_vect _VECTOR(1) /* External Oscillator Failure Interrupt (NMI) */ - -/* PORTC interrupt vectors */ -#define PORTC_INT0_vect_num 2 -#define PORTC_INT0_vect _VECTOR(2) /* External Interrupt 0 */ -#define PORTC_INT1_vect_num 3 -#define PORTC_INT1_vect _VECTOR(3) /* External Interrupt 1 */ - -/* PORTR interrupt vectors */ -#define PORTR_INT0_vect_num 4 -#define PORTR_INT0_vect _VECTOR(4) /* External Interrupt 0 */ -#define PORTR_INT1_vect_num 5 -#define PORTR_INT1_vect _VECTOR(5) /* External Interrupt 1 */ - -/* DMA interrupt vectors */ -#define DMA_CH0_vect_num 6 -#define DMA_CH0_vect _VECTOR(6) /* Channel 0 Interrupt */ -#define DMA_CH1_vect_num 7 -#define DMA_CH1_vect _VECTOR(7) /* Channel 1 Interrupt */ -#define DMA_CH2_vect_num 8 -#define DMA_CH2_vect _VECTOR(8) /* Channel 2 Interrupt */ -#define DMA_CH3_vect_num 9 -#define DMA_CH3_vect _VECTOR(9) /* Channel 3 Interrupt */ - -/* RTC interrupt vectors */ -#define RTC_OVF_vect_num 10 -#define RTC_OVF_vect _VECTOR(10) /* Overflow Interrupt */ -#define RTC_COMP_vect_num 11 -#define RTC_COMP_vect _VECTOR(11) /* Compare Interrupt */ - -/* TWIC interrupt vectors */ -#define TWIC_TWIS_vect_num 12 -#define TWIC_TWIS_vect _VECTOR(12) /* TWI Slave Interrupt */ -#define TWIC_TWIM_vect_num 13 -#define TWIC_TWIM_vect _VECTOR(13) /* TWI Master Interrupt */ - -/* TCC0 interrupt vectors */ -#define TCC0_OVF_vect_num 14 -#define TCC0_OVF_vect _VECTOR(14) /* Overflow Interrupt */ -#define TCC0_ERR_vect_num 15 -#define TCC0_ERR_vect _VECTOR(15) /* Error Interrupt */ -#define TCC0_CCA_vect_num 16 -#define TCC0_CCA_vect _VECTOR(16) /* Compare or Capture A Interrupt */ -#define TCC0_CCB_vect_num 17 -#define TCC0_CCB_vect _VECTOR(17) /* Compare or Capture B Interrupt */ -#define TCC0_CCC_vect_num 18 -#define TCC0_CCC_vect _VECTOR(18) /* Compare or Capture C Interrupt */ -#define TCC0_CCD_vect_num 19 -#define TCC0_CCD_vect _VECTOR(19) /* Compare or Capture D Interrupt */ - -/* TCC1 interrupt vectors */ -#define TCC1_OVF_vect_num 20 -#define TCC1_OVF_vect _VECTOR(20) /* Overflow Interrupt */ -#define TCC1_ERR_vect_num 21 -#define TCC1_ERR_vect _VECTOR(21) /* Error Interrupt */ -#define TCC1_CCA_vect_num 22 -#define TCC1_CCA_vect _VECTOR(22) /* Compare or Capture A Interrupt */ -#define TCC1_CCB_vect_num 23 -#define TCC1_CCB_vect _VECTOR(23) /* Compare or Capture B Interrupt */ - -/* SPIC interrupt vectors */ -#define SPIC_INT_vect_num 24 -#define SPIC_INT_vect _VECTOR(24) /* SPI Interrupt */ - -/* USARTC0 interrupt vectors */ -#define USARTC0_RXC_vect_num 25 -#define USARTC0_RXC_vect _VECTOR(25) /* Reception Complete Interrupt */ -#define USARTC0_DRE_vect_num 26 -#define USARTC0_DRE_vect _VECTOR(26) /* Data Register Empty Interrupt */ -#define USARTC0_TXC_vect_num 27 -#define USARTC0_TXC_vect _VECTOR(27) /* Transmission Complete Interrupt */ - -/* USARTC1 interrupt vectors */ -#define USARTC1_RXC_vect_num 28 -#define USARTC1_RXC_vect _VECTOR(28) /* Reception Complete Interrupt */ -#define USARTC1_DRE_vect_num 29 -#define USARTC1_DRE_vect _VECTOR(29) /* Data Register Empty Interrupt */ -#define USARTC1_TXC_vect_num 30 -#define USARTC1_TXC_vect _VECTOR(30) /* Transmission Complete Interrupt */ - -/* AES interrupt vectors */ -#define AES_INT_vect_num 31 -#define AES_INT_vect _VECTOR(31) /* AES Interrupt */ - -/* NVM interrupt vectors */ -#define NVM_EE_vect_num 32 -#define NVM_EE_vect _VECTOR(32) /* EE Interrupt */ -#define NVM_SPM_vect_num 33 -#define NVM_SPM_vect _VECTOR(33) /* SPM Interrupt */ - -/* PORTB interrupt vectors */ -#define PORTB_INT0_vect_num 34 -#define PORTB_INT0_vect _VECTOR(34) /* External Interrupt 0 */ -#define PORTB_INT1_vect_num 35 -#define PORTB_INT1_vect _VECTOR(35) /* External Interrupt 1 */ - -/* ACB interrupt vectors */ -#define ACB_AC0_vect_num 36 -#define ACB_AC0_vect _VECTOR(36) /* AC0 Interrupt */ -#define ACB_AC1_vect_num 37 -#define ACB_AC1_vect _VECTOR(37) /* AC1 Interrupt */ -#define ACB_ACW_vect_num 38 -#define ACB_ACW_vect _VECTOR(38) /* ACW Window Mode Interrupt */ - -/* ADCB interrupt vectors */ -#define ADCB_CH0_vect_num 39 -#define ADCB_CH0_vect _VECTOR(39) /* Interrupt 0 */ -#define ADCB_CH1_vect_num 40 -#define ADCB_CH1_vect _VECTOR(40) /* Interrupt 1 */ -#define ADCB_CH2_vect_num 41 -#define ADCB_CH2_vect _VECTOR(41) /* Interrupt 2 */ -#define ADCB_CH3_vect_num 42 -#define ADCB_CH3_vect _VECTOR(42) /* Interrupt 3 */ - -/* PORTE interrupt vectors */ -#define PORTE_INT0_vect_num 43 -#define PORTE_INT0_vect _VECTOR(43) /* External Interrupt 0 */ -#define PORTE_INT1_vect_num 44 -#define PORTE_INT1_vect _VECTOR(44) /* External Interrupt 1 */ - -/* TWIE interrupt vectors */ -#define TWIE_TWIS_vect_num 45 -#define TWIE_TWIS_vect _VECTOR(45) /* TWI Slave Interrupt */ -#define TWIE_TWIM_vect_num 46 -#define TWIE_TWIM_vect _VECTOR(46) /* TWI Master Interrupt */ - -/* TCE0 interrupt vectors */ -#define TCE0_OVF_vect_num 47 -#define TCE0_OVF_vect _VECTOR(47) /* Overflow Interrupt */ -#define TCE0_ERR_vect_num 48 -#define TCE0_ERR_vect _VECTOR(48) /* Error Interrupt */ -#define TCE0_CCA_vect_num 49 -#define TCE0_CCA_vect _VECTOR(49) /* Compare or Capture A Interrupt */ -#define TCE0_CCB_vect_num 50 -#define TCE0_CCB_vect _VECTOR(50) /* Compare or Capture B Interrupt */ -#define TCE0_CCC_vect_num 51 -#define TCE0_CCC_vect _VECTOR(51) /* Compare or Capture C Interrupt */ -#define TCE0_CCD_vect_num 52 -#define TCE0_CCD_vect _VECTOR(52) /* Compare or Capture D Interrupt */ - -/* TCE1 interrupt vectors */ -#define TCE1_OVF_vect_num 53 -#define TCE1_OVF_vect _VECTOR(53) /* Overflow Interrupt */ -#define TCE1_ERR_vect_num 54 -#define TCE1_ERR_vect _VECTOR(54) /* Error Interrupt */ -#define TCE1_CCA_vect_num 55 -#define TCE1_CCA_vect _VECTOR(55) /* Compare or Capture A Interrupt */ -#define TCE1_CCB_vect_num 56 -#define TCE1_CCB_vect _VECTOR(56) /* Compare or Capture B Interrupt */ - -/* SPIE interrupt vectors */ -#define SPIE_INT_vect_num 57 -#define SPIE_INT_vect _VECTOR(57) /* SPI Interrupt */ - -/* USARTE0 interrupt vectors */ -#define USARTE0_RXC_vect_num 58 -#define USARTE0_RXC_vect _VECTOR(58) /* Reception Complete Interrupt */ -#define USARTE0_DRE_vect_num 59 -#define USARTE0_DRE_vect _VECTOR(59) /* Data Register Empty Interrupt */ -#define USARTE0_TXC_vect_num 60 -#define USARTE0_TXC_vect _VECTOR(60) /* Transmission Complete Interrupt */ - -/* USARTE1 interrupt vectors */ -#define USARTE1_RXC_vect_num 61 -#define USARTE1_RXC_vect _VECTOR(61) /* Reception Complete Interrupt */ -#define USARTE1_DRE_vect_num 62 -#define USARTE1_DRE_vect _VECTOR(62) /* Data Register Empty Interrupt */ -#define USARTE1_TXC_vect_num 63 -#define USARTE1_TXC_vect _VECTOR(63) /* Transmission Complete Interrupt */ - -/* PORTD interrupt vectors */ -#define PORTD_INT0_vect_num 64 -#define PORTD_INT0_vect _VECTOR(64) /* External Interrupt 0 */ -#define PORTD_INT1_vect_num 65 -#define PORTD_INT1_vect _VECTOR(65) /* External Interrupt 1 */ - -/* PORTA interrupt vectors */ -#define PORTA_INT0_vect_num 66 -#define PORTA_INT0_vect _VECTOR(66) /* External Interrupt 0 */ -#define PORTA_INT1_vect_num 67 -#define PORTA_INT1_vect _VECTOR(67) /* External Interrupt 1 */ - -/* ACA interrupt vectors */ -#define ACA_AC0_vect_num 68 -#define ACA_AC0_vect _VECTOR(68) /* AC0 Interrupt */ -#define ACA_AC1_vect_num 69 -#define ACA_AC1_vect _VECTOR(69) /* AC1 Interrupt */ -#define ACA_ACW_vect_num 70 -#define ACA_ACW_vect _VECTOR(70) /* ACW Window Mode Interrupt */ - -/* ADCA interrupt vectors */ -#define ADCA_CH0_vect_num 71 -#define ADCA_CH0_vect _VECTOR(71) /* Interrupt 0 */ -#define ADCA_CH1_vect_num 72 -#define ADCA_CH1_vect _VECTOR(72) /* Interrupt 1 */ -#define ADCA_CH2_vect_num 73 -#define ADCA_CH2_vect _VECTOR(73) /* Interrupt 2 */ -#define ADCA_CH3_vect_num 74 -#define ADCA_CH3_vect _VECTOR(74) /* Interrupt 3 */ - -/* TWID interrupt vectors */ -#define TWID_TWIS_vect_num 75 -#define TWID_TWIS_vect _VECTOR(75) /* TWI Slave Interrupt */ -#define TWID_TWIM_vect_num 76 -#define TWID_TWIM_vect _VECTOR(76) /* TWI Master Interrupt */ - -/* TCD0 interrupt vectors */ -#define TCD0_OVF_vect_num 77 -#define TCD0_OVF_vect _VECTOR(77) /* Overflow Interrupt */ -#define TCD0_ERR_vect_num 78 -#define TCD0_ERR_vect _VECTOR(78) /* Error Interrupt */ -#define TCD0_CCA_vect_num 79 -#define TCD0_CCA_vect _VECTOR(79) /* Compare or Capture A Interrupt */ -#define TCD0_CCB_vect_num 80 -#define TCD0_CCB_vect _VECTOR(80) /* Compare or Capture B Interrupt */ -#define TCD0_CCC_vect_num 81 -#define TCD0_CCC_vect _VECTOR(81) /* Compare or Capture C Interrupt */ -#define TCD0_CCD_vect_num 82 -#define TCD0_CCD_vect _VECTOR(82) /* Compare or Capture D Interrupt */ - -/* TCD1 interrupt vectors */ -#define TCD1_OVF_vect_num 83 -#define TCD1_OVF_vect _VECTOR(83) /* Overflow Interrupt */ -#define TCD1_ERR_vect_num 84 -#define TCD1_ERR_vect _VECTOR(84) /* Error Interrupt */ -#define TCD1_CCA_vect_num 85 -#define TCD1_CCA_vect _VECTOR(85) /* Compare or Capture A Interrupt */ -#define TCD1_CCB_vect_num 86 -#define TCD1_CCB_vect _VECTOR(86) /* Compare or Capture B Interrupt */ - -/* SPID interrupt vectors */ -#define SPID_INT_vect_num 87 -#define SPID_INT_vect _VECTOR(87) /* SPI Interrupt */ - -/* USARTD0 interrupt vectors */ -#define USARTD0_RXC_vect_num 88 -#define USARTD0_RXC_vect _VECTOR(88) /* Reception Complete Interrupt */ -#define USARTD0_DRE_vect_num 89 -#define USARTD0_DRE_vect _VECTOR(89) /* Data Register Empty Interrupt */ -#define USARTD0_TXC_vect_num 90 -#define USARTD0_TXC_vect _VECTOR(90) /* Transmission Complete Interrupt */ - -/* USARTD1 interrupt vectors */ -#define USARTD1_RXC_vect_num 91 -#define USARTD1_RXC_vect _VECTOR(91) /* Reception Complete Interrupt */ -#define USARTD1_DRE_vect_num 92 -#define USARTD1_DRE_vect _VECTOR(92) /* Data Register Empty Interrupt */ -#define USARTD1_TXC_vect_num 93 -#define USARTD1_TXC_vect _VECTOR(93) /* Transmission Complete Interrupt */ - -/* PORTQ interrupt vectors */ -#define PORTQ_INT0_vect_num 94 -#define PORTQ_INT0_vect _VECTOR(94) /* External Interrupt 0 */ -#define PORTQ_INT1_vect_num 95 -#define PORTQ_INT1_vect _VECTOR(95) /* External Interrupt 1 */ - -/* PORTH interrupt vectors */ -#define PORTH_INT0_vect_num 96 -#define PORTH_INT0_vect _VECTOR(96) /* External Interrupt 0 */ -#define PORTH_INT1_vect_num 97 -#define PORTH_INT1_vect _VECTOR(97) /* External Interrupt 1 */ - -/* PORTJ interrupt vectors */ -#define PORTJ_INT0_vect_num 98 -#define PORTJ_INT0_vect _VECTOR(98) /* External Interrupt 0 */ -#define PORTJ_INT1_vect_num 99 -#define PORTJ_INT1_vect _VECTOR(99) /* External Interrupt 1 */ - -/* PORTK interrupt vectors */ -#define PORTK_INT0_vect_num 100 -#define PORTK_INT0_vect _VECTOR(100) /* External Interrupt 0 */ -#define PORTK_INT1_vect_num 101 -#define PORTK_INT1_vect _VECTOR(101) /* External Interrupt 1 */ - -/* PORTF interrupt vectors */ -#define PORTF_INT0_vect_num 104 -#define PORTF_INT0_vect _VECTOR(104) /* External Interrupt 0 */ -#define PORTF_INT1_vect_num 105 -#define PORTF_INT1_vect _VECTOR(105) /* External Interrupt 1 */ - -/* TWIF interrupt vectors */ -#define TWIF_TWIS_vect_num 106 -#define TWIF_TWIS_vect _VECTOR(106) /* TWI Slave Interrupt */ -#define TWIF_TWIM_vect_num 107 -#define TWIF_TWIM_vect _VECTOR(107) /* TWI Master Interrupt */ - -/* TCF0 interrupt vectors */ -#define TCF0_OVF_vect_num 108 -#define TCF0_OVF_vect _VECTOR(108) /* Overflow Interrupt */ -#define TCF0_ERR_vect_num 109 -#define TCF0_ERR_vect _VECTOR(109) /* Error Interrupt */ -#define TCF0_CCA_vect_num 110 -#define TCF0_CCA_vect _VECTOR(110) /* Compare or Capture A Interrupt */ -#define TCF0_CCB_vect_num 111 -#define TCF0_CCB_vect _VECTOR(111) /* Compare or Capture B Interrupt */ -#define TCF0_CCC_vect_num 112 -#define TCF0_CCC_vect _VECTOR(112) /* Compare or Capture C Interrupt */ -#define TCF0_CCD_vect_num 113 -#define TCF0_CCD_vect _VECTOR(113) /* Compare or Capture D Interrupt */ - -/* TCF1 interrupt vectors */ -#define TCF1_OVF_vect_num 114 -#define TCF1_OVF_vect _VECTOR(114) /* Overflow Interrupt */ -#define TCF1_ERR_vect_num 115 -#define TCF1_ERR_vect _VECTOR(115) /* Error Interrupt */ -#define TCF1_CCA_vect_num 116 -#define TCF1_CCA_vect _VECTOR(116) /* Compare or Capture A Interrupt */ -#define TCF1_CCB_vect_num 117 -#define TCF1_CCB_vect _VECTOR(117) /* Compare or Capture B Interrupt */ - -/* SPIF interrupt vectors */ -#define SPIF_INT_vect_num 118 -#define SPIF_INT_vect _VECTOR(118) /* SPI Interrupt */ - -/* USARTF0 interrupt vectors */ -#define USARTF0_RXC_vect_num 119 -#define USARTF0_RXC_vect _VECTOR(119) /* Reception Complete Interrupt */ -#define USARTF0_DRE_vect_num 120 -#define USARTF0_DRE_vect _VECTOR(120) /* Data Register Empty Interrupt */ -#define USARTF0_TXC_vect_num 121 -#define USARTF0_TXC_vect _VECTOR(121) /* Transmission Complete Interrupt */ - -/* USARTF1 interrupt vectors */ -#define USARTF1_RXC_vect_num 122 -#define USARTF1_RXC_vect _VECTOR(122) /* Reception Complete Interrupt */ -#define USARTF1_DRE_vect_num 123 -#define USARTF1_DRE_vect _VECTOR(123) /* Data Register Empty Interrupt */ -#define USARTF1_TXC_vect_num 124 -#define USARTF1_TXC_vect _VECTOR(124) /* Transmission Complete Interrupt */ - - -#define _VECTOR_SIZE 4 /* Size of individual vector. */ -#define _VECTORS_SIZE (125 * _VECTOR_SIZE) - - -/* ========== Constants ========== */ - -#define PROGMEM_START (0x0000) -#define PROGMEM_SIZE (139264) -#define PROGMEM_END (PROGMEM_START + PROGMEM_SIZE - 1) - -#define APP_SECTION_START (0x0000) -#define APP_SECTION_SIZE (131072) -#define APP_SECTION_END (APP_SECTION_START + APP_SECTION_SIZE - 1) - -#define APPTABLE_SECTION_START (0x1E000) -#define APPTABLE_SECTION_SIZE (8192) -#define APPTABLE_SECTION_END (APPTABLE_SECTION_START + APPTABLE_SECTION_SIZE - 1) - -#define BOOT_SECTION_START (0x20000) -#define BOOT_SECTION_SIZE (8192) -#define BOOT_SECTION_END (BOOT_SECTION_START + BOOT_SECTION_SIZE - 1) - -#define DATAMEM_START (0x0000) -#define DATAMEM_SIZE (16777216) -#define DATAMEM_END (DATAMEM_START + DATAMEM_SIZE - 1) - -#define IO_START (0x0000) -#define IO_SIZE (4096) -#define IO_END (IO_START + IO_SIZE - 1) - -#define MAPPED_EEPROM_START (0x1000) -#define MAPPED_EEPROM_SIZE (2048) -#define MAPPED_EEPROM_END (MAPPED_EEPROM_START + MAPPED_EEPROM_SIZE - 1) - -#define INTERNAL_SRAM_START (0x2000) -#define INTERNAL_SRAM_SIZE (8192) -#define INTERNAL_SRAM_END (INTERNAL_SRAM_START + INTERNAL_SRAM_SIZE - 1) - -#define EXTERNAL_SRAM_START (0x4000) -#define EXTERNAL_SRAM_SIZE (16760832) -#define EXTERNAL_SRAM_END (EXTERNAL_SRAM_START + EXTERNAL_SRAM_SIZE - 1) - -#define EEPROM_START (0x0000) -#define EEPROM_SIZE (2048) -#define EEPROM_END (EEPROM_START + EEPROM_SIZE - 1) - -#define FUSE_START (0x0000) -#define FUSE_SIZE (6) -#define FUSE_END (FUSE_START + FUSE_SIZE - 1) - -#define LOCKBIT_START (0x0000) -#define LOCKBIT_SIZE (1) -#define LOCKBIT_END (LOCKBIT_START + LOCKBIT_SIZE - 1) - -#define SIGNATURES_START (0x0000) -#define SIGNATURES_SIZE (3) -#define SIGNATURES_END (SIGNATURES_START + SIGNATURES_SIZE - 1) - -#define USER_SIGNATURES_START (0x0000) -#define USER_SIGNATURES_SIZE (512) -#define USER_SIGNATURES_END (USER_SIGNATURES_START + USER_SIGNATURES_SIZE - 1) - -#define PROD_SIGNATURES_START (0x0000) -#define PROD_SIGNATURES_SIZE (52) -#define PROD_SIGNATURES_END (PROD_SIGNATURES_START + PROD_SIGNATURES_SIZE - 1) - -#define FLASHEND PROGMEM_END -#define SPM_PAGESIZE PROGMEM_PAGE_SIZE -#define RAMSTART INTERNAL_SRAM_START -#define RAMSIZE INTERNAL_SRAM_SIZE -#define RAMEND INTERNAL_SRAM_END -#define XRAMSTART EXTERNAL_SRAM_START -#define XRAMSIZE EXTERNAL_SRAM_SIZE -#define XRAMEND EXTERNAL_SRAM_END -#define E2END EEPROM_END -#define E2PAGESIZE EEPROM_PAGE_SIZE - - -/* ========== Fuses ========== */ -#define FUSE_MEMORY_SIZE 6 - -/* Fuse Byte 0 */ -#define FUSE_JTAGUSERID0 ~_BV(0) /* JTAG User ID Bit 0 */ -#define FUSE_JTAGUSERID1 ~_BV(1) /* JTAG User ID Bit 1 */ -#define FUSE_JTAGUSERID2 ~_BV(2) /* JTAG User ID Bit 2 */ -#define FUSE_JTAGUSERID3 ~_BV(3) /* JTAG User ID Bit 3 */ -#define FUSE_JTAGUSERID4 ~_BV(4) /* JTAG User ID Bit 4 */ -#define FUSE_JTAGUSERID5 ~_BV(5) /* JTAG User ID Bit 5 */ -#define FUSE_JTAGUSERID6 ~_BV(6) /* JTAG User ID Bit 6 */ -#define FUSE_JTAGUSERID7 ~_BV(7) /* JTAG User ID Bit 7 */ -#define FUSE0_DEFAULT (0xFF) - -/* Fuse Byte 1 */ -#define FUSE_WDP0 ~_BV(0) /* Watchdog Timeout Period Bit 0 */ -#define FUSE_WDP1 ~_BV(1) /* Watchdog Timeout Period Bit 1 */ -#define FUSE_WDP2 ~_BV(2) /* Watchdog Timeout Period Bit 2 */ -#define FUSE_WDP3 ~_BV(3) /* Watchdog Timeout Period Bit 3 */ -#define FUSE_WDWP0 ~_BV(4) /* Watchdog Window Timeout Period Bit 0 */ -#define FUSE_WDWP1 ~_BV(5) /* Watchdog Window Timeout Period Bit 1 */ -#define FUSE_WDWP2 ~_BV(6) /* Watchdog Window Timeout Period Bit 2 */ -#define FUSE_WDWP3 ~_BV(7) /* Watchdog Window Timeout Period Bit 3 */ -#define FUSE1_DEFAULT (0xFF) - -/* Fuse Byte 2 */ -#define FUSE_BODPD0 ~_BV(0) /* BOD Operation in Power-Down Mode Bit 0 */ -#define FUSE_BODPD1 ~_BV(1) /* BOD Operation in Power-Down Mode Bit 1 */ -#define FUSE_BODACT0 ~_BV(2) /* BOD Operation in Active Mode Bit 0 */ -#define FUSE_BODACT1 ~_BV(3) /* BOD Operation in Active Mode Bit 1 */ -#define FUSE_BOOTRST ~_BV(6) /* Boot Loader Section Reset Vector */ -#define FUSE_DVSDON ~_BV(7) /* Spike Detector Enable */ -#define FUSE2_DEFAULT (0xFF) - -/* Fuse Byte 3 Reserved */ - -/* Fuse Byte 4 */ -#define FUSE_JTAGEN ~_BV(0) /* JTAG Interface Enable */ -#define FUSE_WDLOCK ~_BV(1) /* Watchdog Timer Lock */ -#define FUSE_SUT0 ~_BV(2) /* Start-up Time Bit 0 */ -#define FUSE_SUT1 ~_BV(3) /* Start-up Time Bit 1 */ -#define FUSE4_DEFAULT (0xFF) - -/* Fuse Byte 5 */ -#define FUSE_BODLVL0 ~_BV(0) /* Brown Out Detection Voltage Level Bit 0 */ -#define FUSE_BODLVL1 ~_BV(1) /* Brown Out Detection Voltage Level Bit 1 */ -#define FUSE_BODLVL2 ~_BV(2) /* Brown Out Detection Voltage Level Bit 2 */ -#define FUSE_EESAVE ~_BV(3) /* Preserve EEPROM Through Chip Erase */ -#define FUSE5_DEFAULT (0xFF) - - -/* ========== Lock Bits ========== */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_APPLICATION_TABLE_BITS_EXIST -#define __BOOT_LOCK_APPLICATION_BITS_EXIST -#define __BOOT_LOCK_BOOT_BITS_EXIST - - -/* ========== Signature ========== */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x97 -#define SIGNATURE_2 0x4C - - -#endif /* _AVR_ATxmega128A1_H_ */ - diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iox128a3.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iox128a3.h deleted file mode 100644 index 5c5f59b80..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iox128a3.h +++ /dev/null @@ -1,6852 +0,0 @@ -/* Copyright (c) 2008 Atmel Corporation - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iox128a3.h,v 1.1.2.4 2008/11/03 04:13:15 arcanum Exp $ */ - -/* avr/iox128a3.h - definitions for ATxmega128A3 */ - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iox128a3.h" -#else -# error "Attempt to include more than one file." -#endif - - -#ifndef _AVR_ATxmega128A3_H_ -#define _AVR_ATxmega128A3_H_ 1 - - -/* Ungrouped common registers */ -#define GPIO0 _SFR_MEM8(0x0000) /* General Purpose IO Register 0 */ -#define GPIO1 _SFR_MEM8(0x0001) /* General Purpose IO Register 1 */ -#define GPIO2 _SFR_MEM8(0x0002) /* General Purpose IO Register 2 */ -#define GPIO3 _SFR_MEM8(0x0003) /* General Purpose IO Register 3 */ -#define GPIO4 _SFR_MEM8(0x0004) /* General Purpose IO Register 4 */ -#define GPIO5 _SFR_MEM8(0x0005) /* General Purpose IO Register 5 */ -#define GPIO6 _SFR_MEM8(0x0006) /* General Purpose IO Register 6 */ -#define GPIO7 _SFR_MEM8(0x0007) /* General Purpose IO Register 7 */ -#define GPIO8 _SFR_MEM8(0x0008) /* General Purpose IO Register 8 */ -#define GPIO9 _SFR_MEM8(0x0009) /* General Purpose IO Register 9 */ -#define GPIOA _SFR_MEM8(0x000A) /* General Purpose IO Register 10 */ -#define GPIOB _SFR_MEM8(0x000B) /* General Purpose IO Register 11 */ -#define GPIOC _SFR_MEM8(0x000C) /* General Purpose IO Register 12 */ -#define GPIOD _SFR_MEM8(0x000D) /* General Purpose IO Register 13 */ -#define GPIOE _SFR_MEM8(0x000E) /* General Purpose IO Register 14 */ -#define GPIOF _SFR_MEM8(0x000F) /* General Purpose IO Register 15 */ - -#define CCP _SFR_MEM8(0x0034) /* Configuration Change Protection */ -#define RAMPD _SFR_MEM8(0x0038) /* Ramp D */ -#define RAMPX _SFR_MEM8(0x0039) /* Ramp X */ -#define RAMPY _SFR_MEM8(0x003A) /* Ramp Y */ -#define RAMPZ _SFR_MEM8(0x003B) /* Ramp Z */ -#define EIND _SFR_MEM8(0x003C) /* Extended Indirect Jump */ -#define SPL _SFR_MEM8(0x003D) /* Stack Pointer Low */ -#define SPH _SFR_MEM8(0x003E) /* Stack Pointer High */ -#define SREG _SFR_MEM8(0x003F) /* Status Register */ - - -/* C Language Only */ -#if !defined (__ASSEMBLER__) - -#include - -typedef volatile uint8_t register8_t; -typedef volatile uint16_t register16_t; -typedef volatile uint32_t register32_t; - - -#ifdef _WORDREGISTER -#undef _WORDREGISTER -#endif -#define _WORDREGISTER(regname) \ - union \ - { \ - register16_t regname; \ - struct \ - { \ - register8_t regname ## L; \ - register8_t regname ## H; \ - }; \ - } - -#ifdef _DWORDREGISTER -#undef _DWORDREGISTER -#endif -#define _DWORDREGISTER(regname) \ - union \ - { \ - register32_t regname; \ - struct \ - { \ - register8_t regname ## 0; \ - register8_t regname ## 1; \ - register8_t regname ## 2; \ - register8_t regname ## 3; \ - }; \ - } - - -/* -========================================================================== -IO Module Structures -========================================================================== -*/ - - -/* --------------------------------------------------------------------------- -XOCD - On-Chip Debug System --------------------------------------------------------------------------- -*/ - -/* On-Chip Debug System */ -typedef struct OCD_struct -{ - register8_t OCDR0; /* OCD Register 0 */ - register8_t OCDR1; /* OCD Register 1 */ -} OCD_t; - - -/* CCP signatures */ -typedef enum CCP_enum -{ - CCP_SPM_gc = (0x9D<<0), /* SPM Instruction Protection */ - CCP_IOREG_gc = (0xD8<<0), /* IO Register Protection */ -} CCP_t; - - -/* --------------------------------------------------------------------------- -CLK - Clock System --------------------------------------------------------------------------- -*/ - -/* Clock System */ -typedef struct CLK_struct -{ - register8_t CTRL; /* Control Register */ - register8_t PSCTRL; /* Prescaler Control Register */ - register8_t LOCK; /* Lock register */ - register8_t RTCCTRL; /* RTC Control Register */ -} CLK_t; - -/* --------------------------------------------------------------------------- -CLK - Clock System --------------------------------------------------------------------------- -*/ - -/* Power Reduction */ -typedef struct PR_struct -{ - register8_t PR; /* General Power Reduction */ - register8_t PRPA; /* Power Reduction Port A */ - register8_t PRPB; /* Power Reduction Port B */ - register8_t PRPC; /* Power Reduction Port C */ - register8_t PRPD; /* Power Reduction Port D */ - register8_t PRPE; /* Power Reduction Port E */ - register8_t PRPF; /* Power Reduction Port F */ -} PR_t; - -/* System Clock Selection */ -typedef enum CLK_SCLKSEL_enum -{ - CLK_SCLKSEL_RC2M_gc = (0x00<<0), /* Internal 2MHz RC Oscillator */ - CLK_SCLKSEL_RC32M_gc = (0x01<<0), /* Internal 32MHz RC Oscillator */ - CLK_SCLKSEL_RC32K_gc = (0x02<<0), /* Internal 32kHz RC Oscillator */ - CLK_SCLKSEL_XOSC_gc = (0x03<<0), /* External Crystal Oscillator or Clock */ - CLK_SCLKSEL_PLL_gc = (0x04<<0), /* Phase Locked Loop */ -} CLK_SCLKSEL_t; - -/* Prescaler A Division Factor */ -typedef enum CLK_PSADIV_enum -{ - CLK_PSADIV_1_gc = (0x00<<2), /* Divide by 1 */ - CLK_PSADIV_2_gc = (0x01<<2), /* Divide by 2 */ - CLK_PSADIV_4_gc = (0x03<<2), /* Divide by 4 */ - CLK_PSADIV_8_gc = (0x05<<2), /* Divide by 8 */ - CLK_PSADIV_16_gc = (0x07<<2), /* Divide by 16 */ - CLK_PSADIV_32_gc = (0x09<<2), /* Divide by 32 */ - CLK_PSADIV_64_gc = (0x0B<<2), /* Divide by 64 */ - CLK_PSADIV_128_gc = (0x0D<<2), /* Divide by 128 */ - CLK_PSADIV_256_gc = (0x0F<<2), /* Divide by 256 */ - CLK_PSADIV_512_gc = (0x11<<2), /* Divide by 512 */ -} CLK_PSADIV_t; - -/* Prescaler B and C Division Factor */ -typedef enum CLK_PSBCDIV_enum -{ - CLK_PSBCDIV_1_1_gc = (0x00<<0), /* Divide B by 1 and C by 1 */ - CLK_PSBCDIV_1_2_gc = (0x01<<0), /* Divide B by 1 and C by 2 */ - CLK_PSBCDIV_4_1_gc = (0x02<<0), /* Divide B by 4 and C by 1 */ - CLK_PSBCDIV_2_2_gc = (0x03<<0), /* Divide B by 2 and C by 2 */ -} CLK_PSBCDIV_t; - -/* RTC Clock Source */ -typedef enum CLK_RTCSRC_enum -{ - CLK_RTCSRC_ULP_gc = (0x00<<1), /* 1kHz from internal 32kHz ULP */ - CLK_RTCSRC_TOSC_gc = (0x01<<1), /* 1kHz from 32kHz crystal oscillator on TOSC */ - CLK_RTCSRC_RCOSC_gc = (0x02<<1), /* 1kHz from internal 32kHz RC oscillator */ - CLK_RTCSRC_TOSC32_gc = (0x05<<1), /* 32kHz from 32kHz crystal oscillator on TOSC */ -} CLK_RTCSRC_t; - - -/* --------------------------------------------------------------------------- -SLEEP - Sleep Controller --------------------------------------------------------------------------- -*/ - -/* Sleep Controller */ -typedef struct SLEEP_struct -{ - register8_t CTRL; /* Control Register */ -} SLEEP_t; - -/* Sleep Mode */ -typedef enum SLEEP_SMODE_enum -{ - SLEEP_SMODE_IDLE_gc = (0x00<<1), /* Idle mode */ - SLEEP_SMODE_PDOWN_gc = (0x02<<1), /* Power-down Mode */ - SLEEP_SMODE_PSAVE_gc = (0x03<<1), /* Power-save Mode */ - SLEEP_SMODE_STDBY_gc = (0x06<<1), /* Standby Mode */ - SLEEP_SMODE_ESTDBY_gc = (0x07<<1), /* Extended Standby Mode */ -} SLEEP_SMODE_t; - - -/* --------------------------------------------------------------------------- -OSC - Oscillator --------------------------------------------------------------------------- -*/ - -/* Oscillator */ -typedef struct OSC_struct -{ - register8_t CTRL; /* Control Register */ - register8_t STATUS; /* Status Register */ - register8_t XOSCCTRL; /* External Oscillator Control Register */ - register8_t XOSCFAIL; /* External Oscillator Failure Detection Register */ - register8_t RC32KCAL; /* 32kHz Internal Oscillator Calibration Register */ - register8_t PLLCTRL; /* PLL Control REgister */ - register8_t DFLLCTRL; /* DFLL Control Register */ -} OSC_t; - -/* Oscillator Frequency Range */ -typedef enum OSC_FRQRANGE_enum -{ - OSC_FRQRANGE_04TO2_gc = (0x00<<6), /* 0.4 - 2 MHz */ - OSC_FRQRANGE_2TO9_gc = (0x01<<6), /* 2 - 9 MHz */ - OSC_FRQRANGE_9TO12_gc = (0x02<<6), /* 9 - 12 MHz */ - OSC_FRQRANGE_12TO16_gc = (0x03<<6), /* 12 - 16 MHz */ -} OSC_FRQRANGE_t; - -/* External Oscillator Selection and Startup Time */ -typedef enum OSC_XOSCSEL_enum -{ - OSC_XOSCSEL_EXTCLK_gc = (0x00<<0), /* External Clock - 6 CLK */ - OSC_XOSCSEL_32KHz_gc = (0x02<<0), /* 32kHz TOSC - 32K CLK */ - OSC_XOSCSEL_XTAL_256CLK_gc = (0x03<<0), /* 0.4-16MHz XTAL - 256 CLK */ - OSC_XOSCSEL_XTAL_1KCLK_gc = (0x07<<0), /* 0.4-16MHz XTAL - 1K CLK */ - OSC_XOSCSEL_XTAL_16KCLK_gc = (0x0B<<0), /* 0.4-16MHz XTAL - 16K CLK */ -} OSC_XOSCSEL_t; - -/* PLL Clock Source */ -typedef enum OSC_PLLSRC_enum -{ - OSC_PLLSRC_RC2M_gc = (0x00<<6), /* Internal 2MHz RC Oscillator */ - OSC_PLLSRC_RC32M_gc = (0x02<<6), /* Internal 32MHz RC Oscillator */ - OSC_PLLSRC_XOSC_gc = (0x03<<6), /* External Oscillator */ -} OSC_PLLSRC_t; - - -/* --------------------------------------------------------------------------- -DFLL - DFLL --------------------------------------------------------------------------- -*/ - -/* DFLL */ -typedef struct DFLL_struct -{ - register8_t CTRL; /* Control Register */ - register8_t reserved_0x01; - register8_t CALA; /* Calibration Register A */ - register8_t CALB; /* Calibration Register B */ - register8_t OSCCNT0; /* Oscillator Counter Register 0 */ - register8_t OSCCNT1; /* Oscillator Counter Register 1 */ - register8_t OSCCNT2; /* Oscillator Counter Register 2 */ - register8_t reserved_0x07; -} DFLL_t; - - -/* --------------------------------------------------------------------------- -RST - Reset --------------------------------------------------------------------------- -*/ - -/* Reset */ -typedef struct RST_struct -{ - register8_t STATUS; /* Status Register */ - register8_t CTRL; /* Control Register */ -} RST_t; - - -/* --------------------------------------------------------------------------- -WDT - Watch-Dog Timer --------------------------------------------------------------------------- -*/ - -/* Watch-Dog Timer */ -typedef struct WDT_struct -{ - register8_t CTRL; /* Control */ - register8_t WINCTRL; /* Windowed Mode Control */ - register8_t STATUS; /* Status */ -} WDT_t; - -/* Period setting */ -typedef enum WDT_PER_enum -{ - WDT_PER_8CLK_gc = (0x00<<2), /* 8 cycles (8ms @ 3.3V) */ - WDT_PER_16CLK_gc = (0x01<<2), /* 16 cycles (16ms @ 3.3V) */ - WDT_PER_32CLK_gc = (0x02<<2), /* 32 cycles (32ms @ 3.3V) */ - WDT_PER_64CLK_gc = (0x03<<2), /* 64 cycles (64ms @ 3.3V) */ - WDT_PER_128CLK_gc = (0x04<<2), /* 128 cycles (0.125s @ 3.3V) */ - WDT_PER_256CLK_gc = (0x05<<2), /* 256 cycles (0.25s @ 3.3V) */ - WDT_PER_512CLK_gc = (0x06<<2), /* 512 cycles (0.5s @ 3.3V) */ - WDT_PER_1KCLK_gc = (0x07<<2), /* 1K cycles (1s @ 3.3V) */ - WDT_PER_2KCLK_gc = (0x08<<2), /* 2K cycles (2s @ 3.3V) */ - WDT_PER_4KCLK_gc = (0x09<<2), /* 4K cycles (4s @ 3.3V) */ - WDT_PER_8KCLK_gc = (0x0A<<2), /* 8K cycles (8s @ 3.3V) */ -} WDT_PER_t; - -/* Closed window period */ -typedef enum WDT_WPER_enum -{ - WDT_WPER_8CLK_gc = (0x00<<2), /* 8 cycles (8ms @ 3.3V) */ - WDT_WPER_16CLK_gc = (0x01<<2), /* 16 cycles (16ms @ 3.3V) */ - WDT_WPER_32CLK_gc = (0x02<<2), /* 32 cycles (32ms @ 3.3V) */ - WDT_WPER_64CLK_gc = (0x03<<2), /* 64 cycles (64ms @ 3.3V) */ - WDT_WPER_128CLK_gc = (0x04<<2), /* 128 cycles (0.125s @ 3.3V) */ - WDT_WPER_256CLK_gc = (0x05<<2), /* 256 cycles (0.25s @ 3.3V) */ - WDT_WPER_512CLK_gc = (0x06<<2), /* 512 cycles (0.5s @ 3.3V) */ - WDT_WPER_1KCLK_gc = (0x07<<2), /* 1K cycles (1s @ 3.3V) */ - WDT_WPER_2KCLK_gc = (0x08<<2), /* 2K cycles (2s @ 3.3V) */ - WDT_WPER_4KCLK_gc = (0x09<<2), /* 4K cycles (4s @ 3.3V) */ - WDT_WPER_8KCLK_gc = (0x0A<<2), /* 8K cycles (8s @ 3.3V) */ -} WDT_WPER_t; - - -/* --------------------------------------------------------------------------- -MCU - MCU Control --------------------------------------------------------------------------- -*/ - -/* MCU Control */ -typedef struct MCU_struct -{ - register8_t DEVID0; /* Device ID byte 0 */ - register8_t DEVID1; /* Device ID byte 1 */ - register8_t DEVID2; /* Device ID byte 2 */ - register8_t REVID; /* Revision ID */ - register8_t JTAGUID; /* JTAG User ID */ - register8_t reserved_0x05; - register8_t MCUCR; /* MCU Control */ - register8_t reserved_0x07; - register8_t EVSYSLOCK; /* Event System Lock */ - register8_t AWEXLOCK; /* AWEX Lock */ - register8_t reserved_0x0A; - register8_t reserved_0x0B; -} MCU_t; - - -/* --------------------------------------------------------------------------- -PMIC - Programmable Multi-level Interrupt Controller --------------------------------------------------------------------------- -*/ - -/* Programmable Multi-level Interrupt Controller */ -typedef struct PMIC_struct -{ - register8_t STATUS; /* Status Register */ - register8_t INTPRI; /* Interrupt Priority */ - register8_t CTRL; /* Control Register */ -} PMIC_t; - - -/* --------------------------------------------------------------------------- -DMA - DMA Controller --------------------------------------------------------------------------- -*/ - -/* DMA Channel */ -typedef struct DMA_CH_struct -{ - register8_t CTRLA; /* Channel Control */ - register8_t CTRLB; /* Channel Control */ - register8_t ADDRCTRL; /* Address Control */ - register8_t TRIGSRC; /* Channel Trigger Source */ - _WORDREGISTER(TRFCNT); /* Channel Block Transfer Count */ - register8_t REPCNT; /* Channel Repeat Count */ - register8_t reserved_0x07; - register8_t SRCADDR0; /* Channel Source Address 0 */ - register8_t SRCADDR1; /* Channel Source Address 1 */ - register8_t SRCADDR2; /* Channel Source Address 2 */ - register8_t reserved_0x0B; - register8_t DESTADDR0; /* Channel Destination Address 0 */ - register8_t DESTADDR1; /* Channel Destination Address 1 */ - register8_t DESTADDR2; /* Channel Destination Address 2 */ - register8_t reserved_0x0F; -} DMA_CH_t; - -/* --------------------------------------------------------------------------- -DMA - DMA Controller --------------------------------------------------------------------------- -*/ - -/* DMA Controller */ -typedef struct DMA_struct -{ - register8_t CTRL; /* Control */ - register8_t reserved_0x01; - register8_t reserved_0x02; - register8_t INTFLAGS; /* Transfer Interrupt Status */ - register8_t STATUS; /* Status */ - register8_t reserved_0x05; - _WORDREGISTER(TEMP); /* Temporary Register For 16/24-bit Access */ - register8_t reserved_0x08; - register8_t reserved_0x09; - register8_t reserved_0x0A; - register8_t reserved_0x0B; - register8_t reserved_0x0C; - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t reserved_0x0F; - DMA_CH_t CH0; /* DMA Channel 0 */ - DMA_CH_t CH1; /* DMA Channel 1 */ - DMA_CH_t CH2; /* DMA Channel 2 */ - DMA_CH_t CH3; /* DMA Channel 3 */ -} DMA_t; - -/* Burst mode */ -typedef enum DMA_CH_BURSTLEN_enum -{ - DMA_CH_BURSTLEN_1BYTE_gc = (0x00<<0), /* 1-byte burst mode */ - DMA_CH_BURSTLEN_2BYTE_gc = (0x01<<0), /* 2-byte burst mode */ - DMA_CH_BURSTLEN_4BYTE_gc = (0x02<<0), /* 4-byte burst mode */ - DMA_CH_BURSTLEN_8BYTE_gc = (0x03<<0), /* 8-byte burst mode */ -} DMA_CH_BURSTLEN_t; - -/* Source address reload mode */ -typedef enum DMA_CH_SRCRELOAD_enum -{ - DMA_CH_SRCRELOAD_NONE_gc = (0x00<<6), /* No reload */ - DMA_CH_SRCRELOAD_BLOCK_gc = (0x01<<6), /* Reload at end of block */ - DMA_CH_SRCRELOAD_BURST_gc = (0x02<<6), /* Reload at end of burst */ - DMA_CH_SRCRELOAD_TRANSACTION_gc = (0x03<<6), /* Reload at end of transaction */ -} DMA_CH_SRCRELOAD_t; - -/* Source addressing mode */ -typedef enum DMA_CH_SRCDIR_enum -{ - DMA_CH_SRCDIR_FIXED_gc = (0x00<<4), /* Fixed */ - DMA_CH_SRCDIR_INC_gc = (0x01<<4), /* Increment */ - DMA_CH_SRCDIR_DEC_gc = (0x02<<4), /* Decrement */ -} DMA_CH_SRCDIR_t; - -/* Destination adress reload mode */ -typedef enum DMA_CH_DESTRELOAD_enum -{ - DMA_CH_DESTRELOAD_NONE_gc = (0x00<<2), /* No reload */ - DMA_CH_DESTRELOAD_BLOCK_gc = (0x01<<2), /* Reload at end of block */ - DMA_CH_DESTRELOAD_BURST_gc = (0x02<<2), /* Reload at end of burst */ - DMA_CH_DESTRELOAD_TRANSACTION_gc = (0x03<<2), /* Reload at end of transaction */ -} DMA_CH_DESTRELOAD_t; - -/* Destination adressing mode */ -typedef enum DMA_CH_DESTDIR_enum -{ - DMA_CH_DESTDIR_FIXED_gc = (0x00<<0), /* Fixed */ - DMA_CH_DESTDIR_INC_gc = (0x01<<0), /* Increment */ - DMA_CH_DESTDIR_DEC_gc = (0x02<<0), /* Decrement */ -} DMA_CH_DESTDIR_t; - -/* Transfer trigger source */ -typedef enum DMA_CH_TRIGSRC_enum -{ - DMA_CH_TRIGSRC_OFF_gc = (0x00<<0), /* Off software triggers only */ - DMA_CH_TRIGSRC_EVSYS_CH0_gc = (0x01<<0), /* Event System Channel 0 */ - DMA_CH_TRIGSRC_EVSYS_CH1_gc = (0x02<<0), /* Event System Channel 1 */ - DMA_CH_TRIGSRC_EVSYS_CH2_gc = (0x03<<0), /* Event System Channel 2 */ - DMA_CH_TRIGSRC_ADCA_CH0_gc = (0x10<<0), /* ADCA Channel 0 */ - DMA_CH_TRIGSRC_ADCA_CH1_gc = (0x11<<0), /* ADCA Channel 1 */ - DMA_CH_TRIGSRC_ADCA_CH2_gc = (0x12<<0), /* ADCA Channel 2 */ - DMA_CH_TRIGSRC_ADCA_CH3_gc = (0x13<<0), /* ADCA Channel 3 */ - DMA_CH_TRIGSRC_ADCA_CH4_gc = (0x14<<0), /* ADCA Channel 0,1,2,3 combined */ - DMA_CH_TRIGSRC_DACA_CH0_gc = (0x15<<0), /* DACA Channel 0 */ - DMA_CH_TRIGSRC_DACA_CH1_gc = (0x16<<0), /* DACA Channel 1 */ - DMA_CH_TRIGSRC_ADCB_CH0_gc = (0x20<<0), /* ADCB Channel 0 */ - DMA_CH_TRIGSRC_ADCB_CH1_gc = (0x21<<0), /* ADCB Channel 1 */ - DMA_CH_TRIGSRC_ADCB_CH2_gc = (0x22<<0), /* ADCB Channel 2 */ - DMA_CH_TRIGSRC_ADCB_CH3_gc = (0x23<<0), /* ADCB Channel 3 */ - DMA_CH_TRIGSRC_ADCB_CH4_gc = (0x24<<0), /* ADCB Channel 0,1,2,3 combined */ - DMA_CH_TRIGSRC_DACB_CH0_gc = (0x25<<0), /* DACB Channel 0 */ - DMA_CH_TRIGSRC_DACB_CH1_gc = (0x26<<0), /* DACB Channel 1 */ - DMA_CH_TRIGSRC_TCC0_OVF_gc = (0x40<<0), /* Timer/Counter C0 Overflow */ - DMA_CH_TRIGSRC_TCC0_ERR_gc = (0x41<<0), /* Timer/Counter C0 Error */ - DMA_CH_TRIGSRC_TCC0_CCA_gc = (0x42<<0), /* Timer/Counter C0 Compare or Capture A */ - DMA_CH_TRIGSRC_TCC0_CCB_gc = (0x43<<0), /* Timer/Counter C0 Compare or Capture B */ - DMA_CH_TRIGSRC_TCC0_CCC_gc = (0x44<<0), /* Timer/Counter C0 Compare or Capture C */ - DMA_CH_TRIGSRC_TCC0_CCD_gc = (0x45<<0), /* Timer/Counter C0 Compare or Capture D */ - DMA_CH_TRIGSRC_TCC1_OVF_gc = (0x46<<0), /* Timer/Counter C1 Overflow */ - DMA_CH_TRIGSRC_TCC1_ERR_gc = (0x47<<0), /* Timer/Counter C1 Error */ - DMA_CH_TRIGSRC_TCC1_CCA_gc = (0x48<<0), /* Timer/Counter C1 Compare or Capture A */ - DMA_CH_TRIGSRC_TCC1_CCB_gc = (0x49<<0), /* Timer/Counter C1 Compare or Capture B */ - DMA_CH_TRIGSRC_SPIC_gc = (0x4A<<0), /* SPI C Transfer Complete */ - DMA_CH_TRIGSRC_USARTC0_RXC_gc = (0x4B<<0), /* USART C0 Receive Complete */ - DMA_CH_TRIGSRC_USARTC0_DRE_gc = (0x4C<<0), /* USART C0 Data Register Empty */ - DMA_CH_TRIGSRC_USARTC1_RXC_gc = (0x4E<<0), /* USART C1 Receive Complete */ - DMA_CH_TRIGSRC_USARTC1_DRE_gc = (0x4F<<0), /* USART C1 Data Register Empty */ - DMA_CH_TRIGSRC_TCD0_OVF_gc = (0x60<<0), /* Timer/Counter D0 Overflow */ - DMA_CH_TRIGSRC_TCD0_ERR_gc = (0x61<<0), /* Timer/Counter D0 Error */ - DMA_CH_TRIGSRC_TCD0_CCA_gc = (0x62<<0), /* Timer/Counter D0 Compare or Capture A */ - DMA_CH_TRIGSRC_TCD0_CCB_gc = (0x63<<0), /* Timer/Counter D0 Compare or Capture B */ - DMA_CH_TRIGSRC_TCD0_CCC_gc = (0x64<<0), /* Timer/Counter D0 Compare or Capture C */ - DMA_CH_TRIGSRC_TCD0_CCD_gc = (0x65<<0), /* Timer/Counter D0 Compare or Capture D */ - DMA_CH_TRIGSRC_TCD1_OVF_gc = (0x66<<0), /* Timer/Counter D1 Overflow */ - DMA_CH_TRIGSRC_TCD1_ERR_gc = (0x67<<0), /* Timer/Counter D1 Error */ - DMA_CH_TRIGSRC_TCD1_CCA_gc = (0x68<<0), /* Timer/Counter D1 Compare or Capture A */ - DMA_CH_TRIGSRC_TCD1_CCB_gc = (0x69<<0), /* Timer/Counter D1 Compare or Capture B */ - DMA_CH_TRIGSRC_SPID_gc = (0x6A<<0), /* SPI D Transfer Complete */ - DMA_CH_TRIGSRC_USARTD0_RXC_gc = (0x6B<<0), /* USART D0 Receive Complete */ - DMA_CH_TRIGSRC_USARTD0_DRE_gc = (0x6C<<0), /* USART D0 Data Register Empty */ - DMA_CH_TRIGSRC_USARTD1_RXC_gc = (0x6E<<0), /* USART D1 Receive Complete */ - DMA_CH_TRIGSRC_USARTD1_DRE_gc = (0x6F<<0), /* USART D1 Data Register Empty */ - DMA_CH_TRIGSRC_TCE0_OVF_gc = (0x80<<0), /* Timer/Counter E0 Overflow */ - DMA_CH_TRIGSRC_TCE0_ERR_gc = (0x81<<0), /* Timer/Counter E0 Error */ - DMA_CH_TRIGSRC_TCE0_CCA_gc = (0x82<<0), /* Timer/Counter E0 Compare or Capture A */ - DMA_CH_TRIGSRC_TCE0_CCB_gc = (0x83<<0), /* Timer/Counter E0 Compare or Capture B */ - DMA_CH_TRIGSRC_TCE0_CCC_gc = (0x84<<0), /* Timer/Counter E0 Compare or Capture C */ - DMA_CH_TRIGSRC_TCE0_CCD_gc = (0x85<<0), /* Timer/Counter E0 Compare or Capture D */ - DMA_CH_TRIGSRC_TCE1_OVF_gc = (0x86<<0), /* Timer/Counter E1 Overflow */ - DMA_CH_TRIGSRC_TCE1_ERR_gc = (0x87<<0), /* Timer/Counter E1 Error */ - DMA_CH_TRIGSRC_TCE1_CCA_gc = (0x88<<0), /* Timer/Counter E1 Compare or Capture A */ - DMA_CH_TRIGSRC_TCE1_CCB_gc = (0x89<<0), /* Timer/Counter E1 Compare or Capture B */ - DMA_CH_TRIGSRC_SPIE_gc = (0x8A<<0), /* SPI E Transfer Complete */ - DMA_CH_TRIGSRC_USARTE0_RXC_gc = (0x8B<<0), /* USART E0 Receive Complete */ - DMA_CH_TRIGSRC_USARTE0_DRE_gc = (0x8C<<0), /* USART E0 Data Register Empty */ - DMA_CH_TRIGSRC_USARTE1_RXC_gc = (0x8E<<0), /* USART E1 Receive Complete */ - DMA_CH_TRIGSRC_USARTE1_DRE_gc = (0x8F<<0), /* USART E1 Data Register Empty */ - DMA_CH_TRIGSRC_TCF0_OVF_gc = (0xA0<<0), /* Timer/Counter F0 Overflow */ - DMA_CH_TRIGSRC_TCF0_ERR_gc = (0xA1<<0), /* Timer/Counter F0 Error */ - DMA_CH_TRIGSRC_TCF0_CCA_gc = (0xA2<<0), /* Timer/Counter F0 Compare or Capture A */ - DMA_CH_TRIGSRC_TCF0_CCB_gc = (0xA3<<0), /* Timer/Counter F0 Compare or Capture B */ - DMA_CH_TRIGSRC_TCF0_CCC_gc = (0xA4<<0), /* Timer/Counter F0 Compare or Capture C */ - DMA_CH_TRIGSRC_TCF0_CCD_gc = (0xA5<<0), /* Timer/Counter F0 Compare or Capture D */ - DMA_CH_TRIGSRC_TCF1_OVF_gc = (0xA6<<0), /* Timer/Counter F1 Overflow */ - DMA_CH_TRIGSRC_TCF1_ERR_gc = (0xA7<<0), /* Timer/Counter F1 Error */ - DMA_CH_TRIGSRC_TCF1_CCA_gc = (0xA8<<0), /* Timer/Counter F1 Compare or Capture A */ - DMA_CH_TRIGSRC_TCF1_CCB_gc = (0xA9<<0), /* Timer/Counter F1 Compare or Capture B */ - DMA_CH_TRIGSRC_SPIF_gc = (0xAA<<0), /* SPI F Transfer Complete */ - DMA_CH_TRIGSRC_USARTF0_RXC_gc = (0xAB<<0), /* USART F0 Receive Complete */ - DMA_CH_TRIGSRC_USARTF0_DRE_gc = (0xAC<<0), /* USART F0 Data Register Empty */ - DMA_CH_TRIGSRC_USARTF1_RXC_gc = (0xAE<<0), /* USART F1 Receive Complete */ - DMA_CH_TRIGSRC_USARTF1_DRE_gc = (0xAF<<0), /* USART F1 Data Register Empty */ -} DMA_CH_TRIGSRC_t; - -/* Double buffering mode */ -typedef enum DMA_DBUFMODE_enum -{ - DMA_DBUFMODE_DISABLED_gc = (0x00<<2), /* Double buffering disabled */ - DMA_DBUFMODE_CH01_gc = (0x01<<2), /* Double buffering enabled on channel 0/1 */ - DMA_DBUFMODE_CH23_gc = (0x02<<2), /* Double buffering enabled on channel 2/3 */ - DMA_DBUFMODE_CH01CH23_gc = (0x03<<2), /* Double buffering enabled on ch. 0/1 and ch. 2/3 */ -} DMA_DBUFMODE_t; - -/* Priority mode */ -typedef enum DMA_PRIMODE_enum -{ - DMA_PRIMODE_RR0123_gc = (0x00<<0), /* Round Robin */ - DMA_PRIMODE_CH0RR123_gc = (0x01<<0), /* Channel 0 > Round Robin on channel 1/2/3 */ - DMA_PRIMODE_CH01RR23_gc = (0x02<<0), /* Channel 0 > channel 1 > Round Robin on channel 2/3 */ - DMA_PRIMODE_CH0123_gc = (0x03<<0), /* Channel 0 > channel 1 > channel 2 > channel 3 */ -} DMA_PRIMODE_t; - -/* Interrupt level */ -typedef enum DMA_CH_ERRINTLVL_enum -{ - DMA_CH_ERRINTLVL_OFF_gc = (0x00<<2), /* Interrupt disabled */ - DMA_CH_ERRINTLVL_LO_gc = (0x01<<2), /* Low level */ - DMA_CH_ERRINTLVL_MED_gc = (0x02<<2), /* Medium level */ - DMA_CH_ERRINTLVL_HI_gc = (0x03<<2), /* High level */ -} DMA_CH_ERRINTLVL_t; - -/* Interrupt level */ -typedef enum DMA_CH_TRNINTLVL_enum -{ - DMA_CH_TRNINTLVL_OFF_gc = (0x00<<0), /* Interrupt disabled */ - DMA_CH_TRNINTLVL_LO_gc = (0x01<<0), /* Low level */ - DMA_CH_TRNINTLVL_MED_gc = (0x02<<0), /* Medium level */ - DMA_CH_TRNINTLVL_HI_gc = (0x03<<0), /* High level */ -} DMA_CH_TRNINTLVL_t; - - -/* --------------------------------------------------------------------------- -EVSYS - Event System --------------------------------------------------------------------------- -*/ - -/* Event System */ -typedef struct EVSYS_struct -{ - register8_t CH0MUX; /* Event Channel 0 Multiplexer */ - register8_t CH1MUX; /* Event Channel 1 Multiplexer */ - register8_t CH2MUX; /* Event Channel 2 Multiplexer */ - register8_t CH3MUX; /* Event Channel 3 Multiplexer */ - register8_t CH4MUX; /* Event Channel 4 Multiplexer */ - register8_t CH5MUX; /* Event Channel 5 Multiplexer */ - register8_t CH6MUX; /* Event Channel 6 Multiplexer */ - register8_t CH7MUX; /* Event Channel 7 Multiplexer */ - register8_t CH0CTRL; /* Channel 0 Control Register */ - register8_t CH1CTRL; /* Channel 1 Control Register */ - register8_t CH2CTRL; /* Channel 2 Control Register */ - register8_t CH3CTRL; /* Channel 3 Control Register */ - register8_t CH4CTRL; /* Channel 4 Control Register */ - register8_t CH5CTRL; /* Channel 5 Control Register */ - register8_t CH6CTRL; /* Channel 6 Control Register */ - register8_t CH7CTRL; /* Channel 7 Control Register */ - register8_t STROBE; /* Event Strobe */ - register8_t DATA; /* Event Data */ -} EVSYS_t; - -/* Quadrature Decoder Index Recognition Mode */ -typedef enum EVSYS_QDIRM_enum -{ - EVSYS_QDIRM_00_gc = (0x00<<5), /* QDPH0 = 0, QDPH90 = 0 */ - EVSYS_QDIRM_01_gc = (0x01<<5), /* QDPH0 = 0, QDPH90 = 1 */ - EVSYS_QDIRM_10_gc = (0x02<<5), /* QDPH0 = 1, QDPH90 = 0 */ - EVSYS_QDIRM_11_gc = (0x03<<5), /* QDPH0 = 1, QDPH90 = 1 */ -} EVSYS_QDIRM_t; - -/* Digital filter coefficient */ -typedef enum EVSYS_DIGFILT_enum -{ - EVSYS_DIGFILT_1SAMPLE_gc = (0x00<<0), /* 1 SAMPLE */ - EVSYS_DIGFILT_2SAMPLES_gc = (0x01<<0), /* 2 SAMPLES */ - EVSYS_DIGFILT_3SAMPLES_gc = (0x02<<0), /* 3 SAMPLES */ - EVSYS_DIGFILT_4SAMPLES_gc = (0x03<<0), /* 4 SAMPLES */ - EVSYS_DIGFILT_5SAMPLES_gc = (0x04<<0), /* 5 SAMPLES */ - EVSYS_DIGFILT_6SAMPLES_gc = (0x05<<0), /* 6 SAMPLES */ - EVSYS_DIGFILT_7SAMPLES_gc = (0x06<<0), /* 7 SAMPLES */ - EVSYS_DIGFILT_8SAMPLES_gc = (0x07<<0), /* 8 SAMPLES */ -} EVSYS_DIGFILT_t; - -/* Event Channel multiplexer input selection */ -typedef enum EVSYS_CHMUX_enum -{ - EVSYS_CHMUX_OFF_gc = (0x00<<0), /* Off */ - EVSYS_CHMUX_RTC_OVF_gc = (0x08<<0), /* RTC Overflow */ - EVSYS_CHMUX_RTC_CMP_gc = (0x09<<0), /* RTC Compare Match */ - EVSYS_CHMUX_ACA_CH0_gc = (0x10<<0), /* Analog Comparator A Channel 0 */ - EVSYS_CHMUX_ACA_CH1_gc = (0x11<<0), /* Analog Comparator A Channel 1 */ - EVSYS_CHMUX_ACA_WIN_gc = (0x12<<0), /* Analog Comparator A Window */ - EVSYS_CHMUX_ACB_CH0_gc = (0x13<<0), /* Analog Comparator B Channel 0 */ - EVSYS_CHMUX_ACB_CH1_gc = (0x14<<0), /* Analog Comparator B Channel 1 */ - EVSYS_CHMUX_ACB_WIN_gc = (0x15<<0), /* Analog Comparator B Window */ - EVSYS_CHMUX_ADCA_CH0_gc = (0x20<<0), /* ADC A Channel 0 */ - EVSYS_CHMUX_ADCA_CH1_gc = (0x21<<0), /* ADC A Channel 1 */ - EVSYS_CHMUX_ADCA_CH2_gc = (0x22<<0), /* ADC A Channel 2 */ - EVSYS_CHMUX_ADCA_CH3_gc = (0x23<<0), /* ADC A Channel 3 */ - EVSYS_CHMUX_ADCB_CH0_gc = (0x24<<0), /* ADC B Channel 0 */ - EVSYS_CHMUX_ADCB_CH1_gc = (0x25<<0), /* ADC B Channel 1 */ - EVSYS_CHMUX_ADCB_CH2_gc = (0x26<<0), /* ADC B Channel 2 */ - EVSYS_CHMUX_ADCB_CH3_gc = (0x27<<0), /* ADC B Channel 3 */ - EVSYS_CHMUX_PORTA_PIN0_gc = (0x50<<0), /* Port A, Pin0 */ - EVSYS_CHMUX_PORTA_PIN1_gc = (0x51<<0), /* Port A, Pin1 */ - EVSYS_CHMUX_PORTA_PIN2_gc = (0x52<<0), /* Port A, Pin2 */ - EVSYS_CHMUX_PORTA_PIN3_gc = (0x53<<0), /* Port A, Pin3 */ - EVSYS_CHMUX_PORTA_PIN4_gc = (0x54<<0), /* Port A, Pin4 */ - EVSYS_CHMUX_PORTA_PIN5_gc = (0x55<<0), /* Port A, Pin5 */ - EVSYS_CHMUX_PORTA_PIN6_gc = (0x56<<0), /* Port A, Pin6 */ - EVSYS_CHMUX_PORTA_PIN7_gc = (0x57<<0), /* Port A, Pin7 */ - EVSYS_CHMUX_PORTB_PIN0_gc = (0x58<<0), /* Port B, Pin0 */ - EVSYS_CHMUX_PORTB_PIN1_gc = (0x59<<0), /* Port B, Pin1 */ - EVSYS_CHMUX_PORTB_PIN2_gc = (0x5A<<0), /* Port B, Pin2 */ - EVSYS_CHMUX_PORTB_PIN3_gc = (0x5B<<0), /* Port B, Pin3 */ - EVSYS_CHMUX_PORTB_PIN4_gc = (0x5C<<0), /* Port B, Pin4 */ - EVSYS_CHMUX_PORTB_PIN5_gc = (0x5D<<0), /* Port B, Pin5 */ - EVSYS_CHMUX_PORTB_PIN6_gc = (0x5E<<0), /* Port B, Pin6 */ - EVSYS_CHMUX_PORTB_PIN7_gc = (0x5F<<0), /* Port B, Pin7 */ - EVSYS_CHMUX_PORTC_PIN0_gc = (0x60<<0), /* Port C, Pin0 */ - EVSYS_CHMUX_PORTC_PIN1_gc = (0x61<<0), /* Port C, Pin1 */ - EVSYS_CHMUX_PORTC_PIN2_gc = (0x62<<0), /* Port C, Pin2 */ - EVSYS_CHMUX_PORTC_PIN3_gc = (0x63<<0), /* Port C, Pin3 */ - EVSYS_CHMUX_PORTC_PIN4_gc = (0x64<<0), /* Port C, Pin4 */ - EVSYS_CHMUX_PORTC_PIN5_gc = (0x65<<0), /* Port C, Pin5 */ - EVSYS_CHMUX_PORTC_PIN6_gc = (0x66<<0), /* Port C, Pin6 */ - EVSYS_CHMUX_PORTC_PIN7_gc = (0x67<<0), /* Port C, Pin7 */ - EVSYS_CHMUX_PORTD_PIN0_gc = (0x68<<0), /* Port D, Pin0 */ - EVSYS_CHMUX_PORTD_PIN1_gc = (0x69<<0), /* Port D, Pin1 */ - EVSYS_CHMUX_PORTD_PIN2_gc = (0x6A<<0), /* Port D, Pin2 */ - EVSYS_CHMUX_PORTD_PIN3_gc = (0x6B<<0), /* Port D, Pin3 */ - EVSYS_CHMUX_PORTD_PIN4_gc = (0x6C<<0), /* Port D, Pin4 */ - EVSYS_CHMUX_PORTD_PIN5_gc = (0x6D<<0), /* Port D, Pin5 */ - EVSYS_CHMUX_PORTD_PIN6_gc = (0x6E<<0), /* Port D, Pin6 */ - EVSYS_CHMUX_PORTD_PIN7_gc = (0x6F<<0), /* Port D, Pin7 */ - EVSYS_CHMUX_PORTE_PIN0_gc = (0x70<<0), /* Port E, Pin0 */ - EVSYS_CHMUX_PORTE_PIN1_gc = (0x71<<0), /* Port E, Pin1 */ - EVSYS_CHMUX_PORTE_PIN2_gc = (0x72<<0), /* Port E, Pin2 */ - EVSYS_CHMUX_PORTE_PIN3_gc = (0x73<<0), /* Port E, Pin3 */ - EVSYS_CHMUX_PORTE_PIN4_gc = (0x74<<0), /* Port E, Pin4 */ - EVSYS_CHMUX_PORTE_PIN5_gc = (0x75<<0), /* Port E, Pin5 */ - EVSYS_CHMUX_PORTE_PIN6_gc = (0x76<<0), /* Port E, Pin6 */ - EVSYS_CHMUX_PORTE_PIN7_gc = (0x77<<0), /* Port E, Pin7 */ - EVSYS_CHMUX_PORTF_PIN0_gc = (0x78<<0), /* Port F, Pin0 */ - EVSYS_CHMUX_PORTF_PIN1_gc = (0x79<<0), /* Port F, Pin1 */ - EVSYS_CHMUX_PORTF_PIN2_gc = (0x7A<<0), /* Port F, Pin2 */ - EVSYS_CHMUX_PORTF_PIN3_gc = (0x7B<<0), /* Port F, Pin3 */ - EVSYS_CHMUX_PORTF_PIN4_gc = (0x7C<<0), /* Port F, Pin4 */ - EVSYS_CHMUX_PORTF_PIN5_gc = (0x7D<<0), /* Port F, Pin5 */ - EVSYS_CHMUX_PORTF_PIN6_gc = (0x7E<<0), /* Port F, Pin6 */ - EVSYS_CHMUX_PORTF_PIN7_gc = (0x7F<<0), /* Port F, Pin7 */ - EVSYS_CHMUX_PRESCALER_1_gc = (0x80<<0), /* Prescaler, divide by 1 */ - EVSYS_CHMUX_PRESCALER_2_gc = (0x81<<0), /* Prescaler, divide by 2 */ - EVSYS_CHMUX_PRESCALER_4_gc = (0x82<<0), /* Prescaler, divide by 4 */ - EVSYS_CHMUX_PRESCALER_8_gc = (0x83<<0), /* Prescaler, divide by 8 */ - EVSYS_CHMUX_PRESCALER_16_gc = (0x84<<0), /* Prescaler, divide by 16 */ - EVSYS_CHMUX_PRESCALER_32_gc = (0x85<<0), /* Prescaler, divide by 32 */ - EVSYS_CHMUX_PRESCALER_64_gc = (0x86<<0), /* Prescaler, divide by 64 */ - EVSYS_CHMUX_PRESCALER_128_gc = (0x87<<0), /* Prescaler, divide by 128 */ - EVSYS_CHMUX_PRESCALER_256_gc = (0x88<<0), /* Prescaler, divide by 256 */ - EVSYS_CHMUX_PRESCALER_512_gc = (0x89<<0), /* Prescaler, divide by 512 */ - EVSYS_CHMUX_PRESCALER_1024_gc = (0x8A<<0), /* Prescaler, divide by 1024 */ - EVSYS_CHMUX_PRESCALER_2048_gc = (0x8B<<0), /* Prescaler, divide by 2048 */ - EVSYS_CHMUX_PRESCALER_4096_gc = (0x8C<<0), /* Prescaler, divide by 4096 */ - EVSYS_CHMUX_PRESCALER_8192_gc = (0x8D<<0), /* Prescaler, divide by 8192 */ - EVSYS_CHMUX_PRESCALER_16384_gc = (0x8E<<0), /* Prescaler, divide by 16384 */ - EVSYS_CHMUX_PRESCALER_32768_gc = (0x8F<<0), /* Prescaler, divide by 32768 */ - EVSYS_CHMUX_TCC0_OVF_gc = (0xC0<<0), /* Timer/Counter C0 Overflow */ - EVSYS_CHMUX_TCC0_ERR_gc = (0xC1<<0), /* Timer/Counter C0 Error */ - EVSYS_CHMUX_TCC0_CCA_gc = (0xC4<<0), /* Timer/Counter C0 Compare or Capture A */ - EVSYS_CHMUX_TCC0_CCB_gc = (0xC5<<0), /* Timer/Counter C0 Compare or Capture B */ - EVSYS_CHMUX_TCC0_CCC_gc = (0xC6<<0), /* Timer/Counter C0 Compare or Capture C */ - EVSYS_CHMUX_TCC0_CCD_gc = (0xC7<<0), /* Timer/Counter C0 Compare or Capture D */ - EVSYS_CHMUX_TCC1_OVF_gc = (0xC8<<0), /* Timer/Counter C1 Overflow */ - EVSYS_CHMUX_TCC1_ERR_gc = (0xC9<<0), /* Timer/Counter C1 Error */ - EVSYS_CHMUX_TCC1_CCA_gc = (0xCC<<0), /* Timer/Counter C1 Compare or Capture A */ - EVSYS_CHMUX_TCC1_CCB_gc = (0xCD<<0), /* Timer/Counter C1 Compare or Capture B */ - EVSYS_CHMUX_TCD0_OVF_gc = (0xD0<<0), /* Timer/Counter D0 Overflow */ - EVSYS_CHMUX_TCD0_ERR_gc = (0xD1<<0), /* Timer/Counter D0 Error */ - EVSYS_CHMUX_TCD0_CCA_gc = (0xD4<<0), /* Timer/Counter D0 Compare or Capture A */ - EVSYS_CHMUX_TCD0_CCB_gc = (0xD5<<0), /* Timer/Counter D0 Compare or Capture B */ - EVSYS_CHMUX_TCD0_CCC_gc = (0xD6<<0), /* Timer/Counter D0 Compare or Capture C */ - EVSYS_CHMUX_TCD0_CCD_gc = (0xD7<<0), /* Timer/Counter D0 Compare or Capture D */ - EVSYS_CHMUX_TCD1_OVF_gc = (0xD8<<0), /* Timer/Counter D1 Overflow */ - EVSYS_CHMUX_TCD1_ERR_gc = (0xD9<<0), /* Timer/Counter D1 Error */ - EVSYS_CHMUX_TCD1_CCA_gc = (0xDC<<0), /* Timer/Counter D1 Compare or Capture A */ - EVSYS_CHMUX_TCD1_CCB_gc = (0xDD<<0), /* Timer/Counter D1 Compare or Capture B */ - EVSYS_CHMUX_TCE0_OVF_gc = (0xE0<<0), /* Timer/Counter E0 Overflow */ - EVSYS_CHMUX_TCE0_ERR_gc = (0xE1<<0), /* Timer/Counter E0 Error */ - EVSYS_CHMUX_TCE0_CCA_gc = (0xE4<<0), /* Timer/Counter E0 Compare or Capture A */ - EVSYS_CHMUX_TCE0_CCB_gc = (0xE5<<0), /* Timer/Counter E0 Compare or Capture B */ - EVSYS_CHMUX_TCE0_CCC_gc = (0xE6<<0), /* Timer/Counter E0 Compare or Capture C */ - EVSYS_CHMUX_TCE0_CCD_gc = (0xE7<<0), /* Timer/Counter E0 Compare or Capture D */ - EVSYS_CHMUX_TCE1_OVF_gc = (0xE8<<0), /* Timer/Counter E1 Overflow */ - EVSYS_CHMUX_TCE1_ERR_gc = (0xE9<<0), /* Timer/Counter E1 Error */ - EVSYS_CHMUX_TCE1_CCA_gc = (0xEC<<0), /* Timer/Counter E1 Compare or Capture A */ - EVSYS_CHMUX_TCE1_CCB_gc = (0xED<<0), /* Timer/Counter E1 Compare or Capture B */ - EVSYS_CHMUX_TCF0_OVF_gc = (0xF0<<0), /* Timer/Counter F0 Overflow */ - EVSYS_CHMUX_TCF0_ERR_gc = (0xF1<<0), /* Timer/Counter F0 Error */ - EVSYS_CHMUX_TCF0_CCA_gc = (0xF4<<0), /* Timer/Counter F0 Compare or Capture A */ - EVSYS_CHMUX_TCF0_CCB_gc = (0xF5<<0), /* Timer/Counter F0 Compare or Capture B */ - EVSYS_CHMUX_TCF0_CCC_gc = (0xF6<<0), /* Timer/Counter F0 Compare or Capture C */ - EVSYS_CHMUX_TCF0_CCD_gc = (0xF7<<0), /* Timer/Counter F0 Compare or Capture D */ - EVSYS_CHMUX_TCF1_OVF_gc = (0xF8<<0), /* Timer/Counter F1 Overflow */ - EVSYS_CHMUX_TCF1_ERR_gc = (0xF9<<0), /* Timer/Counter F1 Error */ - EVSYS_CHMUX_TCF1_CCA_gc = (0xFC<<0), /* Timer/Counter F1 Compare or Capture A */ - EVSYS_CHMUX_TCF1_CCB_gc = (0xFD<<0), /* Timer/Counter F1 Compare or Capture B */ -} EVSYS_CHMUX_t; - - -/* --------------------------------------------------------------------------- -NVM - Non Volatile Memory Controller --------------------------------------------------------------------------- -*/ - -/* Non-volatile Memory Controller */ -typedef struct NVM_struct -{ - register8_t ADDR0; /* Address Register 0 */ - register8_t ADDR1; /* Address Register 1 */ - register8_t ADDR2; /* Address Register 2 */ - register8_t reserved_0x03; - register8_t DATA0; /* Data Register 0 */ - register8_t DATA1; /* Data Register 1 */ - register8_t DATA2; /* Data Register 2 */ - register8_t reserved_0x07; - register8_t reserved_0x08; - register8_t reserved_0x09; - register8_t CMD; /* Command */ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t INTCTRL; /* Interrupt Control */ - register8_t reserved_0x0E; - register8_t STATUS; /* Status */ - register8_t LOCKBITS; /* Lock Bits */ -} NVM_t; - -/* --------------------------------------------------------------------------- -NVM - Non Volatile Memory Controller --------------------------------------------------------------------------- -*/ - -/* Lock Bits */ -typedef struct NVM_LOCKBITS_struct -{ - register8_t LOCKBITS; /* Lock Bits */ -} NVM_LOCKBITS_t; - -/* --------------------------------------------------------------------------- -NVM - Non Volatile Memory Controller --------------------------------------------------------------------------- -*/ - -/* Fuses */ -typedef struct NVM_FUSES_struct -{ - register8_t FUSEBYTE0; /* JTAG User ID */ - register8_t FUSEBYTE1; /* Watchdog Configuration */ - register8_t FUSEBYTE2; /* Reset Configuration */ - register8_t reserved_0x03; - register8_t FUSEBYTE4; /* Start-up Configuration */ - register8_t FUSEBYTE5; /* EESAVE and BOD Level */ -} NVM_FUSES_t; - -/* --------------------------------------------------------------------------- -NVM - Non Volatile Memory Controller --------------------------------------------------------------------------- -*/ - -/* Production Signatures */ -typedef struct NVM_PROD_SIGNATURES_struct -{ - register8_t RCOSC2M; /* RCOSC 2MHz Calibration Value */ - register8_t reserved_0x01; - register8_t RCOSC32K; /* RCOSC 32kHz Calibration Value */ - register8_t RCOSC32M; /* RCOSC 32MHz Calibration Value */ - register8_t reserved_0x04; - register8_t reserved_0x05; - register8_t reserved_0x06; - register8_t reserved_0x07; - register8_t LOTNUM0; /* Lot Number Byte 0, ASCII */ - register8_t LOTNUM1; /* Lot Number Byte 1, ASCII */ - register8_t LOTNUM2; /* Lot Number Byte 2, ASCII */ - register8_t LOTNUM3; /* Lot Number Byte 3, ASCII */ - register8_t LOTNUM4; /* Lot Number Byte 4, ASCII */ - register8_t LOTNUM5; /* Lot Number Byte 5, ASCII */ - register8_t reserved_0x0E; - register8_t reserved_0x0F; - register8_t WAFNUM; /* Wafer Number */ - register8_t reserved_0x11; - register8_t COORDX0; /* Wafer Coordinate X Byte 0 */ - register8_t COORDX1; /* Wafer Coordinate X Byte 1 */ - register8_t COORDY0; /* Wafer Coordinate Y Byte 0 */ - register8_t COORDY1; /* Wafer Coordinate Y Byte 1 */ - register8_t reserved_0x16; - register8_t reserved_0x17; - register8_t reserved_0x18; - register8_t reserved_0x19; - register8_t reserved_0x1A; - register8_t reserved_0x1B; - register8_t reserved_0x1C; - register8_t reserved_0x1D; - register8_t reserved_0x1E; - register8_t reserved_0x1F; - register8_t ADCACAL0; /* ADCA Calibration Byte 0 */ - register8_t ADCACAL1; /* ADCA Calibration Byte 1 */ - register8_t reserved_0x22; - register8_t reserved_0x23; - register8_t ADCBCAL0; /* ADCB Calibration Byte 0 */ - register8_t ADCBCAL1; /* ADCB Calibration Byte 1 */ - register8_t reserved_0x26; - register8_t reserved_0x27; - register8_t reserved_0x28; - register8_t reserved_0x29; - register8_t reserved_0x2A; - register8_t reserved_0x2B; - register8_t reserved_0x2C; - register8_t reserved_0x2D; - register8_t TEMPSENSE0; /* Temperature Sensor Calibration Byte 0 */ - register8_t TEMPSENSE1; /* Temperature Sensor Calibration Byte 0 */ - register8_t DACAOFFCAL; /* DACA Calibration Byte 0 */ - register8_t DACACAINCAL; /* DACA Calibration Byte 1 */ - register8_t DACBOFFCAL; /* DACB Calibration Byte 0 */ - register8_t DACBGAINCAL; /* DACB Calibration Byte 1 */ - register8_t reserved_0x34; - register8_t reserved_0x35; - register8_t reserved_0x36; - register8_t reserved_0x37; - register8_t reserved_0x38; - register8_t reserved_0x39; - register8_t reserved_0x3A; - register8_t reserved_0x3B; - register8_t reserved_0x3C; - register8_t reserved_0x3D; - register8_t reserved_0x3E; -} NVM_PROD_SIGNATURES_t; - -/* NVM Command */ -typedef enum NVM_CMD_enum -{ - NVM_CMD_NO_OPERATION_gc = (0x00<<0), /* Noop/Ordinary LPM */ - NVM_CMD_READ_CALIB_ROW_gc = (0x02<<0), /* Read calibration row */ - NVM_CMD_READ_USER_SIG_ROW_gc = (0x01<<0), /* Read user signature row */ - NVM_CMD_READ_EEPROM_gc = (0x06<<0), /* Read EEPROM */ - NVM_CMD_READ_FUSES_gc = (0x07<<0), /* Read fuse byte */ - NVM_CMD_WRITE_LOCK_BITS_gc = (0x08<<0), /* Write lock bits */ - NVM_CMD_ERASE_USER_SIG_ROW_gc = (0x18<<0), /* Erase user signature row */ - NVM_CMD_WRITE_USER_SIG_ROW_gc = (0x1A<<0), /* Write user signature row */ - NVM_CMD_ERASE_APP_gc = (0x20<<0), /* Erase Application Section */ - NVM_CMD_ERASE_APP_PAGE_gc = (0x22<<0), /* Erase Application Section page */ - NVM_CMD_LOAD_FLASH_BUFFER_gc = (0x23<<0), /* Load Flash page buffer */ - NVM_CMD_WRITE_APP_PAGE_gc = (0x24<<0), /* Write Application Section page */ - NVM_CMD_ERASE_WRITE_APP_PAGE_gc = (0x25<<0), /* Erase-and-write Application Section page */ - NVM_CMD_ERASE_FLASH_BUFFER_gc = (0x26<<0), /* Erase/flush Flash page buffer */ - NVM_CMD_ERASE_BOOT_PAGE_gc = (0x2A<<0), /* Erase Boot Section page */ - NVM_CMD_WRITE_BOOT_PAGE_gc = (0x2C<<0), /* Write Boot Section page */ - NVM_CMD_ERASE_WRITE_BOOT_PAGE_gc = (0x2D<<0), /* Erase-and-write Boot Section page */ - NVM_CMD_ERASE_EEPROM_gc = (0x30<<0), /* Erase EEPROM */ - NVM_CMD_ERASE_EEPROM_PAGE_gc = (0x32<<0), /* Erase EEPROM page */ - NVM_CMD_LOAD_EEPROM_BUFFER_gc = (0x33<<0), /* Load EEPROM page buffer */ - NVM_CMD_WRITE_EEPROM_PAGE_gc = (0x34<<0), /* Write EEPROM page */ - NVM_CMD_ERASE_WRITE_EEPROM_PAGE_gc = (0x35<<0), /* Erase-and-write EEPROM page */ - NVM_CMD_ERASE_EEPROM_BUFFER_gc = (0x36<<0), /* Erase/flush EEPROM page buffer */ - NVM_CMD_APP_CRC_gc = (0x38<<0), /* Generate Application section CRC */ - NVM_CMD_BOOT_CRC_gc = (0x39<<0), /* Generate Boot Section CRC */ - NVM_CMD_FLASH_RANGE_CRC_gc = (0x3A<<0), /* Generate Flash Range CRC */ -} NVM_CMD_t; - -/* SPM ready interrupt level */ -typedef enum NVM_SPMLVL_enum -{ - NVM_SPMLVL_OFF_gc = (0x00<<2), /* Interrupt disabled */ - NVM_SPMLVL_LO_gc = (0x01<<2), /* Low level */ - NVM_SPMLVL_MED_gc = (0x02<<2), /* Medium level */ - NVM_SPMLVL_HI_gc = (0x03<<2), /* High level */ -} NVM_SPMLVL_t; - -/* EEPROM ready interrupt level */ -typedef enum NVM_EELVL_enum -{ - NVM_EELVL_OFF_gc = (0x00<<0), /* Interrupt disabled */ - NVM_EELVL_LO_gc = (0x01<<0), /* Low level */ - NVM_EELVL_MED_gc = (0x02<<0), /* Medium level */ - NVM_EELVL_HI_gc = (0x03<<0), /* High level */ -} NVM_EELVL_t; - -/* Boot lock bits - boot setcion */ -typedef enum NVM_BLBB_enum -{ - NVM_BLBB_NOLOCK_gc = (0x03<<6), /* No locks */ - NVM_BLBB_WLOCK_gc = (0x02<<6), /* Write not allowed */ - NVM_BLBB_RLOCK_gc = (0x01<<6), /* Read not allowed */ - NVM_BLBB_RWLOCK_gc = (0x00<<6), /* Read and write not allowed */ -} NVM_BLBB_t; - -/* Boot lock bits - application section */ -typedef enum NVM_BLBA_enum -{ - NVM_BLBA_NOLOCK_gc = (0x03<<4), /* No locks */ - NVM_BLBA_WLOCK_gc = (0x02<<4), /* Write not allowed */ - NVM_BLBA_RLOCK_gc = (0x01<<4), /* Read not allowed */ - NVM_BLBA_RWLOCK_gc = (0x00<<4), /* Read and write not allowed */ -} NVM_BLBA_t; - -/* Boot lock bits - application table section */ -typedef enum NVM_BLBAT_enum -{ - NVM_BLBAT_NOLOCK_gc = (0x03<<2), /* No locks */ - NVM_BLBAT_WLOCK_gc = (0x02<<2), /* Write not allowed */ - NVM_BLBAT_RLOCK_gc = (0x01<<2), /* Read not allowed */ - NVM_BLBAT_RWLOCK_gc = (0x00<<2), /* Read and write not allowed */ -} NVM_BLBAT_t; - -/* Lock bits */ -typedef enum NVM_LB_enum -{ - NVM_LB_NOLOCK_gc = (0x03<<0), /* No locks */ - NVM_LB_WLOCK_gc = (0x02<<0), /* Write not allowed */ - NVM_LB_RWLOCK_gc = (0x00<<0), /* Read and write not allowed */ -} NVM_LB_t; - -/* Boot Loader Section Reset Vector */ -typedef enum BOOTRST_enum -{ - BOOTRST_BOOTLDR_gc = (0x00<<6), /* Boot Loader Reset */ - BOOTRST_APPLICATION_gc = (0x01<<6), /* Application Reset */ -} BOOTRST_t; - -/* BOD operation */ -typedef enum BOD_enum -{ - BOD_INSAMPLEDMODE_gc = (0x01<<2), /* BOD enabled in sampled mode */ - BOD_CONTINOUSLY_gc = (0x02<<2), /* BOD enabled continuously */ - BOD_DISABLED_gc = (0x03<<2), /* BOD Disabled */ -} BOD_t; - -/* Watchdog (Window) Timeout Period */ -typedef enum WD_enum -{ - WD_8CLK_gc = (0x00<<4), /* 8 cycles (8ms @ 3.3V) */ - WD_16CLK_gc = (0x01<<4), /* 16 cycles (16ms @ 3.3V) */ - WD_32CLK_gc = (0x02<<4), /* 32 cycles (32ms @ 3.3V) */ - WD_64CLK_gc = (0x03<<4), /* 64 cycles (64ms @ 3.3V) */ - WD_128CLK_gc = (0x04<<4), /* 128 cycles (0.125s @ 3.3V) */ - WD_256CLK_gc = (0x05<<4), /* 256 cycles (0.25s @ 3.3V) */ - WD_512CLK_gc = (0x06<<4), /* 512 cycles (0.5s @ 3.3V) */ - WD_1KCLK_gc = (0x07<<4), /* 1K cycles (1s @ 3.3V) */ - WD_2KCLK_gc = (0x08<<4), /* 2K cycles (2s @ 3.3V) */ - WD_4KCLK_gc = (0x09<<4), /* 4K cycles (4s @ 3.3V) */ - WD_8KCLK_gc = (0x0A<<4), /* 8K cycles (8s @ 3.3V) */ -} WD_t; - -/* Start-up Time */ -typedef enum SUT_enum -{ - SUT_0MS_gc = (0x03<<2), /* 0 ms */ - SUT_4MS_gc = (0x01<<2), /* 4 ms */ - SUT_64MS_gc = (0x00<<2), /* 64 ms */ -} SUT_t; - -/* Brown Out Detection Voltage Level */ -typedef enum BODLVL_enum -{ - BODLVL_1V6_gc = (0x07<<0), /* 1.6 V */ - BODLVL_1V8_gc = (0x06<<0), /* 1.8 V */ - BODLVL_2V0_gc = (0x05<<0), /* 2.0 V */ - BODLVL_2V2_gc = (0x04<<0), /* 2.2 V */ - BODLVL_2V4_gc = (0x03<<0), /* 2.4 V */ - BODLVL_2V7_gc = (0x02<<0), /* 2.7 V */ - BODLVL_2V9_gc = (0x01<<0), /* 2.9 V */ - BODLVL_3V2_gc = (0x00<<0), /* 3.2 V */ -} BODLVL_t; - - -/* --------------------------------------------------------------------------- -AC - Analog Comparator --------------------------------------------------------------------------- -*/ - -/* Analog Comparator */ -typedef struct AC_struct -{ - register8_t AC0CTRL; /* Comparator 0 Control */ - register8_t AC1CTRL; /* Comparator 1 Control */ - register8_t AC0MUXCTRL; /* Comparator 0 MUX Control */ - register8_t AC1MUXCTRL; /* Comparator 1 MUX Control */ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t WINCTRL; /* Window Mode Control */ - register8_t STATUS; /* Status */ -} AC_t; - -/* Interrupt mode */ -typedef enum AC_INTMODE_enum -{ - AC_INTMODE_BOTHEDGES_gc = (0x00<<6), /* Interrupt on both edges */ - AC_INTMODE_FALLING_gc = (0x02<<6), /* Interrupt on falling edge */ - AC_INTMODE_RISING_gc = (0x03<<6), /* Interrupt on rising edge */ -} AC_INTMODE_t; - -/* Interrupt level */ -typedef enum AC_INTLVL_enum -{ - AC_INTLVL_OFF_gc = (0x00<<4), /* Interrupt disabled */ - AC_INTLVL_LO_gc = (0x01<<4), /* Low level */ - AC_INTLVL_MED_gc = (0x02<<4), /* Medium level */ - AC_INTLVL_HI_gc = (0x03<<4), /* High level */ -} AC_INTLVL_t; - -/* Hysteresis mode selection */ -typedef enum AC_HYSMODE_enum -{ - AC_HYSMODE_NO_gc = (0x00<<1), /* No hysteresis */ - AC_HYSMODE_SMALL_gc = (0x01<<1), /* Small hysteresis */ - AC_HYSMODE_LARGE_gc = (0x02<<1), /* Large hysteresis */ -} AC_HYSMODE_t; - -/* Positive input multiplexer selection */ -typedef enum AC_MUXPOS_enum -{ - AC_MUXPOS_PIN0_gc = (0x00<<3), /* Pin 0 */ - AC_MUXPOS_PIN1_gc = (0x01<<3), /* Pin 1 */ - AC_MUXPOS_PIN2_gc = (0x02<<3), /* Pin 2 */ - AC_MUXPOS_PIN3_gc = (0x03<<3), /* Pin 3 */ - AC_MUXPOS_PIN4_gc = (0x04<<3), /* Pin 4 */ - AC_MUXPOS_PIN5_gc = (0x05<<3), /* Pin 5 */ - AC_MUXPOS_PIN6_gc = (0x06<<3), /* Pin 6 */ - AC_MUXPOS_DAC_gc = (0x07<<3), /* DAC output */ -} AC_MUXPOS_t; - -/* Negative input multiplexer selection */ -typedef enum AC_MUXNEG_enum -{ - AC_MUXNEG_PIN0_gc = (0x00<<0), /* Pin 0 */ - AC_MUXNEG_PIN1_gc = (0x01<<0), /* Pin 1 */ - AC_MUXNEG_PIN3_gc = (0x02<<0), /* Pin 3 */ - AC_MUXNEG_PIN5_gc = (0x03<<0), /* Pin 5 */ - AC_MUXNEG_PIN7_gc = (0x04<<0), /* Pin 7 */ - AC_MUXNEG_DAC_gc = (0x05<<0), /* DAC output */ - AC_MUXNEG_BANDGAP_gc = (0x06<<0), /* Bandgap Reference */ - AC_MUXNEG_SCALER_gc = (0x07<<0), /* Internal voltage scaler */ -} AC_MUXNEG_t; - -/* Windows interrupt mode */ -typedef enum AC_WINTMODE_enum -{ - AC_WINTMODE_ABOVE_gc = (0x00<<2), /* Interrupt on above window */ - AC_WINTMODE_INSIDE_gc = (0x01<<2), /* Interrupt on inside window */ - AC_WINTMODE_BELOW_gc = (0x02<<2), /* Interrupt on below window */ - AC_WINTMODE_OUTSIDE_gc = (0x03<<2), /* Interrupt on outside window */ -} AC_WINTMODE_t; - -/* Window interrupt level */ -typedef enum AC_WINTLVL_enum -{ - AC_WINTLVL_OFF_gc = (0x00<<0), /* Interrupt disabled */ - AC_WINTLVL_LO_gc = (0x01<<0), /* Low priority */ - AC_WINTLVL_MED_gc = (0x02<<0), /* Medium priority */ - AC_WINTLVL_HI_gc = (0x03<<0), /* High priority */ -} AC_WINTLVL_t; - -/* Window mode state */ -typedef enum AC_WSTATE_enum -{ - AC_WSTATE_ABOVE_gc = (0x00<<6), /* Signal above window */ - AC_WSTATE_INSIDE_gc = (0x01<<6), /* Signal inside window */ - AC_WSTATE_BELOW_gc = (0x02<<6), /* Signal below window */ -} AC_WSTATE_t; - - -/* --------------------------------------------------------------------------- -ADC - Analog/Digital Converter --------------------------------------------------------------------------- -*/ - -/* ADC Channel */ -typedef struct ADC_CH_struct -{ - register8_t CTRL; /* Control Register */ - register8_t MUXCTRL; /* MUX Control */ - register8_t INTCTRL; /* Channel Interrupt Control */ - register8_t INTFLAGS; /* Interrupt Flags */ - _WORDREGISTER(RES); /* Channel Result */ - register8_t reserved_0x6; - register8_t reserved_0x7; -} ADC_CH_t; - -/* --------------------------------------------------------------------------- -ADC - Analog/Digital Converter --------------------------------------------------------------------------- -*/ - -/* Analog-to-Digital Converter */ -typedef struct ADC_struct -{ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t REFCTRL; /* Reference Control */ - register8_t EVCTRL; /* Event Control */ - register8_t PRESCALER; /* Clock Prescaler */ - register8_t CALCTRL; /* Calibration Control Register */ - register8_t INTFLAGS; /* Interrupt Flags */ - register8_t reserved_0x07; - register8_t reserved_0x08; - register8_t reserved_0x09; - register8_t reserved_0x0A; - register8_t reserved_0x0B; - register8_t CALIB; /* Calibration Value */ - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t reserved_0x0F; - _WORDREGISTER(CH0RES); /* Channel 0 Result */ - _WORDREGISTER(CH1RES); /* Channel 1 Result */ - _WORDREGISTER(CH2RES); /* Channel 2 Result */ - _WORDREGISTER(CH3RES); /* Channel 3 Result */ - _WORDREGISTER(CMP); /* Compare Value */ - register8_t reserved_0x1A; - register8_t reserved_0x1B; - register8_t reserved_0x1C; - register8_t reserved_0x1D; - register8_t reserved_0x1E; - register8_t reserved_0x1F; - ADC_CH_t CH0; /* ADC Channel 0 */ - ADC_CH_t CH1; /* ADC Channel 1 */ - ADC_CH_t CH2; /* ADC Channel 2 */ - ADC_CH_t CH3; /* ADC Channel 3 */ -} ADC_t; - -/* Positive input multiplexer selection */ -typedef enum ADC_CH_MUXPOS_enum -{ - ADC_CH_MUXPOS_PIN0_gc = (0x00<<3), /* Input pin 0 */ - ADC_CH_MUXPOS_PIN1_gc = (0x01<<3), /* Input pin 1 */ - ADC_CH_MUXPOS_PIN2_gc = (0x02<<3), /* Input pin 2 */ - ADC_CH_MUXPOS_PIN3_gc = (0x03<<3), /* Input pin 3 */ - ADC_CH_MUXPOS_PIN4_gc = (0x04<<3), /* Input pin 4 */ - ADC_CH_MUXPOS_PIN5_gc = (0x05<<3), /* Input pin 5 */ - ADC_CH_MUXPOS_PIN6_gc = (0x06<<3), /* Input pin 6 */ - ADC_CH_MUXPOS_PIN7_gc = (0x07<<3), /* Input pin 7 */ -} ADC_CH_MUXPOS_t; - -/* Internal input multiplexer selections */ -typedef enum ADC_CH_MUXINT_enum -{ - ADC_CH_MUXINT_TEMP_gc = (0x00<<3), /* Temperature Reference */ - ADC_CH_MUXINT_BANDGAP_gc = (0x01<<3), /* Bandgap Reference */ - ADC_CH_MUXINT_SCALEDVCC_gc = (0x02<<3), /* 1/10 scaled VCC */ - ADC_CH_MUXINT_DAC_gc = (0x03<<3), /* DAC output */ -} ADC_CH_MUXINT_t; - -/* Negative input multiplexer selection */ -typedef enum ADC_CH_MUXNEG_enum -{ - ADC_CH_MUXNEG_PIN0_gc = (0x00<<0), /* Input pin 0 */ - ADC_CH_MUXNEG_PIN1_gc = (0x01<<0), /* Input pin 1 */ - ADC_CH_MUXNEG_PIN2_gc = (0x02<<0), /* Input pin 2 */ - ADC_CH_MUXNEG_PIN3_gc = (0x03<<0), /* Input pin 3 */ - ADC_CH_MUXNEG_PIN4_gc = (0x04<<0), /* Input pin 4 */ - ADC_CH_MUXNEG_PIN5_gc = (0x05<<0), /* Input pin 5 */ - ADC_CH_MUXNEG_PIN6_gc = (0x06<<0), /* Input pin 6 */ - ADC_CH_MUXNEG_PIN7_gc = (0x07<<0), /* Input pin 7 */ -} ADC_CH_MUXNEG_t; - -/* Input mode */ -typedef enum ADC_CH_INPUTMODE_enum -{ - ADC_CH_INPUTMODE_INTERNAL_gc = (0x00<<0), /* Internal inputs, no gain */ - ADC_CH_INPUTMODE_SINGLEENDED_gc = (0x01<<0), /* Single-ended input, no gain */ - ADC_CH_INPUTMODE_DIFF_gc = (0x02<<0), /* Differential input, no gain */ - ADC_CH_INPUTMODE_DIFFWGAIN_gc = (0x03<<0), /* Differential input, with gain */ -} ADC_CH_INPUTMODE_t; - -/* Gain factor */ -typedef enum ADC_CH_GAIN_enum -{ - ADC_CH_GAIN_1X_gc = (0x00<<2), /* 1x gain */ - ADC_CH_GAIN_2X_gc = (0x01<<2), /* 2x gain */ - ADC_CH_GAIN_4X_gc = (0x02<<2), /* 4x gain */ - ADC_CH_GAIN_8X_gc = (0x03<<2), /* 8x gain */ - ADC_CH_GAIN_16X_gc = (0x04<<2), /* 16x gain */ - ADC_CH_GAIN_32X_gc = (0x05<<2), /* 32x gain */ - ADC_CH_GAIN_64X_gc = (0x06<<2), /* 64x gain */ -} ADC_CH_GAIN_t; - -/* Conversion result resolution */ -typedef enum ADC_RESOLUTION_enum -{ - ADC_RESOLUTION_12BIT_gc = (0x00<<1), /* 12-bit right-adjusted result */ - ADC_RESOLUTION_8BIT_gc = (0x02<<1), /* 8-bit right-adjusted result */ - ADC_RESOLUTION_LEFT12BIT_gc = (0x03<<1), /* 12-bit left-adjusted result */ -} ADC_RESOLUTION_t; - -/* Voltage reference selection */ -typedef enum ADC_REFSEL_enum -{ - ADC_REFSEL_INT1V_gc = (0x00<<4), /* Internal 1V */ - ADC_REFSEL_VCC_gc = (0x01<<4), /* Internal VCC / 1.6V */ - ADC_REFSEL_AREFA_gc = (0x02<<4), /* External reference on PORT A */ - ADC_REFSEL_AREFB_gc = (0x03<<4), /* External reference on PORT B */ -} ADC_REFSEL_t; - -/* Channel sweep selection */ -typedef enum ADC_SWEEP_enum -{ - ADC_SWEEP_0_gc = (0x00<<6), /* ADC Channel 0 */ - ADC_SWEEP_01_gc = (0x01<<6), /* ADC Channel 0,1 */ - ADC_SWEEP_012_gc = (0x02<<6), /* ADC Channel 0,1,2 */ - ADC_SWEEP_0123_gc = (0x03<<6), /* ADC Channel 0,1,2,3 */ -} ADC_SWEEP_t; - -/* Event channel input selection */ -typedef enum ADC_EVSEL_enum -{ - ADC_EVSEL_0123_gc = (0x00<<3), /* Event Channel 0,1,2,3 */ - ADC_EVSEL_1234_gc = (0x01<<3), /* Event Channel 1,2,3,4 */ - ADC_EVSEL_2345_gc = (0x02<<3), /* Event Channel 2,3,4,5 */ - ADC_EVSEL_3456_gc = (0x03<<3), /* Event Channel 3,4,5,6 */ - ADC_EVSEL_4567_gc = (0x04<<3), /* Event Channel 4,5,6,7 */ - ADC_EVSEL_567_gc = (0x05<<3), /* Event Channel 5,6,7 */ - ADC_EVSEL_67_gc = (0x06<<3), /* Event Channel 6,7 */ - ADC_EVSEL_7_gc = (0x07<<3), /* Event Channel 7 */ -} ADC_EVSEL_t; - -/* Event action selection */ -typedef enum ADC_EVACT_enum -{ - ADC_EVACT_NONE_gc = (0x00<<0), /* No event action */ - ADC_EVACT_CH0_gc = (0x01<<0), /* First event triggers channel 0 */ - ADC_EVACT_CH01_gc = (0x02<<0), /* First two events trigger channel 0,1 */ - ADC_EVACT_CH012_gc = (0x03<<0), /* First three events trigger channel 0,1,2 */ - ADC_EVACT_CH0123_gc = (0x04<<0), /* Events trigger channel 0,1,2,3 */ - ADC_EVACT_SWEEP_gc = (0x05<<0), /* First event triggers sweep */ - ADC_EVACT_SYNCHSWEEP_gc = (0x06<<0), /* First event triggers synchronized sweep */ -} ADC_EVACT_t; - -/* Interupt mode */ -typedef enum ADC_CH_INTMODE_enum -{ - ADC_CH_INTMODE_COMPLETE_gc = (0x00<<2), /* Interrupt on conversion complete */ - ADC_CH_INTMODE_BELOW_gc = (0x01<<2), /* Interrupt on result below compare value */ - ADC_CH_INTMODE_ABOVE_gc = (0x03<<2), /* Interrupt on result above compare value */ -} ADC_CH_INTMODE_t; - -/* Interrupt level */ -typedef enum ADC_CH_INTLVL_enum -{ - ADC_CH_INTLVL_OFF_gc = (0x00<<0), /* Interrupt disabled */ - ADC_CH_INTLVL_LO_gc = (0x01<<0), /* Low level */ - ADC_CH_INTLVL_MED_gc = (0x02<<0), /* Medium level */ - ADC_CH_INTLVL_HI_gc = (0x03<<0), /* High level */ -} ADC_CH_INTLVL_t; - -/* DMA request selection */ -typedef enum ADC_DMASEL_enum -{ - ADC_DMASEL_OFF_gc = (0x00<<5), /* Combined DMA request OFF */ - ADC_DMASEL_CH01_gc = (0x01<<5), /* ADC Channel 0 or 1 */ - ADC_DMASEL_CH012_gc = (0x02<<5), /* ADC Channel 0 or 1 or 2 */ - ADC_DMASEL_CH0123_gc = (0x03<<5), /* ADC Channel 0 or 1 or 2 or 3 */ -} ADC_DMASEL_t; - -/* Clock prescaler */ -typedef enum ADC_PRESCALER_enum -{ - ADC_PRESCALER_DIV4_gc = (0x00<<0), /* Divide clock by 4 */ - ADC_PRESCALER_DIV8_gc = (0x01<<0), /* Divide clock by 8 */ - ADC_PRESCALER_DIV16_gc = (0x02<<0), /* Divide clock by 16 */ - ADC_PRESCALER_DIV32_gc = (0x03<<0), /* Divide clock by 32 */ - ADC_PRESCALER_DIV64_gc = (0x04<<0), /* Divide clock by 64 */ - ADC_PRESCALER_DIV128_gc = (0x05<<0), /* Divide clock by 128 */ - ADC_PRESCALER_DIV256_gc = (0x06<<0), /* Divide clock by 256 */ - ADC_PRESCALER_DIV512_gc = (0x07<<0), /* Divide clock by 512 */ -} ADC_PRESCALER_t; - - -/* --------------------------------------------------------------------------- -DAC - Digital/Analog Converter --------------------------------------------------------------------------- -*/ - -/* Digital-to-Analog Converter */ -typedef struct DAC_struct -{ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t CTRLC; /* Control Register C */ - register8_t EVCTRL; /* Event Input Control */ - register8_t TIMCTRL; /* Timing Control */ - register8_t STATUS; /* Status */ - register8_t reserved_0x06; - register8_t reserved_0x07; - register8_t GAINCAL; /* Gain Calibration */ - register8_t OFFSETCAL; /* Offset Calibration */ - register8_t reserved_0x0A; - register8_t reserved_0x0B; - register8_t reserved_0x0C; - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t reserved_0x0F; - register8_t reserved_0x10; - register8_t reserved_0x11; - register8_t reserved_0x12; - register8_t reserved_0x13; - register8_t reserved_0x14; - register8_t reserved_0x15; - register8_t reserved_0x16; - register8_t reserved_0x17; - _WORDREGISTER(CH0DATA); /* Channel 0 Data */ - _WORDREGISTER(CH1DATA); /* Channel 1 Data */ -} DAC_t; - -/* Output channel selection */ -typedef enum DAC_CHSEL_enum -{ - DAC_CHSEL_SINGLE_gc = (0x00<<5), /* Single channel operation (Channel A only) */ - DAC_CHSEL_DUAL_gc = (0x02<<5), /* Dual channel operation (S/H on both channels) */ -} DAC_CHSEL_t; - -/* Reference voltage selection */ -typedef enum DAC_REFSEL_enum -{ - DAC_REFSEL_INT1V_gc = (0x00<<3), /* Internal 1V */ - DAC_REFSEL_AVCC_gc = (0x01<<3), /* Analog supply voltage */ - DAC_REFSEL_AREFA_gc = (0x02<<3), /* External reference on AREF on PORTA */ - DAC_REFSEL_AREFB_gc = (0x03<<3), /* External reference on AREF on PORTB */ -} DAC_REFSEL_t; - -/* Event channel selection */ -typedef enum DAC_EVSEL_enum -{ - DAC_EVSEL_0_gc = (0x00<<0), /* Event Channel 0 */ - DAC_EVSEL_1_gc = (0x01<<0), /* Event Channel 1 */ - DAC_EVSEL_2_gc = (0x02<<0), /* Event Channel 2 */ - DAC_EVSEL_3_gc = (0x03<<0), /* Event Channel 3 */ - DAC_EVSEL_4_gc = (0x04<<0), /* Event Channel 4 */ - DAC_EVSEL_5_gc = (0x05<<0), /* Event Channel 5 */ - DAC_EVSEL_6_gc = (0x06<<0), /* Event Channel 6 */ - DAC_EVSEL_7_gc = (0x07<<0), /* Event Channel 7 */ -} DAC_EVSEL_t; - -/* Conversion interval */ -typedef enum DAC_CONINTVAL_enum -{ - DAC_CONINTVAL_1CLK_gc = (0x00<<4), /* 1 CLK / 2 CLK in S/H mode */ - DAC_CONINTVAL_2CLK_gc = (0x01<<4), /* 2 CLK / 3 CLK in S/H mode */ - DAC_CONINTVAL_4CLK_gc = (0x02<<4), /* 4 CLK / 6 CLK in S/H mode */ - DAC_CONINTVAL_8CLK_gc = (0x03<<4), /* 8 CLK / 12 CLK in S/H mode */ - DAC_CONINTVAL_16CLK_gc = (0x04<<4), /* 16 CLK / 24 CLK in S/H mode */ - DAC_CONINTVAL_32CLK_gc = (0x05<<4), /* 32 CLK / 48 CLK in S/H mode */ - DAC_CONINTVAL_64CLK_gc = (0x06<<4), /* 64 CLK / 96 CLK in S/H mode */ - DAC_CONINTVAL_128CLK_gc = (0x07<<4), /* 128 CLK / 192 CLK in S/H mode */ -} DAC_CONINTVAL_t; - -/* Refresh rate */ -typedef enum DAC_REFRESH_enum -{ - DAC_REFRESH_16CLK_gc = (0x00<<0), /* 16 CLK */ - DAC_REFRESH_32CLK_gc = (0x01<<0), /* 32 CLK */ - DAC_REFRESH_64CLK_gc = (0x02<<0), /* 64 CLK */ - DAC_REFRESH_128CLK_gc = (0x03<<0), /* 128 CLK */ - DAC_REFRESH_256CLK_gc = (0x04<<0), /* 256 CLK */ - DAC_REFRESH_512CLK_gc = (0x05<<0), /* 512 CLK */ - DAC_REFRESH_1024CLK_gc = (0x06<<0), /* 1024 CLK */ - DAC_REFRESH_2048CLK_gc = (0x07<<0), /* 2048 CLK */ - DAC_REFRESH_4086CLK_gc = (0x08<<0), /* 4096 CLK */ - DAC_REFRESH_8192CLK_gc = (0x09<<0), /* 8192 CLK */ - DAC_REFRESH_16384CLK_gc = (0x0A<<0), /* 16384 CLK */ - DAC_REFRESH_32768CLK_gc = (0x0B<<0), /* 32768 CLK */ - DAC_REFRESH_65536CLK_gc = (0x0C<<0), /* 65536 CLK */ - DAC_REFRESH_OFF_gc = (0x0F<<0), /* Auto refresh OFF */ -} DAC_REFRESH_t; - - -/* --------------------------------------------------------------------------- -RTC - Real-Time Clounter --------------------------------------------------------------------------- -*/ - -/* Real-Time Counter */ -typedef struct RTC_struct -{ - register8_t CTRL; /* Control Register */ - register8_t STATUS; /* Status Register */ - register8_t INTCTRL; /* Interrupt Control Register */ - register8_t INTFLAGS; /* Interrupt Flags */ - register8_t TEMP; /* Temporary register */ - register8_t reserved_0x05; - register8_t reserved_0x06; - register8_t reserved_0x07; - _WORDREGISTER(CNT); /* Count Register */ - _WORDREGISTER(PER); /* Period Register */ - _WORDREGISTER(COMP); /* Compare Register */ -} RTC_t; - -/* Prescaler Factor */ -typedef enum RTC_PRESCALER_enum -{ - RTC_PRESCALER_OFF_gc = (0x00<<0), /* RTC Off */ - RTC_PRESCALER_DIV1_gc = (0x01<<0), /* RTC Clock */ - RTC_PRESCALER_DIV2_gc = (0x02<<0), /* RTC Clock / 2 */ - RTC_PRESCALER_DIV8_gc = (0x03<<0), /* RTC Clock / 8 */ - RTC_PRESCALER_DIV16_gc = (0x04<<0), /* RTC Clock / 16 */ - RTC_PRESCALER_DIV64_gc = (0x05<<0), /* RTC Clock / 64 */ - RTC_PRESCALER_DIV256_gc = (0x06<<0), /* RTC Clock / 256 */ - RTC_PRESCALER_DIV1024_gc = (0x07<<0), /* RTC Clock / 1024 */ -} RTC_PRESCALER_t; - -/* Compare Interrupt level */ -typedef enum RTC_COMPINTLVL_enum -{ - RTC_COMPINTLVL_OFF_gc = (0x00<<2), /* Interrupt Disabled */ - RTC_COMPINTLVL_LO_gc = (0x01<<2), /* Low Level */ - RTC_COMPINTLVL_MED_gc = (0x02<<2), /* Medium Level */ - RTC_COMPINTLVL_HI_gc = (0x03<<2), /* High Level */ -} RTC_COMPINTLVL_t; - -/* Overflow Interrupt level */ -typedef enum RTC_OVFINTLVL_enum -{ - RTC_OVFINTLVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - RTC_OVFINTLVL_LO_gc = (0x01<<0), /* Low Level */ - RTC_OVFINTLVL_MED_gc = (0x02<<0), /* Medium Level */ - RTC_OVFINTLVL_HI_gc = (0x03<<0), /* High Level */ -} RTC_OVFINTLVL_t; - - -/* --------------------------------------------------------------------------- -EBI - External Bus Interface --------------------------------------------------------------------------- -*/ - -/* EBI Chip Select Module */ -typedef struct EBI_CS_struct -{ - register8_t CTRLA; /* Chip Select Control Register A */ - register8_t CTRLB; /* Chip Select Control Register B */ - _WORDREGISTER(BASEADDR); /* Chip Select Base Address */ -} EBI_CS_t; - -/* --------------------------------------------------------------------------- -EBI - External Bus Interface --------------------------------------------------------------------------- -*/ - -/* External Bus Interface */ -typedef struct EBI_struct -{ - register8_t CTRL; /* Control */ - register8_t SDRAMCTRLA; /* SDRAM Control Register A */ - register8_t reserved_0x02; - register8_t reserved_0x03; - _WORDREGISTER(REFRESH); /* SDRAM Refresh Period */ - _WORDREGISTER(INITDLY); /* SDRAM Initialization Delay */ - register8_t SDRAMCTRLB; /* SDRAM Control Register B */ - register8_t SDRAMCTRLC; /* SDRAM Control Register C */ - register8_t reserved_0x0A; - register8_t reserved_0x0B; - register8_t reserved_0x0C; - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t reserved_0x0F; - EBI_CS_t CS0; /* Chip Select 0 */ - EBI_CS_t CS1; /* Chip Select 1 */ - EBI_CS_t CS2; /* Chip Select 2 */ - EBI_CS_t CS3; /* Chip Select 3 */ -} EBI_t; - -/* Chip Select adress space */ -typedef enum EBI_CS_ASPACE_enum -{ - EBI_CS_ASPACE_256B_gc = (0x00<<2), /* 256 bytes */ - EBI_CS_ASPACE_512B_gc = (0x01<<2), /* 512 bytes */ - EBI_CS_ASPACE_1KB_gc = (0x02<<2), /* 1K bytes */ - EBI_CS_ASPACE_2KB_gc = (0x03<<2), /* 2K bytes */ - EBI_CS_ASPACE_4KB_gc = (0x04<<2), /* 4K bytes */ - EBI_CS_ASPACE_8KB_gc = (0x05<<2), /* 8K bytes */ - EBI_CS_ASPACE_16KB_gc = (0x06<<2), /* 16K bytes */ - EBI_CS_ASPACE_32KB_gc = (0x07<<2), /* 32K bytes */ - EBI_CS_ASPACE_64KB_gc = (0x08<<2), /* 64K bytes */ - EBI_CS_ASPACE_128KB_gc = (0x09<<2), /* 128K bytes */ - EBI_CS_ASPACE_256KB_gc = (0x0A<<2), /* 256K bytes */ - EBI_CS_ASPACE_512KB_gc = (0x0B<<2), /* 512K bytes */ - EBI_CS_ASPACE_1MB_gc = (0x0C<<2), /* 1M bytes */ - EBI_CS_ASPACE_2MB_gc = (0x0D<<2), /* 2M bytes */ - EBI_CS_ASPACE_4MB_gc = (0x0E<<2), /* 4M bytes */ - EBI_CS_ASPACE_8MB_gc = (0x0F<<2), /* 8M bytes */ - EBI_CS_ASPACE_16M_gc = (0x10<<2), /* 16M bytes */ -} EBI_CS_ASPACE_t; - -/* */ -typedef enum EBI_CS_SRWS_enum -{ - EBI_CS_SRWS_0CLK_gc = (0x00<<0), /* 0 cycles */ - EBI_CS_SRWS_1CLK_gc = (0x01<<0), /* 1 cycle */ - EBI_CS_SRWS_2CLK_gc = (0x02<<0), /* 2 cycles */ - EBI_CS_SRWS_3CLK_gc = (0x03<<0), /* 3 cycles */ - EBI_CS_SRWS_4CLK_gc = (0x04<<0), /* 4 cycles */ - EBI_CS_SRWS_5CLK_gc = (0x05<<0), /* 5 cycle */ - EBI_CS_SRWS_6CLK_gc = (0x06<<0), /* 6 cycles */ - EBI_CS_SRWS_7CLK_gc = (0x07<<0), /* 7 cycles */ -} EBI_CS_SRWS_t; - -/* Chip Select address mode */ -typedef enum EBI_CS_MODE_enum -{ - EBI_CS_MODE_DISABLED_gc = (0x00<<0), /* Chip Select Disabled */ - EBI_CS_MODE_SRAM_gc = (0x01<<0), /* Chip Select in SRAM mode */ - EBI_CS_MODE_LPC_gc = (0x02<<0), /* Chip Select in SRAM LPC mode */ - EBI_CS_MODE_SDRAM_gc = (0x03<<0), /* Chip Select in SDRAM mode */ -} EBI_CS_MODE_t; - -/* Chip Select SDRAM mode */ -typedef enum EBI_CS_SDMODE_enum -{ - EBI_CS_SDMODE_NORMAL_gc = (0x00<<0), /* Normal mode */ - EBI_CS_SDMODE_LOAD_gc = (0x01<<0), /* Load Mode Register command mode */ -} EBI_CS_SDMODE_t; - -/* */ -typedef enum EBI_SDDATAW_enum -{ - EBI_SDDATAW_4BIT_gc = (0x00<<6), /* 4-bit data bus */ - EBI_SDDATAW_8BIT_gc = (0x01<<6), /* 8-bit data bus */ -} EBI_SDDATAW_t; - -/* */ -typedef enum EBI_LPCMODE_enum -{ - EBI_LPCMODE_ALE1_gc = (0x00<<4), /* Data muxed with addr byte 0 */ - EBI_LPCMODE_ALE12_gc = (0x02<<4), /* Data muxed with addr byte 0 and 1 */ -} EBI_LPCMODE_t; - -/* */ -typedef enum EBI_SRMODE_enum -{ - EBI_SRMODE_ALE1_gc = (0x00<<2), /* Addr byte 0 muxed with 1 */ - EBI_SRMODE_ALE2_gc = (0x01<<2), /* Addr byte 0 muxed with 2 */ - EBI_SRMODE_ALE12_gc = (0x02<<2), /* Addr byte 0 muxed with 1 and 2 */ - EBI_SRMODE_NOALE_gc = (0x03<<2), /* No addr muxing */ -} EBI_SRMODE_t; - -/* */ -typedef enum EBI_IFMODE_enum -{ - EBI_IFMODE_DISABLED_gc = (0x00<<0), /* EBI Disabled */ - EBI_IFMODE_3PORT_gc = (0x01<<0), /* 3-port mode */ - EBI_IFMODE_4PORT_gc = (0x02<<0), /* 4-port mode */ - EBI_IFMODE_2PORT_gc = (0x03<<0), /* 2-port mode */ -} EBI_IFMODE_t; - -/* */ -typedef enum EBI_SDCOL_enum -{ - EBI_SDCOL_8BIT_gc = (0x00<<0), /* 8 column bits */ - EBI_SDCOL_9BIT_gc = (0x01<<0), /* 9 column bits */ - EBI_SDCOL_10BIT_gc = (0x02<<0), /* 10 column bits */ - EBI_SDCOL_11BIT_gc = (0x03<<0), /* 11 column bits */ -} EBI_SDCOL_t; - -/* */ -typedef enum EBI_MRDLY_enum -{ - EBI_MRDLY_0CLK_gc = (0x00<<6), /* 0 cycles */ - EBI_MRDLY_1CLK_gc = (0x01<<6), /* 1 cycle */ - EBI_MRDLY_2CLK_gc = (0x02<<6), /* 2 cycles */ - EBI_MRDLY_3CLK_gc = (0x03<<6), /* 3 cycles */ -} EBI_MRDLY_t; - -/* */ -typedef enum EBI_ROWCYCDLY_enum -{ - EBI_ROWCYCDLY_0CLK_gc = (0x00<<3), /* 0 cycles */ - EBI_ROWCYCDLY_1CLK_gc = (0x01<<3), /* 1 cycle */ - EBI_ROWCYCDLY_2CLK_gc = (0x02<<3), /* 2 cycles */ - EBI_ROWCYCDLY_3CLK_gc = (0x03<<3), /* 3 cycles */ - EBI_ROWCYCDLY_4CLK_gc = (0x04<<3), /* 4 cycles */ - EBI_ROWCYCDLY_5CLK_gc = (0x05<<3), /* 5 cycle */ - EBI_ROWCYCDLY_6CLK_gc = (0x06<<3), /* 6 cycles */ - EBI_ROWCYCDLY_7CLK_gc = (0x07<<3), /* 7 cycles */ -} EBI_ROWCYCDLY_t; - -/* */ -typedef enum EBI_RPDLY_enum -{ - EBI_RPDLY_0CLK_gc = (0x00<<0), /* 0 cycles */ - EBI_RPDLY_1CLK_gc = (0x01<<0), /* 1 cycle */ - EBI_RPDLY_2CLK_gc = (0x02<<0), /* 2 cycles */ - EBI_RPDLY_3CLK_gc = (0x03<<0), /* 3 cycles */ - EBI_RPDLY_4CLK_gc = (0x04<<0), /* 4 cycles */ - EBI_RPDLY_5CLK_gc = (0x05<<0), /* 5 cycle */ - EBI_RPDLY_6CLK_gc = (0x06<<0), /* 6 cycles */ - EBI_RPDLY_7CLK_gc = (0x07<<0), /* 7 cycles */ -} EBI_RPDLY_t; - -/* */ -typedef enum EBI_WRDLY_enum -{ - EBI_WRDLY_0CLK_gc = (0x00<<6), /* 0 cycles */ - EBI_WRDLY_1CLK_gc = (0x01<<6), /* 1 cycle */ - EBI_WRDLY_2CLK_gc = (0x02<<6), /* 2 cycles */ - EBI_WRDLY_3CLK_gc = (0x03<<6), /* 3 cycles */ -} EBI_WRDLY_t; - -/* */ -typedef enum EBI_ESRDLY_enum -{ - EBI_ESRDLY_0CLK_gc = (0x00<<3), /* 0 cycles */ - EBI_ESRDLY_1CLK_gc = (0x01<<3), /* 1 cycle */ - EBI_ESRDLY_2CLK_gc = (0x02<<3), /* 2 cycles */ - EBI_ESRDLY_3CLK_gc = (0x03<<3), /* 3 cycles */ - EBI_ESRDLY_4CLK_gc = (0x04<<3), /* 4 cycles */ - EBI_ESRDLY_5CLK_gc = (0x05<<3), /* 5 cycle */ - EBI_ESRDLY_6CLK_gc = (0x06<<3), /* 6 cycles */ - EBI_ESRDLY_7CLK_gc = (0x07<<3), /* 7 cycles */ -} EBI_ESRDLY_t; - -/* */ -typedef enum EBI_ROWCOLDLY_enum -{ - EBI_ROWCOLDLY_0CLK_gc = (0x00<<0), /* 0 cycles */ - EBI_ROWCOLDLY_1CLK_gc = (0x01<<0), /* 1 cycle */ - EBI_ROWCOLDLY_2CLK_gc = (0x02<<0), /* 2 cycles */ - EBI_ROWCOLDLY_3CLK_gc = (0x03<<0), /* 3 cycles */ - EBI_ROWCOLDLY_4CLK_gc = (0x04<<0), /* 4 cycles */ - EBI_ROWCOLDLY_5CLK_gc = (0x05<<0), /* 5 cycle */ - EBI_ROWCOLDLY_6CLK_gc = (0x06<<0), /* 6 cycles */ - EBI_ROWCOLDLY_7CLK_gc = (0x07<<0), /* 7 cycles */ -} EBI_ROWCOLDLY_t; - - -/* --------------------------------------------------------------------------- -TWI - Two-Wire Interface --------------------------------------------------------------------------- -*/ - -/* */ -typedef struct TWI_MASTER_struct -{ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t CTRLC; /* Control Register C */ - register8_t STATUS; /* Status Register */ - register8_t BAUD; /* Baurd Rate Control Register */ - register8_t ADDR; /* Address Register */ - register8_t DATA; /* Data Register */ -} TWI_MASTER_t; - -/* --------------------------------------------------------------------------- -TWI - Two-Wire Interface --------------------------------------------------------------------------- -*/ - -/* */ -typedef struct TWI_SLAVE_struct -{ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t STATUS; /* Status Register */ - register8_t ADDR; /* Address Register */ - register8_t DATA; /* Data Register */ -} TWI_SLAVE_t; - -/* --------------------------------------------------------------------------- -TWI - Two-Wire Interface --------------------------------------------------------------------------- -*/ - -/* Two-Wire Interface */ -typedef struct TWI_struct -{ - register8_t CTRL; /* TWI Common Control Register */ - TWI_MASTER_t MASTER; /* TWI master module */ - TWI_SLAVE_t SLAVE; /* TWI slave module */ -} TWI_t; - -/* Master Interrupt Level */ -typedef enum TWI_MASTER_INTLVL_enum -{ - TWI_MASTER_INTLVL_OFF_gc = (0x00<<6), /* Interrupt Disabled */ - TWI_MASTER_INTLVL_LO_gc = (0x01<<6), /* Low Level */ - TWI_MASTER_INTLVL_MED_gc = (0x02<<6), /* Medium Level */ - TWI_MASTER_INTLVL_HI_gc = (0x03<<6), /* High Level */ -} TWI_MASTER_INTLVL_t; - -/* Inactive Timeout */ -typedef enum TWI_MASTER_TIMEOUT_enum -{ - TWI_MASTER_TIMEOUT_DISABLED_gc = (0x00<<2), /* Bus Timeout Disabled */ - TWI_MASTER_TIMEOUT_50US_gc = (0x01<<2), /* 50 Microseconds */ - TWI_MASTER_TIMEOUT_100US_gc = (0x02<<2), /* 100 Microseconds */ - TWI_MASTER_TIMEOUT_200US_gc = (0x03<<2), /* 200 Microseconds */ -} TWI_MASTER_TIMEOUT_t; - -/* Master Command */ -typedef enum TWI_MASTER_CMD_enum -{ - TWI_MASTER_CMD_NOACT_gc = (0x00<<0), /* No Action */ - TWI_MASTER_CMD_REPSTART_gc = (0x01<<0), /* Issue Repeated Start Condition */ - TWI_MASTER_CMD_RECVTRANS_gc = (0x02<<0), /* Receive or Transmit Data */ - TWI_MASTER_CMD_STOP_gc = (0x03<<0), /* Issue Stop Condition */ -} TWI_MASTER_CMD_t; - -/* Master Bus State */ -typedef enum TWI_MASTER_BUSSTATE_enum -{ - TWI_MASTER_BUSSTATE_UNKNOWN_gc = (0x00<<0), /* Unknown Bus State */ - TWI_MASTER_BUSSTATE_IDLE_gc = (0x01<<0), /* Bus is Idle */ - TWI_MASTER_BUSSTATE_OWNER_gc = (0x02<<0), /* This Module Controls The Bus */ - TWI_MASTER_BUSSTATE_BUSY_gc = (0x03<<0), /* The Bus is Busy */ -} TWI_MASTER_BUSSTATE_t; - -/* Slave Interrupt Level */ -typedef enum TWI_SLAVE_INTLVL_enum -{ - TWI_SLAVE_INTLVL_OFF_gc = (0x00<<6), /* Interrupt Disabled */ - TWI_SLAVE_INTLVL_LO_gc = (0x01<<6), /* Low Level */ - TWI_SLAVE_INTLVL_MED_gc = (0x02<<6), /* Medium Level */ - TWI_SLAVE_INTLVL_HI_gc = (0x03<<6), /* High Level */ -} TWI_SLAVE_INTLVL_t; - -/* Slave Command */ -typedef enum TWI_SLAVE_CMD_enum -{ - TWI_SLAVE_CMD_NOACT_gc = (0x00<<0), /* No Action */ - TWI_SLAVE_CMD_COMPTRANS_gc = (0x02<<0), /* Used To Complete a Transaction */ - TWI_SLAVE_CMD_RESPONSE_gc = (0x03<<0), /* Used in Response to Address/Data Interrupt */ -} TWI_SLAVE_CMD_t; - - -/* --------------------------------------------------------------------------- -PORT - Port Configuration --------------------------------------------------------------------------- -*/ - -/* I/O port Configuration */ -typedef struct PORTCFG_struct -{ - register8_t MPCMASK; /* Multi-pin Configuration Mask */ - register8_t reserved_0x01; - register8_t VPCTRLA; /* Virtual Port Control Register A */ - register8_t VPCTRLB; /* Virtual Port Control Register B */ - register8_t CLKEVOUT; /* Clock and Event Out Register */ -} PORTCFG_t; - -/* --------------------------------------------------------------------------- -PORT - Port Configuration --------------------------------------------------------------------------- -*/ - -/* Virtual Port */ -typedef struct VPORT_struct -{ - register8_t DIR; /* I/O Port Data Direction */ - register8_t OUT; /* I/O Port Output */ - register8_t IN; /* I/O Port Input */ - register8_t INTFLAGS; /* Interrupt Flag Register */ -} VPORT_t; - -/* --------------------------------------------------------------------------- -PORT - Port Configuration --------------------------------------------------------------------------- -*/ - -/* I/O Ports */ -typedef struct PORT_struct -{ - register8_t DIR; /* I/O Port Data Direction */ - register8_t DIRSET; /* I/O Port Data Direction Set */ - register8_t DIRCLR; /* I/O Port Data Direction Clear */ - register8_t DIRTGL; /* I/O Port Data Direction Toggle */ - register8_t OUT; /* I/O Port Output */ - register8_t OUTSET; /* I/O Port Output Set */ - register8_t OUTCLR; /* I/O Port Output Clear */ - register8_t OUTTGL; /* I/O Port Output Toggle */ - register8_t IN; /* I/O port Input */ - register8_t INTCTRL; /* Interrupt Control Register */ - register8_t INT0MASK; /* Port Interrupt 0 Mask */ - register8_t INT1MASK; /* Port Interrupt 1 Mask */ - register8_t INTFLAGS; /* Interrupt Flag Register */ - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t reserved_0x0F; - register8_t PIN0CTRL; /* Pin 0 Control Register */ - register8_t PIN1CTRL; /* Pin 1 Control Register */ - register8_t PIN2CTRL; /* Pin 2 Control Register */ - register8_t PIN3CTRL; /* Pin 3 Control Register */ - register8_t PIN4CTRL; /* Pin 4 Control Register */ - register8_t PIN5CTRL; /* Pin 5 Control Register */ - register8_t PIN6CTRL; /* Pin 6 Control Register */ - register8_t PIN7CTRL; /* Pin 7 Control Register */ -} PORT_t; - -/* Virtual Port 0 Mapping */ -typedef enum PORTCFG_VP0MAP_enum -{ - PORTCFG_VP0MAP_PORTA_gc = (0x00<<0), /* Mapped To PORTA */ - PORTCFG_VP0MAP_PORTB_gc = (0x01<<0), /* Mapped To PORTB */ - PORTCFG_VP0MAP_PORTC_gc = (0x02<<0), /* Mapped To PORTC */ - PORTCFG_VP0MAP_PORTD_gc = (0x03<<0), /* Mapped To PORTD */ - PORTCFG_VP0MAP_PORTE_gc = (0x04<<0), /* Mapped To PORTE */ - PORTCFG_VP0MAP_PORTF_gc = (0x05<<0), /* Mapped To PORTF */ - PORTCFG_VP0MAP_PORTG_gc = (0x06<<0), /* Mapped To PORTG */ - PORTCFG_VP0MAP_PORTH_gc = (0x07<<0), /* Mapped To PORTH */ - PORTCFG_VP0MAP_PORTJ_gc = (0x08<<0), /* Mapped To PORTJ */ - PORTCFG_VP0MAP_PORTK_gc = (0x09<<0), /* Mapped To PORTK */ - PORTCFG_VP0MAP_PORTL_gc = (0x0A<<0), /* Mapped To PORTL */ - PORTCFG_VP0MAP_PORTM_gc = (0x0B<<0), /* Mapped To PORTM */ - PORTCFG_VP0MAP_PORTN_gc = (0x0C<<0), /* Mapped To PORTN */ - PORTCFG_VP0MAP_PORTP_gc = (0x0D<<0), /* Mapped To PORTP */ - PORTCFG_VP0MAP_PORTQ_gc = (0x0E<<0), /* Mapped To PORTQ */ - PORTCFG_VP0MAP_PORTR_gc = (0x0F<<0), /* Mapped To PORTR */ -} PORTCFG_VP0MAP_t; - -/* Virtual Port 1 Mapping */ -typedef enum PORTCFG_VP1MAP_enum -{ - PORTCFG_VP1MAP_PORTA_gc = (0x00<<4), /* Mapped To PORTA */ - PORTCFG_VP1MAP_PORTB_gc = (0x01<<4), /* Mapped To PORTB */ - PORTCFG_VP1MAP_PORTC_gc = (0x02<<4), /* Mapped To PORTC */ - PORTCFG_VP1MAP_PORTD_gc = (0x03<<4), /* Mapped To PORTD */ - PORTCFG_VP1MAP_PORTE_gc = (0x04<<4), /* Mapped To PORTE */ - PORTCFG_VP1MAP_PORTF_gc = (0x05<<4), /* Mapped To PORTF */ - PORTCFG_VP1MAP_PORTG_gc = (0x06<<4), /* Mapped To PORTG */ - PORTCFG_VP1MAP_PORTH_gc = (0x07<<4), /* Mapped To PORTH */ - PORTCFG_VP1MAP_PORTJ_gc = (0x08<<4), /* Mapped To PORTJ */ - PORTCFG_VP1MAP_PORTK_gc = (0x09<<4), /* Mapped To PORTK */ - PORTCFG_VP1MAP_PORTL_gc = (0x0A<<4), /* Mapped To PORTL */ - PORTCFG_VP1MAP_PORTM_gc = (0x0B<<4), /* Mapped To PORTM */ - PORTCFG_VP1MAP_PORTN_gc = (0x0C<<4), /* Mapped To PORTN */ - PORTCFG_VP1MAP_PORTP_gc = (0x0D<<4), /* Mapped To PORTP */ - PORTCFG_VP1MAP_PORTQ_gc = (0x0E<<4), /* Mapped To PORTQ */ - PORTCFG_VP1MAP_PORTR_gc = (0x0F<<4), /* Mapped To PORTR */ -} PORTCFG_VP1MAP_t; - -/* Virtual Port 2 Mapping */ -typedef enum PORTCFG_VP2MAP_enum -{ - PORTCFG_VP2MAP_PORTA_gc = (0x00<<0), /* Mapped To PORTA */ - PORTCFG_VP2MAP_PORTB_gc = (0x01<<0), /* Mapped To PORTB */ - PORTCFG_VP2MAP_PORTC_gc = (0x02<<0), /* Mapped To PORTC */ - PORTCFG_VP2MAP_PORTD_gc = (0x03<<0), /* Mapped To PORTD */ - PORTCFG_VP2MAP_PORTE_gc = (0x04<<0), /* Mapped To PORTE */ - PORTCFG_VP2MAP_PORTF_gc = (0x05<<0), /* Mapped To PORTF */ - PORTCFG_VP2MAP_PORTG_gc = (0x06<<0), /* Mapped To PORTG */ - PORTCFG_VP2MAP_PORTH_gc = (0x07<<0), /* Mapped To PORTH */ - PORTCFG_VP2MAP_PORTJ_gc = (0x08<<0), /* Mapped To PORTJ */ - PORTCFG_VP2MAP_PORTK_gc = (0x09<<0), /* Mapped To PORTK */ - PORTCFG_VP2MAP_PORTL_gc = (0x0A<<0), /* Mapped To PORTL */ - PORTCFG_VP2MAP_PORTM_gc = (0x0B<<0), /* Mapped To PORTM */ - PORTCFG_VP2MAP_PORTN_gc = (0x0C<<0), /* Mapped To PORTN */ - PORTCFG_VP2MAP_PORTP_gc = (0x0D<<0), /* Mapped To PORTP */ - PORTCFG_VP2MAP_PORTQ_gc = (0x0E<<0), /* Mapped To PORTQ */ - PORTCFG_VP2MAP_PORTR_gc = (0x0F<<0), /* Mapped To PORTR */ -} PORTCFG_VP2MAP_t; - -/* Virtual Port 3 Mapping */ -typedef enum PORTCFG_VP3MAP_enum -{ - PORTCFG_VP3MAP_PORTA_gc = (0x00<<4), /* Mapped To PORTA */ - PORTCFG_VP3MAP_PORTB_gc = (0x01<<4), /* Mapped To PORTB */ - PORTCFG_VP3MAP_PORTC_gc = (0x02<<4), /* Mapped To PORTC */ - PORTCFG_VP3MAP_PORTD_gc = (0x03<<4), /* Mapped To PORTD */ - PORTCFG_VP3MAP_PORTE_gc = (0x04<<4), /* Mapped To PORTE */ - PORTCFG_VP3MAP_PORTF_gc = (0x05<<4), /* Mapped To PORTF */ - PORTCFG_VP3MAP_PORTG_gc = (0x06<<4), /* Mapped To PORTG */ - PORTCFG_VP3MAP_PORTH_gc = (0x07<<4), /* Mapped To PORTH */ - PORTCFG_VP3MAP_PORTJ_gc = (0x08<<4), /* Mapped To PORTJ */ - PORTCFG_VP3MAP_PORTK_gc = (0x09<<4), /* Mapped To PORTK */ - PORTCFG_VP3MAP_PORTL_gc = (0x0A<<4), /* Mapped To PORTL */ - PORTCFG_VP3MAP_PORTM_gc = (0x0B<<4), /* Mapped To PORTM */ - PORTCFG_VP3MAP_PORTN_gc = (0x0C<<4), /* Mapped To PORTN */ - PORTCFG_VP3MAP_PORTP_gc = (0x0D<<4), /* Mapped To PORTP */ - PORTCFG_VP3MAP_PORTQ_gc = (0x0E<<4), /* Mapped To PORTQ */ - PORTCFG_VP3MAP_PORTR_gc = (0x0F<<4), /* Mapped To PORTR */ -} PORTCFG_VP3MAP_t; - -/* Clock Output Port */ -typedef enum PORTCFG_CLKOUT_enum -{ - PORTCFG_CLKOUT_OFF_gc = (0x00<<0), /* Clock Output Disabled */ - PORTCFG_CLKOUT_PC7_gc = (0x01<<0), /* Clock Output on Port C pin 7 */ - PORTCFG_CLKOUT_PD7_gc = (0x02<<0), /* Clock Output on Port D pin 7 */ - PORTCFG_CLKOUT_PE7_gc = (0x03<<0), /* Clock Output on Port E pin 7 */ -} PORTCFG_CLKOUT_t; - -/* Event Output Port */ -typedef enum PORTCFG_EVOUT_enum -{ - PORTCFG_EVOUT_OFF_gc = (0x00<<4), /* Event Output Disabled */ - PORTCFG_EVOUT_PC7_gc = (0x01<<4), /* Event Channel 7 Output on Port C pin 7 */ - PORTCFG_EVOUT_PD7_gc = (0x02<<4), /* Event Channel 7 Output on Port D pin 7 */ - PORTCFG_EVOUT_PE7_gc = (0x03<<4), /* Event Channel 7 Output on Port E pin 7 */ -} PORTCFG_EVOUT_t; - -/* Port Interrupt 0 Level */ -typedef enum PORT_INT0LVL_enum -{ - PORT_INT0LVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - PORT_INT0LVL_LO_gc = (0x01<<0), /* Low Level */ - PORT_INT0LVL_MED_gc = (0x02<<0), /* Medium Level */ - PORT_INT0LVL_HI_gc = (0x03<<0), /* High Level */ -} PORT_INT0LVL_t; - -/* Port Interrupt 1 Level */ -typedef enum PORT_INT1LVL_enum -{ - PORT_INT1LVL_OFF_gc = (0x00<<2), /* Interrupt Disabled */ - PORT_INT1LVL_LO_gc = (0x01<<2), /* Low Level */ - PORT_INT1LVL_MED_gc = (0x02<<2), /* Medium Level */ - PORT_INT1LVL_HI_gc = (0x03<<2), /* High Level */ -} PORT_INT1LVL_t; - -/* Output/Pull Configuration */ -typedef enum PORT_OPC_enum -{ - PORT_OPC_TOTEM_gc = (0x00<<3), /* Totempole */ - PORT_OPC_BUSKEEPER_gc = (0x01<<3), /* Totempole w/ Bus keeper on Input and Output */ - PORT_OPC_PULLDOWN_gc = (0x02<<3), /* Totempole w/ Pull-down on Input */ - PORT_OPC_PULLUP_gc = (0x03<<3), /* Totempole w/ Pull-up on Input */ - PORT_OPC_WIREDOR_gc = (0x04<<3), /* Wired OR */ - PORT_OPC_WIREDAND_gc = (0x05<<3), /* Wired AND */ - PORT_OPC_WIREDORPULL_gc = (0x06<<3), /* Wired OR w/ Pull-down */ - PORT_OPC_WIREDANDPULL_gc = (0x07<<3), /* Wired AND w/ Pull-up */ -} PORT_OPC_t; - -/* Input/Sense Configuration */ -typedef enum PORT_ISC_enum -{ - PORT_ISC_BOTHEDGES_gc = (0x00<<0), /* Sense Both Edges */ - PORT_ISC_RISING_gc = (0x01<<0), /* Sense Rising Edge */ - PORT_ISC_FALLING_gc = (0x02<<0), /* Sense Falling Edge */ - PORT_ISC_LEVEL_gc = (0x03<<0), /* Sense Level (Transparent For Events) */ - PORT_ISC_INPUT_DISABLE_gc = (0x07<<0), /* Disable Digital Input Buffer */ -} PORT_ISC_t; - - -/* --------------------------------------------------------------------------- -TC - 16-bit Timer/Counter With PWM --------------------------------------------------------------------------- -*/ - -/* 16-bit Timer/Counter 0 */ -typedef struct TC0_struct -{ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t CTRLC; /* Control register C */ - register8_t CTRLD; /* Control Register D */ - register8_t CTRLE; /* Control Register E */ - register8_t reserved_0x05; - register8_t INTCTRLA; /* Interrupt Control Register A */ - register8_t INTCTRLB; /* Interrupt Control Register B */ - register8_t CTRLFCLR; /* Control Register F Clear */ - register8_t CTRLFSET; /* Control Register F Set */ - register8_t CTRLGCLR; /* Control Register G Clear */ - register8_t CTRLGSET; /* Control Register G Set */ - register8_t INTFLAGS; /* Interrupt Flag Register */ - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t TEMP; /* Temporary Register For 16-bit Access */ - register8_t reserved_0x10; - register8_t reserved_0x11; - register8_t reserved_0x12; - register8_t reserved_0x13; - register8_t reserved_0x14; - register8_t reserved_0x15; - register8_t reserved_0x16; - register8_t reserved_0x17; - register8_t reserved_0x18; - register8_t reserved_0x19; - register8_t reserved_0x1A; - register8_t reserved_0x1B; - register8_t reserved_0x1C; - register8_t reserved_0x1D; - register8_t reserved_0x1E; - register8_t reserved_0x1F; - _WORDREGISTER(CNT); /* Count */ - register8_t reserved_0x22; - register8_t reserved_0x23; - register8_t reserved_0x24; - register8_t reserved_0x25; - _WORDREGISTER(PER); /* Period */ - _WORDREGISTER(CCA); /* Compare or Capture A */ - _WORDREGISTER(CCB); /* Compare or Capture B */ - _WORDREGISTER(CCC); /* Compare or Capture C */ - _WORDREGISTER(CCD); /* Compare or Capture D */ - register8_t reserved_0x30; - register8_t reserved_0x31; - register8_t reserved_0x32; - register8_t reserved_0x33; - register8_t reserved_0x34; - register8_t reserved_0x35; - _WORDREGISTER(PERBUF); /* Period Buffer */ - _WORDREGISTER(CCABUF); /* Compare Or Capture A Buffer */ - _WORDREGISTER(CCBBUF); /* Compare Or Capture B Buffer */ - _WORDREGISTER(CCCBUF); /* Compare Or Capture C Buffer */ - _WORDREGISTER(CCDBUF); /* Compare Or Capture D Buffer */ -} TC0_t; - -/* --------------------------------------------------------------------------- -TC - 16-bit Timer/Counter With PWM --------------------------------------------------------------------------- -*/ - -/* 16-bit Timer/Counter 1 */ -typedef struct TC1_struct -{ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t CTRLC; /* Control register C */ - register8_t CTRLD; /* Control Register D */ - register8_t CTRLE; /* Control Register E */ - register8_t reserved_0x05; - register8_t INTCTRLA; /* Interrupt Control Register A */ - register8_t INTCTRLB; /* Interrupt Control Register B */ - register8_t CTRLFCLR; /* Control Register F Clear */ - register8_t CTRLFSET; /* Control Register F Set */ - register8_t CTRLGCLR; /* Control Register G Clear */ - register8_t CTRLGSET; /* Control Register G Set */ - register8_t INTFLAGS; /* Interrupt Flag Register */ - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t TEMP; /* Temporary Register For 16-bit Access */ - register8_t reserved_0x10; - register8_t reserved_0x11; - register8_t reserved_0x12; - register8_t reserved_0x13; - register8_t reserved_0x14; - register8_t reserved_0x15; - register8_t reserved_0x16; - register8_t reserved_0x17; - register8_t reserved_0x18; - register8_t reserved_0x19; - register8_t reserved_0x1A; - register8_t reserved_0x1B; - register8_t reserved_0x1C; - register8_t reserved_0x1D; - register8_t reserved_0x1E; - register8_t reserved_0x1F; - _WORDREGISTER(CNT); /* Count */ - register8_t reserved_0x22; - register8_t reserved_0x23; - register8_t reserved_0x24; - register8_t reserved_0x25; - _WORDREGISTER(PER); /* Period */ - _WORDREGISTER(CCA); /* Compare or Capture A */ - _WORDREGISTER(CCB); /* Compare or Capture B */ - register8_t reserved_0x2C; - register8_t reserved_0x2D; - register8_t reserved_0x2E; - register8_t reserved_0x2F; - register8_t reserved_0x30; - register8_t reserved_0x31; - register8_t reserved_0x32; - register8_t reserved_0x33; - register8_t reserved_0x34; - register8_t reserved_0x35; - _WORDREGISTER(PERBUF); /* Period Buffer */ - _WORDREGISTER(CCABUF); /* Compare Or Capture A Buffer */ - _WORDREGISTER(CCBBUF); /* Compare Or Capture B Buffer */ -} TC1_t; - -/* --------------------------------------------------------------------------- -TC - 16-bit Timer/Counter With PWM --------------------------------------------------------------------------- -*/ - -/* Advanced Waveform Extension */ -typedef struct AWEX_struct -{ - register8_t CTRL; /* Control Register */ - register8_t reserved_0x01; - register8_t FDEVMASK; /* Fault Detection Event Mask */ - register8_t FDCTRL; /* Fault Detection Control Register */ - register8_t STATUS; /* Status Register */ - register8_t reserved_0x05; - register8_t DTBOTH; /* Dead Time Both Sides */ - register8_t DTBOTHBUF; /* Dead Time Both Sides Buffer */ - register8_t DTLS; /* Dead Time Low Side */ - register8_t DTHS; /* Dead Time High Side */ - register8_t DTLSBUF; /* Dead Time Low Side Buffer */ - register8_t DTHSBUF; /* Dead Time High Side Buffer */ - register8_t OUTOVEN; /* Output Override Enable */ -} AWEX_t; - -/* --------------------------------------------------------------------------- -TC - 16-bit Timer/Counter With PWM --------------------------------------------------------------------------- -*/ - -/* High-Resolution Extension */ -typedef struct HIRES_struct -{ - register8_t CTRL; /* Control Register */ -} HIRES_t; - -/* Clock Selection */ -typedef enum TC_CLKSEL_enum -{ - TC_CLKSEL_OFF_gc = (0x00<<0), /* Timer Off */ - TC_CLKSEL_DIV1_gc = (0x01<<0), /* System Clock */ - TC_CLKSEL_DIV2_gc = (0x02<<0), /* System Clock / 2 */ - TC_CLKSEL_DIV4_gc = (0x03<<0), /* System Clock / 4 */ - TC_CLKSEL_DIV8_gc = (0x04<<0), /* System Clock / 8 */ - TC_CLKSEL_DIV64_gc = (0x05<<0), /* System Clock / 64 */ - TC_CLKSEL_DIV256_gc = (0x06<<0), /* System Clock / 256 */ - TC_CLKSEL_DIV1024_gc = (0x07<<0), /* System Clock / 1024 */ - TC_CLKSEL_EVCH0_gc = (0x08<<0), /* Event Channel 0 */ - TC_CLKSEL_EVCH1_gc = (0x09<<0), /* Event Channel 1 */ - TC_CLKSEL_EVCH2_gc = (0x0A<<0), /* Event Channel 2 */ - TC_CLKSEL_EVCH3_gc = (0x0B<<0), /* Event Channel 3 */ - TC_CLKSEL_EVCH4_gc = (0x0C<<0), /* Event Channel 4 */ - TC_CLKSEL_EVCH5_gc = (0x0D<<0), /* Event Channel 5 */ - TC_CLKSEL_EVCH6_gc = (0x0E<<0), /* Event Channel 6 */ - TC_CLKSEL_EVCH7_gc = (0x0F<<0), /* Event Channel 7 */ -} TC_CLKSEL_t; - -/* Waveform Generation Mode */ -typedef enum TC_WGMODE_enum -{ - TC_WGMODE_NORMAL_gc = (0x00<<0), /* Normal Mode */ - TC_WGMODE_FRQ_gc = (0x01<<0), /* Frequency Generation Mode */ - TC_WGMODE_SS_gc = (0x03<<0), /* Single Slope */ - TC_WGMODE_DS_T_gc = (0x05<<0), /* Dual Slope, Update on TOP */ - TC_WGMODE_DS_TB_gc = (0x06<<0), /* Dual Slope, Update on TOP and BOTTOM */ - TC_WGMODE_DS_B_gc = (0x07<<0), /* Dual Slope, Update on BOTTOM */ -} TC_WGMODE_t; - -/* Event Action */ -typedef enum TC_EVACT_enum -{ - TC_EVACT_OFF_gc = (0x00<<5), /* No Event Action */ - TC_EVACT_CAPT_gc = (0x01<<5), /* Input Capture */ - TC_EVACT_UPDOWN_gc = (0x02<<5), /* Externally Controlled Up/Down Count */ - TC_EVACT_QDEC_gc = (0x03<<5), /* Quadrature Decode */ - TC_EVACT_RESTART_gc = (0x04<<5), /* Restart */ - TC_EVACT_FRW_gc = (0x05<<5), /* Frequency Capture */ - TC_EVACT_PW_gc = (0x06<<5), /* Pulse-width Capture */ -} TC_EVACT_t; - -/* Event Selection */ -typedef enum TC_EVSEL_enum -{ - TC_EVSEL_OFF_gc = (0x00<<0), /* No Event Source */ - TC_EVSEL_CH0_gc = (0x08<<0), /* Event Channel 0 */ - TC_EVSEL_CH1_gc = (0x09<<0), /* Event Channel 1 */ - TC_EVSEL_CH2_gc = (0x0A<<0), /* Event Channel 2 */ - TC_EVSEL_CH3_gc = (0x0B<<0), /* Event Channel 3 */ - TC_EVSEL_CH4_gc = (0x0C<<0), /* Event Channel 4 */ - TC_EVSEL_CH5_gc = (0x0D<<0), /* Event Channel 5 */ - TC_EVSEL_CH6_gc = (0x0E<<0), /* Event Channel 6 */ - TC_EVSEL_CH7_gc = (0x0F<<0), /* Event Channel 7 */ -} TC_EVSEL_t; - -/* Error Interrupt Level */ -typedef enum TC_ERRINTLVL_enum -{ - TC_ERRINTLVL_OFF_gc = (0x00<<2), /* Interrupt Disabled */ - TC_ERRINTLVL_LO_gc = (0x01<<2), /* Low Level */ - TC_ERRINTLVL_MED_gc = (0x02<<2), /* Medium Level */ - TC_ERRINTLVL_HI_gc = (0x03<<2), /* High Level */ -} TC_ERRINTLVL_t; - -/* Overflow Interrupt Level */ -typedef enum TC_OVFINTLVL_enum -{ - TC_OVFINTLVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - TC_OVFINTLVL_LO_gc = (0x01<<0), /* Low Level */ - TC_OVFINTLVL_MED_gc = (0x02<<0), /* Medium Level */ - TC_OVFINTLVL_HI_gc = (0x03<<0), /* High Level */ -} TC_OVFINTLVL_t; - -/* Compare or Capture D Interrupt Level */ -typedef enum TC_CCDINTLVL_enum -{ - TC_CCDINTLVL_OFF_gc = (0x00<<6), /* Interrupt Disabled */ - TC_CCDINTLVL_LO_gc = (0x01<<6), /* Low Level */ - TC_CCDINTLVL_MED_gc = (0x02<<6), /* Medium Level */ - TC_CCDINTLVL_HI_gc = (0x03<<6), /* High Level */ -} TC_CCDINTLVL_t; - -/* Compare or Capture C Interrupt Level */ -typedef enum TC_CCCINTLVL_enum -{ - TC_CCCINTLVL_OFF_gc = (0x00<<4), /* Interrupt Disabled */ - TC_CCCINTLVL_LO_gc = (0x01<<4), /* Low Level */ - TC_CCCINTLVL_MED_gc = (0x02<<4), /* Medium Level */ - TC_CCCINTLVL_HI_gc = (0x03<<4), /* High Level */ -} TC_CCCINTLVL_t; - -/* Compare or Capture B Interrupt Level */ -typedef enum TC_CCBINTLVL_enum -{ - TC_CCBINTLVL_OFF_gc = (0x00<<2), /* Interrupt Disabled */ - TC_CCBINTLVL_LO_gc = (0x01<<2), /* Low Level */ - TC_CCBINTLVL_MED_gc = (0x02<<2), /* Medium Level */ - TC_CCBINTLVL_HI_gc = (0x03<<2), /* High Level */ -} TC_CCBINTLVL_t; - -/* Compare or Capture A Interrupt Level */ -typedef enum TC_CCAINTLVL_enum -{ - TC_CCAINTLVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - TC_CCAINTLVL_LO_gc = (0x01<<0), /* Low Level */ - TC_CCAINTLVL_MED_gc = (0x02<<0), /* Medium Level */ - TC_CCAINTLVL_HI_gc = (0x03<<0), /* High Level */ -} TC_CCAINTLVL_t; - -/* Timer/Counter Command */ -typedef enum TC_CMD_enum -{ - TC_CMD_NONE_gc = (0x00<<2), /* No Command */ - TC_CMD_UPDATE_gc = (0x01<<2), /* Force Update */ - TC_CMD_RESTART_gc = (0x02<<2), /* Force Restart */ - TC_CMD_RESET_gc = (0x03<<2), /* Force Hard Reset */ -} TC_CMD_t; - -/* Fault Detect Action */ -typedef enum AWEX_FDACT_enum -{ - AWEX_FDACT_NONE_gc = (0x00<<0), /* No Fault Protection */ - AWEX_FDACT_CLEAROE_gc = (0x01<<0), /* Clear Output Enable Bits */ - AWEX_FDACT_CLEARDIR_gc = (0x03<<0), /* Clear I/O Port Direction Bits */ -} AWEX_FDACT_t; - -/* High Resolution Enable */ -typedef enum HIRES_HREN_enum -{ - HIRES_HREN_NONE_gc = (0x00<<0), /* No Fault Protection */ - HIRES_HREN_TC0_gc = (0x01<<0), /* Enable High Resolution on Timer/Counter 0 */ - HIRES_HREN_TC1_gc = (0x02<<0), /* Enable High Resolution on Timer/Counter 1 */ - HIRES_HREN_BOTH_gc = (0x03<<0), /* Enable High Resolution both Timer/Counters */ -} HIRES_HREN_t; - - -/* --------------------------------------------------------------------------- -USART - Universal Asynchronous Receiver-Transmitter --------------------------------------------------------------------------- -*/ - -/* Universal Synchronous/Asynchronous Receiver/Transmitter */ -typedef struct USART_struct -{ - register8_t DATA; /* Data Register */ - register8_t STATUS; /* Status Register */ - register8_t reserved_0x02; - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t CTRLC; /* Control Register C */ - register8_t BAUDCTRLA; /* Baud Rate Control Register A */ - register8_t BAUDCTRLB; /* Baud Rate Control Register B */ -} USART_t; - -/* Receive Complete Interrupt level */ -typedef enum USART_RXCINTLVL_enum -{ - USART_RXCINTLVL_OFF_gc = (0x00<<4), /* Interrupt Disabled */ - USART_RXCINTLVL_LO_gc = (0x01<<4), /* Low Level */ - USART_RXCINTLVL_MED_gc = (0x02<<4), /* Medium Level */ - USART_RXCINTLVL_HI_gc = (0x03<<4), /* High Level */ -} USART_RXCINTLVL_t; - -/* Transmit Complete Interrupt level */ -typedef enum USART_TXCINTLVL_enum -{ - USART_TXCINTLVL_OFF_gc = (0x00<<2), /* Interrupt Disabled */ - USART_TXCINTLVL_LO_gc = (0x01<<2), /* Low Level */ - USART_TXCINTLVL_MED_gc = (0x02<<2), /* Medium Level */ - USART_TXCINTLVL_HI_gc = (0x03<<2), /* High Level */ -} USART_TXCINTLVL_t; - -/* Data Register Empty Interrupt level */ -typedef enum USART_DREINTLVL_enum -{ - USART_DREINTLVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - USART_DREINTLVL_LO_gc = (0x01<<0), /* Low Level */ - USART_DREINTLVL_MED_gc = (0x02<<0), /* Medium Level */ - USART_DREINTLVL_HI_gc = (0x03<<0), /* High Level */ -} USART_DREINTLVL_t; - -/* Character Size */ -typedef enum USART_CHSIZE_enum -{ - USART_CHSIZE_5BIT_gc = (0x00<<0), /* Character size: 5 bit */ - USART_CHSIZE_6BIT_gc = (0x01<<0), /* Character size: 6 bit */ - USART_CHSIZE_7BIT_gc = (0x02<<0), /* Character size: 7 bit */ - USART_CHSIZE_8BIT_gc = (0x03<<0), /* Character size: 8 bit */ - USART_CHSIZE_9BIT_gc = (0x07<<0), /* Character size: 9 bit */ -} USART_CHSIZE_t; - -/* Communication Mode */ -typedef enum USART_CMODE_enum -{ - USART_CMODE_ASYNCHRONOUS_gc = (0x00<<6), /* Asynchronous Mode */ - USART_CMODE_SYNCHRONOUS_gc = (0x01<<6), /* Synchronous Mode */ - USART_CMODE_IRDA_gc = (0x02<<6), /* IrDA Mode */ - USART_CMODE_MSPI_gc = (0x03<<6), /* Master SPI Mode */ -} USART_CMODE_t; - -/* Parity Mode */ -typedef enum USART_PMODE_enum -{ - USART_PMODE_DISABLED_gc = (0x00<<4), /* No Parity */ - USART_PMODE_EVEN_gc = (0x02<<4), /* Even Parity */ - USART_PMODE_ODD_gc = (0x03<<4), /* Odd Parity */ -} USART_PMODE_t; - - -/* --------------------------------------------------------------------------- -SPI - Serial Peripheral Interface --------------------------------------------------------------------------- -*/ - -/* Serial Peripheral Interface */ -typedef struct SPI_struct -{ - register8_t CTRL; /* Control Register */ - register8_t INTCTRL; /* Interrupt Control Register */ - register8_t STATUS; /* Status Register */ - register8_t DATA; /* Data Register */ -} SPI_t; - -/* SPI Mode */ -typedef enum SPI_MODE_enum -{ - SPI_MODE_0_gc = (0x00<<2), /* SPI Mode 0 */ - SPI_MODE_1_gc = (0x01<<2), /* SPI Mode 1 */ - SPI_MODE_2_gc = (0x02<<2), /* SPI Mode 2 */ - SPI_MODE_3_gc = (0x03<<2), /* SPI Mode 3 */ -} SPI_MODE_t; - -/* Prescaler setting */ -typedef enum SPI_PRESCALER_enum -{ - SPI_PRESCALER_DIV4_gc = (0x00<<0), /* System Clock / 4 */ - SPI_PRESCALER_DIV16_gc = (0x01<<0), /* System Clock / 16 */ - SPI_PRESCALER_DIV64_gc = (0x02<<0), /* System Clock / 64 */ - SPI_PRESCALER_DIV128_gc = (0x03<<0), /* System Clock / 128 */ -} SPI_PRESCALER_t; - -/* Interrupt level */ -typedef enum SPI_INTLVL_enum -{ - SPI_INTLVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - SPI_INTLVL_LO_gc = (0x01<<0), /* Low Level */ - SPI_INTLVL_MED_gc = (0x02<<0), /* Medium Level */ - SPI_INTLVL_HI_gc = (0x03<<0), /* High Level */ -} SPI_INTLVL_t; - - -/* --------------------------------------------------------------------------- -IRCOM - IR Communication Module --------------------------------------------------------------------------- -*/ - -/* IR Communication Module */ -typedef struct IRCOM_struct -{ - register8_t CTRL; /* Control Register */ - register8_t TXPLCTRL; /* IrDA Transmitter Pulse Length Control Register */ - register8_t RXPLCTRL; /* IrDA Receiver Pulse Length Control Register */ -} IRCOM_t; - -/* Event channel selection */ -typedef enum IRDA_EVSEL_enum -{ - IRDA_EVSEL_OFF_gc = (0x00<<0), /* No Event Source */ - IRDA_EVSEL_0_gc = (0x08<<0), /* Event Channel 0 */ - IRDA_EVSEL_1_gc = (0x09<<0), /* Event Channel 1 */ - IRDA_EVSEL_2_gc = (0x0A<<0), /* Event Channel 2 */ - IRDA_EVSEL_3_gc = (0x0B<<0), /* Event Channel 3 */ - IRDA_EVSEL_4_gc = (0x0C<<0), /* Event Channel 4 */ - IRDA_EVSEL_5_gc = (0x0D<<0), /* Event Channel 5 */ - IRDA_EVSEL_6_gc = (0x0E<<0), /* Event Channel 6 */ - IRDA_EVSEL_7_gc = (0x0F<<0), /* Event Channel 7 */ -} IRDA_EVSEL_t; - - -/* --------------------------------------------------------------------------- -AES - AES Module --------------------------------------------------------------------------- -*/ - -/* AES Module */ -typedef struct AES_struct -{ - register8_t CTRL; /* AES Control Register */ - register8_t STATUS; /* AES Status Register */ - register8_t STATE; /* AES State Register */ - register8_t KEY; /* AES Key Register */ - register8_t INTCTRL; /* AES Interrupt Control Register */ -} AES_t; - -/* Interrupt level */ -typedef enum AES_INTLVL_enum -{ - AES_INTLVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - AES_INTLVL_LO_gc = (0x01<<0), /* Low Level */ - AES_INTLVL_MED_gc = (0x02<<0), /* Medium Level */ - AES_INTLVL_HI_gc = (0x03<<0), /* High Level */ -} AES_INTLVL_t; - - - -/* -========================================================================== -IO Module Instances. Mapped to memory. -========================================================================== -*/ - -#define GPIO (*(GPIO_t *) 0x0000) /* General Purpose IO Registers */ -#define VPORT0 (*(VPORT_t *) 0x0010) /* Virtual Port 0 */ -#define VPORT1 (*(VPORT_t *) 0x0014) /* Virtual Port 1 */ -#define VPORT2 (*(VPORT_t *) 0x0018) /* Virtual Port 2 */ -#define VPORT3 (*(VPORT_t *) 0x001C) /* Virtual Port 3 */ -#define OCD (*(OCD_t *) 0x002E) /* On-Chip Debug System */ -#define CPU (*(CPU_t *) 0x0030) /* CPU Registers */ -#define CLK (*(CLK_t *) 0x0040) /* Clock System */ -#define SLEEP (*(SLEEP_t *) 0x0048) /* Sleep Controller */ -#define OSC (*(OSC_t *) 0x0050) /* Oscillator Control */ -#define DFLLRC32M (*(DFLL_t *) 0x0060) /* DFLL for 32MHz RC Oscillator */ -#define DFLLRC2M (*(DFLL_t *) 0x0068) /* DFLL for 2MHz RC Oscillator */ -#define PR (*(PR_t *) 0x0070) /* Power Reduction */ -#define RST (*(RST_t *) 0x0078) /* Reset Controller */ -#define WDT (*(WDT_t *) 0x0080) /* Watch-Dog Timer */ -#define MCU (*(MCU_t *) 0x0090) /* MCU Control */ -#define PMIC (*(PMIC_t *) 0x00A0) /* Programmable Interrupt Controller */ -#define PORTCFG (*(PORTCFG_t *) 0x00B0) /* Port Configuration */ -#define AES (*(AES_t *) 0x00C0) /* AES Crypto Module */ -#define DMA (*(DMA_t *) 0x0100) /* DMA Controller */ -#define EVSYS (*(EVSYS_t *) 0x0180) /* Event System */ -#define NVM (*(NVM_t *) 0x01C0) /* Non Volatile Memory Controller */ -#define ADCA (*(ADC_t *) 0x0200) /* Analog to Digital Converter A */ -#define ADCB (*(ADC_t *) 0x0240) /* Analog to Digital Converter B */ -#define DACB (*(DAC_t *) 0x0320) /* Digital to Analog Converter B */ -#define ACA (*(AC_t *) 0x0380) /* Analog Comparator A */ -#define ACB (*(AC_t *) 0x0390) /* Analog Comparator B */ -#define RTC (*(RTC_t *) 0x0400) /* Real-Time Counter */ -#define TWIC (*(TWI_t *) 0x0480) /* Two-Wire Interface C */ -#define TWIE (*(TWI_t *) 0x04A0) /* Two-Wire Interface E */ -#define PORTA (*(PORT_t *) 0x0600) /* Port A */ -#define PORTB (*(PORT_t *) 0x0620) /* Port B */ -#define PORTC (*(PORT_t *) 0x0640) /* Port C */ -#define PORTD (*(PORT_t *) 0x0660) /* Port D */ -#define PORTE (*(PORT_t *) 0x0680) /* Port E */ -#define PORTF (*(PORT_t *) 0x06A0) /* Port F */ -#define PORTR (*(PORT_t *) 0x07E0) /* Port R */ -#define TCC0 (*(TC0_t *) 0x0800) /* Timer/Counter C0 */ -#define TCC1 (*(TC1_t *) 0x0840) /* Timer/Counter C1 */ -#define AWEXC (*(AWEX_t *) 0x0880) /* Advanced Waveform Extension C */ -#define HIRESC (*(HIRES_t *) 0x0890) /* High-Resolution Extension C */ -#define USARTC0 (*(USART_t *) 0x08A0) /* Universal Asynchronous Receiver-Transmitter C0 */ -#define USARTC1 (*(USART_t *) 0x08B0) /* Universal Asynchronous Receiver-Transmitter C1 */ -#define SPIC (*(SPI_t *) 0x08C0) /* Serial Peripheral Interface C */ -#define IRCOM (*(IRCOM_t *) 0x08F8) /* IR Communication Module */ -#define TCD0 (*(TC0_t *) 0x0900) /* Timer/Counter D0 */ -#define TCD1 (*(TC1_t *) 0x0940) /* Timer/Counter D1 */ -#define HIRESD (*(HIRES_t *) 0x0990) /* High-Resolution Extension D */ -#define USARTD0 (*(USART_t *) 0x09A0) /* Universal Asynchronous Receiver-Transmitter D0 */ -#define USARTD1 (*(USART_t *) 0x09B0) /* Universal Asynchronous Receiver-Transmitter D1 */ -#define SPID (*(SPI_t *) 0x09C0) /* Serial Peripheral Interface D */ -#define TCE0 (*(TC0_t *) 0x0A00) /* Timer/Counter E0 */ -#define TCE1 (*(TC1_t *) 0x0A40) /* Timer/Counter E1 */ -#define AWEXE (*(AWEX_t *) 0x0A80) /* Advanced Waveform Extension E */ -#define HIRESE (*(HIRES_t *) 0x0A90) /* High-Resolution Extension E */ -#define USARTE0 (*(USART_t *) 0x0AA0) /* Universal Asynchronous Receiver-Transmitter E0 */ -#define USARTE1 (*(USART_t *) 0x0AB0) /* Universal Asynchronous Receiver-Transmitter E1 */ -#define SPIE (*(SPI_t *) 0x0AC0) /* Serial Peripheral Interface E */ -#define TCF0 (*(TC0_t *) 0x0B00) /* Timer/Counter F0 */ -#define HIRESF (*(HIRES_t *) 0x0B90) /* High-Resolution Extension F */ -#define USARTF0 (*(USART_t *) 0x0BA0) /* Universal Asynchronous Receiver-Transmitter F0 */ -#define USARTF1 (*(USART_t *) 0x0BB0) /* Universal Asynchronous Receiver-Transmitter F1 */ -#define SPIF (*(SPI_t *) 0x0BC0) /* Serial Peripheral Interface F */ - - -#endif /* !defined (__ASSEMBLER__) */ - - -/* ========== Flattened fully qualified IO register names ========== */ - -/* GPIO - General Purpose IO Registers */ -#define GPIO_GPIO0 _SFR_MEM8(0x0000) -#define GPIO_GPIO1 _SFR_MEM8(0x0001) -#define GPIO_GPIO2 _SFR_MEM8(0x0002) -#define GPIO_GPIO3 _SFR_MEM8(0x0003) -#define GPIO_GPIO4 _SFR_MEM8(0x0004) -#define GPIO_GPIO5 _SFR_MEM8(0x0005) -#define GPIO_GPIO6 _SFR_MEM8(0x0006) -#define GPIO_GPIO7 _SFR_MEM8(0x0007) -#define GPIO_GPIO8 _SFR_MEM8(0x0008) -#define GPIO_GPIO9 _SFR_MEM8(0x0009) -#define GPIO_GPIOA _SFR_MEM8(0x000A) -#define GPIO_GPIOB _SFR_MEM8(0x000B) -#define GPIO_GPIOC _SFR_MEM8(0x000C) -#define GPIO_GPIOD _SFR_MEM8(0x000D) -#define GPIO_GPIOE _SFR_MEM8(0x000E) -#define GPIO_GPIOF _SFR_MEM8(0x000F) - -/* VPORT0 - Virtual Port 0 */ -#define VPORT0_DIR _SFR_MEM8(0x0010) -#define VPORT0_OUT _SFR_MEM8(0x0011) -#define VPORT0_IN _SFR_MEM8(0x0012) -#define VPORT0_INTFLAGS _SFR_MEM8(0x0013) - -/* VPORT1 - Virtual Port 1 */ -#define VPORT1_DIR _SFR_MEM8(0x0014) -#define VPORT1_OUT _SFR_MEM8(0x0015) -#define VPORT1_IN _SFR_MEM8(0x0016) -#define VPORT1_INTFLAGS _SFR_MEM8(0x0017) - -/* VPORT2 - Virtual Port 2 */ -#define VPORT2_DIR _SFR_MEM8(0x0018) -#define VPORT2_OUT _SFR_MEM8(0x0019) -#define VPORT2_IN _SFR_MEM8(0x001A) -#define VPORT2_INTFLAGS _SFR_MEM8(0x001B) - -/* VPORT3 - Virtual Port 3 */ -#define VPORT3_DIR _SFR_MEM8(0x001C) -#define VPORT3_OUT _SFR_MEM8(0x001D) -#define VPORT3_IN _SFR_MEM8(0x001E) -#define VPORT3_INTFLAGS _SFR_MEM8(0x001F) - -/* OCD - On-Chip Debug System */ -#define OCD_OCDR0 _SFR_MEM8(0x002E) -#define OCD_OCDR1 _SFR_MEM8(0x002F) - -/* CPU - CPU Registers */ -#define CPU_CCP _SFR_MEM8(0x0034) -#define CPU_RAMPD _SFR_MEM8(0x0038) -#define CPU_RAMPX _SFR_MEM8(0x0039) -#define CPU_RAMPY _SFR_MEM8(0x003A) -#define CPU_RAMPZ _SFR_MEM8(0x003B) -#define CPU_EIND _SFR_MEM8(0x003C) -#define CPU_SPL _SFR_MEM8(0x003D) -#define CPU_SPH _SFR_MEM8(0x003E) -#define CPU_SREG _SFR_MEM8(0x003F) - -/* CLK - Clock System */ -#define CLK_CTRL _SFR_MEM8(0x0040) -#define CLK_PSCTRL _SFR_MEM8(0x0041) -#define CLK_LOCK _SFR_MEM8(0x0042) -#define CLK_RTCCTRL _SFR_MEM8(0x0043) - -/* SLEEP - Sleep Controller */ -#define SLEEP_CTRL _SFR_MEM8(0x0048) - -/* OSC - Oscillator Control */ -#define OSC_CTRL _SFR_MEM8(0x0050) -#define OSC_STATUS _SFR_MEM8(0x0051) -#define OSC_XOSCCTRL _SFR_MEM8(0x0052) -#define OSC_XOSCFAIL _SFR_MEM8(0x0053) -#define OSC_RC32KCAL _SFR_MEM8(0x0054) -#define OSC_PLLCTRL _SFR_MEM8(0x0055) -#define OSC_DFLLCTRL _SFR_MEM8(0x0056) - -/* DFLLRC32M - DFLL for 32MHz RC Oscillator */ -#define DFLLRC32M_CTRL _SFR_MEM8(0x0060) -#define DFLLRC32M_CALA _SFR_MEM8(0x0062) -#define DFLLRC32M_CALB _SFR_MEM8(0x0063) -#define DFLLRC32M_OSCCNT0 _SFR_MEM8(0x0064) -#define DFLLRC32M_OSCCNT1 _SFR_MEM8(0x0065) -#define DFLLRC32M_OSCCNT2 _SFR_MEM8(0x0066) - -/* DFLLRC2M - DFLL for 2MHz RC Oscillator */ -#define DFLLRC2M_CTRL _SFR_MEM8(0x0068) -#define DFLLRC2M_CALA _SFR_MEM8(0x006A) -#define DFLLRC2M_CALB _SFR_MEM8(0x006B) -#define DFLLRC2M_OSCCNT0 _SFR_MEM8(0x006C) -#define DFLLRC2M_OSCCNT1 _SFR_MEM8(0x006D) -#define DFLLRC2M_OSCCNT2 _SFR_MEM8(0x006E) - -/* PR - Power Reduction */ -#define PR_PR _SFR_MEM8(0x0070) -#define PR_PRPA _SFR_MEM8(0x0071) -#define PR_PRPB _SFR_MEM8(0x0072) -#define PR_PRPC _SFR_MEM8(0x0073) -#define PR_PRPD _SFR_MEM8(0x0074) -#define PR_PRPE _SFR_MEM8(0x0075) -#define PR_PRPF _SFR_MEM8(0x0076) - -/* RST - Reset Controller */ -#define RST_STATUS _SFR_MEM8(0x0078) -#define RST_CTRL _SFR_MEM8(0x0079) - -/* WDT - Watch-Dog Timer */ -#define WDT_CTRL _SFR_MEM8(0x0080) -#define WDT_WINCTRL _SFR_MEM8(0x0081) -#define WDT_STATUS _SFR_MEM8(0x0082) - -/* MCU - MCU Control */ -#define MCU_DEVID0 _SFR_MEM8(0x0090) -#define MCU_DEVID1 _SFR_MEM8(0x0091) -#define MCU_DEVID2 _SFR_MEM8(0x0092) -#define MCU_REVID _SFR_MEM8(0x0093) -#define MCU_JTAGUID _SFR_MEM8(0x0094) -#define MCU_MCUCR _SFR_MEM8(0x0096) -#define MCU_EVSYSLOCK _SFR_MEM8(0x0098) -#define MCU_AWEXLOCK _SFR_MEM8(0x0099) - -/* PMIC - Programmable Interrupt Controller */ -#define PMIC_STATUS _SFR_MEM8(0x00A0) -#define PMIC_INTPRI _SFR_MEM8(0x00A1) -#define PMIC_CTRL _SFR_MEM8(0x00A2) - -/* PORTCFG - Port Configuration */ -#define PORTCFG_MPCMASK _SFR_MEM8(0x00B0) -#define PORTCFG_VPCTRLA _SFR_MEM8(0x00B2) -#define PORTCFG_VPCTRLB _SFR_MEM8(0x00B3) -#define PORTCFG_CLKEVOUT _SFR_MEM8(0x00B4) - -/* AES - AES Crypto Module */ -#define AES_CTRL _SFR_MEM8(0x00C0) -#define AES_STATUS _SFR_MEM8(0x00C1) -#define AES_STATE _SFR_MEM8(0x00C2) -#define AES_KEY _SFR_MEM8(0x00C3) -#define AES_INTCTRL _SFR_MEM8(0x00C4) - -/* DMA - DMA Controller */ -#define DMA_CTRL _SFR_MEM8(0x0100) -#define DMA_INTFLAGS _SFR_MEM8(0x0103) -#define DMA_STATUS _SFR_MEM8(0x0104) -#define DMA_TEMP _SFR_MEM16(0x0106) -#define DMA_CH0_CTRLA _SFR_MEM8(0x0110) -#define DMA_CH0_CTRLB _SFR_MEM8(0x0111) -#define DMA_CH0_ADDRCTRL _SFR_MEM8(0x0112) -#define DMA_CH0_TRIGSRC _SFR_MEM8(0x0113) -#define DMA_CH0_TRFCNT _SFR_MEM16(0x0114) -#define DMA_CH0_REPCNT _SFR_MEM8(0x0116) -#define DMA_CH0_SRCADDR0 _SFR_MEM8(0x0118) -#define DMA_CH0_SRCADDR1 _SFR_MEM8(0x0119) -#define DMA_CH0_SRCADDR2 _SFR_MEM8(0x011A) -#define DMA_CH0_DESTADDR0 _SFR_MEM8(0x011C) -#define DMA_CH0_DESTADDR1 _SFR_MEM8(0x011D) -#define DMA_CH0_DESTADDR2 _SFR_MEM8(0x011E) -#define DMA_CH1_CTRLA _SFR_MEM8(0x0120) -#define DMA_CH1_CTRLB _SFR_MEM8(0x0121) -#define DMA_CH1_ADDRCTRL _SFR_MEM8(0x0122) -#define DMA_CH1_TRIGSRC _SFR_MEM8(0x0123) -#define DMA_CH1_TRFCNT _SFR_MEM16(0x0124) -#define DMA_CH1_REPCNT _SFR_MEM8(0x0126) -#define DMA_CH1_SRCADDR0 _SFR_MEM8(0x0128) -#define DMA_CH1_SRCADDR1 _SFR_MEM8(0x0129) -#define DMA_CH1_SRCADDR2 _SFR_MEM8(0x012A) -#define DMA_CH1_DESTADDR0 _SFR_MEM8(0x012C) -#define DMA_CH1_DESTADDR1 _SFR_MEM8(0x012D) -#define DMA_CH1_DESTADDR2 _SFR_MEM8(0x012E) -#define DMA_CH2_CTRLA _SFR_MEM8(0x0130) -#define DMA_CH2_CTRLB _SFR_MEM8(0x0131) -#define DMA_CH2_ADDRCTRL _SFR_MEM8(0x0132) -#define DMA_CH2_TRIGSRC _SFR_MEM8(0x0133) -#define DMA_CH2_TRFCNT _SFR_MEM16(0x0134) -#define DMA_CH2_REPCNT _SFR_MEM8(0x0136) -#define DMA_CH2_SRCADDR0 _SFR_MEM8(0x0138) -#define DMA_CH2_SRCADDR1 _SFR_MEM8(0x0139) -#define DMA_CH2_SRCADDR2 _SFR_MEM8(0x013A) -#define DMA_CH2_DESTADDR0 _SFR_MEM8(0x013C) -#define DMA_CH2_DESTADDR1 _SFR_MEM8(0x013D) -#define DMA_CH2_DESTADDR2 _SFR_MEM8(0x013E) -#define DMA_CH3_CTRLA _SFR_MEM8(0x0140) -#define DMA_CH3_CTRLB _SFR_MEM8(0x0141) -#define DMA_CH3_ADDRCTRL _SFR_MEM8(0x0142) -#define DMA_CH3_TRIGSRC _SFR_MEM8(0x0143) -#define DMA_CH3_TRFCNT _SFR_MEM16(0x0144) -#define DMA_CH3_REPCNT _SFR_MEM8(0x0146) -#define DMA_CH3_SRCADDR0 _SFR_MEM8(0x0148) -#define DMA_CH3_SRCADDR1 _SFR_MEM8(0x0149) -#define DMA_CH3_SRCADDR2 _SFR_MEM8(0x014A) -#define DMA_CH3_DESTADDR0 _SFR_MEM8(0x014C) -#define DMA_CH3_DESTADDR1 _SFR_MEM8(0x014D) -#define DMA_CH3_DESTADDR2 _SFR_MEM8(0x014E) - -/* EVSYS - Event System */ -#define EVSYS_CH0MUX _SFR_MEM8(0x0180) -#define EVSYS_CH1MUX _SFR_MEM8(0x0181) -#define EVSYS_CH2MUX _SFR_MEM8(0x0182) -#define EVSYS_CH3MUX _SFR_MEM8(0x0183) -#define EVSYS_CH4MUX _SFR_MEM8(0x0184) -#define EVSYS_CH5MUX _SFR_MEM8(0x0185) -#define EVSYS_CH6MUX _SFR_MEM8(0x0186) -#define EVSYS_CH7MUX _SFR_MEM8(0x0187) -#define EVSYS_CH0CTRL _SFR_MEM8(0x0188) -#define EVSYS_CH1CTRL _SFR_MEM8(0x0189) -#define EVSYS_CH2CTRL _SFR_MEM8(0x018A) -#define EVSYS_CH3CTRL _SFR_MEM8(0x018B) -#define EVSYS_CH4CTRL _SFR_MEM8(0x018C) -#define EVSYS_CH5CTRL _SFR_MEM8(0x018D) -#define EVSYS_CH6CTRL _SFR_MEM8(0x018E) -#define EVSYS_CH7CTRL _SFR_MEM8(0x018F) -#define EVSYS_STROBE _SFR_MEM8(0x0190) -#define EVSYS_DATA _SFR_MEM8(0x0191) - -/* NVM - Non Volatile Memory Controller */ -#define NVM_ADDR0 _SFR_MEM8(0x01C0) -#define NVM_ADDR1 _SFR_MEM8(0x01C1) -#define NVM_ADDR2 _SFR_MEM8(0x01C2) -#define NVM_DATA0 _SFR_MEM8(0x01C4) -#define NVM_DATA1 _SFR_MEM8(0x01C5) -#define NVM_DATA2 _SFR_MEM8(0x01C6) -#define NVM_CMD _SFR_MEM8(0x01CA) -#define NVM_CTRLA _SFR_MEM8(0x01CB) -#define NVM_CTRLB _SFR_MEM8(0x01CC) -#define NVM_INTCTRL _SFR_MEM8(0x01CD) -#define NVM_STATUS _SFR_MEM8(0x01CF) -#define NVM_LOCKBITS _SFR_MEM8(0x01D0) - -/* ADCA - Analog to Digital Converter A */ -#define ADCA_CTRLA _SFR_MEM8(0x0200) -#define ADCA_CTRLB _SFR_MEM8(0x0201) -#define ADCA_REFCTRL _SFR_MEM8(0x0202) -#define ADCA_EVCTRL _SFR_MEM8(0x0203) -#define ADCA_PRESCALER _SFR_MEM8(0x0204) -#define ADCA_CALCTRL _SFR_MEM8(0x0205) -#define ADCA_INTFLAGS _SFR_MEM8(0x0206) -#define ADCA_CALIB _SFR_MEM8(0x020C) -#define ADCA_CH0RES _SFR_MEM16(0x0210) -#define ADCA_CH1RES _SFR_MEM16(0x0212) -#define ADCA_CH2RES _SFR_MEM16(0x0214) -#define ADCA_CH3RES _SFR_MEM16(0x0216) -#define ADCA_CMP _SFR_MEM16(0x0218) -#define ADCA_CH0_CTRL _SFR_MEM8(0x0220) -#define ADCA_CH0_MUXCTRL _SFR_MEM8(0x0221) -#define ADCA_CH0_INTCTRL _SFR_MEM8(0x0222) -#define ADCA_CH0_INTFLAGS _SFR_MEM8(0x0223) -#define ADCA_CH0_RES _SFR_MEM16(0x0224) -#define ADCA_CH1_CTRL _SFR_MEM8(0x0228) -#define ADCA_CH1_MUXCTRL _SFR_MEM8(0x0229) -#define ADCA_CH1_INTCTRL _SFR_MEM8(0x022A) -#define ADCA_CH1_INTFLAGS _SFR_MEM8(0x022B) -#define ADCA_CH1_RES _SFR_MEM16(0x022C) -#define ADCA_CH2_CTRL _SFR_MEM8(0x0230) -#define ADCA_CH2_MUXCTRL _SFR_MEM8(0x0231) -#define ADCA_CH2_INTCTRL _SFR_MEM8(0x0232) -#define ADCA_CH2_INTFLAGS _SFR_MEM8(0x0233) -#define ADCA_CH2_RES _SFR_MEM16(0x0234) -#define ADCA_CH3_CTRL _SFR_MEM8(0x0238) -#define ADCA_CH3_MUXCTRL _SFR_MEM8(0x0239) -#define ADCA_CH3_INTCTRL _SFR_MEM8(0x023A) -#define ADCA_CH3_INTFLAGS _SFR_MEM8(0x023B) -#define ADCA_CH3_RES _SFR_MEM16(0x023C) - -/* ADCB - Analog to Digital Converter B */ -#define ADCB_CTRLA _SFR_MEM8(0x0240) -#define ADCB_CTRLB _SFR_MEM8(0x0241) -#define ADCB_REFCTRL _SFR_MEM8(0x0242) -#define ADCB_EVCTRL _SFR_MEM8(0x0243) -#define ADCB_PRESCALER _SFR_MEM8(0x0244) -#define ADCB_CALCTRL _SFR_MEM8(0x0245) -#define ADCB_INTFLAGS _SFR_MEM8(0x0246) -#define ADCB_CALIB _SFR_MEM8(0x024C) -#define ADCB_CH0RES _SFR_MEM16(0x0250) -#define ADCB_CH1RES _SFR_MEM16(0x0252) -#define ADCB_CH2RES _SFR_MEM16(0x0254) -#define ADCB_CH3RES _SFR_MEM16(0x0256) -#define ADCB_CMP _SFR_MEM16(0x0258) -#define ADCB_CH0_CTRL _SFR_MEM8(0x0260) -#define ADCB_CH0_MUXCTRL _SFR_MEM8(0x0261) -#define ADCB_CH0_INTCTRL _SFR_MEM8(0x0262) -#define ADCB_CH0_INTFLAGS _SFR_MEM8(0x0263) -#define ADCB_CH0_RES _SFR_MEM16(0x0264) -#define ADCB_CH1_CTRL _SFR_MEM8(0x0268) -#define ADCB_CH1_MUXCTRL _SFR_MEM8(0x0269) -#define ADCB_CH1_INTCTRL _SFR_MEM8(0x026A) -#define ADCB_CH1_INTFLAGS _SFR_MEM8(0x026B) -#define ADCB_CH1_RES _SFR_MEM16(0x026C) -#define ADCB_CH2_CTRL _SFR_MEM8(0x0270) -#define ADCB_CH2_MUXCTRL _SFR_MEM8(0x0271) -#define ADCB_CH2_INTCTRL _SFR_MEM8(0x0272) -#define ADCB_CH2_INTFLAGS _SFR_MEM8(0x0273) -#define ADCB_CH2_RES _SFR_MEM16(0x0274) -#define ADCB_CH3_CTRL _SFR_MEM8(0x0278) -#define ADCB_CH3_MUXCTRL _SFR_MEM8(0x0279) -#define ADCB_CH3_INTCTRL _SFR_MEM8(0x027A) -#define ADCB_CH3_INTFLAGS _SFR_MEM8(0x027B) -#define ADCB_CH3_RES _SFR_MEM16(0x027C) - -/* DACB - Digital to Analog Converter B */ -#define DACB_CTRLA _SFR_MEM8(0x0320) -#define DACB_CTRLB _SFR_MEM8(0x0321) -#define DACB_CTRLC _SFR_MEM8(0x0322) -#define DACB_EVCTRL _SFR_MEM8(0x0323) -#define DACB_TIMCTRL _SFR_MEM8(0x0324) -#define DACB_STATUS _SFR_MEM8(0x0325) -#define DACB_GAINCAL _SFR_MEM8(0x0328) -#define DACB_OFFSETCAL _SFR_MEM8(0x0329) -#define DACB_CH0DATA _SFR_MEM16(0x0338) -#define DACB_CH1DATA _SFR_MEM16(0x033A) - -/* ACA - Analog Comparator A */ -#define ACA_AC0CTRL _SFR_MEM8(0x0380) -#define ACA_AC1CTRL _SFR_MEM8(0x0381) -#define ACA_AC0MUXCTRL _SFR_MEM8(0x0382) -#define ACA_AC1MUXCTRL _SFR_MEM8(0x0383) -#define ACA_CTRLA _SFR_MEM8(0x0384) -#define ACA_CTRLB _SFR_MEM8(0x0385) -#define ACA_WINCTRL _SFR_MEM8(0x0386) -#define ACA_STATUS _SFR_MEM8(0x0387) - -/* ACB - Analog Comparator B */ -#define ACB_AC0CTRL _SFR_MEM8(0x0390) -#define ACB_AC1CTRL _SFR_MEM8(0x0391) -#define ACB_AC0MUXCTRL _SFR_MEM8(0x0392) -#define ACB_AC1MUXCTRL _SFR_MEM8(0x0393) -#define ACB_CTRLA _SFR_MEM8(0x0394) -#define ACB_CTRLB _SFR_MEM8(0x0395) -#define ACB_WINCTRL _SFR_MEM8(0x0396) -#define ACB_STATUS _SFR_MEM8(0x0397) - -/* RTC - Real-Time Counter */ -#define RTC_CTRL _SFR_MEM8(0x0400) -#define RTC_STATUS _SFR_MEM8(0x0401) -#define RTC_INTCTRL _SFR_MEM8(0x0402) -#define RTC_INTFLAGS _SFR_MEM8(0x0403) -#define RTC_TEMP _SFR_MEM8(0x0404) -#define RTC_CNT _SFR_MEM16(0x0408) -#define RTC_PER _SFR_MEM16(0x040A) -#define RTC_COMP _SFR_MEM16(0x040C) - -/* TWIC - Two-Wire Interface C */ -#define TWIC_CTRL _SFR_MEM8(0x0480) -#define TWIC_MASTER_CTRLA _SFR_MEM8(0x0481) -#define TWIC_MASTER_CTRLB _SFR_MEM8(0x0482) -#define TWIC_MASTER_CTRLC _SFR_MEM8(0x0483) -#define TWIC_MASTER_STATUS _SFR_MEM8(0x0484) -#define TWIC_MASTER_BAUD _SFR_MEM8(0x0485) -#define TWIC_MASTER_ADDR _SFR_MEM8(0x0486) -#define TWIC_MASTER_DATA _SFR_MEM8(0x0487) -#define TWIC_SLAVE_CTRLA _SFR_MEM8(0x0488) -#define TWIC_SLAVE_CTRLB _SFR_MEM8(0x0489) -#define TWIC_SLAVE_STATUS _SFR_MEM8(0x048A) -#define TWIC_SLAVE_ADDR _SFR_MEM8(0x048B) -#define TWIC_SLAVE_DATA _SFR_MEM8(0x048C) - -/* TWIE - Two-Wire Interface E */ -#define TWIE_CTRL _SFR_MEM8(0x04A0) -#define TWIE_MASTER_CTRLA _SFR_MEM8(0x04A1) -#define TWIE_MASTER_CTRLB _SFR_MEM8(0x04A2) -#define TWIE_MASTER_CTRLC _SFR_MEM8(0x04A3) -#define TWIE_MASTER_STATUS _SFR_MEM8(0x04A4) -#define TWIE_MASTER_BAUD _SFR_MEM8(0x04A5) -#define TWIE_MASTER_ADDR _SFR_MEM8(0x04A6) -#define TWIE_MASTER_DATA _SFR_MEM8(0x04A7) -#define TWIE_SLAVE_CTRLA _SFR_MEM8(0x04A8) -#define TWIE_SLAVE_CTRLB _SFR_MEM8(0x04A9) -#define TWIE_SLAVE_STATUS _SFR_MEM8(0x04AA) -#define TWIE_SLAVE_ADDR _SFR_MEM8(0x04AB) -#define TWIE_SLAVE_DATA _SFR_MEM8(0x04AC) - -/* PORTA - Port A */ -#define PORTA_DIR _SFR_MEM8(0x0600) -#define PORTA_DIRSET _SFR_MEM8(0x0601) -#define PORTA_DIRCLR _SFR_MEM8(0x0602) -#define PORTA_DIRTGL _SFR_MEM8(0x0603) -#define PORTA_OUT _SFR_MEM8(0x0604) -#define PORTA_OUTSET _SFR_MEM8(0x0605) -#define PORTA_OUTCLR _SFR_MEM8(0x0606) -#define PORTA_OUTTGL _SFR_MEM8(0x0607) -#define PORTA_IN _SFR_MEM8(0x0608) -#define PORTA_INTCTRL _SFR_MEM8(0x0609) -#define PORTA_INT0MASK _SFR_MEM8(0x060A) -#define PORTA_INT1MASK _SFR_MEM8(0x060B) -#define PORTA_INTFLAGS _SFR_MEM8(0x060C) -#define PORTA_PIN0CTRL _SFR_MEM8(0x0610) -#define PORTA_PIN1CTRL _SFR_MEM8(0x0611) -#define PORTA_PIN2CTRL _SFR_MEM8(0x0612) -#define PORTA_PIN3CTRL _SFR_MEM8(0x0613) -#define PORTA_PIN4CTRL _SFR_MEM8(0x0614) -#define PORTA_PIN5CTRL _SFR_MEM8(0x0615) -#define PORTA_PIN6CTRL _SFR_MEM8(0x0616) -#define PORTA_PIN7CTRL _SFR_MEM8(0x0617) - -/* PORTB - Port B */ -#define PORTB_DIR _SFR_MEM8(0x0620) -#define PORTB_DIRSET _SFR_MEM8(0x0621) -#define PORTB_DIRCLR _SFR_MEM8(0x0622) -#define PORTB_DIRTGL _SFR_MEM8(0x0623) -#define PORTB_OUT _SFR_MEM8(0x0624) -#define PORTB_OUTSET _SFR_MEM8(0x0625) -#define PORTB_OUTCLR _SFR_MEM8(0x0626) -#define PORTB_OUTTGL _SFR_MEM8(0x0627) -#define PORTB_IN _SFR_MEM8(0x0628) -#define PORTB_INTCTRL _SFR_MEM8(0x0629) -#define PORTB_INT0MASK _SFR_MEM8(0x062A) -#define PORTB_INT1MASK _SFR_MEM8(0x062B) -#define PORTB_INTFLAGS _SFR_MEM8(0x062C) -#define PORTB_PIN0CTRL _SFR_MEM8(0x0630) -#define PORTB_PIN1CTRL _SFR_MEM8(0x0631) -#define PORTB_PIN2CTRL _SFR_MEM8(0x0632) -#define PORTB_PIN3CTRL _SFR_MEM8(0x0633) -#define PORTB_PIN4CTRL _SFR_MEM8(0x0634) -#define PORTB_PIN5CTRL _SFR_MEM8(0x0635) -#define PORTB_PIN6CTRL _SFR_MEM8(0x0636) -#define PORTB_PIN7CTRL _SFR_MEM8(0x0637) - -/* PORTC - Port C */ -#define PORTC_DIR _SFR_MEM8(0x0640) -#define PORTC_DIRSET _SFR_MEM8(0x0641) -#define PORTC_DIRCLR _SFR_MEM8(0x0642) -#define PORTC_DIRTGL _SFR_MEM8(0x0643) -#define PORTC_OUT _SFR_MEM8(0x0644) -#define PORTC_OUTSET _SFR_MEM8(0x0645) -#define PORTC_OUTCLR _SFR_MEM8(0x0646) -#define PORTC_OUTTGL _SFR_MEM8(0x0647) -#define PORTC_IN _SFR_MEM8(0x0648) -#define PORTC_INTCTRL _SFR_MEM8(0x0649) -#define PORTC_INT0MASK _SFR_MEM8(0x064A) -#define PORTC_INT1MASK _SFR_MEM8(0x064B) -#define PORTC_INTFLAGS _SFR_MEM8(0x064C) -#define PORTC_PIN0CTRL _SFR_MEM8(0x0650) -#define PORTC_PIN1CTRL _SFR_MEM8(0x0651) -#define PORTC_PIN2CTRL _SFR_MEM8(0x0652) -#define PORTC_PIN3CTRL _SFR_MEM8(0x0653) -#define PORTC_PIN4CTRL _SFR_MEM8(0x0654) -#define PORTC_PIN5CTRL _SFR_MEM8(0x0655) -#define PORTC_PIN6CTRL _SFR_MEM8(0x0656) -#define PORTC_PIN7CTRL _SFR_MEM8(0x0657) - -/* PORTD - Port D */ -#define PORTD_DIR _SFR_MEM8(0x0660) -#define PORTD_DIRSET _SFR_MEM8(0x0661) -#define PORTD_DIRCLR _SFR_MEM8(0x0662) -#define PORTD_DIRTGL _SFR_MEM8(0x0663) -#define PORTD_OUT _SFR_MEM8(0x0664) -#define PORTD_OUTSET _SFR_MEM8(0x0665) -#define PORTD_OUTCLR _SFR_MEM8(0x0666) -#define PORTD_OUTTGL _SFR_MEM8(0x0667) -#define PORTD_IN _SFR_MEM8(0x0668) -#define PORTD_INTCTRL _SFR_MEM8(0x0669) -#define PORTD_INT0MASK _SFR_MEM8(0x066A) -#define PORTD_INT1MASK _SFR_MEM8(0x066B) -#define PORTD_INTFLAGS _SFR_MEM8(0x066C) -#define PORTD_PIN0CTRL _SFR_MEM8(0x0670) -#define PORTD_PIN1CTRL _SFR_MEM8(0x0671) -#define PORTD_PIN2CTRL _SFR_MEM8(0x0672) -#define PORTD_PIN3CTRL _SFR_MEM8(0x0673) -#define PORTD_PIN4CTRL _SFR_MEM8(0x0674) -#define PORTD_PIN5CTRL _SFR_MEM8(0x0675) -#define PORTD_PIN6CTRL _SFR_MEM8(0x0676) -#define PORTD_PIN7CTRL _SFR_MEM8(0x0677) - -/* PORTE - Port E */ -#define PORTE_DIR _SFR_MEM8(0x0680) -#define PORTE_DIRSET _SFR_MEM8(0x0681) -#define PORTE_DIRCLR _SFR_MEM8(0x0682) -#define PORTE_DIRTGL _SFR_MEM8(0x0683) -#define PORTE_OUT _SFR_MEM8(0x0684) -#define PORTE_OUTSET _SFR_MEM8(0x0685) -#define PORTE_OUTCLR _SFR_MEM8(0x0686) -#define PORTE_OUTTGL _SFR_MEM8(0x0687) -#define PORTE_IN _SFR_MEM8(0x0688) -#define PORTE_INTCTRL _SFR_MEM8(0x0689) -#define PORTE_INT0MASK _SFR_MEM8(0x068A) -#define PORTE_INT1MASK _SFR_MEM8(0x068B) -#define PORTE_INTFLAGS _SFR_MEM8(0x068C) -#define PORTE_PIN0CTRL _SFR_MEM8(0x0690) -#define PORTE_PIN1CTRL _SFR_MEM8(0x0691) -#define PORTE_PIN2CTRL _SFR_MEM8(0x0692) -#define PORTE_PIN3CTRL _SFR_MEM8(0x0693) -#define PORTE_PIN4CTRL _SFR_MEM8(0x0694) -#define PORTE_PIN5CTRL _SFR_MEM8(0x0695) -#define PORTE_PIN6CTRL _SFR_MEM8(0x0696) -#define PORTE_PIN7CTRL _SFR_MEM8(0x0697) - -/* PORTF - Port F */ -#define PORTF_DIR _SFR_MEM8(0x06A0) -#define PORTF_DIRSET _SFR_MEM8(0x06A1) -#define PORTF_DIRCLR _SFR_MEM8(0x06A2) -#define PORTF_DIRTGL _SFR_MEM8(0x06A3) -#define PORTF_OUT _SFR_MEM8(0x06A4) -#define PORTF_OUTSET _SFR_MEM8(0x06A5) -#define PORTF_OUTCLR _SFR_MEM8(0x06A6) -#define PORTF_OUTTGL _SFR_MEM8(0x06A7) -#define PORTF_IN _SFR_MEM8(0x06A8) -#define PORTF_INTCTRL _SFR_MEM8(0x06A9) -#define PORTF_INT0MASK _SFR_MEM8(0x06AA) -#define PORTF_INT1MASK _SFR_MEM8(0x06AB) -#define PORTF_INTFLAGS _SFR_MEM8(0x06AC) -#define PORTF_PIN0CTRL _SFR_MEM8(0x06B0) -#define PORTF_PIN1CTRL _SFR_MEM8(0x06B1) -#define PORTF_PIN2CTRL _SFR_MEM8(0x06B2) -#define PORTF_PIN3CTRL _SFR_MEM8(0x06B3) -#define PORTF_PIN4CTRL _SFR_MEM8(0x06B4) -#define PORTF_PIN5CTRL _SFR_MEM8(0x06B5) -#define PORTF_PIN6CTRL _SFR_MEM8(0x06B6) -#define PORTF_PIN7CTRL _SFR_MEM8(0x06B7) - -/* PORTR - Port R */ -#define PORTR_DIR _SFR_MEM8(0x07E0) -#define PORTR_DIRSET _SFR_MEM8(0x07E1) -#define PORTR_DIRCLR _SFR_MEM8(0x07E2) -#define PORTR_DIRTGL _SFR_MEM8(0x07E3) -#define PORTR_OUT _SFR_MEM8(0x07E4) -#define PORTR_OUTSET _SFR_MEM8(0x07E5) -#define PORTR_OUTCLR _SFR_MEM8(0x07E6) -#define PORTR_OUTTGL _SFR_MEM8(0x07E7) -#define PORTR_IN _SFR_MEM8(0x07E8) -#define PORTR_INTCTRL _SFR_MEM8(0x07E9) -#define PORTR_INT0MASK _SFR_MEM8(0x07EA) -#define PORTR_INT1MASK _SFR_MEM8(0x07EB) -#define PORTR_INTFLAGS _SFR_MEM8(0x07EC) -#define PORTR_PIN0CTRL _SFR_MEM8(0x07F0) -#define PORTR_PIN1CTRL _SFR_MEM8(0x07F1) -#define PORTR_PIN2CTRL _SFR_MEM8(0x07F2) -#define PORTR_PIN3CTRL _SFR_MEM8(0x07F3) -#define PORTR_PIN4CTRL _SFR_MEM8(0x07F4) -#define PORTR_PIN5CTRL _SFR_MEM8(0x07F5) -#define PORTR_PIN6CTRL _SFR_MEM8(0x07F6) -#define PORTR_PIN7CTRL _SFR_MEM8(0x07F7) - -/* TCC0 - Timer/Counter C0 */ -#define TCC0_CTRLA _SFR_MEM8(0x0800) -#define TCC0_CTRLB _SFR_MEM8(0x0801) -#define TCC0_CTRLC _SFR_MEM8(0x0802) -#define TCC0_CTRLD _SFR_MEM8(0x0803) -#define TCC0_CTRLE _SFR_MEM8(0x0804) -#define TCC0_INTCTRLA _SFR_MEM8(0x0806) -#define TCC0_INTCTRLB _SFR_MEM8(0x0807) -#define TCC0_CTRLFCLR _SFR_MEM8(0x0808) -#define TCC0_CTRLFSET _SFR_MEM8(0x0809) -#define TCC0_CTRLGCLR _SFR_MEM8(0x080A) -#define TCC0_CTRLGSET _SFR_MEM8(0x080B) -#define TCC0_INTFLAGS _SFR_MEM8(0x080C) -#define TCC0_TEMP _SFR_MEM8(0x080F) -#define TCC0_CNT _SFR_MEM16(0x0820) -#define TCC0_PER _SFR_MEM16(0x0826) -#define TCC0_CCA _SFR_MEM16(0x0828) -#define TCC0_CCB _SFR_MEM16(0x082A) -#define TCC0_CCC _SFR_MEM16(0x082C) -#define TCC0_CCD _SFR_MEM16(0x082E) -#define TCC0_PERBUF _SFR_MEM16(0x0836) -#define TCC0_CCABUF _SFR_MEM16(0x0838) -#define TCC0_CCBBUF _SFR_MEM16(0x083A) -#define TCC0_CCCBUF _SFR_MEM16(0x083C) -#define TCC0_CCDBUF _SFR_MEM16(0x083E) - -/* TCC1 - Timer/Counter C1 */ -#define TCC1_CTRLA _SFR_MEM8(0x0840) -#define TCC1_CTRLB _SFR_MEM8(0x0841) -#define TCC1_CTRLC _SFR_MEM8(0x0842) -#define TCC1_CTRLD _SFR_MEM8(0x0843) -#define TCC1_CTRLE _SFR_MEM8(0x0844) -#define TCC1_INTCTRLA _SFR_MEM8(0x0846) -#define TCC1_INTCTRLB _SFR_MEM8(0x0847) -#define TCC1_CTRLFCLR _SFR_MEM8(0x0848) -#define TCC1_CTRLFSET _SFR_MEM8(0x0849) -#define TCC1_CTRLGCLR _SFR_MEM8(0x084A) -#define TCC1_CTRLGSET _SFR_MEM8(0x084B) -#define TCC1_INTFLAGS _SFR_MEM8(0x084C) -#define TCC1_TEMP _SFR_MEM8(0x084F) -#define TCC1_CNT _SFR_MEM16(0x0860) -#define TCC1_PER _SFR_MEM16(0x0866) -#define TCC1_CCA _SFR_MEM16(0x0868) -#define TCC1_CCB _SFR_MEM16(0x086A) -#define TCC1_PERBUF _SFR_MEM16(0x0876) -#define TCC1_CCABUF _SFR_MEM16(0x0878) -#define TCC1_CCBBUF _SFR_MEM16(0x087A) - -/* AWEXC - Advanced Waveform Extension C */ -#define AWEXC_CTRL _SFR_MEM8(0x0880) -#define AWEXC_FDEVMASK _SFR_MEM8(0x0882) -#define AWEXC_FDCTRL _SFR_MEM8(0x0883) -#define AWEXC_STATUS _SFR_MEM8(0x0884) -#define AWEXC_DTBOTH _SFR_MEM8(0x0886) -#define AWEXC_DTBOTHBUF _SFR_MEM8(0x0887) -#define AWEXC_DTLS _SFR_MEM8(0x0888) -#define AWEXC_DTHS _SFR_MEM8(0x0889) -#define AWEXC_DTLSBUF _SFR_MEM8(0x088A) -#define AWEXC_DTHSBUF _SFR_MEM8(0x088B) -#define AWEXC_OUTOVEN _SFR_MEM8(0x088C) - -/* HIRESC - High-Resolution Extension C */ -#define HIRESC_CTRL _SFR_MEM8(0x0890) - -/* USARTC0 - Universal Asynchronous Receiver-Transmitter C0 */ -#define USARTC0_DATA _SFR_MEM8(0x08A0) -#define USARTC0_STATUS _SFR_MEM8(0x08A1) -#define USARTC0_CTRLA _SFR_MEM8(0x08A3) -#define USARTC0_CTRLB _SFR_MEM8(0x08A4) -#define USARTC0_CTRLC _SFR_MEM8(0x08A5) -#define USARTC0_BAUDCTRLA _SFR_MEM8(0x08A6) -#define USARTC0_BAUDCTRLB _SFR_MEM8(0x08A7) - -/* USARTC1 - Universal Asynchronous Receiver-Transmitter C1 */ -#define USARTC1_DATA _SFR_MEM8(0x08B0) -#define USARTC1_STATUS _SFR_MEM8(0x08B1) -#define USARTC1_CTRLA _SFR_MEM8(0x08B3) -#define USARTC1_CTRLB _SFR_MEM8(0x08B4) -#define USARTC1_CTRLC _SFR_MEM8(0x08B5) -#define USARTC1_BAUDCTRLA _SFR_MEM8(0x08B6) -#define USARTC1_BAUDCTRLB _SFR_MEM8(0x08B7) - -/* SPIC - Serial Peripheral Interface C */ -#define SPIC_CTRL _SFR_MEM8(0x08C0) -#define SPIC_INTCTRL _SFR_MEM8(0x08C1) -#define SPIC_STATUS _SFR_MEM8(0x08C2) -#define SPIC_DATA _SFR_MEM8(0x08C3) - -/* IRCOM - IR Communication Module */ -#define IRCOM_CTRL _SFR_MEM8(0x08F8) -#define IRCOM_TXPLCTRL _SFR_MEM8(0x08F9) -#define IRCOM_RXPLCTRL _SFR_MEM8(0x08FA) - -/* TCD0 - Timer/Counter D0 */ -#define TCD0_CTRLA _SFR_MEM8(0x0900) -#define TCD0_CTRLB _SFR_MEM8(0x0901) -#define TCD0_CTRLC _SFR_MEM8(0x0902) -#define TCD0_CTRLD _SFR_MEM8(0x0903) -#define TCD0_CTRLE _SFR_MEM8(0x0904) -#define TCD0_INTCTRLA _SFR_MEM8(0x0906) -#define TCD0_INTCTRLB _SFR_MEM8(0x0907) -#define TCD0_CTRLFCLR _SFR_MEM8(0x0908) -#define TCD0_CTRLFSET _SFR_MEM8(0x0909) -#define TCD0_CTRLGCLR _SFR_MEM8(0x090A) -#define TCD0_CTRLGSET _SFR_MEM8(0x090B) -#define TCD0_INTFLAGS _SFR_MEM8(0x090C) -#define TCD0_TEMP _SFR_MEM8(0x090F) -#define TCD0_CNT _SFR_MEM16(0x0920) -#define TCD0_PER _SFR_MEM16(0x0926) -#define TCD0_CCA _SFR_MEM16(0x0928) -#define TCD0_CCB _SFR_MEM16(0x092A) -#define TCD0_CCC _SFR_MEM16(0x092C) -#define TCD0_CCD _SFR_MEM16(0x092E) -#define TCD0_PERBUF _SFR_MEM16(0x0936) -#define TCD0_CCABUF _SFR_MEM16(0x0938) -#define TCD0_CCBBUF _SFR_MEM16(0x093A) -#define TCD0_CCCBUF _SFR_MEM16(0x093C) -#define TCD0_CCDBUF _SFR_MEM16(0x093E) - -/* TCD1 - Timer/Counter D1 */ -#define TCD1_CTRLA _SFR_MEM8(0x0940) -#define TCD1_CTRLB _SFR_MEM8(0x0941) -#define TCD1_CTRLC _SFR_MEM8(0x0942) -#define TCD1_CTRLD _SFR_MEM8(0x0943) -#define TCD1_CTRLE _SFR_MEM8(0x0944) -#define TCD1_INTCTRLA _SFR_MEM8(0x0946) -#define TCD1_INTCTRLB _SFR_MEM8(0x0947) -#define TCD1_CTRLFCLR _SFR_MEM8(0x0948) -#define TCD1_CTRLFSET _SFR_MEM8(0x0949) -#define TCD1_CTRLGCLR _SFR_MEM8(0x094A) -#define TCD1_CTRLGSET _SFR_MEM8(0x094B) -#define TCD1_INTFLAGS _SFR_MEM8(0x094C) -#define TCD1_TEMP _SFR_MEM8(0x094F) -#define TCD1_CNT _SFR_MEM16(0x0960) -#define TCD1_PER _SFR_MEM16(0x0966) -#define TCD1_CCA _SFR_MEM16(0x0968) -#define TCD1_CCB _SFR_MEM16(0x096A) -#define TCD1_PERBUF _SFR_MEM16(0x0976) -#define TCD1_CCABUF _SFR_MEM16(0x0978) -#define TCD1_CCBBUF _SFR_MEM16(0x097A) - -/* HIRESD - High-Resolution Extension D */ -#define HIRESD_CTRL _SFR_MEM8(0x0990) - -/* USARTD0 - Universal Asynchronous Receiver-Transmitter D0 */ -#define USARTD0_DATA _SFR_MEM8(0x09A0) -#define USARTD0_STATUS _SFR_MEM8(0x09A1) -#define USARTD0_CTRLA _SFR_MEM8(0x09A3) -#define USARTD0_CTRLB _SFR_MEM8(0x09A4) -#define USARTD0_CTRLC _SFR_MEM8(0x09A5) -#define USARTD0_BAUDCTRLA _SFR_MEM8(0x09A6) -#define USARTD0_BAUDCTRLB _SFR_MEM8(0x09A7) - -/* USARTD1 - Universal Asynchronous Receiver-Transmitter D1 */ -#define USARTD1_DATA _SFR_MEM8(0x09B0) -#define USARTD1_STATUS _SFR_MEM8(0x09B1) -#define USARTD1_CTRLA _SFR_MEM8(0x09B3) -#define USARTD1_CTRLB _SFR_MEM8(0x09B4) -#define USARTD1_CTRLC _SFR_MEM8(0x09B5) -#define USARTD1_BAUDCTRLA _SFR_MEM8(0x09B6) -#define USARTD1_BAUDCTRLB _SFR_MEM8(0x09B7) - -/* SPID - Serial Peripheral Interface D */ -#define SPID_CTRL _SFR_MEM8(0x09C0) -#define SPID_INTCTRL _SFR_MEM8(0x09C1) -#define SPID_STATUS _SFR_MEM8(0x09C2) -#define SPID_DATA _SFR_MEM8(0x09C3) - -/* TCE0 - Timer/Counter E0 */ -#define TCE0_CTRLA _SFR_MEM8(0x0A00) -#define TCE0_CTRLB _SFR_MEM8(0x0A01) -#define TCE0_CTRLC _SFR_MEM8(0x0A02) -#define TCE0_CTRLD _SFR_MEM8(0x0A03) -#define TCE0_CTRLE _SFR_MEM8(0x0A04) -#define TCE0_INTCTRLA _SFR_MEM8(0x0A06) -#define TCE0_INTCTRLB _SFR_MEM8(0x0A07) -#define TCE0_CTRLFCLR _SFR_MEM8(0x0A08) -#define TCE0_CTRLFSET _SFR_MEM8(0x0A09) -#define TCE0_CTRLGCLR _SFR_MEM8(0x0A0A) -#define TCE0_CTRLGSET _SFR_MEM8(0x0A0B) -#define TCE0_INTFLAGS _SFR_MEM8(0x0A0C) -#define TCE0_TEMP _SFR_MEM8(0x0A0F) -#define TCE0_CNT _SFR_MEM16(0x0A20) -#define TCE0_PER _SFR_MEM16(0x0A26) -#define TCE0_CCA _SFR_MEM16(0x0A28) -#define TCE0_CCB _SFR_MEM16(0x0A2A) -#define TCE0_CCC _SFR_MEM16(0x0A2C) -#define TCE0_CCD _SFR_MEM16(0x0A2E) -#define TCE0_PERBUF _SFR_MEM16(0x0A36) -#define TCE0_CCABUF _SFR_MEM16(0x0A38) -#define TCE0_CCBBUF _SFR_MEM16(0x0A3A) -#define TCE0_CCCBUF _SFR_MEM16(0x0A3C) -#define TCE0_CCDBUF _SFR_MEM16(0x0A3E) - -/* TCE1 - Timer/Counter E1 */ -#define TCE1_CTRLA _SFR_MEM8(0x0A40) -#define TCE1_CTRLB _SFR_MEM8(0x0A41) -#define TCE1_CTRLC _SFR_MEM8(0x0A42) -#define TCE1_CTRLD _SFR_MEM8(0x0A43) -#define TCE1_CTRLE _SFR_MEM8(0x0A44) -#define TCE1_INTCTRLA _SFR_MEM8(0x0A46) -#define TCE1_INTCTRLB _SFR_MEM8(0x0A47) -#define TCE1_CTRLFCLR _SFR_MEM8(0x0A48) -#define TCE1_CTRLFSET _SFR_MEM8(0x0A49) -#define TCE1_CTRLGCLR _SFR_MEM8(0x0A4A) -#define TCE1_CTRLGSET _SFR_MEM8(0x0A4B) -#define TCE1_INTFLAGS _SFR_MEM8(0x0A4C) -#define TCE1_TEMP _SFR_MEM8(0x0A4F) -#define TCE1_CNT _SFR_MEM16(0x0A60) -#define TCE1_PER _SFR_MEM16(0x0A66) -#define TCE1_CCA _SFR_MEM16(0x0A68) -#define TCE1_CCB _SFR_MEM16(0x0A6A) -#define TCE1_PERBUF _SFR_MEM16(0x0A76) -#define TCE1_CCABUF _SFR_MEM16(0x0A78) -#define TCE1_CCBBUF _SFR_MEM16(0x0A7A) - -/* AWEXE - Advanced Waveform Extension E */ -#define AWEXE_CTRL _SFR_MEM8(0x0A80) -#define AWEXE_FDEVMASK _SFR_MEM8(0x0A82) -#define AWEXE_FDCTRL _SFR_MEM8(0x0A83) -#define AWEXE_STATUS _SFR_MEM8(0x0A84) -#define AWEXE_DTBOTH _SFR_MEM8(0x0A86) -#define AWEXE_DTBOTHBUF _SFR_MEM8(0x0A87) -#define AWEXE_DTLS _SFR_MEM8(0x0A88) -#define AWEXE_DTHS _SFR_MEM8(0x0A89) -#define AWEXE_DTLSBUF _SFR_MEM8(0x0A8A) -#define AWEXE_DTHSBUF _SFR_MEM8(0x0A8B) -#define AWEXE_OUTOVEN _SFR_MEM8(0x0A8C) - -/* HIRESE - High-Resolution Extension E */ -#define HIRESE_CTRL _SFR_MEM8(0x0A90) - -/* USARTE0 - Universal Asynchronous Receiver-Transmitter E0 */ -#define USARTE0_DATA _SFR_MEM8(0x0AA0) -#define USARTE0_STATUS _SFR_MEM8(0x0AA1) -#define USARTE0_CTRLA _SFR_MEM8(0x0AA3) -#define USARTE0_CTRLB _SFR_MEM8(0x0AA4) -#define USARTE0_CTRLC _SFR_MEM8(0x0AA5) -#define USARTE0_BAUDCTRLA _SFR_MEM8(0x0AA6) -#define USARTE0_BAUDCTRLB _SFR_MEM8(0x0AA7) - -/* USARTE1 - Universal Asynchronous Receiver-Transmitter E1 */ -#define USARTE1_DATA _SFR_MEM8(0x0AB0) -#define USARTE1_STATUS _SFR_MEM8(0x0AB1) -#define USARTE1_CTRLA _SFR_MEM8(0x0AB3) -#define USARTE1_CTRLB _SFR_MEM8(0x0AB4) -#define USARTE1_CTRLC _SFR_MEM8(0x0AB5) -#define USARTE1_BAUDCTRLA _SFR_MEM8(0x0AB6) -#define USARTE1_BAUDCTRLB _SFR_MEM8(0x0AB7) - -/* SPIE - Serial Peripheral Interface E */ -#define SPIE_CTRL _SFR_MEM8(0x0AC0) -#define SPIE_INTCTRL _SFR_MEM8(0x0AC1) -#define SPIE_STATUS _SFR_MEM8(0x0AC2) -#define SPIE_DATA _SFR_MEM8(0x0AC3) - -/* TCF0 - Timer/Counter F0 */ -#define TCF0_CTRLA _SFR_MEM8(0x0B00) -#define TCF0_CTRLB _SFR_MEM8(0x0B01) -#define TCF0_CTRLC _SFR_MEM8(0x0B02) -#define TCF0_CTRLD _SFR_MEM8(0x0B03) -#define TCF0_CTRLE _SFR_MEM8(0x0B04) -#define TCF0_INTCTRLA _SFR_MEM8(0x0B06) -#define TCF0_INTCTRLB _SFR_MEM8(0x0B07) -#define TCF0_CTRLFCLR _SFR_MEM8(0x0B08) -#define TCF0_CTRLFSET _SFR_MEM8(0x0B09) -#define TCF0_CTRLGCLR _SFR_MEM8(0x0B0A) -#define TCF0_CTRLGSET _SFR_MEM8(0x0B0B) -#define TCF0_INTFLAGS _SFR_MEM8(0x0B0C) -#define TCF0_TEMP _SFR_MEM8(0x0B0F) -#define TCF0_CNT _SFR_MEM16(0x0B20) -#define TCF0_PER _SFR_MEM16(0x0B26) -#define TCF0_CCA _SFR_MEM16(0x0B28) -#define TCF0_CCB _SFR_MEM16(0x0B2A) -#define TCF0_CCC _SFR_MEM16(0x0B2C) -#define TCF0_CCD _SFR_MEM16(0x0B2E) -#define TCF0_PERBUF _SFR_MEM16(0x0B36) -#define TCF0_CCABUF _SFR_MEM16(0x0B38) -#define TCF0_CCBBUF _SFR_MEM16(0x0B3A) -#define TCF0_CCCBUF _SFR_MEM16(0x0B3C) -#define TCF0_CCDBUF _SFR_MEM16(0x0B3E) - -/* HIRESF - High-Resolution Extension F */ -#define HIRESF_CTRL _SFR_MEM8(0x0B90) - -/* USARTF0 - Universal Asynchronous Receiver-Transmitter F0 */ -#define USARTF0_DATA _SFR_MEM8(0x0BA0) -#define USARTF0_STATUS _SFR_MEM8(0x0BA1) -#define USARTF0_CTRLA _SFR_MEM8(0x0BA3) -#define USARTF0_CTRLB _SFR_MEM8(0x0BA4) -#define USARTF0_CTRLC _SFR_MEM8(0x0BA5) -#define USARTF0_BAUDCTRLA _SFR_MEM8(0x0BA6) -#define USARTF0_BAUDCTRLB _SFR_MEM8(0x0BA7) - -/* USARTF1 - Universal Asynchronous Receiver-Transmitter F1 */ -#define USARTF1_DATA _SFR_MEM8(0x0BB0) -#define USARTF1_STATUS _SFR_MEM8(0x0BB1) -#define USARTF1_CTRLA _SFR_MEM8(0x0BB3) -#define USARTF1_CTRLB _SFR_MEM8(0x0BB4) -#define USARTF1_CTRLC _SFR_MEM8(0x0BB5) -#define USARTF1_BAUDCTRLA _SFR_MEM8(0x0BB6) -#define USARTF1_BAUDCTRLB _SFR_MEM8(0x0BB7) - -/* SPIF - Serial Peripheral Interface F */ -#define SPIF_CTRL _SFR_MEM8(0x0BC0) -#define SPIF_INTCTRL _SFR_MEM8(0x0BC1) -#define SPIF_STATUS _SFR_MEM8(0x0BC2) -#define SPIF_DATA _SFR_MEM8(0x0BC3) - - - -/*================== Bitfield Definitions ================== */ - -/* XOCD - On-Chip Debug System */ -/* OCD.OCDR1 bit masks and bit positions */ -#define OCD_OCDRD_bm 0x01 /* OCDR Dirty bit mask. */ -#define OCD_OCDRD_bp 0 /* OCDR Dirty bit position. */ - - -/* CPU - CPU */ -/* CPU.CCP bit masks and bit positions */ -#define CPU_CCP_gm 0xFF /* CCP signature group mask. */ -#define CPU_CCP_gp 0 /* CCP signature group position. */ -#define CPU_CCP0_bm (1<<0) /* CCP signature bit 0 mask. */ -#define CPU_CCP0_bp 0 /* CCP signature bit 0 position. */ -#define CPU_CCP1_bm (1<<1) /* CCP signature bit 1 mask. */ -#define CPU_CCP1_bp 1 /* CCP signature bit 1 position. */ -#define CPU_CCP2_bm (1<<2) /* CCP signature bit 2 mask. */ -#define CPU_CCP2_bp 2 /* CCP signature bit 2 position. */ -#define CPU_CCP3_bm (1<<3) /* CCP signature bit 3 mask. */ -#define CPU_CCP3_bp 3 /* CCP signature bit 3 position. */ -#define CPU_CCP4_bm (1<<4) /* CCP signature bit 4 mask. */ -#define CPU_CCP4_bp 4 /* CCP signature bit 4 position. */ -#define CPU_CCP5_bm (1<<5) /* CCP signature bit 5 mask. */ -#define CPU_CCP5_bp 5 /* CCP signature bit 5 position. */ -#define CPU_CCP6_bm (1<<6) /* CCP signature bit 6 mask. */ -#define CPU_CCP6_bp 6 /* CCP signature bit 6 position. */ -#define CPU_CCP7_bm (1<<7) /* CCP signature bit 7 mask. */ -#define CPU_CCP7_bp 7 /* CCP signature bit 7 position. */ - - -/* CPU.SREG bit masks and bit positions */ -#define CPU_I_bm 0x80 /* Global Interrupt Enable Flag bit mask. */ -#define CPU_I_bp 7 /* Global Interrupt Enable Flag bit position. */ - -#define CPU_T_bm 0x40 /* Transfer Bit bit mask. */ -#define CPU_T_bp 6 /* Transfer Bit bit position. */ - -#define CPU_H_bm 0x20 /* Half Carry Flag bit mask. */ -#define CPU_H_bp 5 /* Half Carry Flag bit position. */ - -#define CPU_S_bm 0x10 /* N Exclusive Or V Flag bit mask. */ -#define CPU_S_bp 4 /* N Exclusive Or V Flag bit position. */ - -#define CPU_V_bm 0x08 /* Two's Complement Overflow Flag bit mask. */ -#define CPU_V_bp 3 /* Two's Complement Overflow Flag bit position. */ - -#define CPU_N_bm 0x04 /* Negative Flag bit mask. */ -#define CPU_N_bp 2 /* Negative Flag bit position. */ - -#define CPU_Z_bm 0x02 /* Zero Flag bit mask. */ -#define CPU_Z_bp 1 /* Zero Flag bit position. */ - -#define CPU_C_bm 0x01 /* Carry Flag bit mask. */ -#define CPU_C_bp 0 /* Carry Flag bit position. */ - - -/* CLK - Clock System */ -/* CLK.CTRL bit masks and bit positions */ -#define CLK_SCLKSEL_gm 0x07 /* System Clock Selection group mask. */ -#define CLK_SCLKSEL_gp 0 /* System Clock Selection group position. */ -#define CLK_SCLKSEL0_bm (1<<0) /* System Clock Selection bit 0 mask. */ -#define CLK_SCLKSEL0_bp 0 /* System Clock Selection bit 0 position. */ -#define CLK_SCLKSEL1_bm (1<<1) /* System Clock Selection bit 1 mask. */ -#define CLK_SCLKSEL1_bp 1 /* System Clock Selection bit 1 position. */ -#define CLK_SCLKSEL2_bm (1<<2) /* System Clock Selection bit 2 mask. */ -#define CLK_SCLKSEL2_bp 2 /* System Clock Selection bit 2 position. */ - - -/* CLK.PSCTRL bit masks and bit positions */ -#define CLK_PSADIV_gm 0x7C /* Prescaler A Division Factor group mask. */ -#define CLK_PSADIV_gp 2 /* Prescaler A Division Factor group position. */ -#define CLK_PSADIV0_bm (1<<2) /* Prescaler A Division Factor bit 0 mask. */ -#define CLK_PSADIV0_bp 2 /* Prescaler A Division Factor bit 0 position. */ -#define CLK_PSADIV1_bm (1<<3) /* Prescaler A Division Factor bit 1 mask. */ -#define CLK_PSADIV1_bp 3 /* Prescaler A Division Factor bit 1 position. */ -#define CLK_PSADIV2_bm (1<<4) /* Prescaler A Division Factor bit 2 mask. */ -#define CLK_PSADIV2_bp 4 /* Prescaler A Division Factor bit 2 position. */ -#define CLK_PSADIV3_bm (1<<5) /* Prescaler A Division Factor bit 3 mask. */ -#define CLK_PSADIV3_bp 5 /* Prescaler A Division Factor bit 3 position. */ -#define CLK_PSADIV4_bm (1<<6) /* Prescaler A Division Factor bit 4 mask. */ -#define CLK_PSADIV4_bp 6 /* Prescaler A Division Factor bit 4 position. */ - -#define CLK_PSBCDIV_gm 0x03 /* Prescaler B and C Division factor group mask. */ -#define CLK_PSBCDIV_gp 0 /* Prescaler B and C Division factor group position. */ -#define CLK_PSBCDIV0_bm (1<<0) /* Prescaler B and C Division factor bit 0 mask. */ -#define CLK_PSBCDIV0_bp 0 /* Prescaler B and C Division factor bit 0 position. */ -#define CLK_PSBCDIV1_bm (1<<1) /* Prescaler B and C Division factor bit 1 mask. */ -#define CLK_PSBCDIV1_bp 1 /* Prescaler B and C Division factor bit 1 position. */ - - -/* CLK.LOCK bit masks and bit positions */ -#define CLK_LOCK_bm 0x01 /* Clock System Lock bit mask. */ -#define CLK_LOCK_bp 0 /* Clock System Lock bit position. */ - - -/* CLK.RTCCTRL bit masks and bit positions */ -#define CLK_RTCSRC_gm 0x0E /* Clock Source group mask. */ -#define CLK_RTCSRC_gp 1 /* Clock Source group position. */ -#define CLK_RTCSRC0_bm (1<<1) /* Clock Source bit 0 mask. */ -#define CLK_RTCSRC0_bp 1 /* Clock Source bit 0 position. */ -#define CLK_RTCSRC1_bm (1<<2) /* Clock Source bit 1 mask. */ -#define CLK_RTCSRC1_bp 2 /* Clock Source bit 1 position. */ -#define CLK_RTCSRC2_bm (1<<3) /* Clock Source bit 2 mask. */ -#define CLK_RTCSRC2_bp 3 /* Clock Source bit 2 position. */ - -#define CLK_RTCEN_bm 0x01 /* RTC Clock Source Enable bit mask. */ -#define CLK_RTCEN_bp 0 /* RTC Clock Source Enable bit position. */ - - -/* PR.PR bit masks and bit positions */ -#define PR_EBI_bm 0x08 /* External Bus Interface bit mask. */ -#define PR_EBI_bp 3 /* External Bus Interface bit position. */ - -#define PR_RTC_bm 0x04 /* Real-time Counter bit mask. */ -#define PR_RTC_bp 2 /* Real-time Counter bit position. */ - -#define PR_EVSYS_bm 0x02 /* Event System bit mask. */ -#define PR_EVSYS_bp 1 /* Event System bit position. */ - -#define PR_DMA_bm 0x01 /* DMA-Controller bit mask. */ -#define PR_DMA_bp 0 /* DMA-Controller bit position. */ - - -/* PR.PRPA bit masks and bit positions */ -#define PR_DAC_bm 0x04 /* Port A DAC bit mask. */ -#define PR_DAC_bp 2 /* Port A DAC bit position. */ - -#define PR_ADC_bm 0x02 /* Port A ADC bit mask. */ -#define PR_ADC_bp 1 /* Port A ADC bit position. */ - -#define PR_AC_bm 0x01 /* Port A Analog Comparator bit mask. */ -#define PR_AC_bp 0 /* Port A Analog Comparator bit position. */ - - -/* PR.PRPB bit masks and bit positions */ -/* PR_DAC_bm Predefined. */ -/* PR_DAC_bp Predefined. */ - -/* PR_ADC_bm Predefined. */ -/* PR_ADC_bp Predefined. */ - -/* PR_AC_bm Predefined. */ -/* PR_AC_bp Predefined. */ - - -/* PR.PRPC bit masks and bit positions */ -#define PR_TWI_bm 0x40 /* Port C Two-wire Interface bit mask. */ -#define PR_TWI_bp 6 /* Port C Two-wire Interface bit position. */ - -#define PR_USART1_bm 0x20 /* Port C USART1 bit mask. */ -#define PR_USART1_bp 5 /* Port C USART1 bit position. */ - -#define PR_USART0_bm 0x10 /* Port C USART0 bit mask. */ -#define PR_USART0_bp 4 /* Port C USART0 bit position. */ - -#define PR_SPI_bm 0x08 /* Port C SPI bit mask. */ -#define PR_SPI_bp 3 /* Port C SPI bit position. */ - -#define PR_HIRES_bm 0x04 /* Port C AWEX bit mask. */ -#define PR_HIRES_bp 2 /* Port C AWEX bit position. */ - -#define PR_TC1_bm 0x02 /* Port C Timer/Counter1 bit mask. */ -#define PR_TC1_bp 1 /* Port C Timer/Counter1 bit position. */ - -#define PR_TC0_bm 0x01 /* Port C Timer/Counter0 bit mask. */ -#define PR_TC0_bp 0 /* Port C Timer/Counter0 bit position. */ - - -/* PR.PRPD bit masks and bit positions */ -/* PR_TWI_bm Predefined. */ -/* PR_TWI_bp Predefined. */ - -/* PR_USART1_bm Predefined. */ -/* PR_USART1_bp Predefined. */ - -/* PR_USART0_bm Predefined. */ -/* PR_USART0_bp Predefined. */ - -/* PR_SPI_bm Predefined. */ -/* PR_SPI_bp Predefined. */ - -/* PR_HIRES_bm Predefined. */ -/* PR_HIRES_bp Predefined. */ - -/* PR_TC1_bm Predefined. */ -/* PR_TC1_bp Predefined. */ - -/* PR_TC0_bm Predefined. */ -/* PR_TC0_bp Predefined. */ - - -/* PR.PRPE bit masks and bit positions */ -/* PR_TWI_bm Predefined. */ -/* PR_TWI_bp Predefined. */ - -/* PR_USART1_bm Predefined. */ -/* PR_USART1_bp Predefined. */ - -/* PR_USART0_bm Predefined. */ -/* PR_USART0_bp Predefined. */ - -/* PR_SPI_bm Predefined. */ -/* PR_SPI_bp Predefined. */ - -/* PR_HIRES_bm Predefined. */ -/* PR_HIRES_bp Predefined. */ - -/* PR_TC1_bm Predefined. */ -/* PR_TC1_bp Predefined. */ - -/* PR_TC0_bm Predefined. */ -/* PR_TC0_bp Predefined. */ - - -/* PR.PRPF bit masks and bit positions */ -/* PR_TWI_bm Predefined. */ -/* PR_TWI_bp Predefined. */ - -/* PR_USART1_bm Predefined. */ -/* PR_USART1_bp Predefined. */ - -/* PR_USART0_bm Predefined. */ -/* PR_USART0_bp Predefined. */ - -/* PR_SPI_bm Predefined. */ -/* PR_SPI_bp Predefined. */ - -/* PR_HIRES_bm Predefined. */ -/* PR_HIRES_bp Predefined. */ - -/* PR_TC1_bm Predefined. */ -/* PR_TC1_bp Predefined. */ - -/* PR_TC0_bm Predefined. */ -/* PR_TC0_bp Predefined. */ - - -/* SLEEP - Sleep Controller */ -/* SLEEP.CTRL bit masks and bit positions */ -#define SLEEP_SMODE_gm 0x0E /* Sleep Mode group mask. */ -#define SLEEP_SMODE_gp 1 /* Sleep Mode group position. */ -#define SLEEP_SMODE0_bm (1<<1) /* Sleep Mode bit 0 mask. */ -#define SLEEP_SMODE0_bp 1 /* Sleep Mode bit 0 position. */ -#define SLEEP_SMODE1_bm (1<<2) /* Sleep Mode bit 1 mask. */ -#define SLEEP_SMODE1_bp 2 /* Sleep Mode bit 1 position. */ -#define SLEEP_SMODE2_bm (1<<3) /* Sleep Mode bit 2 mask. */ -#define SLEEP_SMODE2_bp 3 /* Sleep Mode bit 2 position. */ - -#define SLEEP_SEN_bm 0x01 /* Sleep Enable bit mask. */ -#define SLEEP_SEN_bp 0 /* Sleep Enable bit position. */ - - -/* OSC - Oscillator */ -/* OSC.CTRL bit masks and bit positions */ -#define OSC_PLLEN_bm 0x10 /* PLL Enable bit mask. */ -#define OSC_PLLEN_bp 4 /* PLL Enable bit position. */ - -#define OSC_XOSCEN_bm 0x08 /* External Oscillator Enable bit mask. */ -#define OSC_XOSCEN_bp 3 /* External Oscillator Enable bit position. */ - -#define OSC_RC32KEN_bm 0x04 /* Internal 32kHz RC Oscillator Enable bit mask. */ -#define OSC_RC32KEN_bp 2 /* Internal 32kHz RC Oscillator Enable bit position. */ - -#define OSC_RC32MEN_bm 0x02 /* Internal 32MHz RC Oscillator Enable bit mask. */ -#define OSC_RC32MEN_bp 1 /* Internal 32MHz RC Oscillator Enable bit position. */ - -#define OSC_RC2MEN_bm 0x01 /* Internal 2MHz RC Oscillator Enable bit mask. */ -#define OSC_RC2MEN_bp 0 /* Internal 2MHz RC Oscillator Enable bit position. */ - - -/* OSC.STATUS bit masks and bit positions */ -#define OSC_PLLRDY_bm 0x10 /* PLL Ready bit mask. */ -#define OSC_PLLRDY_bp 4 /* PLL Ready bit position. */ - -#define OSC_XOSCRDY_bm 0x08 /* External Oscillator Ready bit mask. */ -#define OSC_XOSCRDY_bp 3 /* External Oscillator Ready bit position. */ - -#define OSC_RC32KRDY_bm 0x04 /* Internal 32kHz RC Oscillator Ready bit mask. */ -#define OSC_RC32KRDY_bp 2 /* Internal 32kHz RC Oscillator Ready bit position. */ - -#define OSC_RC32MRDY_bm 0x02 /* Internal 32MHz RC Oscillator Ready bit mask. */ -#define OSC_RC32MRDY_bp 1 /* Internal 32MHz RC Oscillator Ready bit position. */ - -#define OSC_RC2MRDY_bm 0x01 /* Internal 2MHz RC Oscillator Ready bit mask. */ -#define OSC_RC2MRDY_bp 0 /* Internal 2MHz RC Oscillator Ready bit position. */ - - -/* OSC.XOSCCTRL bit masks and bit positions */ -#define OSC_FRQRANGE_gm 0xC0 /* Frequency Range group mask. */ -#define OSC_FRQRANGE_gp 6 /* Frequency Range group position. */ -#define OSC_FRQRANGE0_bm (1<<6) /* Frequency Range bit 0 mask. */ -#define OSC_FRQRANGE0_bp 6 /* Frequency Range bit 0 position. */ -#define OSC_FRQRANGE1_bm (1<<7) /* Frequency Range bit 1 mask. */ -#define OSC_FRQRANGE1_bp 7 /* Frequency Range bit 1 position. */ - -#define OSC_X32KLPM_bm 0x20 /* 32kHz XTAL OSC Low-power Mode bit mask. */ -#define OSC_X32KLPM_bp 5 /* 32kHz XTAL OSC Low-power Mode bit position. */ - -#define OSC_XOSCSEL_gm 0x0F /* External Oscillator Selection and Startup Time group mask. */ -#define OSC_XOSCSEL_gp 0 /* External Oscillator Selection and Startup Time group position. */ -#define OSC_XOSCSEL0_bm (1<<0) /* External Oscillator Selection and Startup Time bit 0 mask. */ -#define OSC_XOSCSEL0_bp 0 /* External Oscillator Selection and Startup Time bit 0 position. */ -#define OSC_XOSCSEL1_bm (1<<1) /* External Oscillator Selection and Startup Time bit 1 mask. */ -#define OSC_XOSCSEL1_bp 1 /* External Oscillator Selection and Startup Time bit 1 position. */ -#define OSC_XOSCSEL2_bm (1<<2) /* External Oscillator Selection and Startup Time bit 2 mask. */ -#define OSC_XOSCSEL2_bp 2 /* External Oscillator Selection and Startup Time bit 2 position. */ -#define OSC_XOSCSEL3_bm (1<<3) /* External Oscillator Selection and Startup Time bit 3 mask. */ -#define OSC_XOSCSEL3_bp 3 /* External Oscillator Selection and Startup Time bit 3 position. */ - - -/* OSC.XOSCFAIL bit masks and bit positions */ -#define OSC_XOSCFDIF_bm 0x02 /* Failure Detection Interrupt Flag bit mask. */ -#define OSC_XOSCFDIF_bp 1 /* Failure Detection Interrupt Flag bit position. */ - -#define OSC_XOSCFDEN_bm 0x01 /* Failure Detection Enable bit mask. */ -#define OSC_XOSCFDEN_bp 0 /* Failure Detection Enable bit position. */ - - -/* OSC.PLLCTRL bit masks and bit positions */ -#define OSC_PLLSRC_gm 0xC0 /* Clock Source group mask. */ -#define OSC_PLLSRC_gp 6 /* Clock Source group position. */ -#define OSC_PLLSRC0_bm (1<<6) /* Clock Source bit 0 mask. */ -#define OSC_PLLSRC0_bp 6 /* Clock Source bit 0 position. */ -#define OSC_PLLSRC1_bm (1<<7) /* Clock Source bit 1 mask. */ -#define OSC_PLLSRC1_bp 7 /* Clock Source bit 1 position. */ - -#define OSC_PLLFAC_gm 0x1F /* Multiplication Factor group mask. */ -#define OSC_PLLFAC_gp 0 /* Multiplication Factor group position. */ -#define OSC_PLLFAC0_bm (1<<0) /* Multiplication Factor bit 0 mask. */ -#define OSC_PLLFAC0_bp 0 /* Multiplication Factor bit 0 position. */ -#define OSC_PLLFAC1_bm (1<<1) /* Multiplication Factor bit 1 mask. */ -#define OSC_PLLFAC1_bp 1 /* Multiplication Factor bit 1 position. */ -#define OSC_PLLFAC2_bm (1<<2) /* Multiplication Factor bit 2 mask. */ -#define OSC_PLLFAC2_bp 2 /* Multiplication Factor bit 2 position. */ -#define OSC_PLLFAC3_bm (1<<3) /* Multiplication Factor bit 3 mask. */ -#define OSC_PLLFAC3_bp 3 /* Multiplication Factor bit 3 position. */ -#define OSC_PLLFAC4_bm (1<<4) /* Multiplication Factor bit 4 mask. */ -#define OSC_PLLFAC4_bp 4 /* Multiplication Factor bit 4 position. */ - - -/* OSC.DFLLCTRL bit masks and bit positions */ -#define OSC_RC32MCREF_bm 0x02 /* 32MHz Calibration Reference bit mask. */ -#define OSC_RC32MCREF_bp 1 /* 32MHz Calibration Reference bit position. */ - -#define OSC_RC2MCREF_bm 0x01 /* 2MHz Calibration Reference bit mask. */ -#define OSC_RC2MCREF_bp 0 /* 2MHz Calibration Reference bit position. */ - - -/* DFLL - DFLL */ -/* DFLL.CTRL bit masks and bit positions */ -#define DFLL_ENABLE_bm 0x01 /* DFLL Enable bit mask. */ -#define DFLL_ENABLE_bp 0 /* DFLL Enable bit position. */ - - -/* DFLL.CALA bit masks and bit positions */ -#define DFLL_CALL_gm 0x7F /* DFLL Calibration bits [6:0] group mask. */ -#define DFLL_CALL_gp 0 /* DFLL Calibration bits [6:0] group position. */ -#define DFLL_CALL0_bm (1<<0) /* DFLL Calibration bits [6:0] bit 0 mask. */ -#define DFLL_CALL0_bp 0 /* DFLL Calibration bits [6:0] bit 0 position. */ -#define DFLL_CALL1_bm (1<<1) /* DFLL Calibration bits [6:0] bit 1 mask. */ -#define DFLL_CALL1_bp 1 /* DFLL Calibration bits [6:0] bit 1 position. */ -#define DFLL_CALL2_bm (1<<2) /* DFLL Calibration bits [6:0] bit 2 mask. */ -#define DFLL_CALL2_bp 2 /* DFLL Calibration bits [6:0] bit 2 position. */ -#define DFLL_CALL3_bm (1<<3) /* DFLL Calibration bits [6:0] bit 3 mask. */ -#define DFLL_CALL3_bp 3 /* DFLL Calibration bits [6:0] bit 3 position. */ -#define DFLL_CALL4_bm (1<<4) /* DFLL Calibration bits [6:0] bit 4 mask. */ -#define DFLL_CALL4_bp 4 /* DFLL Calibration bits [6:0] bit 4 position. */ -#define DFLL_CALL5_bm (1<<5) /* DFLL Calibration bits [6:0] bit 5 mask. */ -#define DFLL_CALL5_bp 5 /* DFLL Calibration bits [6:0] bit 5 position. */ -#define DFLL_CALL6_bm (1<<6) /* DFLL Calibration bits [6:0] bit 6 mask. */ -#define DFLL_CALL6_bp 6 /* DFLL Calibration bits [6:0] bit 6 position. */ - - -/* DFLL.CALB bit masks and bit positions */ -#define DFLL_CALH_gm 0x3F /* DFLL Calibration bits [12:7] group mask. */ -#define DFLL_CALH_gp 0 /* DFLL Calibration bits [12:7] group position. */ -#define DFLL_CALH0_bm (1<<0) /* DFLL Calibration bits [12:7] bit 0 mask. */ -#define DFLL_CALH0_bp 0 /* DFLL Calibration bits [12:7] bit 0 position. */ -#define DFLL_CALH1_bm (1<<1) /* DFLL Calibration bits [12:7] bit 1 mask. */ -#define DFLL_CALH1_bp 1 /* DFLL Calibration bits [12:7] bit 1 position. */ -#define DFLL_CALH2_bm (1<<2) /* DFLL Calibration bits [12:7] bit 2 mask. */ -#define DFLL_CALH2_bp 2 /* DFLL Calibration bits [12:7] bit 2 position. */ -#define DFLL_CALH3_bm (1<<3) /* DFLL Calibration bits [12:7] bit 3 mask. */ -#define DFLL_CALH3_bp 3 /* DFLL Calibration bits [12:7] bit 3 position. */ -#define DFLL_CALH4_bm (1<<4) /* DFLL Calibration bits [12:7] bit 4 mask. */ -#define DFLL_CALH4_bp 4 /* DFLL Calibration bits [12:7] bit 4 position. */ -#define DFLL_CALH5_bm (1<<5) /* DFLL Calibration bits [12:7] bit 5 mask. */ -#define DFLL_CALH5_bp 5 /* DFLL Calibration bits [12:7] bit 5 position. */ - - -/* RST - Reset */ -/* RST.STATUS bit masks and bit positions */ -#define RST_SDRF_bm 0x40 /* Spike Detection Reset Flag bit mask. */ -#define RST_SDRF_bp 6 /* Spike Detection Reset Flag bit position. */ - -#define RST_SRF_bm 0x20 /* Software Reset Flag bit mask. */ -#define RST_SRF_bp 5 /* Software Reset Flag bit position. */ - -#define RST_PDIRF_bm 0x10 /* Programming and Debug Interface Interface Reset Flag bit mask. */ -#define RST_PDIRF_bp 4 /* Programming and Debug Interface Interface Reset Flag bit position. */ - -#define RST_WDRF_bm 0x08 /* Watchdog Reset Flag bit mask. */ -#define RST_WDRF_bp 3 /* Watchdog Reset Flag bit position. */ - -#define RST_BORF_bm 0x04 /* Brown-out Reset Flag bit mask. */ -#define RST_BORF_bp 2 /* Brown-out Reset Flag bit position. */ - -#define RST_EXTRF_bm 0x02 /* External Reset Flag bit mask. */ -#define RST_EXTRF_bp 1 /* External Reset Flag bit position. */ - -#define RST_PORF_bm 0x01 /* Power-on Reset Flag bit mask. */ -#define RST_PORF_bp 0 /* Power-on Reset Flag bit position. */ - - -/* RST.CTRL bit masks and bit positions */ -#define RST_SWRST_bm 0x01 /* Software Reset bit mask. */ -#define RST_SWRST_bp 0 /* Software Reset bit position. */ - - -/* WDT - Watch-Dog Timer */ -/* WDT.CTRL bit masks and bit positions */ -#define WDT_PER_gm 0x3C /* Period group mask. */ -#define WDT_PER_gp 2 /* Period group position. */ -#define WDT_PER0_bm (1<<2) /* Period bit 0 mask. */ -#define WDT_PER0_bp 2 /* Period bit 0 position. */ -#define WDT_PER1_bm (1<<3) /* Period bit 1 mask. */ -#define WDT_PER1_bp 3 /* Period bit 1 position. */ -#define WDT_PER2_bm (1<<4) /* Period bit 2 mask. */ -#define WDT_PER2_bp 4 /* Period bit 2 position. */ -#define WDT_PER3_bm (1<<5) /* Period bit 3 mask. */ -#define WDT_PER3_bp 5 /* Period bit 3 position. */ - -#define WDT_ENABLE_bm 0x02 /* Enable bit mask. */ -#define WDT_ENABLE_bp 1 /* Enable bit position. */ - -#define WDT_CEN_bm 0x01 /* Change Enable bit mask. */ -#define WDT_CEN_bp 0 /* Change Enable bit position. */ - - -/* WDT.WINCTRL bit masks and bit positions */ -#define WDT_WPER_gm 0x3C /* Windowed Mode Period group mask. */ -#define WDT_WPER_gp 2 /* Windowed Mode Period group position. */ -#define WDT_WPER0_bm (1<<2) /* Windowed Mode Period bit 0 mask. */ -#define WDT_WPER0_bp 2 /* Windowed Mode Period bit 0 position. */ -#define WDT_WPER1_bm (1<<3) /* Windowed Mode Period bit 1 mask. */ -#define WDT_WPER1_bp 3 /* Windowed Mode Period bit 1 position. */ -#define WDT_WPER2_bm (1<<4) /* Windowed Mode Period bit 2 mask. */ -#define WDT_WPER2_bp 4 /* Windowed Mode Period bit 2 position. */ -#define WDT_WPER3_bm (1<<5) /* Windowed Mode Period bit 3 mask. */ -#define WDT_WPER3_bp 5 /* Windowed Mode Period bit 3 position. */ - -#define WDT_WEN_bm 0x02 /* Windowed Mode Enable bit mask. */ -#define WDT_WEN_bp 1 /* Windowed Mode Enable bit position. */ - -#define WDT_WCEN_bm 0x01 /* Windowed Mode Change Enable bit mask. */ -#define WDT_WCEN_bp 0 /* Windowed Mode Change Enable bit position. */ - - -/* WDT.STATUS bit masks and bit positions */ -#define WDT_SYNCBUSY_bm 0x01 /* Syncronization busy bit mask. */ -#define WDT_SYNCBUSY_bp 0 /* Syncronization busy bit position. */ - - -/* MCU - MCU Control */ -/* MCU.MCUCR bit masks and bit positions */ -#define MCU_JTAGD_bm 0x01 /* JTAG Disable bit mask. */ -#define MCU_JTAGD_bp 0 /* JTAG Disable bit position. */ - - -/* MCU.EVSYSLOCK bit masks and bit positions */ -#define MCU_EVSYS1LOCK_bm 0x10 /* Event Channel 4-7 Lock bit mask. */ -#define MCU_EVSYS1LOCK_bp 4 /* Event Channel 4-7 Lock bit position. */ - -#define MCU_EVSYS0LOCK_bm 0x01 /* Event Channel 0-3 Lock bit mask. */ -#define MCU_EVSYS0LOCK_bp 0 /* Event Channel 0-3 Lock bit position. */ - - -/* MCU.AWEXLOCK bit masks and bit positions */ -#define MCU_AWEXELOCK_bm 0x04 /* AWeX on T/C E0 Lock bit mask. */ -#define MCU_AWEXELOCK_bp 2 /* AWeX on T/C E0 Lock bit position. */ - -#define MCU_AWEXCLOCK_bm 0x01 /* AWeX on T/C C0 Lock bit mask. */ -#define MCU_AWEXCLOCK_bp 0 /* AWeX on T/C C0 Lock bit position. */ - - -/* PMIC - Programmable Multi-level Interrupt Controller */ -/* PMIC.STATUS bit masks and bit positions */ -#define PMIC_NMIEX_bm 0x80 /* Non-maskable Interrupt Executing bit mask. */ -#define PMIC_NMIEX_bp 7 /* Non-maskable Interrupt Executing bit position. */ - -#define PMIC_HILVLEX_bm 0x04 /* High Level Interrupt Executing bit mask. */ -#define PMIC_HILVLEX_bp 2 /* High Level Interrupt Executing bit position. */ - -#define PMIC_MEDLVLEX_bm 0x02 /* Medium Level Interrupt Executing bit mask. */ -#define PMIC_MEDLVLEX_bp 1 /* Medium Level Interrupt Executing bit position. */ - -#define PMIC_LOLVLEX_bm 0x01 /* Low Level Interrupt Executing bit mask. */ -#define PMIC_LOLVLEX_bp 0 /* Low Level Interrupt Executing bit position. */ - - -/* PMIC.CTRL bit masks and bit positions */ -#define PMIC_RREN_bm 0x80 /* Round-Robin Priority Enable bit mask. */ -#define PMIC_RREN_bp 7 /* Round-Robin Priority Enable bit position. */ - -#define PMIC_IVSEL_bm 0x40 /* Interrupt Vector Select bit mask. */ -#define PMIC_IVSEL_bp 6 /* Interrupt Vector Select bit position. */ - -#define PMIC_HILVLEN_bm 0x04 /* High Level Enable bit mask. */ -#define PMIC_HILVLEN_bp 2 /* High Level Enable bit position. */ - -#define PMIC_MEDLVLEN_bm 0x02 /* Medium Level Enable bit mask. */ -#define PMIC_MEDLVLEN_bp 1 /* Medium Level Enable bit position. */ - -#define PMIC_LOLVLEN_bm 0x01 /* Low Level Enable bit mask. */ -#define PMIC_LOLVLEN_bp 0 /* Low Level Enable bit position. */ - - -/* DMA - DMA Controller */ -/* DMA_CH.CTRLA bit masks and bit positions */ -#define DMA_CH_ENABLE_bm 0x80 /* Channel Enable bit mask. */ -#define DMA_CH_ENABLE_bp 7 /* Channel Enable bit position. */ - -#define DMA_CH_RESET_bm 0x40 /* Channel Software Reset bit mask. */ -#define DMA_CH_RESET_bp 6 /* Channel Software Reset bit position. */ - -#define DMA_CH_REPEAT_bm 0x20 /* Channel Repeat Mode bit mask. */ -#define DMA_CH_REPEAT_bp 5 /* Channel Repeat Mode bit position. */ - -#define DMA_CH_TRFREQ_bm 0x10 /* Channel Transfer Request bit mask. */ -#define DMA_CH_TRFREQ_bp 4 /* Channel Transfer Request bit position. */ - -#define DMA_CH_SINGLE_bm 0x04 /* Channel Single Shot Data Transfer bit mask. */ -#define DMA_CH_SINGLE_bp 2 /* Channel Single Shot Data Transfer bit position. */ - -#define DMA_CH_BURSTLEN_gm 0x03 /* Channel Transfer Mode group mask. */ -#define DMA_CH_BURSTLEN_gp 0 /* Channel Transfer Mode group position. */ -#define DMA_CH_BURSTLEN0_bm (1<<0) /* Channel Transfer Mode bit 0 mask. */ -#define DMA_CH_BURSTLEN0_bp 0 /* Channel Transfer Mode bit 0 position. */ -#define DMA_CH_BURSTLEN1_bm (1<<1) /* Channel Transfer Mode bit 1 mask. */ -#define DMA_CH_BURSTLEN1_bp 1 /* Channel Transfer Mode bit 1 position. */ - - -/* DMA_CH.CTRLB bit masks and bit positions */ -#define DMA_CH_CHBUSY_bm 0x80 /* Block Transfer Busy bit mask. */ -#define DMA_CH_CHBUSY_bp 7 /* Block Transfer Busy bit position. */ - -#define DMA_CH_CHPEND_bm 0x40 /* Block Transfer Pending bit mask. */ -#define DMA_CH_CHPEND_bp 6 /* Block Transfer Pending bit position. */ - -#define DMA_CH_ERRIF_bm 0x20 /* Block Transfer Error Interrupt Flag bit mask. */ -#define DMA_CH_ERRIF_bp 5 /* Block Transfer Error Interrupt Flag bit position. */ - -#define DMA_CH_TRNIF_bm 0x10 /* Transaction Complete Interrup Flag bit mask. */ -#define DMA_CH_TRNIF_bp 4 /* Transaction Complete Interrup Flag bit position. */ - -#define DMA_CH_ERRINTLVL_gm 0x0C /* Transfer Error Interrupt Level group mask. */ -#define DMA_CH_ERRINTLVL_gp 2 /* Transfer Error Interrupt Level group position. */ -#define DMA_CH_ERRINTLVL0_bm (1<<2) /* Transfer Error Interrupt Level bit 0 mask. */ -#define DMA_CH_ERRINTLVL0_bp 2 /* Transfer Error Interrupt Level bit 0 position. */ -#define DMA_CH_ERRINTLVL1_bm (1<<3) /* Transfer Error Interrupt Level bit 1 mask. */ -#define DMA_CH_ERRINTLVL1_bp 3 /* Transfer Error Interrupt Level bit 1 position. */ - -#define DMA_CH_TRNINTLVL_gm 0x03 /* Transaction Complete Interrupt Level group mask. */ -#define DMA_CH_TRNINTLVL_gp 0 /* Transaction Complete Interrupt Level group position. */ -#define DMA_CH_TRNINTLVL0_bm (1<<0) /* Transaction Complete Interrupt Level bit 0 mask. */ -#define DMA_CH_TRNINTLVL0_bp 0 /* Transaction Complete Interrupt Level bit 0 position. */ -#define DMA_CH_TRNINTLVL1_bm (1<<1) /* Transaction Complete Interrupt Level bit 1 mask. */ -#define DMA_CH_TRNINTLVL1_bp 1 /* Transaction Complete Interrupt Level bit 1 position. */ - - -/* DMA_CH.ADDRCTRL bit masks and bit positions */ -#define DMA_CH_SRCRELOAD_gm 0xC0 /* Channel Source Address Reload group mask. */ -#define DMA_CH_SRCRELOAD_gp 6 /* Channel Source Address Reload group position. */ -#define DMA_CH_SRCRELOAD0_bm (1<<6) /* Channel Source Address Reload bit 0 mask. */ -#define DMA_CH_SRCRELOAD0_bp 6 /* Channel Source Address Reload bit 0 position. */ -#define DMA_CH_SRCRELOAD1_bm (1<<7) /* Channel Source Address Reload bit 1 mask. */ -#define DMA_CH_SRCRELOAD1_bp 7 /* Channel Source Address Reload bit 1 position. */ - -#define DMA_CH_SRCDIR_gm 0x30 /* Channel Source Address Mode group mask. */ -#define DMA_CH_SRCDIR_gp 4 /* Channel Source Address Mode group position. */ -#define DMA_CH_SRCDIR0_bm (1<<4) /* Channel Source Address Mode bit 0 mask. */ -#define DMA_CH_SRCDIR0_bp 4 /* Channel Source Address Mode bit 0 position. */ -#define DMA_CH_SRCDIR1_bm (1<<5) /* Channel Source Address Mode bit 1 mask. */ -#define DMA_CH_SRCDIR1_bp 5 /* Channel Source Address Mode bit 1 position. */ - -#define DMA_CH_DESTRELOAD_gm 0x0C /* Channel Destination Address Reload group mask. */ -#define DMA_CH_DESTRELOAD_gp 2 /* Channel Destination Address Reload group position. */ -#define DMA_CH_DESTRELOAD0_bm (1<<2) /* Channel Destination Address Reload bit 0 mask. */ -#define DMA_CH_DESTRELOAD0_bp 2 /* Channel Destination Address Reload bit 0 position. */ -#define DMA_CH_DESTRELOAD1_bm (1<<3) /* Channel Destination Address Reload bit 1 mask. */ -#define DMA_CH_DESTRELOAD1_bp 3 /* Channel Destination Address Reload bit 1 position. */ - -#define DMA_CH_DESTDIR_gm 0x03 /* Channel Destination Address Mode group mask. */ -#define DMA_CH_DESTDIR_gp 0 /* Channel Destination Address Mode group position. */ -#define DMA_CH_DESTDIR0_bm (1<<0) /* Channel Destination Address Mode bit 0 mask. */ -#define DMA_CH_DESTDIR0_bp 0 /* Channel Destination Address Mode bit 0 position. */ -#define DMA_CH_DESTDIR1_bm (1<<1) /* Channel Destination Address Mode bit 1 mask. */ -#define DMA_CH_DESTDIR1_bp 1 /* Channel Destination Address Mode bit 1 position. */ - - -/* DMA_CH.TRIGSRC bit masks and bit positions */ -#define DMA_CH_TRIGSRC_gm 0xFF /* Channel Trigger Source group mask. */ -#define DMA_CH_TRIGSRC_gp 0 /* Channel Trigger Source group position. */ -#define DMA_CH_TRIGSRC0_bm (1<<0) /* Channel Trigger Source bit 0 mask. */ -#define DMA_CH_TRIGSRC0_bp 0 /* Channel Trigger Source bit 0 position. */ -#define DMA_CH_TRIGSRC1_bm (1<<1) /* Channel Trigger Source bit 1 mask. */ -#define DMA_CH_TRIGSRC1_bp 1 /* Channel Trigger Source bit 1 position. */ -#define DMA_CH_TRIGSRC2_bm (1<<2) /* Channel Trigger Source bit 2 mask. */ -#define DMA_CH_TRIGSRC2_bp 2 /* Channel Trigger Source bit 2 position. */ -#define DMA_CH_TRIGSRC3_bm (1<<3) /* Channel Trigger Source bit 3 mask. */ -#define DMA_CH_TRIGSRC3_bp 3 /* Channel Trigger Source bit 3 position. */ -#define DMA_CH_TRIGSRC4_bm (1<<4) /* Channel Trigger Source bit 4 mask. */ -#define DMA_CH_TRIGSRC4_bp 4 /* Channel Trigger Source bit 4 position. */ -#define DMA_CH_TRIGSRC5_bm (1<<5) /* Channel Trigger Source bit 5 mask. */ -#define DMA_CH_TRIGSRC5_bp 5 /* Channel Trigger Source bit 5 position. */ -#define DMA_CH_TRIGSRC6_bm (1<<6) /* Channel Trigger Source bit 6 mask. */ -#define DMA_CH_TRIGSRC6_bp 6 /* Channel Trigger Source bit 6 position. */ -#define DMA_CH_TRIGSRC7_bm (1<<7) /* Channel Trigger Source bit 7 mask. */ -#define DMA_CH_TRIGSRC7_bp 7 /* Channel Trigger Source bit 7 position. */ - - -/* DMA.CTRL bit masks and bit positions */ -#define DMA_ENABLE_bm 0x80 /* Enable bit mask. */ -#define DMA_ENABLE_bp 7 /* Enable bit position. */ - -#define DMA_RESET_bm 0x40 /* Software Reset bit mask. */ -#define DMA_RESET_bp 6 /* Software Reset bit position. */ - -#define DMA_DBUFMODE_gm 0x0C /* Double Buffering Mode group mask. */ -#define DMA_DBUFMODE_gp 2 /* Double Buffering Mode group position. */ -#define DMA_DBUFMODE0_bm (1<<2) /* Double Buffering Mode bit 0 mask. */ -#define DMA_DBUFMODE0_bp 2 /* Double Buffering Mode bit 0 position. */ -#define DMA_DBUFMODE1_bm (1<<3) /* Double Buffering Mode bit 1 mask. */ -#define DMA_DBUFMODE1_bp 3 /* Double Buffering Mode bit 1 position. */ - -#define DMA_PRIMODE_gm 0x03 /* Channel Priority Mode group mask. */ -#define DMA_PRIMODE_gp 0 /* Channel Priority Mode group position. */ -#define DMA_PRIMODE0_bm (1<<0) /* Channel Priority Mode bit 0 mask. */ -#define DMA_PRIMODE0_bp 0 /* Channel Priority Mode bit 0 position. */ -#define DMA_PRIMODE1_bm (1<<1) /* Channel Priority Mode bit 1 mask. */ -#define DMA_PRIMODE1_bp 1 /* Channel Priority Mode bit 1 position. */ - - -/* DMA.INTFLAGS bit masks and bit positions */ -#define DMA_CH3ERRIF_bm 0x80 /* Channel 3 Block Transfer Error Interrupt Flag bit mask. */ -#define DMA_CH3ERRIF_bp 7 /* Channel 3 Block Transfer Error Interrupt Flag bit position. */ - -#define DMA_CH2ERRIF_bm 0x40 /* Channel 2 Block Transfer Error Interrupt Flag bit mask. */ -#define DMA_CH2ERRIF_bp 6 /* Channel 2 Block Transfer Error Interrupt Flag bit position. */ - -#define DMA_CH1ERRIF_bm 0x20 /* Channel 1 Block Transfer Error Interrupt Flag bit mask. */ -#define DMA_CH1ERRIF_bp 5 /* Channel 1 Block Transfer Error Interrupt Flag bit position. */ - -#define DMA_CH0ERRIF_bm 0x10 /* Channel 0 Block Transfer Error Interrupt Flag bit mask. */ -#define DMA_CH0ERRIF_bp 4 /* Channel 0 Block Transfer Error Interrupt Flag bit position. */ - -#define DMA_CH3TRNIF_bm 0x08 /* Channel 3 Transaction Complete Interrupt Flag bit mask. */ -#define DMA_CH3TRNIF_bp 3 /* Channel 3 Transaction Complete Interrupt Flag bit position. */ - -#define DMA_CH2TRNIF_bm 0x04 /* Channel 2 Transaction Complete Interrupt Flag bit mask. */ -#define DMA_CH2TRNIF_bp 2 /* Channel 2 Transaction Complete Interrupt Flag bit position. */ - -#define DMA_CH1TRNIF_bm 0x02 /* Channel 1 Transaction Complete Interrupt Flag bit mask. */ -#define DMA_CH1TRNIF_bp 1 /* Channel 1 Transaction Complete Interrupt Flag bit position. */ - -#define DMA_CH0TRNIF_bm 0x01 /* Channel 0 Transaction Complete Interrupt Flag bit mask. */ -#define DMA_CH0TRNIF_bp 0 /* Channel 0 Transaction Complete Interrupt Flag bit position. */ - - -/* DMA.STATUS bit masks and bit positions */ -#define DMA_CH3BUSY_bm 0x80 /* Channel 3 Block Transfer Busy bit mask. */ -#define DMA_CH3BUSY_bp 7 /* Channel 3 Block Transfer Busy bit position. */ - -#define DMA_CH2BUSY_bm 0x40 /* Channel 2 Block Transfer Busy bit mask. */ -#define DMA_CH2BUSY_bp 6 /* Channel 2 Block Transfer Busy bit position. */ - -#define DMA_CH1BUSY_bm 0x20 /* Channel 1 Block Transfer Busy bit mask. */ -#define DMA_CH1BUSY_bp 5 /* Channel 1 Block Transfer Busy bit position. */ - -#define DMA_CH0BUSY_bm 0x10 /* Channel 0 Block Transfer Busy bit mask. */ -#define DMA_CH0BUSY_bp 4 /* Channel 0 Block Transfer Busy bit position. */ - -#define DMA_CH3PEND_bm 0x08 /* Channel 3 Block Transfer Pending bit mask. */ -#define DMA_CH3PEND_bp 3 /* Channel 3 Block Transfer Pending bit position. */ - -#define DMA_CH2PEND_bm 0x04 /* Channel 2 Block Transfer Pending bit mask. */ -#define DMA_CH2PEND_bp 2 /* Channel 2 Block Transfer Pending bit position. */ - -#define DMA_CH1PEND_bm 0x02 /* Channel 1 Block Transfer Pending bit mask. */ -#define DMA_CH1PEND_bp 1 /* Channel 1 Block Transfer Pending bit position. */ - -#define DMA_CH0PEND_bm 0x01 /* Channel 0 Block Transfer Pending bit mask. */ -#define DMA_CH0PEND_bp 0 /* Channel 0 Block Transfer Pending bit position. */ - - -/* EVSYS - Event System */ -/* EVSYS.CH0MUX bit masks and bit positions */ -#define EVSYS_CHMUX_gm 0xFF /* Event Channel 0 Multiplexer group mask. */ -#define EVSYS_CHMUX_gp 0 /* Event Channel 0 Multiplexer group position. */ -#define EVSYS_CHMUX0_bm (1<<0) /* Event Channel 0 Multiplexer bit 0 mask. */ -#define EVSYS_CHMUX0_bp 0 /* Event Channel 0 Multiplexer bit 0 position. */ -#define EVSYS_CHMUX1_bm (1<<1) /* Event Channel 0 Multiplexer bit 1 mask. */ -#define EVSYS_CHMUX1_bp 1 /* Event Channel 0 Multiplexer bit 1 position. */ -#define EVSYS_CHMUX2_bm (1<<2) /* Event Channel 0 Multiplexer bit 2 mask. */ -#define EVSYS_CHMUX2_bp 2 /* Event Channel 0 Multiplexer bit 2 position. */ -#define EVSYS_CHMUX3_bm (1<<3) /* Event Channel 0 Multiplexer bit 3 mask. */ -#define EVSYS_CHMUX3_bp 3 /* Event Channel 0 Multiplexer bit 3 position. */ -#define EVSYS_CHMUX4_bm (1<<4) /* Event Channel 0 Multiplexer bit 4 mask. */ -#define EVSYS_CHMUX4_bp 4 /* Event Channel 0 Multiplexer bit 4 position. */ -#define EVSYS_CHMUX5_bm (1<<5) /* Event Channel 0 Multiplexer bit 5 mask. */ -#define EVSYS_CHMUX5_bp 5 /* Event Channel 0 Multiplexer bit 5 position. */ -#define EVSYS_CHMUX6_bm (1<<6) /* Event Channel 0 Multiplexer bit 6 mask. */ -#define EVSYS_CHMUX6_bp 6 /* Event Channel 0 Multiplexer bit 6 position. */ -#define EVSYS_CHMUX7_bm (1<<7) /* Event Channel 0 Multiplexer bit 7 mask. */ -#define EVSYS_CHMUX7_bp 7 /* Event Channel 0 Multiplexer bit 7 position. */ - - -/* EVSYS.CH1MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH2MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH3MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH4MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH5MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH6MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH7MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH0CTRL bit masks and bit positions */ -#define EVSYS_QDIRM_gm 0x60 /* Quadrature Decoder Index Recognition Mode group mask. */ -#define EVSYS_QDIRM_gp 5 /* Quadrature Decoder Index Recognition Mode group position. */ -#define EVSYS_QDIRM0_bm (1<<5) /* Quadrature Decoder Index Recognition Mode bit 0 mask. */ -#define EVSYS_QDIRM0_bp 5 /* Quadrature Decoder Index Recognition Mode bit 0 position. */ -#define EVSYS_QDIRM1_bm (1<<6) /* Quadrature Decoder Index Recognition Mode bit 1 mask. */ -#define EVSYS_QDIRM1_bp 6 /* Quadrature Decoder Index Recognition Mode bit 1 position. */ - -#define EVSYS_QDIEN_bm 0x10 /* Quadrature Decoder Index Enable bit mask. */ -#define EVSYS_QDIEN_bp 4 /* Quadrature Decoder Index Enable bit position. */ - -#define EVSYS_QDEN_bm 0x08 /* Quadrature Decoder Enable bit mask. */ -#define EVSYS_QDEN_bp 3 /* Quadrature Decoder Enable bit position. */ - -#define EVSYS_DIGFILT_gm 0x07 /* Digital Filter group mask. */ -#define EVSYS_DIGFILT_gp 0 /* Digital Filter group position. */ -#define EVSYS_DIGFILT0_bm (1<<0) /* Digital Filter bit 0 mask. */ -#define EVSYS_DIGFILT0_bp 0 /* Digital Filter bit 0 position. */ -#define EVSYS_DIGFILT1_bm (1<<1) /* Digital Filter bit 1 mask. */ -#define EVSYS_DIGFILT1_bp 1 /* Digital Filter bit 1 position. */ -#define EVSYS_DIGFILT2_bm (1<<2) /* Digital Filter bit 2 mask. */ -#define EVSYS_DIGFILT2_bp 2 /* Digital Filter bit 2 position. */ - - -/* EVSYS.CH1CTRL bit masks and bit positions */ -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* EVSYS.CH2CTRL bit masks and bit positions */ -/* EVSYS_QDIRM_gm Predefined. */ -/* EVSYS_QDIRM_gp Predefined. */ -/* EVSYS_QDIRM0_bm Predefined. */ -/* EVSYS_QDIRM0_bp Predefined. */ -/* EVSYS_QDIRM1_bm Predefined. */ -/* EVSYS_QDIRM1_bp Predefined. */ - -/* EVSYS_QDIEN_bm Predefined. */ -/* EVSYS_QDIEN_bp Predefined. */ - -/* EVSYS_QDEN_bm Predefined. */ -/* EVSYS_QDEN_bp Predefined. */ - -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* EVSYS.CH3CTRL bit masks and bit positions */ -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* EVSYS.CH4CTRL bit masks and bit positions */ -/* EVSYS_QDIRM_gm Predefined. */ -/* EVSYS_QDIRM_gp Predefined. */ -/* EVSYS_QDIRM0_bm Predefined. */ -/* EVSYS_QDIRM0_bp Predefined. */ -/* EVSYS_QDIRM1_bm Predefined. */ -/* EVSYS_QDIRM1_bp Predefined. */ - -/* EVSYS_QDIEN_bm Predefined. */ -/* EVSYS_QDIEN_bp Predefined. */ - -/* EVSYS_QDEN_bm Predefined. */ -/* EVSYS_QDEN_bp Predefined. */ - -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* EVSYS.CH5CTRL bit masks and bit positions */ -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* EVSYS.CH6CTRL bit masks and bit positions */ -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* EVSYS.CH7CTRL bit masks and bit positions */ -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* NVM - Non Volatile Memory Controller */ -/* NVM.CMD bit masks and bit positions */ -#define NVM_CMD_gm 0xFF /* Command group mask. */ -#define NVM_CMD_gp 0 /* Command group position. */ -#define NVM_CMD0_bm (1<<0) /* Command bit 0 mask. */ -#define NVM_CMD0_bp 0 /* Command bit 0 position. */ -#define NVM_CMD1_bm (1<<1) /* Command bit 1 mask. */ -#define NVM_CMD1_bp 1 /* Command bit 1 position. */ -#define NVM_CMD2_bm (1<<2) /* Command bit 2 mask. */ -#define NVM_CMD2_bp 2 /* Command bit 2 position. */ -#define NVM_CMD3_bm (1<<3) /* Command bit 3 mask. */ -#define NVM_CMD3_bp 3 /* Command bit 3 position. */ -#define NVM_CMD4_bm (1<<4) /* Command bit 4 mask. */ -#define NVM_CMD4_bp 4 /* Command bit 4 position. */ -#define NVM_CMD5_bm (1<<5) /* Command bit 5 mask. */ -#define NVM_CMD5_bp 5 /* Command bit 5 position. */ -#define NVM_CMD6_bm (1<<6) /* Command bit 6 mask. */ -#define NVM_CMD6_bp 6 /* Command bit 6 position. */ -#define NVM_CMD7_bm (1<<7) /* Command bit 7 mask. */ -#define NVM_CMD7_bp 7 /* Command bit 7 position. */ - - -/* NVM.CTRLA bit masks and bit positions */ -#define NVM_CMDEX_bm 0x01 /* Command Execute bit mask. */ -#define NVM_CMDEX_bp 0 /* Command Execute bit position. */ - - -/* NVM.CTRLB bit masks and bit positions */ -#define NVM_EEMAPEN_bm 0x08 /* EEPROM Mapping Enable bit mask. */ -#define NVM_EEMAPEN_bp 3 /* EEPROM Mapping Enable bit position. */ - -#define NVM_FPRM_bm 0x04 /* Flash Power Reduction Enable bit mask. */ -#define NVM_FPRM_bp 2 /* Flash Power Reduction Enable bit position. */ - -#define NVM_EPRM_bm 0x02 /* EEPROM Power Reduction Enable bit mask. */ -#define NVM_EPRM_bp 1 /* EEPROM Power Reduction Enable bit position. */ - -#define NVM_SPMLOCK_bm 0x01 /* SPM Lock bit mask. */ -#define NVM_SPMLOCK_bp 0 /* SPM Lock bit position. */ - - -/* NVM.INTCTRL bit masks and bit positions */ -#define NVM_SPMLVL_gm 0x0C /* SPM Interrupt Level group mask. */ -#define NVM_SPMLVL_gp 2 /* SPM Interrupt Level group position. */ -#define NVM_SPMLVL0_bm (1<<2) /* SPM Interrupt Level bit 0 mask. */ -#define NVM_SPMLVL0_bp 2 /* SPM Interrupt Level bit 0 position. */ -#define NVM_SPMLVL1_bm (1<<3) /* SPM Interrupt Level bit 1 mask. */ -#define NVM_SPMLVL1_bp 3 /* SPM Interrupt Level bit 1 position. */ - -#define NVM_EELVL_gm 0x03 /* EEPROM Interrupt Level group mask. */ -#define NVM_EELVL_gp 0 /* EEPROM Interrupt Level group position. */ -#define NVM_EELVL0_bm (1<<0) /* EEPROM Interrupt Level bit 0 mask. */ -#define NVM_EELVL0_bp 0 /* EEPROM Interrupt Level bit 0 position. */ -#define NVM_EELVL1_bm (1<<1) /* EEPROM Interrupt Level bit 1 mask. */ -#define NVM_EELVL1_bp 1 /* EEPROM Interrupt Level bit 1 position. */ - - -/* NVM.STATUS bit masks and bit positions */ -#define NVM_NVMBUSY_bm 0x80 /* Non-volatile Memory Busy bit mask. */ -#define NVM_NVMBUSY_bp 7 /* Non-volatile Memory Busy bit position. */ - -#define NVM_FBUSY_bm 0x40 /* Flash Memory Busy bit mask. */ -#define NVM_FBUSY_bp 6 /* Flash Memory Busy bit position. */ - -#define NVM_EELOAD_bm 0x02 /* EEPROM Page Buffer Active Loading bit mask. */ -#define NVM_EELOAD_bp 1 /* EEPROM Page Buffer Active Loading bit position. */ - -#define NVM_FLOAD_bm 0x01 /* Flash Page Buffer Active Loading bit mask. */ -#define NVM_FLOAD_bp 0 /* Flash Page Buffer Active Loading bit position. */ - - -/* NVM.LOCKBITS bit masks and bit positions */ -#define NVM_BLBB_gm 0xC0 /* Boot Lock Bits - Boot Section group mask. */ -#define NVM_BLBB_gp 6 /* Boot Lock Bits - Boot Section group position. */ -#define NVM_BLBB0_bm (1<<6) /* Boot Lock Bits - Boot Section bit 0 mask. */ -#define NVM_BLBB0_bp 6 /* Boot Lock Bits - Boot Section bit 0 position. */ -#define NVM_BLBB1_bm (1<<7) /* Boot Lock Bits - Boot Section bit 1 mask. */ -#define NVM_BLBB1_bp 7 /* Boot Lock Bits - Boot Section bit 1 position. */ - -#define NVM_BLBA_gm 0x30 /* Boot Lock Bits - Application Section group mask. */ -#define NVM_BLBA_gp 4 /* Boot Lock Bits - Application Section group position. */ -#define NVM_BLBA0_bm (1<<4) /* Boot Lock Bits - Application Section bit 0 mask. */ -#define NVM_BLBA0_bp 4 /* Boot Lock Bits - Application Section bit 0 position. */ -#define NVM_BLBA1_bm (1<<5) /* Boot Lock Bits - Application Section bit 1 mask. */ -#define NVM_BLBA1_bp 5 /* Boot Lock Bits - Application Section bit 1 position. */ - -#define NVM_BLBAT_gm 0x0C /* Boot Lock Bits - Application Table group mask. */ -#define NVM_BLBAT_gp 2 /* Boot Lock Bits - Application Table group position. */ -#define NVM_BLBAT0_bm (1<<2) /* Boot Lock Bits - Application Table bit 0 mask. */ -#define NVM_BLBAT0_bp 2 /* Boot Lock Bits - Application Table bit 0 position. */ -#define NVM_BLBAT1_bm (1<<3) /* Boot Lock Bits - Application Table bit 1 mask. */ -#define NVM_BLBAT1_bp 3 /* Boot Lock Bits - Application Table bit 1 position. */ - -#define NVM_LB_gm 0x03 /* Lock Bits group mask. */ -#define NVM_LB_gp 0 /* Lock Bits group position. */ -#define NVM_LB0_bm (1<<0) /* Lock Bits bit 0 mask. */ -#define NVM_LB0_bp 0 /* Lock Bits bit 0 position. */ -#define NVM_LB1_bm (1<<1) /* Lock Bits bit 1 mask. */ -#define NVM_LB1_bp 1 /* Lock Bits bit 1 position. */ - - -/* NVM_LOCKBITS.LOCKBITS bit masks and bit positions */ -#define NVM_LOCKBITS_BLBB_gm 0xC0 /* Boot Lock Bits - Boot Section group mask. */ -#define NVM_LOCKBITS_BLBB_gp 6 /* Boot Lock Bits - Boot Section group position. */ -#define NVM_LOCKBITS_BLBB0_bm (1<<6) /* Boot Lock Bits - Boot Section bit 0 mask. */ -#define NVM_LOCKBITS_BLBB0_bp 6 /* Boot Lock Bits - Boot Section bit 0 position. */ -#define NVM_LOCKBITS_BLBB1_bm (1<<7) /* Boot Lock Bits - Boot Section bit 1 mask. */ -#define NVM_LOCKBITS_BLBB1_bp 7 /* Boot Lock Bits - Boot Section bit 1 position. */ - -#define NVM_LOCKBITS_BLBA_gm 0x30 /* Boot Lock Bits - Application Section group mask. */ -#define NVM_LOCKBITS_BLBA_gp 4 /* Boot Lock Bits - Application Section group position. */ -#define NVM_LOCKBITS_BLBA0_bm (1<<4) /* Boot Lock Bits - Application Section bit 0 mask. */ -#define NVM_LOCKBITS_BLBA0_bp 4 /* Boot Lock Bits - Application Section bit 0 position. */ -#define NVM_LOCKBITS_BLBA1_bm (1<<5) /* Boot Lock Bits - Application Section bit 1 mask. */ -#define NVM_LOCKBITS_BLBA1_bp 5 /* Boot Lock Bits - Application Section bit 1 position. */ - -#define NVM_LOCKBITS_BLBAT_gm 0x0C /* Boot Lock Bits - Application Table group mask. */ -#define NVM_LOCKBITS_BLBAT_gp 2 /* Boot Lock Bits - Application Table group position. */ -#define NVM_LOCKBITS_BLBAT0_bm (1<<2) /* Boot Lock Bits - Application Table bit 0 mask. */ -#define NVM_LOCKBITS_BLBAT0_bp 2 /* Boot Lock Bits - Application Table bit 0 position. */ -#define NVM_LOCKBITS_BLBAT1_bm (1<<3) /* Boot Lock Bits - Application Table bit 1 mask. */ -#define NVM_LOCKBITS_BLBAT1_bp 3 /* Boot Lock Bits - Application Table bit 1 position. */ - -#define NVM_LOCKBITS_LB_gm 0x03 /* Lock Bits group mask. */ -#define NVM_LOCKBITS_LB_gp 0 /* Lock Bits group position. */ -#define NVM_LOCKBITS_LB0_bm (1<<0) /* Lock Bits bit 0 mask. */ -#define NVM_LOCKBITS_LB0_bp 0 /* Lock Bits bit 0 position. */ -#define NVM_LOCKBITS_LB1_bm (1<<1) /* Lock Bits bit 1 mask. */ -#define NVM_LOCKBITS_LB1_bp 1 /* Lock Bits bit 1 position. */ - - -/* NVM_FUSES.FUSEBYTE0 bit masks and bit positions */ -#define NVM_FUSES_JTAGUSERID_gm 0xFF /* JTAG User ID group mask. */ -#define NVM_FUSES_JTAGUSERID_gp 0 /* JTAG User ID group position. */ -#define NVM_FUSES_JTAGUSERID0_bm (1<<0) /* JTAG User ID bit 0 mask. */ -#define NVM_FUSES_JTAGUSERID0_bp 0 /* JTAG User ID bit 0 position. */ -#define NVM_FUSES_JTAGUSERID1_bm (1<<1) /* JTAG User ID bit 1 mask. */ -#define NVM_FUSES_JTAGUSERID1_bp 1 /* JTAG User ID bit 1 position. */ -#define NVM_FUSES_JTAGUSERID2_bm (1<<2) /* JTAG User ID bit 2 mask. */ -#define NVM_FUSES_JTAGUSERID2_bp 2 /* JTAG User ID bit 2 position. */ -#define NVM_FUSES_JTAGUSERID3_bm (1<<3) /* JTAG User ID bit 3 mask. */ -#define NVM_FUSES_JTAGUSERID3_bp 3 /* JTAG User ID bit 3 position. */ -#define NVM_FUSES_JTAGUSERID4_bm (1<<4) /* JTAG User ID bit 4 mask. */ -#define NVM_FUSES_JTAGUSERID4_bp 4 /* JTAG User ID bit 4 position. */ -#define NVM_FUSES_JTAGUSERID5_bm (1<<5) /* JTAG User ID bit 5 mask. */ -#define NVM_FUSES_JTAGUSERID5_bp 5 /* JTAG User ID bit 5 position. */ -#define NVM_FUSES_JTAGUSERID6_bm (1<<6) /* JTAG User ID bit 6 mask. */ -#define NVM_FUSES_JTAGUSERID6_bp 6 /* JTAG User ID bit 6 position. */ -#define NVM_FUSES_JTAGUSERID7_bm (1<<7) /* JTAG User ID bit 7 mask. */ -#define NVM_FUSES_JTAGUSERID7_bp 7 /* JTAG User ID bit 7 position. */ - - -/* NVM_FUSES.FUSEBYTE1 bit masks and bit positions */ -#define NVM_FUSES_WDWP_gm 0xF0 /* Watchdog Window Timeout Period group mask. */ -#define NVM_FUSES_WDWP_gp 4 /* Watchdog Window Timeout Period group position. */ -#define NVM_FUSES_WDWP0_bm (1<<4) /* Watchdog Window Timeout Period bit 0 mask. */ -#define NVM_FUSES_WDWP0_bp 4 /* Watchdog Window Timeout Period bit 0 position. */ -#define NVM_FUSES_WDWP1_bm (1<<5) /* Watchdog Window Timeout Period bit 1 mask. */ -#define NVM_FUSES_WDWP1_bp 5 /* Watchdog Window Timeout Period bit 1 position. */ -#define NVM_FUSES_WDWP2_bm (1<<6) /* Watchdog Window Timeout Period bit 2 mask. */ -#define NVM_FUSES_WDWP2_bp 6 /* Watchdog Window Timeout Period bit 2 position. */ -#define NVM_FUSES_WDWP3_bm (1<<7) /* Watchdog Window Timeout Period bit 3 mask. */ -#define NVM_FUSES_WDWP3_bp 7 /* Watchdog Window Timeout Period bit 3 position. */ - -#define NVM_FUSES_WDP_gm 0x0F /* Watchdog Timeout Period group mask. */ -#define NVM_FUSES_WDP_gp 0 /* Watchdog Timeout Period group position. */ -#define NVM_FUSES_WDP0_bm (1<<0) /* Watchdog Timeout Period bit 0 mask. */ -#define NVM_FUSES_WDP0_bp 0 /* Watchdog Timeout Period bit 0 position. */ -#define NVM_FUSES_WDP1_bm (1<<1) /* Watchdog Timeout Period bit 1 mask. */ -#define NVM_FUSES_WDP1_bp 1 /* Watchdog Timeout Period bit 1 position. */ -#define NVM_FUSES_WDP2_bm (1<<2) /* Watchdog Timeout Period bit 2 mask. */ -#define NVM_FUSES_WDP2_bp 2 /* Watchdog Timeout Period bit 2 position. */ -#define NVM_FUSES_WDP3_bm (1<<3) /* Watchdog Timeout Period bit 3 mask. */ -#define NVM_FUSES_WDP3_bp 3 /* Watchdog Timeout Period bit 3 position. */ - - -/* NVM_FUSES.FUSEBYTE2 bit masks and bit positions */ -#define NVM_FUSES_DVSDON_bm 0x80 /* Spike Detector Enable bit mask. */ -#define NVM_FUSES_DVSDON_bp 7 /* Spike Detector Enable bit position. */ - -#define NVM_FUSES_BOOTRST_bm 0x40 /* Boot Loader Section Reset Vector bit mask. */ -#define NVM_FUSES_BOOTRST_bp 6 /* Boot Loader Section Reset Vector bit position. */ - -#define NVM_FUSES_BODACT_gm 0x0C /* BOD Operation in Active Mode group mask. */ -#define NVM_FUSES_BODACT_gp 2 /* BOD Operation in Active Mode group position. */ -#define NVM_FUSES_BODACT0_bm (1<<2) /* BOD Operation in Active Mode bit 0 mask. */ -#define NVM_FUSES_BODACT0_bp 2 /* BOD Operation in Active Mode bit 0 position. */ -#define NVM_FUSES_BODACT1_bm (1<<3) /* BOD Operation in Active Mode bit 1 mask. */ -#define NVM_FUSES_BODACT1_bp 3 /* BOD Operation in Active Mode bit 1 position. */ - -#define NVM_FUSES_BODPD_gm 0x03 /* BOD Operation in Power-Down Mode group mask. */ -#define NVM_FUSES_BODPD_gp 0 /* BOD Operation in Power-Down Mode group position. */ -#define NVM_FUSES_BODPD0_bm (1<<0) /* BOD Operation in Power-Down Mode bit 0 mask. */ -#define NVM_FUSES_BODPD0_bp 0 /* BOD Operation in Power-Down Mode bit 0 position. */ -#define NVM_FUSES_BODPD1_bm (1<<1) /* BOD Operation in Power-Down Mode bit 1 mask. */ -#define NVM_FUSES_BODPD1_bp 1 /* BOD Operation in Power-Down Mode bit 1 position. */ - - -/* NVM_FUSES.FUSEBYTE4 bit masks and bit positions */ -#define NVM_FUSES_SUT_gm 0x0C /* Start-up Time group mask. */ -#define NVM_FUSES_SUT_gp 2 /* Start-up Time group position. */ -#define NVM_FUSES_SUT0_bm (1<<2) /* Start-up Time bit 0 mask. */ -#define NVM_FUSES_SUT0_bp 2 /* Start-up Time bit 0 position. */ -#define NVM_FUSES_SUT1_bm (1<<3) /* Start-up Time bit 1 mask. */ -#define NVM_FUSES_SUT1_bp 3 /* Start-up Time bit 1 position. */ - -#define NVM_FUSES_WDLOCK_bm 0x02 /* Watchdog Timer Lock bit mask. */ -#define NVM_FUSES_WDLOCK_bp 1 /* Watchdog Timer Lock bit position. */ - -#define NVM_FUSES_JTAGEN_bm 0x01 /* JTAG Interface Enable bit mask. */ -#define NVM_FUSES_JTAGEN_bp 0 /* JTAG Interface Enable bit position. */ - - -/* NVM_FUSES.FUSEBYTE5 bit masks and bit positions */ -#define NVM_FUSES_EESAVE_bm 0x08 /* Preserve EEPROM Through Chip Erase bit mask. */ -#define NVM_FUSES_EESAVE_bp 3 /* Preserve EEPROM Through Chip Erase bit position. */ - -#define NVM_FUSES_BODLVL_gm 0x07 /* Brown Out Detection Voltage Level group mask. */ -#define NVM_FUSES_BODLVL_gp 0 /* Brown Out Detection Voltage Level group position. */ -#define NVM_FUSES_BODLVL0_bm (1<<0) /* Brown Out Detection Voltage Level bit 0 mask. */ -#define NVM_FUSES_BODLVL0_bp 0 /* Brown Out Detection Voltage Level bit 0 position. */ -#define NVM_FUSES_BODLVL1_bm (1<<1) /* Brown Out Detection Voltage Level bit 1 mask. */ -#define NVM_FUSES_BODLVL1_bp 1 /* Brown Out Detection Voltage Level bit 1 position. */ -#define NVM_FUSES_BODLVL2_bm (1<<2) /* Brown Out Detection Voltage Level bit 2 mask. */ -#define NVM_FUSES_BODLVL2_bp 2 /* Brown Out Detection Voltage Level bit 2 position. */ - - -/* AC - Analog Comparator */ -/* AC.AC0CTRL bit masks and bit positions */ -#define AC_INTMODE_gm 0xC0 /* Interrupt Mode group mask. */ -#define AC_INTMODE_gp 6 /* Interrupt Mode group position. */ -#define AC_INTMODE0_bm (1<<6) /* Interrupt Mode bit 0 mask. */ -#define AC_INTMODE0_bp 6 /* Interrupt Mode bit 0 position. */ -#define AC_INTMODE1_bm (1<<7) /* Interrupt Mode bit 1 mask. */ -#define AC_INTMODE1_bp 7 /* Interrupt Mode bit 1 position. */ - -#define AC_INTLVL_gm 0x30 /* Interrupt Level group mask. */ -#define AC_INTLVL_gp 4 /* Interrupt Level group position. */ -#define AC_INTLVL0_bm (1<<4) /* Interrupt Level bit 0 mask. */ -#define AC_INTLVL0_bp 4 /* Interrupt Level bit 0 position. */ -#define AC_INTLVL1_bm (1<<5) /* Interrupt Level bit 1 mask. */ -#define AC_INTLVL1_bp 5 /* Interrupt Level bit 1 position. */ - -#define AC_HSMODE_bm 0x08 /* High-speed Mode bit mask. */ -#define AC_HSMODE_bp 3 /* High-speed Mode bit position. */ - -#define AC_HYSMODE_gm 0x06 /* Hysteresis Mode group mask. */ -#define AC_HYSMODE_gp 1 /* Hysteresis Mode group position. */ -#define AC_HYSMODE0_bm (1<<1) /* Hysteresis Mode bit 0 mask. */ -#define AC_HYSMODE0_bp 1 /* Hysteresis Mode bit 0 position. */ -#define AC_HYSMODE1_bm (1<<2) /* Hysteresis Mode bit 1 mask. */ -#define AC_HYSMODE1_bp 2 /* Hysteresis Mode bit 1 position. */ - -#define AC_ENABLE_bm 0x01 /* Enable bit mask. */ -#define AC_ENABLE_bp 0 /* Enable bit position. */ - - -/* AC.AC1CTRL bit masks and bit positions */ -/* AC_INTMODE_gm Predefined. */ -/* AC_INTMODE_gp Predefined. */ -/* AC_INTMODE0_bm Predefined. */ -/* AC_INTMODE0_bp Predefined. */ -/* AC_INTMODE1_bm Predefined. */ -/* AC_INTMODE1_bp Predefined. */ - -/* AC_INTLVL_gm Predefined. */ -/* AC_INTLVL_gp Predefined. */ -/* AC_INTLVL0_bm Predefined. */ -/* AC_INTLVL0_bp Predefined. */ -/* AC_INTLVL1_bm Predefined. */ -/* AC_INTLVL1_bp Predefined. */ - -/* AC_HSMODE_bm Predefined. */ -/* AC_HSMODE_bp Predefined. */ - -/* AC_HYSMODE_gm Predefined. */ -/* AC_HYSMODE_gp Predefined. */ -/* AC_HYSMODE0_bm Predefined. */ -/* AC_HYSMODE0_bp Predefined. */ -/* AC_HYSMODE1_bm Predefined. */ -/* AC_HYSMODE1_bp Predefined. */ - -/* AC_ENABLE_bm Predefined. */ -/* AC_ENABLE_bp Predefined. */ - - -/* AC.AC0MUXCTRL bit masks and bit positions */ -#define AC_MUXPOS_gm 0x38 /* MUX Positive Input group mask. */ -#define AC_MUXPOS_gp 3 /* MUX Positive Input group position. */ -#define AC_MUXPOS0_bm (1<<3) /* MUX Positive Input bit 0 mask. */ -#define AC_MUXPOS0_bp 3 /* MUX Positive Input bit 0 position. */ -#define AC_MUXPOS1_bm (1<<4) /* MUX Positive Input bit 1 mask. */ -#define AC_MUXPOS1_bp 4 /* MUX Positive Input bit 1 position. */ -#define AC_MUXPOS2_bm (1<<5) /* MUX Positive Input bit 2 mask. */ -#define AC_MUXPOS2_bp 5 /* MUX Positive Input bit 2 position. */ - -#define AC_MUXNEG_gm 0x07 /* MUX Negative Input group mask. */ -#define AC_MUXNEG_gp 0 /* MUX Negative Input group position. */ -#define AC_MUXNEG0_bm (1<<0) /* MUX Negative Input bit 0 mask. */ -#define AC_MUXNEG0_bp 0 /* MUX Negative Input bit 0 position. */ -#define AC_MUXNEG1_bm (1<<1) /* MUX Negative Input bit 1 mask. */ -#define AC_MUXNEG1_bp 1 /* MUX Negative Input bit 1 position. */ -#define AC_MUXNEG2_bm (1<<2) /* MUX Negative Input bit 2 mask. */ -#define AC_MUXNEG2_bp 2 /* MUX Negative Input bit 2 position. */ - - -/* AC.AC1MUXCTRL bit masks and bit positions */ -/* AC_MUXPOS_gm Predefined. */ -/* AC_MUXPOS_gp Predefined. */ -/* AC_MUXPOS0_bm Predefined. */ -/* AC_MUXPOS0_bp Predefined. */ -/* AC_MUXPOS1_bm Predefined. */ -/* AC_MUXPOS1_bp Predefined. */ -/* AC_MUXPOS2_bm Predefined. */ -/* AC_MUXPOS2_bp Predefined. */ - -/* AC_MUXNEG_gm Predefined. */ -/* AC_MUXNEG_gp Predefined. */ -/* AC_MUXNEG0_bm Predefined. */ -/* AC_MUXNEG0_bp Predefined. */ -/* AC_MUXNEG1_bm Predefined. */ -/* AC_MUXNEG1_bp Predefined. */ -/* AC_MUXNEG2_bm Predefined. */ -/* AC_MUXNEG2_bp Predefined. */ - - -/* AC.CTRLA bit masks and bit positions */ -#define AC_AC0OUT_bm 0x01 /* Comparator 0 Output Enable bit mask. */ -#define AC_AC0OUT_bp 0 /* Comparator 0 Output Enable bit position. */ - - -/* AC.CTRLB bit masks and bit positions */ -#define AC_SCALEFAC_gm 0x3F /* VCC Voltage Scaler Factor group mask. */ -#define AC_SCALEFAC_gp 0 /* VCC Voltage Scaler Factor group position. */ -#define AC_SCALEFAC0_bm (1<<0) /* VCC Voltage Scaler Factor bit 0 mask. */ -#define AC_SCALEFAC0_bp 0 /* VCC Voltage Scaler Factor bit 0 position. */ -#define AC_SCALEFAC1_bm (1<<1) /* VCC Voltage Scaler Factor bit 1 mask. */ -#define AC_SCALEFAC1_bp 1 /* VCC Voltage Scaler Factor bit 1 position. */ -#define AC_SCALEFAC2_bm (1<<2) /* VCC Voltage Scaler Factor bit 2 mask. */ -#define AC_SCALEFAC2_bp 2 /* VCC Voltage Scaler Factor bit 2 position. */ -#define AC_SCALEFAC3_bm (1<<3) /* VCC Voltage Scaler Factor bit 3 mask. */ -#define AC_SCALEFAC3_bp 3 /* VCC Voltage Scaler Factor bit 3 position. */ -#define AC_SCALEFAC4_bm (1<<4) /* VCC Voltage Scaler Factor bit 4 mask. */ -#define AC_SCALEFAC4_bp 4 /* VCC Voltage Scaler Factor bit 4 position. */ -#define AC_SCALEFAC5_bm (1<<5) /* VCC Voltage Scaler Factor bit 5 mask. */ -#define AC_SCALEFAC5_bp 5 /* VCC Voltage Scaler Factor bit 5 position. */ - - -/* AC.WINCTRL bit masks and bit positions */ -#define AC_WEN_bm 0x10 /* Window Mode Enable bit mask. */ -#define AC_WEN_bp 4 /* Window Mode Enable bit position. */ - -#define AC_WINTMODE_gm 0x0C /* Window Interrupt Mode group mask. */ -#define AC_WINTMODE_gp 2 /* Window Interrupt Mode group position. */ -#define AC_WINTMODE0_bm (1<<2) /* Window Interrupt Mode bit 0 mask. */ -#define AC_WINTMODE0_bp 2 /* Window Interrupt Mode bit 0 position. */ -#define AC_WINTMODE1_bm (1<<3) /* Window Interrupt Mode bit 1 mask. */ -#define AC_WINTMODE1_bp 3 /* Window Interrupt Mode bit 1 position. */ - -#define AC_WINTLVL_gm 0x03 /* Window Interrupt Level group mask. */ -#define AC_WINTLVL_gp 0 /* Window Interrupt Level group position. */ -#define AC_WINTLVL0_bm (1<<0) /* Window Interrupt Level bit 0 mask. */ -#define AC_WINTLVL0_bp 0 /* Window Interrupt Level bit 0 position. */ -#define AC_WINTLVL1_bm (1<<1) /* Window Interrupt Level bit 1 mask. */ -#define AC_WINTLVL1_bp 1 /* Window Interrupt Level bit 1 position. */ - - -/* AC.STATUS bit masks and bit positions */ -#define AC_WSTATE_gm 0xC0 /* Window Mode State group mask. */ -#define AC_WSTATE_gp 6 /* Window Mode State group position. */ -#define AC_WSTATE0_bm (1<<6) /* Window Mode State bit 0 mask. */ -#define AC_WSTATE0_bp 6 /* Window Mode State bit 0 position. */ -#define AC_WSTATE1_bm (1<<7) /* Window Mode State bit 1 mask. */ -#define AC_WSTATE1_bp 7 /* Window Mode State bit 1 position. */ - -#define AC_AC1STATE_bm 0x20 /* Comparator 1 State bit mask. */ -#define AC_AC1STATE_bp 5 /* Comparator 1 State bit position. */ - -#define AC_AC0STATE_bm 0x10 /* Comparator 0 State bit mask. */ -#define AC_AC0STATE_bp 4 /* Comparator 0 State bit position. */ - -#define AC_WIF_bm 0x04 /* Window Mode Interrupt Flag bit mask. */ -#define AC_WIF_bp 2 /* Window Mode Interrupt Flag bit position. */ - -#define AC_AC1IF_bm 0x02 /* Comparator 1 Interrupt Flag bit mask. */ -#define AC_AC1IF_bp 1 /* Comparator 1 Interrupt Flag bit position. */ - -#define AC_AC0IF_bm 0x01 /* Comparator 0 Interrupt Flag bit mask. */ -#define AC_AC0IF_bp 0 /* Comparator 0 Interrupt Flag bit position. */ - - -/* ADC - Analog/Digital Converter */ -/* ADC_CH.CTRL bit masks and bit positions */ -#define ADC_CH_START_bm 0x80 /* Channel Start Conversion bit mask. */ -#define ADC_CH_START_bp 7 /* Channel Start Conversion bit position. */ - -#define ADC_CH_GAINFAC_gm 0x1C /* Gain Factor group mask. */ -#define ADC_CH_GAINFAC_gp 2 /* Gain Factor group position. */ -#define ADC_CH_GAINFAC0_bm (1<<2) /* Gain Factor bit 0 mask. */ -#define ADC_CH_GAINFAC0_bp 2 /* Gain Factor bit 0 position. */ -#define ADC_CH_GAINFAC1_bm (1<<3) /* Gain Factor bit 1 mask. */ -#define ADC_CH_GAINFAC1_bp 3 /* Gain Factor bit 1 position. */ -#define ADC_CH_GAINFAC2_bm (1<<4) /* Gain Factor bit 2 mask. */ -#define ADC_CH_GAINFAC2_bp 4 /* Gain Factor bit 2 position. */ - -#define ADC_CH_INPUTMODE_gm 0x03 /* Input Mode Select group mask. */ -#define ADC_CH_INPUTMODE_gp 0 /* Input Mode Select group position. */ -#define ADC_CH_INPUTMODE0_bm (1<<0) /* Input Mode Select bit 0 mask. */ -#define ADC_CH_INPUTMODE0_bp 0 /* Input Mode Select bit 0 position. */ -#define ADC_CH_INPUTMODE1_bm (1<<1) /* Input Mode Select bit 1 mask. */ -#define ADC_CH_INPUTMODE1_bp 1 /* Input Mode Select bit 1 position. */ - - -/* ADC_CH.MUXCTRL bit masks and bit positions */ -#define ADC_CH_MUXPOS_gm 0x78 /* Positive Input Select group mask. */ -#define ADC_CH_MUXPOS_gp 3 /* Positive Input Select group position. */ -#define ADC_CH_MUXPOS0_bm (1<<3) /* Positive Input Select bit 0 mask. */ -#define ADC_CH_MUXPOS0_bp 3 /* Positive Input Select bit 0 position. */ -#define ADC_CH_MUXPOS1_bm (1<<4) /* Positive Input Select bit 1 mask. */ -#define ADC_CH_MUXPOS1_bp 4 /* Positive Input Select bit 1 position. */ -#define ADC_CH_MUXPOS2_bm (1<<5) /* Positive Input Select bit 2 mask. */ -#define ADC_CH_MUXPOS2_bp 5 /* Positive Input Select bit 2 position. */ -#define ADC_CH_MUXPOS3_bm (1<<6) /* Positive Input Select bit 3 mask. */ -#define ADC_CH_MUXPOS3_bp 6 /* Positive Input Select bit 3 position. */ - -#define ADC_CH_MUXINT_gm 0x78 /* Internal Input Select group mask. */ -#define ADC_CH_MUXINT_gp 3 /* Internal Input Select group position. */ -#define ADC_CH_MUXINT0_bm (1<<3) /* Internal Input Select bit 0 mask. */ -#define ADC_CH_MUXINT0_bp 3 /* Internal Input Select bit 0 position. */ -#define ADC_CH_MUXINT1_bm (1<<4) /* Internal Input Select bit 1 mask. */ -#define ADC_CH_MUXINT1_bp 4 /* Internal Input Select bit 1 position. */ -#define ADC_CH_MUXINT2_bm (1<<5) /* Internal Input Select bit 2 mask. */ -#define ADC_CH_MUXINT2_bp 5 /* Internal Input Select bit 2 position. */ -#define ADC_CH_MUXINT3_bm (1<<6) /* Internal Input Select bit 3 mask. */ -#define ADC_CH_MUXINT3_bp 6 /* Internal Input Select bit 3 position. */ - -#define ADC_CH_MUXNEG_gm 0x03 /* Negative Input Select group mask. */ -#define ADC_CH_MUXNEG_gp 0 /* Negative Input Select group position. */ -#define ADC_CH_MUXNEG0_bm (1<<0) /* Negative Input Select bit 0 mask. */ -#define ADC_CH_MUXNEG0_bp 0 /* Negative Input Select bit 0 position. */ -#define ADC_CH_MUXNEG1_bm (1<<1) /* Negative Input Select bit 1 mask. */ -#define ADC_CH_MUXNEG1_bp 1 /* Negative Input Select bit 1 position. */ - - -/* ADC_CH.INTCTRL bit masks and bit positions */ -#define ADC_CH_INTMODE_gm 0x0C /* Interrupt Mode group mask. */ -#define ADC_CH_INTMODE_gp 2 /* Interrupt Mode group position. */ -#define ADC_CH_INTMODE0_bm (1<<2) /* Interrupt Mode bit 0 mask. */ -#define ADC_CH_INTMODE0_bp 2 /* Interrupt Mode bit 0 position. */ -#define ADC_CH_INTMODE1_bm (1<<3) /* Interrupt Mode bit 1 mask. */ -#define ADC_CH_INTMODE1_bp 3 /* Interrupt Mode bit 1 position. */ - -#define ADC_CH_INTLVL_gm 0x03 /* Interrupt Level group mask. */ -#define ADC_CH_INTLVL_gp 0 /* Interrupt Level group position. */ -#define ADC_CH_INTLVL0_bm (1<<0) /* Interrupt Level bit 0 mask. */ -#define ADC_CH_INTLVL0_bp 0 /* Interrupt Level bit 0 position. */ -#define ADC_CH_INTLVL1_bm (1<<1) /* Interrupt Level bit 1 mask. */ -#define ADC_CH_INTLVL1_bp 1 /* Interrupt Level bit 1 position. */ - - -/* ADC_CH.INTFLAGS bit masks and bit positions */ -#define ADC_CH_CHIF_bm 0x01 /* Channel Interrupt Flag bit mask. */ -#define ADC_CH_CHIF_bp 0 /* Channel Interrupt Flag bit position. */ - - -/* ADC.CTRLA bit masks and bit positions */ -#define ADC_DMASEL_gm 0xE0 /* DMA Selection group mask. */ -#define ADC_DMASEL_gp 5 /* DMA Selection group position. */ -#define ADC_DMASEL0_bm (1<<5) /* DMA Selection bit 0 mask. */ -#define ADC_DMASEL0_bp 5 /* DMA Selection bit 0 position. */ -#define ADC_DMASEL1_bm (1<<6) /* DMA Selection bit 1 mask. */ -#define ADC_DMASEL1_bp 6 /* DMA Selection bit 1 position. */ -#define ADC_DMASEL2_bm (1<<7) /* DMA Selection bit 2 mask. */ -#define ADC_DMASEL2_bp 7 /* DMA Selection bit 2 position. */ - -#define ADC_CH3START_bm 0x20 /* Channel 3 Start Conversion bit mask. */ -#define ADC_CH3START_bp 5 /* Channel 3 Start Conversion bit position. */ - -#define ADC_CH2START_bm 0x10 /* Channel 2 Start Conversion bit mask. */ -#define ADC_CH2START_bp 4 /* Channel 2 Start Conversion bit position. */ - -#define ADC_CH1START_bm 0x08 /* Channel 1 Start Conversion bit mask. */ -#define ADC_CH1START_bp 3 /* Channel 1 Start Conversion bit position. */ - -#define ADC_CH0START_bm 0x04 /* Channel 0 Start Conversion bit mask. */ -#define ADC_CH0START_bp 2 /* Channel 0 Start Conversion bit position. */ - -#define ADC_FLUSH_bm 0x02 /* Flush Pipeline bit mask. */ -#define ADC_FLUSH_bp 1 /* Flush Pipeline bit position. */ - -#define ADC_ENABLE_bm 0x01 /* Enable ADC bit mask. */ -#define ADC_ENABLE_bp 0 /* Enable ADC bit position. */ - - -/* ADC.CTRLB bit masks and bit positions */ -#define ADC_CONMODE_bm 0x10 /* Conversion Mode bit mask. */ -#define ADC_CONMODE_bp 4 /* Conversion Mode bit position. */ - -#define ADC_FREERUN_bm 0x08 /* Free Running Mode Enable bit mask. */ -#define ADC_FREERUN_bp 3 /* Free Running Mode Enable bit position. */ - -#define ADC_RESOLUTION_gm 0x06 /* Result Resolution group mask. */ -#define ADC_RESOLUTION_gp 1 /* Result Resolution group position. */ -#define ADC_RESOLUTION0_bm (1<<1) /* Result Resolution bit 0 mask. */ -#define ADC_RESOLUTION0_bp 1 /* Result Resolution bit 0 position. */ -#define ADC_RESOLUTION1_bm (1<<2) /* Result Resolution bit 1 mask. */ -#define ADC_RESOLUTION1_bp 2 /* Result Resolution bit 1 position. */ - - -/* ADC.REFCTRL bit masks and bit positions */ -#define ADC_REFSEL_gm 0x30 /* Reference Selection group mask. */ -#define ADC_REFSEL_gp 4 /* Reference Selection group position. */ -#define ADC_REFSEL0_bm (1<<4) /* Reference Selection bit 0 mask. */ -#define ADC_REFSEL0_bp 4 /* Reference Selection bit 0 position. */ -#define ADC_REFSEL1_bm (1<<5) /* Reference Selection bit 1 mask. */ -#define ADC_REFSEL1_bp 5 /* Reference Selection bit 1 position. */ - -#define ADC_BANDGAP_bm 0x02 /* Bandgap enable bit mask. */ -#define ADC_BANDGAP_bp 1 /* Bandgap enable bit position. */ - -#define ADC_TEMPREF_bm 0x01 /* Temperature Reference Enable bit mask. */ -#define ADC_TEMPREF_bp 0 /* Temperature Reference Enable bit position. */ - - -/* ADC.EVCTRL bit masks and bit positions */ -#define ADC_SWEEP_gm 0xC0 /* Channel Sweep Selection group mask. */ -#define ADC_SWEEP_gp 6 /* Channel Sweep Selection group position. */ -#define ADC_SWEEP0_bm (1<<6) /* Channel Sweep Selection bit 0 mask. */ -#define ADC_SWEEP0_bp 6 /* Channel Sweep Selection bit 0 position. */ -#define ADC_SWEEP1_bm (1<<7) /* Channel Sweep Selection bit 1 mask. */ -#define ADC_SWEEP1_bp 7 /* Channel Sweep Selection bit 1 position. */ - -#define ADC_EVSEL_gm 0x38 /* Event Input Select group mask. */ -#define ADC_EVSEL_gp 3 /* Event Input Select group position. */ -#define ADC_EVSEL0_bm (1<<3) /* Event Input Select bit 0 mask. */ -#define ADC_EVSEL0_bp 3 /* Event Input Select bit 0 position. */ -#define ADC_EVSEL1_bm (1<<4) /* Event Input Select bit 1 mask. */ -#define ADC_EVSEL1_bp 4 /* Event Input Select bit 1 position. */ -#define ADC_EVSEL2_bm (1<<5) /* Event Input Select bit 2 mask. */ -#define ADC_EVSEL2_bp 5 /* Event Input Select bit 2 position. */ - -#define ADC_EVACT_gm 0x07 /* Event Action Select group mask. */ -#define ADC_EVACT_gp 0 /* Event Action Select group position. */ -#define ADC_EVACT0_bm (1<<0) /* Event Action Select bit 0 mask. */ -#define ADC_EVACT0_bp 0 /* Event Action Select bit 0 position. */ -#define ADC_EVACT1_bm (1<<1) /* Event Action Select bit 1 mask. */ -#define ADC_EVACT1_bp 1 /* Event Action Select bit 1 position. */ -#define ADC_EVACT2_bm (1<<2) /* Event Action Select bit 2 mask. */ -#define ADC_EVACT2_bp 2 /* Event Action Select bit 2 position. */ - - -/* ADC.PRESCALER bit masks and bit positions */ -#define ADC_PRESCALER_gm 0x07 /* Clock Prescaler Selection group mask. */ -#define ADC_PRESCALER_gp 0 /* Clock Prescaler Selection group position. */ -#define ADC_PRESCALER0_bm (1<<0) /* Clock Prescaler Selection bit 0 mask. */ -#define ADC_PRESCALER0_bp 0 /* Clock Prescaler Selection bit 0 position. */ -#define ADC_PRESCALER1_bm (1<<1) /* Clock Prescaler Selection bit 1 mask. */ -#define ADC_PRESCALER1_bp 1 /* Clock Prescaler Selection bit 1 position. */ -#define ADC_PRESCALER2_bm (1<<2) /* Clock Prescaler Selection bit 2 mask. */ -#define ADC_PRESCALER2_bp 2 /* Clock Prescaler Selection bit 2 position. */ - - -/* ADC.CALCTRL bit masks and bit positions */ -#define ADC_CAL_bm 0x01 /* ADC Calibration Start bit mask. */ -#define ADC_CAL_bp 0 /* ADC Calibration Start bit position. */ - - -/* ADC.INTFLAGS bit masks and bit positions */ -#define ADC_CH3IF_bm 0x08 /* Channel 3 Interrupt Flag bit mask. */ -#define ADC_CH3IF_bp 3 /* Channel 3 Interrupt Flag bit position. */ - -#define ADC_CH2IF_bm 0x04 /* Channel 2 Interrupt Flag bit mask. */ -#define ADC_CH2IF_bp 2 /* Channel 2 Interrupt Flag bit position. */ - -#define ADC_CH1IF_bm 0x02 /* Channel 1 Interrupt Flag bit mask. */ -#define ADC_CH1IF_bp 1 /* Channel 1 Interrupt Flag bit position. */ - -#define ADC_CH0IF_bm 0x01 /* Channel 0 Interrupt Flag bit mask. */ -#define ADC_CH0IF_bp 0 /* Channel 0 Interrupt Flag bit position. */ - - -/* DAC - Digital/Analog Converter */ -/* DAC.CTRLA bit masks and bit positions */ -#define DAC_IDOEN_bm 0x10 /* Internal Output Enable bit mask. */ -#define DAC_IDOEN_bp 4 /* Internal Output Enable bit position. */ - -#define DAC_CH1EN_bm 0x08 /* Channel 1 Output Enable bit mask. */ -#define DAC_CH1EN_bp 3 /* Channel 1 Output Enable bit position. */ - -#define DAC_CH0EN_bm 0x04 /* Channel 0 Output Enable bit mask. */ -#define DAC_CH0EN_bp 2 /* Channel 0 Output Enable bit position. */ - -#define DAC_LPMODE_bm 0x02 /* Low Power Mode bit mask. */ -#define DAC_LPMODE_bp 1 /* Low Power Mode bit position. */ - -#define DAC_ENABLE_bm 0x01 /* Enable bit mask. */ -#define DAC_ENABLE_bp 0 /* Enable bit position. */ - - -/* DAC.CTRLB bit masks and bit positions */ -#define DAC_CHSEL_gm 0x60 /* Channel Select group mask. */ -#define DAC_CHSEL_gp 5 /* Channel Select group position. */ -#define DAC_CHSEL0_bm (1<<5) /* Channel Select bit 0 mask. */ -#define DAC_CHSEL0_bp 5 /* Channel Select bit 0 position. */ -#define DAC_CHSEL1_bm (1<<6) /* Channel Select bit 1 mask. */ -#define DAC_CHSEL1_bp 6 /* Channel Select bit 1 position. */ - -#define DAC_CH1TRIG_bm 0x02 /* Channel 1 Event Trig Enable bit mask. */ -#define DAC_CH1TRIG_bp 1 /* Channel 1 Event Trig Enable bit position. */ - -#define DAC_CH0TRIG_bm 0x01 /* Channel 0 Event Trig Enable bit mask. */ -#define DAC_CH0TRIG_bp 0 /* Channel 0 Event Trig Enable bit position. */ - - -/* DAC.CTRLC bit masks and bit positions */ -#define DAC_REFSEL_gm 0x18 /* Reference Select group mask. */ -#define DAC_REFSEL_gp 3 /* Reference Select group position. */ -#define DAC_REFSEL0_bm (1<<3) /* Reference Select bit 0 mask. */ -#define DAC_REFSEL0_bp 3 /* Reference Select bit 0 position. */ -#define DAC_REFSEL1_bm (1<<4) /* Reference Select bit 1 mask. */ -#define DAC_REFSEL1_bp 4 /* Reference Select bit 1 position. */ - -#define DAC_LEFTADJ_bm 0x01 /* Left-adjust Result bit mask. */ -#define DAC_LEFTADJ_bp 0 /* Left-adjust Result bit position. */ - - -/* DAC.EVCTRL bit masks and bit positions */ -#define DAC_EVSEL_gm 0x07 /* Event Input Selection group mask. */ -#define DAC_EVSEL_gp 0 /* Event Input Selection group position. */ -#define DAC_EVSEL0_bm (1<<0) /* Event Input Selection bit 0 mask. */ -#define DAC_EVSEL0_bp 0 /* Event Input Selection bit 0 position. */ -#define DAC_EVSEL1_bm (1<<1) /* Event Input Selection bit 1 mask. */ -#define DAC_EVSEL1_bp 1 /* Event Input Selection bit 1 position. */ -#define DAC_EVSEL2_bm (1<<2) /* Event Input Selection bit 2 mask. */ -#define DAC_EVSEL2_bp 2 /* Event Input Selection bit 2 position. */ - - -/* DAC.TIMCTRL bit masks and bit positions */ -#define DAC_CONINTVAL_gm 0x70 /* Conversion Intercal group mask. */ -#define DAC_CONINTVAL_gp 4 /* Conversion Intercal group position. */ -#define DAC_CONINTVAL0_bm (1<<4) /* Conversion Intercal bit 0 mask. */ -#define DAC_CONINTVAL0_bp 4 /* Conversion Intercal bit 0 position. */ -#define DAC_CONINTVAL1_bm (1<<5) /* Conversion Intercal bit 1 mask. */ -#define DAC_CONINTVAL1_bp 5 /* Conversion Intercal bit 1 position. */ -#define DAC_CONINTVAL2_bm (1<<6) /* Conversion Intercal bit 2 mask. */ -#define DAC_CONINTVAL2_bp 6 /* Conversion Intercal bit 2 position. */ - -#define DAC_REFRESH_gm 0x0F /* Refresh Timing Control group mask. */ -#define DAC_REFRESH_gp 0 /* Refresh Timing Control group position. */ -#define DAC_REFRESH0_bm (1<<0) /* Refresh Timing Control bit 0 mask. */ -#define DAC_REFRESH0_bp 0 /* Refresh Timing Control bit 0 position. */ -#define DAC_REFRESH1_bm (1<<1) /* Refresh Timing Control bit 1 mask. */ -#define DAC_REFRESH1_bp 1 /* Refresh Timing Control bit 1 position. */ -#define DAC_REFRESH2_bm (1<<2) /* Refresh Timing Control bit 2 mask. */ -#define DAC_REFRESH2_bp 2 /* Refresh Timing Control bit 2 position. */ -#define DAC_REFRESH3_bm (1<<3) /* Refresh Timing Control bit 3 mask. */ -#define DAC_REFRESH3_bp 3 /* Refresh Timing Control bit 3 position. */ - - -/* DAC.STATUS bit masks and bit positions */ -#define DAC_CH1DRE_bm 0x02 /* Channel 1 Data Register Empty bit mask. */ -#define DAC_CH1DRE_bp 1 /* Channel 1 Data Register Empty bit position. */ - -#define DAC_CH0DRE_bm 0x01 /* Channel 0 Data Register Empty bit mask. */ -#define DAC_CH0DRE_bp 0 /* Channel 0 Data Register Empty bit position. */ - - -/* RTC - Real-Time Clounter */ -/* RTC.CTRL bit masks and bit positions */ -#define RTC_PRESCALER_gm 0x07 /* Prescaling Factor group mask. */ -#define RTC_PRESCALER_gp 0 /* Prescaling Factor group position. */ -#define RTC_PRESCALER0_bm (1<<0) /* Prescaling Factor bit 0 mask. */ -#define RTC_PRESCALER0_bp 0 /* Prescaling Factor bit 0 position. */ -#define RTC_PRESCALER1_bm (1<<1) /* Prescaling Factor bit 1 mask. */ -#define RTC_PRESCALER1_bp 1 /* Prescaling Factor bit 1 position. */ -#define RTC_PRESCALER2_bm (1<<2) /* Prescaling Factor bit 2 mask. */ -#define RTC_PRESCALER2_bp 2 /* Prescaling Factor bit 2 position. */ - - -/* RTC.STATUS bit masks and bit positions */ -#define RTC_SYNCBUSY_bm 0x01 /* Synchronization Busy Flag bit mask. */ -#define RTC_SYNCBUSY_bp 0 /* Synchronization Busy Flag bit position. */ - - -/* RTC.INTCTRL bit masks and bit positions */ -#define RTC_COMPINTLVL_gm 0x0C /* Compare Match Interrupt Level group mask. */ -#define RTC_COMPINTLVL_gp 2 /* Compare Match Interrupt Level group position. */ -#define RTC_COMPINTLVL0_bm (1<<2) /* Compare Match Interrupt Level bit 0 mask. */ -#define RTC_COMPINTLVL0_bp 2 /* Compare Match Interrupt Level bit 0 position. */ -#define RTC_COMPINTLVL1_bm (1<<3) /* Compare Match Interrupt Level bit 1 mask. */ -#define RTC_COMPINTLVL1_bp 3 /* Compare Match Interrupt Level bit 1 position. */ - -#define RTC_OVFINTLVL_gm 0x03 /* Overflow Interrupt Level group mask. */ -#define RTC_OVFINTLVL_gp 0 /* Overflow Interrupt Level group position. */ -#define RTC_OVFINTLVL0_bm (1<<0) /* Overflow Interrupt Level bit 0 mask. */ -#define RTC_OVFINTLVL0_bp 0 /* Overflow Interrupt Level bit 0 position. */ -#define RTC_OVFINTLVL1_bm (1<<1) /* Overflow Interrupt Level bit 1 mask. */ -#define RTC_OVFINTLVL1_bp 1 /* Overflow Interrupt Level bit 1 position. */ - - -/* RTC.INTFLAGS bit masks and bit positions */ -#define RTC_COMPIF_bm 0x02 /* Compare Match Interrupt Flag bit mask. */ -#define RTC_COMPIF_bp 1 /* Compare Match Interrupt Flag bit position. */ - -#define RTC_OVFIF_bm 0x01 /* Overflow Interrupt Flag bit mask. */ -#define RTC_OVFIF_bp 0 /* Overflow Interrupt Flag bit position. */ - - -/* EBI - External Bus Interface */ -/* EBI_CS.CTRLA bit masks and bit positions */ -#define EBI_CS_ASPACE_gm 0x7C /* Address Space group mask. */ -#define EBI_CS_ASPACE_gp 2 /* Address Space group position. */ -#define EBI_CS_ASPACE0_bm (1<<2) /* Address Space bit 0 mask. */ -#define EBI_CS_ASPACE0_bp 2 /* Address Space bit 0 position. */ -#define EBI_CS_ASPACE1_bm (1<<3) /* Address Space bit 1 mask. */ -#define EBI_CS_ASPACE1_bp 3 /* Address Space bit 1 position. */ -#define EBI_CS_ASPACE2_bm (1<<4) /* Address Space bit 2 mask. */ -#define EBI_CS_ASPACE2_bp 4 /* Address Space bit 2 position. */ -#define EBI_CS_ASPACE3_bm (1<<5) /* Address Space bit 3 mask. */ -#define EBI_CS_ASPACE3_bp 5 /* Address Space bit 3 position. */ -#define EBI_CS_ASPACE4_bm (1<<6) /* Address Space bit 4 mask. */ -#define EBI_CS_ASPACE4_bp 6 /* Address Space bit 4 position. */ - -#define EBI_CS_MODE_gm 0x03 /* Memory Mode group mask. */ -#define EBI_CS_MODE_gp 0 /* Memory Mode group position. */ -#define EBI_CS_MODE0_bm (1<<0) /* Memory Mode bit 0 mask. */ -#define EBI_CS_MODE0_bp 0 /* Memory Mode bit 0 position. */ -#define EBI_CS_MODE1_bm (1<<1) /* Memory Mode bit 1 mask. */ -#define EBI_CS_MODE1_bp 1 /* Memory Mode bit 1 position. */ - - -/* EBI_CS.CTRLB bit masks and bit positions */ -#define EBI_CS_SRWS_gm 0x07 /* SRAM Wait State Cycles group mask. */ -#define EBI_CS_SRWS_gp 0 /* SRAM Wait State Cycles group position. */ -#define EBI_CS_SRWS0_bm (1<<0) /* SRAM Wait State Cycles bit 0 mask. */ -#define EBI_CS_SRWS0_bp 0 /* SRAM Wait State Cycles bit 0 position. */ -#define EBI_CS_SRWS1_bm (1<<1) /* SRAM Wait State Cycles bit 1 mask. */ -#define EBI_CS_SRWS1_bp 1 /* SRAM Wait State Cycles bit 1 position. */ -#define EBI_CS_SRWS2_bm (1<<2) /* SRAM Wait State Cycles bit 2 mask. */ -#define EBI_CS_SRWS2_bp 2 /* SRAM Wait State Cycles bit 2 position. */ - -#define EBI_CS_SDINITDONE_bm 0x80 /* SDRAM Initialization Done bit mask. */ -#define EBI_CS_SDINITDONE_bp 7 /* SDRAM Initialization Done bit position. */ - -#define EBI_CS_SDSREN_bm 0x04 /* SDRAM Self-refresh Enable bit mask. */ -#define EBI_CS_SDSREN_bp 2 /* SDRAM Self-refresh Enable bit position. */ - -#define EBI_CS_SDMODE_gm 0x03 /* SDRAM Mode group mask. */ -#define EBI_CS_SDMODE_gp 0 /* SDRAM Mode group position. */ -#define EBI_CS_SDMODE0_bm (1<<0) /* SDRAM Mode bit 0 mask. */ -#define EBI_CS_SDMODE0_bp 0 /* SDRAM Mode bit 0 position. */ -#define EBI_CS_SDMODE1_bm (1<<1) /* SDRAM Mode bit 1 mask. */ -#define EBI_CS_SDMODE1_bp 1 /* SDRAM Mode bit 1 position. */ - - -/* EBI.CTRL bit masks and bit positions */ -#define EBI_SDDATAW_gm 0xC0 /* SDRAM Data Width Setting group mask. */ -#define EBI_SDDATAW_gp 6 /* SDRAM Data Width Setting group position. */ -#define EBI_SDDATAW0_bm (1<<6) /* SDRAM Data Width Setting bit 0 mask. */ -#define EBI_SDDATAW0_bp 6 /* SDRAM Data Width Setting bit 0 position. */ -#define EBI_SDDATAW1_bm (1<<7) /* SDRAM Data Width Setting bit 1 mask. */ -#define EBI_SDDATAW1_bp 7 /* SDRAM Data Width Setting bit 1 position. */ - -#define EBI_LPCMODE_gm 0x30 /* SRAM LPC Mode group mask. */ -#define EBI_LPCMODE_gp 4 /* SRAM LPC Mode group position. */ -#define EBI_LPCMODE0_bm (1<<4) /* SRAM LPC Mode bit 0 mask. */ -#define EBI_LPCMODE0_bp 4 /* SRAM LPC Mode bit 0 position. */ -#define EBI_LPCMODE1_bm (1<<5) /* SRAM LPC Mode bit 1 mask. */ -#define EBI_LPCMODE1_bp 5 /* SRAM LPC Mode bit 1 position. */ - -#define EBI_SRMODE_gm 0x0C /* SRAM Mode group mask. */ -#define EBI_SRMODE_gp 2 /* SRAM Mode group position. */ -#define EBI_SRMODE0_bm (1<<2) /* SRAM Mode bit 0 mask. */ -#define EBI_SRMODE0_bp 2 /* SRAM Mode bit 0 position. */ -#define EBI_SRMODE1_bm (1<<3) /* SRAM Mode bit 1 mask. */ -#define EBI_SRMODE1_bp 3 /* SRAM Mode bit 1 position. */ - -#define EBI_IFMODE_gm 0x03 /* Interface Mode group mask. */ -#define EBI_IFMODE_gp 0 /* Interface Mode group position. */ -#define EBI_IFMODE0_bm (1<<0) /* Interface Mode bit 0 mask. */ -#define EBI_IFMODE0_bp 0 /* Interface Mode bit 0 position. */ -#define EBI_IFMODE1_bm (1<<1) /* Interface Mode bit 1 mask. */ -#define EBI_IFMODE1_bp 1 /* Interface Mode bit 1 position. */ - - -/* EBI.SDRAMCTRLA bit masks and bit positions */ -#define EBI_SDCAS_bm 0x08 /* SDRAM CAS Latency Setting bit mask. */ -#define EBI_SDCAS_bp 3 /* SDRAM CAS Latency Setting bit position. */ - -#define EBI_SDROW_bm 0x04 /* SDRAM ROW Bits Setting bit mask. */ -#define EBI_SDROW_bp 2 /* SDRAM ROW Bits Setting bit position. */ - -#define EBI_SDCOL_gm 0x03 /* SDRAM Column Bits Setting group mask. */ -#define EBI_SDCOL_gp 0 /* SDRAM Column Bits Setting group position. */ -#define EBI_SDCOL0_bm (1<<0) /* SDRAM Column Bits Setting bit 0 mask. */ -#define EBI_SDCOL0_bp 0 /* SDRAM Column Bits Setting bit 0 position. */ -#define EBI_SDCOL1_bm (1<<1) /* SDRAM Column Bits Setting bit 1 mask. */ -#define EBI_SDCOL1_bp 1 /* SDRAM Column Bits Setting bit 1 position. */ - - -/* EBI.SDRAMCTRLB bit masks and bit positions */ -#define EBI_MRDLY_gm 0xC0 /* SDRAM Mode Register Delay group mask. */ -#define EBI_MRDLY_gp 6 /* SDRAM Mode Register Delay group position. */ -#define EBI_MRDLY0_bm (1<<6) /* SDRAM Mode Register Delay bit 0 mask. */ -#define EBI_MRDLY0_bp 6 /* SDRAM Mode Register Delay bit 0 position. */ -#define EBI_MRDLY1_bm (1<<7) /* SDRAM Mode Register Delay bit 1 mask. */ -#define EBI_MRDLY1_bp 7 /* SDRAM Mode Register Delay bit 1 position. */ - -#define EBI_ROWCYCDLY_gm 0x38 /* SDRAM Row Cycle Delay group mask. */ -#define EBI_ROWCYCDLY_gp 3 /* SDRAM Row Cycle Delay group position. */ -#define EBI_ROWCYCDLY0_bm (1<<3) /* SDRAM Row Cycle Delay bit 0 mask. */ -#define EBI_ROWCYCDLY0_bp 3 /* SDRAM Row Cycle Delay bit 0 position. */ -#define EBI_ROWCYCDLY1_bm (1<<4) /* SDRAM Row Cycle Delay bit 1 mask. */ -#define EBI_ROWCYCDLY1_bp 4 /* SDRAM Row Cycle Delay bit 1 position. */ -#define EBI_ROWCYCDLY2_bm (1<<5) /* SDRAM Row Cycle Delay bit 2 mask. */ -#define EBI_ROWCYCDLY2_bp 5 /* SDRAM Row Cycle Delay bit 2 position. */ - -#define EBI_RPDLY_gm 0x07 /* SDRAM Row-to-Precharge Delay group mask. */ -#define EBI_RPDLY_gp 0 /* SDRAM Row-to-Precharge Delay group position. */ -#define EBI_RPDLY0_bm (1<<0) /* SDRAM Row-to-Precharge Delay bit 0 mask. */ -#define EBI_RPDLY0_bp 0 /* SDRAM Row-to-Precharge Delay bit 0 position. */ -#define EBI_RPDLY1_bm (1<<1) /* SDRAM Row-to-Precharge Delay bit 1 mask. */ -#define EBI_RPDLY1_bp 1 /* SDRAM Row-to-Precharge Delay bit 1 position. */ -#define EBI_RPDLY2_bm (1<<2) /* SDRAM Row-to-Precharge Delay bit 2 mask. */ -#define EBI_RPDLY2_bp 2 /* SDRAM Row-to-Precharge Delay bit 2 position. */ - - -/* EBI.SDRAMCTRLC bit masks and bit positions */ -#define EBI_WRDLY_gm 0xC0 /* SDRAM Write Recovery Delay group mask. */ -#define EBI_WRDLY_gp 6 /* SDRAM Write Recovery Delay group position. */ -#define EBI_WRDLY0_bm (1<<6) /* SDRAM Write Recovery Delay bit 0 mask. */ -#define EBI_WRDLY0_bp 6 /* SDRAM Write Recovery Delay bit 0 position. */ -#define EBI_WRDLY1_bm (1<<7) /* SDRAM Write Recovery Delay bit 1 mask. */ -#define EBI_WRDLY1_bp 7 /* SDRAM Write Recovery Delay bit 1 position. */ - -#define EBI_ESRDLY_gm 0x38 /* SDRAM Exit-Self-refresh-to-Active Delay group mask. */ -#define EBI_ESRDLY_gp 3 /* SDRAM Exit-Self-refresh-to-Active Delay group position. */ -#define EBI_ESRDLY0_bm (1<<3) /* SDRAM Exit-Self-refresh-to-Active Delay bit 0 mask. */ -#define EBI_ESRDLY0_bp 3 /* SDRAM Exit-Self-refresh-to-Active Delay bit 0 position. */ -#define EBI_ESRDLY1_bm (1<<4) /* SDRAM Exit-Self-refresh-to-Active Delay bit 1 mask. */ -#define EBI_ESRDLY1_bp 4 /* SDRAM Exit-Self-refresh-to-Active Delay bit 1 position. */ -#define EBI_ESRDLY2_bm (1<<5) /* SDRAM Exit-Self-refresh-to-Active Delay bit 2 mask. */ -#define EBI_ESRDLY2_bp 5 /* SDRAM Exit-Self-refresh-to-Active Delay bit 2 position. */ - -#define EBI_ROWCOLDLY_gm 0x07 /* SDRAM Row-to-Column Delay group mask. */ -#define EBI_ROWCOLDLY_gp 0 /* SDRAM Row-to-Column Delay group position. */ -#define EBI_ROWCOLDLY0_bm (1<<0) /* SDRAM Row-to-Column Delay bit 0 mask. */ -#define EBI_ROWCOLDLY0_bp 0 /* SDRAM Row-to-Column Delay bit 0 position. */ -#define EBI_ROWCOLDLY1_bm (1<<1) /* SDRAM Row-to-Column Delay bit 1 mask. */ -#define EBI_ROWCOLDLY1_bp 1 /* SDRAM Row-to-Column Delay bit 1 position. */ -#define EBI_ROWCOLDLY2_bm (1<<2) /* SDRAM Row-to-Column Delay bit 2 mask. */ -#define EBI_ROWCOLDLY2_bp 2 /* SDRAM Row-to-Column Delay bit 2 position. */ - - -/* TWI - Two-Wire Interface */ -/* TWI_MASTER.CTRLA bit masks and bit positions */ -#define TWI_MASTER_INTLVL_gm 0xC0 /* Interrupt Level group mask. */ -#define TWI_MASTER_INTLVL_gp 6 /* Interrupt Level group position. */ -#define TWI_MASTER_INTLVL0_bm (1<<6) /* Interrupt Level bit 0 mask. */ -#define TWI_MASTER_INTLVL0_bp 6 /* Interrupt Level bit 0 position. */ -#define TWI_MASTER_INTLVL1_bm (1<<7) /* Interrupt Level bit 1 mask. */ -#define TWI_MASTER_INTLVL1_bp 7 /* Interrupt Level bit 1 position. */ - -#define TWI_MASTER_RIEN_bm 0x20 /* Read Interrupt Enable bit mask. */ -#define TWI_MASTER_RIEN_bp 5 /* Read Interrupt Enable bit position. */ - -#define TWI_MASTER_WIEN_bm 0x10 /* Write Interrupt Enable bit mask. */ -#define TWI_MASTER_WIEN_bp 4 /* Write Interrupt Enable bit position. */ - -#define TWI_MASTER_ENABLE_bm 0x08 /* Enable TWI Master bit mask. */ -#define TWI_MASTER_ENABLE_bp 3 /* Enable TWI Master bit position. */ - - -/* TWI_MASTER.CTRLB bit masks and bit positions */ -#define TWI_MASTER_TIMEOUT_gm 0x0C /* Inactive Bus Timeout group mask. */ -#define TWI_MASTER_TIMEOUT_gp 2 /* Inactive Bus Timeout group position. */ -#define TWI_MASTER_TIMEOUT0_bm (1<<2) /* Inactive Bus Timeout bit 0 mask. */ -#define TWI_MASTER_TIMEOUT0_bp 2 /* Inactive Bus Timeout bit 0 position. */ -#define TWI_MASTER_TIMEOUT1_bm (1<<3) /* Inactive Bus Timeout bit 1 mask. */ -#define TWI_MASTER_TIMEOUT1_bp 3 /* Inactive Bus Timeout bit 1 position. */ - -#define TWI_MASTER_QCEN_bm 0x02 /* Quick Command Enable bit mask. */ -#define TWI_MASTER_QCEN_bp 1 /* Quick Command Enable bit position. */ - -#define TWI_MASTER_SMEN_bm 0x01 /* Smart Mode Enable bit mask. */ -#define TWI_MASTER_SMEN_bp 0 /* Smart Mode Enable bit position. */ - - -/* TWI_MASTER.CTRLC bit masks and bit positions */ -#define TWI_MASTER_ACKACT_bm 0x04 /* Acknowledge Action bit mask. */ -#define TWI_MASTER_ACKACT_bp 2 /* Acknowledge Action bit position. */ - -#define TWI_MASTER_CMD_gm 0x03 /* Command group mask. */ -#define TWI_MASTER_CMD_gp 0 /* Command group position. */ -#define TWI_MASTER_CMD0_bm (1<<0) /* Command bit 0 mask. */ -#define TWI_MASTER_CMD0_bp 0 /* Command bit 0 position. */ -#define TWI_MASTER_CMD1_bm (1<<1) /* Command bit 1 mask. */ -#define TWI_MASTER_CMD1_bp 1 /* Command bit 1 position. */ - - -/* TWI_MASTER.STATUS bit masks and bit positions */ -#define TWI_MASTER_RIF_bm 0x80 /* Read Interrupt Flag bit mask. */ -#define TWI_MASTER_RIF_bp 7 /* Read Interrupt Flag bit position. */ - -#define TWI_MASTER_WIF_bm 0x40 /* Write Interrupt Flag bit mask. */ -#define TWI_MASTER_WIF_bp 6 /* Write Interrupt Flag bit position. */ - -#define TWI_MASTER_CLKHOLD_bm 0x20 /* Clock Hold bit mask. */ -#define TWI_MASTER_CLKHOLD_bp 5 /* Clock Hold bit position. */ - -#define TWI_MASTER_RXACK_bm 0x10 /* Received Acknowledge bit mask. */ -#define TWI_MASTER_RXACK_bp 4 /* Received Acknowledge bit position. */ - -#define TWI_MASTER_ARBLOST_bm 0x08 /* Arbitration Lost bit mask. */ -#define TWI_MASTER_ARBLOST_bp 3 /* Arbitration Lost bit position. */ - -#define TWI_MASTER_BUSERR_bm 0x04 /* Bus Error bit mask. */ -#define TWI_MASTER_BUSERR_bp 2 /* Bus Error bit position. */ - -#define TWI_MASTER_BUSSTATE_gm 0x03 /* Bus State group mask. */ -#define TWI_MASTER_BUSSTATE_gp 0 /* Bus State group position. */ -#define TWI_MASTER_BUSSTATE0_bm (1<<0) /* Bus State bit 0 mask. */ -#define TWI_MASTER_BUSSTATE0_bp 0 /* Bus State bit 0 position. */ -#define TWI_MASTER_BUSSTATE1_bm (1<<1) /* Bus State bit 1 mask. */ -#define TWI_MASTER_BUSSTATE1_bp 1 /* Bus State bit 1 position. */ - - -/* TWI_SLAVE.CTRLA bit masks and bit positions */ -#define TWI_SLAVE_INTLVL_gm 0xC0 /* Interrupt Level group mask. */ -#define TWI_SLAVE_INTLVL_gp 6 /* Interrupt Level group position. */ -#define TWI_SLAVE_INTLVL0_bm (1<<6) /* Interrupt Level bit 0 mask. */ -#define TWI_SLAVE_INTLVL0_bp 6 /* Interrupt Level bit 0 position. */ -#define TWI_SLAVE_INTLVL1_bm (1<<7) /* Interrupt Level bit 1 mask. */ -#define TWI_SLAVE_INTLVL1_bp 7 /* Interrupt Level bit 1 position. */ - -#define TWI_SLAVE_DIEN_bm 0x20 /* Data Interrupt Enable bit mask. */ -#define TWI_SLAVE_DIEN_bp 5 /* Data Interrupt Enable bit position. */ - -#define TWI_SLAVE_APIEN_bm 0x10 /* Address/Stop Interrupt Enable bit mask. */ -#define TWI_SLAVE_APIEN_bp 4 /* Address/Stop Interrupt Enable bit position. */ - -#define TWI_SLAVE_ENABLE_bm 0x08 /* Enable TWI Slave bit mask. */ -#define TWI_SLAVE_ENABLE_bp 3 /* Enable TWI Slave bit position. */ - -#define TWI_SLAVE_PIEN_bm 0x04 /* Stop Interrupt Enable bit mask. */ -#define TWI_SLAVE_PIEN_bp 2 /* Stop Interrupt Enable bit position. */ - -#define TWI_SLAVE_PMEN_bm 0x02 /* Promiscuous Mode Enable bit mask. */ -#define TWI_SLAVE_PMEN_bp 1 /* Promiscuous Mode Enable bit position. */ - -#define TWI_SLAVE_SMEN_bm 0x01 /* Smart Mode Enable bit mask. */ -#define TWI_SLAVE_SMEN_bp 0 /* Smart Mode Enable bit position. */ - - -/* TWI_SLAVE.CTRLB bit masks and bit positions */ -#define TWI_SLAVE_ACKACT_bm 0x04 /* Acknowledge Action bit mask. */ -#define TWI_SLAVE_ACKACT_bp 2 /* Acknowledge Action bit position. */ - -#define TWI_SLAVE_CMD_gm 0x03 /* Command group mask. */ -#define TWI_SLAVE_CMD_gp 0 /* Command group position. */ -#define TWI_SLAVE_CMD0_bm (1<<0) /* Command bit 0 mask. */ -#define TWI_SLAVE_CMD0_bp 0 /* Command bit 0 position. */ -#define TWI_SLAVE_CMD1_bm (1<<1) /* Command bit 1 mask. */ -#define TWI_SLAVE_CMD1_bp 1 /* Command bit 1 position. */ - - -/* TWI_SLAVE.STATUS bit masks and bit positions */ -#define TWI_SLAVE_DIF_bm 0x80 /* Data Interrupt Flag bit mask. */ -#define TWI_SLAVE_DIF_bp 7 /* Data Interrupt Flag bit position. */ - -#define TWI_SLAVE_APIF_bm 0x40 /* Address/Stop Interrupt Flag bit mask. */ -#define TWI_SLAVE_APIF_bp 6 /* Address/Stop Interrupt Flag bit position. */ - -#define TWI_SLAVE_CLKHOLD_bm 0x20 /* Clock Hold bit mask. */ -#define TWI_SLAVE_CLKHOLD_bp 5 /* Clock Hold bit position. */ - -#define TWI_SLAVE_RXACK_bm 0x10 /* Received Acknowledge bit mask. */ -#define TWI_SLAVE_RXACK_bp 4 /* Received Acknowledge bit position. */ - -#define TWI_SLAVE_COLL_bm 0x08 /* Collision bit mask. */ -#define TWI_SLAVE_COLL_bp 3 /* Collision bit position. */ - -#define TWI_SLAVE_BUSERR_bm 0x04 /* Bus Error bit mask. */ -#define TWI_SLAVE_BUSERR_bp 2 /* Bus Error bit position. */ - -#define TWI_SLAVE_DIR_bm 0x02 /* Read/Write Direction bit mask. */ -#define TWI_SLAVE_DIR_bp 1 /* Read/Write Direction bit position. */ - -#define TWI_SLAVE_AP_bm 0x01 /* Slave Address or Stop bit mask. */ -#define TWI_SLAVE_AP_bp 0 /* Slave Address or Stop bit position. */ - - -/* TWI.CTRL bit masks and bit positions */ -#define TWI_SDAHOLD_bm 0x02 /* SDA Hold Time Enable bit mask. */ -#define TWI_SDAHOLD_bp 1 /* SDA Hold Time Enable bit position. */ - -#define TWI_EDIEN_bm 0x01 /* External Driver Interface Enable bit mask. */ -#define TWI_EDIEN_bp 0 /* External Driver Interface Enable bit position. */ - - -/* PORT - Port Configuration */ -/* PORTCFG.VPCTRLA bit masks and bit positions */ -#define PORTCFG_VP1MAP_gm 0xF0 /* Virtual Port 1 Mapping group mask. */ -#define PORTCFG_VP1MAP_gp 4 /* Virtual Port 1 Mapping group position. */ -#define PORTCFG_VP1MAP0_bm (1<<4) /* Virtual Port 1 Mapping bit 0 mask. */ -#define PORTCFG_VP1MAP0_bp 4 /* Virtual Port 1 Mapping bit 0 position. */ -#define PORTCFG_VP1MAP1_bm (1<<5) /* Virtual Port 1 Mapping bit 1 mask. */ -#define PORTCFG_VP1MAP1_bp 5 /* Virtual Port 1 Mapping bit 1 position. */ -#define PORTCFG_VP1MAP2_bm (1<<6) /* Virtual Port 1 Mapping bit 2 mask. */ -#define PORTCFG_VP1MAP2_bp 6 /* Virtual Port 1 Mapping bit 2 position. */ -#define PORTCFG_VP1MAP3_bm (1<<7) /* Virtual Port 1 Mapping bit 3 mask. */ -#define PORTCFG_VP1MAP3_bp 7 /* Virtual Port 1 Mapping bit 3 position. */ - -#define PORTCFG_VP0MAP_gm 0x0F /* Virtual Port 0 Mapping group mask. */ -#define PORTCFG_VP0MAP_gp 0 /* Virtual Port 0 Mapping group position. */ -#define PORTCFG_VP0MAP0_bm (1<<0) /* Virtual Port 0 Mapping bit 0 mask. */ -#define PORTCFG_VP0MAP0_bp 0 /* Virtual Port 0 Mapping bit 0 position. */ -#define PORTCFG_VP0MAP1_bm (1<<1) /* Virtual Port 0 Mapping bit 1 mask. */ -#define PORTCFG_VP0MAP1_bp 1 /* Virtual Port 0 Mapping bit 1 position. */ -#define PORTCFG_VP0MAP2_bm (1<<2) /* Virtual Port 0 Mapping bit 2 mask. */ -#define PORTCFG_VP0MAP2_bp 2 /* Virtual Port 0 Mapping bit 2 position. */ -#define PORTCFG_VP0MAP3_bm (1<<3) /* Virtual Port 0 Mapping bit 3 mask. */ -#define PORTCFG_VP0MAP3_bp 3 /* Virtual Port 0 Mapping bit 3 position. */ - - -/* PORTCFG.VPCTRLB bit masks and bit positions */ -#define PORTCFG_VP3MAP_gm 0xF0 /* Virtual Port 3 Mapping group mask. */ -#define PORTCFG_VP3MAP_gp 4 /* Virtual Port 3 Mapping group position. */ -#define PORTCFG_VP3MAP0_bm (1<<4) /* Virtual Port 3 Mapping bit 0 mask. */ -#define PORTCFG_VP3MAP0_bp 4 /* Virtual Port 3 Mapping bit 0 position. */ -#define PORTCFG_VP3MAP1_bm (1<<5) /* Virtual Port 3 Mapping bit 1 mask. */ -#define PORTCFG_VP3MAP1_bp 5 /* Virtual Port 3 Mapping bit 1 position. */ -#define PORTCFG_VP3MAP2_bm (1<<6) /* Virtual Port 3 Mapping bit 2 mask. */ -#define PORTCFG_VP3MAP2_bp 6 /* Virtual Port 3 Mapping bit 2 position. */ -#define PORTCFG_VP3MAP3_bm (1<<7) /* Virtual Port 3 Mapping bit 3 mask. */ -#define PORTCFG_VP3MAP3_bp 7 /* Virtual Port 3 Mapping bit 3 position. */ - -#define PORTCFG_VP2MAP_gm 0x0F /* Virtual Port 2 Mapping group mask. */ -#define PORTCFG_VP2MAP_gp 0 /* Virtual Port 2 Mapping group position. */ -#define PORTCFG_VP2MAP0_bm (1<<0) /* Virtual Port 2 Mapping bit 0 mask. */ -#define PORTCFG_VP2MAP0_bp 0 /* Virtual Port 2 Mapping bit 0 position. */ -#define PORTCFG_VP2MAP1_bm (1<<1) /* Virtual Port 2 Mapping bit 1 mask. */ -#define PORTCFG_VP2MAP1_bp 1 /* Virtual Port 2 Mapping bit 1 position. */ -#define PORTCFG_VP2MAP2_bm (1<<2) /* Virtual Port 2 Mapping bit 2 mask. */ -#define PORTCFG_VP2MAP2_bp 2 /* Virtual Port 2 Mapping bit 2 position. */ -#define PORTCFG_VP2MAP3_bm (1<<3) /* Virtual Port 2 Mapping bit 3 mask. */ -#define PORTCFG_VP2MAP3_bp 3 /* Virtual Port 2 Mapping bit 3 position. */ - - -/* PORTCFG.CLKEVOUT bit masks and bit positions */ -#define PORTCFG_CLKOUT_gm 0x03 /* Clock Output Port group mask. */ -#define PORTCFG_CLKOUT_gp 0 /* Clock Output Port group position. */ -#define PORTCFG_CLKOUT0_bm (1<<0) /* Clock Output Port bit 0 mask. */ -#define PORTCFG_CLKOUT0_bp 0 /* Clock Output Port bit 0 position. */ -#define PORTCFG_CLKOUT1_bm (1<<1) /* Clock Output Port bit 1 mask. */ -#define PORTCFG_CLKOUT1_bp 1 /* Clock Output Port bit 1 position. */ - -#define PORTCFG_EVOUT_gm 0x30 /* Event Output Port group mask. */ -#define PORTCFG_EVOUT_gp 4 /* Event Output Port group position. */ -#define PORTCFG_EVOUT0_bm (1<<4) /* Event Output Port bit 0 mask. */ -#define PORTCFG_EVOUT0_bp 4 /* Event Output Port bit 0 position. */ -#define PORTCFG_EVOUT1_bm (1<<5) /* Event Output Port bit 1 mask. */ -#define PORTCFG_EVOUT1_bp 5 /* Event Output Port bit 1 position. */ - - -/* VPORT.INTFLAGS bit masks and bit positions */ -#define VPORT_INT1IF_bm 0x02 /* Port Interrupt 1 Flag bit mask. */ -#define VPORT_INT1IF_bp 1 /* Port Interrupt 1 Flag bit position. */ - -#define VPORT_INT0IF_bm 0x01 /* Port Interrupt 0 Flag bit mask. */ -#define VPORT_INT0IF_bp 0 /* Port Interrupt 0 Flag bit position. */ - - -/* PORT.INTCTRL bit masks and bit positions */ -#define PORT_INT1LVL_gm 0x0C /* Port Interrupt 1 Level group mask. */ -#define PORT_INT1LVL_gp 2 /* Port Interrupt 1 Level group position. */ -#define PORT_INT1LVL0_bm (1<<2) /* Port Interrupt 1 Level bit 0 mask. */ -#define PORT_INT1LVL0_bp 2 /* Port Interrupt 1 Level bit 0 position. */ -#define PORT_INT1LVL1_bm (1<<3) /* Port Interrupt 1 Level bit 1 mask. */ -#define PORT_INT1LVL1_bp 3 /* Port Interrupt 1 Level bit 1 position. */ - -#define PORT_INT0LVL_gm 0x03 /* Port Interrupt 0 Level group mask. */ -#define PORT_INT0LVL_gp 0 /* Port Interrupt 0 Level group position. */ -#define PORT_INT0LVL0_bm (1<<0) /* Port Interrupt 0 Level bit 0 mask. */ -#define PORT_INT0LVL0_bp 0 /* Port Interrupt 0 Level bit 0 position. */ -#define PORT_INT0LVL1_bm (1<<1) /* Port Interrupt 0 Level bit 1 mask. */ -#define PORT_INT0LVL1_bp 1 /* Port Interrupt 0 Level bit 1 position. */ - - -/* PORT.INTFLAGS bit masks and bit positions */ -#define PORT_INT1IF_bm 0x02 /* Port Interrupt 1 Flag bit mask. */ -#define PORT_INT1IF_bp 1 /* Port Interrupt 1 Flag bit position. */ - -#define PORT_INT0IF_bm 0x01 /* Port Interrupt 0 Flag bit mask. */ -#define PORT_INT0IF_bp 0 /* Port Interrupt 0 Flag bit position. */ - - -/* PORT.PIN0CTRL bit masks and bit positions */ -#define PORT_SRLEN_bm 0x80 /* Slew Rate Enable bit mask. */ -#define PORT_SRLEN_bp 7 /* Slew Rate Enable bit position. */ - -#define PORT_INVEN_bm 0x40 /* Inverted I/O Enable bit mask. */ -#define PORT_INVEN_bp 6 /* Inverted I/O Enable bit position. */ - -#define PORT_OPC_gm 0x38 /* Output/Pull Configuration group mask. */ -#define PORT_OPC_gp 3 /* Output/Pull Configuration group position. */ -#define PORT_OPC0_bm (1<<3) /* Output/Pull Configuration bit 0 mask. */ -#define PORT_OPC0_bp 3 /* Output/Pull Configuration bit 0 position. */ -#define PORT_OPC1_bm (1<<4) /* Output/Pull Configuration bit 1 mask. */ -#define PORT_OPC1_bp 4 /* Output/Pull Configuration bit 1 position. */ -#define PORT_OPC2_bm (1<<5) /* Output/Pull Configuration bit 2 mask. */ -#define PORT_OPC2_bp 5 /* Output/Pull Configuration bit 2 position. */ - -#define PORT_ISC_gm 0x07 /* Input/Sense Configuration group mask. */ -#define PORT_ISC_gp 0 /* Input/Sense Configuration group position. */ -#define PORT_ISC0_bm (1<<0) /* Input/Sense Configuration bit 0 mask. */ -#define PORT_ISC0_bp 0 /* Input/Sense Configuration bit 0 position. */ -#define PORT_ISC1_bm (1<<1) /* Input/Sense Configuration bit 1 mask. */ -#define PORT_ISC1_bp 1 /* Input/Sense Configuration bit 1 position. */ -#define PORT_ISC2_bm (1<<2) /* Input/Sense Configuration bit 2 mask. */ -#define PORT_ISC2_bp 2 /* Input/Sense Configuration bit 2 position. */ - - -/* PORT.PIN1CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* PORT.PIN2CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* PORT.PIN3CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* PORT.PIN4CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* PORT.PIN5CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* PORT.PIN6CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* PORT.PIN7CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* TC - 16-bit Timer/Counter With PWM */ -/* TC0.CTRLA bit masks and bit positions */ -#define TC0_CLKSEL_gm 0x0F /* Clock Selection group mask. */ -#define TC0_CLKSEL_gp 0 /* Clock Selection group position. */ -#define TC0_CLKSEL0_bm (1<<0) /* Clock Selection bit 0 mask. */ -#define TC0_CLKSEL0_bp 0 /* Clock Selection bit 0 position. */ -#define TC0_CLKSEL1_bm (1<<1) /* Clock Selection bit 1 mask. */ -#define TC0_CLKSEL1_bp 1 /* Clock Selection bit 1 position. */ -#define TC0_CLKSEL2_bm (1<<2) /* Clock Selection bit 2 mask. */ -#define TC0_CLKSEL2_bp 2 /* Clock Selection bit 2 position. */ -#define TC0_CLKSEL3_bm (1<<3) /* Clock Selection bit 3 mask. */ -#define TC0_CLKSEL3_bp 3 /* Clock Selection bit 3 position. */ - - -/* TC0.CTRLB bit masks and bit positions */ -#define TC0_CCDEN_bm 0x80 /* Compare or Capture D Enable bit mask. */ -#define TC0_CCDEN_bp 7 /* Compare or Capture D Enable bit position. */ - -#define TC0_CCCEN_bm 0x40 /* Compare or Capture C Enable bit mask. */ -#define TC0_CCCEN_bp 6 /* Compare or Capture C Enable bit position. */ - -#define TC0_CCBEN_bm 0x20 /* Compare or Capture B Enable bit mask. */ -#define TC0_CCBEN_bp 5 /* Compare or Capture B Enable bit position. */ - -#define TC0_CCAEN_bm 0x10 /* Compare or Capture A Enable bit mask. */ -#define TC0_CCAEN_bp 4 /* Compare or Capture A Enable bit position. */ - -#define TC0_WGMODE_gm 0x07 /* Waveform generation mode group mask. */ -#define TC0_WGMODE_gp 0 /* Waveform generation mode group position. */ -#define TC0_WGMODE0_bm (1<<0) /* Waveform generation mode bit 0 mask. */ -#define TC0_WGMODE0_bp 0 /* Waveform generation mode bit 0 position. */ -#define TC0_WGMODE1_bm (1<<1) /* Waveform generation mode bit 1 mask. */ -#define TC0_WGMODE1_bp 1 /* Waveform generation mode bit 1 position. */ -#define TC0_WGMODE2_bm (1<<2) /* Waveform generation mode bit 2 mask. */ -#define TC0_WGMODE2_bp 2 /* Waveform generation mode bit 2 position. */ - - -/* TC0.CTRLC bit masks and bit positions */ -#define TC0_CMPD_bm 0x08 /* Compare D Output Value bit mask. */ -#define TC0_CMPD_bp 3 /* Compare D Output Value bit position. */ - -#define TC0_CMPC_bm 0x04 /* Compare C Output Value bit mask. */ -#define TC0_CMPC_bp 2 /* Compare C Output Value bit position. */ - -#define TC0_CMPB_bm 0x02 /* Compare B Output Value bit mask. */ -#define TC0_CMPB_bp 1 /* Compare B Output Value bit position. */ - -#define TC0_CMPA_bm 0x01 /* Compare A Output Value bit mask. */ -#define TC0_CMPA_bp 0 /* Compare A Output Value bit position. */ - - -/* TC0.CTRLD bit masks and bit positions */ -#define TC0_EVACT_gm 0xE0 /* Event Action group mask. */ -#define TC0_EVACT_gp 5 /* Event Action group position. */ -#define TC0_EVACT0_bm (1<<5) /* Event Action bit 0 mask. */ -#define TC0_EVACT0_bp 5 /* Event Action bit 0 position. */ -#define TC0_EVACT1_bm (1<<6) /* Event Action bit 1 mask. */ -#define TC0_EVACT1_bp 6 /* Event Action bit 1 position. */ -#define TC0_EVACT2_bm (1<<7) /* Event Action bit 2 mask. */ -#define TC0_EVACT2_bp 7 /* Event Action bit 2 position. */ - -#define TC0_EVDLY_bm 0x10 /* Event Delay bit mask. */ -#define TC0_EVDLY_bp 4 /* Event Delay bit position. */ - -#define TC0_EVSEL_gm 0x0F /* Event Source Select group mask. */ -#define TC0_EVSEL_gp 0 /* Event Source Select group position. */ -#define TC0_EVSEL0_bm (1<<0) /* Event Source Select bit 0 mask. */ -#define TC0_EVSEL0_bp 0 /* Event Source Select bit 0 position. */ -#define TC0_EVSEL1_bm (1<<1) /* Event Source Select bit 1 mask. */ -#define TC0_EVSEL1_bp 1 /* Event Source Select bit 1 position. */ -#define TC0_EVSEL2_bm (1<<2) /* Event Source Select bit 2 mask. */ -#define TC0_EVSEL2_bp 2 /* Event Source Select bit 2 position. */ -#define TC0_EVSEL3_bm (1<<3) /* Event Source Select bit 3 mask. */ -#define TC0_EVSEL3_bp 3 /* Event Source Select bit 3 position. */ - - -/* TC0.CTRLE bit masks and bit positions */ -#define TC0_DTHM_bm 0x02 /* Dead Time Hold Mode bit mask. */ -#define TC0_DTHM_bp 1 /* Dead Time Hold Mode bit position. */ - -#define TC0_BYTEM_bm 0x01 /* Byte Mode bit mask. */ -#define TC0_BYTEM_bp 0 /* Byte Mode bit position. */ - - -/* TC0.INTCTRLA bit masks and bit positions */ -#define TC0_ERRINTLVL_gm 0x0C /* Error Interrupt Level group mask. */ -#define TC0_ERRINTLVL_gp 2 /* Error Interrupt Level group position. */ -#define TC0_ERRINTLVL0_bm (1<<2) /* Error Interrupt Level bit 0 mask. */ -#define TC0_ERRINTLVL0_bp 2 /* Error Interrupt Level bit 0 position. */ -#define TC0_ERRINTLVL1_bm (1<<3) /* Error Interrupt Level bit 1 mask. */ -#define TC0_ERRINTLVL1_bp 3 /* Error Interrupt Level bit 1 position. */ - -#define TC0_OVFINTLVL_gm 0x03 /* Overflow interrupt level group mask. */ -#define TC0_OVFINTLVL_gp 0 /* Overflow interrupt level group position. */ -#define TC0_OVFINTLVL0_bm (1<<0) /* Overflow interrupt level bit 0 mask. */ -#define TC0_OVFINTLVL0_bp 0 /* Overflow interrupt level bit 0 position. */ -#define TC0_OVFINTLVL1_bm (1<<1) /* Overflow interrupt level bit 1 mask. */ -#define TC0_OVFINTLVL1_bp 1 /* Overflow interrupt level bit 1 position. */ - - -/* TC0.INTCTRLB bit masks and bit positions */ -#define TC0_CCDINTLVL_gm 0xC0 /* Compare or Capture D Interrupt Level group mask. */ -#define TC0_CCDINTLVL_gp 6 /* Compare or Capture D Interrupt Level group position. */ -#define TC0_CCDINTLVL0_bm (1<<6) /* Compare or Capture D Interrupt Level bit 0 mask. */ -#define TC0_CCDINTLVL0_bp 6 /* Compare or Capture D Interrupt Level bit 0 position. */ -#define TC0_CCDINTLVL1_bm (1<<7) /* Compare or Capture D Interrupt Level bit 1 mask. */ -#define TC0_CCDINTLVL1_bp 7 /* Compare or Capture D Interrupt Level bit 1 position. */ - -#define TC0_CCCINTLVL_gm 0x30 /* Compare or Capture C Interrupt Level group mask. */ -#define TC0_CCCINTLVL_gp 4 /* Compare or Capture C Interrupt Level group position. */ -#define TC0_CCCINTLVL0_bm (1<<4) /* Compare or Capture C Interrupt Level bit 0 mask. */ -#define TC0_CCCINTLVL0_bp 4 /* Compare or Capture C Interrupt Level bit 0 position. */ -#define TC0_CCCINTLVL1_bm (1<<5) /* Compare or Capture C Interrupt Level bit 1 mask. */ -#define TC0_CCCINTLVL1_bp 5 /* Compare or Capture C Interrupt Level bit 1 position. */ - -#define TC0_CCBINTLVL_gm 0x0C /* Compare or Capture B Interrupt Level group mask. */ -#define TC0_CCBINTLVL_gp 2 /* Compare or Capture B Interrupt Level group position. */ -#define TC0_CCBINTLVL0_bm (1<<2) /* Compare or Capture B Interrupt Level bit 0 mask. */ -#define TC0_CCBINTLVL0_bp 2 /* Compare or Capture B Interrupt Level bit 0 position. */ -#define TC0_CCBINTLVL1_bm (1<<3) /* Compare or Capture B Interrupt Level bit 1 mask. */ -#define TC0_CCBINTLVL1_bp 3 /* Compare or Capture B Interrupt Level bit 1 position. */ - -#define TC0_CCAINTLVL_gm 0x03 /* Compare or Capture A Interrupt Level group mask. */ -#define TC0_CCAINTLVL_gp 0 /* Compare or Capture A Interrupt Level group position. */ -#define TC0_CCAINTLVL0_bm (1<<0) /* Compare or Capture A Interrupt Level bit 0 mask. */ -#define TC0_CCAINTLVL0_bp 0 /* Compare or Capture A Interrupt Level bit 0 position. */ -#define TC0_CCAINTLVL1_bm (1<<1) /* Compare or Capture A Interrupt Level bit 1 mask. */ -#define TC0_CCAINTLVL1_bp 1 /* Compare or Capture A Interrupt Level bit 1 position. */ - - -/* TC0.CTRLFCLR bit masks and bit positions */ -#define TC0_CMD_gm 0x0C /* Command group mask. */ -#define TC0_CMD_gp 2 /* Command group position. */ -#define TC0_CMD0_bm (1<<2) /* Command bit 0 mask. */ -#define TC0_CMD0_bp 2 /* Command bit 0 position. */ -#define TC0_CMD1_bm (1<<3) /* Command bit 1 mask. */ -#define TC0_CMD1_bp 3 /* Command bit 1 position. */ - -#define TC0_LUPD_bm 0x02 /* Lock Update bit mask. */ -#define TC0_LUPD_bp 1 /* Lock Update bit position. */ - -#define TC0_DIR_bm 0x01 /* Direction bit mask. */ -#define TC0_DIR_bp 0 /* Direction bit position. */ - - -/* TC0.CTRLFSET bit masks and bit positions */ -/* TC0_CMD_gm Predefined. */ -/* TC0_CMD_gp Predefined. */ -/* TC0_CMD0_bm Predefined. */ -/* TC0_CMD0_bp Predefined. */ -/* TC0_CMD1_bm Predefined. */ -/* TC0_CMD1_bp Predefined. */ - -/* TC0_LUPD_bm Predefined. */ -/* TC0_LUPD_bp Predefined. */ - -/* TC0_DIR_bm Predefined. */ -/* TC0_DIR_bp Predefined. */ - - -/* TC0.CTRLGCLR bit masks and bit positions */ -#define TC0_CCDBV_bm 0x10 /* Compare or Capture D Buffer Valid bit mask. */ -#define TC0_CCDBV_bp 4 /* Compare or Capture D Buffer Valid bit position. */ - -#define TC0_CCCBV_bm 0x08 /* Compare or Capture C Buffer Valid bit mask. */ -#define TC0_CCCBV_bp 3 /* Compare or Capture C Buffer Valid bit position. */ - -#define TC0_CCBBV_bm 0x04 /* Compare or Capture B Buffer Valid bit mask. */ -#define TC0_CCBBV_bp 2 /* Compare or Capture B Buffer Valid bit position. */ - -#define TC0_CCABV_bm 0x02 /* Compare or Capture A Buffer Valid bit mask. */ -#define TC0_CCABV_bp 1 /* Compare or Capture A Buffer Valid bit position. */ - -#define TC0_PERBV_bm 0x01 /* Period Buffer Valid bit mask. */ -#define TC0_PERBV_bp 0 /* Period Buffer Valid bit position. */ - - -/* TC0.CTRLGSET bit masks and bit positions */ -/* TC0_CCDBV_bm Predefined. */ -/* TC0_CCDBV_bp Predefined. */ - -/* TC0_CCCBV_bm Predefined. */ -/* TC0_CCCBV_bp Predefined. */ - -/* TC0_CCBBV_bm Predefined. */ -/* TC0_CCBBV_bp Predefined. */ - -/* TC0_CCABV_bm Predefined. */ -/* TC0_CCABV_bp Predefined. */ - -/* TC0_PERBV_bm Predefined. */ -/* TC0_PERBV_bp Predefined. */ - - -/* TC0.INTFLAGS bit masks and bit positions */ -#define TC0_CCDIF_bm 0x80 /* Compare or Capture D Interrupt Flag bit mask. */ -#define TC0_CCDIF_bp 7 /* Compare or Capture D Interrupt Flag bit position. */ - -#define TC0_CCCIF_bm 0x40 /* Compare or Capture C Interrupt Flag bit mask. */ -#define TC0_CCCIF_bp 6 /* Compare or Capture C Interrupt Flag bit position. */ - -#define TC0_CCBIF_bm 0x20 /* Compare or Capture B Interrupt Flag bit mask. */ -#define TC0_CCBIF_bp 5 /* Compare or Capture B Interrupt Flag bit position. */ - -#define TC0_CCAIF_bm 0x10 /* Compare or Capture A Interrupt Flag bit mask. */ -#define TC0_CCAIF_bp 4 /* Compare or Capture A Interrupt Flag bit position. */ - -#define TC0_ERRIF_bm 0x02 /* Error Interrupt Flag bit mask. */ -#define TC0_ERRIF_bp 1 /* Error Interrupt Flag bit position. */ - -#define TC0_OVFIF_bm 0x01 /* Overflow Interrupt Flag bit mask. */ -#define TC0_OVFIF_bp 0 /* Overflow Interrupt Flag bit position. */ - - -/* TC1.CTRLA bit masks and bit positions */ -#define TC1_CLKSEL_gm 0x0F /* Clock Selection group mask. */ -#define TC1_CLKSEL_gp 0 /* Clock Selection group position. */ -#define TC1_CLKSEL0_bm (1<<0) /* Clock Selection bit 0 mask. */ -#define TC1_CLKSEL0_bp 0 /* Clock Selection bit 0 position. */ -#define TC1_CLKSEL1_bm (1<<1) /* Clock Selection bit 1 mask. */ -#define TC1_CLKSEL1_bp 1 /* Clock Selection bit 1 position. */ -#define TC1_CLKSEL2_bm (1<<2) /* Clock Selection bit 2 mask. */ -#define TC1_CLKSEL2_bp 2 /* Clock Selection bit 2 position. */ -#define TC1_CLKSEL3_bm (1<<3) /* Clock Selection bit 3 mask. */ -#define TC1_CLKSEL3_bp 3 /* Clock Selection bit 3 position. */ - - -/* TC1.CTRLB bit masks and bit positions */ -#define TC1_CCBEN_bm 0x20 /* Compare or Capture B Enable bit mask. */ -#define TC1_CCBEN_bp 5 /* Compare or Capture B Enable bit position. */ - -#define TC1_CCAEN_bm 0x10 /* Compare or Capture A Enable bit mask. */ -#define TC1_CCAEN_bp 4 /* Compare or Capture A Enable bit position. */ - -#define TC1_WGMODE_gm 0x07 /* Waveform generation mode group mask. */ -#define TC1_WGMODE_gp 0 /* Waveform generation mode group position. */ -#define TC1_WGMODE0_bm (1<<0) /* Waveform generation mode bit 0 mask. */ -#define TC1_WGMODE0_bp 0 /* Waveform generation mode bit 0 position. */ -#define TC1_WGMODE1_bm (1<<1) /* Waveform generation mode bit 1 mask. */ -#define TC1_WGMODE1_bp 1 /* Waveform generation mode bit 1 position. */ -#define TC1_WGMODE2_bm (1<<2) /* Waveform generation mode bit 2 mask. */ -#define TC1_WGMODE2_bp 2 /* Waveform generation mode bit 2 position. */ - - -/* TC1.CTRLC bit masks and bit positions */ -#define TC1_CMPB_bm 0x02 /* Compare B Output Value bit mask. */ -#define TC1_CMPB_bp 1 /* Compare B Output Value bit position. */ - -#define TC1_CMPA_bm 0x01 /* Compare A Output Value bit mask. */ -#define TC1_CMPA_bp 0 /* Compare A Output Value bit position. */ - - -/* TC1.CTRLD bit masks and bit positions */ -#define TC1_EVACT_gm 0xE0 /* Event Action group mask. */ -#define TC1_EVACT_gp 5 /* Event Action group position. */ -#define TC1_EVACT0_bm (1<<5) /* Event Action bit 0 mask. */ -#define TC1_EVACT0_bp 5 /* Event Action bit 0 position. */ -#define TC1_EVACT1_bm (1<<6) /* Event Action bit 1 mask. */ -#define TC1_EVACT1_bp 6 /* Event Action bit 1 position. */ -#define TC1_EVACT2_bm (1<<7) /* Event Action bit 2 mask. */ -#define TC1_EVACT2_bp 7 /* Event Action bit 2 position. */ - -#define TC1_EVDLY_bm 0x10 /* Event Delay bit mask. */ -#define TC1_EVDLY_bp 4 /* Event Delay bit position. */ - -#define TC1_EVSEL_gm 0x0F /* Event Source Select group mask. */ -#define TC1_EVSEL_gp 0 /* Event Source Select group position. */ -#define TC1_EVSEL0_bm (1<<0) /* Event Source Select bit 0 mask. */ -#define TC1_EVSEL0_bp 0 /* Event Source Select bit 0 position. */ -#define TC1_EVSEL1_bm (1<<1) /* Event Source Select bit 1 mask. */ -#define TC1_EVSEL1_bp 1 /* Event Source Select bit 1 position. */ -#define TC1_EVSEL2_bm (1<<2) /* Event Source Select bit 2 mask. */ -#define TC1_EVSEL2_bp 2 /* Event Source Select bit 2 position. */ -#define TC1_EVSEL3_bm (1<<3) /* Event Source Select bit 3 mask. */ -#define TC1_EVSEL3_bp 3 /* Event Source Select bit 3 position. */ - - -/* TC1.CTRLE bit masks and bit positions */ -#define TC1_DTHM_bm 0x02 /* Dead Time Hold Mode bit mask. */ -#define TC1_DTHM_bp 1 /* Dead Time Hold Mode bit position. */ - -#define TC1_BYTEM_bm 0x01 /* Byte Mode bit mask. */ -#define TC1_BYTEM_bp 0 /* Byte Mode bit position. */ - - -/* TC1.INTCTRLA bit masks and bit positions */ -#define TC1_ERRINTLVL_gm 0x0C /* Error Interrupt Level group mask. */ -#define TC1_ERRINTLVL_gp 2 /* Error Interrupt Level group position. */ -#define TC1_ERRINTLVL0_bm (1<<2) /* Error Interrupt Level bit 0 mask. */ -#define TC1_ERRINTLVL0_bp 2 /* Error Interrupt Level bit 0 position. */ -#define TC1_ERRINTLVL1_bm (1<<3) /* Error Interrupt Level bit 1 mask. */ -#define TC1_ERRINTLVL1_bp 3 /* Error Interrupt Level bit 1 position. */ - -#define TC1_OVFINTLVL_gm 0x03 /* Overflow interrupt level group mask. */ -#define TC1_OVFINTLVL_gp 0 /* Overflow interrupt level group position. */ -#define TC1_OVFINTLVL0_bm (1<<0) /* Overflow interrupt level bit 0 mask. */ -#define TC1_OVFINTLVL0_bp 0 /* Overflow interrupt level bit 0 position. */ -#define TC1_OVFINTLVL1_bm (1<<1) /* Overflow interrupt level bit 1 mask. */ -#define TC1_OVFINTLVL1_bp 1 /* Overflow interrupt level bit 1 position. */ - - -/* TC1.INTCTRLB bit masks and bit positions */ -#define TC1_CCBINTLVL_gm 0x0C /* Compare or Capture B Interrupt Level group mask. */ -#define TC1_CCBINTLVL_gp 2 /* Compare or Capture B Interrupt Level group position. */ -#define TC1_CCBINTLVL0_bm (1<<2) /* Compare or Capture B Interrupt Level bit 0 mask. */ -#define TC1_CCBINTLVL0_bp 2 /* Compare or Capture B Interrupt Level bit 0 position. */ -#define TC1_CCBINTLVL1_bm (1<<3) /* Compare or Capture B Interrupt Level bit 1 mask. */ -#define TC1_CCBINTLVL1_bp 3 /* Compare or Capture B Interrupt Level bit 1 position. */ - -#define TC1_CCAINTLVL_gm 0x03 /* Compare or Capture A Interrupt Level group mask. */ -#define TC1_CCAINTLVL_gp 0 /* Compare or Capture A Interrupt Level group position. */ -#define TC1_CCAINTLVL0_bm (1<<0) /* Compare or Capture A Interrupt Level bit 0 mask. */ -#define TC1_CCAINTLVL0_bp 0 /* Compare or Capture A Interrupt Level bit 0 position. */ -#define TC1_CCAINTLVL1_bm (1<<1) /* Compare or Capture A Interrupt Level bit 1 mask. */ -#define TC1_CCAINTLVL1_bp 1 /* Compare or Capture A Interrupt Level bit 1 position. */ - - -/* TC1.CTRLFCLR bit masks and bit positions */ -#define TC1_CMD_gm 0x0C /* Command group mask. */ -#define TC1_CMD_gp 2 /* Command group position. */ -#define TC1_CMD0_bm (1<<2) /* Command bit 0 mask. */ -#define TC1_CMD0_bp 2 /* Command bit 0 position. */ -#define TC1_CMD1_bm (1<<3) /* Command bit 1 mask. */ -#define TC1_CMD1_bp 3 /* Command bit 1 position. */ - -#define TC1_LUPD_bm 0x02 /* Lock Update bit mask. */ -#define TC1_LUPD_bp 1 /* Lock Update bit position. */ - -#define TC1_DIR_bm 0x01 /* Direction bit mask. */ -#define TC1_DIR_bp 0 /* Direction bit position. */ - - -/* TC1.CTRLFSET bit masks and bit positions */ -/* TC1_CMD_gm Predefined. */ -/* TC1_CMD_gp Predefined. */ -/* TC1_CMD0_bm Predefined. */ -/* TC1_CMD0_bp Predefined. */ -/* TC1_CMD1_bm Predefined. */ -/* TC1_CMD1_bp Predefined. */ - -/* TC1_LUPD_bm Predefined. */ -/* TC1_LUPD_bp Predefined. */ - -/* TC1_DIR_bm Predefined. */ -/* TC1_DIR_bp Predefined. */ - - -/* TC1.CTRLGCLR bit masks and bit positions */ -#define TC1_CCBBV_bm 0x04 /* Compare or Capture B Buffer Valid bit mask. */ -#define TC1_CCBBV_bp 2 /* Compare or Capture B Buffer Valid bit position. */ - -#define TC1_CCABV_bm 0x02 /* Compare or Capture A Buffer Valid bit mask. */ -#define TC1_CCABV_bp 1 /* Compare or Capture A Buffer Valid bit position. */ - -#define TC1_PERBV_bm 0x01 /* Period Buffer Valid bit mask. */ -#define TC1_PERBV_bp 0 /* Period Buffer Valid bit position. */ - - -/* TC1.CTRLGSET bit masks and bit positions */ -/* TC1_CCBBV_bm Predefined. */ -/* TC1_CCBBV_bp Predefined. */ - -/* TC1_CCABV_bm Predefined. */ -/* TC1_CCABV_bp Predefined. */ - -/* TC1_PERBV_bm Predefined. */ -/* TC1_PERBV_bp Predefined. */ - - -/* TC1.INTFLAGS bit masks and bit positions */ -#define TC1_CCBIF_bm 0x20 /* Compare or Capture B Interrupt Flag bit mask. */ -#define TC1_CCBIF_bp 5 /* Compare or Capture B Interrupt Flag bit position. */ - -#define TC1_CCAIF_bm 0x10 /* Compare or Capture A Interrupt Flag bit mask. */ -#define TC1_CCAIF_bp 4 /* Compare or Capture A Interrupt Flag bit position. */ - -#define TC1_ERRIF_bm 0x02 /* Error Interrupt Flag bit mask. */ -#define TC1_ERRIF_bp 1 /* Error Interrupt Flag bit position. */ - -#define TC1_OVFIF_bm 0x01 /* Overflow Interrupt Flag bit mask. */ -#define TC1_OVFIF_bp 0 /* Overflow Interrupt Flag bit position. */ - - -/* AWEX.CTRL bit masks and bit positions */ -#define AWEX_PGM_bm 0x20 /* Pattern Generation Mode bit mask. */ -#define AWEX_PGM_bp 5 /* Pattern Generation Mode bit position. */ - -#define AWEX_CWCM_bm 0x10 /* Common Waveform Channel Mode bit mask. */ -#define AWEX_CWCM_bp 4 /* Common Waveform Channel Mode bit position. */ - -#define AWEX_DTICCDEN_bm 0x08 /* Dead Time Insertion Compare Channel D Enable bit mask. */ -#define AWEX_DTICCDEN_bp 3 /* Dead Time Insertion Compare Channel D Enable bit position. */ - -#define AWEX_DTICCCEN_bm 0x04 /* Dead Time Insertion Compare Channel C Enable bit mask. */ -#define AWEX_DTICCCEN_bp 2 /* Dead Time Insertion Compare Channel C Enable bit position. */ - -#define AWEX_DTICCBEN_bm 0x02 /* Dead Time Insertion Compare Channel B Enable bit mask. */ -#define AWEX_DTICCBEN_bp 1 /* Dead Time Insertion Compare Channel B Enable bit position. */ - -#define AWEX_DTICCAEN_bm 0x01 /* Dead Time Insertion Compare Channel A Enable bit mask. */ -#define AWEX_DTICCAEN_bp 0 /* Dead Time Insertion Compare Channel A Enable bit position. */ - - -/* AWEX.FDCTRL bit masks and bit positions */ -#define AWEX_FDDBD_bm 0x10 /* Fault Detect on Disable Break Disable bit mask. */ -#define AWEX_FDDBD_bp 4 /* Fault Detect on Disable Break Disable bit position. */ - -#define AWEX_FDMODE_bm 0x04 /* Fault Detect Mode bit mask. */ -#define AWEX_FDMODE_bp 2 /* Fault Detect Mode bit position. */ - -#define AWEX_FDACT_gm 0x03 /* Fault Detect Action group mask. */ -#define AWEX_FDACT_gp 0 /* Fault Detect Action group position. */ -#define AWEX_FDACT0_bm (1<<0) /* Fault Detect Action bit 0 mask. */ -#define AWEX_FDACT0_bp 0 /* Fault Detect Action bit 0 position. */ -#define AWEX_FDACT1_bm (1<<1) /* Fault Detect Action bit 1 mask. */ -#define AWEX_FDACT1_bp 1 /* Fault Detect Action bit 1 position. */ - - -/* AWEX.STATUS bit masks and bit positions */ -#define AWEX_FDF_bm 0x04 /* Fault Detect Flag bit mask. */ -#define AWEX_FDF_bp 2 /* Fault Detect Flag bit position. */ - -#define AWEX_DTHSBUFV_bm 0x02 /* Dead Time High Side Buffer Valid bit mask. */ -#define AWEX_DTHSBUFV_bp 1 /* Dead Time High Side Buffer Valid bit position. */ - -#define AWEX_DTLSBUFV_bm 0x01 /* Dead Time Low Side Buffer Valid bit mask. */ -#define AWEX_DTLSBUFV_bp 0 /* Dead Time Low Side Buffer Valid bit position. */ - - -/* HIRES.CTRL bit masks and bit positions */ -#define HIRES_HREN_gm 0x03 /* High Resolution Enable group mask. */ -#define HIRES_HREN_gp 0 /* High Resolution Enable group position. */ -#define HIRES_HREN0_bm (1<<0) /* High Resolution Enable bit 0 mask. */ -#define HIRES_HREN0_bp 0 /* High Resolution Enable bit 0 position. */ -#define HIRES_HREN1_bm (1<<1) /* High Resolution Enable bit 1 mask. */ -#define HIRES_HREN1_bp 1 /* High Resolution Enable bit 1 position. */ - - -/* USART - Universal Asynchronous Receiver-Transmitter */ -/* USART.STATUS bit masks and bit positions */ -#define USART_RXCIF_bm 0x80 /* Receive Interrupt Flag bit mask. */ -#define USART_RXCIF_bp 7 /* Receive Interrupt Flag bit position. */ - -#define USART_TXCIF_bm 0x40 /* Transmit Interrupt Flag bit mask. */ -#define USART_TXCIF_bp 6 /* Transmit Interrupt Flag bit position. */ - -#define USART_DREIF_bm 0x20 /* Data Register Empty Flag bit mask. */ -#define USART_DREIF_bp 5 /* Data Register Empty Flag bit position. */ - -#define USART_FERR_bm 0x10 /* Frame Error bit mask. */ -#define USART_FERR_bp 4 /* Frame Error bit position. */ - -#define USART_BUFOVF_bm 0x08 /* Buffer Overflow bit mask. */ -#define USART_BUFOVF_bp 3 /* Buffer Overflow bit position. */ - -#define USART_PERR_bm 0x04 /* Parity Error bit mask. */ -#define USART_PERR_bp 2 /* Parity Error bit position. */ - -#define USART_RXB8_bm 0x01 /* Receive Bit 8 bit mask. */ -#define USART_RXB8_bp 0 /* Receive Bit 8 bit position. */ - - -/* USART.CTRLA bit masks and bit positions */ -#define USART_RXCINTLVL_gm 0x30 /* Receive Interrupt Level group mask. */ -#define USART_RXCINTLVL_gp 4 /* Receive Interrupt Level group position. */ -#define USART_RXCINTLVL0_bm (1<<4) /* Receive Interrupt Level bit 0 mask. */ -#define USART_RXCINTLVL0_bp 4 /* Receive Interrupt Level bit 0 position. */ -#define USART_RXCINTLVL1_bm (1<<5) /* Receive Interrupt Level bit 1 mask. */ -#define USART_RXCINTLVL1_bp 5 /* Receive Interrupt Level bit 1 position. */ - -#define USART_TXCINTLVL_gm 0x0C /* Transmit Interrupt Level group mask. */ -#define USART_TXCINTLVL_gp 2 /* Transmit Interrupt Level group position. */ -#define USART_TXCINTLVL0_bm (1<<2) /* Transmit Interrupt Level bit 0 mask. */ -#define USART_TXCINTLVL0_bp 2 /* Transmit Interrupt Level bit 0 position. */ -#define USART_TXCINTLVL1_bm (1<<3) /* Transmit Interrupt Level bit 1 mask. */ -#define USART_TXCINTLVL1_bp 3 /* Transmit Interrupt Level bit 1 position. */ - -#define USART_DREINTLVL_gm 0x03 /* Data Register Empty Interrupt Level group mask. */ -#define USART_DREINTLVL_gp 0 /* Data Register Empty Interrupt Level group position. */ -#define USART_DREINTLVL0_bm (1<<0) /* Data Register Empty Interrupt Level bit 0 mask. */ -#define USART_DREINTLVL0_bp 0 /* Data Register Empty Interrupt Level bit 0 position. */ -#define USART_DREINTLVL1_bm (1<<1) /* Data Register Empty Interrupt Level bit 1 mask. */ -#define USART_DREINTLVL1_bp 1 /* Data Register Empty Interrupt Level bit 1 position. */ - - -/* USART.CTRLB bit masks and bit positions */ -#define USART_RXEN_bm 0x10 /* Receiver Enable bit mask. */ -#define USART_RXEN_bp 4 /* Receiver Enable bit position. */ - -#define USART_TXEN_bm 0x08 /* Transmitter Enable bit mask. */ -#define USART_TXEN_bp 3 /* Transmitter Enable bit position. */ - -#define USART_CLK2X_bm 0x04 /* Double transmission speed bit mask. */ -#define USART_CLK2X_bp 2 /* Double transmission speed bit position. */ - -#define USART_MPCM_bm 0x02 /* Multi-processor Communication Mode bit mask. */ -#define USART_MPCM_bp 1 /* Multi-processor Communication Mode bit position. */ - -#define USART_TXB8_bm 0x01 /* Transmit bit 8 bit mask. */ -#define USART_TXB8_bp 0 /* Transmit bit 8 bit position. */ - - -/* USART.CTRLC bit masks and bit positions */ -#define USART_CMODE_gm 0xC0 /* Communication Mode group mask. */ -#define USART_CMODE_gp 6 /* Communication Mode group position. */ -#define USART_CMODE0_bm (1<<6) /* Communication Mode bit 0 mask. */ -#define USART_CMODE0_bp 6 /* Communication Mode bit 0 position. */ -#define USART_CMODE1_bm (1<<7) /* Communication Mode bit 1 mask. */ -#define USART_CMODE1_bp 7 /* Communication Mode bit 1 position. */ - -#define USART_PMODE_gm 0x30 /* Parity Mode group mask. */ -#define USART_PMODE_gp 4 /* Parity Mode group position. */ -#define USART_PMODE0_bm (1<<4) /* Parity Mode bit 0 mask. */ -#define USART_PMODE0_bp 4 /* Parity Mode bit 0 position. */ -#define USART_PMODE1_bm (1<<5) /* Parity Mode bit 1 mask. */ -#define USART_PMODE1_bp 5 /* Parity Mode bit 1 position. */ - -#define USART_SBMODE_bm 0x08 /* Stop Bit Mode bit mask. */ -#define USART_SBMODE_bp 3 /* Stop Bit Mode bit position. */ - -#define USART_CHSIZE_gm 0x07 /* Character Size group mask. */ -#define USART_CHSIZE_gp 0 /* Character Size group position. */ -#define USART_CHSIZE0_bm (1<<0) /* Character Size bit 0 mask. */ -#define USART_CHSIZE0_bp 0 /* Character Size bit 0 position. */ -#define USART_CHSIZE1_bm (1<<1) /* Character Size bit 1 mask. */ -#define USART_CHSIZE1_bp 1 /* Character Size bit 1 position. */ -#define USART_CHSIZE2_bm (1<<2) /* Character Size bit 2 mask. */ -#define USART_CHSIZE2_bp 2 /* Character Size bit 2 position. */ - - -/* USART.BAUDCTRLA bit masks and bit positions */ -#define USART_BSEL_gm 0xFF /* Baud Rate Selection Bits [7:0] group mask. */ -#define USART_BSEL_gp 0 /* Baud Rate Selection Bits [7:0] group position. */ -#define USART_BSEL0_bm (1<<0) /* Baud Rate Selection Bits [7:0] bit 0 mask. */ -#define USART_BSEL0_bp 0 /* Baud Rate Selection Bits [7:0] bit 0 position. */ -#define USART_BSEL1_bm (1<<1) /* Baud Rate Selection Bits [7:0] bit 1 mask. */ -#define USART_BSEL1_bp 1 /* Baud Rate Selection Bits [7:0] bit 1 position. */ -#define USART_BSEL2_bm (1<<2) /* Baud Rate Selection Bits [7:0] bit 2 mask. */ -#define USART_BSEL2_bp 2 /* Baud Rate Selection Bits [7:0] bit 2 position. */ -#define USART_BSEL3_bm (1<<3) /* Baud Rate Selection Bits [7:0] bit 3 mask. */ -#define USART_BSEL3_bp 3 /* Baud Rate Selection Bits [7:0] bit 3 position. */ -#define USART_BSEL4_bm (1<<4) /* Baud Rate Selection Bits [7:0] bit 4 mask. */ -#define USART_BSEL4_bp 4 /* Baud Rate Selection Bits [7:0] bit 4 position. */ -#define USART_BSEL5_bm (1<<5) /* Baud Rate Selection Bits [7:0] bit 5 mask. */ -#define USART_BSEL5_bp 5 /* Baud Rate Selection Bits [7:0] bit 5 position. */ -#define USART_BSEL6_bm (1<<6) /* Baud Rate Selection Bits [7:0] bit 6 mask. */ -#define USART_BSEL6_bp 6 /* Baud Rate Selection Bits [7:0] bit 6 position. */ -#define USART_BSEL7_bm (1<<7) /* Baud Rate Selection Bits [7:0] bit 7 mask. */ -#define USART_BSEL7_bp 7 /* Baud Rate Selection Bits [7:0] bit 7 position. */ - - -/* USART.BAUDCTRLB bit masks and bit positions */ -#define USART_BSCALE_gm 0xF0 /* Baud Rate Scale group mask. */ -#define USART_BSCALE_gp 4 /* Baud Rate Scale group position. */ -#define USART_BSCALE0_bm (1<<4) /* Baud Rate Scale bit 0 mask. */ -#define USART_BSCALE0_bp 4 /* Baud Rate Scale bit 0 position. */ -#define USART_BSCALE1_bm (1<<5) /* Baud Rate Scale bit 1 mask. */ -#define USART_BSCALE1_bp 5 /* Baud Rate Scale bit 1 position. */ -#define USART_BSCALE2_bm (1<<6) /* Baud Rate Scale bit 2 mask. */ -#define USART_BSCALE2_bp 6 /* Baud Rate Scale bit 2 position. */ -#define USART_BSCALE3_bm (1<<7) /* Baud Rate Scale bit 3 mask. */ -#define USART_BSCALE3_bp 7 /* Baud Rate Scale bit 3 position. */ - -/* USART_BSEL_gm Predefined. */ -/* USART_BSEL_gp Predefined. */ -/* USART_BSEL0_bm Predefined. */ -/* USART_BSEL0_bp Predefined. */ -/* USART_BSEL1_bm Predefined. */ -/* USART_BSEL1_bp Predefined. */ -/* USART_BSEL2_bm Predefined. */ -/* USART_BSEL2_bp Predefined. */ -/* USART_BSEL3_bm Predefined. */ -/* USART_BSEL3_bp Predefined. */ - - -/* SPI - Serial Peripheral Interface */ -/* SPI.CTRL bit masks and bit positions */ -#define SPI_CLK2X_bm 0x80 /* Enable Double Speed bit mask. */ -#define SPI_CLK2X_bp 7 /* Enable Double Speed bit position. */ - -#define SPI_ENABLE_bm 0x40 /* Enable Module bit mask. */ -#define SPI_ENABLE_bp 6 /* Enable Module bit position. */ - -#define SPI_DORD_bm 0x20 /* Data Order Setting bit mask. */ -#define SPI_DORD_bp 5 /* Data Order Setting bit position. */ - -#define SPI_MASTER_bm 0x10 /* Master Operation Enable bit mask. */ -#define SPI_MASTER_bp 4 /* Master Operation Enable bit position. */ - -#define SPI_MODE_gm 0x0C /* SPI Mode group mask. */ -#define SPI_MODE_gp 2 /* SPI Mode group position. */ -#define SPI_MODE0_bm (1<<2) /* SPI Mode bit 0 mask. */ -#define SPI_MODE0_bp 2 /* SPI Mode bit 0 position. */ -#define SPI_MODE1_bm (1<<3) /* SPI Mode bit 1 mask. */ -#define SPI_MODE1_bp 3 /* SPI Mode bit 1 position. */ - -#define SPI_PRESCALER_gm 0x03 /* Prescaler group mask. */ -#define SPI_PRESCALER_gp 0 /* Prescaler group position. */ -#define SPI_PRESCALER0_bm (1<<0) /* Prescaler bit 0 mask. */ -#define SPI_PRESCALER0_bp 0 /* Prescaler bit 0 position. */ -#define SPI_PRESCALER1_bm (1<<1) /* Prescaler bit 1 mask. */ -#define SPI_PRESCALER1_bp 1 /* Prescaler bit 1 position. */ - - -/* SPI.INTCTRL bit masks and bit positions */ -#define SPI_INTLVL_gm 0x03 /* Interrupt level group mask. */ -#define SPI_INTLVL_gp 0 /* Interrupt level group position. */ -#define SPI_INTLVL0_bm (1<<0) /* Interrupt level bit 0 mask. */ -#define SPI_INTLVL0_bp 0 /* Interrupt level bit 0 position. */ -#define SPI_INTLVL1_bm (1<<1) /* Interrupt level bit 1 mask. */ -#define SPI_INTLVL1_bp 1 /* Interrupt level bit 1 position. */ - - -/* SPI.STATUS bit masks and bit positions */ -#define SPI_IF_bm 0x80 /* Interrupt Flag bit mask. */ -#define SPI_IF_bp 7 /* Interrupt Flag bit position. */ - -#define SPI_WRCOL_bm 0x40 /* Write Collision bit mask. */ -#define SPI_WRCOL_bp 6 /* Write Collision bit position. */ - - -/* IRCOM - IR Communication Module */ -/* IRCOM.CTRL bit masks and bit positions */ -#define IRCOM_EVSEL_gm 0x0F /* Event Channel Select group mask. */ -#define IRCOM_EVSEL_gp 0 /* Event Channel Select group position. */ -#define IRCOM_EVSEL0_bm (1<<0) /* Event Channel Select bit 0 mask. */ -#define IRCOM_EVSEL0_bp 0 /* Event Channel Select bit 0 position. */ -#define IRCOM_EVSEL1_bm (1<<1) /* Event Channel Select bit 1 mask. */ -#define IRCOM_EVSEL1_bp 1 /* Event Channel Select bit 1 position. */ -#define IRCOM_EVSEL2_bm (1<<2) /* Event Channel Select bit 2 mask. */ -#define IRCOM_EVSEL2_bp 2 /* Event Channel Select bit 2 position. */ -#define IRCOM_EVSEL3_bm (1<<3) /* Event Channel Select bit 3 mask. */ -#define IRCOM_EVSEL3_bp 3 /* Event Channel Select bit 3 position. */ - - -/* AES - AES Module */ -/* AES.CTRL bit masks and bit positions */ -#define AES_START_bm 0x80 /* Start/Run bit mask. */ -#define AES_START_bp 7 /* Start/Run bit position. */ - -#define AES_AUTO_bm 0x40 /* Auto Start Trigger bit mask. */ -#define AES_AUTO_bp 6 /* Auto Start Trigger bit position. */ - -#define AES_RESET_bm 0x20 /* AES Software Reset bit mask. */ -#define AES_RESET_bp 5 /* AES Software Reset bit position. */ - -#define AES_DECRYPT_bm 0x10 /* Decryption / Direction bit mask. */ -#define AES_DECRYPT_bp 4 /* Decryption / Direction bit position. */ - -#define AES_XOR_bm 0x04 /* State XOR Load Enable bit mask. */ -#define AES_XOR_bp 2 /* State XOR Load Enable bit position. */ - - -/* AES.STATUS bit masks and bit positions */ -#define AES_ERROR_bm 0x80 /* AES Error bit mask. */ -#define AES_ERROR_bp 7 /* AES Error bit position. */ - -#define AES_SRIF_bm 0x01 /* State Ready Interrupt Flag bit mask. */ -#define AES_SRIF_bp 0 /* State Ready Interrupt Flag bit position. */ - - -/* AES.INTCTRL bit masks and bit positions */ -#define AES_INTLVL_gm 0x03 /* Interrupt level group mask. */ -#define AES_INTLVL_gp 0 /* Interrupt level group position. */ -#define AES_INTLVL0_bm (1<<0) /* Interrupt level bit 0 mask. */ -#define AES_INTLVL0_bp 0 /* Interrupt level bit 0 position. */ -#define AES_INTLVL1_bm (1<<1) /* Interrupt level bit 1 mask. */ -#define AES_INTLVL1_bp 1 /* Interrupt level bit 1 position. */ - - - -// Generic Port Pins - -#define PIN0_bm 0x01 -#define PIN0_bp 0 -#define PIN1_bm 0x02 -#define PIN1_bp 1 -#define PIN2_bm 0x04 -#define PIN2_bp 2 -#define PIN3_bm 0x08 -#define PIN3_bp 3 -#define PIN4_bm 0x10 -#define PIN4_bp 4 -#define PIN5_bm 0x20 -#define PIN5_bp 5 -#define PIN6_bm 0x40 -#define PIN6_bp 6 -#define PIN7_bm 0x80 -#define PIN7_bp 7 - - -/* ========== Interrupt Vector Definitions ========== */ -/* Vector 0 is the reset vector */ - -/* OSC interrupt vectors */ -#define OSC_XOSCF_vect_num 1 -#define OSC_XOSCF_vect _VECTOR(1) /* External Oscillator Failure Interrupt (NMI) */ - -/* PORTC interrupt vectors */ -#define PORTC_INT0_vect_num 2 -#define PORTC_INT0_vect _VECTOR(2) /* External Interrupt 0 */ -#define PORTC_INT1_vect_num 3 -#define PORTC_INT1_vect _VECTOR(3) /* External Interrupt 1 */ - -/* PORTR interrupt vectors */ -#define PORTR_INT0_vect_num 4 -#define PORTR_INT0_vect _VECTOR(4) /* External Interrupt 0 */ -#define PORTR_INT1_vect_num 5 -#define PORTR_INT1_vect _VECTOR(5) /* External Interrupt 1 */ - -/* DMA interrupt vectors */ -#define DMA_CH0_vect_num 6 -#define DMA_CH0_vect _VECTOR(6) /* Channel 0 Interrupt */ -#define DMA_CH1_vect_num 7 -#define DMA_CH1_vect _VECTOR(7) /* Channel 1 Interrupt */ -#define DMA_CH2_vect_num 8 -#define DMA_CH2_vect _VECTOR(8) /* Channel 2 Interrupt */ -#define DMA_CH3_vect_num 9 -#define DMA_CH3_vect _VECTOR(9) /* Channel 3 Interrupt */ - -/* RTC interrupt vectors */ -#define RTC_OVF_vect_num 10 -#define RTC_OVF_vect _VECTOR(10) /* Overflow Interrupt */ -#define RTC_COMP_vect_num 11 -#define RTC_COMP_vect _VECTOR(11) /* Compare Interrupt */ - -/* TWIC interrupt vectors */ -#define TWIC_TWIS_vect_num 12 -#define TWIC_TWIS_vect _VECTOR(12) /* TWI Slave Interrupt */ -#define TWIC_TWIM_vect_num 13 -#define TWIC_TWIM_vect _VECTOR(13) /* TWI Master Interrupt */ - -/* TCC0 interrupt vectors */ -#define TCC0_OVF_vect_num 14 -#define TCC0_OVF_vect _VECTOR(14) /* Overflow Interrupt */ -#define TCC0_ERR_vect_num 15 -#define TCC0_ERR_vect _VECTOR(15) /* Error Interrupt */ -#define TCC0_CCA_vect_num 16 -#define TCC0_CCA_vect _VECTOR(16) /* Compare or Capture A Interrupt */ -#define TCC0_CCB_vect_num 17 -#define TCC0_CCB_vect _VECTOR(17) /* Compare or Capture B Interrupt */ -#define TCC0_CCC_vect_num 18 -#define TCC0_CCC_vect _VECTOR(18) /* Compare or Capture C Interrupt */ -#define TCC0_CCD_vect_num 19 -#define TCC0_CCD_vect _VECTOR(19) /* Compare or Capture D Interrupt */ - -/* TCC1 interrupt vectors */ -#define TCC1_OVF_vect_num 20 -#define TCC1_OVF_vect _VECTOR(20) /* Overflow Interrupt */ -#define TCC1_ERR_vect_num 21 -#define TCC1_ERR_vect _VECTOR(21) /* Error Interrupt */ -#define TCC1_CCA_vect_num 22 -#define TCC1_CCA_vect _VECTOR(22) /* Compare or Capture A Interrupt */ -#define TCC1_CCB_vect_num 23 -#define TCC1_CCB_vect _VECTOR(23) /* Compare or Capture B Interrupt */ - -/* SPIC interrupt vectors */ -#define SPIC_INT_vect_num 24 -#define SPIC_INT_vect _VECTOR(24) /* SPI Interrupt */ - -/* USARTC0 interrupt vectors */ -#define USARTC0_RXC_vect_num 25 -#define USARTC0_RXC_vect _VECTOR(25) /* Reception Complete Interrupt */ -#define USARTC0_DRE_vect_num 26 -#define USARTC0_DRE_vect _VECTOR(26) /* Data Register Empty Interrupt */ -#define USARTC0_TXC_vect_num 27 -#define USARTC0_TXC_vect _VECTOR(27) /* Transmission Complete Interrupt */ - -/* USARTC1 interrupt vectors */ -#define USARTC1_RXC_vect_num 28 -#define USARTC1_RXC_vect _VECTOR(28) /* Reception Complete Interrupt */ -#define USARTC1_DRE_vect_num 29 -#define USARTC1_DRE_vect _VECTOR(29) /* Data Register Empty Interrupt */ -#define USARTC1_TXC_vect_num 30 -#define USARTC1_TXC_vect _VECTOR(30) /* Transmission Complete Interrupt */ - -/* AES interrupt vectors */ -#define AES_INT_vect_num 31 -#define AES_INT_vect _VECTOR(31) /* AES Interrupt */ - -/* NVM interrupt vectors */ -#define NVM_EE_vect_num 32 -#define NVM_EE_vect _VECTOR(32) /* EE Interrupt */ -#define NVM_SPM_vect_num 33 -#define NVM_SPM_vect _VECTOR(33) /* SPM Interrupt */ - -/* PORTB interrupt vectors */ -#define PORTB_INT0_vect_num 34 -#define PORTB_INT0_vect _VECTOR(34) /* External Interrupt 0 */ -#define PORTB_INT1_vect_num 35 -#define PORTB_INT1_vect _VECTOR(35) /* External Interrupt 1 */ - -/* ACB interrupt vectors */ -#define ACB_AC0_vect_num 36 -#define ACB_AC0_vect _VECTOR(36) /* AC0 Interrupt */ -#define ACB_AC1_vect_num 37 -#define ACB_AC1_vect _VECTOR(37) /* AC1 Interrupt */ -#define ACB_ACW_vect_num 38 -#define ACB_ACW_vect _VECTOR(38) /* ACW Window Mode Interrupt */ - -/* ADCB interrupt vectors */ -#define ADCB_CH0_vect_num 39 -#define ADCB_CH0_vect _VECTOR(39) /* Interrupt 0 */ -#define ADCB_CH1_vect_num 40 -#define ADCB_CH1_vect _VECTOR(40) /* Interrupt 1 */ -#define ADCB_CH2_vect_num 41 -#define ADCB_CH2_vect _VECTOR(41) /* Interrupt 2 */ -#define ADCB_CH3_vect_num 42 -#define ADCB_CH3_vect _VECTOR(42) /* Interrupt 3 */ - -/* PORTE interrupt vectors */ -#define PORTE_INT0_vect_num 43 -#define PORTE_INT0_vect _VECTOR(43) /* External Interrupt 0 */ -#define PORTE_INT1_vect_num 44 -#define PORTE_INT1_vect _VECTOR(44) /* External Interrupt 1 */ - -/* TWIE interrupt vectors */ -#define TWIE_TWIS_vect_num 45 -#define TWIE_TWIS_vect _VECTOR(45) /* TWI Slave Interrupt */ -#define TWIE_TWIM_vect_num 46 -#define TWIE_TWIM_vect _VECTOR(46) /* TWI Master Interrupt */ - -/* TCE0 interrupt vectors */ -#define TCE0_OVF_vect_num 47 -#define TCE0_OVF_vect _VECTOR(47) /* Overflow Interrupt */ -#define TCE0_ERR_vect_num 48 -#define TCE0_ERR_vect _VECTOR(48) /* Error Interrupt */ -#define TCE0_CCA_vect_num 49 -#define TCE0_CCA_vect _VECTOR(49) /* Compare or Capture A Interrupt */ -#define TCE0_CCB_vect_num 50 -#define TCE0_CCB_vect _VECTOR(50) /* Compare or Capture B Interrupt */ -#define TCE0_CCC_vect_num 51 -#define TCE0_CCC_vect _VECTOR(51) /* Compare or Capture C Interrupt */ -#define TCE0_CCD_vect_num 52 -#define TCE0_CCD_vect _VECTOR(52) /* Compare or Capture D Interrupt */ - -/* TCE1 interrupt vectors */ -#define TCE1_OVF_vect_num 53 -#define TCE1_OVF_vect _VECTOR(53) /* Overflow Interrupt */ -#define TCE1_ERR_vect_num 54 -#define TCE1_ERR_vect _VECTOR(54) /* Error Interrupt */ -#define TCE1_CCA_vect_num 55 -#define TCE1_CCA_vect _VECTOR(55) /* Compare or Capture A Interrupt */ -#define TCE1_CCB_vect_num 56 -#define TCE1_CCB_vect _VECTOR(56) /* Compare or Capture B Interrupt */ - -/* SPIE interrupt vectors */ -#define SPIE_INT_vect_num 57 -#define SPIE_INT_vect _VECTOR(57) /* SPI Interrupt */ - -/* USARTE0 interrupt vectors */ -#define USARTE0_RXC_vect_num 58 -#define USARTE0_RXC_vect _VECTOR(58) /* Reception Complete Interrupt */ -#define USARTE0_DRE_vect_num 59 -#define USARTE0_DRE_vect _VECTOR(59) /* Data Register Empty Interrupt */ -#define USARTE0_TXC_vect_num 60 -#define USARTE0_TXC_vect _VECTOR(60) /* Transmission Complete Interrupt */ - -/* USARTE1 interrupt vectors */ -#define USARTE1_RXC_vect_num 61 -#define USARTE1_RXC_vect _VECTOR(61) /* Reception Complete Interrupt */ -#define USARTE1_DRE_vect_num 62 -#define USARTE1_DRE_vect _VECTOR(62) /* Data Register Empty Interrupt */ -#define USARTE1_TXC_vect_num 63 -#define USARTE1_TXC_vect _VECTOR(63) /* Transmission Complete Interrupt */ - -/* PORTD interrupt vectors */ -#define PORTD_INT0_vect_num 64 -#define PORTD_INT0_vect _VECTOR(64) /* External Interrupt 0 */ -#define PORTD_INT1_vect_num 65 -#define PORTD_INT1_vect _VECTOR(65) /* External Interrupt 1 */ - -/* PORTA interrupt vectors */ -#define PORTA_INT0_vect_num 66 -#define PORTA_INT0_vect _VECTOR(66) /* External Interrupt 0 */ -#define PORTA_INT1_vect_num 67 -#define PORTA_INT1_vect _VECTOR(67) /* External Interrupt 1 */ - -/* ACA interrupt vectors */ -#define ACA_AC0_vect_num 68 -#define ACA_AC0_vect _VECTOR(68) /* AC0 Interrupt */ -#define ACA_AC1_vect_num 69 -#define ACA_AC1_vect _VECTOR(69) /* AC1 Interrupt */ -#define ACA_ACW_vect_num 70 -#define ACA_ACW_vect _VECTOR(70) /* ACW Window Mode Interrupt */ - -/* ADCA interrupt vectors */ -#define ADCA_CH0_vect_num 71 -#define ADCA_CH0_vect _VECTOR(71) /* Interrupt 0 */ -#define ADCA_CH1_vect_num 72 -#define ADCA_CH1_vect _VECTOR(72) /* Interrupt 1 */ -#define ADCA_CH2_vect_num 73 -#define ADCA_CH2_vect _VECTOR(73) /* Interrupt 2 */ -#define ADCA_CH3_vect_num 74 -#define ADCA_CH3_vect _VECTOR(74) /* Interrupt 3 */ - -/* TCD0 interrupt vectors */ -#define TCD0_OVF_vect_num 77 -#define TCD0_OVF_vect _VECTOR(77) /* Overflow Interrupt */ -#define TCD0_ERR_vect_num 78 -#define TCD0_ERR_vect _VECTOR(78) /* Error Interrupt */ -#define TCD0_CCA_vect_num 79 -#define TCD0_CCA_vect _VECTOR(79) /* Compare or Capture A Interrupt */ -#define TCD0_CCB_vect_num 80 -#define TCD0_CCB_vect _VECTOR(80) /* Compare or Capture B Interrupt */ -#define TCD0_CCC_vect_num 81 -#define TCD0_CCC_vect _VECTOR(81) /* Compare or Capture C Interrupt */ -#define TCD0_CCD_vect_num 82 -#define TCD0_CCD_vect _VECTOR(82) /* Compare or Capture D Interrupt */ - -/* TCD1 interrupt vectors */ -#define TCD1_OVF_vect_num 83 -#define TCD1_OVF_vect _VECTOR(83) /* Overflow Interrupt */ -#define TCD1_ERR_vect_num 84 -#define TCD1_ERR_vect _VECTOR(84) /* Error Interrupt */ -#define TCD1_CCA_vect_num 85 -#define TCD1_CCA_vect _VECTOR(85) /* Compare or Capture A Interrupt */ -#define TCD1_CCB_vect_num 86 -#define TCD1_CCB_vect _VECTOR(86) /* Compare or Capture B Interrupt */ - -/* SPID interrupt vectors */ -#define SPID_INT_vect_num 87 -#define SPID_INT_vect _VECTOR(87) /* SPI Interrupt */ - -/* USARTD0 interrupt vectors */ -#define USARTD0_RXC_vect_num 88 -#define USARTD0_RXC_vect _VECTOR(88) /* Reception Complete Interrupt */ -#define USARTD0_DRE_vect_num 89 -#define USARTD0_DRE_vect _VECTOR(89) /* Data Register Empty Interrupt */ -#define USARTD0_TXC_vect_num 90 -#define USARTD0_TXC_vect _VECTOR(90) /* Transmission Complete Interrupt */ - -/* USARTD1 interrupt vectors */ -#define USARTD1_RXC_vect_num 91 -#define USARTD1_RXC_vect _VECTOR(91) /* Reception Complete Interrupt */ -#define USARTD1_DRE_vect_num 92 -#define USARTD1_DRE_vect _VECTOR(92) /* Data Register Empty Interrupt */ -#define USARTD1_TXC_vect_num 93 -#define USARTD1_TXC_vect _VECTOR(93) /* Transmission Complete Interrupt */ - -/* PORTF interrupt vectors */ -#define PORTF_INT0_vect_num 104 -#define PORTF_INT0_vect _VECTOR(104) /* External Interrupt 0 */ -#define PORTF_INT1_vect_num 105 -#define PORTF_INT1_vect _VECTOR(105) /* External Interrupt 1 */ - -/* TCF0 interrupt vectors */ -#define TCF0_OVF_vect_num 108 -#define TCF0_OVF_vect _VECTOR(108) /* Overflow Interrupt */ -#define TCF0_ERR_vect_num 109 -#define TCF0_ERR_vect _VECTOR(109) /* Error Interrupt */ -#define TCF0_CCA_vect_num 110 -#define TCF0_CCA_vect _VECTOR(110) /* Compare or Capture A Interrupt */ -#define TCF0_CCB_vect_num 111 -#define TCF0_CCB_vect _VECTOR(111) /* Compare or Capture B Interrupt */ -#define TCF0_CCC_vect_num 112 -#define TCF0_CCC_vect _VECTOR(112) /* Compare or Capture C Interrupt */ -#define TCF0_CCD_vect_num 113 -#define TCF0_CCD_vect _VECTOR(113) /* Compare or Capture D Interrupt */ - -/* USARTF0 interrupt vectors */ -#define USARTF0_RXC_vect_num 119 -#define USARTF0_RXC_vect _VECTOR(119) /* Reception Complete Interrupt */ -#define USARTF0_DRE_vect_num 120 -#define USARTF0_DRE_vect _VECTOR(120) /* Data Register Empty Interrupt */ -#define USARTF0_TXC_vect_num 121 -#define USARTF0_TXC_vect _VECTOR(121) /* Transmission Complete Interrupt */ - - -#define _VECTOR_SIZE 4 /* Size of individual vector. */ -#define _VECTORS_SIZE (122 * _VECTOR_SIZE) - - -/* ========== Constants ========== */ - -#define PROGMEM_START (0x0000) -#define PROGMEM_SIZE (139264) -#define PROGMEM_END (PROGMEM_START + PROGMEM_SIZE - 1) - -#define APP_SECTION_START (0x0000) -#define APP_SECTION_SIZE (131072) -#define APP_SECTION_END (APP_SECTION_START + APP_SECTION_SIZE - 1) - -#define APPTABLE_SECTION_START (0x1E000) -#define APPTABLE_SECTION_SIZE (8192) -#define APPTABLE_SECTION_END (APPTABLE_SECTION_START + APPTABLE_SECTION_SIZE - 1) - -#define BOOT_SECTION_START (0x20000) -#define BOOT_SECTION_SIZE (8192) -#define BOOT_SECTION_END (BOOT_SECTION_START + BOOT_SECTION_SIZE - 1) - -#define DATAMEM_START (0x0000) -#define DATAMEM_SIZE (16384) -#define DATAMEM_END (DATAMEM_START + DATAMEM_SIZE - 1) - -#define IO_START (0x0000) -#define IO_SIZE (4096) -#define IO_END (IO_START + IO_SIZE - 1) - -#define MAPPED_EEPROM_START (0x1000) -#define MAPPED_EEPROM_SIZE (2048) -#define MAPPED_EEPROM_END (MAPPED_EEPROM_START + MAPPED_EEPROM_SIZE - 1) - -#define INTERNAL_SRAM_START (0x2000) -#define INTERNAL_SRAM_SIZE (8192) -#define INTERNAL_SRAM_END (INTERNAL_SRAM_START + INTERNAL_SRAM_SIZE - 1) - -#define EEPROM_START (0x0000) -#define EEPROM_SIZE (2048) -#define EEPROM_END (EEPROM_START + EEPROM_SIZE - 1) - -#define FUSE_START (0x0000) -#define FUSE_SIZE (6) -#define FUSE_END (FUSE_START + FUSE_SIZE - 1) - -#define LOCKBIT_START (0x0000) -#define LOCKBIT_SIZE (1) -#define LOCKBIT_END (LOCKBIT_START + LOCKBIT_SIZE - 1) - -#define SIGNATURES_START (0x0000) -#define SIGNATURES_SIZE (3) -#define SIGNATURES_END (SIGNATURES_START + SIGNATURES_SIZE - 1) - -#define USER_SIGNATURES_START (0x0000) -#define USER_SIGNATURES_SIZE (512) -#define USER_SIGNATURES_END (USER_SIGNATURES_START + USER_SIGNATURES_SIZE - 1) - -#define PROD_SIGNATURES_START (0x0000) -#define PROD_SIGNATURES_SIZE (52) -#define PROD_SIGNATURES_END (PROD_SIGNATURES_START + PROD_SIGNATURES_SIZE - 1) - -#define FLASHEND PROGMEM_END -#define SPM_PAGESIZE PROGMEM_PAGE_SIZE -#define RAMSTART INTERNAL_SRAM_START -#define RAMSIZE INTERNAL_SRAM_SIZE -#define RAMEND INTERNAL_SRAM_END -#define XRAMSTART EXTERNAL_SRAM_START -#define XRAMSIZE EXTERNAL_SRAM_SIZE -#define XRAMEND INTERNAL_SRAM_END -#define E2END EEPROM_END -#define E2PAGESIZE EEPROM_PAGE_SIZE - - -/* ========== Fuses ========== */ -#define FUSE_MEMORY_SIZE 6 - -/* Fuse Byte 0 */ -#define FUSE_JTAGUSERID0 ~_BV(0) /* JTAG User ID Bit 0 */ -#define FUSE_JTAGUSERID1 ~_BV(1) /* JTAG User ID Bit 1 */ -#define FUSE_JTAGUSERID2 ~_BV(2) /* JTAG User ID Bit 2 */ -#define FUSE_JTAGUSERID3 ~_BV(3) /* JTAG User ID Bit 3 */ -#define FUSE_JTAGUSERID4 ~_BV(4) /* JTAG User ID Bit 4 */ -#define FUSE_JTAGUSERID5 ~_BV(5) /* JTAG User ID Bit 5 */ -#define FUSE_JTAGUSERID6 ~_BV(6) /* JTAG User ID Bit 6 */ -#define FUSE_JTAGUSERID7 ~_BV(7) /* JTAG User ID Bit 7 */ -#define FUSE0_DEFAULT (0xFF) - -/* Fuse Byte 1 */ -#define FUSE_WDP0 ~_BV(0) /* Watchdog Timeout Period Bit 0 */ -#define FUSE_WDP1 ~_BV(1) /* Watchdog Timeout Period Bit 1 */ -#define FUSE_WDP2 ~_BV(2) /* Watchdog Timeout Period Bit 2 */ -#define FUSE_WDP3 ~_BV(3) /* Watchdog Timeout Period Bit 3 */ -#define FUSE_WDWP0 ~_BV(4) /* Watchdog Window Timeout Period Bit 0 */ -#define FUSE_WDWP1 ~_BV(5) /* Watchdog Window Timeout Period Bit 1 */ -#define FUSE_WDWP2 ~_BV(6) /* Watchdog Window Timeout Period Bit 2 */ -#define FUSE_WDWP3 ~_BV(7) /* Watchdog Window Timeout Period Bit 3 */ -#define FUSE1_DEFAULT (0xFF) - -/* Fuse Byte 2 */ -#define FUSE_BODPD0 ~_BV(0) /* BOD Operation in Power-Down Mode Bit 0 */ -#define FUSE_BODPD1 ~_BV(1) /* BOD Operation in Power-Down Mode Bit 1 */ -#define FUSE_BODACT0 ~_BV(2) /* BOD Operation in Active Mode Bit 0 */ -#define FUSE_BODACT1 ~_BV(3) /* BOD Operation in Active Mode Bit 1 */ -#define FUSE_BOOTRST ~_BV(6) /* Boot Loader Section Reset Vector */ -#define FUSE_DVSDON ~_BV(7) /* Spike Detector Enable */ -#define FUSE2_DEFAULT (0xFF) - -/* Fuse Byte 3 Reserved */ - -/* Fuse Byte 4 */ -#define FUSE_JTAGEN ~_BV(0) /* JTAG Interface Enable */ -#define FUSE_WDLOCK ~_BV(1) /* Watchdog Timer Lock */ -#define FUSE_SUT0 ~_BV(2) /* Start-up Time Bit 0 */ -#define FUSE_SUT1 ~_BV(3) /* Start-up Time Bit 1 */ -#define FUSE4_DEFAULT (0xFF) - -/* Fuse Byte 5 */ -#define FUSE_BODLVL0 ~_BV(0) /* Brown Out Detection Voltage Level Bit 0 */ -#define FUSE_BODLVL1 ~_BV(1) /* Brown Out Detection Voltage Level Bit 1 */ -#define FUSE_BODLVL2 ~_BV(2) /* Brown Out Detection Voltage Level Bit 2 */ -#define FUSE_EESAVE ~_BV(3) /* Preserve EEPROM Through Chip Erase */ -#define FUSE5_DEFAULT (0xFF) - - -/* ========== Lock Bits ========== */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_APPLICATION_TABLE_BITS_EXIST -#define __BOOT_LOCK_APPLICATION_BITS_EXIST -#define __BOOT_LOCK_BOOT_BITS_EXIST - - -/* ========== Signature ========== */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x97 -#define SIGNATURE_2 0x42 - - -#endif /* _AVR_ATxmega128A3_H_ */ - diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iox256a3.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iox256a3.h deleted file mode 100644 index b760f3168..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iox256a3.h +++ /dev/null @@ -1,6852 +0,0 @@ -/* Copyright (c) 2008 Atmel Corporation - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iox256a3.h,v 1.1.2.4 2008/11/03 04:13:16 arcanum Exp $ */ - -/* avr/iox256a3.h - definitions for ATxmega256A3 */ - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iox256a3.h" -#else -# error "Attempt to include more than one file." -#endif - - -#ifndef _AVR_ATxmega256A3_H_ -#define _AVR_ATxmega256A3_H_ 1 - - -/* Ungrouped common registers */ -#define GPIO0 _SFR_MEM8(0x0000) /* General Purpose IO Register 0 */ -#define GPIO1 _SFR_MEM8(0x0001) /* General Purpose IO Register 1 */ -#define GPIO2 _SFR_MEM8(0x0002) /* General Purpose IO Register 2 */ -#define GPIO3 _SFR_MEM8(0x0003) /* General Purpose IO Register 3 */ -#define GPIO4 _SFR_MEM8(0x0004) /* General Purpose IO Register 4 */ -#define GPIO5 _SFR_MEM8(0x0005) /* General Purpose IO Register 5 */ -#define GPIO6 _SFR_MEM8(0x0006) /* General Purpose IO Register 6 */ -#define GPIO7 _SFR_MEM8(0x0007) /* General Purpose IO Register 7 */ -#define GPIO8 _SFR_MEM8(0x0008) /* General Purpose IO Register 8 */ -#define GPIO9 _SFR_MEM8(0x0009) /* General Purpose IO Register 9 */ -#define GPIOA _SFR_MEM8(0x000A) /* General Purpose IO Register 10 */ -#define GPIOB _SFR_MEM8(0x000B) /* General Purpose IO Register 11 */ -#define GPIOC _SFR_MEM8(0x000C) /* General Purpose IO Register 12 */ -#define GPIOD _SFR_MEM8(0x000D) /* General Purpose IO Register 13 */ -#define GPIOE _SFR_MEM8(0x000E) /* General Purpose IO Register 14 */ -#define GPIOF _SFR_MEM8(0x000F) /* General Purpose IO Register 15 */ - -#define CCP _SFR_MEM8(0x0034) /* Configuration Change Protection */ -#define RAMPD _SFR_MEM8(0x0038) /* Ramp D */ -#define RAMPX _SFR_MEM8(0x0039) /* Ramp X */ -#define RAMPY _SFR_MEM8(0x003A) /* Ramp Y */ -#define RAMPZ _SFR_MEM8(0x003B) /* Ramp Z */ -#define EIND _SFR_MEM8(0x003C) /* Extended Indirect Jump */ -#define SPL _SFR_MEM8(0x003D) /* Stack Pointer Low */ -#define SPH _SFR_MEM8(0x003E) /* Stack Pointer High */ -#define SREG _SFR_MEM8(0x003F) /* Status Register */ - - -/* C Language Only */ -#if !defined (__ASSEMBLER__) - -#include - -typedef volatile uint8_t register8_t; -typedef volatile uint16_t register16_t; -typedef volatile uint32_t register32_t; - - -#ifdef _WORDREGISTER -#undef _WORDREGISTER -#endif -#define _WORDREGISTER(regname) \ - union \ - { \ - register16_t regname; \ - struct \ - { \ - register8_t regname ## L; \ - register8_t regname ## H; \ - }; \ - } - -#ifdef _DWORDREGISTER -#undef _DWORDREGISTER -#endif -#define _DWORDREGISTER(regname) \ - union \ - { \ - register32_t regname; \ - struct \ - { \ - register8_t regname ## 0; \ - register8_t regname ## 1; \ - register8_t regname ## 2; \ - register8_t regname ## 3; \ - }; \ - } - - -/* -========================================================================== -IO Module Structures -========================================================================== -*/ - - -/* --------------------------------------------------------------------------- -XOCD - On-Chip Debug System --------------------------------------------------------------------------- -*/ - -/* On-Chip Debug System */ -typedef struct OCD_struct -{ - register8_t OCDR0; /* OCD Register 0 */ - register8_t OCDR1; /* OCD Register 1 */ -} OCD_t; - - -/* CCP signatures */ -typedef enum CCP_enum -{ - CCP_SPM_gc = (0x9D<<0), /* SPM Instruction Protection */ - CCP_IOREG_gc = (0xD8<<0), /* IO Register Protection */ -} CCP_t; - - -/* --------------------------------------------------------------------------- -CLK - Clock System --------------------------------------------------------------------------- -*/ - -/* Clock System */ -typedef struct CLK_struct -{ - register8_t CTRL; /* Control Register */ - register8_t PSCTRL; /* Prescaler Control Register */ - register8_t LOCK; /* Lock register */ - register8_t RTCCTRL; /* RTC Control Register */ -} CLK_t; - -/* --------------------------------------------------------------------------- -CLK - Clock System --------------------------------------------------------------------------- -*/ - -/* Power Reduction */ -typedef struct PR_struct -{ - register8_t PR; /* General Power Reduction */ - register8_t PRPA; /* Power Reduction Port A */ - register8_t PRPB; /* Power Reduction Port B */ - register8_t PRPC; /* Power Reduction Port C */ - register8_t PRPD; /* Power Reduction Port D */ - register8_t PRPE; /* Power Reduction Port E */ - register8_t PRPF; /* Power Reduction Port F */ -} PR_t; - -/* System Clock Selection */ -typedef enum CLK_SCLKSEL_enum -{ - CLK_SCLKSEL_RC2M_gc = (0x00<<0), /* Internal 2MHz RC Oscillator */ - CLK_SCLKSEL_RC32M_gc = (0x01<<0), /* Internal 32MHz RC Oscillator */ - CLK_SCLKSEL_RC32K_gc = (0x02<<0), /* Internal 32kHz RC Oscillator */ - CLK_SCLKSEL_XOSC_gc = (0x03<<0), /* External Crystal Oscillator or Clock */ - CLK_SCLKSEL_PLL_gc = (0x04<<0), /* Phase Locked Loop */ -} CLK_SCLKSEL_t; - -/* Prescaler A Division Factor */ -typedef enum CLK_PSADIV_enum -{ - CLK_PSADIV_1_gc = (0x00<<2), /* Divide by 1 */ - CLK_PSADIV_2_gc = (0x01<<2), /* Divide by 2 */ - CLK_PSADIV_4_gc = (0x03<<2), /* Divide by 4 */ - CLK_PSADIV_8_gc = (0x05<<2), /* Divide by 8 */ - CLK_PSADIV_16_gc = (0x07<<2), /* Divide by 16 */ - CLK_PSADIV_32_gc = (0x09<<2), /* Divide by 32 */ - CLK_PSADIV_64_gc = (0x0B<<2), /* Divide by 64 */ - CLK_PSADIV_128_gc = (0x0D<<2), /* Divide by 128 */ - CLK_PSADIV_256_gc = (0x0F<<2), /* Divide by 256 */ - CLK_PSADIV_512_gc = (0x11<<2), /* Divide by 512 */ -} CLK_PSADIV_t; - -/* Prescaler B and C Division Factor */ -typedef enum CLK_PSBCDIV_enum -{ - CLK_PSBCDIV_1_1_gc = (0x00<<0), /* Divide B by 1 and C by 1 */ - CLK_PSBCDIV_1_2_gc = (0x01<<0), /* Divide B by 1 and C by 2 */ - CLK_PSBCDIV_4_1_gc = (0x02<<0), /* Divide B by 4 and C by 1 */ - CLK_PSBCDIV_2_2_gc = (0x03<<0), /* Divide B by 2 and C by 2 */ -} CLK_PSBCDIV_t; - -/* RTC Clock Source */ -typedef enum CLK_RTCSRC_enum -{ - CLK_RTCSRC_ULP_gc = (0x00<<1), /* 1kHz from internal 32kHz ULP */ - CLK_RTCSRC_TOSC_gc = (0x01<<1), /* 1kHz from 32kHz crystal oscillator on TOSC */ - CLK_RTCSRC_RCOSC_gc = (0x02<<1), /* 1kHz from internal 32kHz RC oscillator */ - CLK_RTCSRC_TOSC32_gc = (0x05<<1), /* 32kHz from 32kHz crystal oscillator on TOSC */ -} CLK_RTCSRC_t; - - -/* --------------------------------------------------------------------------- -SLEEP - Sleep Controller --------------------------------------------------------------------------- -*/ - -/* Sleep Controller */ -typedef struct SLEEP_struct -{ - register8_t CTRL; /* Control Register */ -} SLEEP_t; - -/* Sleep Mode */ -typedef enum SLEEP_SMODE_enum -{ - SLEEP_SMODE_IDLE_gc = (0x00<<1), /* Idle mode */ - SLEEP_SMODE_PDOWN_gc = (0x02<<1), /* Power-down Mode */ - SLEEP_SMODE_PSAVE_gc = (0x03<<1), /* Power-save Mode */ - SLEEP_SMODE_STDBY_gc = (0x06<<1), /* Standby Mode */ - SLEEP_SMODE_ESTDBY_gc = (0x07<<1), /* Extended Standby Mode */ -} SLEEP_SMODE_t; - - -/* --------------------------------------------------------------------------- -OSC - Oscillator --------------------------------------------------------------------------- -*/ - -/* Oscillator */ -typedef struct OSC_struct -{ - register8_t CTRL; /* Control Register */ - register8_t STATUS; /* Status Register */ - register8_t XOSCCTRL; /* External Oscillator Control Register */ - register8_t XOSCFAIL; /* External Oscillator Failure Detection Register */ - register8_t RC32KCAL; /* 32kHz Internal Oscillator Calibration Register */ - register8_t PLLCTRL; /* PLL Control REgister */ - register8_t DFLLCTRL; /* DFLL Control Register */ -} OSC_t; - -/* Oscillator Frequency Range */ -typedef enum OSC_FRQRANGE_enum -{ - OSC_FRQRANGE_04TO2_gc = (0x00<<6), /* 0.4 - 2 MHz */ - OSC_FRQRANGE_2TO9_gc = (0x01<<6), /* 2 - 9 MHz */ - OSC_FRQRANGE_9TO12_gc = (0x02<<6), /* 9 - 12 MHz */ - OSC_FRQRANGE_12TO16_gc = (0x03<<6), /* 12 - 16 MHz */ -} OSC_FRQRANGE_t; - -/* External Oscillator Selection and Startup Time */ -typedef enum OSC_XOSCSEL_enum -{ - OSC_XOSCSEL_EXTCLK_gc = (0x00<<0), /* External Clock - 6 CLK */ - OSC_XOSCSEL_32KHz_gc = (0x02<<0), /* 32kHz TOSC - 32K CLK */ - OSC_XOSCSEL_XTAL_256CLK_gc = (0x03<<0), /* 0.4-16MHz XTAL - 256 CLK */ - OSC_XOSCSEL_XTAL_1KCLK_gc = (0x07<<0), /* 0.4-16MHz XTAL - 1K CLK */ - OSC_XOSCSEL_XTAL_16KCLK_gc = (0x0B<<0), /* 0.4-16MHz XTAL - 16K CLK */ -} OSC_XOSCSEL_t; - -/* PLL Clock Source */ -typedef enum OSC_PLLSRC_enum -{ - OSC_PLLSRC_RC2M_gc = (0x00<<6), /* Internal 2MHz RC Oscillator */ - OSC_PLLSRC_RC32M_gc = (0x02<<6), /* Internal 32MHz RC Oscillator */ - OSC_PLLSRC_XOSC_gc = (0x03<<6), /* External Oscillator */ -} OSC_PLLSRC_t; - - -/* --------------------------------------------------------------------------- -DFLL - DFLL --------------------------------------------------------------------------- -*/ - -/* DFLL */ -typedef struct DFLL_struct -{ - register8_t CTRL; /* Control Register */ - register8_t reserved_0x01; - register8_t CALA; /* Calibration Register A */ - register8_t CALB; /* Calibration Register B */ - register8_t OSCCNT0; /* Oscillator Counter Register 0 */ - register8_t OSCCNT1; /* Oscillator Counter Register 1 */ - register8_t OSCCNT2; /* Oscillator Counter Register 2 */ - register8_t reserved_0x07; -} DFLL_t; - - -/* --------------------------------------------------------------------------- -RST - Reset --------------------------------------------------------------------------- -*/ - -/* Reset */ -typedef struct RST_struct -{ - register8_t STATUS; /* Status Register */ - register8_t CTRL; /* Control Register */ -} RST_t; - - -/* --------------------------------------------------------------------------- -WDT - Watch-Dog Timer --------------------------------------------------------------------------- -*/ - -/* Watch-Dog Timer */ -typedef struct WDT_struct -{ - register8_t CTRL; /* Control */ - register8_t WINCTRL; /* Windowed Mode Control */ - register8_t STATUS; /* Status */ -} WDT_t; - -/* Period setting */ -typedef enum WDT_PER_enum -{ - WDT_PER_8CLK_gc = (0x00<<2), /* 8 cycles (8ms @ 3.3V) */ - WDT_PER_16CLK_gc = (0x01<<2), /* 16 cycles (16ms @ 3.3V) */ - WDT_PER_32CLK_gc = (0x02<<2), /* 32 cycles (32ms @ 3.3V) */ - WDT_PER_64CLK_gc = (0x03<<2), /* 64 cycles (64ms @ 3.3V) */ - WDT_PER_128CLK_gc = (0x04<<2), /* 128 cycles (0.125s @ 3.3V) */ - WDT_PER_256CLK_gc = (0x05<<2), /* 256 cycles (0.25s @ 3.3V) */ - WDT_PER_512CLK_gc = (0x06<<2), /* 512 cycles (0.5s @ 3.3V) */ - WDT_PER_1KCLK_gc = (0x07<<2), /* 1K cycles (1s @ 3.3V) */ - WDT_PER_2KCLK_gc = (0x08<<2), /* 2K cycles (2s @ 3.3V) */ - WDT_PER_4KCLK_gc = (0x09<<2), /* 4K cycles (4s @ 3.3V) */ - WDT_PER_8KCLK_gc = (0x0A<<2), /* 8K cycles (8s @ 3.3V) */ -} WDT_PER_t; - -/* Closed window period */ -typedef enum WDT_WPER_enum -{ - WDT_WPER_8CLK_gc = (0x00<<2), /* 8 cycles (8ms @ 3.3V) */ - WDT_WPER_16CLK_gc = (0x01<<2), /* 16 cycles (16ms @ 3.3V) */ - WDT_WPER_32CLK_gc = (0x02<<2), /* 32 cycles (32ms @ 3.3V) */ - WDT_WPER_64CLK_gc = (0x03<<2), /* 64 cycles (64ms @ 3.3V) */ - WDT_WPER_128CLK_gc = (0x04<<2), /* 128 cycles (0.125s @ 3.3V) */ - WDT_WPER_256CLK_gc = (0x05<<2), /* 256 cycles (0.25s @ 3.3V) */ - WDT_WPER_512CLK_gc = (0x06<<2), /* 512 cycles (0.5s @ 3.3V) */ - WDT_WPER_1KCLK_gc = (0x07<<2), /* 1K cycles (1s @ 3.3V) */ - WDT_WPER_2KCLK_gc = (0x08<<2), /* 2K cycles (2s @ 3.3V) */ - WDT_WPER_4KCLK_gc = (0x09<<2), /* 4K cycles (4s @ 3.3V) */ - WDT_WPER_8KCLK_gc = (0x0A<<2), /* 8K cycles (8s @ 3.3V) */ -} WDT_WPER_t; - - -/* --------------------------------------------------------------------------- -MCU - MCU Control --------------------------------------------------------------------------- -*/ - -/* MCU Control */ -typedef struct MCU_struct -{ - register8_t DEVID0; /* Device ID byte 0 */ - register8_t DEVID1; /* Device ID byte 1 */ - register8_t DEVID2; /* Device ID byte 2 */ - register8_t REVID; /* Revision ID */ - register8_t JTAGUID; /* JTAG User ID */ - register8_t reserved_0x05; - register8_t MCUCR; /* MCU Control */ - register8_t reserved_0x07; - register8_t EVSYSLOCK; /* Event System Lock */ - register8_t AWEXLOCK; /* AWEX Lock */ - register8_t reserved_0x0A; - register8_t reserved_0x0B; -} MCU_t; - - -/* --------------------------------------------------------------------------- -PMIC - Programmable Multi-level Interrupt Controller --------------------------------------------------------------------------- -*/ - -/* Programmable Multi-level Interrupt Controller */ -typedef struct PMIC_struct -{ - register8_t STATUS; /* Status Register */ - register8_t INTPRI; /* Interrupt Priority */ - register8_t CTRL; /* Control Register */ -} PMIC_t; - - -/* --------------------------------------------------------------------------- -DMA - DMA Controller --------------------------------------------------------------------------- -*/ - -/* DMA Channel */ -typedef struct DMA_CH_struct -{ - register8_t CTRLA; /* Channel Control */ - register8_t CTRLB; /* Channel Control */ - register8_t ADDRCTRL; /* Address Control */ - register8_t TRIGSRC; /* Channel Trigger Source */ - _WORDREGISTER(TRFCNT); /* Channel Block Transfer Count */ - register8_t REPCNT; /* Channel Repeat Count */ - register8_t reserved_0x07; - register8_t SRCADDR0; /* Channel Source Address 0 */ - register8_t SRCADDR1; /* Channel Source Address 1 */ - register8_t SRCADDR2; /* Channel Source Address 2 */ - register8_t reserved_0x0B; - register8_t DESTADDR0; /* Channel Destination Address 0 */ - register8_t DESTADDR1; /* Channel Destination Address 1 */ - register8_t DESTADDR2; /* Channel Destination Address 2 */ - register8_t reserved_0x0F; -} DMA_CH_t; - -/* --------------------------------------------------------------------------- -DMA - DMA Controller --------------------------------------------------------------------------- -*/ - -/* DMA Controller */ -typedef struct DMA_struct -{ - register8_t CTRL; /* Control */ - register8_t reserved_0x01; - register8_t reserved_0x02; - register8_t INTFLAGS; /* Transfer Interrupt Status */ - register8_t STATUS; /* Status */ - register8_t reserved_0x05; - _WORDREGISTER(TEMP); /* Temporary Register For 16/24-bit Access */ - register8_t reserved_0x08; - register8_t reserved_0x09; - register8_t reserved_0x0A; - register8_t reserved_0x0B; - register8_t reserved_0x0C; - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t reserved_0x0F; - DMA_CH_t CH0; /* DMA Channel 0 */ - DMA_CH_t CH1; /* DMA Channel 1 */ - DMA_CH_t CH2; /* DMA Channel 2 */ - DMA_CH_t CH3; /* DMA Channel 3 */ -} DMA_t; - -/* Burst mode */ -typedef enum DMA_CH_BURSTLEN_enum -{ - DMA_CH_BURSTLEN_1BYTE_gc = (0x00<<0), /* 1-byte burst mode */ - DMA_CH_BURSTLEN_2BYTE_gc = (0x01<<0), /* 2-byte burst mode */ - DMA_CH_BURSTLEN_4BYTE_gc = (0x02<<0), /* 4-byte burst mode */ - DMA_CH_BURSTLEN_8BYTE_gc = (0x03<<0), /* 8-byte burst mode */ -} DMA_CH_BURSTLEN_t; - -/* Source address reload mode */ -typedef enum DMA_CH_SRCRELOAD_enum -{ - DMA_CH_SRCRELOAD_NONE_gc = (0x00<<6), /* No reload */ - DMA_CH_SRCRELOAD_BLOCK_gc = (0x01<<6), /* Reload at end of block */ - DMA_CH_SRCRELOAD_BURST_gc = (0x02<<6), /* Reload at end of burst */ - DMA_CH_SRCRELOAD_TRANSACTION_gc = (0x03<<6), /* Reload at end of transaction */ -} DMA_CH_SRCRELOAD_t; - -/* Source addressing mode */ -typedef enum DMA_CH_SRCDIR_enum -{ - DMA_CH_SRCDIR_FIXED_gc = (0x00<<4), /* Fixed */ - DMA_CH_SRCDIR_INC_gc = (0x01<<4), /* Increment */ - DMA_CH_SRCDIR_DEC_gc = (0x02<<4), /* Decrement */ -} DMA_CH_SRCDIR_t; - -/* Destination adress reload mode */ -typedef enum DMA_CH_DESTRELOAD_enum -{ - DMA_CH_DESTRELOAD_NONE_gc = (0x00<<2), /* No reload */ - DMA_CH_DESTRELOAD_BLOCK_gc = (0x01<<2), /* Reload at end of block */ - DMA_CH_DESTRELOAD_BURST_gc = (0x02<<2), /* Reload at end of burst */ - DMA_CH_DESTRELOAD_TRANSACTION_gc = (0x03<<2), /* Reload at end of transaction */ -} DMA_CH_DESTRELOAD_t; - -/* Destination adressing mode */ -typedef enum DMA_CH_DESTDIR_enum -{ - DMA_CH_DESTDIR_FIXED_gc = (0x00<<0), /* Fixed */ - DMA_CH_DESTDIR_INC_gc = (0x01<<0), /* Increment */ - DMA_CH_DESTDIR_DEC_gc = (0x02<<0), /* Decrement */ -} DMA_CH_DESTDIR_t; - -/* Transfer trigger source */ -typedef enum DMA_CH_TRIGSRC_enum -{ - DMA_CH_TRIGSRC_OFF_gc = (0x00<<0), /* Off software triggers only */ - DMA_CH_TRIGSRC_EVSYS_CH0_gc = (0x01<<0), /* Event System Channel 0 */ - DMA_CH_TRIGSRC_EVSYS_CH1_gc = (0x02<<0), /* Event System Channel 1 */ - DMA_CH_TRIGSRC_EVSYS_CH2_gc = (0x03<<0), /* Event System Channel 2 */ - DMA_CH_TRIGSRC_ADCA_CH0_gc = (0x10<<0), /* ADCA Channel 0 */ - DMA_CH_TRIGSRC_ADCA_CH1_gc = (0x11<<0), /* ADCA Channel 1 */ - DMA_CH_TRIGSRC_ADCA_CH2_gc = (0x12<<0), /* ADCA Channel 2 */ - DMA_CH_TRIGSRC_ADCA_CH3_gc = (0x13<<0), /* ADCA Channel 3 */ - DMA_CH_TRIGSRC_ADCA_CH4_gc = (0x14<<0), /* ADCA Channel 0,1,2,3 combined */ - DMA_CH_TRIGSRC_DACA_CH0_gc = (0x15<<0), /* DACA Channel 0 */ - DMA_CH_TRIGSRC_DACA_CH1_gc = (0x16<<0), /* DACA Channel 1 */ - DMA_CH_TRIGSRC_ADCB_CH0_gc = (0x20<<0), /* ADCB Channel 0 */ - DMA_CH_TRIGSRC_ADCB_CH1_gc = (0x21<<0), /* ADCB Channel 1 */ - DMA_CH_TRIGSRC_ADCB_CH2_gc = (0x22<<0), /* ADCB Channel 2 */ - DMA_CH_TRIGSRC_ADCB_CH3_gc = (0x23<<0), /* ADCB Channel 3 */ - DMA_CH_TRIGSRC_ADCB_CH4_gc = (0x24<<0), /* ADCB Channel 0,1,2,3 combined */ - DMA_CH_TRIGSRC_DACB_CH0_gc = (0x25<<0), /* DACB Channel 0 */ - DMA_CH_TRIGSRC_DACB_CH1_gc = (0x26<<0), /* DACB Channel 1 */ - DMA_CH_TRIGSRC_TCC0_OVF_gc = (0x40<<0), /* Timer/Counter C0 Overflow */ - DMA_CH_TRIGSRC_TCC0_ERR_gc = (0x41<<0), /* Timer/Counter C0 Error */ - DMA_CH_TRIGSRC_TCC0_CCA_gc = (0x42<<0), /* Timer/Counter C0 Compare or Capture A */ - DMA_CH_TRIGSRC_TCC0_CCB_gc = (0x43<<0), /* Timer/Counter C0 Compare or Capture B */ - DMA_CH_TRIGSRC_TCC0_CCC_gc = (0x44<<0), /* Timer/Counter C0 Compare or Capture C */ - DMA_CH_TRIGSRC_TCC0_CCD_gc = (0x45<<0), /* Timer/Counter C0 Compare or Capture D */ - DMA_CH_TRIGSRC_TCC1_OVF_gc = (0x46<<0), /* Timer/Counter C1 Overflow */ - DMA_CH_TRIGSRC_TCC1_ERR_gc = (0x47<<0), /* Timer/Counter C1 Error */ - DMA_CH_TRIGSRC_TCC1_CCA_gc = (0x48<<0), /* Timer/Counter C1 Compare or Capture A */ - DMA_CH_TRIGSRC_TCC1_CCB_gc = (0x49<<0), /* Timer/Counter C1 Compare or Capture B */ - DMA_CH_TRIGSRC_SPIC_gc = (0x4A<<0), /* SPI C Transfer Complete */ - DMA_CH_TRIGSRC_USARTC0_RXC_gc = (0x4B<<0), /* USART C0 Receive Complete */ - DMA_CH_TRIGSRC_USARTC0_DRE_gc = (0x4C<<0), /* USART C0 Data Register Empty */ - DMA_CH_TRIGSRC_USARTC1_RXC_gc = (0x4E<<0), /* USART C1 Receive Complete */ - DMA_CH_TRIGSRC_USARTC1_DRE_gc = (0x4F<<0), /* USART C1 Data Register Empty */ - DMA_CH_TRIGSRC_TCD0_OVF_gc = (0x60<<0), /* Timer/Counter D0 Overflow */ - DMA_CH_TRIGSRC_TCD0_ERR_gc = (0x61<<0), /* Timer/Counter D0 Error */ - DMA_CH_TRIGSRC_TCD0_CCA_gc = (0x62<<0), /* Timer/Counter D0 Compare or Capture A */ - DMA_CH_TRIGSRC_TCD0_CCB_gc = (0x63<<0), /* Timer/Counter D0 Compare or Capture B */ - DMA_CH_TRIGSRC_TCD0_CCC_gc = (0x64<<0), /* Timer/Counter D0 Compare or Capture C */ - DMA_CH_TRIGSRC_TCD0_CCD_gc = (0x65<<0), /* Timer/Counter D0 Compare or Capture D */ - DMA_CH_TRIGSRC_TCD1_OVF_gc = (0x66<<0), /* Timer/Counter D1 Overflow */ - DMA_CH_TRIGSRC_TCD1_ERR_gc = (0x67<<0), /* Timer/Counter D1 Error */ - DMA_CH_TRIGSRC_TCD1_CCA_gc = (0x68<<0), /* Timer/Counter D1 Compare or Capture A */ - DMA_CH_TRIGSRC_TCD1_CCB_gc = (0x69<<0), /* Timer/Counter D1 Compare or Capture B */ - DMA_CH_TRIGSRC_SPID_gc = (0x6A<<0), /* SPI D Transfer Complete */ - DMA_CH_TRIGSRC_USARTD0_RXC_gc = (0x6B<<0), /* USART D0 Receive Complete */ - DMA_CH_TRIGSRC_USARTD0_DRE_gc = (0x6C<<0), /* USART D0 Data Register Empty */ - DMA_CH_TRIGSRC_USARTD1_RXC_gc = (0x6E<<0), /* USART D1 Receive Complete */ - DMA_CH_TRIGSRC_USARTD1_DRE_gc = (0x6F<<0), /* USART D1 Data Register Empty */ - DMA_CH_TRIGSRC_TCE0_OVF_gc = (0x80<<0), /* Timer/Counter E0 Overflow */ - DMA_CH_TRIGSRC_TCE0_ERR_gc = (0x81<<0), /* Timer/Counter E0 Error */ - DMA_CH_TRIGSRC_TCE0_CCA_gc = (0x82<<0), /* Timer/Counter E0 Compare or Capture A */ - DMA_CH_TRIGSRC_TCE0_CCB_gc = (0x83<<0), /* Timer/Counter E0 Compare or Capture B */ - DMA_CH_TRIGSRC_TCE0_CCC_gc = (0x84<<0), /* Timer/Counter E0 Compare or Capture C */ - DMA_CH_TRIGSRC_TCE0_CCD_gc = (0x85<<0), /* Timer/Counter E0 Compare or Capture D */ - DMA_CH_TRIGSRC_TCE1_OVF_gc = (0x86<<0), /* Timer/Counter E1 Overflow */ - DMA_CH_TRIGSRC_TCE1_ERR_gc = (0x87<<0), /* Timer/Counter E1 Error */ - DMA_CH_TRIGSRC_TCE1_CCA_gc = (0x88<<0), /* Timer/Counter E1 Compare or Capture A */ - DMA_CH_TRIGSRC_TCE1_CCB_gc = (0x89<<0), /* Timer/Counter E1 Compare or Capture B */ - DMA_CH_TRIGSRC_SPIE_gc = (0x8A<<0), /* SPI E Transfer Complete */ - DMA_CH_TRIGSRC_USARTE0_RXC_gc = (0x8B<<0), /* USART E0 Receive Complete */ - DMA_CH_TRIGSRC_USARTE0_DRE_gc = (0x8C<<0), /* USART E0 Data Register Empty */ - DMA_CH_TRIGSRC_USARTE1_RXC_gc = (0x8E<<0), /* USART E1 Receive Complete */ - DMA_CH_TRIGSRC_USARTE1_DRE_gc = (0x8F<<0), /* USART E1 Data Register Empty */ - DMA_CH_TRIGSRC_TCF0_OVF_gc = (0xA0<<0), /* Timer/Counter F0 Overflow */ - DMA_CH_TRIGSRC_TCF0_ERR_gc = (0xA1<<0), /* Timer/Counter F0 Error */ - DMA_CH_TRIGSRC_TCF0_CCA_gc = (0xA2<<0), /* Timer/Counter F0 Compare or Capture A */ - DMA_CH_TRIGSRC_TCF0_CCB_gc = (0xA3<<0), /* Timer/Counter F0 Compare or Capture B */ - DMA_CH_TRIGSRC_TCF0_CCC_gc = (0xA4<<0), /* Timer/Counter F0 Compare or Capture C */ - DMA_CH_TRIGSRC_TCF0_CCD_gc = (0xA5<<0), /* Timer/Counter F0 Compare or Capture D */ - DMA_CH_TRIGSRC_TCF1_OVF_gc = (0xA6<<0), /* Timer/Counter F1 Overflow */ - DMA_CH_TRIGSRC_TCF1_ERR_gc = (0xA7<<0), /* Timer/Counter F1 Error */ - DMA_CH_TRIGSRC_TCF1_CCA_gc = (0xA8<<0), /* Timer/Counter F1 Compare or Capture A */ - DMA_CH_TRIGSRC_TCF1_CCB_gc = (0xA9<<0), /* Timer/Counter F1 Compare or Capture B */ - DMA_CH_TRIGSRC_SPIF_gc = (0xAA<<0), /* SPI F Transfer Complete */ - DMA_CH_TRIGSRC_USARTF0_RXC_gc = (0xAB<<0), /* USART F0 Receive Complete */ - DMA_CH_TRIGSRC_USARTF0_DRE_gc = (0xAC<<0), /* USART F0 Data Register Empty */ - DMA_CH_TRIGSRC_USARTF1_RXC_gc = (0xAE<<0), /* USART F1 Receive Complete */ - DMA_CH_TRIGSRC_USARTF1_DRE_gc = (0xAF<<0), /* USART F1 Data Register Empty */ -} DMA_CH_TRIGSRC_t; - -/* Double buffering mode */ -typedef enum DMA_DBUFMODE_enum -{ - DMA_DBUFMODE_DISABLED_gc = (0x00<<2), /* Double buffering disabled */ - DMA_DBUFMODE_CH01_gc = (0x01<<2), /* Double buffering enabled on channel 0/1 */ - DMA_DBUFMODE_CH23_gc = (0x02<<2), /* Double buffering enabled on channel 2/3 */ - DMA_DBUFMODE_CH01CH23_gc = (0x03<<2), /* Double buffering enabled on ch. 0/1 and ch. 2/3 */ -} DMA_DBUFMODE_t; - -/* Priority mode */ -typedef enum DMA_PRIMODE_enum -{ - DMA_PRIMODE_RR0123_gc = (0x00<<0), /* Round Robin */ - DMA_PRIMODE_CH0RR123_gc = (0x01<<0), /* Channel 0 > Round Robin on channel 1/2/3 */ - DMA_PRIMODE_CH01RR23_gc = (0x02<<0), /* Channel 0 > channel 1 > Round Robin on channel 2/3 */ - DMA_PRIMODE_CH0123_gc = (0x03<<0), /* Channel 0 > channel 1 > channel 2 > channel 3 */ -} DMA_PRIMODE_t; - -/* Interrupt level */ -typedef enum DMA_CH_ERRINTLVL_enum -{ - DMA_CH_ERRINTLVL_OFF_gc = (0x00<<2), /* Interrupt disabled */ - DMA_CH_ERRINTLVL_LO_gc = (0x01<<2), /* Low level */ - DMA_CH_ERRINTLVL_MED_gc = (0x02<<2), /* Medium level */ - DMA_CH_ERRINTLVL_HI_gc = (0x03<<2), /* High level */ -} DMA_CH_ERRINTLVL_t; - -/* Interrupt level */ -typedef enum DMA_CH_TRNINTLVL_enum -{ - DMA_CH_TRNINTLVL_OFF_gc = (0x00<<0), /* Interrupt disabled */ - DMA_CH_TRNINTLVL_LO_gc = (0x01<<0), /* Low level */ - DMA_CH_TRNINTLVL_MED_gc = (0x02<<0), /* Medium level */ - DMA_CH_TRNINTLVL_HI_gc = (0x03<<0), /* High level */ -} DMA_CH_TRNINTLVL_t; - - -/* --------------------------------------------------------------------------- -EVSYS - Event System --------------------------------------------------------------------------- -*/ - -/* Event System */ -typedef struct EVSYS_struct -{ - register8_t CH0MUX; /* Event Channel 0 Multiplexer */ - register8_t CH1MUX; /* Event Channel 1 Multiplexer */ - register8_t CH2MUX; /* Event Channel 2 Multiplexer */ - register8_t CH3MUX; /* Event Channel 3 Multiplexer */ - register8_t CH4MUX; /* Event Channel 4 Multiplexer */ - register8_t CH5MUX; /* Event Channel 5 Multiplexer */ - register8_t CH6MUX; /* Event Channel 6 Multiplexer */ - register8_t CH7MUX; /* Event Channel 7 Multiplexer */ - register8_t CH0CTRL; /* Channel 0 Control Register */ - register8_t CH1CTRL; /* Channel 1 Control Register */ - register8_t CH2CTRL; /* Channel 2 Control Register */ - register8_t CH3CTRL; /* Channel 3 Control Register */ - register8_t CH4CTRL; /* Channel 4 Control Register */ - register8_t CH5CTRL; /* Channel 5 Control Register */ - register8_t CH6CTRL; /* Channel 6 Control Register */ - register8_t CH7CTRL; /* Channel 7 Control Register */ - register8_t STROBE; /* Event Strobe */ - register8_t DATA; /* Event Data */ -} EVSYS_t; - -/* Quadrature Decoder Index Recognition Mode */ -typedef enum EVSYS_QDIRM_enum -{ - EVSYS_QDIRM_00_gc = (0x00<<5), /* QDPH0 = 0, QDPH90 = 0 */ - EVSYS_QDIRM_01_gc = (0x01<<5), /* QDPH0 = 0, QDPH90 = 1 */ - EVSYS_QDIRM_10_gc = (0x02<<5), /* QDPH0 = 1, QDPH90 = 0 */ - EVSYS_QDIRM_11_gc = (0x03<<5), /* QDPH0 = 1, QDPH90 = 1 */ -} EVSYS_QDIRM_t; - -/* Digital filter coefficient */ -typedef enum EVSYS_DIGFILT_enum -{ - EVSYS_DIGFILT_1SAMPLE_gc = (0x00<<0), /* 1 SAMPLE */ - EVSYS_DIGFILT_2SAMPLES_gc = (0x01<<0), /* 2 SAMPLES */ - EVSYS_DIGFILT_3SAMPLES_gc = (0x02<<0), /* 3 SAMPLES */ - EVSYS_DIGFILT_4SAMPLES_gc = (0x03<<0), /* 4 SAMPLES */ - EVSYS_DIGFILT_5SAMPLES_gc = (0x04<<0), /* 5 SAMPLES */ - EVSYS_DIGFILT_6SAMPLES_gc = (0x05<<0), /* 6 SAMPLES */ - EVSYS_DIGFILT_7SAMPLES_gc = (0x06<<0), /* 7 SAMPLES */ - EVSYS_DIGFILT_8SAMPLES_gc = (0x07<<0), /* 8 SAMPLES */ -} EVSYS_DIGFILT_t; - -/* Event Channel multiplexer input selection */ -typedef enum EVSYS_CHMUX_enum -{ - EVSYS_CHMUX_OFF_gc = (0x00<<0), /* Off */ - EVSYS_CHMUX_RTC_OVF_gc = (0x08<<0), /* RTC Overflow */ - EVSYS_CHMUX_RTC_CMP_gc = (0x09<<0), /* RTC Compare Match */ - EVSYS_CHMUX_ACA_CH0_gc = (0x10<<0), /* Analog Comparator A Channel 0 */ - EVSYS_CHMUX_ACA_CH1_gc = (0x11<<0), /* Analog Comparator A Channel 1 */ - EVSYS_CHMUX_ACA_WIN_gc = (0x12<<0), /* Analog Comparator A Window */ - EVSYS_CHMUX_ACB_CH0_gc = (0x13<<0), /* Analog Comparator B Channel 0 */ - EVSYS_CHMUX_ACB_CH1_gc = (0x14<<0), /* Analog Comparator B Channel 1 */ - EVSYS_CHMUX_ACB_WIN_gc = (0x15<<0), /* Analog Comparator B Window */ - EVSYS_CHMUX_ADCA_CH0_gc = (0x20<<0), /* ADC A Channel 0 */ - EVSYS_CHMUX_ADCA_CH1_gc = (0x21<<0), /* ADC A Channel 1 */ - EVSYS_CHMUX_ADCA_CH2_gc = (0x22<<0), /* ADC A Channel 2 */ - EVSYS_CHMUX_ADCA_CH3_gc = (0x23<<0), /* ADC A Channel 3 */ - EVSYS_CHMUX_ADCB_CH0_gc = (0x24<<0), /* ADC B Channel 0 */ - EVSYS_CHMUX_ADCB_CH1_gc = (0x25<<0), /* ADC B Channel 1 */ - EVSYS_CHMUX_ADCB_CH2_gc = (0x26<<0), /* ADC B Channel 2 */ - EVSYS_CHMUX_ADCB_CH3_gc = (0x27<<0), /* ADC B Channel 3 */ - EVSYS_CHMUX_PORTA_PIN0_gc = (0x50<<0), /* Port A, Pin0 */ - EVSYS_CHMUX_PORTA_PIN1_gc = (0x51<<0), /* Port A, Pin1 */ - EVSYS_CHMUX_PORTA_PIN2_gc = (0x52<<0), /* Port A, Pin2 */ - EVSYS_CHMUX_PORTA_PIN3_gc = (0x53<<0), /* Port A, Pin3 */ - EVSYS_CHMUX_PORTA_PIN4_gc = (0x54<<0), /* Port A, Pin4 */ - EVSYS_CHMUX_PORTA_PIN5_gc = (0x55<<0), /* Port A, Pin5 */ - EVSYS_CHMUX_PORTA_PIN6_gc = (0x56<<0), /* Port A, Pin6 */ - EVSYS_CHMUX_PORTA_PIN7_gc = (0x57<<0), /* Port A, Pin7 */ - EVSYS_CHMUX_PORTB_PIN0_gc = (0x58<<0), /* Port B, Pin0 */ - EVSYS_CHMUX_PORTB_PIN1_gc = (0x59<<0), /* Port B, Pin1 */ - EVSYS_CHMUX_PORTB_PIN2_gc = (0x5A<<0), /* Port B, Pin2 */ - EVSYS_CHMUX_PORTB_PIN3_gc = (0x5B<<0), /* Port B, Pin3 */ - EVSYS_CHMUX_PORTB_PIN4_gc = (0x5C<<0), /* Port B, Pin4 */ - EVSYS_CHMUX_PORTB_PIN5_gc = (0x5D<<0), /* Port B, Pin5 */ - EVSYS_CHMUX_PORTB_PIN6_gc = (0x5E<<0), /* Port B, Pin6 */ - EVSYS_CHMUX_PORTB_PIN7_gc = (0x5F<<0), /* Port B, Pin7 */ - EVSYS_CHMUX_PORTC_PIN0_gc = (0x60<<0), /* Port C, Pin0 */ - EVSYS_CHMUX_PORTC_PIN1_gc = (0x61<<0), /* Port C, Pin1 */ - EVSYS_CHMUX_PORTC_PIN2_gc = (0x62<<0), /* Port C, Pin2 */ - EVSYS_CHMUX_PORTC_PIN3_gc = (0x63<<0), /* Port C, Pin3 */ - EVSYS_CHMUX_PORTC_PIN4_gc = (0x64<<0), /* Port C, Pin4 */ - EVSYS_CHMUX_PORTC_PIN5_gc = (0x65<<0), /* Port C, Pin5 */ - EVSYS_CHMUX_PORTC_PIN6_gc = (0x66<<0), /* Port C, Pin6 */ - EVSYS_CHMUX_PORTC_PIN7_gc = (0x67<<0), /* Port C, Pin7 */ - EVSYS_CHMUX_PORTD_PIN0_gc = (0x68<<0), /* Port D, Pin0 */ - EVSYS_CHMUX_PORTD_PIN1_gc = (0x69<<0), /* Port D, Pin1 */ - EVSYS_CHMUX_PORTD_PIN2_gc = (0x6A<<0), /* Port D, Pin2 */ - EVSYS_CHMUX_PORTD_PIN3_gc = (0x6B<<0), /* Port D, Pin3 */ - EVSYS_CHMUX_PORTD_PIN4_gc = (0x6C<<0), /* Port D, Pin4 */ - EVSYS_CHMUX_PORTD_PIN5_gc = (0x6D<<0), /* Port D, Pin5 */ - EVSYS_CHMUX_PORTD_PIN6_gc = (0x6E<<0), /* Port D, Pin6 */ - EVSYS_CHMUX_PORTD_PIN7_gc = (0x6F<<0), /* Port D, Pin7 */ - EVSYS_CHMUX_PORTE_PIN0_gc = (0x70<<0), /* Port E, Pin0 */ - EVSYS_CHMUX_PORTE_PIN1_gc = (0x71<<0), /* Port E, Pin1 */ - EVSYS_CHMUX_PORTE_PIN2_gc = (0x72<<0), /* Port E, Pin2 */ - EVSYS_CHMUX_PORTE_PIN3_gc = (0x73<<0), /* Port E, Pin3 */ - EVSYS_CHMUX_PORTE_PIN4_gc = (0x74<<0), /* Port E, Pin4 */ - EVSYS_CHMUX_PORTE_PIN5_gc = (0x75<<0), /* Port E, Pin5 */ - EVSYS_CHMUX_PORTE_PIN6_gc = (0x76<<0), /* Port E, Pin6 */ - EVSYS_CHMUX_PORTE_PIN7_gc = (0x77<<0), /* Port E, Pin7 */ - EVSYS_CHMUX_PORTF_PIN0_gc = (0x78<<0), /* Port F, Pin0 */ - EVSYS_CHMUX_PORTF_PIN1_gc = (0x79<<0), /* Port F, Pin1 */ - EVSYS_CHMUX_PORTF_PIN2_gc = (0x7A<<0), /* Port F, Pin2 */ - EVSYS_CHMUX_PORTF_PIN3_gc = (0x7B<<0), /* Port F, Pin3 */ - EVSYS_CHMUX_PORTF_PIN4_gc = (0x7C<<0), /* Port F, Pin4 */ - EVSYS_CHMUX_PORTF_PIN5_gc = (0x7D<<0), /* Port F, Pin5 */ - EVSYS_CHMUX_PORTF_PIN6_gc = (0x7E<<0), /* Port F, Pin6 */ - EVSYS_CHMUX_PORTF_PIN7_gc = (0x7F<<0), /* Port F, Pin7 */ - EVSYS_CHMUX_PRESCALER_1_gc = (0x80<<0), /* Prescaler, divide by 1 */ - EVSYS_CHMUX_PRESCALER_2_gc = (0x81<<0), /* Prescaler, divide by 2 */ - EVSYS_CHMUX_PRESCALER_4_gc = (0x82<<0), /* Prescaler, divide by 4 */ - EVSYS_CHMUX_PRESCALER_8_gc = (0x83<<0), /* Prescaler, divide by 8 */ - EVSYS_CHMUX_PRESCALER_16_gc = (0x84<<0), /* Prescaler, divide by 16 */ - EVSYS_CHMUX_PRESCALER_32_gc = (0x85<<0), /* Prescaler, divide by 32 */ - EVSYS_CHMUX_PRESCALER_64_gc = (0x86<<0), /* Prescaler, divide by 64 */ - EVSYS_CHMUX_PRESCALER_128_gc = (0x87<<0), /* Prescaler, divide by 128 */ - EVSYS_CHMUX_PRESCALER_256_gc = (0x88<<0), /* Prescaler, divide by 256 */ - EVSYS_CHMUX_PRESCALER_512_gc = (0x89<<0), /* Prescaler, divide by 512 */ - EVSYS_CHMUX_PRESCALER_1024_gc = (0x8A<<0), /* Prescaler, divide by 1024 */ - EVSYS_CHMUX_PRESCALER_2048_gc = (0x8B<<0), /* Prescaler, divide by 2048 */ - EVSYS_CHMUX_PRESCALER_4096_gc = (0x8C<<0), /* Prescaler, divide by 4096 */ - EVSYS_CHMUX_PRESCALER_8192_gc = (0x8D<<0), /* Prescaler, divide by 8192 */ - EVSYS_CHMUX_PRESCALER_16384_gc = (0x8E<<0), /* Prescaler, divide by 16384 */ - EVSYS_CHMUX_PRESCALER_32768_gc = (0x8F<<0), /* Prescaler, divide by 32768 */ - EVSYS_CHMUX_TCC0_OVF_gc = (0xC0<<0), /* Timer/Counter C0 Overflow */ - EVSYS_CHMUX_TCC0_ERR_gc = (0xC1<<0), /* Timer/Counter C0 Error */ - EVSYS_CHMUX_TCC0_CCA_gc = (0xC4<<0), /* Timer/Counter C0 Compare or Capture A */ - EVSYS_CHMUX_TCC0_CCB_gc = (0xC5<<0), /* Timer/Counter C0 Compare or Capture B */ - EVSYS_CHMUX_TCC0_CCC_gc = (0xC6<<0), /* Timer/Counter C0 Compare or Capture C */ - EVSYS_CHMUX_TCC0_CCD_gc = (0xC7<<0), /* Timer/Counter C0 Compare or Capture D */ - EVSYS_CHMUX_TCC1_OVF_gc = (0xC8<<0), /* Timer/Counter C1 Overflow */ - EVSYS_CHMUX_TCC1_ERR_gc = (0xC9<<0), /* Timer/Counter C1 Error */ - EVSYS_CHMUX_TCC1_CCA_gc = (0xCC<<0), /* Timer/Counter C1 Compare or Capture A */ - EVSYS_CHMUX_TCC1_CCB_gc = (0xCD<<0), /* Timer/Counter C1 Compare or Capture B */ - EVSYS_CHMUX_TCD0_OVF_gc = (0xD0<<0), /* Timer/Counter D0 Overflow */ - EVSYS_CHMUX_TCD0_ERR_gc = (0xD1<<0), /* Timer/Counter D0 Error */ - EVSYS_CHMUX_TCD0_CCA_gc = (0xD4<<0), /* Timer/Counter D0 Compare or Capture A */ - EVSYS_CHMUX_TCD0_CCB_gc = (0xD5<<0), /* Timer/Counter D0 Compare or Capture B */ - EVSYS_CHMUX_TCD0_CCC_gc = (0xD6<<0), /* Timer/Counter D0 Compare or Capture C */ - EVSYS_CHMUX_TCD0_CCD_gc = (0xD7<<0), /* Timer/Counter D0 Compare or Capture D */ - EVSYS_CHMUX_TCD1_OVF_gc = (0xD8<<0), /* Timer/Counter D1 Overflow */ - EVSYS_CHMUX_TCD1_ERR_gc = (0xD9<<0), /* Timer/Counter D1 Error */ - EVSYS_CHMUX_TCD1_CCA_gc = (0xDC<<0), /* Timer/Counter D1 Compare or Capture A */ - EVSYS_CHMUX_TCD1_CCB_gc = (0xDD<<0), /* Timer/Counter D1 Compare or Capture B */ - EVSYS_CHMUX_TCE0_OVF_gc = (0xE0<<0), /* Timer/Counter E0 Overflow */ - EVSYS_CHMUX_TCE0_ERR_gc = (0xE1<<0), /* Timer/Counter E0 Error */ - EVSYS_CHMUX_TCE0_CCA_gc = (0xE4<<0), /* Timer/Counter E0 Compare or Capture A */ - EVSYS_CHMUX_TCE0_CCB_gc = (0xE5<<0), /* Timer/Counter E0 Compare or Capture B */ - EVSYS_CHMUX_TCE0_CCC_gc = (0xE6<<0), /* Timer/Counter E0 Compare or Capture C */ - EVSYS_CHMUX_TCE0_CCD_gc = (0xE7<<0), /* Timer/Counter E0 Compare or Capture D */ - EVSYS_CHMUX_TCE1_OVF_gc = (0xE8<<0), /* Timer/Counter E1 Overflow */ - EVSYS_CHMUX_TCE1_ERR_gc = (0xE9<<0), /* Timer/Counter E1 Error */ - EVSYS_CHMUX_TCE1_CCA_gc = (0xEC<<0), /* Timer/Counter E1 Compare or Capture A */ - EVSYS_CHMUX_TCE1_CCB_gc = (0xED<<0), /* Timer/Counter E1 Compare or Capture B */ - EVSYS_CHMUX_TCF0_OVF_gc = (0xF0<<0), /* Timer/Counter F0 Overflow */ - EVSYS_CHMUX_TCF0_ERR_gc = (0xF1<<0), /* Timer/Counter F0 Error */ - EVSYS_CHMUX_TCF0_CCA_gc = (0xF4<<0), /* Timer/Counter F0 Compare or Capture A */ - EVSYS_CHMUX_TCF0_CCB_gc = (0xF5<<0), /* Timer/Counter F0 Compare or Capture B */ - EVSYS_CHMUX_TCF0_CCC_gc = (0xF6<<0), /* Timer/Counter F0 Compare or Capture C */ - EVSYS_CHMUX_TCF0_CCD_gc = (0xF7<<0), /* Timer/Counter F0 Compare or Capture D */ - EVSYS_CHMUX_TCF1_OVF_gc = (0xF8<<0), /* Timer/Counter F1 Overflow */ - EVSYS_CHMUX_TCF1_ERR_gc = (0xF9<<0), /* Timer/Counter F1 Error */ - EVSYS_CHMUX_TCF1_CCA_gc = (0xFC<<0), /* Timer/Counter F1 Compare or Capture A */ - EVSYS_CHMUX_TCF1_CCB_gc = (0xFD<<0), /* Timer/Counter F1 Compare or Capture B */ -} EVSYS_CHMUX_t; - - -/* --------------------------------------------------------------------------- -NVM - Non Volatile Memory Controller --------------------------------------------------------------------------- -*/ - -/* Non-volatile Memory Controller */ -typedef struct NVM_struct -{ - register8_t ADDR0; /* Address Register 0 */ - register8_t ADDR1; /* Address Register 1 */ - register8_t ADDR2; /* Address Register 2 */ - register8_t reserved_0x03; - register8_t DATA0; /* Data Register 0 */ - register8_t DATA1; /* Data Register 1 */ - register8_t DATA2; /* Data Register 2 */ - register8_t reserved_0x07; - register8_t reserved_0x08; - register8_t reserved_0x09; - register8_t CMD; /* Command */ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t INTCTRL; /* Interrupt Control */ - register8_t reserved_0x0E; - register8_t STATUS; /* Status */ - register8_t LOCKBITS; /* Lock Bits */ -} NVM_t; - -/* --------------------------------------------------------------------------- -NVM - Non Volatile Memory Controller --------------------------------------------------------------------------- -*/ - -/* Lock Bits */ -typedef struct NVM_LOCKBITS_struct -{ - register8_t LOCKBITS; /* Lock Bits */ -} NVM_LOCKBITS_t; - -/* --------------------------------------------------------------------------- -NVM - Non Volatile Memory Controller --------------------------------------------------------------------------- -*/ - -/* Fuses */ -typedef struct NVM_FUSES_struct -{ - register8_t FUSEBYTE0; /* JTAG User ID */ - register8_t FUSEBYTE1; /* Watchdog Configuration */ - register8_t FUSEBYTE2; /* Reset Configuration */ - register8_t reserved_0x03; - register8_t FUSEBYTE4; /* Start-up Configuration */ - register8_t FUSEBYTE5; /* EESAVE and BOD Level */ -} NVM_FUSES_t; - -/* --------------------------------------------------------------------------- -NVM - Non Volatile Memory Controller --------------------------------------------------------------------------- -*/ - -/* Production Signatures */ -typedef struct NVM_PROD_SIGNATURES_struct -{ - register8_t RCOSC2M; /* RCOSC 2MHz Calibration Value */ - register8_t reserved_0x01; - register8_t RCOSC32K; /* RCOSC 32kHz Calibration Value */ - register8_t RCOSC32M; /* RCOSC 32MHz Calibration Value */ - register8_t reserved_0x04; - register8_t reserved_0x05; - register8_t reserved_0x06; - register8_t reserved_0x07; - register8_t LOTNUM0; /* Lot Number Byte 0, ASCII */ - register8_t LOTNUM1; /* Lot Number Byte 1, ASCII */ - register8_t LOTNUM2; /* Lot Number Byte 2, ASCII */ - register8_t LOTNUM3; /* Lot Number Byte 3, ASCII */ - register8_t LOTNUM4; /* Lot Number Byte 4, ASCII */ - register8_t LOTNUM5; /* Lot Number Byte 5, ASCII */ - register8_t reserved_0x0E; - register8_t reserved_0x0F; - register8_t WAFNUM; /* Wafer Number */ - register8_t reserved_0x11; - register8_t COORDX0; /* Wafer Coordinate X Byte 0 */ - register8_t COORDX1; /* Wafer Coordinate X Byte 1 */ - register8_t COORDY0; /* Wafer Coordinate Y Byte 0 */ - register8_t COORDY1; /* Wafer Coordinate Y Byte 1 */ - register8_t reserved_0x16; - register8_t reserved_0x17; - register8_t reserved_0x18; - register8_t reserved_0x19; - register8_t reserved_0x1A; - register8_t reserved_0x1B; - register8_t reserved_0x1C; - register8_t reserved_0x1D; - register8_t reserved_0x1E; - register8_t reserved_0x1F; - register8_t ADCACAL0; /* ADCA Calibration Byte 0 */ - register8_t ADCACAL1; /* ADCA Calibration Byte 1 */ - register8_t reserved_0x22; - register8_t reserved_0x23; - register8_t ADCBCAL0; /* ADCB Calibration Byte 0 */ - register8_t ADCBCAL1; /* ADCB Calibration Byte 1 */ - register8_t reserved_0x26; - register8_t reserved_0x27; - register8_t reserved_0x28; - register8_t reserved_0x29; - register8_t reserved_0x2A; - register8_t reserved_0x2B; - register8_t reserved_0x2C; - register8_t reserved_0x2D; - register8_t TEMPSENSE0; /* Temperature Sensor Calibration Byte 0 */ - register8_t TEMPSENSE1; /* Temperature Sensor Calibration Byte 0 */ - register8_t DACAOFFCAL; /* DACA Calibration Byte 0 */ - register8_t DACACAINCAL; /* DACA Calibration Byte 1 */ - register8_t DACBOFFCAL; /* DACB Calibration Byte 0 */ - register8_t DACBGAINCAL; /* DACB Calibration Byte 1 */ - register8_t reserved_0x34; - register8_t reserved_0x35; - register8_t reserved_0x36; - register8_t reserved_0x37; - register8_t reserved_0x38; - register8_t reserved_0x39; - register8_t reserved_0x3A; - register8_t reserved_0x3B; - register8_t reserved_0x3C; - register8_t reserved_0x3D; - register8_t reserved_0x3E; -} NVM_PROD_SIGNATURES_t; - -/* NVM Command */ -typedef enum NVM_CMD_enum -{ - NVM_CMD_NO_OPERATION_gc = (0x00<<0), /* Noop/Ordinary LPM */ - NVM_CMD_READ_CALIB_ROW_gc = (0x02<<0), /* Read calibration row */ - NVM_CMD_READ_USER_SIG_ROW_gc = (0x01<<0), /* Read user signature row */ - NVM_CMD_READ_EEPROM_gc = (0x06<<0), /* Read EEPROM */ - NVM_CMD_READ_FUSES_gc = (0x07<<0), /* Read fuse byte */ - NVM_CMD_WRITE_LOCK_BITS_gc = (0x08<<0), /* Write lock bits */ - NVM_CMD_ERASE_USER_SIG_ROW_gc = (0x18<<0), /* Erase user signature row */ - NVM_CMD_WRITE_USER_SIG_ROW_gc = (0x1A<<0), /* Write user signature row */ - NVM_CMD_ERASE_APP_gc = (0x20<<0), /* Erase Application Section */ - NVM_CMD_ERASE_APP_PAGE_gc = (0x22<<0), /* Erase Application Section page */ - NVM_CMD_LOAD_FLASH_BUFFER_gc = (0x23<<0), /* Load Flash page buffer */ - NVM_CMD_WRITE_APP_PAGE_gc = (0x24<<0), /* Write Application Section page */ - NVM_CMD_ERASE_WRITE_APP_PAGE_gc = (0x25<<0), /* Erase-and-write Application Section page */ - NVM_CMD_ERASE_FLASH_BUFFER_gc = (0x26<<0), /* Erase/flush Flash page buffer */ - NVM_CMD_ERASE_BOOT_PAGE_gc = (0x2A<<0), /* Erase Boot Section page */ - NVM_CMD_WRITE_BOOT_PAGE_gc = (0x2C<<0), /* Write Boot Section page */ - NVM_CMD_ERASE_WRITE_BOOT_PAGE_gc = (0x2D<<0), /* Erase-and-write Boot Section page */ - NVM_CMD_ERASE_EEPROM_gc = (0x30<<0), /* Erase EEPROM */ - NVM_CMD_ERASE_EEPROM_PAGE_gc = (0x32<<0), /* Erase EEPROM page */ - NVM_CMD_LOAD_EEPROM_BUFFER_gc = (0x33<<0), /* Load EEPROM page buffer */ - NVM_CMD_WRITE_EEPROM_PAGE_gc = (0x34<<0), /* Write EEPROM page */ - NVM_CMD_ERASE_WRITE_EEPROM_PAGE_gc = (0x35<<0), /* Erase-and-write EEPROM page */ - NVM_CMD_ERASE_EEPROM_BUFFER_gc = (0x36<<0), /* Erase/flush EEPROM page buffer */ - NVM_CMD_APP_CRC_gc = (0x38<<0), /* Generate Application section CRC */ - NVM_CMD_BOOT_CRC_gc = (0x39<<0), /* Generate Boot Section CRC */ - NVM_CMD_FLASH_RANGE_CRC_gc = (0x3A<<0), /* Generate Flash Range CRC */ -} NVM_CMD_t; - -/* SPM ready interrupt level */ -typedef enum NVM_SPMLVL_enum -{ - NVM_SPMLVL_OFF_gc = (0x00<<2), /* Interrupt disabled */ - NVM_SPMLVL_LO_gc = (0x01<<2), /* Low level */ - NVM_SPMLVL_MED_gc = (0x02<<2), /* Medium level */ - NVM_SPMLVL_HI_gc = (0x03<<2), /* High level */ -} NVM_SPMLVL_t; - -/* EEPROM ready interrupt level */ -typedef enum NVM_EELVL_enum -{ - NVM_EELVL_OFF_gc = (0x00<<0), /* Interrupt disabled */ - NVM_EELVL_LO_gc = (0x01<<0), /* Low level */ - NVM_EELVL_MED_gc = (0x02<<0), /* Medium level */ - NVM_EELVL_HI_gc = (0x03<<0), /* High level */ -} NVM_EELVL_t; - -/* Boot lock bits - boot setcion */ -typedef enum NVM_BLBB_enum -{ - NVM_BLBB_NOLOCK_gc = (0x03<<6), /* No locks */ - NVM_BLBB_WLOCK_gc = (0x02<<6), /* Write not allowed */ - NVM_BLBB_RLOCK_gc = (0x01<<6), /* Read not allowed */ - NVM_BLBB_RWLOCK_gc = (0x00<<6), /* Read and write not allowed */ -} NVM_BLBB_t; - -/* Boot lock bits - application section */ -typedef enum NVM_BLBA_enum -{ - NVM_BLBA_NOLOCK_gc = (0x03<<4), /* No locks */ - NVM_BLBA_WLOCK_gc = (0x02<<4), /* Write not allowed */ - NVM_BLBA_RLOCK_gc = (0x01<<4), /* Read not allowed */ - NVM_BLBA_RWLOCK_gc = (0x00<<4), /* Read and write not allowed */ -} NVM_BLBA_t; - -/* Boot lock bits - application table section */ -typedef enum NVM_BLBAT_enum -{ - NVM_BLBAT_NOLOCK_gc = (0x03<<2), /* No locks */ - NVM_BLBAT_WLOCK_gc = (0x02<<2), /* Write not allowed */ - NVM_BLBAT_RLOCK_gc = (0x01<<2), /* Read not allowed */ - NVM_BLBAT_RWLOCK_gc = (0x00<<2), /* Read and write not allowed */ -} NVM_BLBAT_t; - -/* Lock bits */ -typedef enum NVM_LB_enum -{ - NVM_LB_NOLOCK_gc = (0x03<<0), /* No locks */ - NVM_LB_WLOCK_gc = (0x02<<0), /* Write not allowed */ - NVM_LB_RWLOCK_gc = (0x00<<0), /* Read and write not allowed */ -} NVM_LB_t; - -/* Boot Loader Section Reset Vector */ -typedef enum BOOTRST_enum -{ - BOOTRST_BOOTLDR_gc = (0x00<<6), /* Boot Loader Reset */ - BOOTRST_APPLICATION_gc = (0x01<<6), /* Application Reset */ -} BOOTRST_t; - -/* BOD operation */ -typedef enum BOD_enum -{ - BOD_INSAMPLEDMODE_gc = (0x01<<2), /* BOD enabled in sampled mode */ - BOD_CONTINOUSLY_gc = (0x02<<2), /* BOD enabled continuously */ - BOD_DISABLED_gc = (0x03<<2), /* BOD Disabled */ -} BOD_t; - -/* Watchdog (Window) Timeout Period */ -typedef enum WD_enum -{ - WD_8CLK_gc = (0x00<<4), /* 8 cycles (8ms @ 3.3V) */ - WD_16CLK_gc = (0x01<<4), /* 16 cycles (16ms @ 3.3V) */ - WD_32CLK_gc = (0x02<<4), /* 32 cycles (32ms @ 3.3V) */ - WD_64CLK_gc = (0x03<<4), /* 64 cycles (64ms @ 3.3V) */ - WD_128CLK_gc = (0x04<<4), /* 128 cycles (0.125s @ 3.3V) */ - WD_256CLK_gc = (0x05<<4), /* 256 cycles (0.25s @ 3.3V) */ - WD_512CLK_gc = (0x06<<4), /* 512 cycles (0.5s @ 3.3V) */ - WD_1KCLK_gc = (0x07<<4), /* 1K cycles (1s @ 3.3V) */ - WD_2KCLK_gc = (0x08<<4), /* 2K cycles (2s @ 3.3V) */ - WD_4KCLK_gc = (0x09<<4), /* 4K cycles (4s @ 3.3V) */ - WD_8KCLK_gc = (0x0A<<4), /* 8K cycles (8s @ 3.3V) */ -} WD_t; - -/* Start-up Time */ -typedef enum SUT_enum -{ - SUT_0MS_gc = (0x03<<2), /* 0 ms */ - SUT_4MS_gc = (0x01<<2), /* 4 ms */ - SUT_64MS_gc = (0x00<<2), /* 64 ms */ -} SUT_t; - -/* Brown Out Detection Voltage Level */ -typedef enum BODLVL_enum -{ - BODLVL_1V6_gc = (0x07<<0), /* 1.6 V */ - BODLVL_1V8_gc = (0x06<<0), /* 1.8 V */ - BODLVL_2V0_gc = (0x05<<0), /* 2.0 V */ - BODLVL_2V2_gc = (0x04<<0), /* 2.2 V */ - BODLVL_2V4_gc = (0x03<<0), /* 2.4 V */ - BODLVL_2V7_gc = (0x02<<0), /* 2.7 V */ - BODLVL_2V9_gc = (0x01<<0), /* 2.9 V */ - BODLVL_3V2_gc = (0x00<<0), /* 3.2 V */ -} BODLVL_t; - - -/* --------------------------------------------------------------------------- -AC - Analog Comparator --------------------------------------------------------------------------- -*/ - -/* Analog Comparator */ -typedef struct AC_struct -{ - register8_t AC0CTRL; /* Comparator 0 Control */ - register8_t AC1CTRL; /* Comparator 1 Control */ - register8_t AC0MUXCTRL; /* Comparator 0 MUX Control */ - register8_t AC1MUXCTRL; /* Comparator 1 MUX Control */ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t WINCTRL; /* Window Mode Control */ - register8_t STATUS; /* Status */ -} AC_t; - -/* Interrupt mode */ -typedef enum AC_INTMODE_enum -{ - AC_INTMODE_BOTHEDGES_gc = (0x00<<6), /* Interrupt on both edges */ - AC_INTMODE_FALLING_gc = (0x02<<6), /* Interrupt on falling edge */ - AC_INTMODE_RISING_gc = (0x03<<6), /* Interrupt on rising edge */ -} AC_INTMODE_t; - -/* Interrupt level */ -typedef enum AC_INTLVL_enum -{ - AC_INTLVL_OFF_gc = (0x00<<4), /* Interrupt disabled */ - AC_INTLVL_LO_gc = (0x01<<4), /* Low level */ - AC_INTLVL_MED_gc = (0x02<<4), /* Medium level */ - AC_INTLVL_HI_gc = (0x03<<4), /* High level */ -} AC_INTLVL_t; - -/* Hysteresis mode selection */ -typedef enum AC_HYSMODE_enum -{ - AC_HYSMODE_NO_gc = (0x00<<1), /* No hysteresis */ - AC_HYSMODE_SMALL_gc = (0x01<<1), /* Small hysteresis */ - AC_HYSMODE_LARGE_gc = (0x02<<1), /* Large hysteresis */ -} AC_HYSMODE_t; - -/* Positive input multiplexer selection */ -typedef enum AC_MUXPOS_enum -{ - AC_MUXPOS_PIN0_gc = (0x00<<3), /* Pin 0 */ - AC_MUXPOS_PIN1_gc = (0x01<<3), /* Pin 1 */ - AC_MUXPOS_PIN2_gc = (0x02<<3), /* Pin 2 */ - AC_MUXPOS_PIN3_gc = (0x03<<3), /* Pin 3 */ - AC_MUXPOS_PIN4_gc = (0x04<<3), /* Pin 4 */ - AC_MUXPOS_PIN5_gc = (0x05<<3), /* Pin 5 */ - AC_MUXPOS_PIN6_gc = (0x06<<3), /* Pin 6 */ - AC_MUXPOS_DAC_gc = (0x07<<3), /* DAC output */ -} AC_MUXPOS_t; - -/* Negative input multiplexer selection */ -typedef enum AC_MUXNEG_enum -{ - AC_MUXNEG_PIN0_gc = (0x00<<0), /* Pin 0 */ - AC_MUXNEG_PIN1_gc = (0x01<<0), /* Pin 1 */ - AC_MUXNEG_PIN3_gc = (0x02<<0), /* Pin 3 */ - AC_MUXNEG_PIN5_gc = (0x03<<0), /* Pin 5 */ - AC_MUXNEG_PIN7_gc = (0x04<<0), /* Pin 7 */ - AC_MUXNEG_DAC_gc = (0x05<<0), /* DAC output */ - AC_MUXNEG_BANDGAP_gc = (0x06<<0), /* Bandgap Reference */ - AC_MUXNEG_SCALER_gc = (0x07<<0), /* Internal voltage scaler */ -} AC_MUXNEG_t; - -/* Windows interrupt mode */ -typedef enum AC_WINTMODE_enum -{ - AC_WINTMODE_ABOVE_gc = (0x00<<2), /* Interrupt on above window */ - AC_WINTMODE_INSIDE_gc = (0x01<<2), /* Interrupt on inside window */ - AC_WINTMODE_BELOW_gc = (0x02<<2), /* Interrupt on below window */ - AC_WINTMODE_OUTSIDE_gc = (0x03<<2), /* Interrupt on outside window */ -} AC_WINTMODE_t; - -/* Window interrupt level */ -typedef enum AC_WINTLVL_enum -{ - AC_WINTLVL_OFF_gc = (0x00<<0), /* Interrupt disabled */ - AC_WINTLVL_LO_gc = (0x01<<0), /* Low priority */ - AC_WINTLVL_MED_gc = (0x02<<0), /* Medium priority */ - AC_WINTLVL_HI_gc = (0x03<<0), /* High priority */ -} AC_WINTLVL_t; - -/* Window mode state */ -typedef enum AC_WSTATE_enum -{ - AC_WSTATE_ABOVE_gc = (0x00<<6), /* Signal above window */ - AC_WSTATE_INSIDE_gc = (0x01<<6), /* Signal inside window */ - AC_WSTATE_BELOW_gc = (0x02<<6), /* Signal below window */ -} AC_WSTATE_t; - - -/* --------------------------------------------------------------------------- -ADC - Analog/Digital Converter --------------------------------------------------------------------------- -*/ - -/* ADC Channel */ -typedef struct ADC_CH_struct -{ - register8_t CTRL; /* Control Register */ - register8_t MUXCTRL; /* MUX Control */ - register8_t INTCTRL; /* Channel Interrupt Control */ - register8_t INTFLAGS; /* Interrupt Flags */ - _WORDREGISTER(RES); /* Channel Result */ - register8_t reserved_0x6; - register8_t reserved_0x7; -} ADC_CH_t; - -/* --------------------------------------------------------------------------- -ADC - Analog/Digital Converter --------------------------------------------------------------------------- -*/ - -/* Analog-to-Digital Converter */ -typedef struct ADC_struct -{ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t REFCTRL; /* Reference Control */ - register8_t EVCTRL; /* Event Control */ - register8_t PRESCALER; /* Clock Prescaler */ - register8_t CALCTRL; /* Calibration Control Register */ - register8_t INTFLAGS; /* Interrupt Flags */ - register8_t reserved_0x07; - register8_t reserved_0x08; - register8_t reserved_0x09; - register8_t reserved_0x0A; - register8_t reserved_0x0B; - register8_t CALIB; /* Calibration Value */ - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t reserved_0x0F; - _WORDREGISTER(CH0RES); /* Channel 0 Result */ - _WORDREGISTER(CH1RES); /* Channel 1 Result */ - _WORDREGISTER(CH2RES); /* Channel 2 Result */ - _WORDREGISTER(CH3RES); /* Channel 3 Result */ - _WORDREGISTER(CMP); /* Compare Value */ - register8_t reserved_0x1A; - register8_t reserved_0x1B; - register8_t reserved_0x1C; - register8_t reserved_0x1D; - register8_t reserved_0x1E; - register8_t reserved_0x1F; - ADC_CH_t CH0; /* ADC Channel 0 */ - ADC_CH_t CH1; /* ADC Channel 1 */ - ADC_CH_t CH2; /* ADC Channel 2 */ - ADC_CH_t CH3; /* ADC Channel 3 */ -} ADC_t; - -/* Positive input multiplexer selection */ -typedef enum ADC_CH_MUXPOS_enum -{ - ADC_CH_MUXPOS_PIN0_gc = (0x00<<3), /* Input pin 0 */ - ADC_CH_MUXPOS_PIN1_gc = (0x01<<3), /* Input pin 1 */ - ADC_CH_MUXPOS_PIN2_gc = (0x02<<3), /* Input pin 2 */ - ADC_CH_MUXPOS_PIN3_gc = (0x03<<3), /* Input pin 3 */ - ADC_CH_MUXPOS_PIN4_gc = (0x04<<3), /* Input pin 4 */ - ADC_CH_MUXPOS_PIN5_gc = (0x05<<3), /* Input pin 5 */ - ADC_CH_MUXPOS_PIN6_gc = (0x06<<3), /* Input pin 6 */ - ADC_CH_MUXPOS_PIN7_gc = (0x07<<3), /* Input pin 7 */ -} ADC_CH_MUXPOS_t; - -/* Internal input multiplexer selections */ -typedef enum ADC_CH_MUXINT_enum -{ - ADC_CH_MUXINT_TEMP_gc = (0x00<<3), /* Temperature Reference */ - ADC_CH_MUXINT_BANDGAP_gc = (0x01<<3), /* Bandgap Reference */ - ADC_CH_MUXINT_SCALEDVCC_gc = (0x02<<3), /* 1/10 scaled VCC */ - ADC_CH_MUXINT_DAC_gc = (0x03<<3), /* DAC output */ -} ADC_CH_MUXINT_t; - -/* Negative input multiplexer selection */ -typedef enum ADC_CH_MUXNEG_enum -{ - ADC_CH_MUXNEG_PIN0_gc = (0x00<<0), /* Input pin 0 */ - ADC_CH_MUXNEG_PIN1_gc = (0x01<<0), /* Input pin 1 */ - ADC_CH_MUXNEG_PIN2_gc = (0x02<<0), /* Input pin 2 */ - ADC_CH_MUXNEG_PIN3_gc = (0x03<<0), /* Input pin 3 */ - ADC_CH_MUXNEG_PIN4_gc = (0x04<<0), /* Input pin 4 */ - ADC_CH_MUXNEG_PIN5_gc = (0x05<<0), /* Input pin 5 */ - ADC_CH_MUXNEG_PIN6_gc = (0x06<<0), /* Input pin 6 */ - ADC_CH_MUXNEG_PIN7_gc = (0x07<<0), /* Input pin 7 */ -} ADC_CH_MUXNEG_t; - -/* Input mode */ -typedef enum ADC_CH_INPUTMODE_enum -{ - ADC_CH_INPUTMODE_INTERNAL_gc = (0x00<<0), /* Internal inputs, no gain */ - ADC_CH_INPUTMODE_SINGLEENDED_gc = (0x01<<0), /* Single-ended input, no gain */ - ADC_CH_INPUTMODE_DIFF_gc = (0x02<<0), /* Differential input, no gain */ - ADC_CH_INPUTMODE_DIFFWGAIN_gc = (0x03<<0), /* Differential input, with gain */ -} ADC_CH_INPUTMODE_t; - -/* Gain factor */ -typedef enum ADC_CH_GAIN_enum -{ - ADC_CH_GAIN_1X_gc = (0x00<<2), /* 1x gain */ - ADC_CH_GAIN_2X_gc = (0x01<<2), /* 2x gain */ - ADC_CH_GAIN_4X_gc = (0x02<<2), /* 4x gain */ - ADC_CH_GAIN_8X_gc = (0x03<<2), /* 8x gain */ - ADC_CH_GAIN_16X_gc = (0x04<<2), /* 16x gain */ - ADC_CH_GAIN_32X_gc = (0x05<<2), /* 32x gain */ - ADC_CH_GAIN_64X_gc = (0x06<<2), /* 64x gain */ -} ADC_CH_GAIN_t; - -/* Conversion result resolution */ -typedef enum ADC_RESOLUTION_enum -{ - ADC_RESOLUTION_12BIT_gc = (0x00<<1), /* 12-bit right-adjusted result */ - ADC_RESOLUTION_8BIT_gc = (0x02<<1), /* 8-bit right-adjusted result */ - ADC_RESOLUTION_LEFT12BIT_gc = (0x03<<1), /* 12-bit left-adjusted result */ -} ADC_RESOLUTION_t; - -/* Voltage reference selection */ -typedef enum ADC_REFSEL_enum -{ - ADC_REFSEL_INT1V_gc = (0x00<<4), /* Internal 1V */ - ADC_REFSEL_VCC_gc = (0x01<<4), /* Internal VCC / 1.6V */ - ADC_REFSEL_AREFA_gc = (0x02<<4), /* External reference on PORT A */ - ADC_REFSEL_AREFB_gc = (0x03<<4), /* External reference on PORT B */ -} ADC_REFSEL_t; - -/* Channel sweep selection */ -typedef enum ADC_SWEEP_enum -{ - ADC_SWEEP_0_gc = (0x00<<6), /* ADC Channel 0 */ - ADC_SWEEP_01_gc = (0x01<<6), /* ADC Channel 0,1 */ - ADC_SWEEP_012_gc = (0x02<<6), /* ADC Channel 0,1,2 */ - ADC_SWEEP_0123_gc = (0x03<<6), /* ADC Channel 0,1,2,3 */ -} ADC_SWEEP_t; - -/* Event channel input selection */ -typedef enum ADC_EVSEL_enum -{ - ADC_EVSEL_0123_gc = (0x00<<3), /* Event Channel 0,1,2,3 */ - ADC_EVSEL_1234_gc = (0x01<<3), /* Event Channel 1,2,3,4 */ - ADC_EVSEL_2345_gc = (0x02<<3), /* Event Channel 2,3,4,5 */ - ADC_EVSEL_3456_gc = (0x03<<3), /* Event Channel 3,4,5,6 */ - ADC_EVSEL_4567_gc = (0x04<<3), /* Event Channel 4,5,6,7 */ - ADC_EVSEL_567_gc = (0x05<<3), /* Event Channel 5,6,7 */ - ADC_EVSEL_67_gc = (0x06<<3), /* Event Channel 6,7 */ - ADC_EVSEL_7_gc = (0x07<<3), /* Event Channel 7 */ -} ADC_EVSEL_t; - -/* Event action selection */ -typedef enum ADC_EVACT_enum -{ - ADC_EVACT_NONE_gc = (0x00<<0), /* No event action */ - ADC_EVACT_CH0_gc = (0x01<<0), /* First event triggers channel 0 */ - ADC_EVACT_CH01_gc = (0x02<<0), /* First two events trigger channel 0,1 */ - ADC_EVACT_CH012_gc = (0x03<<0), /* First three events trigger channel 0,1,2 */ - ADC_EVACT_CH0123_gc = (0x04<<0), /* Events trigger channel 0,1,2,3 */ - ADC_EVACT_SWEEP_gc = (0x05<<0), /* First event triggers sweep */ - ADC_EVACT_SYNCHSWEEP_gc = (0x06<<0), /* First event triggers synchronized sweep */ -} ADC_EVACT_t; - -/* Interupt mode */ -typedef enum ADC_CH_INTMODE_enum -{ - ADC_CH_INTMODE_COMPLETE_gc = (0x00<<2), /* Interrupt on conversion complete */ - ADC_CH_INTMODE_BELOW_gc = (0x01<<2), /* Interrupt on result below compare value */ - ADC_CH_INTMODE_ABOVE_gc = (0x03<<2), /* Interrupt on result above compare value */ -} ADC_CH_INTMODE_t; - -/* Interrupt level */ -typedef enum ADC_CH_INTLVL_enum -{ - ADC_CH_INTLVL_OFF_gc = (0x00<<0), /* Interrupt disabled */ - ADC_CH_INTLVL_LO_gc = (0x01<<0), /* Low level */ - ADC_CH_INTLVL_MED_gc = (0x02<<0), /* Medium level */ - ADC_CH_INTLVL_HI_gc = (0x03<<0), /* High level */ -} ADC_CH_INTLVL_t; - -/* DMA request selection */ -typedef enum ADC_DMASEL_enum -{ - ADC_DMASEL_OFF_gc = (0x00<<5), /* Combined DMA request OFF */ - ADC_DMASEL_CH01_gc = (0x01<<5), /* ADC Channel 0 or 1 */ - ADC_DMASEL_CH012_gc = (0x02<<5), /* ADC Channel 0 or 1 or 2 */ - ADC_DMASEL_CH0123_gc = (0x03<<5), /* ADC Channel 0 or 1 or 2 or 3 */ -} ADC_DMASEL_t; - -/* Clock prescaler */ -typedef enum ADC_PRESCALER_enum -{ - ADC_PRESCALER_DIV4_gc = (0x00<<0), /* Divide clock by 4 */ - ADC_PRESCALER_DIV8_gc = (0x01<<0), /* Divide clock by 8 */ - ADC_PRESCALER_DIV16_gc = (0x02<<0), /* Divide clock by 16 */ - ADC_PRESCALER_DIV32_gc = (0x03<<0), /* Divide clock by 32 */ - ADC_PRESCALER_DIV64_gc = (0x04<<0), /* Divide clock by 64 */ - ADC_PRESCALER_DIV128_gc = (0x05<<0), /* Divide clock by 128 */ - ADC_PRESCALER_DIV256_gc = (0x06<<0), /* Divide clock by 256 */ - ADC_PRESCALER_DIV512_gc = (0x07<<0), /* Divide clock by 512 */ -} ADC_PRESCALER_t; - - -/* --------------------------------------------------------------------------- -DAC - Digital/Analog Converter --------------------------------------------------------------------------- -*/ - -/* Digital-to-Analog Converter */ -typedef struct DAC_struct -{ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t CTRLC; /* Control Register C */ - register8_t EVCTRL; /* Event Input Control */ - register8_t TIMCTRL; /* Timing Control */ - register8_t STATUS; /* Status */ - register8_t reserved_0x06; - register8_t reserved_0x07; - register8_t GAINCAL; /* Gain Calibration */ - register8_t OFFSETCAL; /* Offset Calibration */ - register8_t reserved_0x0A; - register8_t reserved_0x0B; - register8_t reserved_0x0C; - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t reserved_0x0F; - register8_t reserved_0x10; - register8_t reserved_0x11; - register8_t reserved_0x12; - register8_t reserved_0x13; - register8_t reserved_0x14; - register8_t reserved_0x15; - register8_t reserved_0x16; - register8_t reserved_0x17; - _WORDREGISTER(CH0DATA); /* Channel 0 Data */ - _WORDREGISTER(CH1DATA); /* Channel 1 Data */ -} DAC_t; - -/* Output channel selection */ -typedef enum DAC_CHSEL_enum -{ - DAC_CHSEL_SINGLE_gc = (0x00<<5), /* Single channel operation (Channel A only) */ - DAC_CHSEL_DUAL_gc = (0x02<<5), /* Dual channel operation (S/H on both channels) */ -} DAC_CHSEL_t; - -/* Reference voltage selection */ -typedef enum DAC_REFSEL_enum -{ - DAC_REFSEL_INT1V_gc = (0x00<<3), /* Internal 1V */ - DAC_REFSEL_AVCC_gc = (0x01<<3), /* Analog supply voltage */ - DAC_REFSEL_AREFA_gc = (0x02<<3), /* External reference on AREF on PORTA */ - DAC_REFSEL_AREFB_gc = (0x03<<3), /* External reference on AREF on PORTB */ -} DAC_REFSEL_t; - -/* Event channel selection */ -typedef enum DAC_EVSEL_enum -{ - DAC_EVSEL_0_gc = (0x00<<0), /* Event Channel 0 */ - DAC_EVSEL_1_gc = (0x01<<0), /* Event Channel 1 */ - DAC_EVSEL_2_gc = (0x02<<0), /* Event Channel 2 */ - DAC_EVSEL_3_gc = (0x03<<0), /* Event Channel 3 */ - DAC_EVSEL_4_gc = (0x04<<0), /* Event Channel 4 */ - DAC_EVSEL_5_gc = (0x05<<0), /* Event Channel 5 */ - DAC_EVSEL_6_gc = (0x06<<0), /* Event Channel 6 */ - DAC_EVSEL_7_gc = (0x07<<0), /* Event Channel 7 */ -} DAC_EVSEL_t; - -/* Conversion interval */ -typedef enum DAC_CONINTVAL_enum -{ - DAC_CONINTVAL_1CLK_gc = (0x00<<4), /* 1 CLK / 2 CLK in S/H mode */ - DAC_CONINTVAL_2CLK_gc = (0x01<<4), /* 2 CLK / 3 CLK in S/H mode */ - DAC_CONINTVAL_4CLK_gc = (0x02<<4), /* 4 CLK / 6 CLK in S/H mode */ - DAC_CONINTVAL_8CLK_gc = (0x03<<4), /* 8 CLK / 12 CLK in S/H mode */ - DAC_CONINTVAL_16CLK_gc = (0x04<<4), /* 16 CLK / 24 CLK in S/H mode */ - DAC_CONINTVAL_32CLK_gc = (0x05<<4), /* 32 CLK / 48 CLK in S/H mode */ - DAC_CONINTVAL_64CLK_gc = (0x06<<4), /* 64 CLK / 96 CLK in S/H mode */ - DAC_CONINTVAL_128CLK_gc = (0x07<<4), /* 128 CLK / 192 CLK in S/H mode */ -} DAC_CONINTVAL_t; - -/* Refresh rate */ -typedef enum DAC_REFRESH_enum -{ - DAC_REFRESH_16CLK_gc = (0x00<<0), /* 16 CLK */ - DAC_REFRESH_32CLK_gc = (0x01<<0), /* 32 CLK */ - DAC_REFRESH_64CLK_gc = (0x02<<0), /* 64 CLK */ - DAC_REFRESH_128CLK_gc = (0x03<<0), /* 128 CLK */ - DAC_REFRESH_256CLK_gc = (0x04<<0), /* 256 CLK */ - DAC_REFRESH_512CLK_gc = (0x05<<0), /* 512 CLK */ - DAC_REFRESH_1024CLK_gc = (0x06<<0), /* 1024 CLK */ - DAC_REFRESH_2048CLK_gc = (0x07<<0), /* 2048 CLK */ - DAC_REFRESH_4086CLK_gc = (0x08<<0), /* 4096 CLK */ - DAC_REFRESH_8192CLK_gc = (0x09<<0), /* 8192 CLK */ - DAC_REFRESH_16384CLK_gc = (0x0A<<0), /* 16384 CLK */ - DAC_REFRESH_32768CLK_gc = (0x0B<<0), /* 32768 CLK */ - DAC_REFRESH_65536CLK_gc = (0x0C<<0), /* 65536 CLK */ - DAC_REFRESH_OFF_gc = (0x0F<<0), /* Auto refresh OFF */ -} DAC_REFRESH_t; - - -/* --------------------------------------------------------------------------- -RTC - Real-Time Clounter --------------------------------------------------------------------------- -*/ - -/* Real-Time Counter */ -typedef struct RTC_struct -{ - register8_t CTRL; /* Control Register */ - register8_t STATUS; /* Status Register */ - register8_t INTCTRL; /* Interrupt Control Register */ - register8_t INTFLAGS; /* Interrupt Flags */ - register8_t TEMP; /* Temporary register */ - register8_t reserved_0x05; - register8_t reserved_0x06; - register8_t reserved_0x07; - _WORDREGISTER(CNT); /* Count Register */ - _WORDREGISTER(PER); /* Period Register */ - _WORDREGISTER(COMP); /* Compare Register */ -} RTC_t; - -/* Prescaler Factor */ -typedef enum RTC_PRESCALER_enum -{ - RTC_PRESCALER_OFF_gc = (0x00<<0), /* RTC Off */ - RTC_PRESCALER_DIV1_gc = (0x01<<0), /* RTC Clock */ - RTC_PRESCALER_DIV2_gc = (0x02<<0), /* RTC Clock / 2 */ - RTC_PRESCALER_DIV8_gc = (0x03<<0), /* RTC Clock / 8 */ - RTC_PRESCALER_DIV16_gc = (0x04<<0), /* RTC Clock / 16 */ - RTC_PRESCALER_DIV64_gc = (0x05<<0), /* RTC Clock / 64 */ - RTC_PRESCALER_DIV256_gc = (0x06<<0), /* RTC Clock / 256 */ - RTC_PRESCALER_DIV1024_gc = (0x07<<0), /* RTC Clock / 1024 */ -} RTC_PRESCALER_t; - -/* Compare Interrupt level */ -typedef enum RTC_COMPINTLVL_enum -{ - RTC_COMPINTLVL_OFF_gc = (0x00<<2), /* Interrupt Disabled */ - RTC_COMPINTLVL_LO_gc = (0x01<<2), /* Low Level */ - RTC_COMPINTLVL_MED_gc = (0x02<<2), /* Medium Level */ - RTC_COMPINTLVL_HI_gc = (0x03<<2), /* High Level */ -} RTC_COMPINTLVL_t; - -/* Overflow Interrupt level */ -typedef enum RTC_OVFINTLVL_enum -{ - RTC_OVFINTLVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - RTC_OVFINTLVL_LO_gc = (0x01<<0), /* Low Level */ - RTC_OVFINTLVL_MED_gc = (0x02<<0), /* Medium Level */ - RTC_OVFINTLVL_HI_gc = (0x03<<0), /* High Level */ -} RTC_OVFINTLVL_t; - - -/* --------------------------------------------------------------------------- -EBI - External Bus Interface --------------------------------------------------------------------------- -*/ - -/* EBI Chip Select Module */ -typedef struct EBI_CS_struct -{ - register8_t CTRLA; /* Chip Select Control Register A */ - register8_t CTRLB; /* Chip Select Control Register B */ - _WORDREGISTER(BASEADDR); /* Chip Select Base Address */ -} EBI_CS_t; - -/* --------------------------------------------------------------------------- -EBI - External Bus Interface --------------------------------------------------------------------------- -*/ - -/* External Bus Interface */ -typedef struct EBI_struct -{ - register8_t CTRL; /* Control */ - register8_t SDRAMCTRLA; /* SDRAM Control Register A */ - register8_t reserved_0x02; - register8_t reserved_0x03; - _WORDREGISTER(REFRESH); /* SDRAM Refresh Period */ - _WORDREGISTER(INITDLY); /* SDRAM Initialization Delay */ - register8_t SDRAMCTRLB; /* SDRAM Control Register B */ - register8_t SDRAMCTRLC; /* SDRAM Control Register C */ - register8_t reserved_0x0A; - register8_t reserved_0x0B; - register8_t reserved_0x0C; - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t reserved_0x0F; - EBI_CS_t CS0; /* Chip Select 0 */ - EBI_CS_t CS1; /* Chip Select 1 */ - EBI_CS_t CS2; /* Chip Select 2 */ - EBI_CS_t CS3; /* Chip Select 3 */ -} EBI_t; - -/* Chip Select adress space */ -typedef enum EBI_CS_ASPACE_enum -{ - EBI_CS_ASPACE_256B_gc = (0x00<<2), /* 256 bytes */ - EBI_CS_ASPACE_512B_gc = (0x01<<2), /* 512 bytes */ - EBI_CS_ASPACE_1KB_gc = (0x02<<2), /* 1K bytes */ - EBI_CS_ASPACE_2KB_gc = (0x03<<2), /* 2K bytes */ - EBI_CS_ASPACE_4KB_gc = (0x04<<2), /* 4K bytes */ - EBI_CS_ASPACE_8KB_gc = (0x05<<2), /* 8K bytes */ - EBI_CS_ASPACE_16KB_gc = (0x06<<2), /* 16K bytes */ - EBI_CS_ASPACE_32KB_gc = (0x07<<2), /* 32K bytes */ - EBI_CS_ASPACE_64KB_gc = (0x08<<2), /* 64K bytes */ - EBI_CS_ASPACE_128KB_gc = (0x09<<2), /* 128K bytes */ - EBI_CS_ASPACE_256KB_gc = (0x0A<<2), /* 256K bytes */ - EBI_CS_ASPACE_512KB_gc = (0x0B<<2), /* 512K bytes */ - EBI_CS_ASPACE_1MB_gc = (0x0C<<2), /* 1M bytes */ - EBI_CS_ASPACE_2MB_gc = (0x0D<<2), /* 2M bytes */ - EBI_CS_ASPACE_4MB_gc = (0x0E<<2), /* 4M bytes */ - EBI_CS_ASPACE_8MB_gc = (0x0F<<2), /* 8M bytes */ - EBI_CS_ASPACE_16M_gc = (0x10<<2), /* 16M bytes */ -} EBI_CS_ASPACE_t; - -/* */ -typedef enum EBI_CS_SRWS_enum -{ - EBI_CS_SRWS_0CLK_gc = (0x00<<0), /* 0 cycles */ - EBI_CS_SRWS_1CLK_gc = (0x01<<0), /* 1 cycle */ - EBI_CS_SRWS_2CLK_gc = (0x02<<0), /* 2 cycles */ - EBI_CS_SRWS_3CLK_gc = (0x03<<0), /* 3 cycles */ - EBI_CS_SRWS_4CLK_gc = (0x04<<0), /* 4 cycles */ - EBI_CS_SRWS_5CLK_gc = (0x05<<0), /* 5 cycle */ - EBI_CS_SRWS_6CLK_gc = (0x06<<0), /* 6 cycles */ - EBI_CS_SRWS_7CLK_gc = (0x07<<0), /* 7 cycles */ -} EBI_CS_SRWS_t; - -/* Chip Select address mode */ -typedef enum EBI_CS_MODE_enum -{ - EBI_CS_MODE_DISABLED_gc = (0x00<<0), /* Chip Select Disabled */ - EBI_CS_MODE_SRAM_gc = (0x01<<0), /* Chip Select in SRAM mode */ - EBI_CS_MODE_LPC_gc = (0x02<<0), /* Chip Select in SRAM LPC mode */ - EBI_CS_MODE_SDRAM_gc = (0x03<<0), /* Chip Select in SDRAM mode */ -} EBI_CS_MODE_t; - -/* Chip Select SDRAM mode */ -typedef enum EBI_CS_SDMODE_enum -{ - EBI_CS_SDMODE_NORMAL_gc = (0x00<<0), /* Normal mode */ - EBI_CS_SDMODE_LOAD_gc = (0x01<<0), /* Load Mode Register command mode */ -} EBI_CS_SDMODE_t; - -/* */ -typedef enum EBI_SDDATAW_enum -{ - EBI_SDDATAW_4BIT_gc = (0x00<<6), /* 4-bit data bus */ - EBI_SDDATAW_8BIT_gc = (0x01<<6), /* 8-bit data bus */ -} EBI_SDDATAW_t; - -/* */ -typedef enum EBI_LPCMODE_enum -{ - EBI_LPCMODE_ALE1_gc = (0x00<<4), /* Data muxed with addr byte 0 */ - EBI_LPCMODE_ALE12_gc = (0x02<<4), /* Data muxed with addr byte 0 and 1 */ -} EBI_LPCMODE_t; - -/* */ -typedef enum EBI_SRMODE_enum -{ - EBI_SRMODE_ALE1_gc = (0x00<<2), /* Addr byte 0 muxed with 1 */ - EBI_SRMODE_ALE2_gc = (0x01<<2), /* Addr byte 0 muxed with 2 */ - EBI_SRMODE_ALE12_gc = (0x02<<2), /* Addr byte 0 muxed with 1 and 2 */ - EBI_SRMODE_NOALE_gc = (0x03<<2), /* No addr muxing */ -} EBI_SRMODE_t; - -/* */ -typedef enum EBI_IFMODE_enum -{ - EBI_IFMODE_DISABLED_gc = (0x00<<0), /* EBI Disabled */ - EBI_IFMODE_3PORT_gc = (0x01<<0), /* 3-port mode */ - EBI_IFMODE_4PORT_gc = (0x02<<0), /* 4-port mode */ - EBI_IFMODE_2PORT_gc = (0x03<<0), /* 2-port mode */ -} EBI_IFMODE_t; - -/* */ -typedef enum EBI_SDCOL_enum -{ - EBI_SDCOL_8BIT_gc = (0x00<<0), /* 8 column bits */ - EBI_SDCOL_9BIT_gc = (0x01<<0), /* 9 column bits */ - EBI_SDCOL_10BIT_gc = (0x02<<0), /* 10 column bits */ - EBI_SDCOL_11BIT_gc = (0x03<<0), /* 11 column bits */ -} EBI_SDCOL_t; - -/* */ -typedef enum EBI_MRDLY_enum -{ - EBI_MRDLY_0CLK_gc = (0x00<<6), /* 0 cycles */ - EBI_MRDLY_1CLK_gc = (0x01<<6), /* 1 cycle */ - EBI_MRDLY_2CLK_gc = (0x02<<6), /* 2 cycles */ - EBI_MRDLY_3CLK_gc = (0x03<<6), /* 3 cycles */ -} EBI_MRDLY_t; - -/* */ -typedef enum EBI_ROWCYCDLY_enum -{ - EBI_ROWCYCDLY_0CLK_gc = (0x00<<3), /* 0 cycles */ - EBI_ROWCYCDLY_1CLK_gc = (0x01<<3), /* 1 cycle */ - EBI_ROWCYCDLY_2CLK_gc = (0x02<<3), /* 2 cycles */ - EBI_ROWCYCDLY_3CLK_gc = (0x03<<3), /* 3 cycles */ - EBI_ROWCYCDLY_4CLK_gc = (0x04<<3), /* 4 cycles */ - EBI_ROWCYCDLY_5CLK_gc = (0x05<<3), /* 5 cycle */ - EBI_ROWCYCDLY_6CLK_gc = (0x06<<3), /* 6 cycles */ - EBI_ROWCYCDLY_7CLK_gc = (0x07<<3), /* 7 cycles */ -} EBI_ROWCYCDLY_t; - -/* */ -typedef enum EBI_RPDLY_enum -{ - EBI_RPDLY_0CLK_gc = (0x00<<0), /* 0 cycles */ - EBI_RPDLY_1CLK_gc = (0x01<<0), /* 1 cycle */ - EBI_RPDLY_2CLK_gc = (0x02<<0), /* 2 cycles */ - EBI_RPDLY_3CLK_gc = (0x03<<0), /* 3 cycles */ - EBI_RPDLY_4CLK_gc = (0x04<<0), /* 4 cycles */ - EBI_RPDLY_5CLK_gc = (0x05<<0), /* 5 cycle */ - EBI_RPDLY_6CLK_gc = (0x06<<0), /* 6 cycles */ - EBI_RPDLY_7CLK_gc = (0x07<<0), /* 7 cycles */ -} EBI_RPDLY_t; - -/* */ -typedef enum EBI_WRDLY_enum -{ - EBI_WRDLY_0CLK_gc = (0x00<<6), /* 0 cycles */ - EBI_WRDLY_1CLK_gc = (0x01<<6), /* 1 cycle */ - EBI_WRDLY_2CLK_gc = (0x02<<6), /* 2 cycles */ - EBI_WRDLY_3CLK_gc = (0x03<<6), /* 3 cycles */ -} EBI_WRDLY_t; - -/* */ -typedef enum EBI_ESRDLY_enum -{ - EBI_ESRDLY_0CLK_gc = (0x00<<3), /* 0 cycles */ - EBI_ESRDLY_1CLK_gc = (0x01<<3), /* 1 cycle */ - EBI_ESRDLY_2CLK_gc = (0x02<<3), /* 2 cycles */ - EBI_ESRDLY_3CLK_gc = (0x03<<3), /* 3 cycles */ - EBI_ESRDLY_4CLK_gc = (0x04<<3), /* 4 cycles */ - EBI_ESRDLY_5CLK_gc = (0x05<<3), /* 5 cycle */ - EBI_ESRDLY_6CLK_gc = (0x06<<3), /* 6 cycles */ - EBI_ESRDLY_7CLK_gc = (0x07<<3), /* 7 cycles */ -} EBI_ESRDLY_t; - -/* */ -typedef enum EBI_ROWCOLDLY_enum -{ - EBI_ROWCOLDLY_0CLK_gc = (0x00<<0), /* 0 cycles */ - EBI_ROWCOLDLY_1CLK_gc = (0x01<<0), /* 1 cycle */ - EBI_ROWCOLDLY_2CLK_gc = (0x02<<0), /* 2 cycles */ - EBI_ROWCOLDLY_3CLK_gc = (0x03<<0), /* 3 cycles */ - EBI_ROWCOLDLY_4CLK_gc = (0x04<<0), /* 4 cycles */ - EBI_ROWCOLDLY_5CLK_gc = (0x05<<0), /* 5 cycle */ - EBI_ROWCOLDLY_6CLK_gc = (0x06<<0), /* 6 cycles */ - EBI_ROWCOLDLY_7CLK_gc = (0x07<<0), /* 7 cycles */ -} EBI_ROWCOLDLY_t; - - -/* --------------------------------------------------------------------------- -TWI - Two-Wire Interface --------------------------------------------------------------------------- -*/ - -/* */ -typedef struct TWI_MASTER_struct -{ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t CTRLC; /* Control Register C */ - register8_t STATUS; /* Status Register */ - register8_t BAUD; /* Baurd Rate Control Register */ - register8_t ADDR; /* Address Register */ - register8_t DATA; /* Data Register */ -} TWI_MASTER_t; - -/* --------------------------------------------------------------------------- -TWI - Two-Wire Interface --------------------------------------------------------------------------- -*/ - -/* */ -typedef struct TWI_SLAVE_struct -{ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t STATUS; /* Status Register */ - register8_t ADDR; /* Address Register */ - register8_t DATA; /* Data Register */ -} TWI_SLAVE_t; - -/* --------------------------------------------------------------------------- -TWI - Two-Wire Interface --------------------------------------------------------------------------- -*/ - -/* Two-Wire Interface */ -typedef struct TWI_struct -{ - register8_t CTRL; /* TWI Common Control Register */ - TWI_MASTER_t MASTER; /* TWI master module */ - TWI_SLAVE_t SLAVE; /* TWI slave module */ -} TWI_t; - -/* Master Interrupt Level */ -typedef enum TWI_MASTER_INTLVL_enum -{ - TWI_MASTER_INTLVL_OFF_gc = (0x00<<6), /* Interrupt Disabled */ - TWI_MASTER_INTLVL_LO_gc = (0x01<<6), /* Low Level */ - TWI_MASTER_INTLVL_MED_gc = (0x02<<6), /* Medium Level */ - TWI_MASTER_INTLVL_HI_gc = (0x03<<6), /* High Level */ -} TWI_MASTER_INTLVL_t; - -/* Inactive Timeout */ -typedef enum TWI_MASTER_TIMEOUT_enum -{ - TWI_MASTER_TIMEOUT_DISABLED_gc = (0x00<<2), /* Bus Timeout Disabled */ - TWI_MASTER_TIMEOUT_50US_gc = (0x01<<2), /* 50 Microseconds */ - TWI_MASTER_TIMEOUT_100US_gc = (0x02<<2), /* 100 Microseconds */ - TWI_MASTER_TIMEOUT_200US_gc = (0x03<<2), /* 200 Microseconds */ -} TWI_MASTER_TIMEOUT_t; - -/* Master Command */ -typedef enum TWI_MASTER_CMD_enum -{ - TWI_MASTER_CMD_NOACT_gc = (0x00<<0), /* No Action */ - TWI_MASTER_CMD_REPSTART_gc = (0x01<<0), /* Issue Repeated Start Condition */ - TWI_MASTER_CMD_RECVTRANS_gc = (0x02<<0), /* Receive or Transmit Data */ - TWI_MASTER_CMD_STOP_gc = (0x03<<0), /* Issue Stop Condition */ -} TWI_MASTER_CMD_t; - -/* Master Bus State */ -typedef enum TWI_MASTER_BUSSTATE_enum -{ - TWI_MASTER_BUSSTATE_UNKNOWN_gc = (0x00<<0), /* Unknown Bus State */ - TWI_MASTER_BUSSTATE_IDLE_gc = (0x01<<0), /* Bus is Idle */ - TWI_MASTER_BUSSTATE_OWNER_gc = (0x02<<0), /* This Module Controls The Bus */ - TWI_MASTER_BUSSTATE_BUSY_gc = (0x03<<0), /* The Bus is Busy */ -} TWI_MASTER_BUSSTATE_t; - -/* Slave Interrupt Level */ -typedef enum TWI_SLAVE_INTLVL_enum -{ - TWI_SLAVE_INTLVL_OFF_gc = (0x00<<6), /* Interrupt Disabled */ - TWI_SLAVE_INTLVL_LO_gc = (0x01<<6), /* Low Level */ - TWI_SLAVE_INTLVL_MED_gc = (0x02<<6), /* Medium Level */ - TWI_SLAVE_INTLVL_HI_gc = (0x03<<6), /* High Level */ -} TWI_SLAVE_INTLVL_t; - -/* Slave Command */ -typedef enum TWI_SLAVE_CMD_enum -{ - TWI_SLAVE_CMD_NOACT_gc = (0x00<<0), /* No Action */ - TWI_SLAVE_CMD_COMPTRANS_gc = (0x02<<0), /* Used To Complete a Transaction */ - TWI_SLAVE_CMD_RESPONSE_gc = (0x03<<0), /* Used in Response to Address/Data Interrupt */ -} TWI_SLAVE_CMD_t; - - -/* --------------------------------------------------------------------------- -PORT - Port Configuration --------------------------------------------------------------------------- -*/ - -/* I/O port Configuration */ -typedef struct PORTCFG_struct -{ - register8_t MPCMASK; /* Multi-pin Configuration Mask */ - register8_t reserved_0x01; - register8_t VPCTRLA; /* Virtual Port Control Register A */ - register8_t VPCTRLB; /* Virtual Port Control Register B */ - register8_t CLKEVOUT; /* Clock and Event Out Register */ -} PORTCFG_t; - -/* --------------------------------------------------------------------------- -PORT - Port Configuration --------------------------------------------------------------------------- -*/ - -/* Virtual Port */ -typedef struct VPORT_struct -{ - register8_t DIR; /* I/O Port Data Direction */ - register8_t OUT; /* I/O Port Output */ - register8_t IN; /* I/O Port Input */ - register8_t INTFLAGS; /* Interrupt Flag Register */ -} VPORT_t; - -/* --------------------------------------------------------------------------- -PORT - Port Configuration --------------------------------------------------------------------------- -*/ - -/* I/O Ports */ -typedef struct PORT_struct -{ - register8_t DIR; /* I/O Port Data Direction */ - register8_t DIRSET; /* I/O Port Data Direction Set */ - register8_t DIRCLR; /* I/O Port Data Direction Clear */ - register8_t DIRTGL; /* I/O Port Data Direction Toggle */ - register8_t OUT; /* I/O Port Output */ - register8_t OUTSET; /* I/O Port Output Set */ - register8_t OUTCLR; /* I/O Port Output Clear */ - register8_t OUTTGL; /* I/O Port Output Toggle */ - register8_t IN; /* I/O port Input */ - register8_t INTCTRL; /* Interrupt Control Register */ - register8_t INT0MASK; /* Port Interrupt 0 Mask */ - register8_t INT1MASK; /* Port Interrupt 1 Mask */ - register8_t INTFLAGS; /* Interrupt Flag Register */ - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t reserved_0x0F; - register8_t PIN0CTRL; /* Pin 0 Control Register */ - register8_t PIN1CTRL; /* Pin 1 Control Register */ - register8_t PIN2CTRL; /* Pin 2 Control Register */ - register8_t PIN3CTRL; /* Pin 3 Control Register */ - register8_t PIN4CTRL; /* Pin 4 Control Register */ - register8_t PIN5CTRL; /* Pin 5 Control Register */ - register8_t PIN6CTRL; /* Pin 6 Control Register */ - register8_t PIN7CTRL; /* Pin 7 Control Register */ -} PORT_t; - -/* Virtual Port 0 Mapping */ -typedef enum PORTCFG_VP0MAP_enum -{ - PORTCFG_VP0MAP_PORTA_gc = (0x00<<0), /* Mapped To PORTA */ - PORTCFG_VP0MAP_PORTB_gc = (0x01<<0), /* Mapped To PORTB */ - PORTCFG_VP0MAP_PORTC_gc = (0x02<<0), /* Mapped To PORTC */ - PORTCFG_VP0MAP_PORTD_gc = (0x03<<0), /* Mapped To PORTD */ - PORTCFG_VP0MAP_PORTE_gc = (0x04<<0), /* Mapped To PORTE */ - PORTCFG_VP0MAP_PORTF_gc = (0x05<<0), /* Mapped To PORTF */ - PORTCFG_VP0MAP_PORTG_gc = (0x06<<0), /* Mapped To PORTG */ - PORTCFG_VP0MAP_PORTH_gc = (0x07<<0), /* Mapped To PORTH */ - PORTCFG_VP0MAP_PORTJ_gc = (0x08<<0), /* Mapped To PORTJ */ - PORTCFG_VP0MAP_PORTK_gc = (0x09<<0), /* Mapped To PORTK */ - PORTCFG_VP0MAP_PORTL_gc = (0x0A<<0), /* Mapped To PORTL */ - PORTCFG_VP0MAP_PORTM_gc = (0x0B<<0), /* Mapped To PORTM */ - PORTCFG_VP0MAP_PORTN_gc = (0x0C<<0), /* Mapped To PORTN */ - PORTCFG_VP0MAP_PORTP_gc = (0x0D<<0), /* Mapped To PORTP */ - PORTCFG_VP0MAP_PORTQ_gc = (0x0E<<0), /* Mapped To PORTQ */ - PORTCFG_VP0MAP_PORTR_gc = (0x0F<<0), /* Mapped To PORTR */ -} PORTCFG_VP0MAP_t; - -/* Virtual Port 1 Mapping */ -typedef enum PORTCFG_VP1MAP_enum -{ - PORTCFG_VP1MAP_PORTA_gc = (0x00<<4), /* Mapped To PORTA */ - PORTCFG_VP1MAP_PORTB_gc = (0x01<<4), /* Mapped To PORTB */ - PORTCFG_VP1MAP_PORTC_gc = (0x02<<4), /* Mapped To PORTC */ - PORTCFG_VP1MAP_PORTD_gc = (0x03<<4), /* Mapped To PORTD */ - PORTCFG_VP1MAP_PORTE_gc = (0x04<<4), /* Mapped To PORTE */ - PORTCFG_VP1MAP_PORTF_gc = (0x05<<4), /* Mapped To PORTF */ - PORTCFG_VP1MAP_PORTG_gc = (0x06<<4), /* Mapped To PORTG */ - PORTCFG_VP1MAP_PORTH_gc = (0x07<<4), /* Mapped To PORTH */ - PORTCFG_VP1MAP_PORTJ_gc = (0x08<<4), /* Mapped To PORTJ */ - PORTCFG_VP1MAP_PORTK_gc = (0x09<<4), /* Mapped To PORTK */ - PORTCFG_VP1MAP_PORTL_gc = (0x0A<<4), /* Mapped To PORTL */ - PORTCFG_VP1MAP_PORTM_gc = (0x0B<<4), /* Mapped To PORTM */ - PORTCFG_VP1MAP_PORTN_gc = (0x0C<<4), /* Mapped To PORTN */ - PORTCFG_VP1MAP_PORTP_gc = (0x0D<<4), /* Mapped To PORTP */ - PORTCFG_VP1MAP_PORTQ_gc = (0x0E<<4), /* Mapped To PORTQ */ - PORTCFG_VP1MAP_PORTR_gc = (0x0F<<4), /* Mapped To PORTR */ -} PORTCFG_VP1MAP_t; - -/* Virtual Port 2 Mapping */ -typedef enum PORTCFG_VP2MAP_enum -{ - PORTCFG_VP2MAP_PORTA_gc = (0x00<<0), /* Mapped To PORTA */ - PORTCFG_VP2MAP_PORTB_gc = (0x01<<0), /* Mapped To PORTB */ - PORTCFG_VP2MAP_PORTC_gc = (0x02<<0), /* Mapped To PORTC */ - PORTCFG_VP2MAP_PORTD_gc = (0x03<<0), /* Mapped To PORTD */ - PORTCFG_VP2MAP_PORTE_gc = (0x04<<0), /* Mapped To PORTE */ - PORTCFG_VP2MAP_PORTF_gc = (0x05<<0), /* Mapped To PORTF */ - PORTCFG_VP2MAP_PORTG_gc = (0x06<<0), /* Mapped To PORTG */ - PORTCFG_VP2MAP_PORTH_gc = (0x07<<0), /* Mapped To PORTH */ - PORTCFG_VP2MAP_PORTJ_gc = (0x08<<0), /* Mapped To PORTJ */ - PORTCFG_VP2MAP_PORTK_gc = (0x09<<0), /* Mapped To PORTK */ - PORTCFG_VP2MAP_PORTL_gc = (0x0A<<0), /* Mapped To PORTL */ - PORTCFG_VP2MAP_PORTM_gc = (0x0B<<0), /* Mapped To PORTM */ - PORTCFG_VP2MAP_PORTN_gc = (0x0C<<0), /* Mapped To PORTN */ - PORTCFG_VP2MAP_PORTP_gc = (0x0D<<0), /* Mapped To PORTP */ - PORTCFG_VP2MAP_PORTQ_gc = (0x0E<<0), /* Mapped To PORTQ */ - PORTCFG_VP2MAP_PORTR_gc = (0x0F<<0), /* Mapped To PORTR */ -} PORTCFG_VP2MAP_t; - -/* Virtual Port 3 Mapping */ -typedef enum PORTCFG_VP3MAP_enum -{ - PORTCFG_VP3MAP_PORTA_gc = (0x00<<4), /* Mapped To PORTA */ - PORTCFG_VP3MAP_PORTB_gc = (0x01<<4), /* Mapped To PORTB */ - PORTCFG_VP3MAP_PORTC_gc = (0x02<<4), /* Mapped To PORTC */ - PORTCFG_VP3MAP_PORTD_gc = (0x03<<4), /* Mapped To PORTD */ - PORTCFG_VP3MAP_PORTE_gc = (0x04<<4), /* Mapped To PORTE */ - PORTCFG_VP3MAP_PORTF_gc = (0x05<<4), /* Mapped To PORTF */ - PORTCFG_VP3MAP_PORTG_gc = (0x06<<4), /* Mapped To PORTG */ - PORTCFG_VP3MAP_PORTH_gc = (0x07<<4), /* Mapped To PORTH */ - PORTCFG_VP3MAP_PORTJ_gc = (0x08<<4), /* Mapped To PORTJ */ - PORTCFG_VP3MAP_PORTK_gc = (0x09<<4), /* Mapped To PORTK */ - PORTCFG_VP3MAP_PORTL_gc = (0x0A<<4), /* Mapped To PORTL */ - PORTCFG_VP3MAP_PORTM_gc = (0x0B<<4), /* Mapped To PORTM */ - PORTCFG_VP3MAP_PORTN_gc = (0x0C<<4), /* Mapped To PORTN */ - PORTCFG_VP3MAP_PORTP_gc = (0x0D<<4), /* Mapped To PORTP */ - PORTCFG_VP3MAP_PORTQ_gc = (0x0E<<4), /* Mapped To PORTQ */ - PORTCFG_VP3MAP_PORTR_gc = (0x0F<<4), /* Mapped To PORTR */ -} PORTCFG_VP3MAP_t; - -/* Clock Output Port */ -typedef enum PORTCFG_CLKOUT_enum -{ - PORTCFG_CLKOUT_OFF_gc = (0x00<<0), /* Clock Output Disabled */ - PORTCFG_CLKOUT_PC7_gc = (0x01<<0), /* Clock Output on Port C pin 7 */ - PORTCFG_CLKOUT_PD7_gc = (0x02<<0), /* Clock Output on Port D pin 7 */ - PORTCFG_CLKOUT_PE7_gc = (0x03<<0), /* Clock Output on Port E pin 7 */ -} PORTCFG_CLKOUT_t; - -/* Event Output Port */ -typedef enum PORTCFG_EVOUT_enum -{ - PORTCFG_EVOUT_OFF_gc = (0x00<<4), /* Event Output Disabled */ - PORTCFG_EVOUT_PC7_gc = (0x01<<4), /* Event Channel 7 Output on Port C pin 7 */ - PORTCFG_EVOUT_PD7_gc = (0x02<<4), /* Event Channel 7 Output on Port D pin 7 */ - PORTCFG_EVOUT_PE7_gc = (0x03<<4), /* Event Channel 7 Output on Port E pin 7 */ -} PORTCFG_EVOUT_t; - -/* Port Interrupt 0 Level */ -typedef enum PORT_INT0LVL_enum -{ - PORT_INT0LVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - PORT_INT0LVL_LO_gc = (0x01<<0), /* Low Level */ - PORT_INT0LVL_MED_gc = (0x02<<0), /* Medium Level */ - PORT_INT0LVL_HI_gc = (0x03<<0), /* High Level */ -} PORT_INT0LVL_t; - -/* Port Interrupt 1 Level */ -typedef enum PORT_INT1LVL_enum -{ - PORT_INT1LVL_OFF_gc = (0x00<<2), /* Interrupt Disabled */ - PORT_INT1LVL_LO_gc = (0x01<<2), /* Low Level */ - PORT_INT1LVL_MED_gc = (0x02<<2), /* Medium Level */ - PORT_INT1LVL_HI_gc = (0x03<<2), /* High Level */ -} PORT_INT1LVL_t; - -/* Output/Pull Configuration */ -typedef enum PORT_OPC_enum -{ - PORT_OPC_TOTEM_gc = (0x00<<3), /* Totempole */ - PORT_OPC_BUSKEEPER_gc = (0x01<<3), /* Totempole w/ Bus keeper on Input and Output */ - PORT_OPC_PULLDOWN_gc = (0x02<<3), /* Totempole w/ Pull-down on Input */ - PORT_OPC_PULLUP_gc = (0x03<<3), /* Totempole w/ Pull-up on Input */ - PORT_OPC_WIREDOR_gc = (0x04<<3), /* Wired OR */ - PORT_OPC_WIREDAND_gc = (0x05<<3), /* Wired AND */ - PORT_OPC_WIREDORPULL_gc = (0x06<<3), /* Wired OR w/ Pull-down */ - PORT_OPC_WIREDANDPULL_gc = (0x07<<3), /* Wired AND w/ Pull-up */ -} PORT_OPC_t; - -/* Input/Sense Configuration */ -typedef enum PORT_ISC_enum -{ - PORT_ISC_BOTHEDGES_gc = (0x00<<0), /* Sense Both Edges */ - PORT_ISC_RISING_gc = (0x01<<0), /* Sense Rising Edge */ - PORT_ISC_FALLING_gc = (0x02<<0), /* Sense Falling Edge */ - PORT_ISC_LEVEL_gc = (0x03<<0), /* Sense Level (Transparent For Events) */ - PORT_ISC_INPUT_DISABLE_gc = (0x07<<0), /* Disable Digital Input Buffer */ -} PORT_ISC_t; - - -/* --------------------------------------------------------------------------- -TC - 16-bit Timer/Counter With PWM --------------------------------------------------------------------------- -*/ - -/* 16-bit Timer/Counter 0 */ -typedef struct TC0_struct -{ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t CTRLC; /* Control register C */ - register8_t CTRLD; /* Control Register D */ - register8_t CTRLE; /* Control Register E */ - register8_t reserved_0x05; - register8_t INTCTRLA; /* Interrupt Control Register A */ - register8_t INTCTRLB; /* Interrupt Control Register B */ - register8_t CTRLFCLR; /* Control Register F Clear */ - register8_t CTRLFSET; /* Control Register F Set */ - register8_t CTRLGCLR; /* Control Register G Clear */ - register8_t CTRLGSET; /* Control Register G Set */ - register8_t INTFLAGS; /* Interrupt Flag Register */ - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t TEMP; /* Temporary Register For 16-bit Access */ - register8_t reserved_0x10; - register8_t reserved_0x11; - register8_t reserved_0x12; - register8_t reserved_0x13; - register8_t reserved_0x14; - register8_t reserved_0x15; - register8_t reserved_0x16; - register8_t reserved_0x17; - register8_t reserved_0x18; - register8_t reserved_0x19; - register8_t reserved_0x1A; - register8_t reserved_0x1B; - register8_t reserved_0x1C; - register8_t reserved_0x1D; - register8_t reserved_0x1E; - register8_t reserved_0x1F; - _WORDREGISTER(CNT); /* Count */ - register8_t reserved_0x22; - register8_t reserved_0x23; - register8_t reserved_0x24; - register8_t reserved_0x25; - _WORDREGISTER(PER); /* Period */ - _WORDREGISTER(CCA); /* Compare or Capture A */ - _WORDREGISTER(CCB); /* Compare or Capture B */ - _WORDREGISTER(CCC); /* Compare or Capture C */ - _WORDREGISTER(CCD); /* Compare or Capture D */ - register8_t reserved_0x30; - register8_t reserved_0x31; - register8_t reserved_0x32; - register8_t reserved_0x33; - register8_t reserved_0x34; - register8_t reserved_0x35; - _WORDREGISTER(PERBUF); /* Period Buffer */ - _WORDREGISTER(CCABUF); /* Compare Or Capture A Buffer */ - _WORDREGISTER(CCBBUF); /* Compare Or Capture B Buffer */ - _WORDREGISTER(CCCBUF); /* Compare Or Capture C Buffer */ - _WORDREGISTER(CCDBUF); /* Compare Or Capture D Buffer */ -} TC0_t; - -/* --------------------------------------------------------------------------- -TC - 16-bit Timer/Counter With PWM --------------------------------------------------------------------------- -*/ - -/* 16-bit Timer/Counter 1 */ -typedef struct TC1_struct -{ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t CTRLC; /* Control register C */ - register8_t CTRLD; /* Control Register D */ - register8_t CTRLE; /* Control Register E */ - register8_t reserved_0x05; - register8_t INTCTRLA; /* Interrupt Control Register A */ - register8_t INTCTRLB; /* Interrupt Control Register B */ - register8_t CTRLFCLR; /* Control Register F Clear */ - register8_t CTRLFSET; /* Control Register F Set */ - register8_t CTRLGCLR; /* Control Register G Clear */ - register8_t CTRLGSET; /* Control Register G Set */ - register8_t INTFLAGS; /* Interrupt Flag Register */ - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t TEMP; /* Temporary Register For 16-bit Access */ - register8_t reserved_0x10; - register8_t reserved_0x11; - register8_t reserved_0x12; - register8_t reserved_0x13; - register8_t reserved_0x14; - register8_t reserved_0x15; - register8_t reserved_0x16; - register8_t reserved_0x17; - register8_t reserved_0x18; - register8_t reserved_0x19; - register8_t reserved_0x1A; - register8_t reserved_0x1B; - register8_t reserved_0x1C; - register8_t reserved_0x1D; - register8_t reserved_0x1E; - register8_t reserved_0x1F; - _WORDREGISTER(CNT); /* Count */ - register8_t reserved_0x22; - register8_t reserved_0x23; - register8_t reserved_0x24; - register8_t reserved_0x25; - _WORDREGISTER(PER); /* Period */ - _WORDREGISTER(CCA); /* Compare or Capture A */ - _WORDREGISTER(CCB); /* Compare or Capture B */ - register8_t reserved_0x2C; - register8_t reserved_0x2D; - register8_t reserved_0x2E; - register8_t reserved_0x2F; - register8_t reserved_0x30; - register8_t reserved_0x31; - register8_t reserved_0x32; - register8_t reserved_0x33; - register8_t reserved_0x34; - register8_t reserved_0x35; - _WORDREGISTER(PERBUF); /* Period Buffer */ - _WORDREGISTER(CCABUF); /* Compare Or Capture A Buffer */ - _WORDREGISTER(CCBBUF); /* Compare Or Capture B Buffer */ -} TC1_t; - -/* --------------------------------------------------------------------------- -TC - 16-bit Timer/Counter With PWM --------------------------------------------------------------------------- -*/ - -/* Advanced Waveform Extension */ -typedef struct AWEX_struct -{ - register8_t CTRL; /* Control Register */ - register8_t reserved_0x01; - register8_t FDEVMASK; /* Fault Detection Event Mask */ - register8_t FDCTRL; /* Fault Detection Control Register */ - register8_t STATUS; /* Status Register */ - register8_t reserved_0x05; - register8_t DTBOTH; /* Dead Time Both Sides */ - register8_t DTBOTHBUF; /* Dead Time Both Sides Buffer */ - register8_t DTLS; /* Dead Time Low Side */ - register8_t DTHS; /* Dead Time High Side */ - register8_t DTLSBUF; /* Dead Time Low Side Buffer */ - register8_t DTHSBUF; /* Dead Time High Side Buffer */ - register8_t OUTOVEN; /* Output Override Enable */ -} AWEX_t; - -/* --------------------------------------------------------------------------- -TC - 16-bit Timer/Counter With PWM --------------------------------------------------------------------------- -*/ - -/* High-Resolution Extension */ -typedef struct HIRES_struct -{ - register8_t CTRL; /* Control Register */ -} HIRES_t; - -/* Clock Selection */ -typedef enum TC_CLKSEL_enum -{ - TC_CLKSEL_OFF_gc = (0x00<<0), /* Timer Off */ - TC_CLKSEL_DIV1_gc = (0x01<<0), /* System Clock */ - TC_CLKSEL_DIV2_gc = (0x02<<0), /* System Clock / 2 */ - TC_CLKSEL_DIV4_gc = (0x03<<0), /* System Clock / 4 */ - TC_CLKSEL_DIV8_gc = (0x04<<0), /* System Clock / 8 */ - TC_CLKSEL_DIV64_gc = (0x05<<0), /* System Clock / 64 */ - TC_CLKSEL_DIV256_gc = (0x06<<0), /* System Clock / 256 */ - TC_CLKSEL_DIV1024_gc = (0x07<<0), /* System Clock / 1024 */ - TC_CLKSEL_EVCH0_gc = (0x08<<0), /* Event Channel 0 */ - TC_CLKSEL_EVCH1_gc = (0x09<<0), /* Event Channel 1 */ - TC_CLKSEL_EVCH2_gc = (0x0A<<0), /* Event Channel 2 */ - TC_CLKSEL_EVCH3_gc = (0x0B<<0), /* Event Channel 3 */ - TC_CLKSEL_EVCH4_gc = (0x0C<<0), /* Event Channel 4 */ - TC_CLKSEL_EVCH5_gc = (0x0D<<0), /* Event Channel 5 */ - TC_CLKSEL_EVCH6_gc = (0x0E<<0), /* Event Channel 6 */ - TC_CLKSEL_EVCH7_gc = (0x0F<<0), /* Event Channel 7 */ -} TC_CLKSEL_t; - -/* Waveform Generation Mode */ -typedef enum TC_WGMODE_enum -{ - TC_WGMODE_NORMAL_gc = (0x00<<0), /* Normal Mode */ - TC_WGMODE_FRQ_gc = (0x01<<0), /* Frequency Generation Mode */ - TC_WGMODE_SS_gc = (0x03<<0), /* Single Slope */ - TC_WGMODE_DS_T_gc = (0x05<<0), /* Dual Slope, Update on TOP */ - TC_WGMODE_DS_TB_gc = (0x06<<0), /* Dual Slope, Update on TOP and BOTTOM */ - TC_WGMODE_DS_B_gc = (0x07<<0), /* Dual Slope, Update on BOTTOM */ -} TC_WGMODE_t; - -/* Event Action */ -typedef enum TC_EVACT_enum -{ - TC_EVACT_OFF_gc = (0x00<<5), /* No Event Action */ - TC_EVACT_CAPT_gc = (0x01<<5), /* Input Capture */ - TC_EVACT_UPDOWN_gc = (0x02<<5), /* Externally Controlled Up/Down Count */ - TC_EVACT_QDEC_gc = (0x03<<5), /* Quadrature Decode */ - TC_EVACT_RESTART_gc = (0x04<<5), /* Restart */ - TC_EVACT_FRW_gc = (0x05<<5), /* Frequency Capture */ - TC_EVACT_PW_gc = (0x06<<5), /* Pulse-width Capture */ -} TC_EVACT_t; - -/* Event Selection */ -typedef enum TC_EVSEL_enum -{ - TC_EVSEL_OFF_gc = (0x00<<0), /* No Event Source */ - TC_EVSEL_CH0_gc = (0x08<<0), /* Event Channel 0 */ - TC_EVSEL_CH1_gc = (0x09<<0), /* Event Channel 1 */ - TC_EVSEL_CH2_gc = (0x0A<<0), /* Event Channel 2 */ - TC_EVSEL_CH3_gc = (0x0B<<0), /* Event Channel 3 */ - TC_EVSEL_CH4_gc = (0x0C<<0), /* Event Channel 4 */ - TC_EVSEL_CH5_gc = (0x0D<<0), /* Event Channel 5 */ - TC_EVSEL_CH6_gc = (0x0E<<0), /* Event Channel 6 */ - TC_EVSEL_CH7_gc = (0x0F<<0), /* Event Channel 7 */ -} TC_EVSEL_t; - -/* Error Interrupt Level */ -typedef enum TC_ERRINTLVL_enum -{ - TC_ERRINTLVL_OFF_gc = (0x00<<2), /* Interrupt Disabled */ - TC_ERRINTLVL_LO_gc = (0x01<<2), /* Low Level */ - TC_ERRINTLVL_MED_gc = (0x02<<2), /* Medium Level */ - TC_ERRINTLVL_HI_gc = (0x03<<2), /* High Level */ -} TC_ERRINTLVL_t; - -/* Overflow Interrupt Level */ -typedef enum TC_OVFINTLVL_enum -{ - TC_OVFINTLVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - TC_OVFINTLVL_LO_gc = (0x01<<0), /* Low Level */ - TC_OVFINTLVL_MED_gc = (0x02<<0), /* Medium Level */ - TC_OVFINTLVL_HI_gc = (0x03<<0), /* High Level */ -} TC_OVFINTLVL_t; - -/* Compare or Capture D Interrupt Level */ -typedef enum TC_CCDINTLVL_enum -{ - TC_CCDINTLVL_OFF_gc = (0x00<<6), /* Interrupt Disabled */ - TC_CCDINTLVL_LO_gc = (0x01<<6), /* Low Level */ - TC_CCDINTLVL_MED_gc = (0x02<<6), /* Medium Level */ - TC_CCDINTLVL_HI_gc = (0x03<<6), /* High Level */ -} TC_CCDINTLVL_t; - -/* Compare or Capture C Interrupt Level */ -typedef enum TC_CCCINTLVL_enum -{ - TC_CCCINTLVL_OFF_gc = (0x00<<4), /* Interrupt Disabled */ - TC_CCCINTLVL_LO_gc = (0x01<<4), /* Low Level */ - TC_CCCINTLVL_MED_gc = (0x02<<4), /* Medium Level */ - TC_CCCINTLVL_HI_gc = (0x03<<4), /* High Level */ -} TC_CCCINTLVL_t; - -/* Compare or Capture B Interrupt Level */ -typedef enum TC_CCBINTLVL_enum -{ - TC_CCBINTLVL_OFF_gc = (0x00<<2), /* Interrupt Disabled */ - TC_CCBINTLVL_LO_gc = (0x01<<2), /* Low Level */ - TC_CCBINTLVL_MED_gc = (0x02<<2), /* Medium Level */ - TC_CCBINTLVL_HI_gc = (0x03<<2), /* High Level */ -} TC_CCBINTLVL_t; - -/* Compare or Capture A Interrupt Level */ -typedef enum TC_CCAINTLVL_enum -{ - TC_CCAINTLVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - TC_CCAINTLVL_LO_gc = (0x01<<0), /* Low Level */ - TC_CCAINTLVL_MED_gc = (0x02<<0), /* Medium Level */ - TC_CCAINTLVL_HI_gc = (0x03<<0), /* High Level */ -} TC_CCAINTLVL_t; - -/* Timer/Counter Command */ -typedef enum TC_CMD_enum -{ - TC_CMD_NONE_gc = (0x00<<2), /* No Command */ - TC_CMD_UPDATE_gc = (0x01<<2), /* Force Update */ - TC_CMD_RESTART_gc = (0x02<<2), /* Force Restart */ - TC_CMD_RESET_gc = (0x03<<2), /* Force Hard Reset */ -} TC_CMD_t; - -/* Fault Detect Action */ -typedef enum AWEX_FDACT_enum -{ - AWEX_FDACT_NONE_gc = (0x00<<0), /* No Fault Protection */ - AWEX_FDACT_CLEAROE_gc = (0x01<<0), /* Clear Output Enable Bits */ - AWEX_FDACT_CLEARDIR_gc = (0x03<<0), /* Clear I/O Port Direction Bits */ -} AWEX_FDACT_t; - -/* High Resolution Enable */ -typedef enum HIRES_HREN_enum -{ - HIRES_HREN_NONE_gc = (0x00<<0), /* No Fault Protection */ - HIRES_HREN_TC0_gc = (0x01<<0), /* Enable High Resolution on Timer/Counter 0 */ - HIRES_HREN_TC1_gc = (0x02<<0), /* Enable High Resolution on Timer/Counter 1 */ - HIRES_HREN_BOTH_gc = (0x03<<0), /* Enable High Resolution both Timer/Counters */ -} HIRES_HREN_t; - - -/* --------------------------------------------------------------------------- -USART - Universal Asynchronous Receiver-Transmitter --------------------------------------------------------------------------- -*/ - -/* Universal Synchronous/Asynchronous Receiver/Transmitter */ -typedef struct USART_struct -{ - register8_t DATA; /* Data Register */ - register8_t STATUS; /* Status Register */ - register8_t reserved_0x02; - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t CTRLC; /* Control Register C */ - register8_t BAUDCTRLA; /* Baud Rate Control Register A */ - register8_t BAUDCTRLB; /* Baud Rate Control Register B */ -} USART_t; - -/* Receive Complete Interrupt level */ -typedef enum USART_RXCINTLVL_enum -{ - USART_RXCINTLVL_OFF_gc = (0x00<<4), /* Interrupt Disabled */ - USART_RXCINTLVL_LO_gc = (0x01<<4), /* Low Level */ - USART_RXCINTLVL_MED_gc = (0x02<<4), /* Medium Level */ - USART_RXCINTLVL_HI_gc = (0x03<<4), /* High Level */ -} USART_RXCINTLVL_t; - -/* Transmit Complete Interrupt level */ -typedef enum USART_TXCINTLVL_enum -{ - USART_TXCINTLVL_OFF_gc = (0x00<<2), /* Interrupt Disabled */ - USART_TXCINTLVL_LO_gc = (0x01<<2), /* Low Level */ - USART_TXCINTLVL_MED_gc = (0x02<<2), /* Medium Level */ - USART_TXCINTLVL_HI_gc = (0x03<<2), /* High Level */ -} USART_TXCINTLVL_t; - -/* Data Register Empty Interrupt level */ -typedef enum USART_DREINTLVL_enum -{ - USART_DREINTLVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - USART_DREINTLVL_LO_gc = (0x01<<0), /* Low Level */ - USART_DREINTLVL_MED_gc = (0x02<<0), /* Medium Level */ - USART_DREINTLVL_HI_gc = (0x03<<0), /* High Level */ -} USART_DREINTLVL_t; - -/* Character Size */ -typedef enum USART_CHSIZE_enum -{ - USART_CHSIZE_5BIT_gc = (0x00<<0), /* Character size: 5 bit */ - USART_CHSIZE_6BIT_gc = (0x01<<0), /* Character size: 6 bit */ - USART_CHSIZE_7BIT_gc = (0x02<<0), /* Character size: 7 bit */ - USART_CHSIZE_8BIT_gc = (0x03<<0), /* Character size: 8 bit */ - USART_CHSIZE_9BIT_gc = (0x07<<0), /* Character size: 9 bit */ -} USART_CHSIZE_t; - -/* Communication Mode */ -typedef enum USART_CMODE_enum -{ - USART_CMODE_ASYNCHRONOUS_gc = (0x00<<6), /* Asynchronous Mode */ - USART_CMODE_SYNCHRONOUS_gc = (0x01<<6), /* Synchronous Mode */ - USART_CMODE_IRDA_gc = (0x02<<6), /* IrDA Mode */ - USART_CMODE_MSPI_gc = (0x03<<6), /* Master SPI Mode */ -} USART_CMODE_t; - -/* Parity Mode */ -typedef enum USART_PMODE_enum -{ - USART_PMODE_DISABLED_gc = (0x00<<4), /* No Parity */ - USART_PMODE_EVEN_gc = (0x02<<4), /* Even Parity */ - USART_PMODE_ODD_gc = (0x03<<4), /* Odd Parity */ -} USART_PMODE_t; - - -/* --------------------------------------------------------------------------- -SPI - Serial Peripheral Interface --------------------------------------------------------------------------- -*/ - -/* Serial Peripheral Interface */ -typedef struct SPI_struct -{ - register8_t CTRL; /* Control Register */ - register8_t INTCTRL; /* Interrupt Control Register */ - register8_t STATUS; /* Status Register */ - register8_t DATA; /* Data Register */ -} SPI_t; - -/* SPI Mode */ -typedef enum SPI_MODE_enum -{ - SPI_MODE_0_gc = (0x00<<2), /* SPI Mode 0 */ - SPI_MODE_1_gc = (0x01<<2), /* SPI Mode 1 */ - SPI_MODE_2_gc = (0x02<<2), /* SPI Mode 2 */ - SPI_MODE_3_gc = (0x03<<2), /* SPI Mode 3 */ -} SPI_MODE_t; - -/* Prescaler setting */ -typedef enum SPI_PRESCALER_enum -{ - SPI_PRESCALER_DIV4_gc = (0x00<<0), /* System Clock / 4 */ - SPI_PRESCALER_DIV16_gc = (0x01<<0), /* System Clock / 16 */ - SPI_PRESCALER_DIV64_gc = (0x02<<0), /* System Clock / 64 */ - SPI_PRESCALER_DIV128_gc = (0x03<<0), /* System Clock / 128 */ -} SPI_PRESCALER_t; - -/* Interrupt level */ -typedef enum SPI_INTLVL_enum -{ - SPI_INTLVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - SPI_INTLVL_LO_gc = (0x01<<0), /* Low Level */ - SPI_INTLVL_MED_gc = (0x02<<0), /* Medium Level */ - SPI_INTLVL_HI_gc = (0x03<<0), /* High Level */ -} SPI_INTLVL_t; - - -/* --------------------------------------------------------------------------- -IRCOM - IR Communication Module --------------------------------------------------------------------------- -*/ - -/* IR Communication Module */ -typedef struct IRCOM_struct -{ - register8_t CTRL; /* Control Register */ - register8_t TXPLCTRL; /* IrDA Transmitter Pulse Length Control Register */ - register8_t RXPLCTRL; /* IrDA Receiver Pulse Length Control Register */ -} IRCOM_t; - -/* Event channel selection */ -typedef enum IRDA_EVSEL_enum -{ - IRDA_EVSEL_OFF_gc = (0x00<<0), /* No Event Source */ - IRDA_EVSEL_0_gc = (0x08<<0), /* Event Channel 0 */ - IRDA_EVSEL_1_gc = (0x09<<0), /* Event Channel 1 */ - IRDA_EVSEL_2_gc = (0x0A<<0), /* Event Channel 2 */ - IRDA_EVSEL_3_gc = (0x0B<<0), /* Event Channel 3 */ - IRDA_EVSEL_4_gc = (0x0C<<0), /* Event Channel 4 */ - IRDA_EVSEL_5_gc = (0x0D<<0), /* Event Channel 5 */ - IRDA_EVSEL_6_gc = (0x0E<<0), /* Event Channel 6 */ - IRDA_EVSEL_7_gc = (0x0F<<0), /* Event Channel 7 */ -} IRDA_EVSEL_t; - - -/* --------------------------------------------------------------------------- -AES - AES Module --------------------------------------------------------------------------- -*/ - -/* AES Module */ -typedef struct AES_struct -{ - register8_t CTRL; /* AES Control Register */ - register8_t STATUS; /* AES Status Register */ - register8_t STATE; /* AES State Register */ - register8_t KEY; /* AES Key Register */ - register8_t INTCTRL; /* AES Interrupt Control Register */ -} AES_t; - -/* Interrupt level */ -typedef enum AES_INTLVL_enum -{ - AES_INTLVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - AES_INTLVL_LO_gc = (0x01<<0), /* Low Level */ - AES_INTLVL_MED_gc = (0x02<<0), /* Medium Level */ - AES_INTLVL_HI_gc = (0x03<<0), /* High Level */ -} AES_INTLVL_t; - - - -/* -========================================================================== -IO Module Instances. Mapped to memory. -========================================================================== -*/ - -#define GPIO (*(GPIO_t *) 0x0000) /* General Purpose IO Registers */ -#define VPORT0 (*(VPORT_t *) 0x0010) /* Virtual Port 0 */ -#define VPORT1 (*(VPORT_t *) 0x0014) /* Virtual Port 1 */ -#define VPORT2 (*(VPORT_t *) 0x0018) /* Virtual Port 2 */ -#define VPORT3 (*(VPORT_t *) 0x001C) /* Virtual Port 3 */ -#define OCD (*(OCD_t *) 0x002E) /* On-Chip Debug System */ -#define CPU (*(CPU_t *) 0x0030) /* CPU Registers */ -#define CLK (*(CLK_t *) 0x0040) /* Clock System */ -#define SLEEP (*(SLEEP_t *) 0x0048) /* Sleep Controller */ -#define OSC (*(OSC_t *) 0x0050) /* Oscillator Control */ -#define DFLLRC32M (*(DFLL_t *) 0x0060) /* DFLL for 32MHz RC Oscillator */ -#define DFLLRC2M (*(DFLL_t *) 0x0068) /* DFLL for 2MHz RC Oscillator */ -#define PR (*(PR_t *) 0x0070) /* Power Reduction */ -#define RST (*(RST_t *) 0x0078) /* Reset Controller */ -#define WDT (*(WDT_t *) 0x0080) /* Watch-Dog Timer */ -#define MCU (*(MCU_t *) 0x0090) /* MCU Control */ -#define PMIC (*(PMIC_t *) 0x00A0) /* Programmable Interrupt Controller */ -#define PORTCFG (*(PORTCFG_t *) 0x00B0) /* Port Configuration */ -#define AES (*(AES_t *) 0x00C0) /* AES Crypto Module */ -#define DMA (*(DMA_t *) 0x0100) /* DMA Controller */ -#define EVSYS (*(EVSYS_t *) 0x0180) /* Event System */ -#define NVM (*(NVM_t *) 0x01C0) /* Non Volatile Memory Controller */ -#define ADCA (*(ADC_t *) 0x0200) /* Analog to Digital Converter A */ -#define ADCB (*(ADC_t *) 0x0240) /* Analog to Digital Converter B */ -#define DACB (*(DAC_t *) 0x0320) /* Digital to Analog Converter B */ -#define ACA (*(AC_t *) 0x0380) /* Analog Comparator A */ -#define ACB (*(AC_t *) 0x0390) /* Analog Comparator B */ -#define RTC (*(RTC_t *) 0x0400) /* Real-Time Counter */ -#define TWIC (*(TWI_t *) 0x0480) /* Two-Wire Interface C */ -#define TWIE (*(TWI_t *) 0x04A0) /* Two-Wire Interface E */ -#define PORTA (*(PORT_t *) 0x0600) /* Port A */ -#define PORTB (*(PORT_t *) 0x0620) /* Port B */ -#define PORTC (*(PORT_t *) 0x0640) /* Port C */ -#define PORTD (*(PORT_t *) 0x0660) /* Port D */ -#define PORTE (*(PORT_t *) 0x0680) /* Port E */ -#define PORTF (*(PORT_t *) 0x06A0) /* Port F */ -#define PORTR (*(PORT_t *) 0x07E0) /* Port R */ -#define TCC0 (*(TC0_t *) 0x0800) /* Timer/Counter C0 */ -#define TCC1 (*(TC1_t *) 0x0840) /* Timer/Counter C1 */ -#define AWEXC (*(AWEX_t *) 0x0880) /* Advanced Waveform Extension C */ -#define HIRESC (*(HIRES_t *) 0x0890) /* High-Resolution Extension C */ -#define USARTC0 (*(USART_t *) 0x08A0) /* Universal Asynchronous Receiver-Transmitter C0 */ -#define USARTC1 (*(USART_t *) 0x08B0) /* Universal Asynchronous Receiver-Transmitter C1 */ -#define SPIC (*(SPI_t *) 0x08C0) /* Serial Peripheral Interface C */ -#define IRCOM (*(IRCOM_t *) 0x08F8) /* IR Communication Module */ -#define TCD0 (*(TC0_t *) 0x0900) /* Timer/Counter D0 */ -#define TCD1 (*(TC1_t *) 0x0940) /* Timer/Counter D1 */ -#define HIRESD (*(HIRES_t *) 0x0990) /* High-Resolution Extension D */ -#define USARTD0 (*(USART_t *) 0x09A0) /* Universal Asynchronous Receiver-Transmitter D0 */ -#define USARTD1 (*(USART_t *) 0x09B0) /* Universal Asynchronous Receiver-Transmitter D1 */ -#define SPID (*(SPI_t *) 0x09C0) /* Serial Peripheral Interface D */ -#define TCE0 (*(TC0_t *) 0x0A00) /* Timer/Counter E0 */ -#define TCE1 (*(TC1_t *) 0x0A40) /* Timer/Counter E1 */ -#define AWEXE (*(AWEX_t *) 0x0A80) /* Advanced Waveform Extension E */ -#define HIRESE (*(HIRES_t *) 0x0A90) /* High-Resolution Extension E */ -#define USARTE0 (*(USART_t *) 0x0AA0) /* Universal Asynchronous Receiver-Transmitter E0 */ -#define USARTE1 (*(USART_t *) 0x0AB0) /* Universal Asynchronous Receiver-Transmitter E1 */ -#define SPIE (*(SPI_t *) 0x0AC0) /* Serial Peripheral Interface E */ -#define TCF0 (*(TC0_t *) 0x0B00) /* Timer/Counter F0 */ -#define HIRESF (*(HIRES_t *) 0x0B90) /* High-Resolution Extension F */ -#define USARTF0 (*(USART_t *) 0x0BA0) /* Universal Asynchronous Receiver-Transmitter F0 */ -#define USARTF1 (*(USART_t *) 0x0BB0) /* Universal Asynchronous Receiver-Transmitter F1 */ -#define SPIF (*(SPI_t *) 0x0BC0) /* Serial Peripheral Interface F */ - - -#endif /* !defined (__ASSEMBLER__) */ - - -/* ========== Flattened fully qualified IO register names ========== */ - -/* GPIO - General Purpose IO Registers */ -#define GPIO_GPIO0 _SFR_MEM8(0x0000) -#define GPIO_GPIO1 _SFR_MEM8(0x0001) -#define GPIO_GPIO2 _SFR_MEM8(0x0002) -#define GPIO_GPIO3 _SFR_MEM8(0x0003) -#define GPIO_GPIO4 _SFR_MEM8(0x0004) -#define GPIO_GPIO5 _SFR_MEM8(0x0005) -#define GPIO_GPIO6 _SFR_MEM8(0x0006) -#define GPIO_GPIO7 _SFR_MEM8(0x0007) -#define GPIO_GPIO8 _SFR_MEM8(0x0008) -#define GPIO_GPIO9 _SFR_MEM8(0x0009) -#define GPIO_GPIOA _SFR_MEM8(0x000A) -#define GPIO_GPIOB _SFR_MEM8(0x000B) -#define GPIO_GPIOC _SFR_MEM8(0x000C) -#define GPIO_GPIOD _SFR_MEM8(0x000D) -#define GPIO_GPIOE _SFR_MEM8(0x000E) -#define GPIO_GPIOF _SFR_MEM8(0x000F) - -/* VPORT0 - Virtual Port 0 */ -#define VPORT0_DIR _SFR_MEM8(0x0010) -#define VPORT0_OUT _SFR_MEM8(0x0011) -#define VPORT0_IN _SFR_MEM8(0x0012) -#define VPORT0_INTFLAGS _SFR_MEM8(0x0013) - -/* VPORT1 - Virtual Port 1 */ -#define VPORT1_DIR _SFR_MEM8(0x0014) -#define VPORT1_OUT _SFR_MEM8(0x0015) -#define VPORT1_IN _SFR_MEM8(0x0016) -#define VPORT1_INTFLAGS _SFR_MEM8(0x0017) - -/* VPORT2 - Virtual Port 2 */ -#define VPORT2_DIR _SFR_MEM8(0x0018) -#define VPORT2_OUT _SFR_MEM8(0x0019) -#define VPORT2_IN _SFR_MEM8(0x001A) -#define VPORT2_INTFLAGS _SFR_MEM8(0x001B) - -/* VPORT3 - Virtual Port 3 */ -#define VPORT3_DIR _SFR_MEM8(0x001C) -#define VPORT3_OUT _SFR_MEM8(0x001D) -#define VPORT3_IN _SFR_MEM8(0x001E) -#define VPORT3_INTFLAGS _SFR_MEM8(0x001F) - -/* OCD - On-Chip Debug System */ -#define OCD_OCDR0 _SFR_MEM8(0x002E) -#define OCD_OCDR1 _SFR_MEM8(0x002F) - -/* CPU - CPU Registers */ -#define CPU_CCP _SFR_MEM8(0x0034) -#define CPU_RAMPD _SFR_MEM8(0x0038) -#define CPU_RAMPX _SFR_MEM8(0x0039) -#define CPU_RAMPY _SFR_MEM8(0x003A) -#define CPU_RAMPZ _SFR_MEM8(0x003B) -#define CPU_EIND _SFR_MEM8(0x003C) -#define CPU_SPL _SFR_MEM8(0x003D) -#define CPU_SPH _SFR_MEM8(0x003E) -#define CPU_SREG _SFR_MEM8(0x003F) - -/* CLK - Clock System */ -#define CLK_CTRL _SFR_MEM8(0x0040) -#define CLK_PSCTRL _SFR_MEM8(0x0041) -#define CLK_LOCK _SFR_MEM8(0x0042) -#define CLK_RTCCTRL _SFR_MEM8(0x0043) - -/* SLEEP - Sleep Controller */ -#define SLEEP_CTRL _SFR_MEM8(0x0048) - -/* OSC - Oscillator Control */ -#define OSC_CTRL _SFR_MEM8(0x0050) -#define OSC_STATUS _SFR_MEM8(0x0051) -#define OSC_XOSCCTRL _SFR_MEM8(0x0052) -#define OSC_XOSCFAIL _SFR_MEM8(0x0053) -#define OSC_RC32KCAL _SFR_MEM8(0x0054) -#define OSC_PLLCTRL _SFR_MEM8(0x0055) -#define OSC_DFLLCTRL _SFR_MEM8(0x0056) - -/* DFLLRC32M - DFLL for 32MHz RC Oscillator */ -#define DFLLRC32M_CTRL _SFR_MEM8(0x0060) -#define DFLLRC32M_CALA _SFR_MEM8(0x0062) -#define DFLLRC32M_CALB _SFR_MEM8(0x0063) -#define DFLLRC32M_OSCCNT0 _SFR_MEM8(0x0064) -#define DFLLRC32M_OSCCNT1 _SFR_MEM8(0x0065) -#define DFLLRC32M_OSCCNT2 _SFR_MEM8(0x0066) - -/* DFLLRC2M - DFLL for 2MHz RC Oscillator */ -#define DFLLRC2M_CTRL _SFR_MEM8(0x0068) -#define DFLLRC2M_CALA _SFR_MEM8(0x006A) -#define DFLLRC2M_CALB _SFR_MEM8(0x006B) -#define DFLLRC2M_OSCCNT0 _SFR_MEM8(0x006C) -#define DFLLRC2M_OSCCNT1 _SFR_MEM8(0x006D) -#define DFLLRC2M_OSCCNT2 _SFR_MEM8(0x006E) - -/* PR - Power Reduction */ -#define PR_PR _SFR_MEM8(0x0070) -#define PR_PRPA _SFR_MEM8(0x0071) -#define PR_PRPB _SFR_MEM8(0x0072) -#define PR_PRPC _SFR_MEM8(0x0073) -#define PR_PRPD _SFR_MEM8(0x0074) -#define PR_PRPE _SFR_MEM8(0x0075) -#define PR_PRPF _SFR_MEM8(0x0076) - -/* RST - Reset Controller */ -#define RST_STATUS _SFR_MEM8(0x0078) -#define RST_CTRL _SFR_MEM8(0x0079) - -/* WDT - Watch-Dog Timer */ -#define WDT_CTRL _SFR_MEM8(0x0080) -#define WDT_WINCTRL _SFR_MEM8(0x0081) -#define WDT_STATUS _SFR_MEM8(0x0082) - -/* MCU - MCU Control */ -#define MCU_DEVID0 _SFR_MEM8(0x0090) -#define MCU_DEVID1 _SFR_MEM8(0x0091) -#define MCU_DEVID2 _SFR_MEM8(0x0092) -#define MCU_REVID _SFR_MEM8(0x0093) -#define MCU_JTAGUID _SFR_MEM8(0x0094) -#define MCU_MCUCR _SFR_MEM8(0x0096) -#define MCU_EVSYSLOCK _SFR_MEM8(0x0098) -#define MCU_AWEXLOCK _SFR_MEM8(0x0099) - -/* PMIC - Programmable Interrupt Controller */ -#define PMIC_STATUS _SFR_MEM8(0x00A0) -#define PMIC_INTPRI _SFR_MEM8(0x00A1) -#define PMIC_CTRL _SFR_MEM8(0x00A2) - -/* PORTCFG - Port Configuration */ -#define PORTCFG_MPCMASK _SFR_MEM8(0x00B0) -#define PORTCFG_VPCTRLA _SFR_MEM8(0x00B2) -#define PORTCFG_VPCTRLB _SFR_MEM8(0x00B3) -#define PORTCFG_CLKEVOUT _SFR_MEM8(0x00B4) - -/* AES - AES Crypto Module */ -#define AES_CTRL _SFR_MEM8(0x00C0) -#define AES_STATUS _SFR_MEM8(0x00C1) -#define AES_STATE _SFR_MEM8(0x00C2) -#define AES_KEY _SFR_MEM8(0x00C3) -#define AES_INTCTRL _SFR_MEM8(0x00C4) - -/* DMA - DMA Controller */ -#define DMA_CTRL _SFR_MEM8(0x0100) -#define DMA_INTFLAGS _SFR_MEM8(0x0103) -#define DMA_STATUS _SFR_MEM8(0x0104) -#define DMA_TEMP _SFR_MEM16(0x0106) -#define DMA_CH0_CTRLA _SFR_MEM8(0x0110) -#define DMA_CH0_CTRLB _SFR_MEM8(0x0111) -#define DMA_CH0_ADDRCTRL _SFR_MEM8(0x0112) -#define DMA_CH0_TRIGSRC _SFR_MEM8(0x0113) -#define DMA_CH0_TRFCNT _SFR_MEM16(0x0114) -#define DMA_CH0_REPCNT _SFR_MEM8(0x0116) -#define DMA_CH0_SRCADDR0 _SFR_MEM8(0x0118) -#define DMA_CH0_SRCADDR1 _SFR_MEM8(0x0119) -#define DMA_CH0_SRCADDR2 _SFR_MEM8(0x011A) -#define DMA_CH0_DESTADDR0 _SFR_MEM8(0x011C) -#define DMA_CH0_DESTADDR1 _SFR_MEM8(0x011D) -#define DMA_CH0_DESTADDR2 _SFR_MEM8(0x011E) -#define DMA_CH1_CTRLA _SFR_MEM8(0x0120) -#define DMA_CH1_CTRLB _SFR_MEM8(0x0121) -#define DMA_CH1_ADDRCTRL _SFR_MEM8(0x0122) -#define DMA_CH1_TRIGSRC _SFR_MEM8(0x0123) -#define DMA_CH1_TRFCNT _SFR_MEM16(0x0124) -#define DMA_CH1_REPCNT _SFR_MEM8(0x0126) -#define DMA_CH1_SRCADDR0 _SFR_MEM8(0x0128) -#define DMA_CH1_SRCADDR1 _SFR_MEM8(0x0129) -#define DMA_CH1_SRCADDR2 _SFR_MEM8(0x012A) -#define DMA_CH1_DESTADDR0 _SFR_MEM8(0x012C) -#define DMA_CH1_DESTADDR1 _SFR_MEM8(0x012D) -#define DMA_CH1_DESTADDR2 _SFR_MEM8(0x012E) -#define DMA_CH2_CTRLA _SFR_MEM8(0x0130) -#define DMA_CH2_CTRLB _SFR_MEM8(0x0131) -#define DMA_CH2_ADDRCTRL _SFR_MEM8(0x0132) -#define DMA_CH2_TRIGSRC _SFR_MEM8(0x0133) -#define DMA_CH2_TRFCNT _SFR_MEM16(0x0134) -#define DMA_CH2_REPCNT _SFR_MEM8(0x0136) -#define DMA_CH2_SRCADDR0 _SFR_MEM8(0x0138) -#define DMA_CH2_SRCADDR1 _SFR_MEM8(0x0139) -#define DMA_CH2_SRCADDR2 _SFR_MEM8(0x013A) -#define DMA_CH2_DESTADDR0 _SFR_MEM8(0x013C) -#define DMA_CH2_DESTADDR1 _SFR_MEM8(0x013D) -#define DMA_CH2_DESTADDR2 _SFR_MEM8(0x013E) -#define DMA_CH3_CTRLA _SFR_MEM8(0x0140) -#define DMA_CH3_CTRLB _SFR_MEM8(0x0141) -#define DMA_CH3_ADDRCTRL _SFR_MEM8(0x0142) -#define DMA_CH3_TRIGSRC _SFR_MEM8(0x0143) -#define DMA_CH3_TRFCNT _SFR_MEM16(0x0144) -#define DMA_CH3_REPCNT _SFR_MEM8(0x0146) -#define DMA_CH3_SRCADDR0 _SFR_MEM8(0x0148) -#define DMA_CH3_SRCADDR1 _SFR_MEM8(0x0149) -#define DMA_CH3_SRCADDR2 _SFR_MEM8(0x014A) -#define DMA_CH3_DESTADDR0 _SFR_MEM8(0x014C) -#define DMA_CH3_DESTADDR1 _SFR_MEM8(0x014D) -#define DMA_CH3_DESTADDR2 _SFR_MEM8(0x014E) - -/* EVSYS - Event System */ -#define EVSYS_CH0MUX _SFR_MEM8(0x0180) -#define EVSYS_CH1MUX _SFR_MEM8(0x0181) -#define EVSYS_CH2MUX _SFR_MEM8(0x0182) -#define EVSYS_CH3MUX _SFR_MEM8(0x0183) -#define EVSYS_CH4MUX _SFR_MEM8(0x0184) -#define EVSYS_CH5MUX _SFR_MEM8(0x0185) -#define EVSYS_CH6MUX _SFR_MEM8(0x0186) -#define EVSYS_CH7MUX _SFR_MEM8(0x0187) -#define EVSYS_CH0CTRL _SFR_MEM8(0x0188) -#define EVSYS_CH1CTRL _SFR_MEM8(0x0189) -#define EVSYS_CH2CTRL _SFR_MEM8(0x018A) -#define EVSYS_CH3CTRL _SFR_MEM8(0x018B) -#define EVSYS_CH4CTRL _SFR_MEM8(0x018C) -#define EVSYS_CH5CTRL _SFR_MEM8(0x018D) -#define EVSYS_CH6CTRL _SFR_MEM8(0x018E) -#define EVSYS_CH7CTRL _SFR_MEM8(0x018F) -#define EVSYS_STROBE _SFR_MEM8(0x0190) -#define EVSYS_DATA _SFR_MEM8(0x0191) - -/* NVM - Non Volatile Memory Controller */ -#define NVM_ADDR0 _SFR_MEM8(0x01C0) -#define NVM_ADDR1 _SFR_MEM8(0x01C1) -#define NVM_ADDR2 _SFR_MEM8(0x01C2) -#define NVM_DATA0 _SFR_MEM8(0x01C4) -#define NVM_DATA1 _SFR_MEM8(0x01C5) -#define NVM_DATA2 _SFR_MEM8(0x01C6) -#define NVM_CMD _SFR_MEM8(0x01CA) -#define NVM_CTRLA _SFR_MEM8(0x01CB) -#define NVM_CTRLB _SFR_MEM8(0x01CC) -#define NVM_INTCTRL _SFR_MEM8(0x01CD) -#define NVM_STATUS _SFR_MEM8(0x01CF) -#define NVM_LOCKBITS _SFR_MEM8(0x01D0) - -/* ADCA - Analog to Digital Converter A */ -#define ADCA_CTRLA _SFR_MEM8(0x0200) -#define ADCA_CTRLB _SFR_MEM8(0x0201) -#define ADCA_REFCTRL _SFR_MEM8(0x0202) -#define ADCA_EVCTRL _SFR_MEM8(0x0203) -#define ADCA_PRESCALER _SFR_MEM8(0x0204) -#define ADCA_CALCTRL _SFR_MEM8(0x0205) -#define ADCA_INTFLAGS _SFR_MEM8(0x0206) -#define ADCA_CALIB _SFR_MEM8(0x020C) -#define ADCA_CH0RES _SFR_MEM16(0x0210) -#define ADCA_CH1RES _SFR_MEM16(0x0212) -#define ADCA_CH2RES _SFR_MEM16(0x0214) -#define ADCA_CH3RES _SFR_MEM16(0x0216) -#define ADCA_CMP _SFR_MEM16(0x0218) -#define ADCA_CH0_CTRL _SFR_MEM8(0x0220) -#define ADCA_CH0_MUXCTRL _SFR_MEM8(0x0221) -#define ADCA_CH0_INTCTRL _SFR_MEM8(0x0222) -#define ADCA_CH0_INTFLAGS _SFR_MEM8(0x0223) -#define ADCA_CH0_RES _SFR_MEM16(0x0224) -#define ADCA_CH1_CTRL _SFR_MEM8(0x0228) -#define ADCA_CH1_MUXCTRL _SFR_MEM8(0x0229) -#define ADCA_CH1_INTCTRL _SFR_MEM8(0x022A) -#define ADCA_CH1_INTFLAGS _SFR_MEM8(0x022B) -#define ADCA_CH1_RES _SFR_MEM16(0x022C) -#define ADCA_CH2_CTRL _SFR_MEM8(0x0230) -#define ADCA_CH2_MUXCTRL _SFR_MEM8(0x0231) -#define ADCA_CH2_INTCTRL _SFR_MEM8(0x0232) -#define ADCA_CH2_INTFLAGS _SFR_MEM8(0x0233) -#define ADCA_CH2_RES _SFR_MEM16(0x0234) -#define ADCA_CH3_CTRL _SFR_MEM8(0x0238) -#define ADCA_CH3_MUXCTRL _SFR_MEM8(0x0239) -#define ADCA_CH3_INTCTRL _SFR_MEM8(0x023A) -#define ADCA_CH3_INTFLAGS _SFR_MEM8(0x023B) -#define ADCA_CH3_RES _SFR_MEM16(0x023C) - -/* ADCB - Analog to Digital Converter B */ -#define ADCB_CTRLA _SFR_MEM8(0x0240) -#define ADCB_CTRLB _SFR_MEM8(0x0241) -#define ADCB_REFCTRL _SFR_MEM8(0x0242) -#define ADCB_EVCTRL _SFR_MEM8(0x0243) -#define ADCB_PRESCALER _SFR_MEM8(0x0244) -#define ADCB_CALCTRL _SFR_MEM8(0x0245) -#define ADCB_INTFLAGS _SFR_MEM8(0x0246) -#define ADCB_CALIB _SFR_MEM8(0x024C) -#define ADCB_CH0RES _SFR_MEM16(0x0250) -#define ADCB_CH1RES _SFR_MEM16(0x0252) -#define ADCB_CH2RES _SFR_MEM16(0x0254) -#define ADCB_CH3RES _SFR_MEM16(0x0256) -#define ADCB_CMP _SFR_MEM16(0x0258) -#define ADCB_CH0_CTRL _SFR_MEM8(0x0260) -#define ADCB_CH0_MUXCTRL _SFR_MEM8(0x0261) -#define ADCB_CH0_INTCTRL _SFR_MEM8(0x0262) -#define ADCB_CH0_INTFLAGS _SFR_MEM8(0x0263) -#define ADCB_CH0_RES _SFR_MEM16(0x0264) -#define ADCB_CH1_CTRL _SFR_MEM8(0x0268) -#define ADCB_CH1_MUXCTRL _SFR_MEM8(0x0269) -#define ADCB_CH1_INTCTRL _SFR_MEM8(0x026A) -#define ADCB_CH1_INTFLAGS _SFR_MEM8(0x026B) -#define ADCB_CH1_RES _SFR_MEM16(0x026C) -#define ADCB_CH2_CTRL _SFR_MEM8(0x0270) -#define ADCB_CH2_MUXCTRL _SFR_MEM8(0x0271) -#define ADCB_CH2_INTCTRL _SFR_MEM8(0x0272) -#define ADCB_CH2_INTFLAGS _SFR_MEM8(0x0273) -#define ADCB_CH2_RES _SFR_MEM16(0x0274) -#define ADCB_CH3_CTRL _SFR_MEM8(0x0278) -#define ADCB_CH3_MUXCTRL _SFR_MEM8(0x0279) -#define ADCB_CH3_INTCTRL _SFR_MEM8(0x027A) -#define ADCB_CH3_INTFLAGS _SFR_MEM8(0x027B) -#define ADCB_CH3_RES _SFR_MEM16(0x027C) - -/* DACB - Digital to Analog Converter B */ -#define DACB_CTRLA _SFR_MEM8(0x0320) -#define DACB_CTRLB _SFR_MEM8(0x0321) -#define DACB_CTRLC _SFR_MEM8(0x0322) -#define DACB_EVCTRL _SFR_MEM8(0x0323) -#define DACB_TIMCTRL _SFR_MEM8(0x0324) -#define DACB_STATUS _SFR_MEM8(0x0325) -#define DACB_GAINCAL _SFR_MEM8(0x0328) -#define DACB_OFFSETCAL _SFR_MEM8(0x0329) -#define DACB_CH0DATA _SFR_MEM16(0x0338) -#define DACB_CH1DATA _SFR_MEM16(0x033A) - -/* ACA - Analog Comparator A */ -#define ACA_AC0CTRL _SFR_MEM8(0x0380) -#define ACA_AC1CTRL _SFR_MEM8(0x0381) -#define ACA_AC0MUXCTRL _SFR_MEM8(0x0382) -#define ACA_AC1MUXCTRL _SFR_MEM8(0x0383) -#define ACA_CTRLA _SFR_MEM8(0x0384) -#define ACA_CTRLB _SFR_MEM8(0x0385) -#define ACA_WINCTRL _SFR_MEM8(0x0386) -#define ACA_STATUS _SFR_MEM8(0x0387) - -/* ACB - Analog Comparator B */ -#define ACB_AC0CTRL _SFR_MEM8(0x0390) -#define ACB_AC1CTRL _SFR_MEM8(0x0391) -#define ACB_AC0MUXCTRL _SFR_MEM8(0x0392) -#define ACB_AC1MUXCTRL _SFR_MEM8(0x0393) -#define ACB_CTRLA _SFR_MEM8(0x0394) -#define ACB_CTRLB _SFR_MEM8(0x0395) -#define ACB_WINCTRL _SFR_MEM8(0x0396) -#define ACB_STATUS _SFR_MEM8(0x0397) - -/* RTC - Real-Time Counter */ -#define RTC_CTRL _SFR_MEM8(0x0400) -#define RTC_STATUS _SFR_MEM8(0x0401) -#define RTC_INTCTRL _SFR_MEM8(0x0402) -#define RTC_INTFLAGS _SFR_MEM8(0x0403) -#define RTC_TEMP _SFR_MEM8(0x0404) -#define RTC_CNT _SFR_MEM16(0x0408) -#define RTC_PER _SFR_MEM16(0x040A) -#define RTC_COMP _SFR_MEM16(0x040C) - -/* TWIC - Two-Wire Interface C */ -#define TWIC_CTRL _SFR_MEM8(0x0480) -#define TWIC_MASTER_CTRLA _SFR_MEM8(0x0481) -#define TWIC_MASTER_CTRLB _SFR_MEM8(0x0482) -#define TWIC_MASTER_CTRLC _SFR_MEM8(0x0483) -#define TWIC_MASTER_STATUS _SFR_MEM8(0x0484) -#define TWIC_MASTER_BAUD _SFR_MEM8(0x0485) -#define TWIC_MASTER_ADDR _SFR_MEM8(0x0486) -#define TWIC_MASTER_DATA _SFR_MEM8(0x0487) -#define TWIC_SLAVE_CTRLA _SFR_MEM8(0x0488) -#define TWIC_SLAVE_CTRLB _SFR_MEM8(0x0489) -#define TWIC_SLAVE_STATUS _SFR_MEM8(0x048A) -#define TWIC_SLAVE_ADDR _SFR_MEM8(0x048B) -#define TWIC_SLAVE_DATA _SFR_MEM8(0x048C) - -/* TWIE - Two-Wire Interface E */ -#define TWIE_CTRL _SFR_MEM8(0x04A0) -#define TWIE_MASTER_CTRLA _SFR_MEM8(0x04A1) -#define TWIE_MASTER_CTRLB _SFR_MEM8(0x04A2) -#define TWIE_MASTER_CTRLC _SFR_MEM8(0x04A3) -#define TWIE_MASTER_STATUS _SFR_MEM8(0x04A4) -#define TWIE_MASTER_BAUD _SFR_MEM8(0x04A5) -#define TWIE_MASTER_ADDR _SFR_MEM8(0x04A6) -#define TWIE_MASTER_DATA _SFR_MEM8(0x04A7) -#define TWIE_SLAVE_CTRLA _SFR_MEM8(0x04A8) -#define TWIE_SLAVE_CTRLB _SFR_MEM8(0x04A9) -#define TWIE_SLAVE_STATUS _SFR_MEM8(0x04AA) -#define TWIE_SLAVE_ADDR _SFR_MEM8(0x04AB) -#define TWIE_SLAVE_DATA _SFR_MEM8(0x04AC) - -/* PORTA - Port A */ -#define PORTA_DIR _SFR_MEM8(0x0600) -#define PORTA_DIRSET _SFR_MEM8(0x0601) -#define PORTA_DIRCLR _SFR_MEM8(0x0602) -#define PORTA_DIRTGL _SFR_MEM8(0x0603) -#define PORTA_OUT _SFR_MEM8(0x0604) -#define PORTA_OUTSET _SFR_MEM8(0x0605) -#define PORTA_OUTCLR _SFR_MEM8(0x0606) -#define PORTA_OUTTGL _SFR_MEM8(0x0607) -#define PORTA_IN _SFR_MEM8(0x0608) -#define PORTA_INTCTRL _SFR_MEM8(0x0609) -#define PORTA_INT0MASK _SFR_MEM8(0x060A) -#define PORTA_INT1MASK _SFR_MEM8(0x060B) -#define PORTA_INTFLAGS _SFR_MEM8(0x060C) -#define PORTA_PIN0CTRL _SFR_MEM8(0x0610) -#define PORTA_PIN1CTRL _SFR_MEM8(0x0611) -#define PORTA_PIN2CTRL _SFR_MEM8(0x0612) -#define PORTA_PIN3CTRL _SFR_MEM8(0x0613) -#define PORTA_PIN4CTRL _SFR_MEM8(0x0614) -#define PORTA_PIN5CTRL _SFR_MEM8(0x0615) -#define PORTA_PIN6CTRL _SFR_MEM8(0x0616) -#define PORTA_PIN7CTRL _SFR_MEM8(0x0617) - -/* PORTB - Port B */ -#define PORTB_DIR _SFR_MEM8(0x0620) -#define PORTB_DIRSET _SFR_MEM8(0x0621) -#define PORTB_DIRCLR _SFR_MEM8(0x0622) -#define PORTB_DIRTGL _SFR_MEM8(0x0623) -#define PORTB_OUT _SFR_MEM8(0x0624) -#define PORTB_OUTSET _SFR_MEM8(0x0625) -#define PORTB_OUTCLR _SFR_MEM8(0x0626) -#define PORTB_OUTTGL _SFR_MEM8(0x0627) -#define PORTB_IN _SFR_MEM8(0x0628) -#define PORTB_INTCTRL _SFR_MEM8(0x0629) -#define PORTB_INT0MASK _SFR_MEM8(0x062A) -#define PORTB_INT1MASK _SFR_MEM8(0x062B) -#define PORTB_INTFLAGS _SFR_MEM8(0x062C) -#define PORTB_PIN0CTRL _SFR_MEM8(0x0630) -#define PORTB_PIN1CTRL _SFR_MEM8(0x0631) -#define PORTB_PIN2CTRL _SFR_MEM8(0x0632) -#define PORTB_PIN3CTRL _SFR_MEM8(0x0633) -#define PORTB_PIN4CTRL _SFR_MEM8(0x0634) -#define PORTB_PIN5CTRL _SFR_MEM8(0x0635) -#define PORTB_PIN6CTRL _SFR_MEM8(0x0636) -#define PORTB_PIN7CTRL _SFR_MEM8(0x0637) - -/* PORTC - Port C */ -#define PORTC_DIR _SFR_MEM8(0x0640) -#define PORTC_DIRSET _SFR_MEM8(0x0641) -#define PORTC_DIRCLR _SFR_MEM8(0x0642) -#define PORTC_DIRTGL _SFR_MEM8(0x0643) -#define PORTC_OUT _SFR_MEM8(0x0644) -#define PORTC_OUTSET _SFR_MEM8(0x0645) -#define PORTC_OUTCLR _SFR_MEM8(0x0646) -#define PORTC_OUTTGL _SFR_MEM8(0x0647) -#define PORTC_IN _SFR_MEM8(0x0648) -#define PORTC_INTCTRL _SFR_MEM8(0x0649) -#define PORTC_INT0MASK _SFR_MEM8(0x064A) -#define PORTC_INT1MASK _SFR_MEM8(0x064B) -#define PORTC_INTFLAGS _SFR_MEM8(0x064C) -#define PORTC_PIN0CTRL _SFR_MEM8(0x0650) -#define PORTC_PIN1CTRL _SFR_MEM8(0x0651) -#define PORTC_PIN2CTRL _SFR_MEM8(0x0652) -#define PORTC_PIN3CTRL _SFR_MEM8(0x0653) -#define PORTC_PIN4CTRL _SFR_MEM8(0x0654) -#define PORTC_PIN5CTRL _SFR_MEM8(0x0655) -#define PORTC_PIN6CTRL _SFR_MEM8(0x0656) -#define PORTC_PIN7CTRL _SFR_MEM8(0x0657) - -/* PORTD - Port D */ -#define PORTD_DIR _SFR_MEM8(0x0660) -#define PORTD_DIRSET _SFR_MEM8(0x0661) -#define PORTD_DIRCLR _SFR_MEM8(0x0662) -#define PORTD_DIRTGL _SFR_MEM8(0x0663) -#define PORTD_OUT _SFR_MEM8(0x0664) -#define PORTD_OUTSET _SFR_MEM8(0x0665) -#define PORTD_OUTCLR _SFR_MEM8(0x0666) -#define PORTD_OUTTGL _SFR_MEM8(0x0667) -#define PORTD_IN _SFR_MEM8(0x0668) -#define PORTD_INTCTRL _SFR_MEM8(0x0669) -#define PORTD_INT0MASK _SFR_MEM8(0x066A) -#define PORTD_INT1MASK _SFR_MEM8(0x066B) -#define PORTD_INTFLAGS _SFR_MEM8(0x066C) -#define PORTD_PIN0CTRL _SFR_MEM8(0x0670) -#define PORTD_PIN1CTRL _SFR_MEM8(0x0671) -#define PORTD_PIN2CTRL _SFR_MEM8(0x0672) -#define PORTD_PIN3CTRL _SFR_MEM8(0x0673) -#define PORTD_PIN4CTRL _SFR_MEM8(0x0674) -#define PORTD_PIN5CTRL _SFR_MEM8(0x0675) -#define PORTD_PIN6CTRL _SFR_MEM8(0x0676) -#define PORTD_PIN7CTRL _SFR_MEM8(0x0677) - -/* PORTE - Port E */ -#define PORTE_DIR _SFR_MEM8(0x0680) -#define PORTE_DIRSET _SFR_MEM8(0x0681) -#define PORTE_DIRCLR _SFR_MEM8(0x0682) -#define PORTE_DIRTGL _SFR_MEM8(0x0683) -#define PORTE_OUT _SFR_MEM8(0x0684) -#define PORTE_OUTSET _SFR_MEM8(0x0685) -#define PORTE_OUTCLR _SFR_MEM8(0x0686) -#define PORTE_OUTTGL _SFR_MEM8(0x0687) -#define PORTE_IN _SFR_MEM8(0x0688) -#define PORTE_INTCTRL _SFR_MEM8(0x0689) -#define PORTE_INT0MASK _SFR_MEM8(0x068A) -#define PORTE_INT1MASK _SFR_MEM8(0x068B) -#define PORTE_INTFLAGS _SFR_MEM8(0x068C) -#define PORTE_PIN0CTRL _SFR_MEM8(0x0690) -#define PORTE_PIN1CTRL _SFR_MEM8(0x0691) -#define PORTE_PIN2CTRL _SFR_MEM8(0x0692) -#define PORTE_PIN3CTRL _SFR_MEM8(0x0693) -#define PORTE_PIN4CTRL _SFR_MEM8(0x0694) -#define PORTE_PIN5CTRL _SFR_MEM8(0x0695) -#define PORTE_PIN6CTRL _SFR_MEM8(0x0696) -#define PORTE_PIN7CTRL _SFR_MEM8(0x0697) - -/* PORTF - Port F */ -#define PORTF_DIR _SFR_MEM8(0x06A0) -#define PORTF_DIRSET _SFR_MEM8(0x06A1) -#define PORTF_DIRCLR _SFR_MEM8(0x06A2) -#define PORTF_DIRTGL _SFR_MEM8(0x06A3) -#define PORTF_OUT _SFR_MEM8(0x06A4) -#define PORTF_OUTSET _SFR_MEM8(0x06A5) -#define PORTF_OUTCLR _SFR_MEM8(0x06A6) -#define PORTF_OUTTGL _SFR_MEM8(0x06A7) -#define PORTF_IN _SFR_MEM8(0x06A8) -#define PORTF_INTCTRL _SFR_MEM8(0x06A9) -#define PORTF_INT0MASK _SFR_MEM8(0x06AA) -#define PORTF_INT1MASK _SFR_MEM8(0x06AB) -#define PORTF_INTFLAGS _SFR_MEM8(0x06AC) -#define PORTF_PIN0CTRL _SFR_MEM8(0x06B0) -#define PORTF_PIN1CTRL _SFR_MEM8(0x06B1) -#define PORTF_PIN2CTRL _SFR_MEM8(0x06B2) -#define PORTF_PIN3CTRL _SFR_MEM8(0x06B3) -#define PORTF_PIN4CTRL _SFR_MEM8(0x06B4) -#define PORTF_PIN5CTRL _SFR_MEM8(0x06B5) -#define PORTF_PIN6CTRL _SFR_MEM8(0x06B6) -#define PORTF_PIN7CTRL _SFR_MEM8(0x06B7) - -/* PORTR - Port R */ -#define PORTR_DIR _SFR_MEM8(0x07E0) -#define PORTR_DIRSET _SFR_MEM8(0x07E1) -#define PORTR_DIRCLR _SFR_MEM8(0x07E2) -#define PORTR_DIRTGL _SFR_MEM8(0x07E3) -#define PORTR_OUT _SFR_MEM8(0x07E4) -#define PORTR_OUTSET _SFR_MEM8(0x07E5) -#define PORTR_OUTCLR _SFR_MEM8(0x07E6) -#define PORTR_OUTTGL _SFR_MEM8(0x07E7) -#define PORTR_IN _SFR_MEM8(0x07E8) -#define PORTR_INTCTRL _SFR_MEM8(0x07E9) -#define PORTR_INT0MASK _SFR_MEM8(0x07EA) -#define PORTR_INT1MASK _SFR_MEM8(0x07EB) -#define PORTR_INTFLAGS _SFR_MEM8(0x07EC) -#define PORTR_PIN0CTRL _SFR_MEM8(0x07F0) -#define PORTR_PIN1CTRL _SFR_MEM8(0x07F1) -#define PORTR_PIN2CTRL _SFR_MEM8(0x07F2) -#define PORTR_PIN3CTRL _SFR_MEM8(0x07F3) -#define PORTR_PIN4CTRL _SFR_MEM8(0x07F4) -#define PORTR_PIN5CTRL _SFR_MEM8(0x07F5) -#define PORTR_PIN6CTRL _SFR_MEM8(0x07F6) -#define PORTR_PIN7CTRL _SFR_MEM8(0x07F7) - -/* TCC0 - Timer/Counter C0 */ -#define TCC0_CTRLA _SFR_MEM8(0x0800) -#define TCC0_CTRLB _SFR_MEM8(0x0801) -#define TCC0_CTRLC _SFR_MEM8(0x0802) -#define TCC0_CTRLD _SFR_MEM8(0x0803) -#define TCC0_CTRLE _SFR_MEM8(0x0804) -#define TCC0_INTCTRLA _SFR_MEM8(0x0806) -#define TCC0_INTCTRLB _SFR_MEM8(0x0807) -#define TCC0_CTRLFCLR _SFR_MEM8(0x0808) -#define TCC0_CTRLFSET _SFR_MEM8(0x0809) -#define TCC0_CTRLGCLR _SFR_MEM8(0x080A) -#define TCC0_CTRLGSET _SFR_MEM8(0x080B) -#define TCC0_INTFLAGS _SFR_MEM8(0x080C) -#define TCC0_TEMP _SFR_MEM8(0x080F) -#define TCC0_CNT _SFR_MEM16(0x0820) -#define TCC0_PER _SFR_MEM16(0x0826) -#define TCC0_CCA _SFR_MEM16(0x0828) -#define TCC0_CCB _SFR_MEM16(0x082A) -#define TCC0_CCC _SFR_MEM16(0x082C) -#define TCC0_CCD _SFR_MEM16(0x082E) -#define TCC0_PERBUF _SFR_MEM16(0x0836) -#define TCC0_CCABUF _SFR_MEM16(0x0838) -#define TCC0_CCBBUF _SFR_MEM16(0x083A) -#define TCC0_CCCBUF _SFR_MEM16(0x083C) -#define TCC0_CCDBUF _SFR_MEM16(0x083E) - -/* TCC1 - Timer/Counter C1 */ -#define TCC1_CTRLA _SFR_MEM8(0x0840) -#define TCC1_CTRLB _SFR_MEM8(0x0841) -#define TCC1_CTRLC _SFR_MEM8(0x0842) -#define TCC1_CTRLD _SFR_MEM8(0x0843) -#define TCC1_CTRLE _SFR_MEM8(0x0844) -#define TCC1_INTCTRLA _SFR_MEM8(0x0846) -#define TCC1_INTCTRLB _SFR_MEM8(0x0847) -#define TCC1_CTRLFCLR _SFR_MEM8(0x0848) -#define TCC1_CTRLFSET _SFR_MEM8(0x0849) -#define TCC1_CTRLGCLR _SFR_MEM8(0x084A) -#define TCC1_CTRLGSET _SFR_MEM8(0x084B) -#define TCC1_INTFLAGS _SFR_MEM8(0x084C) -#define TCC1_TEMP _SFR_MEM8(0x084F) -#define TCC1_CNT _SFR_MEM16(0x0860) -#define TCC1_PER _SFR_MEM16(0x0866) -#define TCC1_CCA _SFR_MEM16(0x0868) -#define TCC1_CCB _SFR_MEM16(0x086A) -#define TCC1_PERBUF _SFR_MEM16(0x0876) -#define TCC1_CCABUF _SFR_MEM16(0x0878) -#define TCC1_CCBBUF _SFR_MEM16(0x087A) - -/* AWEXC - Advanced Waveform Extension C */ -#define AWEXC_CTRL _SFR_MEM8(0x0880) -#define AWEXC_FDEVMASK _SFR_MEM8(0x0882) -#define AWEXC_FDCTRL _SFR_MEM8(0x0883) -#define AWEXC_STATUS _SFR_MEM8(0x0884) -#define AWEXC_DTBOTH _SFR_MEM8(0x0886) -#define AWEXC_DTBOTHBUF _SFR_MEM8(0x0887) -#define AWEXC_DTLS _SFR_MEM8(0x0888) -#define AWEXC_DTHS _SFR_MEM8(0x0889) -#define AWEXC_DTLSBUF _SFR_MEM8(0x088A) -#define AWEXC_DTHSBUF _SFR_MEM8(0x088B) -#define AWEXC_OUTOVEN _SFR_MEM8(0x088C) - -/* HIRESC - High-Resolution Extension C */ -#define HIRESC_CTRL _SFR_MEM8(0x0890) - -/* USARTC0 - Universal Asynchronous Receiver-Transmitter C0 */ -#define USARTC0_DATA _SFR_MEM8(0x08A0) -#define USARTC0_STATUS _SFR_MEM8(0x08A1) -#define USARTC0_CTRLA _SFR_MEM8(0x08A3) -#define USARTC0_CTRLB _SFR_MEM8(0x08A4) -#define USARTC0_CTRLC _SFR_MEM8(0x08A5) -#define USARTC0_BAUDCTRLA _SFR_MEM8(0x08A6) -#define USARTC0_BAUDCTRLB _SFR_MEM8(0x08A7) - -/* USARTC1 - Universal Asynchronous Receiver-Transmitter C1 */ -#define USARTC1_DATA _SFR_MEM8(0x08B0) -#define USARTC1_STATUS _SFR_MEM8(0x08B1) -#define USARTC1_CTRLA _SFR_MEM8(0x08B3) -#define USARTC1_CTRLB _SFR_MEM8(0x08B4) -#define USARTC1_CTRLC _SFR_MEM8(0x08B5) -#define USARTC1_BAUDCTRLA _SFR_MEM8(0x08B6) -#define USARTC1_BAUDCTRLB _SFR_MEM8(0x08B7) - -/* SPIC - Serial Peripheral Interface C */ -#define SPIC_CTRL _SFR_MEM8(0x08C0) -#define SPIC_INTCTRL _SFR_MEM8(0x08C1) -#define SPIC_STATUS _SFR_MEM8(0x08C2) -#define SPIC_DATA _SFR_MEM8(0x08C3) - -/* IRCOM - IR Communication Module */ -#define IRCOM_CTRL _SFR_MEM8(0x08F8) -#define IRCOM_TXPLCTRL _SFR_MEM8(0x08F9) -#define IRCOM_RXPLCTRL _SFR_MEM8(0x08FA) - -/* TCD0 - Timer/Counter D0 */ -#define TCD0_CTRLA _SFR_MEM8(0x0900) -#define TCD0_CTRLB _SFR_MEM8(0x0901) -#define TCD0_CTRLC _SFR_MEM8(0x0902) -#define TCD0_CTRLD _SFR_MEM8(0x0903) -#define TCD0_CTRLE _SFR_MEM8(0x0904) -#define TCD0_INTCTRLA _SFR_MEM8(0x0906) -#define TCD0_INTCTRLB _SFR_MEM8(0x0907) -#define TCD0_CTRLFCLR _SFR_MEM8(0x0908) -#define TCD0_CTRLFSET _SFR_MEM8(0x0909) -#define TCD0_CTRLGCLR _SFR_MEM8(0x090A) -#define TCD0_CTRLGSET _SFR_MEM8(0x090B) -#define TCD0_INTFLAGS _SFR_MEM8(0x090C) -#define TCD0_TEMP _SFR_MEM8(0x090F) -#define TCD0_CNT _SFR_MEM16(0x0920) -#define TCD0_PER _SFR_MEM16(0x0926) -#define TCD0_CCA _SFR_MEM16(0x0928) -#define TCD0_CCB _SFR_MEM16(0x092A) -#define TCD0_CCC _SFR_MEM16(0x092C) -#define TCD0_CCD _SFR_MEM16(0x092E) -#define TCD0_PERBUF _SFR_MEM16(0x0936) -#define TCD0_CCABUF _SFR_MEM16(0x0938) -#define TCD0_CCBBUF _SFR_MEM16(0x093A) -#define TCD0_CCCBUF _SFR_MEM16(0x093C) -#define TCD0_CCDBUF _SFR_MEM16(0x093E) - -/* TCD1 - Timer/Counter D1 */ -#define TCD1_CTRLA _SFR_MEM8(0x0940) -#define TCD1_CTRLB _SFR_MEM8(0x0941) -#define TCD1_CTRLC _SFR_MEM8(0x0942) -#define TCD1_CTRLD _SFR_MEM8(0x0943) -#define TCD1_CTRLE _SFR_MEM8(0x0944) -#define TCD1_INTCTRLA _SFR_MEM8(0x0946) -#define TCD1_INTCTRLB _SFR_MEM8(0x0947) -#define TCD1_CTRLFCLR _SFR_MEM8(0x0948) -#define TCD1_CTRLFSET _SFR_MEM8(0x0949) -#define TCD1_CTRLGCLR _SFR_MEM8(0x094A) -#define TCD1_CTRLGSET _SFR_MEM8(0x094B) -#define TCD1_INTFLAGS _SFR_MEM8(0x094C) -#define TCD1_TEMP _SFR_MEM8(0x094F) -#define TCD1_CNT _SFR_MEM16(0x0960) -#define TCD1_PER _SFR_MEM16(0x0966) -#define TCD1_CCA _SFR_MEM16(0x0968) -#define TCD1_CCB _SFR_MEM16(0x096A) -#define TCD1_PERBUF _SFR_MEM16(0x0976) -#define TCD1_CCABUF _SFR_MEM16(0x0978) -#define TCD1_CCBBUF _SFR_MEM16(0x097A) - -/* HIRESD - High-Resolution Extension D */ -#define HIRESD_CTRL _SFR_MEM8(0x0990) - -/* USARTD0 - Universal Asynchronous Receiver-Transmitter D0 */ -#define USARTD0_DATA _SFR_MEM8(0x09A0) -#define USARTD0_STATUS _SFR_MEM8(0x09A1) -#define USARTD0_CTRLA _SFR_MEM8(0x09A3) -#define USARTD0_CTRLB _SFR_MEM8(0x09A4) -#define USARTD0_CTRLC _SFR_MEM8(0x09A5) -#define USARTD0_BAUDCTRLA _SFR_MEM8(0x09A6) -#define USARTD0_BAUDCTRLB _SFR_MEM8(0x09A7) - -/* USARTD1 - Universal Asynchronous Receiver-Transmitter D1 */ -#define USARTD1_DATA _SFR_MEM8(0x09B0) -#define USARTD1_STATUS _SFR_MEM8(0x09B1) -#define USARTD1_CTRLA _SFR_MEM8(0x09B3) -#define USARTD1_CTRLB _SFR_MEM8(0x09B4) -#define USARTD1_CTRLC _SFR_MEM8(0x09B5) -#define USARTD1_BAUDCTRLA _SFR_MEM8(0x09B6) -#define USARTD1_BAUDCTRLB _SFR_MEM8(0x09B7) - -/* SPID - Serial Peripheral Interface D */ -#define SPID_CTRL _SFR_MEM8(0x09C0) -#define SPID_INTCTRL _SFR_MEM8(0x09C1) -#define SPID_STATUS _SFR_MEM8(0x09C2) -#define SPID_DATA _SFR_MEM8(0x09C3) - -/* TCE0 - Timer/Counter E0 */ -#define TCE0_CTRLA _SFR_MEM8(0x0A00) -#define TCE0_CTRLB _SFR_MEM8(0x0A01) -#define TCE0_CTRLC _SFR_MEM8(0x0A02) -#define TCE0_CTRLD _SFR_MEM8(0x0A03) -#define TCE0_CTRLE _SFR_MEM8(0x0A04) -#define TCE0_INTCTRLA _SFR_MEM8(0x0A06) -#define TCE0_INTCTRLB _SFR_MEM8(0x0A07) -#define TCE0_CTRLFCLR _SFR_MEM8(0x0A08) -#define TCE0_CTRLFSET _SFR_MEM8(0x0A09) -#define TCE0_CTRLGCLR _SFR_MEM8(0x0A0A) -#define TCE0_CTRLGSET _SFR_MEM8(0x0A0B) -#define TCE0_INTFLAGS _SFR_MEM8(0x0A0C) -#define TCE0_TEMP _SFR_MEM8(0x0A0F) -#define TCE0_CNT _SFR_MEM16(0x0A20) -#define TCE0_PER _SFR_MEM16(0x0A26) -#define TCE0_CCA _SFR_MEM16(0x0A28) -#define TCE0_CCB _SFR_MEM16(0x0A2A) -#define TCE0_CCC _SFR_MEM16(0x0A2C) -#define TCE0_CCD _SFR_MEM16(0x0A2E) -#define TCE0_PERBUF _SFR_MEM16(0x0A36) -#define TCE0_CCABUF _SFR_MEM16(0x0A38) -#define TCE0_CCBBUF _SFR_MEM16(0x0A3A) -#define TCE0_CCCBUF _SFR_MEM16(0x0A3C) -#define TCE0_CCDBUF _SFR_MEM16(0x0A3E) - -/* TCE1 - Timer/Counter E1 */ -#define TCE1_CTRLA _SFR_MEM8(0x0A40) -#define TCE1_CTRLB _SFR_MEM8(0x0A41) -#define TCE1_CTRLC _SFR_MEM8(0x0A42) -#define TCE1_CTRLD _SFR_MEM8(0x0A43) -#define TCE1_CTRLE _SFR_MEM8(0x0A44) -#define TCE1_INTCTRLA _SFR_MEM8(0x0A46) -#define TCE1_INTCTRLB _SFR_MEM8(0x0A47) -#define TCE1_CTRLFCLR _SFR_MEM8(0x0A48) -#define TCE1_CTRLFSET _SFR_MEM8(0x0A49) -#define TCE1_CTRLGCLR _SFR_MEM8(0x0A4A) -#define TCE1_CTRLGSET _SFR_MEM8(0x0A4B) -#define TCE1_INTFLAGS _SFR_MEM8(0x0A4C) -#define TCE1_TEMP _SFR_MEM8(0x0A4F) -#define TCE1_CNT _SFR_MEM16(0x0A60) -#define TCE1_PER _SFR_MEM16(0x0A66) -#define TCE1_CCA _SFR_MEM16(0x0A68) -#define TCE1_CCB _SFR_MEM16(0x0A6A) -#define TCE1_PERBUF _SFR_MEM16(0x0A76) -#define TCE1_CCABUF _SFR_MEM16(0x0A78) -#define TCE1_CCBBUF _SFR_MEM16(0x0A7A) - -/* AWEXE - Advanced Waveform Extension E */ -#define AWEXE_CTRL _SFR_MEM8(0x0A80) -#define AWEXE_FDEVMASK _SFR_MEM8(0x0A82) -#define AWEXE_FDCTRL _SFR_MEM8(0x0A83) -#define AWEXE_STATUS _SFR_MEM8(0x0A84) -#define AWEXE_DTBOTH _SFR_MEM8(0x0A86) -#define AWEXE_DTBOTHBUF _SFR_MEM8(0x0A87) -#define AWEXE_DTLS _SFR_MEM8(0x0A88) -#define AWEXE_DTHS _SFR_MEM8(0x0A89) -#define AWEXE_DTLSBUF _SFR_MEM8(0x0A8A) -#define AWEXE_DTHSBUF _SFR_MEM8(0x0A8B) -#define AWEXE_OUTOVEN _SFR_MEM8(0x0A8C) - -/* HIRESE - High-Resolution Extension E */ -#define HIRESE_CTRL _SFR_MEM8(0x0A90) - -/* USARTE0 - Universal Asynchronous Receiver-Transmitter E0 */ -#define USARTE0_DATA _SFR_MEM8(0x0AA0) -#define USARTE0_STATUS _SFR_MEM8(0x0AA1) -#define USARTE0_CTRLA _SFR_MEM8(0x0AA3) -#define USARTE0_CTRLB _SFR_MEM8(0x0AA4) -#define USARTE0_CTRLC _SFR_MEM8(0x0AA5) -#define USARTE0_BAUDCTRLA _SFR_MEM8(0x0AA6) -#define USARTE0_BAUDCTRLB _SFR_MEM8(0x0AA7) - -/* USARTE1 - Universal Asynchronous Receiver-Transmitter E1 */ -#define USARTE1_DATA _SFR_MEM8(0x0AB0) -#define USARTE1_STATUS _SFR_MEM8(0x0AB1) -#define USARTE1_CTRLA _SFR_MEM8(0x0AB3) -#define USARTE1_CTRLB _SFR_MEM8(0x0AB4) -#define USARTE1_CTRLC _SFR_MEM8(0x0AB5) -#define USARTE1_BAUDCTRLA _SFR_MEM8(0x0AB6) -#define USARTE1_BAUDCTRLB _SFR_MEM8(0x0AB7) - -/* SPIE - Serial Peripheral Interface E */ -#define SPIE_CTRL _SFR_MEM8(0x0AC0) -#define SPIE_INTCTRL _SFR_MEM8(0x0AC1) -#define SPIE_STATUS _SFR_MEM8(0x0AC2) -#define SPIE_DATA _SFR_MEM8(0x0AC3) - -/* TCF0 - Timer/Counter F0 */ -#define TCF0_CTRLA _SFR_MEM8(0x0B00) -#define TCF0_CTRLB _SFR_MEM8(0x0B01) -#define TCF0_CTRLC _SFR_MEM8(0x0B02) -#define TCF0_CTRLD _SFR_MEM8(0x0B03) -#define TCF0_CTRLE _SFR_MEM8(0x0B04) -#define TCF0_INTCTRLA _SFR_MEM8(0x0B06) -#define TCF0_INTCTRLB _SFR_MEM8(0x0B07) -#define TCF0_CTRLFCLR _SFR_MEM8(0x0B08) -#define TCF0_CTRLFSET _SFR_MEM8(0x0B09) -#define TCF0_CTRLGCLR _SFR_MEM8(0x0B0A) -#define TCF0_CTRLGSET _SFR_MEM8(0x0B0B) -#define TCF0_INTFLAGS _SFR_MEM8(0x0B0C) -#define TCF0_TEMP _SFR_MEM8(0x0B0F) -#define TCF0_CNT _SFR_MEM16(0x0B20) -#define TCF0_PER _SFR_MEM16(0x0B26) -#define TCF0_CCA _SFR_MEM16(0x0B28) -#define TCF0_CCB _SFR_MEM16(0x0B2A) -#define TCF0_CCC _SFR_MEM16(0x0B2C) -#define TCF0_CCD _SFR_MEM16(0x0B2E) -#define TCF0_PERBUF _SFR_MEM16(0x0B36) -#define TCF0_CCABUF _SFR_MEM16(0x0B38) -#define TCF0_CCBBUF _SFR_MEM16(0x0B3A) -#define TCF0_CCCBUF _SFR_MEM16(0x0B3C) -#define TCF0_CCDBUF _SFR_MEM16(0x0B3E) - -/* HIRESF - High-Resolution Extension F */ -#define HIRESF_CTRL _SFR_MEM8(0x0B90) - -/* USARTF0 - Universal Asynchronous Receiver-Transmitter F0 */ -#define USARTF0_DATA _SFR_MEM8(0x0BA0) -#define USARTF0_STATUS _SFR_MEM8(0x0BA1) -#define USARTF0_CTRLA _SFR_MEM8(0x0BA3) -#define USARTF0_CTRLB _SFR_MEM8(0x0BA4) -#define USARTF0_CTRLC _SFR_MEM8(0x0BA5) -#define USARTF0_BAUDCTRLA _SFR_MEM8(0x0BA6) -#define USARTF0_BAUDCTRLB _SFR_MEM8(0x0BA7) - -/* USARTF1 - Universal Asynchronous Receiver-Transmitter F1 */ -#define USARTF1_DATA _SFR_MEM8(0x0BB0) -#define USARTF1_STATUS _SFR_MEM8(0x0BB1) -#define USARTF1_CTRLA _SFR_MEM8(0x0BB3) -#define USARTF1_CTRLB _SFR_MEM8(0x0BB4) -#define USARTF1_CTRLC _SFR_MEM8(0x0BB5) -#define USARTF1_BAUDCTRLA _SFR_MEM8(0x0BB6) -#define USARTF1_BAUDCTRLB _SFR_MEM8(0x0BB7) - -/* SPIF - Serial Peripheral Interface F */ -#define SPIF_CTRL _SFR_MEM8(0x0BC0) -#define SPIF_INTCTRL _SFR_MEM8(0x0BC1) -#define SPIF_STATUS _SFR_MEM8(0x0BC2) -#define SPIF_DATA _SFR_MEM8(0x0BC3) - - - -/*================== Bitfield Definitions ================== */ - -/* XOCD - On-Chip Debug System */ -/* OCD.OCDR1 bit masks and bit positions */ -#define OCD_OCDRD_bm 0x01 /* OCDR Dirty bit mask. */ -#define OCD_OCDRD_bp 0 /* OCDR Dirty bit position. */ - - -/* CPU - CPU */ -/* CPU.CCP bit masks and bit positions */ -#define CPU_CCP_gm 0xFF /* CCP signature group mask. */ -#define CPU_CCP_gp 0 /* CCP signature group position. */ -#define CPU_CCP0_bm (1<<0) /* CCP signature bit 0 mask. */ -#define CPU_CCP0_bp 0 /* CCP signature bit 0 position. */ -#define CPU_CCP1_bm (1<<1) /* CCP signature bit 1 mask. */ -#define CPU_CCP1_bp 1 /* CCP signature bit 1 position. */ -#define CPU_CCP2_bm (1<<2) /* CCP signature bit 2 mask. */ -#define CPU_CCP2_bp 2 /* CCP signature bit 2 position. */ -#define CPU_CCP3_bm (1<<3) /* CCP signature bit 3 mask. */ -#define CPU_CCP3_bp 3 /* CCP signature bit 3 position. */ -#define CPU_CCP4_bm (1<<4) /* CCP signature bit 4 mask. */ -#define CPU_CCP4_bp 4 /* CCP signature bit 4 position. */ -#define CPU_CCP5_bm (1<<5) /* CCP signature bit 5 mask. */ -#define CPU_CCP5_bp 5 /* CCP signature bit 5 position. */ -#define CPU_CCP6_bm (1<<6) /* CCP signature bit 6 mask. */ -#define CPU_CCP6_bp 6 /* CCP signature bit 6 position. */ -#define CPU_CCP7_bm (1<<7) /* CCP signature bit 7 mask. */ -#define CPU_CCP7_bp 7 /* CCP signature bit 7 position. */ - - -/* CPU.SREG bit masks and bit positions */ -#define CPU_I_bm 0x80 /* Global Interrupt Enable Flag bit mask. */ -#define CPU_I_bp 7 /* Global Interrupt Enable Flag bit position. */ - -#define CPU_T_bm 0x40 /* Transfer Bit bit mask. */ -#define CPU_T_bp 6 /* Transfer Bit bit position. */ - -#define CPU_H_bm 0x20 /* Half Carry Flag bit mask. */ -#define CPU_H_bp 5 /* Half Carry Flag bit position. */ - -#define CPU_S_bm 0x10 /* N Exclusive Or V Flag bit mask. */ -#define CPU_S_bp 4 /* N Exclusive Or V Flag bit position. */ - -#define CPU_V_bm 0x08 /* Two's Complement Overflow Flag bit mask. */ -#define CPU_V_bp 3 /* Two's Complement Overflow Flag bit position. */ - -#define CPU_N_bm 0x04 /* Negative Flag bit mask. */ -#define CPU_N_bp 2 /* Negative Flag bit position. */ - -#define CPU_Z_bm 0x02 /* Zero Flag bit mask. */ -#define CPU_Z_bp 1 /* Zero Flag bit position. */ - -#define CPU_C_bm 0x01 /* Carry Flag bit mask. */ -#define CPU_C_bp 0 /* Carry Flag bit position. */ - - -/* CLK - Clock System */ -/* CLK.CTRL bit masks and bit positions */ -#define CLK_SCLKSEL_gm 0x07 /* System Clock Selection group mask. */ -#define CLK_SCLKSEL_gp 0 /* System Clock Selection group position. */ -#define CLK_SCLKSEL0_bm (1<<0) /* System Clock Selection bit 0 mask. */ -#define CLK_SCLKSEL0_bp 0 /* System Clock Selection bit 0 position. */ -#define CLK_SCLKSEL1_bm (1<<1) /* System Clock Selection bit 1 mask. */ -#define CLK_SCLKSEL1_bp 1 /* System Clock Selection bit 1 position. */ -#define CLK_SCLKSEL2_bm (1<<2) /* System Clock Selection bit 2 mask. */ -#define CLK_SCLKSEL2_bp 2 /* System Clock Selection bit 2 position. */ - - -/* CLK.PSCTRL bit masks and bit positions */ -#define CLK_PSADIV_gm 0x7C /* Prescaler A Division Factor group mask. */ -#define CLK_PSADIV_gp 2 /* Prescaler A Division Factor group position. */ -#define CLK_PSADIV0_bm (1<<2) /* Prescaler A Division Factor bit 0 mask. */ -#define CLK_PSADIV0_bp 2 /* Prescaler A Division Factor bit 0 position. */ -#define CLK_PSADIV1_bm (1<<3) /* Prescaler A Division Factor bit 1 mask. */ -#define CLK_PSADIV1_bp 3 /* Prescaler A Division Factor bit 1 position. */ -#define CLK_PSADIV2_bm (1<<4) /* Prescaler A Division Factor bit 2 mask. */ -#define CLK_PSADIV2_bp 4 /* Prescaler A Division Factor bit 2 position. */ -#define CLK_PSADIV3_bm (1<<5) /* Prescaler A Division Factor bit 3 mask. */ -#define CLK_PSADIV3_bp 5 /* Prescaler A Division Factor bit 3 position. */ -#define CLK_PSADIV4_bm (1<<6) /* Prescaler A Division Factor bit 4 mask. */ -#define CLK_PSADIV4_bp 6 /* Prescaler A Division Factor bit 4 position. */ - -#define CLK_PSBCDIV_gm 0x03 /* Prescaler B and C Division factor group mask. */ -#define CLK_PSBCDIV_gp 0 /* Prescaler B and C Division factor group position. */ -#define CLK_PSBCDIV0_bm (1<<0) /* Prescaler B and C Division factor bit 0 mask. */ -#define CLK_PSBCDIV0_bp 0 /* Prescaler B and C Division factor bit 0 position. */ -#define CLK_PSBCDIV1_bm (1<<1) /* Prescaler B and C Division factor bit 1 mask. */ -#define CLK_PSBCDIV1_bp 1 /* Prescaler B and C Division factor bit 1 position. */ - - -/* CLK.LOCK bit masks and bit positions */ -#define CLK_LOCK_bm 0x01 /* Clock System Lock bit mask. */ -#define CLK_LOCK_bp 0 /* Clock System Lock bit position. */ - - -/* CLK.RTCCTRL bit masks and bit positions */ -#define CLK_RTCSRC_gm 0x0E /* Clock Source group mask. */ -#define CLK_RTCSRC_gp 1 /* Clock Source group position. */ -#define CLK_RTCSRC0_bm (1<<1) /* Clock Source bit 0 mask. */ -#define CLK_RTCSRC0_bp 1 /* Clock Source bit 0 position. */ -#define CLK_RTCSRC1_bm (1<<2) /* Clock Source bit 1 mask. */ -#define CLK_RTCSRC1_bp 2 /* Clock Source bit 1 position. */ -#define CLK_RTCSRC2_bm (1<<3) /* Clock Source bit 2 mask. */ -#define CLK_RTCSRC2_bp 3 /* Clock Source bit 2 position. */ - -#define CLK_RTCEN_bm 0x01 /* RTC Clock Source Enable bit mask. */ -#define CLK_RTCEN_bp 0 /* RTC Clock Source Enable bit position. */ - - -/* PR.PR bit masks and bit positions */ -#define PR_EBI_bm 0x08 /* External Bus Interface bit mask. */ -#define PR_EBI_bp 3 /* External Bus Interface bit position. */ - -#define PR_RTC_bm 0x04 /* Real-time Counter bit mask. */ -#define PR_RTC_bp 2 /* Real-time Counter bit position. */ - -#define PR_EVSYS_bm 0x02 /* Event System bit mask. */ -#define PR_EVSYS_bp 1 /* Event System bit position. */ - -#define PR_DMA_bm 0x01 /* DMA-Controller bit mask. */ -#define PR_DMA_bp 0 /* DMA-Controller bit position. */ - - -/* PR.PRPA bit masks and bit positions */ -#define PR_DAC_bm 0x04 /* Port A DAC bit mask. */ -#define PR_DAC_bp 2 /* Port A DAC bit position. */ - -#define PR_ADC_bm 0x02 /* Port A ADC bit mask. */ -#define PR_ADC_bp 1 /* Port A ADC bit position. */ - -#define PR_AC_bm 0x01 /* Port A Analog Comparator bit mask. */ -#define PR_AC_bp 0 /* Port A Analog Comparator bit position. */ - - -/* PR.PRPB bit masks and bit positions */ -/* PR_DAC_bm Predefined. */ -/* PR_DAC_bp Predefined. */ - -/* PR_ADC_bm Predefined. */ -/* PR_ADC_bp Predefined. */ - -/* PR_AC_bm Predefined. */ -/* PR_AC_bp Predefined. */ - - -/* PR.PRPC bit masks and bit positions */ -#define PR_TWI_bm 0x40 /* Port C Two-wire Interface bit mask. */ -#define PR_TWI_bp 6 /* Port C Two-wire Interface bit position. */ - -#define PR_USART1_bm 0x20 /* Port C USART1 bit mask. */ -#define PR_USART1_bp 5 /* Port C USART1 bit position. */ - -#define PR_USART0_bm 0x10 /* Port C USART0 bit mask. */ -#define PR_USART0_bp 4 /* Port C USART0 bit position. */ - -#define PR_SPI_bm 0x08 /* Port C SPI bit mask. */ -#define PR_SPI_bp 3 /* Port C SPI bit position. */ - -#define PR_HIRES_bm 0x04 /* Port C AWEX bit mask. */ -#define PR_HIRES_bp 2 /* Port C AWEX bit position. */ - -#define PR_TC1_bm 0x02 /* Port C Timer/Counter1 bit mask. */ -#define PR_TC1_bp 1 /* Port C Timer/Counter1 bit position. */ - -#define PR_TC0_bm 0x01 /* Port C Timer/Counter0 bit mask. */ -#define PR_TC0_bp 0 /* Port C Timer/Counter0 bit position. */ - - -/* PR.PRPD bit masks and bit positions */ -/* PR_TWI_bm Predefined. */ -/* PR_TWI_bp Predefined. */ - -/* PR_USART1_bm Predefined. */ -/* PR_USART1_bp Predefined. */ - -/* PR_USART0_bm Predefined. */ -/* PR_USART0_bp Predefined. */ - -/* PR_SPI_bm Predefined. */ -/* PR_SPI_bp Predefined. */ - -/* PR_HIRES_bm Predefined. */ -/* PR_HIRES_bp Predefined. */ - -/* PR_TC1_bm Predefined. */ -/* PR_TC1_bp Predefined. */ - -/* PR_TC0_bm Predefined. */ -/* PR_TC0_bp Predefined. */ - - -/* PR.PRPE bit masks and bit positions */ -/* PR_TWI_bm Predefined. */ -/* PR_TWI_bp Predefined. */ - -/* PR_USART1_bm Predefined. */ -/* PR_USART1_bp Predefined. */ - -/* PR_USART0_bm Predefined. */ -/* PR_USART0_bp Predefined. */ - -/* PR_SPI_bm Predefined. */ -/* PR_SPI_bp Predefined. */ - -/* PR_HIRES_bm Predefined. */ -/* PR_HIRES_bp Predefined. */ - -/* PR_TC1_bm Predefined. */ -/* PR_TC1_bp Predefined. */ - -/* PR_TC0_bm Predefined. */ -/* PR_TC0_bp Predefined. */ - - -/* PR.PRPF bit masks and bit positions */ -/* PR_TWI_bm Predefined. */ -/* PR_TWI_bp Predefined. */ - -/* PR_USART1_bm Predefined. */ -/* PR_USART1_bp Predefined. */ - -/* PR_USART0_bm Predefined. */ -/* PR_USART0_bp Predefined. */ - -/* PR_SPI_bm Predefined. */ -/* PR_SPI_bp Predefined. */ - -/* PR_HIRES_bm Predefined. */ -/* PR_HIRES_bp Predefined. */ - -/* PR_TC1_bm Predefined. */ -/* PR_TC1_bp Predefined. */ - -/* PR_TC0_bm Predefined. */ -/* PR_TC0_bp Predefined. */ - - -/* SLEEP - Sleep Controller */ -/* SLEEP.CTRL bit masks and bit positions */ -#define SLEEP_SMODE_gm 0x0E /* Sleep Mode group mask. */ -#define SLEEP_SMODE_gp 1 /* Sleep Mode group position. */ -#define SLEEP_SMODE0_bm (1<<1) /* Sleep Mode bit 0 mask. */ -#define SLEEP_SMODE0_bp 1 /* Sleep Mode bit 0 position. */ -#define SLEEP_SMODE1_bm (1<<2) /* Sleep Mode bit 1 mask. */ -#define SLEEP_SMODE1_bp 2 /* Sleep Mode bit 1 position. */ -#define SLEEP_SMODE2_bm (1<<3) /* Sleep Mode bit 2 mask. */ -#define SLEEP_SMODE2_bp 3 /* Sleep Mode bit 2 position. */ - -#define SLEEP_SEN_bm 0x01 /* Sleep Enable bit mask. */ -#define SLEEP_SEN_bp 0 /* Sleep Enable bit position. */ - - -/* OSC - Oscillator */ -/* OSC.CTRL bit masks and bit positions */ -#define OSC_PLLEN_bm 0x10 /* PLL Enable bit mask. */ -#define OSC_PLLEN_bp 4 /* PLL Enable bit position. */ - -#define OSC_XOSCEN_bm 0x08 /* External Oscillator Enable bit mask. */ -#define OSC_XOSCEN_bp 3 /* External Oscillator Enable bit position. */ - -#define OSC_RC32KEN_bm 0x04 /* Internal 32kHz RC Oscillator Enable bit mask. */ -#define OSC_RC32KEN_bp 2 /* Internal 32kHz RC Oscillator Enable bit position. */ - -#define OSC_RC32MEN_bm 0x02 /* Internal 32MHz RC Oscillator Enable bit mask. */ -#define OSC_RC32MEN_bp 1 /* Internal 32MHz RC Oscillator Enable bit position. */ - -#define OSC_RC2MEN_bm 0x01 /* Internal 2MHz RC Oscillator Enable bit mask. */ -#define OSC_RC2MEN_bp 0 /* Internal 2MHz RC Oscillator Enable bit position. */ - - -/* OSC.STATUS bit masks and bit positions */ -#define OSC_PLLRDY_bm 0x10 /* PLL Ready bit mask. */ -#define OSC_PLLRDY_bp 4 /* PLL Ready bit position. */ - -#define OSC_XOSCRDY_bm 0x08 /* External Oscillator Ready bit mask. */ -#define OSC_XOSCRDY_bp 3 /* External Oscillator Ready bit position. */ - -#define OSC_RC32KRDY_bm 0x04 /* Internal 32kHz RC Oscillator Ready bit mask. */ -#define OSC_RC32KRDY_bp 2 /* Internal 32kHz RC Oscillator Ready bit position. */ - -#define OSC_RC32MRDY_bm 0x02 /* Internal 32MHz RC Oscillator Ready bit mask. */ -#define OSC_RC32MRDY_bp 1 /* Internal 32MHz RC Oscillator Ready bit position. */ - -#define OSC_RC2MRDY_bm 0x01 /* Internal 2MHz RC Oscillator Ready bit mask. */ -#define OSC_RC2MRDY_bp 0 /* Internal 2MHz RC Oscillator Ready bit position. */ - - -/* OSC.XOSCCTRL bit masks and bit positions */ -#define OSC_FRQRANGE_gm 0xC0 /* Frequency Range group mask. */ -#define OSC_FRQRANGE_gp 6 /* Frequency Range group position. */ -#define OSC_FRQRANGE0_bm (1<<6) /* Frequency Range bit 0 mask. */ -#define OSC_FRQRANGE0_bp 6 /* Frequency Range bit 0 position. */ -#define OSC_FRQRANGE1_bm (1<<7) /* Frequency Range bit 1 mask. */ -#define OSC_FRQRANGE1_bp 7 /* Frequency Range bit 1 position. */ - -#define OSC_X32KLPM_bm 0x20 /* 32kHz XTAL OSC Low-power Mode bit mask. */ -#define OSC_X32KLPM_bp 5 /* 32kHz XTAL OSC Low-power Mode bit position. */ - -#define OSC_XOSCSEL_gm 0x0F /* External Oscillator Selection and Startup Time group mask. */ -#define OSC_XOSCSEL_gp 0 /* External Oscillator Selection and Startup Time group position. */ -#define OSC_XOSCSEL0_bm (1<<0) /* External Oscillator Selection and Startup Time bit 0 mask. */ -#define OSC_XOSCSEL0_bp 0 /* External Oscillator Selection and Startup Time bit 0 position. */ -#define OSC_XOSCSEL1_bm (1<<1) /* External Oscillator Selection and Startup Time bit 1 mask. */ -#define OSC_XOSCSEL1_bp 1 /* External Oscillator Selection and Startup Time bit 1 position. */ -#define OSC_XOSCSEL2_bm (1<<2) /* External Oscillator Selection and Startup Time bit 2 mask. */ -#define OSC_XOSCSEL2_bp 2 /* External Oscillator Selection and Startup Time bit 2 position. */ -#define OSC_XOSCSEL3_bm (1<<3) /* External Oscillator Selection and Startup Time bit 3 mask. */ -#define OSC_XOSCSEL3_bp 3 /* External Oscillator Selection and Startup Time bit 3 position. */ - - -/* OSC.XOSCFAIL bit masks and bit positions */ -#define OSC_XOSCFDIF_bm 0x02 /* Failure Detection Interrupt Flag bit mask. */ -#define OSC_XOSCFDIF_bp 1 /* Failure Detection Interrupt Flag bit position. */ - -#define OSC_XOSCFDEN_bm 0x01 /* Failure Detection Enable bit mask. */ -#define OSC_XOSCFDEN_bp 0 /* Failure Detection Enable bit position. */ - - -/* OSC.PLLCTRL bit masks and bit positions */ -#define OSC_PLLSRC_gm 0xC0 /* Clock Source group mask. */ -#define OSC_PLLSRC_gp 6 /* Clock Source group position. */ -#define OSC_PLLSRC0_bm (1<<6) /* Clock Source bit 0 mask. */ -#define OSC_PLLSRC0_bp 6 /* Clock Source bit 0 position. */ -#define OSC_PLLSRC1_bm (1<<7) /* Clock Source bit 1 mask. */ -#define OSC_PLLSRC1_bp 7 /* Clock Source bit 1 position. */ - -#define OSC_PLLFAC_gm 0x1F /* Multiplication Factor group mask. */ -#define OSC_PLLFAC_gp 0 /* Multiplication Factor group position. */ -#define OSC_PLLFAC0_bm (1<<0) /* Multiplication Factor bit 0 mask. */ -#define OSC_PLLFAC0_bp 0 /* Multiplication Factor bit 0 position. */ -#define OSC_PLLFAC1_bm (1<<1) /* Multiplication Factor bit 1 mask. */ -#define OSC_PLLFAC1_bp 1 /* Multiplication Factor bit 1 position. */ -#define OSC_PLLFAC2_bm (1<<2) /* Multiplication Factor bit 2 mask. */ -#define OSC_PLLFAC2_bp 2 /* Multiplication Factor bit 2 position. */ -#define OSC_PLLFAC3_bm (1<<3) /* Multiplication Factor bit 3 mask. */ -#define OSC_PLLFAC3_bp 3 /* Multiplication Factor bit 3 position. */ -#define OSC_PLLFAC4_bm (1<<4) /* Multiplication Factor bit 4 mask. */ -#define OSC_PLLFAC4_bp 4 /* Multiplication Factor bit 4 position. */ - - -/* OSC.DFLLCTRL bit masks and bit positions */ -#define OSC_RC32MCREF_bm 0x02 /* 32MHz Calibration Reference bit mask. */ -#define OSC_RC32MCREF_bp 1 /* 32MHz Calibration Reference bit position. */ - -#define OSC_RC2MCREF_bm 0x01 /* 2MHz Calibration Reference bit mask. */ -#define OSC_RC2MCREF_bp 0 /* 2MHz Calibration Reference bit position. */ - - -/* DFLL - DFLL */ -/* DFLL.CTRL bit masks and bit positions */ -#define DFLL_ENABLE_bm 0x01 /* DFLL Enable bit mask. */ -#define DFLL_ENABLE_bp 0 /* DFLL Enable bit position. */ - - -/* DFLL.CALA bit masks and bit positions */ -#define DFLL_CALL_gm 0x7F /* DFLL Calibration bits [6:0] group mask. */ -#define DFLL_CALL_gp 0 /* DFLL Calibration bits [6:0] group position. */ -#define DFLL_CALL0_bm (1<<0) /* DFLL Calibration bits [6:0] bit 0 mask. */ -#define DFLL_CALL0_bp 0 /* DFLL Calibration bits [6:0] bit 0 position. */ -#define DFLL_CALL1_bm (1<<1) /* DFLL Calibration bits [6:0] bit 1 mask. */ -#define DFLL_CALL1_bp 1 /* DFLL Calibration bits [6:0] bit 1 position. */ -#define DFLL_CALL2_bm (1<<2) /* DFLL Calibration bits [6:0] bit 2 mask. */ -#define DFLL_CALL2_bp 2 /* DFLL Calibration bits [6:0] bit 2 position. */ -#define DFLL_CALL3_bm (1<<3) /* DFLL Calibration bits [6:0] bit 3 mask. */ -#define DFLL_CALL3_bp 3 /* DFLL Calibration bits [6:0] bit 3 position. */ -#define DFLL_CALL4_bm (1<<4) /* DFLL Calibration bits [6:0] bit 4 mask. */ -#define DFLL_CALL4_bp 4 /* DFLL Calibration bits [6:0] bit 4 position. */ -#define DFLL_CALL5_bm (1<<5) /* DFLL Calibration bits [6:0] bit 5 mask. */ -#define DFLL_CALL5_bp 5 /* DFLL Calibration bits [6:0] bit 5 position. */ -#define DFLL_CALL6_bm (1<<6) /* DFLL Calibration bits [6:0] bit 6 mask. */ -#define DFLL_CALL6_bp 6 /* DFLL Calibration bits [6:0] bit 6 position. */ - - -/* DFLL.CALB bit masks and bit positions */ -#define DFLL_CALH_gm 0x3F /* DFLL Calibration bits [12:7] group mask. */ -#define DFLL_CALH_gp 0 /* DFLL Calibration bits [12:7] group position. */ -#define DFLL_CALH0_bm (1<<0) /* DFLL Calibration bits [12:7] bit 0 mask. */ -#define DFLL_CALH0_bp 0 /* DFLL Calibration bits [12:7] bit 0 position. */ -#define DFLL_CALH1_bm (1<<1) /* DFLL Calibration bits [12:7] bit 1 mask. */ -#define DFLL_CALH1_bp 1 /* DFLL Calibration bits [12:7] bit 1 position. */ -#define DFLL_CALH2_bm (1<<2) /* DFLL Calibration bits [12:7] bit 2 mask. */ -#define DFLL_CALH2_bp 2 /* DFLL Calibration bits [12:7] bit 2 position. */ -#define DFLL_CALH3_bm (1<<3) /* DFLL Calibration bits [12:7] bit 3 mask. */ -#define DFLL_CALH3_bp 3 /* DFLL Calibration bits [12:7] bit 3 position. */ -#define DFLL_CALH4_bm (1<<4) /* DFLL Calibration bits [12:7] bit 4 mask. */ -#define DFLL_CALH4_bp 4 /* DFLL Calibration bits [12:7] bit 4 position. */ -#define DFLL_CALH5_bm (1<<5) /* DFLL Calibration bits [12:7] bit 5 mask. */ -#define DFLL_CALH5_bp 5 /* DFLL Calibration bits [12:7] bit 5 position. */ - - -/* RST - Reset */ -/* RST.STATUS bit masks and bit positions */ -#define RST_SDRF_bm 0x40 /* Spike Detection Reset Flag bit mask. */ -#define RST_SDRF_bp 6 /* Spike Detection Reset Flag bit position. */ - -#define RST_SRF_bm 0x20 /* Software Reset Flag bit mask. */ -#define RST_SRF_bp 5 /* Software Reset Flag bit position. */ - -#define RST_PDIRF_bm 0x10 /* Programming and Debug Interface Interface Reset Flag bit mask. */ -#define RST_PDIRF_bp 4 /* Programming and Debug Interface Interface Reset Flag bit position. */ - -#define RST_WDRF_bm 0x08 /* Watchdog Reset Flag bit mask. */ -#define RST_WDRF_bp 3 /* Watchdog Reset Flag bit position. */ - -#define RST_BORF_bm 0x04 /* Brown-out Reset Flag bit mask. */ -#define RST_BORF_bp 2 /* Brown-out Reset Flag bit position. */ - -#define RST_EXTRF_bm 0x02 /* External Reset Flag bit mask. */ -#define RST_EXTRF_bp 1 /* External Reset Flag bit position. */ - -#define RST_PORF_bm 0x01 /* Power-on Reset Flag bit mask. */ -#define RST_PORF_bp 0 /* Power-on Reset Flag bit position. */ - - -/* RST.CTRL bit masks and bit positions */ -#define RST_SWRST_bm 0x01 /* Software Reset bit mask. */ -#define RST_SWRST_bp 0 /* Software Reset bit position. */ - - -/* WDT - Watch-Dog Timer */ -/* WDT.CTRL bit masks and bit positions */ -#define WDT_PER_gm 0x3C /* Period group mask. */ -#define WDT_PER_gp 2 /* Period group position. */ -#define WDT_PER0_bm (1<<2) /* Period bit 0 mask. */ -#define WDT_PER0_bp 2 /* Period bit 0 position. */ -#define WDT_PER1_bm (1<<3) /* Period bit 1 mask. */ -#define WDT_PER1_bp 3 /* Period bit 1 position. */ -#define WDT_PER2_bm (1<<4) /* Period bit 2 mask. */ -#define WDT_PER2_bp 4 /* Period bit 2 position. */ -#define WDT_PER3_bm (1<<5) /* Period bit 3 mask. */ -#define WDT_PER3_bp 5 /* Period bit 3 position. */ - -#define WDT_ENABLE_bm 0x02 /* Enable bit mask. */ -#define WDT_ENABLE_bp 1 /* Enable bit position. */ - -#define WDT_CEN_bm 0x01 /* Change Enable bit mask. */ -#define WDT_CEN_bp 0 /* Change Enable bit position. */ - - -/* WDT.WINCTRL bit masks and bit positions */ -#define WDT_WPER_gm 0x3C /* Windowed Mode Period group mask. */ -#define WDT_WPER_gp 2 /* Windowed Mode Period group position. */ -#define WDT_WPER0_bm (1<<2) /* Windowed Mode Period bit 0 mask. */ -#define WDT_WPER0_bp 2 /* Windowed Mode Period bit 0 position. */ -#define WDT_WPER1_bm (1<<3) /* Windowed Mode Period bit 1 mask. */ -#define WDT_WPER1_bp 3 /* Windowed Mode Period bit 1 position. */ -#define WDT_WPER2_bm (1<<4) /* Windowed Mode Period bit 2 mask. */ -#define WDT_WPER2_bp 4 /* Windowed Mode Period bit 2 position. */ -#define WDT_WPER3_bm (1<<5) /* Windowed Mode Period bit 3 mask. */ -#define WDT_WPER3_bp 5 /* Windowed Mode Period bit 3 position. */ - -#define WDT_WEN_bm 0x02 /* Windowed Mode Enable bit mask. */ -#define WDT_WEN_bp 1 /* Windowed Mode Enable bit position. */ - -#define WDT_WCEN_bm 0x01 /* Windowed Mode Change Enable bit mask. */ -#define WDT_WCEN_bp 0 /* Windowed Mode Change Enable bit position. */ - - -/* WDT.STATUS bit masks and bit positions */ -#define WDT_SYNCBUSY_bm 0x01 /* Syncronization busy bit mask. */ -#define WDT_SYNCBUSY_bp 0 /* Syncronization busy bit position. */ - - -/* MCU - MCU Control */ -/* MCU.MCUCR bit masks and bit positions */ -#define MCU_JTAGD_bm 0x01 /* JTAG Disable bit mask. */ -#define MCU_JTAGD_bp 0 /* JTAG Disable bit position. */ - - -/* MCU.EVSYSLOCK bit masks and bit positions */ -#define MCU_EVSYS1LOCK_bm 0x10 /* Event Channel 4-7 Lock bit mask. */ -#define MCU_EVSYS1LOCK_bp 4 /* Event Channel 4-7 Lock bit position. */ - -#define MCU_EVSYS0LOCK_bm 0x01 /* Event Channel 0-3 Lock bit mask. */ -#define MCU_EVSYS0LOCK_bp 0 /* Event Channel 0-3 Lock bit position. */ - - -/* MCU.AWEXLOCK bit masks and bit positions */ -#define MCU_AWEXELOCK_bm 0x04 /* AWeX on T/C E0 Lock bit mask. */ -#define MCU_AWEXELOCK_bp 2 /* AWeX on T/C E0 Lock bit position. */ - -#define MCU_AWEXCLOCK_bm 0x01 /* AWeX on T/C C0 Lock bit mask. */ -#define MCU_AWEXCLOCK_bp 0 /* AWeX on T/C C0 Lock bit position. */ - - -/* PMIC - Programmable Multi-level Interrupt Controller */ -/* PMIC.STATUS bit masks and bit positions */ -#define PMIC_NMIEX_bm 0x80 /* Non-maskable Interrupt Executing bit mask. */ -#define PMIC_NMIEX_bp 7 /* Non-maskable Interrupt Executing bit position. */ - -#define PMIC_HILVLEX_bm 0x04 /* High Level Interrupt Executing bit mask. */ -#define PMIC_HILVLEX_bp 2 /* High Level Interrupt Executing bit position. */ - -#define PMIC_MEDLVLEX_bm 0x02 /* Medium Level Interrupt Executing bit mask. */ -#define PMIC_MEDLVLEX_bp 1 /* Medium Level Interrupt Executing bit position. */ - -#define PMIC_LOLVLEX_bm 0x01 /* Low Level Interrupt Executing bit mask. */ -#define PMIC_LOLVLEX_bp 0 /* Low Level Interrupt Executing bit position. */ - - -/* PMIC.CTRL bit masks and bit positions */ -#define PMIC_RREN_bm 0x80 /* Round-Robin Priority Enable bit mask. */ -#define PMIC_RREN_bp 7 /* Round-Robin Priority Enable bit position. */ - -#define PMIC_IVSEL_bm 0x40 /* Interrupt Vector Select bit mask. */ -#define PMIC_IVSEL_bp 6 /* Interrupt Vector Select bit position. */ - -#define PMIC_HILVLEN_bm 0x04 /* High Level Enable bit mask. */ -#define PMIC_HILVLEN_bp 2 /* High Level Enable bit position. */ - -#define PMIC_MEDLVLEN_bm 0x02 /* Medium Level Enable bit mask. */ -#define PMIC_MEDLVLEN_bp 1 /* Medium Level Enable bit position. */ - -#define PMIC_LOLVLEN_bm 0x01 /* Low Level Enable bit mask. */ -#define PMIC_LOLVLEN_bp 0 /* Low Level Enable bit position. */ - - -/* DMA - DMA Controller */ -/* DMA_CH.CTRLA bit masks and bit positions */ -#define DMA_CH_ENABLE_bm 0x80 /* Channel Enable bit mask. */ -#define DMA_CH_ENABLE_bp 7 /* Channel Enable bit position. */ - -#define DMA_CH_RESET_bm 0x40 /* Channel Software Reset bit mask. */ -#define DMA_CH_RESET_bp 6 /* Channel Software Reset bit position. */ - -#define DMA_CH_REPEAT_bm 0x20 /* Channel Repeat Mode bit mask. */ -#define DMA_CH_REPEAT_bp 5 /* Channel Repeat Mode bit position. */ - -#define DMA_CH_TRFREQ_bm 0x10 /* Channel Transfer Request bit mask. */ -#define DMA_CH_TRFREQ_bp 4 /* Channel Transfer Request bit position. */ - -#define DMA_CH_SINGLE_bm 0x04 /* Channel Single Shot Data Transfer bit mask. */ -#define DMA_CH_SINGLE_bp 2 /* Channel Single Shot Data Transfer bit position. */ - -#define DMA_CH_BURSTLEN_gm 0x03 /* Channel Transfer Mode group mask. */ -#define DMA_CH_BURSTLEN_gp 0 /* Channel Transfer Mode group position. */ -#define DMA_CH_BURSTLEN0_bm (1<<0) /* Channel Transfer Mode bit 0 mask. */ -#define DMA_CH_BURSTLEN0_bp 0 /* Channel Transfer Mode bit 0 position. */ -#define DMA_CH_BURSTLEN1_bm (1<<1) /* Channel Transfer Mode bit 1 mask. */ -#define DMA_CH_BURSTLEN1_bp 1 /* Channel Transfer Mode bit 1 position. */ - - -/* DMA_CH.CTRLB bit masks and bit positions */ -#define DMA_CH_CHBUSY_bm 0x80 /* Block Transfer Busy bit mask. */ -#define DMA_CH_CHBUSY_bp 7 /* Block Transfer Busy bit position. */ - -#define DMA_CH_CHPEND_bm 0x40 /* Block Transfer Pending bit mask. */ -#define DMA_CH_CHPEND_bp 6 /* Block Transfer Pending bit position. */ - -#define DMA_CH_ERRIF_bm 0x20 /* Block Transfer Error Interrupt Flag bit mask. */ -#define DMA_CH_ERRIF_bp 5 /* Block Transfer Error Interrupt Flag bit position. */ - -#define DMA_CH_TRNIF_bm 0x10 /* Transaction Complete Interrup Flag bit mask. */ -#define DMA_CH_TRNIF_bp 4 /* Transaction Complete Interrup Flag bit position. */ - -#define DMA_CH_ERRINTLVL_gm 0x0C /* Transfer Error Interrupt Level group mask. */ -#define DMA_CH_ERRINTLVL_gp 2 /* Transfer Error Interrupt Level group position. */ -#define DMA_CH_ERRINTLVL0_bm (1<<2) /* Transfer Error Interrupt Level bit 0 mask. */ -#define DMA_CH_ERRINTLVL0_bp 2 /* Transfer Error Interrupt Level bit 0 position. */ -#define DMA_CH_ERRINTLVL1_bm (1<<3) /* Transfer Error Interrupt Level bit 1 mask. */ -#define DMA_CH_ERRINTLVL1_bp 3 /* Transfer Error Interrupt Level bit 1 position. */ - -#define DMA_CH_TRNINTLVL_gm 0x03 /* Transaction Complete Interrupt Level group mask. */ -#define DMA_CH_TRNINTLVL_gp 0 /* Transaction Complete Interrupt Level group position. */ -#define DMA_CH_TRNINTLVL0_bm (1<<0) /* Transaction Complete Interrupt Level bit 0 mask. */ -#define DMA_CH_TRNINTLVL0_bp 0 /* Transaction Complete Interrupt Level bit 0 position. */ -#define DMA_CH_TRNINTLVL1_bm (1<<1) /* Transaction Complete Interrupt Level bit 1 mask. */ -#define DMA_CH_TRNINTLVL1_bp 1 /* Transaction Complete Interrupt Level bit 1 position. */ - - -/* DMA_CH.ADDRCTRL bit masks and bit positions */ -#define DMA_CH_SRCRELOAD_gm 0xC0 /* Channel Source Address Reload group mask. */ -#define DMA_CH_SRCRELOAD_gp 6 /* Channel Source Address Reload group position. */ -#define DMA_CH_SRCRELOAD0_bm (1<<6) /* Channel Source Address Reload bit 0 mask. */ -#define DMA_CH_SRCRELOAD0_bp 6 /* Channel Source Address Reload bit 0 position. */ -#define DMA_CH_SRCRELOAD1_bm (1<<7) /* Channel Source Address Reload bit 1 mask. */ -#define DMA_CH_SRCRELOAD1_bp 7 /* Channel Source Address Reload bit 1 position. */ - -#define DMA_CH_SRCDIR_gm 0x30 /* Channel Source Address Mode group mask. */ -#define DMA_CH_SRCDIR_gp 4 /* Channel Source Address Mode group position. */ -#define DMA_CH_SRCDIR0_bm (1<<4) /* Channel Source Address Mode bit 0 mask. */ -#define DMA_CH_SRCDIR0_bp 4 /* Channel Source Address Mode bit 0 position. */ -#define DMA_CH_SRCDIR1_bm (1<<5) /* Channel Source Address Mode bit 1 mask. */ -#define DMA_CH_SRCDIR1_bp 5 /* Channel Source Address Mode bit 1 position. */ - -#define DMA_CH_DESTRELOAD_gm 0x0C /* Channel Destination Address Reload group mask. */ -#define DMA_CH_DESTRELOAD_gp 2 /* Channel Destination Address Reload group position. */ -#define DMA_CH_DESTRELOAD0_bm (1<<2) /* Channel Destination Address Reload bit 0 mask. */ -#define DMA_CH_DESTRELOAD0_bp 2 /* Channel Destination Address Reload bit 0 position. */ -#define DMA_CH_DESTRELOAD1_bm (1<<3) /* Channel Destination Address Reload bit 1 mask. */ -#define DMA_CH_DESTRELOAD1_bp 3 /* Channel Destination Address Reload bit 1 position. */ - -#define DMA_CH_DESTDIR_gm 0x03 /* Channel Destination Address Mode group mask. */ -#define DMA_CH_DESTDIR_gp 0 /* Channel Destination Address Mode group position. */ -#define DMA_CH_DESTDIR0_bm (1<<0) /* Channel Destination Address Mode bit 0 mask. */ -#define DMA_CH_DESTDIR0_bp 0 /* Channel Destination Address Mode bit 0 position. */ -#define DMA_CH_DESTDIR1_bm (1<<1) /* Channel Destination Address Mode bit 1 mask. */ -#define DMA_CH_DESTDIR1_bp 1 /* Channel Destination Address Mode bit 1 position. */ - - -/* DMA_CH.TRIGSRC bit masks and bit positions */ -#define DMA_CH_TRIGSRC_gm 0xFF /* Channel Trigger Source group mask. */ -#define DMA_CH_TRIGSRC_gp 0 /* Channel Trigger Source group position. */ -#define DMA_CH_TRIGSRC0_bm (1<<0) /* Channel Trigger Source bit 0 mask. */ -#define DMA_CH_TRIGSRC0_bp 0 /* Channel Trigger Source bit 0 position. */ -#define DMA_CH_TRIGSRC1_bm (1<<1) /* Channel Trigger Source bit 1 mask. */ -#define DMA_CH_TRIGSRC1_bp 1 /* Channel Trigger Source bit 1 position. */ -#define DMA_CH_TRIGSRC2_bm (1<<2) /* Channel Trigger Source bit 2 mask. */ -#define DMA_CH_TRIGSRC2_bp 2 /* Channel Trigger Source bit 2 position. */ -#define DMA_CH_TRIGSRC3_bm (1<<3) /* Channel Trigger Source bit 3 mask. */ -#define DMA_CH_TRIGSRC3_bp 3 /* Channel Trigger Source bit 3 position. */ -#define DMA_CH_TRIGSRC4_bm (1<<4) /* Channel Trigger Source bit 4 mask. */ -#define DMA_CH_TRIGSRC4_bp 4 /* Channel Trigger Source bit 4 position. */ -#define DMA_CH_TRIGSRC5_bm (1<<5) /* Channel Trigger Source bit 5 mask. */ -#define DMA_CH_TRIGSRC5_bp 5 /* Channel Trigger Source bit 5 position. */ -#define DMA_CH_TRIGSRC6_bm (1<<6) /* Channel Trigger Source bit 6 mask. */ -#define DMA_CH_TRIGSRC6_bp 6 /* Channel Trigger Source bit 6 position. */ -#define DMA_CH_TRIGSRC7_bm (1<<7) /* Channel Trigger Source bit 7 mask. */ -#define DMA_CH_TRIGSRC7_bp 7 /* Channel Trigger Source bit 7 position. */ - - -/* DMA.CTRL bit masks and bit positions */ -#define DMA_ENABLE_bm 0x80 /* Enable bit mask. */ -#define DMA_ENABLE_bp 7 /* Enable bit position. */ - -#define DMA_RESET_bm 0x40 /* Software Reset bit mask. */ -#define DMA_RESET_bp 6 /* Software Reset bit position. */ - -#define DMA_DBUFMODE_gm 0x0C /* Double Buffering Mode group mask. */ -#define DMA_DBUFMODE_gp 2 /* Double Buffering Mode group position. */ -#define DMA_DBUFMODE0_bm (1<<2) /* Double Buffering Mode bit 0 mask. */ -#define DMA_DBUFMODE0_bp 2 /* Double Buffering Mode bit 0 position. */ -#define DMA_DBUFMODE1_bm (1<<3) /* Double Buffering Mode bit 1 mask. */ -#define DMA_DBUFMODE1_bp 3 /* Double Buffering Mode bit 1 position. */ - -#define DMA_PRIMODE_gm 0x03 /* Channel Priority Mode group mask. */ -#define DMA_PRIMODE_gp 0 /* Channel Priority Mode group position. */ -#define DMA_PRIMODE0_bm (1<<0) /* Channel Priority Mode bit 0 mask. */ -#define DMA_PRIMODE0_bp 0 /* Channel Priority Mode bit 0 position. */ -#define DMA_PRIMODE1_bm (1<<1) /* Channel Priority Mode bit 1 mask. */ -#define DMA_PRIMODE1_bp 1 /* Channel Priority Mode bit 1 position. */ - - -/* DMA.INTFLAGS bit masks and bit positions */ -#define DMA_CH3ERRIF_bm 0x80 /* Channel 3 Block Transfer Error Interrupt Flag bit mask. */ -#define DMA_CH3ERRIF_bp 7 /* Channel 3 Block Transfer Error Interrupt Flag bit position. */ - -#define DMA_CH2ERRIF_bm 0x40 /* Channel 2 Block Transfer Error Interrupt Flag bit mask. */ -#define DMA_CH2ERRIF_bp 6 /* Channel 2 Block Transfer Error Interrupt Flag bit position. */ - -#define DMA_CH1ERRIF_bm 0x20 /* Channel 1 Block Transfer Error Interrupt Flag bit mask. */ -#define DMA_CH1ERRIF_bp 5 /* Channel 1 Block Transfer Error Interrupt Flag bit position. */ - -#define DMA_CH0ERRIF_bm 0x10 /* Channel 0 Block Transfer Error Interrupt Flag bit mask. */ -#define DMA_CH0ERRIF_bp 4 /* Channel 0 Block Transfer Error Interrupt Flag bit position. */ - -#define DMA_CH3TRNIF_bm 0x08 /* Channel 3 Transaction Complete Interrupt Flag bit mask. */ -#define DMA_CH3TRNIF_bp 3 /* Channel 3 Transaction Complete Interrupt Flag bit position. */ - -#define DMA_CH2TRNIF_bm 0x04 /* Channel 2 Transaction Complete Interrupt Flag bit mask. */ -#define DMA_CH2TRNIF_bp 2 /* Channel 2 Transaction Complete Interrupt Flag bit position. */ - -#define DMA_CH1TRNIF_bm 0x02 /* Channel 1 Transaction Complete Interrupt Flag bit mask. */ -#define DMA_CH1TRNIF_bp 1 /* Channel 1 Transaction Complete Interrupt Flag bit position. */ - -#define DMA_CH0TRNIF_bm 0x01 /* Channel 0 Transaction Complete Interrupt Flag bit mask. */ -#define DMA_CH0TRNIF_bp 0 /* Channel 0 Transaction Complete Interrupt Flag bit position. */ - - -/* DMA.STATUS bit masks and bit positions */ -#define DMA_CH3BUSY_bm 0x80 /* Channel 3 Block Transfer Busy bit mask. */ -#define DMA_CH3BUSY_bp 7 /* Channel 3 Block Transfer Busy bit position. */ - -#define DMA_CH2BUSY_bm 0x40 /* Channel 2 Block Transfer Busy bit mask. */ -#define DMA_CH2BUSY_bp 6 /* Channel 2 Block Transfer Busy bit position. */ - -#define DMA_CH1BUSY_bm 0x20 /* Channel 1 Block Transfer Busy bit mask. */ -#define DMA_CH1BUSY_bp 5 /* Channel 1 Block Transfer Busy bit position. */ - -#define DMA_CH0BUSY_bm 0x10 /* Channel 0 Block Transfer Busy bit mask. */ -#define DMA_CH0BUSY_bp 4 /* Channel 0 Block Transfer Busy bit position. */ - -#define DMA_CH3PEND_bm 0x08 /* Channel 3 Block Transfer Pending bit mask. */ -#define DMA_CH3PEND_bp 3 /* Channel 3 Block Transfer Pending bit position. */ - -#define DMA_CH2PEND_bm 0x04 /* Channel 2 Block Transfer Pending bit mask. */ -#define DMA_CH2PEND_bp 2 /* Channel 2 Block Transfer Pending bit position. */ - -#define DMA_CH1PEND_bm 0x02 /* Channel 1 Block Transfer Pending bit mask. */ -#define DMA_CH1PEND_bp 1 /* Channel 1 Block Transfer Pending bit position. */ - -#define DMA_CH0PEND_bm 0x01 /* Channel 0 Block Transfer Pending bit mask. */ -#define DMA_CH0PEND_bp 0 /* Channel 0 Block Transfer Pending bit position. */ - - -/* EVSYS - Event System */ -/* EVSYS.CH0MUX bit masks and bit positions */ -#define EVSYS_CHMUX_gm 0xFF /* Event Channel 0 Multiplexer group mask. */ -#define EVSYS_CHMUX_gp 0 /* Event Channel 0 Multiplexer group position. */ -#define EVSYS_CHMUX0_bm (1<<0) /* Event Channel 0 Multiplexer bit 0 mask. */ -#define EVSYS_CHMUX0_bp 0 /* Event Channel 0 Multiplexer bit 0 position. */ -#define EVSYS_CHMUX1_bm (1<<1) /* Event Channel 0 Multiplexer bit 1 mask. */ -#define EVSYS_CHMUX1_bp 1 /* Event Channel 0 Multiplexer bit 1 position. */ -#define EVSYS_CHMUX2_bm (1<<2) /* Event Channel 0 Multiplexer bit 2 mask. */ -#define EVSYS_CHMUX2_bp 2 /* Event Channel 0 Multiplexer bit 2 position. */ -#define EVSYS_CHMUX3_bm (1<<3) /* Event Channel 0 Multiplexer bit 3 mask. */ -#define EVSYS_CHMUX3_bp 3 /* Event Channel 0 Multiplexer bit 3 position. */ -#define EVSYS_CHMUX4_bm (1<<4) /* Event Channel 0 Multiplexer bit 4 mask. */ -#define EVSYS_CHMUX4_bp 4 /* Event Channel 0 Multiplexer bit 4 position. */ -#define EVSYS_CHMUX5_bm (1<<5) /* Event Channel 0 Multiplexer bit 5 mask. */ -#define EVSYS_CHMUX5_bp 5 /* Event Channel 0 Multiplexer bit 5 position. */ -#define EVSYS_CHMUX6_bm (1<<6) /* Event Channel 0 Multiplexer bit 6 mask. */ -#define EVSYS_CHMUX6_bp 6 /* Event Channel 0 Multiplexer bit 6 position. */ -#define EVSYS_CHMUX7_bm (1<<7) /* Event Channel 0 Multiplexer bit 7 mask. */ -#define EVSYS_CHMUX7_bp 7 /* Event Channel 0 Multiplexer bit 7 position. */ - - -/* EVSYS.CH1MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH2MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH3MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH4MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH5MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH6MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH7MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH0CTRL bit masks and bit positions */ -#define EVSYS_QDIRM_gm 0x60 /* Quadrature Decoder Index Recognition Mode group mask. */ -#define EVSYS_QDIRM_gp 5 /* Quadrature Decoder Index Recognition Mode group position. */ -#define EVSYS_QDIRM0_bm (1<<5) /* Quadrature Decoder Index Recognition Mode bit 0 mask. */ -#define EVSYS_QDIRM0_bp 5 /* Quadrature Decoder Index Recognition Mode bit 0 position. */ -#define EVSYS_QDIRM1_bm (1<<6) /* Quadrature Decoder Index Recognition Mode bit 1 mask. */ -#define EVSYS_QDIRM1_bp 6 /* Quadrature Decoder Index Recognition Mode bit 1 position. */ - -#define EVSYS_QDIEN_bm 0x10 /* Quadrature Decoder Index Enable bit mask. */ -#define EVSYS_QDIEN_bp 4 /* Quadrature Decoder Index Enable bit position. */ - -#define EVSYS_QDEN_bm 0x08 /* Quadrature Decoder Enable bit mask. */ -#define EVSYS_QDEN_bp 3 /* Quadrature Decoder Enable bit position. */ - -#define EVSYS_DIGFILT_gm 0x07 /* Digital Filter group mask. */ -#define EVSYS_DIGFILT_gp 0 /* Digital Filter group position. */ -#define EVSYS_DIGFILT0_bm (1<<0) /* Digital Filter bit 0 mask. */ -#define EVSYS_DIGFILT0_bp 0 /* Digital Filter bit 0 position. */ -#define EVSYS_DIGFILT1_bm (1<<1) /* Digital Filter bit 1 mask. */ -#define EVSYS_DIGFILT1_bp 1 /* Digital Filter bit 1 position. */ -#define EVSYS_DIGFILT2_bm (1<<2) /* Digital Filter bit 2 mask. */ -#define EVSYS_DIGFILT2_bp 2 /* Digital Filter bit 2 position. */ - - -/* EVSYS.CH1CTRL bit masks and bit positions */ -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* EVSYS.CH2CTRL bit masks and bit positions */ -/* EVSYS_QDIRM_gm Predefined. */ -/* EVSYS_QDIRM_gp Predefined. */ -/* EVSYS_QDIRM0_bm Predefined. */ -/* EVSYS_QDIRM0_bp Predefined. */ -/* EVSYS_QDIRM1_bm Predefined. */ -/* EVSYS_QDIRM1_bp Predefined. */ - -/* EVSYS_QDIEN_bm Predefined. */ -/* EVSYS_QDIEN_bp Predefined. */ - -/* EVSYS_QDEN_bm Predefined. */ -/* EVSYS_QDEN_bp Predefined. */ - -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* EVSYS.CH3CTRL bit masks and bit positions */ -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* EVSYS.CH4CTRL bit masks and bit positions */ -/* EVSYS_QDIRM_gm Predefined. */ -/* EVSYS_QDIRM_gp Predefined. */ -/* EVSYS_QDIRM0_bm Predefined. */ -/* EVSYS_QDIRM0_bp Predefined. */ -/* EVSYS_QDIRM1_bm Predefined. */ -/* EVSYS_QDIRM1_bp Predefined. */ - -/* EVSYS_QDIEN_bm Predefined. */ -/* EVSYS_QDIEN_bp Predefined. */ - -/* EVSYS_QDEN_bm Predefined. */ -/* EVSYS_QDEN_bp Predefined. */ - -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* EVSYS.CH5CTRL bit masks and bit positions */ -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* EVSYS.CH6CTRL bit masks and bit positions */ -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* EVSYS.CH7CTRL bit masks and bit positions */ -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* NVM - Non Volatile Memory Controller */ -/* NVM.CMD bit masks and bit positions */ -#define NVM_CMD_gm 0xFF /* Command group mask. */ -#define NVM_CMD_gp 0 /* Command group position. */ -#define NVM_CMD0_bm (1<<0) /* Command bit 0 mask. */ -#define NVM_CMD0_bp 0 /* Command bit 0 position. */ -#define NVM_CMD1_bm (1<<1) /* Command bit 1 mask. */ -#define NVM_CMD1_bp 1 /* Command bit 1 position. */ -#define NVM_CMD2_bm (1<<2) /* Command bit 2 mask. */ -#define NVM_CMD2_bp 2 /* Command bit 2 position. */ -#define NVM_CMD3_bm (1<<3) /* Command bit 3 mask. */ -#define NVM_CMD3_bp 3 /* Command bit 3 position. */ -#define NVM_CMD4_bm (1<<4) /* Command bit 4 mask. */ -#define NVM_CMD4_bp 4 /* Command bit 4 position. */ -#define NVM_CMD5_bm (1<<5) /* Command bit 5 mask. */ -#define NVM_CMD5_bp 5 /* Command bit 5 position. */ -#define NVM_CMD6_bm (1<<6) /* Command bit 6 mask. */ -#define NVM_CMD6_bp 6 /* Command bit 6 position. */ -#define NVM_CMD7_bm (1<<7) /* Command bit 7 mask. */ -#define NVM_CMD7_bp 7 /* Command bit 7 position. */ - - -/* NVM.CTRLA bit masks and bit positions */ -#define NVM_CMDEX_bm 0x01 /* Command Execute bit mask. */ -#define NVM_CMDEX_bp 0 /* Command Execute bit position. */ - - -/* NVM.CTRLB bit masks and bit positions */ -#define NVM_EEMAPEN_bm 0x08 /* EEPROM Mapping Enable bit mask. */ -#define NVM_EEMAPEN_bp 3 /* EEPROM Mapping Enable bit position. */ - -#define NVM_FPRM_bm 0x04 /* Flash Power Reduction Enable bit mask. */ -#define NVM_FPRM_bp 2 /* Flash Power Reduction Enable bit position. */ - -#define NVM_EPRM_bm 0x02 /* EEPROM Power Reduction Enable bit mask. */ -#define NVM_EPRM_bp 1 /* EEPROM Power Reduction Enable bit position. */ - -#define NVM_SPMLOCK_bm 0x01 /* SPM Lock bit mask. */ -#define NVM_SPMLOCK_bp 0 /* SPM Lock bit position. */ - - -/* NVM.INTCTRL bit masks and bit positions */ -#define NVM_SPMLVL_gm 0x0C /* SPM Interrupt Level group mask. */ -#define NVM_SPMLVL_gp 2 /* SPM Interrupt Level group position. */ -#define NVM_SPMLVL0_bm (1<<2) /* SPM Interrupt Level bit 0 mask. */ -#define NVM_SPMLVL0_bp 2 /* SPM Interrupt Level bit 0 position. */ -#define NVM_SPMLVL1_bm (1<<3) /* SPM Interrupt Level bit 1 mask. */ -#define NVM_SPMLVL1_bp 3 /* SPM Interrupt Level bit 1 position. */ - -#define NVM_EELVL_gm 0x03 /* EEPROM Interrupt Level group mask. */ -#define NVM_EELVL_gp 0 /* EEPROM Interrupt Level group position. */ -#define NVM_EELVL0_bm (1<<0) /* EEPROM Interrupt Level bit 0 mask. */ -#define NVM_EELVL0_bp 0 /* EEPROM Interrupt Level bit 0 position. */ -#define NVM_EELVL1_bm (1<<1) /* EEPROM Interrupt Level bit 1 mask. */ -#define NVM_EELVL1_bp 1 /* EEPROM Interrupt Level bit 1 position. */ - - -/* NVM.STATUS bit masks and bit positions */ -#define NVM_NVMBUSY_bm 0x80 /* Non-volatile Memory Busy bit mask. */ -#define NVM_NVMBUSY_bp 7 /* Non-volatile Memory Busy bit position. */ - -#define NVM_FBUSY_bm 0x40 /* Flash Memory Busy bit mask. */ -#define NVM_FBUSY_bp 6 /* Flash Memory Busy bit position. */ - -#define NVM_EELOAD_bm 0x02 /* EEPROM Page Buffer Active Loading bit mask. */ -#define NVM_EELOAD_bp 1 /* EEPROM Page Buffer Active Loading bit position. */ - -#define NVM_FLOAD_bm 0x01 /* Flash Page Buffer Active Loading bit mask. */ -#define NVM_FLOAD_bp 0 /* Flash Page Buffer Active Loading bit position. */ - - -/* NVM.LOCKBITS bit masks and bit positions */ -#define NVM_BLBB_gm 0xC0 /* Boot Lock Bits - Boot Section group mask. */ -#define NVM_BLBB_gp 6 /* Boot Lock Bits - Boot Section group position. */ -#define NVM_BLBB0_bm (1<<6) /* Boot Lock Bits - Boot Section bit 0 mask. */ -#define NVM_BLBB0_bp 6 /* Boot Lock Bits - Boot Section bit 0 position. */ -#define NVM_BLBB1_bm (1<<7) /* Boot Lock Bits - Boot Section bit 1 mask. */ -#define NVM_BLBB1_bp 7 /* Boot Lock Bits - Boot Section bit 1 position. */ - -#define NVM_BLBA_gm 0x30 /* Boot Lock Bits - Application Section group mask. */ -#define NVM_BLBA_gp 4 /* Boot Lock Bits - Application Section group position. */ -#define NVM_BLBA0_bm (1<<4) /* Boot Lock Bits - Application Section bit 0 mask. */ -#define NVM_BLBA0_bp 4 /* Boot Lock Bits - Application Section bit 0 position. */ -#define NVM_BLBA1_bm (1<<5) /* Boot Lock Bits - Application Section bit 1 mask. */ -#define NVM_BLBA1_bp 5 /* Boot Lock Bits - Application Section bit 1 position. */ - -#define NVM_BLBAT_gm 0x0C /* Boot Lock Bits - Application Table group mask. */ -#define NVM_BLBAT_gp 2 /* Boot Lock Bits - Application Table group position. */ -#define NVM_BLBAT0_bm (1<<2) /* Boot Lock Bits - Application Table bit 0 mask. */ -#define NVM_BLBAT0_bp 2 /* Boot Lock Bits - Application Table bit 0 position. */ -#define NVM_BLBAT1_bm (1<<3) /* Boot Lock Bits - Application Table bit 1 mask. */ -#define NVM_BLBAT1_bp 3 /* Boot Lock Bits - Application Table bit 1 position. */ - -#define NVM_LB_gm 0x03 /* Lock Bits group mask. */ -#define NVM_LB_gp 0 /* Lock Bits group position. */ -#define NVM_LB0_bm (1<<0) /* Lock Bits bit 0 mask. */ -#define NVM_LB0_bp 0 /* Lock Bits bit 0 position. */ -#define NVM_LB1_bm (1<<1) /* Lock Bits bit 1 mask. */ -#define NVM_LB1_bp 1 /* Lock Bits bit 1 position. */ - - -/* NVM_LOCKBITS.LOCKBITS bit masks and bit positions */ -#define NVM_LOCKBITS_BLBB_gm 0xC0 /* Boot Lock Bits - Boot Section group mask. */ -#define NVM_LOCKBITS_BLBB_gp 6 /* Boot Lock Bits - Boot Section group position. */ -#define NVM_LOCKBITS_BLBB0_bm (1<<6) /* Boot Lock Bits - Boot Section bit 0 mask. */ -#define NVM_LOCKBITS_BLBB0_bp 6 /* Boot Lock Bits - Boot Section bit 0 position. */ -#define NVM_LOCKBITS_BLBB1_bm (1<<7) /* Boot Lock Bits - Boot Section bit 1 mask. */ -#define NVM_LOCKBITS_BLBB1_bp 7 /* Boot Lock Bits - Boot Section bit 1 position. */ - -#define NVM_LOCKBITS_BLBA_gm 0x30 /* Boot Lock Bits - Application Section group mask. */ -#define NVM_LOCKBITS_BLBA_gp 4 /* Boot Lock Bits - Application Section group position. */ -#define NVM_LOCKBITS_BLBA0_bm (1<<4) /* Boot Lock Bits - Application Section bit 0 mask. */ -#define NVM_LOCKBITS_BLBA0_bp 4 /* Boot Lock Bits - Application Section bit 0 position. */ -#define NVM_LOCKBITS_BLBA1_bm (1<<5) /* Boot Lock Bits - Application Section bit 1 mask. */ -#define NVM_LOCKBITS_BLBA1_bp 5 /* Boot Lock Bits - Application Section bit 1 position. */ - -#define NVM_LOCKBITS_BLBAT_gm 0x0C /* Boot Lock Bits - Application Table group mask. */ -#define NVM_LOCKBITS_BLBAT_gp 2 /* Boot Lock Bits - Application Table group position. */ -#define NVM_LOCKBITS_BLBAT0_bm (1<<2) /* Boot Lock Bits - Application Table bit 0 mask. */ -#define NVM_LOCKBITS_BLBAT0_bp 2 /* Boot Lock Bits - Application Table bit 0 position. */ -#define NVM_LOCKBITS_BLBAT1_bm (1<<3) /* Boot Lock Bits - Application Table bit 1 mask. */ -#define NVM_LOCKBITS_BLBAT1_bp 3 /* Boot Lock Bits - Application Table bit 1 position. */ - -#define NVM_LOCKBITS_LB_gm 0x03 /* Lock Bits group mask. */ -#define NVM_LOCKBITS_LB_gp 0 /* Lock Bits group position. */ -#define NVM_LOCKBITS_LB0_bm (1<<0) /* Lock Bits bit 0 mask. */ -#define NVM_LOCKBITS_LB0_bp 0 /* Lock Bits bit 0 position. */ -#define NVM_LOCKBITS_LB1_bm (1<<1) /* Lock Bits bit 1 mask. */ -#define NVM_LOCKBITS_LB1_bp 1 /* Lock Bits bit 1 position. */ - - -/* NVM_FUSES.FUSEBYTE0 bit masks and bit positions */ -#define NVM_FUSES_JTAGUSERID_gm 0xFF /* JTAG User ID group mask. */ -#define NVM_FUSES_JTAGUSERID_gp 0 /* JTAG User ID group position. */ -#define NVM_FUSES_JTAGUSERID0_bm (1<<0) /* JTAG User ID bit 0 mask. */ -#define NVM_FUSES_JTAGUSERID0_bp 0 /* JTAG User ID bit 0 position. */ -#define NVM_FUSES_JTAGUSERID1_bm (1<<1) /* JTAG User ID bit 1 mask. */ -#define NVM_FUSES_JTAGUSERID1_bp 1 /* JTAG User ID bit 1 position. */ -#define NVM_FUSES_JTAGUSERID2_bm (1<<2) /* JTAG User ID bit 2 mask. */ -#define NVM_FUSES_JTAGUSERID2_bp 2 /* JTAG User ID bit 2 position. */ -#define NVM_FUSES_JTAGUSERID3_bm (1<<3) /* JTAG User ID bit 3 mask. */ -#define NVM_FUSES_JTAGUSERID3_bp 3 /* JTAG User ID bit 3 position. */ -#define NVM_FUSES_JTAGUSERID4_bm (1<<4) /* JTAG User ID bit 4 mask. */ -#define NVM_FUSES_JTAGUSERID4_bp 4 /* JTAG User ID bit 4 position. */ -#define NVM_FUSES_JTAGUSERID5_bm (1<<5) /* JTAG User ID bit 5 mask. */ -#define NVM_FUSES_JTAGUSERID5_bp 5 /* JTAG User ID bit 5 position. */ -#define NVM_FUSES_JTAGUSERID6_bm (1<<6) /* JTAG User ID bit 6 mask. */ -#define NVM_FUSES_JTAGUSERID6_bp 6 /* JTAG User ID bit 6 position. */ -#define NVM_FUSES_JTAGUSERID7_bm (1<<7) /* JTAG User ID bit 7 mask. */ -#define NVM_FUSES_JTAGUSERID7_bp 7 /* JTAG User ID bit 7 position. */ - - -/* NVM_FUSES.FUSEBYTE1 bit masks and bit positions */ -#define NVM_FUSES_WDWP_gm 0xF0 /* Watchdog Window Timeout Period group mask. */ -#define NVM_FUSES_WDWP_gp 4 /* Watchdog Window Timeout Period group position. */ -#define NVM_FUSES_WDWP0_bm (1<<4) /* Watchdog Window Timeout Period bit 0 mask. */ -#define NVM_FUSES_WDWP0_bp 4 /* Watchdog Window Timeout Period bit 0 position. */ -#define NVM_FUSES_WDWP1_bm (1<<5) /* Watchdog Window Timeout Period bit 1 mask. */ -#define NVM_FUSES_WDWP1_bp 5 /* Watchdog Window Timeout Period bit 1 position. */ -#define NVM_FUSES_WDWP2_bm (1<<6) /* Watchdog Window Timeout Period bit 2 mask. */ -#define NVM_FUSES_WDWP2_bp 6 /* Watchdog Window Timeout Period bit 2 position. */ -#define NVM_FUSES_WDWP3_bm (1<<7) /* Watchdog Window Timeout Period bit 3 mask. */ -#define NVM_FUSES_WDWP3_bp 7 /* Watchdog Window Timeout Period bit 3 position. */ - -#define NVM_FUSES_WDP_gm 0x0F /* Watchdog Timeout Period group mask. */ -#define NVM_FUSES_WDP_gp 0 /* Watchdog Timeout Period group position. */ -#define NVM_FUSES_WDP0_bm (1<<0) /* Watchdog Timeout Period bit 0 mask. */ -#define NVM_FUSES_WDP0_bp 0 /* Watchdog Timeout Period bit 0 position. */ -#define NVM_FUSES_WDP1_bm (1<<1) /* Watchdog Timeout Period bit 1 mask. */ -#define NVM_FUSES_WDP1_bp 1 /* Watchdog Timeout Period bit 1 position. */ -#define NVM_FUSES_WDP2_bm (1<<2) /* Watchdog Timeout Period bit 2 mask. */ -#define NVM_FUSES_WDP2_bp 2 /* Watchdog Timeout Period bit 2 position. */ -#define NVM_FUSES_WDP3_bm (1<<3) /* Watchdog Timeout Period bit 3 mask. */ -#define NVM_FUSES_WDP3_bp 3 /* Watchdog Timeout Period bit 3 position. */ - - -/* NVM_FUSES.FUSEBYTE2 bit masks and bit positions */ -#define NVM_FUSES_DVSDON_bm 0x80 /* Spike Detector Enable bit mask. */ -#define NVM_FUSES_DVSDON_bp 7 /* Spike Detector Enable bit position. */ - -#define NVM_FUSES_BOOTRST_bm 0x40 /* Boot Loader Section Reset Vector bit mask. */ -#define NVM_FUSES_BOOTRST_bp 6 /* Boot Loader Section Reset Vector bit position. */ - -#define NVM_FUSES_BODACT_gm 0x0C /* BOD Operation in Active Mode group mask. */ -#define NVM_FUSES_BODACT_gp 2 /* BOD Operation in Active Mode group position. */ -#define NVM_FUSES_BODACT0_bm (1<<2) /* BOD Operation in Active Mode bit 0 mask. */ -#define NVM_FUSES_BODACT0_bp 2 /* BOD Operation in Active Mode bit 0 position. */ -#define NVM_FUSES_BODACT1_bm (1<<3) /* BOD Operation in Active Mode bit 1 mask. */ -#define NVM_FUSES_BODACT1_bp 3 /* BOD Operation in Active Mode bit 1 position. */ - -#define NVM_FUSES_BODPD_gm 0x03 /* BOD Operation in Power-Down Mode group mask. */ -#define NVM_FUSES_BODPD_gp 0 /* BOD Operation in Power-Down Mode group position. */ -#define NVM_FUSES_BODPD0_bm (1<<0) /* BOD Operation in Power-Down Mode bit 0 mask. */ -#define NVM_FUSES_BODPD0_bp 0 /* BOD Operation in Power-Down Mode bit 0 position. */ -#define NVM_FUSES_BODPD1_bm (1<<1) /* BOD Operation in Power-Down Mode bit 1 mask. */ -#define NVM_FUSES_BODPD1_bp 1 /* BOD Operation in Power-Down Mode bit 1 position. */ - - -/* NVM_FUSES.FUSEBYTE4 bit masks and bit positions */ -#define NVM_FUSES_SUT_gm 0x0C /* Start-up Time group mask. */ -#define NVM_FUSES_SUT_gp 2 /* Start-up Time group position. */ -#define NVM_FUSES_SUT0_bm (1<<2) /* Start-up Time bit 0 mask. */ -#define NVM_FUSES_SUT0_bp 2 /* Start-up Time bit 0 position. */ -#define NVM_FUSES_SUT1_bm (1<<3) /* Start-up Time bit 1 mask. */ -#define NVM_FUSES_SUT1_bp 3 /* Start-up Time bit 1 position. */ - -#define NVM_FUSES_WDLOCK_bm 0x02 /* Watchdog Timer Lock bit mask. */ -#define NVM_FUSES_WDLOCK_bp 1 /* Watchdog Timer Lock bit position. */ - -#define NVM_FUSES_JTAGEN_bm 0x01 /* JTAG Interface Enable bit mask. */ -#define NVM_FUSES_JTAGEN_bp 0 /* JTAG Interface Enable bit position. */ - - -/* NVM_FUSES.FUSEBYTE5 bit masks and bit positions */ -#define NVM_FUSES_EESAVE_bm 0x08 /* Preserve EEPROM Through Chip Erase bit mask. */ -#define NVM_FUSES_EESAVE_bp 3 /* Preserve EEPROM Through Chip Erase bit position. */ - -#define NVM_FUSES_BODLVL_gm 0x07 /* Brown Out Detection Voltage Level group mask. */ -#define NVM_FUSES_BODLVL_gp 0 /* Brown Out Detection Voltage Level group position. */ -#define NVM_FUSES_BODLVL0_bm (1<<0) /* Brown Out Detection Voltage Level bit 0 mask. */ -#define NVM_FUSES_BODLVL0_bp 0 /* Brown Out Detection Voltage Level bit 0 position. */ -#define NVM_FUSES_BODLVL1_bm (1<<1) /* Brown Out Detection Voltage Level bit 1 mask. */ -#define NVM_FUSES_BODLVL1_bp 1 /* Brown Out Detection Voltage Level bit 1 position. */ -#define NVM_FUSES_BODLVL2_bm (1<<2) /* Brown Out Detection Voltage Level bit 2 mask. */ -#define NVM_FUSES_BODLVL2_bp 2 /* Brown Out Detection Voltage Level bit 2 position. */ - - -/* AC - Analog Comparator */ -/* AC.AC0CTRL bit masks and bit positions */ -#define AC_INTMODE_gm 0xC0 /* Interrupt Mode group mask. */ -#define AC_INTMODE_gp 6 /* Interrupt Mode group position. */ -#define AC_INTMODE0_bm (1<<6) /* Interrupt Mode bit 0 mask. */ -#define AC_INTMODE0_bp 6 /* Interrupt Mode bit 0 position. */ -#define AC_INTMODE1_bm (1<<7) /* Interrupt Mode bit 1 mask. */ -#define AC_INTMODE1_bp 7 /* Interrupt Mode bit 1 position. */ - -#define AC_INTLVL_gm 0x30 /* Interrupt Level group mask. */ -#define AC_INTLVL_gp 4 /* Interrupt Level group position. */ -#define AC_INTLVL0_bm (1<<4) /* Interrupt Level bit 0 mask. */ -#define AC_INTLVL0_bp 4 /* Interrupt Level bit 0 position. */ -#define AC_INTLVL1_bm (1<<5) /* Interrupt Level bit 1 mask. */ -#define AC_INTLVL1_bp 5 /* Interrupt Level bit 1 position. */ - -#define AC_HSMODE_bm 0x08 /* High-speed Mode bit mask. */ -#define AC_HSMODE_bp 3 /* High-speed Mode bit position. */ - -#define AC_HYSMODE_gm 0x06 /* Hysteresis Mode group mask. */ -#define AC_HYSMODE_gp 1 /* Hysteresis Mode group position. */ -#define AC_HYSMODE0_bm (1<<1) /* Hysteresis Mode bit 0 mask. */ -#define AC_HYSMODE0_bp 1 /* Hysteresis Mode bit 0 position. */ -#define AC_HYSMODE1_bm (1<<2) /* Hysteresis Mode bit 1 mask. */ -#define AC_HYSMODE1_bp 2 /* Hysteresis Mode bit 1 position. */ - -#define AC_ENABLE_bm 0x01 /* Enable bit mask. */ -#define AC_ENABLE_bp 0 /* Enable bit position. */ - - -/* AC.AC1CTRL bit masks and bit positions */ -/* AC_INTMODE_gm Predefined. */ -/* AC_INTMODE_gp Predefined. */ -/* AC_INTMODE0_bm Predefined. */ -/* AC_INTMODE0_bp Predefined. */ -/* AC_INTMODE1_bm Predefined. */ -/* AC_INTMODE1_bp Predefined. */ - -/* AC_INTLVL_gm Predefined. */ -/* AC_INTLVL_gp Predefined. */ -/* AC_INTLVL0_bm Predefined. */ -/* AC_INTLVL0_bp Predefined. */ -/* AC_INTLVL1_bm Predefined. */ -/* AC_INTLVL1_bp Predefined. */ - -/* AC_HSMODE_bm Predefined. */ -/* AC_HSMODE_bp Predefined. */ - -/* AC_HYSMODE_gm Predefined. */ -/* AC_HYSMODE_gp Predefined. */ -/* AC_HYSMODE0_bm Predefined. */ -/* AC_HYSMODE0_bp Predefined. */ -/* AC_HYSMODE1_bm Predefined. */ -/* AC_HYSMODE1_bp Predefined. */ - -/* AC_ENABLE_bm Predefined. */ -/* AC_ENABLE_bp Predefined. */ - - -/* AC.AC0MUXCTRL bit masks and bit positions */ -#define AC_MUXPOS_gm 0x38 /* MUX Positive Input group mask. */ -#define AC_MUXPOS_gp 3 /* MUX Positive Input group position. */ -#define AC_MUXPOS0_bm (1<<3) /* MUX Positive Input bit 0 mask. */ -#define AC_MUXPOS0_bp 3 /* MUX Positive Input bit 0 position. */ -#define AC_MUXPOS1_bm (1<<4) /* MUX Positive Input bit 1 mask. */ -#define AC_MUXPOS1_bp 4 /* MUX Positive Input bit 1 position. */ -#define AC_MUXPOS2_bm (1<<5) /* MUX Positive Input bit 2 mask. */ -#define AC_MUXPOS2_bp 5 /* MUX Positive Input bit 2 position. */ - -#define AC_MUXNEG_gm 0x07 /* MUX Negative Input group mask. */ -#define AC_MUXNEG_gp 0 /* MUX Negative Input group position. */ -#define AC_MUXNEG0_bm (1<<0) /* MUX Negative Input bit 0 mask. */ -#define AC_MUXNEG0_bp 0 /* MUX Negative Input bit 0 position. */ -#define AC_MUXNEG1_bm (1<<1) /* MUX Negative Input bit 1 mask. */ -#define AC_MUXNEG1_bp 1 /* MUX Negative Input bit 1 position. */ -#define AC_MUXNEG2_bm (1<<2) /* MUX Negative Input bit 2 mask. */ -#define AC_MUXNEG2_bp 2 /* MUX Negative Input bit 2 position. */ - - -/* AC.AC1MUXCTRL bit masks and bit positions */ -/* AC_MUXPOS_gm Predefined. */ -/* AC_MUXPOS_gp Predefined. */ -/* AC_MUXPOS0_bm Predefined. */ -/* AC_MUXPOS0_bp Predefined. */ -/* AC_MUXPOS1_bm Predefined. */ -/* AC_MUXPOS1_bp Predefined. */ -/* AC_MUXPOS2_bm Predefined. */ -/* AC_MUXPOS2_bp Predefined. */ - -/* AC_MUXNEG_gm Predefined. */ -/* AC_MUXNEG_gp Predefined. */ -/* AC_MUXNEG0_bm Predefined. */ -/* AC_MUXNEG0_bp Predefined. */ -/* AC_MUXNEG1_bm Predefined. */ -/* AC_MUXNEG1_bp Predefined. */ -/* AC_MUXNEG2_bm Predefined. */ -/* AC_MUXNEG2_bp Predefined. */ - - -/* AC.CTRLA bit masks and bit positions */ -#define AC_AC0OUT_bm 0x01 /* Comparator 0 Output Enable bit mask. */ -#define AC_AC0OUT_bp 0 /* Comparator 0 Output Enable bit position. */ - - -/* AC.CTRLB bit masks and bit positions */ -#define AC_SCALEFAC_gm 0x3F /* VCC Voltage Scaler Factor group mask. */ -#define AC_SCALEFAC_gp 0 /* VCC Voltage Scaler Factor group position. */ -#define AC_SCALEFAC0_bm (1<<0) /* VCC Voltage Scaler Factor bit 0 mask. */ -#define AC_SCALEFAC0_bp 0 /* VCC Voltage Scaler Factor bit 0 position. */ -#define AC_SCALEFAC1_bm (1<<1) /* VCC Voltage Scaler Factor bit 1 mask. */ -#define AC_SCALEFAC1_bp 1 /* VCC Voltage Scaler Factor bit 1 position. */ -#define AC_SCALEFAC2_bm (1<<2) /* VCC Voltage Scaler Factor bit 2 mask. */ -#define AC_SCALEFAC2_bp 2 /* VCC Voltage Scaler Factor bit 2 position. */ -#define AC_SCALEFAC3_bm (1<<3) /* VCC Voltage Scaler Factor bit 3 mask. */ -#define AC_SCALEFAC3_bp 3 /* VCC Voltage Scaler Factor bit 3 position. */ -#define AC_SCALEFAC4_bm (1<<4) /* VCC Voltage Scaler Factor bit 4 mask. */ -#define AC_SCALEFAC4_bp 4 /* VCC Voltage Scaler Factor bit 4 position. */ -#define AC_SCALEFAC5_bm (1<<5) /* VCC Voltage Scaler Factor bit 5 mask. */ -#define AC_SCALEFAC5_bp 5 /* VCC Voltage Scaler Factor bit 5 position. */ - - -/* AC.WINCTRL bit masks and bit positions */ -#define AC_WEN_bm 0x10 /* Window Mode Enable bit mask. */ -#define AC_WEN_bp 4 /* Window Mode Enable bit position. */ - -#define AC_WINTMODE_gm 0x0C /* Window Interrupt Mode group mask. */ -#define AC_WINTMODE_gp 2 /* Window Interrupt Mode group position. */ -#define AC_WINTMODE0_bm (1<<2) /* Window Interrupt Mode bit 0 mask. */ -#define AC_WINTMODE0_bp 2 /* Window Interrupt Mode bit 0 position. */ -#define AC_WINTMODE1_bm (1<<3) /* Window Interrupt Mode bit 1 mask. */ -#define AC_WINTMODE1_bp 3 /* Window Interrupt Mode bit 1 position. */ - -#define AC_WINTLVL_gm 0x03 /* Window Interrupt Level group mask. */ -#define AC_WINTLVL_gp 0 /* Window Interrupt Level group position. */ -#define AC_WINTLVL0_bm (1<<0) /* Window Interrupt Level bit 0 mask. */ -#define AC_WINTLVL0_bp 0 /* Window Interrupt Level bit 0 position. */ -#define AC_WINTLVL1_bm (1<<1) /* Window Interrupt Level bit 1 mask. */ -#define AC_WINTLVL1_bp 1 /* Window Interrupt Level bit 1 position. */ - - -/* AC.STATUS bit masks and bit positions */ -#define AC_WSTATE_gm 0xC0 /* Window Mode State group mask. */ -#define AC_WSTATE_gp 6 /* Window Mode State group position. */ -#define AC_WSTATE0_bm (1<<6) /* Window Mode State bit 0 mask. */ -#define AC_WSTATE0_bp 6 /* Window Mode State bit 0 position. */ -#define AC_WSTATE1_bm (1<<7) /* Window Mode State bit 1 mask. */ -#define AC_WSTATE1_bp 7 /* Window Mode State bit 1 position. */ - -#define AC_AC1STATE_bm 0x20 /* Comparator 1 State bit mask. */ -#define AC_AC1STATE_bp 5 /* Comparator 1 State bit position. */ - -#define AC_AC0STATE_bm 0x10 /* Comparator 0 State bit mask. */ -#define AC_AC0STATE_bp 4 /* Comparator 0 State bit position. */ - -#define AC_WIF_bm 0x04 /* Window Mode Interrupt Flag bit mask. */ -#define AC_WIF_bp 2 /* Window Mode Interrupt Flag bit position. */ - -#define AC_AC1IF_bm 0x02 /* Comparator 1 Interrupt Flag bit mask. */ -#define AC_AC1IF_bp 1 /* Comparator 1 Interrupt Flag bit position. */ - -#define AC_AC0IF_bm 0x01 /* Comparator 0 Interrupt Flag bit mask. */ -#define AC_AC0IF_bp 0 /* Comparator 0 Interrupt Flag bit position. */ - - -/* ADC - Analog/Digital Converter */ -/* ADC_CH.CTRL bit masks and bit positions */ -#define ADC_CH_START_bm 0x80 /* Channel Start Conversion bit mask. */ -#define ADC_CH_START_bp 7 /* Channel Start Conversion bit position. */ - -#define ADC_CH_GAINFAC_gm 0x1C /* Gain Factor group mask. */ -#define ADC_CH_GAINFAC_gp 2 /* Gain Factor group position. */ -#define ADC_CH_GAINFAC0_bm (1<<2) /* Gain Factor bit 0 mask. */ -#define ADC_CH_GAINFAC0_bp 2 /* Gain Factor bit 0 position. */ -#define ADC_CH_GAINFAC1_bm (1<<3) /* Gain Factor bit 1 mask. */ -#define ADC_CH_GAINFAC1_bp 3 /* Gain Factor bit 1 position. */ -#define ADC_CH_GAINFAC2_bm (1<<4) /* Gain Factor bit 2 mask. */ -#define ADC_CH_GAINFAC2_bp 4 /* Gain Factor bit 2 position. */ - -#define ADC_CH_INPUTMODE_gm 0x03 /* Input Mode Select group mask. */ -#define ADC_CH_INPUTMODE_gp 0 /* Input Mode Select group position. */ -#define ADC_CH_INPUTMODE0_bm (1<<0) /* Input Mode Select bit 0 mask. */ -#define ADC_CH_INPUTMODE0_bp 0 /* Input Mode Select bit 0 position. */ -#define ADC_CH_INPUTMODE1_bm (1<<1) /* Input Mode Select bit 1 mask. */ -#define ADC_CH_INPUTMODE1_bp 1 /* Input Mode Select bit 1 position. */ - - -/* ADC_CH.MUXCTRL bit masks and bit positions */ -#define ADC_CH_MUXPOS_gm 0x78 /* Positive Input Select group mask. */ -#define ADC_CH_MUXPOS_gp 3 /* Positive Input Select group position. */ -#define ADC_CH_MUXPOS0_bm (1<<3) /* Positive Input Select bit 0 mask. */ -#define ADC_CH_MUXPOS0_bp 3 /* Positive Input Select bit 0 position. */ -#define ADC_CH_MUXPOS1_bm (1<<4) /* Positive Input Select bit 1 mask. */ -#define ADC_CH_MUXPOS1_bp 4 /* Positive Input Select bit 1 position. */ -#define ADC_CH_MUXPOS2_bm (1<<5) /* Positive Input Select bit 2 mask. */ -#define ADC_CH_MUXPOS2_bp 5 /* Positive Input Select bit 2 position. */ -#define ADC_CH_MUXPOS3_bm (1<<6) /* Positive Input Select bit 3 mask. */ -#define ADC_CH_MUXPOS3_bp 6 /* Positive Input Select bit 3 position. */ - -#define ADC_CH_MUXINT_gm 0x78 /* Internal Input Select group mask. */ -#define ADC_CH_MUXINT_gp 3 /* Internal Input Select group position. */ -#define ADC_CH_MUXINT0_bm (1<<3) /* Internal Input Select bit 0 mask. */ -#define ADC_CH_MUXINT0_bp 3 /* Internal Input Select bit 0 position. */ -#define ADC_CH_MUXINT1_bm (1<<4) /* Internal Input Select bit 1 mask. */ -#define ADC_CH_MUXINT1_bp 4 /* Internal Input Select bit 1 position. */ -#define ADC_CH_MUXINT2_bm (1<<5) /* Internal Input Select bit 2 mask. */ -#define ADC_CH_MUXINT2_bp 5 /* Internal Input Select bit 2 position. */ -#define ADC_CH_MUXINT3_bm (1<<6) /* Internal Input Select bit 3 mask. */ -#define ADC_CH_MUXINT3_bp 6 /* Internal Input Select bit 3 position. */ - -#define ADC_CH_MUXNEG_gm 0x03 /* Negative Input Select group mask. */ -#define ADC_CH_MUXNEG_gp 0 /* Negative Input Select group position. */ -#define ADC_CH_MUXNEG0_bm (1<<0) /* Negative Input Select bit 0 mask. */ -#define ADC_CH_MUXNEG0_bp 0 /* Negative Input Select bit 0 position. */ -#define ADC_CH_MUXNEG1_bm (1<<1) /* Negative Input Select bit 1 mask. */ -#define ADC_CH_MUXNEG1_bp 1 /* Negative Input Select bit 1 position. */ - - -/* ADC_CH.INTCTRL bit masks and bit positions */ -#define ADC_CH_INTMODE_gm 0x0C /* Interrupt Mode group mask. */ -#define ADC_CH_INTMODE_gp 2 /* Interrupt Mode group position. */ -#define ADC_CH_INTMODE0_bm (1<<2) /* Interrupt Mode bit 0 mask. */ -#define ADC_CH_INTMODE0_bp 2 /* Interrupt Mode bit 0 position. */ -#define ADC_CH_INTMODE1_bm (1<<3) /* Interrupt Mode bit 1 mask. */ -#define ADC_CH_INTMODE1_bp 3 /* Interrupt Mode bit 1 position. */ - -#define ADC_CH_INTLVL_gm 0x03 /* Interrupt Level group mask. */ -#define ADC_CH_INTLVL_gp 0 /* Interrupt Level group position. */ -#define ADC_CH_INTLVL0_bm (1<<0) /* Interrupt Level bit 0 mask. */ -#define ADC_CH_INTLVL0_bp 0 /* Interrupt Level bit 0 position. */ -#define ADC_CH_INTLVL1_bm (1<<1) /* Interrupt Level bit 1 mask. */ -#define ADC_CH_INTLVL1_bp 1 /* Interrupt Level bit 1 position. */ - - -/* ADC_CH.INTFLAGS bit masks and bit positions */ -#define ADC_CH_CHIF_bm 0x01 /* Channel Interrupt Flag bit mask. */ -#define ADC_CH_CHIF_bp 0 /* Channel Interrupt Flag bit position. */ - - -/* ADC.CTRLA bit masks and bit positions */ -#define ADC_DMASEL_gm 0xE0 /* DMA Selection group mask. */ -#define ADC_DMASEL_gp 5 /* DMA Selection group position. */ -#define ADC_DMASEL0_bm (1<<5) /* DMA Selection bit 0 mask. */ -#define ADC_DMASEL0_bp 5 /* DMA Selection bit 0 position. */ -#define ADC_DMASEL1_bm (1<<6) /* DMA Selection bit 1 mask. */ -#define ADC_DMASEL1_bp 6 /* DMA Selection bit 1 position. */ -#define ADC_DMASEL2_bm (1<<7) /* DMA Selection bit 2 mask. */ -#define ADC_DMASEL2_bp 7 /* DMA Selection bit 2 position. */ - -#define ADC_CH3START_bm 0x20 /* Channel 3 Start Conversion bit mask. */ -#define ADC_CH3START_bp 5 /* Channel 3 Start Conversion bit position. */ - -#define ADC_CH2START_bm 0x10 /* Channel 2 Start Conversion bit mask. */ -#define ADC_CH2START_bp 4 /* Channel 2 Start Conversion bit position. */ - -#define ADC_CH1START_bm 0x08 /* Channel 1 Start Conversion bit mask. */ -#define ADC_CH1START_bp 3 /* Channel 1 Start Conversion bit position. */ - -#define ADC_CH0START_bm 0x04 /* Channel 0 Start Conversion bit mask. */ -#define ADC_CH0START_bp 2 /* Channel 0 Start Conversion bit position. */ - -#define ADC_FLUSH_bm 0x02 /* Flush Pipeline bit mask. */ -#define ADC_FLUSH_bp 1 /* Flush Pipeline bit position. */ - -#define ADC_ENABLE_bm 0x01 /* Enable ADC bit mask. */ -#define ADC_ENABLE_bp 0 /* Enable ADC bit position. */ - - -/* ADC.CTRLB bit masks and bit positions */ -#define ADC_CONMODE_bm 0x10 /* Conversion Mode bit mask. */ -#define ADC_CONMODE_bp 4 /* Conversion Mode bit position. */ - -#define ADC_FREERUN_bm 0x08 /* Free Running Mode Enable bit mask. */ -#define ADC_FREERUN_bp 3 /* Free Running Mode Enable bit position. */ - -#define ADC_RESOLUTION_gm 0x06 /* Result Resolution group mask. */ -#define ADC_RESOLUTION_gp 1 /* Result Resolution group position. */ -#define ADC_RESOLUTION0_bm (1<<1) /* Result Resolution bit 0 mask. */ -#define ADC_RESOLUTION0_bp 1 /* Result Resolution bit 0 position. */ -#define ADC_RESOLUTION1_bm (1<<2) /* Result Resolution bit 1 mask. */ -#define ADC_RESOLUTION1_bp 2 /* Result Resolution bit 1 position. */ - - -/* ADC.REFCTRL bit masks and bit positions */ -#define ADC_REFSEL_gm 0x30 /* Reference Selection group mask. */ -#define ADC_REFSEL_gp 4 /* Reference Selection group position. */ -#define ADC_REFSEL0_bm (1<<4) /* Reference Selection bit 0 mask. */ -#define ADC_REFSEL0_bp 4 /* Reference Selection bit 0 position. */ -#define ADC_REFSEL1_bm (1<<5) /* Reference Selection bit 1 mask. */ -#define ADC_REFSEL1_bp 5 /* Reference Selection bit 1 position. */ - -#define ADC_BANDGAP_bm 0x02 /* Bandgap enable bit mask. */ -#define ADC_BANDGAP_bp 1 /* Bandgap enable bit position. */ - -#define ADC_TEMPREF_bm 0x01 /* Temperature Reference Enable bit mask. */ -#define ADC_TEMPREF_bp 0 /* Temperature Reference Enable bit position. */ - - -/* ADC.EVCTRL bit masks and bit positions */ -#define ADC_SWEEP_gm 0xC0 /* Channel Sweep Selection group mask. */ -#define ADC_SWEEP_gp 6 /* Channel Sweep Selection group position. */ -#define ADC_SWEEP0_bm (1<<6) /* Channel Sweep Selection bit 0 mask. */ -#define ADC_SWEEP0_bp 6 /* Channel Sweep Selection bit 0 position. */ -#define ADC_SWEEP1_bm (1<<7) /* Channel Sweep Selection bit 1 mask. */ -#define ADC_SWEEP1_bp 7 /* Channel Sweep Selection bit 1 position. */ - -#define ADC_EVSEL_gm 0x38 /* Event Input Select group mask. */ -#define ADC_EVSEL_gp 3 /* Event Input Select group position. */ -#define ADC_EVSEL0_bm (1<<3) /* Event Input Select bit 0 mask. */ -#define ADC_EVSEL0_bp 3 /* Event Input Select bit 0 position. */ -#define ADC_EVSEL1_bm (1<<4) /* Event Input Select bit 1 mask. */ -#define ADC_EVSEL1_bp 4 /* Event Input Select bit 1 position. */ -#define ADC_EVSEL2_bm (1<<5) /* Event Input Select bit 2 mask. */ -#define ADC_EVSEL2_bp 5 /* Event Input Select bit 2 position. */ - -#define ADC_EVACT_gm 0x07 /* Event Action Select group mask. */ -#define ADC_EVACT_gp 0 /* Event Action Select group position. */ -#define ADC_EVACT0_bm (1<<0) /* Event Action Select bit 0 mask. */ -#define ADC_EVACT0_bp 0 /* Event Action Select bit 0 position. */ -#define ADC_EVACT1_bm (1<<1) /* Event Action Select bit 1 mask. */ -#define ADC_EVACT1_bp 1 /* Event Action Select bit 1 position. */ -#define ADC_EVACT2_bm (1<<2) /* Event Action Select bit 2 mask. */ -#define ADC_EVACT2_bp 2 /* Event Action Select bit 2 position. */ - - -/* ADC.PRESCALER bit masks and bit positions */ -#define ADC_PRESCALER_gm 0x07 /* Clock Prescaler Selection group mask. */ -#define ADC_PRESCALER_gp 0 /* Clock Prescaler Selection group position. */ -#define ADC_PRESCALER0_bm (1<<0) /* Clock Prescaler Selection bit 0 mask. */ -#define ADC_PRESCALER0_bp 0 /* Clock Prescaler Selection bit 0 position. */ -#define ADC_PRESCALER1_bm (1<<1) /* Clock Prescaler Selection bit 1 mask. */ -#define ADC_PRESCALER1_bp 1 /* Clock Prescaler Selection bit 1 position. */ -#define ADC_PRESCALER2_bm (1<<2) /* Clock Prescaler Selection bit 2 mask. */ -#define ADC_PRESCALER2_bp 2 /* Clock Prescaler Selection bit 2 position. */ - - -/* ADC.CALCTRL bit masks and bit positions */ -#define ADC_CAL_bm 0x01 /* ADC Calibration Start bit mask. */ -#define ADC_CAL_bp 0 /* ADC Calibration Start bit position. */ - - -/* ADC.INTFLAGS bit masks and bit positions */ -#define ADC_CH3IF_bm 0x08 /* Channel 3 Interrupt Flag bit mask. */ -#define ADC_CH3IF_bp 3 /* Channel 3 Interrupt Flag bit position. */ - -#define ADC_CH2IF_bm 0x04 /* Channel 2 Interrupt Flag bit mask. */ -#define ADC_CH2IF_bp 2 /* Channel 2 Interrupt Flag bit position. */ - -#define ADC_CH1IF_bm 0x02 /* Channel 1 Interrupt Flag bit mask. */ -#define ADC_CH1IF_bp 1 /* Channel 1 Interrupt Flag bit position. */ - -#define ADC_CH0IF_bm 0x01 /* Channel 0 Interrupt Flag bit mask. */ -#define ADC_CH0IF_bp 0 /* Channel 0 Interrupt Flag bit position. */ - - -/* DAC - Digital/Analog Converter */ -/* DAC.CTRLA bit masks and bit positions */ -#define DAC_IDOEN_bm 0x10 /* Internal Output Enable bit mask. */ -#define DAC_IDOEN_bp 4 /* Internal Output Enable bit position. */ - -#define DAC_CH1EN_bm 0x08 /* Channel 1 Output Enable bit mask. */ -#define DAC_CH1EN_bp 3 /* Channel 1 Output Enable bit position. */ - -#define DAC_CH0EN_bm 0x04 /* Channel 0 Output Enable bit mask. */ -#define DAC_CH0EN_bp 2 /* Channel 0 Output Enable bit position. */ - -#define DAC_LPMODE_bm 0x02 /* Low Power Mode bit mask. */ -#define DAC_LPMODE_bp 1 /* Low Power Mode bit position. */ - -#define DAC_ENABLE_bm 0x01 /* Enable bit mask. */ -#define DAC_ENABLE_bp 0 /* Enable bit position. */ - - -/* DAC.CTRLB bit masks and bit positions */ -#define DAC_CHSEL_gm 0x60 /* Channel Select group mask. */ -#define DAC_CHSEL_gp 5 /* Channel Select group position. */ -#define DAC_CHSEL0_bm (1<<5) /* Channel Select bit 0 mask. */ -#define DAC_CHSEL0_bp 5 /* Channel Select bit 0 position. */ -#define DAC_CHSEL1_bm (1<<6) /* Channel Select bit 1 mask. */ -#define DAC_CHSEL1_bp 6 /* Channel Select bit 1 position. */ - -#define DAC_CH1TRIG_bm 0x02 /* Channel 1 Event Trig Enable bit mask. */ -#define DAC_CH1TRIG_bp 1 /* Channel 1 Event Trig Enable bit position. */ - -#define DAC_CH0TRIG_bm 0x01 /* Channel 0 Event Trig Enable bit mask. */ -#define DAC_CH0TRIG_bp 0 /* Channel 0 Event Trig Enable bit position. */ - - -/* DAC.CTRLC bit masks and bit positions */ -#define DAC_REFSEL_gm 0x18 /* Reference Select group mask. */ -#define DAC_REFSEL_gp 3 /* Reference Select group position. */ -#define DAC_REFSEL0_bm (1<<3) /* Reference Select bit 0 mask. */ -#define DAC_REFSEL0_bp 3 /* Reference Select bit 0 position. */ -#define DAC_REFSEL1_bm (1<<4) /* Reference Select bit 1 mask. */ -#define DAC_REFSEL1_bp 4 /* Reference Select bit 1 position. */ - -#define DAC_LEFTADJ_bm 0x01 /* Left-adjust Result bit mask. */ -#define DAC_LEFTADJ_bp 0 /* Left-adjust Result bit position. */ - - -/* DAC.EVCTRL bit masks and bit positions */ -#define DAC_EVSEL_gm 0x07 /* Event Input Selection group mask. */ -#define DAC_EVSEL_gp 0 /* Event Input Selection group position. */ -#define DAC_EVSEL0_bm (1<<0) /* Event Input Selection bit 0 mask. */ -#define DAC_EVSEL0_bp 0 /* Event Input Selection bit 0 position. */ -#define DAC_EVSEL1_bm (1<<1) /* Event Input Selection bit 1 mask. */ -#define DAC_EVSEL1_bp 1 /* Event Input Selection bit 1 position. */ -#define DAC_EVSEL2_bm (1<<2) /* Event Input Selection bit 2 mask. */ -#define DAC_EVSEL2_bp 2 /* Event Input Selection bit 2 position. */ - - -/* DAC.TIMCTRL bit masks and bit positions */ -#define DAC_CONINTVAL_gm 0x70 /* Conversion Intercal group mask. */ -#define DAC_CONINTVAL_gp 4 /* Conversion Intercal group position. */ -#define DAC_CONINTVAL0_bm (1<<4) /* Conversion Intercal bit 0 mask. */ -#define DAC_CONINTVAL0_bp 4 /* Conversion Intercal bit 0 position. */ -#define DAC_CONINTVAL1_bm (1<<5) /* Conversion Intercal bit 1 mask. */ -#define DAC_CONINTVAL1_bp 5 /* Conversion Intercal bit 1 position. */ -#define DAC_CONINTVAL2_bm (1<<6) /* Conversion Intercal bit 2 mask. */ -#define DAC_CONINTVAL2_bp 6 /* Conversion Intercal bit 2 position. */ - -#define DAC_REFRESH_gm 0x0F /* Refresh Timing Control group mask. */ -#define DAC_REFRESH_gp 0 /* Refresh Timing Control group position. */ -#define DAC_REFRESH0_bm (1<<0) /* Refresh Timing Control bit 0 mask. */ -#define DAC_REFRESH0_bp 0 /* Refresh Timing Control bit 0 position. */ -#define DAC_REFRESH1_bm (1<<1) /* Refresh Timing Control bit 1 mask. */ -#define DAC_REFRESH1_bp 1 /* Refresh Timing Control bit 1 position. */ -#define DAC_REFRESH2_bm (1<<2) /* Refresh Timing Control bit 2 mask. */ -#define DAC_REFRESH2_bp 2 /* Refresh Timing Control bit 2 position. */ -#define DAC_REFRESH3_bm (1<<3) /* Refresh Timing Control bit 3 mask. */ -#define DAC_REFRESH3_bp 3 /* Refresh Timing Control bit 3 position. */ - - -/* DAC.STATUS bit masks and bit positions */ -#define DAC_CH1DRE_bm 0x02 /* Channel 1 Data Register Empty bit mask. */ -#define DAC_CH1DRE_bp 1 /* Channel 1 Data Register Empty bit position. */ - -#define DAC_CH0DRE_bm 0x01 /* Channel 0 Data Register Empty bit mask. */ -#define DAC_CH0DRE_bp 0 /* Channel 0 Data Register Empty bit position. */ - - -/* RTC - Real-Time Clounter */ -/* RTC.CTRL bit masks and bit positions */ -#define RTC_PRESCALER_gm 0x07 /* Prescaling Factor group mask. */ -#define RTC_PRESCALER_gp 0 /* Prescaling Factor group position. */ -#define RTC_PRESCALER0_bm (1<<0) /* Prescaling Factor bit 0 mask. */ -#define RTC_PRESCALER0_bp 0 /* Prescaling Factor bit 0 position. */ -#define RTC_PRESCALER1_bm (1<<1) /* Prescaling Factor bit 1 mask. */ -#define RTC_PRESCALER1_bp 1 /* Prescaling Factor bit 1 position. */ -#define RTC_PRESCALER2_bm (1<<2) /* Prescaling Factor bit 2 mask. */ -#define RTC_PRESCALER2_bp 2 /* Prescaling Factor bit 2 position. */ - - -/* RTC.STATUS bit masks and bit positions */ -#define RTC_SYNCBUSY_bm 0x01 /* Synchronization Busy Flag bit mask. */ -#define RTC_SYNCBUSY_bp 0 /* Synchronization Busy Flag bit position. */ - - -/* RTC.INTCTRL bit masks and bit positions */ -#define RTC_COMPINTLVL_gm 0x0C /* Compare Match Interrupt Level group mask. */ -#define RTC_COMPINTLVL_gp 2 /* Compare Match Interrupt Level group position. */ -#define RTC_COMPINTLVL0_bm (1<<2) /* Compare Match Interrupt Level bit 0 mask. */ -#define RTC_COMPINTLVL0_bp 2 /* Compare Match Interrupt Level bit 0 position. */ -#define RTC_COMPINTLVL1_bm (1<<3) /* Compare Match Interrupt Level bit 1 mask. */ -#define RTC_COMPINTLVL1_bp 3 /* Compare Match Interrupt Level bit 1 position. */ - -#define RTC_OVFINTLVL_gm 0x03 /* Overflow Interrupt Level group mask. */ -#define RTC_OVFINTLVL_gp 0 /* Overflow Interrupt Level group position. */ -#define RTC_OVFINTLVL0_bm (1<<0) /* Overflow Interrupt Level bit 0 mask. */ -#define RTC_OVFINTLVL0_bp 0 /* Overflow Interrupt Level bit 0 position. */ -#define RTC_OVFINTLVL1_bm (1<<1) /* Overflow Interrupt Level bit 1 mask. */ -#define RTC_OVFINTLVL1_bp 1 /* Overflow Interrupt Level bit 1 position. */ - - -/* RTC.INTFLAGS bit masks and bit positions */ -#define RTC_COMPIF_bm 0x02 /* Compare Match Interrupt Flag bit mask. */ -#define RTC_COMPIF_bp 1 /* Compare Match Interrupt Flag bit position. */ - -#define RTC_OVFIF_bm 0x01 /* Overflow Interrupt Flag bit mask. */ -#define RTC_OVFIF_bp 0 /* Overflow Interrupt Flag bit position. */ - - -/* EBI - External Bus Interface */ -/* EBI_CS.CTRLA bit masks and bit positions */ -#define EBI_CS_ASPACE_gm 0x7C /* Address Space group mask. */ -#define EBI_CS_ASPACE_gp 2 /* Address Space group position. */ -#define EBI_CS_ASPACE0_bm (1<<2) /* Address Space bit 0 mask. */ -#define EBI_CS_ASPACE0_bp 2 /* Address Space bit 0 position. */ -#define EBI_CS_ASPACE1_bm (1<<3) /* Address Space bit 1 mask. */ -#define EBI_CS_ASPACE1_bp 3 /* Address Space bit 1 position. */ -#define EBI_CS_ASPACE2_bm (1<<4) /* Address Space bit 2 mask. */ -#define EBI_CS_ASPACE2_bp 4 /* Address Space bit 2 position. */ -#define EBI_CS_ASPACE3_bm (1<<5) /* Address Space bit 3 mask. */ -#define EBI_CS_ASPACE3_bp 5 /* Address Space bit 3 position. */ -#define EBI_CS_ASPACE4_bm (1<<6) /* Address Space bit 4 mask. */ -#define EBI_CS_ASPACE4_bp 6 /* Address Space bit 4 position. */ - -#define EBI_CS_MODE_gm 0x03 /* Memory Mode group mask. */ -#define EBI_CS_MODE_gp 0 /* Memory Mode group position. */ -#define EBI_CS_MODE0_bm (1<<0) /* Memory Mode bit 0 mask. */ -#define EBI_CS_MODE0_bp 0 /* Memory Mode bit 0 position. */ -#define EBI_CS_MODE1_bm (1<<1) /* Memory Mode bit 1 mask. */ -#define EBI_CS_MODE1_bp 1 /* Memory Mode bit 1 position. */ - - -/* EBI_CS.CTRLB bit masks and bit positions */ -#define EBI_CS_SRWS_gm 0x07 /* SRAM Wait State Cycles group mask. */ -#define EBI_CS_SRWS_gp 0 /* SRAM Wait State Cycles group position. */ -#define EBI_CS_SRWS0_bm (1<<0) /* SRAM Wait State Cycles bit 0 mask. */ -#define EBI_CS_SRWS0_bp 0 /* SRAM Wait State Cycles bit 0 position. */ -#define EBI_CS_SRWS1_bm (1<<1) /* SRAM Wait State Cycles bit 1 mask. */ -#define EBI_CS_SRWS1_bp 1 /* SRAM Wait State Cycles bit 1 position. */ -#define EBI_CS_SRWS2_bm (1<<2) /* SRAM Wait State Cycles bit 2 mask. */ -#define EBI_CS_SRWS2_bp 2 /* SRAM Wait State Cycles bit 2 position. */ - -#define EBI_CS_SDINITDONE_bm 0x80 /* SDRAM Initialization Done bit mask. */ -#define EBI_CS_SDINITDONE_bp 7 /* SDRAM Initialization Done bit position. */ - -#define EBI_CS_SDSREN_bm 0x04 /* SDRAM Self-refresh Enable bit mask. */ -#define EBI_CS_SDSREN_bp 2 /* SDRAM Self-refresh Enable bit position. */ - -#define EBI_CS_SDMODE_gm 0x03 /* SDRAM Mode group mask. */ -#define EBI_CS_SDMODE_gp 0 /* SDRAM Mode group position. */ -#define EBI_CS_SDMODE0_bm (1<<0) /* SDRAM Mode bit 0 mask. */ -#define EBI_CS_SDMODE0_bp 0 /* SDRAM Mode bit 0 position. */ -#define EBI_CS_SDMODE1_bm (1<<1) /* SDRAM Mode bit 1 mask. */ -#define EBI_CS_SDMODE1_bp 1 /* SDRAM Mode bit 1 position. */ - - -/* EBI.CTRL bit masks and bit positions */ -#define EBI_SDDATAW_gm 0xC0 /* SDRAM Data Width Setting group mask. */ -#define EBI_SDDATAW_gp 6 /* SDRAM Data Width Setting group position. */ -#define EBI_SDDATAW0_bm (1<<6) /* SDRAM Data Width Setting bit 0 mask. */ -#define EBI_SDDATAW0_bp 6 /* SDRAM Data Width Setting bit 0 position. */ -#define EBI_SDDATAW1_bm (1<<7) /* SDRAM Data Width Setting bit 1 mask. */ -#define EBI_SDDATAW1_bp 7 /* SDRAM Data Width Setting bit 1 position. */ - -#define EBI_LPCMODE_gm 0x30 /* SRAM LPC Mode group mask. */ -#define EBI_LPCMODE_gp 4 /* SRAM LPC Mode group position. */ -#define EBI_LPCMODE0_bm (1<<4) /* SRAM LPC Mode bit 0 mask. */ -#define EBI_LPCMODE0_bp 4 /* SRAM LPC Mode bit 0 position. */ -#define EBI_LPCMODE1_bm (1<<5) /* SRAM LPC Mode bit 1 mask. */ -#define EBI_LPCMODE1_bp 5 /* SRAM LPC Mode bit 1 position. */ - -#define EBI_SRMODE_gm 0x0C /* SRAM Mode group mask. */ -#define EBI_SRMODE_gp 2 /* SRAM Mode group position. */ -#define EBI_SRMODE0_bm (1<<2) /* SRAM Mode bit 0 mask. */ -#define EBI_SRMODE0_bp 2 /* SRAM Mode bit 0 position. */ -#define EBI_SRMODE1_bm (1<<3) /* SRAM Mode bit 1 mask. */ -#define EBI_SRMODE1_bp 3 /* SRAM Mode bit 1 position. */ - -#define EBI_IFMODE_gm 0x03 /* Interface Mode group mask. */ -#define EBI_IFMODE_gp 0 /* Interface Mode group position. */ -#define EBI_IFMODE0_bm (1<<0) /* Interface Mode bit 0 mask. */ -#define EBI_IFMODE0_bp 0 /* Interface Mode bit 0 position. */ -#define EBI_IFMODE1_bm (1<<1) /* Interface Mode bit 1 mask. */ -#define EBI_IFMODE1_bp 1 /* Interface Mode bit 1 position. */ - - -/* EBI.SDRAMCTRLA bit masks and bit positions */ -#define EBI_SDCAS_bm 0x08 /* SDRAM CAS Latency Setting bit mask. */ -#define EBI_SDCAS_bp 3 /* SDRAM CAS Latency Setting bit position. */ - -#define EBI_SDROW_bm 0x04 /* SDRAM ROW Bits Setting bit mask. */ -#define EBI_SDROW_bp 2 /* SDRAM ROW Bits Setting bit position. */ - -#define EBI_SDCOL_gm 0x03 /* SDRAM Column Bits Setting group mask. */ -#define EBI_SDCOL_gp 0 /* SDRAM Column Bits Setting group position. */ -#define EBI_SDCOL0_bm (1<<0) /* SDRAM Column Bits Setting bit 0 mask. */ -#define EBI_SDCOL0_bp 0 /* SDRAM Column Bits Setting bit 0 position. */ -#define EBI_SDCOL1_bm (1<<1) /* SDRAM Column Bits Setting bit 1 mask. */ -#define EBI_SDCOL1_bp 1 /* SDRAM Column Bits Setting bit 1 position. */ - - -/* EBI.SDRAMCTRLB bit masks and bit positions */ -#define EBI_MRDLY_gm 0xC0 /* SDRAM Mode Register Delay group mask. */ -#define EBI_MRDLY_gp 6 /* SDRAM Mode Register Delay group position. */ -#define EBI_MRDLY0_bm (1<<6) /* SDRAM Mode Register Delay bit 0 mask. */ -#define EBI_MRDLY0_bp 6 /* SDRAM Mode Register Delay bit 0 position. */ -#define EBI_MRDLY1_bm (1<<7) /* SDRAM Mode Register Delay bit 1 mask. */ -#define EBI_MRDLY1_bp 7 /* SDRAM Mode Register Delay bit 1 position. */ - -#define EBI_ROWCYCDLY_gm 0x38 /* SDRAM Row Cycle Delay group mask. */ -#define EBI_ROWCYCDLY_gp 3 /* SDRAM Row Cycle Delay group position. */ -#define EBI_ROWCYCDLY0_bm (1<<3) /* SDRAM Row Cycle Delay bit 0 mask. */ -#define EBI_ROWCYCDLY0_bp 3 /* SDRAM Row Cycle Delay bit 0 position. */ -#define EBI_ROWCYCDLY1_bm (1<<4) /* SDRAM Row Cycle Delay bit 1 mask. */ -#define EBI_ROWCYCDLY1_bp 4 /* SDRAM Row Cycle Delay bit 1 position. */ -#define EBI_ROWCYCDLY2_bm (1<<5) /* SDRAM Row Cycle Delay bit 2 mask. */ -#define EBI_ROWCYCDLY2_bp 5 /* SDRAM Row Cycle Delay bit 2 position. */ - -#define EBI_RPDLY_gm 0x07 /* SDRAM Row-to-Precharge Delay group mask. */ -#define EBI_RPDLY_gp 0 /* SDRAM Row-to-Precharge Delay group position. */ -#define EBI_RPDLY0_bm (1<<0) /* SDRAM Row-to-Precharge Delay bit 0 mask. */ -#define EBI_RPDLY0_bp 0 /* SDRAM Row-to-Precharge Delay bit 0 position. */ -#define EBI_RPDLY1_bm (1<<1) /* SDRAM Row-to-Precharge Delay bit 1 mask. */ -#define EBI_RPDLY1_bp 1 /* SDRAM Row-to-Precharge Delay bit 1 position. */ -#define EBI_RPDLY2_bm (1<<2) /* SDRAM Row-to-Precharge Delay bit 2 mask. */ -#define EBI_RPDLY2_bp 2 /* SDRAM Row-to-Precharge Delay bit 2 position. */ - - -/* EBI.SDRAMCTRLC bit masks and bit positions */ -#define EBI_WRDLY_gm 0xC0 /* SDRAM Write Recovery Delay group mask. */ -#define EBI_WRDLY_gp 6 /* SDRAM Write Recovery Delay group position. */ -#define EBI_WRDLY0_bm (1<<6) /* SDRAM Write Recovery Delay bit 0 mask. */ -#define EBI_WRDLY0_bp 6 /* SDRAM Write Recovery Delay bit 0 position. */ -#define EBI_WRDLY1_bm (1<<7) /* SDRAM Write Recovery Delay bit 1 mask. */ -#define EBI_WRDLY1_bp 7 /* SDRAM Write Recovery Delay bit 1 position. */ - -#define EBI_ESRDLY_gm 0x38 /* SDRAM Exit-Self-refresh-to-Active Delay group mask. */ -#define EBI_ESRDLY_gp 3 /* SDRAM Exit-Self-refresh-to-Active Delay group position. */ -#define EBI_ESRDLY0_bm (1<<3) /* SDRAM Exit-Self-refresh-to-Active Delay bit 0 mask. */ -#define EBI_ESRDLY0_bp 3 /* SDRAM Exit-Self-refresh-to-Active Delay bit 0 position. */ -#define EBI_ESRDLY1_bm (1<<4) /* SDRAM Exit-Self-refresh-to-Active Delay bit 1 mask. */ -#define EBI_ESRDLY1_bp 4 /* SDRAM Exit-Self-refresh-to-Active Delay bit 1 position. */ -#define EBI_ESRDLY2_bm (1<<5) /* SDRAM Exit-Self-refresh-to-Active Delay bit 2 mask. */ -#define EBI_ESRDLY2_bp 5 /* SDRAM Exit-Self-refresh-to-Active Delay bit 2 position. */ - -#define EBI_ROWCOLDLY_gm 0x07 /* SDRAM Row-to-Column Delay group mask. */ -#define EBI_ROWCOLDLY_gp 0 /* SDRAM Row-to-Column Delay group position. */ -#define EBI_ROWCOLDLY0_bm (1<<0) /* SDRAM Row-to-Column Delay bit 0 mask. */ -#define EBI_ROWCOLDLY0_bp 0 /* SDRAM Row-to-Column Delay bit 0 position. */ -#define EBI_ROWCOLDLY1_bm (1<<1) /* SDRAM Row-to-Column Delay bit 1 mask. */ -#define EBI_ROWCOLDLY1_bp 1 /* SDRAM Row-to-Column Delay bit 1 position. */ -#define EBI_ROWCOLDLY2_bm (1<<2) /* SDRAM Row-to-Column Delay bit 2 mask. */ -#define EBI_ROWCOLDLY2_bp 2 /* SDRAM Row-to-Column Delay bit 2 position. */ - - -/* TWI - Two-Wire Interface */ -/* TWI_MASTER.CTRLA bit masks and bit positions */ -#define TWI_MASTER_INTLVL_gm 0xC0 /* Interrupt Level group mask. */ -#define TWI_MASTER_INTLVL_gp 6 /* Interrupt Level group position. */ -#define TWI_MASTER_INTLVL0_bm (1<<6) /* Interrupt Level bit 0 mask. */ -#define TWI_MASTER_INTLVL0_bp 6 /* Interrupt Level bit 0 position. */ -#define TWI_MASTER_INTLVL1_bm (1<<7) /* Interrupt Level bit 1 mask. */ -#define TWI_MASTER_INTLVL1_bp 7 /* Interrupt Level bit 1 position. */ - -#define TWI_MASTER_RIEN_bm 0x20 /* Read Interrupt Enable bit mask. */ -#define TWI_MASTER_RIEN_bp 5 /* Read Interrupt Enable bit position. */ - -#define TWI_MASTER_WIEN_bm 0x10 /* Write Interrupt Enable bit mask. */ -#define TWI_MASTER_WIEN_bp 4 /* Write Interrupt Enable bit position. */ - -#define TWI_MASTER_ENABLE_bm 0x08 /* Enable TWI Master bit mask. */ -#define TWI_MASTER_ENABLE_bp 3 /* Enable TWI Master bit position. */ - - -/* TWI_MASTER.CTRLB bit masks and bit positions */ -#define TWI_MASTER_TIMEOUT_gm 0x0C /* Inactive Bus Timeout group mask. */ -#define TWI_MASTER_TIMEOUT_gp 2 /* Inactive Bus Timeout group position. */ -#define TWI_MASTER_TIMEOUT0_bm (1<<2) /* Inactive Bus Timeout bit 0 mask. */ -#define TWI_MASTER_TIMEOUT0_bp 2 /* Inactive Bus Timeout bit 0 position. */ -#define TWI_MASTER_TIMEOUT1_bm (1<<3) /* Inactive Bus Timeout bit 1 mask. */ -#define TWI_MASTER_TIMEOUT1_bp 3 /* Inactive Bus Timeout bit 1 position. */ - -#define TWI_MASTER_QCEN_bm 0x02 /* Quick Command Enable bit mask. */ -#define TWI_MASTER_QCEN_bp 1 /* Quick Command Enable bit position. */ - -#define TWI_MASTER_SMEN_bm 0x01 /* Smart Mode Enable bit mask. */ -#define TWI_MASTER_SMEN_bp 0 /* Smart Mode Enable bit position. */ - - -/* TWI_MASTER.CTRLC bit masks and bit positions */ -#define TWI_MASTER_ACKACT_bm 0x04 /* Acknowledge Action bit mask. */ -#define TWI_MASTER_ACKACT_bp 2 /* Acknowledge Action bit position. */ - -#define TWI_MASTER_CMD_gm 0x03 /* Command group mask. */ -#define TWI_MASTER_CMD_gp 0 /* Command group position. */ -#define TWI_MASTER_CMD0_bm (1<<0) /* Command bit 0 mask. */ -#define TWI_MASTER_CMD0_bp 0 /* Command bit 0 position. */ -#define TWI_MASTER_CMD1_bm (1<<1) /* Command bit 1 mask. */ -#define TWI_MASTER_CMD1_bp 1 /* Command bit 1 position. */ - - -/* TWI_MASTER.STATUS bit masks and bit positions */ -#define TWI_MASTER_RIF_bm 0x80 /* Read Interrupt Flag bit mask. */ -#define TWI_MASTER_RIF_bp 7 /* Read Interrupt Flag bit position. */ - -#define TWI_MASTER_WIF_bm 0x40 /* Write Interrupt Flag bit mask. */ -#define TWI_MASTER_WIF_bp 6 /* Write Interrupt Flag bit position. */ - -#define TWI_MASTER_CLKHOLD_bm 0x20 /* Clock Hold bit mask. */ -#define TWI_MASTER_CLKHOLD_bp 5 /* Clock Hold bit position. */ - -#define TWI_MASTER_RXACK_bm 0x10 /* Received Acknowledge bit mask. */ -#define TWI_MASTER_RXACK_bp 4 /* Received Acknowledge bit position. */ - -#define TWI_MASTER_ARBLOST_bm 0x08 /* Arbitration Lost bit mask. */ -#define TWI_MASTER_ARBLOST_bp 3 /* Arbitration Lost bit position. */ - -#define TWI_MASTER_BUSERR_bm 0x04 /* Bus Error bit mask. */ -#define TWI_MASTER_BUSERR_bp 2 /* Bus Error bit position. */ - -#define TWI_MASTER_BUSSTATE_gm 0x03 /* Bus State group mask. */ -#define TWI_MASTER_BUSSTATE_gp 0 /* Bus State group position. */ -#define TWI_MASTER_BUSSTATE0_bm (1<<0) /* Bus State bit 0 mask. */ -#define TWI_MASTER_BUSSTATE0_bp 0 /* Bus State bit 0 position. */ -#define TWI_MASTER_BUSSTATE1_bm (1<<1) /* Bus State bit 1 mask. */ -#define TWI_MASTER_BUSSTATE1_bp 1 /* Bus State bit 1 position. */ - - -/* TWI_SLAVE.CTRLA bit masks and bit positions */ -#define TWI_SLAVE_INTLVL_gm 0xC0 /* Interrupt Level group mask. */ -#define TWI_SLAVE_INTLVL_gp 6 /* Interrupt Level group position. */ -#define TWI_SLAVE_INTLVL0_bm (1<<6) /* Interrupt Level bit 0 mask. */ -#define TWI_SLAVE_INTLVL0_bp 6 /* Interrupt Level bit 0 position. */ -#define TWI_SLAVE_INTLVL1_bm (1<<7) /* Interrupt Level bit 1 mask. */ -#define TWI_SLAVE_INTLVL1_bp 7 /* Interrupt Level bit 1 position. */ - -#define TWI_SLAVE_DIEN_bm 0x20 /* Data Interrupt Enable bit mask. */ -#define TWI_SLAVE_DIEN_bp 5 /* Data Interrupt Enable bit position. */ - -#define TWI_SLAVE_APIEN_bm 0x10 /* Address/Stop Interrupt Enable bit mask. */ -#define TWI_SLAVE_APIEN_bp 4 /* Address/Stop Interrupt Enable bit position. */ - -#define TWI_SLAVE_ENABLE_bm 0x08 /* Enable TWI Slave bit mask. */ -#define TWI_SLAVE_ENABLE_bp 3 /* Enable TWI Slave bit position. */ - -#define TWI_SLAVE_PIEN_bm 0x04 /* Stop Interrupt Enable bit mask. */ -#define TWI_SLAVE_PIEN_bp 2 /* Stop Interrupt Enable bit position. */ - -#define TWI_SLAVE_PMEN_bm 0x02 /* Promiscuous Mode Enable bit mask. */ -#define TWI_SLAVE_PMEN_bp 1 /* Promiscuous Mode Enable bit position. */ - -#define TWI_SLAVE_SMEN_bm 0x01 /* Smart Mode Enable bit mask. */ -#define TWI_SLAVE_SMEN_bp 0 /* Smart Mode Enable bit position. */ - - -/* TWI_SLAVE.CTRLB bit masks and bit positions */ -#define TWI_SLAVE_ACKACT_bm 0x04 /* Acknowledge Action bit mask. */ -#define TWI_SLAVE_ACKACT_bp 2 /* Acknowledge Action bit position. */ - -#define TWI_SLAVE_CMD_gm 0x03 /* Command group mask. */ -#define TWI_SLAVE_CMD_gp 0 /* Command group position. */ -#define TWI_SLAVE_CMD0_bm (1<<0) /* Command bit 0 mask. */ -#define TWI_SLAVE_CMD0_bp 0 /* Command bit 0 position. */ -#define TWI_SLAVE_CMD1_bm (1<<1) /* Command bit 1 mask. */ -#define TWI_SLAVE_CMD1_bp 1 /* Command bit 1 position. */ - - -/* TWI_SLAVE.STATUS bit masks and bit positions */ -#define TWI_SLAVE_DIF_bm 0x80 /* Data Interrupt Flag bit mask. */ -#define TWI_SLAVE_DIF_bp 7 /* Data Interrupt Flag bit position. */ - -#define TWI_SLAVE_APIF_bm 0x40 /* Address/Stop Interrupt Flag bit mask. */ -#define TWI_SLAVE_APIF_bp 6 /* Address/Stop Interrupt Flag bit position. */ - -#define TWI_SLAVE_CLKHOLD_bm 0x20 /* Clock Hold bit mask. */ -#define TWI_SLAVE_CLKHOLD_bp 5 /* Clock Hold bit position. */ - -#define TWI_SLAVE_RXACK_bm 0x10 /* Received Acknowledge bit mask. */ -#define TWI_SLAVE_RXACK_bp 4 /* Received Acknowledge bit position. */ - -#define TWI_SLAVE_COLL_bm 0x08 /* Collision bit mask. */ -#define TWI_SLAVE_COLL_bp 3 /* Collision bit position. */ - -#define TWI_SLAVE_BUSERR_bm 0x04 /* Bus Error bit mask. */ -#define TWI_SLAVE_BUSERR_bp 2 /* Bus Error bit position. */ - -#define TWI_SLAVE_DIR_bm 0x02 /* Read/Write Direction bit mask. */ -#define TWI_SLAVE_DIR_bp 1 /* Read/Write Direction bit position. */ - -#define TWI_SLAVE_AP_bm 0x01 /* Slave Address or Stop bit mask. */ -#define TWI_SLAVE_AP_bp 0 /* Slave Address or Stop bit position. */ - - -/* TWI.CTRL bit masks and bit positions */ -#define TWI_SDAHOLD_bm 0x02 /* SDA Hold Time Enable bit mask. */ -#define TWI_SDAHOLD_bp 1 /* SDA Hold Time Enable bit position. */ - -#define TWI_EDIEN_bm 0x01 /* External Driver Interface Enable bit mask. */ -#define TWI_EDIEN_bp 0 /* External Driver Interface Enable bit position. */ - - -/* PORT - Port Configuration */ -/* PORTCFG.VPCTRLA bit masks and bit positions */ -#define PORTCFG_VP1MAP_gm 0xF0 /* Virtual Port 1 Mapping group mask. */ -#define PORTCFG_VP1MAP_gp 4 /* Virtual Port 1 Mapping group position. */ -#define PORTCFG_VP1MAP0_bm (1<<4) /* Virtual Port 1 Mapping bit 0 mask. */ -#define PORTCFG_VP1MAP0_bp 4 /* Virtual Port 1 Mapping bit 0 position. */ -#define PORTCFG_VP1MAP1_bm (1<<5) /* Virtual Port 1 Mapping bit 1 mask. */ -#define PORTCFG_VP1MAP1_bp 5 /* Virtual Port 1 Mapping bit 1 position. */ -#define PORTCFG_VP1MAP2_bm (1<<6) /* Virtual Port 1 Mapping bit 2 mask. */ -#define PORTCFG_VP1MAP2_bp 6 /* Virtual Port 1 Mapping bit 2 position. */ -#define PORTCFG_VP1MAP3_bm (1<<7) /* Virtual Port 1 Mapping bit 3 mask. */ -#define PORTCFG_VP1MAP3_bp 7 /* Virtual Port 1 Mapping bit 3 position. */ - -#define PORTCFG_VP0MAP_gm 0x0F /* Virtual Port 0 Mapping group mask. */ -#define PORTCFG_VP0MAP_gp 0 /* Virtual Port 0 Mapping group position. */ -#define PORTCFG_VP0MAP0_bm (1<<0) /* Virtual Port 0 Mapping bit 0 mask. */ -#define PORTCFG_VP0MAP0_bp 0 /* Virtual Port 0 Mapping bit 0 position. */ -#define PORTCFG_VP0MAP1_bm (1<<1) /* Virtual Port 0 Mapping bit 1 mask. */ -#define PORTCFG_VP0MAP1_bp 1 /* Virtual Port 0 Mapping bit 1 position. */ -#define PORTCFG_VP0MAP2_bm (1<<2) /* Virtual Port 0 Mapping bit 2 mask. */ -#define PORTCFG_VP0MAP2_bp 2 /* Virtual Port 0 Mapping bit 2 position. */ -#define PORTCFG_VP0MAP3_bm (1<<3) /* Virtual Port 0 Mapping bit 3 mask. */ -#define PORTCFG_VP0MAP3_bp 3 /* Virtual Port 0 Mapping bit 3 position. */ - - -/* PORTCFG.VPCTRLB bit masks and bit positions */ -#define PORTCFG_VP3MAP_gm 0xF0 /* Virtual Port 3 Mapping group mask. */ -#define PORTCFG_VP3MAP_gp 4 /* Virtual Port 3 Mapping group position. */ -#define PORTCFG_VP3MAP0_bm (1<<4) /* Virtual Port 3 Mapping bit 0 mask. */ -#define PORTCFG_VP3MAP0_bp 4 /* Virtual Port 3 Mapping bit 0 position. */ -#define PORTCFG_VP3MAP1_bm (1<<5) /* Virtual Port 3 Mapping bit 1 mask. */ -#define PORTCFG_VP3MAP1_bp 5 /* Virtual Port 3 Mapping bit 1 position. */ -#define PORTCFG_VP3MAP2_bm (1<<6) /* Virtual Port 3 Mapping bit 2 mask. */ -#define PORTCFG_VP3MAP2_bp 6 /* Virtual Port 3 Mapping bit 2 position. */ -#define PORTCFG_VP3MAP3_bm (1<<7) /* Virtual Port 3 Mapping bit 3 mask. */ -#define PORTCFG_VP3MAP3_bp 7 /* Virtual Port 3 Mapping bit 3 position. */ - -#define PORTCFG_VP2MAP_gm 0x0F /* Virtual Port 2 Mapping group mask. */ -#define PORTCFG_VP2MAP_gp 0 /* Virtual Port 2 Mapping group position. */ -#define PORTCFG_VP2MAP0_bm (1<<0) /* Virtual Port 2 Mapping bit 0 mask. */ -#define PORTCFG_VP2MAP0_bp 0 /* Virtual Port 2 Mapping bit 0 position. */ -#define PORTCFG_VP2MAP1_bm (1<<1) /* Virtual Port 2 Mapping bit 1 mask. */ -#define PORTCFG_VP2MAP1_bp 1 /* Virtual Port 2 Mapping bit 1 position. */ -#define PORTCFG_VP2MAP2_bm (1<<2) /* Virtual Port 2 Mapping bit 2 mask. */ -#define PORTCFG_VP2MAP2_bp 2 /* Virtual Port 2 Mapping bit 2 position. */ -#define PORTCFG_VP2MAP3_bm (1<<3) /* Virtual Port 2 Mapping bit 3 mask. */ -#define PORTCFG_VP2MAP3_bp 3 /* Virtual Port 2 Mapping bit 3 position. */ - - -/* PORTCFG.CLKEVOUT bit masks and bit positions */ -#define PORTCFG_CLKOUT_gm 0x03 /* Clock Output Port group mask. */ -#define PORTCFG_CLKOUT_gp 0 /* Clock Output Port group position. */ -#define PORTCFG_CLKOUT0_bm (1<<0) /* Clock Output Port bit 0 mask. */ -#define PORTCFG_CLKOUT0_bp 0 /* Clock Output Port bit 0 position. */ -#define PORTCFG_CLKOUT1_bm (1<<1) /* Clock Output Port bit 1 mask. */ -#define PORTCFG_CLKOUT1_bp 1 /* Clock Output Port bit 1 position. */ - -#define PORTCFG_EVOUT_gm 0x30 /* Event Output Port group mask. */ -#define PORTCFG_EVOUT_gp 4 /* Event Output Port group position. */ -#define PORTCFG_EVOUT0_bm (1<<4) /* Event Output Port bit 0 mask. */ -#define PORTCFG_EVOUT0_bp 4 /* Event Output Port bit 0 position. */ -#define PORTCFG_EVOUT1_bm (1<<5) /* Event Output Port bit 1 mask. */ -#define PORTCFG_EVOUT1_bp 5 /* Event Output Port bit 1 position. */ - - -/* VPORT.INTFLAGS bit masks and bit positions */ -#define VPORT_INT1IF_bm 0x02 /* Port Interrupt 1 Flag bit mask. */ -#define VPORT_INT1IF_bp 1 /* Port Interrupt 1 Flag bit position. */ - -#define VPORT_INT0IF_bm 0x01 /* Port Interrupt 0 Flag bit mask. */ -#define VPORT_INT0IF_bp 0 /* Port Interrupt 0 Flag bit position. */ - - -/* PORT.INTCTRL bit masks and bit positions */ -#define PORT_INT1LVL_gm 0x0C /* Port Interrupt 1 Level group mask. */ -#define PORT_INT1LVL_gp 2 /* Port Interrupt 1 Level group position. */ -#define PORT_INT1LVL0_bm (1<<2) /* Port Interrupt 1 Level bit 0 mask. */ -#define PORT_INT1LVL0_bp 2 /* Port Interrupt 1 Level bit 0 position. */ -#define PORT_INT1LVL1_bm (1<<3) /* Port Interrupt 1 Level bit 1 mask. */ -#define PORT_INT1LVL1_bp 3 /* Port Interrupt 1 Level bit 1 position. */ - -#define PORT_INT0LVL_gm 0x03 /* Port Interrupt 0 Level group mask. */ -#define PORT_INT0LVL_gp 0 /* Port Interrupt 0 Level group position. */ -#define PORT_INT0LVL0_bm (1<<0) /* Port Interrupt 0 Level bit 0 mask. */ -#define PORT_INT0LVL0_bp 0 /* Port Interrupt 0 Level bit 0 position. */ -#define PORT_INT0LVL1_bm (1<<1) /* Port Interrupt 0 Level bit 1 mask. */ -#define PORT_INT0LVL1_bp 1 /* Port Interrupt 0 Level bit 1 position. */ - - -/* PORT.INTFLAGS bit masks and bit positions */ -#define PORT_INT1IF_bm 0x02 /* Port Interrupt 1 Flag bit mask. */ -#define PORT_INT1IF_bp 1 /* Port Interrupt 1 Flag bit position. */ - -#define PORT_INT0IF_bm 0x01 /* Port Interrupt 0 Flag bit mask. */ -#define PORT_INT0IF_bp 0 /* Port Interrupt 0 Flag bit position. */ - - -/* PORT.PIN0CTRL bit masks and bit positions */ -#define PORT_SRLEN_bm 0x80 /* Slew Rate Enable bit mask. */ -#define PORT_SRLEN_bp 7 /* Slew Rate Enable bit position. */ - -#define PORT_INVEN_bm 0x40 /* Inverted I/O Enable bit mask. */ -#define PORT_INVEN_bp 6 /* Inverted I/O Enable bit position. */ - -#define PORT_OPC_gm 0x38 /* Output/Pull Configuration group mask. */ -#define PORT_OPC_gp 3 /* Output/Pull Configuration group position. */ -#define PORT_OPC0_bm (1<<3) /* Output/Pull Configuration bit 0 mask. */ -#define PORT_OPC0_bp 3 /* Output/Pull Configuration bit 0 position. */ -#define PORT_OPC1_bm (1<<4) /* Output/Pull Configuration bit 1 mask. */ -#define PORT_OPC1_bp 4 /* Output/Pull Configuration bit 1 position. */ -#define PORT_OPC2_bm (1<<5) /* Output/Pull Configuration bit 2 mask. */ -#define PORT_OPC2_bp 5 /* Output/Pull Configuration bit 2 position. */ - -#define PORT_ISC_gm 0x07 /* Input/Sense Configuration group mask. */ -#define PORT_ISC_gp 0 /* Input/Sense Configuration group position. */ -#define PORT_ISC0_bm (1<<0) /* Input/Sense Configuration bit 0 mask. */ -#define PORT_ISC0_bp 0 /* Input/Sense Configuration bit 0 position. */ -#define PORT_ISC1_bm (1<<1) /* Input/Sense Configuration bit 1 mask. */ -#define PORT_ISC1_bp 1 /* Input/Sense Configuration bit 1 position. */ -#define PORT_ISC2_bm (1<<2) /* Input/Sense Configuration bit 2 mask. */ -#define PORT_ISC2_bp 2 /* Input/Sense Configuration bit 2 position. */ - - -/* PORT.PIN1CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* PORT.PIN2CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* PORT.PIN3CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* PORT.PIN4CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* PORT.PIN5CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* PORT.PIN6CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* PORT.PIN7CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* TC - 16-bit Timer/Counter With PWM */ -/* TC0.CTRLA bit masks and bit positions */ -#define TC0_CLKSEL_gm 0x0F /* Clock Selection group mask. */ -#define TC0_CLKSEL_gp 0 /* Clock Selection group position. */ -#define TC0_CLKSEL0_bm (1<<0) /* Clock Selection bit 0 mask. */ -#define TC0_CLKSEL0_bp 0 /* Clock Selection bit 0 position. */ -#define TC0_CLKSEL1_bm (1<<1) /* Clock Selection bit 1 mask. */ -#define TC0_CLKSEL1_bp 1 /* Clock Selection bit 1 position. */ -#define TC0_CLKSEL2_bm (1<<2) /* Clock Selection bit 2 mask. */ -#define TC0_CLKSEL2_bp 2 /* Clock Selection bit 2 position. */ -#define TC0_CLKSEL3_bm (1<<3) /* Clock Selection bit 3 mask. */ -#define TC0_CLKSEL3_bp 3 /* Clock Selection bit 3 position. */ - - -/* TC0.CTRLB bit masks and bit positions */ -#define TC0_CCDEN_bm 0x80 /* Compare or Capture D Enable bit mask. */ -#define TC0_CCDEN_bp 7 /* Compare or Capture D Enable bit position. */ - -#define TC0_CCCEN_bm 0x40 /* Compare or Capture C Enable bit mask. */ -#define TC0_CCCEN_bp 6 /* Compare or Capture C Enable bit position. */ - -#define TC0_CCBEN_bm 0x20 /* Compare or Capture B Enable bit mask. */ -#define TC0_CCBEN_bp 5 /* Compare or Capture B Enable bit position. */ - -#define TC0_CCAEN_bm 0x10 /* Compare or Capture A Enable bit mask. */ -#define TC0_CCAEN_bp 4 /* Compare or Capture A Enable bit position. */ - -#define TC0_WGMODE_gm 0x07 /* Waveform generation mode group mask. */ -#define TC0_WGMODE_gp 0 /* Waveform generation mode group position. */ -#define TC0_WGMODE0_bm (1<<0) /* Waveform generation mode bit 0 mask. */ -#define TC0_WGMODE0_bp 0 /* Waveform generation mode bit 0 position. */ -#define TC0_WGMODE1_bm (1<<1) /* Waveform generation mode bit 1 mask. */ -#define TC0_WGMODE1_bp 1 /* Waveform generation mode bit 1 position. */ -#define TC0_WGMODE2_bm (1<<2) /* Waveform generation mode bit 2 mask. */ -#define TC0_WGMODE2_bp 2 /* Waveform generation mode bit 2 position. */ - - -/* TC0.CTRLC bit masks and bit positions */ -#define TC0_CMPD_bm 0x08 /* Compare D Output Value bit mask. */ -#define TC0_CMPD_bp 3 /* Compare D Output Value bit position. */ - -#define TC0_CMPC_bm 0x04 /* Compare C Output Value bit mask. */ -#define TC0_CMPC_bp 2 /* Compare C Output Value bit position. */ - -#define TC0_CMPB_bm 0x02 /* Compare B Output Value bit mask. */ -#define TC0_CMPB_bp 1 /* Compare B Output Value bit position. */ - -#define TC0_CMPA_bm 0x01 /* Compare A Output Value bit mask. */ -#define TC0_CMPA_bp 0 /* Compare A Output Value bit position. */ - - -/* TC0.CTRLD bit masks and bit positions */ -#define TC0_EVACT_gm 0xE0 /* Event Action group mask. */ -#define TC0_EVACT_gp 5 /* Event Action group position. */ -#define TC0_EVACT0_bm (1<<5) /* Event Action bit 0 mask. */ -#define TC0_EVACT0_bp 5 /* Event Action bit 0 position. */ -#define TC0_EVACT1_bm (1<<6) /* Event Action bit 1 mask. */ -#define TC0_EVACT1_bp 6 /* Event Action bit 1 position. */ -#define TC0_EVACT2_bm (1<<7) /* Event Action bit 2 mask. */ -#define TC0_EVACT2_bp 7 /* Event Action bit 2 position. */ - -#define TC0_EVDLY_bm 0x10 /* Event Delay bit mask. */ -#define TC0_EVDLY_bp 4 /* Event Delay bit position. */ - -#define TC0_EVSEL_gm 0x0F /* Event Source Select group mask. */ -#define TC0_EVSEL_gp 0 /* Event Source Select group position. */ -#define TC0_EVSEL0_bm (1<<0) /* Event Source Select bit 0 mask. */ -#define TC0_EVSEL0_bp 0 /* Event Source Select bit 0 position. */ -#define TC0_EVSEL1_bm (1<<1) /* Event Source Select bit 1 mask. */ -#define TC0_EVSEL1_bp 1 /* Event Source Select bit 1 position. */ -#define TC0_EVSEL2_bm (1<<2) /* Event Source Select bit 2 mask. */ -#define TC0_EVSEL2_bp 2 /* Event Source Select bit 2 position. */ -#define TC0_EVSEL3_bm (1<<3) /* Event Source Select bit 3 mask. */ -#define TC0_EVSEL3_bp 3 /* Event Source Select bit 3 position. */ - - -/* TC0.CTRLE bit masks and bit positions */ -#define TC0_DTHM_bm 0x02 /* Dead Time Hold Mode bit mask. */ -#define TC0_DTHM_bp 1 /* Dead Time Hold Mode bit position. */ - -#define TC0_BYTEM_bm 0x01 /* Byte Mode bit mask. */ -#define TC0_BYTEM_bp 0 /* Byte Mode bit position. */ - - -/* TC0.INTCTRLA bit masks and bit positions */ -#define TC0_ERRINTLVL_gm 0x0C /* Error Interrupt Level group mask. */ -#define TC0_ERRINTLVL_gp 2 /* Error Interrupt Level group position. */ -#define TC0_ERRINTLVL0_bm (1<<2) /* Error Interrupt Level bit 0 mask. */ -#define TC0_ERRINTLVL0_bp 2 /* Error Interrupt Level bit 0 position. */ -#define TC0_ERRINTLVL1_bm (1<<3) /* Error Interrupt Level bit 1 mask. */ -#define TC0_ERRINTLVL1_bp 3 /* Error Interrupt Level bit 1 position. */ - -#define TC0_OVFINTLVL_gm 0x03 /* Overflow interrupt level group mask. */ -#define TC0_OVFINTLVL_gp 0 /* Overflow interrupt level group position. */ -#define TC0_OVFINTLVL0_bm (1<<0) /* Overflow interrupt level bit 0 mask. */ -#define TC0_OVFINTLVL0_bp 0 /* Overflow interrupt level bit 0 position. */ -#define TC0_OVFINTLVL1_bm (1<<1) /* Overflow interrupt level bit 1 mask. */ -#define TC0_OVFINTLVL1_bp 1 /* Overflow interrupt level bit 1 position. */ - - -/* TC0.INTCTRLB bit masks and bit positions */ -#define TC0_CCDINTLVL_gm 0xC0 /* Compare or Capture D Interrupt Level group mask. */ -#define TC0_CCDINTLVL_gp 6 /* Compare or Capture D Interrupt Level group position. */ -#define TC0_CCDINTLVL0_bm (1<<6) /* Compare or Capture D Interrupt Level bit 0 mask. */ -#define TC0_CCDINTLVL0_bp 6 /* Compare or Capture D Interrupt Level bit 0 position. */ -#define TC0_CCDINTLVL1_bm (1<<7) /* Compare or Capture D Interrupt Level bit 1 mask. */ -#define TC0_CCDINTLVL1_bp 7 /* Compare or Capture D Interrupt Level bit 1 position. */ - -#define TC0_CCCINTLVL_gm 0x30 /* Compare or Capture C Interrupt Level group mask. */ -#define TC0_CCCINTLVL_gp 4 /* Compare or Capture C Interrupt Level group position. */ -#define TC0_CCCINTLVL0_bm (1<<4) /* Compare or Capture C Interrupt Level bit 0 mask. */ -#define TC0_CCCINTLVL0_bp 4 /* Compare or Capture C Interrupt Level bit 0 position. */ -#define TC0_CCCINTLVL1_bm (1<<5) /* Compare or Capture C Interrupt Level bit 1 mask. */ -#define TC0_CCCINTLVL1_bp 5 /* Compare or Capture C Interrupt Level bit 1 position. */ - -#define TC0_CCBINTLVL_gm 0x0C /* Compare or Capture B Interrupt Level group mask. */ -#define TC0_CCBINTLVL_gp 2 /* Compare or Capture B Interrupt Level group position. */ -#define TC0_CCBINTLVL0_bm (1<<2) /* Compare or Capture B Interrupt Level bit 0 mask. */ -#define TC0_CCBINTLVL0_bp 2 /* Compare or Capture B Interrupt Level bit 0 position. */ -#define TC0_CCBINTLVL1_bm (1<<3) /* Compare or Capture B Interrupt Level bit 1 mask. */ -#define TC0_CCBINTLVL1_bp 3 /* Compare or Capture B Interrupt Level bit 1 position. */ - -#define TC0_CCAINTLVL_gm 0x03 /* Compare or Capture A Interrupt Level group mask. */ -#define TC0_CCAINTLVL_gp 0 /* Compare or Capture A Interrupt Level group position. */ -#define TC0_CCAINTLVL0_bm (1<<0) /* Compare or Capture A Interrupt Level bit 0 mask. */ -#define TC0_CCAINTLVL0_bp 0 /* Compare or Capture A Interrupt Level bit 0 position. */ -#define TC0_CCAINTLVL1_bm (1<<1) /* Compare or Capture A Interrupt Level bit 1 mask. */ -#define TC0_CCAINTLVL1_bp 1 /* Compare or Capture A Interrupt Level bit 1 position. */ - - -/* TC0.CTRLFCLR bit masks and bit positions */ -#define TC0_CMD_gm 0x0C /* Command group mask. */ -#define TC0_CMD_gp 2 /* Command group position. */ -#define TC0_CMD0_bm (1<<2) /* Command bit 0 mask. */ -#define TC0_CMD0_bp 2 /* Command bit 0 position. */ -#define TC0_CMD1_bm (1<<3) /* Command bit 1 mask. */ -#define TC0_CMD1_bp 3 /* Command bit 1 position. */ - -#define TC0_LUPD_bm 0x02 /* Lock Update bit mask. */ -#define TC0_LUPD_bp 1 /* Lock Update bit position. */ - -#define TC0_DIR_bm 0x01 /* Direction bit mask. */ -#define TC0_DIR_bp 0 /* Direction bit position. */ - - -/* TC0.CTRLFSET bit masks and bit positions */ -/* TC0_CMD_gm Predefined. */ -/* TC0_CMD_gp Predefined. */ -/* TC0_CMD0_bm Predefined. */ -/* TC0_CMD0_bp Predefined. */ -/* TC0_CMD1_bm Predefined. */ -/* TC0_CMD1_bp Predefined. */ - -/* TC0_LUPD_bm Predefined. */ -/* TC0_LUPD_bp Predefined. */ - -/* TC0_DIR_bm Predefined. */ -/* TC0_DIR_bp Predefined. */ - - -/* TC0.CTRLGCLR bit masks and bit positions */ -#define TC0_CCDBV_bm 0x10 /* Compare or Capture D Buffer Valid bit mask. */ -#define TC0_CCDBV_bp 4 /* Compare or Capture D Buffer Valid bit position. */ - -#define TC0_CCCBV_bm 0x08 /* Compare or Capture C Buffer Valid bit mask. */ -#define TC0_CCCBV_bp 3 /* Compare or Capture C Buffer Valid bit position. */ - -#define TC0_CCBBV_bm 0x04 /* Compare or Capture B Buffer Valid bit mask. */ -#define TC0_CCBBV_bp 2 /* Compare or Capture B Buffer Valid bit position. */ - -#define TC0_CCABV_bm 0x02 /* Compare or Capture A Buffer Valid bit mask. */ -#define TC0_CCABV_bp 1 /* Compare or Capture A Buffer Valid bit position. */ - -#define TC0_PERBV_bm 0x01 /* Period Buffer Valid bit mask. */ -#define TC0_PERBV_bp 0 /* Period Buffer Valid bit position. */ - - -/* TC0.CTRLGSET bit masks and bit positions */ -/* TC0_CCDBV_bm Predefined. */ -/* TC0_CCDBV_bp Predefined. */ - -/* TC0_CCCBV_bm Predefined. */ -/* TC0_CCCBV_bp Predefined. */ - -/* TC0_CCBBV_bm Predefined. */ -/* TC0_CCBBV_bp Predefined. */ - -/* TC0_CCABV_bm Predefined. */ -/* TC0_CCABV_bp Predefined. */ - -/* TC0_PERBV_bm Predefined. */ -/* TC0_PERBV_bp Predefined. */ - - -/* TC0.INTFLAGS bit masks and bit positions */ -#define TC0_CCDIF_bm 0x80 /* Compare or Capture D Interrupt Flag bit mask. */ -#define TC0_CCDIF_bp 7 /* Compare or Capture D Interrupt Flag bit position. */ - -#define TC0_CCCIF_bm 0x40 /* Compare or Capture C Interrupt Flag bit mask. */ -#define TC0_CCCIF_bp 6 /* Compare or Capture C Interrupt Flag bit position. */ - -#define TC0_CCBIF_bm 0x20 /* Compare or Capture B Interrupt Flag bit mask. */ -#define TC0_CCBIF_bp 5 /* Compare or Capture B Interrupt Flag bit position. */ - -#define TC0_CCAIF_bm 0x10 /* Compare or Capture A Interrupt Flag bit mask. */ -#define TC0_CCAIF_bp 4 /* Compare or Capture A Interrupt Flag bit position. */ - -#define TC0_ERRIF_bm 0x02 /* Error Interrupt Flag bit mask. */ -#define TC0_ERRIF_bp 1 /* Error Interrupt Flag bit position. */ - -#define TC0_OVFIF_bm 0x01 /* Overflow Interrupt Flag bit mask. */ -#define TC0_OVFIF_bp 0 /* Overflow Interrupt Flag bit position. */ - - -/* TC1.CTRLA bit masks and bit positions */ -#define TC1_CLKSEL_gm 0x0F /* Clock Selection group mask. */ -#define TC1_CLKSEL_gp 0 /* Clock Selection group position. */ -#define TC1_CLKSEL0_bm (1<<0) /* Clock Selection bit 0 mask. */ -#define TC1_CLKSEL0_bp 0 /* Clock Selection bit 0 position. */ -#define TC1_CLKSEL1_bm (1<<1) /* Clock Selection bit 1 mask. */ -#define TC1_CLKSEL1_bp 1 /* Clock Selection bit 1 position. */ -#define TC1_CLKSEL2_bm (1<<2) /* Clock Selection bit 2 mask. */ -#define TC1_CLKSEL2_bp 2 /* Clock Selection bit 2 position. */ -#define TC1_CLKSEL3_bm (1<<3) /* Clock Selection bit 3 mask. */ -#define TC1_CLKSEL3_bp 3 /* Clock Selection bit 3 position. */ - - -/* TC1.CTRLB bit masks and bit positions */ -#define TC1_CCBEN_bm 0x20 /* Compare or Capture B Enable bit mask. */ -#define TC1_CCBEN_bp 5 /* Compare or Capture B Enable bit position. */ - -#define TC1_CCAEN_bm 0x10 /* Compare or Capture A Enable bit mask. */ -#define TC1_CCAEN_bp 4 /* Compare or Capture A Enable bit position. */ - -#define TC1_WGMODE_gm 0x07 /* Waveform generation mode group mask. */ -#define TC1_WGMODE_gp 0 /* Waveform generation mode group position. */ -#define TC1_WGMODE0_bm (1<<0) /* Waveform generation mode bit 0 mask. */ -#define TC1_WGMODE0_bp 0 /* Waveform generation mode bit 0 position. */ -#define TC1_WGMODE1_bm (1<<1) /* Waveform generation mode bit 1 mask. */ -#define TC1_WGMODE1_bp 1 /* Waveform generation mode bit 1 position. */ -#define TC1_WGMODE2_bm (1<<2) /* Waveform generation mode bit 2 mask. */ -#define TC1_WGMODE2_bp 2 /* Waveform generation mode bit 2 position. */ - - -/* TC1.CTRLC bit masks and bit positions */ -#define TC1_CMPB_bm 0x02 /* Compare B Output Value bit mask. */ -#define TC1_CMPB_bp 1 /* Compare B Output Value bit position. */ - -#define TC1_CMPA_bm 0x01 /* Compare A Output Value bit mask. */ -#define TC1_CMPA_bp 0 /* Compare A Output Value bit position. */ - - -/* TC1.CTRLD bit masks and bit positions */ -#define TC1_EVACT_gm 0xE0 /* Event Action group mask. */ -#define TC1_EVACT_gp 5 /* Event Action group position. */ -#define TC1_EVACT0_bm (1<<5) /* Event Action bit 0 mask. */ -#define TC1_EVACT0_bp 5 /* Event Action bit 0 position. */ -#define TC1_EVACT1_bm (1<<6) /* Event Action bit 1 mask. */ -#define TC1_EVACT1_bp 6 /* Event Action bit 1 position. */ -#define TC1_EVACT2_bm (1<<7) /* Event Action bit 2 mask. */ -#define TC1_EVACT2_bp 7 /* Event Action bit 2 position. */ - -#define TC1_EVDLY_bm 0x10 /* Event Delay bit mask. */ -#define TC1_EVDLY_bp 4 /* Event Delay bit position. */ - -#define TC1_EVSEL_gm 0x0F /* Event Source Select group mask. */ -#define TC1_EVSEL_gp 0 /* Event Source Select group position. */ -#define TC1_EVSEL0_bm (1<<0) /* Event Source Select bit 0 mask. */ -#define TC1_EVSEL0_bp 0 /* Event Source Select bit 0 position. */ -#define TC1_EVSEL1_bm (1<<1) /* Event Source Select bit 1 mask. */ -#define TC1_EVSEL1_bp 1 /* Event Source Select bit 1 position. */ -#define TC1_EVSEL2_bm (1<<2) /* Event Source Select bit 2 mask. */ -#define TC1_EVSEL2_bp 2 /* Event Source Select bit 2 position. */ -#define TC1_EVSEL3_bm (1<<3) /* Event Source Select bit 3 mask. */ -#define TC1_EVSEL3_bp 3 /* Event Source Select bit 3 position. */ - - -/* TC1.CTRLE bit masks and bit positions */ -#define TC1_DTHM_bm 0x02 /* Dead Time Hold Mode bit mask. */ -#define TC1_DTHM_bp 1 /* Dead Time Hold Mode bit position. */ - -#define TC1_BYTEM_bm 0x01 /* Byte Mode bit mask. */ -#define TC1_BYTEM_bp 0 /* Byte Mode bit position. */ - - -/* TC1.INTCTRLA bit masks and bit positions */ -#define TC1_ERRINTLVL_gm 0x0C /* Error Interrupt Level group mask. */ -#define TC1_ERRINTLVL_gp 2 /* Error Interrupt Level group position. */ -#define TC1_ERRINTLVL0_bm (1<<2) /* Error Interrupt Level bit 0 mask. */ -#define TC1_ERRINTLVL0_bp 2 /* Error Interrupt Level bit 0 position. */ -#define TC1_ERRINTLVL1_bm (1<<3) /* Error Interrupt Level bit 1 mask. */ -#define TC1_ERRINTLVL1_bp 3 /* Error Interrupt Level bit 1 position. */ - -#define TC1_OVFINTLVL_gm 0x03 /* Overflow interrupt level group mask. */ -#define TC1_OVFINTLVL_gp 0 /* Overflow interrupt level group position. */ -#define TC1_OVFINTLVL0_bm (1<<0) /* Overflow interrupt level bit 0 mask. */ -#define TC1_OVFINTLVL0_bp 0 /* Overflow interrupt level bit 0 position. */ -#define TC1_OVFINTLVL1_bm (1<<1) /* Overflow interrupt level bit 1 mask. */ -#define TC1_OVFINTLVL1_bp 1 /* Overflow interrupt level bit 1 position. */ - - -/* TC1.INTCTRLB bit masks and bit positions */ -#define TC1_CCBINTLVL_gm 0x0C /* Compare or Capture B Interrupt Level group mask. */ -#define TC1_CCBINTLVL_gp 2 /* Compare or Capture B Interrupt Level group position. */ -#define TC1_CCBINTLVL0_bm (1<<2) /* Compare or Capture B Interrupt Level bit 0 mask. */ -#define TC1_CCBINTLVL0_bp 2 /* Compare or Capture B Interrupt Level bit 0 position. */ -#define TC1_CCBINTLVL1_bm (1<<3) /* Compare or Capture B Interrupt Level bit 1 mask. */ -#define TC1_CCBINTLVL1_bp 3 /* Compare or Capture B Interrupt Level bit 1 position. */ - -#define TC1_CCAINTLVL_gm 0x03 /* Compare or Capture A Interrupt Level group mask. */ -#define TC1_CCAINTLVL_gp 0 /* Compare or Capture A Interrupt Level group position. */ -#define TC1_CCAINTLVL0_bm (1<<0) /* Compare or Capture A Interrupt Level bit 0 mask. */ -#define TC1_CCAINTLVL0_bp 0 /* Compare or Capture A Interrupt Level bit 0 position. */ -#define TC1_CCAINTLVL1_bm (1<<1) /* Compare or Capture A Interrupt Level bit 1 mask. */ -#define TC1_CCAINTLVL1_bp 1 /* Compare or Capture A Interrupt Level bit 1 position. */ - - -/* TC1.CTRLFCLR bit masks and bit positions */ -#define TC1_CMD_gm 0x0C /* Command group mask. */ -#define TC1_CMD_gp 2 /* Command group position. */ -#define TC1_CMD0_bm (1<<2) /* Command bit 0 mask. */ -#define TC1_CMD0_bp 2 /* Command bit 0 position. */ -#define TC1_CMD1_bm (1<<3) /* Command bit 1 mask. */ -#define TC1_CMD1_bp 3 /* Command bit 1 position. */ - -#define TC1_LUPD_bm 0x02 /* Lock Update bit mask. */ -#define TC1_LUPD_bp 1 /* Lock Update bit position. */ - -#define TC1_DIR_bm 0x01 /* Direction bit mask. */ -#define TC1_DIR_bp 0 /* Direction bit position. */ - - -/* TC1.CTRLFSET bit masks and bit positions */ -/* TC1_CMD_gm Predefined. */ -/* TC1_CMD_gp Predefined. */ -/* TC1_CMD0_bm Predefined. */ -/* TC1_CMD0_bp Predefined. */ -/* TC1_CMD1_bm Predefined. */ -/* TC1_CMD1_bp Predefined. */ - -/* TC1_LUPD_bm Predefined. */ -/* TC1_LUPD_bp Predefined. */ - -/* TC1_DIR_bm Predefined. */ -/* TC1_DIR_bp Predefined. */ - - -/* TC1.CTRLGCLR bit masks and bit positions */ -#define TC1_CCBBV_bm 0x04 /* Compare or Capture B Buffer Valid bit mask. */ -#define TC1_CCBBV_bp 2 /* Compare or Capture B Buffer Valid bit position. */ - -#define TC1_CCABV_bm 0x02 /* Compare or Capture A Buffer Valid bit mask. */ -#define TC1_CCABV_bp 1 /* Compare or Capture A Buffer Valid bit position. */ - -#define TC1_PERBV_bm 0x01 /* Period Buffer Valid bit mask. */ -#define TC1_PERBV_bp 0 /* Period Buffer Valid bit position. */ - - -/* TC1.CTRLGSET bit masks and bit positions */ -/* TC1_CCBBV_bm Predefined. */ -/* TC1_CCBBV_bp Predefined. */ - -/* TC1_CCABV_bm Predefined. */ -/* TC1_CCABV_bp Predefined. */ - -/* TC1_PERBV_bm Predefined. */ -/* TC1_PERBV_bp Predefined. */ - - -/* TC1.INTFLAGS bit masks and bit positions */ -#define TC1_CCBIF_bm 0x20 /* Compare or Capture B Interrupt Flag bit mask. */ -#define TC1_CCBIF_bp 5 /* Compare or Capture B Interrupt Flag bit position. */ - -#define TC1_CCAIF_bm 0x10 /* Compare or Capture A Interrupt Flag bit mask. */ -#define TC1_CCAIF_bp 4 /* Compare or Capture A Interrupt Flag bit position. */ - -#define TC1_ERRIF_bm 0x02 /* Error Interrupt Flag bit mask. */ -#define TC1_ERRIF_bp 1 /* Error Interrupt Flag bit position. */ - -#define TC1_OVFIF_bm 0x01 /* Overflow Interrupt Flag bit mask. */ -#define TC1_OVFIF_bp 0 /* Overflow Interrupt Flag bit position. */ - - -/* AWEX.CTRL bit masks and bit positions */ -#define AWEX_PGM_bm 0x20 /* Pattern Generation Mode bit mask. */ -#define AWEX_PGM_bp 5 /* Pattern Generation Mode bit position. */ - -#define AWEX_CWCM_bm 0x10 /* Common Waveform Channel Mode bit mask. */ -#define AWEX_CWCM_bp 4 /* Common Waveform Channel Mode bit position. */ - -#define AWEX_DTICCDEN_bm 0x08 /* Dead Time Insertion Compare Channel D Enable bit mask. */ -#define AWEX_DTICCDEN_bp 3 /* Dead Time Insertion Compare Channel D Enable bit position. */ - -#define AWEX_DTICCCEN_bm 0x04 /* Dead Time Insertion Compare Channel C Enable bit mask. */ -#define AWEX_DTICCCEN_bp 2 /* Dead Time Insertion Compare Channel C Enable bit position. */ - -#define AWEX_DTICCBEN_bm 0x02 /* Dead Time Insertion Compare Channel B Enable bit mask. */ -#define AWEX_DTICCBEN_bp 1 /* Dead Time Insertion Compare Channel B Enable bit position. */ - -#define AWEX_DTICCAEN_bm 0x01 /* Dead Time Insertion Compare Channel A Enable bit mask. */ -#define AWEX_DTICCAEN_bp 0 /* Dead Time Insertion Compare Channel A Enable bit position. */ - - -/* AWEX.FDCTRL bit masks and bit positions */ -#define AWEX_FDDBD_bm 0x10 /* Fault Detect on Disable Break Disable bit mask. */ -#define AWEX_FDDBD_bp 4 /* Fault Detect on Disable Break Disable bit position. */ - -#define AWEX_FDMODE_bm 0x04 /* Fault Detect Mode bit mask. */ -#define AWEX_FDMODE_bp 2 /* Fault Detect Mode bit position. */ - -#define AWEX_FDACT_gm 0x03 /* Fault Detect Action group mask. */ -#define AWEX_FDACT_gp 0 /* Fault Detect Action group position. */ -#define AWEX_FDACT0_bm (1<<0) /* Fault Detect Action bit 0 mask. */ -#define AWEX_FDACT0_bp 0 /* Fault Detect Action bit 0 position. */ -#define AWEX_FDACT1_bm (1<<1) /* Fault Detect Action bit 1 mask. */ -#define AWEX_FDACT1_bp 1 /* Fault Detect Action bit 1 position. */ - - -/* AWEX.STATUS bit masks and bit positions */ -#define AWEX_FDF_bm 0x04 /* Fault Detect Flag bit mask. */ -#define AWEX_FDF_bp 2 /* Fault Detect Flag bit position. */ - -#define AWEX_DTHSBUFV_bm 0x02 /* Dead Time High Side Buffer Valid bit mask. */ -#define AWEX_DTHSBUFV_bp 1 /* Dead Time High Side Buffer Valid bit position. */ - -#define AWEX_DTLSBUFV_bm 0x01 /* Dead Time Low Side Buffer Valid bit mask. */ -#define AWEX_DTLSBUFV_bp 0 /* Dead Time Low Side Buffer Valid bit position. */ - - -/* HIRES.CTRL bit masks and bit positions */ -#define HIRES_HREN_gm 0x03 /* High Resolution Enable group mask. */ -#define HIRES_HREN_gp 0 /* High Resolution Enable group position. */ -#define HIRES_HREN0_bm (1<<0) /* High Resolution Enable bit 0 mask. */ -#define HIRES_HREN0_bp 0 /* High Resolution Enable bit 0 position. */ -#define HIRES_HREN1_bm (1<<1) /* High Resolution Enable bit 1 mask. */ -#define HIRES_HREN1_bp 1 /* High Resolution Enable bit 1 position. */ - - -/* USART - Universal Asynchronous Receiver-Transmitter */ -/* USART.STATUS bit masks and bit positions */ -#define USART_RXCIF_bm 0x80 /* Receive Interrupt Flag bit mask. */ -#define USART_RXCIF_bp 7 /* Receive Interrupt Flag bit position. */ - -#define USART_TXCIF_bm 0x40 /* Transmit Interrupt Flag bit mask. */ -#define USART_TXCIF_bp 6 /* Transmit Interrupt Flag bit position. */ - -#define USART_DREIF_bm 0x20 /* Data Register Empty Flag bit mask. */ -#define USART_DREIF_bp 5 /* Data Register Empty Flag bit position. */ - -#define USART_FERR_bm 0x10 /* Frame Error bit mask. */ -#define USART_FERR_bp 4 /* Frame Error bit position. */ - -#define USART_BUFOVF_bm 0x08 /* Buffer Overflow bit mask. */ -#define USART_BUFOVF_bp 3 /* Buffer Overflow bit position. */ - -#define USART_PERR_bm 0x04 /* Parity Error bit mask. */ -#define USART_PERR_bp 2 /* Parity Error bit position. */ - -#define USART_RXB8_bm 0x01 /* Receive Bit 8 bit mask. */ -#define USART_RXB8_bp 0 /* Receive Bit 8 bit position. */ - - -/* USART.CTRLA bit masks and bit positions */ -#define USART_RXCINTLVL_gm 0x30 /* Receive Interrupt Level group mask. */ -#define USART_RXCINTLVL_gp 4 /* Receive Interrupt Level group position. */ -#define USART_RXCINTLVL0_bm (1<<4) /* Receive Interrupt Level bit 0 mask. */ -#define USART_RXCINTLVL0_bp 4 /* Receive Interrupt Level bit 0 position. */ -#define USART_RXCINTLVL1_bm (1<<5) /* Receive Interrupt Level bit 1 mask. */ -#define USART_RXCINTLVL1_bp 5 /* Receive Interrupt Level bit 1 position. */ - -#define USART_TXCINTLVL_gm 0x0C /* Transmit Interrupt Level group mask. */ -#define USART_TXCINTLVL_gp 2 /* Transmit Interrupt Level group position. */ -#define USART_TXCINTLVL0_bm (1<<2) /* Transmit Interrupt Level bit 0 mask. */ -#define USART_TXCINTLVL0_bp 2 /* Transmit Interrupt Level bit 0 position. */ -#define USART_TXCINTLVL1_bm (1<<3) /* Transmit Interrupt Level bit 1 mask. */ -#define USART_TXCINTLVL1_bp 3 /* Transmit Interrupt Level bit 1 position. */ - -#define USART_DREINTLVL_gm 0x03 /* Data Register Empty Interrupt Level group mask. */ -#define USART_DREINTLVL_gp 0 /* Data Register Empty Interrupt Level group position. */ -#define USART_DREINTLVL0_bm (1<<0) /* Data Register Empty Interrupt Level bit 0 mask. */ -#define USART_DREINTLVL0_bp 0 /* Data Register Empty Interrupt Level bit 0 position. */ -#define USART_DREINTLVL1_bm (1<<1) /* Data Register Empty Interrupt Level bit 1 mask. */ -#define USART_DREINTLVL1_bp 1 /* Data Register Empty Interrupt Level bit 1 position. */ - - -/* USART.CTRLB bit masks and bit positions */ -#define USART_RXEN_bm 0x10 /* Receiver Enable bit mask. */ -#define USART_RXEN_bp 4 /* Receiver Enable bit position. */ - -#define USART_TXEN_bm 0x08 /* Transmitter Enable bit mask. */ -#define USART_TXEN_bp 3 /* Transmitter Enable bit position. */ - -#define USART_CLK2X_bm 0x04 /* Double transmission speed bit mask. */ -#define USART_CLK2X_bp 2 /* Double transmission speed bit position. */ - -#define USART_MPCM_bm 0x02 /* Multi-processor Communication Mode bit mask. */ -#define USART_MPCM_bp 1 /* Multi-processor Communication Mode bit position. */ - -#define USART_TXB8_bm 0x01 /* Transmit bit 8 bit mask. */ -#define USART_TXB8_bp 0 /* Transmit bit 8 bit position. */ - - -/* USART.CTRLC bit masks and bit positions */ -#define USART_CMODE_gm 0xC0 /* Communication Mode group mask. */ -#define USART_CMODE_gp 6 /* Communication Mode group position. */ -#define USART_CMODE0_bm (1<<6) /* Communication Mode bit 0 mask. */ -#define USART_CMODE0_bp 6 /* Communication Mode bit 0 position. */ -#define USART_CMODE1_bm (1<<7) /* Communication Mode bit 1 mask. */ -#define USART_CMODE1_bp 7 /* Communication Mode bit 1 position. */ - -#define USART_PMODE_gm 0x30 /* Parity Mode group mask. */ -#define USART_PMODE_gp 4 /* Parity Mode group position. */ -#define USART_PMODE0_bm (1<<4) /* Parity Mode bit 0 mask. */ -#define USART_PMODE0_bp 4 /* Parity Mode bit 0 position. */ -#define USART_PMODE1_bm (1<<5) /* Parity Mode bit 1 mask. */ -#define USART_PMODE1_bp 5 /* Parity Mode bit 1 position. */ - -#define USART_SBMODE_bm 0x08 /* Stop Bit Mode bit mask. */ -#define USART_SBMODE_bp 3 /* Stop Bit Mode bit position. */ - -#define USART_CHSIZE_gm 0x07 /* Character Size group mask. */ -#define USART_CHSIZE_gp 0 /* Character Size group position. */ -#define USART_CHSIZE0_bm (1<<0) /* Character Size bit 0 mask. */ -#define USART_CHSIZE0_bp 0 /* Character Size bit 0 position. */ -#define USART_CHSIZE1_bm (1<<1) /* Character Size bit 1 mask. */ -#define USART_CHSIZE1_bp 1 /* Character Size bit 1 position. */ -#define USART_CHSIZE2_bm (1<<2) /* Character Size bit 2 mask. */ -#define USART_CHSIZE2_bp 2 /* Character Size bit 2 position. */ - - -/* USART.BAUDCTRLA bit masks and bit positions */ -#define USART_BSEL_gm 0xFF /* Baud Rate Selection Bits [7:0] group mask. */ -#define USART_BSEL_gp 0 /* Baud Rate Selection Bits [7:0] group position. */ -#define USART_BSEL0_bm (1<<0) /* Baud Rate Selection Bits [7:0] bit 0 mask. */ -#define USART_BSEL0_bp 0 /* Baud Rate Selection Bits [7:0] bit 0 position. */ -#define USART_BSEL1_bm (1<<1) /* Baud Rate Selection Bits [7:0] bit 1 mask. */ -#define USART_BSEL1_bp 1 /* Baud Rate Selection Bits [7:0] bit 1 position. */ -#define USART_BSEL2_bm (1<<2) /* Baud Rate Selection Bits [7:0] bit 2 mask. */ -#define USART_BSEL2_bp 2 /* Baud Rate Selection Bits [7:0] bit 2 position. */ -#define USART_BSEL3_bm (1<<3) /* Baud Rate Selection Bits [7:0] bit 3 mask. */ -#define USART_BSEL3_bp 3 /* Baud Rate Selection Bits [7:0] bit 3 position. */ -#define USART_BSEL4_bm (1<<4) /* Baud Rate Selection Bits [7:0] bit 4 mask. */ -#define USART_BSEL4_bp 4 /* Baud Rate Selection Bits [7:0] bit 4 position. */ -#define USART_BSEL5_bm (1<<5) /* Baud Rate Selection Bits [7:0] bit 5 mask. */ -#define USART_BSEL5_bp 5 /* Baud Rate Selection Bits [7:0] bit 5 position. */ -#define USART_BSEL6_bm (1<<6) /* Baud Rate Selection Bits [7:0] bit 6 mask. */ -#define USART_BSEL6_bp 6 /* Baud Rate Selection Bits [7:0] bit 6 position. */ -#define USART_BSEL7_bm (1<<7) /* Baud Rate Selection Bits [7:0] bit 7 mask. */ -#define USART_BSEL7_bp 7 /* Baud Rate Selection Bits [7:0] bit 7 position. */ - - -/* USART.BAUDCTRLB bit masks and bit positions */ -#define USART_BSCALE_gm 0xF0 /* Baud Rate Scale group mask. */ -#define USART_BSCALE_gp 4 /* Baud Rate Scale group position. */ -#define USART_BSCALE0_bm (1<<4) /* Baud Rate Scale bit 0 mask. */ -#define USART_BSCALE0_bp 4 /* Baud Rate Scale bit 0 position. */ -#define USART_BSCALE1_bm (1<<5) /* Baud Rate Scale bit 1 mask. */ -#define USART_BSCALE1_bp 5 /* Baud Rate Scale bit 1 position. */ -#define USART_BSCALE2_bm (1<<6) /* Baud Rate Scale bit 2 mask. */ -#define USART_BSCALE2_bp 6 /* Baud Rate Scale bit 2 position. */ -#define USART_BSCALE3_bm (1<<7) /* Baud Rate Scale bit 3 mask. */ -#define USART_BSCALE3_bp 7 /* Baud Rate Scale bit 3 position. */ - -/* USART_BSEL_gm Predefined. */ -/* USART_BSEL_gp Predefined. */ -/* USART_BSEL0_bm Predefined. */ -/* USART_BSEL0_bp Predefined. */ -/* USART_BSEL1_bm Predefined. */ -/* USART_BSEL1_bp Predefined. */ -/* USART_BSEL2_bm Predefined. */ -/* USART_BSEL2_bp Predefined. */ -/* USART_BSEL3_bm Predefined. */ -/* USART_BSEL3_bp Predefined. */ - - -/* SPI - Serial Peripheral Interface */ -/* SPI.CTRL bit masks and bit positions */ -#define SPI_CLK2X_bm 0x80 /* Enable Double Speed bit mask. */ -#define SPI_CLK2X_bp 7 /* Enable Double Speed bit position. */ - -#define SPI_ENABLE_bm 0x40 /* Enable Module bit mask. */ -#define SPI_ENABLE_bp 6 /* Enable Module bit position. */ - -#define SPI_DORD_bm 0x20 /* Data Order Setting bit mask. */ -#define SPI_DORD_bp 5 /* Data Order Setting bit position. */ - -#define SPI_MASTER_bm 0x10 /* Master Operation Enable bit mask. */ -#define SPI_MASTER_bp 4 /* Master Operation Enable bit position. */ - -#define SPI_MODE_gm 0x0C /* SPI Mode group mask. */ -#define SPI_MODE_gp 2 /* SPI Mode group position. */ -#define SPI_MODE0_bm (1<<2) /* SPI Mode bit 0 mask. */ -#define SPI_MODE0_bp 2 /* SPI Mode bit 0 position. */ -#define SPI_MODE1_bm (1<<3) /* SPI Mode bit 1 mask. */ -#define SPI_MODE1_bp 3 /* SPI Mode bit 1 position. */ - -#define SPI_PRESCALER_gm 0x03 /* Prescaler group mask. */ -#define SPI_PRESCALER_gp 0 /* Prescaler group position. */ -#define SPI_PRESCALER0_bm (1<<0) /* Prescaler bit 0 mask. */ -#define SPI_PRESCALER0_bp 0 /* Prescaler bit 0 position. */ -#define SPI_PRESCALER1_bm (1<<1) /* Prescaler bit 1 mask. */ -#define SPI_PRESCALER1_bp 1 /* Prescaler bit 1 position. */ - - -/* SPI.INTCTRL bit masks and bit positions */ -#define SPI_INTLVL_gm 0x03 /* Interrupt level group mask. */ -#define SPI_INTLVL_gp 0 /* Interrupt level group position. */ -#define SPI_INTLVL0_bm (1<<0) /* Interrupt level bit 0 mask. */ -#define SPI_INTLVL0_bp 0 /* Interrupt level bit 0 position. */ -#define SPI_INTLVL1_bm (1<<1) /* Interrupt level bit 1 mask. */ -#define SPI_INTLVL1_bp 1 /* Interrupt level bit 1 position. */ - - -/* SPI.STATUS bit masks and bit positions */ -#define SPI_IF_bm 0x80 /* Interrupt Flag bit mask. */ -#define SPI_IF_bp 7 /* Interrupt Flag bit position. */ - -#define SPI_WRCOL_bm 0x40 /* Write Collision bit mask. */ -#define SPI_WRCOL_bp 6 /* Write Collision bit position. */ - - -/* IRCOM - IR Communication Module */ -/* IRCOM.CTRL bit masks and bit positions */ -#define IRCOM_EVSEL_gm 0x0F /* Event Channel Select group mask. */ -#define IRCOM_EVSEL_gp 0 /* Event Channel Select group position. */ -#define IRCOM_EVSEL0_bm (1<<0) /* Event Channel Select bit 0 mask. */ -#define IRCOM_EVSEL0_bp 0 /* Event Channel Select bit 0 position. */ -#define IRCOM_EVSEL1_bm (1<<1) /* Event Channel Select bit 1 mask. */ -#define IRCOM_EVSEL1_bp 1 /* Event Channel Select bit 1 position. */ -#define IRCOM_EVSEL2_bm (1<<2) /* Event Channel Select bit 2 mask. */ -#define IRCOM_EVSEL2_bp 2 /* Event Channel Select bit 2 position. */ -#define IRCOM_EVSEL3_bm (1<<3) /* Event Channel Select bit 3 mask. */ -#define IRCOM_EVSEL3_bp 3 /* Event Channel Select bit 3 position. */ - - -/* AES - AES Module */ -/* AES.CTRL bit masks and bit positions */ -#define AES_START_bm 0x80 /* Start/Run bit mask. */ -#define AES_START_bp 7 /* Start/Run bit position. */ - -#define AES_AUTO_bm 0x40 /* Auto Start Trigger bit mask. */ -#define AES_AUTO_bp 6 /* Auto Start Trigger bit position. */ - -#define AES_RESET_bm 0x20 /* AES Software Reset bit mask. */ -#define AES_RESET_bp 5 /* AES Software Reset bit position. */ - -#define AES_DECRYPT_bm 0x10 /* Decryption / Direction bit mask. */ -#define AES_DECRYPT_bp 4 /* Decryption / Direction bit position. */ - -#define AES_XOR_bm 0x04 /* State XOR Load Enable bit mask. */ -#define AES_XOR_bp 2 /* State XOR Load Enable bit position. */ - - -/* AES.STATUS bit masks and bit positions */ -#define AES_ERROR_bm 0x80 /* AES Error bit mask. */ -#define AES_ERROR_bp 7 /* AES Error bit position. */ - -#define AES_SRIF_bm 0x01 /* State Ready Interrupt Flag bit mask. */ -#define AES_SRIF_bp 0 /* State Ready Interrupt Flag bit position. */ - - -/* AES.INTCTRL bit masks and bit positions */ -#define AES_INTLVL_gm 0x03 /* Interrupt level group mask. */ -#define AES_INTLVL_gp 0 /* Interrupt level group position. */ -#define AES_INTLVL0_bm (1<<0) /* Interrupt level bit 0 mask. */ -#define AES_INTLVL0_bp 0 /* Interrupt level bit 0 position. */ -#define AES_INTLVL1_bm (1<<1) /* Interrupt level bit 1 mask. */ -#define AES_INTLVL1_bp 1 /* Interrupt level bit 1 position. */ - - - -// Generic Port Pins - -#define PIN0_bm 0x01 -#define PIN0_bp 0 -#define PIN1_bm 0x02 -#define PIN1_bp 1 -#define PIN2_bm 0x04 -#define PIN2_bp 2 -#define PIN3_bm 0x08 -#define PIN3_bp 3 -#define PIN4_bm 0x10 -#define PIN4_bp 4 -#define PIN5_bm 0x20 -#define PIN5_bp 5 -#define PIN6_bm 0x40 -#define PIN6_bp 6 -#define PIN7_bm 0x80 -#define PIN7_bp 7 - - -/* ========== Interrupt Vector Definitions ========== */ -/* Vector 0 is the reset vector */ - -/* OSC interrupt vectors */ -#define OSC_XOSCF_vect_num 1 -#define OSC_XOSCF_vect _VECTOR(1) /* External Oscillator Failure Interrupt (NMI) */ - -/* PORTC interrupt vectors */ -#define PORTC_INT0_vect_num 2 -#define PORTC_INT0_vect _VECTOR(2) /* External Interrupt 0 */ -#define PORTC_INT1_vect_num 3 -#define PORTC_INT1_vect _VECTOR(3) /* External Interrupt 1 */ - -/* PORTR interrupt vectors */ -#define PORTR_INT0_vect_num 4 -#define PORTR_INT0_vect _VECTOR(4) /* External Interrupt 0 */ -#define PORTR_INT1_vect_num 5 -#define PORTR_INT1_vect _VECTOR(5) /* External Interrupt 1 */ - -/* DMA interrupt vectors */ -#define DMA_CH0_vect_num 6 -#define DMA_CH0_vect _VECTOR(6) /* Channel 0 Interrupt */ -#define DMA_CH1_vect_num 7 -#define DMA_CH1_vect _VECTOR(7) /* Channel 1 Interrupt */ -#define DMA_CH2_vect_num 8 -#define DMA_CH2_vect _VECTOR(8) /* Channel 2 Interrupt */ -#define DMA_CH3_vect_num 9 -#define DMA_CH3_vect _VECTOR(9) /* Channel 3 Interrupt */ - -/* RTC interrupt vectors */ -#define RTC_OVF_vect_num 10 -#define RTC_OVF_vect _VECTOR(10) /* Overflow Interrupt */ -#define RTC_COMP_vect_num 11 -#define RTC_COMP_vect _VECTOR(11) /* Compare Interrupt */ - -/* TWIC interrupt vectors */ -#define TWIC_TWIS_vect_num 12 -#define TWIC_TWIS_vect _VECTOR(12) /* TWI Slave Interrupt */ -#define TWIC_TWIM_vect_num 13 -#define TWIC_TWIM_vect _VECTOR(13) /* TWI Master Interrupt */ - -/* TCC0 interrupt vectors */ -#define TCC0_OVF_vect_num 14 -#define TCC0_OVF_vect _VECTOR(14) /* Overflow Interrupt */ -#define TCC0_ERR_vect_num 15 -#define TCC0_ERR_vect _VECTOR(15) /* Error Interrupt */ -#define TCC0_CCA_vect_num 16 -#define TCC0_CCA_vect _VECTOR(16) /* Compare or Capture A Interrupt */ -#define TCC0_CCB_vect_num 17 -#define TCC0_CCB_vect _VECTOR(17) /* Compare or Capture B Interrupt */ -#define TCC0_CCC_vect_num 18 -#define TCC0_CCC_vect _VECTOR(18) /* Compare or Capture C Interrupt */ -#define TCC0_CCD_vect_num 19 -#define TCC0_CCD_vect _VECTOR(19) /* Compare or Capture D Interrupt */ - -/* TCC1 interrupt vectors */ -#define TCC1_OVF_vect_num 20 -#define TCC1_OVF_vect _VECTOR(20) /* Overflow Interrupt */ -#define TCC1_ERR_vect_num 21 -#define TCC1_ERR_vect _VECTOR(21) /* Error Interrupt */ -#define TCC1_CCA_vect_num 22 -#define TCC1_CCA_vect _VECTOR(22) /* Compare or Capture A Interrupt */ -#define TCC1_CCB_vect_num 23 -#define TCC1_CCB_vect _VECTOR(23) /* Compare or Capture B Interrupt */ - -/* SPIC interrupt vectors */ -#define SPIC_INT_vect_num 24 -#define SPIC_INT_vect _VECTOR(24) /* SPI Interrupt */ - -/* USARTC0 interrupt vectors */ -#define USARTC0_RXC_vect_num 25 -#define USARTC0_RXC_vect _VECTOR(25) /* Reception Complete Interrupt */ -#define USARTC0_DRE_vect_num 26 -#define USARTC0_DRE_vect _VECTOR(26) /* Data Register Empty Interrupt */ -#define USARTC0_TXC_vect_num 27 -#define USARTC0_TXC_vect _VECTOR(27) /* Transmission Complete Interrupt */ - -/* USARTC1 interrupt vectors */ -#define USARTC1_RXC_vect_num 28 -#define USARTC1_RXC_vect _VECTOR(28) /* Reception Complete Interrupt */ -#define USARTC1_DRE_vect_num 29 -#define USARTC1_DRE_vect _VECTOR(29) /* Data Register Empty Interrupt */ -#define USARTC1_TXC_vect_num 30 -#define USARTC1_TXC_vect _VECTOR(30) /* Transmission Complete Interrupt */ - -/* AES interrupt vectors */ -#define AES_INT_vect_num 31 -#define AES_INT_vect _VECTOR(31) /* AES Interrupt */ - -/* NVM interrupt vectors */ -#define NVM_EE_vect_num 32 -#define NVM_EE_vect _VECTOR(32) /* EE Interrupt */ -#define NVM_SPM_vect_num 33 -#define NVM_SPM_vect _VECTOR(33) /* SPM Interrupt */ - -/* PORTB interrupt vectors */ -#define PORTB_INT0_vect_num 34 -#define PORTB_INT0_vect _VECTOR(34) /* External Interrupt 0 */ -#define PORTB_INT1_vect_num 35 -#define PORTB_INT1_vect _VECTOR(35) /* External Interrupt 1 */ - -/* ACB interrupt vectors */ -#define ACB_AC0_vect_num 36 -#define ACB_AC0_vect _VECTOR(36) /* AC0 Interrupt */ -#define ACB_AC1_vect_num 37 -#define ACB_AC1_vect _VECTOR(37) /* AC1 Interrupt */ -#define ACB_ACW_vect_num 38 -#define ACB_ACW_vect _VECTOR(38) /* ACW Window Mode Interrupt */ - -/* ADCB interrupt vectors */ -#define ADCB_CH0_vect_num 39 -#define ADCB_CH0_vect _VECTOR(39) /* Interrupt 0 */ -#define ADCB_CH1_vect_num 40 -#define ADCB_CH1_vect _VECTOR(40) /* Interrupt 1 */ -#define ADCB_CH2_vect_num 41 -#define ADCB_CH2_vect _VECTOR(41) /* Interrupt 2 */ -#define ADCB_CH3_vect_num 42 -#define ADCB_CH3_vect _VECTOR(42) /* Interrupt 3 */ - -/* PORTE interrupt vectors */ -#define PORTE_INT0_vect_num 43 -#define PORTE_INT0_vect _VECTOR(43) /* External Interrupt 0 */ -#define PORTE_INT1_vect_num 44 -#define PORTE_INT1_vect _VECTOR(44) /* External Interrupt 1 */ - -/* TWIE interrupt vectors */ -#define TWIE_TWIS_vect_num 45 -#define TWIE_TWIS_vect _VECTOR(45) /* TWI Slave Interrupt */ -#define TWIE_TWIM_vect_num 46 -#define TWIE_TWIM_vect _VECTOR(46) /* TWI Master Interrupt */ - -/* TCE0 interrupt vectors */ -#define TCE0_OVF_vect_num 47 -#define TCE0_OVF_vect _VECTOR(47) /* Overflow Interrupt */ -#define TCE0_ERR_vect_num 48 -#define TCE0_ERR_vect _VECTOR(48) /* Error Interrupt */ -#define TCE0_CCA_vect_num 49 -#define TCE0_CCA_vect _VECTOR(49) /* Compare or Capture A Interrupt */ -#define TCE0_CCB_vect_num 50 -#define TCE0_CCB_vect _VECTOR(50) /* Compare or Capture B Interrupt */ -#define TCE0_CCC_vect_num 51 -#define TCE0_CCC_vect _VECTOR(51) /* Compare or Capture C Interrupt */ -#define TCE0_CCD_vect_num 52 -#define TCE0_CCD_vect _VECTOR(52) /* Compare or Capture D Interrupt */ - -/* TCE1 interrupt vectors */ -#define TCE1_OVF_vect_num 53 -#define TCE1_OVF_vect _VECTOR(53) /* Overflow Interrupt */ -#define TCE1_ERR_vect_num 54 -#define TCE1_ERR_vect _VECTOR(54) /* Error Interrupt */ -#define TCE1_CCA_vect_num 55 -#define TCE1_CCA_vect _VECTOR(55) /* Compare or Capture A Interrupt */ -#define TCE1_CCB_vect_num 56 -#define TCE1_CCB_vect _VECTOR(56) /* Compare or Capture B Interrupt */ - -/* SPIE interrupt vectors */ -#define SPIE_INT_vect_num 57 -#define SPIE_INT_vect _VECTOR(57) /* SPI Interrupt */ - -/* USARTE0 interrupt vectors */ -#define USARTE0_RXC_vect_num 58 -#define USARTE0_RXC_vect _VECTOR(58) /* Reception Complete Interrupt */ -#define USARTE0_DRE_vect_num 59 -#define USARTE0_DRE_vect _VECTOR(59) /* Data Register Empty Interrupt */ -#define USARTE0_TXC_vect_num 60 -#define USARTE0_TXC_vect _VECTOR(60) /* Transmission Complete Interrupt */ - -/* USARTE1 interrupt vectors */ -#define USARTE1_RXC_vect_num 61 -#define USARTE1_RXC_vect _VECTOR(61) /* Reception Complete Interrupt */ -#define USARTE1_DRE_vect_num 62 -#define USARTE1_DRE_vect _VECTOR(62) /* Data Register Empty Interrupt */ -#define USARTE1_TXC_vect_num 63 -#define USARTE1_TXC_vect _VECTOR(63) /* Transmission Complete Interrupt */ - -/* PORTD interrupt vectors */ -#define PORTD_INT0_vect_num 64 -#define PORTD_INT0_vect _VECTOR(64) /* External Interrupt 0 */ -#define PORTD_INT1_vect_num 65 -#define PORTD_INT1_vect _VECTOR(65) /* External Interrupt 1 */ - -/* PORTA interrupt vectors */ -#define PORTA_INT0_vect_num 66 -#define PORTA_INT0_vect _VECTOR(66) /* External Interrupt 0 */ -#define PORTA_INT1_vect_num 67 -#define PORTA_INT1_vect _VECTOR(67) /* External Interrupt 1 */ - -/* ACA interrupt vectors */ -#define ACA_AC0_vect_num 68 -#define ACA_AC0_vect _VECTOR(68) /* AC0 Interrupt */ -#define ACA_AC1_vect_num 69 -#define ACA_AC1_vect _VECTOR(69) /* AC1 Interrupt */ -#define ACA_ACW_vect_num 70 -#define ACA_ACW_vect _VECTOR(70) /* ACW Window Mode Interrupt */ - -/* ADCA interrupt vectors */ -#define ADCA_CH0_vect_num 71 -#define ADCA_CH0_vect _VECTOR(71) /* Interrupt 0 */ -#define ADCA_CH1_vect_num 72 -#define ADCA_CH1_vect _VECTOR(72) /* Interrupt 1 */ -#define ADCA_CH2_vect_num 73 -#define ADCA_CH2_vect _VECTOR(73) /* Interrupt 2 */ -#define ADCA_CH3_vect_num 74 -#define ADCA_CH3_vect _VECTOR(74) /* Interrupt 3 */ - -/* TCD0 interrupt vectors */ -#define TCD0_OVF_vect_num 77 -#define TCD0_OVF_vect _VECTOR(77) /* Overflow Interrupt */ -#define TCD0_ERR_vect_num 78 -#define TCD0_ERR_vect _VECTOR(78) /* Error Interrupt */ -#define TCD0_CCA_vect_num 79 -#define TCD0_CCA_vect _VECTOR(79) /* Compare or Capture A Interrupt */ -#define TCD0_CCB_vect_num 80 -#define TCD0_CCB_vect _VECTOR(80) /* Compare or Capture B Interrupt */ -#define TCD0_CCC_vect_num 81 -#define TCD0_CCC_vect _VECTOR(81) /* Compare or Capture C Interrupt */ -#define TCD0_CCD_vect_num 82 -#define TCD0_CCD_vect _VECTOR(82) /* Compare or Capture D Interrupt */ - -/* TCD1 interrupt vectors */ -#define TCD1_OVF_vect_num 83 -#define TCD1_OVF_vect _VECTOR(83) /* Overflow Interrupt */ -#define TCD1_ERR_vect_num 84 -#define TCD1_ERR_vect _VECTOR(84) /* Error Interrupt */ -#define TCD1_CCA_vect_num 85 -#define TCD1_CCA_vect _VECTOR(85) /* Compare or Capture A Interrupt */ -#define TCD1_CCB_vect_num 86 -#define TCD1_CCB_vect _VECTOR(86) /* Compare or Capture B Interrupt */ - -/* SPID interrupt vectors */ -#define SPID_INT_vect_num 87 -#define SPID_INT_vect _VECTOR(87) /* SPI Interrupt */ - -/* USARTD0 interrupt vectors */ -#define USARTD0_RXC_vect_num 88 -#define USARTD0_RXC_vect _VECTOR(88) /* Reception Complete Interrupt */ -#define USARTD0_DRE_vect_num 89 -#define USARTD0_DRE_vect _VECTOR(89) /* Data Register Empty Interrupt */ -#define USARTD0_TXC_vect_num 90 -#define USARTD0_TXC_vect _VECTOR(90) /* Transmission Complete Interrupt */ - -/* USARTD1 interrupt vectors */ -#define USARTD1_RXC_vect_num 91 -#define USARTD1_RXC_vect _VECTOR(91) /* Reception Complete Interrupt */ -#define USARTD1_DRE_vect_num 92 -#define USARTD1_DRE_vect _VECTOR(92) /* Data Register Empty Interrupt */ -#define USARTD1_TXC_vect_num 93 -#define USARTD1_TXC_vect _VECTOR(93) /* Transmission Complete Interrupt */ - -/* PORTF interrupt vectors */ -#define PORTF_INT0_vect_num 104 -#define PORTF_INT0_vect _VECTOR(104) /* External Interrupt 0 */ -#define PORTF_INT1_vect_num 105 -#define PORTF_INT1_vect _VECTOR(105) /* External Interrupt 1 */ - -/* TCF0 interrupt vectors */ -#define TCF0_OVF_vect_num 108 -#define TCF0_OVF_vect _VECTOR(108) /* Overflow Interrupt */ -#define TCF0_ERR_vect_num 109 -#define TCF0_ERR_vect _VECTOR(109) /* Error Interrupt */ -#define TCF0_CCA_vect_num 110 -#define TCF0_CCA_vect _VECTOR(110) /* Compare or Capture A Interrupt */ -#define TCF0_CCB_vect_num 111 -#define TCF0_CCB_vect _VECTOR(111) /* Compare or Capture B Interrupt */ -#define TCF0_CCC_vect_num 112 -#define TCF0_CCC_vect _VECTOR(112) /* Compare or Capture C Interrupt */ -#define TCF0_CCD_vect_num 113 -#define TCF0_CCD_vect _VECTOR(113) /* Compare or Capture D Interrupt */ - -/* USARTF0 interrupt vectors */ -#define USARTF0_RXC_vect_num 119 -#define USARTF0_RXC_vect _VECTOR(119) /* Reception Complete Interrupt */ -#define USARTF0_DRE_vect_num 120 -#define USARTF0_DRE_vect _VECTOR(120) /* Data Register Empty Interrupt */ -#define USARTF0_TXC_vect_num 121 -#define USARTF0_TXC_vect _VECTOR(121) /* Transmission Complete Interrupt */ - - -#define _VECTOR_SIZE 4 /* Size of individual vector. */ -#define _VECTORS_SIZE (122 * _VECTOR_SIZE) - - -/* ========== Constants ========== */ - -#define PROGMEM_START (0x0000) -#define PROGMEM_SIZE (270336) -#define PROGMEM_END (PROGMEM_START + PROGMEM_SIZE - 1) - -#define APP_SECTION_START (0x0000) -#define APP_SECTION_SIZE (262144) -#define APP_SECTION_END (APP_SECTION_START + APP_SECTION_SIZE - 1) - -#define APPTABLE_SECTION_START (0x3E000) -#define APPTABLE_SECTION_SIZE (8192) -#define APPTABLE_SECTION_END (APPTABLE_SECTION_START + APPTABLE_SECTION_SIZE - 1) - -#define BOOT_SECTION_START (0x40000) -#define BOOT_SECTION_SIZE (8192) -#define BOOT_SECTION_END (BOOT_SECTION_START + BOOT_SECTION_SIZE - 1) - -#define DATAMEM_START (0x0000) -#define DATAMEM_SIZE (24576) -#define DATAMEM_END (DATAMEM_START + DATAMEM_SIZE - 1) - -#define IO_START (0x0000) -#define IO_SIZE (4096) -#define IO_END (IO_START + IO_SIZE - 1) - -#define MAPPED_EEPROM_START (0x1000) -#define MAPPED_EEPROM_SIZE (4096) -#define MAPPED_EEPROM_END (MAPPED_EEPROM_START + MAPPED_EEPROM_SIZE - 1) - -#define INTERNAL_SRAM_START (0x2000) -#define INTERNAL_SRAM_SIZE (16384) -#define INTERNAL_SRAM_END (INTERNAL_SRAM_START + INTERNAL_SRAM_SIZE - 1) - -#define EEPROM_START (0x0000) -#define EEPROM_SIZE (4096) -#define EEPROM_END (EEPROM_START + EEPROM_SIZE - 1) - -#define FUSE_START (0x0000) -#define FUSE_SIZE (6) -#define FUSE_END (FUSE_START + FUSE_SIZE - 1) - -#define LOCKBIT_START (0x0000) -#define LOCKBIT_SIZE (1) -#define LOCKBIT_END (LOCKBIT_START + LOCKBIT_SIZE - 1) - -#define SIGNATURES_START (0x0000) -#define SIGNATURES_SIZE (3) -#define SIGNATURES_END (SIGNATURES_START + SIGNATURES_SIZE - 1) - -#define USER_SIGNATURES_START (0x0000) -#define USER_SIGNATURES_SIZE (512) -#define USER_SIGNATURES_END (USER_SIGNATURES_START + USER_SIGNATURES_SIZE - 1) - -#define PROD_SIGNATURES_START (0x0000) -#define PROD_SIGNATURES_SIZE (52) -#define PROD_SIGNATURES_END (PROD_SIGNATURES_START + PROD_SIGNATURES_SIZE - 1) - -#define FLASHEND PROGMEM_END -#define SPM_PAGESIZE PROGMEM_PAGE_SIZE -#define RAMSTART INTERNAL_SRAM_START -#define RAMSIZE INTERNAL_SRAM_SIZE -#define RAMEND INTERNAL_SRAM_END -#define XRAMSTART EXTERNAL_SRAM_START -#define XRAMSIZE EXTERNAL_SRAM_SIZE -#define XRAMEND INTERNAL_SRAM_END -#define E2END EEPROM_END -#define E2PAGESIZE EEPROM_PAGE_SIZE - - -/* ========== Fuses ========== */ -#define FUSE_MEMORY_SIZE 6 - -/* Fuse Byte 0 */ -#define FUSE_JTAGUSERID0 ~_BV(0) /* JTAG User ID Bit 0 */ -#define FUSE_JTAGUSERID1 ~_BV(1) /* JTAG User ID Bit 1 */ -#define FUSE_JTAGUSERID2 ~_BV(2) /* JTAG User ID Bit 2 */ -#define FUSE_JTAGUSERID3 ~_BV(3) /* JTAG User ID Bit 3 */ -#define FUSE_JTAGUSERID4 ~_BV(4) /* JTAG User ID Bit 4 */ -#define FUSE_JTAGUSERID5 ~_BV(5) /* JTAG User ID Bit 5 */ -#define FUSE_JTAGUSERID6 ~_BV(6) /* JTAG User ID Bit 6 */ -#define FUSE_JTAGUSERID7 ~_BV(7) /* JTAG User ID Bit 7 */ -#define FUSE0_DEFAULT (0xFF) - -/* Fuse Byte 1 */ -#define FUSE_WDP0 ~_BV(0) /* Watchdog Timeout Period Bit 0 */ -#define FUSE_WDP1 ~_BV(1) /* Watchdog Timeout Period Bit 1 */ -#define FUSE_WDP2 ~_BV(2) /* Watchdog Timeout Period Bit 2 */ -#define FUSE_WDP3 ~_BV(3) /* Watchdog Timeout Period Bit 3 */ -#define FUSE_WDWP0 ~_BV(4) /* Watchdog Window Timeout Period Bit 0 */ -#define FUSE_WDWP1 ~_BV(5) /* Watchdog Window Timeout Period Bit 1 */ -#define FUSE_WDWP2 ~_BV(6) /* Watchdog Window Timeout Period Bit 2 */ -#define FUSE_WDWP3 ~_BV(7) /* Watchdog Window Timeout Period Bit 3 */ -#define FUSE1_DEFAULT (0xFF) - -/* Fuse Byte 2 */ -#define FUSE_BODPD0 ~_BV(0) /* BOD Operation in Power-Down Mode Bit 0 */ -#define FUSE_BODPD1 ~_BV(1) /* BOD Operation in Power-Down Mode Bit 1 */ -#define FUSE_BODACT0 ~_BV(2) /* BOD Operation in Active Mode Bit 0 */ -#define FUSE_BODACT1 ~_BV(3) /* BOD Operation in Active Mode Bit 1 */ -#define FUSE_BOOTRST ~_BV(6) /* Boot Loader Section Reset Vector */ -#define FUSE_DVSDON ~_BV(7) /* Spike Detector Enable */ -#define FUSE2_DEFAULT (0xFF) - -/* Fuse Byte 3 Reserved */ - -/* Fuse Byte 4 */ -#define FUSE_JTAGEN ~_BV(0) /* JTAG Interface Enable */ -#define FUSE_WDLOCK ~_BV(1) /* Watchdog Timer Lock */ -#define FUSE_SUT0 ~_BV(2) /* Start-up Time Bit 0 */ -#define FUSE_SUT1 ~_BV(3) /* Start-up Time Bit 1 */ -#define FUSE4_DEFAULT (0xFF) - -/* Fuse Byte 5 */ -#define FUSE_BODLVL0 ~_BV(0) /* Brown Out Detection Voltage Level Bit 0 */ -#define FUSE_BODLVL1 ~_BV(1) /* Brown Out Detection Voltage Level Bit 1 */ -#define FUSE_BODLVL2 ~_BV(2) /* Brown Out Detection Voltage Level Bit 2 */ -#define FUSE_EESAVE ~_BV(3) /* Preserve EEPROM Through Chip Erase */ -#define FUSE5_DEFAULT (0xFF) - - -/* ========== Lock Bits ========== */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_APPLICATION_TABLE_BITS_EXIST -#define __BOOT_LOCK_APPLICATION_BITS_EXIST -#define __BOOT_LOCK_BOOT_BITS_EXIST - - -/* ========== Signature ========== */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x98 -#define SIGNATURE_2 0x42 - - -#endif /* _AVR_ATxmega256A3_H_ */ - diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iox256a3b.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iox256a3b.h deleted file mode 100644 index bf5a6aa8f..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iox256a3b.h +++ /dev/null @@ -1,6854 +0,0 @@ -/* Copyright (c) 2008 Atmel Corporation - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iox256a3b.h,v 1.1.2.4 2008/11/03 04:13:17 arcanum Exp $ */ - -/* avr/iox256a3b.h - definitions for ATxmega256A3B */ - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iox256a3b.h" -#else -# error "Attempt to include more than one file." -#endif - - -#ifndef _AVR_ATxmega256A3B_H_ -#define _AVR_ATxmega256A3B_H_ 1 - - -/* Ungrouped common registers */ -#define GPIO0 _SFR_MEM8(0x0000) /* General Purpose IO Register 0 */ -#define GPIO1 _SFR_MEM8(0x0001) /* General Purpose IO Register 1 */ -#define GPIO2 _SFR_MEM8(0x0002) /* General Purpose IO Register 2 */ -#define GPIO3 _SFR_MEM8(0x0003) /* General Purpose IO Register 3 */ -#define GPIO4 _SFR_MEM8(0x0004) /* General Purpose IO Register 4 */ -#define GPIO5 _SFR_MEM8(0x0005) /* General Purpose IO Register 5 */ -#define GPIO6 _SFR_MEM8(0x0006) /* General Purpose IO Register 6 */ -#define GPIO7 _SFR_MEM8(0x0007) /* General Purpose IO Register 7 */ -#define GPIO8 _SFR_MEM8(0x0008) /* General Purpose IO Register 8 */ -#define GPIO9 _SFR_MEM8(0x0009) /* General Purpose IO Register 9 */ -#define GPIOA _SFR_MEM8(0x000A) /* General Purpose IO Register 10 */ -#define GPIOB _SFR_MEM8(0x000B) /* General Purpose IO Register 11 */ -#define GPIOC _SFR_MEM8(0x000C) /* General Purpose IO Register 12 */ -#define GPIOD _SFR_MEM8(0x000D) /* General Purpose IO Register 13 */ -#define GPIOE _SFR_MEM8(0x000E) /* General Purpose IO Register 14 */ -#define GPIOF _SFR_MEM8(0x000F) /* General Purpose IO Register 15 */ - -#define CCP _SFR_MEM8(0x0034) /* Configuration Change Protection */ -#define RAMPD _SFR_MEM8(0x0038) /* Ramp D */ -#define RAMPX _SFR_MEM8(0x0039) /* Ramp X */ -#define RAMPY _SFR_MEM8(0x003A) /* Ramp Y */ -#define RAMPZ _SFR_MEM8(0x003B) /* Ramp Z */ -#define EIND _SFR_MEM8(0x003C) /* Extended Indirect Jump */ -#define SPL _SFR_MEM8(0x003D) /* Stack Pointer Low */ -#define SPH _SFR_MEM8(0x003E) /* Stack Pointer High */ -#define SREG _SFR_MEM8(0x003F) /* Status Register */ - - -/* C Language Only */ -#if !defined (__ASSEMBLER__) - -#include - -typedef volatile uint8_t register8_t; -typedef volatile uint16_t register16_t; -typedef volatile uint32_t register32_t; - - -#ifdef _WORDREGISTER -#undef _WORDREGISTER -#endif -#define _WORDREGISTER(regname) \ - union \ - { \ - register16_t regname; \ - struct \ - { \ - register8_t regname ## L; \ - register8_t regname ## H; \ - }; \ - } - -#ifdef _DWORDREGISTER -#undef _DWORDREGISTER -#endif -#define _DWORDREGISTER(regname) \ - union \ - { \ - register32_t regname; \ - struct \ - { \ - register8_t regname ## 0; \ - register8_t regname ## 1; \ - register8_t regname ## 2; \ - register8_t regname ## 3; \ - }; \ - } - - -/* -========================================================================== -IO Module Structures -========================================================================== -*/ - - -/* --------------------------------------------------------------------------- -XOCD - On-Chip Debug System --------------------------------------------------------------------------- -*/ - -/* On-Chip Debug System */ -typedef struct OCD_struct -{ - register8_t OCDR0; /* OCD Register 0 */ - register8_t OCDR1; /* OCD Register 1 */ -} OCD_t; - - -/* CCP signatures */ -typedef enum CCP_enum -{ - CCP_SPM_gc = (0x9D<<0), /* SPM Instruction Protection */ - CCP_IOREG_gc = (0xD8<<0), /* IO Register Protection */ -} CCP_t; - - -/* --------------------------------------------------------------------------- -CLK - Clock System --------------------------------------------------------------------------- -*/ - -/* Clock System */ -typedef struct CLK_struct -{ - register8_t CTRL; /* Control Register */ - register8_t PSCTRL; /* Prescaler Control Register */ - register8_t LOCK; /* Lock register */ - register8_t RTCCTRL; /* RTC Control Register */ -} CLK_t; - -/* --------------------------------------------------------------------------- -CLK - Clock System --------------------------------------------------------------------------- -*/ - -/* Power Reduction */ -typedef struct PR_struct -{ - register8_t PR; /* General Power Reduction */ - register8_t PRPA; /* Power Reduction Port A */ - register8_t PRPB; /* Power Reduction Port B */ - register8_t PRPC; /* Power Reduction Port C */ - register8_t PRPD; /* Power Reduction Port D */ - register8_t PRPE; /* Power Reduction Port E */ - register8_t PRPF; /* Power Reduction Port F */ -} PR_t; - -/* System Clock Selection */ -typedef enum CLK_SCLKSEL_enum -{ - CLK_SCLKSEL_RC2M_gc = (0x00<<0), /* Internal 2MHz RC Oscillator */ - CLK_SCLKSEL_RC32M_gc = (0x01<<0), /* Internal 32MHz RC Oscillator */ - CLK_SCLKSEL_RC32K_gc = (0x02<<0), /* Internal 32kHz RC Oscillator */ - CLK_SCLKSEL_XOSC_gc = (0x03<<0), /* External Crystal Oscillator or Clock */ - CLK_SCLKSEL_PLL_gc = (0x04<<0), /* Phase Locked Loop */ -} CLK_SCLKSEL_t; - -/* Prescaler A Division Factor */ -typedef enum CLK_PSADIV_enum -{ - CLK_PSADIV_1_gc = (0x00<<2), /* Divide by 1 */ - CLK_PSADIV_2_gc = (0x01<<2), /* Divide by 2 */ - CLK_PSADIV_4_gc = (0x03<<2), /* Divide by 4 */ - CLK_PSADIV_8_gc = (0x05<<2), /* Divide by 8 */ - CLK_PSADIV_16_gc = (0x07<<2), /* Divide by 16 */ - CLK_PSADIV_32_gc = (0x09<<2), /* Divide by 32 */ - CLK_PSADIV_64_gc = (0x0B<<2), /* Divide by 64 */ - CLK_PSADIV_128_gc = (0x0D<<2), /* Divide by 128 */ - CLK_PSADIV_256_gc = (0x0F<<2), /* Divide by 256 */ - CLK_PSADIV_512_gc = (0x11<<2), /* Divide by 512 */ -} CLK_PSADIV_t; - -/* Prescaler B and C Division Factor */ -typedef enum CLK_PSBCDIV_enum -{ - CLK_PSBCDIV_1_1_gc = (0x00<<0), /* Divide B by 1 and C by 1 */ - CLK_PSBCDIV_1_2_gc = (0x01<<0), /* Divide B by 1 and C by 2 */ - CLK_PSBCDIV_4_1_gc = (0x02<<0), /* Divide B by 4 and C by 1 */ - CLK_PSBCDIV_2_2_gc = (0x03<<0), /* Divide B by 2 and C by 2 */ -} CLK_PSBCDIV_t; - -/* RTC Clock Source */ -typedef enum CLK_RTCSRC_enum -{ - CLK_RTCSRC_ULP_gc = (0x00<<1), /* 1kHz from internal 32kHz ULP */ - CLK_RTCSRC_TOSC_gc = (0x01<<1), /* 1kHz from 32kHz crystal oscillator on TOSC */ - CLK_RTCSRC_RCOSC_gc = (0x02<<1), /* 1kHz from internal 32kHz RC oscillator */ - CLK_RTCSRC_TOSC32_gc = (0x05<<1), /* 32kHz from 32kHz crystal oscillator on TOSC */ -} CLK_RTCSRC_t; - - -/* --------------------------------------------------------------------------- -SLEEP - Sleep Controller --------------------------------------------------------------------------- -*/ - -/* Sleep Controller */ -typedef struct SLEEP_struct -{ - register8_t CTRL; /* Control Register */ -} SLEEP_t; - -/* Sleep Mode */ -typedef enum SLEEP_SMODE_enum -{ - SLEEP_SMODE_IDLE_gc = (0x00<<1), /* Idle mode */ - SLEEP_SMODE_PDOWN_gc = (0x02<<1), /* Power-down Mode */ - SLEEP_SMODE_PSAVE_gc = (0x03<<1), /* Power-save Mode */ - SLEEP_SMODE_STDBY_gc = (0x06<<1), /* Standby Mode */ - SLEEP_SMODE_ESTDBY_gc = (0x07<<1), /* Extended Standby Mode */ -} SLEEP_SMODE_t; - - -/* --------------------------------------------------------------------------- -OSC - Oscillator --------------------------------------------------------------------------- -*/ - -/* Oscillator */ -typedef struct OSC_struct -{ - register8_t CTRL; /* Control Register */ - register8_t STATUS; /* Status Register */ - register8_t XOSCCTRL; /* External Oscillator Control Register */ - register8_t XOSCFAIL; /* External Oscillator Failure Detection Register */ - register8_t RC32KCAL; /* 32kHz Internal Oscillator Calibration Register */ - register8_t PLLCTRL; /* PLL Control REgister */ - register8_t DFLLCTRL; /* DFLL Control Register */ -} OSC_t; - -/* Oscillator Frequency Range */ -typedef enum OSC_FRQRANGE_enum -{ - OSC_FRQRANGE_04TO2_gc = (0x00<<6), /* 0.4 - 2 MHz */ - OSC_FRQRANGE_2TO9_gc = (0x01<<6), /* 2 - 9 MHz */ - OSC_FRQRANGE_9TO12_gc = (0x02<<6), /* 9 - 12 MHz */ - OSC_FRQRANGE_12TO16_gc = (0x03<<6), /* 12 - 16 MHz */ -} OSC_FRQRANGE_t; - -/* External Oscillator Selection and Startup Time */ -typedef enum OSC_XOSCSEL_enum -{ - OSC_XOSCSEL_EXTCLK_gc = (0x00<<0), /* External Clock - 6 CLK */ - OSC_XOSCSEL_32KHz_gc = (0x02<<0), /* 32kHz TOSC - 32K CLK */ - OSC_XOSCSEL_XTAL_256CLK_gc = (0x03<<0), /* 0.4-16MHz XTAL - 256 CLK */ - OSC_XOSCSEL_XTAL_1KCLK_gc = (0x07<<0), /* 0.4-16MHz XTAL - 1K CLK */ - OSC_XOSCSEL_XTAL_16KCLK_gc = (0x0B<<0), /* 0.4-16MHz XTAL - 16K CLK */ -} OSC_XOSCSEL_t; - -/* PLL Clock Source */ -typedef enum OSC_PLLSRC_enum -{ - OSC_PLLSRC_RC2M_gc = (0x00<<6), /* Internal 2MHz RC Oscillator */ - OSC_PLLSRC_RC32M_gc = (0x02<<6), /* Internal 32MHz RC Oscillator */ - OSC_PLLSRC_XOSC_gc = (0x03<<6), /* External Oscillator */ -} OSC_PLLSRC_t; - - -/* --------------------------------------------------------------------------- -DFLL - DFLL --------------------------------------------------------------------------- -*/ - -/* DFLL */ -typedef struct DFLL_struct -{ - register8_t CTRL; /* Control Register */ - register8_t reserved_0x01; - register8_t CALA; /* Calibration Register A */ - register8_t CALB; /* Calibration Register B */ - register8_t OSCCNT0; /* Oscillator Counter Register 0 */ - register8_t OSCCNT1; /* Oscillator Counter Register 1 */ - register8_t OSCCNT2; /* Oscillator Counter Register 2 */ - register8_t reserved_0x07; -} DFLL_t; - - -/* --------------------------------------------------------------------------- -RST - Reset --------------------------------------------------------------------------- -*/ - -/* Reset */ -typedef struct RST_struct -{ - register8_t STATUS; /* Status Register */ - register8_t CTRL; /* Control Register */ -} RST_t; - - -/* --------------------------------------------------------------------------- -WDT - Watch-Dog Timer --------------------------------------------------------------------------- -*/ - -/* Watch-Dog Timer */ -typedef struct WDT_struct -{ - register8_t CTRL; /* Control */ - register8_t WINCTRL; /* Windowed Mode Control */ - register8_t STATUS; /* Status */ -} WDT_t; - -/* Period setting */ -typedef enum WDT_PER_enum -{ - WDT_PER_8CLK_gc = (0x00<<2), /* 8 cycles (8ms @ 3.3V) */ - WDT_PER_16CLK_gc = (0x01<<2), /* 16 cycles (16ms @ 3.3V) */ - WDT_PER_32CLK_gc = (0x02<<2), /* 32 cycles (32ms @ 3.3V) */ - WDT_PER_64CLK_gc = (0x03<<2), /* 64 cycles (64ms @ 3.3V) */ - WDT_PER_128CLK_gc = (0x04<<2), /* 128 cycles (0.125s @ 3.3V) */ - WDT_PER_256CLK_gc = (0x05<<2), /* 256 cycles (0.25s @ 3.3V) */ - WDT_PER_512CLK_gc = (0x06<<2), /* 512 cycles (0.5s @ 3.3V) */ - WDT_PER_1KCLK_gc = (0x07<<2), /* 1K cycles (1s @ 3.3V) */ - WDT_PER_2KCLK_gc = (0x08<<2), /* 2K cycles (2s @ 3.3V) */ - WDT_PER_4KCLK_gc = (0x09<<2), /* 4K cycles (4s @ 3.3V) */ - WDT_PER_8KCLK_gc = (0x0A<<2), /* 8K cycles (8s @ 3.3V) */ -} WDT_PER_t; - -/* Closed window period */ -typedef enum WDT_WPER_enum -{ - WDT_WPER_8CLK_gc = (0x00<<2), /* 8 cycles (8ms @ 3.3V) */ - WDT_WPER_16CLK_gc = (0x01<<2), /* 16 cycles (16ms @ 3.3V) */ - WDT_WPER_32CLK_gc = (0x02<<2), /* 32 cycles (32ms @ 3.3V) */ - WDT_WPER_64CLK_gc = (0x03<<2), /* 64 cycles (64ms @ 3.3V) */ - WDT_WPER_128CLK_gc = (0x04<<2), /* 128 cycles (0.125s @ 3.3V) */ - WDT_WPER_256CLK_gc = (0x05<<2), /* 256 cycles (0.25s @ 3.3V) */ - WDT_WPER_512CLK_gc = (0x06<<2), /* 512 cycles (0.5s @ 3.3V) */ - WDT_WPER_1KCLK_gc = (0x07<<2), /* 1K cycles (1s @ 3.3V) */ - WDT_WPER_2KCLK_gc = (0x08<<2), /* 2K cycles (2s @ 3.3V) */ - WDT_WPER_4KCLK_gc = (0x09<<2), /* 4K cycles (4s @ 3.3V) */ - WDT_WPER_8KCLK_gc = (0x0A<<2), /* 8K cycles (8s @ 3.3V) */ -} WDT_WPER_t; - - -/* --------------------------------------------------------------------------- -MCU - MCU Control --------------------------------------------------------------------------- -*/ - -/* MCU Control */ -typedef struct MCU_struct -{ - register8_t DEVID0; /* Device ID byte 0 */ - register8_t DEVID1; /* Device ID byte 1 */ - register8_t DEVID2; /* Device ID byte 2 */ - register8_t REVID; /* Revision ID */ - register8_t JTAGUID; /* JTAG User ID */ - register8_t reserved_0x05; - register8_t MCUCR; /* MCU Control */ - register8_t reserved_0x07; - register8_t EVSYSLOCK; /* Event System Lock */ - register8_t AWEXLOCK; /* AWEX Lock */ - register8_t reserved_0x0A; - register8_t reserved_0x0B; -} MCU_t; - - -/* --------------------------------------------------------------------------- -PMIC - Programmable Multi-level Interrupt Controller --------------------------------------------------------------------------- -*/ - -/* Programmable Multi-level Interrupt Controller */ -typedef struct PMIC_struct -{ - register8_t STATUS; /* Status Register */ - register8_t INTPRI; /* Interrupt Priority */ - register8_t CTRL; /* Control Register */ -} PMIC_t; - - -/* --------------------------------------------------------------------------- -DMA - DMA Controller --------------------------------------------------------------------------- -*/ - -/* DMA Channel */ -typedef struct DMA_CH_struct -{ - register8_t CTRLA; /* Channel Control */ - register8_t CTRLB; /* Channel Control */ - register8_t ADDRCTRL; /* Address Control */ - register8_t TRIGSRC; /* Channel Trigger Source */ - _WORDREGISTER(TRFCNT); /* Channel Block Transfer Count */ - register8_t REPCNT; /* Channel Repeat Count */ - register8_t reserved_0x07; - register8_t SRCADDR0; /* Channel Source Address 0 */ - register8_t SRCADDR1; /* Channel Source Address 1 */ - register8_t SRCADDR2; /* Channel Source Address 2 */ - register8_t reserved_0x0B; - register8_t DESTADDR0; /* Channel Destination Address 0 */ - register8_t DESTADDR1; /* Channel Destination Address 1 */ - register8_t DESTADDR2; /* Channel Destination Address 2 */ - register8_t reserved_0x0F; -} DMA_CH_t; - -/* --------------------------------------------------------------------------- -DMA - DMA Controller --------------------------------------------------------------------------- -*/ - -/* DMA Controller */ -typedef struct DMA_struct -{ - register8_t CTRL; /* Control */ - register8_t reserved_0x01; - register8_t reserved_0x02; - register8_t INTFLAGS; /* Transfer Interrupt Status */ - register8_t STATUS; /* Status */ - register8_t reserved_0x05; - _WORDREGISTER(TEMP); /* Temporary Register For 16/24-bit Access */ - register8_t reserved_0x08; - register8_t reserved_0x09; - register8_t reserved_0x0A; - register8_t reserved_0x0B; - register8_t reserved_0x0C; - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t reserved_0x0F; - DMA_CH_t CH0; /* DMA Channel 0 */ - DMA_CH_t CH1; /* DMA Channel 1 */ - DMA_CH_t CH2; /* DMA Channel 2 */ - DMA_CH_t CH3; /* DMA Channel 3 */ -} DMA_t; - -/* Burst mode */ -typedef enum DMA_CH_BURSTLEN_enum -{ - DMA_CH_BURSTLEN_1BYTE_gc = (0x00<<0), /* 1-byte burst mode */ - DMA_CH_BURSTLEN_2BYTE_gc = (0x01<<0), /* 2-byte burst mode */ - DMA_CH_BURSTLEN_4BYTE_gc = (0x02<<0), /* 4-byte burst mode */ - DMA_CH_BURSTLEN_8BYTE_gc = (0x03<<0), /* 8-byte burst mode */ -} DMA_CH_BURSTLEN_t; - -/* Source address reload mode */ -typedef enum DMA_CH_SRCRELOAD_enum -{ - DMA_CH_SRCRELOAD_NONE_gc = (0x00<<6), /* No reload */ - DMA_CH_SRCRELOAD_BLOCK_gc = (0x01<<6), /* Reload at end of block */ - DMA_CH_SRCRELOAD_BURST_gc = (0x02<<6), /* Reload at end of burst */ - DMA_CH_SRCRELOAD_TRANSACTION_gc = (0x03<<6), /* Reload at end of transaction */ -} DMA_CH_SRCRELOAD_t; - -/* Source addressing mode */ -typedef enum DMA_CH_SRCDIR_enum -{ - DMA_CH_SRCDIR_FIXED_gc = (0x00<<4), /* Fixed */ - DMA_CH_SRCDIR_INC_gc = (0x01<<4), /* Increment */ - DMA_CH_SRCDIR_DEC_gc = (0x02<<4), /* Decrement */ -} DMA_CH_SRCDIR_t; - -/* Destination adress reload mode */ -typedef enum DMA_CH_DESTRELOAD_enum -{ - DMA_CH_DESTRELOAD_NONE_gc = (0x00<<2), /* No reload */ - DMA_CH_DESTRELOAD_BLOCK_gc = (0x01<<2), /* Reload at end of block */ - DMA_CH_DESTRELOAD_BURST_gc = (0x02<<2), /* Reload at end of burst */ - DMA_CH_DESTRELOAD_TRANSACTION_gc = (0x03<<2), /* Reload at end of transaction */ -} DMA_CH_DESTRELOAD_t; - -/* Destination adressing mode */ -typedef enum DMA_CH_DESTDIR_enum -{ - DMA_CH_DESTDIR_FIXED_gc = (0x00<<0), /* Fixed */ - DMA_CH_DESTDIR_INC_gc = (0x01<<0), /* Increment */ - DMA_CH_DESTDIR_DEC_gc = (0x02<<0), /* Decrement */ -} DMA_CH_DESTDIR_t; - -/* Transfer trigger source */ -typedef enum DMA_CH_TRIGSRC_enum -{ - DMA_CH_TRIGSRC_OFF_gc = (0x00<<0), /* Off software triggers only */ - DMA_CH_TRIGSRC_EVSYS_CH0_gc = (0x01<<0), /* Event System Channel 0 */ - DMA_CH_TRIGSRC_EVSYS_CH1_gc = (0x02<<0), /* Event System Channel 1 */ - DMA_CH_TRIGSRC_EVSYS_CH2_gc = (0x03<<0), /* Event System Channel 2 */ - DMA_CH_TRIGSRC_ADCA_CH0_gc = (0x10<<0), /* ADCA Channel 0 */ - DMA_CH_TRIGSRC_ADCA_CH1_gc = (0x11<<0), /* ADCA Channel 1 */ - DMA_CH_TRIGSRC_ADCA_CH2_gc = (0x12<<0), /* ADCA Channel 2 */ - DMA_CH_TRIGSRC_ADCA_CH3_gc = (0x13<<0), /* ADCA Channel 3 */ - DMA_CH_TRIGSRC_ADCA_CH4_gc = (0x14<<0), /* ADCA Channel 0,1,2,3 combined */ - DMA_CH_TRIGSRC_DACA_CH0_gc = (0x15<<0), /* DACA Channel 0 */ - DMA_CH_TRIGSRC_DACA_CH1_gc = (0x16<<0), /* DACA Channel 1 */ - DMA_CH_TRIGSRC_ADCB_CH0_gc = (0x20<<0), /* ADCB Channel 0 */ - DMA_CH_TRIGSRC_ADCB_CH1_gc = (0x21<<0), /* ADCB Channel 1 */ - DMA_CH_TRIGSRC_ADCB_CH2_gc = (0x22<<0), /* ADCB Channel 2 */ - DMA_CH_TRIGSRC_ADCB_CH3_gc = (0x23<<0), /* ADCB Channel 3 */ - DMA_CH_TRIGSRC_ADCB_CH4_gc = (0x24<<0), /* ADCB Channel 0,1,2,3 combined */ - DMA_CH_TRIGSRC_DACB_CH0_gc = (0x25<<0), /* DACB Channel 0 */ - DMA_CH_TRIGSRC_DACB_CH1_gc = (0x26<<0), /* DACB Channel 1 */ - DMA_CH_TRIGSRC_TCC0_OVF_gc = (0x40<<0), /* Timer/Counter C0 Overflow */ - DMA_CH_TRIGSRC_TCC0_ERR_gc = (0x41<<0), /* Timer/Counter C0 Error */ - DMA_CH_TRIGSRC_TCC0_CCA_gc = (0x42<<0), /* Timer/Counter C0 Compare or Capture A */ - DMA_CH_TRIGSRC_TCC0_CCB_gc = (0x43<<0), /* Timer/Counter C0 Compare or Capture B */ - DMA_CH_TRIGSRC_TCC0_CCC_gc = (0x44<<0), /* Timer/Counter C0 Compare or Capture C */ - DMA_CH_TRIGSRC_TCC0_CCD_gc = (0x45<<0), /* Timer/Counter C0 Compare or Capture D */ - DMA_CH_TRIGSRC_TCC1_OVF_gc = (0x46<<0), /* Timer/Counter C1 Overflow */ - DMA_CH_TRIGSRC_TCC1_ERR_gc = (0x47<<0), /* Timer/Counter C1 Error */ - DMA_CH_TRIGSRC_TCC1_CCA_gc = (0x48<<0), /* Timer/Counter C1 Compare or Capture A */ - DMA_CH_TRIGSRC_TCC1_CCB_gc = (0x49<<0), /* Timer/Counter C1 Compare or Capture B */ - DMA_CH_TRIGSRC_SPIC_gc = (0x4A<<0), /* SPI C Transfer Complete */ - DMA_CH_TRIGSRC_USARTC0_RXC_gc = (0x4B<<0), /* USART C0 Receive Complete */ - DMA_CH_TRIGSRC_USARTC0_DRE_gc = (0x4C<<0), /* USART C0 Data Register Empty */ - DMA_CH_TRIGSRC_USARTC1_RXC_gc = (0x4E<<0), /* USART C1 Receive Complete */ - DMA_CH_TRIGSRC_USARTC1_DRE_gc = (0x4F<<0), /* USART C1 Data Register Empty */ - DMA_CH_TRIGSRC_TCD0_OVF_gc = (0x60<<0), /* Timer/Counter D0 Overflow */ - DMA_CH_TRIGSRC_TCD0_ERR_gc = (0x61<<0), /* Timer/Counter D0 Error */ - DMA_CH_TRIGSRC_TCD0_CCA_gc = (0x62<<0), /* Timer/Counter D0 Compare or Capture A */ - DMA_CH_TRIGSRC_TCD0_CCB_gc = (0x63<<0), /* Timer/Counter D0 Compare or Capture B */ - DMA_CH_TRIGSRC_TCD0_CCC_gc = (0x64<<0), /* Timer/Counter D0 Compare or Capture C */ - DMA_CH_TRIGSRC_TCD0_CCD_gc = (0x65<<0), /* Timer/Counter D0 Compare or Capture D */ - DMA_CH_TRIGSRC_TCD1_OVF_gc = (0x66<<0), /* Timer/Counter D1 Overflow */ - DMA_CH_TRIGSRC_TCD1_ERR_gc = (0x67<<0), /* Timer/Counter D1 Error */ - DMA_CH_TRIGSRC_TCD1_CCA_gc = (0x68<<0), /* Timer/Counter D1 Compare or Capture A */ - DMA_CH_TRIGSRC_TCD1_CCB_gc = (0x69<<0), /* Timer/Counter D1 Compare or Capture B */ - DMA_CH_TRIGSRC_SPID_gc = (0x6A<<0), /* SPI D Transfer Complete */ - DMA_CH_TRIGSRC_USARTD0_RXC_gc = (0x6B<<0), /* USART D0 Receive Complete */ - DMA_CH_TRIGSRC_USARTD0_DRE_gc = (0x6C<<0), /* USART D0 Data Register Empty */ - DMA_CH_TRIGSRC_USARTD1_RXC_gc = (0x6E<<0), /* USART D1 Receive Complete */ - DMA_CH_TRIGSRC_USARTD1_DRE_gc = (0x6F<<0), /* USART D1 Data Register Empty */ - DMA_CH_TRIGSRC_TCE0_OVF_gc = (0x80<<0), /* Timer/Counter E0 Overflow */ - DMA_CH_TRIGSRC_TCE0_ERR_gc = (0x81<<0), /* Timer/Counter E0 Error */ - DMA_CH_TRIGSRC_TCE0_CCA_gc = (0x82<<0), /* Timer/Counter E0 Compare or Capture A */ - DMA_CH_TRIGSRC_TCE0_CCB_gc = (0x83<<0), /* Timer/Counter E0 Compare or Capture B */ - DMA_CH_TRIGSRC_TCE0_CCC_gc = (0x84<<0), /* Timer/Counter E0 Compare or Capture C */ - DMA_CH_TRIGSRC_TCE0_CCD_gc = (0x85<<0), /* Timer/Counter E0 Compare or Capture D */ - DMA_CH_TRIGSRC_TCE1_OVF_gc = (0x86<<0), /* Timer/Counter E1 Overflow */ - DMA_CH_TRIGSRC_TCE1_ERR_gc = (0x87<<0), /* Timer/Counter E1 Error */ - DMA_CH_TRIGSRC_TCE1_CCA_gc = (0x88<<0), /* Timer/Counter E1 Compare or Capture A */ - DMA_CH_TRIGSRC_TCE1_CCB_gc = (0x89<<0), /* Timer/Counter E1 Compare or Capture B */ - DMA_CH_TRIGSRC_SPIE_gc = (0x8A<<0), /* SPI E Transfer Complete */ - DMA_CH_TRIGSRC_USARTE0_RXC_gc = (0x8B<<0), /* USART E0 Receive Complete */ - DMA_CH_TRIGSRC_USARTE0_DRE_gc = (0x8C<<0), /* USART E0 Data Register Empty */ - DMA_CH_TRIGSRC_USARTE1_RXC_gc = (0x8E<<0), /* USART E1 Receive Complete */ - DMA_CH_TRIGSRC_USARTE1_DRE_gc = (0x8F<<0), /* USART E1 Data Register Empty */ - DMA_CH_TRIGSRC_TCF0_OVF_gc = (0xA0<<0), /* Timer/Counter F0 Overflow */ - DMA_CH_TRIGSRC_TCF0_ERR_gc = (0xA1<<0), /* Timer/Counter F0 Error */ - DMA_CH_TRIGSRC_TCF0_CCA_gc = (0xA2<<0), /* Timer/Counter F0 Compare or Capture A */ - DMA_CH_TRIGSRC_TCF0_CCB_gc = (0xA3<<0), /* Timer/Counter F0 Compare or Capture B */ - DMA_CH_TRIGSRC_TCF0_CCC_gc = (0xA4<<0), /* Timer/Counter F0 Compare or Capture C */ - DMA_CH_TRIGSRC_TCF0_CCD_gc = (0xA5<<0), /* Timer/Counter F0 Compare or Capture D */ - DMA_CH_TRIGSRC_TCF1_OVF_gc = (0xA6<<0), /* Timer/Counter F1 Overflow */ - DMA_CH_TRIGSRC_TCF1_ERR_gc = (0xA7<<0), /* Timer/Counter F1 Error */ - DMA_CH_TRIGSRC_TCF1_CCA_gc = (0xA8<<0), /* Timer/Counter F1 Compare or Capture A */ - DMA_CH_TRIGSRC_TCF1_CCB_gc = (0xA9<<0), /* Timer/Counter F1 Compare or Capture B */ - DMA_CH_TRIGSRC_SPIF_gc = (0xAA<<0), /* SPI F Transfer Complete */ - DMA_CH_TRIGSRC_USARTF0_RXC_gc = (0xAB<<0), /* USART F0 Receive Complete */ - DMA_CH_TRIGSRC_USARTF0_DRE_gc = (0xAC<<0), /* USART F0 Data Register Empty */ - DMA_CH_TRIGSRC_USARTF1_RXC_gc = (0xAE<<0), /* USART F1 Receive Complete */ - DMA_CH_TRIGSRC_USARTF1_DRE_gc = (0xAF<<0), /* USART F1 Data Register Empty */ -} DMA_CH_TRIGSRC_t; - -/* Double buffering mode */ -typedef enum DMA_DBUFMODE_enum -{ - DMA_DBUFMODE_DISABLED_gc = (0x00<<2), /* Double buffering disabled */ - DMA_DBUFMODE_CH01_gc = (0x01<<2), /* Double buffering enabled on channel 0/1 */ - DMA_DBUFMODE_CH23_gc = (0x02<<2), /* Double buffering enabled on channel 2/3 */ - DMA_DBUFMODE_CH01CH23_gc = (0x03<<2), /* Double buffering enabled on ch. 0/1 and ch. 2/3 */ -} DMA_DBUFMODE_t; - -/* Priority mode */ -typedef enum DMA_PRIMODE_enum -{ - DMA_PRIMODE_RR0123_gc = (0x00<<0), /* Round Robin */ - DMA_PRIMODE_CH0RR123_gc = (0x01<<0), /* Channel 0 > Round Robin on channel 1/2/3 */ - DMA_PRIMODE_CH01RR23_gc = (0x02<<0), /* Channel 0 > channel 1 > Round Robin on channel 2/3 */ - DMA_PRIMODE_CH0123_gc = (0x03<<0), /* Channel 0 > channel 1 > channel 2 > channel 3 */ -} DMA_PRIMODE_t; - -/* Interrupt level */ -typedef enum DMA_CH_ERRINTLVL_enum -{ - DMA_CH_ERRINTLVL_OFF_gc = (0x00<<2), /* Interrupt disabled */ - DMA_CH_ERRINTLVL_LO_gc = (0x01<<2), /* Low level */ - DMA_CH_ERRINTLVL_MED_gc = (0x02<<2), /* Medium level */ - DMA_CH_ERRINTLVL_HI_gc = (0x03<<2), /* High level */ -} DMA_CH_ERRINTLVL_t; - -/* Interrupt level */ -typedef enum DMA_CH_TRNINTLVL_enum -{ - DMA_CH_TRNINTLVL_OFF_gc = (0x00<<0), /* Interrupt disabled */ - DMA_CH_TRNINTLVL_LO_gc = (0x01<<0), /* Low level */ - DMA_CH_TRNINTLVL_MED_gc = (0x02<<0), /* Medium level */ - DMA_CH_TRNINTLVL_HI_gc = (0x03<<0), /* High level */ -} DMA_CH_TRNINTLVL_t; - - -/* --------------------------------------------------------------------------- -EVSYS - Event System --------------------------------------------------------------------------- -*/ - -/* Event System */ -typedef struct EVSYS_struct -{ - register8_t CH0MUX; /* Event Channel 0 Multiplexer */ - register8_t CH1MUX; /* Event Channel 1 Multiplexer */ - register8_t CH2MUX; /* Event Channel 2 Multiplexer */ - register8_t CH3MUX; /* Event Channel 3 Multiplexer */ - register8_t CH4MUX; /* Event Channel 4 Multiplexer */ - register8_t CH5MUX; /* Event Channel 5 Multiplexer */ - register8_t CH6MUX; /* Event Channel 6 Multiplexer */ - register8_t CH7MUX; /* Event Channel 7 Multiplexer */ - register8_t CH0CTRL; /* Channel 0 Control Register */ - register8_t CH1CTRL; /* Channel 1 Control Register */ - register8_t CH2CTRL; /* Channel 2 Control Register */ - register8_t CH3CTRL; /* Channel 3 Control Register */ - register8_t CH4CTRL; /* Channel 4 Control Register */ - register8_t CH5CTRL; /* Channel 5 Control Register */ - register8_t CH6CTRL; /* Channel 6 Control Register */ - register8_t CH7CTRL; /* Channel 7 Control Register */ - register8_t STROBE; /* Event Strobe */ - register8_t DATA; /* Event Data */ -} EVSYS_t; - -/* Quadrature Decoder Index Recognition Mode */ -typedef enum EVSYS_QDIRM_enum -{ - EVSYS_QDIRM_00_gc = (0x00<<5), /* QDPH0 = 0, QDPH90 = 0 */ - EVSYS_QDIRM_01_gc = (0x01<<5), /* QDPH0 = 0, QDPH90 = 1 */ - EVSYS_QDIRM_10_gc = (0x02<<5), /* QDPH0 = 1, QDPH90 = 0 */ - EVSYS_QDIRM_11_gc = (0x03<<5), /* QDPH0 = 1, QDPH90 = 1 */ -} EVSYS_QDIRM_t; - -/* Digital filter coefficient */ -typedef enum EVSYS_DIGFILT_enum -{ - EVSYS_DIGFILT_1SAMPLE_gc = (0x00<<0), /* 1 SAMPLE */ - EVSYS_DIGFILT_2SAMPLES_gc = (0x01<<0), /* 2 SAMPLES */ - EVSYS_DIGFILT_3SAMPLES_gc = (0x02<<0), /* 3 SAMPLES */ - EVSYS_DIGFILT_4SAMPLES_gc = (0x03<<0), /* 4 SAMPLES */ - EVSYS_DIGFILT_5SAMPLES_gc = (0x04<<0), /* 5 SAMPLES */ - EVSYS_DIGFILT_6SAMPLES_gc = (0x05<<0), /* 6 SAMPLES */ - EVSYS_DIGFILT_7SAMPLES_gc = (0x06<<0), /* 7 SAMPLES */ - EVSYS_DIGFILT_8SAMPLES_gc = (0x07<<0), /* 8 SAMPLES */ -} EVSYS_DIGFILT_t; - -/* Event Channel multiplexer input selection */ -typedef enum EVSYS_CHMUX_enum -{ - EVSYS_CHMUX_OFF_gc = (0x00<<0), /* Off */ - EVSYS_CHMUX_RTC_OVF_gc = (0x08<<0), /* RTC Overflow */ - EVSYS_CHMUX_RTC_CMP_gc = (0x09<<0), /* RTC Compare Match */ - EVSYS_CHMUX_ACA_CH0_gc = (0x10<<0), /* Analog Comparator A Channel 0 */ - EVSYS_CHMUX_ACA_CH1_gc = (0x11<<0), /* Analog Comparator A Channel 1 */ - EVSYS_CHMUX_ACA_WIN_gc = (0x12<<0), /* Analog Comparator A Window */ - EVSYS_CHMUX_ACB_CH0_gc = (0x13<<0), /* Analog Comparator B Channel 0 */ - EVSYS_CHMUX_ACB_CH1_gc = (0x14<<0), /* Analog Comparator B Channel 1 */ - EVSYS_CHMUX_ACB_WIN_gc = (0x15<<0), /* Analog Comparator B Window */ - EVSYS_CHMUX_ADCA_CH0_gc = (0x20<<0), /* ADC A Channel 0 */ - EVSYS_CHMUX_ADCA_CH1_gc = (0x21<<0), /* ADC A Channel 1 */ - EVSYS_CHMUX_ADCA_CH2_gc = (0x22<<0), /* ADC A Channel 2 */ - EVSYS_CHMUX_ADCA_CH3_gc = (0x23<<0), /* ADC A Channel 3 */ - EVSYS_CHMUX_ADCB_CH0_gc = (0x24<<0), /* ADC B Channel 0 */ - EVSYS_CHMUX_ADCB_CH1_gc = (0x25<<0), /* ADC B Channel 1 */ - EVSYS_CHMUX_ADCB_CH2_gc = (0x26<<0), /* ADC B Channel 2 */ - EVSYS_CHMUX_ADCB_CH3_gc = (0x27<<0), /* ADC B Channel 3 */ - EVSYS_CHMUX_PORTA_PIN0_gc = (0x50<<0), /* Port A, Pin0 */ - EVSYS_CHMUX_PORTA_PIN1_gc = (0x51<<0), /* Port A, Pin1 */ - EVSYS_CHMUX_PORTA_PIN2_gc = (0x52<<0), /* Port A, Pin2 */ - EVSYS_CHMUX_PORTA_PIN3_gc = (0x53<<0), /* Port A, Pin3 */ - EVSYS_CHMUX_PORTA_PIN4_gc = (0x54<<0), /* Port A, Pin4 */ - EVSYS_CHMUX_PORTA_PIN5_gc = (0x55<<0), /* Port A, Pin5 */ - EVSYS_CHMUX_PORTA_PIN6_gc = (0x56<<0), /* Port A, Pin6 */ - EVSYS_CHMUX_PORTA_PIN7_gc = (0x57<<0), /* Port A, Pin7 */ - EVSYS_CHMUX_PORTB_PIN0_gc = (0x58<<0), /* Port B, Pin0 */ - EVSYS_CHMUX_PORTB_PIN1_gc = (0x59<<0), /* Port B, Pin1 */ - EVSYS_CHMUX_PORTB_PIN2_gc = (0x5A<<0), /* Port B, Pin2 */ - EVSYS_CHMUX_PORTB_PIN3_gc = (0x5B<<0), /* Port B, Pin3 */ - EVSYS_CHMUX_PORTB_PIN4_gc = (0x5C<<0), /* Port B, Pin4 */ - EVSYS_CHMUX_PORTB_PIN5_gc = (0x5D<<0), /* Port B, Pin5 */ - EVSYS_CHMUX_PORTB_PIN6_gc = (0x5E<<0), /* Port B, Pin6 */ - EVSYS_CHMUX_PORTB_PIN7_gc = (0x5F<<0), /* Port B, Pin7 */ - EVSYS_CHMUX_PORTC_PIN0_gc = (0x60<<0), /* Port C, Pin0 */ - EVSYS_CHMUX_PORTC_PIN1_gc = (0x61<<0), /* Port C, Pin1 */ - EVSYS_CHMUX_PORTC_PIN2_gc = (0x62<<0), /* Port C, Pin2 */ - EVSYS_CHMUX_PORTC_PIN3_gc = (0x63<<0), /* Port C, Pin3 */ - EVSYS_CHMUX_PORTC_PIN4_gc = (0x64<<0), /* Port C, Pin4 */ - EVSYS_CHMUX_PORTC_PIN5_gc = (0x65<<0), /* Port C, Pin5 */ - EVSYS_CHMUX_PORTC_PIN6_gc = (0x66<<0), /* Port C, Pin6 */ - EVSYS_CHMUX_PORTC_PIN7_gc = (0x67<<0), /* Port C, Pin7 */ - EVSYS_CHMUX_PORTD_PIN0_gc = (0x68<<0), /* Port D, Pin0 */ - EVSYS_CHMUX_PORTD_PIN1_gc = (0x69<<0), /* Port D, Pin1 */ - EVSYS_CHMUX_PORTD_PIN2_gc = (0x6A<<0), /* Port D, Pin2 */ - EVSYS_CHMUX_PORTD_PIN3_gc = (0x6B<<0), /* Port D, Pin3 */ - EVSYS_CHMUX_PORTD_PIN4_gc = (0x6C<<0), /* Port D, Pin4 */ - EVSYS_CHMUX_PORTD_PIN5_gc = (0x6D<<0), /* Port D, Pin5 */ - EVSYS_CHMUX_PORTD_PIN6_gc = (0x6E<<0), /* Port D, Pin6 */ - EVSYS_CHMUX_PORTD_PIN7_gc = (0x6F<<0), /* Port D, Pin7 */ - EVSYS_CHMUX_PORTE_PIN0_gc = (0x70<<0), /* Port E, Pin0 */ - EVSYS_CHMUX_PORTE_PIN1_gc = (0x71<<0), /* Port E, Pin1 */ - EVSYS_CHMUX_PORTE_PIN2_gc = (0x72<<0), /* Port E, Pin2 */ - EVSYS_CHMUX_PORTE_PIN3_gc = (0x73<<0), /* Port E, Pin3 */ - EVSYS_CHMUX_PORTE_PIN4_gc = (0x74<<0), /* Port E, Pin4 */ - EVSYS_CHMUX_PORTE_PIN5_gc = (0x75<<0), /* Port E, Pin5 */ - EVSYS_CHMUX_PORTE_PIN6_gc = (0x76<<0), /* Port E, Pin6 */ - EVSYS_CHMUX_PORTE_PIN7_gc = (0x77<<0), /* Port E, Pin7 */ - EVSYS_CHMUX_PORTF_PIN0_gc = (0x78<<0), /* Port F, Pin0 */ - EVSYS_CHMUX_PORTF_PIN1_gc = (0x79<<0), /* Port F, Pin1 */ - EVSYS_CHMUX_PORTF_PIN2_gc = (0x7A<<0), /* Port F, Pin2 */ - EVSYS_CHMUX_PORTF_PIN3_gc = (0x7B<<0), /* Port F, Pin3 */ - EVSYS_CHMUX_PORTF_PIN4_gc = (0x7C<<0), /* Port F, Pin4 */ - EVSYS_CHMUX_PORTF_PIN5_gc = (0x7D<<0), /* Port F, Pin5 */ - EVSYS_CHMUX_PORTF_PIN6_gc = (0x7E<<0), /* Port F, Pin6 */ - EVSYS_CHMUX_PORTF_PIN7_gc = (0x7F<<0), /* Port F, Pin7 */ - EVSYS_CHMUX_PRESCALER_1_gc = (0x80<<0), /* Prescaler, divide by 1 */ - EVSYS_CHMUX_PRESCALER_2_gc = (0x81<<0), /* Prescaler, divide by 2 */ - EVSYS_CHMUX_PRESCALER_4_gc = (0x82<<0), /* Prescaler, divide by 4 */ - EVSYS_CHMUX_PRESCALER_8_gc = (0x83<<0), /* Prescaler, divide by 8 */ - EVSYS_CHMUX_PRESCALER_16_gc = (0x84<<0), /* Prescaler, divide by 16 */ - EVSYS_CHMUX_PRESCALER_32_gc = (0x85<<0), /* Prescaler, divide by 32 */ - EVSYS_CHMUX_PRESCALER_64_gc = (0x86<<0), /* Prescaler, divide by 64 */ - EVSYS_CHMUX_PRESCALER_128_gc = (0x87<<0), /* Prescaler, divide by 128 */ - EVSYS_CHMUX_PRESCALER_256_gc = (0x88<<0), /* Prescaler, divide by 256 */ - EVSYS_CHMUX_PRESCALER_512_gc = (0x89<<0), /* Prescaler, divide by 512 */ - EVSYS_CHMUX_PRESCALER_1024_gc = (0x8A<<0), /* Prescaler, divide by 1024 */ - EVSYS_CHMUX_PRESCALER_2048_gc = (0x8B<<0), /* Prescaler, divide by 2048 */ - EVSYS_CHMUX_PRESCALER_4096_gc = (0x8C<<0), /* Prescaler, divide by 4096 */ - EVSYS_CHMUX_PRESCALER_8192_gc = (0x8D<<0), /* Prescaler, divide by 8192 */ - EVSYS_CHMUX_PRESCALER_16384_gc = (0x8E<<0), /* Prescaler, divide by 16384 */ - EVSYS_CHMUX_PRESCALER_32768_gc = (0x8F<<0), /* Prescaler, divide by 32768 */ - EVSYS_CHMUX_TCC0_OVF_gc = (0xC0<<0), /* Timer/Counter C0 Overflow */ - EVSYS_CHMUX_TCC0_ERR_gc = (0xC1<<0), /* Timer/Counter C0 Error */ - EVSYS_CHMUX_TCC0_CCA_gc = (0xC4<<0), /* Timer/Counter C0 Compare or Capture A */ - EVSYS_CHMUX_TCC0_CCB_gc = (0xC5<<0), /* Timer/Counter C0 Compare or Capture B */ - EVSYS_CHMUX_TCC0_CCC_gc = (0xC6<<0), /* Timer/Counter C0 Compare or Capture C */ - EVSYS_CHMUX_TCC0_CCD_gc = (0xC7<<0), /* Timer/Counter C0 Compare or Capture D */ - EVSYS_CHMUX_TCC1_OVF_gc = (0xC8<<0), /* Timer/Counter C1 Overflow */ - EVSYS_CHMUX_TCC1_ERR_gc = (0xC9<<0), /* Timer/Counter C1 Error */ - EVSYS_CHMUX_TCC1_CCA_gc = (0xCC<<0), /* Timer/Counter C1 Compare or Capture A */ - EVSYS_CHMUX_TCC1_CCB_gc = (0xCD<<0), /* Timer/Counter C1 Compare or Capture B */ - EVSYS_CHMUX_TCD0_OVF_gc = (0xD0<<0), /* Timer/Counter D0 Overflow */ - EVSYS_CHMUX_TCD0_ERR_gc = (0xD1<<0), /* Timer/Counter D0 Error */ - EVSYS_CHMUX_TCD0_CCA_gc = (0xD4<<0), /* Timer/Counter D0 Compare or Capture A */ - EVSYS_CHMUX_TCD0_CCB_gc = (0xD5<<0), /* Timer/Counter D0 Compare or Capture B */ - EVSYS_CHMUX_TCD0_CCC_gc = (0xD6<<0), /* Timer/Counter D0 Compare or Capture C */ - EVSYS_CHMUX_TCD0_CCD_gc = (0xD7<<0), /* Timer/Counter D0 Compare or Capture D */ - EVSYS_CHMUX_TCD1_OVF_gc = (0xD8<<0), /* Timer/Counter D1 Overflow */ - EVSYS_CHMUX_TCD1_ERR_gc = (0xD9<<0), /* Timer/Counter D1 Error */ - EVSYS_CHMUX_TCD1_CCA_gc = (0xDC<<0), /* Timer/Counter D1 Compare or Capture A */ - EVSYS_CHMUX_TCD1_CCB_gc = (0xDD<<0), /* Timer/Counter D1 Compare or Capture B */ - EVSYS_CHMUX_TCE0_OVF_gc = (0xE0<<0), /* Timer/Counter E0 Overflow */ - EVSYS_CHMUX_TCE0_ERR_gc = (0xE1<<0), /* Timer/Counter E0 Error */ - EVSYS_CHMUX_TCE0_CCA_gc = (0xE4<<0), /* Timer/Counter E0 Compare or Capture A */ - EVSYS_CHMUX_TCE0_CCB_gc = (0xE5<<0), /* Timer/Counter E0 Compare or Capture B */ - EVSYS_CHMUX_TCE0_CCC_gc = (0xE6<<0), /* Timer/Counter E0 Compare or Capture C */ - EVSYS_CHMUX_TCE0_CCD_gc = (0xE7<<0), /* Timer/Counter E0 Compare or Capture D */ - EVSYS_CHMUX_TCE1_OVF_gc = (0xE8<<0), /* Timer/Counter E1 Overflow */ - EVSYS_CHMUX_TCE1_ERR_gc = (0xE9<<0), /* Timer/Counter E1 Error */ - EVSYS_CHMUX_TCE1_CCA_gc = (0xEC<<0), /* Timer/Counter E1 Compare or Capture A */ - EVSYS_CHMUX_TCE1_CCB_gc = (0xED<<0), /* Timer/Counter E1 Compare or Capture B */ - EVSYS_CHMUX_TCF0_OVF_gc = (0xF0<<0), /* Timer/Counter F0 Overflow */ - EVSYS_CHMUX_TCF0_ERR_gc = (0xF1<<0), /* Timer/Counter F0 Error */ - EVSYS_CHMUX_TCF0_CCA_gc = (0xF4<<0), /* Timer/Counter F0 Compare or Capture A */ - EVSYS_CHMUX_TCF0_CCB_gc = (0xF5<<0), /* Timer/Counter F0 Compare or Capture B */ - EVSYS_CHMUX_TCF0_CCC_gc = (0xF6<<0), /* Timer/Counter F0 Compare or Capture C */ - EVSYS_CHMUX_TCF0_CCD_gc = (0xF7<<0), /* Timer/Counter F0 Compare or Capture D */ - EVSYS_CHMUX_TCF1_OVF_gc = (0xF8<<0), /* Timer/Counter F1 Overflow */ - EVSYS_CHMUX_TCF1_ERR_gc = (0xF9<<0), /* Timer/Counter F1 Error */ - EVSYS_CHMUX_TCF1_CCA_gc = (0xFC<<0), /* Timer/Counter F1 Compare or Capture A */ - EVSYS_CHMUX_TCF1_CCB_gc = (0xFD<<0), /* Timer/Counter F1 Compare or Capture B */ -} EVSYS_CHMUX_t; - - -/* --------------------------------------------------------------------------- -NVM - Non Volatile Memory Controller --------------------------------------------------------------------------- -*/ - -/* Non-volatile Memory Controller */ -typedef struct NVM_struct -{ - register8_t ADDR0; /* Address Register 0 */ - register8_t ADDR1; /* Address Register 1 */ - register8_t ADDR2; /* Address Register 2 */ - register8_t reserved_0x03; - register8_t DATA0; /* Data Register 0 */ - register8_t DATA1; /* Data Register 1 */ - register8_t DATA2; /* Data Register 2 */ - register8_t reserved_0x07; - register8_t reserved_0x08; - register8_t reserved_0x09; - register8_t CMD; /* Command */ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t INTCTRL; /* Interrupt Control */ - register8_t reserved_0x0E; - register8_t STATUS; /* Status */ - register8_t LOCKBITS; /* Lock Bits */ -} NVM_t; - -/* --------------------------------------------------------------------------- -NVM - Non Volatile Memory Controller --------------------------------------------------------------------------- -*/ - -/* Lock Bits */ -typedef struct NVM_LOCKBITS_struct -{ - register8_t LOCKBITS; /* Lock Bits */ -} NVM_LOCKBITS_t; - -/* --------------------------------------------------------------------------- -NVM - Non Volatile Memory Controller --------------------------------------------------------------------------- -*/ - -/* Fuses */ -typedef struct NVM_FUSES_struct -{ - register8_t FUSEBYTE0; /* JTAG User ID */ - register8_t FUSEBYTE1; /* Watchdog Configuration */ - register8_t FUSEBYTE2; /* Reset Configuration */ - register8_t reserved_0x03; - register8_t FUSEBYTE4; /* Start-up Configuration */ - register8_t FUSEBYTE5; /* EESAVE and BOD Level */ -} NVM_FUSES_t; - -/* --------------------------------------------------------------------------- -NVM - Non Volatile Memory Controller --------------------------------------------------------------------------- -*/ - -/* Production Signatures */ -typedef struct NVM_PROD_SIGNATURES_struct -{ - register8_t RCOSC2M; /* RCOSC 2MHz Calibration Value */ - register8_t reserved_0x01; - register8_t RCOSC32K; /* RCOSC 32kHz Calibration Value */ - register8_t RCOSC32M; /* RCOSC 32MHz Calibration Value */ - register8_t reserved_0x04; - register8_t reserved_0x05; - register8_t reserved_0x06; - register8_t reserved_0x07; - register8_t LOTNUM0; /* Lot Number Byte 0, ASCII */ - register8_t LOTNUM1; /* Lot Number Byte 1, ASCII */ - register8_t LOTNUM2; /* Lot Number Byte 2, ASCII */ - register8_t LOTNUM3; /* Lot Number Byte 3, ASCII */ - register8_t LOTNUM4; /* Lot Number Byte 4, ASCII */ - register8_t LOTNUM5; /* Lot Number Byte 5, ASCII */ - register8_t reserved_0x0E; - register8_t reserved_0x0F; - register8_t WAFNUM; /* Wafer Number */ - register8_t reserved_0x11; - register8_t COORDX0; /* Wafer Coordinate X Byte 0 */ - register8_t COORDX1; /* Wafer Coordinate X Byte 1 */ - register8_t COORDY0; /* Wafer Coordinate Y Byte 0 */ - register8_t COORDY1; /* Wafer Coordinate Y Byte 1 */ - register8_t reserved_0x16; - register8_t reserved_0x17; - register8_t reserved_0x18; - register8_t reserved_0x19; - register8_t reserved_0x1A; - register8_t reserved_0x1B; - register8_t reserved_0x1C; - register8_t reserved_0x1D; - register8_t reserved_0x1E; - register8_t reserved_0x1F; - register8_t ADCACAL0; /* ADCA Calibration Byte 0 */ - register8_t ADCACAL1; /* ADCA Calibration Byte 1 */ - register8_t reserved_0x22; - register8_t reserved_0x23; - register8_t ADCBCAL0; /* ADCB Calibration Byte 0 */ - register8_t ADCBCAL1; /* ADCB Calibration Byte 1 */ - register8_t reserved_0x26; - register8_t reserved_0x27; - register8_t reserved_0x28; - register8_t reserved_0x29; - register8_t reserved_0x2A; - register8_t reserved_0x2B; - register8_t reserved_0x2C; - register8_t reserved_0x2D; - register8_t TEMPSENSE0; /* Temperature Sensor Calibration Byte 0 */ - register8_t TEMPSENSE1; /* Temperature Sensor Calibration Byte 0 */ - register8_t DACAOFFCAL; /* DACA Calibration Byte 0 */ - register8_t DACACAINCAL; /* DACA Calibration Byte 1 */ - register8_t DACBOFFCAL; /* DACB Calibration Byte 0 */ - register8_t DACBGAINCAL; /* DACB Calibration Byte 1 */ - register8_t reserved_0x34; - register8_t reserved_0x35; - register8_t reserved_0x36; - register8_t reserved_0x37; - register8_t reserved_0x38; - register8_t reserved_0x39; - register8_t reserved_0x3A; - register8_t reserved_0x3B; - register8_t reserved_0x3C; - register8_t reserved_0x3D; - register8_t reserved_0x3E; -} NVM_PROD_SIGNATURES_t; - -/* NVM Command */ -typedef enum NVM_CMD_enum -{ - NVM_CMD_NO_OPERATION_gc = (0x00<<0), /* Noop/Ordinary LPM */ - NVM_CMD_READ_CALIB_ROW_gc = (0x02<<0), /* Read calibration row */ - NVM_CMD_READ_USER_SIG_ROW_gc = (0x01<<0), /* Read user signature row */ - NVM_CMD_READ_EEPROM_gc = (0x06<<0), /* Read EEPROM */ - NVM_CMD_READ_FUSES_gc = (0x07<<0), /* Read fuse byte */ - NVM_CMD_WRITE_LOCK_BITS_gc = (0x08<<0), /* Write lock bits */ - NVM_CMD_ERASE_USER_SIG_ROW_gc = (0x18<<0), /* Erase user signature row */ - NVM_CMD_WRITE_USER_SIG_ROW_gc = (0x1A<<0), /* Write user signature row */ - NVM_CMD_ERASE_APP_gc = (0x20<<0), /* Erase Application Section */ - NVM_CMD_ERASE_APP_PAGE_gc = (0x22<<0), /* Erase Application Section page */ - NVM_CMD_LOAD_FLASH_BUFFER_gc = (0x23<<0), /* Load Flash page buffer */ - NVM_CMD_WRITE_APP_PAGE_gc = (0x24<<0), /* Write Application Section page */ - NVM_CMD_ERASE_WRITE_APP_PAGE_gc = (0x25<<0), /* Erase-and-write Application Section page */ - NVM_CMD_ERASE_FLASH_BUFFER_gc = (0x26<<0), /* Erase/flush Flash page buffer */ - NVM_CMD_ERASE_BOOT_PAGE_gc = (0x2A<<0), /* Erase Boot Section page */ - NVM_CMD_WRITE_BOOT_PAGE_gc = (0x2C<<0), /* Write Boot Section page */ - NVM_CMD_ERASE_WRITE_BOOT_PAGE_gc = (0x2D<<0), /* Erase-and-write Boot Section page */ - NVM_CMD_ERASE_EEPROM_gc = (0x30<<0), /* Erase EEPROM */ - NVM_CMD_ERASE_EEPROM_PAGE_gc = (0x32<<0), /* Erase EEPROM page */ - NVM_CMD_LOAD_EEPROM_BUFFER_gc = (0x33<<0), /* Load EEPROM page buffer */ - NVM_CMD_WRITE_EEPROM_PAGE_gc = (0x34<<0), /* Write EEPROM page */ - NVM_CMD_ERASE_WRITE_EEPROM_PAGE_gc = (0x35<<0), /* Erase-and-write EEPROM page */ - NVM_CMD_ERASE_EEPROM_BUFFER_gc = (0x36<<0), /* Erase/flush EEPROM page buffer */ - NVM_CMD_APP_CRC_gc = (0x38<<0), /* Generate Application section CRC */ - NVM_CMD_BOOT_CRC_gc = (0x39<<0), /* Generate Boot Section CRC */ - NVM_CMD_FLASH_RANGE_CRC_gc = (0x3A<<0), /* Generate Flash Range CRC */ -} NVM_CMD_t; - -/* SPM ready interrupt level */ -typedef enum NVM_SPMLVL_enum -{ - NVM_SPMLVL_OFF_gc = (0x00<<2), /* Interrupt disabled */ - NVM_SPMLVL_LO_gc = (0x01<<2), /* Low level */ - NVM_SPMLVL_MED_gc = (0x02<<2), /* Medium level */ - NVM_SPMLVL_HI_gc = (0x03<<2), /* High level */ -} NVM_SPMLVL_t; - -/* EEPROM ready interrupt level */ -typedef enum NVM_EELVL_enum -{ - NVM_EELVL_OFF_gc = (0x00<<0), /* Interrupt disabled */ - NVM_EELVL_LO_gc = (0x01<<0), /* Low level */ - NVM_EELVL_MED_gc = (0x02<<0), /* Medium level */ - NVM_EELVL_HI_gc = (0x03<<0), /* High level */ -} NVM_EELVL_t; - -/* Boot lock bits - boot setcion */ -typedef enum NVM_BLBB_enum -{ - NVM_BLBB_NOLOCK_gc = (0x03<<6), /* No locks */ - NVM_BLBB_WLOCK_gc = (0x02<<6), /* Write not allowed */ - NVM_BLBB_RLOCK_gc = (0x01<<6), /* Read not allowed */ - NVM_BLBB_RWLOCK_gc = (0x00<<6), /* Read and write not allowed */ -} NVM_BLBB_t; - -/* Boot lock bits - application section */ -typedef enum NVM_BLBA_enum -{ - NVM_BLBA_NOLOCK_gc = (0x03<<4), /* No locks */ - NVM_BLBA_WLOCK_gc = (0x02<<4), /* Write not allowed */ - NVM_BLBA_RLOCK_gc = (0x01<<4), /* Read not allowed */ - NVM_BLBA_RWLOCK_gc = (0x00<<4), /* Read and write not allowed */ -} NVM_BLBA_t; - -/* Boot lock bits - application table section */ -typedef enum NVM_BLBAT_enum -{ - NVM_BLBAT_NOLOCK_gc = (0x03<<2), /* No locks */ - NVM_BLBAT_WLOCK_gc = (0x02<<2), /* Write not allowed */ - NVM_BLBAT_RLOCK_gc = (0x01<<2), /* Read not allowed */ - NVM_BLBAT_RWLOCK_gc = (0x00<<2), /* Read and write not allowed */ -} NVM_BLBAT_t; - -/* Lock bits */ -typedef enum NVM_LB_enum -{ - NVM_LB_NOLOCK_gc = (0x03<<0), /* No locks */ - NVM_LB_WLOCK_gc = (0x02<<0), /* Write not allowed */ - NVM_LB_RWLOCK_gc = (0x00<<0), /* Read and write not allowed */ -} NVM_LB_t; - -/* Boot Loader Section Reset Vector */ -typedef enum BOOTRST_enum -{ - BOOTRST_BOOTLDR_gc = (0x00<<6), /* Boot Loader Reset */ - BOOTRST_APPLICATION_gc = (0x01<<6), /* Application Reset */ -} BOOTRST_t; - -/* BOD operation */ -typedef enum BOD_enum -{ - BOD_INSAMPLEDMODE_gc = (0x01<<2), /* BOD enabled in sampled mode */ - BOD_CONTINOUSLY_gc = (0x02<<2), /* BOD enabled continuously */ - BOD_DISABLED_gc = (0x03<<2), /* BOD Disabled */ -} BOD_t; - -/* Watchdog (Window) Timeout Period */ -typedef enum WD_enum -{ - WD_8CLK_gc = (0x00<<4), /* 8 cycles (8ms @ 3.3V) */ - WD_16CLK_gc = (0x01<<4), /* 16 cycles (16ms @ 3.3V) */ - WD_32CLK_gc = (0x02<<4), /* 32 cycles (32ms @ 3.3V) */ - WD_64CLK_gc = (0x03<<4), /* 64 cycles (64ms @ 3.3V) */ - WD_128CLK_gc = (0x04<<4), /* 128 cycles (0.125s @ 3.3V) */ - WD_256CLK_gc = (0x05<<4), /* 256 cycles (0.25s @ 3.3V) */ - WD_512CLK_gc = (0x06<<4), /* 512 cycles (0.5s @ 3.3V) */ - WD_1KCLK_gc = (0x07<<4), /* 1K cycles (1s @ 3.3V) */ - WD_2KCLK_gc = (0x08<<4), /* 2K cycles (2s @ 3.3V) */ - WD_4KCLK_gc = (0x09<<4), /* 4K cycles (4s @ 3.3V) */ - WD_8KCLK_gc = (0x0A<<4), /* 8K cycles (8s @ 3.3V) */ -} WD_t; - -/* Start-up Time */ -typedef enum SUT_enum -{ - SUT_0MS_gc = (0x03<<2), /* 0 ms */ - SUT_4MS_gc = (0x01<<2), /* 4 ms */ - SUT_64MS_gc = (0x00<<2), /* 64 ms */ -} SUT_t; - -/* Brown Out Detection Voltage Level */ -typedef enum BODLVL_enum -{ - BODLVL_1V6_gc = (0x07<<0), /* 1.6 V */ - BODLVL_1V8_gc = (0x06<<0), /* 1.8 V */ - BODLVL_2V0_gc = (0x05<<0), /* 2.0 V */ - BODLVL_2V2_gc = (0x04<<0), /* 2.2 V */ - BODLVL_2V4_gc = (0x03<<0), /* 2.4 V */ - BODLVL_2V7_gc = (0x02<<0), /* 2.7 V */ - BODLVL_2V9_gc = (0x01<<0), /* 2.9 V */ - BODLVL_3V2_gc = (0x00<<0), /* 3.2 V */ -} BODLVL_t; - - -/* --------------------------------------------------------------------------- -AC - Analog Comparator --------------------------------------------------------------------------- -*/ - -/* Analog Comparator */ -typedef struct AC_struct -{ - register8_t AC0CTRL; /* Comparator 0 Control */ - register8_t AC1CTRL; /* Comparator 1 Control */ - register8_t AC0MUXCTRL; /* Comparator 0 MUX Control */ - register8_t AC1MUXCTRL; /* Comparator 1 MUX Control */ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t WINCTRL; /* Window Mode Control */ - register8_t STATUS; /* Status */ -} AC_t; - -/* Interrupt mode */ -typedef enum AC_INTMODE_enum -{ - AC_INTMODE_BOTHEDGES_gc = (0x00<<6), /* Interrupt on both edges */ - AC_INTMODE_FALLING_gc = (0x02<<6), /* Interrupt on falling edge */ - AC_INTMODE_RISING_gc = (0x03<<6), /* Interrupt on rising edge */ -} AC_INTMODE_t; - -/* Interrupt level */ -typedef enum AC_INTLVL_enum -{ - AC_INTLVL_OFF_gc = (0x00<<4), /* Interrupt disabled */ - AC_INTLVL_LO_gc = (0x01<<4), /* Low level */ - AC_INTLVL_MED_gc = (0x02<<4), /* Medium level */ - AC_INTLVL_HI_gc = (0x03<<4), /* High level */ -} AC_INTLVL_t; - -/* Hysteresis mode selection */ -typedef enum AC_HYSMODE_enum -{ - AC_HYSMODE_NO_gc = (0x00<<1), /* No hysteresis */ - AC_HYSMODE_SMALL_gc = (0x01<<1), /* Small hysteresis */ - AC_HYSMODE_LARGE_gc = (0x02<<1), /* Large hysteresis */ -} AC_HYSMODE_t; - -/* Positive input multiplexer selection */ -typedef enum AC_MUXPOS_enum -{ - AC_MUXPOS_PIN0_gc = (0x00<<3), /* Pin 0 */ - AC_MUXPOS_PIN1_gc = (0x01<<3), /* Pin 1 */ - AC_MUXPOS_PIN2_gc = (0x02<<3), /* Pin 2 */ - AC_MUXPOS_PIN3_gc = (0x03<<3), /* Pin 3 */ - AC_MUXPOS_PIN4_gc = (0x04<<3), /* Pin 4 */ - AC_MUXPOS_PIN5_gc = (0x05<<3), /* Pin 5 */ - AC_MUXPOS_PIN6_gc = (0x06<<3), /* Pin 6 */ - AC_MUXPOS_DAC_gc = (0x07<<3), /* DAC output */ -} AC_MUXPOS_t; - -/* Negative input multiplexer selection */ -typedef enum AC_MUXNEG_enum -{ - AC_MUXNEG_PIN0_gc = (0x00<<0), /* Pin 0 */ - AC_MUXNEG_PIN1_gc = (0x01<<0), /* Pin 1 */ - AC_MUXNEG_PIN3_gc = (0x02<<0), /* Pin 3 */ - AC_MUXNEG_PIN5_gc = (0x03<<0), /* Pin 5 */ - AC_MUXNEG_PIN7_gc = (0x04<<0), /* Pin 7 */ - AC_MUXNEG_DAC_gc = (0x05<<0), /* DAC output */ - AC_MUXNEG_BANDGAP_gc = (0x06<<0), /* Bandgap Reference */ - AC_MUXNEG_SCALER_gc = (0x07<<0), /* Internal voltage scaler */ -} AC_MUXNEG_t; - -/* Windows interrupt mode */ -typedef enum AC_WINTMODE_enum -{ - AC_WINTMODE_ABOVE_gc = (0x00<<2), /* Interrupt on above window */ - AC_WINTMODE_INSIDE_gc = (0x01<<2), /* Interrupt on inside window */ - AC_WINTMODE_BELOW_gc = (0x02<<2), /* Interrupt on below window */ - AC_WINTMODE_OUTSIDE_gc = (0x03<<2), /* Interrupt on outside window */ -} AC_WINTMODE_t; - -/* Window interrupt level */ -typedef enum AC_WINTLVL_enum -{ - AC_WINTLVL_OFF_gc = (0x00<<0), /* Interrupt disabled */ - AC_WINTLVL_LO_gc = (0x01<<0), /* Low priority */ - AC_WINTLVL_MED_gc = (0x02<<0), /* Medium priority */ - AC_WINTLVL_HI_gc = (0x03<<0), /* High priority */ -} AC_WINTLVL_t; - -/* Window mode state */ -typedef enum AC_WSTATE_enum -{ - AC_WSTATE_ABOVE_gc = (0x00<<6), /* Signal above window */ - AC_WSTATE_INSIDE_gc = (0x01<<6), /* Signal inside window */ - AC_WSTATE_BELOW_gc = (0x02<<6), /* Signal below window */ -} AC_WSTATE_t; - - -/* --------------------------------------------------------------------------- -ADC - Analog/Digital Converter --------------------------------------------------------------------------- -*/ - -/* ADC Channel */ -typedef struct ADC_CH_struct -{ - register8_t CTRL; /* Control Register */ - register8_t MUXCTRL; /* MUX Control */ - register8_t INTCTRL; /* Channel Interrupt Control */ - register8_t INTFLAGS; /* Interrupt Flags */ - _WORDREGISTER(RES); /* Channel Result */ - register8_t reserved_0x6; - register8_t reserved_0x7; -} ADC_CH_t; - -/* --------------------------------------------------------------------------- -ADC - Analog/Digital Converter --------------------------------------------------------------------------- -*/ - -/* Analog-to-Digital Converter */ -typedef struct ADC_struct -{ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t REFCTRL; /* Reference Control */ - register8_t EVCTRL; /* Event Control */ - register8_t PRESCALER; /* Clock Prescaler */ - register8_t CALCTRL; /* Calibration Control Register */ - register8_t INTFLAGS; /* Interrupt Flags */ - register8_t reserved_0x07; - register8_t reserved_0x08; - register8_t reserved_0x09; - register8_t reserved_0x0A; - register8_t reserved_0x0B; - register8_t CALIB; /* Calibration Value */ - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t reserved_0x0F; - _WORDREGISTER(CH0RES); /* Channel 0 Result */ - _WORDREGISTER(CH1RES); /* Channel 1 Result */ - _WORDREGISTER(CH2RES); /* Channel 2 Result */ - _WORDREGISTER(CH3RES); /* Channel 3 Result */ - _WORDREGISTER(CMP); /* Compare Value */ - register8_t reserved_0x1A; - register8_t reserved_0x1B; - register8_t reserved_0x1C; - register8_t reserved_0x1D; - register8_t reserved_0x1E; - register8_t reserved_0x1F; - ADC_CH_t CH0; /* ADC Channel 0 */ - ADC_CH_t CH1; /* ADC Channel 1 */ - ADC_CH_t CH2; /* ADC Channel 2 */ - ADC_CH_t CH3; /* ADC Channel 3 */ -} ADC_t; - -/* Positive input multiplexer selection */ -typedef enum ADC_CH_MUXPOS_enum -{ - ADC_CH_MUXPOS_PIN0_gc = (0x00<<3), /* Input pin 0 */ - ADC_CH_MUXPOS_PIN1_gc = (0x01<<3), /* Input pin 1 */ - ADC_CH_MUXPOS_PIN2_gc = (0x02<<3), /* Input pin 2 */ - ADC_CH_MUXPOS_PIN3_gc = (0x03<<3), /* Input pin 3 */ - ADC_CH_MUXPOS_PIN4_gc = (0x04<<3), /* Input pin 4 */ - ADC_CH_MUXPOS_PIN5_gc = (0x05<<3), /* Input pin 5 */ - ADC_CH_MUXPOS_PIN6_gc = (0x06<<3), /* Input pin 6 */ - ADC_CH_MUXPOS_PIN7_gc = (0x07<<3), /* Input pin 7 */ -} ADC_CH_MUXPOS_t; - -/* Internal input multiplexer selections */ -typedef enum ADC_CH_MUXINT_enum -{ - ADC_CH_MUXINT_TEMP_gc = (0x00<<3), /* Temperature Reference */ - ADC_CH_MUXINT_BANDGAP_gc = (0x01<<3), /* Bandgap Reference */ - ADC_CH_MUXINT_SCALEDVCC_gc = (0x02<<3), /* 1/10 scaled VCC */ - ADC_CH_MUXINT_DAC_gc = (0x03<<3), /* DAC output */ -} ADC_CH_MUXINT_t; - -/* Negative input multiplexer selection */ -typedef enum ADC_CH_MUXNEG_enum -{ - ADC_CH_MUXNEG_PIN0_gc = (0x00<<0), /* Input pin 0 */ - ADC_CH_MUXNEG_PIN1_gc = (0x01<<0), /* Input pin 1 */ - ADC_CH_MUXNEG_PIN2_gc = (0x02<<0), /* Input pin 2 */ - ADC_CH_MUXNEG_PIN3_gc = (0x03<<0), /* Input pin 3 */ - ADC_CH_MUXNEG_PIN4_gc = (0x04<<0), /* Input pin 4 */ - ADC_CH_MUXNEG_PIN5_gc = (0x05<<0), /* Input pin 5 */ - ADC_CH_MUXNEG_PIN6_gc = (0x06<<0), /* Input pin 6 */ - ADC_CH_MUXNEG_PIN7_gc = (0x07<<0), /* Input pin 7 */ -} ADC_CH_MUXNEG_t; - -/* Input mode */ -typedef enum ADC_CH_INPUTMODE_enum -{ - ADC_CH_INPUTMODE_INTERNAL_gc = (0x00<<0), /* Internal inputs, no gain */ - ADC_CH_INPUTMODE_SINGLEENDED_gc = (0x01<<0), /* Single-ended input, no gain */ - ADC_CH_INPUTMODE_DIFF_gc = (0x02<<0), /* Differential input, no gain */ - ADC_CH_INPUTMODE_DIFFWGAIN_gc = (0x03<<0), /* Differential input, with gain */ -} ADC_CH_INPUTMODE_t; - -/* Gain factor */ -typedef enum ADC_CH_GAIN_enum -{ - ADC_CH_GAIN_1X_gc = (0x00<<2), /* 1x gain */ - ADC_CH_GAIN_2X_gc = (0x01<<2), /* 2x gain */ - ADC_CH_GAIN_4X_gc = (0x02<<2), /* 4x gain */ - ADC_CH_GAIN_8X_gc = (0x03<<2), /* 8x gain */ - ADC_CH_GAIN_16X_gc = (0x04<<2), /* 16x gain */ - ADC_CH_GAIN_32X_gc = (0x05<<2), /* 32x gain */ - ADC_CH_GAIN_64X_gc = (0x06<<2), /* 64x gain */ -} ADC_CH_GAIN_t; - -/* Conversion result resolution */ -typedef enum ADC_RESOLUTION_enum -{ - ADC_RESOLUTION_12BIT_gc = (0x00<<1), /* 12-bit right-adjusted result */ - ADC_RESOLUTION_8BIT_gc = (0x02<<1), /* 8-bit right-adjusted result */ - ADC_RESOLUTION_LEFT12BIT_gc = (0x03<<1), /* 12-bit left-adjusted result */ -} ADC_RESOLUTION_t; - -/* Voltage reference selection */ -typedef enum ADC_REFSEL_enum -{ - ADC_REFSEL_INT1V_gc = (0x00<<4), /* Internal 1V */ - ADC_REFSEL_VCC_gc = (0x01<<4), /* Internal VCC / 1.6V */ - ADC_REFSEL_AREFA_gc = (0x02<<4), /* External reference on PORT A */ - ADC_REFSEL_AREFB_gc = (0x03<<4), /* External reference on PORT B */ -} ADC_REFSEL_t; - -/* Channel sweep selection */ -typedef enum ADC_SWEEP_enum -{ - ADC_SWEEP_0_gc = (0x00<<6), /* ADC Channel 0 */ - ADC_SWEEP_01_gc = (0x01<<6), /* ADC Channel 0,1 */ - ADC_SWEEP_012_gc = (0x02<<6), /* ADC Channel 0,1,2 */ - ADC_SWEEP_0123_gc = (0x03<<6), /* ADC Channel 0,1,2,3 */ -} ADC_SWEEP_t; - -/* Event channel input selection */ -typedef enum ADC_EVSEL_enum -{ - ADC_EVSEL_0123_gc = (0x00<<3), /* Event Channel 0,1,2,3 */ - ADC_EVSEL_1234_gc = (0x01<<3), /* Event Channel 1,2,3,4 */ - ADC_EVSEL_2345_gc = (0x02<<3), /* Event Channel 2,3,4,5 */ - ADC_EVSEL_3456_gc = (0x03<<3), /* Event Channel 3,4,5,6 */ - ADC_EVSEL_4567_gc = (0x04<<3), /* Event Channel 4,5,6,7 */ - ADC_EVSEL_567_gc = (0x05<<3), /* Event Channel 5,6,7 */ - ADC_EVSEL_67_gc = (0x06<<3), /* Event Channel 6,7 */ - ADC_EVSEL_7_gc = (0x07<<3), /* Event Channel 7 */ -} ADC_EVSEL_t; - -/* Event action selection */ -typedef enum ADC_EVACT_enum -{ - ADC_EVACT_NONE_gc = (0x00<<0), /* No event action */ - ADC_EVACT_CH0_gc = (0x01<<0), /* First event triggers channel 0 */ - ADC_EVACT_CH01_gc = (0x02<<0), /* First two events trigger channel 0,1 */ - ADC_EVACT_CH012_gc = (0x03<<0), /* First three events trigger channel 0,1,2 */ - ADC_EVACT_CH0123_gc = (0x04<<0), /* Events trigger channel 0,1,2,3 */ - ADC_EVACT_SWEEP_gc = (0x05<<0), /* First event triggers sweep */ - ADC_EVACT_SYNCHSWEEP_gc = (0x06<<0), /* First event triggers synchronized sweep */ -} ADC_EVACT_t; - -/* Interupt mode */ -typedef enum ADC_CH_INTMODE_enum -{ - ADC_CH_INTMODE_COMPLETE_gc = (0x00<<2), /* Interrupt on conversion complete */ - ADC_CH_INTMODE_BELOW_gc = (0x01<<2), /* Interrupt on result below compare value */ - ADC_CH_INTMODE_ABOVE_gc = (0x03<<2), /* Interrupt on result above compare value */ -} ADC_CH_INTMODE_t; - -/* Interrupt level */ -typedef enum ADC_CH_INTLVL_enum -{ - ADC_CH_INTLVL_OFF_gc = (0x00<<0), /* Interrupt disabled */ - ADC_CH_INTLVL_LO_gc = (0x01<<0), /* Low level */ - ADC_CH_INTLVL_MED_gc = (0x02<<0), /* Medium level */ - ADC_CH_INTLVL_HI_gc = (0x03<<0), /* High level */ -} ADC_CH_INTLVL_t; - -/* DMA request selection */ -typedef enum ADC_DMASEL_enum -{ - ADC_DMASEL_OFF_gc = (0x00<<5), /* Combined DMA request OFF */ - ADC_DMASEL_CH01_gc = (0x01<<5), /* ADC Channel 0 or 1 */ - ADC_DMASEL_CH012_gc = (0x02<<5), /* ADC Channel 0 or 1 or 2 */ - ADC_DMASEL_CH0123_gc = (0x03<<5), /* ADC Channel 0 or 1 or 2 or 3 */ -} ADC_DMASEL_t; - -/* Clock prescaler */ -typedef enum ADC_PRESCALER_enum -{ - ADC_PRESCALER_DIV4_gc = (0x00<<0), /* Divide clock by 4 */ - ADC_PRESCALER_DIV8_gc = (0x01<<0), /* Divide clock by 8 */ - ADC_PRESCALER_DIV16_gc = (0x02<<0), /* Divide clock by 16 */ - ADC_PRESCALER_DIV32_gc = (0x03<<0), /* Divide clock by 32 */ - ADC_PRESCALER_DIV64_gc = (0x04<<0), /* Divide clock by 64 */ - ADC_PRESCALER_DIV128_gc = (0x05<<0), /* Divide clock by 128 */ - ADC_PRESCALER_DIV256_gc = (0x06<<0), /* Divide clock by 256 */ - ADC_PRESCALER_DIV512_gc = (0x07<<0), /* Divide clock by 512 */ -} ADC_PRESCALER_t; - - -/* --------------------------------------------------------------------------- -DAC - Digital/Analog Converter --------------------------------------------------------------------------- -*/ - -/* Digital-to-Analog Converter */ -typedef struct DAC_struct -{ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t CTRLC; /* Control Register C */ - register8_t EVCTRL; /* Event Input Control */ - register8_t TIMCTRL; /* Timing Control */ - register8_t STATUS; /* Status */ - register8_t reserved_0x06; - register8_t reserved_0x07; - register8_t GAINCAL; /* Gain Calibration */ - register8_t OFFSETCAL; /* Offset Calibration */ - register8_t reserved_0x0A; - register8_t reserved_0x0B; - register8_t reserved_0x0C; - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t reserved_0x0F; - register8_t reserved_0x10; - register8_t reserved_0x11; - register8_t reserved_0x12; - register8_t reserved_0x13; - register8_t reserved_0x14; - register8_t reserved_0x15; - register8_t reserved_0x16; - register8_t reserved_0x17; - _WORDREGISTER(CH0DATA); /* Channel 0 Data */ - _WORDREGISTER(CH1DATA); /* Channel 1 Data */ -} DAC_t; - -/* Output channel selection */ -typedef enum DAC_CHSEL_enum -{ - DAC_CHSEL_SINGLE_gc = (0x00<<5), /* Single channel operation (Channel A only) */ - DAC_CHSEL_DUAL_gc = (0x02<<5), /* Dual channel operation (S/H on both channels) */ -} DAC_CHSEL_t; - -/* Reference voltage selection */ -typedef enum DAC_REFSEL_enum -{ - DAC_REFSEL_INT1V_gc = (0x00<<3), /* Internal 1V */ - DAC_REFSEL_AVCC_gc = (0x01<<3), /* Analog supply voltage */ - DAC_REFSEL_AREFA_gc = (0x02<<3), /* External reference on AREF on PORTA */ - DAC_REFSEL_AREFB_gc = (0x03<<3), /* External reference on AREF on PORTB */ -} DAC_REFSEL_t; - -/* Event channel selection */ -typedef enum DAC_EVSEL_enum -{ - DAC_EVSEL_0_gc = (0x00<<0), /* Event Channel 0 */ - DAC_EVSEL_1_gc = (0x01<<0), /* Event Channel 1 */ - DAC_EVSEL_2_gc = (0x02<<0), /* Event Channel 2 */ - DAC_EVSEL_3_gc = (0x03<<0), /* Event Channel 3 */ - DAC_EVSEL_4_gc = (0x04<<0), /* Event Channel 4 */ - DAC_EVSEL_5_gc = (0x05<<0), /* Event Channel 5 */ - DAC_EVSEL_6_gc = (0x06<<0), /* Event Channel 6 */ - DAC_EVSEL_7_gc = (0x07<<0), /* Event Channel 7 */ -} DAC_EVSEL_t; - -/* Conversion interval */ -typedef enum DAC_CONINTVAL_enum -{ - DAC_CONINTVAL_1CLK_gc = (0x00<<4), /* 1 CLK / 2 CLK in S/H mode */ - DAC_CONINTVAL_2CLK_gc = (0x01<<4), /* 2 CLK / 3 CLK in S/H mode */ - DAC_CONINTVAL_4CLK_gc = (0x02<<4), /* 4 CLK / 6 CLK in S/H mode */ - DAC_CONINTVAL_8CLK_gc = (0x03<<4), /* 8 CLK / 12 CLK in S/H mode */ - DAC_CONINTVAL_16CLK_gc = (0x04<<4), /* 16 CLK / 24 CLK in S/H mode */ - DAC_CONINTVAL_32CLK_gc = (0x05<<4), /* 32 CLK / 48 CLK in S/H mode */ - DAC_CONINTVAL_64CLK_gc = (0x06<<4), /* 64 CLK / 96 CLK in S/H mode */ - DAC_CONINTVAL_128CLK_gc = (0x07<<4), /* 128 CLK / 192 CLK in S/H mode */ -} DAC_CONINTVAL_t; - -/* Refresh rate */ -typedef enum DAC_REFRESH_enum -{ - DAC_REFRESH_16CLK_gc = (0x00<<0), /* 16 CLK */ - DAC_REFRESH_32CLK_gc = (0x01<<0), /* 32 CLK */ - DAC_REFRESH_64CLK_gc = (0x02<<0), /* 64 CLK */ - DAC_REFRESH_128CLK_gc = (0x03<<0), /* 128 CLK */ - DAC_REFRESH_256CLK_gc = (0x04<<0), /* 256 CLK */ - DAC_REFRESH_512CLK_gc = (0x05<<0), /* 512 CLK */ - DAC_REFRESH_1024CLK_gc = (0x06<<0), /* 1024 CLK */ - DAC_REFRESH_2048CLK_gc = (0x07<<0), /* 2048 CLK */ - DAC_REFRESH_4086CLK_gc = (0x08<<0), /* 4096 CLK */ - DAC_REFRESH_8192CLK_gc = (0x09<<0), /* 8192 CLK */ - DAC_REFRESH_16384CLK_gc = (0x0A<<0), /* 16384 CLK */ - DAC_REFRESH_32768CLK_gc = (0x0B<<0), /* 32768 CLK */ - DAC_REFRESH_65536CLK_gc = (0x0C<<0), /* 65536 CLK */ - DAC_REFRESH_OFF_gc = (0x0F<<0), /* Auto refresh OFF */ -} DAC_REFRESH_t; - - -/* --------------------------------------------------------------------------- -RTC32 - 32-bit Real-Time Counter --------------------------------------------------------------------------- -*/ - -/* 32-bit Real-Time Clounter */ -typedef struct RTC32_struct -{ - register8_t CTRL; /* Control Register */ - register8_t SYNCCTRL; /* Synchronization Control/Status Register */ - register8_t INTCTRL; /* Interrupt Control Register */ - register8_t INTFLAGS; /* Interrupt Flags */ -} RTC32_t; - -/* Compare Interrupt level */ -typedef enum RTC32_COMPINTLVL_enum -{ - RTC32_COMPINTLVL_OFF_gc = (0x00<<2), /* Interrupt Disabled */ - RTC32_COMPINTLVL_LO_gc = (0x01<<2), /* Low Level */ - RTC32_COMPINTLVL_MED_gc = (0x02<<2), /* Medium Level */ - RTC32_COMPINTLVL_HI_gc = (0x03<<2), /* High Level */ -} RTC32_COMPINTLVL_t; - -/* Overflow Interrupt level */ -typedef enum RTC32_OVFINTLVL_enum -{ - RTC32_OVFINTLVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - RTC32_OVFINTLVL_LO_gc = (0x01<<0), /* Low Level */ - RTC32_OVFINTLVL_MED_gc = (0x02<<0), /* Medium Level */ - RTC32_OVFINTLVL_HI_gc = (0x03<<0), /* High Level */ -} RTC32_OVFINTLVL_t; - - -/* --------------------------------------------------------------------------- -EBI - External Bus Interface --------------------------------------------------------------------------- -*/ - -/* EBI Chip Select Module */ -typedef struct EBI_CS_struct -{ - register8_t CTRLA; /* Chip Select Control Register A */ - register8_t CTRLB; /* Chip Select Control Register B */ - _WORDREGISTER(BASEADDR); /* Chip Select Base Address */ -} EBI_CS_t; - -/* --------------------------------------------------------------------------- -EBI - External Bus Interface --------------------------------------------------------------------------- -*/ - -/* External Bus Interface */ -typedef struct EBI_struct -{ - register8_t CTRL; /* Control */ - register8_t SDRAMCTRLA; /* SDRAM Control Register A */ - register8_t reserved_0x02; - register8_t reserved_0x03; - _WORDREGISTER(REFRESH); /* SDRAM Refresh Period */ - _WORDREGISTER(INITDLY); /* SDRAM Initialization Delay */ - register8_t SDRAMCTRLB; /* SDRAM Control Register B */ - register8_t SDRAMCTRLC; /* SDRAM Control Register C */ - register8_t reserved_0x0A; - register8_t reserved_0x0B; - register8_t reserved_0x0C; - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t reserved_0x0F; - EBI_CS_t CS0; /* Chip Select 0 */ - EBI_CS_t CS1; /* Chip Select 1 */ - EBI_CS_t CS2; /* Chip Select 2 */ - EBI_CS_t CS3; /* Chip Select 3 */ -} EBI_t; - -/* Chip Select adress space */ -typedef enum EBI_CS_ASPACE_enum -{ - EBI_CS_ASPACE_256B_gc = (0x00<<2), /* 256 bytes */ - EBI_CS_ASPACE_512B_gc = (0x01<<2), /* 512 bytes */ - EBI_CS_ASPACE_1KB_gc = (0x02<<2), /* 1K bytes */ - EBI_CS_ASPACE_2KB_gc = (0x03<<2), /* 2K bytes */ - EBI_CS_ASPACE_4KB_gc = (0x04<<2), /* 4K bytes */ - EBI_CS_ASPACE_8KB_gc = (0x05<<2), /* 8K bytes */ - EBI_CS_ASPACE_16KB_gc = (0x06<<2), /* 16K bytes */ - EBI_CS_ASPACE_32KB_gc = (0x07<<2), /* 32K bytes */ - EBI_CS_ASPACE_64KB_gc = (0x08<<2), /* 64K bytes */ - EBI_CS_ASPACE_128KB_gc = (0x09<<2), /* 128K bytes */ - EBI_CS_ASPACE_256KB_gc = (0x0A<<2), /* 256K bytes */ - EBI_CS_ASPACE_512KB_gc = (0x0B<<2), /* 512K bytes */ - EBI_CS_ASPACE_1MB_gc = (0x0C<<2), /* 1M bytes */ - EBI_CS_ASPACE_2MB_gc = (0x0D<<2), /* 2M bytes */ - EBI_CS_ASPACE_4MB_gc = (0x0E<<2), /* 4M bytes */ - EBI_CS_ASPACE_8MB_gc = (0x0F<<2), /* 8M bytes */ - EBI_CS_ASPACE_16M_gc = (0x10<<2), /* 16M bytes */ -} EBI_CS_ASPACE_t; - -/* */ -typedef enum EBI_CS_SRWS_enum -{ - EBI_CS_SRWS_0CLK_gc = (0x00<<0), /* 0 cycles */ - EBI_CS_SRWS_1CLK_gc = (0x01<<0), /* 1 cycle */ - EBI_CS_SRWS_2CLK_gc = (0x02<<0), /* 2 cycles */ - EBI_CS_SRWS_3CLK_gc = (0x03<<0), /* 3 cycles */ - EBI_CS_SRWS_4CLK_gc = (0x04<<0), /* 4 cycles */ - EBI_CS_SRWS_5CLK_gc = (0x05<<0), /* 5 cycle */ - EBI_CS_SRWS_6CLK_gc = (0x06<<0), /* 6 cycles */ - EBI_CS_SRWS_7CLK_gc = (0x07<<0), /* 7 cycles */ -} EBI_CS_SRWS_t; - -/* Chip Select address mode */ -typedef enum EBI_CS_MODE_enum -{ - EBI_CS_MODE_DISABLED_gc = (0x00<<0), /* Chip Select Disabled */ - EBI_CS_MODE_SRAM_gc = (0x01<<0), /* Chip Select in SRAM mode */ - EBI_CS_MODE_LPC_gc = (0x02<<0), /* Chip Select in SRAM LPC mode */ - EBI_CS_MODE_SDRAM_gc = (0x03<<0), /* Chip Select in SDRAM mode */ -} EBI_CS_MODE_t; - -/* Chip Select SDRAM mode */ -typedef enum EBI_CS_SDMODE_enum -{ - EBI_CS_SDMODE_NORMAL_gc = (0x00<<0), /* Normal mode */ - EBI_CS_SDMODE_LOAD_gc = (0x01<<0), /* Load Mode Register command mode */ -} EBI_CS_SDMODE_t; - -/* */ -typedef enum EBI_SDDATAW_enum -{ - EBI_SDDATAW_4BIT_gc = (0x00<<6), /* 4-bit data bus */ - EBI_SDDATAW_8BIT_gc = (0x01<<6), /* 8-bit data bus */ -} EBI_SDDATAW_t; - -/* */ -typedef enum EBI_LPCMODE_enum -{ - EBI_LPCMODE_ALE1_gc = (0x00<<4), /* Data muxed with addr byte 0 */ - EBI_LPCMODE_ALE12_gc = (0x02<<4), /* Data muxed with addr byte 0 and 1 */ -} EBI_LPCMODE_t; - -/* */ -typedef enum EBI_SRMODE_enum -{ - EBI_SRMODE_ALE1_gc = (0x00<<2), /* Addr byte 0 muxed with 1 */ - EBI_SRMODE_ALE2_gc = (0x01<<2), /* Addr byte 0 muxed with 2 */ - EBI_SRMODE_ALE12_gc = (0x02<<2), /* Addr byte 0 muxed with 1 and 2 */ - EBI_SRMODE_NOALE_gc = (0x03<<2), /* No addr muxing */ -} EBI_SRMODE_t; - -/* */ -typedef enum EBI_IFMODE_enum -{ - EBI_IFMODE_DISABLED_gc = (0x00<<0), /* EBI Disabled */ - EBI_IFMODE_3PORT_gc = (0x01<<0), /* 3-port mode */ - EBI_IFMODE_4PORT_gc = (0x02<<0), /* 4-port mode */ - EBI_IFMODE_2PORT_gc = (0x03<<0), /* 2-port mode */ -} EBI_IFMODE_t; - -/* */ -typedef enum EBI_SDCOL_enum -{ - EBI_SDCOL_8BIT_gc = (0x00<<0), /* 8 column bits */ - EBI_SDCOL_9BIT_gc = (0x01<<0), /* 9 column bits */ - EBI_SDCOL_10BIT_gc = (0x02<<0), /* 10 column bits */ - EBI_SDCOL_11BIT_gc = (0x03<<0), /* 11 column bits */ -} EBI_SDCOL_t; - -/* */ -typedef enum EBI_MRDLY_enum -{ - EBI_MRDLY_0CLK_gc = (0x00<<6), /* 0 cycles */ - EBI_MRDLY_1CLK_gc = (0x01<<6), /* 1 cycle */ - EBI_MRDLY_2CLK_gc = (0x02<<6), /* 2 cycles */ - EBI_MRDLY_3CLK_gc = (0x03<<6), /* 3 cycles */ -} EBI_MRDLY_t; - -/* */ -typedef enum EBI_ROWCYCDLY_enum -{ - EBI_ROWCYCDLY_0CLK_gc = (0x00<<3), /* 0 cycles */ - EBI_ROWCYCDLY_1CLK_gc = (0x01<<3), /* 1 cycle */ - EBI_ROWCYCDLY_2CLK_gc = (0x02<<3), /* 2 cycles */ - EBI_ROWCYCDLY_3CLK_gc = (0x03<<3), /* 3 cycles */ - EBI_ROWCYCDLY_4CLK_gc = (0x04<<3), /* 4 cycles */ - EBI_ROWCYCDLY_5CLK_gc = (0x05<<3), /* 5 cycle */ - EBI_ROWCYCDLY_6CLK_gc = (0x06<<3), /* 6 cycles */ - EBI_ROWCYCDLY_7CLK_gc = (0x07<<3), /* 7 cycles */ -} EBI_ROWCYCDLY_t; - -/* */ -typedef enum EBI_RPDLY_enum -{ - EBI_RPDLY_0CLK_gc = (0x00<<0), /* 0 cycles */ - EBI_RPDLY_1CLK_gc = (0x01<<0), /* 1 cycle */ - EBI_RPDLY_2CLK_gc = (0x02<<0), /* 2 cycles */ - EBI_RPDLY_3CLK_gc = (0x03<<0), /* 3 cycles */ - EBI_RPDLY_4CLK_gc = (0x04<<0), /* 4 cycles */ - EBI_RPDLY_5CLK_gc = (0x05<<0), /* 5 cycle */ - EBI_RPDLY_6CLK_gc = (0x06<<0), /* 6 cycles */ - EBI_RPDLY_7CLK_gc = (0x07<<0), /* 7 cycles */ -} EBI_RPDLY_t; - -/* */ -typedef enum EBI_WRDLY_enum -{ - EBI_WRDLY_0CLK_gc = (0x00<<6), /* 0 cycles */ - EBI_WRDLY_1CLK_gc = (0x01<<6), /* 1 cycle */ - EBI_WRDLY_2CLK_gc = (0x02<<6), /* 2 cycles */ - EBI_WRDLY_3CLK_gc = (0x03<<6), /* 3 cycles */ -} EBI_WRDLY_t; - -/* */ -typedef enum EBI_ESRDLY_enum -{ - EBI_ESRDLY_0CLK_gc = (0x00<<3), /* 0 cycles */ - EBI_ESRDLY_1CLK_gc = (0x01<<3), /* 1 cycle */ - EBI_ESRDLY_2CLK_gc = (0x02<<3), /* 2 cycles */ - EBI_ESRDLY_3CLK_gc = (0x03<<3), /* 3 cycles */ - EBI_ESRDLY_4CLK_gc = (0x04<<3), /* 4 cycles */ - EBI_ESRDLY_5CLK_gc = (0x05<<3), /* 5 cycle */ - EBI_ESRDLY_6CLK_gc = (0x06<<3), /* 6 cycles */ - EBI_ESRDLY_7CLK_gc = (0x07<<3), /* 7 cycles */ -} EBI_ESRDLY_t; - -/* */ -typedef enum EBI_ROWCOLDLY_enum -{ - EBI_ROWCOLDLY_0CLK_gc = (0x00<<0), /* 0 cycles */ - EBI_ROWCOLDLY_1CLK_gc = (0x01<<0), /* 1 cycle */ - EBI_ROWCOLDLY_2CLK_gc = (0x02<<0), /* 2 cycles */ - EBI_ROWCOLDLY_3CLK_gc = (0x03<<0), /* 3 cycles */ - EBI_ROWCOLDLY_4CLK_gc = (0x04<<0), /* 4 cycles */ - EBI_ROWCOLDLY_5CLK_gc = (0x05<<0), /* 5 cycle */ - EBI_ROWCOLDLY_6CLK_gc = (0x06<<0), /* 6 cycles */ - EBI_ROWCOLDLY_7CLK_gc = (0x07<<0), /* 7 cycles */ -} EBI_ROWCOLDLY_t; - - -/* --------------------------------------------------------------------------- -TWI - Two-Wire Interface --------------------------------------------------------------------------- -*/ - -/* */ -typedef struct TWI_MASTER_struct -{ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t CTRLC; /* Control Register C */ - register8_t STATUS; /* Status Register */ - register8_t BAUD; /* Baurd Rate Control Register */ - register8_t ADDR; /* Address Register */ - register8_t DATA; /* Data Register */ -} TWI_MASTER_t; - -/* --------------------------------------------------------------------------- -TWI - Two-Wire Interface --------------------------------------------------------------------------- -*/ - -/* */ -typedef struct TWI_SLAVE_struct -{ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t STATUS; /* Status Register */ - register8_t ADDR; /* Address Register */ - register8_t DATA; /* Data Register */ -} TWI_SLAVE_t; - -/* --------------------------------------------------------------------------- -TWI - Two-Wire Interface --------------------------------------------------------------------------- -*/ - -/* Two-Wire Interface */ -typedef struct TWI_struct -{ - register8_t CTRL; /* TWI Common Control Register */ - TWI_MASTER_t MASTER; /* TWI master module */ - TWI_SLAVE_t SLAVE; /* TWI slave module */ -} TWI_t; - -/* Master Interrupt Level */ -typedef enum TWI_MASTER_INTLVL_enum -{ - TWI_MASTER_INTLVL_OFF_gc = (0x00<<6), /* Interrupt Disabled */ - TWI_MASTER_INTLVL_LO_gc = (0x01<<6), /* Low Level */ - TWI_MASTER_INTLVL_MED_gc = (0x02<<6), /* Medium Level */ - TWI_MASTER_INTLVL_HI_gc = (0x03<<6), /* High Level */ -} TWI_MASTER_INTLVL_t; - -/* Inactive Timeout */ -typedef enum TWI_MASTER_TIMEOUT_enum -{ - TWI_MASTER_TIMEOUT_DISABLED_gc = (0x00<<2), /* Bus Timeout Disabled */ - TWI_MASTER_TIMEOUT_50US_gc = (0x01<<2), /* 50 Microseconds */ - TWI_MASTER_TIMEOUT_100US_gc = (0x02<<2), /* 100 Microseconds */ - TWI_MASTER_TIMEOUT_200US_gc = (0x03<<2), /* 200 Microseconds */ -} TWI_MASTER_TIMEOUT_t; - -/* Master Command */ -typedef enum TWI_MASTER_CMD_enum -{ - TWI_MASTER_CMD_NOACT_gc = (0x00<<0), /* No Action */ - TWI_MASTER_CMD_REPSTART_gc = (0x01<<0), /* Issue Repeated Start Condition */ - TWI_MASTER_CMD_RECVTRANS_gc = (0x02<<0), /* Receive or Transmit Data */ - TWI_MASTER_CMD_STOP_gc = (0x03<<0), /* Issue Stop Condition */ -} TWI_MASTER_CMD_t; - -/* Master Bus State */ -typedef enum TWI_MASTER_BUSSTATE_enum -{ - TWI_MASTER_BUSSTATE_UNKNOWN_gc = (0x00<<0), /* Unknown Bus State */ - TWI_MASTER_BUSSTATE_IDLE_gc = (0x01<<0), /* Bus is Idle */ - TWI_MASTER_BUSSTATE_OWNER_gc = (0x02<<0), /* This Module Controls The Bus */ - TWI_MASTER_BUSSTATE_BUSY_gc = (0x03<<0), /* The Bus is Busy */ -} TWI_MASTER_BUSSTATE_t; - -/* Slave Interrupt Level */ -typedef enum TWI_SLAVE_INTLVL_enum -{ - TWI_SLAVE_INTLVL_OFF_gc = (0x00<<6), /* Interrupt Disabled */ - TWI_SLAVE_INTLVL_LO_gc = (0x01<<6), /* Low Level */ - TWI_SLAVE_INTLVL_MED_gc = (0x02<<6), /* Medium Level */ - TWI_SLAVE_INTLVL_HI_gc = (0x03<<6), /* High Level */ -} TWI_SLAVE_INTLVL_t; - -/* Slave Command */ -typedef enum TWI_SLAVE_CMD_enum -{ - TWI_SLAVE_CMD_NOACT_gc = (0x00<<0), /* No Action */ - TWI_SLAVE_CMD_COMPTRANS_gc = (0x02<<0), /* Used To Complete a Transaction */ - TWI_SLAVE_CMD_RESPONSE_gc = (0x03<<0), /* Used in Response to Address/Data Interrupt */ -} TWI_SLAVE_CMD_t; - - -/* --------------------------------------------------------------------------- -PORT - Port Configuration --------------------------------------------------------------------------- -*/ - -/* I/O port Configuration */ -typedef struct PORTCFG_struct -{ - register8_t MPCMASK; /* Multi-pin Configuration Mask */ - register8_t reserved_0x01; - register8_t VPCTRLA; /* Virtual Port Control Register A */ - register8_t VPCTRLB; /* Virtual Port Control Register B */ - register8_t CLKEVOUT; /* Clock and Event Out Register */ -} PORTCFG_t; - -/* --------------------------------------------------------------------------- -PORT - Port Configuration --------------------------------------------------------------------------- -*/ - -/* Virtual Port */ -typedef struct VPORT_struct -{ - register8_t DIR; /* I/O Port Data Direction */ - register8_t OUT; /* I/O Port Output */ - register8_t IN; /* I/O Port Input */ - register8_t INTFLAGS; /* Interrupt Flag Register */ -} VPORT_t; - -/* --------------------------------------------------------------------------- -PORT - Port Configuration --------------------------------------------------------------------------- -*/ - -/* I/O Ports */ -typedef struct PORT_struct -{ - register8_t DIR; /* I/O Port Data Direction */ - register8_t DIRSET; /* I/O Port Data Direction Set */ - register8_t DIRCLR; /* I/O Port Data Direction Clear */ - register8_t DIRTGL; /* I/O Port Data Direction Toggle */ - register8_t OUT; /* I/O Port Output */ - register8_t OUTSET; /* I/O Port Output Set */ - register8_t OUTCLR; /* I/O Port Output Clear */ - register8_t OUTTGL; /* I/O Port Output Toggle */ - register8_t IN; /* I/O port Input */ - register8_t INTCTRL; /* Interrupt Control Register */ - register8_t INT0MASK; /* Port Interrupt 0 Mask */ - register8_t INT1MASK; /* Port Interrupt 1 Mask */ - register8_t INTFLAGS; /* Interrupt Flag Register */ - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t reserved_0x0F; - register8_t PIN0CTRL; /* Pin 0 Control Register */ - register8_t PIN1CTRL; /* Pin 1 Control Register */ - register8_t PIN2CTRL; /* Pin 2 Control Register */ - register8_t PIN3CTRL; /* Pin 3 Control Register */ - register8_t PIN4CTRL; /* Pin 4 Control Register */ - register8_t PIN5CTRL; /* Pin 5 Control Register */ - register8_t PIN6CTRL; /* Pin 6 Control Register */ - register8_t PIN7CTRL; /* Pin 7 Control Register */ -} PORT_t; - -/* Virtual Port 0 Mapping */ -typedef enum PORTCFG_VP0MAP_enum -{ - PORTCFG_VP0MAP_PORTA_gc = (0x00<<0), /* Mapped To PORTA */ - PORTCFG_VP0MAP_PORTB_gc = (0x01<<0), /* Mapped To PORTB */ - PORTCFG_VP0MAP_PORTC_gc = (0x02<<0), /* Mapped To PORTC */ - PORTCFG_VP0MAP_PORTD_gc = (0x03<<0), /* Mapped To PORTD */ - PORTCFG_VP0MAP_PORTE_gc = (0x04<<0), /* Mapped To PORTE */ - PORTCFG_VP0MAP_PORTF_gc = (0x05<<0), /* Mapped To PORTF */ - PORTCFG_VP0MAP_PORTG_gc = (0x06<<0), /* Mapped To PORTG */ - PORTCFG_VP0MAP_PORTH_gc = (0x07<<0), /* Mapped To PORTH */ - PORTCFG_VP0MAP_PORTJ_gc = (0x08<<0), /* Mapped To PORTJ */ - PORTCFG_VP0MAP_PORTK_gc = (0x09<<0), /* Mapped To PORTK */ - PORTCFG_VP0MAP_PORTL_gc = (0x0A<<0), /* Mapped To PORTL */ - PORTCFG_VP0MAP_PORTM_gc = (0x0B<<0), /* Mapped To PORTM */ - PORTCFG_VP0MAP_PORTN_gc = (0x0C<<0), /* Mapped To PORTN */ - PORTCFG_VP0MAP_PORTP_gc = (0x0D<<0), /* Mapped To PORTP */ - PORTCFG_VP0MAP_PORTQ_gc = (0x0E<<0), /* Mapped To PORTQ */ - PORTCFG_VP0MAP_PORTR_gc = (0x0F<<0), /* Mapped To PORTR */ -} PORTCFG_VP0MAP_t; - -/* Virtual Port 1 Mapping */ -typedef enum PORTCFG_VP1MAP_enum -{ - PORTCFG_VP1MAP_PORTA_gc = (0x00<<4), /* Mapped To PORTA */ - PORTCFG_VP1MAP_PORTB_gc = (0x01<<4), /* Mapped To PORTB */ - PORTCFG_VP1MAP_PORTC_gc = (0x02<<4), /* Mapped To PORTC */ - PORTCFG_VP1MAP_PORTD_gc = (0x03<<4), /* Mapped To PORTD */ - PORTCFG_VP1MAP_PORTE_gc = (0x04<<4), /* Mapped To PORTE */ - PORTCFG_VP1MAP_PORTF_gc = (0x05<<4), /* Mapped To PORTF */ - PORTCFG_VP1MAP_PORTG_gc = (0x06<<4), /* Mapped To PORTG */ - PORTCFG_VP1MAP_PORTH_gc = (0x07<<4), /* Mapped To PORTH */ - PORTCFG_VP1MAP_PORTJ_gc = (0x08<<4), /* Mapped To PORTJ */ - PORTCFG_VP1MAP_PORTK_gc = (0x09<<4), /* Mapped To PORTK */ - PORTCFG_VP1MAP_PORTL_gc = (0x0A<<4), /* Mapped To PORTL */ - PORTCFG_VP1MAP_PORTM_gc = (0x0B<<4), /* Mapped To PORTM */ - PORTCFG_VP1MAP_PORTN_gc = (0x0C<<4), /* Mapped To PORTN */ - PORTCFG_VP1MAP_PORTP_gc = (0x0D<<4), /* Mapped To PORTP */ - PORTCFG_VP1MAP_PORTQ_gc = (0x0E<<4), /* Mapped To PORTQ */ - PORTCFG_VP1MAP_PORTR_gc = (0x0F<<4), /* Mapped To PORTR */ -} PORTCFG_VP1MAP_t; - -/* Virtual Port 2 Mapping */ -typedef enum PORTCFG_VP2MAP_enum -{ - PORTCFG_VP2MAP_PORTA_gc = (0x00<<0), /* Mapped To PORTA */ - PORTCFG_VP2MAP_PORTB_gc = (0x01<<0), /* Mapped To PORTB */ - PORTCFG_VP2MAP_PORTC_gc = (0x02<<0), /* Mapped To PORTC */ - PORTCFG_VP2MAP_PORTD_gc = (0x03<<0), /* Mapped To PORTD */ - PORTCFG_VP2MAP_PORTE_gc = (0x04<<0), /* Mapped To PORTE */ - PORTCFG_VP2MAP_PORTF_gc = (0x05<<0), /* Mapped To PORTF */ - PORTCFG_VP2MAP_PORTG_gc = (0x06<<0), /* Mapped To PORTG */ - PORTCFG_VP2MAP_PORTH_gc = (0x07<<0), /* Mapped To PORTH */ - PORTCFG_VP2MAP_PORTJ_gc = (0x08<<0), /* Mapped To PORTJ */ - PORTCFG_VP2MAP_PORTK_gc = (0x09<<0), /* Mapped To PORTK */ - PORTCFG_VP2MAP_PORTL_gc = (0x0A<<0), /* Mapped To PORTL */ - PORTCFG_VP2MAP_PORTM_gc = (0x0B<<0), /* Mapped To PORTM */ - PORTCFG_VP2MAP_PORTN_gc = (0x0C<<0), /* Mapped To PORTN */ - PORTCFG_VP2MAP_PORTP_gc = (0x0D<<0), /* Mapped To PORTP */ - PORTCFG_VP2MAP_PORTQ_gc = (0x0E<<0), /* Mapped To PORTQ */ - PORTCFG_VP2MAP_PORTR_gc = (0x0F<<0), /* Mapped To PORTR */ -} PORTCFG_VP2MAP_t; - -/* Virtual Port 3 Mapping */ -typedef enum PORTCFG_VP3MAP_enum -{ - PORTCFG_VP3MAP_PORTA_gc = (0x00<<4), /* Mapped To PORTA */ - PORTCFG_VP3MAP_PORTB_gc = (0x01<<4), /* Mapped To PORTB */ - PORTCFG_VP3MAP_PORTC_gc = (0x02<<4), /* Mapped To PORTC */ - PORTCFG_VP3MAP_PORTD_gc = (0x03<<4), /* Mapped To PORTD */ - PORTCFG_VP3MAP_PORTE_gc = (0x04<<4), /* Mapped To PORTE */ - PORTCFG_VP3MAP_PORTF_gc = (0x05<<4), /* Mapped To PORTF */ - PORTCFG_VP3MAP_PORTG_gc = (0x06<<4), /* Mapped To PORTG */ - PORTCFG_VP3MAP_PORTH_gc = (0x07<<4), /* Mapped To PORTH */ - PORTCFG_VP3MAP_PORTJ_gc = (0x08<<4), /* Mapped To PORTJ */ - PORTCFG_VP3MAP_PORTK_gc = (0x09<<4), /* Mapped To PORTK */ - PORTCFG_VP3MAP_PORTL_gc = (0x0A<<4), /* Mapped To PORTL */ - PORTCFG_VP3MAP_PORTM_gc = (0x0B<<4), /* Mapped To PORTM */ - PORTCFG_VP3MAP_PORTN_gc = (0x0C<<4), /* Mapped To PORTN */ - PORTCFG_VP3MAP_PORTP_gc = (0x0D<<4), /* Mapped To PORTP */ - PORTCFG_VP3MAP_PORTQ_gc = (0x0E<<4), /* Mapped To PORTQ */ - PORTCFG_VP3MAP_PORTR_gc = (0x0F<<4), /* Mapped To PORTR */ -} PORTCFG_VP3MAP_t; - -/* Clock Output Port */ -typedef enum PORTCFG_CLKOUT_enum -{ - PORTCFG_CLKOUT_OFF_gc = (0x00<<0), /* Clock Output Disabled */ - PORTCFG_CLKOUT_PC7_gc = (0x01<<0), /* Clock Output on Port C pin 7 */ - PORTCFG_CLKOUT_PD7_gc = (0x02<<0), /* Clock Output on Port D pin 7 */ - PORTCFG_CLKOUT_PE7_gc = (0x03<<0), /* Clock Output on Port E pin 7 */ -} PORTCFG_CLKOUT_t; - -/* Event Output Port */ -typedef enum PORTCFG_EVOUT_enum -{ - PORTCFG_EVOUT_OFF_gc = (0x00<<4), /* Event Output Disabled */ - PORTCFG_EVOUT_PC7_gc = (0x01<<4), /* Event Channel 7 Output on Port C pin 7 */ - PORTCFG_EVOUT_PD7_gc = (0x02<<4), /* Event Channel 7 Output on Port D pin 7 */ - PORTCFG_EVOUT_PE7_gc = (0x03<<4), /* Event Channel 7 Output on Port E pin 7 */ -} PORTCFG_EVOUT_t; - -/* Port Interrupt 0 Level */ -typedef enum PORT_INT0LVL_enum -{ - PORT_INT0LVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - PORT_INT0LVL_LO_gc = (0x01<<0), /* Low Level */ - PORT_INT0LVL_MED_gc = (0x02<<0), /* Medium Level */ - PORT_INT0LVL_HI_gc = (0x03<<0), /* High Level */ -} PORT_INT0LVL_t; - -/* Port Interrupt 1 Level */ -typedef enum PORT_INT1LVL_enum -{ - PORT_INT1LVL_OFF_gc = (0x00<<2), /* Interrupt Disabled */ - PORT_INT1LVL_LO_gc = (0x01<<2), /* Low Level */ - PORT_INT1LVL_MED_gc = (0x02<<2), /* Medium Level */ - PORT_INT1LVL_HI_gc = (0x03<<2), /* High Level */ -} PORT_INT1LVL_t; - -/* Output/Pull Configuration */ -typedef enum PORT_OPC_enum -{ - PORT_OPC_TOTEM_gc = (0x00<<3), /* Totempole */ - PORT_OPC_BUSKEEPER_gc = (0x01<<3), /* Totempole w/ Bus keeper on Input and Output */ - PORT_OPC_PULLDOWN_gc = (0x02<<3), /* Totempole w/ Pull-down on Input */ - PORT_OPC_PULLUP_gc = (0x03<<3), /* Totempole w/ Pull-up on Input */ - PORT_OPC_WIREDOR_gc = (0x04<<3), /* Wired OR */ - PORT_OPC_WIREDAND_gc = (0x05<<3), /* Wired AND */ - PORT_OPC_WIREDORPULL_gc = (0x06<<3), /* Wired OR w/ Pull-down */ - PORT_OPC_WIREDANDPULL_gc = (0x07<<3), /* Wired AND w/ Pull-up */ -} PORT_OPC_t; - -/* Input/Sense Configuration */ -typedef enum PORT_ISC_enum -{ - PORT_ISC_BOTHEDGES_gc = (0x00<<0), /* Sense Both Edges */ - PORT_ISC_RISING_gc = (0x01<<0), /* Sense Rising Edge */ - PORT_ISC_FALLING_gc = (0x02<<0), /* Sense Falling Edge */ - PORT_ISC_LEVEL_gc = (0x03<<0), /* Sense Level (Transparent For Events) */ - PORT_ISC_INPUT_DISABLE_gc = (0x07<<0), /* Disable Digital Input Buffer */ -} PORT_ISC_t; - - -/* --------------------------------------------------------------------------- -TC - 16-bit Timer/Counter With PWM --------------------------------------------------------------------------- -*/ - -/* 16-bit Timer/Counter 0 */ -typedef struct TC0_struct -{ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t CTRLC; /* Control register C */ - register8_t CTRLD; /* Control Register D */ - register8_t CTRLE; /* Control Register E */ - register8_t reserved_0x05; - register8_t INTCTRLA; /* Interrupt Control Register A */ - register8_t INTCTRLB; /* Interrupt Control Register B */ - register8_t CTRLFCLR; /* Control Register F Clear */ - register8_t CTRLFSET; /* Control Register F Set */ - register8_t CTRLGCLR; /* Control Register G Clear */ - register8_t CTRLGSET; /* Control Register G Set */ - register8_t INTFLAGS; /* Interrupt Flag Register */ - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t TEMP; /* Temporary Register For 16-bit Access */ - register8_t reserved_0x10; - register8_t reserved_0x11; - register8_t reserved_0x12; - register8_t reserved_0x13; - register8_t reserved_0x14; - register8_t reserved_0x15; - register8_t reserved_0x16; - register8_t reserved_0x17; - register8_t reserved_0x18; - register8_t reserved_0x19; - register8_t reserved_0x1A; - register8_t reserved_0x1B; - register8_t reserved_0x1C; - register8_t reserved_0x1D; - register8_t reserved_0x1E; - register8_t reserved_0x1F; - _WORDREGISTER(CNT); /* Count */ - register8_t reserved_0x22; - register8_t reserved_0x23; - register8_t reserved_0x24; - register8_t reserved_0x25; - _WORDREGISTER(PER); /* Period */ - _WORDREGISTER(CCA); /* Compare or Capture A */ - _WORDREGISTER(CCB); /* Compare or Capture B */ - _WORDREGISTER(CCC); /* Compare or Capture C */ - _WORDREGISTER(CCD); /* Compare or Capture D */ - register8_t reserved_0x30; - register8_t reserved_0x31; - register8_t reserved_0x32; - register8_t reserved_0x33; - register8_t reserved_0x34; - register8_t reserved_0x35; - _WORDREGISTER(PERBUF); /* Period Buffer */ - _WORDREGISTER(CCABUF); /* Compare Or Capture A Buffer */ - _WORDREGISTER(CCBBUF); /* Compare Or Capture B Buffer */ - _WORDREGISTER(CCCBUF); /* Compare Or Capture C Buffer */ - _WORDREGISTER(CCDBUF); /* Compare Or Capture D Buffer */ -} TC0_t; - -/* --------------------------------------------------------------------------- -TC - 16-bit Timer/Counter With PWM --------------------------------------------------------------------------- -*/ - -/* 16-bit Timer/Counter 1 */ -typedef struct TC1_struct -{ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t CTRLC; /* Control register C */ - register8_t CTRLD; /* Control Register D */ - register8_t CTRLE; /* Control Register E */ - register8_t reserved_0x05; - register8_t INTCTRLA; /* Interrupt Control Register A */ - register8_t INTCTRLB; /* Interrupt Control Register B */ - register8_t CTRLFCLR; /* Control Register F Clear */ - register8_t CTRLFSET; /* Control Register F Set */ - register8_t CTRLGCLR; /* Control Register G Clear */ - register8_t CTRLGSET; /* Control Register G Set */ - register8_t INTFLAGS; /* Interrupt Flag Register */ - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t TEMP; /* Temporary Register For 16-bit Access */ - register8_t reserved_0x10; - register8_t reserved_0x11; - register8_t reserved_0x12; - register8_t reserved_0x13; - register8_t reserved_0x14; - register8_t reserved_0x15; - register8_t reserved_0x16; - register8_t reserved_0x17; - register8_t reserved_0x18; - register8_t reserved_0x19; - register8_t reserved_0x1A; - register8_t reserved_0x1B; - register8_t reserved_0x1C; - register8_t reserved_0x1D; - register8_t reserved_0x1E; - register8_t reserved_0x1F; - _WORDREGISTER(CNT); /* Count */ - register8_t reserved_0x22; - register8_t reserved_0x23; - register8_t reserved_0x24; - register8_t reserved_0x25; - _WORDREGISTER(PER); /* Period */ - _WORDREGISTER(CCA); /* Compare or Capture A */ - _WORDREGISTER(CCB); /* Compare or Capture B */ - register8_t reserved_0x2C; - register8_t reserved_0x2D; - register8_t reserved_0x2E; - register8_t reserved_0x2F; - register8_t reserved_0x30; - register8_t reserved_0x31; - register8_t reserved_0x32; - register8_t reserved_0x33; - register8_t reserved_0x34; - register8_t reserved_0x35; - _WORDREGISTER(PERBUF); /* Period Buffer */ - _WORDREGISTER(CCABUF); /* Compare Or Capture A Buffer */ - _WORDREGISTER(CCBBUF); /* Compare Or Capture B Buffer */ -} TC1_t; - -/* --------------------------------------------------------------------------- -TC - 16-bit Timer/Counter With PWM --------------------------------------------------------------------------- -*/ - -/* Advanced Waveform Extension */ -typedef struct AWEX_struct -{ - register8_t CTRL; /* Control Register */ - register8_t reserved_0x01; - register8_t FDEVMASK; /* Fault Detection Event Mask */ - register8_t FDCTRL; /* Fault Detection Control Register */ - register8_t STATUS; /* Status Register */ - register8_t reserved_0x05; - register8_t DTBOTH; /* Dead Time Both Sides */ - register8_t DTBOTHBUF; /* Dead Time Both Sides Buffer */ - register8_t DTLS; /* Dead Time Low Side */ - register8_t DTHS; /* Dead Time High Side */ - register8_t DTLSBUF; /* Dead Time Low Side Buffer */ - register8_t DTHSBUF; /* Dead Time High Side Buffer */ - register8_t OUTOVEN; /* Output Override Enable */ -} AWEX_t; - -/* --------------------------------------------------------------------------- -TC - 16-bit Timer/Counter With PWM --------------------------------------------------------------------------- -*/ - -/* High-Resolution Extension */ -typedef struct HIRES_struct -{ - register8_t CTRL; /* Control Register */ -} HIRES_t; - -/* Clock Selection */ -typedef enum TC_CLKSEL_enum -{ - TC_CLKSEL_OFF_gc = (0x00<<0), /* Timer Off */ - TC_CLKSEL_DIV1_gc = (0x01<<0), /* System Clock */ - TC_CLKSEL_DIV2_gc = (0x02<<0), /* System Clock / 2 */ - TC_CLKSEL_DIV4_gc = (0x03<<0), /* System Clock / 4 */ - TC_CLKSEL_DIV8_gc = (0x04<<0), /* System Clock / 8 */ - TC_CLKSEL_DIV64_gc = (0x05<<0), /* System Clock / 64 */ - TC_CLKSEL_DIV256_gc = (0x06<<0), /* System Clock / 256 */ - TC_CLKSEL_DIV1024_gc = (0x07<<0), /* System Clock / 1024 */ - TC_CLKSEL_EVCH0_gc = (0x08<<0), /* Event Channel 0 */ - TC_CLKSEL_EVCH1_gc = (0x09<<0), /* Event Channel 1 */ - TC_CLKSEL_EVCH2_gc = (0x0A<<0), /* Event Channel 2 */ - TC_CLKSEL_EVCH3_gc = (0x0B<<0), /* Event Channel 3 */ - TC_CLKSEL_EVCH4_gc = (0x0C<<0), /* Event Channel 4 */ - TC_CLKSEL_EVCH5_gc = (0x0D<<0), /* Event Channel 5 */ - TC_CLKSEL_EVCH6_gc = (0x0E<<0), /* Event Channel 6 */ - TC_CLKSEL_EVCH7_gc = (0x0F<<0), /* Event Channel 7 */ -} TC_CLKSEL_t; - -/* Waveform Generation Mode */ -typedef enum TC_WGMODE_enum -{ - TC_WGMODE_NORMAL_gc = (0x00<<0), /* Normal Mode */ - TC_WGMODE_FRQ_gc = (0x01<<0), /* Frequency Generation Mode */ - TC_WGMODE_SS_gc = (0x03<<0), /* Single Slope */ - TC_WGMODE_DS_T_gc = (0x05<<0), /* Dual Slope, Update on TOP */ - TC_WGMODE_DS_TB_gc = (0x06<<0), /* Dual Slope, Update on TOP and BOTTOM */ - TC_WGMODE_DS_B_gc = (0x07<<0), /* Dual Slope, Update on BOTTOM */ -} TC_WGMODE_t; - -/* Event Action */ -typedef enum TC_EVACT_enum -{ - TC_EVACT_OFF_gc = (0x00<<5), /* No Event Action */ - TC_EVACT_CAPT_gc = (0x01<<5), /* Input Capture */ - TC_EVACT_UPDOWN_gc = (0x02<<5), /* Externally Controlled Up/Down Count */ - TC_EVACT_QDEC_gc = (0x03<<5), /* Quadrature Decode */ - TC_EVACT_RESTART_gc = (0x04<<5), /* Restart */ - TC_EVACT_FRW_gc = (0x05<<5), /* Frequency Capture */ - TC_EVACT_PW_gc = (0x06<<5), /* Pulse-width Capture */ -} TC_EVACT_t; - -/* Event Selection */ -typedef enum TC_EVSEL_enum -{ - TC_EVSEL_OFF_gc = (0x00<<0), /* No Event Source */ - TC_EVSEL_CH0_gc = (0x08<<0), /* Event Channel 0 */ - TC_EVSEL_CH1_gc = (0x09<<0), /* Event Channel 1 */ - TC_EVSEL_CH2_gc = (0x0A<<0), /* Event Channel 2 */ - TC_EVSEL_CH3_gc = (0x0B<<0), /* Event Channel 3 */ - TC_EVSEL_CH4_gc = (0x0C<<0), /* Event Channel 4 */ - TC_EVSEL_CH5_gc = (0x0D<<0), /* Event Channel 5 */ - TC_EVSEL_CH6_gc = (0x0E<<0), /* Event Channel 6 */ - TC_EVSEL_CH7_gc = (0x0F<<0), /* Event Channel 7 */ -} TC_EVSEL_t; - -/* Error Interrupt Level */ -typedef enum TC_ERRINTLVL_enum -{ - TC_ERRINTLVL_OFF_gc = (0x00<<2), /* Interrupt Disabled */ - TC_ERRINTLVL_LO_gc = (0x01<<2), /* Low Level */ - TC_ERRINTLVL_MED_gc = (0x02<<2), /* Medium Level */ - TC_ERRINTLVL_HI_gc = (0x03<<2), /* High Level */ -} TC_ERRINTLVL_t; - -/* Overflow Interrupt Level */ -typedef enum TC_OVFINTLVL_enum -{ - TC_OVFINTLVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - TC_OVFINTLVL_LO_gc = (0x01<<0), /* Low Level */ - TC_OVFINTLVL_MED_gc = (0x02<<0), /* Medium Level */ - TC_OVFINTLVL_HI_gc = (0x03<<0), /* High Level */ -} TC_OVFINTLVL_t; - -/* Compare or Capture D Interrupt Level */ -typedef enum TC_CCDINTLVL_enum -{ - TC_CCDINTLVL_OFF_gc = (0x00<<6), /* Interrupt Disabled */ - TC_CCDINTLVL_LO_gc = (0x01<<6), /* Low Level */ - TC_CCDINTLVL_MED_gc = (0x02<<6), /* Medium Level */ - TC_CCDINTLVL_HI_gc = (0x03<<6), /* High Level */ -} TC_CCDINTLVL_t; - -/* Compare or Capture C Interrupt Level */ -typedef enum TC_CCCINTLVL_enum -{ - TC_CCCINTLVL_OFF_gc = (0x00<<4), /* Interrupt Disabled */ - TC_CCCINTLVL_LO_gc = (0x01<<4), /* Low Level */ - TC_CCCINTLVL_MED_gc = (0x02<<4), /* Medium Level */ - TC_CCCINTLVL_HI_gc = (0x03<<4), /* High Level */ -} TC_CCCINTLVL_t; - -/* Compare or Capture B Interrupt Level */ -typedef enum TC_CCBINTLVL_enum -{ - TC_CCBINTLVL_OFF_gc = (0x00<<2), /* Interrupt Disabled */ - TC_CCBINTLVL_LO_gc = (0x01<<2), /* Low Level */ - TC_CCBINTLVL_MED_gc = (0x02<<2), /* Medium Level */ - TC_CCBINTLVL_HI_gc = (0x03<<2), /* High Level */ -} TC_CCBINTLVL_t; - -/* Compare or Capture A Interrupt Level */ -typedef enum TC_CCAINTLVL_enum -{ - TC_CCAINTLVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - TC_CCAINTLVL_LO_gc = (0x01<<0), /* Low Level */ - TC_CCAINTLVL_MED_gc = (0x02<<0), /* Medium Level */ - TC_CCAINTLVL_HI_gc = (0x03<<0), /* High Level */ -} TC_CCAINTLVL_t; - -/* Timer/Counter Command */ -typedef enum TC_CMD_enum -{ - TC_CMD_NONE_gc = (0x00<<2), /* No Command */ - TC_CMD_UPDATE_gc = (0x01<<2), /* Force Update */ - TC_CMD_RESTART_gc = (0x02<<2), /* Force Restart */ - TC_CMD_RESET_gc = (0x03<<2), /* Force Hard Reset */ -} TC_CMD_t; - -/* Fault Detect Action */ -typedef enum AWEX_FDACT_enum -{ - AWEX_FDACT_NONE_gc = (0x00<<0), /* No Fault Protection */ - AWEX_FDACT_CLEAROE_gc = (0x01<<0), /* Clear Output Enable Bits */ - AWEX_FDACT_CLEARDIR_gc = (0x03<<0), /* Clear I/O Port Direction Bits */ -} AWEX_FDACT_t; - -/* High Resolution Enable */ -typedef enum HIRES_HREN_enum -{ - HIRES_HREN_NONE_gc = (0x00<<0), /* No Fault Protection */ - HIRES_HREN_TC0_gc = (0x01<<0), /* Enable High Resolution on Timer/Counter 0 */ - HIRES_HREN_TC1_gc = (0x02<<0), /* Enable High Resolution on Timer/Counter 1 */ - HIRES_HREN_BOTH_gc = (0x03<<0), /* Enable High Resolution both Timer/Counters */ -} HIRES_HREN_t; - - -/* --------------------------------------------------------------------------- -USART - Universal Asynchronous Receiver-Transmitter --------------------------------------------------------------------------- -*/ - -/* Universal Synchronous/Asynchronous Receiver/Transmitter */ -typedef struct USART_struct -{ - register8_t DATA; /* Data Register */ - register8_t STATUS; /* Status Register */ - register8_t reserved_0x02; - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t CTRLC; /* Control Register C */ - register8_t BAUDCTRLA; /* Baud Rate Control Register A */ - register8_t BAUDCTRLB; /* Baud Rate Control Register B */ -} USART_t; - -/* Receive Complete Interrupt level */ -typedef enum USART_RXCINTLVL_enum -{ - USART_RXCINTLVL_OFF_gc = (0x00<<4), /* Interrupt Disabled */ - USART_RXCINTLVL_LO_gc = (0x01<<4), /* Low Level */ - USART_RXCINTLVL_MED_gc = (0x02<<4), /* Medium Level */ - USART_RXCINTLVL_HI_gc = (0x03<<4), /* High Level */ -} USART_RXCINTLVL_t; - -/* Transmit Complete Interrupt level */ -typedef enum USART_TXCINTLVL_enum -{ - USART_TXCINTLVL_OFF_gc = (0x00<<2), /* Interrupt Disabled */ - USART_TXCINTLVL_LO_gc = (0x01<<2), /* Low Level */ - USART_TXCINTLVL_MED_gc = (0x02<<2), /* Medium Level */ - USART_TXCINTLVL_HI_gc = (0x03<<2), /* High Level */ -} USART_TXCINTLVL_t; - -/* Data Register Empty Interrupt level */ -typedef enum USART_DREINTLVL_enum -{ - USART_DREINTLVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - USART_DREINTLVL_LO_gc = (0x01<<0), /* Low Level */ - USART_DREINTLVL_MED_gc = (0x02<<0), /* Medium Level */ - USART_DREINTLVL_HI_gc = (0x03<<0), /* High Level */ -} USART_DREINTLVL_t; - -/* Character Size */ -typedef enum USART_CHSIZE_enum -{ - USART_CHSIZE_5BIT_gc = (0x00<<0), /* Character size: 5 bit */ - USART_CHSIZE_6BIT_gc = (0x01<<0), /* Character size: 6 bit */ - USART_CHSIZE_7BIT_gc = (0x02<<0), /* Character size: 7 bit */ - USART_CHSIZE_8BIT_gc = (0x03<<0), /* Character size: 8 bit */ - USART_CHSIZE_9BIT_gc = (0x07<<0), /* Character size: 9 bit */ -} USART_CHSIZE_t; - -/* Communication Mode */ -typedef enum USART_CMODE_enum -{ - USART_CMODE_ASYNCHRONOUS_gc = (0x00<<6), /* Asynchronous Mode */ - USART_CMODE_SYNCHRONOUS_gc = (0x01<<6), /* Synchronous Mode */ - USART_CMODE_IRDA_gc = (0x02<<6), /* IrDA Mode */ - USART_CMODE_MSPI_gc = (0x03<<6), /* Master SPI Mode */ -} USART_CMODE_t; - -/* Parity Mode */ -typedef enum USART_PMODE_enum -{ - USART_PMODE_DISABLED_gc = (0x00<<4), /* No Parity */ - USART_PMODE_EVEN_gc = (0x02<<4), /* Even Parity */ - USART_PMODE_ODD_gc = (0x03<<4), /* Odd Parity */ -} USART_PMODE_t; - - -/* --------------------------------------------------------------------------- -SPI - Serial Peripheral Interface --------------------------------------------------------------------------- -*/ - -/* Serial Peripheral Interface */ -typedef struct SPI_struct -{ - register8_t CTRL; /* Control Register */ - register8_t INTCTRL; /* Interrupt Control Register */ - register8_t STATUS; /* Status Register */ - register8_t DATA; /* Data Register */ -} SPI_t; - -/* SPI Mode */ -typedef enum SPI_MODE_enum -{ - SPI_MODE_0_gc = (0x00<<2), /* SPI Mode 0 */ - SPI_MODE_1_gc = (0x01<<2), /* SPI Mode 1 */ - SPI_MODE_2_gc = (0x02<<2), /* SPI Mode 2 */ - SPI_MODE_3_gc = (0x03<<2), /* SPI Mode 3 */ -} SPI_MODE_t; - -/* Prescaler setting */ -typedef enum SPI_PRESCALER_enum -{ - SPI_PRESCALER_DIV4_gc = (0x00<<0), /* System Clock / 4 */ - SPI_PRESCALER_DIV16_gc = (0x01<<0), /* System Clock / 16 */ - SPI_PRESCALER_DIV64_gc = (0x02<<0), /* System Clock / 64 */ - SPI_PRESCALER_DIV128_gc = (0x03<<0), /* System Clock / 128 */ -} SPI_PRESCALER_t; - -/* Interrupt level */ -typedef enum SPI_INTLVL_enum -{ - SPI_INTLVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - SPI_INTLVL_LO_gc = (0x01<<0), /* Low Level */ - SPI_INTLVL_MED_gc = (0x02<<0), /* Medium Level */ - SPI_INTLVL_HI_gc = (0x03<<0), /* High Level */ -} SPI_INTLVL_t; - - -/* --------------------------------------------------------------------------- -IRCOM - IR Communication Module --------------------------------------------------------------------------- -*/ - -/* IR Communication Module */ -typedef struct IRCOM_struct -{ - register8_t CTRL; /* Control Register */ - register8_t TXPLCTRL; /* IrDA Transmitter Pulse Length Control Register */ - register8_t RXPLCTRL; /* IrDA Receiver Pulse Length Control Register */ -} IRCOM_t; - -/* Event channel selection */ -typedef enum IRDA_EVSEL_enum -{ - IRDA_EVSEL_OFF_gc = (0x00<<0), /* No Event Source */ - IRDA_EVSEL_0_gc = (0x08<<0), /* Event Channel 0 */ - IRDA_EVSEL_1_gc = (0x09<<0), /* Event Channel 1 */ - IRDA_EVSEL_2_gc = (0x0A<<0), /* Event Channel 2 */ - IRDA_EVSEL_3_gc = (0x0B<<0), /* Event Channel 3 */ - IRDA_EVSEL_4_gc = (0x0C<<0), /* Event Channel 4 */ - IRDA_EVSEL_5_gc = (0x0D<<0), /* Event Channel 5 */ - IRDA_EVSEL_6_gc = (0x0E<<0), /* Event Channel 6 */ - IRDA_EVSEL_7_gc = (0x0F<<0), /* Event Channel 7 */ -} IRDA_EVSEL_t; - - -/* --------------------------------------------------------------------------- -AES - AES Module --------------------------------------------------------------------------- -*/ - -/* AES Module */ -typedef struct AES_struct -{ - register8_t CTRL; /* AES Control Register */ - register8_t STATUS; /* AES Status Register */ - register8_t STATE; /* AES State Register */ - register8_t KEY; /* AES Key Register */ - register8_t INTCTRL; /* AES Interrupt Control Register */ -} AES_t; - -/* Interrupt level */ -typedef enum AES_INTLVL_enum -{ - AES_INTLVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - AES_INTLVL_LO_gc = (0x01<<0), /* Low Level */ - AES_INTLVL_MED_gc = (0x02<<0), /* Medium Level */ - AES_INTLVL_HI_gc = (0x03<<0), /* High Level */ -} AES_INTLVL_t; - - -/* --------------------------------------------------------------------------- -VBAT - VBAT Battery Backup Module --------------------------------------------------------------------------- -*/ - -/* VBAT Battery Backup Module */ -typedef struct VBAT_struct -{ - register8_t CTRL; /* Control Register */ - register8_t STATUS; /* Status Register */ - register8_t BACKUP0; /* Battery Bacup Register 0 */ - register8_t BACKUP1; /* Battery Backup Register 1 */ -} VBAT_t; - - - -/* -========================================================================== -IO Module Instances. Mapped to memory. -========================================================================== -*/ - -#define GPIO (*(GPIO_t *) 0x0000) /* General Purpose IO Registers */ -#define VPORT0 (*(VPORT_t *) 0x0010) /* Virtual Port 0 */ -#define VPORT1 (*(VPORT_t *) 0x0014) /* Virtual Port 1 */ -#define VPORT2 (*(VPORT_t *) 0x0018) /* Virtual Port 2 */ -#define VPORT3 (*(VPORT_t *) 0x001C) /* Virtual Port 3 */ -#define OCD (*(OCD_t *) 0x002E) /* On-Chip Debug System */ -#define CPU (*(CPU_t *) 0x0030) /* CPU Registers */ -#define CLK (*(CLK_t *) 0x0040) /* Clock System */ -#define SLEEP (*(SLEEP_t *) 0x0048) /* Sleep Controller */ -#define OSC (*(OSC_t *) 0x0050) /* Oscillator Control */ -#define DFLLRC32M (*(DFLL_t *) 0x0060) /* DFLL for 32MHz RC Oscillator */ -#define DFLLRC2M (*(DFLL_t *) 0x0068) /* DFLL for 2MHz RC Oscillator */ -#define PR (*(PR_t *) 0x0070) /* Power Reduction */ -#define RST (*(RST_t *) 0x0078) /* Reset Controller */ -#define WDT (*(WDT_t *) 0x0080) /* Watch-Dog Timer */ -#define MCU (*(MCU_t *) 0x0090) /* MCU Control */ -#define PMIC (*(PMIC_t *) 0x00A0) /* Programmable Interrupt Controller */ -#define PORTCFG (*(PORTCFG_t *) 0x00B0) /* Port Configuration */ -#define AES (*(AES_t *) 0x00C0) /* AES Crypto Module */ -#define VBAT (*(VBAT_t *) 0x00F0) /* VBAT Battery Backup Module */ -#define DMA (*(DMA_t *) 0x0100) /* DMA Controller */ -#define EVSYS (*(EVSYS_t *) 0x0180) /* Event System */ -#define NVM (*(NVM_t *) 0x01C0) /* Non Volatile Memory Controller */ -#define ADCA (*(ADC_t *) 0x0200) /* Analog to Digital Converter A */ -#define ADCB (*(ADC_t *) 0x0240) /* Analog to Digital Converter B */ -#define DACB (*(DAC_t *) 0x0320) /* Digital to Analog Converter B */ -#define ACA (*(AC_t *) 0x0380) /* Analog Comparator A */ -#define ACB (*(AC_t *) 0x0390) /* Analog Comparator B */ -#define RTC32 (*(RTC32_t *) 0x0420) /* 32-bit Real-Time Counter */ -#define TWIC (*(TWI_t *) 0x0480) /* Two-Wire Interface C */ -#define TWIE (*(TWI_t *) 0x04A0) /* Two-Wire Interface E */ -#define PORTA (*(PORT_t *) 0x0600) /* Port A */ -#define PORTB (*(PORT_t *) 0x0620) /* Port B */ -#define PORTC (*(PORT_t *) 0x0640) /* Port C */ -#define PORTD (*(PORT_t *) 0x0660) /* Port D */ -#define PORTE (*(PORT_t *) 0x0680) /* Port E */ -#define PORTF (*(PORT_t *) 0x06A0) /* Port F */ -#define PORTR (*(PORT_t *) 0x07E0) /* Port R */ -#define TCC0 (*(TC0_t *) 0x0800) /* Timer/Counter C0 */ -#define TCC1 (*(TC1_t *) 0x0840) /* Timer/Counter C1 */ -#define AWEXC (*(AWEX_t *) 0x0880) /* Advanced Waveform Extension C */ -#define HIRESC (*(HIRES_t *) 0x0890) /* High-Resolution Extension C */ -#define USARTC0 (*(USART_t *) 0x08A0) /* Universal Asynchronous Receiver-Transmitter C0 */ -#define USARTC1 (*(USART_t *) 0x08B0) /* Universal Asynchronous Receiver-Transmitter C1 */ -#define SPIC (*(SPI_t *) 0x08C0) /* Serial Peripheral Interface C */ -#define IRCOM (*(IRCOM_t *) 0x08F8) /* IR Communication Module */ -#define TCD0 (*(TC0_t *) 0x0900) /* Timer/Counter D0 */ -#define TCD1 (*(TC1_t *) 0x0940) /* Timer/Counter D1 */ -#define HIRESD (*(HIRES_t *) 0x0990) /* High-Resolution Extension D */ -#define USARTD0 (*(USART_t *) 0x09A0) /* Universal Asynchronous Receiver-Transmitter D0 */ -#define USARTD1 (*(USART_t *) 0x09B0) /* Universal Asynchronous Receiver-Transmitter D1 */ -#define SPID (*(SPI_t *) 0x09C0) /* Serial Peripheral Interface D */ -#define TCE0 (*(TC0_t *) 0x0A00) /* Timer/Counter E0 */ -#define TCE1 (*(TC1_t *) 0x0A40) /* Timer/Counter E1 */ -#define AWEXE (*(AWEX_t *) 0x0A80) /* Advanced Waveform Extension E */ -#define HIRESE (*(HIRES_t *) 0x0A90) /* High-Resolution Extension E */ -#define USARTE0 (*(USART_t *) 0x0AA0) /* Universal Asynchronous Receiver-Transmitter E0 */ -#define TCF0 (*(TC0_t *) 0x0B00) /* Timer/Counter F0 */ -#define HIRESF (*(HIRES_t *) 0x0B90) /* High-Resolution Extension F */ -#define USARTF0 (*(USART_t *) 0x0BA0) /* Universal Asynchronous Receiver-Transmitter F0 */ -#define USARTF1 (*(USART_t *) 0x0BB0) /* Universal Asynchronous Receiver-Transmitter F1 */ -#define SPIF (*(SPI_t *) 0x0BC0) /* Serial Peripheral Interface F */ - - -#endif /* !defined (__ASSEMBLER__) */ - - -/* ========== Flattened fully qualified IO register names ========== */ - -/* GPIO - General Purpose IO Registers */ -#define GPIO_GPIO0 _SFR_MEM8(0x0000) -#define GPIO_GPIO1 _SFR_MEM8(0x0001) -#define GPIO_GPIO2 _SFR_MEM8(0x0002) -#define GPIO_GPIO3 _SFR_MEM8(0x0003) -#define GPIO_GPIO4 _SFR_MEM8(0x0004) -#define GPIO_GPIO5 _SFR_MEM8(0x0005) -#define GPIO_GPIO6 _SFR_MEM8(0x0006) -#define GPIO_GPIO7 _SFR_MEM8(0x0007) -#define GPIO_GPIO8 _SFR_MEM8(0x0008) -#define GPIO_GPIO9 _SFR_MEM8(0x0009) -#define GPIO_GPIOA _SFR_MEM8(0x000A) -#define GPIO_GPIOB _SFR_MEM8(0x000B) -#define GPIO_GPIOC _SFR_MEM8(0x000C) -#define GPIO_GPIOD _SFR_MEM8(0x000D) -#define GPIO_GPIOE _SFR_MEM8(0x000E) -#define GPIO_GPIOF _SFR_MEM8(0x000F) - -/* VPORT0 - Virtual Port 0 */ -#define VPORT0_DIR _SFR_MEM8(0x0010) -#define VPORT0_OUT _SFR_MEM8(0x0011) -#define VPORT0_IN _SFR_MEM8(0x0012) -#define VPORT0_INTFLAGS _SFR_MEM8(0x0013) - -/* VPORT1 - Virtual Port 1 */ -#define VPORT1_DIR _SFR_MEM8(0x0014) -#define VPORT1_OUT _SFR_MEM8(0x0015) -#define VPORT1_IN _SFR_MEM8(0x0016) -#define VPORT1_INTFLAGS _SFR_MEM8(0x0017) - -/* VPORT2 - Virtual Port 2 */ -#define VPORT2_DIR _SFR_MEM8(0x0018) -#define VPORT2_OUT _SFR_MEM8(0x0019) -#define VPORT2_IN _SFR_MEM8(0x001A) -#define VPORT2_INTFLAGS _SFR_MEM8(0x001B) - -/* VPORT3 - Virtual Port 3 */ -#define VPORT3_DIR _SFR_MEM8(0x001C) -#define VPORT3_OUT _SFR_MEM8(0x001D) -#define VPORT3_IN _SFR_MEM8(0x001E) -#define VPORT3_INTFLAGS _SFR_MEM8(0x001F) - -/* OCD - On-Chip Debug System */ -#define OCD_OCDR0 _SFR_MEM8(0x002E) -#define OCD_OCDR1 _SFR_MEM8(0x002F) - -/* CPU - CPU Registers */ -#define CPU_CCP _SFR_MEM8(0x0034) -#define CPU_RAMPD _SFR_MEM8(0x0038) -#define CPU_RAMPX _SFR_MEM8(0x0039) -#define CPU_RAMPY _SFR_MEM8(0x003A) -#define CPU_RAMPZ _SFR_MEM8(0x003B) -#define CPU_EIND _SFR_MEM8(0x003C) -#define CPU_SPL _SFR_MEM8(0x003D) -#define CPU_SPH _SFR_MEM8(0x003E) -#define CPU_SREG _SFR_MEM8(0x003F) - -/* CLK - Clock System */ -#define CLK_CTRL _SFR_MEM8(0x0040) -#define CLK_PSCTRL _SFR_MEM8(0x0041) -#define CLK_LOCK _SFR_MEM8(0x0042) -#define CLK_RTCCTRL _SFR_MEM8(0x0043) - -/* SLEEP - Sleep Controller */ -#define SLEEP_CTRL _SFR_MEM8(0x0048) - -/* OSC - Oscillator Control */ -#define OSC_CTRL _SFR_MEM8(0x0050) -#define OSC_STATUS _SFR_MEM8(0x0051) -#define OSC_XOSCCTRL _SFR_MEM8(0x0052) -#define OSC_XOSCFAIL _SFR_MEM8(0x0053) -#define OSC_RC32KCAL _SFR_MEM8(0x0054) -#define OSC_PLLCTRL _SFR_MEM8(0x0055) -#define OSC_DFLLCTRL _SFR_MEM8(0x0056) - -/* DFLLRC32M - DFLL for 32MHz RC Oscillator */ -#define DFLLRC32M_CTRL _SFR_MEM8(0x0060) -#define DFLLRC32M_CALA _SFR_MEM8(0x0062) -#define DFLLRC32M_CALB _SFR_MEM8(0x0063) -#define DFLLRC32M_OSCCNT0 _SFR_MEM8(0x0064) -#define DFLLRC32M_OSCCNT1 _SFR_MEM8(0x0065) -#define DFLLRC32M_OSCCNT2 _SFR_MEM8(0x0066) - -/* DFLLRC2M - DFLL for 2MHz RC Oscillator */ -#define DFLLRC2M_CTRL _SFR_MEM8(0x0068) -#define DFLLRC2M_CALA _SFR_MEM8(0x006A) -#define DFLLRC2M_CALB _SFR_MEM8(0x006B) -#define DFLLRC2M_OSCCNT0 _SFR_MEM8(0x006C) -#define DFLLRC2M_OSCCNT1 _SFR_MEM8(0x006D) -#define DFLLRC2M_OSCCNT2 _SFR_MEM8(0x006E) - -/* PR - Power Reduction */ -#define PR_PR _SFR_MEM8(0x0070) -#define PR_PRPA _SFR_MEM8(0x0071) -#define PR_PRPB _SFR_MEM8(0x0072) -#define PR_PRPC _SFR_MEM8(0x0073) -#define PR_PRPD _SFR_MEM8(0x0074) -#define PR_PRPE _SFR_MEM8(0x0075) -#define PR_PRPF _SFR_MEM8(0x0076) - -/* RST - Reset Controller */ -#define RST_STATUS _SFR_MEM8(0x0078) -#define RST_CTRL _SFR_MEM8(0x0079) - -/* WDT - Watch-Dog Timer */ -#define WDT_CTRL _SFR_MEM8(0x0080) -#define WDT_WINCTRL _SFR_MEM8(0x0081) -#define WDT_STATUS _SFR_MEM8(0x0082) - -/* MCU - MCU Control */ -#define MCU_DEVID0 _SFR_MEM8(0x0090) -#define MCU_DEVID1 _SFR_MEM8(0x0091) -#define MCU_DEVID2 _SFR_MEM8(0x0092) -#define MCU_REVID _SFR_MEM8(0x0093) -#define MCU_JTAGUID _SFR_MEM8(0x0094) -#define MCU_MCUCR _SFR_MEM8(0x0096) -#define MCU_EVSYSLOCK _SFR_MEM8(0x0098) -#define MCU_AWEXLOCK _SFR_MEM8(0x0099) - -/* PMIC - Programmable Interrupt Controller */ -#define PMIC_STATUS _SFR_MEM8(0x00A0) -#define PMIC_INTPRI _SFR_MEM8(0x00A1) -#define PMIC_CTRL _SFR_MEM8(0x00A2) - -/* PORTCFG - Port Configuration */ -#define PORTCFG_MPCMASK _SFR_MEM8(0x00B0) -#define PORTCFG_VPCTRLA _SFR_MEM8(0x00B2) -#define PORTCFG_VPCTRLB _SFR_MEM8(0x00B3) -#define PORTCFG_CLKEVOUT _SFR_MEM8(0x00B4) - -/* AES - AES Crypto Module */ -#define AES_CTRL _SFR_MEM8(0x00C0) -#define AES_STATUS _SFR_MEM8(0x00C1) -#define AES_STATE _SFR_MEM8(0x00C2) -#define AES_KEY _SFR_MEM8(0x00C3) -#define AES_INTCTRL _SFR_MEM8(0x00C4) - -/* VBAT - VBAT Battery Backup Module */ -#define VBAT_CTRL _SFR_MEM8(0x00F0) -#define VBAT_STATUS _SFR_MEM8(0x00F1) -#define VBAT_BACKUP0 _SFR_MEM8(0x00F2) -#define VBAT_BACKUP1 _SFR_MEM8(0x00F3) - -/* DMA - DMA Controller */ -#define DMA_CTRL _SFR_MEM8(0x0100) -#define DMA_INTFLAGS _SFR_MEM8(0x0103) -#define DMA_STATUS _SFR_MEM8(0x0104) -#define DMA_TEMP _SFR_MEM16(0x0106) -#define DMA_CH0_CTRLA _SFR_MEM8(0x0110) -#define DMA_CH0_CTRLB _SFR_MEM8(0x0111) -#define DMA_CH0_ADDRCTRL _SFR_MEM8(0x0112) -#define DMA_CH0_TRIGSRC _SFR_MEM8(0x0113) -#define DMA_CH0_TRFCNT _SFR_MEM16(0x0114) -#define DMA_CH0_REPCNT _SFR_MEM8(0x0116) -#define DMA_CH0_SRCADDR0 _SFR_MEM8(0x0118) -#define DMA_CH0_SRCADDR1 _SFR_MEM8(0x0119) -#define DMA_CH0_SRCADDR2 _SFR_MEM8(0x011A) -#define DMA_CH0_DESTADDR0 _SFR_MEM8(0x011C) -#define DMA_CH0_DESTADDR1 _SFR_MEM8(0x011D) -#define DMA_CH0_DESTADDR2 _SFR_MEM8(0x011E) -#define DMA_CH1_CTRLA _SFR_MEM8(0x0120) -#define DMA_CH1_CTRLB _SFR_MEM8(0x0121) -#define DMA_CH1_ADDRCTRL _SFR_MEM8(0x0122) -#define DMA_CH1_TRIGSRC _SFR_MEM8(0x0123) -#define DMA_CH1_TRFCNT _SFR_MEM16(0x0124) -#define DMA_CH1_REPCNT _SFR_MEM8(0x0126) -#define DMA_CH1_SRCADDR0 _SFR_MEM8(0x0128) -#define DMA_CH1_SRCADDR1 _SFR_MEM8(0x0129) -#define DMA_CH1_SRCADDR2 _SFR_MEM8(0x012A) -#define DMA_CH1_DESTADDR0 _SFR_MEM8(0x012C) -#define DMA_CH1_DESTADDR1 _SFR_MEM8(0x012D) -#define DMA_CH1_DESTADDR2 _SFR_MEM8(0x012E) -#define DMA_CH2_CTRLA _SFR_MEM8(0x0130) -#define DMA_CH2_CTRLB _SFR_MEM8(0x0131) -#define DMA_CH2_ADDRCTRL _SFR_MEM8(0x0132) -#define DMA_CH2_TRIGSRC _SFR_MEM8(0x0133) -#define DMA_CH2_TRFCNT _SFR_MEM16(0x0134) -#define DMA_CH2_REPCNT _SFR_MEM8(0x0136) -#define DMA_CH2_SRCADDR0 _SFR_MEM8(0x0138) -#define DMA_CH2_SRCADDR1 _SFR_MEM8(0x0139) -#define DMA_CH2_SRCADDR2 _SFR_MEM8(0x013A) -#define DMA_CH2_DESTADDR0 _SFR_MEM8(0x013C) -#define DMA_CH2_DESTADDR1 _SFR_MEM8(0x013D) -#define DMA_CH2_DESTADDR2 _SFR_MEM8(0x013E) -#define DMA_CH3_CTRLA _SFR_MEM8(0x0140) -#define DMA_CH3_CTRLB _SFR_MEM8(0x0141) -#define DMA_CH3_ADDRCTRL _SFR_MEM8(0x0142) -#define DMA_CH3_TRIGSRC _SFR_MEM8(0x0143) -#define DMA_CH3_TRFCNT _SFR_MEM16(0x0144) -#define DMA_CH3_REPCNT _SFR_MEM8(0x0146) -#define DMA_CH3_SRCADDR0 _SFR_MEM8(0x0148) -#define DMA_CH3_SRCADDR1 _SFR_MEM8(0x0149) -#define DMA_CH3_SRCADDR2 _SFR_MEM8(0x014A) -#define DMA_CH3_DESTADDR0 _SFR_MEM8(0x014C) -#define DMA_CH3_DESTADDR1 _SFR_MEM8(0x014D) -#define DMA_CH3_DESTADDR2 _SFR_MEM8(0x014E) - -/* EVSYS - Event System */ -#define EVSYS_CH0MUX _SFR_MEM8(0x0180) -#define EVSYS_CH1MUX _SFR_MEM8(0x0181) -#define EVSYS_CH2MUX _SFR_MEM8(0x0182) -#define EVSYS_CH3MUX _SFR_MEM8(0x0183) -#define EVSYS_CH4MUX _SFR_MEM8(0x0184) -#define EVSYS_CH5MUX _SFR_MEM8(0x0185) -#define EVSYS_CH6MUX _SFR_MEM8(0x0186) -#define EVSYS_CH7MUX _SFR_MEM8(0x0187) -#define EVSYS_CH0CTRL _SFR_MEM8(0x0188) -#define EVSYS_CH1CTRL _SFR_MEM8(0x0189) -#define EVSYS_CH2CTRL _SFR_MEM8(0x018A) -#define EVSYS_CH3CTRL _SFR_MEM8(0x018B) -#define EVSYS_CH4CTRL _SFR_MEM8(0x018C) -#define EVSYS_CH5CTRL _SFR_MEM8(0x018D) -#define EVSYS_CH6CTRL _SFR_MEM8(0x018E) -#define EVSYS_CH7CTRL _SFR_MEM8(0x018F) -#define EVSYS_STROBE _SFR_MEM8(0x0190) -#define EVSYS_DATA _SFR_MEM8(0x0191) - -/* NVM - Non Volatile Memory Controller */ -#define NVM_ADDR0 _SFR_MEM8(0x01C0) -#define NVM_ADDR1 _SFR_MEM8(0x01C1) -#define NVM_ADDR2 _SFR_MEM8(0x01C2) -#define NVM_DATA0 _SFR_MEM8(0x01C4) -#define NVM_DATA1 _SFR_MEM8(0x01C5) -#define NVM_DATA2 _SFR_MEM8(0x01C6) -#define NVM_CMD _SFR_MEM8(0x01CA) -#define NVM_CTRLA _SFR_MEM8(0x01CB) -#define NVM_CTRLB _SFR_MEM8(0x01CC) -#define NVM_INTCTRL _SFR_MEM8(0x01CD) -#define NVM_STATUS _SFR_MEM8(0x01CF) -#define NVM_LOCKBITS _SFR_MEM8(0x01D0) - -/* ADCA - Analog to Digital Converter A */ -#define ADCA_CTRLA _SFR_MEM8(0x0200) -#define ADCA_CTRLB _SFR_MEM8(0x0201) -#define ADCA_REFCTRL _SFR_MEM8(0x0202) -#define ADCA_EVCTRL _SFR_MEM8(0x0203) -#define ADCA_PRESCALER _SFR_MEM8(0x0204) -#define ADCA_CALCTRL _SFR_MEM8(0x0205) -#define ADCA_INTFLAGS _SFR_MEM8(0x0206) -#define ADCA_CALIB _SFR_MEM8(0x020C) -#define ADCA_CH0RES _SFR_MEM16(0x0210) -#define ADCA_CH1RES _SFR_MEM16(0x0212) -#define ADCA_CH2RES _SFR_MEM16(0x0214) -#define ADCA_CH3RES _SFR_MEM16(0x0216) -#define ADCA_CMP _SFR_MEM16(0x0218) -#define ADCA_CH0_CTRL _SFR_MEM8(0x0220) -#define ADCA_CH0_MUXCTRL _SFR_MEM8(0x0221) -#define ADCA_CH0_INTCTRL _SFR_MEM8(0x0222) -#define ADCA_CH0_INTFLAGS _SFR_MEM8(0x0223) -#define ADCA_CH0_RES _SFR_MEM16(0x0224) -#define ADCA_CH1_CTRL _SFR_MEM8(0x0228) -#define ADCA_CH1_MUXCTRL _SFR_MEM8(0x0229) -#define ADCA_CH1_INTCTRL _SFR_MEM8(0x022A) -#define ADCA_CH1_INTFLAGS _SFR_MEM8(0x022B) -#define ADCA_CH1_RES _SFR_MEM16(0x022C) -#define ADCA_CH2_CTRL _SFR_MEM8(0x0230) -#define ADCA_CH2_MUXCTRL _SFR_MEM8(0x0231) -#define ADCA_CH2_INTCTRL _SFR_MEM8(0x0232) -#define ADCA_CH2_INTFLAGS _SFR_MEM8(0x0233) -#define ADCA_CH2_RES _SFR_MEM16(0x0234) -#define ADCA_CH3_CTRL _SFR_MEM8(0x0238) -#define ADCA_CH3_MUXCTRL _SFR_MEM8(0x0239) -#define ADCA_CH3_INTCTRL _SFR_MEM8(0x023A) -#define ADCA_CH3_INTFLAGS _SFR_MEM8(0x023B) -#define ADCA_CH3_RES _SFR_MEM16(0x023C) - -/* ADCB - Analog to Digital Converter B */ -#define ADCB_CTRLA _SFR_MEM8(0x0240) -#define ADCB_CTRLB _SFR_MEM8(0x0241) -#define ADCB_REFCTRL _SFR_MEM8(0x0242) -#define ADCB_EVCTRL _SFR_MEM8(0x0243) -#define ADCB_PRESCALER _SFR_MEM8(0x0244) -#define ADCB_CALCTRL _SFR_MEM8(0x0245) -#define ADCB_INTFLAGS _SFR_MEM8(0x0246) -#define ADCB_CALIB _SFR_MEM8(0x024C) -#define ADCB_CH0RES _SFR_MEM16(0x0250) -#define ADCB_CH1RES _SFR_MEM16(0x0252) -#define ADCB_CH2RES _SFR_MEM16(0x0254) -#define ADCB_CH3RES _SFR_MEM16(0x0256) -#define ADCB_CMP _SFR_MEM16(0x0258) -#define ADCB_CH0_CTRL _SFR_MEM8(0x0260) -#define ADCB_CH0_MUXCTRL _SFR_MEM8(0x0261) -#define ADCB_CH0_INTCTRL _SFR_MEM8(0x0262) -#define ADCB_CH0_INTFLAGS _SFR_MEM8(0x0263) -#define ADCB_CH0_RES _SFR_MEM16(0x0264) -#define ADCB_CH1_CTRL _SFR_MEM8(0x0268) -#define ADCB_CH1_MUXCTRL _SFR_MEM8(0x0269) -#define ADCB_CH1_INTCTRL _SFR_MEM8(0x026A) -#define ADCB_CH1_INTFLAGS _SFR_MEM8(0x026B) -#define ADCB_CH1_RES _SFR_MEM16(0x026C) -#define ADCB_CH2_CTRL _SFR_MEM8(0x0270) -#define ADCB_CH2_MUXCTRL _SFR_MEM8(0x0271) -#define ADCB_CH2_INTCTRL _SFR_MEM8(0x0272) -#define ADCB_CH2_INTFLAGS _SFR_MEM8(0x0273) -#define ADCB_CH2_RES _SFR_MEM16(0x0274) -#define ADCB_CH3_CTRL _SFR_MEM8(0x0278) -#define ADCB_CH3_MUXCTRL _SFR_MEM8(0x0279) -#define ADCB_CH3_INTCTRL _SFR_MEM8(0x027A) -#define ADCB_CH3_INTFLAGS _SFR_MEM8(0x027B) -#define ADCB_CH3_RES _SFR_MEM16(0x027C) - -/* DACB - Digital to Analog Converter B */ -#define DACB_CTRLA _SFR_MEM8(0x0320) -#define DACB_CTRLB _SFR_MEM8(0x0321) -#define DACB_CTRLC _SFR_MEM8(0x0322) -#define DACB_EVCTRL _SFR_MEM8(0x0323) -#define DACB_TIMCTRL _SFR_MEM8(0x0324) -#define DACB_STATUS _SFR_MEM8(0x0325) -#define DACB_GAINCAL _SFR_MEM8(0x0328) -#define DACB_OFFSETCAL _SFR_MEM8(0x0329) -#define DACB_CH0DATA _SFR_MEM16(0x0338) -#define DACB_CH1DATA _SFR_MEM16(0x033A) - -/* ACA - Analog Comparator A */ -#define ACA_AC0CTRL _SFR_MEM8(0x0380) -#define ACA_AC1CTRL _SFR_MEM8(0x0381) -#define ACA_AC0MUXCTRL _SFR_MEM8(0x0382) -#define ACA_AC1MUXCTRL _SFR_MEM8(0x0383) -#define ACA_CTRLA _SFR_MEM8(0x0384) -#define ACA_CTRLB _SFR_MEM8(0x0385) -#define ACA_WINCTRL _SFR_MEM8(0x0386) -#define ACA_STATUS _SFR_MEM8(0x0387) - -/* ACB - Analog Comparator B */ -#define ACB_AC0CTRL _SFR_MEM8(0x0390) -#define ACB_AC1CTRL _SFR_MEM8(0x0391) -#define ACB_AC0MUXCTRL _SFR_MEM8(0x0392) -#define ACB_AC1MUXCTRL _SFR_MEM8(0x0393) -#define ACB_CTRLA _SFR_MEM8(0x0394) -#define ACB_CTRLB _SFR_MEM8(0x0395) -#define ACB_WINCTRL _SFR_MEM8(0x0396) -#define ACB_STATUS _SFR_MEM8(0x0397) - -/* RTC32 - 32-bit Real-Time Counter */ -#define RTC32_CTRL _SFR_MEM8(0x0420) -#define RTC32_SYNCCTRL _SFR_MEM8(0x0421) -#define RTC32_INTCTRL _SFR_MEM8(0x0422) -#define RTC32_INTFLAGS _SFR_MEM8(0x0423) - -/* TWIC - Two-Wire Interface C */ -#define TWIC_CTRL _SFR_MEM8(0x0480) -#define TWIC_MASTER_CTRLA _SFR_MEM8(0x0481) -#define TWIC_MASTER_CTRLB _SFR_MEM8(0x0482) -#define TWIC_MASTER_CTRLC _SFR_MEM8(0x0483) -#define TWIC_MASTER_STATUS _SFR_MEM8(0x0484) -#define TWIC_MASTER_BAUD _SFR_MEM8(0x0485) -#define TWIC_MASTER_ADDR _SFR_MEM8(0x0486) -#define TWIC_MASTER_DATA _SFR_MEM8(0x0487) -#define TWIC_SLAVE_CTRLA _SFR_MEM8(0x0488) -#define TWIC_SLAVE_CTRLB _SFR_MEM8(0x0489) -#define TWIC_SLAVE_STATUS _SFR_MEM8(0x048A) -#define TWIC_SLAVE_ADDR _SFR_MEM8(0x048B) -#define TWIC_SLAVE_DATA _SFR_MEM8(0x048C) - -/* TWIE - Two-Wire Interface E */ -#define TWIE_CTRL _SFR_MEM8(0x04A0) -#define TWIE_MASTER_CTRLA _SFR_MEM8(0x04A1) -#define TWIE_MASTER_CTRLB _SFR_MEM8(0x04A2) -#define TWIE_MASTER_CTRLC _SFR_MEM8(0x04A3) -#define TWIE_MASTER_STATUS _SFR_MEM8(0x04A4) -#define TWIE_MASTER_BAUD _SFR_MEM8(0x04A5) -#define TWIE_MASTER_ADDR _SFR_MEM8(0x04A6) -#define TWIE_MASTER_DATA _SFR_MEM8(0x04A7) -#define TWIE_SLAVE_CTRLA _SFR_MEM8(0x04A8) -#define TWIE_SLAVE_CTRLB _SFR_MEM8(0x04A9) -#define TWIE_SLAVE_STATUS _SFR_MEM8(0x04AA) -#define TWIE_SLAVE_ADDR _SFR_MEM8(0x04AB) -#define TWIE_SLAVE_DATA _SFR_MEM8(0x04AC) - -/* PORTA - Port A */ -#define PORTA_DIR _SFR_MEM8(0x0600) -#define PORTA_DIRSET _SFR_MEM8(0x0601) -#define PORTA_DIRCLR _SFR_MEM8(0x0602) -#define PORTA_DIRTGL _SFR_MEM8(0x0603) -#define PORTA_OUT _SFR_MEM8(0x0604) -#define PORTA_OUTSET _SFR_MEM8(0x0605) -#define PORTA_OUTCLR _SFR_MEM8(0x0606) -#define PORTA_OUTTGL _SFR_MEM8(0x0607) -#define PORTA_IN _SFR_MEM8(0x0608) -#define PORTA_INTCTRL _SFR_MEM8(0x0609) -#define PORTA_INT0MASK _SFR_MEM8(0x060A) -#define PORTA_INT1MASK _SFR_MEM8(0x060B) -#define PORTA_INTFLAGS _SFR_MEM8(0x060C) -#define PORTA_PIN0CTRL _SFR_MEM8(0x0610) -#define PORTA_PIN1CTRL _SFR_MEM8(0x0611) -#define PORTA_PIN2CTRL _SFR_MEM8(0x0612) -#define PORTA_PIN3CTRL _SFR_MEM8(0x0613) -#define PORTA_PIN4CTRL _SFR_MEM8(0x0614) -#define PORTA_PIN5CTRL _SFR_MEM8(0x0615) -#define PORTA_PIN6CTRL _SFR_MEM8(0x0616) -#define PORTA_PIN7CTRL _SFR_MEM8(0x0617) - -/* PORTB - Port B */ -#define PORTB_DIR _SFR_MEM8(0x0620) -#define PORTB_DIRSET _SFR_MEM8(0x0621) -#define PORTB_DIRCLR _SFR_MEM8(0x0622) -#define PORTB_DIRTGL _SFR_MEM8(0x0623) -#define PORTB_OUT _SFR_MEM8(0x0624) -#define PORTB_OUTSET _SFR_MEM8(0x0625) -#define PORTB_OUTCLR _SFR_MEM8(0x0626) -#define PORTB_OUTTGL _SFR_MEM8(0x0627) -#define PORTB_IN _SFR_MEM8(0x0628) -#define PORTB_INTCTRL _SFR_MEM8(0x0629) -#define PORTB_INT0MASK _SFR_MEM8(0x062A) -#define PORTB_INT1MASK _SFR_MEM8(0x062B) -#define PORTB_INTFLAGS _SFR_MEM8(0x062C) -#define PORTB_PIN0CTRL _SFR_MEM8(0x0630) -#define PORTB_PIN1CTRL _SFR_MEM8(0x0631) -#define PORTB_PIN2CTRL _SFR_MEM8(0x0632) -#define PORTB_PIN3CTRL _SFR_MEM8(0x0633) -#define PORTB_PIN4CTRL _SFR_MEM8(0x0634) -#define PORTB_PIN5CTRL _SFR_MEM8(0x0635) -#define PORTB_PIN6CTRL _SFR_MEM8(0x0636) -#define PORTB_PIN7CTRL _SFR_MEM8(0x0637) - -/* PORTC - Port C */ -#define PORTC_DIR _SFR_MEM8(0x0640) -#define PORTC_DIRSET _SFR_MEM8(0x0641) -#define PORTC_DIRCLR _SFR_MEM8(0x0642) -#define PORTC_DIRTGL _SFR_MEM8(0x0643) -#define PORTC_OUT _SFR_MEM8(0x0644) -#define PORTC_OUTSET _SFR_MEM8(0x0645) -#define PORTC_OUTCLR _SFR_MEM8(0x0646) -#define PORTC_OUTTGL _SFR_MEM8(0x0647) -#define PORTC_IN _SFR_MEM8(0x0648) -#define PORTC_INTCTRL _SFR_MEM8(0x0649) -#define PORTC_INT0MASK _SFR_MEM8(0x064A) -#define PORTC_INT1MASK _SFR_MEM8(0x064B) -#define PORTC_INTFLAGS _SFR_MEM8(0x064C) -#define PORTC_PIN0CTRL _SFR_MEM8(0x0650) -#define PORTC_PIN1CTRL _SFR_MEM8(0x0651) -#define PORTC_PIN2CTRL _SFR_MEM8(0x0652) -#define PORTC_PIN3CTRL _SFR_MEM8(0x0653) -#define PORTC_PIN4CTRL _SFR_MEM8(0x0654) -#define PORTC_PIN5CTRL _SFR_MEM8(0x0655) -#define PORTC_PIN6CTRL _SFR_MEM8(0x0656) -#define PORTC_PIN7CTRL _SFR_MEM8(0x0657) - -/* PORTD - Port D */ -#define PORTD_DIR _SFR_MEM8(0x0660) -#define PORTD_DIRSET _SFR_MEM8(0x0661) -#define PORTD_DIRCLR _SFR_MEM8(0x0662) -#define PORTD_DIRTGL _SFR_MEM8(0x0663) -#define PORTD_OUT _SFR_MEM8(0x0664) -#define PORTD_OUTSET _SFR_MEM8(0x0665) -#define PORTD_OUTCLR _SFR_MEM8(0x0666) -#define PORTD_OUTTGL _SFR_MEM8(0x0667) -#define PORTD_IN _SFR_MEM8(0x0668) -#define PORTD_INTCTRL _SFR_MEM8(0x0669) -#define PORTD_INT0MASK _SFR_MEM8(0x066A) -#define PORTD_INT1MASK _SFR_MEM8(0x066B) -#define PORTD_INTFLAGS _SFR_MEM8(0x066C) -#define PORTD_PIN0CTRL _SFR_MEM8(0x0670) -#define PORTD_PIN1CTRL _SFR_MEM8(0x0671) -#define PORTD_PIN2CTRL _SFR_MEM8(0x0672) -#define PORTD_PIN3CTRL _SFR_MEM8(0x0673) -#define PORTD_PIN4CTRL _SFR_MEM8(0x0674) -#define PORTD_PIN5CTRL _SFR_MEM8(0x0675) -#define PORTD_PIN6CTRL _SFR_MEM8(0x0676) -#define PORTD_PIN7CTRL _SFR_MEM8(0x0677) - -/* PORTE - Port E */ -#define PORTE_DIR _SFR_MEM8(0x0680) -#define PORTE_DIRSET _SFR_MEM8(0x0681) -#define PORTE_DIRCLR _SFR_MEM8(0x0682) -#define PORTE_DIRTGL _SFR_MEM8(0x0683) -#define PORTE_OUT _SFR_MEM8(0x0684) -#define PORTE_OUTSET _SFR_MEM8(0x0685) -#define PORTE_OUTCLR _SFR_MEM8(0x0686) -#define PORTE_OUTTGL _SFR_MEM8(0x0687) -#define PORTE_IN _SFR_MEM8(0x0688) -#define PORTE_INTCTRL _SFR_MEM8(0x0689) -#define PORTE_INT0MASK _SFR_MEM8(0x068A) -#define PORTE_INT1MASK _SFR_MEM8(0x068B) -#define PORTE_INTFLAGS _SFR_MEM8(0x068C) -#define PORTE_PIN0CTRL _SFR_MEM8(0x0690) -#define PORTE_PIN1CTRL _SFR_MEM8(0x0691) -#define PORTE_PIN2CTRL _SFR_MEM8(0x0692) -#define PORTE_PIN3CTRL _SFR_MEM8(0x0693) -#define PORTE_PIN4CTRL _SFR_MEM8(0x0694) -#define PORTE_PIN5CTRL _SFR_MEM8(0x0695) -#define PORTE_PIN6CTRL _SFR_MEM8(0x0696) -#define PORTE_PIN7CTRL _SFR_MEM8(0x0697) - -/* PORTF - Port F */ -#define PORTF_DIR _SFR_MEM8(0x06A0) -#define PORTF_DIRSET _SFR_MEM8(0x06A1) -#define PORTF_DIRCLR _SFR_MEM8(0x06A2) -#define PORTF_DIRTGL _SFR_MEM8(0x06A3) -#define PORTF_OUT _SFR_MEM8(0x06A4) -#define PORTF_OUTSET _SFR_MEM8(0x06A5) -#define PORTF_OUTCLR _SFR_MEM8(0x06A6) -#define PORTF_OUTTGL _SFR_MEM8(0x06A7) -#define PORTF_IN _SFR_MEM8(0x06A8) -#define PORTF_INTCTRL _SFR_MEM8(0x06A9) -#define PORTF_INT0MASK _SFR_MEM8(0x06AA) -#define PORTF_INT1MASK _SFR_MEM8(0x06AB) -#define PORTF_INTFLAGS _SFR_MEM8(0x06AC) -#define PORTF_PIN0CTRL _SFR_MEM8(0x06B0) -#define PORTF_PIN1CTRL _SFR_MEM8(0x06B1) -#define PORTF_PIN2CTRL _SFR_MEM8(0x06B2) -#define PORTF_PIN3CTRL _SFR_MEM8(0x06B3) -#define PORTF_PIN4CTRL _SFR_MEM8(0x06B4) -#define PORTF_PIN5CTRL _SFR_MEM8(0x06B5) -#define PORTF_PIN6CTRL _SFR_MEM8(0x06B6) -#define PORTF_PIN7CTRL _SFR_MEM8(0x06B7) - -/* PORTR - Port R */ -#define PORTR_DIR _SFR_MEM8(0x07E0) -#define PORTR_DIRSET _SFR_MEM8(0x07E1) -#define PORTR_DIRCLR _SFR_MEM8(0x07E2) -#define PORTR_DIRTGL _SFR_MEM8(0x07E3) -#define PORTR_OUT _SFR_MEM8(0x07E4) -#define PORTR_OUTSET _SFR_MEM8(0x07E5) -#define PORTR_OUTCLR _SFR_MEM8(0x07E6) -#define PORTR_OUTTGL _SFR_MEM8(0x07E7) -#define PORTR_IN _SFR_MEM8(0x07E8) -#define PORTR_INTCTRL _SFR_MEM8(0x07E9) -#define PORTR_INT0MASK _SFR_MEM8(0x07EA) -#define PORTR_INT1MASK _SFR_MEM8(0x07EB) -#define PORTR_INTFLAGS _SFR_MEM8(0x07EC) -#define PORTR_PIN0CTRL _SFR_MEM8(0x07F0) -#define PORTR_PIN1CTRL _SFR_MEM8(0x07F1) -#define PORTR_PIN2CTRL _SFR_MEM8(0x07F2) -#define PORTR_PIN3CTRL _SFR_MEM8(0x07F3) -#define PORTR_PIN4CTRL _SFR_MEM8(0x07F4) -#define PORTR_PIN5CTRL _SFR_MEM8(0x07F5) -#define PORTR_PIN6CTRL _SFR_MEM8(0x07F6) -#define PORTR_PIN7CTRL _SFR_MEM8(0x07F7) - -/* TCC0 - Timer/Counter C0 */ -#define TCC0_CTRLA _SFR_MEM8(0x0800) -#define TCC0_CTRLB _SFR_MEM8(0x0801) -#define TCC0_CTRLC _SFR_MEM8(0x0802) -#define TCC0_CTRLD _SFR_MEM8(0x0803) -#define TCC0_CTRLE _SFR_MEM8(0x0804) -#define TCC0_INTCTRLA _SFR_MEM8(0x0806) -#define TCC0_INTCTRLB _SFR_MEM8(0x0807) -#define TCC0_CTRLFCLR _SFR_MEM8(0x0808) -#define TCC0_CTRLFSET _SFR_MEM8(0x0809) -#define TCC0_CTRLGCLR _SFR_MEM8(0x080A) -#define TCC0_CTRLGSET _SFR_MEM8(0x080B) -#define TCC0_INTFLAGS _SFR_MEM8(0x080C) -#define TCC0_TEMP _SFR_MEM8(0x080F) -#define TCC0_CNT _SFR_MEM16(0x0820) -#define TCC0_PER _SFR_MEM16(0x0826) -#define TCC0_CCA _SFR_MEM16(0x0828) -#define TCC0_CCB _SFR_MEM16(0x082A) -#define TCC0_CCC _SFR_MEM16(0x082C) -#define TCC0_CCD _SFR_MEM16(0x082E) -#define TCC0_PERBUF _SFR_MEM16(0x0836) -#define TCC0_CCABUF _SFR_MEM16(0x0838) -#define TCC0_CCBBUF _SFR_MEM16(0x083A) -#define TCC0_CCCBUF _SFR_MEM16(0x083C) -#define TCC0_CCDBUF _SFR_MEM16(0x083E) - -/* TCC1 - Timer/Counter C1 */ -#define TCC1_CTRLA _SFR_MEM8(0x0840) -#define TCC1_CTRLB _SFR_MEM8(0x0841) -#define TCC1_CTRLC _SFR_MEM8(0x0842) -#define TCC1_CTRLD _SFR_MEM8(0x0843) -#define TCC1_CTRLE _SFR_MEM8(0x0844) -#define TCC1_INTCTRLA _SFR_MEM8(0x0846) -#define TCC1_INTCTRLB _SFR_MEM8(0x0847) -#define TCC1_CTRLFCLR _SFR_MEM8(0x0848) -#define TCC1_CTRLFSET _SFR_MEM8(0x0849) -#define TCC1_CTRLGCLR _SFR_MEM8(0x084A) -#define TCC1_CTRLGSET _SFR_MEM8(0x084B) -#define TCC1_INTFLAGS _SFR_MEM8(0x084C) -#define TCC1_TEMP _SFR_MEM8(0x084F) -#define TCC1_CNT _SFR_MEM16(0x0860) -#define TCC1_PER _SFR_MEM16(0x0866) -#define TCC1_CCA _SFR_MEM16(0x0868) -#define TCC1_CCB _SFR_MEM16(0x086A) -#define TCC1_PERBUF _SFR_MEM16(0x0876) -#define TCC1_CCABUF _SFR_MEM16(0x0878) -#define TCC1_CCBBUF _SFR_MEM16(0x087A) - -/* AWEXC - Advanced Waveform Extension C */ -#define AWEXC_CTRL _SFR_MEM8(0x0880) -#define AWEXC_FDEVMASK _SFR_MEM8(0x0882) -#define AWEXC_FDCTRL _SFR_MEM8(0x0883) -#define AWEXC_STATUS _SFR_MEM8(0x0884) -#define AWEXC_DTBOTH _SFR_MEM8(0x0886) -#define AWEXC_DTBOTHBUF _SFR_MEM8(0x0887) -#define AWEXC_DTLS _SFR_MEM8(0x0888) -#define AWEXC_DTHS _SFR_MEM8(0x0889) -#define AWEXC_DTLSBUF _SFR_MEM8(0x088A) -#define AWEXC_DTHSBUF _SFR_MEM8(0x088B) -#define AWEXC_OUTOVEN _SFR_MEM8(0x088C) - -/* HIRESC - High-Resolution Extension C */ -#define HIRESC_CTRL _SFR_MEM8(0x0890) - -/* USARTC0 - Universal Asynchronous Receiver-Transmitter C0 */ -#define USARTC0_DATA _SFR_MEM8(0x08A0) -#define USARTC0_STATUS _SFR_MEM8(0x08A1) -#define USARTC0_CTRLA _SFR_MEM8(0x08A3) -#define USARTC0_CTRLB _SFR_MEM8(0x08A4) -#define USARTC0_CTRLC _SFR_MEM8(0x08A5) -#define USARTC0_BAUDCTRLA _SFR_MEM8(0x08A6) -#define USARTC0_BAUDCTRLB _SFR_MEM8(0x08A7) - -/* USARTC1 - Universal Asynchronous Receiver-Transmitter C1 */ -#define USARTC1_DATA _SFR_MEM8(0x08B0) -#define USARTC1_STATUS _SFR_MEM8(0x08B1) -#define USARTC1_CTRLA _SFR_MEM8(0x08B3) -#define USARTC1_CTRLB _SFR_MEM8(0x08B4) -#define USARTC1_CTRLC _SFR_MEM8(0x08B5) -#define USARTC1_BAUDCTRLA _SFR_MEM8(0x08B6) -#define USARTC1_BAUDCTRLB _SFR_MEM8(0x08B7) - -/* SPIC - Serial Peripheral Interface C */ -#define SPIC_CTRL _SFR_MEM8(0x08C0) -#define SPIC_INTCTRL _SFR_MEM8(0x08C1) -#define SPIC_STATUS _SFR_MEM8(0x08C2) -#define SPIC_DATA _SFR_MEM8(0x08C3) - -/* IRCOM - IR Communication Module */ -#define IRCOM_CTRL _SFR_MEM8(0x08F8) -#define IRCOM_TXPLCTRL _SFR_MEM8(0x08F9) -#define IRCOM_RXPLCTRL _SFR_MEM8(0x08FA) - -/* TCD0 - Timer/Counter D0 */ -#define TCD0_CTRLA _SFR_MEM8(0x0900) -#define TCD0_CTRLB _SFR_MEM8(0x0901) -#define TCD0_CTRLC _SFR_MEM8(0x0902) -#define TCD0_CTRLD _SFR_MEM8(0x0903) -#define TCD0_CTRLE _SFR_MEM8(0x0904) -#define TCD0_INTCTRLA _SFR_MEM8(0x0906) -#define TCD0_INTCTRLB _SFR_MEM8(0x0907) -#define TCD0_CTRLFCLR _SFR_MEM8(0x0908) -#define TCD0_CTRLFSET _SFR_MEM8(0x0909) -#define TCD0_CTRLGCLR _SFR_MEM8(0x090A) -#define TCD0_CTRLGSET _SFR_MEM8(0x090B) -#define TCD0_INTFLAGS _SFR_MEM8(0x090C) -#define TCD0_TEMP _SFR_MEM8(0x090F) -#define TCD0_CNT _SFR_MEM16(0x0920) -#define TCD0_PER _SFR_MEM16(0x0926) -#define TCD0_CCA _SFR_MEM16(0x0928) -#define TCD0_CCB _SFR_MEM16(0x092A) -#define TCD0_CCC _SFR_MEM16(0x092C) -#define TCD0_CCD _SFR_MEM16(0x092E) -#define TCD0_PERBUF _SFR_MEM16(0x0936) -#define TCD0_CCABUF _SFR_MEM16(0x0938) -#define TCD0_CCBBUF _SFR_MEM16(0x093A) -#define TCD0_CCCBUF _SFR_MEM16(0x093C) -#define TCD0_CCDBUF _SFR_MEM16(0x093E) - -/* TCD1 - Timer/Counter D1 */ -#define TCD1_CTRLA _SFR_MEM8(0x0940) -#define TCD1_CTRLB _SFR_MEM8(0x0941) -#define TCD1_CTRLC _SFR_MEM8(0x0942) -#define TCD1_CTRLD _SFR_MEM8(0x0943) -#define TCD1_CTRLE _SFR_MEM8(0x0944) -#define TCD1_INTCTRLA _SFR_MEM8(0x0946) -#define TCD1_INTCTRLB _SFR_MEM8(0x0947) -#define TCD1_CTRLFCLR _SFR_MEM8(0x0948) -#define TCD1_CTRLFSET _SFR_MEM8(0x0949) -#define TCD1_CTRLGCLR _SFR_MEM8(0x094A) -#define TCD1_CTRLGSET _SFR_MEM8(0x094B) -#define TCD1_INTFLAGS _SFR_MEM8(0x094C) -#define TCD1_TEMP _SFR_MEM8(0x094F) -#define TCD1_CNT _SFR_MEM16(0x0960) -#define TCD1_PER _SFR_MEM16(0x0966) -#define TCD1_CCA _SFR_MEM16(0x0968) -#define TCD1_CCB _SFR_MEM16(0x096A) -#define TCD1_PERBUF _SFR_MEM16(0x0976) -#define TCD1_CCABUF _SFR_MEM16(0x0978) -#define TCD1_CCBBUF _SFR_MEM16(0x097A) - -/* HIRESD - High-Resolution Extension D */ -#define HIRESD_CTRL _SFR_MEM8(0x0990) - -/* USARTD0 - Universal Asynchronous Receiver-Transmitter D0 */ -#define USARTD0_DATA _SFR_MEM8(0x09A0) -#define USARTD0_STATUS _SFR_MEM8(0x09A1) -#define USARTD0_CTRLA _SFR_MEM8(0x09A3) -#define USARTD0_CTRLB _SFR_MEM8(0x09A4) -#define USARTD0_CTRLC _SFR_MEM8(0x09A5) -#define USARTD0_BAUDCTRLA _SFR_MEM8(0x09A6) -#define USARTD0_BAUDCTRLB _SFR_MEM8(0x09A7) - -/* USARTD1 - Universal Asynchronous Receiver-Transmitter D1 */ -#define USARTD1_DATA _SFR_MEM8(0x09B0) -#define USARTD1_STATUS _SFR_MEM8(0x09B1) -#define USARTD1_CTRLA _SFR_MEM8(0x09B3) -#define USARTD1_CTRLB _SFR_MEM8(0x09B4) -#define USARTD1_CTRLC _SFR_MEM8(0x09B5) -#define USARTD1_BAUDCTRLA _SFR_MEM8(0x09B6) -#define USARTD1_BAUDCTRLB _SFR_MEM8(0x09B7) - -/* SPID - Serial Peripheral Interface D */ -#define SPID_CTRL _SFR_MEM8(0x09C0) -#define SPID_INTCTRL _SFR_MEM8(0x09C1) -#define SPID_STATUS _SFR_MEM8(0x09C2) -#define SPID_DATA _SFR_MEM8(0x09C3) - -/* TCE0 - Timer/Counter E0 */ -#define TCE0_CTRLA _SFR_MEM8(0x0A00) -#define TCE0_CTRLB _SFR_MEM8(0x0A01) -#define TCE0_CTRLC _SFR_MEM8(0x0A02) -#define TCE0_CTRLD _SFR_MEM8(0x0A03) -#define TCE0_CTRLE _SFR_MEM8(0x0A04) -#define TCE0_INTCTRLA _SFR_MEM8(0x0A06) -#define TCE0_INTCTRLB _SFR_MEM8(0x0A07) -#define TCE0_CTRLFCLR _SFR_MEM8(0x0A08) -#define TCE0_CTRLFSET _SFR_MEM8(0x0A09) -#define TCE0_CTRLGCLR _SFR_MEM8(0x0A0A) -#define TCE0_CTRLGSET _SFR_MEM8(0x0A0B) -#define TCE0_INTFLAGS _SFR_MEM8(0x0A0C) -#define TCE0_TEMP _SFR_MEM8(0x0A0F) -#define TCE0_CNT _SFR_MEM16(0x0A20) -#define TCE0_PER _SFR_MEM16(0x0A26) -#define TCE0_CCA _SFR_MEM16(0x0A28) -#define TCE0_CCB _SFR_MEM16(0x0A2A) -#define TCE0_CCC _SFR_MEM16(0x0A2C) -#define TCE0_CCD _SFR_MEM16(0x0A2E) -#define TCE0_PERBUF _SFR_MEM16(0x0A36) -#define TCE0_CCABUF _SFR_MEM16(0x0A38) -#define TCE0_CCBBUF _SFR_MEM16(0x0A3A) -#define TCE0_CCCBUF _SFR_MEM16(0x0A3C) -#define TCE0_CCDBUF _SFR_MEM16(0x0A3E) - -/* TCE1 - Timer/Counter E1 */ -#define TCE1_CTRLA _SFR_MEM8(0x0A40) -#define TCE1_CTRLB _SFR_MEM8(0x0A41) -#define TCE1_CTRLC _SFR_MEM8(0x0A42) -#define TCE1_CTRLD _SFR_MEM8(0x0A43) -#define TCE1_CTRLE _SFR_MEM8(0x0A44) -#define TCE1_INTCTRLA _SFR_MEM8(0x0A46) -#define TCE1_INTCTRLB _SFR_MEM8(0x0A47) -#define TCE1_CTRLFCLR _SFR_MEM8(0x0A48) -#define TCE1_CTRLFSET _SFR_MEM8(0x0A49) -#define TCE1_CTRLGCLR _SFR_MEM8(0x0A4A) -#define TCE1_CTRLGSET _SFR_MEM8(0x0A4B) -#define TCE1_INTFLAGS _SFR_MEM8(0x0A4C) -#define TCE1_TEMP _SFR_MEM8(0x0A4F) -#define TCE1_CNT _SFR_MEM16(0x0A60) -#define TCE1_PER _SFR_MEM16(0x0A66) -#define TCE1_CCA _SFR_MEM16(0x0A68) -#define TCE1_CCB _SFR_MEM16(0x0A6A) -#define TCE1_PERBUF _SFR_MEM16(0x0A76) -#define TCE1_CCABUF _SFR_MEM16(0x0A78) -#define TCE1_CCBBUF _SFR_MEM16(0x0A7A) - -/* AWEXE - Advanced Waveform Extension E */ -#define AWEXE_CTRL _SFR_MEM8(0x0A80) -#define AWEXE_FDEVMASK _SFR_MEM8(0x0A82) -#define AWEXE_FDCTRL _SFR_MEM8(0x0A83) -#define AWEXE_STATUS _SFR_MEM8(0x0A84) -#define AWEXE_DTBOTH _SFR_MEM8(0x0A86) -#define AWEXE_DTBOTHBUF _SFR_MEM8(0x0A87) -#define AWEXE_DTLS _SFR_MEM8(0x0A88) -#define AWEXE_DTHS _SFR_MEM8(0x0A89) -#define AWEXE_DTLSBUF _SFR_MEM8(0x0A8A) -#define AWEXE_DTHSBUF _SFR_MEM8(0x0A8B) -#define AWEXE_OUTOVEN _SFR_MEM8(0x0A8C) - -/* HIRESE - High-Resolution Extension E */ -#define HIRESE_CTRL _SFR_MEM8(0x0A90) - -/* USARTE0 - Universal Asynchronous Receiver-Transmitter E0 */ -#define USARTE0_DATA _SFR_MEM8(0x0AA0) -#define USARTE0_STATUS _SFR_MEM8(0x0AA1) -#define USARTE0_CTRLA _SFR_MEM8(0x0AA3) -#define USARTE0_CTRLB _SFR_MEM8(0x0AA4) -#define USARTE0_CTRLC _SFR_MEM8(0x0AA5) -#define USARTE0_BAUDCTRLA _SFR_MEM8(0x0AA6) -#define USARTE0_BAUDCTRLB _SFR_MEM8(0x0AA7) - -/* TCF0 - Timer/Counter F0 */ -#define TCF0_CTRLA _SFR_MEM8(0x0B00) -#define TCF0_CTRLB _SFR_MEM8(0x0B01) -#define TCF0_CTRLC _SFR_MEM8(0x0B02) -#define TCF0_CTRLD _SFR_MEM8(0x0B03) -#define TCF0_CTRLE _SFR_MEM8(0x0B04) -#define TCF0_INTCTRLA _SFR_MEM8(0x0B06) -#define TCF0_INTCTRLB _SFR_MEM8(0x0B07) -#define TCF0_CTRLFCLR _SFR_MEM8(0x0B08) -#define TCF0_CTRLFSET _SFR_MEM8(0x0B09) -#define TCF0_CTRLGCLR _SFR_MEM8(0x0B0A) -#define TCF0_CTRLGSET _SFR_MEM8(0x0B0B) -#define TCF0_INTFLAGS _SFR_MEM8(0x0B0C) -#define TCF0_TEMP _SFR_MEM8(0x0B0F) -#define TCF0_CNT _SFR_MEM16(0x0B20) -#define TCF0_PER _SFR_MEM16(0x0B26) -#define TCF0_CCA _SFR_MEM16(0x0B28) -#define TCF0_CCB _SFR_MEM16(0x0B2A) -#define TCF0_CCC _SFR_MEM16(0x0B2C) -#define TCF0_CCD _SFR_MEM16(0x0B2E) -#define TCF0_PERBUF _SFR_MEM16(0x0B36) -#define TCF0_CCABUF _SFR_MEM16(0x0B38) -#define TCF0_CCBBUF _SFR_MEM16(0x0B3A) -#define TCF0_CCCBUF _SFR_MEM16(0x0B3C) -#define TCF0_CCDBUF _SFR_MEM16(0x0B3E) - -/* HIRESF - High-Resolution Extension F */ -#define HIRESF_CTRL _SFR_MEM8(0x0B90) - -/* USARTF0 - Universal Asynchronous Receiver-Transmitter F0 */ -#define USARTF0_DATA _SFR_MEM8(0x0BA0) -#define USARTF0_STATUS _SFR_MEM8(0x0BA1) -#define USARTF0_CTRLA _SFR_MEM8(0x0BA3) -#define USARTF0_CTRLB _SFR_MEM8(0x0BA4) -#define USARTF0_CTRLC _SFR_MEM8(0x0BA5) -#define USARTF0_BAUDCTRLA _SFR_MEM8(0x0BA6) -#define USARTF0_BAUDCTRLB _SFR_MEM8(0x0BA7) - -/* USARTF1 - Universal Asynchronous Receiver-Transmitter F1 */ -#define USARTF1_DATA _SFR_MEM8(0x0BB0) -#define USARTF1_STATUS _SFR_MEM8(0x0BB1) -#define USARTF1_CTRLA _SFR_MEM8(0x0BB3) -#define USARTF1_CTRLB _SFR_MEM8(0x0BB4) -#define USARTF1_CTRLC _SFR_MEM8(0x0BB5) -#define USARTF1_BAUDCTRLA _SFR_MEM8(0x0BB6) -#define USARTF1_BAUDCTRLB _SFR_MEM8(0x0BB7) - -/* SPIF - Serial Peripheral Interface F */ -#define SPIF_CTRL _SFR_MEM8(0x0BC0) -#define SPIF_INTCTRL _SFR_MEM8(0x0BC1) -#define SPIF_STATUS _SFR_MEM8(0x0BC2) -#define SPIF_DATA _SFR_MEM8(0x0BC3) - - - -/*================== Bitfield Definitions ================== */ - -/* XOCD - On-Chip Debug System */ -/* OCD.OCDR1 bit masks and bit positions */ -#define OCD_OCDRD_bm 0x01 /* OCDR Dirty bit mask. */ -#define OCD_OCDRD_bp 0 /* OCDR Dirty bit position. */ - - -/* CPU - CPU */ -/* CPU.CCP bit masks and bit positions */ -#define CPU_CCP_gm 0xFF /* CCP signature group mask. */ -#define CPU_CCP_gp 0 /* CCP signature group position. */ -#define CPU_CCP0_bm (1<<0) /* CCP signature bit 0 mask. */ -#define CPU_CCP0_bp 0 /* CCP signature bit 0 position. */ -#define CPU_CCP1_bm (1<<1) /* CCP signature bit 1 mask. */ -#define CPU_CCP1_bp 1 /* CCP signature bit 1 position. */ -#define CPU_CCP2_bm (1<<2) /* CCP signature bit 2 mask. */ -#define CPU_CCP2_bp 2 /* CCP signature bit 2 position. */ -#define CPU_CCP3_bm (1<<3) /* CCP signature bit 3 mask. */ -#define CPU_CCP3_bp 3 /* CCP signature bit 3 position. */ -#define CPU_CCP4_bm (1<<4) /* CCP signature bit 4 mask. */ -#define CPU_CCP4_bp 4 /* CCP signature bit 4 position. */ -#define CPU_CCP5_bm (1<<5) /* CCP signature bit 5 mask. */ -#define CPU_CCP5_bp 5 /* CCP signature bit 5 position. */ -#define CPU_CCP6_bm (1<<6) /* CCP signature bit 6 mask. */ -#define CPU_CCP6_bp 6 /* CCP signature bit 6 position. */ -#define CPU_CCP7_bm (1<<7) /* CCP signature bit 7 mask. */ -#define CPU_CCP7_bp 7 /* CCP signature bit 7 position. */ - - -/* CPU.SREG bit masks and bit positions */ -#define CPU_I_bm 0x80 /* Global Interrupt Enable Flag bit mask. */ -#define CPU_I_bp 7 /* Global Interrupt Enable Flag bit position. */ - -#define CPU_T_bm 0x40 /* Transfer Bit bit mask. */ -#define CPU_T_bp 6 /* Transfer Bit bit position. */ - -#define CPU_H_bm 0x20 /* Half Carry Flag bit mask. */ -#define CPU_H_bp 5 /* Half Carry Flag bit position. */ - -#define CPU_S_bm 0x10 /* N Exclusive Or V Flag bit mask. */ -#define CPU_S_bp 4 /* N Exclusive Or V Flag bit position. */ - -#define CPU_V_bm 0x08 /* Two's Complement Overflow Flag bit mask. */ -#define CPU_V_bp 3 /* Two's Complement Overflow Flag bit position. */ - -#define CPU_N_bm 0x04 /* Negative Flag bit mask. */ -#define CPU_N_bp 2 /* Negative Flag bit position. */ - -#define CPU_Z_bm 0x02 /* Zero Flag bit mask. */ -#define CPU_Z_bp 1 /* Zero Flag bit position. */ - -#define CPU_C_bm 0x01 /* Carry Flag bit mask. */ -#define CPU_C_bp 0 /* Carry Flag bit position. */ - - -/* CLK - Clock System */ -/* CLK.CTRL bit masks and bit positions */ -#define CLK_SCLKSEL_gm 0x07 /* System Clock Selection group mask. */ -#define CLK_SCLKSEL_gp 0 /* System Clock Selection group position. */ -#define CLK_SCLKSEL0_bm (1<<0) /* System Clock Selection bit 0 mask. */ -#define CLK_SCLKSEL0_bp 0 /* System Clock Selection bit 0 position. */ -#define CLK_SCLKSEL1_bm (1<<1) /* System Clock Selection bit 1 mask. */ -#define CLK_SCLKSEL1_bp 1 /* System Clock Selection bit 1 position. */ -#define CLK_SCLKSEL2_bm (1<<2) /* System Clock Selection bit 2 mask. */ -#define CLK_SCLKSEL2_bp 2 /* System Clock Selection bit 2 position. */ - - -/* CLK.PSCTRL bit masks and bit positions */ -#define CLK_PSADIV_gm 0x7C /* Prescaler A Division Factor group mask. */ -#define CLK_PSADIV_gp 2 /* Prescaler A Division Factor group position. */ -#define CLK_PSADIV0_bm (1<<2) /* Prescaler A Division Factor bit 0 mask. */ -#define CLK_PSADIV0_bp 2 /* Prescaler A Division Factor bit 0 position. */ -#define CLK_PSADIV1_bm (1<<3) /* Prescaler A Division Factor bit 1 mask. */ -#define CLK_PSADIV1_bp 3 /* Prescaler A Division Factor bit 1 position. */ -#define CLK_PSADIV2_bm (1<<4) /* Prescaler A Division Factor bit 2 mask. */ -#define CLK_PSADIV2_bp 4 /* Prescaler A Division Factor bit 2 position. */ -#define CLK_PSADIV3_bm (1<<5) /* Prescaler A Division Factor bit 3 mask. */ -#define CLK_PSADIV3_bp 5 /* Prescaler A Division Factor bit 3 position. */ -#define CLK_PSADIV4_bm (1<<6) /* Prescaler A Division Factor bit 4 mask. */ -#define CLK_PSADIV4_bp 6 /* Prescaler A Division Factor bit 4 position. */ - -#define CLK_PSBCDIV_gm 0x03 /* Prescaler B and C Division factor group mask. */ -#define CLK_PSBCDIV_gp 0 /* Prescaler B and C Division factor group position. */ -#define CLK_PSBCDIV0_bm (1<<0) /* Prescaler B and C Division factor bit 0 mask. */ -#define CLK_PSBCDIV0_bp 0 /* Prescaler B and C Division factor bit 0 position. */ -#define CLK_PSBCDIV1_bm (1<<1) /* Prescaler B and C Division factor bit 1 mask. */ -#define CLK_PSBCDIV1_bp 1 /* Prescaler B and C Division factor bit 1 position. */ - - -/* CLK.LOCK bit masks and bit positions */ -#define CLK_LOCK_bm 0x01 /* Clock System Lock bit mask. */ -#define CLK_LOCK_bp 0 /* Clock System Lock bit position. */ - - -/* CLK.RTCCTRL bit masks and bit positions */ -#define CLK_RTCSRC_gm 0x0E /* Clock Source group mask. */ -#define CLK_RTCSRC_gp 1 /* Clock Source group position. */ -#define CLK_RTCSRC0_bm (1<<1) /* Clock Source bit 0 mask. */ -#define CLK_RTCSRC0_bp 1 /* Clock Source bit 0 position. */ -#define CLK_RTCSRC1_bm (1<<2) /* Clock Source bit 1 mask. */ -#define CLK_RTCSRC1_bp 2 /* Clock Source bit 1 position. */ -#define CLK_RTCSRC2_bm (1<<3) /* Clock Source bit 2 mask. */ -#define CLK_RTCSRC2_bp 3 /* Clock Source bit 2 position. */ - -#define CLK_RTCEN_bm 0x01 /* RTC Clock Source Enable bit mask. */ -#define CLK_RTCEN_bp 0 /* RTC Clock Source Enable bit position. */ - - -/* PR.PR bit masks and bit positions */ -#define PR_EBI_bm 0x08 /* External Bus Interface bit mask. */ -#define PR_EBI_bp 3 /* External Bus Interface bit position. */ - -#define PR_RTC_bm 0x04 /* Real-time Counter bit mask. */ -#define PR_RTC_bp 2 /* Real-time Counter bit position. */ - -#define PR_EVSYS_bm 0x02 /* Event System bit mask. */ -#define PR_EVSYS_bp 1 /* Event System bit position. */ - -#define PR_DMA_bm 0x01 /* DMA-Controller bit mask. */ -#define PR_DMA_bp 0 /* DMA-Controller bit position. */ - - -/* PR.PRPA bit masks and bit positions */ -#define PR_DAC_bm 0x04 /* Port A DAC bit mask. */ -#define PR_DAC_bp 2 /* Port A DAC bit position. */ - -#define PR_ADC_bm 0x02 /* Port A ADC bit mask. */ -#define PR_ADC_bp 1 /* Port A ADC bit position. */ - -#define PR_AC_bm 0x01 /* Port A Analog Comparator bit mask. */ -#define PR_AC_bp 0 /* Port A Analog Comparator bit position. */ - - -/* PR.PRPB bit masks and bit positions */ -/* PR_DAC_bm Predefined. */ -/* PR_DAC_bp Predefined. */ - -/* PR_ADC_bm Predefined. */ -/* PR_ADC_bp Predefined. */ - -/* PR_AC_bm Predefined. */ -/* PR_AC_bp Predefined. */ - - -/* PR.PRPC bit masks and bit positions */ -#define PR_TWI_bm 0x40 /* Port C Two-wire Interface bit mask. */ -#define PR_TWI_bp 6 /* Port C Two-wire Interface bit position. */ - -#define PR_USART1_bm 0x20 /* Port C USART1 bit mask. */ -#define PR_USART1_bp 5 /* Port C USART1 bit position. */ - -#define PR_USART0_bm 0x10 /* Port C USART0 bit mask. */ -#define PR_USART0_bp 4 /* Port C USART0 bit position. */ - -#define PR_SPI_bm 0x08 /* Port C SPI bit mask. */ -#define PR_SPI_bp 3 /* Port C SPI bit position. */ - -#define PR_HIRES_bm 0x04 /* Port C AWEX bit mask. */ -#define PR_HIRES_bp 2 /* Port C AWEX bit position. */ - -#define PR_TC1_bm 0x02 /* Port C Timer/Counter1 bit mask. */ -#define PR_TC1_bp 1 /* Port C Timer/Counter1 bit position. */ - -#define PR_TC0_bm 0x01 /* Port C Timer/Counter0 bit mask. */ -#define PR_TC0_bp 0 /* Port C Timer/Counter0 bit position. */ - - -/* PR.PRPD bit masks and bit positions */ -/* PR_TWI_bm Predefined. */ -/* PR_TWI_bp Predefined. */ - -/* PR_USART1_bm Predefined. */ -/* PR_USART1_bp Predefined. */ - -/* PR_USART0_bm Predefined. */ -/* PR_USART0_bp Predefined. */ - -/* PR_SPI_bm Predefined. */ -/* PR_SPI_bp Predefined. */ - -/* PR_HIRES_bm Predefined. */ -/* PR_HIRES_bp Predefined. */ - -/* PR_TC1_bm Predefined. */ -/* PR_TC1_bp Predefined. */ - -/* PR_TC0_bm Predefined. */ -/* PR_TC0_bp Predefined. */ - - -/* PR.PRPE bit masks and bit positions */ -/* PR_TWI_bm Predefined. */ -/* PR_TWI_bp Predefined. */ - -/* PR_USART1_bm Predefined. */ -/* PR_USART1_bp Predefined. */ - -/* PR_USART0_bm Predefined. */ -/* PR_USART0_bp Predefined. */ - -/* PR_SPI_bm Predefined. */ -/* PR_SPI_bp Predefined. */ - -/* PR_HIRES_bm Predefined. */ -/* PR_HIRES_bp Predefined. */ - -/* PR_TC1_bm Predefined. */ -/* PR_TC1_bp Predefined. */ - -/* PR_TC0_bm Predefined. */ -/* PR_TC0_bp Predefined. */ - - -/* PR.PRPF bit masks and bit positions */ -/* PR_TWI_bm Predefined. */ -/* PR_TWI_bp Predefined. */ - -/* PR_USART1_bm Predefined. */ -/* PR_USART1_bp Predefined. */ - -/* PR_USART0_bm Predefined. */ -/* PR_USART0_bp Predefined. */ - -/* PR_SPI_bm Predefined. */ -/* PR_SPI_bp Predefined. */ - -/* PR_HIRES_bm Predefined. */ -/* PR_HIRES_bp Predefined. */ - -/* PR_TC1_bm Predefined. */ -/* PR_TC1_bp Predefined. */ - -/* PR_TC0_bm Predefined. */ -/* PR_TC0_bp Predefined. */ - - -/* SLEEP - Sleep Controller */ -/* SLEEP.CTRL bit masks and bit positions */ -#define SLEEP_SMODE_gm 0x0E /* Sleep Mode group mask. */ -#define SLEEP_SMODE_gp 1 /* Sleep Mode group position. */ -#define SLEEP_SMODE0_bm (1<<1) /* Sleep Mode bit 0 mask. */ -#define SLEEP_SMODE0_bp 1 /* Sleep Mode bit 0 position. */ -#define SLEEP_SMODE1_bm (1<<2) /* Sleep Mode bit 1 mask. */ -#define SLEEP_SMODE1_bp 2 /* Sleep Mode bit 1 position. */ -#define SLEEP_SMODE2_bm (1<<3) /* Sleep Mode bit 2 mask. */ -#define SLEEP_SMODE2_bp 3 /* Sleep Mode bit 2 position. */ - -#define SLEEP_SEN_bm 0x01 /* Sleep Enable bit mask. */ -#define SLEEP_SEN_bp 0 /* Sleep Enable bit position. */ - - -/* OSC - Oscillator */ -/* OSC.CTRL bit masks and bit positions */ -#define OSC_PLLEN_bm 0x10 /* PLL Enable bit mask. */ -#define OSC_PLLEN_bp 4 /* PLL Enable bit position. */ - -#define OSC_XOSCEN_bm 0x08 /* External Oscillator Enable bit mask. */ -#define OSC_XOSCEN_bp 3 /* External Oscillator Enable bit position. */ - -#define OSC_RC32KEN_bm 0x04 /* Internal 32kHz RC Oscillator Enable bit mask. */ -#define OSC_RC32KEN_bp 2 /* Internal 32kHz RC Oscillator Enable bit position. */ - -#define OSC_RC32MEN_bm 0x02 /* Internal 32MHz RC Oscillator Enable bit mask. */ -#define OSC_RC32MEN_bp 1 /* Internal 32MHz RC Oscillator Enable bit position. */ - -#define OSC_RC2MEN_bm 0x01 /* Internal 2MHz RC Oscillator Enable bit mask. */ -#define OSC_RC2MEN_bp 0 /* Internal 2MHz RC Oscillator Enable bit position. */ - - -/* OSC.STATUS bit masks and bit positions */ -#define OSC_PLLRDY_bm 0x10 /* PLL Ready bit mask. */ -#define OSC_PLLRDY_bp 4 /* PLL Ready bit position. */ - -#define OSC_XOSCRDY_bm 0x08 /* External Oscillator Ready bit mask. */ -#define OSC_XOSCRDY_bp 3 /* External Oscillator Ready bit position. */ - -#define OSC_RC32KRDY_bm 0x04 /* Internal 32kHz RC Oscillator Ready bit mask. */ -#define OSC_RC32KRDY_bp 2 /* Internal 32kHz RC Oscillator Ready bit position. */ - -#define OSC_RC32MRDY_bm 0x02 /* Internal 32MHz RC Oscillator Ready bit mask. */ -#define OSC_RC32MRDY_bp 1 /* Internal 32MHz RC Oscillator Ready bit position. */ - -#define OSC_RC2MRDY_bm 0x01 /* Internal 2MHz RC Oscillator Ready bit mask. */ -#define OSC_RC2MRDY_bp 0 /* Internal 2MHz RC Oscillator Ready bit position. */ - - -/* OSC.XOSCCTRL bit masks and bit positions */ -#define OSC_FRQRANGE_gm 0xC0 /* Frequency Range group mask. */ -#define OSC_FRQRANGE_gp 6 /* Frequency Range group position. */ -#define OSC_FRQRANGE0_bm (1<<6) /* Frequency Range bit 0 mask. */ -#define OSC_FRQRANGE0_bp 6 /* Frequency Range bit 0 position. */ -#define OSC_FRQRANGE1_bm (1<<7) /* Frequency Range bit 1 mask. */ -#define OSC_FRQRANGE1_bp 7 /* Frequency Range bit 1 position. */ - -#define OSC_X32KLPM_bm 0x20 /* 32kHz XTAL OSC Low-power Mode bit mask. */ -#define OSC_X32KLPM_bp 5 /* 32kHz XTAL OSC Low-power Mode bit position. */ - -#define OSC_XOSCSEL_gm 0x0F /* External Oscillator Selection and Startup Time group mask. */ -#define OSC_XOSCSEL_gp 0 /* External Oscillator Selection and Startup Time group position. */ -#define OSC_XOSCSEL0_bm (1<<0) /* External Oscillator Selection and Startup Time bit 0 mask. */ -#define OSC_XOSCSEL0_bp 0 /* External Oscillator Selection and Startup Time bit 0 position. */ -#define OSC_XOSCSEL1_bm (1<<1) /* External Oscillator Selection and Startup Time bit 1 mask. */ -#define OSC_XOSCSEL1_bp 1 /* External Oscillator Selection and Startup Time bit 1 position. */ -#define OSC_XOSCSEL2_bm (1<<2) /* External Oscillator Selection and Startup Time bit 2 mask. */ -#define OSC_XOSCSEL2_bp 2 /* External Oscillator Selection and Startup Time bit 2 position. */ -#define OSC_XOSCSEL3_bm (1<<3) /* External Oscillator Selection and Startup Time bit 3 mask. */ -#define OSC_XOSCSEL3_bp 3 /* External Oscillator Selection and Startup Time bit 3 position. */ - - -/* OSC.XOSCFAIL bit masks and bit positions */ -#define OSC_XOSCFDIF_bm 0x02 /* Failure Detection Interrupt Flag bit mask. */ -#define OSC_XOSCFDIF_bp 1 /* Failure Detection Interrupt Flag bit position. */ - -#define OSC_XOSCFDEN_bm 0x01 /* Failure Detection Enable bit mask. */ -#define OSC_XOSCFDEN_bp 0 /* Failure Detection Enable bit position. */ - - -/* OSC.PLLCTRL bit masks and bit positions */ -#define OSC_PLLSRC_gm 0xC0 /* Clock Source group mask. */ -#define OSC_PLLSRC_gp 6 /* Clock Source group position. */ -#define OSC_PLLSRC0_bm (1<<6) /* Clock Source bit 0 mask. */ -#define OSC_PLLSRC0_bp 6 /* Clock Source bit 0 position. */ -#define OSC_PLLSRC1_bm (1<<7) /* Clock Source bit 1 mask. */ -#define OSC_PLLSRC1_bp 7 /* Clock Source bit 1 position. */ - -#define OSC_PLLFAC_gm 0x1F /* Multiplication Factor group mask. */ -#define OSC_PLLFAC_gp 0 /* Multiplication Factor group position. */ -#define OSC_PLLFAC0_bm (1<<0) /* Multiplication Factor bit 0 mask. */ -#define OSC_PLLFAC0_bp 0 /* Multiplication Factor bit 0 position. */ -#define OSC_PLLFAC1_bm (1<<1) /* Multiplication Factor bit 1 mask. */ -#define OSC_PLLFAC1_bp 1 /* Multiplication Factor bit 1 position. */ -#define OSC_PLLFAC2_bm (1<<2) /* Multiplication Factor bit 2 mask. */ -#define OSC_PLLFAC2_bp 2 /* Multiplication Factor bit 2 position. */ -#define OSC_PLLFAC3_bm (1<<3) /* Multiplication Factor bit 3 mask. */ -#define OSC_PLLFAC3_bp 3 /* Multiplication Factor bit 3 position. */ -#define OSC_PLLFAC4_bm (1<<4) /* Multiplication Factor bit 4 mask. */ -#define OSC_PLLFAC4_bp 4 /* Multiplication Factor bit 4 position. */ - - -/* OSC.DFLLCTRL bit masks and bit positions */ -#define OSC_RC32MCREF_bm 0x02 /* 32MHz Calibration Reference bit mask. */ -#define OSC_RC32MCREF_bp 1 /* 32MHz Calibration Reference bit position. */ - -#define OSC_RC2MCREF_bm 0x01 /* 2MHz Calibration Reference bit mask. */ -#define OSC_RC2MCREF_bp 0 /* 2MHz Calibration Reference bit position. */ - - -/* DFLL - DFLL */ -/* DFLL.CTRL bit masks and bit positions */ -#define DFLL_ENABLE_bm 0x01 /* DFLL Enable bit mask. */ -#define DFLL_ENABLE_bp 0 /* DFLL Enable bit position. */ - - -/* DFLL.CALA bit masks and bit positions */ -#define DFLL_CALL_gm 0x7F /* DFLL Calibration bits [6:0] group mask. */ -#define DFLL_CALL_gp 0 /* DFLL Calibration bits [6:0] group position. */ -#define DFLL_CALL0_bm (1<<0) /* DFLL Calibration bits [6:0] bit 0 mask. */ -#define DFLL_CALL0_bp 0 /* DFLL Calibration bits [6:0] bit 0 position. */ -#define DFLL_CALL1_bm (1<<1) /* DFLL Calibration bits [6:0] bit 1 mask. */ -#define DFLL_CALL1_bp 1 /* DFLL Calibration bits [6:0] bit 1 position. */ -#define DFLL_CALL2_bm (1<<2) /* DFLL Calibration bits [6:0] bit 2 mask. */ -#define DFLL_CALL2_bp 2 /* DFLL Calibration bits [6:0] bit 2 position. */ -#define DFLL_CALL3_bm (1<<3) /* DFLL Calibration bits [6:0] bit 3 mask. */ -#define DFLL_CALL3_bp 3 /* DFLL Calibration bits [6:0] bit 3 position. */ -#define DFLL_CALL4_bm (1<<4) /* DFLL Calibration bits [6:0] bit 4 mask. */ -#define DFLL_CALL4_bp 4 /* DFLL Calibration bits [6:0] bit 4 position. */ -#define DFLL_CALL5_bm (1<<5) /* DFLL Calibration bits [6:0] bit 5 mask. */ -#define DFLL_CALL5_bp 5 /* DFLL Calibration bits [6:0] bit 5 position. */ -#define DFLL_CALL6_bm (1<<6) /* DFLL Calibration bits [6:0] bit 6 mask. */ -#define DFLL_CALL6_bp 6 /* DFLL Calibration bits [6:0] bit 6 position. */ - - -/* DFLL.CALB bit masks and bit positions */ -#define DFLL_CALH_gm 0x3F /* DFLL Calibration bits [12:7] group mask. */ -#define DFLL_CALH_gp 0 /* DFLL Calibration bits [12:7] group position. */ -#define DFLL_CALH0_bm (1<<0) /* DFLL Calibration bits [12:7] bit 0 mask. */ -#define DFLL_CALH0_bp 0 /* DFLL Calibration bits [12:7] bit 0 position. */ -#define DFLL_CALH1_bm (1<<1) /* DFLL Calibration bits [12:7] bit 1 mask. */ -#define DFLL_CALH1_bp 1 /* DFLL Calibration bits [12:7] bit 1 position. */ -#define DFLL_CALH2_bm (1<<2) /* DFLL Calibration bits [12:7] bit 2 mask. */ -#define DFLL_CALH2_bp 2 /* DFLL Calibration bits [12:7] bit 2 position. */ -#define DFLL_CALH3_bm (1<<3) /* DFLL Calibration bits [12:7] bit 3 mask. */ -#define DFLL_CALH3_bp 3 /* DFLL Calibration bits [12:7] bit 3 position. */ -#define DFLL_CALH4_bm (1<<4) /* DFLL Calibration bits [12:7] bit 4 mask. */ -#define DFLL_CALH4_bp 4 /* DFLL Calibration bits [12:7] bit 4 position. */ -#define DFLL_CALH5_bm (1<<5) /* DFLL Calibration bits [12:7] bit 5 mask. */ -#define DFLL_CALH5_bp 5 /* DFLL Calibration bits [12:7] bit 5 position. */ - - -/* RST - Reset */ -/* RST.STATUS bit masks and bit positions */ -#define RST_SDRF_bm 0x40 /* Spike Detection Reset Flag bit mask. */ -#define RST_SDRF_bp 6 /* Spike Detection Reset Flag bit position. */ - -#define RST_SRF_bm 0x20 /* Software Reset Flag bit mask. */ -#define RST_SRF_bp 5 /* Software Reset Flag bit position. */ - -#define RST_PDIRF_bm 0x10 /* Programming and Debug Interface Interface Reset Flag bit mask. */ -#define RST_PDIRF_bp 4 /* Programming and Debug Interface Interface Reset Flag bit position. */ - -#define RST_WDRF_bm 0x08 /* Watchdog Reset Flag bit mask. */ -#define RST_WDRF_bp 3 /* Watchdog Reset Flag bit position. */ - -#define RST_BORF_bm 0x04 /* Brown-out Reset Flag bit mask. */ -#define RST_BORF_bp 2 /* Brown-out Reset Flag bit position. */ - -#define RST_EXTRF_bm 0x02 /* External Reset Flag bit mask. */ -#define RST_EXTRF_bp 1 /* External Reset Flag bit position. */ - -#define RST_PORF_bm 0x01 /* Power-on Reset Flag bit mask. */ -#define RST_PORF_bp 0 /* Power-on Reset Flag bit position. */ - - -/* RST.CTRL bit masks and bit positions */ -#define RST_SWRST_bm 0x01 /* Software Reset bit mask. */ -#define RST_SWRST_bp 0 /* Software Reset bit position. */ - - -/* WDT - Watch-Dog Timer */ -/* WDT.CTRL bit masks and bit positions */ -#define WDT_PER_gm 0x3C /* Period group mask. */ -#define WDT_PER_gp 2 /* Period group position. */ -#define WDT_PER0_bm (1<<2) /* Period bit 0 mask. */ -#define WDT_PER0_bp 2 /* Period bit 0 position. */ -#define WDT_PER1_bm (1<<3) /* Period bit 1 mask. */ -#define WDT_PER1_bp 3 /* Period bit 1 position. */ -#define WDT_PER2_bm (1<<4) /* Period bit 2 mask. */ -#define WDT_PER2_bp 4 /* Period bit 2 position. */ -#define WDT_PER3_bm (1<<5) /* Period bit 3 mask. */ -#define WDT_PER3_bp 5 /* Period bit 3 position. */ - -#define WDT_ENABLE_bm 0x02 /* Enable bit mask. */ -#define WDT_ENABLE_bp 1 /* Enable bit position. */ - -#define WDT_CEN_bm 0x01 /* Change Enable bit mask. */ -#define WDT_CEN_bp 0 /* Change Enable bit position. */ - - -/* WDT.WINCTRL bit masks and bit positions */ -#define WDT_WPER_gm 0x3C /* Windowed Mode Period group mask. */ -#define WDT_WPER_gp 2 /* Windowed Mode Period group position. */ -#define WDT_WPER0_bm (1<<2) /* Windowed Mode Period bit 0 mask. */ -#define WDT_WPER0_bp 2 /* Windowed Mode Period bit 0 position. */ -#define WDT_WPER1_bm (1<<3) /* Windowed Mode Period bit 1 mask. */ -#define WDT_WPER1_bp 3 /* Windowed Mode Period bit 1 position. */ -#define WDT_WPER2_bm (1<<4) /* Windowed Mode Period bit 2 mask. */ -#define WDT_WPER2_bp 4 /* Windowed Mode Period bit 2 position. */ -#define WDT_WPER3_bm (1<<5) /* Windowed Mode Period bit 3 mask. */ -#define WDT_WPER3_bp 5 /* Windowed Mode Period bit 3 position. */ - -#define WDT_WEN_bm 0x02 /* Windowed Mode Enable bit mask. */ -#define WDT_WEN_bp 1 /* Windowed Mode Enable bit position. */ - -#define WDT_WCEN_bm 0x01 /* Windowed Mode Change Enable bit mask. */ -#define WDT_WCEN_bp 0 /* Windowed Mode Change Enable bit position. */ - - -/* WDT.STATUS bit masks and bit positions */ -#define WDT_SYNCBUSY_bm 0x01 /* Syncronization busy bit mask. */ -#define WDT_SYNCBUSY_bp 0 /* Syncronization busy bit position. */ - - -/* MCU - MCU Control */ -/* MCU.MCUCR bit masks and bit positions */ -#define MCU_JTAGD_bm 0x01 /* JTAG Disable bit mask. */ -#define MCU_JTAGD_bp 0 /* JTAG Disable bit position. */ - - -/* MCU.EVSYSLOCK bit masks and bit positions */ -#define MCU_EVSYS1LOCK_bm 0x10 /* Event Channel 4-7 Lock bit mask. */ -#define MCU_EVSYS1LOCK_bp 4 /* Event Channel 4-7 Lock bit position. */ - -#define MCU_EVSYS0LOCK_bm 0x01 /* Event Channel 0-3 Lock bit mask. */ -#define MCU_EVSYS0LOCK_bp 0 /* Event Channel 0-3 Lock bit position. */ - - -/* MCU.AWEXLOCK bit masks and bit positions */ -#define MCU_AWEXELOCK_bm 0x04 /* AWeX on T/C E0 Lock bit mask. */ -#define MCU_AWEXELOCK_bp 2 /* AWeX on T/C E0 Lock bit position. */ - -#define MCU_AWEXCLOCK_bm 0x01 /* AWeX on T/C C0 Lock bit mask. */ -#define MCU_AWEXCLOCK_bp 0 /* AWeX on T/C C0 Lock bit position. */ - - -/* PMIC - Programmable Multi-level Interrupt Controller */ -/* PMIC.STATUS bit masks and bit positions */ -#define PMIC_NMIEX_bm 0x80 /* Non-maskable Interrupt Executing bit mask. */ -#define PMIC_NMIEX_bp 7 /* Non-maskable Interrupt Executing bit position. */ - -#define PMIC_HILVLEX_bm 0x04 /* High Level Interrupt Executing bit mask. */ -#define PMIC_HILVLEX_bp 2 /* High Level Interrupt Executing bit position. */ - -#define PMIC_MEDLVLEX_bm 0x02 /* Medium Level Interrupt Executing bit mask. */ -#define PMIC_MEDLVLEX_bp 1 /* Medium Level Interrupt Executing bit position. */ - -#define PMIC_LOLVLEX_bm 0x01 /* Low Level Interrupt Executing bit mask. */ -#define PMIC_LOLVLEX_bp 0 /* Low Level Interrupt Executing bit position. */ - - -/* PMIC.CTRL bit masks and bit positions */ -#define PMIC_RREN_bm 0x80 /* Round-Robin Priority Enable bit mask. */ -#define PMIC_RREN_bp 7 /* Round-Robin Priority Enable bit position. */ - -#define PMIC_IVSEL_bm 0x40 /* Interrupt Vector Select bit mask. */ -#define PMIC_IVSEL_bp 6 /* Interrupt Vector Select bit position. */ - -#define PMIC_HILVLEN_bm 0x04 /* High Level Enable bit mask. */ -#define PMIC_HILVLEN_bp 2 /* High Level Enable bit position. */ - -#define PMIC_MEDLVLEN_bm 0x02 /* Medium Level Enable bit mask. */ -#define PMIC_MEDLVLEN_bp 1 /* Medium Level Enable bit position. */ - -#define PMIC_LOLVLEN_bm 0x01 /* Low Level Enable bit mask. */ -#define PMIC_LOLVLEN_bp 0 /* Low Level Enable bit position. */ - - -/* DMA - DMA Controller */ -/* DMA_CH.CTRLA bit masks and bit positions */ -#define DMA_CH_ENABLE_bm 0x80 /* Channel Enable bit mask. */ -#define DMA_CH_ENABLE_bp 7 /* Channel Enable bit position. */ - -#define DMA_CH_RESET_bm 0x40 /* Channel Software Reset bit mask. */ -#define DMA_CH_RESET_bp 6 /* Channel Software Reset bit position. */ - -#define DMA_CH_REPEAT_bm 0x20 /* Channel Repeat Mode bit mask. */ -#define DMA_CH_REPEAT_bp 5 /* Channel Repeat Mode bit position. */ - -#define DMA_CH_TRFREQ_bm 0x10 /* Channel Transfer Request bit mask. */ -#define DMA_CH_TRFREQ_bp 4 /* Channel Transfer Request bit position. */ - -#define DMA_CH_SINGLE_bm 0x04 /* Channel Single Shot Data Transfer bit mask. */ -#define DMA_CH_SINGLE_bp 2 /* Channel Single Shot Data Transfer bit position. */ - -#define DMA_CH_BURSTLEN_gm 0x03 /* Channel Transfer Mode group mask. */ -#define DMA_CH_BURSTLEN_gp 0 /* Channel Transfer Mode group position. */ -#define DMA_CH_BURSTLEN0_bm (1<<0) /* Channel Transfer Mode bit 0 mask. */ -#define DMA_CH_BURSTLEN0_bp 0 /* Channel Transfer Mode bit 0 position. */ -#define DMA_CH_BURSTLEN1_bm (1<<1) /* Channel Transfer Mode bit 1 mask. */ -#define DMA_CH_BURSTLEN1_bp 1 /* Channel Transfer Mode bit 1 position. */ - - -/* DMA_CH.CTRLB bit masks and bit positions */ -#define DMA_CH_CHBUSY_bm 0x80 /* Block Transfer Busy bit mask. */ -#define DMA_CH_CHBUSY_bp 7 /* Block Transfer Busy bit position. */ - -#define DMA_CH_CHPEND_bm 0x40 /* Block Transfer Pending bit mask. */ -#define DMA_CH_CHPEND_bp 6 /* Block Transfer Pending bit position. */ - -#define DMA_CH_ERRIF_bm 0x20 /* Block Transfer Error Interrupt Flag bit mask. */ -#define DMA_CH_ERRIF_bp 5 /* Block Transfer Error Interrupt Flag bit position. */ - -#define DMA_CH_TRNIF_bm 0x10 /* Transaction Complete Interrup Flag bit mask. */ -#define DMA_CH_TRNIF_bp 4 /* Transaction Complete Interrup Flag bit position. */ - -#define DMA_CH_ERRINTLVL_gm 0x0C /* Transfer Error Interrupt Level group mask. */ -#define DMA_CH_ERRINTLVL_gp 2 /* Transfer Error Interrupt Level group position. */ -#define DMA_CH_ERRINTLVL0_bm (1<<2) /* Transfer Error Interrupt Level bit 0 mask. */ -#define DMA_CH_ERRINTLVL0_bp 2 /* Transfer Error Interrupt Level bit 0 position. */ -#define DMA_CH_ERRINTLVL1_bm (1<<3) /* Transfer Error Interrupt Level bit 1 mask. */ -#define DMA_CH_ERRINTLVL1_bp 3 /* Transfer Error Interrupt Level bit 1 position. */ - -#define DMA_CH_TRNINTLVL_gm 0x03 /* Transaction Complete Interrupt Level group mask. */ -#define DMA_CH_TRNINTLVL_gp 0 /* Transaction Complete Interrupt Level group position. */ -#define DMA_CH_TRNINTLVL0_bm (1<<0) /* Transaction Complete Interrupt Level bit 0 mask. */ -#define DMA_CH_TRNINTLVL0_bp 0 /* Transaction Complete Interrupt Level bit 0 position. */ -#define DMA_CH_TRNINTLVL1_bm (1<<1) /* Transaction Complete Interrupt Level bit 1 mask. */ -#define DMA_CH_TRNINTLVL1_bp 1 /* Transaction Complete Interrupt Level bit 1 position. */ - - -/* DMA_CH.ADDRCTRL bit masks and bit positions */ -#define DMA_CH_SRCRELOAD_gm 0xC0 /* Channel Source Address Reload group mask. */ -#define DMA_CH_SRCRELOAD_gp 6 /* Channel Source Address Reload group position. */ -#define DMA_CH_SRCRELOAD0_bm (1<<6) /* Channel Source Address Reload bit 0 mask. */ -#define DMA_CH_SRCRELOAD0_bp 6 /* Channel Source Address Reload bit 0 position. */ -#define DMA_CH_SRCRELOAD1_bm (1<<7) /* Channel Source Address Reload bit 1 mask. */ -#define DMA_CH_SRCRELOAD1_bp 7 /* Channel Source Address Reload bit 1 position. */ - -#define DMA_CH_SRCDIR_gm 0x30 /* Channel Source Address Mode group mask. */ -#define DMA_CH_SRCDIR_gp 4 /* Channel Source Address Mode group position. */ -#define DMA_CH_SRCDIR0_bm (1<<4) /* Channel Source Address Mode bit 0 mask. */ -#define DMA_CH_SRCDIR0_bp 4 /* Channel Source Address Mode bit 0 position. */ -#define DMA_CH_SRCDIR1_bm (1<<5) /* Channel Source Address Mode bit 1 mask. */ -#define DMA_CH_SRCDIR1_bp 5 /* Channel Source Address Mode bit 1 position. */ - -#define DMA_CH_DESTRELOAD_gm 0x0C /* Channel Destination Address Reload group mask. */ -#define DMA_CH_DESTRELOAD_gp 2 /* Channel Destination Address Reload group position. */ -#define DMA_CH_DESTRELOAD0_bm (1<<2) /* Channel Destination Address Reload bit 0 mask. */ -#define DMA_CH_DESTRELOAD0_bp 2 /* Channel Destination Address Reload bit 0 position. */ -#define DMA_CH_DESTRELOAD1_bm (1<<3) /* Channel Destination Address Reload bit 1 mask. */ -#define DMA_CH_DESTRELOAD1_bp 3 /* Channel Destination Address Reload bit 1 position. */ - -#define DMA_CH_DESTDIR_gm 0x03 /* Channel Destination Address Mode group mask. */ -#define DMA_CH_DESTDIR_gp 0 /* Channel Destination Address Mode group position. */ -#define DMA_CH_DESTDIR0_bm (1<<0) /* Channel Destination Address Mode bit 0 mask. */ -#define DMA_CH_DESTDIR0_bp 0 /* Channel Destination Address Mode bit 0 position. */ -#define DMA_CH_DESTDIR1_bm (1<<1) /* Channel Destination Address Mode bit 1 mask. */ -#define DMA_CH_DESTDIR1_bp 1 /* Channel Destination Address Mode bit 1 position. */ - - -/* DMA_CH.TRIGSRC bit masks and bit positions */ -#define DMA_CH_TRIGSRC_gm 0xFF /* Channel Trigger Source group mask. */ -#define DMA_CH_TRIGSRC_gp 0 /* Channel Trigger Source group position. */ -#define DMA_CH_TRIGSRC0_bm (1<<0) /* Channel Trigger Source bit 0 mask. */ -#define DMA_CH_TRIGSRC0_bp 0 /* Channel Trigger Source bit 0 position. */ -#define DMA_CH_TRIGSRC1_bm (1<<1) /* Channel Trigger Source bit 1 mask. */ -#define DMA_CH_TRIGSRC1_bp 1 /* Channel Trigger Source bit 1 position. */ -#define DMA_CH_TRIGSRC2_bm (1<<2) /* Channel Trigger Source bit 2 mask. */ -#define DMA_CH_TRIGSRC2_bp 2 /* Channel Trigger Source bit 2 position. */ -#define DMA_CH_TRIGSRC3_bm (1<<3) /* Channel Trigger Source bit 3 mask. */ -#define DMA_CH_TRIGSRC3_bp 3 /* Channel Trigger Source bit 3 position. */ -#define DMA_CH_TRIGSRC4_bm (1<<4) /* Channel Trigger Source bit 4 mask. */ -#define DMA_CH_TRIGSRC4_bp 4 /* Channel Trigger Source bit 4 position. */ -#define DMA_CH_TRIGSRC5_bm (1<<5) /* Channel Trigger Source bit 5 mask. */ -#define DMA_CH_TRIGSRC5_bp 5 /* Channel Trigger Source bit 5 position. */ -#define DMA_CH_TRIGSRC6_bm (1<<6) /* Channel Trigger Source bit 6 mask. */ -#define DMA_CH_TRIGSRC6_bp 6 /* Channel Trigger Source bit 6 position. */ -#define DMA_CH_TRIGSRC7_bm (1<<7) /* Channel Trigger Source bit 7 mask. */ -#define DMA_CH_TRIGSRC7_bp 7 /* Channel Trigger Source bit 7 position. */ - - -/* DMA.CTRL bit masks and bit positions */ -#define DMA_ENABLE_bm 0x80 /* Enable bit mask. */ -#define DMA_ENABLE_bp 7 /* Enable bit position. */ - -#define DMA_RESET_bm 0x40 /* Software Reset bit mask. */ -#define DMA_RESET_bp 6 /* Software Reset bit position. */ - -#define DMA_DBUFMODE_gm 0x0C /* Double Buffering Mode group mask. */ -#define DMA_DBUFMODE_gp 2 /* Double Buffering Mode group position. */ -#define DMA_DBUFMODE0_bm (1<<2) /* Double Buffering Mode bit 0 mask. */ -#define DMA_DBUFMODE0_bp 2 /* Double Buffering Mode bit 0 position. */ -#define DMA_DBUFMODE1_bm (1<<3) /* Double Buffering Mode bit 1 mask. */ -#define DMA_DBUFMODE1_bp 3 /* Double Buffering Mode bit 1 position. */ - -#define DMA_PRIMODE_gm 0x03 /* Channel Priority Mode group mask. */ -#define DMA_PRIMODE_gp 0 /* Channel Priority Mode group position. */ -#define DMA_PRIMODE0_bm (1<<0) /* Channel Priority Mode bit 0 mask. */ -#define DMA_PRIMODE0_bp 0 /* Channel Priority Mode bit 0 position. */ -#define DMA_PRIMODE1_bm (1<<1) /* Channel Priority Mode bit 1 mask. */ -#define DMA_PRIMODE1_bp 1 /* Channel Priority Mode bit 1 position. */ - - -/* DMA.INTFLAGS bit masks and bit positions */ -#define DMA_CH3ERRIF_bm 0x80 /* Channel 3 Block Transfer Error Interrupt Flag bit mask. */ -#define DMA_CH3ERRIF_bp 7 /* Channel 3 Block Transfer Error Interrupt Flag bit position. */ - -#define DMA_CH2ERRIF_bm 0x40 /* Channel 2 Block Transfer Error Interrupt Flag bit mask. */ -#define DMA_CH2ERRIF_bp 6 /* Channel 2 Block Transfer Error Interrupt Flag bit position. */ - -#define DMA_CH1ERRIF_bm 0x20 /* Channel 1 Block Transfer Error Interrupt Flag bit mask. */ -#define DMA_CH1ERRIF_bp 5 /* Channel 1 Block Transfer Error Interrupt Flag bit position. */ - -#define DMA_CH0ERRIF_bm 0x10 /* Channel 0 Block Transfer Error Interrupt Flag bit mask. */ -#define DMA_CH0ERRIF_bp 4 /* Channel 0 Block Transfer Error Interrupt Flag bit position. */ - -#define DMA_CH3TRNIF_bm 0x08 /* Channel 3 Transaction Complete Interrupt Flag bit mask. */ -#define DMA_CH3TRNIF_bp 3 /* Channel 3 Transaction Complete Interrupt Flag bit position. */ - -#define DMA_CH2TRNIF_bm 0x04 /* Channel 2 Transaction Complete Interrupt Flag bit mask. */ -#define DMA_CH2TRNIF_bp 2 /* Channel 2 Transaction Complete Interrupt Flag bit position. */ - -#define DMA_CH1TRNIF_bm 0x02 /* Channel 1 Transaction Complete Interrupt Flag bit mask. */ -#define DMA_CH1TRNIF_bp 1 /* Channel 1 Transaction Complete Interrupt Flag bit position. */ - -#define DMA_CH0TRNIF_bm 0x01 /* Channel 0 Transaction Complete Interrupt Flag bit mask. */ -#define DMA_CH0TRNIF_bp 0 /* Channel 0 Transaction Complete Interrupt Flag bit position. */ - - -/* DMA.STATUS bit masks and bit positions */ -#define DMA_CH3BUSY_bm 0x80 /* Channel 3 Block Transfer Busy bit mask. */ -#define DMA_CH3BUSY_bp 7 /* Channel 3 Block Transfer Busy bit position. */ - -#define DMA_CH2BUSY_bm 0x40 /* Channel 2 Block Transfer Busy bit mask. */ -#define DMA_CH2BUSY_bp 6 /* Channel 2 Block Transfer Busy bit position. */ - -#define DMA_CH1BUSY_bm 0x20 /* Channel 1 Block Transfer Busy bit mask. */ -#define DMA_CH1BUSY_bp 5 /* Channel 1 Block Transfer Busy bit position. */ - -#define DMA_CH0BUSY_bm 0x10 /* Channel 0 Block Transfer Busy bit mask. */ -#define DMA_CH0BUSY_bp 4 /* Channel 0 Block Transfer Busy bit position. */ - -#define DMA_CH3PEND_bm 0x08 /* Channel 3 Block Transfer Pending bit mask. */ -#define DMA_CH3PEND_bp 3 /* Channel 3 Block Transfer Pending bit position. */ - -#define DMA_CH2PEND_bm 0x04 /* Channel 2 Block Transfer Pending bit mask. */ -#define DMA_CH2PEND_bp 2 /* Channel 2 Block Transfer Pending bit position. */ - -#define DMA_CH1PEND_bm 0x02 /* Channel 1 Block Transfer Pending bit mask. */ -#define DMA_CH1PEND_bp 1 /* Channel 1 Block Transfer Pending bit position. */ - -#define DMA_CH0PEND_bm 0x01 /* Channel 0 Block Transfer Pending bit mask. */ -#define DMA_CH0PEND_bp 0 /* Channel 0 Block Transfer Pending bit position. */ - - -/* EVSYS - Event System */ -/* EVSYS.CH0MUX bit masks and bit positions */ -#define EVSYS_CHMUX_gm 0xFF /* Event Channel 0 Multiplexer group mask. */ -#define EVSYS_CHMUX_gp 0 /* Event Channel 0 Multiplexer group position. */ -#define EVSYS_CHMUX0_bm (1<<0) /* Event Channel 0 Multiplexer bit 0 mask. */ -#define EVSYS_CHMUX0_bp 0 /* Event Channel 0 Multiplexer bit 0 position. */ -#define EVSYS_CHMUX1_bm (1<<1) /* Event Channel 0 Multiplexer bit 1 mask. */ -#define EVSYS_CHMUX1_bp 1 /* Event Channel 0 Multiplexer bit 1 position. */ -#define EVSYS_CHMUX2_bm (1<<2) /* Event Channel 0 Multiplexer bit 2 mask. */ -#define EVSYS_CHMUX2_bp 2 /* Event Channel 0 Multiplexer bit 2 position. */ -#define EVSYS_CHMUX3_bm (1<<3) /* Event Channel 0 Multiplexer bit 3 mask. */ -#define EVSYS_CHMUX3_bp 3 /* Event Channel 0 Multiplexer bit 3 position. */ -#define EVSYS_CHMUX4_bm (1<<4) /* Event Channel 0 Multiplexer bit 4 mask. */ -#define EVSYS_CHMUX4_bp 4 /* Event Channel 0 Multiplexer bit 4 position. */ -#define EVSYS_CHMUX5_bm (1<<5) /* Event Channel 0 Multiplexer bit 5 mask. */ -#define EVSYS_CHMUX5_bp 5 /* Event Channel 0 Multiplexer bit 5 position. */ -#define EVSYS_CHMUX6_bm (1<<6) /* Event Channel 0 Multiplexer bit 6 mask. */ -#define EVSYS_CHMUX6_bp 6 /* Event Channel 0 Multiplexer bit 6 position. */ -#define EVSYS_CHMUX7_bm (1<<7) /* Event Channel 0 Multiplexer bit 7 mask. */ -#define EVSYS_CHMUX7_bp 7 /* Event Channel 0 Multiplexer bit 7 position. */ - - -/* EVSYS.CH1MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH2MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH3MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH4MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH5MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH6MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH7MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH0CTRL bit masks and bit positions */ -#define EVSYS_QDIRM_gm 0x60 /* Quadrature Decoder Index Recognition Mode group mask. */ -#define EVSYS_QDIRM_gp 5 /* Quadrature Decoder Index Recognition Mode group position. */ -#define EVSYS_QDIRM0_bm (1<<5) /* Quadrature Decoder Index Recognition Mode bit 0 mask. */ -#define EVSYS_QDIRM0_bp 5 /* Quadrature Decoder Index Recognition Mode bit 0 position. */ -#define EVSYS_QDIRM1_bm (1<<6) /* Quadrature Decoder Index Recognition Mode bit 1 mask. */ -#define EVSYS_QDIRM1_bp 6 /* Quadrature Decoder Index Recognition Mode bit 1 position. */ - -#define EVSYS_QDIEN_bm 0x10 /* Quadrature Decoder Index Enable bit mask. */ -#define EVSYS_QDIEN_bp 4 /* Quadrature Decoder Index Enable bit position. */ - -#define EVSYS_QDEN_bm 0x08 /* Quadrature Decoder Enable bit mask. */ -#define EVSYS_QDEN_bp 3 /* Quadrature Decoder Enable bit position. */ - -#define EVSYS_DIGFILT_gm 0x07 /* Digital Filter group mask. */ -#define EVSYS_DIGFILT_gp 0 /* Digital Filter group position. */ -#define EVSYS_DIGFILT0_bm (1<<0) /* Digital Filter bit 0 mask. */ -#define EVSYS_DIGFILT0_bp 0 /* Digital Filter bit 0 position. */ -#define EVSYS_DIGFILT1_bm (1<<1) /* Digital Filter bit 1 mask. */ -#define EVSYS_DIGFILT1_bp 1 /* Digital Filter bit 1 position. */ -#define EVSYS_DIGFILT2_bm (1<<2) /* Digital Filter bit 2 mask. */ -#define EVSYS_DIGFILT2_bp 2 /* Digital Filter bit 2 position. */ - - -/* EVSYS.CH1CTRL bit masks and bit positions */ -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* EVSYS.CH2CTRL bit masks and bit positions */ -/* EVSYS_QDIRM_gm Predefined. */ -/* EVSYS_QDIRM_gp Predefined. */ -/* EVSYS_QDIRM0_bm Predefined. */ -/* EVSYS_QDIRM0_bp Predefined. */ -/* EVSYS_QDIRM1_bm Predefined. */ -/* EVSYS_QDIRM1_bp Predefined. */ - -/* EVSYS_QDIEN_bm Predefined. */ -/* EVSYS_QDIEN_bp Predefined. */ - -/* EVSYS_QDEN_bm Predefined. */ -/* EVSYS_QDEN_bp Predefined. */ - -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* EVSYS.CH3CTRL bit masks and bit positions */ -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* EVSYS.CH4CTRL bit masks and bit positions */ -/* EVSYS_QDIRM_gm Predefined. */ -/* EVSYS_QDIRM_gp Predefined. */ -/* EVSYS_QDIRM0_bm Predefined. */ -/* EVSYS_QDIRM0_bp Predefined. */ -/* EVSYS_QDIRM1_bm Predefined. */ -/* EVSYS_QDIRM1_bp Predefined. */ - -/* EVSYS_QDIEN_bm Predefined. */ -/* EVSYS_QDIEN_bp Predefined. */ - -/* EVSYS_QDEN_bm Predefined. */ -/* EVSYS_QDEN_bp Predefined. */ - -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* EVSYS.CH5CTRL bit masks and bit positions */ -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* EVSYS.CH6CTRL bit masks and bit positions */ -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* EVSYS.CH7CTRL bit masks and bit positions */ -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* NVM - Non Volatile Memory Controller */ -/* NVM.CMD bit masks and bit positions */ -#define NVM_CMD_gm 0xFF /* Command group mask. */ -#define NVM_CMD_gp 0 /* Command group position. */ -#define NVM_CMD0_bm (1<<0) /* Command bit 0 mask. */ -#define NVM_CMD0_bp 0 /* Command bit 0 position. */ -#define NVM_CMD1_bm (1<<1) /* Command bit 1 mask. */ -#define NVM_CMD1_bp 1 /* Command bit 1 position. */ -#define NVM_CMD2_bm (1<<2) /* Command bit 2 mask. */ -#define NVM_CMD2_bp 2 /* Command bit 2 position. */ -#define NVM_CMD3_bm (1<<3) /* Command bit 3 mask. */ -#define NVM_CMD3_bp 3 /* Command bit 3 position. */ -#define NVM_CMD4_bm (1<<4) /* Command bit 4 mask. */ -#define NVM_CMD4_bp 4 /* Command bit 4 position. */ -#define NVM_CMD5_bm (1<<5) /* Command bit 5 mask. */ -#define NVM_CMD5_bp 5 /* Command bit 5 position. */ -#define NVM_CMD6_bm (1<<6) /* Command bit 6 mask. */ -#define NVM_CMD6_bp 6 /* Command bit 6 position. */ -#define NVM_CMD7_bm (1<<7) /* Command bit 7 mask. */ -#define NVM_CMD7_bp 7 /* Command bit 7 position. */ - - -/* NVM.CTRLA bit masks and bit positions */ -#define NVM_CMDEX_bm 0x01 /* Command Execute bit mask. */ -#define NVM_CMDEX_bp 0 /* Command Execute bit position. */ - - -/* NVM.CTRLB bit masks and bit positions */ -#define NVM_EEMAPEN_bm 0x08 /* EEPROM Mapping Enable bit mask. */ -#define NVM_EEMAPEN_bp 3 /* EEPROM Mapping Enable bit position. */ - -#define NVM_FPRM_bm 0x04 /* Flash Power Reduction Enable bit mask. */ -#define NVM_FPRM_bp 2 /* Flash Power Reduction Enable bit position. */ - -#define NVM_EPRM_bm 0x02 /* EEPROM Power Reduction Enable bit mask. */ -#define NVM_EPRM_bp 1 /* EEPROM Power Reduction Enable bit position. */ - -#define NVM_SPMLOCK_bm 0x01 /* SPM Lock bit mask. */ -#define NVM_SPMLOCK_bp 0 /* SPM Lock bit position. */ - - -/* NVM.INTCTRL bit masks and bit positions */ -#define NVM_SPMLVL_gm 0x0C /* SPM Interrupt Level group mask. */ -#define NVM_SPMLVL_gp 2 /* SPM Interrupt Level group position. */ -#define NVM_SPMLVL0_bm (1<<2) /* SPM Interrupt Level bit 0 mask. */ -#define NVM_SPMLVL0_bp 2 /* SPM Interrupt Level bit 0 position. */ -#define NVM_SPMLVL1_bm (1<<3) /* SPM Interrupt Level bit 1 mask. */ -#define NVM_SPMLVL1_bp 3 /* SPM Interrupt Level bit 1 position. */ - -#define NVM_EELVL_gm 0x03 /* EEPROM Interrupt Level group mask. */ -#define NVM_EELVL_gp 0 /* EEPROM Interrupt Level group position. */ -#define NVM_EELVL0_bm (1<<0) /* EEPROM Interrupt Level bit 0 mask. */ -#define NVM_EELVL0_bp 0 /* EEPROM Interrupt Level bit 0 position. */ -#define NVM_EELVL1_bm (1<<1) /* EEPROM Interrupt Level bit 1 mask. */ -#define NVM_EELVL1_bp 1 /* EEPROM Interrupt Level bit 1 position. */ - - -/* NVM.STATUS bit masks and bit positions */ -#define NVM_NVMBUSY_bm 0x80 /* Non-volatile Memory Busy bit mask. */ -#define NVM_NVMBUSY_bp 7 /* Non-volatile Memory Busy bit position. */ - -#define NVM_FBUSY_bm 0x40 /* Flash Memory Busy bit mask. */ -#define NVM_FBUSY_bp 6 /* Flash Memory Busy bit position. */ - -#define NVM_EELOAD_bm 0x02 /* EEPROM Page Buffer Active Loading bit mask. */ -#define NVM_EELOAD_bp 1 /* EEPROM Page Buffer Active Loading bit position. */ - -#define NVM_FLOAD_bm 0x01 /* Flash Page Buffer Active Loading bit mask. */ -#define NVM_FLOAD_bp 0 /* Flash Page Buffer Active Loading bit position. */ - - -/* NVM.LOCKBITS bit masks and bit positions */ -#define NVM_BLBB_gm 0xC0 /* Boot Lock Bits - Boot Section group mask. */ -#define NVM_BLBB_gp 6 /* Boot Lock Bits - Boot Section group position. */ -#define NVM_BLBB0_bm (1<<6) /* Boot Lock Bits - Boot Section bit 0 mask. */ -#define NVM_BLBB0_bp 6 /* Boot Lock Bits - Boot Section bit 0 position. */ -#define NVM_BLBB1_bm (1<<7) /* Boot Lock Bits - Boot Section bit 1 mask. */ -#define NVM_BLBB1_bp 7 /* Boot Lock Bits - Boot Section bit 1 position. */ - -#define NVM_BLBA_gm 0x30 /* Boot Lock Bits - Application Section group mask. */ -#define NVM_BLBA_gp 4 /* Boot Lock Bits - Application Section group position. */ -#define NVM_BLBA0_bm (1<<4) /* Boot Lock Bits - Application Section bit 0 mask. */ -#define NVM_BLBA0_bp 4 /* Boot Lock Bits - Application Section bit 0 position. */ -#define NVM_BLBA1_bm (1<<5) /* Boot Lock Bits - Application Section bit 1 mask. */ -#define NVM_BLBA1_bp 5 /* Boot Lock Bits - Application Section bit 1 position. */ - -#define NVM_BLBAT_gm 0x0C /* Boot Lock Bits - Application Table group mask. */ -#define NVM_BLBAT_gp 2 /* Boot Lock Bits - Application Table group position. */ -#define NVM_BLBAT0_bm (1<<2) /* Boot Lock Bits - Application Table bit 0 mask. */ -#define NVM_BLBAT0_bp 2 /* Boot Lock Bits - Application Table bit 0 position. */ -#define NVM_BLBAT1_bm (1<<3) /* Boot Lock Bits - Application Table bit 1 mask. */ -#define NVM_BLBAT1_bp 3 /* Boot Lock Bits - Application Table bit 1 position. */ - -#define NVM_LB_gm 0x03 /* Lock Bits group mask. */ -#define NVM_LB_gp 0 /* Lock Bits group position. */ -#define NVM_LB0_bm (1<<0) /* Lock Bits bit 0 mask. */ -#define NVM_LB0_bp 0 /* Lock Bits bit 0 position. */ -#define NVM_LB1_bm (1<<1) /* Lock Bits bit 1 mask. */ -#define NVM_LB1_bp 1 /* Lock Bits bit 1 position. */ - - -/* NVM_LOCKBITS.LOCKBITS bit masks and bit positions */ -#define NVM_LOCKBITS_BLBB_gm 0xC0 /* Boot Lock Bits - Boot Section group mask. */ -#define NVM_LOCKBITS_BLBB_gp 6 /* Boot Lock Bits - Boot Section group position. */ -#define NVM_LOCKBITS_BLBB0_bm (1<<6) /* Boot Lock Bits - Boot Section bit 0 mask. */ -#define NVM_LOCKBITS_BLBB0_bp 6 /* Boot Lock Bits - Boot Section bit 0 position. */ -#define NVM_LOCKBITS_BLBB1_bm (1<<7) /* Boot Lock Bits - Boot Section bit 1 mask. */ -#define NVM_LOCKBITS_BLBB1_bp 7 /* Boot Lock Bits - Boot Section bit 1 position. */ - -#define NVM_LOCKBITS_BLBA_gm 0x30 /* Boot Lock Bits - Application Section group mask. */ -#define NVM_LOCKBITS_BLBA_gp 4 /* Boot Lock Bits - Application Section group position. */ -#define NVM_LOCKBITS_BLBA0_bm (1<<4) /* Boot Lock Bits - Application Section bit 0 mask. */ -#define NVM_LOCKBITS_BLBA0_bp 4 /* Boot Lock Bits - Application Section bit 0 position. */ -#define NVM_LOCKBITS_BLBA1_bm (1<<5) /* Boot Lock Bits - Application Section bit 1 mask. */ -#define NVM_LOCKBITS_BLBA1_bp 5 /* Boot Lock Bits - Application Section bit 1 position. */ - -#define NVM_LOCKBITS_BLBAT_gm 0x0C /* Boot Lock Bits - Application Table group mask. */ -#define NVM_LOCKBITS_BLBAT_gp 2 /* Boot Lock Bits - Application Table group position. */ -#define NVM_LOCKBITS_BLBAT0_bm (1<<2) /* Boot Lock Bits - Application Table bit 0 mask. */ -#define NVM_LOCKBITS_BLBAT0_bp 2 /* Boot Lock Bits - Application Table bit 0 position. */ -#define NVM_LOCKBITS_BLBAT1_bm (1<<3) /* Boot Lock Bits - Application Table bit 1 mask. */ -#define NVM_LOCKBITS_BLBAT1_bp 3 /* Boot Lock Bits - Application Table bit 1 position. */ - -#define NVM_LOCKBITS_LB_gm 0x03 /* Lock Bits group mask. */ -#define NVM_LOCKBITS_LB_gp 0 /* Lock Bits group position. */ -#define NVM_LOCKBITS_LB0_bm (1<<0) /* Lock Bits bit 0 mask. */ -#define NVM_LOCKBITS_LB0_bp 0 /* Lock Bits bit 0 position. */ -#define NVM_LOCKBITS_LB1_bm (1<<1) /* Lock Bits bit 1 mask. */ -#define NVM_LOCKBITS_LB1_bp 1 /* Lock Bits bit 1 position. */ - - -/* NVM_FUSES.FUSEBYTE0 bit masks and bit positions */ -#define NVM_FUSES_JTAGUSERID_gm 0xFF /* JTAG User ID group mask. */ -#define NVM_FUSES_JTAGUSERID_gp 0 /* JTAG User ID group position. */ -#define NVM_FUSES_JTAGUSERID0_bm (1<<0) /* JTAG User ID bit 0 mask. */ -#define NVM_FUSES_JTAGUSERID0_bp 0 /* JTAG User ID bit 0 position. */ -#define NVM_FUSES_JTAGUSERID1_bm (1<<1) /* JTAG User ID bit 1 mask. */ -#define NVM_FUSES_JTAGUSERID1_bp 1 /* JTAG User ID bit 1 position. */ -#define NVM_FUSES_JTAGUSERID2_bm (1<<2) /* JTAG User ID bit 2 mask. */ -#define NVM_FUSES_JTAGUSERID2_bp 2 /* JTAG User ID bit 2 position. */ -#define NVM_FUSES_JTAGUSERID3_bm (1<<3) /* JTAG User ID bit 3 mask. */ -#define NVM_FUSES_JTAGUSERID3_bp 3 /* JTAG User ID bit 3 position. */ -#define NVM_FUSES_JTAGUSERID4_bm (1<<4) /* JTAG User ID bit 4 mask. */ -#define NVM_FUSES_JTAGUSERID4_bp 4 /* JTAG User ID bit 4 position. */ -#define NVM_FUSES_JTAGUSERID5_bm (1<<5) /* JTAG User ID bit 5 mask. */ -#define NVM_FUSES_JTAGUSERID5_bp 5 /* JTAG User ID bit 5 position. */ -#define NVM_FUSES_JTAGUSERID6_bm (1<<6) /* JTAG User ID bit 6 mask. */ -#define NVM_FUSES_JTAGUSERID6_bp 6 /* JTAG User ID bit 6 position. */ -#define NVM_FUSES_JTAGUSERID7_bm (1<<7) /* JTAG User ID bit 7 mask. */ -#define NVM_FUSES_JTAGUSERID7_bp 7 /* JTAG User ID bit 7 position. */ - - -/* NVM_FUSES.FUSEBYTE1 bit masks and bit positions */ -#define NVM_FUSES_WDWP_gm 0xF0 /* Watchdog Window Timeout Period group mask. */ -#define NVM_FUSES_WDWP_gp 4 /* Watchdog Window Timeout Period group position. */ -#define NVM_FUSES_WDWP0_bm (1<<4) /* Watchdog Window Timeout Period bit 0 mask. */ -#define NVM_FUSES_WDWP0_bp 4 /* Watchdog Window Timeout Period bit 0 position. */ -#define NVM_FUSES_WDWP1_bm (1<<5) /* Watchdog Window Timeout Period bit 1 mask. */ -#define NVM_FUSES_WDWP1_bp 5 /* Watchdog Window Timeout Period bit 1 position. */ -#define NVM_FUSES_WDWP2_bm (1<<6) /* Watchdog Window Timeout Period bit 2 mask. */ -#define NVM_FUSES_WDWP2_bp 6 /* Watchdog Window Timeout Period bit 2 position. */ -#define NVM_FUSES_WDWP3_bm (1<<7) /* Watchdog Window Timeout Period bit 3 mask. */ -#define NVM_FUSES_WDWP3_bp 7 /* Watchdog Window Timeout Period bit 3 position. */ - -#define NVM_FUSES_WDP_gm 0x0F /* Watchdog Timeout Period group mask. */ -#define NVM_FUSES_WDP_gp 0 /* Watchdog Timeout Period group position. */ -#define NVM_FUSES_WDP0_bm (1<<0) /* Watchdog Timeout Period bit 0 mask. */ -#define NVM_FUSES_WDP0_bp 0 /* Watchdog Timeout Period bit 0 position. */ -#define NVM_FUSES_WDP1_bm (1<<1) /* Watchdog Timeout Period bit 1 mask. */ -#define NVM_FUSES_WDP1_bp 1 /* Watchdog Timeout Period bit 1 position. */ -#define NVM_FUSES_WDP2_bm (1<<2) /* Watchdog Timeout Period bit 2 mask. */ -#define NVM_FUSES_WDP2_bp 2 /* Watchdog Timeout Period bit 2 position. */ -#define NVM_FUSES_WDP3_bm (1<<3) /* Watchdog Timeout Period bit 3 mask. */ -#define NVM_FUSES_WDP3_bp 3 /* Watchdog Timeout Period bit 3 position. */ - - -/* NVM_FUSES.FUSEBYTE2 bit masks and bit positions */ -#define NVM_FUSES_DVSDON_bm 0x80 /* Spike Detector Enable bit mask. */ -#define NVM_FUSES_DVSDON_bp 7 /* Spike Detector Enable bit position. */ - -#define NVM_FUSES_BOOTRST_bm 0x40 /* Boot Loader Section Reset Vector bit mask. */ -#define NVM_FUSES_BOOTRST_bp 6 /* Boot Loader Section Reset Vector bit position. */ - -#define NVM_FUSES_BODACT_gm 0x0C /* BOD Operation in Active Mode group mask. */ -#define NVM_FUSES_BODACT_gp 2 /* BOD Operation in Active Mode group position. */ -#define NVM_FUSES_BODACT0_bm (1<<2) /* BOD Operation in Active Mode bit 0 mask. */ -#define NVM_FUSES_BODACT0_bp 2 /* BOD Operation in Active Mode bit 0 position. */ -#define NVM_FUSES_BODACT1_bm (1<<3) /* BOD Operation in Active Mode bit 1 mask. */ -#define NVM_FUSES_BODACT1_bp 3 /* BOD Operation in Active Mode bit 1 position. */ - -#define NVM_FUSES_BODPD_gm 0x03 /* BOD Operation in Power-Down Mode group mask. */ -#define NVM_FUSES_BODPD_gp 0 /* BOD Operation in Power-Down Mode group position. */ -#define NVM_FUSES_BODPD0_bm (1<<0) /* BOD Operation in Power-Down Mode bit 0 mask. */ -#define NVM_FUSES_BODPD0_bp 0 /* BOD Operation in Power-Down Mode bit 0 position. */ -#define NVM_FUSES_BODPD1_bm (1<<1) /* BOD Operation in Power-Down Mode bit 1 mask. */ -#define NVM_FUSES_BODPD1_bp 1 /* BOD Operation in Power-Down Mode bit 1 position. */ - - -/* NVM_FUSES.FUSEBYTE4 bit masks and bit positions */ -#define NVM_FUSES_SUT_gm 0x0C /* Start-up Time group mask. */ -#define NVM_FUSES_SUT_gp 2 /* Start-up Time group position. */ -#define NVM_FUSES_SUT0_bm (1<<2) /* Start-up Time bit 0 mask. */ -#define NVM_FUSES_SUT0_bp 2 /* Start-up Time bit 0 position. */ -#define NVM_FUSES_SUT1_bm (1<<3) /* Start-up Time bit 1 mask. */ -#define NVM_FUSES_SUT1_bp 3 /* Start-up Time bit 1 position. */ - -#define NVM_FUSES_WDLOCK_bm 0x02 /* Watchdog Timer Lock bit mask. */ -#define NVM_FUSES_WDLOCK_bp 1 /* Watchdog Timer Lock bit position. */ - -#define NVM_FUSES_JTAGEN_bm 0x01 /* JTAG Interface Enable bit mask. */ -#define NVM_FUSES_JTAGEN_bp 0 /* JTAG Interface Enable bit position. */ - - -/* NVM_FUSES.FUSEBYTE5 bit masks and bit positions */ -#define NVM_FUSES_EESAVE_bm 0x08 /* Preserve EEPROM Through Chip Erase bit mask. */ -#define NVM_FUSES_EESAVE_bp 3 /* Preserve EEPROM Through Chip Erase bit position. */ - -#define NVM_FUSES_BODLVL_gm 0x07 /* Brown Out Detection Voltage Level group mask. */ -#define NVM_FUSES_BODLVL_gp 0 /* Brown Out Detection Voltage Level group position. */ -#define NVM_FUSES_BODLVL0_bm (1<<0) /* Brown Out Detection Voltage Level bit 0 mask. */ -#define NVM_FUSES_BODLVL0_bp 0 /* Brown Out Detection Voltage Level bit 0 position. */ -#define NVM_FUSES_BODLVL1_bm (1<<1) /* Brown Out Detection Voltage Level bit 1 mask. */ -#define NVM_FUSES_BODLVL1_bp 1 /* Brown Out Detection Voltage Level bit 1 position. */ -#define NVM_FUSES_BODLVL2_bm (1<<2) /* Brown Out Detection Voltage Level bit 2 mask. */ -#define NVM_FUSES_BODLVL2_bp 2 /* Brown Out Detection Voltage Level bit 2 position. */ - - -/* AC - Analog Comparator */ -/* AC.AC0CTRL bit masks and bit positions */ -#define AC_INTMODE_gm 0xC0 /* Interrupt Mode group mask. */ -#define AC_INTMODE_gp 6 /* Interrupt Mode group position. */ -#define AC_INTMODE0_bm (1<<6) /* Interrupt Mode bit 0 mask. */ -#define AC_INTMODE0_bp 6 /* Interrupt Mode bit 0 position. */ -#define AC_INTMODE1_bm (1<<7) /* Interrupt Mode bit 1 mask. */ -#define AC_INTMODE1_bp 7 /* Interrupt Mode bit 1 position. */ - -#define AC_INTLVL_gm 0x30 /* Interrupt Level group mask. */ -#define AC_INTLVL_gp 4 /* Interrupt Level group position. */ -#define AC_INTLVL0_bm (1<<4) /* Interrupt Level bit 0 mask. */ -#define AC_INTLVL0_bp 4 /* Interrupt Level bit 0 position. */ -#define AC_INTLVL1_bm (1<<5) /* Interrupt Level bit 1 mask. */ -#define AC_INTLVL1_bp 5 /* Interrupt Level bit 1 position. */ - -#define AC_HSMODE_bm 0x08 /* High-speed Mode bit mask. */ -#define AC_HSMODE_bp 3 /* High-speed Mode bit position. */ - -#define AC_HYSMODE_gm 0x06 /* Hysteresis Mode group mask. */ -#define AC_HYSMODE_gp 1 /* Hysteresis Mode group position. */ -#define AC_HYSMODE0_bm (1<<1) /* Hysteresis Mode bit 0 mask. */ -#define AC_HYSMODE0_bp 1 /* Hysteresis Mode bit 0 position. */ -#define AC_HYSMODE1_bm (1<<2) /* Hysteresis Mode bit 1 mask. */ -#define AC_HYSMODE1_bp 2 /* Hysteresis Mode bit 1 position. */ - -#define AC_ENABLE_bm 0x01 /* Enable bit mask. */ -#define AC_ENABLE_bp 0 /* Enable bit position. */ - - -/* AC.AC1CTRL bit masks and bit positions */ -/* AC_INTMODE_gm Predefined. */ -/* AC_INTMODE_gp Predefined. */ -/* AC_INTMODE0_bm Predefined. */ -/* AC_INTMODE0_bp Predefined. */ -/* AC_INTMODE1_bm Predefined. */ -/* AC_INTMODE1_bp Predefined. */ - -/* AC_INTLVL_gm Predefined. */ -/* AC_INTLVL_gp Predefined. */ -/* AC_INTLVL0_bm Predefined. */ -/* AC_INTLVL0_bp Predefined. */ -/* AC_INTLVL1_bm Predefined. */ -/* AC_INTLVL1_bp Predefined. */ - -/* AC_HSMODE_bm Predefined. */ -/* AC_HSMODE_bp Predefined. */ - -/* AC_HYSMODE_gm Predefined. */ -/* AC_HYSMODE_gp Predefined. */ -/* AC_HYSMODE0_bm Predefined. */ -/* AC_HYSMODE0_bp Predefined. */ -/* AC_HYSMODE1_bm Predefined. */ -/* AC_HYSMODE1_bp Predefined. */ - -/* AC_ENABLE_bm Predefined. */ -/* AC_ENABLE_bp Predefined. */ - - -/* AC.AC0MUXCTRL bit masks and bit positions */ -#define AC_MUXPOS_gm 0x38 /* MUX Positive Input group mask. */ -#define AC_MUXPOS_gp 3 /* MUX Positive Input group position. */ -#define AC_MUXPOS0_bm (1<<3) /* MUX Positive Input bit 0 mask. */ -#define AC_MUXPOS0_bp 3 /* MUX Positive Input bit 0 position. */ -#define AC_MUXPOS1_bm (1<<4) /* MUX Positive Input bit 1 mask. */ -#define AC_MUXPOS1_bp 4 /* MUX Positive Input bit 1 position. */ -#define AC_MUXPOS2_bm (1<<5) /* MUX Positive Input bit 2 mask. */ -#define AC_MUXPOS2_bp 5 /* MUX Positive Input bit 2 position. */ - -#define AC_MUXNEG_gm 0x07 /* MUX Negative Input group mask. */ -#define AC_MUXNEG_gp 0 /* MUX Negative Input group position. */ -#define AC_MUXNEG0_bm (1<<0) /* MUX Negative Input bit 0 mask. */ -#define AC_MUXNEG0_bp 0 /* MUX Negative Input bit 0 position. */ -#define AC_MUXNEG1_bm (1<<1) /* MUX Negative Input bit 1 mask. */ -#define AC_MUXNEG1_bp 1 /* MUX Negative Input bit 1 position. */ -#define AC_MUXNEG2_bm (1<<2) /* MUX Negative Input bit 2 mask. */ -#define AC_MUXNEG2_bp 2 /* MUX Negative Input bit 2 position. */ - - -/* AC.AC1MUXCTRL bit masks and bit positions */ -/* AC_MUXPOS_gm Predefined. */ -/* AC_MUXPOS_gp Predefined. */ -/* AC_MUXPOS0_bm Predefined. */ -/* AC_MUXPOS0_bp Predefined. */ -/* AC_MUXPOS1_bm Predefined. */ -/* AC_MUXPOS1_bp Predefined. */ -/* AC_MUXPOS2_bm Predefined. */ -/* AC_MUXPOS2_bp Predefined. */ - -/* AC_MUXNEG_gm Predefined. */ -/* AC_MUXNEG_gp Predefined. */ -/* AC_MUXNEG0_bm Predefined. */ -/* AC_MUXNEG0_bp Predefined. */ -/* AC_MUXNEG1_bm Predefined. */ -/* AC_MUXNEG1_bp Predefined. */ -/* AC_MUXNEG2_bm Predefined. */ -/* AC_MUXNEG2_bp Predefined. */ - - -/* AC.CTRLA bit masks and bit positions */ -#define AC_AC0OUT_bm 0x01 /* Comparator 0 Output Enable bit mask. */ -#define AC_AC0OUT_bp 0 /* Comparator 0 Output Enable bit position. */ - - -/* AC.CTRLB bit masks and bit positions */ -#define AC_SCALEFAC_gm 0x3F /* VCC Voltage Scaler Factor group mask. */ -#define AC_SCALEFAC_gp 0 /* VCC Voltage Scaler Factor group position. */ -#define AC_SCALEFAC0_bm (1<<0) /* VCC Voltage Scaler Factor bit 0 mask. */ -#define AC_SCALEFAC0_bp 0 /* VCC Voltage Scaler Factor bit 0 position. */ -#define AC_SCALEFAC1_bm (1<<1) /* VCC Voltage Scaler Factor bit 1 mask. */ -#define AC_SCALEFAC1_bp 1 /* VCC Voltage Scaler Factor bit 1 position. */ -#define AC_SCALEFAC2_bm (1<<2) /* VCC Voltage Scaler Factor bit 2 mask. */ -#define AC_SCALEFAC2_bp 2 /* VCC Voltage Scaler Factor bit 2 position. */ -#define AC_SCALEFAC3_bm (1<<3) /* VCC Voltage Scaler Factor bit 3 mask. */ -#define AC_SCALEFAC3_bp 3 /* VCC Voltage Scaler Factor bit 3 position. */ -#define AC_SCALEFAC4_bm (1<<4) /* VCC Voltage Scaler Factor bit 4 mask. */ -#define AC_SCALEFAC4_bp 4 /* VCC Voltage Scaler Factor bit 4 position. */ -#define AC_SCALEFAC5_bm (1<<5) /* VCC Voltage Scaler Factor bit 5 mask. */ -#define AC_SCALEFAC5_bp 5 /* VCC Voltage Scaler Factor bit 5 position. */ - - -/* AC.WINCTRL bit masks and bit positions */ -#define AC_WEN_bm 0x10 /* Window Mode Enable bit mask. */ -#define AC_WEN_bp 4 /* Window Mode Enable bit position. */ - -#define AC_WINTMODE_gm 0x0C /* Window Interrupt Mode group mask. */ -#define AC_WINTMODE_gp 2 /* Window Interrupt Mode group position. */ -#define AC_WINTMODE0_bm (1<<2) /* Window Interrupt Mode bit 0 mask. */ -#define AC_WINTMODE0_bp 2 /* Window Interrupt Mode bit 0 position. */ -#define AC_WINTMODE1_bm (1<<3) /* Window Interrupt Mode bit 1 mask. */ -#define AC_WINTMODE1_bp 3 /* Window Interrupt Mode bit 1 position. */ - -#define AC_WINTLVL_gm 0x03 /* Window Interrupt Level group mask. */ -#define AC_WINTLVL_gp 0 /* Window Interrupt Level group position. */ -#define AC_WINTLVL0_bm (1<<0) /* Window Interrupt Level bit 0 mask. */ -#define AC_WINTLVL0_bp 0 /* Window Interrupt Level bit 0 position. */ -#define AC_WINTLVL1_bm (1<<1) /* Window Interrupt Level bit 1 mask. */ -#define AC_WINTLVL1_bp 1 /* Window Interrupt Level bit 1 position. */ - - -/* AC.STATUS bit masks and bit positions */ -#define AC_WSTATE_gm 0xC0 /* Window Mode State group mask. */ -#define AC_WSTATE_gp 6 /* Window Mode State group position. */ -#define AC_WSTATE0_bm (1<<6) /* Window Mode State bit 0 mask. */ -#define AC_WSTATE0_bp 6 /* Window Mode State bit 0 position. */ -#define AC_WSTATE1_bm (1<<7) /* Window Mode State bit 1 mask. */ -#define AC_WSTATE1_bp 7 /* Window Mode State bit 1 position. */ - -#define AC_AC1STATE_bm 0x20 /* Comparator 1 State bit mask. */ -#define AC_AC1STATE_bp 5 /* Comparator 1 State bit position. */ - -#define AC_AC0STATE_bm 0x10 /* Comparator 0 State bit mask. */ -#define AC_AC0STATE_bp 4 /* Comparator 0 State bit position. */ - -#define AC_WIF_bm 0x04 /* Window Mode Interrupt Flag bit mask. */ -#define AC_WIF_bp 2 /* Window Mode Interrupt Flag bit position. */ - -#define AC_AC1IF_bm 0x02 /* Comparator 1 Interrupt Flag bit mask. */ -#define AC_AC1IF_bp 1 /* Comparator 1 Interrupt Flag bit position. */ - -#define AC_AC0IF_bm 0x01 /* Comparator 0 Interrupt Flag bit mask. */ -#define AC_AC0IF_bp 0 /* Comparator 0 Interrupt Flag bit position. */ - - -/* ADC - Analog/Digital Converter */ -/* ADC_CH.CTRL bit masks and bit positions */ -#define ADC_CH_START_bm 0x80 /* Channel Start Conversion bit mask. */ -#define ADC_CH_START_bp 7 /* Channel Start Conversion bit position. */ - -#define ADC_CH_GAINFAC_gm 0x1C /* Gain Factor group mask. */ -#define ADC_CH_GAINFAC_gp 2 /* Gain Factor group position. */ -#define ADC_CH_GAINFAC0_bm (1<<2) /* Gain Factor bit 0 mask. */ -#define ADC_CH_GAINFAC0_bp 2 /* Gain Factor bit 0 position. */ -#define ADC_CH_GAINFAC1_bm (1<<3) /* Gain Factor bit 1 mask. */ -#define ADC_CH_GAINFAC1_bp 3 /* Gain Factor bit 1 position. */ -#define ADC_CH_GAINFAC2_bm (1<<4) /* Gain Factor bit 2 mask. */ -#define ADC_CH_GAINFAC2_bp 4 /* Gain Factor bit 2 position. */ - -#define ADC_CH_INPUTMODE_gm 0x03 /* Input Mode Select group mask. */ -#define ADC_CH_INPUTMODE_gp 0 /* Input Mode Select group position. */ -#define ADC_CH_INPUTMODE0_bm (1<<0) /* Input Mode Select bit 0 mask. */ -#define ADC_CH_INPUTMODE0_bp 0 /* Input Mode Select bit 0 position. */ -#define ADC_CH_INPUTMODE1_bm (1<<1) /* Input Mode Select bit 1 mask. */ -#define ADC_CH_INPUTMODE1_bp 1 /* Input Mode Select bit 1 position. */ - - -/* ADC_CH.MUXCTRL bit masks and bit positions */ -#define ADC_CH_MUXPOS_gm 0x78 /* Positive Input Select group mask. */ -#define ADC_CH_MUXPOS_gp 3 /* Positive Input Select group position. */ -#define ADC_CH_MUXPOS0_bm (1<<3) /* Positive Input Select bit 0 mask. */ -#define ADC_CH_MUXPOS0_bp 3 /* Positive Input Select bit 0 position. */ -#define ADC_CH_MUXPOS1_bm (1<<4) /* Positive Input Select bit 1 mask. */ -#define ADC_CH_MUXPOS1_bp 4 /* Positive Input Select bit 1 position. */ -#define ADC_CH_MUXPOS2_bm (1<<5) /* Positive Input Select bit 2 mask. */ -#define ADC_CH_MUXPOS2_bp 5 /* Positive Input Select bit 2 position. */ -#define ADC_CH_MUXPOS3_bm (1<<6) /* Positive Input Select bit 3 mask. */ -#define ADC_CH_MUXPOS3_bp 6 /* Positive Input Select bit 3 position. */ - -#define ADC_CH_MUXINT_gm 0x78 /* Internal Input Select group mask. */ -#define ADC_CH_MUXINT_gp 3 /* Internal Input Select group position. */ -#define ADC_CH_MUXINT0_bm (1<<3) /* Internal Input Select bit 0 mask. */ -#define ADC_CH_MUXINT0_bp 3 /* Internal Input Select bit 0 position. */ -#define ADC_CH_MUXINT1_bm (1<<4) /* Internal Input Select bit 1 mask. */ -#define ADC_CH_MUXINT1_bp 4 /* Internal Input Select bit 1 position. */ -#define ADC_CH_MUXINT2_bm (1<<5) /* Internal Input Select bit 2 mask. */ -#define ADC_CH_MUXINT2_bp 5 /* Internal Input Select bit 2 position. */ -#define ADC_CH_MUXINT3_bm (1<<6) /* Internal Input Select bit 3 mask. */ -#define ADC_CH_MUXINT3_bp 6 /* Internal Input Select bit 3 position. */ - -#define ADC_CH_MUXNEG_gm 0x03 /* Negative Input Select group mask. */ -#define ADC_CH_MUXNEG_gp 0 /* Negative Input Select group position. */ -#define ADC_CH_MUXNEG0_bm (1<<0) /* Negative Input Select bit 0 mask. */ -#define ADC_CH_MUXNEG0_bp 0 /* Negative Input Select bit 0 position. */ -#define ADC_CH_MUXNEG1_bm (1<<1) /* Negative Input Select bit 1 mask. */ -#define ADC_CH_MUXNEG1_bp 1 /* Negative Input Select bit 1 position. */ - - -/* ADC_CH.INTCTRL bit masks and bit positions */ -#define ADC_CH_INTMODE_gm 0x0C /* Interrupt Mode group mask. */ -#define ADC_CH_INTMODE_gp 2 /* Interrupt Mode group position. */ -#define ADC_CH_INTMODE0_bm (1<<2) /* Interrupt Mode bit 0 mask. */ -#define ADC_CH_INTMODE0_bp 2 /* Interrupt Mode bit 0 position. */ -#define ADC_CH_INTMODE1_bm (1<<3) /* Interrupt Mode bit 1 mask. */ -#define ADC_CH_INTMODE1_bp 3 /* Interrupt Mode bit 1 position. */ - -#define ADC_CH_INTLVL_gm 0x03 /* Interrupt Level group mask. */ -#define ADC_CH_INTLVL_gp 0 /* Interrupt Level group position. */ -#define ADC_CH_INTLVL0_bm (1<<0) /* Interrupt Level bit 0 mask. */ -#define ADC_CH_INTLVL0_bp 0 /* Interrupt Level bit 0 position. */ -#define ADC_CH_INTLVL1_bm (1<<1) /* Interrupt Level bit 1 mask. */ -#define ADC_CH_INTLVL1_bp 1 /* Interrupt Level bit 1 position. */ - - -/* ADC_CH.INTFLAGS bit masks and bit positions */ -#define ADC_CH_CHIF_bm 0x01 /* Channel Interrupt Flag bit mask. */ -#define ADC_CH_CHIF_bp 0 /* Channel Interrupt Flag bit position. */ - - -/* ADC.CTRLA bit masks and bit positions */ -#define ADC_DMASEL_gm 0xE0 /* DMA Selection group mask. */ -#define ADC_DMASEL_gp 5 /* DMA Selection group position. */ -#define ADC_DMASEL0_bm (1<<5) /* DMA Selection bit 0 mask. */ -#define ADC_DMASEL0_bp 5 /* DMA Selection bit 0 position. */ -#define ADC_DMASEL1_bm (1<<6) /* DMA Selection bit 1 mask. */ -#define ADC_DMASEL1_bp 6 /* DMA Selection bit 1 position. */ -#define ADC_DMASEL2_bm (1<<7) /* DMA Selection bit 2 mask. */ -#define ADC_DMASEL2_bp 7 /* DMA Selection bit 2 position. */ - -#define ADC_CH3START_bm 0x20 /* Channel 3 Start Conversion bit mask. */ -#define ADC_CH3START_bp 5 /* Channel 3 Start Conversion bit position. */ - -#define ADC_CH2START_bm 0x10 /* Channel 2 Start Conversion bit mask. */ -#define ADC_CH2START_bp 4 /* Channel 2 Start Conversion bit position. */ - -#define ADC_CH1START_bm 0x08 /* Channel 1 Start Conversion bit mask. */ -#define ADC_CH1START_bp 3 /* Channel 1 Start Conversion bit position. */ - -#define ADC_CH0START_bm 0x04 /* Channel 0 Start Conversion bit mask. */ -#define ADC_CH0START_bp 2 /* Channel 0 Start Conversion bit position. */ - -#define ADC_FLUSH_bm 0x02 /* Flush Pipeline bit mask. */ -#define ADC_FLUSH_bp 1 /* Flush Pipeline bit position. */ - -#define ADC_ENABLE_bm 0x01 /* Enable ADC bit mask. */ -#define ADC_ENABLE_bp 0 /* Enable ADC bit position. */ - - -/* ADC.CTRLB bit masks and bit positions */ -#define ADC_CONMODE_bm 0x10 /* Conversion Mode bit mask. */ -#define ADC_CONMODE_bp 4 /* Conversion Mode bit position. */ - -#define ADC_FREERUN_bm 0x08 /* Free Running Mode Enable bit mask. */ -#define ADC_FREERUN_bp 3 /* Free Running Mode Enable bit position. */ - -#define ADC_RESOLUTION_gm 0x06 /* Result Resolution group mask. */ -#define ADC_RESOLUTION_gp 1 /* Result Resolution group position. */ -#define ADC_RESOLUTION0_bm (1<<1) /* Result Resolution bit 0 mask. */ -#define ADC_RESOLUTION0_bp 1 /* Result Resolution bit 0 position. */ -#define ADC_RESOLUTION1_bm (1<<2) /* Result Resolution bit 1 mask. */ -#define ADC_RESOLUTION1_bp 2 /* Result Resolution bit 1 position. */ - - -/* ADC.REFCTRL bit masks and bit positions */ -#define ADC_REFSEL_gm 0x30 /* Reference Selection group mask. */ -#define ADC_REFSEL_gp 4 /* Reference Selection group position. */ -#define ADC_REFSEL0_bm (1<<4) /* Reference Selection bit 0 mask. */ -#define ADC_REFSEL0_bp 4 /* Reference Selection bit 0 position. */ -#define ADC_REFSEL1_bm (1<<5) /* Reference Selection bit 1 mask. */ -#define ADC_REFSEL1_bp 5 /* Reference Selection bit 1 position. */ - -#define ADC_BANDGAP_bm 0x02 /* Bandgap enable bit mask. */ -#define ADC_BANDGAP_bp 1 /* Bandgap enable bit position. */ - -#define ADC_TEMPREF_bm 0x01 /* Temperature Reference Enable bit mask. */ -#define ADC_TEMPREF_bp 0 /* Temperature Reference Enable bit position. */ - - -/* ADC.EVCTRL bit masks and bit positions */ -#define ADC_SWEEP_gm 0xC0 /* Channel Sweep Selection group mask. */ -#define ADC_SWEEP_gp 6 /* Channel Sweep Selection group position. */ -#define ADC_SWEEP0_bm (1<<6) /* Channel Sweep Selection bit 0 mask. */ -#define ADC_SWEEP0_bp 6 /* Channel Sweep Selection bit 0 position. */ -#define ADC_SWEEP1_bm (1<<7) /* Channel Sweep Selection bit 1 mask. */ -#define ADC_SWEEP1_bp 7 /* Channel Sweep Selection bit 1 position. */ - -#define ADC_EVSEL_gm 0x38 /* Event Input Select group mask. */ -#define ADC_EVSEL_gp 3 /* Event Input Select group position. */ -#define ADC_EVSEL0_bm (1<<3) /* Event Input Select bit 0 mask. */ -#define ADC_EVSEL0_bp 3 /* Event Input Select bit 0 position. */ -#define ADC_EVSEL1_bm (1<<4) /* Event Input Select bit 1 mask. */ -#define ADC_EVSEL1_bp 4 /* Event Input Select bit 1 position. */ -#define ADC_EVSEL2_bm (1<<5) /* Event Input Select bit 2 mask. */ -#define ADC_EVSEL2_bp 5 /* Event Input Select bit 2 position. */ - -#define ADC_EVACT_gm 0x07 /* Event Action Select group mask. */ -#define ADC_EVACT_gp 0 /* Event Action Select group position. */ -#define ADC_EVACT0_bm (1<<0) /* Event Action Select bit 0 mask. */ -#define ADC_EVACT0_bp 0 /* Event Action Select bit 0 position. */ -#define ADC_EVACT1_bm (1<<1) /* Event Action Select bit 1 mask. */ -#define ADC_EVACT1_bp 1 /* Event Action Select bit 1 position. */ -#define ADC_EVACT2_bm (1<<2) /* Event Action Select bit 2 mask. */ -#define ADC_EVACT2_bp 2 /* Event Action Select bit 2 position. */ - - -/* ADC.PRESCALER bit masks and bit positions */ -#define ADC_PRESCALER_gm 0x07 /* Clock Prescaler Selection group mask. */ -#define ADC_PRESCALER_gp 0 /* Clock Prescaler Selection group position. */ -#define ADC_PRESCALER0_bm (1<<0) /* Clock Prescaler Selection bit 0 mask. */ -#define ADC_PRESCALER0_bp 0 /* Clock Prescaler Selection bit 0 position. */ -#define ADC_PRESCALER1_bm (1<<1) /* Clock Prescaler Selection bit 1 mask. */ -#define ADC_PRESCALER1_bp 1 /* Clock Prescaler Selection bit 1 position. */ -#define ADC_PRESCALER2_bm (1<<2) /* Clock Prescaler Selection bit 2 mask. */ -#define ADC_PRESCALER2_bp 2 /* Clock Prescaler Selection bit 2 position. */ - - -/* ADC.CALCTRL bit masks and bit positions */ -#define ADC_CAL_bm 0x01 /* ADC Calibration Start bit mask. */ -#define ADC_CAL_bp 0 /* ADC Calibration Start bit position. */ - - -/* ADC.INTFLAGS bit masks and bit positions */ -#define ADC_CH3IF_bm 0x08 /* Channel 3 Interrupt Flag bit mask. */ -#define ADC_CH3IF_bp 3 /* Channel 3 Interrupt Flag bit position. */ - -#define ADC_CH2IF_bm 0x04 /* Channel 2 Interrupt Flag bit mask. */ -#define ADC_CH2IF_bp 2 /* Channel 2 Interrupt Flag bit position. */ - -#define ADC_CH1IF_bm 0x02 /* Channel 1 Interrupt Flag bit mask. */ -#define ADC_CH1IF_bp 1 /* Channel 1 Interrupt Flag bit position. */ - -#define ADC_CH0IF_bm 0x01 /* Channel 0 Interrupt Flag bit mask. */ -#define ADC_CH0IF_bp 0 /* Channel 0 Interrupt Flag bit position. */ - - -/* DAC - Digital/Analog Converter */ -/* DAC.CTRLA bit masks and bit positions */ -#define DAC_IDOEN_bm 0x10 /* Internal Output Enable bit mask. */ -#define DAC_IDOEN_bp 4 /* Internal Output Enable bit position. */ - -#define DAC_CH1EN_bm 0x08 /* Channel 1 Output Enable bit mask. */ -#define DAC_CH1EN_bp 3 /* Channel 1 Output Enable bit position. */ - -#define DAC_CH0EN_bm 0x04 /* Channel 0 Output Enable bit mask. */ -#define DAC_CH0EN_bp 2 /* Channel 0 Output Enable bit position. */ - -#define DAC_LPMODE_bm 0x02 /* Low Power Mode bit mask. */ -#define DAC_LPMODE_bp 1 /* Low Power Mode bit position. */ - -#define DAC_ENABLE_bm 0x01 /* Enable bit mask. */ -#define DAC_ENABLE_bp 0 /* Enable bit position. */ - - -/* DAC.CTRLB bit masks and bit positions */ -#define DAC_CHSEL_gm 0x60 /* Channel Select group mask. */ -#define DAC_CHSEL_gp 5 /* Channel Select group position. */ -#define DAC_CHSEL0_bm (1<<5) /* Channel Select bit 0 mask. */ -#define DAC_CHSEL0_bp 5 /* Channel Select bit 0 position. */ -#define DAC_CHSEL1_bm (1<<6) /* Channel Select bit 1 mask. */ -#define DAC_CHSEL1_bp 6 /* Channel Select bit 1 position. */ - -#define DAC_CH1TRIG_bm 0x02 /* Channel 1 Event Trig Enable bit mask. */ -#define DAC_CH1TRIG_bp 1 /* Channel 1 Event Trig Enable bit position. */ - -#define DAC_CH0TRIG_bm 0x01 /* Channel 0 Event Trig Enable bit mask. */ -#define DAC_CH0TRIG_bp 0 /* Channel 0 Event Trig Enable bit position. */ - - -/* DAC.CTRLC bit masks and bit positions */ -#define DAC_REFSEL_gm 0x18 /* Reference Select group mask. */ -#define DAC_REFSEL_gp 3 /* Reference Select group position. */ -#define DAC_REFSEL0_bm (1<<3) /* Reference Select bit 0 mask. */ -#define DAC_REFSEL0_bp 3 /* Reference Select bit 0 position. */ -#define DAC_REFSEL1_bm (1<<4) /* Reference Select bit 1 mask. */ -#define DAC_REFSEL1_bp 4 /* Reference Select bit 1 position. */ - -#define DAC_LEFTADJ_bm 0x01 /* Left-adjust Result bit mask. */ -#define DAC_LEFTADJ_bp 0 /* Left-adjust Result bit position. */ - - -/* DAC.EVCTRL bit masks and bit positions */ -#define DAC_EVSEL_gm 0x07 /* Event Input Selection group mask. */ -#define DAC_EVSEL_gp 0 /* Event Input Selection group position. */ -#define DAC_EVSEL0_bm (1<<0) /* Event Input Selection bit 0 mask. */ -#define DAC_EVSEL0_bp 0 /* Event Input Selection bit 0 position. */ -#define DAC_EVSEL1_bm (1<<1) /* Event Input Selection bit 1 mask. */ -#define DAC_EVSEL1_bp 1 /* Event Input Selection bit 1 position. */ -#define DAC_EVSEL2_bm (1<<2) /* Event Input Selection bit 2 mask. */ -#define DAC_EVSEL2_bp 2 /* Event Input Selection bit 2 position. */ - - -/* DAC.TIMCTRL bit masks and bit positions */ -#define DAC_CONINTVAL_gm 0x70 /* Conversion Intercal group mask. */ -#define DAC_CONINTVAL_gp 4 /* Conversion Intercal group position. */ -#define DAC_CONINTVAL0_bm (1<<4) /* Conversion Intercal bit 0 mask. */ -#define DAC_CONINTVAL0_bp 4 /* Conversion Intercal bit 0 position. */ -#define DAC_CONINTVAL1_bm (1<<5) /* Conversion Intercal bit 1 mask. */ -#define DAC_CONINTVAL1_bp 5 /* Conversion Intercal bit 1 position. */ -#define DAC_CONINTVAL2_bm (1<<6) /* Conversion Intercal bit 2 mask. */ -#define DAC_CONINTVAL2_bp 6 /* Conversion Intercal bit 2 position. */ - -#define DAC_REFRESH_gm 0x0F /* Refresh Timing Control group mask. */ -#define DAC_REFRESH_gp 0 /* Refresh Timing Control group position. */ -#define DAC_REFRESH0_bm (1<<0) /* Refresh Timing Control bit 0 mask. */ -#define DAC_REFRESH0_bp 0 /* Refresh Timing Control bit 0 position. */ -#define DAC_REFRESH1_bm (1<<1) /* Refresh Timing Control bit 1 mask. */ -#define DAC_REFRESH1_bp 1 /* Refresh Timing Control bit 1 position. */ -#define DAC_REFRESH2_bm (1<<2) /* Refresh Timing Control bit 2 mask. */ -#define DAC_REFRESH2_bp 2 /* Refresh Timing Control bit 2 position. */ -#define DAC_REFRESH3_bm (1<<3) /* Refresh Timing Control bit 3 mask. */ -#define DAC_REFRESH3_bp 3 /* Refresh Timing Control bit 3 position. */ - - -/* DAC.STATUS bit masks and bit positions */ -#define DAC_CH1DRE_bm 0x02 /* Channel 1 Data Register Empty bit mask. */ -#define DAC_CH1DRE_bp 1 /* Channel 1 Data Register Empty bit position. */ - -#define DAC_CH0DRE_bm 0x01 /* Channel 0 Data Register Empty bit mask. */ -#define DAC_CH0DRE_bp 0 /* Channel 0 Data Register Empty bit position. */ - - -/* RTC32 - 32-bit Real-Time Counter */ -/* RTC32.CTRL bit masks and bit positions */ -#define RTC32_ENABLE_bm 0x01 /* RTC enable bit mask. */ -#define RTC32_ENABLE_bp 0 /* RTC enable bit position. */ - - -/* RTC32.SYNCCTRL bit masks and bit positions */ -#define RTC32_SYNCCNT_bm 0x10 /* Synchronization Busy Flag bit mask. */ -#define RTC32_SYNCCNT_bp 4 /* Synchronization Busy Flag bit position. */ - -#define RTC32_SYNCBUSY_bm 0x01 /* Synchronization Busy Flag bit mask. */ -#define RTC32_SYNCBUSY_bp 0 /* Synchronization Busy Flag bit position. */ - - -/* RTC32.INTCTRL bit masks and bit positions */ -#define RTC32_COMPINTLVL_gm 0x0C /* Compare Match Interrupt Level group mask. */ -#define RTC32_COMPINTLVL_gp 2 /* Compare Match Interrupt Level group position. */ -#define RTC32_COMPINTLVL0_bm (1<<2) /* Compare Match Interrupt Level bit 0 mask. */ -#define RTC32_COMPINTLVL0_bp 2 /* Compare Match Interrupt Level bit 0 position. */ -#define RTC32_COMPINTLVL1_bm (1<<3) /* Compare Match Interrupt Level bit 1 mask. */ -#define RTC32_COMPINTLVL1_bp 3 /* Compare Match Interrupt Level bit 1 position. */ - -#define RTC32_OVFINTLVL_gm 0x03 /* Overflow Interrupt Level group mask. */ -#define RTC32_OVFINTLVL_gp 0 /* Overflow Interrupt Level group position. */ -#define RTC32_OVFINTLVL0_bm (1<<0) /* Overflow Interrupt Level bit 0 mask. */ -#define RTC32_OVFINTLVL0_bp 0 /* Overflow Interrupt Level bit 0 position. */ -#define RTC32_OVFINTLVL1_bm (1<<1) /* Overflow Interrupt Level bit 1 mask. */ -#define RTC32_OVFINTLVL1_bp 1 /* Overflow Interrupt Level bit 1 position. */ - - -/* RTC32.INTFLAGS bit masks and bit positions */ -#define RTC32_COMPIF_bm 0x02 /* Compare Match Interrupt Flag bit mask. */ -#define RTC32_COMPIF_bp 1 /* Compare Match Interrupt Flag bit position. */ - -#define RTC32_OVFIF_bm 0x01 /* Overflow Interrupt Flag bit mask. */ -#define RTC32_OVFIF_bp 0 /* Overflow Interrupt Flag bit position. */ - - -/* EBI - External Bus Interface */ -/* EBI_CS.CTRLA bit masks and bit positions */ -#define EBI_CS_ASPACE_gm 0x7C /* Address Space group mask. */ -#define EBI_CS_ASPACE_gp 2 /* Address Space group position. */ -#define EBI_CS_ASPACE0_bm (1<<2) /* Address Space bit 0 mask. */ -#define EBI_CS_ASPACE0_bp 2 /* Address Space bit 0 position. */ -#define EBI_CS_ASPACE1_bm (1<<3) /* Address Space bit 1 mask. */ -#define EBI_CS_ASPACE1_bp 3 /* Address Space bit 1 position. */ -#define EBI_CS_ASPACE2_bm (1<<4) /* Address Space bit 2 mask. */ -#define EBI_CS_ASPACE2_bp 4 /* Address Space bit 2 position. */ -#define EBI_CS_ASPACE3_bm (1<<5) /* Address Space bit 3 mask. */ -#define EBI_CS_ASPACE3_bp 5 /* Address Space bit 3 position. */ -#define EBI_CS_ASPACE4_bm (1<<6) /* Address Space bit 4 mask. */ -#define EBI_CS_ASPACE4_bp 6 /* Address Space bit 4 position. */ - -#define EBI_CS_MODE_gm 0x03 /* Memory Mode group mask. */ -#define EBI_CS_MODE_gp 0 /* Memory Mode group position. */ -#define EBI_CS_MODE0_bm (1<<0) /* Memory Mode bit 0 mask. */ -#define EBI_CS_MODE0_bp 0 /* Memory Mode bit 0 position. */ -#define EBI_CS_MODE1_bm (1<<1) /* Memory Mode bit 1 mask. */ -#define EBI_CS_MODE1_bp 1 /* Memory Mode bit 1 position. */ - - -/* EBI_CS.CTRLB bit masks and bit positions */ -#define EBI_CS_SRWS_gm 0x07 /* SRAM Wait State Cycles group mask. */ -#define EBI_CS_SRWS_gp 0 /* SRAM Wait State Cycles group position. */ -#define EBI_CS_SRWS0_bm (1<<0) /* SRAM Wait State Cycles bit 0 mask. */ -#define EBI_CS_SRWS0_bp 0 /* SRAM Wait State Cycles bit 0 position. */ -#define EBI_CS_SRWS1_bm (1<<1) /* SRAM Wait State Cycles bit 1 mask. */ -#define EBI_CS_SRWS1_bp 1 /* SRAM Wait State Cycles bit 1 position. */ -#define EBI_CS_SRWS2_bm (1<<2) /* SRAM Wait State Cycles bit 2 mask. */ -#define EBI_CS_SRWS2_bp 2 /* SRAM Wait State Cycles bit 2 position. */ - -#define EBI_CS_SDINITDONE_bm 0x80 /* SDRAM Initialization Done bit mask. */ -#define EBI_CS_SDINITDONE_bp 7 /* SDRAM Initialization Done bit position. */ - -#define EBI_CS_SDSREN_bm 0x04 /* SDRAM Self-refresh Enable bit mask. */ -#define EBI_CS_SDSREN_bp 2 /* SDRAM Self-refresh Enable bit position. */ - -#define EBI_CS_SDMODE_gm 0x03 /* SDRAM Mode group mask. */ -#define EBI_CS_SDMODE_gp 0 /* SDRAM Mode group position. */ -#define EBI_CS_SDMODE0_bm (1<<0) /* SDRAM Mode bit 0 mask. */ -#define EBI_CS_SDMODE0_bp 0 /* SDRAM Mode bit 0 position. */ -#define EBI_CS_SDMODE1_bm (1<<1) /* SDRAM Mode bit 1 mask. */ -#define EBI_CS_SDMODE1_bp 1 /* SDRAM Mode bit 1 position. */ - - -/* EBI.CTRL bit masks and bit positions */ -#define EBI_SDDATAW_gm 0xC0 /* SDRAM Data Width Setting group mask. */ -#define EBI_SDDATAW_gp 6 /* SDRAM Data Width Setting group position. */ -#define EBI_SDDATAW0_bm (1<<6) /* SDRAM Data Width Setting bit 0 mask. */ -#define EBI_SDDATAW0_bp 6 /* SDRAM Data Width Setting bit 0 position. */ -#define EBI_SDDATAW1_bm (1<<7) /* SDRAM Data Width Setting bit 1 mask. */ -#define EBI_SDDATAW1_bp 7 /* SDRAM Data Width Setting bit 1 position. */ - -#define EBI_LPCMODE_gm 0x30 /* SRAM LPC Mode group mask. */ -#define EBI_LPCMODE_gp 4 /* SRAM LPC Mode group position. */ -#define EBI_LPCMODE0_bm (1<<4) /* SRAM LPC Mode bit 0 mask. */ -#define EBI_LPCMODE0_bp 4 /* SRAM LPC Mode bit 0 position. */ -#define EBI_LPCMODE1_bm (1<<5) /* SRAM LPC Mode bit 1 mask. */ -#define EBI_LPCMODE1_bp 5 /* SRAM LPC Mode bit 1 position. */ - -#define EBI_SRMODE_gm 0x0C /* SRAM Mode group mask. */ -#define EBI_SRMODE_gp 2 /* SRAM Mode group position. */ -#define EBI_SRMODE0_bm (1<<2) /* SRAM Mode bit 0 mask. */ -#define EBI_SRMODE0_bp 2 /* SRAM Mode bit 0 position. */ -#define EBI_SRMODE1_bm (1<<3) /* SRAM Mode bit 1 mask. */ -#define EBI_SRMODE1_bp 3 /* SRAM Mode bit 1 position. */ - -#define EBI_IFMODE_gm 0x03 /* Interface Mode group mask. */ -#define EBI_IFMODE_gp 0 /* Interface Mode group position. */ -#define EBI_IFMODE0_bm (1<<0) /* Interface Mode bit 0 mask. */ -#define EBI_IFMODE0_bp 0 /* Interface Mode bit 0 position. */ -#define EBI_IFMODE1_bm (1<<1) /* Interface Mode bit 1 mask. */ -#define EBI_IFMODE1_bp 1 /* Interface Mode bit 1 position. */ - - -/* EBI.SDRAMCTRLA bit masks and bit positions */ -#define EBI_SDCAS_bm 0x08 /* SDRAM CAS Latency Setting bit mask. */ -#define EBI_SDCAS_bp 3 /* SDRAM CAS Latency Setting bit position. */ - -#define EBI_SDROW_bm 0x04 /* SDRAM ROW Bits Setting bit mask. */ -#define EBI_SDROW_bp 2 /* SDRAM ROW Bits Setting bit position. */ - -#define EBI_SDCOL_gm 0x03 /* SDRAM Column Bits Setting group mask. */ -#define EBI_SDCOL_gp 0 /* SDRAM Column Bits Setting group position. */ -#define EBI_SDCOL0_bm (1<<0) /* SDRAM Column Bits Setting bit 0 mask. */ -#define EBI_SDCOL0_bp 0 /* SDRAM Column Bits Setting bit 0 position. */ -#define EBI_SDCOL1_bm (1<<1) /* SDRAM Column Bits Setting bit 1 mask. */ -#define EBI_SDCOL1_bp 1 /* SDRAM Column Bits Setting bit 1 position. */ - - -/* EBI.SDRAMCTRLB bit masks and bit positions */ -#define EBI_MRDLY_gm 0xC0 /* SDRAM Mode Register Delay group mask. */ -#define EBI_MRDLY_gp 6 /* SDRAM Mode Register Delay group position. */ -#define EBI_MRDLY0_bm (1<<6) /* SDRAM Mode Register Delay bit 0 mask. */ -#define EBI_MRDLY0_bp 6 /* SDRAM Mode Register Delay bit 0 position. */ -#define EBI_MRDLY1_bm (1<<7) /* SDRAM Mode Register Delay bit 1 mask. */ -#define EBI_MRDLY1_bp 7 /* SDRAM Mode Register Delay bit 1 position. */ - -#define EBI_ROWCYCDLY_gm 0x38 /* SDRAM Row Cycle Delay group mask. */ -#define EBI_ROWCYCDLY_gp 3 /* SDRAM Row Cycle Delay group position. */ -#define EBI_ROWCYCDLY0_bm (1<<3) /* SDRAM Row Cycle Delay bit 0 mask. */ -#define EBI_ROWCYCDLY0_bp 3 /* SDRAM Row Cycle Delay bit 0 position. */ -#define EBI_ROWCYCDLY1_bm (1<<4) /* SDRAM Row Cycle Delay bit 1 mask. */ -#define EBI_ROWCYCDLY1_bp 4 /* SDRAM Row Cycle Delay bit 1 position. */ -#define EBI_ROWCYCDLY2_bm (1<<5) /* SDRAM Row Cycle Delay bit 2 mask. */ -#define EBI_ROWCYCDLY2_bp 5 /* SDRAM Row Cycle Delay bit 2 position. */ - -#define EBI_RPDLY_gm 0x07 /* SDRAM Row-to-Precharge Delay group mask. */ -#define EBI_RPDLY_gp 0 /* SDRAM Row-to-Precharge Delay group position. */ -#define EBI_RPDLY0_bm (1<<0) /* SDRAM Row-to-Precharge Delay bit 0 mask. */ -#define EBI_RPDLY0_bp 0 /* SDRAM Row-to-Precharge Delay bit 0 position. */ -#define EBI_RPDLY1_bm (1<<1) /* SDRAM Row-to-Precharge Delay bit 1 mask. */ -#define EBI_RPDLY1_bp 1 /* SDRAM Row-to-Precharge Delay bit 1 position. */ -#define EBI_RPDLY2_bm (1<<2) /* SDRAM Row-to-Precharge Delay bit 2 mask. */ -#define EBI_RPDLY2_bp 2 /* SDRAM Row-to-Precharge Delay bit 2 position. */ - - -/* EBI.SDRAMCTRLC bit masks and bit positions */ -#define EBI_WRDLY_gm 0xC0 /* SDRAM Write Recovery Delay group mask. */ -#define EBI_WRDLY_gp 6 /* SDRAM Write Recovery Delay group position. */ -#define EBI_WRDLY0_bm (1<<6) /* SDRAM Write Recovery Delay bit 0 mask. */ -#define EBI_WRDLY0_bp 6 /* SDRAM Write Recovery Delay bit 0 position. */ -#define EBI_WRDLY1_bm (1<<7) /* SDRAM Write Recovery Delay bit 1 mask. */ -#define EBI_WRDLY1_bp 7 /* SDRAM Write Recovery Delay bit 1 position. */ - -#define EBI_ESRDLY_gm 0x38 /* SDRAM Exit-Self-refresh-to-Active Delay group mask. */ -#define EBI_ESRDLY_gp 3 /* SDRAM Exit-Self-refresh-to-Active Delay group position. */ -#define EBI_ESRDLY0_bm (1<<3) /* SDRAM Exit-Self-refresh-to-Active Delay bit 0 mask. */ -#define EBI_ESRDLY0_bp 3 /* SDRAM Exit-Self-refresh-to-Active Delay bit 0 position. */ -#define EBI_ESRDLY1_bm (1<<4) /* SDRAM Exit-Self-refresh-to-Active Delay bit 1 mask. */ -#define EBI_ESRDLY1_bp 4 /* SDRAM Exit-Self-refresh-to-Active Delay bit 1 position. */ -#define EBI_ESRDLY2_bm (1<<5) /* SDRAM Exit-Self-refresh-to-Active Delay bit 2 mask. */ -#define EBI_ESRDLY2_bp 5 /* SDRAM Exit-Self-refresh-to-Active Delay bit 2 position. */ - -#define EBI_ROWCOLDLY_gm 0x07 /* SDRAM Row-to-Column Delay group mask. */ -#define EBI_ROWCOLDLY_gp 0 /* SDRAM Row-to-Column Delay group position. */ -#define EBI_ROWCOLDLY0_bm (1<<0) /* SDRAM Row-to-Column Delay bit 0 mask. */ -#define EBI_ROWCOLDLY0_bp 0 /* SDRAM Row-to-Column Delay bit 0 position. */ -#define EBI_ROWCOLDLY1_bm (1<<1) /* SDRAM Row-to-Column Delay bit 1 mask. */ -#define EBI_ROWCOLDLY1_bp 1 /* SDRAM Row-to-Column Delay bit 1 position. */ -#define EBI_ROWCOLDLY2_bm (1<<2) /* SDRAM Row-to-Column Delay bit 2 mask. */ -#define EBI_ROWCOLDLY2_bp 2 /* SDRAM Row-to-Column Delay bit 2 position. */ - - -/* TWI - Two-Wire Interface */ -/* TWI_MASTER.CTRLA bit masks and bit positions */ -#define TWI_MASTER_INTLVL_gm 0xC0 /* Interrupt Level group mask. */ -#define TWI_MASTER_INTLVL_gp 6 /* Interrupt Level group position. */ -#define TWI_MASTER_INTLVL0_bm (1<<6) /* Interrupt Level bit 0 mask. */ -#define TWI_MASTER_INTLVL0_bp 6 /* Interrupt Level bit 0 position. */ -#define TWI_MASTER_INTLVL1_bm (1<<7) /* Interrupt Level bit 1 mask. */ -#define TWI_MASTER_INTLVL1_bp 7 /* Interrupt Level bit 1 position. */ - -#define TWI_MASTER_RIEN_bm 0x20 /* Read Interrupt Enable bit mask. */ -#define TWI_MASTER_RIEN_bp 5 /* Read Interrupt Enable bit position. */ - -#define TWI_MASTER_WIEN_bm 0x10 /* Write Interrupt Enable bit mask. */ -#define TWI_MASTER_WIEN_bp 4 /* Write Interrupt Enable bit position. */ - -#define TWI_MASTER_ENABLE_bm 0x08 /* Enable TWI Master bit mask. */ -#define TWI_MASTER_ENABLE_bp 3 /* Enable TWI Master bit position. */ - - -/* TWI_MASTER.CTRLB bit masks and bit positions */ -#define TWI_MASTER_TIMEOUT_gm 0x0C /* Inactive Bus Timeout group mask. */ -#define TWI_MASTER_TIMEOUT_gp 2 /* Inactive Bus Timeout group position. */ -#define TWI_MASTER_TIMEOUT0_bm (1<<2) /* Inactive Bus Timeout bit 0 mask. */ -#define TWI_MASTER_TIMEOUT0_bp 2 /* Inactive Bus Timeout bit 0 position. */ -#define TWI_MASTER_TIMEOUT1_bm (1<<3) /* Inactive Bus Timeout bit 1 mask. */ -#define TWI_MASTER_TIMEOUT1_bp 3 /* Inactive Bus Timeout bit 1 position. */ - -#define TWI_MASTER_QCEN_bm 0x02 /* Quick Command Enable bit mask. */ -#define TWI_MASTER_QCEN_bp 1 /* Quick Command Enable bit position. */ - -#define TWI_MASTER_SMEN_bm 0x01 /* Smart Mode Enable bit mask. */ -#define TWI_MASTER_SMEN_bp 0 /* Smart Mode Enable bit position. */ - - -/* TWI_MASTER.CTRLC bit masks and bit positions */ -#define TWI_MASTER_ACKACT_bm 0x04 /* Acknowledge Action bit mask. */ -#define TWI_MASTER_ACKACT_bp 2 /* Acknowledge Action bit position. */ - -#define TWI_MASTER_CMD_gm 0x03 /* Command group mask. */ -#define TWI_MASTER_CMD_gp 0 /* Command group position. */ -#define TWI_MASTER_CMD0_bm (1<<0) /* Command bit 0 mask. */ -#define TWI_MASTER_CMD0_bp 0 /* Command bit 0 position. */ -#define TWI_MASTER_CMD1_bm (1<<1) /* Command bit 1 mask. */ -#define TWI_MASTER_CMD1_bp 1 /* Command bit 1 position. */ - - -/* TWI_MASTER.STATUS bit masks and bit positions */ -#define TWI_MASTER_RIF_bm 0x80 /* Read Interrupt Flag bit mask. */ -#define TWI_MASTER_RIF_bp 7 /* Read Interrupt Flag bit position. */ - -#define TWI_MASTER_WIF_bm 0x40 /* Write Interrupt Flag bit mask. */ -#define TWI_MASTER_WIF_bp 6 /* Write Interrupt Flag bit position. */ - -#define TWI_MASTER_CLKHOLD_bm 0x20 /* Clock Hold bit mask. */ -#define TWI_MASTER_CLKHOLD_bp 5 /* Clock Hold bit position. */ - -#define TWI_MASTER_RXACK_bm 0x10 /* Received Acknowledge bit mask. */ -#define TWI_MASTER_RXACK_bp 4 /* Received Acknowledge bit position. */ - -#define TWI_MASTER_ARBLOST_bm 0x08 /* Arbitration Lost bit mask. */ -#define TWI_MASTER_ARBLOST_bp 3 /* Arbitration Lost bit position. */ - -#define TWI_MASTER_BUSERR_bm 0x04 /* Bus Error bit mask. */ -#define TWI_MASTER_BUSERR_bp 2 /* Bus Error bit position. */ - -#define TWI_MASTER_BUSSTATE_gm 0x03 /* Bus State group mask. */ -#define TWI_MASTER_BUSSTATE_gp 0 /* Bus State group position. */ -#define TWI_MASTER_BUSSTATE0_bm (1<<0) /* Bus State bit 0 mask. */ -#define TWI_MASTER_BUSSTATE0_bp 0 /* Bus State bit 0 position. */ -#define TWI_MASTER_BUSSTATE1_bm (1<<1) /* Bus State bit 1 mask. */ -#define TWI_MASTER_BUSSTATE1_bp 1 /* Bus State bit 1 position. */ - - -/* TWI_SLAVE.CTRLA bit masks and bit positions */ -#define TWI_SLAVE_INTLVL_gm 0xC0 /* Interrupt Level group mask. */ -#define TWI_SLAVE_INTLVL_gp 6 /* Interrupt Level group position. */ -#define TWI_SLAVE_INTLVL0_bm (1<<6) /* Interrupt Level bit 0 mask. */ -#define TWI_SLAVE_INTLVL0_bp 6 /* Interrupt Level bit 0 position. */ -#define TWI_SLAVE_INTLVL1_bm (1<<7) /* Interrupt Level bit 1 mask. */ -#define TWI_SLAVE_INTLVL1_bp 7 /* Interrupt Level bit 1 position. */ - -#define TWI_SLAVE_DIEN_bm 0x20 /* Data Interrupt Enable bit mask. */ -#define TWI_SLAVE_DIEN_bp 5 /* Data Interrupt Enable bit position. */ - -#define TWI_SLAVE_APIEN_bm 0x10 /* Address/Stop Interrupt Enable bit mask. */ -#define TWI_SLAVE_APIEN_bp 4 /* Address/Stop Interrupt Enable bit position. */ - -#define TWI_SLAVE_ENABLE_bm 0x08 /* Enable TWI Slave bit mask. */ -#define TWI_SLAVE_ENABLE_bp 3 /* Enable TWI Slave bit position. */ - -#define TWI_SLAVE_PIEN_bm 0x04 /* Stop Interrupt Enable bit mask. */ -#define TWI_SLAVE_PIEN_bp 2 /* Stop Interrupt Enable bit position. */ - -#define TWI_SLAVE_PMEN_bm 0x02 /* Promiscuous Mode Enable bit mask. */ -#define TWI_SLAVE_PMEN_bp 1 /* Promiscuous Mode Enable bit position. */ - -#define TWI_SLAVE_SMEN_bm 0x01 /* Smart Mode Enable bit mask. */ -#define TWI_SLAVE_SMEN_bp 0 /* Smart Mode Enable bit position. */ - - -/* TWI_SLAVE.CTRLB bit masks and bit positions */ -#define TWI_SLAVE_ACKACT_bm 0x04 /* Acknowledge Action bit mask. */ -#define TWI_SLAVE_ACKACT_bp 2 /* Acknowledge Action bit position. */ - -#define TWI_SLAVE_CMD_gm 0x03 /* Command group mask. */ -#define TWI_SLAVE_CMD_gp 0 /* Command group position. */ -#define TWI_SLAVE_CMD0_bm (1<<0) /* Command bit 0 mask. */ -#define TWI_SLAVE_CMD0_bp 0 /* Command bit 0 position. */ -#define TWI_SLAVE_CMD1_bm (1<<1) /* Command bit 1 mask. */ -#define TWI_SLAVE_CMD1_bp 1 /* Command bit 1 position. */ - - -/* TWI_SLAVE.STATUS bit masks and bit positions */ -#define TWI_SLAVE_DIF_bm 0x80 /* Data Interrupt Flag bit mask. */ -#define TWI_SLAVE_DIF_bp 7 /* Data Interrupt Flag bit position. */ - -#define TWI_SLAVE_APIF_bm 0x40 /* Address/Stop Interrupt Flag bit mask. */ -#define TWI_SLAVE_APIF_bp 6 /* Address/Stop Interrupt Flag bit position. */ - -#define TWI_SLAVE_CLKHOLD_bm 0x20 /* Clock Hold bit mask. */ -#define TWI_SLAVE_CLKHOLD_bp 5 /* Clock Hold bit position. */ - -#define TWI_SLAVE_RXACK_bm 0x10 /* Received Acknowledge bit mask. */ -#define TWI_SLAVE_RXACK_bp 4 /* Received Acknowledge bit position. */ - -#define TWI_SLAVE_COLL_bm 0x08 /* Collision bit mask. */ -#define TWI_SLAVE_COLL_bp 3 /* Collision bit position. */ - -#define TWI_SLAVE_BUSERR_bm 0x04 /* Bus Error bit mask. */ -#define TWI_SLAVE_BUSERR_bp 2 /* Bus Error bit position. */ - -#define TWI_SLAVE_DIR_bm 0x02 /* Read/Write Direction bit mask. */ -#define TWI_SLAVE_DIR_bp 1 /* Read/Write Direction bit position. */ - -#define TWI_SLAVE_AP_bm 0x01 /* Slave Address or Stop bit mask. */ -#define TWI_SLAVE_AP_bp 0 /* Slave Address or Stop bit position. */ - - -/* TWI.CTRL bit masks and bit positions */ -#define TWI_SDAHOLD_bm 0x02 /* SDA Hold Time Enable bit mask. */ -#define TWI_SDAHOLD_bp 1 /* SDA Hold Time Enable bit position. */ - -#define TWI_EDIEN_bm 0x01 /* External Driver Interface Enable bit mask. */ -#define TWI_EDIEN_bp 0 /* External Driver Interface Enable bit position. */ - - -/* PORT - Port Configuration */ -/* PORTCFG.VPCTRLA bit masks and bit positions */ -#define PORTCFG_VP1MAP_gm 0xF0 /* Virtual Port 1 Mapping group mask. */ -#define PORTCFG_VP1MAP_gp 4 /* Virtual Port 1 Mapping group position. */ -#define PORTCFG_VP1MAP0_bm (1<<4) /* Virtual Port 1 Mapping bit 0 mask. */ -#define PORTCFG_VP1MAP0_bp 4 /* Virtual Port 1 Mapping bit 0 position. */ -#define PORTCFG_VP1MAP1_bm (1<<5) /* Virtual Port 1 Mapping bit 1 mask. */ -#define PORTCFG_VP1MAP1_bp 5 /* Virtual Port 1 Mapping bit 1 position. */ -#define PORTCFG_VP1MAP2_bm (1<<6) /* Virtual Port 1 Mapping bit 2 mask. */ -#define PORTCFG_VP1MAP2_bp 6 /* Virtual Port 1 Mapping bit 2 position. */ -#define PORTCFG_VP1MAP3_bm (1<<7) /* Virtual Port 1 Mapping bit 3 mask. */ -#define PORTCFG_VP1MAP3_bp 7 /* Virtual Port 1 Mapping bit 3 position. */ - -#define PORTCFG_VP0MAP_gm 0x0F /* Virtual Port 0 Mapping group mask. */ -#define PORTCFG_VP0MAP_gp 0 /* Virtual Port 0 Mapping group position. */ -#define PORTCFG_VP0MAP0_bm (1<<0) /* Virtual Port 0 Mapping bit 0 mask. */ -#define PORTCFG_VP0MAP0_bp 0 /* Virtual Port 0 Mapping bit 0 position. */ -#define PORTCFG_VP0MAP1_bm (1<<1) /* Virtual Port 0 Mapping bit 1 mask. */ -#define PORTCFG_VP0MAP1_bp 1 /* Virtual Port 0 Mapping bit 1 position. */ -#define PORTCFG_VP0MAP2_bm (1<<2) /* Virtual Port 0 Mapping bit 2 mask. */ -#define PORTCFG_VP0MAP2_bp 2 /* Virtual Port 0 Mapping bit 2 position. */ -#define PORTCFG_VP0MAP3_bm (1<<3) /* Virtual Port 0 Mapping bit 3 mask. */ -#define PORTCFG_VP0MAP3_bp 3 /* Virtual Port 0 Mapping bit 3 position. */ - - -/* PORTCFG.VPCTRLB bit masks and bit positions */ -#define PORTCFG_VP3MAP_gm 0xF0 /* Virtual Port 3 Mapping group mask. */ -#define PORTCFG_VP3MAP_gp 4 /* Virtual Port 3 Mapping group position. */ -#define PORTCFG_VP3MAP0_bm (1<<4) /* Virtual Port 3 Mapping bit 0 mask. */ -#define PORTCFG_VP3MAP0_bp 4 /* Virtual Port 3 Mapping bit 0 position. */ -#define PORTCFG_VP3MAP1_bm (1<<5) /* Virtual Port 3 Mapping bit 1 mask. */ -#define PORTCFG_VP3MAP1_bp 5 /* Virtual Port 3 Mapping bit 1 position. */ -#define PORTCFG_VP3MAP2_bm (1<<6) /* Virtual Port 3 Mapping bit 2 mask. */ -#define PORTCFG_VP3MAP2_bp 6 /* Virtual Port 3 Mapping bit 2 position. */ -#define PORTCFG_VP3MAP3_bm (1<<7) /* Virtual Port 3 Mapping bit 3 mask. */ -#define PORTCFG_VP3MAP3_bp 7 /* Virtual Port 3 Mapping bit 3 position. */ - -#define PORTCFG_VP2MAP_gm 0x0F /* Virtual Port 2 Mapping group mask. */ -#define PORTCFG_VP2MAP_gp 0 /* Virtual Port 2 Mapping group position. */ -#define PORTCFG_VP2MAP0_bm (1<<0) /* Virtual Port 2 Mapping bit 0 mask. */ -#define PORTCFG_VP2MAP0_bp 0 /* Virtual Port 2 Mapping bit 0 position. */ -#define PORTCFG_VP2MAP1_bm (1<<1) /* Virtual Port 2 Mapping bit 1 mask. */ -#define PORTCFG_VP2MAP1_bp 1 /* Virtual Port 2 Mapping bit 1 position. */ -#define PORTCFG_VP2MAP2_bm (1<<2) /* Virtual Port 2 Mapping bit 2 mask. */ -#define PORTCFG_VP2MAP2_bp 2 /* Virtual Port 2 Mapping bit 2 position. */ -#define PORTCFG_VP2MAP3_bm (1<<3) /* Virtual Port 2 Mapping bit 3 mask. */ -#define PORTCFG_VP2MAP3_bp 3 /* Virtual Port 2 Mapping bit 3 position. */ - - -/* PORTCFG.CLKEVOUT bit masks and bit positions */ -#define PORTCFG_CLKOUT_gm 0x03 /* Clock Output Port group mask. */ -#define PORTCFG_CLKOUT_gp 0 /* Clock Output Port group position. */ -#define PORTCFG_CLKOUT0_bm (1<<0) /* Clock Output Port bit 0 mask. */ -#define PORTCFG_CLKOUT0_bp 0 /* Clock Output Port bit 0 position. */ -#define PORTCFG_CLKOUT1_bm (1<<1) /* Clock Output Port bit 1 mask. */ -#define PORTCFG_CLKOUT1_bp 1 /* Clock Output Port bit 1 position. */ - -#define PORTCFG_EVOUT_gm 0x30 /* Event Output Port group mask. */ -#define PORTCFG_EVOUT_gp 4 /* Event Output Port group position. */ -#define PORTCFG_EVOUT0_bm (1<<4) /* Event Output Port bit 0 mask. */ -#define PORTCFG_EVOUT0_bp 4 /* Event Output Port bit 0 position. */ -#define PORTCFG_EVOUT1_bm (1<<5) /* Event Output Port bit 1 mask. */ -#define PORTCFG_EVOUT1_bp 5 /* Event Output Port bit 1 position. */ - - -/* VPORT.INTFLAGS bit masks and bit positions */ -#define VPORT_INT1IF_bm 0x02 /* Port Interrupt 1 Flag bit mask. */ -#define VPORT_INT1IF_bp 1 /* Port Interrupt 1 Flag bit position. */ - -#define VPORT_INT0IF_bm 0x01 /* Port Interrupt 0 Flag bit mask. */ -#define VPORT_INT0IF_bp 0 /* Port Interrupt 0 Flag bit position. */ - - -/* PORT.INTCTRL bit masks and bit positions */ -#define PORT_INT1LVL_gm 0x0C /* Port Interrupt 1 Level group mask. */ -#define PORT_INT1LVL_gp 2 /* Port Interrupt 1 Level group position. */ -#define PORT_INT1LVL0_bm (1<<2) /* Port Interrupt 1 Level bit 0 mask. */ -#define PORT_INT1LVL0_bp 2 /* Port Interrupt 1 Level bit 0 position. */ -#define PORT_INT1LVL1_bm (1<<3) /* Port Interrupt 1 Level bit 1 mask. */ -#define PORT_INT1LVL1_bp 3 /* Port Interrupt 1 Level bit 1 position. */ - -#define PORT_INT0LVL_gm 0x03 /* Port Interrupt 0 Level group mask. */ -#define PORT_INT0LVL_gp 0 /* Port Interrupt 0 Level group position. */ -#define PORT_INT0LVL0_bm (1<<0) /* Port Interrupt 0 Level bit 0 mask. */ -#define PORT_INT0LVL0_bp 0 /* Port Interrupt 0 Level bit 0 position. */ -#define PORT_INT0LVL1_bm (1<<1) /* Port Interrupt 0 Level bit 1 mask. */ -#define PORT_INT0LVL1_bp 1 /* Port Interrupt 0 Level bit 1 position. */ - - -/* PORT.INTFLAGS bit masks and bit positions */ -#define PORT_INT1IF_bm 0x02 /* Port Interrupt 1 Flag bit mask. */ -#define PORT_INT1IF_bp 1 /* Port Interrupt 1 Flag bit position. */ - -#define PORT_INT0IF_bm 0x01 /* Port Interrupt 0 Flag bit mask. */ -#define PORT_INT0IF_bp 0 /* Port Interrupt 0 Flag bit position. */ - - -/* PORT.PIN0CTRL bit masks and bit positions */ -#define PORT_SRLEN_bm 0x80 /* Slew Rate Enable bit mask. */ -#define PORT_SRLEN_bp 7 /* Slew Rate Enable bit position. */ - -#define PORT_INVEN_bm 0x40 /* Inverted I/O Enable bit mask. */ -#define PORT_INVEN_bp 6 /* Inverted I/O Enable bit position. */ - -#define PORT_OPC_gm 0x38 /* Output/Pull Configuration group mask. */ -#define PORT_OPC_gp 3 /* Output/Pull Configuration group position. */ -#define PORT_OPC0_bm (1<<3) /* Output/Pull Configuration bit 0 mask. */ -#define PORT_OPC0_bp 3 /* Output/Pull Configuration bit 0 position. */ -#define PORT_OPC1_bm (1<<4) /* Output/Pull Configuration bit 1 mask. */ -#define PORT_OPC1_bp 4 /* Output/Pull Configuration bit 1 position. */ -#define PORT_OPC2_bm (1<<5) /* Output/Pull Configuration bit 2 mask. */ -#define PORT_OPC2_bp 5 /* Output/Pull Configuration bit 2 position. */ - -#define PORT_ISC_gm 0x07 /* Input/Sense Configuration group mask. */ -#define PORT_ISC_gp 0 /* Input/Sense Configuration group position. */ -#define PORT_ISC0_bm (1<<0) /* Input/Sense Configuration bit 0 mask. */ -#define PORT_ISC0_bp 0 /* Input/Sense Configuration bit 0 position. */ -#define PORT_ISC1_bm (1<<1) /* Input/Sense Configuration bit 1 mask. */ -#define PORT_ISC1_bp 1 /* Input/Sense Configuration bit 1 position. */ -#define PORT_ISC2_bm (1<<2) /* Input/Sense Configuration bit 2 mask. */ -#define PORT_ISC2_bp 2 /* Input/Sense Configuration bit 2 position. */ - - -/* PORT.PIN1CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* PORT.PIN2CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* PORT.PIN3CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* PORT.PIN4CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* PORT.PIN5CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* PORT.PIN6CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* PORT.PIN7CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* TC - 16-bit Timer/Counter With PWM */ -/* TC0.CTRLA bit masks and bit positions */ -#define TC0_CLKSEL_gm 0x0F /* Clock Selection group mask. */ -#define TC0_CLKSEL_gp 0 /* Clock Selection group position. */ -#define TC0_CLKSEL0_bm (1<<0) /* Clock Selection bit 0 mask. */ -#define TC0_CLKSEL0_bp 0 /* Clock Selection bit 0 position. */ -#define TC0_CLKSEL1_bm (1<<1) /* Clock Selection bit 1 mask. */ -#define TC0_CLKSEL1_bp 1 /* Clock Selection bit 1 position. */ -#define TC0_CLKSEL2_bm (1<<2) /* Clock Selection bit 2 mask. */ -#define TC0_CLKSEL2_bp 2 /* Clock Selection bit 2 position. */ -#define TC0_CLKSEL3_bm (1<<3) /* Clock Selection bit 3 mask. */ -#define TC0_CLKSEL3_bp 3 /* Clock Selection bit 3 position. */ - - -/* TC0.CTRLB bit masks and bit positions */ -#define TC0_CCDEN_bm 0x80 /* Compare or Capture D Enable bit mask. */ -#define TC0_CCDEN_bp 7 /* Compare or Capture D Enable bit position. */ - -#define TC0_CCCEN_bm 0x40 /* Compare or Capture C Enable bit mask. */ -#define TC0_CCCEN_bp 6 /* Compare or Capture C Enable bit position. */ - -#define TC0_CCBEN_bm 0x20 /* Compare or Capture B Enable bit mask. */ -#define TC0_CCBEN_bp 5 /* Compare or Capture B Enable bit position. */ - -#define TC0_CCAEN_bm 0x10 /* Compare or Capture A Enable bit mask. */ -#define TC0_CCAEN_bp 4 /* Compare or Capture A Enable bit position. */ - -#define TC0_WGMODE_gm 0x07 /* Waveform generation mode group mask. */ -#define TC0_WGMODE_gp 0 /* Waveform generation mode group position. */ -#define TC0_WGMODE0_bm (1<<0) /* Waveform generation mode bit 0 mask. */ -#define TC0_WGMODE0_bp 0 /* Waveform generation mode bit 0 position. */ -#define TC0_WGMODE1_bm (1<<1) /* Waveform generation mode bit 1 mask. */ -#define TC0_WGMODE1_bp 1 /* Waveform generation mode bit 1 position. */ -#define TC0_WGMODE2_bm (1<<2) /* Waveform generation mode bit 2 mask. */ -#define TC0_WGMODE2_bp 2 /* Waveform generation mode bit 2 position. */ - - -/* TC0.CTRLC bit masks and bit positions */ -#define TC0_CMPD_bm 0x08 /* Compare D Output Value bit mask. */ -#define TC0_CMPD_bp 3 /* Compare D Output Value bit position. */ - -#define TC0_CMPC_bm 0x04 /* Compare C Output Value bit mask. */ -#define TC0_CMPC_bp 2 /* Compare C Output Value bit position. */ - -#define TC0_CMPB_bm 0x02 /* Compare B Output Value bit mask. */ -#define TC0_CMPB_bp 1 /* Compare B Output Value bit position. */ - -#define TC0_CMPA_bm 0x01 /* Compare A Output Value bit mask. */ -#define TC0_CMPA_bp 0 /* Compare A Output Value bit position. */ - - -/* TC0.CTRLD bit masks and bit positions */ -#define TC0_EVACT_gm 0xE0 /* Event Action group mask. */ -#define TC0_EVACT_gp 5 /* Event Action group position. */ -#define TC0_EVACT0_bm (1<<5) /* Event Action bit 0 mask. */ -#define TC0_EVACT0_bp 5 /* Event Action bit 0 position. */ -#define TC0_EVACT1_bm (1<<6) /* Event Action bit 1 mask. */ -#define TC0_EVACT1_bp 6 /* Event Action bit 1 position. */ -#define TC0_EVACT2_bm (1<<7) /* Event Action bit 2 mask. */ -#define TC0_EVACT2_bp 7 /* Event Action bit 2 position. */ - -#define TC0_EVDLY_bm 0x10 /* Event Delay bit mask. */ -#define TC0_EVDLY_bp 4 /* Event Delay bit position. */ - -#define TC0_EVSEL_gm 0x0F /* Event Source Select group mask. */ -#define TC0_EVSEL_gp 0 /* Event Source Select group position. */ -#define TC0_EVSEL0_bm (1<<0) /* Event Source Select bit 0 mask. */ -#define TC0_EVSEL0_bp 0 /* Event Source Select bit 0 position. */ -#define TC0_EVSEL1_bm (1<<1) /* Event Source Select bit 1 mask. */ -#define TC0_EVSEL1_bp 1 /* Event Source Select bit 1 position. */ -#define TC0_EVSEL2_bm (1<<2) /* Event Source Select bit 2 mask. */ -#define TC0_EVSEL2_bp 2 /* Event Source Select bit 2 position. */ -#define TC0_EVSEL3_bm (1<<3) /* Event Source Select bit 3 mask. */ -#define TC0_EVSEL3_bp 3 /* Event Source Select bit 3 position. */ - - -/* TC0.CTRLE bit masks and bit positions */ -#define TC0_DTHM_bm 0x02 /* Dead Time Hold Mode bit mask. */ -#define TC0_DTHM_bp 1 /* Dead Time Hold Mode bit position. */ - -#define TC0_BYTEM_bm 0x01 /* Byte Mode bit mask. */ -#define TC0_BYTEM_bp 0 /* Byte Mode bit position. */ - - -/* TC0.INTCTRLA bit masks and bit positions */ -#define TC0_ERRINTLVL_gm 0x0C /* Error Interrupt Level group mask. */ -#define TC0_ERRINTLVL_gp 2 /* Error Interrupt Level group position. */ -#define TC0_ERRINTLVL0_bm (1<<2) /* Error Interrupt Level bit 0 mask. */ -#define TC0_ERRINTLVL0_bp 2 /* Error Interrupt Level bit 0 position. */ -#define TC0_ERRINTLVL1_bm (1<<3) /* Error Interrupt Level bit 1 mask. */ -#define TC0_ERRINTLVL1_bp 3 /* Error Interrupt Level bit 1 position. */ - -#define TC0_OVFINTLVL_gm 0x03 /* Overflow interrupt level group mask. */ -#define TC0_OVFINTLVL_gp 0 /* Overflow interrupt level group position. */ -#define TC0_OVFINTLVL0_bm (1<<0) /* Overflow interrupt level bit 0 mask. */ -#define TC0_OVFINTLVL0_bp 0 /* Overflow interrupt level bit 0 position. */ -#define TC0_OVFINTLVL1_bm (1<<1) /* Overflow interrupt level bit 1 mask. */ -#define TC0_OVFINTLVL1_bp 1 /* Overflow interrupt level bit 1 position. */ - - -/* TC0.INTCTRLB bit masks and bit positions */ -#define TC0_CCDINTLVL_gm 0xC0 /* Compare or Capture D Interrupt Level group mask. */ -#define TC0_CCDINTLVL_gp 6 /* Compare or Capture D Interrupt Level group position. */ -#define TC0_CCDINTLVL0_bm (1<<6) /* Compare or Capture D Interrupt Level bit 0 mask. */ -#define TC0_CCDINTLVL0_bp 6 /* Compare or Capture D Interrupt Level bit 0 position. */ -#define TC0_CCDINTLVL1_bm (1<<7) /* Compare or Capture D Interrupt Level bit 1 mask. */ -#define TC0_CCDINTLVL1_bp 7 /* Compare or Capture D Interrupt Level bit 1 position. */ - -#define TC0_CCCINTLVL_gm 0x30 /* Compare or Capture C Interrupt Level group mask. */ -#define TC0_CCCINTLVL_gp 4 /* Compare or Capture C Interrupt Level group position. */ -#define TC0_CCCINTLVL0_bm (1<<4) /* Compare or Capture C Interrupt Level bit 0 mask. */ -#define TC0_CCCINTLVL0_bp 4 /* Compare or Capture C Interrupt Level bit 0 position. */ -#define TC0_CCCINTLVL1_bm (1<<5) /* Compare or Capture C Interrupt Level bit 1 mask. */ -#define TC0_CCCINTLVL1_bp 5 /* Compare or Capture C Interrupt Level bit 1 position. */ - -#define TC0_CCBINTLVL_gm 0x0C /* Compare or Capture B Interrupt Level group mask. */ -#define TC0_CCBINTLVL_gp 2 /* Compare or Capture B Interrupt Level group position. */ -#define TC0_CCBINTLVL0_bm (1<<2) /* Compare or Capture B Interrupt Level bit 0 mask. */ -#define TC0_CCBINTLVL0_bp 2 /* Compare or Capture B Interrupt Level bit 0 position. */ -#define TC0_CCBINTLVL1_bm (1<<3) /* Compare or Capture B Interrupt Level bit 1 mask. */ -#define TC0_CCBINTLVL1_bp 3 /* Compare or Capture B Interrupt Level bit 1 position. */ - -#define TC0_CCAINTLVL_gm 0x03 /* Compare or Capture A Interrupt Level group mask. */ -#define TC0_CCAINTLVL_gp 0 /* Compare or Capture A Interrupt Level group position. */ -#define TC0_CCAINTLVL0_bm (1<<0) /* Compare or Capture A Interrupt Level bit 0 mask. */ -#define TC0_CCAINTLVL0_bp 0 /* Compare or Capture A Interrupt Level bit 0 position. */ -#define TC0_CCAINTLVL1_bm (1<<1) /* Compare or Capture A Interrupt Level bit 1 mask. */ -#define TC0_CCAINTLVL1_bp 1 /* Compare or Capture A Interrupt Level bit 1 position. */ - - -/* TC0.CTRLFCLR bit masks and bit positions */ -#define TC0_CMD_gm 0x0C /* Command group mask. */ -#define TC0_CMD_gp 2 /* Command group position. */ -#define TC0_CMD0_bm (1<<2) /* Command bit 0 mask. */ -#define TC0_CMD0_bp 2 /* Command bit 0 position. */ -#define TC0_CMD1_bm (1<<3) /* Command bit 1 mask. */ -#define TC0_CMD1_bp 3 /* Command bit 1 position. */ - -#define TC0_LUPD_bm 0x02 /* Lock Update bit mask. */ -#define TC0_LUPD_bp 1 /* Lock Update bit position. */ - -#define TC0_DIR_bm 0x01 /* Direction bit mask. */ -#define TC0_DIR_bp 0 /* Direction bit position. */ - - -/* TC0.CTRLFSET bit masks and bit positions */ -/* TC0_CMD_gm Predefined. */ -/* TC0_CMD_gp Predefined. */ -/* TC0_CMD0_bm Predefined. */ -/* TC0_CMD0_bp Predefined. */ -/* TC0_CMD1_bm Predefined. */ -/* TC0_CMD1_bp Predefined. */ - -/* TC0_LUPD_bm Predefined. */ -/* TC0_LUPD_bp Predefined. */ - -/* TC0_DIR_bm Predefined. */ -/* TC0_DIR_bp Predefined. */ - - -/* TC0.CTRLGCLR bit masks and bit positions */ -#define TC0_CCDBV_bm 0x10 /* Compare or Capture D Buffer Valid bit mask. */ -#define TC0_CCDBV_bp 4 /* Compare or Capture D Buffer Valid bit position. */ - -#define TC0_CCCBV_bm 0x08 /* Compare or Capture C Buffer Valid bit mask. */ -#define TC0_CCCBV_bp 3 /* Compare or Capture C Buffer Valid bit position. */ - -#define TC0_CCBBV_bm 0x04 /* Compare or Capture B Buffer Valid bit mask. */ -#define TC0_CCBBV_bp 2 /* Compare or Capture B Buffer Valid bit position. */ - -#define TC0_CCABV_bm 0x02 /* Compare or Capture A Buffer Valid bit mask. */ -#define TC0_CCABV_bp 1 /* Compare or Capture A Buffer Valid bit position. */ - -#define TC0_PERBV_bm 0x01 /* Period Buffer Valid bit mask. */ -#define TC0_PERBV_bp 0 /* Period Buffer Valid bit position. */ - - -/* TC0.CTRLGSET bit masks and bit positions */ -/* TC0_CCDBV_bm Predefined. */ -/* TC0_CCDBV_bp Predefined. */ - -/* TC0_CCCBV_bm Predefined. */ -/* TC0_CCCBV_bp Predefined. */ - -/* TC0_CCBBV_bm Predefined. */ -/* TC0_CCBBV_bp Predefined. */ - -/* TC0_CCABV_bm Predefined. */ -/* TC0_CCABV_bp Predefined. */ - -/* TC0_PERBV_bm Predefined. */ -/* TC0_PERBV_bp Predefined. */ - - -/* TC0.INTFLAGS bit masks and bit positions */ -#define TC0_CCDIF_bm 0x80 /* Compare or Capture D Interrupt Flag bit mask. */ -#define TC0_CCDIF_bp 7 /* Compare or Capture D Interrupt Flag bit position. */ - -#define TC0_CCCIF_bm 0x40 /* Compare or Capture C Interrupt Flag bit mask. */ -#define TC0_CCCIF_bp 6 /* Compare or Capture C Interrupt Flag bit position. */ - -#define TC0_CCBIF_bm 0x20 /* Compare or Capture B Interrupt Flag bit mask. */ -#define TC0_CCBIF_bp 5 /* Compare or Capture B Interrupt Flag bit position. */ - -#define TC0_CCAIF_bm 0x10 /* Compare or Capture A Interrupt Flag bit mask. */ -#define TC0_CCAIF_bp 4 /* Compare or Capture A Interrupt Flag bit position. */ - -#define TC0_ERRIF_bm 0x02 /* Error Interrupt Flag bit mask. */ -#define TC0_ERRIF_bp 1 /* Error Interrupt Flag bit position. */ - -#define TC0_OVFIF_bm 0x01 /* Overflow Interrupt Flag bit mask. */ -#define TC0_OVFIF_bp 0 /* Overflow Interrupt Flag bit position. */ - - -/* TC1.CTRLA bit masks and bit positions */ -#define TC1_CLKSEL_gm 0x0F /* Clock Selection group mask. */ -#define TC1_CLKSEL_gp 0 /* Clock Selection group position. */ -#define TC1_CLKSEL0_bm (1<<0) /* Clock Selection bit 0 mask. */ -#define TC1_CLKSEL0_bp 0 /* Clock Selection bit 0 position. */ -#define TC1_CLKSEL1_bm (1<<1) /* Clock Selection bit 1 mask. */ -#define TC1_CLKSEL1_bp 1 /* Clock Selection bit 1 position. */ -#define TC1_CLKSEL2_bm (1<<2) /* Clock Selection bit 2 mask. */ -#define TC1_CLKSEL2_bp 2 /* Clock Selection bit 2 position. */ -#define TC1_CLKSEL3_bm (1<<3) /* Clock Selection bit 3 mask. */ -#define TC1_CLKSEL3_bp 3 /* Clock Selection bit 3 position. */ - - -/* TC1.CTRLB bit masks and bit positions */ -#define TC1_CCBEN_bm 0x20 /* Compare or Capture B Enable bit mask. */ -#define TC1_CCBEN_bp 5 /* Compare or Capture B Enable bit position. */ - -#define TC1_CCAEN_bm 0x10 /* Compare or Capture A Enable bit mask. */ -#define TC1_CCAEN_bp 4 /* Compare or Capture A Enable bit position. */ - -#define TC1_WGMODE_gm 0x07 /* Waveform generation mode group mask. */ -#define TC1_WGMODE_gp 0 /* Waveform generation mode group position. */ -#define TC1_WGMODE0_bm (1<<0) /* Waveform generation mode bit 0 mask. */ -#define TC1_WGMODE0_bp 0 /* Waveform generation mode bit 0 position. */ -#define TC1_WGMODE1_bm (1<<1) /* Waveform generation mode bit 1 mask. */ -#define TC1_WGMODE1_bp 1 /* Waveform generation mode bit 1 position. */ -#define TC1_WGMODE2_bm (1<<2) /* Waveform generation mode bit 2 mask. */ -#define TC1_WGMODE2_bp 2 /* Waveform generation mode bit 2 position. */ - - -/* TC1.CTRLC bit masks and bit positions */ -#define TC1_CMPB_bm 0x02 /* Compare B Output Value bit mask. */ -#define TC1_CMPB_bp 1 /* Compare B Output Value bit position. */ - -#define TC1_CMPA_bm 0x01 /* Compare A Output Value bit mask. */ -#define TC1_CMPA_bp 0 /* Compare A Output Value bit position. */ - - -/* TC1.CTRLD bit masks and bit positions */ -#define TC1_EVACT_gm 0xE0 /* Event Action group mask. */ -#define TC1_EVACT_gp 5 /* Event Action group position. */ -#define TC1_EVACT0_bm (1<<5) /* Event Action bit 0 mask. */ -#define TC1_EVACT0_bp 5 /* Event Action bit 0 position. */ -#define TC1_EVACT1_bm (1<<6) /* Event Action bit 1 mask. */ -#define TC1_EVACT1_bp 6 /* Event Action bit 1 position. */ -#define TC1_EVACT2_bm (1<<7) /* Event Action bit 2 mask. */ -#define TC1_EVACT2_bp 7 /* Event Action bit 2 position. */ - -#define TC1_EVDLY_bm 0x10 /* Event Delay bit mask. */ -#define TC1_EVDLY_bp 4 /* Event Delay bit position. */ - -#define TC1_EVSEL_gm 0x0F /* Event Source Select group mask. */ -#define TC1_EVSEL_gp 0 /* Event Source Select group position. */ -#define TC1_EVSEL0_bm (1<<0) /* Event Source Select bit 0 mask. */ -#define TC1_EVSEL0_bp 0 /* Event Source Select bit 0 position. */ -#define TC1_EVSEL1_bm (1<<1) /* Event Source Select bit 1 mask. */ -#define TC1_EVSEL1_bp 1 /* Event Source Select bit 1 position. */ -#define TC1_EVSEL2_bm (1<<2) /* Event Source Select bit 2 mask. */ -#define TC1_EVSEL2_bp 2 /* Event Source Select bit 2 position. */ -#define TC1_EVSEL3_bm (1<<3) /* Event Source Select bit 3 mask. */ -#define TC1_EVSEL3_bp 3 /* Event Source Select bit 3 position. */ - - -/* TC1.CTRLE bit masks and bit positions */ -#define TC1_DTHM_bm 0x02 /* Dead Time Hold Mode bit mask. */ -#define TC1_DTHM_bp 1 /* Dead Time Hold Mode bit position. */ - -#define TC1_BYTEM_bm 0x01 /* Byte Mode bit mask. */ -#define TC1_BYTEM_bp 0 /* Byte Mode bit position. */ - - -/* TC1.INTCTRLA bit masks and bit positions */ -#define TC1_ERRINTLVL_gm 0x0C /* Error Interrupt Level group mask. */ -#define TC1_ERRINTLVL_gp 2 /* Error Interrupt Level group position. */ -#define TC1_ERRINTLVL0_bm (1<<2) /* Error Interrupt Level bit 0 mask. */ -#define TC1_ERRINTLVL0_bp 2 /* Error Interrupt Level bit 0 position. */ -#define TC1_ERRINTLVL1_bm (1<<3) /* Error Interrupt Level bit 1 mask. */ -#define TC1_ERRINTLVL1_bp 3 /* Error Interrupt Level bit 1 position. */ - -#define TC1_OVFINTLVL_gm 0x03 /* Overflow interrupt level group mask. */ -#define TC1_OVFINTLVL_gp 0 /* Overflow interrupt level group position. */ -#define TC1_OVFINTLVL0_bm (1<<0) /* Overflow interrupt level bit 0 mask. */ -#define TC1_OVFINTLVL0_bp 0 /* Overflow interrupt level bit 0 position. */ -#define TC1_OVFINTLVL1_bm (1<<1) /* Overflow interrupt level bit 1 mask. */ -#define TC1_OVFINTLVL1_bp 1 /* Overflow interrupt level bit 1 position. */ - - -/* TC1.INTCTRLB bit masks and bit positions */ -#define TC1_CCBINTLVL_gm 0x0C /* Compare or Capture B Interrupt Level group mask. */ -#define TC1_CCBINTLVL_gp 2 /* Compare or Capture B Interrupt Level group position. */ -#define TC1_CCBINTLVL0_bm (1<<2) /* Compare or Capture B Interrupt Level bit 0 mask. */ -#define TC1_CCBINTLVL0_bp 2 /* Compare or Capture B Interrupt Level bit 0 position. */ -#define TC1_CCBINTLVL1_bm (1<<3) /* Compare or Capture B Interrupt Level bit 1 mask. */ -#define TC1_CCBINTLVL1_bp 3 /* Compare or Capture B Interrupt Level bit 1 position. */ - -#define TC1_CCAINTLVL_gm 0x03 /* Compare or Capture A Interrupt Level group mask. */ -#define TC1_CCAINTLVL_gp 0 /* Compare or Capture A Interrupt Level group position. */ -#define TC1_CCAINTLVL0_bm (1<<0) /* Compare or Capture A Interrupt Level bit 0 mask. */ -#define TC1_CCAINTLVL0_bp 0 /* Compare or Capture A Interrupt Level bit 0 position. */ -#define TC1_CCAINTLVL1_bm (1<<1) /* Compare or Capture A Interrupt Level bit 1 mask. */ -#define TC1_CCAINTLVL1_bp 1 /* Compare or Capture A Interrupt Level bit 1 position. */ - - -/* TC1.CTRLFCLR bit masks and bit positions */ -#define TC1_CMD_gm 0x0C /* Command group mask. */ -#define TC1_CMD_gp 2 /* Command group position. */ -#define TC1_CMD0_bm (1<<2) /* Command bit 0 mask. */ -#define TC1_CMD0_bp 2 /* Command bit 0 position. */ -#define TC1_CMD1_bm (1<<3) /* Command bit 1 mask. */ -#define TC1_CMD1_bp 3 /* Command bit 1 position. */ - -#define TC1_LUPD_bm 0x02 /* Lock Update bit mask. */ -#define TC1_LUPD_bp 1 /* Lock Update bit position. */ - -#define TC1_DIR_bm 0x01 /* Direction bit mask. */ -#define TC1_DIR_bp 0 /* Direction bit position. */ - - -/* TC1.CTRLFSET bit masks and bit positions */ -/* TC1_CMD_gm Predefined. */ -/* TC1_CMD_gp Predefined. */ -/* TC1_CMD0_bm Predefined. */ -/* TC1_CMD0_bp Predefined. */ -/* TC1_CMD1_bm Predefined. */ -/* TC1_CMD1_bp Predefined. */ - -/* TC1_LUPD_bm Predefined. */ -/* TC1_LUPD_bp Predefined. */ - -/* TC1_DIR_bm Predefined. */ -/* TC1_DIR_bp Predefined. */ - - -/* TC1.CTRLGCLR bit masks and bit positions */ -#define TC1_CCBBV_bm 0x04 /* Compare or Capture B Buffer Valid bit mask. */ -#define TC1_CCBBV_bp 2 /* Compare or Capture B Buffer Valid bit position. */ - -#define TC1_CCABV_bm 0x02 /* Compare or Capture A Buffer Valid bit mask. */ -#define TC1_CCABV_bp 1 /* Compare or Capture A Buffer Valid bit position. */ - -#define TC1_PERBV_bm 0x01 /* Period Buffer Valid bit mask. */ -#define TC1_PERBV_bp 0 /* Period Buffer Valid bit position. */ - - -/* TC1.CTRLGSET bit masks and bit positions */ -/* TC1_CCBBV_bm Predefined. */ -/* TC1_CCBBV_bp Predefined. */ - -/* TC1_CCABV_bm Predefined. */ -/* TC1_CCABV_bp Predefined. */ - -/* TC1_PERBV_bm Predefined. */ -/* TC1_PERBV_bp Predefined. */ - - -/* TC1.INTFLAGS bit masks and bit positions */ -#define TC1_CCBIF_bm 0x20 /* Compare or Capture B Interrupt Flag bit mask. */ -#define TC1_CCBIF_bp 5 /* Compare or Capture B Interrupt Flag bit position. */ - -#define TC1_CCAIF_bm 0x10 /* Compare or Capture A Interrupt Flag bit mask. */ -#define TC1_CCAIF_bp 4 /* Compare or Capture A Interrupt Flag bit position. */ - -#define TC1_ERRIF_bm 0x02 /* Error Interrupt Flag bit mask. */ -#define TC1_ERRIF_bp 1 /* Error Interrupt Flag bit position. */ - -#define TC1_OVFIF_bm 0x01 /* Overflow Interrupt Flag bit mask. */ -#define TC1_OVFIF_bp 0 /* Overflow Interrupt Flag bit position. */ - - -/* AWEX.CTRL bit masks and bit positions */ -#define AWEX_PGM_bm 0x20 /* Pattern Generation Mode bit mask. */ -#define AWEX_PGM_bp 5 /* Pattern Generation Mode bit position. */ - -#define AWEX_CWCM_bm 0x10 /* Common Waveform Channel Mode bit mask. */ -#define AWEX_CWCM_bp 4 /* Common Waveform Channel Mode bit position. */ - -#define AWEX_DTICCDEN_bm 0x08 /* Dead Time Insertion Compare Channel D Enable bit mask. */ -#define AWEX_DTICCDEN_bp 3 /* Dead Time Insertion Compare Channel D Enable bit position. */ - -#define AWEX_DTICCCEN_bm 0x04 /* Dead Time Insertion Compare Channel C Enable bit mask. */ -#define AWEX_DTICCCEN_bp 2 /* Dead Time Insertion Compare Channel C Enable bit position. */ - -#define AWEX_DTICCBEN_bm 0x02 /* Dead Time Insertion Compare Channel B Enable bit mask. */ -#define AWEX_DTICCBEN_bp 1 /* Dead Time Insertion Compare Channel B Enable bit position. */ - -#define AWEX_DTICCAEN_bm 0x01 /* Dead Time Insertion Compare Channel A Enable bit mask. */ -#define AWEX_DTICCAEN_bp 0 /* Dead Time Insertion Compare Channel A Enable bit position. */ - - -/* AWEX.FDCTRL bit masks and bit positions */ -#define AWEX_FDDBD_bm 0x10 /* Fault Detect on Disable Break Disable bit mask. */ -#define AWEX_FDDBD_bp 4 /* Fault Detect on Disable Break Disable bit position. */ - -#define AWEX_FDMODE_bm 0x04 /* Fault Detect Mode bit mask. */ -#define AWEX_FDMODE_bp 2 /* Fault Detect Mode bit position. */ - -#define AWEX_FDACT_gm 0x03 /* Fault Detect Action group mask. */ -#define AWEX_FDACT_gp 0 /* Fault Detect Action group position. */ -#define AWEX_FDACT0_bm (1<<0) /* Fault Detect Action bit 0 mask. */ -#define AWEX_FDACT0_bp 0 /* Fault Detect Action bit 0 position. */ -#define AWEX_FDACT1_bm (1<<1) /* Fault Detect Action bit 1 mask. */ -#define AWEX_FDACT1_bp 1 /* Fault Detect Action bit 1 position. */ - - -/* AWEX.STATUS bit masks and bit positions */ -#define AWEX_FDF_bm 0x04 /* Fault Detect Flag bit mask. */ -#define AWEX_FDF_bp 2 /* Fault Detect Flag bit position. */ - -#define AWEX_DTHSBUFV_bm 0x02 /* Dead Time High Side Buffer Valid bit mask. */ -#define AWEX_DTHSBUFV_bp 1 /* Dead Time High Side Buffer Valid bit position. */ - -#define AWEX_DTLSBUFV_bm 0x01 /* Dead Time Low Side Buffer Valid bit mask. */ -#define AWEX_DTLSBUFV_bp 0 /* Dead Time Low Side Buffer Valid bit position. */ - - -/* HIRES.CTRL bit masks and bit positions */ -#define HIRES_HREN_gm 0x03 /* High Resolution Enable group mask. */ -#define HIRES_HREN_gp 0 /* High Resolution Enable group position. */ -#define HIRES_HREN0_bm (1<<0) /* High Resolution Enable bit 0 mask. */ -#define HIRES_HREN0_bp 0 /* High Resolution Enable bit 0 position. */ -#define HIRES_HREN1_bm (1<<1) /* High Resolution Enable bit 1 mask. */ -#define HIRES_HREN1_bp 1 /* High Resolution Enable bit 1 position. */ - - -/* USART - Universal Asynchronous Receiver-Transmitter */ -/* USART.STATUS bit masks and bit positions */ -#define USART_RXCIF_bm 0x80 /* Receive Interrupt Flag bit mask. */ -#define USART_RXCIF_bp 7 /* Receive Interrupt Flag bit position. */ - -#define USART_TXCIF_bm 0x40 /* Transmit Interrupt Flag bit mask. */ -#define USART_TXCIF_bp 6 /* Transmit Interrupt Flag bit position. */ - -#define USART_DREIF_bm 0x20 /* Data Register Empty Flag bit mask. */ -#define USART_DREIF_bp 5 /* Data Register Empty Flag bit position. */ - -#define USART_FERR_bm 0x10 /* Frame Error bit mask. */ -#define USART_FERR_bp 4 /* Frame Error bit position. */ - -#define USART_BUFOVF_bm 0x08 /* Buffer Overflow bit mask. */ -#define USART_BUFOVF_bp 3 /* Buffer Overflow bit position. */ - -#define USART_PERR_bm 0x04 /* Parity Error bit mask. */ -#define USART_PERR_bp 2 /* Parity Error bit position. */ - -#define USART_RXB8_bm 0x01 /* Receive Bit 8 bit mask. */ -#define USART_RXB8_bp 0 /* Receive Bit 8 bit position. */ - - -/* USART.CTRLA bit masks and bit positions */ -#define USART_RXCINTLVL_gm 0x30 /* Receive Interrupt Level group mask. */ -#define USART_RXCINTLVL_gp 4 /* Receive Interrupt Level group position. */ -#define USART_RXCINTLVL0_bm (1<<4) /* Receive Interrupt Level bit 0 mask. */ -#define USART_RXCINTLVL0_bp 4 /* Receive Interrupt Level bit 0 position. */ -#define USART_RXCINTLVL1_bm (1<<5) /* Receive Interrupt Level bit 1 mask. */ -#define USART_RXCINTLVL1_bp 5 /* Receive Interrupt Level bit 1 position. */ - -#define USART_TXCINTLVL_gm 0x0C /* Transmit Interrupt Level group mask. */ -#define USART_TXCINTLVL_gp 2 /* Transmit Interrupt Level group position. */ -#define USART_TXCINTLVL0_bm (1<<2) /* Transmit Interrupt Level bit 0 mask. */ -#define USART_TXCINTLVL0_bp 2 /* Transmit Interrupt Level bit 0 position. */ -#define USART_TXCINTLVL1_bm (1<<3) /* Transmit Interrupt Level bit 1 mask. */ -#define USART_TXCINTLVL1_bp 3 /* Transmit Interrupt Level bit 1 position. */ - -#define USART_DREINTLVL_gm 0x03 /* Data Register Empty Interrupt Level group mask. */ -#define USART_DREINTLVL_gp 0 /* Data Register Empty Interrupt Level group position. */ -#define USART_DREINTLVL0_bm (1<<0) /* Data Register Empty Interrupt Level bit 0 mask. */ -#define USART_DREINTLVL0_bp 0 /* Data Register Empty Interrupt Level bit 0 position. */ -#define USART_DREINTLVL1_bm (1<<1) /* Data Register Empty Interrupt Level bit 1 mask. */ -#define USART_DREINTLVL1_bp 1 /* Data Register Empty Interrupt Level bit 1 position. */ - - -/* USART.CTRLB bit masks and bit positions */ -#define USART_RXEN_bm 0x10 /* Receiver Enable bit mask. */ -#define USART_RXEN_bp 4 /* Receiver Enable bit position. */ - -#define USART_TXEN_bm 0x08 /* Transmitter Enable bit mask. */ -#define USART_TXEN_bp 3 /* Transmitter Enable bit position. */ - -#define USART_CLK2X_bm 0x04 /* Double transmission speed bit mask. */ -#define USART_CLK2X_bp 2 /* Double transmission speed bit position. */ - -#define USART_MPCM_bm 0x02 /* Multi-processor Communication Mode bit mask. */ -#define USART_MPCM_bp 1 /* Multi-processor Communication Mode bit position. */ - -#define USART_TXB8_bm 0x01 /* Transmit bit 8 bit mask. */ -#define USART_TXB8_bp 0 /* Transmit bit 8 bit position. */ - - -/* USART.CTRLC bit masks and bit positions */ -#define USART_CMODE_gm 0xC0 /* Communication Mode group mask. */ -#define USART_CMODE_gp 6 /* Communication Mode group position. */ -#define USART_CMODE0_bm (1<<6) /* Communication Mode bit 0 mask. */ -#define USART_CMODE0_bp 6 /* Communication Mode bit 0 position. */ -#define USART_CMODE1_bm (1<<7) /* Communication Mode bit 1 mask. */ -#define USART_CMODE1_bp 7 /* Communication Mode bit 1 position. */ - -#define USART_PMODE_gm 0x30 /* Parity Mode group mask. */ -#define USART_PMODE_gp 4 /* Parity Mode group position. */ -#define USART_PMODE0_bm (1<<4) /* Parity Mode bit 0 mask. */ -#define USART_PMODE0_bp 4 /* Parity Mode bit 0 position. */ -#define USART_PMODE1_bm (1<<5) /* Parity Mode bit 1 mask. */ -#define USART_PMODE1_bp 5 /* Parity Mode bit 1 position. */ - -#define USART_SBMODE_bm 0x08 /* Stop Bit Mode bit mask. */ -#define USART_SBMODE_bp 3 /* Stop Bit Mode bit position. */ - -#define USART_CHSIZE_gm 0x07 /* Character Size group mask. */ -#define USART_CHSIZE_gp 0 /* Character Size group position. */ -#define USART_CHSIZE0_bm (1<<0) /* Character Size bit 0 mask. */ -#define USART_CHSIZE0_bp 0 /* Character Size bit 0 position. */ -#define USART_CHSIZE1_bm (1<<1) /* Character Size bit 1 mask. */ -#define USART_CHSIZE1_bp 1 /* Character Size bit 1 position. */ -#define USART_CHSIZE2_bm (1<<2) /* Character Size bit 2 mask. */ -#define USART_CHSIZE2_bp 2 /* Character Size bit 2 position. */ - - -/* USART.BAUDCTRLA bit masks and bit positions */ -#define USART_BSEL_gm 0xFF /* Baud Rate Selection Bits [7:0] group mask. */ -#define USART_BSEL_gp 0 /* Baud Rate Selection Bits [7:0] group position. */ -#define USART_BSEL0_bm (1<<0) /* Baud Rate Selection Bits [7:0] bit 0 mask. */ -#define USART_BSEL0_bp 0 /* Baud Rate Selection Bits [7:0] bit 0 position. */ -#define USART_BSEL1_bm (1<<1) /* Baud Rate Selection Bits [7:0] bit 1 mask. */ -#define USART_BSEL1_bp 1 /* Baud Rate Selection Bits [7:0] bit 1 position. */ -#define USART_BSEL2_bm (1<<2) /* Baud Rate Selection Bits [7:0] bit 2 mask. */ -#define USART_BSEL2_bp 2 /* Baud Rate Selection Bits [7:0] bit 2 position. */ -#define USART_BSEL3_bm (1<<3) /* Baud Rate Selection Bits [7:0] bit 3 mask. */ -#define USART_BSEL3_bp 3 /* Baud Rate Selection Bits [7:0] bit 3 position. */ -#define USART_BSEL4_bm (1<<4) /* Baud Rate Selection Bits [7:0] bit 4 mask. */ -#define USART_BSEL4_bp 4 /* Baud Rate Selection Bits [7:0] bit 4 position. */ -#define USART_BSEL5_bm (1<<5) /* Baud Rate Selection Bits [7:0] bit 5 mask. */ -#define USART_BSEL5_bp 5 /* Baud Rate Selection Bits [7:0] bit 5 position. */ -#define USART_BSEL6_bm (1<<6) /* Baud Rate Selection Bits [7:0] bit 6 mask. */ -#define USART_BSEL6_bp 6 /* Baud Rate Selection Bits [7:0] bit 6 position. */ -#define USART_BSEL7_bm (1<<7) /* Baud Rate Selection Bits [7:0] bit 7 mask. */ -#define USART_BSEL7_bp 7 /* Baud Rate Selection Bits [7:0] bit 7 position. */ - - -/* USART.BAUDCTRLB bit masks and bit positions */ -#define USART_BSCALE_gm 0xF0 /* Baud Rate Scale group mask. */ -#define USART_BSCALE_gp 4 /* Baud Rate Scale group position. */ -#define USART_BSCALE0_bm (1<<4) /* Baud Rate Scale bit 0 mask. */ -#define USART_BSCALE0_bp 4 /* Baud Rate Scale bit 0 position. */ -#define USART_BSCALE1_bm (1<<5) /* Baud Rate Scale bit 1 mask. */ -#define USART_BSCALE1_bp 5 /* Baud Rate Scale bit 1 position. */ -#define USART_BSCALE2_bm (1<<6) /* Baud Rate Scale bit 2 mask. */ -#define USART_BSCALE2_bp 6 /* Baud Rate Scale bit 2 position. */ -#define USART_BSCALE3_bm (1<<7) /* Baud Rate Scale bit 3 mask. */ -#define USART_BSCALE3_bp 7 /* Baud Rate Scale bit 3 position. */ - -/* USART_BSEL_gm Predefined. */ -/* USART_BSEL_gp Predefined. */ -/* USART_BSEL0_bm Predefined. */ -/* USART_BSEL0_bp Predefined. */ -/* USART_BSEL1_bm Predefined. */ -/* USART_BSEL1_bp Predefined. */ -/* USART_BSEL2_bm Predefined. */ -/* USART_BSEL2_bp Predefined. */ -/* USART_BSEL3_bm Predefined. */ -/* USART_BSEL3_bp Predefined. */ - - -/* SPI - Serial Peripheral Interface */ -/* SPI.CTRL bit masks and bit positions */ -#define SPI_CLK2X_bm 0x80 /* Enable Double Speed bit mask. */ -#define SPI_CLK2X_bp 7 /* Enable Double Speed bit position. */ - -#define SPI_ENABLE_bm 0x40 /* Enable Module bit mask. */ -#define SPI_ENABLE_bp 6 /* Enable Module bit position. */ - -#define SPI_DORD_bm 0x20 /* Data Order Setting bit mask. */ -#define SPI_DORD_bp 5 /* Data Order Setting bit position. */ - -#define SPI_MASTER_bm 0x10 /* Master Operation Enable bit mask. */ -#define SPI_MASTER_bp 4 /* Master Operation Enable bit position. */ - -#define SPI_MODE_gm 0x0C /* SPI Mode group mask. */ -#define SPI_MODE_gp 2 /* SPI Mode group position. */ -#define SPI_MODE0_bm (1<<2) /* SPI Mode bit 0 mask. */ -#define SPI_MODE0_bp 2 /* SPI Mode bit 0 position. */ -#define SPI_MODE1_bm (1<<3) /* SPI Mode bit 1 mask. */ -#define SPI_MODE1_bp 3 /* SPI Mode bit 1 position. */ - -#define SPI_PRESCALER_gm 0x03 /* Prescaler group mask. */ -#define SPI_PRESCALER_gp 0 /* Prescaler group position. */ -#define SPI_PRESCALER0_bm (1<<0) /* Prescaler bit 0 mask. */ -#define SPI_PRESCALER0_bp 0 /* Prescaler bit 0 position. */ -#define SPI_PRESCALER1_bm (1<<1) /* Prescaler bit 1 mask. */ -#define SPI_PRESCALER1_bp 1 /* Prescaler bit 1 position. */ - - -/* SPI.INTCTRL bit masks and bit positions */ -#define SPI_INTLVL_gm 0x03 /* Interrupt level group mask. */ -#define SPI_INTLVL_gp 0 /* Interrupt level group position. */ -#define SPI_INTLVL0_bm (1<<0) /* Interrupt level bit 0 mask. */ -#define SPI_INTLVL0_bp 0 /* Interrupt level bit 0 position. */ -#define SPI_INTLVL1_bm (1<<1) /* Interrupt level bit 1 mask. */ -#define SPI_INTLVL1_bp 1 /* Interrupt level bit 1 position. */ - - -/* SPI.STATUS bit masks and bit positions */ -#define SPI_IF_bm 0x80 /* Interrupt Flag bit mask. */ -#define SPI_IF_bp 7 /* Interrupt Flag bit position. */ - -#define SPI_WRCOL_bm 0x40 /* Write Collision bit mask. */ -#define SPI_WRCOL_bp 6 /* Write Collision bit position. */ - - -/* IRCOM - IR Communication Module */ -/* IRCOM.CTRL bit masks and bit positions */ -#define IRCOM_EVSEL_gm 0x0F /* Event Channel Select group mask. */ -#define IRCOM_EVSEL_gp 0 /* Event Channel Select group position. */ -#define IRCOM_EVSEL0_bm (1<<0) /* Event Channel Select bit 0 mask. */ -#define IRCOM_EVSEL0_bp 0 /* Event Channel Select bit 0 position. */ -#define IRCOM_EVSEL1_bm (1<<1) /* Event Channel Select bit 1 mask. */ -#define IRCOM_EVSEL1_bp 1 /* Event Channel Select bit 1 position. */ -#define IRCOM_EVSEL2_bm (1<<2) /* Event Channel Select bit 2 mask. */ -#define IRCOM_EVSEL2_bp 2 /* Event Channel Select bit 2 position. */ -#define IRCOM_EVSEL3_bm (1<<3) /* Event Channel Select bit 3 mask. */ -#define IRCOM_EVSEL3_bp 3 /* Event Channel Select bit 3 position. */ - - -/* AES - AES Module */ -/* AES.CTRL bit masks and bit positions */ -#define AES_START_bm 0x80 /* Start/Run bit mask. */ -#define AES_START_bp 7 /* Start/Run bit position. */ - -#define AES_AUTO_bm 0x40 /* Auto Start Trigger bit mask. */ -#define AES_AUTO_bp 6 /* Auto Start Trigger bit position. */ - -#define AES_RESET_bm 0x20 /* AES Software Reset bit mask. */ -#define AES_RESET_bp 5 /* AES Software Reset bit position. */ - -#define AES_DECRYPT_bm 0x10 /* Decryption / Direction bit mask. */ -#define AES_DECRYPT_bp 4 /* Decryption / Direction bit position. */ - -#define AES_XOR_bm 0x04 /* State XOR Load Enable bit mask. */ -#define AES_XOR_bp 2 /* State XOR Load Enable bit position. */ - - -/* AES.STATUS bit masks and bit positions */ -#define AES_ERROR_bm 0x80 /* AES Error bit mask. */ -#define AES_ERROR_bp 7 /* AES Error bit position. */ - -#define AES_SRIF_bm 0x01 /* State Ready Interrupt Flag bit mask. */ -#define AES_SRIF_bp 0 /* State Ready Interrupt Flag bit position. */ - - -/* AES.INTCTRL bit masks and bit positions */ -#define AES_INTLVL_gm 0x03 /* Interrupt level group mask. */ -#define AES_INTLVL_gp 0 /* Interrupt level group position. */ -#define AES_INTLVL0_bm (1<<0) /* Interrupt level bit 0 mask. */ -#define AES_INTLVL0_bp 0 /* Interrupt level bit 0 position. */ -#define AES_INTLVL1_bm (1<<1) /* Interrupt level bit 1 mask. */ -#define AES_INTLVL1_bp 1 /* Interrupt level bit 1 position. */ - - -/* VBAT - VBAT Battery Backup Module */ -/* VBAT.CTRL bit masks and bit positions */ -#define VBAT_XOSCSEL_bm 0x10 /* 32-kHz Crystal Oscillator Output Selection bit mask. */ -#define VBAT_XOSCSEL_bp 4 /* 32-kHz Crystal Oscillator Output Selection bit position. */ - -#define VBAT_XOSCEN_bm 0x08 /* Crystal Oscillator Enable bit mask. */ -#define VBAT_XOSCEN_bp 3 /* Crystal Oscillator Enable bit position. */ - -#define VBAT_XOSCFDEN_bm 0x04 /* Crystal Oscillator Failure Detection Monitor Enable bit mask. */ -#define VBAT_XOSCFDEN_bp 2 /* Crystal Oscillator Failure Detection Monitor Enable bit position. */ - -#define VBAT_ACCEN_bm 0x02 /* Battery Backup Access Enable bit mask. */ -#define VBAT_ACCEN_bp 1 /* Battery Backup Access Enable bit position. */ - -#define VBAT_RESET_bm 0x01 /* Battery Backup Reset bit mask. */ -#define VBAT_RESET_bp 0 /* Battery Backup Reset bit position. */ - - -/* VBAT.STATUS bit masks and bit positions */ -#define VBAT_BBPWR_bm 0x80 /* Battery backup Power bit mask. */ -#define VBAT_BBPWR_bp 7 /* Battery backup Power bit position. */ - -#define VBAT_XOSCRDY_bm 0x08 /* Crystal Oscillator Ready bit mask. */ -#define VBAT_XOSCRDY_bp 3 /* Crystal Oscillator Ready bit position. */ - -#define VBAT_XOSCFAIL_bm 0x04 /* Crystal Oscillator Failure bit mask. */ -#define VBAT_XOSCFAIL_bp 2 /* Crystal Oscillator Failure bit position. */ - -#define VBAT_BBBORF_bm 0x02 /* Battery Backup Brown-Out Reset Flag bit mask. */ -#define VBAT_BBBORF_bp 1 /* Battery Backup Brown-Out Reset Flag bit position. */ - -#define VBAT_BBPORF_bm 0x01 /* Battery Backup Power-On Reset Flag bit mask. */ -#define VBAT_BBPORF_bp 0 /* Battery Backup Power-On Reset Flag bit position. */ - - - -// Generic Port Pins - -#define PIN0_bm 0x01 -#define PIN0_bp 0 -#define PIN1_bm 0x02 -#define PIN1_bp 1 -#define PIN2_bm 0x04 -#define PIN2_bp 2 -#define PIN3_bm 0x08 -#define PIN3_bp 3 -#define PIN4_bm 0x10 -#define PIN4_bp 4 -#define PIN5_bm 0x20 -#define PIN5_bp 5 -#define PIN6_bm 0x40 -#define PIN6_bp 6 -#define PIN7_bm 0x80 -#define PIN7_bp 7 - - -/* ========== Interrupt Vector Definitions ========== */ -/* Vector 0 is the reset vector */ - -/* OSC interrupt vectors */ -#define OSC_XOSCF_vect_num 1 -#define OSC_XOSCF_vect _VECTOR(1) /* External Oscillator Failure Interrupt (NMI) */ - -/* PORTC interrupt vectors */ -#define PORTC_INT0_vect_num 2 -#define PORTC_INT0_vect _VECTOR(2) /* External Interrupt 0 */ -#define PORTC_INT1_vect_num 3 -#define PORTC_INT1_vect _VECTOR(3) /* External Interrupt 1 */ - -/* PORTR interrupt vectors */ -#define PORTR_INT0_vect_num 4 -#define PORTR_INT0_vect _VECTOR(4) /* External Interrupt 0 */ -#define PORTR_INT1_vect_num 5 -#define PORTR_INT1_vect _VECTOR(5) /* External Interrupt 1 */ - -/* DMA interrupt vectors */ -#define DMA_CH0_vect_num 6 -#define DMA_CH0_vect _VECTOR(6) /* Channel 0 Interrupt */ -#define DMA_CH1_vect_num 7 -#define DMA_CH1_vect _VECTOR(7) /* Channel 1 Interrupt */ -#define DMA_CH2_vect_num 8 -#define DMA_CH2_vect _VECTOR(8) /* Channel 2 Interrupt */ -#define DMA_CH3_vect_num 9 -#define DMA_CH3_vect _VECTOR(9) /* Channel 3 Interrupt */ - -/* RTC32 interrupt vectors */ -#define RTC32_OVF_vect_num 10 -#define RTC32_OVF_vect _VECTOR(10) /* Overflow Interrupt */ -#define RTC32_COMP_vect_num 11 -#define RTC32_COMP_vect _VECTOR(11) /* Compare Interrupt */ - -/* TWIC interrupt vectors */ -#define TWIC_TWIS_vect_num 12 -#define TWIC_TWIS_vect _VECTOR(12) /* TWI Slave Interrupt */ -#define TWIC_TWIM_vect_num 13 -#define TWIC_TWIM_vect _VECTOR(13) /* TWI Master Interrupt */ - -/* TCC0 interrupt vectors */ -#define TCC0_OVF_vect_num 14 -#define TCC0_OVF_vect _VECTOR(14) /* Overflow Interrupt */ -#define TCC0_ERR_vect_num 15 -#define TCC0_ERR_vect _VECTOR(15) /* Error Interrupt */ -#define TCC0_CCA_vect_num 16 -#define TCC0_CCA_vect _VECTOR(16) /* Compare or Capture A Interrupt */ -#define TCC0_CCB_vect_num 17 -#define TCC0_CCB_vect _VECTOR(17) /* Compare or Capture B Interrupt */ -#define TCC0_CCC_vect_num 18 -#define TCC0_CCC_vect _VECTOR(18) /* Compare or Capture C Interrupt */ -#define TCC0_CCD_vect_num 19 -#define TCC0_CCD_vect _VECTOR(19) /* Compare or Capture D Interrupt */ - -/* TCC1 interrupt vectors */ -#define TCC1_OVF_vect_num 20 -#define TCC1_OVF_vect _VECTOR(20) /* Overflow Interrupt */ -#define TCC1_ERR_vect_num 21 -#define TCC1_ERR_vect _VECTOR(21) /* Error Interrupt */ -#define TCC1_CCA_vect_num 22 -#define TCC1_CCA_vect _VECTOR(22) /* Compare or Capture A Interrupt */ -#define TCC1_CCB_vect_num 23 -#define TCC1_CCB_vect _VECTOR(23) /* Compare or Capture B Interrupt */ - -/* SPIC interrupt vectors */ -#define SPIC_INT_vect_num 24 -#define SPIC_INT_vect _VECTOR(24) /* SPI Interrupt */ - -/* USARTC0 interrupt vectors */ -#define USARTC0_RXC_vect_num 25 -#define USARTC0_RXC_vect _VECTOR(25) /* Reception Complete Interrupt */ -#define USARTC0_DRE_vect_num 26 -#define USARTC0_DRE_vect _VECTOR(26) /* Data Register Empty Interrupt */ -#define USARTC0_TXC_vect_num 27 -#define USARTC0_TXC_vect _VECTOR(27) /* Transmission Complete Interrupt */ - -/* USARTC1 interrupt vectors */ -#define USARTC1_RXC_vect_num 28 -#define USARTC1_RXC_vect _VECTOR(28) /* Reception Complete Interrupt */ -#define USARTC1_DRE_vect_num 29 -#define USARTC1_DRE_vect _VECTOR(29) /* Data Register Empty Interrupt */ -#define USARTC1_TXC_vect_num 30 -#define USARTC1_TXC_vect _VECTOR(30) /* Transmission Complete Interrupt */ - -/* AES interrupt vectors */ -#define AES_INT_vect_num 31 -#define AES_INT_vect _VECTOR(31) /* AES Interrupt */ - -/* NVM interrupt vectors */ -#define NVM_EE_vect_num 32 -#define NVM_EE_vect _VECTOR(32) /* EE Interrupt */ -#define NVM_SPM_vect_num 33 -#define NVM_SPM_vect _VECTOR(33) /* SPM Interrupt */ - -/* PORTB interrupt vectors */ -#define PORTB_INT0_vect_num 34 -#define PORTB_INT0_vect _VECTOR(34) /* External Interrupt 0 */ -#define PORTB_INT1_vect_num 35 -#define PORTB_INT1_vect _VECTOR(35) /* External Interrupt 1 */ - -/* ACB interrupt vectors */ -#define ACB_AC0_vect_num 36 -#define ACB_AC0_vect _VECTOR(36) /* AC0 Interrupt */ -#define ACB_AC1_vect_num 37 -#define ACB_AC1_vect _VECTOR(37) /* AC1 Interrupt */ -#define ACB_ACW_vect_num 38 -#define ACB_ACW_vect _VECTOR(38) /* ACW Window Mode Interrupt */ - -/* ADCB interrupt vectors */ -#define ADCB_CH0_vect_num 39 -#define ADCB_CH0_vect _VECTOR(39) /* Interrupt 0 */ -#define ADCB_CH1_vect_num 40 -#define ADCB_CH1_vect _VECTOR(40) /* Interrupt 1 */ -#define ADCB_CH2_vect_num 41 -#define ADCB_CH2_vect _VECTOR(41) /* Interrupt 2 */ -#define ADCB_CH3_vect_num 42 -#define ADCB_CH3_vect _VECTOR(42) /* Interrupt 3 */ - -/* PORTE interrupt vectors */ -#define PORTE_INT0_vect_num 43 -#define PORTE_INT0_vect _VECTOR(43) /* External Interrupt 0 */ -#define PORTE_INT1_vect_num 44 -#define PORTE_INT1_vect _VECTOR(44) /* External Interrupt 1 */ - -/* TWIE interrupt vectors */ -#define TWIE_TWIS_vect_num 45 -#define TWIE_TWIS_vect _VECTOR(45) /* TWI Slave Interrupt */ -#define TWIE_TWIM_vect_num 46 -#define TWIE_TWIM_vect _VECTOR(46) /* TWI Master Interrupt */ - -/* TCE0 interrupt vectors */ -#define TCE0_OVF_vect_num 47 -#define TCE0_OVF_vect _VECTOR(47) /* Overflow Interrupt */ -#define TCE0_ERR_vect_num 48 -#define TCE0_ERR_vect _VECTOR(48) /* Error Interrupt */ -#define TCE0_CCA_vect_num 49 -#define TCE0_CCA_vect _VECTOR(49) /* Compare or Capture A Interrupt */ -#define TCE0_CCB_vect_num 50 -#define TCE0_CCB_vect _VECTOR(50) /* Compare or Capture B Interrupt */ -#define TCE0_CCC_vect_num 51 -#define TCE0_CCC_vect _VECTOR(51) /* Compare or Capture C Interrupt */ -#define TCE0_CCD_vect_num 52 -#define TCE0_CCD_vect _VECTOR(52) /* Compare or Capture D Interrupt */ - -/* TCE1 interrupt vectors */ -#define TCE1_OVF_vect_num 53 -#define TCE1_OVF_vect _VECTOR(53) /* Overflow Interrupt */ -#define TCE1_ERR_vect_num 54 -#define TCE1_ERR_vect _VECTOR(54) /* Error Interrupt */ -#define TCE1_CCA_vect_num 55 -#define TCE1_CCA_vect _VECTOR(55) /* Compare or Capture A Interrupt */ -#define TCE1_CCB_vect_num 56 -#define TCE1_CCB_vect _VECTOR(56) /* Compare or Capture B Interrupt */ - -/* USARTE0 interrupt vectors */ -#define USARTE0_RXC_vect_num 58 -#define USARTE0_RXC_vect _VECTOR(58) /* Reception Complete Interrupt */ -#define USARTE0_DRE_vect_num 59 -#define USARTE0_DRE_vect _VECTOR(59) /* Data Register Empty Interrupt */ -#define USARTE0_TXC_vect_num 60 -#define USARTE0_TXC_vect _VECTOR(60) /* Transmission Complete Interrupt */ - -/* PORTD interrupt vectors */ -#define PORTD_INT0_vect_num 64 -#define PORTD_INT0_vect _VECTOR(64) /* External Interrupt 0 */ -#define PORTD_INT1_vect_num 65 -#define PORTD_INT1_vect _VECTOR(65) /* External Interrupt 1 */ - -/* PORTA interrupt vectors */ -#define PORTA_INT0_vect_num 66 -#define PORTA_INT0_vect _VECTOR(66) /* External Interrupt 0 */ -#define PORTA_INT1_vect_num 67 -#define PORTA_INT1_vect _VECTOR(67) /* External Interrupt 1 */ - -/* ACA interrupt vectors */ -#define ACA_AC0_vect_num 68 -#define ACA_AC0_vect _VECTOR(68) /* AC0 Interrupt */ -#define ACA_AC1_vect_num 69 -#define ACA_AC1_vect _VECTOR(69) /* AC1 Interrupt */ -#define ACA_ACW_vect_num 70 -#define ACA_ACW_vect _VECTOR(70) /* ACW Window Mode Interrupt */ - -/* ADCA interrupt vectors */ -#define ADCA_CH0_vect_num 71 -#define ADCA_CH0_vect _VECTOR(71) /* Interrupt 0 */ -#define ADCA_CH1_vect_num 72 -#define ADCA_CH1_vect _VECTOR(72) /* Interrupt 1 */ -#define ADCA_CH2_vect_num 73 -#define ADCA_CH2_vect _VECTOR(73) /* Interrupt 2 */ -#define ADCA_CH3_vect_num 74 -#define ADCA_CH3_vect _VECTOR(74) /* Interrupt 3 */ - -/* TCD0 interrupt vectors */ -#define TCD0_OVF_vect_num 77 -#define TCD0_OVF_vect _VECTOR(77) /* Overflow Interrupt */ -#define TCD0_ERR_vect_num 78 -#define TCD0_ERR_vect _VECTOR(78) /* Error Interrupt */ -#define TCD0_CCA_vect_num 79 -#define TCD0_CCA_vect _VECTOR(79) /* Compare or Capture A Interrupt */ -#define TCD0_CCB_vect_num 80 -#define TCD0_CCB_vect _VECTOR(80) /* Compare or Capture B Interrupt */ -#define TCD0_CCC_vect_num 81 -#define TCD0_CCC_vect _VECTOR(81) /* Compare or Capture C Interrupt */ -#define TCD0_CCD_vect_num 82 -#define TCD0_CCD_vect _VECTOR(82) /* Compare or Capture D Interrupt */ - -/* TCD1 interrupt vectors */ -#define TCD1_OVF_vect_num 83 -#define TCD1_OVF_vect _VECTOR(83) /* Overflow Interrupt */ -#define TCD1_ERR_vect_num 84 -#define TCD1_ERR_vect _VECTOR(84) /* Error Interrupt */ -#define TCD1_CCA_vect_num 85 -#define TCD1_CCA_vect _VECTOR(85) /* Compare or Capture A Interrupt */ -#define TCD1_CCB_vect_num 86 -#define TCD1_CCB_vect _VECTOR(86) /* Compare or Capture B Interrupt */ - -/* SPID interrupt vectors */ -#define SPID_INT_vect_num 87 -#define SPID_INT_vect _VECTOR(87) /* SPI Interrupt */ - -/* USARTD0 interrupt vectors */ -#define USARTD0_RXC_vect_num 88 -#define USARTD0_RXC_vect _VECTOR(88) /* Reception Complete Interrupt */ -#define USARTD0_DRE_vect_num 89 -#define USARTD0_DRE_vect _VECTOR(89) /* Data Register Empty Interrupt */ -#define USARTD0_TXC_vect_num 90 -#define USARTD0_TXC_vect _VECTOR(90) /* Transmission Complete Interrupt */ - -/* USARTD1 interrupt vectors */ -#define USARTD1_RXC_vect_num 91 -#define USARTD1_RXC_vect _VECTOR(91) /* Reception Complete Interrupt */ -#define USARTD1_DRE_vect_num 92 -#define USARTD1_DRE_vect _VECTOR(92) /* Data Register Empty Interrupt */ -#define USARTD1_TXC_vect_num 93 -#define USARTD1_TXC_vect _VECTOR(93) /* Transmission Complete Interrupt */ - -/* PORTF interrupt vectors */ -#define PORTF_INT0_vect_num 104 -#define PORTF_INT0_vect _VECTOR(104) /* External Interrupt 0 */ -#define PORTF_INT1_vect_num 105 -#define PORTF_INT1_vect _VECTOR(105) /* External Interrupt 1 */ - -/* TCF0 interrupt vectors */ -#define TCF0_OVF_vect_num 108 -#define TCF0_OVF_vect _VECTOR(108) /* Overflow Interrupt */ -#define TCF0_ERR_vect_num 109 -#define TCF0_ERR_vect _VECTOR(109) /* Error Interrupt */ -#define TCF0_CCA_vect_num 110 -#define TCF0_CCA_vect _VECTOR(110) /* Compare or Capture A Interrupt */ -#define TCF0_CCB_vect_num 111 -#define TCF0_CCB_vect _VECTOR(111) /* Compare or Capture B Interrupt */ -#define TCF0_CCC_vect_num 112 -#define TCF0_CCC_vect _VECTOR(112) /* Compare or Capture C Interrupt */ -#define TCF0_CCD_vect_num 113 -#define TCF0_CCD_vect _VECTOR(113) /* Compare or Capture D Interrupt */ - -/* USARTF0 interrupt vectors */ -#define USARTF0_RXC_vect_num 119 -#define USARTF0_RXC_vect _VECTOR(119) /* Reception Complete Interrupt */ -#define USARTF0_DRE_vect_num 120 -#define USARTF0_DRE_vect _VECTOR(120) /* Data Register Empty Interrupt */ -#define USARTF0_TXC_vect_num 121 -#define USARTF0_TXC_vect _VECTOR(121) /* Transmission Complete Interrupt */ - - -#define _VECTOR_SIZE 4 /* Size of individual vector. */ -#define _VECTORS_SIZE (122 * _VECTOR_SIZE) - - -/* ========== Constants ========== */ - -#define PROGMEM_START (0x0000) -#define PROGMEM_SIZE (270336) -#define PROGMEM_END (PROGMEM_START + PROGMEM_SIZE - 1) - -#define APP_SECTION_START (0x0000) -#define APP_SECTION_SIZE (262144) -#define APP_SECTION_END (APP_SECTION_START + APP_SECTION_SIZE - 1) - -#define APPTABLE_SECTION_START (0x3E000) -#define APPTABLE_SECTION_SIZE (8192) -#define APPTABLE_SECTION_END (APPTABLE_SECTION_START + APPTABLE_SECTION_SIZE - 1) - -#define BOOT_SECTION_START (0x40000) -#define BOOT_SECTION_SIZE (8192) -#define BOOT_SECTION_END (BOOT_SECTION_START + BOOT_SECTION_SIZE - 1) - -#define DATAMEM_START (0x0000) -#define DATAMEM_SIZE (24576) -#define DATAMEM_END (DATAMEM_START + DATAMEM_SIZE - 1) - -#define IO_START (0x0000) -#define IO_SIZE (4096) -#define IO_END (IO_START + IO_SIZE - 1) - -#define MAPPED_EEPROM_START (0x1000) -#define MAPPED_EEPROM_SIZE (4096) -#define MAPPED_EEPROM_END (MAPPED_EEPROM_START + MAPPED_EEPROM_SIZE - 1) - -#define INTERNAL_SRAM_START (0x2000) -#define INTERNAL_SRAM_SIZE (16384) -#define INTERNAL_SRAM_END (INTERNAL_SRAM_START + INTERNAL_SRAM_SIZE - 1) - -#define EEPROM_START (0x0000) -#define EEPROM_SIZE (4096) -#define EEPROM_END (EEPROM_START + EEPROM_SIZE - 1) - -#define FUSE_START (0x0000) -#define FUSE_SIZE (6) -#define FUSE_END (FUSE_START + FUSE_SIZE - 1) - -#define LOCKBIT_START (0x0000) -#define LOCKBIT_SIZE (1) -#define LOCKBIT_END (LOCKBIT_START + LOCKBIT_SIZE - 1) - -#define SIGNATURES_START (0x0000) -#define SIGNATURES_SIZE (3) -#define SIGNATURES_END (SIGNATURES_START + SIGNATURES_SIZE - 1) - -#define USER_SIGNATURES_START (0x0000) -#define USER_SIGNATURES_SIZE (512) -#define USER_SIGNATURES_END (USER_SIGNATURES_START + USER_SIGNATURES_SIZE - 1) - -#define PROD_SIGNATURES_START (0x0000) -#define PROD_SIGNATURES_SIZE (52) -#define PROD_SIGNATURES_END (PROD_SIGNATURES_START + PROD_SIGNATURES_SIZE - 1) - -#define FLASHEND PROGMEM_END -#define SPM_PAGESIZE PROGMEM_PAGE_SIZE -#define RAMSTART INTERNAL_SRAM_START -#define RAMSIZE INTERNAL_SRAM_SIZE -#define RAMEND INTERNAL_SRAM_END -#define XRAMSTART EXTERNAL_SRAM_START -#define XRAMSIZE EXTERNAL_SRAM_SIZE -#define XRAMEND INTERNAL_SRAM_END -#define E2END EEPROM_END -#define E2PAGESIZE EEPROM_PAGE_SIZE - - -/* ========== Fuses ========== */ -#define FUSE_MEMORY_SIZE 6 - -/* Fuse Byte 0 */ -#define FUSE_JTAGUSERID0 ~_BV(0) /* JTAG User ID Bit 0 */ -#define FUSE_JTAGUSERID1 ~_BV(1) /* JTAG User ID Bit 1 */ -#define FUSE_JTAGUSERID2 ~_BV(2) /* JTAG User ID Bit 2 */ -#define FUSE_JTAGUSERID3 ~_BV(3) /* JTAG User ID Bit 3 */ -#define FUSE_JTAGUSERID4 ~_BV(4) /* JTAG User ID Bit 4 */ -#define FUSE_JTAGUSERID5 ~_BV(5) /* JTAG User ID Bit 5 */ -#define FUSE_JTAGUSERID6 ~_BV(6) /* JTAG User ID Bit 6 */ -#define FUSE_JTAGUSERID7 ~_BV(7) /* JTAG User ID Bit 7 */ -#define FUSE0_DEFAULT (0xFF) - -/* Fuse Byte 1 */ -#define FUSE_WDP0 ~_BV(0) /* Watchdog Timeout Period Bit 0 */ -#define FUSE_WDP1 ~_BV(1) /* Watchdog Timeout Period Bit 1 */ -#define FUSE_WDP2 ~_BV(2) /* Watchdog Timeout Period Bit 2 */ -#define FUSE_WDP3 ~_BV(3) /* Watchdog Timeout Period Bit 3 */ -#define FUSE_WDWP0 ~_BV(4) /* Watchdog Window Timeout Period Bit 0 */ -#define FUSE_WDWP1 ~_BV(5) /* Watchdog Window Timeout Period Bit 1 */ -#define FUSE_WDWP2 ~_BV(6) /* Watchdog Window Timeout Period Bit 2 */ -#define FUSE_WDWP3 ~_BV(7) /* Watchdog Window Timeout Period Bit 3 */ -#define FUSE1_DEFAULT (0xFF) - -/* Fuse Byte 2 */ -#define FUSE_BODPD0 ~_BV(0) /* BOD Operation in Power-Down Mode Bit 0 */ -#define FUSE_BODPD1 ~_BV(1) /* BOD Operation in Power-Down Mode Bit 1 */ -#define FUSE_BODACT0 ~_BV(2) /* BOD Operation in Active Mode Bit 0 */ -#define FUSE_BODACT1 ~_BV(3) /* BOD Operation in Active Mode Bit 1 */ -#define FUSE_BOOTRST ~_BV(6) /* Boot Loader Section Reset Vector */ -#define FUSE_DVSDON ~_BV(7) /* Spike Detector Enable */ -#define FUSE2_DEFAULT (0xFF) - -/* Fuse Byte 3 Reserved */ - -/* Fuse Byte 4 */ -#define FUSE_JTAGEN ~_BV(0) /* JTAG Interface Enable */ -#define FUSE_WDLOCK ~_BV(1) /* Watchdog Timer Lock */ -#define FUSE_SUT0 ~_BV(2) /* Start-up Time Bit 0 */ -#define FUSE_SUT1 ~_BV(3) /* Start-up Time Bit 1 */ -#define FUSE4_DEFAULT (0xFF) - -/* Fuse Byte 5 */ -#define FUSE_BODLVL0 ~_BV(0) /* Brown Out Detection Voltage Level Bit 0 */ -#define FUSE_BODLVL1 ~_BV(1) /* Brown Out Detection Voltage Level Bit 1 */ -#define FUSE_BODLVL2 ~_BV(2) /* Brown Out Detection Voltage Level Bit 2 */ -#define FUSE_EESAVE ~_BV(3) /* Preserve EEPROM Through Chip Erase */ -#define FUSE5_DEFAULT (0xFF) - - -/* ========== Lock Bits ========== */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_APPLICATION_TABLE_BITS_EXIST -#define __BOOT_LOCK_APPLICATION_BITS_EXIST -#define __BOOT_LOCK_BOOT_BITS_EXIST - - -/* ========== Signature ========== */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x98 -#define SIGNATURE_2 0x43 - - -#endif /* _AVR_ATxmega256A3B_H_ */ - diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iox64a1.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iox64a1.h deleted file mode 100644 index 336156487..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iox64a1.h +++ /dev/null @@ -1,7099 +0,0 @@ -/* Copyright (c) 2008 Atmel Corporation - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iox64a1.h,v 1.1.2.11 2008/11/03 04:13:17 arcanum Exp $ */ - -/* avr/iox64a1.h - definitions for ATxmega64A1 */ - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iox64a1.h" -#else -# error "Attempt to include more than one file." -#endif - - -#ifndef _AVR_ATxmega64A1_H_ -#define _AVR_ATxmega64A1_H_ 1 - - -/* Ungrouped common registers */ -#define GPIO0 _SFR_MEM8(0x0000) /* General Purpose IO Register 0 */ -#define GPIO1 _SFR_MEM8(0x0001) /* General Purpose IO Register 1 */ -#define GPIO2 _SFR_MEM8(0x0002) /* General Purpose IO Register 2 */ -#define GPIO3 _SFR_MEM8(0x0003) /* General Purpose IO Register 3 */ -#define GPIO4 _SFR_MEM8(0x0004) /* General Purpose IO Register 4 */ -#define GPIO5 _SFR_MEM8(0x0005) /* General Purpose IO Register 5 */ -#define GPIO6 _SFR_MEM8(0x0006) /* General Purpose IO Register 6 */ -#define GPIO7 _SFR_MEM8(0x0007) /* General Purpose IO Register 7 */ -#define GPIO8 _SFR_MEM8(0x0008) /* General Purpose IO Register 8 */ -#define GPIO9 _SFR_MEM8(0x0009) /* General Purpose IO Register 9 */ -#define GPIOA _SFR_MEM8(0x000A) /* General Purpose IO Register 10 */ -#define GPIOB _SFR_MEM8(0x000B) /* General Purpose IO Register 11 */ -#define GPIOC _SFR_MEM8(0x000C) /* General Purpose IO Register 12 */ -#define GPIOD _SFR_MEM8(0x000D) /* General Purpose IO Register 13 */ -#define GPIOE _SFR_MEM8(0x000E) /* General Purpose IO Register 14 */ -#define GPIOF _SFR_MEM8(0x000F) /* General Purpose IO Register 15 */ - -#define CCP _SFR_MEM8(0x0034) /* Configuration Change Protection */ -#define RAMPD _SFR_MEM8(0x0038) /* Ramp D */ -#define RAMPX _SFR_MEM8(0x0039) /* Ramp X */ -#define RAMPY _SFR_MEM8(0x003A) /* Ramp Y */ -#define RAMPZ _SFR_MEM8(0x003B) /* Ramp Z */ -#define EIND _SFR_MEM8(0x003C) /* Extended Indirect Jump */ -#define SPL _SFR_MEM8(0x003D) /* Stack Pointer Low */ -#define SPH _SFR_MEM8(0x003E) /* Stack Pointer High */ -#define SREG _SFR_MEM8(0x003F) /* Status Register */ - - -/* C Language Only */ -#if !defined (__ASSEMBLER__) - -#include - -typedef volatile uint8_t register8_t; -typedef volatile uint16_t register16_t; -typedef volatile uint32_t register32_t; - - -#ifdef _WORDREGISTER -#undef _WORDREGISTER -#endif -#define _WORDREGISTER(regname) \ - union \ - { \ - register16_t regname; \ - struct \ - { \ - register8_t regname ## L; \ - register8_t regname ## H; \ - }; \ - } - -#ifdef _DWORDREGISTER -#undef _DWORDREGISTER -#endif -#define _DWORDREGISTER(regname) \ - union \ - { \ - register32_t regname; \ - struct \ - { \ - register8_t regname ## 0; \ - register8_t regname ## 1; \ - register8_t regname ## 2; \ - register8_t regname ## 3; \ - }; \ - } - - -/* -========================================================================== -IO Module Structures -========================================================================== -*/ - - -/* --------------------------------------------------------------------------- -XOCD - On-Chip Debug System --------------------------------------------------------------------------- -*/ - -/* On-Chip Debug System */ -typedef struct OCD_struct -{ - register8_t OCDR0; /* OCD Register 0 */ - register8_t OCDR1; /* OCD Register 1 */ -} OCD_t; - - -/* CCP signatures */ -typedef enum CCP_enum -{ - CCP_SPM_gc = (0x9D<<0), /* SPM Instruction Protection */ - CCP_IOREG_gc = (0xD8<<0), /* IO Register Protection */ -} CCP_t; - - -/* --------------------------------------------------------------------------- -CLK - Clock System --------------------------------------------------------------------------- -*/ - -/* Clock System */ -typedef struct CLK_struct -{ - register8_t CTRL; /* Control Register */ - register8_t PSCTRL; /* Prescaler Control Register */ - register8_t LOCK; /* Lock register */ - register8_t RTCCTRL; /* RTC Control Register */ -} CLK_t; - -/* --------------------------------------------------------------------------- -CLK - Clock System --------------------------------------------------------------------------- -*/ - -/* Power Reduction */ -typedef struct PR_struct -{ - register8_t PR; /* General Power Reduction */ - register8_t PRPA; /* Power Reduction Port A */ - register8_t PRPB; /* Power Reduction Port B */ - register8_t PRPC; /* Power Reduction Port C */ - register8_t PRPD; /* Power Reduction Port D */ - register8_t PRPE; /* Power Reduction Port E */ - register8_t PRPF; /* Power Reduction Port F */ -} PR_t; - -/* System Clock Selection */ -typedef enum CLK_SCLKSEL_enum -{ - CLK_SCLKSEL_RC2M_gc = (0x00<<0), /* Internal 2MHz RC Oscillator */ - CLK_SCLKSEL_RC32M_gc = (0x01<<0), /* Internal 32MHz RC Oscillator */ - CLK_SCLKSEL_RC32K_gc = (0x02<<0), /* Internal 32kHz RC Oscillator */ - CLK_SCLKSEL_XOSC_gc = (0x03<<0), /* External Crystal Oscillator or Clock */ - CLK_SCLKSEL_PLL_gc = (0x04<<0), /* Phase Locked Loop */ -} CLK_SCLKSEL_t; - -/* Prescaler A Division Factor */ -typedef enum CLK_PSADIV_enum -{ - CLK_PSADIV_1_gc = (0x00<<2), /* Divide by 1 */ - CLK_PSADIV_2_gc = (0x01<<2), /* Divide by 2 */ - CLK_PSADIV_4_gc = (0x03<<2), /* Divide by 4 */ - CLK_PSADIV_8_gc = (0x05<<2), /* Divide by 8 */ - CLK_PSADIV_16_gc = (0x07<<2), /* Divide by 16 */ - CLK_PSADIV_32_gc = (0x09<<2), /* Divide by 32 */ - CLK_PSADIV_64_gc = (0x0B<<2), /* Divide by 64 */ - CLK_PSADIV_128_gc = (0x0D<<2), /* Divide by 128 */ - CLK_PSADIV_256_gc = (0x0F<<2), /* Divide by 256 */ - CLK_PSADIV_512_gc = (0x11<<2), /* Divide by 512 */ -} CLK_PSADIV_t; - -/* Prescaler B and C Division Factor */ -typedef enum CLK_PSBCDIV_enum -{ - CLK_PSBCDIV_1_1_gc = (0x00<<0), /* Divide B by 1 and C by 1 */ - CLK_PSBCDIV_1_2_gc = (0x01<<0), /* Divide B by 1 and C by 2 */ - CLK_PSBCDIV_4_1_gc = (0x02<<0), /* Divide B by 4 and C by 1 */ - CLK_PSBCDIV_2_2_gc = (0x03<<0), /* Divide B by 2 and C by 2 */ -} CLK_PSBCDIV_t; - -/* RTC Clock Source */ -typedef enum CLK_RTCSRC_enum -{ - CLK_RTCSRC_ULP_gc = (0x00<<1), /* 1kHz from internal 32kHz ULP */ - CLK_RTCSRC_TOSC_gc = (0x01<<1), /* 1kHz from 32kHz crystal oscillator on TOSC */ - CLK_RTCSRC_RCOSC_gc = (0x02<<1), /* 1kHz from internal 32kHz RC oscillator */ - CLK_RTCSRC_TOSC32_gc = (0x05<<1), /* 32kHz from 32kHz crystal oscillator on TOSC */ -} CLK_RTCSRC_t; - - -/* --------------------------------------------------------------------------- -SLEEP - Sleep Controller --------------------------------------------------------------------------- -*/ - -/* Sleep Controller */ -typedef struct SLEEP_struct -{ - register8_t CTRL; /* Control Register */ -} SLEEP_t; - -/* Sleep Mode */ -typedef enum SLEEP_SMODE_enum -{ - SLEEP_SMODE_IDLE_gc = (0x00<<1), /* Idle mode */ - SLEEP_SMODE_PDOWN_gc = (0x02<<1), /* Power-down Mode */ - SLEEP_SMODE_PSAVE_gc = (0x03<<1), /* Power-save Mode */ - SLEEP_SMODE_STDBY_gc = (0x06<<1), /* Standby Mode */ - SLEEP_SMODE_ESTDBY_gc = (0x07<<1), /* Extended Standby Mode */ -} SLEEP_SMODE_t; - - -/* --------------------------------------------------------------------------- -OSC - Oscillator --------------------------------------------------------------------------- -*/ - -/* Oscillator */ -typedef struct OSC_struct -{ - register8_t CTRL; /* Control Register */ - register8_t STATUS; /* Status Register */ - register8_t XOSCCTRL; /* External Oscillator Control Register */ - register8_t XOSCFAIL; /* External Oscillator Failure Detection Register */ - register8_t RC32KCAL; /* 32kHz Internal Oscillator Calibration Register */ - register8_t PLLCTRL; /* PLL Control REgister */ - register8_t DFLLCTRL; /* DFLL Control Register */ -} OSC_t; - -/* Oscillator Frequency Range */ -typedef enum OSC_FRQRANGE_enum -{ - OSC_FRQRANGE_04TO2_gc = (0x00<<6), /* 0.4 - 2 MHz */ - OSC_FRQRANGE_2TO9_gc = (0x01<<6), /* 2 - 9 MHz */ - OSC_FRQRANGE_9TO12_gc = (0x02<<6), /* 9 - 12 MHz */ - OSC_FRQRANGE_12TO16_gc = (0x03<<6), /* 12 - 16 MHz */ -} OSC_FRQRANGE_t; - -/* External Oscillator Selection and Startup Time */ -typedef enum OSC_XOSCSEL_enum -{ - OSC_XOSCSEL_EXTCLK_gc = (0x00<<0), /* External Clock - 6 CLK */ - OSC_XOSCSEL_32KHz_gc = (0x02<<0), /* 32kHz TOSC - 32K CLK */ - OSC_XOSCSEL_XTAL_256CLK_gc = (0x03<<0), /* 0.4-16MHz XTAL - 256 CLK */ - OSC_XOSCSEL_XTAL_1KCLK_gc = (0x07<<0), /* 0.4-16MHz XTAL - 1K CLK */ - OSC_XOSCSEL_XTAL_16KCLK_gc = (0x0B<<0), /* 0.4-16MHz XTAL - 16K CLK */ -} OSC_XOSCSEL_t; - -/* PLL Clock Source */ -typedef enum OSC_PLLSRC_enum -{ - OSC_PLLSRC_RC2M_gc = (0x00<<6), /* Internal 2MHz RC Oscillator */ - OSC_PLLSRC_RC32M_gc = (0x02<<6), /* Internal 32MHz RC Oscillator */ - OSC_PLLSRC_XOSC_gc = (0x03<<6), /* External Oscillator */ -} OSC_PLLSRC_t; - - -/* --------------------------------------------------------------------------- -DFLL - DFLL --------------------------------------------------------------------------- -*/ - -/* DFLL */ -typedef struct DFLL_struct -{ - register8_t CTRL; /* Control Register */ - register8_t reserved_0x01; - register8_t CALA; /* Calibration Register A */ - register8_t CALB; /* Calibration Register B */ - register8_t OSCCNT0; /* Oscillator Counter Register 0 */ - register8_t OSCCNT1; /* Oscillator Counter Register 1 */ - register8_t OSCCNT2; /* Oscillator Counter Register 2 */ - register8_t reserved_0x07; -} DFLL_t; - - -/* --------------------------------------------------------------------------- -RST - Reset --------------------------------------------------------------------------- -*/ - -/* Reset */ -typedef struct RST_struct -{ - register8_t STATUS; /* Status Register */ - register8_t CTRL; /* Control Register */ -} RST_t; - - -/* --------------------------------------------------------------------------- -WDT - Watch-Dog Timer --------------------------------------------------------------------------- -*/ - -/* Watch-Dog Timer */ -typedef struct WDT_struct -{ - register8_t CTRL; /* Control */ - register8_t WINCTRL; /* Windowed Mode Control */ - register8_t STATUS; /* Status */ -} WDT_t; - -/* Period setting */ -typedef enum WDT_PER_enum -{ - WDT_PER_8CLK_gc = (0x00<<2), /* 8 cycles (8ms @ 3.3V) */ - WDT_PER_16CLK_gc = (0x01<<2), /* 16 cycles (16ms @ 3.3V) */ - WDT_PER_32CLK_gc = (0x02<<2), /* 32 cycles (32ms @ 3.3V) */ - WDT_PER_64CLK_gc = (0x03<<2), /* 64 cycles (64ms @ 3.3V) */ - WDT_PER_128CLK_gc = (0x04<<2), /* 128 cycles (0.125s @ 3.3V) */ - WDT_PER_256CLK_gc = (0x05<<2), /* 256 cycles (0.25s @ 3.3V) */ - WDT_PER_512CLK_gc = (0x06<<2), /* 512 cycles (0.5s @ 3.3V) */ - WDT_PER_1KCLK_gc = (0x07<<2), /* 1K cycles (1s @ 3.3V) */ - WDT_PER_2KCLK_gc = (0x08<<2), /* 2K cycles (2s @ 3.3V) */ - WDT_PER_4KCLK_gc = (0x09<<2), /* 4K cycles (4s @ 3.3V) */ - WDT_PER_8KCLK_gc = (0x0A<<2), /* 8K cycles (8s @ 3.3V) */ -} WDT_PER_t; - -/* Closed window period */ -typedef enum WDT_WPER_enum -{ - WDT_WPER_8CLK_gc = (0x00<<2), /* 8 cycles (8ms @ 3.3V) */ - WDT_WPER_16CLK_gc = (0x01<<2), /* 16 cycles (16ms @ 3.3V) */ - WDT_WPER_32CLK_gc = (0x02<<2), /* 32 cycles (32ms @ 3.3V) */ - WDT_WPER_64CLK_gc = (0x03<<2), /* 64 cycles (64ms @ 3.3V) */ - WDT_WPER_128CLK_gc = (0x04<<2), /* 128 cycles (0.125s @ 3.3V) */ - WDT_WPER_256CLK_gc = (0x05<<2), /* 256 cycles (0.25s @ 3.3V) */ - WDT_WPER_512CLK_gc = (0x06<<2), /* 512 cycles (0.5s @ 3.3V) */ - WDT_WPER_1KCLK_gc = (0x07<<2), /* 1K cycles (1s @ 3.3V) */ - WDT_WPER_2KCLK_gc = (0x08<<2), /* 2K cycles (2s @ 3.3V) */ - WDT_WPER_4KCLK_gc = (0x09<<2), /* 4K cycles (4s @ 3.3V) */ - WDT_WPER_8KCLK_gc = (0x0A<<2), /* 8K cycles (8s @ 3.3V) */ -} WDT_WPER_t; - - -/* --------------------------------------------------------------------------- -MCU - MCU Control --------------------------------------------------------------------------- -*/ - -/* MCU Control */ -typedef struct MCU_struct -{ - register8_t DEVID0; /* Device ID byte 0 */ - register8_t DEVID1; /* Device ID byte 1 */ - register8_t DEVID2; /* Device ID byte 2 */ - register8_t REVID; /* Revision ID */ - register8_t JTAGUID; /* JTAG User ID */ - register8_t reserved_0x05; - register8_t MCUCR; /* MCU Control */ - register8_t reserved_0x07; - register8_t EVSYSLOCK; /* Event System Lock */ - register8_t AWEXLOCK; /* AWEX Lock */ - register8_t reserved_0x0A; - register8_t reserved_0x0B; -} MCU_t; - - -/* --------------------------------------------------------------------------- -PMIC - Programmable Multi-level Interrupt Controller --------------------------------------------------------------------------- -*/ - -/* Programmable Multi-level Interrupt Controller */ -typedef struct PMIC_struct -{ - register8_t STATUS; /* Status Register */ - register8_t INTPRI; /* Interrupt Priority */ - register8_t CTRL; /* Control Register */ -} PMIC_t; - - -/* --------------------------------------------------------------------------- -DMA - DMA Controller --------------------------------------------------------------------------- -*/ - -/* DMA Channel */ -typedef struct DMA_CH_struct -{ - register8_t CTRLA; /* Channel Control */ - register8_t CTRLB; /* Channel Control */ - register8_t ADDRCTRL; /* Address Control */ - register8_t TRIGSRC; /* Channel Trigger Source */ - _WORDREGISTER(TRFCNT); /* Channel Block Transfer Count */ - register8_t REPCNT; /* Channel Repeat Count */ - register8_t reserved_0x07; - register8_t SRCADDR0; /* Channel Source Address 0 */ - register8_t SRCADDR1; /* Channel Source Address 1 */ - register8_t SRCADDR2; /* Channel Source Address 2 */ - register8_t reserved_0x0B; - register8_t DESTADDR0; /* Channel Destination Address 0 */ - register8_t DESTADDR1; /* Channel Destination Address 1 */ - register8_t DESTADDR2; /* Channel Destination Address 2 */ - register8_t reserved_0x0F; -} DMA_CH_t; - -/* --------------------------------------------------------------------------- -DMA - DMA Controller --------------------------------------------------------------------------- -*/ - -/* DMA Controller */ -typedef struct DMA_struct -{ - register8_t CTRL; /* Control */ - register8_t reserved_0x01; - register8_t reserved_0x02; - register8_t INTFLAGS; /* Transfer Interrupt Status */ - register8_t STATUS; /* Status */ - register8_t reserved_0x05; - _WORDREGISTER(TEMP); /* Temporary Register For 16/24-bit Access */ - register8_t reserved_0x08; - register8_t reserved_0x09; - register8_t reserved_0x0A; - register8_t reserved_0x0B; - register8_t reserved_0x0C; - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t reserved_0x0F; - DMA_CH_t CH0; /* DMA Channel 0 */ - DMA_CH_t CH1; /* DMA Channel 1 */ - DMA_CH_t CH2; /* DMA Channel 2 */ - DMA_CH_t CH3; /* DMA Channel 3 */ -} DMA_t; - -/* Burst mode */ -typedef enum DMA_CH_BURSTLEN_enum -{ - DMA_CH_BURSTLEN_1BYTE_gc = (0x00<<0), /* 1-byte burst mode */ - DMA_CH_BURSTLEN_2BYTE_gc = (0x01<<0), /* 2-byte burst mode */ - DMA_CH_BURSTLEN_4BYTE_gc = (0x02<<0), /* 4-byte burst mode */ - DMA_CH_BURSTLEN_8BYTE_gc = (0x03<<0), /* 8-byte burst mode */ -} DMA_CH_BURSTLEN_t; - -/* Source address reload mode */ -typedef enum DMA_CH_SRCRELOAD_enum -{ - DMA_CH_SRCRELOAD_NONE_gc = (0x00<<6), /* No reload */ - DMA_CH_SRCRELOAD_BLOCK_gc = (0x01<<6), /* Reload at end of block */ - DMA_CH_SRCRELOAD_BURST_gc = (0x02<<6), /* Reload at end of burst */ - DMA_CH_SRCRELOAD_TRANSACTION_gc = (0x03<<6), /* Reload at end of transaction */ -} DMA_CH_SRCRELOAD_t; - -/* Source addressing mode */ -typedef enum DMA_CH_SRCDIR_enum -{ - DMA_CH_SRCDIR_FIXED_gc = (0x00<<4), /* Fixed */ - DMA_CH_SRCDIR_INC_gc = (0x01<<4), /* Increment */ - DMA_CH_SRCDIR_DEC_gc = (0x02<<4), /* Decrement */ -} DMA_CH_SRCDIR_t; - -/* Destination adress reload mode */ -typedef enum DMA_CH_DESTRELOAD_enum -{ - DMA_CH_DESTRELOAD_NONE_gc = (0x00<<2), /* No reload */ - DMA_CH_DESTRELOAD_BLOCK_gc = (0x01<<2), /* Reload at end of block */ - DMA_CH_DESTRELOAD_BURST_gc = (0x02<<2), /* Reload at end of burst */ - DMA_CH_DESTRELOAD_TRANSACTION_gc = (0x03<<2), /* Reload at end of transaction */ -} DMA_CH_DESTRELOAD_t; - -/* Destination adressing mode */ -typedef enum DMA_CH_DESTDIR_enum -{ - DMA_CH_DESTDIR_FIXED_gc = (0x00<<0), /* Fixed */ - DMA_CH_DESTDIR_INC_gc = (0x01<<0), /* Increment */ - DMA_CH_DESTDIR_DEC_gc = (0x02<<0), /* Decrement */ -} DMA_CH_DESTDIR_t; - -/* Transfer trigger source */ -typedef enum DMA_CH_TRIGSRC_enum -{ - DMA_CH_TRIGSRC_OFF_gc = (0x00<<0), /* Off software triggers only */ - DMA_CH_TRIGSRC_EVSYS_CH0_gc = (0x01<<0), /* Event System Channel 0 */ - DMA_CH_TRIGSRC_EVSYS_CH1_gc = (0x02<<0), /* Event System Channel 1 */ - DMA_CH_TRIGSRC_EVSYS_CH2_gc = (0x03<<0), /* Event System Channel 2 */ - DMA_CH_TRIGSRC_ADCA_CH0_gc = (0x10<<0), /* ADCA Channel 0 */ - DMA_CH_TRIGSRC_ADCA_CH1_gc = (0x11<<0), /* ADCA Channel 1 */ - DMA_CH_TRIGSRC_ADCA_CH2_gc = (0x12<<0), /* ADCA Channel 2 */ - DMA_CH_TRIGSRC_ADCA_CH3_gc = (0x13<<0), /* ADCA Channel 3 */ - DMA_CH_TRIGSRC_ADCA_CH4_gc = (0x14<<0), /* ADCA Channel 0,1,2,3 combined */ - DMA_CH_TRIGSRC_DACA_CH0_gc = (0x15<<0), /* DACA Channel 0 */ - DMA_CH_TRIGSRC_DACA_CH1_gc = (0x16<<0), /* DACA Channel 1 */ - DMA_CH_TRIGSRC_ADCB_CH0_gc = (0x20<<0), /* ADCB Channel 0 */ - DMA_CH_TRIGSRC_ADCB_CH1_gc = (0x21<<0), /* ADCB Channel 1 */ - DMA_CH_TRIGSRC_ADCB_CH2_gc = (0x22<<0), /* ADCB Channel 2 */ - DMA_CH_TRIGSRC_ADCB_CH3_gc = (0x23<<0), /* ADCB Channel 3 */ - DMA_CH_TRIGSRC_ADCB_CH4_gc = (0x24<<0), /* ADCB Channel 0,1,2,3 combined */ - DMA_CH_TRIGSRC_DACB_CH0_gc = (0x25<<0), /* DACB Channel 0 */ - DMA_CH_TRIGSRC_DACB_CH1_gc = (0x26<<0), /* DACB Channel 1 */ - DMA_CH_TRIGSRC_TCC0_OVF_gc = (0x40<<0), /* Timer/Counter C0 Overflow */ - DMA_CH_TRIGSRC_TCC0_ERR_gc = (0x41<<0), /* Timer/Counter C0 Error */ - DMA_CH_TRIGSRC_TCC0_CCA_gc = (0x42<<0), /* Timer/Counter C0 Compare or Capture A */ - DMA_CH_TRIGSRC_TCC0_CCB_gc = (0x43<<0), /* Timer/Counter C0 Compare or Capture B */ - DMA_CH_TRIGSRC_TCC0_CCC_gc = (0x44<<0), /* Timer/Counter C0 Compare or Capture C */ - DMA_CH_TRIGSRC_TCC0_CCD_gc = (0x45<<0), /* Timer/Counter C0 Compare or Capture D */ - DMA_CH_TRIGSRC_TCC1_OVF_gc = (0x46<<0), /* Timer/Counter C1 Overflow */ - DMA_CH_TRIGSRC_TCC1_ERR_gc = (0x47<<0), /* Timer/Counter C1 Error */ - DMA_CH_TRIGSRC_TCC1_CCA_gc = (0x48<<0), /* Timer/Counter C1 Compare or Capture A */ - DMA_CH_TRIGSRC_TCC1_CCB_gc = (0x49<<0), /* Timer/Counter C1 Compare or Capture B */ - DMA_CH_TRIGSRC_SPIC_gc = (0x4A<<0), /* SPI C Transfer Complete */ - DMA_CH_TRIGSRC_USARTC0_RXC_gc = (0x4B<<0), /* USART C0 Receive Complete */ - DMA_CH_TRIGSRC_USARTC0_DRE_gc = (0x4C<<0), /* USART C0 Data Register Empty */ - DMA_CH_TRIGSRC_USARTC1_RXC_gc = (0x4E<<0), /* USART C1 Receive Complete */ - DMA_CH_TRIGSRC_USARTC1_DRE_gc = (0x4F<<0), /* USART C1 Data Register Empty */ - DMA_CH_TRIGSRC_TCD0_OVF_gc = (0x60<<0), /* Timer/Counter D0 Overflow */ - DMA_CH_TRIGSRC_TCD0_ERR_gc = (0x61<<0), /* Timer/Counter D0 Error */ - DMA_CH_TRIGSRC_TCD0_CCA_gc = (0x62<<0), /* Timer/Counter D0 Compare or Capture A */ - DMA_CH_TRIGSRC_TCD0_CCB_gc = (0x63<<0), /* Timer/Counter D0 Compare or Capture B */ - DMA_CH_TRIGSRC_TCD0_CCC_gc = (0x64<<0), /* Timer/Counter D0 Compare or Capture C */ - DMA_CH_TRIGSRC_TCD0_CCD_gc = (0x65<<0), /* Timer/Counter D0 Compare or Capture D */ - DMA_CH_TRIGSRC_TCD1_OVF_gc = (0x66<<0), /* Timer/Counter D1 Overflow */ - DMA_CH_TRIGSRC_TCD1_ERR_gc = (0x67<<0), /* Timer/Counter D1 Error */ - DMA_CH_TRIGSRC_TCD1_CCA_gc = (0x68<<0), /* Timer/Counter D1 Compare or Capture A */ - DMA_CH_TRIGSRC_TCD1_CCB_gc = (0x69<<0), /* Timer/Counter D1 Compare or Capture B */ - DMA_CH_TRIGSRC_SPID_gc = (0x6A<<0), /* SPI D Transfer Complete */ - DMA_CH_TRIGSRC_USARTD0_RXC_gc = (0x6B<<0), /* USART D0 Receive Complete */ - DMA_CH_TRIGSRC_USARTD0_DRE_gc = (0x6C<<0), /* USART D0 Data Register Empty */ - DMA_CH_TRIGSRC_USARTD1_RXC_gc = (0x6E<<0), /* USART D1 Receive Complete */ - DMA_CH_TRIGSRC_USARTD1_DRE_gc = (0x6F<<0), /* USART D1 Data Register Empty */ - DMA_CH_TRIGSRC_TCE0_OVF_gc = (0x80<<0), /* Timer/Counter E0 Overflow */ - DMA_CH_TRIGSRC_TCE0_ERR_gc = (0x81<<0), /* Timer/Counter E0 Error */ - DMA_CH_TRIGSRC_TCE0_CCA_gc = (0x82<<0), /* Timer/Counter E0 Compare or Capture A */ - DMA_CH_TRIGSRC_TCE0_CCB_gc = (0x83<<0), /* Timer/Counter E0 Compare or Capture B */ - DMA_CH_TRIGSRC_TCE0_CCC_gc = (0x84<<0), /* Timer/Counter E0 Compare or Capture C */ - DMA_CH_TRIGSRC_TCE0_CCD_gc = (0x85<<0), /* Timer/Counter E0 Compare or Capture D */ - DMA_CH_TRIGSRC_TCE1_OVF_gc = (0x86<<0), /* Timer/Counter E1 Overflow */ - DMA_CH_TRIGSRC_TCE1_ERR_gc = (0x87<<0), /* Timer/Counter E1 Error */ - DMA_CH_TRIGSRC_TCE1_CCA_gc = (0x88<<0), /* Timer/Counter E1 Compare or Capture A */ - DMA_CH_TRIGSRC_TCE1_CCB_gc = (0x89<<0), /* Timer/Counter E1 Compare or Capture B */ - DMA_CH_TRIGSRC_SPIE_gc = (0x8A<<0), /* SPI E Transfer Complete */ - DMA_CH_TRIGSRC_USARTE0_RXC_gc = (0x8B<<0), /* USART E0 Receive Complete */ - DMA_CH_TRIGSRC_USARTE0_DRE_gc = (0x8C<<0), /* USART E0 Data Register Empty */ - DMA_CH_TRIGSRC_USARTE1_RXC_gc = (0x8E<<0), /* USART E1 Receive Complete */ - DMA_CH_TRIGSRC_USARTE1_DRE_gc = (0x8F<<0), /* USART E1 Data Register Empty */ - DMA_CH_TRIGSRC_TCF0_OVF_gc = (0xA0<<0), /* Timer/Counter F0 Overflow */ - DMA_CH_TRIGSRC_TCF0_ERR_gc = (0xA1<<0), /* Timer/Counter F0 Error */ - DMA_CH_TRIGSRC_TCF0_CCA_gc = (0xA2<<0), /* Timer/Counter F0 Compare or Capture A */ - DMA_CH_TRIGSRC_TCF0_CCB_gc = (0xA3<<0), /* Timer/Counter F0 Compare or Capture B */ - DMA_CH_TRIGSRC_TCF0_CCC_gc = (0xA4<<0), /* Timer/Counter F0 Compare or Capture C */ - DMA_CH_TRIGSRC_TCF0_CCD_gc = (0xA5<<0), /* Timer/Counter F0 Compare or Capture D */ - DMA_CH_TRIGSRC_TCF1_OVF_gc = (0xA6<<0), /* Timer/Counter F1 Overflow */ - DMA_CH_TRIGSRC_TCF1_ERR_gc = (0xA7<<0), /* Timer/Counter F1 Error */ - DMA_CH_TRIGSRC_TCF1_CCA_gc = (0xA8<<0), /* Timer/Counter F1 Compare or Capture A */ - DMA_CH_TRIGSRC_TCF1_CCB_gc = (0xA9<<0), /* Timer/Counter F1 Compare or Capture B */ - DMA_CH_TRIGSRC_SPIF_gc = (0xAA<<0), /* SPI F Transfer Complete */ - DMA_CH_TRIGSRC_USARTF0_RXC_gc = (0xAB<<0), /* USART F0 Receive Complete */ - DMA_CH_TRIGSRC_USARTF0_DRE_gc = (0xAC<<0), /* USART F0 Data Register Empty */ - DMA_CH_TRIGSRC_USARTF1_RXC_gc = (0xAE<<0), /* USART F1 Receive Complete */ - DMA_CH_TRIGSRC_USARTF1_DRE_gc = (0xAF<<0), /* USART F1 Data Register Empty */ -} DMA_CH_TRIGSRC_t; - -/* Double buffering mode */ -typedef enum DMA_DBUFMODE_enum -{ - DMA_DBUFMODE_DISABLED_gc = (0x00<<2), /* Double buffering disabled */ - DMA_DBUFMODE_CH01_gc = (0x01<<2), /* Double buffering enabled on channel 0/1 */ - DMA_DBUFMODE_CH23_gc = (0x02<<2), /* Double buffering enabled on channel 2/3 */ - DMA_DBUFMODE_CH01CH23_gc = (0x03<<2), /* Double buffering enabled on ch. 0/1 and ch. 2/3 */ -} DMA_DBUFMODE_t; - -/* Priority mode */ -typedef enum DMA_PRIMODE_enum -{ - DMA_PRIMODE_RR0123_gc = (0x00<<0), /* Round Robin */ - DMA_PRIMODE_CH0RR123_gc = (0x01<<0), /* Channel 0 > Round Robin on channel 1/2/3 */ - DMA_PRIMODE_CH01RR23_gc = (0x02<<0), /* Channel 0 > channel 1 > Round Robin on channel 2/3 */ - DMA_PRIMODE_CH0123_gc = (0x03<<0), /* Channel 0 > channel 1 > channel 2 > channel 3 */ -} DMA_PRIMODE_t; - -/* Interrupt level */ -typedef enum DMA_CH_ERRINTLVL_enum -{ - DMA_CH_ERRINTLVL_OFF_gc = (0x00<<2), /* Interrupt disabled */ - DMA_CH_ERRINTLVL_LO_gc = (0x01<<2), /* Low level */ - DMA_CH_ERRINTLVL_MED_gc = (0x02<<2), /* Medium level */ - DMA_CH_ERRINTLVL_HI_gc = (0x03<<2), /* High level */ -} DMA_CH_ERRINTLVL_t; - -/* Interrupt level */ -typedef enum DMA_CH_TRNINTLVL_enum -{ - DMA_CH_TRNINTLVL_OFF_gc = (0x00<<0), /* Interrupt disabled */ - DMA_CH_TRNINTLVL_LO_gc = (0x01<<0), /* Low level */ - DMA_CH_TRNINTLVL_MED_gc = (0x02<<0), /* Medium level */ - DMA_CH_TRNINTLVL_HI_gc = (0x03<<0), /* High level */ -} DMA_CH_TRNINTLVL_t; - - -/* --------------------------------------------------------------------------- -EVSYS - Event System --------------------------------------------------------------------------- -*/ - -/* Event System */ -typedef struct EVSYS_struct -{ - register8_t CH0MUX; /* Event Channel 0 Multiplexer */ - register8_t CH1MUX; /* Event Channel 1 Multiplexer */ - register8_t CH2MUX; /* Event Channel 2 Multiplexer */ - register8_t CH3MUX; /* Event Channel 3 Multiplexer */ - register8_t CH4MUX; /* Event Channel 4 Multiplexer */ - register8_t CH5MUX; /* Event Channel 5 Multiplexer */ - register8_t CH6MUX; /* Event Channel 6 Multiplexer */ - register8_t CH7MUX; /* Event Channel 7 Multiplexer */ - register8_t CH0CTRL; /* Channel 0 Control Register */ - register8_t CH1CTRL; /* Channel 1 Control Register */ - register8_t CH2CTRL; /* Channel 2 Control Register */ - register8_t CH3CTRL; /* Channel 3 Control Register */ - register8_t CH4CTRL; /* Channel 4 Control Register */ - register8_t CH5CTRL; /* Channel 5 Control Register */ - register8_t CH6CTRL; /* Channel 6 Control Register */ - register8_t CH7CTRL; /* Channel 7 Control Register */ - register8_t STROBE; /* Event Strobe */ - register8_t DATA; /* Event Data */ -} EVSYS_t; - -/* Quadrature Decoder Index Recognition Mode */ -typedef enum EVSYS_QDIRM_enum -{ - EVSYS_QDIRM_00_gc = (0x00<<5), /* QDPH0 = 0, QDPH90 = 0 */ - EVSYS_QDIRM_01_gc = (0x01<<5), /* QDPH0 = 0, QDPH90 = 1 */ - EVSYS_QDIRM_10_gc = (0x02<<5), /* QDPH0 = 1, QDPH90 = 0 */ - EVSYS_QDIRM_11_gc = (0x03<<5), /* QDPH0 = 1, QDPH90 = 1 */ -} EVSYS_QDIRM_t; - -/* Digital filter coefficient */ -typedef enum EVSYS_DIGFILT_enum -{ - EVSYS_DIGFILT_1SAMPLE_gc = (0x00<<0), /* 1 SAMPLE */ - EVSYS_DIGFILT_2SAMPLES_gc = (0x01<<0), /* 2 SAMPLES */ - EVSYS_DIGFILT_3SAMPLES_gc = (0x02<<0), /* 3 SAMPLES */ - EVSYS_DIGFILT_4SAMPLES_gc = (0x03<<0), /* 4 SAMPLES */ - EVSYS_DIGFILT_5SAMPLES_gc = (0x04<<0), /* 5 SAMPLES */ - EVSYS_DIGFILT_6SAMPLES_gc = (0x05<<0), /* 6 SAMPLES */ - EVSYS_DIGFILT_7SAMPLES_gc = (0x06<<0), /* 7 SAMPLES */ - EVSYS_DIGFILT_8SAMPLES_gc = (0x07<<0), /* 8 SAMPLES */ -} EVSYS_DIGFILT_t; - -/* Event Channel multiplexer input selection */ -typedef enum EVSYS_CHMUX_enum -{ - EVSYS_CHMUX_OFF_gc = (0x00<<0), /* Off */ - EVSYS_CHMUX_RTC_OVF_gc = (0x08<<0), /* RTC Overflow */ - EVSYS_CHMUX_RTC_CMP_gc = (0x09<<0), /* RTC Compare Match */ - EVSYS_CHMUX_ACA_CH0_gc = (0x10<<0), /* Analog Comparator A Channel 0 */ - EVSYS_CHMUX_ACA_CH1_gc = (0x11<<0), /* Analog Comparator A Channel 1 */ - EVSYS_CHMUX_ACA_WIN_gc = (0x12<<0), /* Analog Comparator A Window */ - EVSYS_CHMUX_ACB_CH0_gc = (0x13<<0), /* Analog Comparator B Channel 0 */ - EVSYS_CHMUX_ACB_CH1_gc = (0x14<<0), /* Analog Comparator B Channel 1 */ - EVSYS_CHMUX_ACB_WIN_gc = (0x15<<0), /* Analog Comparator B Window */ - EVSYS_CHMUX_ADCA_CH0_gc = (0x20<<0), /* ADC A Channel 0 */ - EVSYS_CHMUX_ADCA_CH1_gc = (0x21<<0), /* ADC A Channel 1 */ - EVSYS_CHMUX_ADCA_CH2_gc = (0x22<<0), /* ADC A Channel 2 */ - EVSYS_CHMUX_ADCA_CH3_gc = (0x23<<0), /* ADC A Channel 3 */ - EVSYS_CHMUX_ADCB_CH0_gc = (0x24<<0), /* ADC B Channel 0 */ - EVSYS_CHMUX_ADCB_CH1_gc = (0x25<<0), /* ADC B Channel 1 */ - EVSYS_CHMUX_ADCB_CH2_gc = (0x26<<0), /* ADC B Channel 2 */ - EVSYS_CHMUX_ADCB_CH3_gc = (0x27<<0), /* ADC B Channel 3 */ - EVSYS_CHMUX_PORTA_PIN0_gc = (0x50<<0), /* Port A, Pin0 */ - EVSYS_CHMUX_PORTA_PIN1_gc = (0x51<<0), /* Port A, Pin1 */ - EVSYS_CHMUX_PORTA_PIN2_gc = (0x52<<0), /* Port A, Pin2 */ - EVSYS_CHMUX_PORTA_PIN3_gc = (0x53<<0), /* Port A, Pin3 */ - EVSYS_CHMUX_PORTA_PIN4_gc = (0x54<<0), /* Port A, Pin4 */ - EVSYS_CHMUX_PORTA_PIN5_gc = (0x55<<0), /* Port A, Pin5 */ - EVSYS_CHMUX_PORTA_PIN6_gc = (0x56<<0), /* Port A, Pin6 */ - EVSYS_CHMUX_PORTA_PIN7_gc = (0x57<<0), /* Port A, Pin7 */ - EVSYS_CHMUX_PORTB_PIN0_gc = (0x58<<0), /* Port B, Pin0 */ - EVSYS_CHMUX_PORTB_PIN1_gc = (0x59<<0), /* Port B, Pin1 */ - EVSYS_CHMUX_PORTB_PIN2_gc = (0x5A<<0), /* Port B, Pin2 */ - EVSYS_CHMUX_PORTB_PIN3_gc = (0x5B<<0), /* Port B, Pin3 */ - EVSYS_CHMUX_PORTB_PIN4_gc = (0x5C<<0), /* Port B, Pin4 */ - EVSYS_CHMUX_PORTB_PIN5_gc = (0x5D<<0), /* Port B, Pin5 */ - EVSYS_CHMUX_PORTB_PIN6_gc = (0x5E<<0), /* Port B, Pin6 */ - EVSYS_CHMUX_PORTB_PIN7_gc = (0x5F<<0), /* Port B, Pin7 */ - EVSYS_CHMUX_PORTC_PIN0_gc = (0x60<<0), /* Port C, Pin0 */ - EVSYS_CHMUX_PORTC_PIN1_gc = (0x61<<0), /* Port C, Pin1 */ - EVSYS_CHMUX_PORTC_PIN2_gc = (0x62<<0), /* Port C, Pin2 */ - EVSYS_CHMUX_PORTC_PIN3_gc = (0x63<<0), /* Port C, Pin3 */ - EVSYS_CHMUX_PORTC_PIN4_gc = (0x64<<0), /* Port C, Pin4 */ - EVSYS_CHMUX_PORTC_PIN5_gc = (0x65<<0), /* Port C, Pin5 */ - EVSYS_CHMUX_PORTC_PIN6_gc = (0x66<<0), /* Port C, Pin6 */ - EVSYS_CHMUX_PORTC_PIN7_gc = (0x67<<0), /* Port C, Pin7 */ - EVSYS_CHMUX_PORTD_PIN0_gc = (0x68<<0), /* Port D, Pin0 */ - EVSYS_CHMUX_PORTD_PIN1_gc = (0x69<<0), /* Port D, Pin1 */ - EVSYS_CHMUX_PORTD_PIN2_gc = (0x6A<<0), /* Port D, Pin2 */ - EVSYS_CHMUX_PORTD_PIN3_gc = (0x6B<<0), /* Port D, Pin3 */ - EVSYS_CHMUX_PORTD_PIN4_gc = (0x6C<<0), /* Port D, Pin4 */ - EVSYS_CHMUX_PORTD_PIN5_gc = (0x6D<<0), /* Port D, Pin5 */ - EVSYS_CHMUX_PORTD_PIN6_gc = (0x6E<<0), /* Port D, Pin6 */ - EVSYS_CHMUX_PORTD_PIN7_gc = (0x6F<<0), /* Port D, Pin7 */ - EVSYS_CHMUX_PORTE_PIN0_gc = (0x70<<0), /* Port E, Pin0 */ - EVSYS_CHMUX_PORTE_PIN1_gc = (0x71<<0), /* Port E, Pin1 */ - EVSYS_CHMUX_PORTE_PIN2_gc = (0x72<<0), /* Port E, Pin2 */ - EVSYS_CHMUX_PORTE_PIN3_gc = (0x73<<0), /* Port E, Pin3 */ - EVSYS_CHMUX_PORTE_PIN4_gc = (0x74<<0), /* Port E, Pin4 */ - EVSYS_CHMUX_PORTE_PIN5_gc = (0x75<<0), /* Port E, Pin5 */ - EVSYS_CHMUX_PORTE_PIN6_gc = (0x76<<0), /* Port E, Pin6 */ - EVSYS_CHMUX_PORTE_PIN7_gc = (0x77<<0), /* Port E, Pin7 */ - EVSYS_CHMUX_PORTF_PIN0_gc = (0x78<<0), /* Port F, Pin0 */ - EVSYS_CHMUX_PORTF_PIN1_gc = (0x79<<0), /* Port F, Pin1 */ - EVSYS_CHMUX_PORTF_PIN2_gc = (0x7A<<0), /* Port F, Pin2 */ - EVSYS_CHMUX_PORTF_PIN3_gc = (0x7B<<0), /* Port F, Pin3 */ - EVSYS_CHMUX_PORTF_PIN4_gc = (0x7C<<0), /* Port F, Pin4 */ - EVSYS_CHMUX_PORTF_PIN5_gc = (0x7D<<0), /* Port F, Pin5 */ - EVSYS_CHMUX_PORTF_PIN6_gc = (0x7E<<0), /* Port F, Pin6 */ - EVSYS_CHMUX_PORTF_PIN7_gc = (0x7F<<0), /* Port F, Pin7 */ - EVSYS_CHMUX_PRESCALER_1_gc = (0x80<<0), /* Prescaler, divide by 1 */ - EVSYS_CHMUX_PRESCALER_2_gc = (0x81<<0), /* Prescaler, divide by 2 */ - EVSYS_CHMUX_PRESCALER_4_gc = (0x82<<0), /* Prescaler, divide by 4 */ - EVSYS_CHMUX_PRESCALER_8_gc = (0x83<<0), /* Prescaler, divide by 8 */ - EVSYS_CHMUX_PRESCALER_16_gc = (0x84<<0), /* Prescaler, divide by 16 */ - EVSYS_CHMUX_PRESCALER_32_gc = (0x85<<0), /* Prescaler, divide by 32 */ - EVSYS_CHMUX_PRESCALER_64_gc = (0x86<<0), /* Prescaler, divide by 64 */ - EVSYS_CHMUX_PRESCALER_128_gc = (0x87<<0), /* Prescaler, divide by 128 */ - EVSYS_CHMUX_PRESCALER_256_gc = (0x88<<0), /* Prescaler, divide by 256 */ - EVSYS_CHMUX_PRESCALER_512_gc = (0x89<<0), /* Prescaler, divide by 512 */ - EVSYS_CHMUX_PRESCALER_1024_gc = (0x8A<<0), /* Prescaler, divide by 1024 */ - EVSYS_CHMUX_PRESCALER_2048_gc = (0x8B<<0), /* Prescaler, divide by 2048 */ - EVSYS_CHMUX_PRESCALER_4096_gc = (0x8C<<0), /* Prescaler, divide by 4096 */ - EVSYS_CHMUX_PRESCALER_8192_gc = (0x8D<<0), /* Prescaler, divide by 8192 */ - EVSYS_CHMUX_PRESCALER_16384_gc = (0x8E<<0), /* Prescaler, divide by 16384 */ - EVSYS_CHMUX_PRESCALER_32768_gc = (0x8F<<0), /* Prescaler, divide by 32768 */ - EVSYS_CHMUX_TCC0_OVF_gc = (0xC0<<0), /* Timer/Counter C0 Overflow */ - EVSYS_CHMUX_TCC0_ERR_gc = (0xC1<<0), /* Timer/Counter C0 Error */ - EVSYS_CHMUX_TCC0_CCA_gc = (0xC4<<0), /* Timer/Counter C0 Compare or Capture A */ - EVSYS_CHMUX_TCC0_CCB_gc = (0xC5<<0), /* Timer/Counter C0 Compare or Capture B */ - EVSYS_CHMUX_TCC0_CCC_gc = (0xC6<<0), /* Timer/Counter C0 Compare or Capture C */ - EVSYS_CHMUX_TCC0_CCD_gc = (0xC7<<0), /* Timer/Counter C0 Compare or Capture D */ - EVSYS_CHMUX_TCC1_OVF_gc = (0xC8<<0), /* Timer/Counter C1 Overflow */ - EVSYS_CHMUX_TCC1_ERR_gc = (0xC9<<0), /* Timer/Counter C1 Error */ - EVSYS_CHMUX_TCC1_CCA_gc = (0xCC<<0), /* Timer/Counter C1 Compare or Capture A */ - EVSYS_CHMUX_TCC1_CCB_gc = (0xCD<<0), /* Timer/Counter C1 Compare or Capture B */ - EVSYS_CHMUX_TCD0_OVF_gc = (0xD0<<0), /* Timer/Counter D0 Overflow */ - EVSYS_CHMUX_TCD0_ERR_gc = (0xD1<<0), /* Timer/Counter D0 Error */ - EVSYS_CHMUX_TCD0_CCA_gc = (0xD4<<0), /* Timer/Counter D0 Compare or Capture A */ - EVSYS_CHMUX_TCD0_CCB_gc = (0xD5<<0), /* Timer/Counter D0 Compare or Capture B */ - EVSYS_CHMUX_TCD0_CCC_gc = (0xD6<<0), /* Timer/Counter D0 Compare or Capture C */ - EVSYS_CHMUX_TCD0_CCD_gc = (0xD7<<0), /* Timer/Counter D0 Compare or Capture D */ - EVSYS_CHMUX_TCD1_OVF_gc = (0xD8<<0), /* Timer/Counter D1 Overflow */ - EVSYS_CHMUX_TCD1_ERR_gc = (0xD9<<0), /* Timer/Counter D1 Error */ - EVSYS_CHMUX_TCD1_CCA_gc = (0xDC<<0), /* Timer/Counter D1 Compare or Capture A */ - EVSYS_CHMUX_TCD1_CCB_gc = (0xDD<<0), /* Timer/Counter D1 Compare or Capture B */ - EVSYS_CHMUX_TCE0_OVF_gc = (0xE0<<0), /* Timer/Counter E0 Overflow */ - EVSYS_CHMUX_TCE0_ERR_gc = (0xE1<<0), /* Timer/Counter E0 Error */ - EVSYS_CHMUX_TCE0_CCA_gc = (0xE4<<0), /* Timer/Counter E0 Compare or Capture A */ - EVSYS_CHMUX_TCE0_CCB_gc = (0xE5<<0), /* Timer/Counter E0 Compare or Capture B */ - EVSYS_CHMUX_TCE0_CCC_gc = (0xE6<<0), /* Timer/Counter E0 Compare or Capture C */ - EVSYS_CHMUX_TCE0_CCD_gc = (0xE7<<0), /* Timer/Counter E0 Compare or Capture D */ - EVSYS_CHMUX_TCE1_OVF_gc = (0xE8<<0), /* Timer/Counter E1 Overflow */ - EVSYS_CHMUX_TCE1_ERR_gc = (0xE9<<0), /* Timer/Counter E1 Error */ - EVSYS_CHMUX_TCE1_CCA_gc = (0xEC<<0), /* Timer/Counter E1 Compare or Capture A */ - EVSYS_CHMUX_TCE1_CCB_gc = (0xED<<0), /* Timer/Counter E1 Compare or Capture B */ - EVSYS_CHMUX_TCF0_OVF_gc = (0xF0<<0), /* Timer/Counter F0 Overflow */ - EVSYS_CHMUX_TCF0_ERR_gc = (0xF1<<0), /* Timer/Counter F0 Error */ - EVSYS_CHMUX_TCF0_CCA_gc = (0xF4<<0), /* Timer/Counter F0 Compare or Capture A */ - EVSYS_CHMUX_TCF0_CCB_gc = (0xF5<<0), /* Timer/Counter F0 Compare or Capture B */ - EVSYS_CHMUX_TCF0_CCC_gc = (0xF6<<0), /* Timer/Counter F0 Compare or Capture C */ - EVSYS_CHMUX_TCF0_CCD_gc = (0xF7<<0), /* Timer/Counter F0 Compare or Capture D */ - EVSYS_CHMUX_TCF1_OVF_gc = (0xF8<<0), /* Timer/Counter F1 Overflow */ - EVSYS_CHMUX_TCF1_ERR_gc = (0xF9<<0), /* Timer/Counter F1 Error */ - EVSYS_CHMUX_TCF1_CCA_gc = (0xFC<<0), /* Timer/Counter F1 Compare or Capture A */ - EVSYS_CHMUX_TCF1_CCB_gc = (0xFD<<0), /* Timer/Counter F1 Compare or Capture B */ -} EVSYS_CHMUX_t; - - -/* --------------------------------------------------------------------------- -NVM - Non Volatile Memory Controller --------------------------------------------------------------------------- -*/ - -/* Non-volatile Memory Controller */ -typedef struct NVM_struct -{ - register8_t ADDR0; /* Address Register 0 */ - register8_t ADDR1; /* Address Register 1 */ - register8_t ADDR2; /* Address Register 2 */ - register8_t reserved_0x03; - register8_t DATA0; /* Data Register 0 */ - register8_t DATA1; /* Data Register 1 */ - register8_t DATA2; /* Data Register 2 */ - register8_t reserved_0x07; - register8_t reserved_0x08; - register8_t reserved_0x09; - register8_t CMD; /* Command */ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t INTCTRL; /* Interrupt Control */ - register8_t reserved_0x0E; - register8_t STATUS; /* Status */ - register8_t LOCKBITS; /* Lock Bits */ -} NVM_t; - -/* --------------------------------------------------------------------------- -NVM - Non Volatile Memory Controller --------------------------------------------------------------------------- -*/ - -/* Lock Bits */ -typedef struct NVM_LOCKBITS_struct -{ - register8_t LOCKBITS; /* Lock Bits */ -} NVM_LOCKBITS_t; - -/* --------------------------------------------------------------------------- -NVM - Non Volatile Memory Controller --------------------------------------------------------------------------- -*/ - -/* Fuses */ -typedef struct NVM_FUSES_struct -{ - register8_t FUSEBYTE0; /* JTAG User ID */ - register8_t FUSEBYTE1; /* Watchdog Configuration */ - register8_t FUSEBYTE2; /* Reset Configuration */ - register8_t reserved_0x03; - register8_t FUSEBYTE4; /* Start-up Configuration */ - register8_t FUSEBYTE5; /* EESAVE and BOD Level */ -} NVM_FUSES_t; - -/* --------------------------------------------------------------------------- -NVM - Non Volatile Memory Controller --------------------------------------------------------------------------- -*/ - -/* Production Signatures */ -typedef struct NVM_PROD_SIGNATURES_struct -{ - register8_t RCOSC2M; /* RCOSC 2MHz Calibration Value */ - register8_t reserved_0x01; - register8_t RCOSC32K; /* RCOSC 32kHz Calibration Value */ - register8_t RCOSC32M; /* RCOSC 32MHz Calibration Value */ - register8_t reserved_0x04; - register8_t reserved_0x05; - register8_t reserved_0x06; - register8_t reserved_0x07; - register8_t LOTNUM0; /* Lot Number Byte 0, ASCII */ - register8_t LOTNUM1; /* Lot Number Byte 1, ASCII */ - register8_t LOTNUM2; /* Lot Number Byte 2, ASCII */ - register8_t LOTNUM3; /* Lot Number Byte 3, ASCII */ - register8_t LOTNUM4; /* Lot Number Byte 4, ASCII */ - register8_t LOTNUM5; /* Lot Number Byte 5, ASCII */ - register8_t reserved_0x0E; - register8_t reserved_0x0F; - register8_t WAFNUM; /* Wafer Number */ - register8_t reserved_0x11; - register8_t COORDX0; /* Wafer Coordinate X Byte 0 */ - register8_t COORDX1; /* Wafer Coordinate X Byte 1 */ - register8_t COORDY0; /* Wafer Coordinate Y Byte 0 */ - register8_t COORDY1; /* Wafer Coordinate Y Byte 1 */ - register8_t reserved_0x16; - register8_t reserved_0x17; - register8_t reserved_0x18; - register8_t reserved_0x19; - register8_t reserved_0x1A; - register8_t reserved_0x1B; - register8_t reserved_0x1C; - register8_t reserved_0x1D; - register8_t reserved_0x1E; - register8_t reserved_0x1F; - register8_t ADCACAL0; /* ADCA Calibration Byte 0 */ - register8_t ADCACAL1; /* ADCA Calibration Byte 1 */ - register8_t reserved_0x22; - register8_t reserved_0x23; - register8_t ADCBCAL0; /* ADCB Calibration Byte 0 */ - register8_t ADCBCAL1; /* ADCB Calibration Byte 1 */ - register8_t reserved_0x26; - register8_t reserved_0x27; - register8_t reserved_0x28; - register8_t reserved_0x29; - register8_t reserved_0x2A; - register8_t reserved_0x2B; - register8_t reserved_0x2C; - register8_t reserved_0x2D; - register8_t TEMPSENSE0; /* Temperature Sensor Calibration Byte 0 */ - register8_t TEMPSENSE1; /* Temperature Sensor Calibration Byte 0 */ - register8_t DACAOFFCAL; /* DACA Calibration Byte 0 */ - register8_t DACACAINCAL; /* DACA Calibration Byte 1 */ - register8_t DACBOFFCAL; /* DACB Calibration Byte 0 */ - register8_t DACBGAINCAL; /* DACB Calibration Byte 1 */ - register8_t reserved_0x34; - register8_t reserved_0x35; - register8_t reserved_0x36; - register8_t reserved_0x37; - register8_t reserved_0x38; - register8_t reserved_0x39; - register8_t reserved_0x3A; - register8_t reserved_0x3B; - register8_t reserved_0x3C; - register8_t reserved_0x3D; - register8_t reserved_0x3E; -} NVM_PROD_SIGNATURES_t; - -/* NVM Command */ -typedef enum NVM_CMD_enum -{ - NVM_CMD_NO_OPERATION_gc = (0x00<<0), /* Noop/Ordinary LPM */ - NVM_CMD_READ_CALIB_ROW_gc = (0x02<<0), /* Read calibration row */ - NVM_CMD_READ_USER_SIG_ROW_gc = (0x01<<0), /* Read user signature row */ - NVM_CMD_READ_EEPROM_gc = (0x06<<0), /* Read EEPROM */ - NVM_CMD_READ_FUSES_gc = (0x07<<0), /* Read fuse byte */ - NVM_CMD_WRITE_LOCK_BITS_gc = (0x08<<0), /* Write lock bits */ - NVM_CMD_ERASE_USER_SIG_ROW_gc = (0x18<<0), /* Erase user signature row */ - NVM_CMD_WRITE_USER_SIG_ROW_gc = (0x1A<<0), /* Write user signature row */ - NVM_CMD_ERASE_APP_gc = (0x20<<0), /* Erase Application Section */ - NVM_CMD_ERASE_APP_PAGE_gc = (0x22<<0), /* Erase Application Section page */ - NVM_CMD_LOAD_FLASH_BUFFER_gc = (0x23<<0), /* Load Flash page buffer */ - NVM_CMD_WRITE_APP_PAGE_gc = (0x24<<0), /* Write Application Section page */ - NVM_CMD_ERASE_WRITE_APP_PAGE_gc = (0x25<<0), /* Erase-and-write Application Section page */ - NVM_CMD_ERASE_FLASH_BUFFER_gc = (0x26<<0), /* Erase/flush Flash page buffer */ - NVM_CMD_ERASE_BOOT_PAGE_gc = (0x2A<<0), /* Erase Boot Section page */ - NVM_CMD_WRITE_BOOT_PAGE_gc = (0x2C<<0), /* Write Boot Section page */ - NVM_CMD_ERASE_WRITE_BOOT_PAGE_gc = (0x2D<<0), /* Erase-and-write Boot Section page */ - NVM_CMD_ERASE_EEPROM_gc = (0x30<<0), /* Erase EEPROM */ - NVM_CMD_ERASE_EEPROM_PAGE_gc = (0x32<<0), /* Erase EEPROM page */ - NVM_CMD_LOAD_EEPROM_BUFFER_gc = (0x33<<0), /* Load EEPROM page buffer */ - NVM_CMD_WRITE_EEPROM_PAGE_gc = (0x34<<0), /* Write EEPROM page */ - NVM_CMD_ERASE_WRITE_EEPROM_PAGE_gc = (0x35<<0), /* Erase-and-write EEPROM page */ - NVM_CMD_ERASE_EEPROM_BUFFER_gc = (0x36<<0), /* Erase/flush EEPROM page buffer */ - NVM_CMD_APP_CRC_gc = (0x38<<0), /* Generate Application section CRC */ - NVM_CMD_BOOT_CRC_gc = (0x39<<0), /* Generate Boot Section CRC */ - NVM_CMD_FLASH_RANGE_CRC_gc = (0x3A<<0), /* Generate Flash Range CRC */ -} NVM_CMD_t; - -/* SPM ready interrupt level */ -typedef enum NVM_SPMLVL_enum -{ - NVM_SPMLVL_OFF_gc = (0x00<<2), /* Interrupt disabled */ - NVM_SPMLVL_LO_gc = (0x01<<2), /* Low level */ - NVM_SPMLVL_MED_gc = (0x02<<2), /* Medium level */ - NVM_SPMLVL_HI_gc = (0x03<<2), /* High level */ -} NVM_SPMLVL_t; - -/* EEPROM ready interrupt level */ -typedef enum NVM_EELVL_enum -{ - NVM_EELVL_OFF_gc = (0x00<<0), /* Interrupt disabled */ - NVM_EELVL_LO_gc = (0x01<<0), /* Low level */ - NVM_EELVL_MED_gc = (0x02<<0), /* Medium level */ - NVM_EELVL_HI_gc = (0x03<<0), /* High level */ -} NVM_EELVL_t; - -/* Boot lock bits - boot setcion */ -typedef enum NVM_BLBB_enum -{ - NVM_BLBB_NOLOCK_gc = (0x03<<6), /* No locks */ - NVM_BLBB_WLOCK_gc = (0x02<<6), /* Write not allowed */ - NVM_BLBB_RLOCK_gc = (0x01<<6), /* Read not allowed */ - NVM_BLBB_RWLOCK_gc = (0x00<<6), /* Read and write not allowed */ -} NVM_BLBB_t; - -/* Boot lock bits - application section */ -typedef enum NVM_BLBA_enum -{ - NVM_BLBA_NOLOCK_gc = (0x03<<4), /* No locks */ - NVM_BLBA_WLOCK_gc = (0x02<<4), /* Write not allowed */ - NVM_BLBA_RLOCK_gc = (0x01<<4), /* Read not allowed */ - NVM_BLBA_RWLOCK_gc = (0x00<<4), /* Read and write not allowed */ -} NVM_BLBA_t; - -/* Boot lock bits - application table section */ -typedef enum NVM_BLBAT_enum -{ - NVM_BLBAT_NOLOCK_gc = (0x03<<2), /* No locks */ - NVM_BLBAT_WLOCK_gc = (0x02<<2), /* Write not allowed */ - NVM_BLBAT_RLOCK_gc = (0x01<<2), /* Read not allowed */ - NVM_BLBAT_RWLOCK_gc = (0x00<<2), /* Read and write not allowed */ -} NVM_BLBAT_t; - -/* Lock bits */ -typedef enum NVM_LB_enum -{ - NVM_LB_NOLOCK_gc = (0x03<<0), /* No locks */ - NVM_LB_WLOCK_gc = (0x02<<0), /* Write not allowed */ - NVM_LB_RWLOCK_gc = (0x00<<0), /* Read and write not allowed */ -} NVM_LB_t; - -/* Boot Loader Section Reset Vector */ -typedef enum BOOTRST_enum -{ - BOOTRST_BOOTLDR_gc = (0x00<<6), /* Boot Loader Reset */ - BOOTRST_APPLICATION_gc = (0x01<<6), /* Application Reset */ -} BOOTRST_t; - -/* BOD operation */ -typedef enum BOD_enum -{ - BOD_INSAMPLEDMODE_gc = (0x01<<2), /* BOD enabled in sampled mode */ - BOD_CONTINOUSLY_gc = (0x02<<2), /* BOD enabled continuously */ - BOD_DISABLED_gc = (0x03<<2), /* BOD Disabled */ -} BOD_t; - -/* Watchdog (Window) Timeout Period */ -typedef enum WD_enum -{ - WD_8CLK_gc = (0x00<<4), /* 8 cycles (8ms @ 3.3V) */ - WD_16CLK_gc = (0x01<<4), /* 16 cycles (16ms @ 3.3V) */ - WD_32CLK_gc = (0x02<<4), /* 32 cycles (32ms @ 3.3V) */ - WD_64CLK_gc = (0x03<<4), /* 64 cycles (64ms @ 3.3V) */ - WD_128CLK_gc = (0x04<<4), /* 128 cycles (0.125s @ 3.3V) */ - WD_256CLK_gc = (0x05<<4), /* 256 cycles (0.25s @ 3.3V) */ - WD_512CLK_gc = (0x06<<4), /* 512 cycles (0.5s @ 3.3V) */ - WD_1KCLK_gc = (0x07<<4), /* 1K cycles (1s @ 3.3V) */ - WD_2KCLK_gc = (0x08<<4), /* 2K cycles (2s @ 3.3V) */ - WD_4KCLK_gc = (0x09<<4), /* 4K cycles (4s @ 3.3V) */ - WD_8KCLK_gc = (0x0A<<4), /* 8K cycles (8s @ 3.3V) */ -} WD_t; - -/* Start-up Time */ -typedef enum SUT_enum -{ - SUT_0MS_gc = (0x03<<2), /* 0 ms */ - SUT_4MS_gc = (0x01<<2), /* 4 ms */ - SUT_64MS_gc = (0x00<<2), /* 64 ms */ -} SUT_t; - -/* Brown Out Detection Voltage Level */ -typedef enum BODLVL_enum -{ - BODLVL_1V6_gc = (0x07<<0), /* 1.6 V */ - BODLVL_1V8_gc = (0x06<<0), /* 1.8 V */ - BODLVL_2V0_gc = (0x05<<0), /* 2.0 V */ - BODLVL_2V2_gc = (0x04<<0), /* 2.2 V */ - BODLVL_2V4_gc = (0x03<<0), /* 2.4 V */ - BODLVL_2V7_gc = (0x02<<0), /* 2.7 V */ - BODLVL_2V9_gc = (0x01<<0), /* 2.9 V */ - BODLVL_3V2_gc = (0x00<<0), /* 3.2 V */ -} BODLVL_t; - - -/* --------------------------------------------------------------------------- -AC - Analog Comparator --------------------------------------------------------------------------- -*/ - -/* Analog Comparator */ -typedef struct AC_struct -{ - register8_t AC0CTRL; /* Comparator 0 Control */ - register8_t AC1CTRL; /* Comparator 1 Control */ - register8_t AC0MUXCTRL; /* Comparator 0 MUX Control */ - register8_t AC1MUXCTRL; /* Comparator 1 MUX Control */ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t WINCTRL; /* Window Mode Control */ - register8_t STATUS; /* Status */ -} AC_t; - -/* Interrupt mode */ -typedef enum AC_INTMODE_enum -{ - AC_INTMODE_BOTHEDGES_gc = (0x00<<6), /* Interrupt on both edges */ - AC_INTMODE_FALLING_gc = (0x02<<6), /* Interrupt on falling edge */ - AC_INTMODE_RISING_gc = (0x03<<6), /* Interrupt on rising edge */ -} AC_INTMODE_t; - -/* Interrupt level */ -typedef enum AC_INTLVL_enum -{ - AC_INTLVL_OFF_gc = (0x00<<4), /* Interrupt disabled */ - AC_INTLVL_LO_gc = (0x01<<4), /* Low level */ - AC_INTLVL_MED_gc = (0x02<<4), /* Medium level */ - AC_INTLVL_HI_gc = (0x03<<4), /* High level */ -} AC_INTLVL_t; - -/* Hysteresis mode selection */ -typedef enum AC_HYSMODE_enum -{ - AC_HYSMODE_NO_gc = (0x00<<1), /* No hysteresis */ - AC_HYSMODE_SMALL_gc = (0x01<<1), /* Small hysteresis */ - AC_HYSMODE_LARGE_gc = (0x02<<1), /* Large hysteresis */ -} AC_HYSMODE_t; - -/* Positive input multiplexer selection */ -typedef enum AC_MUXPOS_enum -{ - AC_MUXPOS_PIN0_gc = (0x00<<3), /* Pin 0 */ - AC_MUXPOS_PIN1_gc = (0x01<<3), /* Pin 1 */ - AC_MUXPOS_PIN2_gc = (0x02<<3), /* Pin 2 */ - AC_MUXPOS_PIN3_gc = (0x03<<3), /* Pin 3 */ - AC_MUXPOS_PIN4_gc = (0x04<<3), /* Pin 4 */ - AC_MUXPOS_PIN5_gc = (0x05<<3), /* Pin 5 */ - AC_MUXPOS_PIN6_gc = (0x06<<3), /* Pin 6 */ - AC_MUXPOS_DAC_gc = (0x07<<3), /* DAC output */ -} AC_MUXPOS_t; - -/* Negative input multiplexer selection */ -typedef enum AC_MUXNEG_enum -{ - AC_MUXNEG_PIN0_gc = (0x00<<0), /* Pin 0 */ - AC_MUXNEG_PIN1_gc = (0x01<<0), /* Pin 1 */ - AC_MUXNEG_PIN3_gc = (0x02<<0), /* Pin 3 */ - AC_MUXNEG_PIN5_gc = (0x03<<0), /* Pin 5 */ - AC_MUXNEG_PIN7_gc = (0x04<<0), /* Pin 7 */ - AC_MUXNEG_DAC_gc = (0x05<<0), /* DAC output */ - AC_MUXNEG_BANDGAP_gc = (0x06<<0), /* Bandgap Reference */ - AC_MUXNEG_SCALER_gc = (0x07<<0), /* Internal voltage scaler */ -} AC_MUXNEG_t; - -/* Windows interrupt mode */ -typedef enum AC_WINTMODE_enum -{ - AC_WINTMODE_ABOVE_gc = (0x00<<2), /* Interrupt on above window */ - AC_WINTMODE_INSIDE_gc = (0x01<<2), /* Interrupt on inside window */ - AC_WINTMODE_BELOW_gc = (0x02<<2), /* Interrupt on below window */ - AC_WINTMODE_OUTSIDE_gc = (0x03<<2), /* Interrupt on outside window */ -} AC_WINTMODE_t; - -/* Window interrupt level */ -typedef enum AC_WINTLVL_enum -{ - AC_WINTLVL_OFF_gc = (0x00<<0), /* Interrupt disabled */ - AC_WINTLVL_LO_gc = (0x01<<0), /* Low priority */ - AC_WINTLVL_MED_gc = (0x02<<0), /* Medium priority */ - AC_WINTLVL_HI_gc = (0x03<<0), /* High priority */ -} AC_WINTLVL_t; - -/* Window mode state */ -typedef enum AC_WSTATE_enum -{ - AC_WSTATE_ABOVE_gc = (0x00<<6), /* Signal above window */ - AC_WSTATE_INSIDE_gc = (0x01<<6), /* Signal inside window */ - AC_WSTATE_BELOW_gc = (0x02<<6), /* Signal below window */ -} AC_WSTATE_t; - - -/* --------------------------------------------------------------------------- -ADC - Analog/Digital Converter --------------------------------------------------------------------------- -*/ - -/* ADC Channel */ -typedef struct ADC_CH_struct -{ - register8_t CTRL; /* Control Register */ - register8_t MUXCTRL; /* MUX Control */ - register8_t INTCTRL; /* Channel Interrupt Control */ - register8_t INTFLAGS; /* Interrupt Flags */ - _WORDREGISTER(RES); /* Channel Result */ - register8_t reserved_0x6; - register8_t reserved_0x7; -} ADC_CH_t; - -/* --------------------------------------------------------------------------- -ADC - Analog/Digital Converter --------------------------------------------------------------------------- -*/ - -/* Analog-to-Digital Converter */ -typedef struct ADC_struct -{ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t REFCTRL; /* Reference Control */ - register8_t EVCTRL; /* Event Control */ - register8_t PRESCALER; /* Clock Prescaler */ - register8_t CALCTRL; /* Calibration Control Register */ - register8_t INTFLAGS; /* Interrupt Flags */ - register8_t reserved_0x07; - register8_t reserved_0x08; - register8_t reserved_0x09; - register8_t reserved_0x0A; - register8_t reserved_0x0B; - register8_t CALIB; /* Calibration Value */ - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t reserved_0x0F; - _WORDREGISTER(CH0RES); /* Channel 0 Result */ - _WORDREGISTER(CH1RES); /* Channel 1 Result */ - _WORDREGISTER(CH2RES); /* Channel 2 Result */ - _WORDREGISTER(CH3RES); /* Channel 3 Result */ - _WORDREGISTER(CMP); /* Compare Value */ - register8_t reserved_0x1A; - register8_t reserved_0x1B; - register8_t reserved_0x1C; - register8_t reserved_0x1D; - register8_t reserved_0x1E; - register8_t reserved_0x1F; - ADC_CH_t CH0; /* ADC Channel 0 */ - ADC_CH_t CH1; /* ADC Channel 1 */ - ADC_CH_t CH2; /* ADC Channel 2 */ - ADC_CH_t CH3; /* ADC Channel 3 */ -} ADC_t; - -/* Positive input multiplexer selection */ -typedef enum ADC_CH_MUXPOS_enum -{ - ADC_CH_MUXPOS_PIN0_gc = (0x00<<3), /* Input pin 0 */ - ADC_CH_MUXPOS_PIN1_gc = (0x01<<3), /* Input pin 1 */ - ADC_CH_MUXPOS_PIN2_gc = (0x02<<3), /* Input pin 2 */ - ADC_CH_MUXPOS_PIN3_gc = (0x03<<3), /* Input pin 3 */ - ADC_CH_MUXPOS_PIN4_gc = (0x04<<3), /* Input pin 4 */ - ADC_CH_MUXPOS_PIN5_gc = (0x05<<3), /* Input pin 5 */ - ADC_CH_MUXPOS_PIN6_gc = (0x06<<3), /* Input pin 6 */ - ADC_CH_MUXPOS_PIN7_gc = (0x07<<3), /* Input pin 7 */ -} ADC_CH_MUXPOS_t; - -/* Internal input multiplexer selections */ -typedef enum ADC_CH_MUXINT_enum -{ - ADC_CH_MUXINT_TEMP_gc = (0x00<<3), /* Temperature Reference */ - ADC_CH_MUXINT_BANDGAP_gc = (0x01<<3), /* Bandgap Reference */ - ADC_CH_MUXINT_SCALEDVCC_gc = (0x02<<3), /* 1/10 scaled VCC */ - ADC_CH_MUXINT_DAC_gc = (0x03<<3), /* DAC output */ -} ADC_CH_MUXINT_t; - -/* Negative input multiplexer selection */ -typedef enum ADC_CH_MUXNEG_enum -{ - ADC_CH_MUXNEG_PIN0_gc = (0x00<<0), /* Input pin 0 */ - ADC_CH_MUXNEG_PIN1_gc = (0x01<<0), /* Input pin 1 */ - ADC_CH_MUXNEG_PIN2_gc = (0x02<<0), /* Input pin 2 */ - ADC_CH_MUXNEG_PIN3_gc = (0x03<<0), /* Input pin 3 */ - ADC_CH_MUXNEG_PIN4_gc = (0x04<<0), /* Input pin 4 */ - ADC_CH_MUXNEG_PIN5_gc = (0x05<<0), /* Input pin 5 */ - ADC_CH_MUXNEG_PIN6_gc = (0x06<<0), /* Input pin 6 */ - ADC_CH_MUXNEG_PIN7_gc = (0x07<<0), /* Input pin 7 */ -} ADC_CH_MUXNEG_t; - -/* Input mode */ -typedef enum ADC_CH_INPUTMODE_enum -{ - ADC_CH_INPUTMODE_INTERNAL_gc = (0x00<<0), /* Internal inputs, no gain */ - ADC_CH_INPUTMODE_SINGLEENDED_gc = (0x01<<0), /* Single-ended input, no gain */ - ADC_CH_INPUTMODE_DIFF_gc = (0x02<<0), /* Differential input, no gain */ - ADC_CH_INPUTMODE_DIFFWGAIN_gc = (0x03<<0), /* Differential input, with gain */ -} ADC_CH_INPUTMODE_t; - -/* Gain factor */ -typedef enum ADC_CH_GAIN_enum -{ - ADC_CH_GAIN_1X_gc = (0x00<<2), /* 1x gain */ - ADC_CH_GAIN_2X_gc = (0x01<<2), /* 2x gain */ - ADC_CH_GAIN_4X_gc = (0x02<<2), /* 4x gain */ - ADC_CH_GAIN_8X_gc = (0x03<<2), /* 8x gain */ - ADC_CH_GAIN_16X_gc = (0x04<<2), /* 16x gain */ - ADC_CH_GAIN_32X_gc = (0x05<<2), /* 32x gain */ - ADC_CH_GAIN_64X_gc = (0x06<<2), /* 64x gain */ -} ADC_CH_GAIN_t; - -/* Conversion result resolution */ -typedef enum ADC_RESOLUTION_enum -{ - ADC_RESOLUTION_12BIT_gc = (0x00<<1), /* 12-bit right-adjusted result */ - ADC_RESOLUTION_8BIT_gc = (0x02<<1), /* 8-bit right-adjusted result */ - ADC_RESOLUTION_LEFT12BIT_gc = (0x03<<1), /* 12-bit left-adjusted result */ -} ADC_RESOLUTION_t; - -/* Voltage reference selection */ -typedef enum ADC_REFSEL_enum -{ - ADC_REFSEL_INT1V_gc = (0x00<<4), /* Internal 1V */ - ADC_REFSEL_VCC_gc = (0x01<<4), /* Internal VCC / 1.6V */ - ADC_REFSEL_AREFA_gc = (0x02<<4), /* External reference on PORT A */ - ADC_REFSEL_AREFB_gc = (0x03<<4), /* External reference on PORT B */ -} ADC_REFSEL_t; - -/* Channel sweep selection */ -typedef enum ADC_SWEEP_enum -{ - ADC_SWEEP_0_gc = (0x00<<6), /* ADC Channel 0 */ - ADC_SWEEP_01_gc = (0x01<<6), /* ADC Channel 0,1 */ - ADC_SWEEP_012_gc = (0x02<<6), /* ADC Channel 0,1,2 */ - ADC_SWEEP_0123_gc = (0x03<<6), /* ADC Channel 0,1,2,3 */ -} ADC_SWEEP_t; - -/* Event channel input selection */ -typedef enum ADC_EVSEL_enum -{ - ADC_EVSEL_0123_gc = (0x00<<3), /* Event Channel 0,1,2,3 */ - ADC_EVSEL_1234_gc = (0x01<<3), /* Event Channel 1,2,3,4 */ - ADC_EVSEL_2345_gc = (0x02<<3), /* Event Channel 2,3,4,5 */ - ADC_EVSEL_3456_gc = (0x03<<3), /* Event Channel 3,4,5,6 */ - ADC_EVSEL_4567_gc = (0x04<<3), /* Event Channel 4,5,6,7 */ - ADC_EVSEL_567_gc = (0x05<<3), /* Event Channel 5,6,7 */ - ADC_EVSEL_67_gc = (0x06<<3), /* Event Channel 6,7 */ - ADC_EVSEL_7_gc = (0x07<<3), /* Event Channel 7 */ -} ADC_EVSEL_t; - -/* Event action selection */ -typedef enum ADC_EVACT_enum -{ - ADC_EVACT_NONE_gc = (0x00<<0), /* No event action */ - ADC_EVACT_CH0_gc = (0x01<<0), /* First event triggers channel 0 */ - ADC_EVACT_CH01_gc = (0x02<<0), /* First two events trigger channel 0,1 */ - ADC_EVACT_CH012_gc = (0x03<<0), /* First three events trigger channel 0,1,2 */ - ADC_EVACT_CH0123_gc = (0x04<<0), /* Events trigger channel 0,1,2,3 */ - ADC_EVACT_SWEEP_gc = (0x05<<0), /* First event triggers sweep */ - ADC_EVACT_SYNCHSWEEP_gc = (0x06<<0), /* First event triggers synchronized sweep */ -} ADC_EVACT_t; - -/* Interupt mode */ -typedef enum ADC_CH_INTMODE_enum -{ - ADC_CH_INTMODE_COMPLETE_gc = (0x00<<2), /* Interrupt on conversion complete */ - ADC_CH_INTMODE_BELOW_gc = (0x01<<2), /* Interrupt on result below compare value */ - ADC_CH_INTMODE_ABOVE_gc = (0x03<<2), /* Interrupt on result above compare value */ -} ADC_CH_INTMODE_t; - -/* Interrupt level */ -typedef enum ADC_CH_INTLVL_enum -{ - ADC_CH_INTLVL_OFF_gc = (0x00<<0), /* Interrupt disabled */ - ADC_CH_INTLVL_LO_gc = (0x01<<0), /* Low level */ - ADC_CH_INTLVL_MED_gc = (0x02<<0), /* Medium level */ - ADC_CH_INTLVL_HI_gc = (0x03<<0), /* High level */ -} ADC_CH_INTLVL_t; - -/* DMA request selection */ -typedef enum ADC_DMASEL_enum -{ - ADC_DMASEL_OFF_gc = (0x00<<5), /* Combined DMA request OFF */ - ADC_DMASEL_CH01_gc = (0x01<<5), /* ADC Channel 0 or 1 */ - ADC_DMASEL_CH012_gc = (0x02<<5), /* ADC Channel 0 or 1 or 2 */ - ADC_DMASEL_CH0123_gc = (0x03<<5), /* ADC Channel 0 or 1 or 2 or 3 */ -} ADC_DMASEL_t; - -/* Clock prescaler */ -typedef enum ADC_PRESCALER_enum -{ - ADC_PRESCALER_DIV4_gc = (0x00<<0), /* Divide clock by 4 */ - ADC_PRESCALER_DIV8_gc = (0x01<<0), /* Divide clock by 8 */ - ADC_PRESCALER_DIV16_gc = (0x02<<0), /* Divide clock by 16 */ - ADC_PRESCALER_DIV32_gc = (0x03<<0), /* Divide clock by 32 */ - ADC_PRESCALER_DIV64_gc = (0x04<<0), /* Divide clock by 64 */ - ADC_PRESCALER_DIV128_gc = (0x05<<0), /* Divide clock by 128 */ - ADC_PRESCALER_DIV256_gc = (0x06<<0), /* Divide clock by 256 */ - ADC_PRESCALER_DIV512_gc = (0x07<<0), /* Divide clock by 512 */ -} ADC_PRESCALER_t; - - -/* --------------------------------------------------------------------------- -DAC - Digital/Analog Converter --------------------------------------------------------------------------- -*/ - -/* Digital-to-Analog Converter */ -typedef struct DAC_struct -{ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t CTRLC; /* Control Register C */ - register8_t EVCTRL; /* Event Input Control */ - register8_t TIMCTRL; /* Timing Control */ - register8_t STATUS; /* Status */ - register8_t reserved_0x06; - register8_t reserved_0x07; - register8_t GAINCAL; /* Gain Calibration */ - register8_t OFFSETCAL; /* Offset Calibration */ - register8_t reserved_0x0A; - register8_t reserved_0x0B; - register8_t reserved_0x0C; - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t reserved_0x0F; - register8_t reserved_0x10; - register8_t reserved_0x11; - register8_t reserved_0x12; - register8_t reserved_0x13; - register8_t reserved_0x14; - register8_t reserved_0x15; - register8_t reserved_0x16; - register8_t reserved_0x17; - _WORDREGISTER(CH0DATA); /* Channel 0 Data */ - _WORDREGISTER(CH1DATA); /* Channel 1 Data */ -} DAC_t; - -/* Output channel selection */ -typedef enum DAC_CHSEL_enum -{ - DAC_CHSEL_SINGLE_gc = (0x00<<5), /* Single channel operation (Channel A only) */ - DAC_CHSEL_DUAL_gc = (0x02<<5), /* Dual channel operation (S/H on both channels) */ -} DAC_CHSEL_t; - -/* Reference voltage selection */ -typedef enum DAC_REFSEL_enum -{ - DAC_REFSEL_INT1V_gc = (0x00<<3), /* Internal 1V */ - DAC_REFSEL_AVCC_gc = (0x01<<3), /* Analog supply voltage */ - DAC_REFSEL_AREFA_gc = (0x02<<3), /* External reference on AREF on PORTA */ - DAC_REFSEL_AREFB_gc = (0x03<<3), /* External reference on AREF on PORTB */ -} DAC_REFSEL_t; - -/* Event channel selection */ -typedef enum DAC_EVSEL_enum -{ - DAC_EVSEL_0_gc = (0x00<<0), /* Event Channel 0 */ - DAC_EVSEL_1_gc = (0x01<<0), /* Event Channel 1 */ - DAC_EVSEL_2_gc = (0x02<<0), /* Event Channel 2 */ - DAC_EVSEL_3_gc = (0x03<<0), /* Event Channel 3 */ - DAC_EVSEL_4_gc = (0x04<<0), /* Event Channel 4 */ - DAC_EVSEL_5_gc = (0x05<<0), /* Event Channel 5 */ - DAC_EVSEL_6_gc = (0x06<<0), /* Event Channel 6 */ - DAC_EVSEL_7_gc = (0x07<<0), /* Event Channel 7 */ -} DAC_EVSEL_t; - -/* Conversion interval */ -typedef enum DAC_CONINTVAL_enum -{ - DAC_CONINTVAL_1CLK_gc = (0x00<<4), /* 1 CLK / 2 CLK in S/H mode */ - DAC_CONINTVAL_2CLK_gc = (0x01<<4), /* 2 CLK / 3 CLK in S/H mode */ - DAC_CONINTVAL_4CLK_gc = (0x02<<4), /* 4 CLK / 6 CLK in S/H mode */ - DAC_CONINTVAL_8CLK_gc = (0x03<<4), /* 8 CLK / 12 CLK in S/H mode */ - DAC_CONINTVAL_16CLK_gc = (0x04<<4), /* 16 CLK / 24 CLK in S/H mode */ - DAC_CONINTVAL_32CLK_gc = (0x05<<4), /* 32 CLK / 48 CLK in S/H mode */ - DAC_CONINTVAL_64CLK_gc = (0x06<<4), /* 64 CLK / 96 CLK in S/H mode */ - DAC_CONINTVAL_128CLK_gc = (0x07<<4), /* 128 CLK / 192 CLK in S/H mode */ -} DAC_CONINTVAL_t; - -/* Refresh rate */ -typedef enum DAC_REFRESH_enum -{ - DAC_REFRESH_16CLK_gc = (0x00<<0), /* 16 CLK */ - DAC_REFRESH_32CLK_gc = (0x01<<0), /* 32 CLK */ - DAC_REFRESH_64CLK_gc = (0x02<<0), /* 64 CLK */ - DAC_REFRESH_128CLK_gc = (0x03<<0), /* 128 CLK */ - DAC_REFRESH_256CLK_gc = (0x04<<0), /* 256 CLK */ - DAC_REFRESH_512CLK_gc = (0x05<<0), /* 512 CLK */ - DAC_REFRESH_1024CLK_gc = (0x06<<0), /* 1024 CLK */ - DAC_REFRESH_2048CLK_gc = (0x07<<0), /* 2048 CLK */ - DAC_REFRESH_4086CLK_gc = (0x08<<0), /* 4096 CLK */ - DAC_REFRESH_8192CLK_gc = (0x09<<0), /* 8192 CLK */ - DAC_REFRESH_16384CLK_gc = (0x0A<<0), /* 16384 CLK */ - DAC_REFRESH_32768CLK_gc = (0x0B<<0), /* 32768 CLK */ - DAC_REFRESH_65536CLK_gc = (0x0C<<0), /* 65536 CLK */ - DAC_REFRESH_OFF_gc = (0x0F<<0), /* Auto refresh OFF */ -} DAC_REFRESH_t; - - -/* --------------------------------------------------------------------------- -RTC - Real-Time Clounter --------------------------------------------------------------------------- -*/ - -/* Real-Time Counter */ -typedef struct RTC_struct -{ - register8_t CTRL; /* Control Register */ - register8_t STATUS; /* Status Register */ - register8_t INTCTRL; /* Interrupt Control Register */ - register8_t INTFLAGS; /* Interrupt Flags */ - register8_t TEMP; /* Temporary register */ - register8_t reserved_0x05; - register8_t reserved_0x06; - register8_t reserved_0x07; - _WORDREGISTER(CNT); /* Count Register */ - _WORDREGISTER(PER); /* Period Register */ - _WORDREGISTER(COMP); /* Compare Register */ -} RTC_t; - -/* Prescaler Factor */ -typedef enum RTC_PRESCALER_enum -{ - RTC_PRESCALER_OFF_gc = (0x00<<0), /* RTC Off */ - RTC_PRESCALER_DIV1_gc = (0x01<<0), /* RTC Clock */ - RTC_PRESCALER_DIV2_gc = (0x02<<0), /* RTC Clock / 2 */ - RTC_PRESCALER_DIV8_gc = (0x03<<0), /* RTC Clock / 8 */ - RTC_PRESCALER_DIV16_gc = (0x04<<0), /* RTC Clock / 16 */ - RTC_PRESCALER_DIV64_gc = (0x05<<0), /* RTC Clock / 64 */ - RTC_PRESCALER_DIV256_gc = (0x06<<0), /* RTC Clock / 256 */ - RTC_PRESCALER_DIV1024_gc = (0x07<<0), /* RTC Clock / 1024 */ -} RTC_PRESCALER_t; - -/* Compare Interrupt level */ -typedef enum RTC_COMPINTLVL_enum -{ - RTC_COMPINTLVL_OFF_gc = (0x00<<2), /* Interrupt Disabled */ - RTC_COMPINTLVL_LO_gc = (0x01<<2), /* Low Level */ - RTC_COMPINTLVL_MED_gc = (0x02<<2), /* Medium Level */ - RTC_COMPINTLVL_HI_gc = (0x03<<2), /* High Level */ -} RTC_COMPINTLVL_t; - -/* Overflow Interrupt level */ -typedef enum RTC_OVFINTLVL_enum -{ - RTC_OVFINTLVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - RTC_OVFINTLVL_LO_gc = (0x01<<0), /* Low Level */ - RTC_OVFINTLVL_MED_gc = (0x02<<0), /* Medium Level */ - RTC_OVFINTLVL_HI_gc = (0x03<<0), /* High Level */ -} RTC_OVFINTLVL_t; - - -/* --------------------------------------------------------------------------- -EBI - External Bus Interface --------------------------------------------------------------------------- -*/ - -/* EBI Chip Select Module */ -typedef struct EBI_CS_struct -{ - register8_t CTRLA; /* Chip Select Control Register A */ - register8_t CTRLB; /* Chip Select Control Register B */ - _WORDREGISTER(BASEADDR); /* Chip Select Base Address */ -} EBI_CS_t; - -/* --------------------------------------------------------------------------- -EBI - External Bus Interface --------------------------------------------------------------------------- -*/ - -/* External Bus Interface */ -typedef struct EBI_struct -{ - register8_t CTRL; /* Control */ - register8_t SDRAMCTRLA; /* SDRAM Control Register A */ - register8_t reserved_0x02; - register8_t reserved_0x03; - _WORDREGISTER(REFRESH); /* SDRAM Refresh Period */ - _WORDREGISTER(INITDLY); /* SDRAM Initialization Delay */ - register8_t SDRAMCTRLB; /* SDRAM Control Register B */ - register8_t SDRAMCTRLC; /* SDRAM Control Register C */ - register8_t reserved_0x0A; - register8_t reserved_0x0B; - register8_t reserved_0x0C; - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t reserved_0x0F; - EBI_CS_t CS0; /* Chip Select 0 */ - EBI_CS_t CS1; /* Chip Select 1 */ - EBI_CS_t CS2; /* Chip Select 2 */ - EBI_CS_t CS3; /* Chip Select 3 */ -} EBI_t; - -/* Chip Select adress space */ -typedef enum EBI_CS_ASPACE_enum -{ - EBI_CS_ASPACE_256B_gc = (0x00<<2), /* 256 bytes */ - EBI_CS_ASPACE_512B_gc = (0x01<<2), /* 512 bytes */ - EBI_CS_ASPACE_1KB_gc = (0x02<<2), /* 1K bytes */ - EBI_CS_ASPACE_2KB_gc = (0x03<<2), /* 2K bytes */ - EBI_CS_ASPACE_4KB_gc = (0x04<<2), /* 4K bytes */ - EBI_CS_ASPACE_8KB_gc = (0x05<<2), /* 8K bytes */ - EBI_CS_ASPACE_16KB_gc = (0x06<<2), /* 16K bytes */ - EBI_CS_ASPACE_32KB_gc = (0x07<<2), /* 32K bytes */ - EBI_CS_ASPACE_64KB_gc = (0x08<<2), /* 64K bytes */ - EBI_CS_ASPACE_128KB_gc = (0x09<<2), /* 128K bytes */ - EBI_CS_ASPACE_256KB_gc = (0x0A<<2), /* 256K bytes */ - EBI_CS_ASPACE_512KB_gc = (0x0B<<2), /* 512K bytes */ - EBI_CS_ASPACE_1MB_gc = (0x0C<<2), /* 1M bytes */ - EBI_CS_ASPACE_2MB_gc = (0x0D<<2), /* 2M bytes */ - EBI_CS_ASPACE_4MB_gc = (0x0E<<2), /* 4M bytes */ - EBI_CS_ASPACE_8MB_gc = (0x0F<<2), /* 8M bytes */ - EBI_CS_ASPACE_16M_gc = (0x10<<2), /* 16M bytes */ -} EBI_CS_ASPACE_t; - -/* */ -typedef enum EBI_CS_SRWS_enum -{ - EBI_CS_SRWS_0CLK_gc = (0x00<<0), /* 0 cycles */ - EBI_CS_SRWS_1CLK_gc = (0x01<<0), /* 1 cycle */ - EBI_CS_SRWS_2CLK_gc = (0x02<<0), /* 2 cycles */ - EBI_CS_SRWS_3CLK_gc = (0x03<<0), /* 3 cycles */ - EBI_CS_SRWS_4CLK_gc = (0x04<<0), /* 4 cycles */ - EBI_CS_SRWS_5CLK_gc = (0x05<<0), /* 5 cycle */ - EBI_CS_SRWS_6CLK_gc = (0x06<<0), /* 6 cycles */ - EBI_CS_SRWS_7CLK_gc = (0x07<<0), /* 7 cycles */ -} EBI_CS_SRWS_t; - -/* Chip Select address mode */ -typedef enum EBI_CS_MODE_enum -{ - EBI_CS_MODE_DISABLED_gc = (0x00<<0), /* Chip Select Disabled */ - EBI_CS_MODE_SRAM_gc = (0x01<<0), /* Chip Select in SRAM mode */ - EBI_CS_MODE_LPC_gc = (0x02<<0), /* Chip Select in SRAM LPC mode */ - EBI_CS_MODE_SDRAM_gc = (0x03<<0), /* Chip Select in SDRAM mode */ -} EBI_CS_MODE_t; - -/* Chip Select SDRAM mode */ -typedef enum EBI_CS_SDMODE_enum -{ - EBI_CS_SDMODE_NORMAL_gc = (0x00<<0), /* Normal mode */ - EBI_CS_SDMODE_LOAD_gc = (0x01<<0), /* Load Mode Register command mode */ -} EBI_CS_SDMODE_t; - -/* */ -typedef enum EBI_SDDATAW_enum -{ - EBI_SDDATAW_4BIT_gc = (0x00<<6), /* 4-bit data bus */ - EBI_SDDATAW_8BIT_gc = (0x01<<6), /* 8-bit data bus */ -} EBI_SDDATAW_t; - -/* */ -typedef enum EBI_LPCMODE_enum -{ - EBI_LPCMODE_ALE1_gc = (0x00<<4), /* Data muxed with addr byte 0 */ - EBI_LPCMODE_ALE12_gc = (0x02<<4), /* Data muxed with addr byte 0 and 1 */ -} EBI_LPCMODE_t; - -/* */ -typedef enum EBI_SRMODE_enum -{ - EBI_SRMODE_ALE1_gc = (0x00<<2), /* Addr byte 0 muxed with 1 */ - EBI_SRMODE_ALE2_gc = (0x01<<2), /* Addr byte 0 muxed with 2 */ - EBI_SRMODE_ALE12_gc = (0x02<<2), /* Addr byte 0 muxed with 1 and 2 */ - EBI_SRMODE_NOALE_gc = (0x03<<2), /* No addr muxing */ -} EBI_SRMODE_t; - -/* */ -typedef enum EBI_IFMODE_enum -{ - EBI_IFMODE_DISABLED_gc = (0x00<<0), /* EBI Disabled */ - EBI_IFMODE_3PORT_gc = (0x01<<0), /* 3-port mode */ - EBI_IFMODE_4PORT_gc = (0x02<<0), /* 4-port mode */ - EBI_IFMODE_2PORT_gc = (0x03<<0), /* 2-port mode */ -} EBI_IFMODE_t; - -/* */ -typedef enum EBI_SDCOL_enum -{ - EBI_SDCOL_8BIT_gc = (0x00<<0), /* 8 column bits */ - EBI_SDCOL_9BIT_gc = (0x01<<0), /* 9 column bits */ - EBI_SDCOL_10BIT_gc = (0x02<<0), /* 10 column bits */ - EBI_SDCOL_11BIT_gc = (0x03<<0), /* 11 column bits */ -} EBI_SDCOL_t; - -/* */ -typedef enum EBI_MRDLY_enum -{ - EBI_MRDLY_0CLK_gc = (0x00<<6), /* 0 cycles */ - EBI_MRDLY_1CLK_gc = (0x01<<6), /* 1 cycle */ - EBI_MRDLY_2CLK_gc = (0x02<<6), /* 2 cycles */ - EBI_MRDLY_3CLK_gc = (0x03<<6), /* 3 cycles */ -} EBI_MRDLY_t; - -/* */ -typedef enum EBI_ROWCYCDLY_enum -{ - EBI_ROWCYCDLY_0CLK_gc = (0x00<<3), /* 0 cycles */ - EBI_ROWCYCDLY_1CLK_gc = (0x01<<3), /* 1 cycle */ - EBI_ROWCYCDLY_2CLK_gc = (0x02<<3), /* 2 cycles */ - EBI_ROWCYCDLY_3CLK_gc = (0x03<<3), /* 3 cycles */ - EBI_ROWCYCDLY_4CLK_gc = (0x04<<3), /* 4 cycles */ - EBI_ROWCYCDLY_5CLK_gc = (0x05<<3), /* 5 cycle */ - EBI_ROWCYCDLY_6CLK_gc = (0x06<<3), /* 6 cycles */ - EBI_ROWCYCDLY_7CLK_gc = (0x07<<3), /* 7 cycles */ -} EBI_ROWCYCDLY_t; - -/* */ -typedef enum EBI_RPDLY_enum -{ - EBI_RPDLY_0CLK_gc = (0x00<<0), /* 0 cycles */ - EBI_RPDLY_1CLK_gc = (0x01<<0), /* 1 cycle */ - EBI_RPDLY_2CLK_gc = (0x02<<0), /* 2 cycles */ - EBI_RPDLY_3CLK_gc = (0x03<<0), /* 3 cycles */ - EBI_RPDLY_4CLK_gc = (0x04<<0), /* 4 cycles */ - EBI_RPDLY_5CLK_gc = (0x05<<0), /* 5 cycle */ - EBI_RPDLY_6CLK_gc = (0x06<<0), /* 6 cycles */ - EBI_RPDLY_7CLK_gc = (0x07<<0), /* 7 cycles */ -} EBI_RPDLY_t; - -/* */ -typedef enum EBI_WRDLY_enum -{ - EBI_WRDLY_0CLK_gc = (0x00<<6), /* 0 cycles */ - EBI_WRDLY_1CLK_gc = (0x01<<6), /* 1 cycle */ - EBI_WRDLY_2CLK_gc = (0x02<<6), /* 2 cycles */ - EBI_WRDLY_3CLK_gc = (0x03<<6), /* 3 cycles */ -} EBI_WRDLY_t; - -/* */ -typedef enum EBI_ESRDLY_enum -{ - EBI_ESRDLY_0CLK_gc = (0x00<<3), /* 0 cycles */ - EBI_ESRDLY_1CLK_gc = (0x01<<3), /* 1 cycle */ - EBI_ESRDLY_2CLK_gc = (0x02<<3), /* 2 cycles */ - EBI_ESRDLY_3CLK_gc = (0x03<<3), /* 3 cycles */ - EBI_ESRDLY_4CLK_gc = (0x04<<3), /* 4 cycles */ - EBI_ESRDLY_5CLK_gc = (0x05<<3), /* 5 cycle */ - EBI_ESRDLY_6CLK_gc = (0x06<<3), /* 6 cycles */ - EBI_ESRDLY_7CLK_gc = (0x07<<3), /* 7 cycles */ -} EBI_ESRDLY_t; - -/* */ -typedef enum EBI_ROWCOLDLY_enum -{ - EBI_ROWCOLDLY_0CLK_gc = (0x00<<0), /* 0 cycles */ - EBI_ROWCOLDLY_1CLK_gc = (0x01<<0), /* 1 cycle */ - EBI_ROWCOLDLY_2CLK_gc = (0x02<<0), /* 2 cycles */ - EBI_ROWCOLDLY_3CLK_gc = (0x03<<0), /* 3 cycles */ - EBI_ROWCOLDLY_4CLK_gc = (0x04<<0), /* 4 cycles */ - EBI_ROWCOLDLY_5CLK_gc = (0x05<<0), /* 5 cycle */ - EBI_ROWCOLDLY_6CLK_gc = (0x06<<0), /* 6 cycles */ - EBI_ROWCOLDLY_7CLK_gc = (0x07<<0), /* 7 cycles */ -} EBI_ROWCOLDLY_t; - - -/* --------------------------------------------------------------------------- -TWI - Two-Wire Interface --------------------------------------------------------------------------- -*/ - -/* */ -typedef struct TWI_MASTER_struct -{ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t CTRLC; /* Control Register C */ - register8_t STATUS; /* Status Register */ - register8_t BAUD; /* Baurd Rate Control Register */ - register8_t ADDR; /* Address Register */ - register8_t DATA; /* Data Register */ -} TWI_MASTER_t; - -/* --------------------------------------------------------------------------- -TWI - Two-Wire Interface --------------------------------------------------------------------------- -*/ - -/* */ -typedef struct TWI_SLAVE_struct -{ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t STATUS; /* Status Register */ - register8_t ADDR; /* Address Register */ - register8_t DATA; /* Data Register */ -} TWI_SLAVE_t; - -/* --------------------------------------------------------------------------- -TWI - Two-Wire Interface --------------------------------------------------------------------------- -*/ - -/* Two-Wire Interface */ -typedef struct TWI_struct -{ - register8_t CTRL; /* TWI Common Control Register */ - TWI_MASTER_t MASTER; /* TWI master module */ - TWI_SLAVE_t SLAVE; /* TWI slave module */ -} TWI_t; - -/* Master Interrupt Level */ -typedef enum TWI_MASTER_INTLVL_enum -{ - TWI_MASTER_INTLVL_OFF_gc = (0x00<<6), /* Interrupt Disabled */ - TWI_MASTER_INTLVL_LO_gc = (0x01<<6), /* Low Level */ - TWI_MASTER_INTLVL_MED_gc = (0x02<<6), /* Medium Level */ - TWI_MASTER_INTLVL_HI_gc = (0x03<<6), /* High Level */ -} TWI_MASTER_INTLVL_t; - -/* Inactive Timeout */ -typedef enum TWI_MASTER_TIMEOUT_enum -{ - TWI_MASTER_TIMEOUT_DISABLED_gc = (0x00<<2), /* Bus Timeout Disabled */ - TWI_MASTER_TIMEOUT_50US_gc = (0x01<<2), /* 50 Microseconds */ - TWI_MASTER_TIMEOUT_100US_gc = (0x02<<2), /* 100 Microseconds */ - TWI_MASTER_TIMEOUT_200US_gc = (0x03<<2), /* 200 Microseconds */ -} TWI_MASTER_TIMEOUT_t; - -/* Master Command */ -typedef enum TWI_MASTER_CMD_enum -{ - TWI_MASTER_CMD_NOACT_gc = (0x00<<0), /* No Action */ - TWI_MASTER_CMD_REPSTART_gc = (0x01<<0), /* Issue Repeated Start Condition */ - TWI_MASTER_CMD_RECVTRANS_gc = (0x02<<0), /* Receive or Transmit Data */ - TWI_MASTER_CMD_STOP_gc = (0x03<<0), /* Issue Stop Condition */ -} TWI_MASTER_CMD_t; - -/* Master Bus State */ -typedef enum TWI_MASTER_BUSSTATE_enum -{ - TWI_MASTER_BUSSTATE_UNKNOWN_gc = (0x00<<0), /* Unknown Bus State */ - TWI_MASTER_BUSSTATE_IDLE_gc = (0x01<<0), /* Bus is Idle */ - TWI_MASTER_BUSSTATE_OWNER_gc = (0x02<<0), /* This Module Controls The Bus */ - TWI_MASTER_BUSSTATE_BUSY_gc = (0x03<<0), /* The Bus is Busy */ -} TWI_MASTER_BUSSTATE_t; - -/* Slave Interrupt Level */ -typedef enum TWI_SLAVE_INTLVL_enum -{ - TWI_SLAVE_INTLVL_OFF_gc = (0x00<<6), /* Interrupt Disabled */ - TWI_SLAVE_INTLVL_LO_gc = (0x01<<6), /* Low Level */ - TWI_SLAVE_INTLVL_MED_gc = (0x02<<6), /* Medium Level */ - TWI_SLAVE_INTLVL_HI_gc = (0x03<<6), /* High Level */ -} TWI_SLAVE_INTLVL_t; - -/* Slave Command */ -typedef enum TWI_SLAVE_CMD_enum -{ - TWI_SLAVE_CMD_NOACT_gc = (0x00<<0), /* No Action */ - TWI_SLAVE_CMD_COMPTRANS_gc = (0x02<<0), /* Used To Complete a Transaction */ - TWI_SLAVE_CMD_RESPONSE_gc = (0x03<<0), /* Used in Response to Address/Data Interrupt */ -} TWI_SLAVE_CMD_t; - - -/* --------------------------------------------------------------------------- -PORT - Port Configuration --------------------------------------------------------------------------- -*/ - -/* I/O port Configuration */ -typedef struct PORTCFG_struct -{ - register8_t MPCMASK; /* Multi-pin Configuration Mask */ - register8_t reserved_0x01; - register8_t VPCTRLA; /* Virtual Port Control Register A */ - register8_t VPCTRLB; /* Virtual Port Control Register B */ - register8_t CLKEVOUT; /* Clock and Event Out Register */ -} PORTCFG_t; - -/* --------------------------------------------------------------------------- -PORT - Port Configuration --------------------------------------------------------------------------- -*/ - -/* Virtual Port */ -typedef struct VPORT_struct -{ - register8_t DIR; /* I/O Port Data Direction */ - register8_t OUT; /* I/O Port Output */ - register8_t IN; /* I/O Port Input */ - register8_t INTFLAGS; /* Interrupt Flag Register */ -} VPORT_t; - -/* --------------------------------------------------------------------------- -PORT - Port Configuration --------------------------------------------------------------------------- -*/ - -/* I/O Ports */ -typedef struct PORT_struct -{ - register8_t DIR; /* I/O Port Data Direction */ - register8_t DIRSET; /* I/O Port Data Direction Set */ - register8_t DIRCLR; /* I/O Port Data Direction Clear */ - register8_t DIRTGL; /* I/O Port Data Direction Toggle */ - register8_t OUT; /* I/O Port Output */ - register8_t OUTSET; /* I/O Port Output Set */ - register8_t OUTCLR; /* I/O Port Output Clear */ - register8_t OUTTGL; /* I/O Port Output Toggle */ - register8_t IN; /* I/O port Input */ - register8_t INTCTRL; /* Interrupt Control Register */ - register8_t INT0MASK; /* Port Interrupt 0 Mask */ - register8_t INT1MASK; /* Port Interrupt 1 Mask */ - register8_t INTFLAGS; /* Interrupt Flag Register */ - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t reserved_0x0F; - register8_t PIN0CTRL; /* Pin 0 Control Register */ - register8_t PIN1CTRL; /* Pin 1 Control Register */ - register8_t PIN2CTRL; /* Pin 2 Control Register */ - register8_t PIN3CTRL; /* Pin 3 Control Register */ - register8_t PIN4CTRL; /* Pin 4 Control Register */ - register8_t PIN5CTRL; /* Pin 5 Control Register */ - register8_t PIN6CTRL; /* Pin 6 Control Register */ - register8_t PIN7CTRL; /* Pin 7 Control Register */ -} PORT_t; - -/* Virtual Port 0 Mapping */ -typedef enum PORTCFG_VP0MAP_enum -{ - PORTCFG_VP0MAP_PORTA_gc = (0x00<<0), /* Mapped To PORTA */ - PORTCFG_VP0MAP_PORTB_gc = (0x01<<0), /* Mapped To PORTB */ - PORTCFG_VP0MAP_PORTC_gc = (0x02<<0), /* Mapped To PORTC */ - PORTCFG_VP0MAP_PORTD_gc = (0x03<<0), /* Mapped To PORTD */ - PORTCFG_VP0MAP_PORTE_gc = (0x04<<0), /* Mapped To PORTE */ - PORTCFG_VP0MAP_PORTF_gc = (0x05<<0), /* Mapped To PORTF */ - PORTCFG_VP0MAP_PORTG_gc = (0x06<<0), /* Mapped To PORTG */ - PORTCFG_VP0MAP_PORTH_gc = (0x07<<0), /* Mapped To PORTH */ - PORTCFG_VP0MAP_PORTJ_gc = (0x08<<0), /* Mapped To PORTJ */ - PORTCFG_VP0MAP_PORTK_gc = (0x09<<0), /* Mapped To PORTK */ - PORTCFG_VP0MAP_PORTL_gc = (0x0A<<0), /* Mapped To PORTL */ - PORTCFG_VP0MAP_PORTM_gc = (0x0B<<0), /* Mapped To PORTM */ - PORTCFG_VP0MAP_PORTN_gc = (0x0C<<0), /* Mapped To PORTN */ - PORTCFG_VP0MAP_PORTP_gc = (0x0D<<0), /* Mapped To PORTP */ - PORTCFG_VP0MAP_PORTQ_gc = (0x0E<<0), /* Mapped To PORTQ */ - PORTCFG_VP0MAP_PORTR_gc = (0x0F<<0), /* Mapped To PORTR */ -} PORTCFG_VP0MAP_t; - -/* Virtual Port 1 Mapping */ -typedef enum PORTCFG_VP1MAP_enum -{ - PORTCFG_VP1MAP_PORTA_gc = (0x00<<4), /* Mapped To PORTA */ - PORTCFG_VP1MAP_PORTB_gc = (0x01<<4), /* Mapped To PORTB */ - PORTCFG_VP1MAP_PORTC_gc = (0x02<<4), /* Mapped To PORTC */ - PORTCFG_VP1MAP_PORTD_gc = (0x03<<4), /* Mapped To PORTD */ - PORTCFG_VP1MAP_PORTE_gc = (0x04<<4), /* Mapped To PORTE */ - PORTCFG_VP1MAP_PORTF_gc = (0x05<<4), /* Mapped To PORTF */ - PORTCFG_VP1MAP_PORTG_gc = (0x06<<4), /* Mapped To PORTG */ - PORTCFG_VP1MAP_PORTH_gc = (0x07<<4), /* Mapped To PORTH */ - PORTCFG_VP1MAP_PORTJ_gc = (0x08<<4), /* Mapped To PORTJ */ - PORTCFG_VP1MAP_PORTK_gc = (0x09<<4), /* Mapped To PORTK */ - PORTCFG_VP1MAP_PORTL_gc = (0x0A<<4), /* Mapped To PORTL */ - PORTCFG_VP1MAP_PORTM_gc = (0x0B<<4), /* Mapped To PORTM */ - PORTCFG_VP1MAP_PORTN_gc = (0x0C<<4), /* Mapped To PORTN */ - PORTCFG_VP1MAP_PORTP_gc = (0x0D<<4), /* Mapped To PORTP */ - PORTCFG_VP1MAP_PORTQ_gc = (0x0E<<4), /* Mapped To PORTQ */ - PORTCFG_VP1MAP_PORTR_gc = (0x0F<<4), /* Mapped To PORTR */ -} PORTCFG_VP1MAP_t; - -/* Virtual Port 2 Mapping */ -typedef enum PORTCFG_VP2MAP_enum -{ - PORTCFG_VP2MAP_PORTA_gc = (0x00<<0), /* Mapped To PORTA */ - PORTCFG_VP2MAP_PORTB_gc = (0x01<<0), /* Mapped To PORTB */ - PORTCFG_VP2MAP_PORTC_gc = (0x02<<0), /* Mapped To PORTC */ - PORTCFG_VP2MAP_PORTD_gc = (0x03<<0), /* Mapped To PORTD */ - PORTCFG_VP2MAP_PORTE_gc = (0x04<<0), /* Mapped To PORTE */ - PORTCFG_VP2MAP_PORTF_gc = (0x05<<0), /* Mapped To PORTF */ - PORTCFG_VP2MAP_PORTG_gc = (0x06<<0), /* Mapped To PORTG */ - PORTCFG_VP2MAP_PORTH_gc = (0x07<<0), /* Mapped To PORTH */ - PORTCFG_VP2MAP_PORTJ_gc = (0x08<<0), /* Mapped To PORTJ */ - PORTCFG_VP2MAP_PORTK_gc = (0x09<<0), /* Mapped To PORTK */ - PORTCFG_VP2MAP_PORTL_gc = (0x0A<<0), /* Mapped To PORTL */ - PORTCFG_VP2MAP_PORTM_gc = (0x0B<<0), /* Mapped To PORTM */ - PORTCFG_VP2MAP_PORTN_gc = (0x0C<<0), /* Mapped To PORTN */ - PORTCFG_VP2MAP_PORTP_gc = (0x0D<<0), /* Mapped To PORTP */ - PORTCFG_VP2MAP_PORTQ_gc = (0x0E<<0), /* Mapped To PORTQ */ - PORTCFG_VP2MAP_PORTR_gc = (0x0F<<0), /* Mapped To PORTR */ -} PORTCFG_VP2MAP_t; - -/* Virtual Port 3 Mapping */ -typedef enum PORTCFG_VP3MAP_enum -{ - PORTCFG_VP3MAP_PORTA_gc = (0x00<<4), /* Mapped To PORTA */ - PORTCFG_VP3MAP_PORTB_gc = (0x01<<4), /* Mapped To PORTB */ - PORTCFG_VP3MAP_PORTC_gc = (0x02<<4), /* Mapped To PORTC */ - PORTCFG_VP3MAP_PORTD_gc = (0x03<<4), /* Mapped To PORTD */ - PORTCFG_VP3MAP_PORTE_gc = (0x04<<4), /* Mapped To PORTE */ - PORTCFG_VP3MAP_PORTF_gc = (0x05<<4), /* Mapped To PORTF */ - PORTCFG_VP3MAP_PORTG_gc = (0x06<<4), /* Mapped To PORTG */ - PORTCFG_VP3MAP_PORTH_gc = (0x07<<4), /* Mapped To PORTH */ - PORTCFG_VP3MAP_PORTJ_gc = (0x08<<4), /* Mapped To PORTJ */ - PORTCFG_VP3MAP_PORTK_gc = (0x09<<4), /* Mapped To PORTK */ - PORTCFG_VP3MAP_PORTL_gc = (0x0A<<4), /* Mapped To PORTL */ - PORTCFG_VP3MAP_PORTM_gc = (0x0B<<4), /* Mapped To PORTM */ - PORTCFG_VP3MAP_PORTN_gc = (0x0C<<4), /* Mapped To PORTN */ - PORTCFG_VP3MAP_PORTP_gc = (0x0D<<4), /* Mapped To PORTP */ - PORTCFG_VP3MAP_PORTQ_gc = (0x0E<<4), /* Mapped To PORTQ */ - PORTCFG_VP3MAP_PORTR_gc = (0x0F<<4), /* Mapped To PORTR */ -} PORTCFG_VP3MAP_t; - -/* Clock Output Port */ -typedef enum PORTCFG_CLKOUT_enum -{ - PORTCFG_CLKOUT_OFF_gc = (0x00<<0), /* Clock Output Disabled */ - PORTCFG_CLKOUT_PC7_gc = (0x01<<0), /* Clock Output on Port C pin 7 */ - PORTCFG_CLKOUT_PD7_gc = (0x02<<0), /* Clock Output on Port D pin 7 */ - PORTCFG_CLKOUT_PE7_gc = (0x03<<0), /* Clock Output on Port E pin 7 */ -} PORTCFG_CLKOUT_t; - -/* Event Output Port */ -typedef enum PORTCFG_EVOUT_enum -{ - PORTCFG_EVOUT_OFF_gc = (0x00<<4), /* Event Output Disabled */ - PORTCFG_EVOUT_PC7_gc = (0x01<<4), /* Event Channel 7 Output on Port C pin 7 */ - PORTCFG_EVOUT_PD7_gc = (0x02<<4), /* Event Channel 7 Output on Port D pin 7 */ - PORTCFG_EVOUT_PE7_gc = (0x03<<4), /* Event Channel 7 Output on Port E pin 7 */ -} PORTCFG_EVOUT_t; - -/* Port Interrupt 0 Level */ -typedef enum PORT_INT0LVL_enum -{ - PORT_INT0LVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - PORT_INT0LVL_LO_gc = (0x01<<0), /* Low Level */ - PORT_INT0LVL_MED_gc = (0x02<<0), /* Medium Level */ - PORT_INT0LVL_HI_gc = (0x03<<0), /* High Level */ -} PORT_INT0LVL_t; - -/* Port Interrupt 1 Level */ -typedef enum PORT_INT1LVL_enum -{ - PORT_INT1LVL_OFF_gc = (0x00<<2), /* Interrupt Disabled */ - PORT_INT1LVL_LO_gc = (0x01<<2), /* Low Level */ - PORT_INT1LVL_MED_gc = (0x02<<2), /* Medium Level */ - PORT_INT1LVL_HI_gc = (0x03<<2), /* High Level */ -} PORT_INT1LVL_t; - -/* Output/Pull Configuration */ -typedef enum PORT_OPC_enum -{ - PORT_OPC_TOTEM_gc = (0x00<<3), /* Totempole */ - PORT_OPC_BUSKEEPER_gc = (0x01<<3), /* Totempole w/ Bus keeper on Input and Output */ - PORT_OPC_PULLDOWN_gc = (0x02<<3), /* Totempole w/ Pull-down on Input */ - PORT_OPC_PULLUP_gc = (0x03<<3), /* Totempole w/ Pull-up on Input */ - PORT_OPC_WIREDOR_gc = (0x04<<3), /* Wired OR */ - PORT_OPC_WIREDAND_gc = (0x05<<3), /* Wired AND */ - PORT_OPC_WIREDORPULL_gc = (0x06<<3), /* Wired OR w/ Pull-down */ - PORT_OPC_WIREDANDPULL_gc = (0x07<<3), /* Wired AND w/ Pull-up */ -} PORT_OPC_t; - -/* Input/Sense Configuration */ -typedef enum PORT_ISC_enum -{ - PORT_ISC_BOTHEDGES_gc = (0x00<<0), /* Sense Both Edges */ - PORT_ISC_RISING_gc = (0x01<<0), /* Sense Rising Edge */ - PORT_ISC_FALLING_gc = (0x02<<0), /* Sense Falling Edge */ - PORT_ISC_LEVEL_gc = (0x03<<0), /* Sense Level (Transparent For Events) */ - PORT_ISC_INPUT_DISABLE_gc = (0x07<<0), /* Disable Digital Input Buffer */ -} PORT_ISC_t; - - -/* --------------------------------------------------------------------------- -TC - 16-bit Timer/Counter With PWM --------------------------------------------------------------------------- -*/ - -/* 16-bit Timer/Counter 0 */ -typedef struct TC0_struct -{ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t CTRLC; /* Control register C */ - register8_t CTRLD; /* Control Register D */ - register8_t CTRLE; /* Control Register E */ - register8_t reserved_0x05; - register8_t INTCTRLA; /* Interrupt Control Register A */ - register8_t INTCTRLB; /* Interrupt Control Register B */ - register8_t CTRLFCLR; /* Control Register F Clear */ - register8_t CTRLFSET; /* Control Register F Set */ - register8_t CTRLGCLR; /* Control Register G Clear */ - register8_t CTRLGSET; /* Control Register G Set */ - register8_t INTFLAGS; /* Interrupt Flag Register */ - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t TEMP; /* Temporary Register For 16-bit Access */ - register8_t reserved_0x10; - register8_t reserved_0x11; - register8_t reserved_0x12; - register8_t reserved_0x13; - register8_t reserved_0x14; - register8_t reserved_0x15; - register8_t reserved_0x16; - register8_t reserved_0x17; - register8_t reserved_0x18; - register8_t reserved_0x19; - register8_t reserved_0x1A; - register8_t reserved_0x1B; - register8_t reserved_0x1C; - register8_t reserved_0x1D; - register8_t reserved_0x1E; - register8_t reserved_0x1F; - _WORDREGISTER(CNT); /* Count */ - register8_t reserved_0x22; - register8_t reserved_0x23; - register8_t reserved_0x24; - register8_t reserved_0x25; - _WORDREGISTER(PER); /* Period */ - _WORDREGISTER(CCA); /* Compare or Capture A */ - _WORDREGISTER(CCB); /* Compare or Capture B */ - _WORDREGISTER(CCC); /* Compare or Capture C */ - _WORDREGISTER(CCD); /* Compare or Capture D */ - register8_t reserved_0x30; - register8_t reserved_0x31; - register8_t reserved_0x32; - register8_t reserved_0x33; - register8_t reserved_0x34; - register8_t reserved_0x35; - _WORDREGISTER(PERBUF); /* Period Buffer */ - _WORDREGISTER(CCABUF); /* Compare Or Capture A Buffer */ - _WORDREGISTER(CCBBUF); /* Compare Or Capture B Buffer */ - _WORDREGISTER(CCCBUF); /* Compare Or Capture C Buffer */ - _WORDREGISTER(CCDBUF); /* Compare Or Capture D Buffer */ -} TC0_t; - -/* --------------------------------------------------------------------------- -TC - 16-bit Timer/Counter With PWM --------------------------------------------------------------------------- -*/ - -/* 16-bit Timer/Counter 1 */ -typedef struct TC1_struct -{ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t CTRLC; /* Control register C */ - register8_t CTRLD; /* Control Register D */ - register8_t CTRLE; /* Control Register E */ - register8_t reserved_0x05; - register8_t INTCTRLA; /* Interrupt Control Register A */ - register8_t INTCTRLB; /* Interrupt Control Register B */ - register8_t CTRLFCLR; /* Control Register F Clear */ - register8_t CTRLFSET; /* Control Register F Set */ - register8_t CTRLGCLR; /* Control Register G Clear */ - register8_t CTRLGSET; /* Control Register G Set */ - register8_t INTFLAGS; /* Interrupt Flag Register */ - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t TEMP; /* Temporary Register For 16-bit Access */ - register8_t reserved_0x10; - register8_t reserved_0x11; - register8_t reserved_0x12; - register8_t reserved_0x13; - register8_t reserved_0x14; - register8_t reserved_0x15; - register8_t reserved_0x16; - register8_t reserved_0x17; - register8_t reserved_0x18; - register8_t reserved_0x19; - register8_t reserved_0x1A; - register8_t reserved_0x1B; - register8_t reserved_0x1C; - register8_t reserved_0x1D; - register8_t reserved_0x1E; - register8_t reserved_0x1F; - _WORDREGISTER(CNT); /* Count */ - register8_t reserved_0x22; - register8_t reserved_0x23; - register8_t reserved_0x24; - register8_t reserved_0x25; - _WORDREGISTER(PER); /* Period */ - _WORDREGISTER(CCA); /* Compare or Capture A */ - _WORDREGISTER(CCB); /* Compare or Capture B */ - register8_t reserved_0x2C; - register8_t reserved_0x2D; - register8_t reserved_0x2E; - register8_t reserved_0x2F; - register8_t reserved_0x30; - register8_t reserved_0x31; - register8_t reserved_0x32; - register8_t reserved_0x33; - register8_t reserved_0x34; - register8_t reserved_0x35; - _WORDREGISTER(PERBUF); /* Period Buffer */ - _WORDREGISTER(CCABUF); /* Compare Or Capture A Buffer */ - _WORDREGISTER(CCBBUF); /* Compare Or Capture B Buffer */ -} TC1_t; - -/* --------------------------------------------------------------------------- -TC - 16-bit Timer/Counter With PWM --------------------------------------------------------------------------- -*/ - -/* Advanced Waveform Extension */ -typedef struct AWEX_struct -{ - register8_t CTRL; /* Control Register */ - register8_t reserved_0x01; - register8_t FDEVMASK; /* Fault Detection Event Mask */ - register8_t FDCTRL; /* Fault Detection Control Register */ - register8_t STATUS; /* Status Register */ - register8_t reserved_0x05; - register8_t DTBOTH; /* Dead Time Both Sides */ - register8_t DTBOTHBUF; /* Dead Time Both Sides Buffer */ - register8_t DTLS; /* Dead Time Low Side */ - register8_t DTHS; /* Dead Time High Side */ - register8_t DTLSBUF; /* Dead Time Low Side Buffer */ - register8_t DTHSBUF; /* Dead Time High Side Buffer */ - register8_t OUTOVEN; /* Output Override Enable */ -} AWEX_t; - -/* --------------------------------------------------------------------------- -TC - 16-bit Timer/Counter With PWM --------------------------------------------------------------------------- -*/ - -/* High-Resolution Extension */ -typedef struct HIRES_struct -{ - register8_t CTRL; /* Control Register */ -} HIRES_t; - -/* Clock Selection */ -typedef enum TC_CLKSEL_enum -{ - TC_CLKSEL_OFF_gc = (0x00<<0), /* Timer Off */ - TC_CLKSEL_DIV1_gc = (0x01<<0), /* System Clock */ - TC_CLKSEL_DIV2_gc = (0x02<<0), /* System Clock / 2 */ - TC_CLKSEL_DIV4_gc = (0x03<<0), /* System Clock / 4 */ - TC_CLKSEL_DIV8_gc = (0x04<<0), /* System Clock / 8 */ - TC_CLKSEL_DIV64_gc = (0x05<<0), /* System Clock / 64 */ - TC_CLKSEL_DIV256_gc = (0x06<<0), /* System Clock / 256 */ - TC_CLKSEL_DIV1024_gc = (0x07<<0), /* System Clock / 1024 */ - TC_CLKSEL_EVCH0_gc = (0x08<<0), /* Event Channel 0 */ - TC_CLKSEL_EVCH1_gc = (0x09<<0), /* Event Channel 1 */ - TC_CLKSEL_EVCH2_gc = (0x0A<<0), /* Event Channel 2 */ - TC_CLKSEL_EVCH3_gc = (0x0B<<0), /* Event Channel 3 */ - TC_CLKSEL_EVCH4_gc = (0x0C<<0), /* Event Channel 4 */ - TC_CLKSEL_EVCH5_gc = (0x0D<<0), /* Event Channel 5 */ - TC_CLKSEL_EVCH6_gc = (0x0E<<0), /* Event Channel 6 */ - TC_CLKSEL_EVCH7_gc = (0x0F<<0), /* Event Channel 7 */ -} TC_CLKSEL_t; - -/* Waveform Generation Mode */ -typedef enum TC_WGMODE_enum -{ - TC_WGMODE_NORMAL_gc = (0x00<<0), /* Normal Mode */ - TC_WGMODE_FRQ_gc = (0x01<<0), /* Frequency Generation Mode */ - TC_WGMODE_SS_gc = (0x03<<0), /* Single Slope */ - TC_WGMODE_DS_T_gc = (0x05<<0), /* Dual Slope, Update on TOP */ - TC_WGMODE_DS_TB_gc = (0x06<<0), /* Dual Slope, Update on TOP and BOTTOM */ - TC_WGMODE_DS_B_gc = (0x07<<0), /* Dual Slope, Update on BOTTOM */ -} TC_WGMODE_t; - -/* Event Action */ -typedef enum TC_EVACT_enum -{ - TC_EVACT_OFF_gc = (0x00<<5), /* No Event Action */ - TC_EVACT_CAPT_gc = (0x01<<5), /* Input Capture */ - TC_EVACT_UPDOWN_gc = (0x02<<5), /* Externally Controlled Up/Down Count */ - TC_EVACT_QDEC_gc = (0x03<<5), /* Quadrature Decode */ - TC_EVACT_RESTART_gc = (0x04<<5), /* Restart */ - TC_EVACT_FRW_gc = (0x05<<5), /* Frequency Capture */ - TC_EVACT_PW_gc = (0x06<<5), /* Pulse-width Capture */ -} TC_EVACT_t; - -/* Event Selection */ -typedef enum TC_EVSEL_enum -{ - TC_EVSEL_OFF_gc = (0x00<<0), /* No Event Source */ - TC_EVSEL_CH0_gc = (0x08<<0), /* Event Channel 0 */ - TC_EVSEL_CH1_gc = (0x09<<0), /* Event Channel 1 */ - TC_EVSEL_CH2_gc = (0x0A<<0), /* Event Channel 2 */ - TC_EVSEL_CH3_gc = (0x0B<<0), /* Event Channel 3 */ - TC_EVSEL_CH4_gc = (0x0C<<0), /* Event Channel 4 */ - TC_EVSEL_CH5_gc = (0x0D<<0), /* Event Channel 5 */ - TC_EVSEL_CH6_gc = (0x0E<<0), /* Event Channel 6 */ - TC_EVSEL_CH7_gc = (0x0F<<0), /* Event Channel 7 */ -} TC_EVSEL_t; - -/* Error Interrupt Level */ -typedef enum TC_ERRINTLVL_enum -{ - TC_ERRINTLVL_OFF_gc = (0x00<<2), /* Interrupt Disabled */ - TC_ERRINTLVL_LO_gc = (0x01<<2), /* Low Level */ - TC_ERRINTLVL_MED_gc = (0x02<<2), /* Medium Level */ - TC_ERRINTLVL_HI_gc = (0x03<<2), /* High Level */ -} TC_ERRINTLVL_t; - -/* Overflow Interrupt Level */ -typedef enum TC_OVFINTLVL_enum -{ - TC_OVFINTLVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - TC_OVFINTLVL_LO_gc = (0x01<<0), /* Low Level */ - TC_OVFINTLVL_MED_gc = (0x02<<0), /* Medium Level */ - TC_OVFINTLVL_HI_gc = (0x03<<0), /* High Level */ -} TC_OVFINTLVL_t; - -/* Compare or Capture D Interrupt Level */ -typedef enum TC_CCDINTLVL_enum -{ - TC_CCDINTLVL_OFF_gc = (0x00<<6), /* Interrupt Disabled */ - TC_CCDINTLVL_LO_gc = (0x01<<6), /* Low Level */ - TC_CCDINTLVL_MED_gc = (0x02<<6), /* Medium Level */ - TC_CCDINTLVL_HI_gc = (0x03<<6), /* High Level */ -} TC_CCDINTLVL_t; - -/* Compare or Capture C Interrupt Level */ -typedef enum TC_CCCINTLVL_enum -{ - TC_CCCINTLVL_OFF_gc = (0x00<<4), /* Interrupt Disabled */ - TC_CCCINTLVL_LO_gc = (0x01<<4), /* Low Level */ - TC_CCCINTLVL_MED_gc = (0x02<<4), /* Medium Level */ - TC_CCCINTLVL_HI_gc = (0x03<<4), /* High Level */ -} TC_CCCINTLVL_t; - -/* Compare or Capture B Interrupt Level */ -typedef enum TC_CCBINTLVL_enum -{ - TC_CCBINTLVL_OFF_gc = (0x00<<2), /* Interrupt Disabled */ - TC_CCBINTLVL_LO_gc = (0x01<<2), /* Low Level */ - TC_CCBINTLVL_MED_gc = (0x02<<2), /* Medium Level */ - TC_CCBINTLVL_HI_gc = (0x03<<2), /* High Level */ -} TC_CCBINTLVL_t; - -/* Compare or Capture A Interrupt Level */ -typedef enum TC_CCAINTLVL_enum -{ - TC_CCAINTLVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - TC_CCAINTLVL_LO_gc = (0x01<<0), /* Low Level */ - TC_CCAINTLVL_MED_gc = (0x02<<0), /* Medium Level */ - TC_CCAINTLVL_HI_gc = (0x03<<0), /* High Level */ -} TC_CCAINTLVL_t; - -/* Timer/Counter Command */ -typedef enum TC_CMD_enum -{ - TC_CMD_NONE_gc = (0x00<<2), /* No Command */ - TC_CMD_UPDATE_gc = (0x01<<2), /* Force Update */ - TC_CMD_RESTART_gc = (0x02<<2), /* Force Restart */ - TC_CMD_RESET_gc = (0x03<<2), /* Force Hard Reset */ -} TC_CMD_t; - -/* Fault Detect Action */ -typedef enum AWEX_FDACT_enum -{ - AWEX_FDACT_NONE_gc = (0x00<<0), /* No Fault Protection */ - AWEX_FDACT_CLEAROE_gc = (0x01<<0), /* Clear Output Enable Bits */ - AWEX_FDACT_CLEARDIR_gc = (0x03<<0), /* Clear I/O Port Direction Bits */ -} AWEX_FDACT_t; - -/* High Resolution Enable */ -typedef enum HIRES_HREN_enum -{ - HIRES_HREN_NONE_gc = (0x00<<0), /* No Fault Protection */ - HIRES_HREN_TC0_gc = (0x01<<0), /* Enable High Resolution on Timer/Counter 0 */ - HIRES_HREN_TC1_gc = (0x02<<0), /* Enable High Resolution on Timer/Counter 1 */ - HIRES_HREN_BOTH_gc = (0x03<<0), /* Enable High Resolution both Timer/Counters */ -} HIRES_HREN_t; - - -/* --------------------------------------------------------------------------- -USART - Universal Asynchronous Receiver-Transmitter --------------------------------------------------------------------------- -*/ - -/* Universal Synchronous/Asynchronous Receiver/Transmitter */ -typedef struct USART_struct -{ - register8_t DATA; /* Data Register */ - register8_t STATUS; /* Status Register */ - register8_t reserved_0x02; - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t CTRLC; /* Control Register C */ - register8_t BAUDCTRLA; /* Baud Rate Control Register A */ - register8_t BAUDCTRLB; /* Baud Rate Control Register B */ -} USART_t; - -/* Receive Complete Interrupt level */ -typedef enum USART_RXCINTLVL_enum -{ - USART_RXCINTLVL_OFF_gc = (0x00<<4), /* Interrupt Disabled */ - USART_RXCINTLVL_LO_gc = (0x01<<4), /* Low Level */ - USART_RXCINTLVL_MED_gc = (0x02<<4), /* Medium Level */ - USART_RXCINTLVL_HI_gc = (0x03<<4), /* High Level */ -} USART_RXCINTLVL_t; - -/* Transmit Complete Interrupt level */ -typedef enum USART_TXCINTLVL_enum -{ - USART_TXCINTLVL_OFF_gc = (0x00<<2), /* Interrupt Disabled */ - USART_TXCINTLVL_LO_gc = (0x01<<2), /* Low Level */ - USART_TXCINTLVL_MED_gc = (0x02<<2), /* Medium Level */ - USART_TXCINTLVL_HI_gc = (0x03<<2), /* High Level */ -} USART_TXCINTLVL_t; - -/* Data Register Empty Interrupt level */ -typedef enum USART_DREINTLVL_enum -{ - USART_DREINTLVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - USART_DREINTLVL_LO_gc = (0x01<<0), /* Low Level */ - USART_DREINTLVL_MED_gc = (0x02<<0), /* Medium Level */ - USART_DREINTLVL_HI_gc = (0x03<<0), /* High Level */ -} USART_DREINTLVL_t; - -/* Character Size */ -typedef enum USART_CHSIZE_enum -{ - USART_CHSIZE_5BIT_gc = (0x00<<0), /* Character size: 5 bit */ - USART_CHSIZE_6BIT_gc = (0x01<<0), /* Character size: 6 bit */ - USART_CHSIZE_7BIT_gc = (0x02<<0), /* Character size: 7 bit */ - USART_CHSIZE_8BIT_gc = (0x03<<0), /* Character size: 8 bit */ - USART_CHSIZE_9BIT_gc = (0x07<<0), /* Character size: 9 bit */ -} USART_CHSIZE_t; - -/* Communication Mode */ -typedef enum USART_CMODE_enum -{ - USART_CMODE_ASYNCHRONOUS_gc = (0x00<<6), /* Asynchronous Mode */ - USART_CMODE_SYNCHRONOUS_gc = (0x01<<6), /* Synchronous Mode */ - USART_CMODE_IRDA_gc = (0x02<<6), /* IrDA Mode */ - USART_CMODE_MSPI_gc = (0x03<<6), /* Master SPI Mode */ -} USART_CMODE_t; - -/* Parity Mode */ -typedef enum USART_PMODE_enum -{ - USART_PMODE_DISABLED_gc = (0x00<<4), /* No Parity */ - USART_PMODE_EVEN_gc = (0x02<<4), /* Even Parity */ - USART_PMODE_ODD_gc = (0x03<<4), /* Odd Parity */ -} USART_PMODE_t; - - -/* --------------------------------------------------------------------------- -SPI - Serial Peripheral Interface --------------------------------------------------------------------------- -*/ - -/* Serial Peripheral Interface */ -typedef struct SPI_struct -{ - register8_t CTRL; /* Control Register */ - register8_t INTCTRL; /* Interrupt Control Register */ - register8_t STATUS; /* Status Register */ - register8_t DATA; /* Data Register */ -} SPI_t; - -/* SPI Mode */ -typedef enum SPI_MODE_enum -{ - SPI_MODE_0_gc = (0x00<<2), /* SPI Mode 0 */ - SPI_MODE_1_gc = (0x01<<2), /* SPI Mode 1 */ - SPI_MODE_2_gc = (0x02<<2), /* SPI Mode 2 */ - SPI_MODE_3_gc = (0x03<<2), /* SPI Mode 3 */ -} SPI_MODE_t; - -/* Prescaler setting */ -typedef enum SPI_PRESCALER_enum -{ - SPI_PRESCALER_DIV4_gc = (0x00<<0), /* System Clock / 4 */ - SPI_PRESCALER_DIV16_gc = (0x01<<0), /* System Clock / 16 */ - SPI_PRESCALER_DIV64_gc = (0x02<<0), /* System Clock / 64 */ - SPI_PRESCALER_DIV128_gc = (0x03<<0), /* System Clock / 128 */ -} SPI_PRESCALER_t; - -/* Interrupt level */ -typedef enum SPI_INTLVL_enum -{ - SPI_INTLVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - SPI_INTLVL_LO_gc = (0x01<<0), /* Low Level */ - SPI_INTLVL_MED_gc = (0x02<<0), /* Medium Level */ - SPI_INTLVL_HI_gc = (0x03<<0), /* High Level */ -} SPI_INTLVL_t; - - -/* --------------------------------------------------------------------------- -IRCOM - IR Communication Module --------------------------------------------------------------------------- -*/ - -/* IR Communication Module */ -typedef struct IRCOM_struct -{ - register8_t CTRL; /* Control Register */ - register8_t TXPLCTRL; /* IrDA Transmitter Pulse Length Control Register */ - register8_t RXPLCTRL; /* IrDA Receiver Pulse Length Control Register */ -} IRCOM_t; - -/* Event channel selection */ -typedef enum IRDA_EVSEL_enum -{ - IRDA_EVSEL_OFF_gc = (0x00<<0), /* No Event Source */ - IRDA_EVSEL_0_gc = (0x08<<0), /* Event Channel 0 */ - IRDA_EVSEL_1_gc = (0x09<<0), /* Event Channel 1 */ - IRDA_EVSEL_2_gc = (0x0A<<0), /* Event Channel 2 */ - IRDA_EVSEL_3_gc = (0x0B<<0), /* Event Channel 3 */ - IRDA_EVSEL_4_gc = (0x0C<<0), /* Event Channel 4 */ - IRDA_EVSEL_5_gc = (0x0D<<0), /* Event Channel 5 */ - IRDA_EVSEL_6_gc = (0x0E<<0), /* Event Channel 6 */ - IRDA_EVSEL_7_gc = (0x0F<<0), /* Event Channel 7 */ -} IRDA_EVSEL_t; - - -/* --------------------------------------------------------------------------- -AES - AES Module --------------------------------------------------------------------------- -*/ - -/* AES Module */ -typedef struct AES_struct -{ - register8_t CTRL; /* AES Control Register */ - register8_t STATUS; /* AES Status Register */ - register8_t STATE; /* AES State Register */ - register8_t KEY; /* AES Key Register */ - register8_t INTCTRL; /* AES Interrupt Control Register */ -} AES_t; - -/* Interrupt level */ -typedef enum AES_INTLVL_enum -{ - AES_INTLVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - AES_INTLVL_LO_gc = (0x01<<0), /* Low Level */ - AES_INTLVL_MED_gc = (0x02<<0), /* Medium Level */ - AES_INTLVL_HI_gc = (0x03<<0), /* High Level */ -} AES_INTLVL_t; - - - -/* -========================================================================== -IO Module Instances. Mapped to memory. -========================================================================== -*/ - -#define GPIO (*(GPIO_t *) 0x0000) /* General Purpose IO Registers */ -#define VPORT0 (*(VPORT_t *) 0x0010) /* Virtual Port 0 */ -#define VPORT1 (*(VPORT_t *) 0x0014) /* Virtual Port 1 */ -#define VPORT2 (*(VPORT_t *) 0x0018) /* Virtual Port 2 */ -#define VPORT3 (*(VPORT_t *) 0x001C) /* Virtual Port 3 */ -#define OCD (*(OCD_t *) 0x002E) /* On-Chip Debug System */ -#define CPU (*(CPU_t *) 0x0030) /* CPU Registers */ -#define CLK (*(CLK_t *) 0x0040) /* Clock System */ -#define SLEEP (*(SLEEP_t *) 0x0048) /* Sleep Controller */ -#define OSC (*(OSC_t *) 0x0050) /* Oscillator Control */ -#define DFLLRC32M (*(DFLL_t *) 0x0060) /* DFLL for 32MHz RC Oscillator */ -#define DFLLRC2M (*(DFLL_t *) 0x0068) /* DFLL for 2MHz RC Oscillator */ -#define PR (*(PR_t *) 0x0070) /* Power Reduction */ -#define RST (*(RST_t *) 0x0078) /* Reset Controller */ -#define WDT (*(WDT_t *) 0x0080) /* Watch-Dog Timer */ -#define MCU (*(MCU_t *) 0x0090) /* MCU Control */ -#define PMIC (*(PMIC_t *) 0x00A0) /* Programmable Interrupt Controller */ -#define PORTCFG (*(PORTCFG_t *) 0x00B0) /* Port Configuration */ -#define AES (*(AES_t *) 0x00C0) /* AES Crypto Module */ -#define DMA (*(DMA_t *) 0x0100) /* DMA Controller */ -#define EVSYS (*(EVSYS_t *) 0x0180) /* Event System */ -#define NVM (*(NVM_t *) 0x01C0) /* Non Volatile Memory Controller */ -#define ADCA (*(ADC_t *) 0x0200) /* Analog to Digital Converter A */ -#define ADCB (*(ADC_t *) 0x0240) /* Analog to Digital Converter B */ -#define DACA (*(DAC_t *) 0x0300) /* Digitalto Analog Converter A */ -#define DACB (*(DAC_t *) 0x0320) /* Digital to Analog Converter B */ -#define ACA (*(AC_t *) 0x0380) /* Analog Comparator A */ -#define ACB (*(AC_t *) 0x0390) /* Analog Comparator B */ -#define RTC (*(RTC_t *) 0x0400) /* Real-Time Counter */ -#define EBI (*(EBI_t *) 0x0440) /* External Bus Interface */ -#define TWIC (*(TWI_t *) 0x0480) /* Two-Wire Interface C */ -#define TWID (*(TWI_t *) 0x0490) /* Two-Wire Interface D */ -#define TWIE (*(TWI_t *) 0x04A0) /* Two-Wire Interface E */ -#define TWIF (*(TWI_t *) 0x04B0) /* Two-Wire Interface F */ -#define PORTA (*(PORT_t *) 0x0600) /* Port A */ -#define PORTB (*(PORT_t *) 0x0620) /* Port B */ -#define PORTC (*(PORT_t *) 0x0640) /* Port C */ -#define PORTD (*(PORT_t *) 0x0660) /* Port D */ -#define PORTE (*(PORT_t *) 0x0680) /* Port E */ -#define PORTF (*(PORT_t *) 0x06A0) /* Port F */ -#define PORTH (*(PORT_t *) 0x06E0) /* Port H */ -#define PORTJ (*(PORT_t *) 0x0700) /* Port J */ -#define PORTK (*(PORT_t *) 0x0720) /* Port K */ -#define PORTQ (*(PORT_t *) 0x07C0) /* Port Q */ -#define PORTR (*(PORT_t *) 0x07E0) /* Port R */ -#define TCC0 (*(TC0_t *) 0x0800) /* Timer/Counter C0 */ -#define TCC1 (*(TC1_t *) 0x0840) /* Timer/Counter C1 */ -#define AWEXC (*(AWEX_t *) 0x0880) /* Advanced Waveform Extension C */ -#define HIRESC (*(HIRES_t *) 0x0890) /* High-Resolution Extension C */ -#define USARTC0 (*(USART_t *) 0x08A0) /* Universal Asynchronous Receiver-Transmitter C0 */ -#define USARTC1 (*(USART_t *) 0x08B0) /* Universal Asynchronous Receiver-Transmitter C1 */ -#define SPIC (*(SPI_t *) 0x08C0) /* Serial Peripheral Interface C */ -#define IRCOM (*(IRCOM_t *) 0x08F8) /* IR Communication Module */ -#define TCD0 (*(TC0_t *) 0x0900) /* Timer/Counter D0 */ -#define TCD1 (*(TC1_t *) 0x0940) /* Timer/Counter D1 */ -#define HIRESD (*(HIRES_t *) 0x0990) /* High-Resolution Extension D */ -#define USARTD0 (*(USART_t *) 0x09A0) /* Universal Asynchronous Receiver-Transmitter D0 */ -#define USARTD1 (*(USART_t *) 0x09B0) /* Universal Asynchronous Receiver-Transmitter D1 */ -#define SPID (*(SPI_t *) 0x09C0) /* Serial Peripheral Interface D */ -#define TCE0 (*(TC0_t *) 0x0A00) /* Timer/Counter E0 */ -#define TCE1 (*(TC1_t *) 0x0A40) /* Timer/Counter E1 */ -#define AWEXE (*(AWEX_t *) 0x0A80) /* Advanced Waveform Extension E */ -#define HIRESE (*(HIRES_t *) 0x0A90) /* High-Resolution Extension E */ -#define USARTE0 (*(USART_t *) 0x0AA0) /* Universal Asynchronous Receiver-Transmitter E0 */ -#define USARTE1 (*(USART_t *) 0x0AB0) /* Universal Asynchronous Receiver-Transmitter E1 */ -#define SPIE (*(SPI_t *) 0x0AC0) /* Serial Peripheral Interface E */ -#define TCF0 (*(TC0_t *) 0x0B00) /* Timer/Counter F0 */ -#define TCF1 (*(TC1_t *) 0x0B40) /* Timer/Counter F1 */ -#define HIRESF (*(HIRES_t *) 0x0B90) /* High-Resolution Extension F */ -#define USARTF0 (*(USART_t *) 0x0BA0) /* Universal Asynchronous Receiver-Transmitter F0 */ -#define USARTF1 (*(USART_t *) 0x0BB0) /* Universal Asynchronous Receiver-Transmitter F1 */ -#define SPIF (*(SPI_t *) 0x0BC0) /* Serial Peripheral Interface F */ - - -#endif /* !defined (__ASSEMBLER__) */ - - -/* ========== Flattened fully qualified IO register names ========== */ - -/* GPIO - General Purpose IO Registers */ -#define GPIO_GPIO0 _SFR_MEM8(0x0000) -#define GPIO_GPIO1 _SFR_MEM8(0x0001) -#define GPIO_GPIO2 _SFR_MEM8(0x0002) -#define GPIO_GPIO3 _SFR_MEM8(0x0003) -#define GPIO_GPIO4 _SFR_MEM8(0x0004) -#define GPIO_GPIO5 _SFR_MEM8(0x0005) -#define GPIO_GPIO6 _SFR_MEM8(0x0006) -#define GPIO_GPIO7 _SFR_MEM8(0x0007) -#define GPIO_GPIO8 _SFR_MEM8(0x0008) -#define GPIO_GPIO9 _SFR_MEM8(0x0009) -#define GPIO_GPIOA _SFR_MEM8(0x000A) -#define GPIO_GPIOB _SFR_MEM8(0x000B) -#define GPIO_GPIOC _SFR_MEM8(0x000C) -#define GPIO_GPIOD _SFR_MEM8(0x000D) -#define GPIO_GPIOE _SFR_MEM8(0x000E) -#define GPIO_GPIOF _SFR_MEM8(0x000F) - -/* VPORT0 - Virtual Port 0 */ -#define VPORT0_DIR _SFR_MEM8(0x0010) -#define VPORT0_OUT _SFR_MEM8(0x0011) -#define VPORT0_IN _SFR_MEM8(0x0012) -#define VPORT0_INTFLAGS _SFR_MEM8(0x0013) - -/* VPORT1 - Virtual Port 1 */ -#define VPORT1_DIR _SFR_MEM8(0x0014) -#define VPORT1_OUT _SFR_MEM8(0x0015) -#define VPORT1_IN _SFR_MEM8(0x0016) -#define VPORT1_INTFLAGS _SFR_MEM8(0x0017) - -/* VPORT2 - Virtual Port 2 */ -#define VPORT2_DIR _SFR_MEM8(0x0018) -#define VPORT2_OUT _SFR_MEM8(0x0019) -#define VPORT2_IN _SFR_MEM8(0x001A) -#define VPORT2_INTFLAGS _SFR_MEM8(0x001B) - -/* VPORT3 - Virtual Port 3 */ -#define VPORT3_DIR _SFR_MEM8(0x001C) -#define VPORT3_OUT _SFR_MEM8(0x001D) -#define VPORT3_IN _SFR_MEM8(0x001E) -#define VPORT3_INTFLAGS _SFR_MEM8(0x001F) - -/* OCD - On-Chip Debug System */ -#define OCD_OCDR0 _SFR_MEM8(0x002E) -#define OCD_OCDR1 _SFR_MEM8(0x002F) - -/* CPU - CPU Registers */ -#define CPU_CCP _SFR_MEM8(0x0034) -#define CPU_RAMPD _SFR_MEM8(0x0038) -#define CPU_RAMPX _SFR_MEM8(0x0039) -#define CPU_RAMPY _SFR_MEM8(0x003A) -#define CPU_RAMPZ _SFR_MEM8(0x003B) -#define CPU_EIND _SFR_MEM8(0x003C) -#define CPU_SPL _SFR_MEM8(0x003D) -#define CPU_SPH _SFR_MEM8(0x003E) -#define CPU_SREG _SFR_MEM8(0x003F) - -/* CLK - Clock System */ -#define CLK_CTRL _SFR_MEM8(0x0040) -#define CLK_PSCTRL _SFR_MEM8(0x0041) -#define CLK_LOCK _SFR_MEM8(0x0042) -#define CLK_RTCCTRL _SFR_MEM8(0x0043) - -/* SLEEP - Sleep Controller */ -#define SLEEP_CTRL _SFR_MEM8(0x0048) - -/* OSC - Oscillator Control */ -#define OSC_CTRL _SFR_MEM8(0x0050) -#define OSC_STATUS _SFR_MEM8(0x0051) -#define OSC_XOSCCTRL _SFR_MEM8(0x0052) -#define OSC_XOSCFAIL _SFR_MEM8(0x0053) -#define OSC_RC32KCAL _SFR_MEM8(0x0054) -#define OSC_PLLCTRL _SFR_MEM8(0x0055) -#define OSC_DFLLCTRL _SFR_MEM8(0x0056) - -/* DFLLRC32M - DFLL for 32MHz RC Oscillator */ -#define DFLLRC32M_CTRL _SFR_MEM8(0x0060) -#define DFLLRC32M_CALA _SFR_MEM8(0x0062) -#define DFLLRC32M_CALB _SFR_MEM8(0x0063) -#define DFLLRC32M_OSCCNT0 _SFR_MEM8(0x0064) -#define DFLLRC32M_OSCCNT1 _SFR_MEM8(0x0065) -#define DFLLRC32M_OSCCNT2 _SFR_MEM8(0x0066) - -/* DFLLRC2M - DFLL for 2MHz RC Oscillator */ -#define DFLLRC2M_CTRL _SFR_MEM8(0x0068) -#define DFLLRC2M_CALA _SFR_MEM8(0x006A) -#define DFLLRC2M_CALB _SFR_MEM8(0x006B) -#define DFLLRC2M_OSCCNT0 _SFR_MEM8(0x006C) -#define DFLLRC2M_OSCCNT1 _SFR_MEM8(0x006D) -#define DFLLRC2M_OSCCNT2 _SFR_MEM8(0x006E) - -/* PR - Power Reduction */ -#define PR_PR _SFR_MEM8(0x0070) -#define PR_PRPA _SFR_MEM8(0x0071) -#define PR_PRPB _SFR_MEM8(0x0072) -#define PR_PRPC _SFR_MEM8(0x0073) -#define PR_PRPD _SFR_MEM8(0x0074) -#define PR_PRPE _SFR_MEM8(0x0075) -#define PR_PRPF _SFR_MEM8(0x0076) - -/* RST - Reset Controller */ -#define RST_STATUS _SFR_MEM8(0x0078) -#define RST_CTRL _SFR_MEM8(0x0079) - -/* WDT - Watch-Dog Timer */ -#define WDT_CTRL _SFR_MEM8(0x0080) -#define WDT_WINCTRL _SFR_MEM8(0x0081) -#define WDT_STATUS _SFR_MEM8(0x0082) - -/* MCU - MCU Control */ -#define MCU_DEVID0 _SFR_MEM8(0x0090) -#define MCU_DEVID1 _SFR_MEM8(0x0091) -#define MCU_DEVID2 _SFR_MEM8(0x0092) -#define MCU_REVID _SFR_MEM8(0x0093) -#define MCU_JTAGUID _SFR_MEM8(0x0094) -#define MCU_MCUCR _SFR_MEM8(0x0096) -#define MCU_EVSYSLOCK _SFR_MEM8(0x0098) -#define MCU_AWEXLOCK _SFR_MEM8(0x0099) - -/* PMIC - Programmable Interrupt Controller */ -#define PMIC_STATUS _SFR_MEM8(0x00A0) -#define PMIC_INTPRI _SFR_MEM8(0x00A1) -#define PMIC_CTRL _SFR_MEM8(0x00A2) - -/* PORTCFG - Port Configuration */ -#define PORTCFG_MPCMASK _SFR_MEM8(0x00B0) -#define PORTCFG_VPCTRLA _SFR_MEM8(0x00B2) -#define PORTCFG_VPCTRLB _SFR_MEM8(0x00B3) -#define PORTCFG_CLKEVOUT _SFR_MEM8(0x00B4) - -/* AES - AES Crypto Module */ -#define AES_CTRL _SFR_MEM8(0x00C0) -#define AES_STATUS _SFR_MEM8(0x00C1) -#define AES_STATE _SFR_MEM8(0x00C2) -#define AES_KEY _SFR_MEM8(0x00C3) -#define AES_INTCTRL _SFR_MEM8(0x00C4) - -/* DMA - DMA Controller */ -#define DMA_CTRL _SFR_MEM8(0x0100) -#define DMA_INTFLAGS _SFR_MEM8(0x0103) -#define DMA_STATUS _SFR_MEM8(0x0104) -#define DMA_TEMP _SFR_MEM16(0x0106) -#define DMA_CH0_CTRLA _SFR_MEM8(0x0110) -#define DMA_CH0_CTRLB _SFR_MEM8(0x0111) -#define DMA_CH0_ADDRCTRL _SFR_MEM8(0x0112) -#define DMA_CH0_TRIGSRC _SFR_MEM8(0x0113) -#define DMA_CH0_TRFCNT _SFR_MEM16(0x0114) -#define DMA_CH0_REPCNT _SFR_MEM8(0x0116) -#define DMA_CH0_SRCADDR0 _SFR_MEM8(0x0118) -#define DMA_CH0_SRCADDR1 _SFR_MEM8(0x0119) -#define DMA_CH0_SRCADDR2 _SFR_MEM8(0x011A) -#define DMA_CH0_DESTADDR0 _SFR_MEM8(0x011C) -#define DMA_CH0_DESTADDR1 _SFR_MEM8(0x011D) -#define DMA_CH0_DESTADDR2 _SFR_MEM8(0x011E) -#define DMA_CH1_CTRLA _SFR_MEM8(0x0120) -#define DMA_CH1_CTRLB _SFR_MEM8(0x0121) -#define DMA_CH1_ADDRCTRL _SFR_MEM8(0x0122) -#define DMA_CH1_TRIGSRC _SFR_MEM8(0x0123) -#define DMA_CH1_TRFCNT _SFR_MEM16(0x0124) -#define DMA_CH1_REPCNT _SFR_MEM8(0x0126) -#define DMA_CH1_SRCADDR0 _SFR_MEM8(0x0128) -#define DMA_CH1_SRCADDR1 _SFR_MEM8(0x0129) -#define DMA_CH1_SRCADDR2 _SFR_MEM8(0x012A) -#define DMA_CH1_DESTADDR0 _SFR_MEM8(0x012C) -#define DMA_CH1_DESTADDR1 _SFR_MEM8(0x012D) -#define DMA_CH1_DESTADDR2 _SFR_MEM8(0x012E) -#define DMA_CH2_CTRLA _SFR_MEM8(0x0130) -#define DMA_CH2_CTRLB _SFR_MEM8(0x0131) -#define DMA_CH2_ADDRCTRL _SFR_MEM8(0x0132) -#define DMA_CH2_TRIGSRC _SFR_MEM8(0x0133) -#define DMA_CH2_TRFCNT _SFR_MEM16(0x0134) -#define DMA_CH2_REPCNT _SFR_MEM8(0x0136) -#define DMA_CH2_SRCADDR0 _SFR_MEM8(0x0138) -#define DMA_CH2_SRCADDR1 _SFR_MEM8(0x0139) -#define DMA_CH2_SRCADDR2 _SFR_MEM8(0x013A) -#define DMA_CH2_DESTADDR0 _SFR_MEM8(0x013C) -#define DMA_CH2_DESTADDR1 _SFR_MEM8(0x013D) -#define DMA_CH2_DESTADDR2 _SFR_MEM8(0x013E) -#define DMA_CH3_CTRLA _SFR_MEM8(0x0140) -#define DMA_CH3_CTRLB _SFR_MEM8(0x0141) -#define DMA_CH3_ADDRCTRL _SFR_MEM8(0x0142) -#define DMA_CH3_TRIGSRC _SFR_MEM8(0x0143) -#define DMA_CH3_TRFCNT _SFR_MEM16(0x0144) -#define DMA_CH3_REPCNT _SFR_MEM8(0x0146) -#define DMA_CH3_SRCADDR0 _SFR_MEM8(0x0148) -#define DMA_CH3_SRCADDR1 _SFR_MEM8(0x0149) -#define DMA_CH3_SRCADDR2 _SFR_MEM8(0x014A) -#define DMA_CH3_DESTADDR0 _SFR_MEM8(0x014C) -#define DMA_CH3_DESTADDR1 _SFR_MEM8(0x014D) -#define DMA_CH3_DESTADDR2 _SFR_MEM8(0x014E) - -/* EVSYS - Event System */ -#define EVSYS_CH0MUX _SFR_MEM8(0x0180) -#define EVSYS_CH1MUX _SFR_MEM8(0x0181) -#define EVSYS_CH2MUX _SFR_MEM8(0x0182) -#define EVSYS_CH3MUX _SFR_MEM8(0x0183) -#define EVSYS_CH4MUX _SFR_MEM8(0x0184) -#define EVSYS_CH5MUX _SFR_MEM8(0x0185) -#define EVSYS_CH6MUX _SFR_MEM8(0x0186) -#define EVSYS_CH7MUX _SFR_MEM8(0x0187) -#define EVSYS_CH0CTRL _SFR_MEM8(0x0188) -#define EVSYS_CH1CTRL _SFR_MEM8(0x0189) -#define EVSYS_CH2CTRL _SFR_MEM8(0x018A) -#define EVSYS_CH3CTRL _SFR_MEM8(0x018B) -#define EVSYS_CH4CTRL _SFR_MEM8(0x018C) -#define EVSYS_CH5CTRL _SFR_MEM8(0x018D) -#define EVSYS_CH6CTRL _SFR_MEM8(0x018E) -#define EVSYS_CH7CTRL _SFR_MEM8(0x018F) -#define EVSYS_STROBE _SFR_MEM8(0x0190) -#define EVSYS_DATA _SFR_MEM8(0x0191) - -/* NVM - Non Volatile Memory Controller */ -#define NVM_ADDR0 _SFR_MEM8(0x01C0) -#define NVM_ADDR1 _SFR_MEM8(0x01C1) -#define NVM_ADDR2 _SFR_MEM8(0x01C2) -#define NVM_DATA0 _SFR_MEM8(0x01C4) -#define NVM_DATA1 _SFR_MEM8(0x01C5) -#define NVM_DATA2 _SFR_MEM8(0x01C6) -#define NVM_CMD _SFR_MEM8(0x01CA) -#define NVM_CTRLA _SFR_MEM8(0x01CB) -#define NVM_CTRLB _SFR_MEM8(0x01CC) -#define NVM_INTCTRL _SFR_MEM8(0x01CD) -#define NVM_STATUS _SFR_MEM8(0x01CF) -#define NVM_LOCKBITS _SFR_MEM8(0x01D0) - -/* ADCA - Analog to Digital Converter A */ -#define ADCA_CTRLA _SFR_MEM8(0x0200) -#define ADCA_CTRLB _SFR_MEM8(0x0201) -#define ADCA_REFCTRL _SFR_MEM8(0x0202) -#define ADCA_EVCTRL _SFR_MEM8(0x0203) -#define ADCA_PRESCALER _SFR_MEM8(0x0204) -#define ADCA_CALCTRL _SFR_MEM8(0x0205) -#define ADCA_INTFLAGS _SFR_MEM8(0x0206) -#define ADCA_CALIB _SFR_MEM8(0x020C) -#define ADCA_CH0RES _SFR_MEM16(0x0210) -#define ADCA_CH1RES _SFR_MEM16(0x0212) -#define ADCA_CH2RES _SFR_MEM16(0x0214) -#define ADCA_CH3RES _SFR_MEM16(0x0216) -#define ADCA_CMP _SFR_MEM16(0x0218) -#define ADCA_CH0_CTRL _SFR_MEM8(0x0220) -#define ADCA_CH0_MUXCTRL _SFR_MEM8(0x0221) -#define ADCA_CH0_INTCTRL _SFR_MEM8(0x0222) -#define ADCA_CH0_INTFLAGS _SFR_MEM8(0x0223) -#define ADCA_CH0_RES _SFR_MEM16(0x0224) -#define ADCA_CH1_CTRL _SFR_MEM8(0x0228) -#define ADCA_CH1_MUXCTRL _SFR_MEM8(0x0229) -#define ADCA_CH1_INTCTRL _SFR_MEM8(0x022A) -#define ADCA_CH1_INTFLAGS _SFR_MEM8(0x022B) -#define ADCA_CH1_RES _SFR_MEM16(0x022C) -#define ADCA_CH2_CTRL _SFR_MEM8(0x0230) -#define ADCA_CH2_MUXCTRL _SFR_MEM8(0x0231) -#define ADCA_CH2_INTCTRL _SFR_MEM8(0x0232) -#define ADCA_CH2_INTFLAGS _SFR_MEM8(0x0233) -#define ADCA_CH2_RES _SFR_MEM16(0x0234) -#define ADCA_CH3_CTRL _SFR_MEM8(0x0238) -#define ADCA_CH3_MUXCTRL _SFR_MEM8(0x0239) -#define ADCA_CH3_INTCTRL _SFR_MEM8(0x023A) -#define ADCA_CH3_INTFLAGS _SFR_MEM8(0x023B) -#define ADCA_CH3_RES _SFR_MEM16(0x023C) - -/* ADCB - Analog to Digital Converter B */ -#define ADCB_CTRLA _SFR_MEM8(0x0240) -#define ADCB_CTRLB _SFR_MEM8(0x0241) -#define ADCB_REFCTRL _SFR_MEM8(0x0242) -#define ADCB_EVCTRL _SFR_MEM8(0x0243) -#define ADCB_PRESCALER _SFR_MEM8(0x0244) -#define ADCB_CALCTRL _SFR_MEM8(0x0245) -#define ADCB_INTFLAGS _SFR_MEM8(0x0246) -#define ADCB_CALIB _SFR_MEM8(0x024C) -#define ADCB_CH0RES _SFR_MEM16(0x0250) -#define ADCB_CH1RES _SFR_MEM16(0x0252) -#define ADCB_CH2RES _SFR_MEM16(0x0254) -#define ADCB_CH3RES _SFR_MEM16(0x0256) -#define ADCB_CMP _SFR_MEM16(0x0258) -#define ADCB_CH0_CTRL _SFR_MEM8(0x0260) -#define ADCB_CH0_MUXCTRL _SFR_MEM8(0x0261) -#define ADCB_CH0_INTCTRL _SFR_MEM8(0x0262) -#define ADCB_CH0_INTFLAGS _SFR_MEM8(0x0263) -#define ADCB_CH0_RES _SFR_MEM16(0x0264) -#define ADCB_CH1_CTRL _SFR_MEM8(0x0268) -#define ADCB_CH1_MUXCTRL _SFR_MEM8(0x0269) -#define ADCB_CH1_INTCTRL _SFR_MEM8(0x026A) -#define ADCB_CH1_INTFLAGS _SFR_MEM8(0x026B) -#define ADCB_CH1_RES _SFR_MEM16(0x026C) -#define ADCB_CH2_CTRL _SFR_MEM8(0x0270) -#define ADCB_CH2_MUXCTRL _SFR_MEM8(0x0271) -#define ADCB_CH2_INTCTRL _SFR_MEM8(0x0272) -#define ADCB_CH2_INTFLAGS _SFR_MEM8(0x0273) -#define ADCB_CH2_RES _SFR_MEM16(0x0274) -#define ADCB_CH3_CTRL _SFR_MEM8(0x0278) -#define ADCB_CH3_MUXCTRL _SFR_MEM8(0x0279) -#define ADCB_CH3_INTCTRL _SFR_MEM8(0x027A) -#define ADCB_CH3_INTFLAGS _SFR_MEM8(0x027B) -#define ADCB_CH3_RES _SFR_MEM16(0x027C) - -/* DACA - Digitalto Analog Converter A */ -#define DACA_CTRLA _SFR_MEM8(0x0300) -#define DACA_CTRLB _SFR_MEM8(0x0301) -#define DACA_CTRLC _SFR_MEM8(0x0302) -#define DACA_EVCTRL _SFR_MEM8(0x0303) -#define DACA_TIMCTRL _SFR_MEM8(0x0304) -#define DACA_STATUS _SFR_MEM8(0x0305) -#define DACA_GAINCAL _SFR_MEM8(0x0308) -#define DACA_OFFSETCAL _SFR_MEM8(0x0309) -#define DACA_CH0DATA _SFR_MEM16(0x0318) -#define DACA_CH1DATA _SFR_MEM16(0x031A) - -/* DACB - Digital to Analog Converter B */ -#define DACB_CTRLA _SFR_MEM8(0x0320) -#define DACB_CTRLB _SFR_MEM8(0x0321) -#define DACB_CTRLC _SFR_MEM8(0x0322) -#define DACB_EVCTRL _SFR_MEM8(0x0323) -#define DACB_TIMCTRL _SFR_MEM8(0x0324) -#define DACB_STATUS _SFR_MEM8(0x0325) -#define DACB_GAINCAL _SFR_MEM8(0x0328) -#define DACB_OFFSETCAL _SFR_MEM8(0x0329) -#define DACB_CH0DATA _SFR_MEM16(0x0338) -#define DACB_CH1DATA _SFR_MEM16(0x033A) - -/* ACA - Analog Comparator A */ -#define ACA_AC0CTRL _SFR_MEM8(0x0380) -#define ACA_AC1CTRL _SFR_MEM8(0x0381) -#define ACA_AC0MUXCTRL _SFR_MEM8(0x0382) -#define ACA_AC1MUXCTRL _SFR_MEM8(0x0383) -#define ACA_CTRLA _SFR_MEM8(0x0384) -#define ACA_CTRLB _SFR_MEM8(0x0385) -#define ACA_WINCTRL _SFR_MEM8(0x0386) -#define ACA_STATUS _SFR_MEM8(0x0387) - -/* ACB - Analog Comparator B */ -#define ACB_AC0CTRL _SFR_MEM8(0x0390) -#define ACB_AC1CTRL _SFR_MEM8(0x0391) -#define ACB_AC0MUXCTRL _SFR_MEM8(0x0392) -#define ACB_AC1MUXCTRL _SFR_MEM8(0x0393) -#define ACB_CTRLA _SFR_MEM8(0x0394) -#define ACB_CTRLB _SFR_MEM8(0x0395) -#define ACB_WINCTRL _SFR_MEM8(0x0396) -#define ACB_STATUS _SFR_MEM8(0x0397) - -/* RTC - Real-Time Counter */ -#define RTC_CTRL _SFR_MEM8(0x0400) -#define RTC_STATUS _SFR_MEM8(0x0401) -#define RTC_INTCTRL _SFR_MEM8(0x0402) -#define RTC_INTFLAGS _SFR_MEM8(0x0403) -#define RTC_TEMP _SFR_MEM8(0x0404) -#define RTC_CNT _SFR_MEM16(0x0408) -#define RTC_PER _SFR_MEM16(0x040A) -#define RTC_COMP _SFR_MEM16(0x040C) - -/* EBI - External Bus Interface */ -#define EBI_CTRL _SFR_MEM8(0x0440) -#define EBI_SDRAMCTRLA _SFR_MEM8(0x0441) -#define EBI_REFRESH _SFR_MEM16(0x0444) -#define EBI_INITDLY _SFR_MEM16(0x0446) -#define EBI_SDRAMCTRLB _SFR_MEM8(0x0448) -#define EBI_SDRAMCTRLC _SFR_MEM8(0x0449) -#define EBI_CS0_CTRLA _SFR_MEM8(0x0450) -#define EBI_CS0_CTRLB _SFR_MEM8(0x0451) -#define EBI_CS0_BASEADDR _SFR_MEM16(0x0452) -#define EBI_CS1_CTRLA _SFR_MEM8(0x0454) -#define EBI_CS1_CTRLB _SFR_MEM8(0x0455) -#define EBI_CS1_BASEADDR _SFR_MEM16(0x0456) -#define EBI_CS2_CTRLA _SFR_MEM8(0x0458) -#define EBI_CS2_CTRLB _SFR_MEM8(0x0459) -#define EBI_CS2_BASEADDR _SFR_MEM16(0x045A) -#define EBI_CS3_CTRLA _SFR_MEM8(0x045C) -#define EBI_CS3_CTRLB _SFR_MEM8(0x045D) -#define EBI_CS3_BASEADDR _SFR_MEM16(0x045E) - -/* TWIC - Two-Wire Interface C */ -#define TWIC_CTRL _SFR_MEM8(0x0480) -#define TWIC_MASTER_CTRLA _SFR_MEM8(0x0481) -#define TWIC_MASTER_CTRLB _SFR_MEM8(0x0482) -#define TWIC_MASTER_CTRLC _SFR_MEM8(0x0483) -#define TWIC_MASTER_STATUS _SFR_MEM8(0x0484) -#define TWIC_MASTER_BAUD _SFR_MEM8(0x0485) -#define TWIC_MASTER_ADDR _SFR_MEM8(0x0486) -#define TWIC_MASTER_DATA _SFR_MEM8(0x0487) -#define TWIC_SLAVE_CTRLA _SFR_MEM8(0x0488) -#define TWIC_SLAVE_CTRLB _SFR_MEM8(0x0489) -#define TWIC_SLAVE_STATUS _SFR_MEM8(0x048A) -#define TWIC_SLAVE_ADDR _SFR_MEM8(0x048B) -#define TWIC_SLAVE_DATA _SFR_MEM8(0x048C) - -/* TWID - Two-Wire Interface D */ -#define TWID_CTRL _SFR_MEM8(0x0490) -#define TWID_MASTER_CTRLA _SFR_MEM8(0x0491) -#define TWID_MASTER_CTRLB _SFR_MEM8(0x0492) -#define TWID_MASTER_CTRLC _SFR_MEM8(0x0493) -#define TWID_MASTER_STATUS _SFR_MEM8(0x0494) -#define TWID_MASTER_BAUD _SFR_MEM8(0x0495) -#define TWID_MASTER_ADDR _SFR_MEM8(0x0496) -#define TWID_MASTER_DATA _SFR_MEM8(0x0497) -#define TWID_SLAVE_CTRLA _SFR_MEM8(0x0498) -#define TWID_SLAVE_CTRLB _SFR_MEM8(0x0499) -#define TWID_SLAVE_STATUS _SFR_MEM8(0x049A) -#define TWID_SLAVE_ADDR _SFR_MEM8(0x049B) -#define TWID_SLAVE_DATA _SFR_MEM8(0x049C) - -/* TWIE - Two-Wire Interface E */ -#define TWIE_CTRL _SFR_MEM8(0x04A0) -#define TWIE_MASTER_CTRLA _SFR_MEM8(0x04A1) -#define TWIE_MASTER_CTRLB _SFR_MEM8(0x04A2) -#define TWIE_MASTER_CTRLC _SFR_MEM8(0x04A3) -#define TWIE_MASTER_STATUS _SFR_MEM8(0x04A4) -#define TWIE_MASTER_BAUD _SFR_MEM8(0x04A5) -#define TWIE_MASTER_ADDR _SFR_MEM8(0x04A6) -#define TWIE_MASTER_DATA _SFR_MEM8(0x04A7) -#define TWIE_SLAVE_CTRLA _SFR_MEM8(0x04A8) -#define TWIE_SLAVE_CTRLB _SFR_MEM8(0x04A9) -#define TWIE_SLAVE_STATUS _SFR_MEM8(0x04AA) -#define TWIE_SLAVE_ADDR _SFR_MEM8(0x04AB) -#define TWIE_SLAVE_DATA _SFR_MEM8(0x04AC) - -/* TWIF - Two-Wire Interface F */ -#define TWIF_CTRL _SFR_MEM8(0x04B0) -#define TWIF_MASTER_CTRLA _SFR_MEM8(0x04B1) -#define TWIF_MASTER_CTRLB _SFR_MEM8(0x04B2) -#define TWIF_MASTER_CTRLC _SFR_MEM8(0x04B3) -#define TWIF_MASTER_STATUS _SFR_MEM8(0x04B4) -#define TWIF_MASTER_BAUD _SFR_MEM8(0x04B5) -#define TWIF_MASTER_ADDR _SFR_MEM8(0x04B6) -#define TWIF_MASTER_DATA _SFR_MEM8(0x04B7) -#define TWIF_SLAVE_CTRLA _SFR_MEM8(0x04B8) -#define TWIF_SLAVE_CTRLB _SFR_MEM8(0x04B9) -#define TWIF_SLAVE_STATUS _SFR_MEM8(0x04BA) -#define TWIF_SLAVE_ADDR _SFR_MEM8(0x04BB) -#define TWIF_SLAVE_DATA _SFR_MEM8(0x04BC) - -/* PORTA - Port A */ -#define PORTA_DIR _SFR_MEM8(0x0600) -#define PORTA_DIRSET _SFR_MEM8(0x0601) -#define PORTA_DIRCLR _SFR_MEM8(0x0602) -#define PORTA_DIRTGL _SFR_MEM8(0x0603) -#define PORTA_OUT _SFR_MEM8(0x0604) -#define PORTA_OUTSET _SFR_MEM8(0x0605) -#define PORTA_OUTCLR _SFR_MEM8(0x0606) -#define PORTA_OUTTGL _SFR_MEM8(0x0607) -#define PORTA_IN _SFR_MEM8(0x0608) -#define PORTA_INTCTRL _SFR_MEM8(0x0609) -#define PORTA_INT0MASK _SFR_MEM8(0x060A) -#define PORTA_INT1MASK _SFR_MEM8(0x060B) -#define PORTA_INTFLAGS _SFR_MEM8(0x060C) -#define PORTA_PIN0CTRL _SFR_MEM8(0x0610) -#define PORTA_PIN1CTRL _SFR_MEM8(0x0611) -#define PORTA_PIN2CTRL _SFR_MEM8(0x0612) -#define PORTA_PIN3CTRL _SFR_MEM8(0x0613) -#define PORTA_PIN4CTRL _SFR_MEM8(0x0614) -#define PORTA_PIN5CTRL _SFR_MEM8(0x0615) -#define PORTA_PIN6CTRL _SFR_MEM8(0x0616) -#define PORTA_PIN7CTRL _SFR_MEM8(0x0617) - -/* PORTB - Port B */ -#define PORTB_DIR _SFR_MEM8(0x0620) -#define PORTB_DIRSET _SFR_MEM8(0x0621) -#define PORTB_DIRCLR _SFR_MEM8(0x0622) -#define PORTB_DIRTGL _SFR_MEM8(0x0623) -#define PORTB_OUT _SFR_MEM8(0x0624) -#define PORTB_OUTSET _SFR_MEM8(0x0625) -#define PORTB_OUTCLR _SFR_MEM8(0x0626) -#define PORTB_OUTTGL _SFR_MEM8(0x0627) -#define PORTB_IN _SFR_MEM8(0x0628) -#define PORTB_INTCTRL _SFR_MEM8(0x0629) -#define PORTB_INT0MASK _SFR_MEM8(0x062A) -#define PORTB_INT1MASK _SFR_MEM8(0x062B) -#define PORTB_INTFLAGS _SFR_MEM8(0x062C) -#define PORTB_PIN0CTRL _SFR_MEM8(0x0630) -#define PORTB_PIN1CTRL _SFR_MEM8(0x0631) -#define PORTB_PIN2CTRL _SFR_MEM8(0x0632) -#define PORTB_PIN3CTRL _SFR_MEM8(0x0633) -#define PORTB_PIN4CTRL _SFR_MEM8(0x0634) -#define PORTB_PIN5CTRL _SFR_MEM8(0x0635) -#define PORTB_PIN6CTRL _SFR_MEM8(0x0636) -#define PORTB_PIN7CTRL _SFR_MEM8(0x0637) - -/* PORTC - Port C */ -#define PORTC_DIR _SFR_MEM8(0x0640) -#define PORTC_DIRSET _SFR_MEM8(0x0641) -#define PORTC_DIRCLR _SFR_MEM8(0x0642) -#define PORTC_DIRTGL _SFR_MEM8(0x0643) -#define PORTC_OUT _SFR_MEM8(0x0644) -#define PORTC_OUTSET _SFR_MEM8(0x0645) -#define PORTC_OUTCLR _SFR_MEM8(0x0646) -#define PORTC_OUTTGL _SFR_MEM8(0x0647) -#define PORTC_IN _SFR_MEM8(0x0648) -#define PORTC_INTCTRL _SFR_MEM8(0x0649) -#define PORTC_INT0MASK _SFR_MEM8(0x064A) -#define PORTC_INT1MASK _SFR_MEM8(0x064B) -#define PORTC_INTFLAGS _SFR_MEM8(0x064C) -#define PORTC_PIN0CTRL _SFR_MEM8(0x0650) -#define PORTC_PIN1CTRL _SFR_MEM8(0x0651) -#define PORTC_PIN2CTRL _SFR_MEM8(0x0652) -#define PORTC_PIN3CTRL _SFR_MEM8(0x0653) -#define PORTC_PIN4CTRL _SFR_MEM8(0x0654) -#define PORTC_PIN5CTRL _SFR_MEM8(0x0655) -#define PORTC_PIN6CTRL _SFR_MEM8(0x0656) -#define PORTC_PIN7CTRL _SFR_MEM8(0x0657) - -/* PORTD - Port D */ -#define PORTD_DIR _SFR_MEM8(0x0660) -#define PORTD_DIRSET _SFR_MEM8(0x0661) -#define PORTD_DIRCLR _SFR_MEM8(0x0662) -#define PORTD_DIRTGL _SFR_MEM8(0x0663) -#define PORTD_OUT _SFR_MEM8(0x0664) -#define PORTD_OUTSET _SFR_MEM8(0x0665) -#define PORTD_OUTCLR _SFR_MEM8(0x0666) -#define PORTD_OUTTGL _SFR_MEM8(0x0667) -#define PORTD_IN _SFR_MEM8(0x0668) -#define PORTD_INTCTRL _SFR_MEM8(0x0669) -#define PORTD_INT0MASK _SFR_MEM8(0x066A) -#define PORTD_INT1MASK _SFR_MEM8(0x066B) -#define PORTD_INTFLAGS _SFR_MEM8(0x066C) -#define PORTD_PIN0CTRL _SFR_MEM8(0x0670) -#define PORTD_PIN1CTRL _SFR_MEM8(0x0671) -#define PORTD_PIN2CTRL _SFR_MEM8(0x0672) -#define PORTD_PIN3CTRL _SFR_MEM8(0x0673) -#define PORTD_PIN4CTRL _SFR_MEM8(0x0674) -#define PORTD_PIN5CTRL _SFR_MEM8(0x0675) -#define PORTD_PIN6CTRL _SFR_MEM8(0x0676) -#define PORTD_PIN7CTRL _SFR_MEM8(0x0677) - -/* PORTE - Port E */ -#define PORTE_DIR _SFR_MEM8(0x0680) -#define PORTE_DIRSET _SFR_MEM8(0x0681) -#define PORTE_DIRCLR _SFR_MEM8(0x0682) -#define PORTE_DIRTGL _SFR_MEM8(0x0683) -#define PORTE_OUT _SFR_MEM8(0x0684) -#define PORTE_OUTSET _SFR_MEM8(0x0685) -#define PORTE_OUTCLR _SFR_MEM8(0x0686) -#define PORTE_OUTTGL _SFR_MEM8(0x0687) -#define PORTE_IN _SFR_MEM8(0x0688) -#define PORTE_INTCTRL _SFR_MEM8(0x0689) -#define PORTE_INT0MASK _SFR_MEM8(0x068A) -#define PORTE_INT1MASK _SFR_MEM8(0x068B) -#define PORTE_INTFLAGS _SFR_MEM8(0x068C) -#define PORTE_PIN0CTRL _SFR_MEM8(0x0690) -#define PORTE_PIN1CTRL _SFR_MEM8(0x0691) -#define PORTE_PIN2CTRL _SFR_MEM8(0x0692) -#define PORTE_PIN3CTRL _SFR_MEM8(0x0693) -#define PORTE_PIN4CTRL _SFR_MEM8(0x0694) -#define PORTE_PIN5CTRL _SFR_MEM8(0x0695) -#define PORTE_PIN6CTRL _SFR_MEM8(0x0696) -#define PORTE_PIN7CTRL _SFR_MEM8(0x0697) - -/* PORTF - Port F */ -#define PORTF_DIR _SFR_MEM8(0x06A0) -#define PORTF_DIRSET _SFR_MEM8(0x06A1) -#define PORTF_DIRCLR _SFR_MEM8(0x06A2) -#define PORTF_DIRTGL _SFR_MEM8(0x06A3) -#define PORTF_OUT _SFR_MEM8(0x06A4) -#define PORTF_OUTSET _SFR_MEM8(0x06A5) -#define PORTF_OUTCLR _SFR_MEM8(0x06A6) -#define PORTF_OUTTGL _SFR_MEM8(0x06A7) -#define PORTF_IN _SFR_MEM8(0x06A8) -#define PORTF_INTCTRL _SFR_MEM8(0x06A9) -#define PORTF_INT0MASK _SFR_MEM8(0x06AA) -#define PORTF_INT1MASK _SFR_MEM8(0x06AB) -#define PORTF_INTFLAGS _SFR_MEM8(0x06AC) -#define PORTF_PIN0CTRL _SFR_MEM8(0x06B0) -#define PORTF_PIN1CTRL _SFR_MEM8(0x06B1) -#define PORTF_PIN2CTRL _SFR_MEM8(0x06B2) -#define PORTF_PIN3CTRL _SFR_MEM8(0x06B3) -#define PORTF_PIN4CTRL _SFR_MEM8(0x06B4) -#define PORTF_PIN5CTRL _SFR_MEM8(0x06B5) -#define PORTF_PIN6CTRL _SFR_MEM8(0x06B6) -#define PORTF_PIN7CTRL _SFR_MEM8(0x06B7) - -/* PORTH - Port H */ -#define PORTH_DIR _SFR_MEM8(0x06E0) -#define PORTH_DIRSET _SFR_MEM8(0x06E1) -#define PORTH_DIRCLR _SFR_MEM8(0x06E2) -#define PORTH_DIRTGL _SFR_MEM8(0x06E3) -#define PORTH_OUT _SFR_MEM8(0x06E4) -#define PORTH_OUTSET _SFR_MEM8(0x06E5) -#define PORTH_OUTCLR _SFR_MEM8(0x06E6) -#define PORTH_OUTTGL _SFR_MEM8(0x06E7) -#define PORTH_IN _SFR_MEM8(0x06E8) -#define PORTH_INTCTRL _SFR_MEM8(0x06E9) -#define PORTH_INT0MASK _SFR_MEM8(0x06EA) -#define PORTH_INT1MASK _SFR_MEM8(0x06EB) -#define PORTH_INTFLAGS _SFR_MEM8(0x06EC) -#define PORTH_PIN0CTRL _SFR_MEM8(0x06F0) -#define PORTH_PIN1CTRL _SFR_MEM8(0x06F1) -#define PORTH_PIN2CTRL _SFR_MEM8(0x06F2) -#define PORTH_PIN3CTRL _SFR_MEM8(0x06F3) -#define PORTH_PIN4CTRL _SFR_MEM8(0x06F4) -#define PORTH_PIN5CTRL _SFR_MEM8(0x06F5) -#define PORTH_PIN6CTRL _SFR_MEM8(0x06F6) -#define PORTH_PIN7CTRL _SFR_MEM8(0x06F7) - -/* PORTJ - Port J */ -#define PORTJ_DIR _SFR_MEM8(0x0700) -#define PORTJ_DIRSET _SFR_MEM8(0x0701) -#define PORTJ_DIRCLR _SFR_MEM8(0x0702) -#define PORTJ_DIRTGL _SFR_MEM8(0x0703) -#define PORTJ_OUT _SFR_MEM8(0x0704) -#define PORTJ_OUTSET _SFR_MEM8(0x0705) -#define PORTJ_OUTCLR _SFR_MEM8(0x0706) -#define PORTJ_OUTTGL _SFR_MEM8(0x0707) -#define PORTJ_IN _SFR_MEM8(0x0708) -#define PORTJ_INTCTRL _SFR_MEM8(0x0709) -#define PORTJ_INT0MASK _SFR_MEM8(0x070A) -#define PORTJ_INT1MASK _SFR_MEM8(0x070B) -#define PORTJ_INTFLAGS _SFR_MEM8(0x070C) -#define PORTJ_PIN0CTRL _SFR_MEM8(0x0710) -#define PORTJ_PIN1CTRL _SFR_MEM8(0x0711) -#define PORTJ_PIN2CTRL _SFR_MEM8(0x0712) -#define PORTJ_PIN3CTRL _SFR_MEM8(0x0713) -#define PORTJ_PIN4CTRL _SFR_MEM8(0x0714) -#define PORTJ_PIN5CTRL _SFR_MEM8(0x0715) -#define PORTJ_PIN6CTRL _SFR_MEM8(0x0716) -#define PORTJ_PIN7CTRL _SFR_MEM8(0x0717) - -/* PORTK - Port K */ -#define PORTK_DIR _SFR_MEM8(0x0720) -#define PORTK_DIRSET _SFR_MEM8(0x0721) -#define PORTK_DIRCLR _SFR_MEM8(0x0722) -#define PORTK_DIRTGL _SFR_MEM8(0x0723) -#define PORTK_OUT _SFR_MEM8(0x0724) -#define PORTK_OUTSET _SFR_MEM8(0x0725) -#define PORTK_OUTCLR _SFR_MEM8(0x0726) -#define PORTK_OUTTGL _SFR_MEM8(0x0727) -#define PORTK_IN _SFR_MEM8(0x0728) -#define PORTK_INTCTRL _SFR_MEM8(0x0729) -#define PORTK_INT0MASK _SFR_MEM8(0x072A) -#define PORTK_INT1MASK _SFR_MEM8(0x072B) -#define PORTK_INTFLAGS _SFR_MEM8(0x072C) -#define PORTK_PIN0CTRL _SFR_MEM8(0x0730) -#define PORTK_PIN1CTRL _SFR_MEM8(0x0731) -#define PORTK_PIN2CTRL _SFR_MEM8(0x0732) -#define PORTK_PIN3CTRL _SFR_MEM8(0x0733) -#define PORTK_PIN4CTRL _SFR_MEM8(0x0734) -#define PORTK_PIN5CTRL _SFR_MEM8(0x0735) -#define PORTK_PIN6CTRL _SFR_MEM8(0x0736) -#define PORTK_PIN7CTRL _SFR_MEM8(0x0737) - -/* PORTQ - Port Q */ -#define PORTQ_DIR _SFR_MEM8(0x07C0) -#define PORTQ_DIRSET _SFR_MEM8(0x07C1) -#define PORTQ_DIRCLR _SFR_MEM8(0x07C2) -#define PORTQ_DIRTGL _SFR_MEM8(0x07C3) -#define PORTQ_OUT _SFR_MEM8(0x07C4) -#define PORTQ_OUTSET _SFR_MEM8(0x07C5) -#define PORTQ_OUTCLR _SFR_MEM8(0x07C6) -#define PORTQ_OUTTGL _SFR_MEM8(0x07C7) -#define PORTQ_IN _SFR_MEM8(0x07C8) -#define PORTQ_INTCTRL _SFR_MEM8(0x07C9) -#define PORTQ_INT0MASK _SFR_MEM8(0x07CA) -#define PORTQ_INT1MASK _SFR_MEM8(0x07CB) -#define PORTQ_INTFLAGS _SFR_MEM8(0x07CC) -#define PORTQ_PIN0CTRL _SFR_MEM8(0x07D0) -#define PORTQ_PIN1CTRL _SFR_MEM8(0x07D1) -#define PORTQ_PIN2CTRL _SFR_MEM8(0x07D2) -#define PORTQ_PIN3CTRL _SFR_MEM8(0x07D3) -#define PORTQ_PIN4CTRL _SFR_MEM8(0x07D4) -#define PORTQ_PIN5CTRL _SFR_MEM8(0x07D5) -#define PORTQ_PIN6CTRL _SFR_MEM8(0x07D6) -#define PORTQ_PIN7CTRL _SFR_MEM8(0x07D7) - -/* PORTR - Port R */ -#define PORTR_DIR _SFR_MEM8(0x07E0) -#define PORTR_DIRSET _SFR_MEM8(0x07E1) -#define PORTR_DIRCLR _SFR_MEM8(0x07E2) -#define PORTR_DIRTGL _SFR_MEM8(0x07E3) -#define PORTR_OUT _SFR_MEM8(0x07E4) -#define PORTR_OUTSET _SFR_MEM8(0x07E5) -#define PORTR_OUTCLR _SFR_MEM8(0x07E6) -#define PORTR_OUTTGL _SFR_MEM8(0x07E7) -#define PORTR_IN _SFR_MEM8(0x07E8) -#define PORTR_INTCTRL _SFR_MEM8(0x07E9) -#define PORTR_INT0MASK _SFR_MEM8(0x07EA) -#define PORTR_INT1MASK _SFR_MEM8(0x07EB) -#define PORTR_INTFLAGS _SFR_MEM8(0x07EC) -#define PORTR_PIN0CTRL _SFR_MEM8(0x07F0) -#define PORTR_PIN1CTRL _SFR_MEM8(0x07F1) -#define PORTR_PIN2CTRL _SFR_MEM8(0x07F2) -#define PORTR_PIN3CTRL _SFR_MEM8(0x07F3) -#define PORTR_PIN4CTRL _SFR_MEM8(0x07F4) -#define PORTR_PIN5CTRL _SFR_MEM8(0x07F5) -#define PORTR_PIN6CTRL _SFR_MEM8(0x07F6) -#define PORTR_PIN7CTRL _SFR_MEM8(0x07F7) - -/* TCC0 - Timer/Counter C0 */ -#define TCC0_CTRLA _SFR_MEM8(0x0800) -#define TCC0_CTRLB _SFR_MEM8(0x0801) -#define TCC0_CTRLC _SFR_MEM8(0x0802) -#define TCC0_CTRLD _SFR_MEM8(0x0803) -#define TCC0_CTRLE _SFR_MEM8(0x0804) -#define TCC0_INTCTRLA _SFR_MEM8(0x0806) -#define TCC0_INTCTRLB _SFR_MEM8(0x0807) -#define TCC0_CTRLFCLR _SFR_MEM8(0x0808) -#define TCC0_CTRLFSET _SFR_MEM8(0x0809) -#define TCC0_CTRLGCLR _SFR_MEM8(0x080A) -#define TCC0_CTRLGSET _SFR_MEM8(0x080B) -#define TCC0_INTFLAGS _SFR_MEM8(0x080C) -#define TCC0_TEMP _SFR_MEM8(0x080F) -#define TCC0_CNT _SFR_MEM16(0x0820) -#define TCC0_PER _SFR_MEM16(0x0826) -#define TCC0_CCA _SFR_MEM16(0x0828) -#define TCC0_CCB _SFR_MEM16(0x082A) -#define TCC0_CCC _SFR_MEM16(0x082C) -#define TCC0_CCD _SFR_MEM16(0x082E) -#define TCC0_PERBUF _SFR_MEM16(0x0836) -#define TCC0_CCABUF _SFR_MEM16(0x0838) -#define TCC0_CCBBUF _SFR_MEM16(0x083A) -#define TCC0_CCCBUF _SFR_MEM16(0x083C) -#define TCC0_CCDBUF _SFR_MEM16(0x083E) - -/* TCC1 - Timer/Counter C1 */ -#define TCC1_CTRLA _SFR_MEM8(0x0840) -#define TCC1_CTRLB _SFR_MEM8(0x0841) -#define TCC1_CTRLC _SFR_MEM8(0x0842) -#define TCC1_CTRLD _SFR_MEM8(0x0843) -#define TCC1_CTRLE _SFR_MEM8(0x0844) -#define TCC1_INTCTRLA _SFR_MEM8(0x0846) -#define TCC1_INTCTRLB _SFR_MEM8(0x0847) -#define TCC1_CTRLFCLR _SFR_MEM8(0x0848) -#define TCC1_CTRLFSET _SFR_MEM8(0x0849) -#define TCC1_CTRLGCLR _SFR_MEM8(0x084A) -#define TCC1_CTRLGSET _SFR_MEM8(0x084B) -#define TCC1_INTFLAGS _SFR_MEM8(0x084C) -#define TCC1_TEMP _SFR_MEM8(0x084F) -#define TCC1_CNT _SFR_MEM16(0x0860) -#define TCC1_PER _SFR_MEM16(0x0866) -#define TCC1_CCA _SFR_MEM16(0x0868) -#define TCC1_CCB _SFR_MEM16(0x086A) -#define TCC1_PERBUF _SFR_MEM16(0x0876) -#define TCC1_CCABUF _SFR_MEM16(0x0878) -#define TCC1_CCBBUF _SFR_MEM16(0x087A) - -/* AWEXC - Advanced Waveform Extension C */ -#define AWEXC_CTRL _SFR_MEM8(0x0880) -#define AWEXC_FDEVMASK _SFR_MEM8(0x0882) -#define AWEXC_FDCTRL _SFR_MEM8(0x0883) -#define AWEXC_STATUS _SFR_MEM8(0x0884) -#define AWEXC_DTBOTH _SFR_MEM8(0x0886) -#define AWEXC_DTBOTHBUF _SFR_MEM8(0x0887) -#define AWEXC_DTLS _SFR_MEM8(0x0888) -#define AWEXC_DTHS _SFR_MEM8(0x0889) -#define AWEXC_DTLSBUF _SFR_MEM8(0x088A) -#define AWEXC_DTHSBUF _SFR_MEM8(0x088B) -#define AWEXC_OUTOVEN _SFR_MEM8(0x088C) - -/* HIRESC - High-Resolution Extension C */ -#define HIRESC_CTRL _SFR_MEM8(0x0890) - -/* USARTC0 - Universal Asynchronous Receiver-Transmitter C0 */ -#define USARTC0_DATA _SFR_MEM8(0x08A0) -#define USARTC0_STATUS _SFR_MEM8(0x08A1) -#define USARTC0_CTRLA _SFR_MEM8(0x08A3) -#define USARTC0_CTRLB _SFR_MEM8(0x08A4) -#define USARTC0_CTRLC _SFR_MEM8(0x08A5) -#define USARTC0_BAUDCTRLA _SFR_MEM8(0x08A6) -#define USARTC0_BAUDCTRLB _SFR_MEM8(0x08A7) - -/* USARTC1 - Universal Asynchronous Receiver-Transmitter C1 */ -#define USARTC1_DATA _SFR_MEM8(0x08B0) -#define USARTC1_STATUS _SFR_MEM8(0x08B1) -#define USARTC1_CTRLA _SFR_MEM8(0x08B3) -#define USARTC1_CTRLB _SFR_MEM8(0x08B4) -#define USARTC1_CTRLC _SFR_MEM8(0x08B5) -#define USARTC1_BAUDCTRLA _SFR_MEM8(0x08B6) -#define USARTC1_BAUDCTRLB _SFR_MEM8(0x08B7) - -/* SPIC - Serial Peripheral Interface C */ -#define SPIC_CTRL _SFR_MEM8(0x08C0) -#define SPIC_INTCTRL _SFR_MEM8(0x08C1) -#define SPIC_STATUS _SFR_MEM8(0x08C2) -#define SPIC_DATA _SFR_MEM8(0x08C3) - -/* IRCOM - IR Communication Module */ -#define IRCOM_CTRL _SFR_MEM8(0x08F8) -#define IRCOM_TXPLCTRL _SFR_MEM8(0x08F9) -#define IRCOM_RXPLCTRL _SFR_MEM8(0x08FA) - -/* TCD0 - Timer/Counter D0 */ -#define TCD0_CTRLA _SFR_MEM8(0x0900) -#define TCD0_CTRLB _SFR_MEM8(0x0901) -#define TCD0_CTRLC _SFR_MEM8(0x0902) -#define TCD0_CTRLD _SFR_MEM8(0x0903) -#define TCD0_CTRLE _SFR_MEM8(0x0904) -#define TCD0_INTCTRLA _SFR_MEM8(0x0906) -#define TCD0_INTCTRLB _SFR_MEM8(0x0907) -#define TCD0_CTRLFCLR _SFR_MEM8(0x0908) -#define TCD0_CTRLFSET _SFR_MEM8(0x0909) -#define TCD0_CTRLGCLR _SFR_MEM8(0x090A) -#define TCD0_CTRLGSET _SFR_MEM8(0x090B) -#define TCD0_INTFLAGS _SFR_MEM8(0x090C) -#define TCD0_TEMP _SFR_MEM8(0x090F) -#define TCD0_CNT _SFR_MEM16(0x0920) -#define TCD0_PER _SFR_MEM16(0x0926) -#define TCD0_CCA _SFR_MEM16(0x0928) -#define TCD0_CCB _SFR_MEM16(0x092A) -#define TCD0_CCC _SFR_MEM16(0x092C) -#define TCD0_CCD _SFR_MEM16(0x092E) -#define TCD0_PERBUF _SFR_MEM16(0x0936) -#define TCD0_CCABUF _SFR_MEM16(0x0938) -#define TCD0_CCBBUF _SFR_MEM16(0x093A) -#define TCD0_CCCBUF _SFR_MEM16(0x093C) -#define TCD0_CCDBUF _SFR_MEM16(0x093E) - -/* TCD1 - Timer/Counter D1 */ -#define TCD1_CTRLA _SFR_MEM8(0x0940) -#define TCD1_CTRLB _SFR_MEM8(0x0941) -#define TCD1_CTRLC _SFR_MEM8(0x0942) -#define TCD1_CTRLD _SFR_MEM8(0x0943) -#define TCD1_CTRLE _SFR_MEM8(0x0944) -#define TCD1_INTCTRLA _SFR_MEM8(0x0946) -#define TCD1_INTCTRLB _SFR_MEM8(0x0947) -#define TCD1_CTRLFCLR _SFR_MEM8(0x0948) -#define TCD1_CTRLFSET _SFR_MEM8(0x0949) -#define TCD1_CTRLGCLR _SFR_MEM8(0x094A) -#define TCD1_CTRLGSET _SFR_MEM8(0x094B) -#define TCD1_INTFLAGS _SFR_MEM8(0x094C) -#define TCD1_TEMP _SFR_MEM8(0x094F) -#define TCD1_CNT _SFR_MEM16(0x0960) -#define TCD1_PER _SFR_MEM16(0x0966) -#define TCD1_CCA _SFR_MEM16(0x0968) -#define TCD1_CCB _SFR_MEM16(0x096A) -#define TCD1_PERBUF _SFR_MEM16(0x0976) -#define TCD1_CCABUF _SFR_MEM16(0x0978) -#define TCD1_CCBBUF _SFR_MEM16(0x097A) - -/* HIRESD - High-Resolution Extension D */ -#define HIRESD_CTRL _SFR_MEM8(0x0990) - -/* USARTD0 - Universal Asynchronous Receiver-Transmitter D0 */ -#define USARTD0_DATA _SFR_MEM8(0x09A0) -#define USARTD0_STATUS _SFR_MEM8(0x09A1) -#define USARTD0_CTRLA _SFR_MEM8(0x09A3) -#define USARTD0_CTRLB _SFR_MEM8(0x09A4) -#define USARTD0_CTRLC _SFR_MEM8(0x09A5) -#define USARTD0_BAUDCTRLA _SFR_MEM8(0x09A6) -#define USARTD0_BAUDCTRLB _SFR_MEM8(0x09A7) - -/* USARTD1 - Universal Asynchronous Receiver-Transmitter D1 */ -#define USARTD1_DATA _SFR_MEM8(0x09B0) -#define USARTD1_STATUS _SFR_MEM8(0x09B1) -#define USARTD1_CTRLA _SFR_MEM8(0x09B3) -#define USARTD1_CTRLB _SFR_MEM8(0x09B4) -#define USARTD1_CTRLC _SFR_MEM8(0x09B5) -#define USARTD1_BAUDCTRLA _SFR_MEM8(0x09B6) -#define USARTD1_BAUDCTRLB _SFR_MEM8(0x09B7) - -/* SPID - Serial Peripheral Interface D */ -#define SPID_CTRL _SFR_MEM8(0x09C0) -#define SPID_INTCTRL _SFR_MEM8(0x09C1) -#define SPID_STATUS _SFR_MEM8(0x09C2) -#define SPID_DATA _SFR_MEM8(0x09C3) - -/* TCE0 - Timer/Counter E0 */ -#define TCE0_CTRLA _SFR_MEM8(0x0A00) -#define TCE0_CTRLB _SFR_MEM8(0x0A01) -#define TCE0_CTRLC _SFR_MEM8(0x0A02) -#define TCE0_CTRLD _SFR_MEM8(0x0A03) -#define TCE0_CTRLE _SFR_MEM8(0x0A04) -#define TCE0_INTCTRLA _SFR_MEM8(0x0A06) -#define TCE0_INTCTRLB _SFR_MEM8(0x0A07) -#define TCE0_CTRLFCLR _SFR_MEM8(0x0A08) -#define TCE0_CTRLFSET _SFR_MEM8(0x0A09) -#define TCE0_CTRLGCLR _SFR_MEM8(0x0A0A) -#define TCE0_CTRLGSET _SFR_MEM8(0x0A0B) -#define TCE0_INTFLAGS _SFR_MEM8(0x0A0C) -#define TCE0_TEMP _SFR_MEM8(0x0A0F) -#define TCE0_CNT _SFR_MEM16(0x0A20) -#define TCE0_PER _SFR_MEM16(0x0A26) -#define TCE0_CCA _SFR_MEM16(0x0A28) -#define TCE0_CCB _SFR_MEM16(0x0A2A) -#define TCE0_CCC _SFR_MEM16(0x0A2C) -#define TCE0_CCD _SFR_MEM16(0x0A2E) -#define TCE0_PERBUF _SFR_MEM16(0x0A36) -#define TCE0_CCABUF _SFR_MEM16(0x0A38) -#define TCE0_CCBBUF _SFR_MEM16(0x0A3A) -#define TCE0_CCCBUF _SFR_MEM16(0x0A3C) -#define TCE0_CCDBUF _SFR_MEM16(0x0A3E) - -/* TCE1 - Timer/Counter E1 */ -#define TCE1_CTRLA _SFR_MEM8(0x0A40) -#define TCE1_CTRLB _SFR_MEM8(0x0A41) -#define TCE1_CTRLC _SFR_MEM8(0x0A42) -#define TCE1_CTRLD _SFR_MEM8(0x0A43) -#define TCE1_CTRLE _SFR_MEM8(0x0A44) -#define TCE1_INTCTRLA _SFR_MEM8(0x0A46) -#define TCE1_INTCTRLB _SFR_MEM8(0x0A47) -#define TCE1_CTRLFCLR _SFR_MEM8(0x0A48) -#define TCE1_CTRLFSET _SFR_MEM8(0x0A49) -#define TCE1_CTRLGCLR _SFR_MEM8(0x0A4A) -#define TCE1_CTRLGSET _SFR_MEM8(0x0A4B) -#define TCE1_INTFLAGS _SFR_MEM8(0x0A4C) -#define TCE1_TEMP _SFR_MEM8(0x0A4F) -#define TCE1_CNT _SFR_MEM16(0x0A60) -#define TCE1_PER _SFR_MEM16(0x0A66) -#define TCE1_CCA _SFR_MEM16(0x0A68) -#define TCE1_CCB _SFR_MEM16(0x0A6A) -#define TCE1_PERBUF _SFR_MEM16(0x0A76) -#define TCE1_CCABUF _SFR_MEM16(0x0A78) -#define TCE1_CCBBUF _SFR_MEM16(0x0A7A) - -/* AWEXE - Advanced Waveform Extension E */ -#define AWEXE_CTRL _SFR_MEM8(0x0A80) -#define AWEXE_FDEVMASK _SFR_MEM8(0x0A82) -#define AWEXE_FDCTRL _SFR_MEM8(0x0A83) -#define AWEXE_STATUS _SFR_MEM8(0x0A84) -#define AWEXE_DTBOTH _SFR_MEM8(0x0A86) -#define AWEXE_DTBOTHBUF _SFR_MEM8(0x0A87) -#define AWEXE_DTLS _SFR_MEM8(0x0A88) -#define AWEXE_DTHS _SFR_MEM8(0x0A89) -#define AWEXE_DTLSBUF _SFR_MEM8(0x0A8A) -#define AWEXE_DTHSBUF _SFR_MEM8(0x0A8B) -#define AWEXE_OUTOVEN _SFR_MEM8(0x0A8C) - -/* HIRESE - High-Resolution Extension E */ -#define HIRESE_CTRL _SFR_MEM8(0x0A90) - -/* USARTE0 - Universal Asynchronous Receiver-Transmitter E0 */ -#define USARTE0_DATA _SFR_MEM8(0x0AA0) -#define USARTE0_STATUS _SFR_MEM8(0x0AA1) -#define USARTE0_CTRLA _SFR_MEM8(0x0AA3) -#define USARTE0_CTRLB _SFR_MEM8(0x0AA4) -#define USARTE0_CTRLC _SFR_MEM8(0x0AA5) -#define USARTE0_BAUDCTRLA _SFR_MEM8(0x0AA6) -#define USARTE0_BAUDCTRLB _SFR_MEM8(0x0AA7) - -/* USARTE1 - Universal Asynchronous Receiver-Transmitter E1 */ -#define USARTE1_DATA _SFR_MEM8(0x0AB0) -#define USARTE1_STATUS _SFR_MEM8(0x0AB1) -#define USARTE1_CTRLA _SFR_MEM8(0x0AB3) -#define USARTE1_CTRLB _SFR_MEM8(0x0AB4) -#define USARTE1_CTRLC _SFR_MEM8(0x0AB5) -#define USARTE1_BAUDCTRLA _SFR_MEM8(0x0AB6) -#define USARTE1_BAUDCTRLB _SFR_MEM8(0x0AB7) - -/* SPIE - Serial Peripheral Interface E */ -#define SPIE_CTRL _SFR_MEM8(0x0AC0) -#define SPIE_INTCTRL _SFR_MEM8(0x0AC1) -#define SPIE_STATUS _SFR_MEM8(0x0AC2) -#define SPIE_DATA _SFR_MEM8(0x0AC3) - -/* TCF0 - Timer/Counter F0 */ -#define TCF0_CTRLA _SFR_MEM8(0x0B00) -#define TCF0_CTRLB _SFR_MEM8(0x0B01) -#define TCF0_CTRLC _SFR_MEM8(0x0B02) -#define TCF0_CTRLD _SFR_MEM8(0x0B03) -#define TCF0_CTRLE _SFR_MEM8(0x0B04) -#define TCF0_INTCTRLA _SFR_MEM8(0x0B06) -#define TCF0_INTCTRLB _SFR_MEM8(0x0B07) -#define TCF0_CTRLFCLR _SFR_MEM8(0x0B08) -#define TCF0_CTRLFSET _SFR_MEM8(0x0B09) -#define TCF0_CTRLGCLR _SFR_MEM8(0x0B0A) -#define TCF0_CTRLGSET _SFR_MEM8(0x0B0B) -#define TCF0_INTFLAGS _SFR_MEM8(0x0B0C) -#define TCF0_TEMP _SFR_MEM8(0x0B0F) -#define TCF0_CNT _SFR_MEM16(0x0B20) -#define TCF0_PER _SFR_MEM16(0x0B26) -#define TCF0_CCA _SFR_MEM16(0x0B28) -#define TCF0_CCB _SFR_MEM16(0x0B2A) -#define TCF0_CCC _SFR_MEM16(0x0B2C) -#define TCF0_CCD _SFR_MEM16(0x0B2E) -#define TCF0_PERBUF _SFR_MEM16(0x0B36) -#define TCF0_CCABUF _SFR_MEM16(0x0B38) -#define TCF0_CCBBUF _SFR_MEM16(0x0B3A) -#define TCF0_CCCBUF _SFR_MEM16(0x0B3C) -#define TCF0_CCDBUF _SFR_MEM16(0x0B3E) - -/* TCF1 - Timer/Counter F1 */ -#define TCF1_CTRLA _SFR_MEM8(0x0B40) -#define TCF1_CTRLB _SFR_MEM8(0x0B41) -#define TCF1_CTRLC _SFR_MEM8(0x0B42) -#define TCF1_CTRLD _SFR_MEM8(0x0B43) -#define TCF1_CTRLE _SFR_MEM8(0x0B44) -#define TCF1_INTCTRLA _SFR_MEM8(0x0B46) -#define TCF1_INTCTRLB _SFR_MEM8(0x0B47) -#define TCF1_CTRLFCLR _SFR_MEM8(0x0B48) -#define TCF1_CTRLFSET _SFR_MEM8(0x0B49) -#define TCF1_CTRLGCLR _SFR_MEM8(0x0B4A) -#define TCF1_CTRLGSET _SFR_MEM8(0x0B4B) -#define TCF1_INTFLAGS _SFR_MEM8(0x0B4C) -#define TCF1_TEMP _SFR_MEM8(0x0B4F) -#define TCF1_CNT _SFR_MEM16(0x0B60) -#define TCF1_PER _SFR_MEM16(0x0B66) -#define TCF1_CCA _SFR_MEM16(0x0B68) -#define TCF1_CCB _SFR_MEM16(0x0B6A) -#define TCF1_PERBUF _SFR_MEM16(0x0B76) -#define TCF1_CCABUF _SFR_MEM16(0x0B78) -#define TCF1_CCBBUF _SFR_MEM16(0x0B7A) - -/* HIRESF - High-Resolution Extension F */ -#define HIRESF_CTRL _SFR_MEM8(0x0B90) - -/* USARTF0 - Universal Asynchronous Receiver-Transmitter F0 */ -#define USARTF0_DATA _SFR_MEM8(0x0BA0) -#define USARTF0_STATUS _SFR_MEM8(0x0BA1) -#define USARTF0_CTRLA _SFR_MEM8(0x0BA3) -#define USARTF0_CTRLB _SFR_MEM8(0x0BA4) -#define USARTF0_CTRLC _SFR_MEM8(0x0BA5) -#define USARTF0_BAUDCTRLA _SFR_MEM8(0x0BA6) -#define USARTF0_BAUDCTRLB _SFR_MEM8(0x0BA7) - -/* USARTF1 - Universal Asynchronous Receiver-Transmitter F1 */ -#define USARTF1_DATA _SFR_MEM8(0x0BB0) -#define USARTF1_STATUS _SFR_MEM8(0x0BB1) -#define USARTF1_CTRLA _SFR_MEM8(0x0BB3) -#define USARTF1_CTRLB _SFR_MEM8(0x0BB4) -#define USARTF1_CTRLC _SFR_MEM8(0x0BB5) -#define USARTF1_BAUDCTRLA _SFR_MEM8(0x0BB6) -#define USARTF1_BAUDCTRLB _SFR_MEM8(0x0BB7) - -/* SPIF - Serial Peripheral Interface F */ -#define SPIF_CTRL _SFR_MEM8(0x0BC0) -#define SPIF_INTCTRL _SFR_MEM8(0x0BC1) -#define SPIF_STATUS _SFR_MEM8(0x0BC2) -#define SPIF_DATA _SFR_MEM8(0x0BC3) - - - -/*================== Bitfield Definitions ================== */ - -/* XOCD - On-Chip Debug System */ -/* OCD.OCDR1 bit masks and bit positions */ -#define OCD_OCDRD_bm 0x01 /* OCDR Dirty bit mask. */ -#define OCD_OCDRD_bp 0 /* OCDR Dirty bit position. */ - - -/* CPU - CPU */ -/* CPU.CCP bit masks and bit positions */ -#define CPU_CCP_gm 0xFF /* CCP signature group mask. */ -#define CPU_CCP_gp 0 /* CCP signature group position. */ -#define CPU_CCP0_bm (1<<0) /* CCP signature bit 0 mask. */ -#define CPU_CCP0_bp 0 /* CCP signature bit 0 position. */ -#define CPU_CCP1_bm (1<<1) /* CCP signature bit 1 mask. */ -#define CPU_CCP1_bp 1 /* CCP signature bit 1 position. */ -#define CPU_CCP2_bm (1<<2) /* CCP signature bit 2 mask. */ -#define CPU_CCP2_bp 2 /* CCP signature bit 2 position. */ -#define CPU_CCP3_bm (1<<3) /* CCP signature bit 3 mask. */ -#define CPU_CCP3_bp 3 /* CCP signature bit 3 position. */ -#define CPU_CCP4_bm (1<<4) /* CCP signature bit 4 mask. */ -#define CPU_CCP4_bp 4 /* CCP signature bit 4 position. */ -#define CPU_CCP5_bm (1<<5) /* CCP signature bit 5 mask. */ -#define CPU_CCP5_bp 5 /* CCP signature bit 5 position. */ -#define CPU_CCP6_bm (1<<6) /* CCP signature bit 6 mask. */ -#define CPU_CCP6_bp 6 /* CCP signature bit 6 position. */ -#define CPU_CCP7_bm (1<<7) /* CCP signature bit 7 mask. */ -#define CPU_CCP7_bp 7 /* CCP signature bit 7 position. */ - - -/* CPU.SREG bit masks and bit positions */ -#define CPU_I_bm 0x80 /* Global Interrupt Enable Flag bit mask. */ -#define CPU_I_bp 7 /* Global Interrupt Enable Flag bit position. */ - -#define CPU_T_bm 0x40 /* Transfer Bit bit mask. */ -#define CPU_T_bp 6 /* Transfer Bit bit position. */ - -#define CPU_H_bm 0x20 /* Half Carry Flag bit mask. */ -#define CPU_H_bp 5 /* Half Carry Flag bit position. */ - -#define CPU_S_bm 0x10 /* N Exclusive Or V Flag bit mask. */ -#define CPU_S_bp 4 /* N Exclusive Or V Flag bit position. */ - -#define CPU_V_bm 0x08 /* Two's Complement Overflow Flag bit mask. */ -#define CPU_V_bp 3 /* Two's Complement Overflow Flag bit position. */ - -#define CPU_N_bm 0x04 /* Negative Flag bit mask. */ -#define CPU_N_bp 2 /* Negative Flag bit position. */ - -#define CPU_Z_bm 0x02 /* Zero Flag bit mask. */ -#define CPU_Z_bp 1 /* Zero Flag bit position. */ - -#define CPU_C_bm 0x01 /* Carry Flag bit mask. */ -#define CPU_C_bp 0 /* Carry Flag bit position. */ - - -/* CLK - Clock System */ -/* CLK.CTRL bit masks and bit positions */ -#define CLK_SCLKSEL_gm 0x07 /* System Clock Selection group mask. */ -#define CLK_SCLKSEL_gp 0 /* System Clock Selection group position. */ -#define CLK_SCLKSEL0_bm (1<<0) /* System Clock Selection bit 0 mask. */ -#define CLK_SCLKSEL0_bp 0 /* System Clock Selection bit 0 position. */ -#define CLK_SCLKSEL1_bm (1<<1) /* System Clock Selection bit 1 mask. */ -#define CLK_SCLKSEL1_bp 1 /* System Clock Selection bit 1 position. */ -#define CLK_SCLKSEL2_bm (1<<2) /* System Clock Selection bit 2 mask. */ -#define CLK_SCLKSEL2_bp 2 /* System Clock Selection bit 2 position. */ - - -/* CLK.PSCTRL bit masks and bit positions */ -#define CLK_PSADIV_gm 0x7C /* Prescaler A Division Factor group mask. */ -#define CLK_PSADIV_gp 2 /* Prescaler A Division Factor group position. */ -#define CLK_PSADIV0_bm (1<<2) /* Prescaler A Division Factor bit 0 mask. */ -#define CLK_PSADIV0_bp 2 /* Prescaler A Division Factor bit 0 position. */ -#define CLK_PSADIV1_bm (1<<3) /* Prescaler A Division Factor bit 1 mask. */ -#define CLK_PSADIV1_bp 3 /* Prescaler A Division Factor bit 1 position. */ -#define CLK_PSADIV2_bm (1<<4) /* Prescaler A Division Factor bit 2 mask. */ -#define CLK_PSADIV2_bp 4 /* Prescaler A Division Factor bit 2 position. */ -#define CLK_PSADIV3_bm (1<<5) /* Prescaler A Division Factor bit 3 mask. */ -#define CLK_PSADIV3_bp 5 /* Prescaler A Division Factor bit 3 position. */ -#define CLK_PSADIV4_bm (1<<6) /* Prescaler A Division Factor bit 4 mask. */ -#define CLK_PSADIV4_bp 6 /* Prescaler A Division Factor bit 4 position. */ - -#define CLK_PSBCDIV_gm 0x03 /* Prescaler B and C Division factor group mask. */ -#define CLK_PSBCDIV_gp 0 /* Prescaler B and C Division factor group position. */ -#define CLK_PSBCDIV0_bm (1<<0) /* Prescaler B and C Division factor bit 0 mask. */ -#define CLK_PSBCDIV0_bp 0 /* Prescaler B and C Division factor bit 0 position. */ -#define CLK_PSBCDIV1_bm (1<<1) /* Prescaler B and C Division factor bit 1 mask. */ -#define CLK_PSBCDIV1_bp 1 /* Prescaler B and C Division factor bit 1 position. */ - - -/* CLK.LOCK bit masks and bit positions */ -#define CLK_LOCK_bm 0x01 /* Clock System Lock bit mask. */ -#define CLK_LOCK_bp 0 /* Clock System Lock bit position. */ - - -/* CLK.RTCCTRL bit masks and bit positions */ -#define CLK_RTCSRC_gm 0x0E /* Clock Source group mask. */ -#define CLK_RTCSRC_gp 1 /* Clock Source group position. */ -#define CLK_RTCSRC0_bm (1<<1) /* Clock Source bit 0 mask. */ -#define CLK_RTCSRC0_bp 1 /* Clock Source bit 0 position. */ -#define CLK_RTCSRC1_bm (1<<2) /* Clock Source bit 1 mask. */ -#define CLK_RTCSRC1_bp 2 /* Clock Source bit 1 position. */ -#define CLK_RTCSRC2_bm (1<<3) /* Clock Source bit 2 mask. */ -#define CLK_RTCSRC2_bp 3 /* Clock Source bit 2 position. */ - -#define CLK_RTCEN_bm 0x01 /* RTC Clock Source Enable bit mask. */ -#define CLK_RTCEN_bp 0 /* RTC Clock Source Enable bit position. */ - - -/* PR.PR bit masks and bit positions */ -#define PR_EBI_bm 0x08 /* External Bus Interface bit mask. */ -#define PR_EBI_bp 3 /* External Bus Interface bit position. */ - -#define PR_RTC_bm 0x04 /* Real-time Counter bit mask. */ -#define PR_RTC_bp 2 /* Real-time Counter bit position. */ - -#define PR_EVSYS_bm 0x02 /* Event System bit mask. */ -#define PR_EVSYS_bp 1 /* Event System bit position. */ - -#define PR_DMA_bm 0x01 /* DMA-Controller bit mask. */ -#define PR_DMA_bp 0 /* DMA-Controller bit position. */ - - -/* PR.PRPA bit masks and bit positions */ -#define PR_DAC_bm 0x04 /* Port A DAC bit mask. */ -#define PR_DAC_bp 2 /* Port A DAC bit position. */ - -#define PR_ADC_bm 0x02 /* Port A ADC bit mask. */ -#define PR_ADC_bp 1 /* Port A ADC bit position. */ - -#define PR_AC_bm 0x01 /* Port A Analog Comparator bit mask. */ -#define PR_AC_bp 0 /* Port A Analog Comparator bit position. */ - - -/* PR.PRPB bit masks and bit positions */ -/* PR_DAC_bm Predefined. */ -/* PR_DAC_bp Predefined. */ - -/* PR_ADC_bm Predefined. */ -/* PR_ADC_bp Predefined. */ - -/* PR_AC_bm Predefined. */ -/* PR_AC_bp Predefined. */ - - -/* PR.PRPC bit masks and bit positions */ -#define PR_TWI_bm 0x40 /* Port C Two-wire Interface bit mask. */ -#define PR_TWI_bp 6 /* Port C Two-wire Interface bit position. */ - -#define PR_USART1_bm 0x20 /* Port C USART1 bit mask. */ -#define PR_USART1_bp 5 /* Port C USART1 bit position. */ - -#define PR_USART0_bm 0x10 /* Port C USART0 bit mask. */ -#define PR_USART0_bp 4 /* Port C USART0 bit position. */ - -#define PR_SPI_bm 0x08 /* Port C SPI bit mask. */ -#define PR_SPI_bp 3 /* Port C SPI bit position. */ - -#define PR_HIRES_bm 0x04 /* Port C AWEX bit mask. */ -#define PR_HIRES_bp 2 /* Port C AWEX bit position. */ - -#define PR_TC1_bm 0x02 /* Port C Timer/Counter1 bit mask. */ -#define PR_TC1_bp 1 /* Port C Timer/Counter1 bit position. */ - -#define PR_TC0_bm 0x01 /* Port C Timer/Counter0 bit mask. */ -#define PR_TC0_bp 0 /* Port C Timer/Counter0 bit position. */ - - -/* PR.PRPD bit masks and bit positions */ -/* PR_TWI_bm Predefined. */ -/* PR_TWI_bp Predefined. */ - -/* PR_USART1_bm Predefined. */ -/* PR_USART1_bp Predefined. */ - -/* PR_USART0_bm Predefined. */ -/* PR_USART0_bp Predefined. */ - -/* PR_SPI_bm Predefined. */ -/* PR_SPI_bp Predefined. */ - -/* PR_HIRES_bm Predefined. */ -/* PR_HIRES_bp Predefined. */ - -/* PR_TC1_bm Predefined. */ -/* PR_TC1_bp Predefined. */ - -/* PR_TC0_bm Predefined. */ -/* PR_TC0_bp Predefined. */ - - -/* PR.PRPE bit masks and bit positions */ -/* PR_TWI_bm Predefined. */ -/* PR_TWI_bp Predefined. */ - -/* PR_USART1_bm Predefined. */ -/* PR_USART1_bp Predefined. */ - -/* PR_USART0_bm Predefined. */ -/* PR_USART0_bp Predefined. */ - -/* PR_SPI_bm Predefined. */ -/* PR_SPI_bp Predefined. */ - -/* PR_HIRES_bm Predefined. */ -/* PR_HIRES_bp Predefined. */ - -/* PR_TC1_bm Predefined. */ -/* PR_TC1_bp Predefined. */ - -/* PR_TC0_bm Predefined. */ -/* PR_TC0_bp Predefined. */ - - -/* PR.PRPF bit masks and bit positions */ -/* PR_TWI_bm Predefined. */ -/* PR_TWI_bp Predefined. */ - -/* PR_USART1_bm Predefined. */ -/* PR_USART1_bp Predefined. */ - -/* PR_USART0_bm Predefined. */ -/* PR_USART0_bp Predefined. */ - -/* PR_SPI_bm Predefined. */ -/* PR_SPI_bp Predefined. */ - -/* PR_HIRES_bm Predefined. */ -/* PR_HIRES_bp Predefined. */ - -/* PR_TC1_bm Predefined. */ -/* PR_TC1_bp Predefined. */ - -/* PR_TC0_bm Predefined. */ -/* PR_TC0_bp Predefined. */ - - -/* SLEEP - Sleep Controller */ -/* SLEEP.CTRL bit masks and bit positions */ -#define SLEEP_SMODE_gm 0x0E /* Sleep Mode group mask. */ -#define SLEEP_SMODE_gp 1 /* Sleep Mode group position. */ -#define SLEEP_SMODE0_bm (1<<1) /* Sleep Mode bit 0 mask. */ -#define SLEEP_SMODE0_bp 1 /* Sleep Mode bit 0 position. */ -#define SLEEP_SMODE1_bm (1<<2) /* Sleep Mode bit 1 mask. */ -#define SLEEP_SMODE1_bp 2 /* Sleep Mode bit 1 position. */ -#define SLEEP_SMODE2_bm (1<<3) /* Sleep Mode bit 2 mask. */ -#define SLEEP_SMODE2_bp 3 /* Sleep Mode bit 2 position. */ - -#define SLEEP_SEN_bm 0x01 /* Sleep Enable bit mask. */ -#define SLEEP_SEN_bp 0 /* Sleep Enable bit position. */ - - -/* OSC - Oscillator */ -/* OSC.CTRL bit masks and bit positions */ -#define OSC_PLLEN_bm 0x10 /* PLL Enable bit mask. */ -#define OSC_PLLEN_bp 4 /* PLL Enable bit position. */ - -#define OSC_XOSCEN_bm 0x08 /* External Oscillator Enable bit mask. */ -#define OSC_XOSCEN_bp 3 /* External Oscillator Enable bit position. */ - -#define OSC_RC32KEN_bm 0x04 /* Internal 32kHz RC Oscillator Enable bit mask. */ -#define OSC_RC32KEN_bp 2 /* Internal 32kHz RC Oscillator Enable bit position. */ - -#define OSC_RC32MEN_bm 0x02 /* Internal 32MHz RC Oscillator Enable bit mask. */ -#define OSC_RC32MEN_bp 1 /* Internal 32MHz RC Oscillator Enable bit position. */ - -#define OSC_RC2MEN_bm 0x01 /* Internal 2MHz RC Oscillator Enable bit mask. */ -#define OSC_RC2MEN_bp 0 /* Internal 2MHz RC Oscillator Enable bit position. */ - - -/* OSC.STATUS bit masks and bit positions */ -#define OSC_PLLRDY_bm 0x10 /* PLL Ready bit mask. */ -#define OSC_PLLRDY_bp 4 /* PLL Ready bit position. */ - -#define OSC_XOSCRDY_bm 0x08 /* External Oscillator Ready bit mask. */ -#define OSC_XOSCRDY_bp 3 /* External Oscillator Ready bit position. */ - -#define OSC_RC32KRDY_bm 0x04 /* Internal 32kHz RC Oscillator Ready bit mask. */ -#define OSC_RC32KRDY_bp 2 /* Internal 32kHz RC Oscillator Ready bit position. */ - -#define OSC_RC32MRDY_bm 0x02 /* Internal 32MHz RC Oscillator Ready bit mask. */ -#define OSC_RC32MRDY_bp 1 /* Internal 32MHz RC Oscillator Ready bit position. */ - -#define OSC_RC2MRDY_bm 0x01 /* Internal 2MHz RC Oscillator Ready bit mask. */ -#define OSC_RC2MRDY_bp 0 /* Internal 2MHz RC Oscillator Ready bit position. */ - - -/* OSC.XOSCCTRL bit masks and bit positions */ -#define OSC_FRQRANGE_gm 0xC0 /* Frequency Range group mask. */ -#define OSC_FRQRANGE_gp 6 /* Frequency Range group position. */ -#define OSC_FRQRANGE0_bm (1<<6) /* Frequency Range bit 0 mask. */ -#define OSC_FRQRANGE0_bp 6 /* Frequency Range bit 0 position. */ -#define OSC_FRQRANGE1_bm (1<<7) /* Frequency Range bit 1 mask. */ -#define OSC_FRQRANGE1_bp 7 /* Frequency Range bit 1 position. */ - -#define OSC_X32KLPM_bm 0x20 /* 32kHz XTAL OSC Low-power Mode bit mask. */ -#define OSC_X32KLPM_bp 5 /* 32kHz XTAL OSC Low-power Mode bit position. */ - -#define OSC_XOSCSEL_gm 0x0F /* External Oscillator Selection and Startup Time group mask. */ -#define OSC_XOSCSEL_gp 0 /* External Oscillator Selection and Startup Time group position. */ -#define OSC_XOSCSEL0_bm (1<<0) /* External Oscillator Selection and Startup Time bit 0 mask. */ -#define OSC_XOSCSEL0_bp 0 /* External Oscillator Selection and Startup Time bit 0 position. */ -#define OSC_XOSCSEL1_bm (1<<1) /* External Oscillator Selection and Startup Time bit 1 mask. */ -#define OSC_XOSCSEL1_bp 1 /* External Oscillator Selection and Startup Time bit 1 position. */ -#define OSC_XOSCSEL2_bm (1<<2) /* External Oscillator Selection and Startup Time bit 2 mask. */ -#define OSC_XOSCSEL2_bp 2 /* External Oscillator Selection and Startup Time bit 2 position. */ -#define OSC_XOSCSEL3_bm (1<<3) /* External Oscillator Selection and Startup Time bit 3 mask. */ -#define OSC_XOSCSEL3_bp 3 /* External Oscillator Selection and Startup Time bit 3 position. */ - - -/* OSC.XOSCFAIL bit masks and bit positions */ -#define OSC_XOSCFDIF_bm 0x02 /* Failure Detection Interrupt Flag bit mask. */ -#define OSC_XOSCFDIF_bp 1 /* Failure Detection Interrupt Flag bit position. */ - -#define OSC_XOSCFDEN_bm 0x01 /* Failure Detection Enable bit mask. */ -#define OSC_XOSCFDEN_bp 0 /* Failure Detection Enable bit position. */ - - -/* OSC.PLLCTRL bit masks and bit positions */ -#define OSC_PLLSRC_gm 0xC0 /* Clock Source group mask. */ -#define OSC_PLLSRC_gp 6 /* Clock Source group position. */ -#define OSC_PLLSRC0_bm (1<<6) /* Clock Source bit 0 mask. */ -#define OSC_PLLSRC0_bp 6 /* Clock Source bit 0 position. */ -#define OSC_PLLSRC1_bm (1<<7) /* Clock Source bit 1 mask. */ -#define OSC_PLLSRC1_bp 7 /* Clock Source bit 1 position. */ - -#define OSC_PLLFAC_gm 0x1F /* Multiplication Factor group mask. */ -#define OSC_PLLFAC_gp 0 /* Multiplication Factor group position. */ -#define OSC_PLLFAC0_bm (1<<0) /* Multiplication Factor bit 0 mask. */ -#define OSC_PLLFAC0_bp 0 /* Multiplication Factor bit 0 position. */ -#define OSC_PLLFAC1_bm (1<<1) /* Multiplication Factor bit 1 mask. */ -#define OSC_PLLFAC1_bp 1 /* Multiplication Factor bit 1 position. */ -#define OSC_PLLFAC2_bm (1<<2) /* Multiplication Factor bit 2 mask. */ -#define OSC_PLLFAC2_bp 2 /* Multiplication Factor bit 2 position. */ -#define OSC_PLLFAC3_bm (1<<3) /* Multiplication Factor bit 3 mask. */ -#define OSC_PLLFAC3_bp 3 /* Multiplication Factor bit 3 position. */ -#define OSC_PLLFAC4_bm (1<<4) /* Multiplication Factor bit 4 mask. */ -#define OSC_PLLFAC4_bp 4 /* Multiplication Factor bit 4 position. */ - - -/* OSC.DFLLCTRL bit masks and bit positions */ -#define OSC_RC32MCREF_bm 0x02 /* 32MHz Calibration Reference bit mask. */ -#define OSC_RC32MCREF_bp 1 /* 32MHz Calibration Reference bit position. */ - -#define OSC_RC2MCREF_bm 0x01 /* 2MHz Calibration Reference bit mask. */ -#define OSC_RC2MCREF_bp 0 /* 2MHz Calibration Reference bit position. */ - - -/* DFLL - DFLL */ -/* DFLL.CTRL bit masks and bit positions */ -#define DFLL_ENABLE_bm 0x01 /* DFLL Enable bit mask. */ -#define DFLL_ENABLE_bp 0 /* DFLL Enable bit position. */ - - -/* DFLL.CALA bit masks and bit positions */ -#define DFLL_CALL_gm 0x7F /* DFLL Calibration bits [6:0] group mask. */ -#define DFLL_CALL_gp 0 /* DFLL Calibration bits [6:0] group position. */ -#define DFLL_CALL0_bm (1<<0) /* DFLL Calibration bits [6:0] bit 0 mask. */ -#define DFLL_CALL0_bp 0 /* DFLL Calibration bits [6:0] bit 0 position. */ -#define DFLL_CALL1_bm (1<<1) /* DFLL Calibration bits [6:0] bit 1 mask. */ -#define DFLL_CALL1_bp 1 /* DFLL Calibration bits [6:0] bit 1 position. */ -#define DFLL_CALL2_bm (1<<2) /* DFLL Calibration bits [6:0] bit 2 mask. */ -#define DFLL_CALL2_bp 2 /* DFLL Calibration bits [6:0] bit 2 position. */ -#define DFLL_CALL3_bm (1<<3) /* DFLL Calibration bits [6:0] bit 3 mask. */ -#define DFLL_CALL3_bp 3 /* DFLL Calibration bits [6:0] bit 3 position. */ -#define DFLL_CALL4_bm (1<<4) /* DFLL Calibration bits [6:0] bit 4 mask. */ -#define DFLL_CALL4_bp 4 /* DFLL Calibration bits [6:0] bit 4 position. */ -#define DFLL_CALL5_bm (1<<5) /* DFLL Calibration bits [6:0] bit 5 mask. */ -#define DFLL_CALL5_bp 5 /* DFLL Calibration bits [6:0] bit 5 position. */ -#define DFLL_CALL6_bm (1<<6) /* DFLL Calibration bits [6:0] bit 6 mask. */ -#define DFLL_CALL6_bp 6 /* DFLL Calibration bits [6:0] bit 6 position. */ - - -/* DFLL.CALB bit masks and bit positions */ -#define DFLL_CALH_gm 0x3F /* DFLL Calibration bits [12:7] group mask. */ -#define DFLL_CALH_gp 0 /* DFLL Calibration bits [12:7] group position. */ -#define DFLL_CALH0_bm (1<<0) /* DFLL Calibration bits [12:7] bit 0 mask. */ -#define DFLL_CALH0_bp 0 /* DFLL Calibration bits [12:7] bit 0 position. */ -#define DFLL_CALH1_bm (1<<1) /* DFLL Calibration bits [12:7] bit 1 mask. */ -#define DFLL_CALH1_bp 1 /* DFLL Calibration bits [12:7] bit 1 position. */ -#define DFLL_CALH2_bm (1<<2) /* DFLL Calibration bits [12:7] bit 2 mask. */ -#define DFLL_CALH2_bp 2 /* DFLL Calibration bits [12:7] bit 2 position. */ -#define DFLL_CALH3_bm (1<<3) /* DFLL Calibration bits [12:7] bit 3 mask. */ -#define DFLL_CALH3_bp 3 /* DFLL Calibration bits [12:7] bit 3 position. */ -#define DFLL_CALH4_bm (1<<4) /* DFLL Calibration bits [12:7] bit 4 mask. */ -#define DFLL_CALH4_bp 4 /* DFLL Calibration bits [12:7] bit 4 position. */ -#define DFLL_CALH5_bm (1<<5) /* DFLL Calibration bits [12:7] bit 5 mask. */ -#define DFLL_CALH5_bp 5 /* DFLL Calibration bits [12:7] bit 5 position. */ - - -/* RST - Reset */ -/* RST.STATUS bit masks and bit positions */ -#define RST_SDRF_bm 0x40 /* Spike Detection Reset Flag bit mask. */ -#define RST_SDRF_bp 6 /* Spike Detection Reset Flag bit position. */ - -#define RST_SRF_bm 0x20 /* Software Reset Flag bit mask. */ -#define RST_SRF_bp 5 /* Software Reset Flag bit position. */ - -#define RST_PDIRF_bm 0x10 /* Programming and Debug Interface Interface Reset Flag bit mask. */ -#define RST_PDIRF_bp 4 /* Programming and Debug Interface Interface Reset Flag bit position. */ - -#define RST_WDRF_bm 0x08 /* Watchdog Reset Flag bit mask. */ -#define RST_WDRF_bp 3 /* Watchdog Reset Flag bit position. */ - -#define RST_BORF_bm 0x04 /* Brown-out Reset Flag bit mask. */ -#define RST_BORF_bp 2 /* Brown-out Reset Flag bit position. */ - -#define RST_EXTRF_bm 0x02 /* External Reset Flag bit mask. */ -#define RST_EXTRF_bp 1 /* External Reset Flag bit position. */ - -#define RST_PORF_bm 0x01 /* Power-on Reset Flag bit mask. */ -#define RST_PORF_bp 0 /* Power-on Reset Flag bit position. */ - - -/* RST.CTRL bit masks and bit positions */ -#define RST_SWRST_bm 0x01 /* Software Reset bit mask. */ -#define RST_SWRST_bp 0 /* Software Reset bit position. */ - - -/* WDT - Watch-Dog Timer */ -/* WDT.CTRL bit masks and bit positions */ -#define WDT_PER_gm 0x3C /* Period group mask. */ -#define WDT_PER_gp 2 /* Period group position. */ -#define WDT_PER0_bm (1<<2) /* Period bit 0 mask. */ -#define WDT_PER0_bp 2 /* Period bit 0 position. */ -#define WDT_PER1_bm (1<<3) /* Period bit 1 mask. */ -#define WDT_PER1_bp 3 /* Period bit 1 position. */ -#define WDT_PER2_bm (1<<4) /* Period bit 2 mask. */ -#define WDT_PER2_bp 4 /* Period bit 2 position. */ -#define WDT_PER3_bm (1<<5) /* Period bit 3 mask. */ -#define WDT_PER3_bp 5 /* Period bit 3 position. */ - -#define WDT_ENABLE_bm 0x02 /* Enable bit mask. */ -#define WDT_ENABLE_bp 1 /* Enable bit position. */ - -#define WDT_CEN_bm 0x01 /* Change Enable bit mask. */ -#define WDT_CEN_bp 0 /* Change Enable bit position. */ - - -/* WDT.WINCTRL bit masks and bit positions */ -#define WDT_WPER_gm 0x3C /* Windowed Mode Period group mask. */ -#define WDT_WPER_gp 2 /* Windowed Mode Period group position. */ -#define WDT_WPER0_bm (1<<2) /* Windowed Mode Period bit 0 mask. */ -#define WDT_WPER0_bp 2 /* Windowed Mode Period bit 0 position. */ -#define WDT_WPER1_bm (1<<3) /* Windowed Mode Period bit 1 mask. */ -#define WDT_WPER1_bp 3 /* Windowed Mode Period bit 1 position. */ -#define WDT_WPER2_bm (1<<4) /* Windowed Mode Period bit 2 mask. */ -#define WDT_WPER2_bp 4 /* Windowed Mode Period bit 2 position. */ -#define WDT_WPER3_bm (1<<5) /* Windowed Mode Period bit 3 mask. */ -#define WDT_WPER3_bp 5 /* Windowed Mode Period bit 3 position. */ - -#define WDT_WEN_bm 0x02 /* Windowed Mode Enable bit mask. */ -#define WDT_WEN_bp 1 /* Windowed Mode Enable bit position. */ - -#define WDT_WCEN_bm 0x01 /* Windowed Mode Change Enable bit mask. */ -#define WDT_WCEN_bp 0 /* Windowed Mode Change Enable bit position. */ - - -/* WDT.STATUS bit masks and bit positions */ -#define WDT_SYNCBUSY_bm 0x01 /* Syncronization busy bit mask. */ -#define WDT_SYNCBUSY_bp 0 /* Syncronization busy bit position. */ - - -/* MCU - MCU Control */ -/* MCU.MCUCR bit masks and bit positions */ -#define MCU_JTAGD_bm 0x01 /* JTAG Disable bit mask. */ -#define MCU_JTAGD_bp 0 /* JTAG Disable bit position. */ - - -/* MCU.EVSYSLOCK bit masks and bit positions */ -#define MCU_EVSYS1LOCK_bm 0x10 /* Event Channel 4-7 Lock bit mask. */ -#define MCU_EVSYS1LOCK_bp 4 /* Event Channel 4-7 Lock bit position. */ - -#define MCU_EVSYS0LOCK_bm 0x01 /* Event Channel 0-3 Lock bit mask. */ -#define MCU_EVSYS0LOCK_bp 0 /* Event Channel 0-3 Lock bit position. */ - - -/* MCU.AWEXLOCK bit masks and bit positions */ -#define MCU_AWEXELOCK_bm 0x04 /* AWeX on T/C E0 Lock bit mask. */ -#define MCU_AWEXELOCK_bp 2 /* AWeX on T/C E0 Lock bit position. */ - -#define MCU_AWEXCLOCK_bm 0x01 /* AWeX on T/C C0 Lock bit mask. */ -#define MCU_AWEXCLOCK_bp 0 /* AWeX on T/C C0 Lock bit position. */ - - -/* PMIC - Programmable Multi-level Interrupt Controller */ -/* PMIC.STATUS bit masks and bit positions */ -#define PMIC_NMIEX_bm 0x80 /* Non-maskable Interrupt Executing bit mask. */ -#define PMIC_NMIEX_bp 7 /* Non-maskable Interrupt Executing bit position. */ - -#define PMIC_HILVLEX_bm 0x04 /* High Level Interrupt Executing bit mask. */ -#define PMIC_HILVLEX_bp 2 /* High Level Interrupt Executing bit position. */ - -#define PMIC_MEDLVLEX_bm 0x02 /* Medium Level Interrupt Executing bit mask. */ -#define PMIC_MEDLVLEX_bp 1 /* Medium Level Interrupt Executing bit position. */ - -#define PMIC_LOLVLEX_bm 0x01 /* Low Level Interrupt Executing bit mask. */ -#define PMIC_LOLVLEX_bp 0 /* Low Level Interrupt Executing bit position. */ - - -/* PMIC.CTRL bit masks and bit positions */ -#define PMIC_RREN_bm 0x80 /* Round-Robin Priority Enable bit mask. */ -#define PMIC_RREN_bp 7 /* Round-Robin Priority Enable bit position. */ - -#define PMIC_IVSEL_bm 0x40 /* Interrupt Vector Select bit mask. */ -#define PMIC_IVSEL_bp 6 /* Interrupt Vector Select bit position. */ - -#define PMIC_HILVLEN_bm 0x04 /* High Level Enable bit mask. */ -#define PMIC_HILVLEN_bp 2 /* High Level Enable bit position. */ - -#define PMIC_MEDLVLEN_bm 0x02 /* Medium Level Enable bit mask. */ -#define PMIC_MEDLVLEN_bp 1 /* Medium Level Enable bit position. */ - -#define PMIC_LOLVLEN_bm 0x01 /* Low Level Enable bit mask. */ -#define PMIC_LOLVLEN_bp 0 /* Low Level Enable bit position. */ - - -/* DMA - DMA Controller */ -/* DMA_CH.CTRLA bit masks and bit positions */ -#define DMA_CH_ENABLE_bm 0x80 /* Channel Enable bit mask. */ -#define DMA_CH_ENABLE_bp 7 /* Channel Enable bit position. */ - -#define DMA_CH_RESET_bm 0x40 /* Channel Software Reset bit mask. */ -#define DMA_CH_RESET_bp 6 /* Channel Software Reset bit position. */ - -#define DMA_CH_REPEAT_bm 0x20 /* Channel Repeat Mode bit mask. */ -#define DMA_CH_REPEAT_bp 5 /* Channel Repeat Mode bit position. */ - -#define DMA_CH_TRFREQ_bm 0x10 /* Channel Transfer Request bit mask. */ -#define DMA_CH_TRFREQ_bp 4 /* Channel Transfer Request bit position. */ - -#define DMA_CH_SINGLE_bm 0x04 /* Channel Single Shot Data Transfer bit mask. */ -#define DMA_CH_SINGLE_bp 2 /* Channel Single Shot Data Transfer bit position. */ - -#define DMA_CH_BURSTLEN_gm 0x03 /* Channel Transfer Mode group mask. */ -#define DMA_CH_BURSTLEN_gp 0 /* Channel Transfer Mode group position. */ -#define DMA_CH_BURSTLEN0_bm (1<<0) /* Channel Transfer Mode bit 0 mask. */ -#define DMA_CH_BURSTLEN0_bp 0 /* Channel Transfer Mode bit 0 position. */ -#define DMA_CH_BURSTLEN1_bm (1<<1) /* Channel Transfer Mode bit 1 mask. */ -#define DMA_CH_BURSTLEN1_bp 1 /* Channel Transfer Mode bit 1 position. */ - - -/* DMA_CH.CTRLB bit masks and bit positions */ -#define DMA_CH_CHBUSY_bm 0x80 /* Block Transfer Busy bit mask. */ -#define DMA_CH_CHBUSY_bp 7 /* Block Transfer Busy bit position. */ - -#define DMA_CH_CHPEND_bm 0x40 /* Block Transfer Pending bit mask. */ -#define DMA_CH_CHPEND_bp 6 /* Block Transfer Pending bit position. */ - -#define DMA_CH_ERRIF_bm 0x20 /* Block Transfer Error Interrupt Flag bit mask. */ -#define DMA_CH_ERRIF_bp 5 /* Block Transfer Error Interrupt Flag bit position. */ - -#define DMA_CH_TRNIF_bm 0x10 /* Transaction Complete Interrup Flag bit mask. */ -#define DMA_CH_TRNIF_bp 4 /* Transaction Complete Interrup Flag bit position. */ - -#define DMA_CH_ERRINTLVL_gm 0x0C /* Transfer Error Interrupt Level group mask. */ -#define DMA_CH_ERRINTLVL_gp 2 /* Transfer Error Interrupt Level group position. */ -#define DMA_CH_ERRINTLVL0_bm (1<<2) /* Transfer Error Interrupt Level bit 0 mask. */ -#define DMA_CH_ERRINTLVL0_bp 2 /* Transfer Error Interrupt Level bit 0 position. */ -#define DMA_CH_ERRINTLVL1_bm (1<<3) /* Transfer Error Interrupt Level bit 1 mask. */ -#define DMA_CH_ERRINTLVL1_bp 3 /* Transfer Error Interrupt Level bit 1 position. */ - -#define DMA_CH_TRNINTLVL_gm 0x03 /* Transaction Complete Interrupt Level group mask. */ -#define DMA_CH_TRNINTLVL_gp 0 /* Transaction Complete Interrupt Level group position. */ -#define DMA_CH_TRNINTLVL0_bm (1<<0) /* Transaction Complete Interrupt Level bit 0 mask. */ -#define DMA_CH_TRNINTLVL0_bp 0 /* Transaction Complete Interrupt Level bit 0 position. */ -#define DMA_CH_TRNINTLVL1_bm (1<<1) /* Transaction Complete Interrupt Level bit 1 mask. */ -#define DMA_CH_TRNINTLVL1_bp 1 /* Transaction Complete Interrupt Level bit 1 position. */ - - -/* DMA_CH.ADDRCTRL bit masks and bit positions */ -#define DMA_CH_SRCRELOAD_gm 0xC0 /* Channel Source Address Reload group mask. */ -#define DMA_CH_SRCRELOAD_gp 6 /* Channel Source Address Reload group position. */ -#define DMA_CH_SRCRELOAD0_bm (1<<6) /* Channel Source Address Reload bit 0 mask. */ -#define DMA_CH_SRCRELOAD0_bp 6 /* Channel Source Address Reload bit 0 position. */ -#define DMA_CH_SRCRELOAD1_bm (1<<7) /* Channel Source Address Reload bit 1 mask. */ -#define DMA_CH_SRCRELOAD1_bp 7 /* Channel Source Address Reload bit 1 position. */ - -#define DMA_CH_SRCDIR_gm 0x30 /* Channel Source Address Mode group mask. */ -#define DMA_CH_SRCDIR_gp 4 /* Channel Source Address Mode group position. */ -#define DMA_CH_SRCDIR0_bm (1<<4) /* Channel Source Address Mode bit 0 mask. */ -#define DMA_CH_SRCDIR0_bp 4 /* Channel Source Address Mode bit 0 position. */ -#define DMA_CH_SRCDIR1_bm (1<<5) /* Channel Source Address Mode bit 1 mask. */ -#define DMA_CH_SRCDIR1_bp 5 /* Channel Source Address Mode bit 1 position. */ - -#define DMA_CH_DESTRELOAD_gm 0x0C /* Channel Destination Address Reload group mask. */ -#define DMA_CH_DESTRELOAD_gp 2 /* Channel Destination Address Reload group position. */ -#define DMA_CH_DESTRELOAD0_bm (1<<2) /* Channel Destination Address Reload bit 0 mask. */ -#define DMA_CH_DESTRELOAD0_bp 2 /* Channel Destination Address Reload bit 0 position. */ -#define DMA_CH_DESTRELOAD1_bm (1<<3) /* Channel Destination Address Reload bit 1 mask. */ -#define DMA_CH_DESTRELOAD1_bp 3 /* Channel Destination Address Reload bit 1 position. */ - -#define DMA_CH_DESTDIR_gm 0x03 /* Channel Destination Address Mode group mask. */ -#define DMA_CH_DESTDIR_gp 0 /* Channel Destination Address Mode group position. */ -#define DMA_CH_DESTDIR0_bm (1<<0) /* Channel Destination Address Mode bit 0 mask. */ -#define DMA_CH_DESTDIR0_bp 0 /* Channel Destination Address Mode bit 0 position. */ -#define DMA_CH_DESTDIR1_bm (1<<1) /* Channel Destination Address Mode bit 1 mask. */ -#define DMA_CH_DESTDIR1_bp 1 /* Channel Destination Address Mode bit 1 position. */ - - -/* DMA_CH.TRIGSRC bit masks and bit positions */ -#define DMA_CH_TRIGSRC_gm 0xFF /* Channel Trigger Source group mask. */ -#define DMA_CH_TRIGSRC_gp 0 /* Channel Trigger Source group position. */ -#define DMA_CH_TRIGSRC0_bm (1<<0) /* Channel Trigger Source bit 0 mask. */ -#define DMA_CH_TRIGSRC0_bp 0 /* Channel Trigger Source bit 0 position. */ -#define DMA_CH_TRIGSRC1_bm (1<<1) /* Channel Trigger Source bit 1 mask. */ -#define DMA_CH_TRIGSRC1_bp 1 /* Channel Trigger Source bit 1 position. */ -#define DMA_CH_TRIGSRC2_bm (1<<2) /* Channel Trigger Source bit 2 mask. */ -#define DMA_CH_TRIGSRC2_bp 2 /* Channel Trigger Source bit 2 position. */ -#define DMA_CH_TRIGSRC3_bm (1<<3) /* Channel Trigger Source bit 3 mask. */ -#define DMA_CH_TRIGSRC3_bp 3 /* Channel Trigger Source bit 3 position. */ -#define DMA_CH_TRIGSRC4_bm (1<<4) /* Channel Trigger Source bit 4 mask. */ -#define DMA_CH_TRIGSRC4_bp 4 /* Channel Trigger Source bit 4 position. */ -#define DMA_CH_TRIGSRC5_bm (1<<5) /* Channel Trigger Source bit 5 mask. */ -#define DMA_CH_TRIGSRC5_bp 5 /* Channel Trigger Source bit 5 position. */ -#define DMA_CH_TRIGSRC6_bm (1<<6) /* Channel Trigger Source bit 6 mask. */ -#define DMA_CH_TRIGSRC6_bp 6 /* Channel Trigger Source bit 6 position. */ -#define DMA_CH_TRIGSRC7_bm (1<<7) /* Channel Trigger Source bit 7 mask. */ -#define DMA_CH_TRIGSRC7_bp 7 /* Channel Trigger Source bit 7 position. */ - - -/* DMA.CTRL bit masks and bit positions */ -#define DMA_ENABLE_bm 0x80 /* Enable bit mask. */ -#define DMA_ENABLE_bp 7 /* Enable bit position. */ - -#define DMA_RESET_bm 0x40 /* Software Reset bit mask. */ -#define DMA_RESET_bp 6 /* Software Reset bit position. */ - -#define DMA_DBUFMODE_gm 0x0C /* Double Buffering Mode group mask. */ -#define DMA_DBUFMODE_gp 2 /* Double Buffering Mode group position. */ -#define DMA_DBUFMODE0_bm (1<<2) /* Double Buffering Mode bit 0 mask. */ -#define DMA_DBUFMODE0_bp 2 /* Double Buffering Mode bit 0 position. */ -#define DMA_DBUFMODE1_bm (1<<3) /* Double Buffering Mode bit 1 mask. */ -#define DMA_DBUFMODE1_bp 3 /* Double Buffering Mode bit 1 position. */ - -#define DMA_PRIMODE_gm 0x03 /* Channel Priority Mode group mask. */ -#define DMA_PRIMODE_gp 0 /* Channel Priority Mode group position. */ -#define DMA_PRIMODE0_bm (1<<0) /* Channel Priority Mode bit 0 mask. */ -#define DMA_PRIMODE0_bp 0 /* Channel Priority Mode bit 0 position. */ -#define DMA_PRIMODE1_bm (1<<1) /* Channel Priority Mode bit 1 mask. */ -#define DMA_PRIMODE1_bp 1 /* Channel Priority Mode bit 1 position. */ - - -/* DMA.INTFLAGS bit masks and bit positions */ -#define DMA_CH3ERRIF_bm 0x80 /* Channel 3 Block Transfer Error Interrupt Flag bit mask. */ -#define DMA_CH3ERRIF_bp 7 /* Channel 3 Block Transfer Error Interrupt Flag bit position. */ - -#define DMA_CH2ERRIF_bm 0x40 /* Channel 2 Block Transfer Error Interrupt Flag bit mask. */ -#define DMA_CH2ERRIF_bp 6 /* Channel 2 Block Transfer Error Interrupt Flag bit position. */ - -#define DMA_CH1ERRIF_bm 0x20 /* Channel 1 Block Transfer Error Interrupt Flag bit mask. */ -#define DMA_CH1ERRIF_bp 5 /* Channel 1 Block Transfer Error Interrupt Flag bit position. */ - -#define DMA_CH0ERRIF_bm 0x10 /* Channel 0 Block Transfer Error Interrupt Flag bit mask. */ -#define DMA_CH0ERRIF_bp 4 /* Channel 0 Block Transfer Error Interrupt Flag bit position. */ - -#define DMA_CH3TRNIF_bm 0x08 /* Channel 3 Transaction Complete Interrupt Flag bit mask. */ -#define DMA_CH3TRNIF_bp 3 /* Channel 3 Transaction Complete Interrupt Flag bit position. */ - -#define DMA_CH2TRNIF_bm 0x04 /* Channel 2 Transaction Complete Interrupt Flag bit mask. */ -#define DMA_CH2TRNIF_bp 2 /* Channel 2 Transaction Complete Interrupt Flag bit position. */ - -#define DMA_CH1TRNIF_bm 0x02 /* Channel 1 Transaction Complete Interrupt Flag bit mask. */ -#define DMA_CH1TRNIF_bp 1 /* Channel 1 Transaction Complete Interrupt Flag bit position. */ - -#define DMA_CH0TRNIF_bm 0x01 /* Channel 0 Transaction Complete Interrupt Flag bit mask. */ -#define DMA_CH0TRNIF_bp 0 /* Channel 0 Transaction Complete Interrupt Flag bit position. */ - - -/* DMA.STATUS bit masks and bit positions */ -#define DMA_CH3BUSY_bm 0x80 /* Channel 3 Block Transfer Busy bit mask. */ -#define DMA_CH3BUSY_bp 7 /* Channel 3 Block Transfer Busy bit position. */ - -#define DMA_CH2BUSY_bm 0x40 /* Channel 2 Block Transfer Busy bit mask. */ -#define DMA_CH2BUSY_bp 6 /* Channel 2 Block Transfer Busy bit position. */ - -#define DMA_CH1BUSY_bm 0x20 /* Channel 1 Block Transfer Busy bit mask. */ -#define DMA_CH1BUSY_bp 5 /* Channel 1 Block Transfer Busy bit position. */ - -#define DMA_CH0BUSY_bm 0x10 /* Channel 0 Block Transfer Busy bit mask. */ -#define DMA_CH0BUSY_bp 4 /* Channel 0 Block Transfer Busy bit position. */ - -#define DMA_CH3PEND_bm 0x08 /* Channel 3 Block Transfer Pending bit mask. */ -#define DMA_CH3PEND_bp 3 /* Channel 3 Block Transfer Pending bit position. */ - -#define DMA_CH2PEND_bm 0x04 /* Channel 2 Block Transfer Pending bit mask. */ -#define DMA_CH2PEND_bp 2 /* Channel 2 Block Transfer Pending bit position. */ - -#define DMA_CH1PEND_bm 0x02 /* Channel 1 Block Transfer Pending bit mask. */ -#define DMA_CH1PEND_bp 1 /* Channel 1 Block Transfer Pending bit position. */ - -#define DMA_CH0PEND_bm 0x01 /* Channel 0 Block Transfer Pending bit mask. */ -#define DMA_CH0PEND_bp 0 /* Channel 0 Block Transfer Pending bit position. */ - - -/* EVSYS - Event System */ -/* EVSYS.CH0MUX bit masks and bit positions */ -#define EVSYS_CHMUX_gm 0xFF /* Event Channel 0 Multiplexer group mask. */ -#define EVSYS_CHMUX_gp 0 /* Event Channel 0 Multiplexer group position. */ -#define EVSYS_CHMUX0_bm (1<<0) /* Event Channel 0 Multiplexer bit 0 mask. */ -#define EVSYS_CHMUX0_bp 0 /* Event Channel 0 Multiplexer bit 0 position. */ -#define EVSYS_CHMUX1_bm (1<<1) /* Event Channel 0 Multiplexer bit 1 mask. */ -#define EVSYS_CHMUX1_bp 1 /* Event Channel 0 Multiplexer bit 1 position. */ -#define EVSYS_CHMUX2_bm (1<<2) /* Event Channel 0 Multiplexer bit 2 mask. */ -#define EVSYS_CHMUX2_bp 2 /* Event Channel 0 Multiplexer bit 2 position. */ -#define EVSYS_CHMUX3_bm (1<<3) /* Event Channel 0 Multiplexer bit 3 mask. */ -#define EVSYS_CHMUX3_bp 3 /* Event Channel 0 Multiplexer bit 3 position. */ -#define EVSYS_CHMUX4_bm (1<<4) /* Event Channel 0 Multiplexer bit 4 mask. */ -#define EVSYS_CHMUX4_bp 4 /* Event Channel 0 Multiplexer bit 4 position. */ -#define EVSYS_CHMUX5_bm (1<<5) /* Event Channel 0 Multiplexer bit 5 mask. */ -#define EVSYS_CHMUX5_bp 5 /* Event Channel 0 Multiplexer bit 5 position. */ -#define EVSYS_CHMUX6_bm (1<<6) /* Event Channel 0 Multiplexer bit 6 mask. */ -#define EVSYS_CHMUX6_bp 6 /* Event Channel 0 Multiplexer bit 6 position. */ -#define EVSYS_CHMUX7_bm (1<<7) /* Event Channel 0 Multiplexer bit 7 mask. */ -#define EVSYS_CHMUX7_bp 7 /* Event Channel 0 Multiplexer bit 7 position. */ - - -/* EVSYS.CH1MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH2MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH3MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH4MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH5MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH6MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH7MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH0CTRL bit masks and bit positions */ -#define EVSYS_QDIRM_gm 0x60 /* Quadrature Decoder Index Recognition Mode group mask. */ -#define EVSYS_QDIRM_gp 5 /* Quadrature Decoder Index Recognition Mode group position. */ -#define EVSYS_QDIRM0_bm (1<<5) /* Quadrature Decoder Index Recognition Mode bit 0 mask. */ -#define EVSYS_QDIRM0_bp 5 /* Quadrature Decoder Index Recognition Mode bit 0 position. */ -#define EVSYS_QDIRM1_bm (1<<6) /* Quadrature Decoder Index Recognition Mode bit 1 mask. */ -#define EVSYS_QDIRM1_bp 6 /* Quadrature Decoder Index Recognition Mode bit 1 position. */ - -#define EVSYS_QDIEN_bm 0x10 /* Quadrature Decoder Index Enable bit mask. */ -#define EVSYS_QDIEN_bp 4 /* Quadrature Decoder Index Enable bit position. */ - -#define EVSYS_QDEN_bm 0x08 /* Quadrature Decoder Enable bit mask. */ -#define EVSYS_QDEN_bp 3 /* Quadrature Decoder Enable bit position. */ - -#define EVSYS_DIGFILT_gm 0x07 /* Digital Filter group mask. */ -#define EVSYS_DIGFILT_gp 0 /* Digital Filter group position. */ -#define EVSYS_DIGFILT0_bm (1<<0) /* Digital Filter bit 0 mask. */ -#define EVSYS_DIGFILT0_bp 0 /* Digital Filter bit 0 position. */ -#define EVSYS_DIGFILT1_bm (1<<1) /* Digital Filter bit 1 mask. */ -#define EVSYS_DIGFILT1_bp 1 /* Digital Filter bit 1 position. */ -#define EVSYS_DIGFILT2_bm (1<<2) /* Digital Filter bit 2 mask. */ -#define EVSYS_DIGFILT2_bp 2 /* Digital Filter bit 2 position. */ - - -/* EVSYS.CH1CTRL bit masks and bit positions */ -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* EVSYS.CH2CTRL bit masks and bit positions */ -/* EVSYS_QDIRM_gm Predefined. */ -/* EVSYS_QDIRM_gp Predefined. */ -/* EVSYS_QDIRM0_bm Predefined. */ -/* EVSYS_QDIRM0_bp Predefined. */ -/* EVSYS_QDIRM1_bm Predefined. */ -/* EVSYS_QDIRM1_bp Predefined. */ - -/* EVSYS_QDIEN_bm Predefined. */ -/* EVSYS_QDIEN_bp Predefined. */ - -/* EVSYS_QDEN_bm Predefined. */ -/* EVSYS_QDEN_bp Predefined. */ - -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* EVSYS.CH3CTRL bit masks and bit positions */ -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* EVSYS.CH4CTRL bit masks and bit positions */ -/* EVSYS_QDIRM_gm Predefined. */ -/* EVSYS_QDIRM_gp Predefined. */ -/* EVSYS_QDIRM0_bm Predefined. */ -/* EVSYS_QDIRM0_bp Predefined. */ -/* EVSYS_QDIRM1_bm Predefined. */ -/* EVSYS_QDIRM1_bp Predefined. */ - -/* EVSYS_QDIEN_bm Predefined. */ -/* EVSYS_QDIEN_bp Predefined. */ - -/* EVSYS_QDEN_bm Predefined. */ -/* EVSYS_QDEN_bp Predefined. */ - -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* EVSYS.CH5CTRL bit masks and bit positions */ -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* EVSYS.CH6CTRL bit masks and bit positions */ -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* EVSYS.CH7CTRL bit masks and bit positions */ -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* NVM - Non Volatile Memory Controller */ -/* NVM.CMD bit masks and bit positions */ -#define NVM_CMD_gm 0xFF /* Command group mask. */ -#define NVM_CMD_gp 0 /* Command group position. */ -#define NVM_CMD0_bm (1<<0) /* Command bit 0 mask. */ -#define NVM_CMD0_bp 0 /* Command bit 0 position. */ -#define NVM_CMD1_bm (1<<1) /* Command bit 1 mask. */ -#define NVM_CMD1_bp 1 /* Command bit 1 position. */ -#define NVM_CMD2_bm (1<<2) /* Command bit 2 mask. */ -#define NVM_CMD2_bp 2 /* Command bit 2 position. */ -#define NVM_CMD3_bm (1<<3) /* Command bit 3 mask. */ -#define NVM_CMD3_bp 3 /* Command bit 3 position. */ -#define NVM_CMD4_bm (1<<4) /* Command bit 4 mask. */ -#define NVM_CMD4_bp 4 /* Command bit 4 position. */ -#define NVM_CMD5_bm (1<<5) /* Command bit 5 mask. */ -#define NVM_CMD5_bp 5 /* Command bit 5 position. */ -#define NVM_CMD6_bm (1<<6) /* Command bit 6 mask. */ -#define NVM_CMD6_bp 6 /* Command bit 6 position. */ -#define NVM_CMD7_bm (1<<7) /* Command bit 7 mask. */ -#define NVM_CMD7_bp 7 /* Command bit 7 position. */ - - -/* NVM.CTRLA bit masks and bit positions */ -#define NVM_CMDEX_bm 0x01 /* Command Execute bit mask. */ -#define NVM_CMDEX_bp 0 /* Command Execute bit position. */ - - -/* NVM.CTRLB bit masks and bit positions */ -#define NVM_EEMAPEN_bm 0x08 /* EEPROM Mapping Enable bit mask. */ -#define NVM_EEMAPEN_bp 3 /* EEPROM Mapping Enable bit position. */ - -#define NVM_FPRM_bm 0x04 /* Flash Power Reduction Enable bit mask. */ -#define NVM_FPRM_bp 2 /* Flash Power Reduction Enable bit position. */ - -#define NVM_EPRM_bm 0x02 /* EEPROM Power Reduction Enable bit mask. */ -#define NVM_EPRM_bp 1 /* EEPROM Power Reduction Enable bit position. */ - -#define NVM_SPMLOCK_bm 0x01 /* SPM Lock bit mask. */ -#define NVM_SPMLOCK_bp 0 /* SPM Lock bit position. */ - - -/* NVM.INTCTRL bit masks and bit positions */ -#define NVM_SPMLVL_gm 0x0C /* SPM Interrupt Level group mask. */ -#define NVM_SPMLVL_gp 2 /* SPM Interrupt Level group position. */ -#define NVM_SPMLVL0_bm (1<<2) /* SPM Interrupt Level bit 0 mask. */ -#define NVM_SPMLVL0_bp 2 /* SPM Interrupt Level bit 0 position. */ -#define NVM_SPMLVL1_bm (1<<3) /* SPM Interrupt Level bit 1 mask. */ -#define NVM_SPMLVL1_bp 3 /* SPM Interrupt Level bit 1 position. */ - -#define NVM_EELVL_gm 0x03 /* EEPROM Interrupt Level group mask. */ -#define NVM_EELVL_gp 0 /* EEPROM Interrupt Level group position. */ -#define NVM_EELVL0_bm (1<<0) /* EEPROM Interrupt Level bit 0 mask. */ -#define NVM_EELVL0_bp 0 /* EEPROM Interrupt Level bit 0 position. */ -#define NVM_EELVL1_bm (1<<1) /* EEPROM Interrupt Level bit 1 mask. */ -#define NVM_EELVL1_bp 1 /* EEPROM Interrupt Level bit 1 position. */ - - -/* NVM.STATUS bit masks and bit positions */ -#define NVM_NVMBUSY_bm 0x80 /* Non-volatile Memory Busy bit mask. */ -#define NVM_NVMBUSY_bp 7 /* Non-volatile Memory Busy bit position. */ - -#define NVM_FBUSY_bm 0x40 /* Flash Memory Busy bit mask. */ -#define NVM_FBUSY_bp 6 /* Flash Memory Busy bit position. */ - -#define NVM_EELOAD_bm 0x02 /* EEPROM Page Buffer Active Loading bit mask. */ -#define NVM_EELOAD_bp 1 /* EEPROM Page Buffer Active Loading bit position. */ - -#define NVM_FLOAD_bm 0x01 /* Flash Page Buffer Active Loading bit mask. */ -#define NVM_FLOAD_bp 0 /* Flash Page Buffer Active Loading bit position. */ - - -/* NVM.LOCKBITS bit masks and bit positions */ -#define NVM_BLBB_gm 0xC0 /* Boot Lock Bits - Boot Section group mask. */ -#define NVM_BLBB_gp 6 /* Boot Lock Bits - Boot Section group position. */ -#define NVM_BLBB0_bm (1<<6) /* Boot Lock Bits - Boot Section bit 0 mask. */ -#define NVM_BLBB0_bp 6 /* Boot Lock Bits - Boot Section bit 0 position. */ -#define NVM_BLBB1_bm (1<<7) /* Boot Lock Bits - Boot Section bit 1 mask. */ -#define NVM_BLBB1_bp 7 /* Boot Lock Bits - Boot Section bit 1 position. */ - -#define NVM_BLBA_gm 0x30 /* Boot Lock Bits - Application Section group mask. */ -#define NVM_BLBA_gp 4 /* Boot Lock Bits - Application Section group position. */ -#define NVM_BLBA0_bm (1<<4) /* Boot Lock Bits - Application Section bit 0 mask. */ -#define NVM_BLBA0_bp 4 /* Boot Lock Bits - Application Section bit 0 position. */ -#define NVM_BLBA1_bm (1<<5) /* Boot Lock Bits - Application Section bit 1 mask. */ -#define NVM_BLBA1_bp 5 /* Boot Lock Bits - Application Section bit 1 position. */ - -#define NVM_BLBAT_gm 0x0C /* Boot Lock Bits - Application Table group mask. */ -#define NVM_BLBAT_gp 2 /* Boot Lock Bits - Application Table group position. */ -#define NVM_BLBAT0_bm (1<<2) /* Boot Lock Bits - Application Table bit 0 mask. */ -#define NVM_BLBAT0_bp 2 /* Boot Lock Bits - Application Table bit 0 position. */ -#define NVM_BLBAT1_bm (1<<3) /* Boot Lock Bits - Application Table bit 1 mask. */ -#define NVM_BLBAT1_bp 3 /* Boot Lock Bits - Application Table bit 1 position. */ - -#define NVM_LB_gm 0x03 /* Lock Bits group mask. */ -#define NVM_LB_gp 0 /* Lock Bits group position. */ -#define NVM_LB0_bm (1<<0) /* Lock Bits bit 0 mask. */ -#define NVM_LB0_bp 0 /* Lock Bits bit 0 position. */ -#define NVM_LB1_bm (1<<1) /* Lock Bits bit 1 mask. */ -#define NVM_LB1_bp 1 /* Lock Bits bit 1 position. */ - - -/* NVM_LOCKBITS.LOCKBITS bit masks and bit positions */ -#define NVM_LOCKBITS_BLBB_gm 0xC0 /* Boot Lock Bits - Boot Section group mask. */ -#define NVM_LOCKBITS_BLBB_gp 6 /* Boot Lock Bits - Boot Section group position. */ -#define NVM_LOCKBITS_BLBB0_bm (1<<6) /* Boot Lock Bits - Boot Section bit 0 mask. */ -#define NVM_LOCKBITS_BLBB0_bp 6 /* Boot Lock Bits - Boot Section bit 0 position. */ -#define NVM_LOCKBITS_BLBB1_bm (1<<7) /* Boot Lock Bits - Boot Section bit 1 mask. */ -#define NVM_LOCKBITS_BLBB1_bp 7 /* Boot Lock Bits - Boot Section bit 1 position. */ - -#define NVM_LOCKBITS_BLBA_gm 0x30 /* Boot Lock Bits - Application Section group mask. */ -#define NVM_LOCKBITS_BLBA_gp 4 /* Boot Lock Bits - Application Section group position. */ -#define NVM_LOCKBITS_BLBA0_bm (1<<4) /* Boot Lock Bits - Application Section bit 0 mask. */ -#define NVM_LOCKBITS_BLBA0_bp 4 /* Boot Lock Bits - Application Section bit 0 position. */ -#define NVM_LOCKBITS_BLBA1_bm (1<<5) /* Boot Lock Bits - Application Section bit 1 mask. */ -#define NVM_LOCKBITS_BLBA1_bp 5 /* Boot Lock Bits - Application Section bit 1 position. */ - -#define NVM_LOCKBITS_BLBAT_gm 0x0C /* Boot Lock Bits - Application Table group mask. */ -#define NVM_LOCKBITS_BLBAT_gp 2 /* Boot Lock Bits - Application Table group position. */ -#define NVM_LOCKBITS_BLBAT0_bm (1<<2) /* Boot Lock Bits - Application Table bit 0 mask. */ -#define NVM_LOCKBITS_BLBAT0_bp 2 /* Boot Lock Bits - Application Table bit 0 position. */ -#define NVM_LOCKBITS_BLBAT1_bm (1<<3) /* Boot Lock Bits - Application Table bit 1 mask. */ -#define NVM_LOCKBITS_BLBAT1_bp 3 /* Boot Lock Bits - Application Table bit 1 position. */ - -#define NVM_LOCKBITS_LB_gm 0x03 /* Lock Bits group mask. */ -#define NVM_LOCKBITS_LB_gp 0 /* Lock Bits group position. */ -#define NVM_LOCKBITS_LB0_bm (1<<0) /* Lock Bits bit 0 mask. */ -#define NVM_LOCKBITS_LB0_bp 0 /* Lock Bits bit 0 position. */ -#define NVM_LOCKBITS_LB1_bm (1<<1) /* Lock Bits bit 1 mask. */ -#define NVM_LOCKBITS_LB1_bp 1 /* Lock Bits bit 1 position. */ - - -/* NVM_FUSES.FUSEBYTE0 bit masks and bit positions */ -#define NVM_FUSES_JTAGUSERID_gm 0xFF /* JTAG User ID group mask. */ -#define NVM_FUSES_JTAGUSERID_gp 0 /* JTAG User ID group position. */ -#define NVM_FUSES_JTAGUSERID0_bm (1<<0) /* JTAG User ID bit 0 mask. */ -#define NVM_FUSES_JTAGUSERID0_bp 0 /* JTAG User ID bit 0 position. */ -#define NVM_FUSES_JTAGUSERID1_bm (1<<1) /* JTAG User ID bit 1 mask. */ -#define NVM_FUSES_JTAGUSERID1_bp 1 /* JTAG User ID bit 1 position. */ -#define NVM_FUSES_JTAGUSERID2_bm (1<<2) /* JTAG User ID bit 2 mask. */ -#define NVM_FUSES_JTAGUSERID2_bp 2 /* JTAG User ID bit 2 position. */ -#define NVM_FUSES_JTAGUSERID3_bm (1<<3) /* JTAG User ID bit 3 mask. */ -#define NVM_FUSES_JTAGUSERID3_bp 3 /* JTAG User ID bit 3 position. */ -#define NVM_FUSES_JTAGUSERID4_bm (1<<4) /* JTAG User ID bit 4 mask. */ -#define NVM_FUSES_JTAGUSERID4_bp 4 /* JTAG User ID bit 4 position. */ -#define NVM_FUSES_JTAGUSERID5_bm (1<<5) /* JTAG User ID bit 5 mask. */ -#define NVM_FUSES_JTAGUSERID5_bp 5 /* JTAG User ID bit 5 position. */ -#define NVM_FUSES_JTAGUSERID6_bm (1<<6) /* JTAG User ID bit 6 mask. */ -#define NVM_FUSES_JTAGUSERID6_bp 6 /* JTAG User ID bit 6 position. */ -#define NVM_FUSES_JTAGUSERID7_bm (1<<7) /* JTAG User ID bit 7 mask. */ -#define NVM_FUSES_JTAGUSERID7_bp 7 /* JTAG User ID bit 7 position. */ - - -/* NVM_FUSES.FUSEBYTE1 bit masks and bit positions */ -#define NVM_FUSES_WDWP_gm 0xF0 /* Watchdog Window Timeout Period group mask. */ -#define NVM_FUSES_WDWP_gp 4 /* Watchdog Window Timeout Period group position. */ -#define NVM_FUSES_WDWP0_bm (1<<4) /* Watchdog Window Timeout Period bit 0 mask. */ -#define NVM_FUSES_WDWP0_bp 4 /* Watchdog Window Timeout Period bit 0 position. */ -#define NVM_FUSES_WDWP1_bm (1<<5) /* Watchdog Window Timeout Period bit 1 mask. */ -#define NVM_FUSES_WDWP1_bp 5 /* Watchdog Window Timeout Period bit 1 position. */ -#define NVM_FUSES_WDWP2_bm (1<<6) /* Watchdog Window Timeout Period bit 2 mask. */ -#define NVM_FUSES_WDWP2_bp 6 /* Watchdog Window Timeout Period bit 2 position. */ -#define NVM_FUSES_WDWP3_bm (1<<7) /* Watchdog Window Timeout Period bit 3 mask. */ -#define NVM_FUSES_WDWP3_bp 7 /* Watchdog Window Timeout Period bit 3 position. */ - -#define NVM_FUSES_WDP_gm 0x0F /* Watchdog Timeout Period group mask. */ -#define NVM_FUSES_WDP_gp 0 /* Watchdog Timeout Period group position. */ -#define NVM_FUSES_WDP0_bm (1<<0) /* Watchdog Timeout Period bit 0 mask. */ -#define NVM_FUSES_WDP0_bp 0 /* Watchdog Timeout Period bit 0 position. */ -#define NVM_FUSES_WDP1_bm (1<<1) /* Watchdog Timeout Period bit 1 mask. */ -#define NVM_FUSES_WDP1_bp 1 /* Watchdog Timeout Period bit 1 position. */ -#define NVM_FUSES_WDP2_bm (1<<2) /* Watchdog Timeout Period bit 2 mask. */ -#define NVM_FUSES_WDP2_bp 2 /* Watchdog Timeout Period bit 2 position. */ -#define NVM_FUSES_WDP3_bm (1<<3) /* Watchdog Timeout Period bit 3 mask. */ -#define NVM_FUSES_WDP3_bp 3 /* Watchdog Timeout Period bit 3 position. */ - - -/* NVM_FUSES.FUSEBYTE2 bit masks and bit positions */ -#define NVM_FUSES_DVSDON_bm 0x80 /* Spike Detector Enable bit mask. */ -#define NVM_FUSES_DVSDON_bp 7 /* Spike Detector Enable bit position. */ - -#define NVM_FUSES_BOOTRST_bm 0x40 /* Boot Loader Section Reset Vector bit mask. */ -#define NVM_FUSES_BOOTRST_bp 6 /* Boot Loader Section Reset Vector bit position. */ - -#define NVM_FUSES_BODACT_gm 0x0C /* BOD Operation in Active Mode group mask. */ -#define NVM_FUSES_BODACT_gp 2 /* BOD Operation in Active Mode group position. */ -#define NVM_FUSES_BODACT0_bm (1<<2) /* BOD Operation in Active Mode bit 0 mask. */ -#define NVM_FUSES_BODACT0_bp 2 /* BOD Operation in Active Mode bit 0 position. */ -#define NVM_FUSES_BODACT1_bm (1<<3) /* BOD Operation in Active Mode bit 1 mask. */ -#define NVM_FUSES_BODACT1_bp 3 /* BOD Operation in Active Mode bit 1 position. */ - -#define NVM_FUSES_BODPD_gm 0x03 /* BOD Operation in Power-Down Mode group mask. */ -#define NVM_FUSES_BODPD_gp 0 /* BOD Operation in Power-Down Mode group position. */ -#define NVM_FUSES_BODPD0_bm (1<<0) /* BOD Operation in Power-Down Mode bit 0 mask. */ -#define NVM_FUSES_BODPD0_bp 0 /* BOD Operation in Power-Down Mode bit 0 position. */ -#define NVM_FUSES_BODPD1_bm (1<<1) /* BOD Operation in Power-Down Mode bit 1 mask. */ -#define NVM_FUSES_BODPD1_bp 1 /* BOD Operation in Power-Down Mode bit 1 position. */ - - -/* NVM_FUSES.FUSEBYTE4 bit masks and bit positions */ -#define NVM_FUSES_SUT_gm 0x0C /* Start-up Time group mask. */ -#define NVM_FUSES_SUT_gp 2 /* Start-up Time group position. */ -#define NVM_FUSES_SUT0_bm (1<<2) /* Start-up Time bit 0 mask. */ -#define NVM_FUSES_SUT0_bp 2 /* Start-up Time bit 0 position. */ -#define NVM_FUSES_SUT1_bm (1<<3) /* Start-up Time bit 1 mask. */ -#define NVM_FUSES_SUT1_bp 3 /* Start-up Time bit 1 position. */ - -#define NVM_FUSES_WDLOCK_bm 0x02 /* Watchdog Timer Lock bit mask. */ -#define NVM_FUSES_WDLOCK_bp 1 /* Watchdog Timer Lock bit position. */ - -#define NVM_FUSES_JTAGEN_bm 0x01 /* JTAG Interface Enable bit mask. */ -#define NVM_FUSES_JTAGEN_bp 0 /* JTAG Interface Enable bit position. */ - - -/* NVM_FUSES.FUSEBYTE5 bit masks and bit positions */ -#define NVM_FUSES_EESAVE_bm 0x08 /* Preserve EEPROM Through Chip Erase bit mask. */ -#define NVM_FUSES_EESAVE_bp 3 /* Preserve EEPROM Through Chip Erase bit position. */ - -#define NVM_FUSES_BODLVL_gm 0x07 /* Brown Out Detection Voltage Level group mask. */ -#define NVM_FUSES_BODLVL_gp 0 /* Brown Out Detection Voltage Level group position. */ -#define NVM_FUSES_BODLVL0_bm (1<<0) /* Brown Out Detection Voltage Level bit 0 mask. */ -#define NVM_FUSES_BODLVL0_bp 0 /* Brown Out Detection Voltage Level bit 0 position. */ -#define NVM_FUSES_BODLVL1_bm (1<<1) /* Brown Out Detection Voltage Level bit 1 mask. */ -#define NVM_FUSES_BODLVL1_bp 1 /* Brown Out Detection Voltage Level bit 1 position. */ -#define NVM_FUSES_BODLVL2_bm (1<<2) /* Brown Out Detection Voltage Level bit 2 mask. */ -#define NVM_FUSES_BODLVL2_bp 2 /* Brown Out Detection Voltage Level bit 2 position. */ - - -/* AC - Analog Comparator */ -/* AC.AC0CTRL bit masks and bit positions */ -#define AC_INTMODE_gm 0xC0 /* Interrupt Mode group mask. */ -#define AC_INTMODE_gp 6 /* Interrupt Mode group position. */ -#define AC_INTMODE0_bm (1<<6) /* Interrupt Mode bit 0 mask. */ -#define AC_INTMODE0_bp 6 /* Interrupt Mode bit 0 position. */ -#define AC_INTMODE1_bm (1<<7) /* Interrupt Mode bit 1 mask. */ -#define AC_INTMODE1_bp 7 /* Interrupt Mode bit 1 position. */ - -#define AC_INTLVL_gm 0x30 /* Interrupt Level group mask. */ -#define AC_INTLVL_gp 4 /* Interrupt Level group position. */ -#define AC_INTLVL0_bm (1<<4) /* Interrupt Level bit 0 mask. */ -#define AC_INTLVL0_bp 4 /* Interrupt Level bit 0 position. */ -#define AC_INTLVL1_bm (1<<5) /* Interrupt Level bit 1 mask. */ -#define AC_INTLVL1_bp 5 /* Interrupt Level bit 1 position. */ - -#define AC_HSMODE_bm 0x08 /* High-speed Mode bit mask. */ -#define AC_HSMODE_bp 3 /* High-speed Mode bit position. */ - -#define AC_HYSMODE_gm 0x06 /* Hysteresis Mode group mask. */ -#define AC_HYSMODE_gp 1 /* Hysteresis Mode group position. */ -#define AC_HYSMODE0_bm (1<<1) /* Hysteresis Mode bit 0 mask. */ -#define AC_HYSMODE0_bp 1 /* Hysteresis Mode bit 0 position. */ -#define AC_HYSMODE1_bm (1<<2) /* Hysteresis Mode bit 1 mask. */ -#define AC_HYSMODE1_bp 2 /* Hysteresis Mode bit 1 position. */ - -#define AC_ENABLE_bm 0x01 /* Enable bit mask. */ -#define AC_ENABLE_bp 0 /* Enable bit position. */ - - -/* AC.AC1CTRL bit masks and bit positions */ -/* AC_INTMODE_gm Predefined. */ -/* AC_INTMODE_gp Predefined. */ -/* AC_INTMODE0_bm Predefined. */ -/* AC_INTMODE0_bp Predefined. */ -/* AC_INTMODE1_bm Predefined. */ -/* AC_INTMODE1_bp Predefined. */ - -/* AC_INTLVL_gm Predefined. */ -/* AC_INTLVL_gp Predefined. */ -/* AC_INTLVL0_bm Predefined. */ -/* AC_INTLVL0_bp Predefined. */ -/* AC_INTLVL1_bm Predefined. */ -/* AC_INTLVL1_bp Predefined. */ - -/* AC_HSMODE_bm Predefined. */ -/* AC_HSMODE_bp Predefined. */ - -/* AC_HYSMODE_gm Predefined. */ -/* AC_HYSMODE_gp Predefined. */ -/* AC_HYSMODE0_bm Predefined. */ -/* AC_HYSMODE0_bp Predefined. */ -/* AC_HYSMODE1_bm Predefined. */ -/* AC_HYSMODE1_bp Predefined. */ - -/* AC_ENABLE_bm Predefined. */ -/* AC_ENABLE_bp Predefined. */ - - -/* AC.AC0MUXCTRL bit masks and bit positions */ -#define AC_MUXPOS_gm 0x38 /* MUX Positive Input group mask. */ -#define AC_MUXPOS_gp 3 /* MUX Positive Input group position. */ -#define AC_MUXPOS0_bm (1<<3) /* MUX Positive Input bit 0 mask. */ -#define AC_MUXPOS0_bp 3 /* MUX Positive Input bit 0 position. */ -#define AC_MUXPOS1_bm (1<<4) /* MUX Positive Input bit 1 mask. */ -#define AC_MUXPOS1_bp 4 /* MUX Positive Input bit 1 position. */ -#define AC_MUXPOS2_bm (1<<5) /* MUX Positive Input bit 2 mask. */ -#define AC_MUXPOS2_bp 5 /* MUX Positive Input bit 2 position. */ - -#define AC_MUXNEG_gm 0x07 /* MUX Negative Input group mask. */ -#define AC_MUXNEG_gp 0 /* MUX Negative Input group position. */ -#define AC_MUXNEG0_bm (1<<0) /* MUX Negative Input bit 0 mask. */ -#define AC_MUXNEG0_bp 0 /* MUX Negative Input bit 0 position. */ -#define AC_MUXNEG1_bm (1<<1) /* MUX Negative Input bit 1 mask. */ -#define AC_MUXNEG1_bp 1 /* MUX Negative Input bit 1 position. */ -#define AC_MUXNEG2_bm (1<<2) /* MUX Negative Input bit 2 mask. */ -#define AC_MUXNEG2_bp 2 /* MUX Negative Input bit 2 position. */ - - -/* AC.AC1MUXCTRL bit masks and bit positions */ -/* AC_MUXPOS_gm Predefined. */ -/* AC_MUXPOS_gp Predefined. */ -/* AC_MUXPOS0_bm Predefined. */ -/* AC_MUXPOS0_bp Predefined. */ -/* AC_MUXPOS1_bm Predefined. */ -/* AC_MUXPOS1_bp Predefined. */ -/* AC_MUXPOS2_bm Predefined. */ -/* AC_MUXPOS2_bp Predefined. */ - -/* AC_MUXNEG_gm Predefined. */ -/* AC_MUXNEG_gp Predefined. */ -/* AC_MUXNEG0_bm Predefined. */ -/* AC_MUXNEG0_bp Predefined. */ -/* AC_MUXNEG1_bm Predefined. */ -/* AC_MUXNEG1_bp Predefined. */ -/* AC_MUXNEG2_bm Predefined. */ -/* AC_MUXNEG2_bp Predefined. */ - - -/* AC.CTRLA bit masks and bit positions */ -#define AC_AC0OUT_bm 0x01 /* Comparator 0 Output Enable bit mask. */ -#define AC_AC0OUT_bp 0 /* Comparator 0 Output Enable bit position. */ - - -/* AC.CTRLB bit masks and bit positions */ -#define AC_SCALEFAC_gm 0x3F /* VCC Voltage Scaler Factor group mask. */ -#define AC_SCALEFAC_gp 0 /* VCC Voltage Scaler Factor group position. */ -#define AC_SCALEFAC0_bm (1<<0) /* VCC Voltage Scaler Factor bit 0 mask. */ -#define AC_SCALEFAC0_bp 0 /* VCC Voltage Scaler Factor bit 0 position. */ -#define AC_SCALEFAC1_bm (1<<1) /* VCC Voltage Scaler Factor bit 1 mask. */ -#define AC_SCALEFAC1_bp 1 /* VCC Voltage Scaler Factor bit 1 position. */ -#define AC_SCALEFAC2_bm (1<<2) /* VCC Voltage Scaler Factor bit 2 mask. */ -#define AC_SCALEFAC2_bp 2 /* VCC Voltage Scaler Factor bit 2 position. */ -#define AC_SCALEFAC3_bm (1<<3) /* VCC Voltage Scaler Factor bit 3 mask. */ -#define AC_SCALEFAC3_bp 3 /* VCC Voltage Scaler Factor bit 3 position. */ -#define AC_SCALEFAC4_bm (1<<4) /* VCC Voltage Scaler Factor bit 4 mask. */ -#define AC_SCALEFAC4_bp 4 /* VCC Voltage Scaler Factor bit 4 position. */ -#define AC_SCALEFAC5_bm (1<<5) /* VCC Voltage Scaler Factor bit 5 mask. */ -#define AC_SCALEFAC5_bp 5 /* VCC Voltage Scaler Factor bit 5 position. */ - - -/* AC.WINCTRL bit masks and bit positions */ -#define AC_WEN_bm 0x10 /* Window Mode Enable bit mask. */ -#define AC_WEN_bp 4 /* Window Mode Enable bit position. */ - -#define AC_WINTMODE_gm 0x0C /* Window Interrupt Mode group mask. */ -#define AC_WINTMODE_gp 2 /* Window Interrupt Mode group position. */ -#define AC_WINTMODE0_bm (1<<2) /* Window Interrupt Mode bit 0 mask. */ -#define AC_WINTMODE0_bp 2 /* Window Interrupt Mode bit 0 position. */ -#define AC_WINTMODE1_bm (1<<3) /* Window Interrupt Mode bit 1 mask. */ -#define AC_WINTMODE1_bp 3 /* Window Interrupt Mode bit 1 position. */ - -#define AC_WINTLVL_gm 0x03 /* Window Interrupt Level group mask. */ -#define AC_WINTLVL_gp 0 /* Window Interrupt Level group position. */ -#define AC_WINTLVL0_bm (1<<0) /* Window Interrupt Level bit 0 mask. */ -#define AC_WINTLVL0_bp 0 /* Window Interrupt Level bit 0 position. */ -#define AC_WINTLVL1_bm (1<<1) /* Window Interrupt Level bit 1 mask. */ -#define AC_WINTLVL1_bp 1 /* Window Interrupt Level bit 1 position. */ - - -/* AC.STATUS bit masks and bit positions */ -#define AC_WSTATE_gm 0xC0 /* Window Mode State group mask. */ -#define AC_WSTATE_gp 6 /* Window Mode State group position. */ -#define AC_WSTATE0_bm (1<<6) /* Window Mode State bit 0 mask. */ -#define AC_WSTATE0_bp 6 /* Window Mode State bit 0 position. */ -#define AC_WSTATE1_bm (1<<7) /* Window Mode State bit 1 mask. */ -#define AC_WSTATE1_bp 7 /* Window Mode State bit 1 position. */ - -#define AC_AC1STATE_bm 0x20 /* Comparator 1 State bit mask. */ -#define AC_AC1STATE_bp 5 /* Comparator 1 State bit position. */ - -#define AC_AC0STATE_bm 0x10 /* Comparator 0 State bit mask. */ -#define AC_AC0STATE_bp 4 /* Comparator 0 State bit position. */ - -#define AC_WIF_bm 0x04 /* Window Mode Interrupt Flag bit mask. */ -#define AC_WIF_bp 2 /* Window Mode Interrupt Flag bit position. */ - -#define AC_AC1IF_bm 0x02 /* Comparator 1 Interrupt Flag bit mask. */ -#define AC_AC1IF_bp 1 /* Comparator 1 Interrupt Flag bit position. */ - -#define AC_AC0IF_bm 0x01 /* Comparator 0 Interrupt Flag bit mask. */ -#define AC_AC0IF_bp 0 /* Comparator 0 Interrupt Flag bit position. */ - - -/* ADC - Analog/Digital Converter */ -/* ADC_CH.CTRL bit masks and bit positions */ -#define ADC_CH_START_bm 0x80 /* Channel Start Conversion bit mask. */ -#define ADC_CH_START_bp 7 /* Channel Start Conversion bit position. */ - -#define ADC_CH_GAINFAC_gm 0x1C /* Gain Factor group mask. */ -#define ADC_CH_GAINFAC_gp 2 /* Gain Factor group position. */ -#define ADC_CH_GAINFAC0_bm (1<<2) /* Gain Factor bit 0 mask. */ -#define ADC_CH_GAINFAC0_bp 2 /* Gain Factor bit 0 position. */ -#define ADC_CH_GAINFAC1_bm (1<<3) /* Gain Factor bit 1 mask. */ -#define ADC_CH_GAINFAC1_bp 3 /* Gain Factor bit 1 position. */ -#define ADC_CH_GAINFAC2_bm (1<<4) /* Gain Factor bit 2 mask. */ -#define ADC_CH_GAINFAC2_bp 4 /* Gain Factor bit 2 position. */ - -#define ADC_CH_INPUTMODE_gm 0x03 /* Input Mode Select group mask. */ -#define ADC_CH_INPUTMODE_gp 0 /* Input Mode Select group position. */ -#define ADC_CH_INPUTMODE0_bm (1<<0) /* Input Mode Select bit 0 mask. */ -#define ADC_CH_INPUTMODE0_bp 0 /* Input Mode Select bit 0 position. */ -#define ADC_CH_INPUTMODE1_bm (1<<1) /* Input Mode Select bit 1 mask. */ -#define ADC_CH_INPUTMODE1_bp 1 /* Input Mode Select bit 1 position. */ - - -/* ADC_CH.MUXCTRL bit masks and bit positions */ -#define ADC_CH_MUXPOS_gm 0x78 /* Positive Input Select group mask. */ -#define ADC_CH_MUXPOS_gp 3 /* Positive Input Select group position. */ -#define ADC_CH_MUXPOS0_bm (1<<3) /* Positive Input Select bit 0 mask. */ -#define ADC_CH_MUXPOS0_bp 3 /* Positive Input Select bit 0 position. */ -#define ADC_CH_MUXPOS1_bm (1<<4) /* Positive Input Select bit 1 mask. */ -#define ADC_CH_MUXPOS1_bp 4 /* Positive Input Select bit 1 position. */ -#define ADC_CH_MUXPOS2_bm (1<<5) /* Positive Input Select bit 2 mask. */ -#define ADC_CH_MUXPOS2_bp 5 /* Positive Input Select bit 2 position. */ -#define ADC_CH_MUXPOS3_bm (1<<6) /* Positive Input Select bit 3 mask. */ -#define ADC_CH_MUXPOS3_bp 6 /* Positive Input Select bit 3 position. */ - -#define ADC_CH_MUXINT_gm 0x78 /* Internal Input Select group mask. */ -#define ADC_CH_MUXINT_gp 3 /* Internal Input Select group position. */ -#define ADC_CH_MUXINT0_bm (1<<3) /* Internal Input Select bit 0 mask. */ -#define ADC_CH_MUXINT0_bp 3 /* Internal Input Select bit 0 position. */ -#define ADC_CH_MUXINT1_bm (1<<4) /* Internal Input Select bit 1 mask. */ -#define ADC_CH_MUXINT1_bp 4 /* Internal Input Select bit 1 position. */ -#define ADC_CH_MUXINT2_bm (1<<5) /* Internal Input Select bit 2 mask. */ -#define ADC_CH_MUXINT2_bp 5 /* Internal Input Select bit 2 position. */ -#define ADC_CH_MUXINT3_bm (1<<6) /* Internal Input Select bit 3 mask. */ -#define ADC_CH_MUXINT3_bp 6 /* Internal Input Select bit 3 position. */ - -#define ADC_CH_MUXNEG_gm 0x03 /* Negative Input Select group mask. */ -#define ADC_CH_MUXNEG_gp 0 /* Negative Input Select group position. */ -#define ADC_CH_MUXNEG0_bm (1<<0) /* Negative Input Select bit 0 mask. */ -#define ADC_CH_MUXNEG0_bp 0 /* Negative Input Select bit 0 position. */ -#define ADC_CH_MUXNEG1_bm (1<<1) /* Negative Input Select bit 1 mask. */ -#define ADC_CH_MUXNEG1_bp 1 /* Negative Input Select bit 1 position. */ - - -/* ADC_CH.INTCTRL bit masks and bit positions */ -#define ADC_CH_INTMODE_gm 0x0C /* Interrupt Mode group mask. */ -#define ADC_CH_INTMODE_gp 2 /* Interrupt Mode group position. */ -#define ADC_CH_INTMODE0_bm (1<<2) /* Interrupt Mode bit 0 mask. */ -#define ADC_CH_INTMODE0_bp 2 /* Interrupt Mode bit 0 position. */ -#define ADC_CH_INTMODE1_bm (1<<3) /* Interrupt Mode bit 1 mask. */ -#define ADC_CH_INTMODE1_bp 3 /* Interrupt Mode bit 1 position. */ - -#define ADC_CH_INTLVL_gm 0x03 /* Interrupt Level group mask. */ -#define ADC_CH_INTLVL_gp 0 /* Interrupt Level group position. */ -#define ADC_CH_INTLVL0_bm (1<<0) /* Interrupt Level bit 0 mask. */ -#define ADC_CH_INTLVL0_bp 0 /* Interrupt Level bit 0 position. */ -#define ADC_CH_INTLVL1_bm (1<<1) /* Interrupt Level bit 1 mask. */ -#define ADC_CH_INTLVL1_bp 1 /* Interrupt Level bit 1 position. */ - - -/* ADC_CH.INTFLAGS bit masks and bit positions */ -#define ADC_CH_CHIF_bm 0x01 /* Channel Interrupt Flag bit mask. */ -#define ADC_CH_CHIF_bp 0 /* Channel Interrupt Flag bit position. */ - - -/* ADC.CTRLA bit masks and bit positions */ -#define ADC_DMASEL_gm 0xE0 /* DMA Selection group mask. */ -#define ADC_DMASEL_gp 5 /* DMA Selection group position. */ -#define ADC_DMASEL0_bm (1<<5) /* DMA Selection bit 0 mask. */ -#define ADC_DMASEL0_bp 5 /* DMA Selection bit 0 position. */ -#define ADC_DMASEL1_bm (1<<6) /* DMA Selection bit 1 mask. */ -#define ADC_DMASEL1_bp 6 /* DMA Selection bit 1 position. */ -#define ADC_DMASEL2_bm (1<<7) /* DMA Selection bit 2 mask. */ -#define ADC_DMASEL2_bp 7 /* DMA Selection bit 2 position. */ - -#define ADC_CH3START_bm 0x20 /* Channel 3 Start Conversion bit mask. */ -#define ADC_CH3START_bp 5 /* Channel 3 Start Conversion bit position. */ - -#define ADC_CH2START_bm 0x10 /* Channel 2 Start Conversion bit mask. */ -#define ADC_CH2START_bp 4 /* Channel 2 Start Conversion bit position. */ - -#define ADC_CH1START_bm 0x08 /* Channel 1 Start Conversion bit mask. */ -#define ADC_CH1START_bp 3 /* Channel 1 Start Conversion bit position. */ - -#define ADC_CH0START_bm 0x04 /* Channel 0 Start Conversion bit mask. */ -#define ADC_CH0START_bp 2 /* Channel 0 Start Conversion bit position. */ - -#define ADC_FLUSH_bm 0x02 /* Flush Pipeline bit mask. */ -#define ADC_FLUSH_bp 1 /* Flush Pipeline bit position. */ - -#define ADC_ENABLE_bm 0x01 /* Enable ADC bit mask. */ -#define ADC_ENABLE_bp 0 /* Enable ADC bit position. */ - - -/* ADC.CTRLB bit masks and bit positions */ -#define ADC_CONMODE_bm 0x10 /* Conversion Mode bit mask. */ -#define ADC_CONMODE_bp 4 /* Conversion Mode bit position. */ - -#define ADC_FREERUN_bm 0x08 /* Free Running Mode Enable bit mask. */ -#define ADC_FREERUN_bp 3 /* Free Running Mode Enable bit position. */ - -#define ADC_RESOLUTION_gm 0x06 /* Result Resolution group mask. */ -#define ADC_RESOLUTION_gp 1 /* Result Resolution group position. */ -#define ADC_RESOLUTION0_bm (1<<1) /* Result Resolution bit 0 mask. */ -#define ADC_RESOLUTION0_bp 1 /* Result Resolution bit 0 position. */ -#define ADC_RESOLUTION1_bm (1<<2) /* Result Resolution bit 1 mask. */ -#define ADC_RESOLUTION1_bp 2 /* Result Resolution bit 1 position. */ - - -/* ADC.REFCTRL bit masks and bit positions */ -#define ADC_REFSEL_gm 0x30 /* Reference Selection group mask. */ -#define ADC_REFSEL_gp 4 /* Reference Selection group position. */ -#define ADC_REFSEL0_bm (1<<4) /* Reference Selection bit 0 mask. */ -#define ADC_REFSEL0_bp 4 /* Reference Selection bit 0 position. */ -#define ADC_REFSEL1_bm (1<<5) /* Reference Selection bit 1 mask. */ -#define ADC_REFSEL1_bp 5 /* Reference Selection bit 1 position. */ - -#define ADC_BANDGAP_bm 0x02 /* Bandgap enable bit mask. */ -#define ADC_BANDGAP_bp 1 /* Bandgap enable bit position. */ - -#define ADC_TEMPREF_bm 0x01 /* Temperature Reference Enable bit mask. */ -#define ADC_TEMPREF_bp 0 /* Temperature Reference Enable bit position. */ - - -/* ADC.EVCTRL bit masks and bit positions */ -#define ADC_SWEEP_gm 0xC0 /* Channel Sweep Selection group mask. */ -#define ADC_SWEEP_gp 6 /* Channel Sweep Selection group position. */ -#define ADC_SWEEP0_bm (1<<6) /* Channel Sweep Selection bit 0 mask. */ -#define ADC_SWEEP0_bp 6 /* Channel Sweep Selection bit 0 position. */ -#define ADC_SWEEP1_bm (1<<7) /* Channel Sweep Selection bit 1 mask. */ -#define ADC_SWEEP1_bp 7 /* Channel Sweep Selection bit 1 position. */ - -#define ADC_EVSEL_gm 0x38 /* Event Input Select group mask. */ -#define ADC_EVSEL_gp 3 /* Event Input Select group position. */ -#define ADC_EVSEL0_bm (1<<3) /* Event Input Select bit 0 mask. */ -#define ADC_EVSEL0_bp 3 /* Event Input Select bit 0 position. */ -#define ADC_EVSEL1_bm (1<<4) /* Event Input Select bit 1 mask. */ -#define ADC_EVSEL1_bp 4 /* Event Input Select bit 1 position. */ -#define ADC_EVSEL2_bm (1<<5) /* Event Input Select bit 2 mask. */ -#define ADC_EVSEL2_bp 5 /* Event Input Select bit 2 position. */ - -#define ADC_EVACT_gm 0x07 /* Event Action Select group mask. */ -#define ADC_EVACT_gp 0 /* Event Action Select group position. */ -#define ADC_EVACT0_bm (1<<0) /* Event Action Select bit 0 mask. */ -#define ADC_EVACT0_bp 0 /* Event Action Select bit 0 position. */ -#define ADC_EVACT1_bm (1<<1) /* Event Action Select bit 1 mask. */ -#define ADC_EVACT1_bp 1 /* Event Action Select bit 1 position. */ -#define ADC_EVACT2_bm (1<<2) /* Event Action Select bit 2 mask. */ -#define ADC_EVACT2_bp 2 /* Event Action Select bit 2 position. */ - - -/* ADC.PRESCALER bit masks and bit positions */ -#define ADC_PRESCALER_gm 0x07 /* Clock Prescaler Selection group mask. */ -#define ADC_PRESCALER_gp 0 /* Clock Prescaler Selection group position. */ -#define ADC_PRESCALER0_bm (1<<0) /* Clock Prescaler Selection bit 0 mask. */ -#define ADC_PRESCALER0_bp 0 /* Clock Prescaler Selection bit 0 position. */ -#define ADC_PRESCALER1_bm (1<<1) /* Clock Prescaler Selection bit 1 mask. */ -#define ADC_PRESCALER1_bp 1 /* Clock Prescaler Selection bit 1 position. */ -#define ADC_PRESCALER2_bm (1<<2) /* Clock Prescaler Selection bit 2 mask. */ -#define ADC_PRESCALER2_bp 2 /* Clock Prescaler Selection bit 2 position. */ - - -/* ADC.CALCTRL bit masks and bit positions */ -#define ADC_CAL_bm 0x01 /* ADC Calibration Start bit mask. */ -#define ADC_CAL_bp 0 /* ADC Calibration Start bit position. */ - - -/* ADC.INTFLAGS bit masks and bit positions */ -#define ADC_CH3IF_bm 0x08 /* Channel 3 Interrupt Flag bit mask. */ -#define ADC_CH3IF_bp 3 /* Channel 3 Interrupt Flag bit position. */ - -#define ADC_CH2IF_bm 0x04 /* Channel 2 Interrupt Flag bit mask. */ -#define ADC_CH2IF_bp 2 /* Channel 2 Interrupt Flag bit position. */ - -#define ADC_CH1IF_bm 0x02 /* Channel 1 Interrupt Flag bit mask. */ -#define ADC_CH1IF_bp 1 /* Channel 1 Interrupt Flag bit position. */ - -#define ADC_CH0IF_bm 0x01 /* Channel 0 Interrupt Flag bit mask. */ -#define ADC_CH0IF_bp 0 /* Channel 0 Interrupt Flag bit position. */ - - -/* DAC - Digital/Analog Converter */ -/* DAC.CTRLA bit masks and bit positions */ -#define DAC_IDOEN_bm 0x10 /* Internal Output Enable bit mask. */ -#define DAC_IDOEN_bp 4 /* Internal Output Enable bit position. */ - -#define DAC_CH1EN_bm 0x08 /* Channel 1 Output Enable bit mask. */ -#define DAC_CH1EN_bp 3 /* Channel 1 Output Enable bit position. */ - -#define DAC_CH0EN_bm 0x04 /* Channel 0 Output Enable bit mask. */ -#define DAC_CH0EN_bp 2 /* Channel 0 Output Enable bit position. */ - -#define DAC_LPMODE_bm 0x02 /* Low Power Mode bit mask. */ -#define DAC_LPMODE_bp 1 /* Low Power Mode bit position. */ - -#define DAC_ENABLE_bm 0x01 /* Enable bit mask. */ -#define DAC_ENABLE_bp 0 /* Enable bit position. */ - - -/* DAC.CTRLB bit masks and bit positions */ -#define DAC_CHSEL_gm 0x60 /* Channel Select group mask. */ -#define DAC_CHSEL_gp 5 /* Channel Select group position. */ -#define DAC_CHSEL0_bm (1<<5) /* Channel Select bit 0 mask. */ -#define DAC_CHSEL0_bp 5 /* Channel Select bit 0 position. */ -#define DAC_CHSEL1_bm (1<<6) /* Channel Select bit 1 mask. */ -#define DAC_CHSEL1_bp 6 /* Channel Select bit 1 position. */ - -#define DAC_CH1TRIG_bm 0x02 /* Channel 1 Event Trig Enable bit mask. */ -#define DAC_CH1TRIG_bp 1 /* Channel 1 Event Trig Enable bit position. */ - -#define DAC_CH0TRIG_bm 0x01 /* Channel 0 Event Trig Enable bit mask. */ -#define DAC_CH0TRIG_bp 0 /* Channel 0 Event Trig Enable bit position. */ - - -/* DAC.CTRLC bit masks and bit positions */ -#define DAC_REFSEL_gm 0x18 /* Reference Select group mask. */ -#define DAC_REFSEL_gp 3 /* Reference Select group position. */ -#define DAC_REFSEL0_bm (1<<3) /* Reference Select bit 0 mask. */ -#define DAC_REFSEL0_bp 3 /* Reference Select bit 0 position. */ -#define DAC_REFSEL1_bm (1<<4) /* Reference Select bit 1 mask. */ -#define DAC_REFSEL1_bp 4 /* Reference Select bit 1 position. */ - -#define DAC_LEFTADJ_bm 0x01 /* Left-adjust Result bit mask. */ -#define DAC_LEFTADJ_bp 0 /* Left-adjust Result bit position. */ - - -/* DAC.EVCTRL bit masks and bit positions */ -#define DAC_EVSEL_gm 0x07 /* Event Input Selection group mask. */ -#define DAC_EVSEL_gp 0 /* Event Input Selection group position. */ -#define DAC_EVSEL0_bm (1<<0) /* Event Input Selection bit 0 mask. */ -#define DAC_EVSEL0_bp 0 /* Event Input Selection bit 0 position. */ -#define DAC_EVSEL1_bm (1<<1) /* Event Input Selection bit 1 mask. */ -#define DAC_EVSEL1_bp 1 /* Event Input Selection bit 1 position. */ -#define DAC_EVSEL2_bm (1<<2) /* Event Input Selection bit 2 mask. */ -#define DAC_EVSEL2_bp 2 /* Event Input Selection bit 2 position. */ - - -/* DAC.TIMCTRL bit masks and bit positions */ -#define DAC_CONINTVAL_gm 0x70 /* Conversion Intercal group mask. */ -#define DAC_CONINTVAL_gp 4 /* Conversion Intercal group position. */ -#define DAC_CONINTVAL0_bm (1<<4) /* Conversion Intercal bit 0 mask. */ -#define DAC_CONINTVAL0_bp 4 /* Conversion Intercal bit 0 position. */ -#define DAC_CONINTVAL1_bm (1<<5) /* Conversion Intercal bit 1 mask. */ -#define DAC_CONINTVAL1_bp 5 /* Conversion Intercal bit 1 position. */ -#define DAC_CONINTVAL2_bm (1<<6) /* Conversion Intercal bit 2 mask. */ -#define DAC_CONINTVAL2_bp 6 /* Conversion Intercal bit 2 position. */ - -#define DAC_REFRESH_gm 0x0F /* Refresh Timing Control group mask. */ -#define DAC_REFRESH_gp 0 /* Refresh Timing Control group position. */ -#define DAC_REFRESH0_bm (1<<0) /* Refresh Timing Control bit 0 mask. */ -#define DAC_REFRESH0_bp 0 /* Refresh Timing Control bit 0 position. */ -#define DAC_REFRESH1_bm (1<<1) /* Refresh Timing Control bit 1 mask. */ -#define DAC_REFRESH1_bp 1 /* Refresh Timing Control bit 1 position. */ -#define DAC_REFRESH2_bm (1<<2) /* Refresh Timing Control bit 2 mask. */ -#define DAC_REFRESH2_bp 2 /* Refresh Timing Control bit 2 position. */ -#define DAC_REFRESH3_bm (1<<3) /* Refresh Timing Control bit 3 mask. */ -#define DAC_REFRESH3_bp 3 /* Refresh Timing Control bit 3 position. */ - - -/* DAC.STATUS bit masks and bit positions */ -#define DAC_CH1DRE_bm 0x02 /* Channel 1 Data Register Empty bit mask. */ -#define DAC_CH1DRE_bp 1 /* Channel 1 Data Register Empty bit position. */ - -#define DAC_CH0DRE_bm 0x01 /* Channel 0 Data Register Empty bit mask. */ -#define DAC_CH0DRE_bp 0 /* Channel 0 Data Register Empty bit position. */ - - -/* RTC - Real-Time Clounter */ -/* RTC.CTRL bit masks and bit positions */ -#define RTC_PRESCALER_gm 0x07 /* Prescaling Factor group mask. */ -#define RTC_PRESCALER_gp 0 /* Prescaling Factor group position. */ -#define RTC_PRESCALER0_bm (1<<0) /* Prescaling Factor bit 0 mask. */ -#define RTC_PRESCALER0_bp 0 /* Prescaling Factor bit 0 position. */ -#define RTC_PRESCALER1_bm (1<<1) /* Prescaling Factor bit 1 mask. */ -#define RTC_PRESCALER1_bp 1 /* Prescaling Factor bit 1 position. */ -#define RTC_PRESCALER2_bm (1<<2) /* Prescaling Factor bit 2 mask. */ -#define RTC_PRESCALER2_bp 2 /* Prescaling Factor bit 2 position. */ - - -/* RTC.STATUS bit masks and bit positions */ -#define RTC_SYNCBUSY_bm 0x01 /* Synchronization Busy Flag bit mask. */ -#define RTC_SYNCBUSY_bp 0 /* Synchronization Busy Flag bit position. */ - - -/* RTC.INTCTRL bit masks and bit positions */ -#define RTC_COMPINTLVL_gm 0x0C /* Compare Match Interrupt Level group mask. */ -#define RTC_COMPINTLVL_gp 2 /* Compare Match Interrupt Level group position. */ -#define RTC_COMPINTLVL0_bm (1<<2) /* Compare Match Interrupt Level bit 0 mask. */ -#define RTC_COMPINTLVL0_bp 2 /* Compare Match Interrupt Level bit 0 position. */ -#define RTC_COMPINTLVL1_bm (1<<3) /* Compare Match Interrupt Level bit 1 mask. */ -#define RTC_COMPINTLVL1_bp 3 /* Compare Match Interrupt Level bit 1 position. */ - -#define RTC_OVFINTLVL_gm 0x03 /* Overflow Interrupt Level group mask. */ -#define RTC_OVFINTLVL_gp 0 /* Overflow Interrupt Level group position. */ -#define RTC_OVFINTLVL0_bm (1<<0) /* Overflow Interrupt Level bit 0 mask. */ -#define RTC_OVFINTLVL0_bp 0 /* Overflow Interrupt Level bit 0 position. */ -#define RTC_OVFINTLVL1_bm (1<<1) /* Overflow Interrupt Level bit 1 mask. */ -#define RTC_OVFINTLVL1_bp 1 /* Overflow Interrupt Level bit 1 position. */ - - -/* RTC.INTFLAGS bit masks and bit positions */ -#define RTC_COMPIF_bm 0x02 /* Compare Match Interrupt Flag bit mask. */ -#define RTC_COMPIF_bp 1 /* Compare Match Interrupt Flag bit position. */ - -#define RTC_OVFIF_bm 0x01 /* Overflow Interrupt Flag bit mask. */ -#define RTC_OVFIF_bp 0 /* Overflow Interrupt Flag bit position. */ - - -/* EBI - External Bus Interface */ -/* EBI_CS.CTRLA bit masks and bit positions */ -#define EBI_CS_ASPACE_gm 0x7C /* Address Space group mask. */ -#define EBI_CS_ASPACE_gp 2 /* Address Space group position. */ -#define EBI_CS_ASPACE0_bm (1<<2) /* Address Space bit 0 mask. */ -#define EBI_CS_ASPACE0_bp 2 /* Address Space bit 0 position. */ -#define EBI_CS_ASPACE1_bm (1<<3) /* Address Space bit 1 mask. */ -#define EBI_CS_ASPACE1_bp 3 /* Address Space bit 1 position. */ -#define EBI_CS_ASPACE2_bm (1<<4) /* Address Space bit 2 mask. */ -#define EBI_CS_ASPACE2_bp 4 /* Address Space bit 2 position. */ -#define EBI_CS_ASPACE3_bm (1<<5) /* Address Space bit 3 mask. */ -#define EBI_CS_ASPACE3_bp 5 /* Address Space bit 3 position. */ -#define EBI_CS_ASPACE4_bm (1<<6) /* Address Space bit 4 mask. */ -#define EBI_CS_ASPACE4_bp 6 /* Address Space bit 4 position. */ - -#define EBI_CS_MODE_gm 0x03 /* Memory Mode group mask. */ -#define EBI_CS_MODE_gp 0 /* Memory Mode group position. */ -#define EBI_CS_MODE0_bm (1<<0) /* Memory Mode bit 0 mask. */ -#define EBI_CS_MODE0_bp 0 /* Memory Mode bit 0 position. */ -#define EBI_CS_MODE1_bm (1<<1) /* Memory Mode bit 1 mask. */ -#define EBI_CS_MODE1_bp 1 /* Memory Mode bit 1 position. */ - - -/* EBI_CS.CTRLB bit masks and bit positions */ -#define EBI_CS_SRWS_gm 0x07 /* SRAM Wait State Cycles group mask. */ -#define EBI_CS_SRWS_gp 0 /* SRAM Wait State Cycles group position. */ -#define EBI_CS_SRWS0_bm (1<<0) /* SRAM Wait State Cycles bit 0 mask. */ -#define EBI_CS_SRWS0_bp 0 /* SRAM Wait State Cycles bit 0 position. */ -#define EBI_CS_SRWS1_bm (1<<1) /* SRAM Wait State Cycles bit 1 mask. */ -#define EBI_CS_SRWS1_bp 1 /* SRAM Wait State Cycles bit 1 position. */ -#define EBI_CS_SRWS2_bm (1<<2) /* SRAM Wait State Cycles bit 2 mask. */ -#define EBI_CS_SRWS2_bp 2 /* SRAM Wait State Cycles bit 2 position. */ - -#define EBI_CS_SDINITDONE_bm 0x80 /* SDRAM Initialization Done bit mask. */ -#define EBI_CS_SDINITDONE_bp 7 /* SDRAM Initialization Done bit position. */ - -#define EBI_CS_SDSREN_bm 0x04 /* SDRAM Self-refresh Enable bit mask. */ -#define EBI_CS_SDSREN_bp 2 /* SDRAM Self-refresh Enable bit position. */ - -#define EBI_CS_SDMODE_gm 0x03 /* SDRAM Mode group mask. */ -#define EBI_CS_SDMODE_gp 0 /* SDRAM Mode group position. */ -#define EBI_CS_SDMODE0_bm (1<<0) /* SDRAM Mode bit 0 mask. */ -#define EBI_CS_SDMODE0_bp 0 /* SDRAM Mode bit 0 position. */ -#define EBI_CS_SDMODE1_bm (1<<1) /* SDRAM Mode bit 1 mask. */ -#define EBI_CS_SDMODE1_bp 1 /* SDRAM Mode bit 1 position. */ - - -/* EBI.CTRL bit masks and bit positions */ -#define EBI_SDDATAW_gm 0xC0 /* SDRAM Data Width Setting group mask. */ -#define EBI_SDDATAW_gp 6 /* SDRAM Data Width Setting group position. */ -#define EBI_SDDATAW0_bm (1<<6) /* SDRAM Data Width Setting bit 0 mask. */ -#define EBI_SDDATAW0_bp 6 /* SDRAM Data Width Setting bit 0 position. */ -#define EBI_SDDATAW1_bm (1<<7) /* SDRAM Data Width Setting bit 1 mask. */ -#define EBI_SDDATAW1_bp 7 /* SDRAM Data Width Setting bit 1 position. */ - -#define EBI_LPCMODE_gm 0x30 /* SRAM LPC Mode group mask. */ -#define EBI_LPCMODE_gp 4 /* SRAM LPC Mode group position. */ -#define EBI_LPCMODE0_bm (1<<4) /* SRAM LPC Mode bit 0 mask. */ -#define EBI_LPCMODE0_bp 4 /* SRAM LPC Mode bit 0 position. */ -#define EBI_LPCMODE1_bm (1<<5) /* SRAM LPC Mode bit 1 mask. */ -#define EBI_LPCMODE1_bp 5 /* SRAM LPC Mode bit 1 position. */ - -#define EBI_SRMODE_gm 0x0C /* SRAM Mode group mask. */ -#define EBI_SRMODE_gp 2 /* SRAM Mode group position. */ -#define EBI_SRMODE0_bm (1<<2) /* SRAM Mode bit 0 mask. */ -#define EBI_SRMODE0_bp 2 /* SRAM Mode bit 0 position. */ -#define EBI_SRMODE1_bm (1<<3) /* SRAM Mode bit 1 mask. */ -#define EBI_SRMODE1_bp 3 /* SRAM Mode bit 1 position. */ - -#define EBI_IFMODE_gm 0x03 /* Interface Mode group mask. */ -#define EBI_IFMODE_gp 0 /* Interface Mode group position. */ -#define EBI_IFMODE0_bm (1<<0) /* Interface Mode bit 0 mask. */ -#define EBI_IFMODE0_bp 0 /* Interface Mode bit 0 position. */ -#define EBI_IFMODE1_bm (1<<1) /* Interface Mode bit 1 mask. */ -#define EBI_IFMODE1_bp 1 /* Interface Mode bit 1 position. */ - - -/* EBI.SDRAMCTRLA bit masks and bit positions */ -#define EBI_SDCAS_bm 0x08 /* SDRAM CAS Latency Setting bit mask. */ -#define EBI_SDCAS_bp 3 /* SDRAM CAS Latency Setting bit position. */ - -#define EBI_SDROW_bm 0x04 /* SDRAM ROW Bits Setting bit mask. */ -#define EBI_SDROW_bp 2 /* SDRAM ROW Bits Setting bit position. */ - -#define EBI_SDCOL_gm 0x03 /* SDRAM Column Bits Setting group mask. */ -#define EBI_SDCOL_gp 0 /* SDRAM Column Bits Setting group position. */ -#define EBI_SDCOL0_bm (1<<0) /* SDRAM Column Bits Setting bit 0 mask. */ -#define EBI_SDCOL0_bp 0 /* SDRAM Column Bits Setting bit 0 position. */ -#define EBI_SDCOL1_bm (1<<1) /* SDRAM Column Bits Setting bit 1 mask. */ -#define EBI_SDCOL1_bp 1 /* SDRAM Column Bits Setting bit 1 position. */ - - -/* EBI.SDRAMCTRLB bit masks and bit positions */ -#define EBI_MRDLY_gm 0xC0 /* SDRAM Mode Register Delay group mask. */ -#define EBI_MRDLY_gp 6 /* SDRAM Mode Register Delay group position. */ -#define EBI_MRDLY0_bm (1<<6) /* SDRAM Mode Register Delay bit 0 mask. */ -#define EBI_MRDLY0_bp 6 /* SDRAM Mode Register Delay bit 0 position. */ -#define EBI_MRDLY1_bm (1<<7) /* SDRAM Mode Register Delay bit 1 mask. */ -#define EBI_MRDLY1_bp 7 /* SDRAM Mode Register Delay bit 1 position. */ - -#define EBI_ROWCYCDLY_gm 0x38 /* SDRAM Row Cycle Delay group mask. */ -#define EBI_ROWCYCDLY_gp 3 /* SDRAM Row Cycle Delay group position. */ -#define EBI_ROWCYCDLY0_bm (1<<3) /* SDRAM Row Cycle Delay bit 0 mask. */ -#define EBI_ROWCYCDLY0_bp 3 /* SDRAM Row Cycle Delay bit 0 position. */ -#define EBI_ROWCYCDLY1_bm (1<<4) /* SDRAM Row Cycle Delay bit 1 mask. */ -#define EBI_ROWCYCDLY1_bp 4 /* SDRAM Row Cycle Delay bit 1 position. */ -#define EBI_ROWCYCDLY2_bm (1<<5) /* SDRAM Row Cycle Delay bit 2 mask. */ -#define EBI_ROWCYCDLY2_bp 5 /* SDRAM Row Cycle Delay bit 2 position. */ - -#define EBI_RPDLY_gm 0x07 /* SDRAM Row-to-Precharge Delay group mask. */ -#define EBI_RPDLY_gp 0 /* SDRAM Row-to-Precharge Delay group position. */ -#define EBI_RPDLY0_bm (1<<0) /* SDRAM Row-to-Precharge Delay bit 0 mask. */ -#define EBI_RPDLY0_bp 0 /* SDRAM Row-to-Precharge Delay bit 0 position. */ -#define EBI_RPDLY1_bm (1<<1) /* SDRAM Row-to-Precharge Delay bit 1 mask. */ -#define EBI_RPDLY1_bp 1 /* SDRAM Row-to-Precharge Delay bit 1 position. */ -#define EBI_RPDLY2_bm (1<<2) /* SDRAM Row-to-Precharge Delay bit 2 mask. */ -#define EBI_RPDLY2_bp 2 /* SDRAM Row-to-Precharge Delay bit 2 position. */ - - -/* EBI.SDRAMCTRLC bit masks and bit positions */ -#define EBI_WRDLY_gm 0xC0 /* SDRAM Write Recovery Delay group mask. */ -#define EBI_WRDLY_gp 6 /* SDRAM Write Recovery Delay group position. */ -#define EBI_WRDLY0_bm (1<<6) /* SDRAM Write Recovery Delay bit 0 mask. */ -#define EBI_WRDLY0_bp 6 /* SDRAM Write Recovery Delay bit 0 position. */ -#define EBI_WRDLY1_bm (1<<7) /* SDRAM Write Recovery Delay bit 1 mask. */ -#define EBI_WRDLY1_bp 7 /* SDRAM Write Recovery Delay bit 1 position. */ - -#define EBI_ESRDLY_gm 0x38 /* SDRAM Exit-Self-refresh-to-Active Delay group mask. */ -#define EBI_ESRDLY_gp 3 /* SDRAM Exit-Self-refresh-to-Active Delay group position. */ -#define EBI_ESRDLY0_bm (1<<3) /* SDRAM Exit-Self-refresh-to-Active Delay bit 0 mask. */ -#define EBI_ESRDLY0_bp 3 /* SDRAM Exit-Self-refresh-to-Active Delay bit 0 position. */ -#define EBI_ESRDLY1_bm (1<<4) /* SDRAM Exit-Self-refresh-to-Active Delay bit 1 mask. */ -#define EBI_ESRDLY1_bp 4 /* SDRAM Exit-Self-refresh-to-Active Delay bit 1 position. */ -#define EBI_ESRDLY2_bm (1<<5) /* SDRAM Exit-Self-refresh-to-Active Delay bit 2 mask. */ -#define EBI_ESRDLY2_bp 5 /* SDRAM Exit-Self-refresh-to-Active Delay bit 2 position. */ - -#define EBI_ROWCOLDLY_gm 0x07 /* SDRAM Row-to-Column Delay group mask. */ -#define EBI_ROWCOLDLY_gp 0 /* SDRAM Row-to-Column Delay group position. */ -#define EBI_ROWCOLDLY0_bm (1<<0) /* SDRAM Row-to-Column Delay bit 0 mask. */ -#define EBI_ROWCOLDLY0_bp 0 /* SDRAM Row-to-Column Delay bit 0 position. */ -#define EBI_ROWCOLDLY1_bm (1<<1) /* SDRAM Row-to-Column Delay bit 1 mask. */ -#define EBI_ROWCOLDLY1_bp 1 /* SDRAM Row-to-Column Delay bit 1 position. */ -#define EBI_ROWCOLDLY2_bm (1<<2) /* SDRAM Row-to-Column Delay bit 2 mask. */ -#define EBI_ROWCOLDLY2_bp 2 /* SDRAM Row-to-Column Delay bit 2 position. */ - - -/* TWI - Two-Wire Interface */ -/* TWI_MASTER.CTRLA bit masks and bit positions */ -#define TWI_MASTER_INTLVL_gm 0xC0 /* Interrupt Level group mask. */ -#define TWI_MASTER_INTLVL_gp 6 /* Interrupt Level group position. */ -#define TWI_MASTER_INTLVL0_bm (1<<6) /* Interrupt Level bit 0 mask. */ -#define TWI_MASTER_INTLVL0_bp 6 /* Interrupt Level bit 0 position. */ -#define TWI_MASTER_INTLVL1_bm (1<<7) /* Interrupt Level bit 1 mask. */ -#define TWI_MASTER_INTLVL1_bp 7 /* Interrupt Level bit 1 position. */ - -#define TWI_MASTER_RIEN_bm 0x20 /* Read Interrupt Enable bit mask. */ -#define TWI_MASTER_RIEN_bp 5 /* Read Interrupt Enable bit position. */ - -#define TWI_MASTER_WIEN_bm 0x10 /* Write Interrupt Enable bit mask. */ -#define TWI_MASTER_WIEN_bp 4 /* Write Interrupt Enable bit position. */ - -#define TWI_MASTER_ENABLE_bm 0x08 /* Enable TWI Master bit mask. */ -#define TWI_MASTER_ENABLE_bp 3 /* Enable TWI Master bit position. */ - - -/* TWI_MASTER.CTRLB bit masks and bit positions */ -#define TWI_MASTER_TIMEOUT_gm 0x0C /* Inactive Bus Timeout group mask. */ -#define TWI_MASTER_TIMEOUT_gp 2 /* Inactive Bus Timeout group position. */ -#define TWI_MASTER_TIMEOUT0_bm (1<<2) /* Inactive Bus Timeout bit 0 mask. */ -#define TWI_MASTER_TIMEOUT0_bp 2 /* Inactive Bus Timeout bit 0 position. */ -#define TWI_MASTER_TIMEOUT1_bm (1<<3) /* Inactive Bus Timeout bit 1 mask. */ -#define TWI_MASTER_TIMEOUT1_bp 3 /* Inactive Bus Timeout bit 1 position. */ - -#define TWI_MASTER_QCEN_bm 0x02 /* Quick Command Enable bit mask. */ -#define TWI_MASTER_QCEN_bp 1 /* Quick Command Enable bit position. */ - -#define TWI_MASTER_SMEN_bm 0x01 /* Smart Mode Enable bit mask. */ -#define TWI_MASTER_SMEN_bp 0 /* Smart Mode Enable bit position. */ - - -/* TWI_MASTER.CTRLC bit masks and bit positions */ -#define TWI_MASTER_ACKACT_bm 0x04 /* Acknowledge Action bit mask. */ -#define TWI_MASTER_ACKACT_bp 2 /* Acknowledge Action bit position. */ - -#define TWI_MASTER_CMD_gm 0x03 /* Command group mask. */ -#define TWI_MASTER_CMD_gp 0 /* Command group position. */ -#define TWI_MASTER_CMD0_bm (1<<0) /* Command bit 0 mask. */ -#define TWI_MASTER_CMD0_bp 0 /* Command bit 0 position. */ -#define TWI_MASTER_CMD1_bm (1<<1) /* Command bit 1 mask. */ -#define TWI_MASTER_CMD1_bp 1 /* Command bit 1 position. */ - - -/* TWI_MASTER.STATUS bit masks and bit positions */ -#define TWI_MASTER_RIF_bm 0x80 /* Read Interrupt Flag bit mask. */ -#define TWI_MASTER_RIF_bp 7 /* Read Interrupt Flag bit position. */ - -#define TWI_MASTER_WIF_bm 0x40 /* Write Interrupt Flag bit mask. */ -#define TWI_MASTER_WIF_bp 6 /* Write Interrupt Flag bit position. */ - -#define TWI_MASTER_CLKHOLD_bm 0x20 /* Clock Hold bit mask. */ -#define TWI_MASTER_CLKHOLD_bp 5 /* Clock Hold bit position. */ - -#define TWI_MASTER_RXACK_bm 0x10 /* Received Acknowledge bit mask. */ -#define TWI_MASTER_RXACK_bp 4 /* Received Acknowledge bit position. */ - -#define TWI_MASTER_ARBLOST_bm 0x08 /* Arbitration Lost bit mask. */ -#define TWI_MASTER_ARBLOST_bp 3 /* Arbitration Lost bit position. */ - -#define TWI_MASTER_BUSERR_bm 0x04 /* Bus Error bit mask. */ -#define TWI_MASTER_BUSERR_bp 2 /* Bus Error bit position. */ - -#define TWI_MASTER_BUSSTATE_gm 0x03 /* Bus State group mask. */ -#define TWI_MASTER_BUSSTATE_gp 0 /* Bus State group position. */ -#define TWI_MASTER_BUSSTATE0_bm (1<<0) /* Bus State bit 0 mask. */ -#define TWI_MASTER_BUSSTATE0_bp 0 /* Bus State bit 0 position. */ -#define TWI_MASTER_BUSSTATE1_bm (1<<1) /* Bus State bit 1 mask. */ -#define TWI_MASTER_BUSSTATE1_bp 1 /* Bus State bit 1 position. */ - - -/* TWI_SLAVE.CTRLA bit masks and bit positions */ -#define TWI_SLAVE_INTLVL_gm 0xC0 /* Interrupt Level group mask. */ -#define TWI_SLAVE_INTLVL_gp 6 /* Interrupt Level group position. */ -#define TWI_SLAVE_INTLVL0_bm (1<<6) /* Interrupt Level bit 0 mask. */ -#define TWI_SLAVE_INTLVL0_bp 6 /* Interrupt Level bit 0 position. */ -#define TWI_SLAVE_INTLVL1_bm (1<<7) /* Interrupt Level bit 1 mask. */ -#define TWI_SLAVE_INTLVL1_bp 7 /* Interrupt Level bit 1 position. */ - -#define TWI_SLAVE_DIEN_bm 0x20 /* Data Interrupt Enable bit mask. */ -#define TWI_SLAVE_DIEN_bp 5 /* Data Interrupt Enable bit position. */ - -#define TWI_SLAVE_APIEN_bm 0x10 /* Address/Stop Interrupt Enable bit mask. */ -#define TWI_SLAVE_APIEN_bp 4 /* Address/Stop Interrupt Enable bit position. */ - -#define TWI_SLAVE_ENABLE_bm 0x08 /* Enable TWI Slave bit mask. */ -#define TWI_SLAVE_ENABLE_bp 3 /* Enable TWI Slave bit position. */ - -#define TWI_SLAVE_PIEN_bm 0x04 /* Stop Interrupt Enable bit mask. */ -#define TWI_SLAVE_PIEN_bp 2 /* Stop Interrupt Enable bit position. */ - -#define TWI_SLAVE_PMEN_bm 0x02 /* Promiscuous Mode Enable bit mask. */ -#define TWI_SLAVE_PMEN_bp 1 /* Promiscuous Mode Enable bit position. */ - -#define TWI_SLAVE_SMEN_bm 0x01 /* Smart Mode Enable bit mask. */ -#define TWI_SLAVE_SMEN_bp 0 /* Smart Mode Enable bit position. */ - - -/* TWI_SLAVE.CTRLB bit masks and bit positions */ -#define TWI_SLAVE_ACKACT_bm 0x04 /* Acknowledge Action bit mask. */ -#define TWI_SLAVE_ACKACT_bp 2 /* Acknowledge Action bit position. */ - -#define TWI_SLAVE_CMD_gm 0x03 /* Command group mask. */ -#define TWI_SLAVE_CMD_gp 0 /* Command group position. */ -#define TWI_SLAVE_CMD0_bm (1<<0) /* Command bit 0 mask. */ -#define TWI_SLAVE_CMD0_bp 0 /* Command bit 0 position. */ -#define TWI_SLAVE_CMD1_bm (1<<1) /* Command bit 1 mask. */ -#define TWI_SLAVE_CMD1_bp 1 /* Command bit 1 position. */ - - -/* TWI_SLAVE.STATUS bit masks and bit positions */ -#define TWI_SLAVE_DIF_bm 0x80 /* Data Interrupt Flag bit mask. */ -#define TWI_SLAVE_DIF_bp 7 /* Data Interrupt Flag bit position. */ - -#define TWI_SLAVE_APIF_bm 0x40 /* Address/Stop Interrupt Flag bit mask. */ -#define TWI_SLAVE_APIF_bp 6 /* Address/Stop Interrupt Flag bit position. */ - -#define TWI_SLAVE_CLKHOLD_bm 0x20 /* Clock Hold bit mask. */ -#define TWI_SLAVE_CLKHOLD_bp 5 /* Clock Hold bit position. */ - -#define TWI_SLAVE_RXACK_bm 0x10 /* Received Acknowledge bit mask. */ -#define TWI_SLAVE_RXACK_bp 4 /* Received Acknowledge bit position. */ - -#define TWI_SLAVE_COLL_bm 0x08 /* Collision bit mask. */ -#define TWI_SLAVE_COLL_bp 3 /* Collision bit position. */ - -#define TWI_SLAVE_BUSERR_bm 0x04 /* Bus Error bit mask. */ -#define TWI_SLAVE_BUSERR_bp 2 /* Bus Error bit position. */ - -#define TWI_SLAVE_DIR_bm 0x02 /* Read/Write Direction bit mask. */ -#define TWI_SLAVE_DIR_bp 1 /* Read/Write Direction bit position. */ - -#define TWI_SLAVE_AP_bm 0x01 /* Slave Address or Stop bit mask. */ -#define TWI_SLAVE_AP_bp 0 /* Slave Address or Stop bit position. */ - - -/* TWI.CTRL bit masks and bit positions */ -#define TWI_SDAHOLD_bm 0x02 /* SDA Hold Time Enable bit mask. */ -#define TWI_SDAHOLD_bp 1 /* SDA Hold Time Enable bit position. */ - -#define TWI_EDIEN_bm 0x01 /* External Driver Interface Enable bit mask. */ -#define TWI_EDIEN_bp 0 /* External Driver Interface Enable bit position. */ - - -/* PORT - Port Configuration */ -/* PORTCFG.VPCTRLA bit masks and bit positions */ -#define PORTCFG_VP1MAP_gm 0xF0 /* Virtual Port 1 Mapping group mask. */ -#define PORTCFG_VP1MAP_gp 4 /* Virtual Port 1 Mapping group position. */ -#define PORTCFG_VP1MAP0_bm (1<<4) /* Virtual Port 1 Mapping bit 0 mask. */ -#define PORTCFG_VP1MAP0_bp 4 /* Virtual Port 1 Mapping bit 0 position. */ -#define PORTCFG_VP1MAP1_bm (1<<5) /* Virtual Port 1 Mapping bit 1 mask. */ -#define PORTCFG_VP1MAP1_bp 5 /* Virtual Port 1 Mapping bit 1 position. */ -#define PORTCFG_VP1MAP2_bm (1<<6) /* Virtual Port 1 Mapping bit 2 mask. */ -#define PORTCFG_VP1MAP2_bp 6 /* Virtual Port 1 Mapping bit 2 position. */ -#define PORTCFG_VP1MAP3_bm (1<<7) /* Virtual Port 1 Mapping bit 3 mask. */ -#define PORTCFG_VP1MAP3_bp 7 /* Virtual Port 1 Mapping bit 3 position. */ - -#define PORTCFG_VP0MAP_gm 0x0F /* Virtual Port 0 Mapping group mask. */ -#define PORTCFG_VP0MAP_gp 0 /* Virtual Port 0 Mapping group position. */ -#define PORTCFG_VP0MAP0_bm (1<<0) /* Virtual Port 0 Mapping bit 0 mask. */ -#define PORTCFG_VP0MAP0_bp 0 /* Virtual Port 0 Mapping bit 0 position. */ -#define PORTCFG_VP0MAP1_bm (1<<1) /* Virtual Port 0 Mapping bit 1 mask. */ -#define PORTCFG_VP0MAP1_bp 1 /* Virtual Port 0 Mapping bit 1 position. */ -#define PORTCFG_VP0MAP2_bm (1<<2) /* Virtual Port 0 Mapping bit 2 mask. */ -#define PORTCFG_VP0MAP2_bp 2 /* Virtual Port 0 Mapping bit 2 position. */ -#define PORTCFG_VP0MAP3_bm (1<<3) /* Virtual Port 0 Mapping bit 3 mask. */ -#define PORTCFG_VP0MAP3_bp 3 /* Virtual Port 0 Mapping bit 3 position. */ - - -/* PORTCFG.VPCTRLB bit masks and bit positions */ -#define PORTCFG_VP3MAP_gm 0xF0 /* Virtual Port 3 Mapping group mask. */ -#define PORTCFG_VP3MAP_gp 4 /* Virtual Port 3 Mapping group position. */ -#define PORTCFG_VP3MAP0_bm (1<<4) /* Virtual Port 3 Mapping bit 0 mask. */ -#define PORTCFG_VP3MAP0_bp 4 /* Virtual Port 3 Mapping bit 0 position. */ -#define PORTCFG_VP3MAP1_bm (1<<5) /* Virtual Port 3 Mapping bit 1 mask. */ -#define PORTCFG_VP3MAP1_bp 5 /* Virtual Port 3 Mapping bit 1 position. */ -#define PORTCFG_VP3MAP2_bm (1<<6) /* Virtual Port 3 Mapping bit 2 mask. */ -#define PORTCFG_VP3MAP2_bp 6 /* Virtual Port 3 Mapping bit 2 position. */ -#define PORTCFG_VP3MAP3_bm (1<<7) /* Virtual Port 3 Mapping bit 3 mask. */ -#define PORTCFG_VP3MAP3_bp 7 /* Virtual Port 3 Mapping bit 3 position. */ - -#define PORTCFG_VP2MAP_gm 0x0F /* Virtual Port 2 Mapping group mask. */ -#define PORTCFG_VP2MAP_gp 0 /* Virtual Port 2 Mapping group position. */ -#define PORTCFG_VP2MAP0_bm (1<<0) /* Virtual Port 2 Mapping bit 0 mask. */ -#define PORTCFG_VP2MAP0_bp 0 /* Virtual Port 2 Mapping bit 0 position. */ -#define PORTCFG_VP2MAP1_bm (1<<1) /* Virtual Port 2 Mapping bit 1 mask. */ -#define PORTCFG_VP2MAP1_bp 1 /* Virtual Port 2 Mapping bit 1 position. */ -#define PORTCFG_VP2MAP2_bm (1<<2) /* Virtual Port 2 Mapping bit 2 mask. */ -#define PORTCFG_VP2MAP2_bp 2 /* Virtual Port 2 Mapping bit 2 position. */ -#define PORTCFG_VP2MAP3_bm (1<<3) /* Virtual Port 2 Mapping bit 3 mask. */ -#define PORTCFG_VP2MAP3_bp 3 /* Virtual Port 2 Mapping bit 3 position. */ - - -/* PORTCFG.CLKEVOUT bit masks and bit positions */ -#define PORTCFG_CLKOUT_gm 0x03 /* Clock Output Port group mask. */ -#define PORTCFG_CLKOUT_gp 0 /* Clock Output Port group position. */ -#define PORTCFG_CLKOUT0_bm (1<<0) /* Clock Output Port bit 0 mask. */ -#define PORTCFG_CLKOUT0_bp 0 /* Clock Output Port bit 0 position. */ -#define PORTCFG_CLKOUT1_bm (1<<1) /* Clock Output Port bit 1 mask. */ -#define PORTCFG_CLKOUT1_bp 1 /* Clock Output Port bit 1 position. */ - -#define PORTCFG_EVOUT_gm 0x30 /* Event Output Port group mask. */ -#define PORTCFG_EVOUT_gp 4 /* Event Output Port group position. */ -#define PORTCFG_EVOUT0_bm (1<<4) /* Event Output Port bit 0 mask. */ -#define PORTCFG_EVOUT0_bp 4 /* Event Output Port bit 0 position. */ -#define PORTCFG_EVOUT1_bm (1<<5) /* Event Output Port bit 1 mask. */ -#define PORTCFG_EVOUT1_bp 5 /* Event Output Port bit 1 position. */ - - -/* VPORT.INTFLAGS bit masks and bit positions */ -#define VPORT_INT1IF_bm 0x02 /* Port Interrupt 1 Flag bit mask. */ -#define VPORT_INT1IF_bp 1 /* Port Interrupt 1 Flag bit position. */ - -#define VPORT_INT0IF_bm 0x01 /* Port Interrupt 0 Flag bit mask. */ -#define VPORT_INT0IF_bp 0 /* Port Interrupt 0 Flag bit position. */ - - -/* PORT.INTCTRL bit masks and bit positions */ -#define PORT_INT1LVL_gm 0x0C /* Port Interrupt 1 Level group mask. */ -#define PORT_INT1LVL_gp 2 /* Port Interrupt 1 Level group position. */ -#define PORT_INT1LVL0_bm (1<<2) /* Port Interrupt 1 Level bit 0 mask. */ -#define PORT_INT1LVL0_bp 2 /* Port Interrupt 1 Level bit 0 position. */ -#define PORT_INT1LVL1_bm (1<<3) /* Port Interrupt 1 Level bit 1 mask. */ -#define PORT_INT1LVL1_bp 3 /* Port Interrupt 1 Level bit 1 position. */ - -#define PORT_INT0LVL_gm 0x03 /* Port Interrupt 0 Level group mask. */ -#define PORT_INT0LVL_gp 0 /* Port Interrupt 0 Level group position. */ -#define PORT_INT0LVL0_bm (1<<0) /* Port Interrupt 0 Level bit 0 mask. */ -#define PORT_INT0LVL0_bp 0 /* Port Interrupt 0 Level bit 0 position. */ -#define PORT_INT0LVL1_bm (1<<1) /* Port Interrupt 0 Level bit 1 mask. */ -#define PORT_INT0LVL1_bp 1 /* Port Interrupt 0 Level bit 1 position. */ - - -/* PORT.INTFLAGS bit masks and bit positions */ -#define PORT_INT1IF_bm 0x02 /* Port Interrupt 1 Flag bit mask. */ -#define PORT_INT1IF_bp 1 /* Port Interrupt 1 Flag bit position. */ - -#define PORT_INT0IF_bm 0x01 /* Port Interrupt 0 Flag bit mask. */ -#define PORT_INT0IF_bp 0 /* Port Interrupt 0 Flag bit position. */ - - -/* PORT.PIN0CTRL bit masks and bit positions */ -#define PORT_SRLEN_bm 0x80 /* Slew Rate Enable bit mask. */ -#define PORT_SRLEN_bp 7 /* Slew Rate Enable bit position. */ - -#define PORT_INVEN_bm 0x40 /* Inverted I/O Enable bit mask. */ -#define PORT_INVEN_bp 6 /* Inverted I/O Enable bit position. */ - -#define PORT_OPC_gm 0x38 /* Output/Pull Configuration group mask. */ -#define PORT_OPC_gp 3 /* Output/Pull Configuration group position. */ -#define PORT_OPC0_bm (1<<3) /* Output/Pull Configuration bit 0 mask. */ -#define PORT_OPC0_bp 3 /* Output/Pull Configuration bit 0 position. */ -#define PORT_OPC1_bm (1<<4) /* Output/Pull Configuration bit 1 mask. */ -#define PORT_OPC1_bp 4 /* Output/Pull Configuration bit 1 position. */ -#define PORT_OPC2_bm (1<<5) /* Output/Pull Configuration bit 2 mask. */ -#define PORT_OPC2_bp 5 /* Output/Pull Configuration bit 2 position. */ - -#define PORT_ISC_gm 0x07 /* Input/Sense Configuration group mask. */ -#define PORT_ISC_gp 0 /* Input/Sense Configuration group position. */ -#define PORT_ISC0_bm (1<<0) /* Input/Sense Configuration bit 0 mask. */ -#define PORT_ISC0_bp 0 /* Input/Sense Configuration bit 0 position. */ -#define PORT_ISC1_bm (1<<1) /* Input/Sense Configuration bit 1 mask. */ -#define PORT_ISC1_bp 1 /* Input/Sense Configuration bit 1 position. */ -#define PORT_ISC2_bm (1<<2) /* Input/Sense Configuration bit 2 mask. */ -#define PORT_ISC2_bp 2 /* Input/Sense Configuration bit 2 position. */ - - -/* PORT.PIN1CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* PORT.PIN2CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* PORT.PIN3CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* PORT.PIN4CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* PORT.PIN5CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* PORT.PIN6CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* PORT.PIN7CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* TC - 16-bit Timer/Counter With PWM */ -/* TC0.CTRLA bit masks and bit positions */ -#define TC0_CLKSEL_gm 0x0F /* Clock Selection group mask. */ -#define TC0_CLKSEL_gp 0 /* Clock Selection group position. */ -#define TC0_CLKSEL0_bm (1<<0) /* Clock Selection bit 0 mask. */ -#define TC0_CLKSEL0_bp 0 /* Clock Selection bit 0 position. */ -#define TC0_CLKSEL1_bm (1<<1) /* Clock Selection bit 1 mask. */ -#define TC0_CLKSEL1_bp 1 /* Clock Selection bit 1 position. */ -#define TC0_CLKSEL2_bm (1<<2) /* Clock Selection bit 2 mask. */ -#define TC0_CLKSEL2_bp 2 /* Clock Selection bit 2 position. */ -#define TC0_CLKSEL3_bm (1<<3) /* Clock Selection bit 3 mask. */ -#define TC0_CLKSEL3_bp 3 /* Clock Selection bit 3 position. */ - - -/* TC0.CTRLB bit masks and bit positions */ -#define TC0_CCDEN_bm 0x80 /* Compare or Capture D Enable bit mask. */ -#define TC0_CCDEN_bp 7 /* Compare or Capture D Enable bit position. */ - -#define TC0_CCCEN_bm 0x40 /* Compare or Capture C Enable bit mask. */ -#define TC0_CCCEN_bp 6 /* Compare or Capture C Enable bit position. */ - -#define TC0_CCBEN_bm 0x20 /* Compare or Capture B Enable bit mask. */ -#define TC0_CCBEN_bp 5 /* Compare or Capture B Enable bit position. */ - -#define TC0_CCAEN_bm 0x10 /* Compare or Capture A Enable bit mask. */ -#define TC0_CCAEN_bp 4 /* Compare or Capture A Enable bit position. */ - -#define TC0_WGMODE_gm 0x07 /* Waveform generation mode group mask. */ -#define TC0_WGMODE_gp 0 /* Waveform generation mode group position. */ -#define TC0_WGMODE0_bm (1<<0) /* Waveform generation mode bit 0 mask. */ -#define TC0_WGMODE0_bp 0 /* Waveform generation mode bit 0 position. */ -#define TC0_WGMODE1_bm (1<<1) /* Waveform generation mode bit 1 mask. */ -#define TC0_WGMODE1_bp 1 /* Waveform generation mode bit 1 position. */ -#define TC0_WGMODE2_bm (1<<2) /* Waveform generation mode bit 2 mask. */ -#define TC0_WGMODE2_bp 2 /* Waveform generation mode bit 2 position. */ - - -/* TC0.CTRLC bit masks and bit positions */ -#define TC0_CMPD_bm 0x08 /* Compare D Output Value bit mask. */ -#define TC0_CMPD_bp 3 /* Compare D Output Value bit position. */ - -#define TC0_CMPC_bm 0x04 /* Compare C Output Value bit mask. */ -#define TC0_CMPC_bp 2 /* Compare C Output Value bit position. */ - -#define TC0_CMPB_bm 0x02 /* Compare B Output Value bit mask. */ -#define TC0_CMPB_bp 1 /* Compare B Output Value bit position. */ - -#define TC0_CMPA_bm 0x01 /* Compare A Output Value bit mask. */ -#define TC0_CMPA_bp 0 /* Compare A Output Value bit position. */ - - -/* TC0.CTRLD bit masks and bit positions */ -#define TC0_EVACT_gm 0xE0 /* Event Action group mask. */ -#define TC0_EVACT_gp 5 /* Event Action group position. */ -#define TC0_EVACT0_bm (1<<5) /* Event Action bit 0 mask. */ -#define TC0_EVACT0_bp 5 /* Event Action bit 0 position. */ -#define TC0_EVACT1_bm (1<<6) /* Event Action bit 1 mask. */ -#define TC0_EVACT1_bp 6 /* Event Action bit 1 position. */ -#define TC0_EVACT2_bm (1<<7) /* Event Action bit 2 mask. */ -#define TC0_EVACT2_bp 7 /* Event Action bit 2 position. */ - -#define TC0_EVDLY_bm 0x10 /* Event Delay bit mask. */ -#define TC0_EVDLY_bp 4 /* Event Delay bit position. */ - -#define TC0_EVSEL_gm 0x0F /* Event Source Select group mask. */ -#define TC0_EVSEL_gp 0 /* Event Source Select group position. */ -#define TC0_EVSEL0_bm (1<<0) /* Event Source Select bit 0 mask. */ -#define TC0_EVSEL0_bp 0 /* Event Source Select bit 0 position. */ -#define TC0_EVSEL1_bm (1<<1) /* Event Source Select bit 1 mask. */ -#define TC0_EVSEL1_bp 1 /* Event Source Select bit 1 position. */ -#define TC0_EVSEL2_bm (1<<2) /* Event Source Select bit 2 mask. */ -#define TC0_EVSEL2_bp 2 /* Event Source Select bit 2 position. */ -#define TC0_EVSEL3_bm (1<<3) /* Event Source Select bit 3 mask. */ -#define TC0_EVSEL3_bp 3 /* Event Source Select bit 3 position. */ - - -/* TC0.CTRLE bit masks and bit positions */ -#define TC0_DTHM_bm 0x02 /* Dead Time Hold Mode bit mask. */ -#define TC0_DTHM_bp 1 /* Dead Time Hold Mode bit position. */ - -#define TC0_BYTEM_bm 0x01 /* Byte Mode bit mask. */ -#define TC0_BYTEM_bp 0 /* Byte Mode bit position. */ - - -/* TC0.INTCTRLA bit masks and bit positions */ -#define TC0_ERRINTLVL_gm 0x0C /* Error Interrupt Level group mask. */ -#define TC0_ERRINTLVL_gp 2 /* Error Interrupt Level group position. */ -#define TC0_ERRINTLVL0_bm (1<<2) /* Error Interrupt Level bit 0 mask. */ -#define TC0_ERRINTLVL0_bp 2 /* Error Interrupt Level bit 0 position. */ -#define TC0_ERRINTLVL1_bm (1<<3) /* Error Interrupt Level bit 1 mask. */ -#define TC0_ERRINTLVL1_bp 3 /* Error Interrupt Level bit 1 position. */ - -#define TC0_OVFINTLVL_gm 0x03 /* Overflow interrupt level group mask. */ -#define TC0_OVFINTLVL_gp 0 /* Overflow interrupt level group position. */ -#define TC0_OVFINTLVL0_bm (1<<0) /* Overflow interrupt level bit 0 mask. */ -#define TC0_OVFINTLVL0_bp 0 /* Overflow interrupt level bit 0 position. */ -#define TC0_OVFINTLVL1_bm (1<<1) /* Overflow interrupt level bit 1 mask. */ -#define TC0_OVFINTLVL1_bp 1 /* Overflow interrupt level bit 1 position. */ - - -/* TC0.INTCTRLB bit masks and bit positions */ -#define TC0_CCDINTLVL_gm 0xC0 /* Compare or Capture D Interrupt Level group mask. */ -#define TC0_CCDINTLVL_gp 6 /* Compare or Capture D Interrupt Level group position. */ -#define TC0_CCDINTLVL0_bm (1<<6) /* Compare or Capture D Interrupt Level bit 0 mask. */ -#define TC0_CCDINTLVL0_bp 6 /* Compare or Capture D Interrupt Level bit 0 position. */ -#define TC0_CCDINTLVL1_bm (1<<7) /* Compare or Capture D Interrupt Level bit 1 mask. */ -#define TC0_CCDINTLVL1_bp 7 /* Compare or Capture D Interrupt Level bit 1 position. */ - -#define TC0_CCCINTLVL_gm 0x30 /* Compare or Capture C Interrupt Level group mask. */ -#define TC0_CCCINTLVL_gp 4 /* Compare or Capture C Interrupt Level group position. */ -#define TC0_CCCINTLVL0_bm (1<<4) /* Compare or Capture C Interrupt Level bit 0 mask. */ -#define TC0_CCCINTLVL0_bp 4 /* Compare or Capture C Interrupt Level bit 0 position. */ -#define TC0_CCCINTLVL1_bm (1<<5) /* Compare or Capture C Interrupt Level bit 1 mask. */ -#define TC0_CCCINTLVL1_bp 5 /* Compare or Capture C Interrupt Level bit 1 position. */ - -#define TC0_CCBINTLVL_gm 0x0C /* Compare or Capture B Interrupt Level group mask. */ -#define TC0_CCBINTLVL_gp 2 /* Compare or Capture B Interrupt Level group position. */ -#define TC0_CCBINTLVL0_bm (1<<2) /* Compare or Capture B Interrupt Level bit 0 mask. */ -#define TC0_CCBINTLVL0_bp 2 /* Compare or Capture B Interrupt Level bit 0 position. */ -#define TC0_CCBINTLVL1_bm (1<<3) /* Compare or Capture B Interrupt Level bit 1 mask. */ -#define TC0_CCBINTLVL1_bp 3 /* Compare or Capture B Interrupt Level bit 1 position. */ - -#define TC0_CCAINTLVL_gm 0x03 /* Compare or Capture A Interrupt Level group mask. */ -#define TC0_CCAINTLVL_gp 0 /* Compare or Capture A Interrupt Level group position. */ -#define TC0_CCAINTLVL0_bm (1<<0) /* Compare or Capture A Interrupt Level bit 0 mask. */ -#define TC0_CCAINTLVL0_bp 0 /* Compare or Capture A Interrupt Level bit 0 position. */ -#define TC0_CCAINTLVL1_bm (1<<1) /* Compare or Capture A Interrupt Level bit 1 mask. */ -#define TC0_CCAINTLVL1_bp 1 /* Compare or Capture A Interrupt Level bit 1 position. */ - - -/* TC0.CTRLFCLR bit masks and bit positions */ -#define TC0_CMD_gm 0x0C /* Command group mask. */ -#define TC0_CMD_gp 2 /* Command group position. */ -#define TC0_CMD0_bm (1<<2) /* Command bit 0 mask. */ -#define TC0_CMD0_bp 2 /* Command bit 0 position. */ -#define TC0_CMD1_bm (1<<3) /* Command bit 1 mask. */ -#define TC0_CMD1_bp 3 /* Command bit 1 position. */ - -#define TC0_LUPD_bm 0x02 /* Lock Update bit mask. */ -#define TC0_LUPD_bp 1 /* Lock Update bit position. */ - -#define TC0_DIR_bm 0x01 /* Direction bit mask. */ -#define TC0_DIR_bp 0 /* Direction bit position. */ - - -/* TC0.CTRLFSET bit masks and bit positions */ -/* TC0_CMD_gm Predefined. */ -/* TC0_CMD_gp Predefined. */ -/* TC0_CMD0_bm Predefined. */ -/* TC0_CMD0_bp Predefined. */ -/* TC0_CMD1_bm Predefined. */ -/* TC0_CMD1_bp Predefined. */ - -/* TC0_LUPD_bm Predefined. */ -/* TC0_LUPD_bp Predefined. */ - -/* TC0_DIR_bm Predefined. */ -/* TC0_DIR_bp Predefined. */ - - -/* TC0.CTRLGCLR bit masks and bit positions */ -#define TC0_CCDBV_bm 0x10 /* Compare or Capture D Buffer Valid bit mask. */ -#define TC0_CCDBV_bp 4 /* Compare or Capture D Buffer Valid bit position. */ - -#define TC0_CCCBV_bm 0x08 /* Compare or Capture C Buffer Valid bit mask. */ -#define TC0_CCCBV_bp 3 /* Compare or Capture C Buffer Valid bit position. */ - -#define TC0_CCBBV_bm 0x04 /* Compare or Capture B Buffer Valid bit mask. */ -#define TC0_CCBBV_bp 2 /* Compare or Capture B Buffer Valid bit position. */ - -#define TC0_CCABV_bm 0x02 /* Compare or Capture A Buffer Valid bit mask. */ -#define TC0_CCABV_bp 1 /* Compare or Capture A Buffer Valid bit position. */ - -#define TC0_PERBV_bm 0x01 /* Period Buffer Valid bit mask. */ -#define TC0_PERBV_bp 0 /* Period Buffer Valid bit position. */ - - -/* TC0.CTRLGSET bit masks and bit positions */ -/* TC0_CCDBV_bm Predefined. */ -/* TC0_CCDBV_bp Predefined. */ - -/* TC0_CCCBV_bm Predefined. */ -/* TC0_CCCBV_bp Predefined. */ - -/* TC0_CCBBV_bm Predefined. */ -/* TC0_CCBBV_bp Predefined. */ - -/* TC0_CCABV_bm Predefined. */ -/* TC0_CCABV_bp Predefined. */ - -/* TC0_PERBV_bm Predefined. */ -/* TC0_PERBV_bp Predefined. */ - - -/* TC0.INTFLAGS bit masks and bit positions */ -#define TC0_CCDIF_bm 0x80 /* Compare or Capture D Interrupt Flag bit mask. */ -#define TC0_CCDIF_bp 7 /* Compare or Capture D Interrupt Flag bit position. */ - -#define TC0_CCCIF_bm 0x40 /* Compare or Capture C Interrupt Flag bit mask. */ -#define TC0_CCCIF_bp 6 /* Compare or Capture C Interrupt Flag bit position. */ - -#define TC0_CCBIF_bm 0x20 /* Compare or Capture B Interrupt Flag bit mask. */ -#define TC0_CCBIF_bp 5 /* Compare or Capture B Interrupt Flag bit position. */ - -#define TC0_CCAIF_bm 0x10 /* Compare or Capture A Interrupt Flag bit mask. */ -#define TC0_CCAIF_bp 4 /* Compare or Capture A Interrupt Flag bit position. */ - -#define TC0_ERRIF_bm 0x02 /* Error Interrupt Flag bit mask. */ -#define TC0_ERRIF_bp 1 /* Error Interrupt Flag bit position. */ - -#define TC0_OVFIF_bm 0x01 /* Overflow Interrupt Flag bit mask. */ -#define TC0_OVFIF_bp 0 /* Overflow Interrupt Flag bit position. */ - - -/* TC1.CTRLA bit masks and bit positions */ -#define TC1_CLKSEL_gm 0x0F /* Clock Selection group mask. */ -#define TC1_CLKSEL_gp 0 /* Clock Selection group position. */ -#define TC1_CLKSEL0_bm (1<<0) /* Clock Selection bit 0 mask. */ -#define TC1_CLKSEL0_bp 0 /* Clock Selection bit 0 position. */ -#define TC1_CLKSEL1_bm (1<<1) /* Clock Selection bit 1 mask. */ -#define TC1_CLKSEL1_bp 1 /* Clock Selection bit 1 position. */ -#define TC1_CLKSEL2_bm (1<<2) /* Clock Selection bit 2 mask. */ -#define TC1_CLKSEL2_bp 2 /* Clock Selection bit 2 position. */ -#define TC1_CLKSEL3_bm (1<<3) /* Clock Selection bit 3 mask. */ -#define TC1_CLKSEL3_bp 3 /* Clock Selection bit 3 position. */ - - -/* TC1.CTRLB bit masks and bit positions */ -#define TC1_CCBEN_bm 0x20 /* Compare or Capture B Enable bit mask. */ -#define TC1_CCBEN_bp 5 /* Compare or Capture B Enable bit position. */ - -#define TC1_CCAEN_bm 0x10 /* Compare or Capture A Enable bit mask. */ -#define TC1_CCAEN_bp 4 /* Compare or Capture A Enable bit position. */ - -#define TC1_WGMODE_gm 0x07 /* Waveform generation mode group mask. */ -#define TC1_WGMODE_gp 0 /* Waveform generation mode group position. */ -#define TC1_WGMODE0_bm (1<<0) /* Waveform generation mode bit 0 mask. */ -#define TC1_WGMODE0_bp 0 /* Waveform generation mode bit 0 position. */ -#define TC1_WGMODE1_bm (1<<1) /* Waveform generation mode bit 1 mask. */ -#define TC1_WGMODE1_bp 1 /* Waveform generation mode bit 1 position. */ -#define TC1_WGMODE2_bm (1<<2) /* Waveform generation mode bit 2 mask. */ -#define TC1_WGMODE2_bp 2 /* Waveform generation mode bit 2 position. */ - - -/* TC1.CTRLC bit masks and bit positions */ -#define TC1_CMPB_bm 0x02 /* Compare B Output Value bit mask. */ -#define TC1_CMPB_bp 1 /* Compare B Output Value bit position. */ - -#define TC1_CMPA_bm 0x01 /* Compare A Output Value bit mask. */ -#define TC1_CMPA_bp 0 /* Compare A Output Value bit position. */ - - -/* TC1.CTRLD bit masks and bit positions */ -#define TC1_EVACT_gm 0xE0 /* Event Action group mask. */ -#define TC1_EVACT_gp 5 /* Event Action group position. */ -#define TC1_EVACT0_bm (1<<5) /* Event Action bit 0 mask. */ -#define TC1_EVACT0_bp 5 /* Event Action bit 0 position. */ -#define TC1_EVACT1_bm (1<<6) /* Event Action bit 1 mask. */ -#define TC1_EVACT1_bp 6 /* Event Action bit 1 position. */ -#define TC1_EVACT2_bm (1<<7) /* Event Action bit 2 mask. */ -#define TC1_EVACT2_bp 7 /* Event Action bit 2 position. */ - -#define TC1_EVDLY_bm 0x10 /* Event Delay bit mask. */ -#define TC1_EVDLY_bp 4 /* Event Delay bit position. */ - -#define TC1_EVSEL_gm 0x0F /* Event Source Select group mask. */ -#define TC1_EVSEL_gp 0 /* Event Source Select group position. */ -#define TC1_EVSEL0_bm (1<<0) /* Event Source Select bit 0 mask. */ -#define TC1_EVSEL0_bp 0 /* Event Source Select bit 0 position. */ -#define TC1_EVSEL1_bm (1<<1) /* Event Source Select bit 1 mask. */ -#define TC1_EVSEL1_bp 1 /* Event Source Select bit 1 position. */ -#define TC1_EVSEL2_bm (1<<2) /* Event Source Select bit 2 mask. */ -#define TC1_EVSEL2_bp 2 /* Event Source Select bit 2 position. */ -#define TC1_EVSEL3_bm (1<<3) /* Event Source Select bit 3 mask. */ -#define TC1_EVSEL3_bp 3 /* Event Source Select bit 3 position. */ - - -/* TC1.CTRLE bit masks and bit positions */ -#define TC1_DTHM_bm 0x02 /* Dead Time Hold Mode bit mask. */ -#define TC1_DTHM_bp 1 /* Dead Time Hold Mode bit position. */ - -#define TC1_BYTEM_bm 0x01 /* Byte Mode bit mask. */ -#define TC1_BYTEM_bp 0 /* Byte Mode bit position. */ - - -/* TC1.INTCTRLA bit masks and bit positions */ -#define TC1_ERRINTLVL_gm 0x0C /* Error Interrupt Level group mask. */ -#define TC1_ERRINTLVL_gp 2 /* Error Interrupt Level group position. */ -#define TC1_ERRINTLVL0_bm (1<<2) /* Error Interrupt Level bit 0 mask. */ -#define TC1_ERRINTLVL0_bp 2 /* Error Interrupt Level bit 0 position. */ -#define TC1_ERRINTLVL1_bm (1<<3) /* Error Interrupt Level bit 1 mask. */ -#define TC1_ERRINTLVL1_bp 3 /* Error Interrupt Level bit 1 position. */ - -#define TC1_OVFINTLVL_gm 0x03 /* Overflow interrupt level group mask. */ -#define TC1_OVFINTLVL_gp 0 /* Overflow interrupt level group position. */ -#define TC1_OVFINTLVL0_bm (1<<0) /* Overflow interrupt level bit 0 mask. */ -#define TC1_OVFINTLVL0_bp 0 /* Overflow interrupt level bit 0 position. */ -#define TC1_OVFINTLVL1_bm (1<<1) /* Overflow interrupt level bit 1 mask. */ -#define TC1_OVFINTLVL1_bp 1 /* Overflow interrupt level bit 1 position. */ - - -/* TC1.INTCTRLB bit masks and bit positions */ -#define TC1_CCBINTLVL_gm 0x0C /* Compare or Capture B Interrupt Level group mask. */ -#define TC1_CCBINTLVL_gp 2 /* Compare or Capture B Interrupt Level group position. */ -#define TC1_CCBINTLVL0_bm (1<<2) /* Compare or Capture B Interrupt Level bit 0 mask. */ -#define TC1_CCBINTLVL0_bp 2 /* Compare or Capture B Interrupt Level bit 0 position. */ -#define TC1_CCBINTLVL1_bm (1<<3) /* Compare or Capture B Interrupt Level bit 1 mask. */ -#define TC1_CCBINTLVL1_bp 3 /* Compare or Capture B Interrupt Level bit 1 position. */ - -#define TC1_CCAINTLVL_gm 0x03 /* Compare or Capture A Interrupt Level group mask. */ -#define TC1_CCAINTLVL_gp 0 /* Compare or Capture A Interrupt Level group position. */ -#define TC1_CCAINTLVL0_bm (1<<0) /* Compare or Capture A Interrupt Level bit 0 mask. */ -#define TC1_CCAINTLVL0_bp 0 /* Compare or Capture A Interrupt Level bit 0 position. */ -#define TC1_CCAINTLVL1_bm (1<<1) /* Compare or Capture A Interrupt Level bit 1 mask. */ -#define TC1_CCAINTLVL1_bp 1 /* Compare or Capture A Interrupt Level bit 1 position. */ - - -/* TC1.CTRLFCLR bit masks and bit positions */ -#define TC1_CMD_gm 0x0C /* Command group mask. */ -#define TC1_CMD_gp 2 /* Command group position. */ -#define TC1_CMD0_bm (1<<2) /* Command bit 0 mask. */ -#define TC1_CMD0_bp 2 /* Command bit 0 position. */ -#define TC1_CMD1_bm (1<<3) /* Command bit 1 mask. */ -#define TC1_CMD1_bp 3 /* Command bit 1 position. */ - -#define TC1_LUPD_bm 0x02 /* Lock Update bit mask. */ -#define TC1_LUPD_bp 1 /* Lock Update bit position. */ - -#define TC1_DIR_bm 0x01 /* Direction bit mask. */ -#define TC1_DIR_bp 0 /* Direction bit position. */ - - -/* TC1.CTRLFSET bit masks and bit positions */ -/* TC1_CMD_gm Predefined. */ -/* TC1_CMD_gp Predefined. */ -/* TC1_CMD0_bm Predefined. */ -/* TC1_CMD0_bp Predefined. */ -/* TC1_CMD1_bm Predefined. */ -/* TC1_CMD1_bp Predefined. */ - -/* TC1_LUPD_bm Predefined. */ -/* TC1_LUPD_bp Predefined. */ - -/* TC1_DIR_bm Predefined. */ -/* TC1_DIR_bp Predefined. */ - - -/* TC1.CTRLGCLR bit masks and bit positions */ -#define TC1_CCBBV_bm 0x04 /* Compare or Capture B Buffer Valid bit mask. */ -#define TC1_CCBBV_bp 2 /* Compare or Capture B Buffer Valid bit position. */ - -#define TC1_CCABV_bm 0x02 /* Compare or Capture A Buffer Valid bit mask. */ -#define TC1_CCABV_bp 1 /* Compare or Capture A Buffer Valid bit position. */ - -#define TC1_PERBV_bm 0x01 /* Period Buffer Valid bit mask. */ -#define TC1_PERBV_bp 0 /* Period Buffer Valid bit position. */ - - -/* TC1.CTRLGSET bit masks and bit positions */ -/* TC1_CCBBV_bm Predefined. */ -/* TC1_CCBBV_bp Predefined. */ - -/* TC1_CCABV_bm Predefined. */ -/* TC1_CCABV_bp Predefined. */ - -/* TC1_PERBV_bm Predefined. */ -/* TC1_PERBV_bp Predefined. */ - - -/* TC1.INTFLAGS bit masks and bit positions */ -#define TC1_CCBIF_bm 0x20 /* Compare or Capture B Interrupt Flag bit mask. */ -#define TC1_CCBIF_bp 5 /* Compare or Capture B Interrupt Flag bit position. */ - -#define TC1_CCAIF_bm 0x10 /* Compare or Capture A Interrupt Flag bit mask. */ -#define TC1_CCAIF_bp 4 /* Compare or Capture A Interrupt Flag bit position. */ - -#define TC1_ERRIF_bm 0x02 /* Error Interrupt Flag bit mask. */ -#define TC1_ERRIF_bp 1 /* Error Interrupt Flag bit position. */ - -#define TC1_OVFIF_bm 0x01 /* Overflow Interrupt Flag bit mask. */ -#define TC1_OVFIF_bp 0 /* Overflow Interrupt Flag bit position. */ - - -/* AWEX.CTRL bit masks and bit positions */ -#define AWEX_PGM_bm 0x20 /* Pattern Generation Mode bit mask. */ -#define AWEX_PGM_bp 5 /* Pattern Generation Mode bit position. */ - -#define AWEX_CWCM_bm 0x10 /* Common Waveform Channel Mode bit mask. */ -#define AWEX_CWCM_bp 4 /* Common Waveform Channel Mode bit position. */ - -#define AWEX_DTICCDEN_bm 0x08 /* Dead Time Insertion Compare Channel D Enable bit mask. */ -#define AWEX_DTICCDEN_bp 3 /* Dead Time Insertion Compare Channel D Enable bit position. */ - -#define AWEX_DTICCCEN_bm 0x04 /* Dead Time Insertion Compare Channel C Enable bit mask. */ -#define AWEX_DTICCCEN_bp 2 /* Dead Time Insertion Compare Channel C Enable bit position. */ - -#define AWEX_DTICCBEN_bm 0x02 /* Dead Time Insertion Compare Channel B Enable bit mask. */ -#define AWEX_DTICCBEN_bp 1 /* Dead Time Insertion Compare Channel B Enable bit position. */ - -#define AWEX_DTICCAEN_bm 0x01 /* Dead Time Insertion Compare Channel A Enable bit mask. */ -#define AWEX_DTICCAEN_bp 0 /* Dead Time Insertion Compare Channel A Enable bit position. */ - - -/* AWEX.FDCTRL bit masks and bit positions */ -#define AWEX_FDDBD_bm 0x10 /* Fault Detect on Disable Break Disable bit mask. */ -#define AWEX_FDDBD_bp 4 /* Fault Detect on Disable Break Disable bit position. */ - -#define AWEX_FDMODE_bm 0x04 /* Fault Detect Mode bit mask. */ -#define AWEX_FDMODE_bp 2 /* Fault Detect Mode bit position. */ - -#define AWEX_FDACT_gm 0x03 /* Fault Detect Action group mask. */ -#define AWEX_FDACT_gp 0 /* Fault Detect Action group position. */ -#define AWEX_FDACT0_bm (1<<0) /* Fault Detect Action bit 0 mask. */ -#define AWEX_FDACT0_bp 0 /* Fault Detect Action bit 0 position. */ -#define AWEX_FDACT1_bm (1<<1) /* Fault Detect Action bit 1 mask. */ -#define AWEX_FDACT1_bp 1 /* Fault Detect Action bit 1 position. */ - - -/* AWEX.STATUS bit masks and bit positions */ -#define AWEX_FDF_bm 0x04 /* Fault Detect Flag bit mask. */ -#define AWEX_FDF_bp 2 /* Fault Detect Flag bit position. */ - -#define AWEX_DTHSBUFV_bm 0x02 /* Dead Time High Side Buffer Valid bit mask. */ -#define AWEX_DTHSBUFV_bp 1 /* Dead Time High Side Buffer Valid bit position. */ - -#define AWEX_DTLSBUFV_bm 0x01 /* Dead Time Low Side Buffer Valid bit mask. */ -#define AWEX_DTLSBUFV_bp 0 /* Dead Time Low Side Buffer Valid bit position. */ - - -/* HIRES.CTRL bit masks and bit positions */ -#define HIRES_HREN_gm 0x03 /* High Resolution Enable group mask. */ -#define HIRES_HREN_gp 0 /* High Resolution Enable group position. */ -#define HIRES_HREN0_bm (1<<0) /* High Resolution Enable bit 0 mask. */ -#define HIRES_HREN0_bp 0 /* High Resolution Enable bit 0 position. */ -#define HIRES_HREN1_bm (1<<1) /* High Resolution Enable bit 1 mask. */ -#define HIRES_HREN1_bp 1 /* High Resolution Enable bit 1 position. */ - - -/* USART - Universal Asynchronous Receiver-Transmitter */ -/* USART.STATUS bit masks and bit positions */ -#define USART_RXCIF_bm 0x80 /* Receive Interrupt Flag bit mask. */ -#define USART_RXCIF_bp 7 /* Receive Interrupt Flag bit position. */ - -#define USART_TXCIF_bm 0x40 /* Transmit Interrupt Flag bit mask. */ -#define USART_TXCIF_bp 6 /* Transmit Interrupt Flag bit position. */ - -#define USART_DREIF_bm 0x20 /* Data Register Empty Flag bit mask. */ -#define USART_DREIF_bp 5 /* Data Register Empty Flag bit position. */ - -#define USART_FERR_bm 0x10 /* Frame Error bit mask. */ -#define USART_FERR_bp 4 /* Frame Error bit position. */ - -#define USART_BUFOVF_bm 0x08 /* Buffer Overflow bit mask. */ -#define USART_BUFOVF_bp 3 /* Buffer Overflow bit position. */ - -#define USART_PERR_bm 0x04 /* Parity Error bit mask. */ -#define USART_PERR_bp 2 /* Parity Error bit position. */ - -#define USART_RXB8_bm 0x01 /* Receive Bit 8 bit mask. */ -#define USART_RXB8_bp 0 /* Receive Bit 8 bit position. */ - - -/* USART.CTRLA bit masks and bit positions */ -#define USART_RXCINTLVL_gm 0x30 /* Receive Interrupt Level group mask. */ -#define USART_RXCINTLVL_gp 4 /* Receive Interrupt Level group position. */ -#define USART_RXCINTLVL0_bm (1<<4) /* Receive Interrupt Level bit 0 mask. */ -#define USART_RXCINTLVL0_bp 4 /* Receive Interrupt Level bit 0 position. */ -#define USART_RXCINTLVL1_bm (1<<5) /* Receive Interrupt Level bit 1 mask. */ -#define USART_RXCINTLVL1_bp 5 /* Receive Interrupt Level bit 1 position. */ - -#define USART_TXCINTLVL_gm 0x0C /* Transmit Interrupt Level group mask. */ -#define USART_TXCINTLVL_gp 2 /* Transmit Interrupt Level group position. */ -#define USART_TXCINTLVL0_bm (1<<2) /* Transmit Interrupt Level bit 0 mask. */ -#define USART_TXCINTLVL0_bp 2 /* Transmit Interrupt Level bit 0 position. */ -#define USART_TXCINTLVL1_bm (1<<3) /* Transmit Interrupt Level bit 1 mask. */ -#define USART_TXCINTLVL1_bp 3 /* Transmit Interrupt Level bit 1 position. */ - -#define USART_DREINTLVL_gm 0x03 /* Data Register Empty Interrupt Level group mask. */ -#define USART_DREINTLVL_gp 0 /* Data Register Empty Interrupt Level group position. */ -#define USART_DREINTLVL0_bm (1<<0) /* Data Register Empty Interrupt Level bit 0 mask. */ -#define USART_DREINTLVL0_bp 0 /* Data Register Empty Interrupt Level bit 0 position. */ -#define USART_DREINTLVL1_bm (1<<1) /* Data Register Empty Interrupt Level bit 1 mask. */ -#define USART_DREINTLVL1_bp 1 /* Data Register Empty Interrupt Level bit 1 position. */ - - -/* USART.CTRLB bit masks and bit positions */ -#define USART_RXEN_bm 0x10 /* Receiver Enable bit mask. */ -#define USART_RXEN_bp 4 /* Receiver Enable bit position. */ - -#define USART_TXEN_bm 0x08 /* Transmitter Enable bit mask. */ -#define USART_TXEN_bp 3 /* Transmitter Enable bit position. */ - -#define USART_CLK2X_bm 0x04 /* Double transmission speed bit mask. */ -#define USART_CLK2X_bp 2 /* Double transmission speed bit position. */ - -#define USART_MPCM_bm 0x02 /* Multi-processor Communication Mode bit mask. */ -#define USART_MPCM_bp 1 /* Multi-processor Communication Mode bit position. */ - -#define USART_TXB8_bm 0x01 /* Transmit bit 8 bit mask. */ -#define USART_TXB8_bp 0 /* Transmit bit 8 bit position. */ - - -/* USART.CTRLC bit masks and bit positions */ -#define USART_CMODE_gm 0xC0 /* Communication Mode group mask. */ -#define USART_CMODE_gp 6 /* Communication Mode group position. */ -#define USART_CMODE0_bm (1<<6) /* Communication Mode bit 0 mask. */ -#define USART_CMODE0_bp 6 /* Communication Mode bit 0 position. */ -#define USART_CMODE1_bm (1<<7) /* Communication Mode bit 1 mask. */ -#define USART_CMODE1_bp 7 /* Communication Mode bit 1 position. */ - -#define USART_PMODE_gm 0x30 /* Parity Mode group mask. */ -#define USART_PMODE_gp 4 /* Parity Mode group position. */ -#define USART_PMODE0_bm (1<<4) /* Parity Mode bit 0 mask. */ -#define USART_PMODE0_bp 4 /* Parity Mode bit 0 position. */ -#define USART_PMODE1_bm (1<<5) /* Parity Mode bit 1 mask. */ -#define USART_PMODE1_bp 5 /* Parity Mode bit 1 position. */ - -#define USART_SBMODE_bm 0x08 /* Stop Bit Mode bit mask. */ -#define USART_SBMODE_bp 3 /* Stop Bit Mode bit position. */ - -#define USART_CHSIZE_gm 0x07 /* Character Size group mask. */ -#define USART_CHSIZE_gp 0 /* Character Size group position. */ -#define USART_CHSIZE0_bm (1<<0) /* Character Size bit 0 mask. */ -#define USART_CHSIZE0_bp 0 /* Character Size bit 0 position. */ -#define USART_CHSIZE1_bm (1<<1) /* Character Size bit 1 mask. */ -#define USART_CHSIZE1_bp 1 /* Character Size bit 1 position. */ -#define USART_CHSIZE2_bm (1<<2) /* Character Size bit 2 mask. */ -#define USART_CHSIZE2_bp 2 /* Character Size bit 2 position. */ - - -/* USART.BAUDCTRLA bit masks and bit positions */ -#define USART_BSEL_gm 0xFF /* Baud Rate Selection Bits [7:0] group mask. */ -#define USART_BSEL_gp 0 /* Baud Rate Selection Bits [7:0] group position. */ -#define USART_BSEL0_bm (1<<0) /* Baud Rate Selection Bits [7:0] bit 0 mask. */ -#define USART_BSEL0_bp 0 /* Baud Rate Selection Bits [7:0] bit 0 position. */ -#define USART_BSEL1_bm (1<<1) /* Baud Rate Selection Bits [7:0] bit 1 mask. */ -#define USART_BSEL1_bp 1 /* Baud Rate Selection Bits [7:0] bit 1 position. */ -#define USART_BSEL2_bm (1<<2) /* Baud Rate Selection Bits [7:0] bit 2 mask. */ -#define USART_BSEL2_bp 2 /* Baud Rate Selection Bits [7:0] bit 2 position. */ -#define USART_BSEL3_bm (1<<3) /* Baud Rate Selection Bits [7:0] bit 3 mask. */ -#define USART_BSEL3_bp 3 /* Baud Rate Selection Bits [7:0] bit 3 position. */ -#define USART_BSEL4_bm (1<<4) /* Baud Rate Selection Bits [7:0] bit 4 mask. */ -#define USART_BSEL4_bp 4 /* Baud Rate Selection Bits [7:0] bit 4 position. */ -#define USART_BSEL5_bm (1<<5) /* Baud Rate Selection Bits [7:0] bit 5 mask. */ -#define USART_BSEL5_bp 5 /* Baud Rate Selection Bits [7:0] bit 5 position. */ -#define USART_BSEL6_bm (1<<6) /* Baud Rate Selection Bits [7:0] bit 6 mask. */ -#define USART_BSEL6_bp 6 /* Baud Rate Selection Bits [7:0] bit 6 position. */ -#define USART_BSEL7_bm (1<<7) /* Baud Rate Selection Bits [7:0] bit 7 mask. */ -#define USART_BSEL7_bp 7 /* Baud Rate Selection Bits [7:0] bit 7 position. */ - - -/* USART.BAUDCTRLB bit masks and bit positions */ -#define USART_BSCALE_gm 0xF0 /* Baud Rate Scale group mask. */ -#define USART_BSCALE_gp 4 /* Baud Rate Scale group position. */ -#define USART_BSCALE0_bm (1<<4) /* Baud Rate Scale bit 0 mask. */ -#define USART_BSCALE0_bp 4 /* Baud Rate Scale bit 0 position. */ -#define USART_BSCALE1_bm (1<<5) /* Baud Rate Scale bit 1 mask. */ -#define USART_BSCALE1_bp 5 /* Baud Rate Scale bit 1 position. */ -#define USART_BSCALE2_bm (1<<6) /* Baud Rate Scale bit 2 mask. */ -#define USART_BSCALE2_bp 6 /* Baud Rate Scale bit 2 position. */ -#define USART_BSCALE3_bm (1<<7) /* Baud Rate Scale bit 3 mask. */ -#define USART_BSCALE3_bp 7 /* Baud Rate Scale bit 3 position. */ - -/* USART_BSEL_gm Predefined. */ -/* USART_BSEL_gp Predefined. */ -/* USART_BSEL0_bm Predefined. */ -/* USART_BSEL0_bp Predefined. */ -/* USART_BSEL1_bm Predefined. */ -/* USART_BSEL1_bp Predefined. */ -/* USART_BSEL2_bm Predefined. */ -/* USART_BSEL2_bp Predefined. */ -/* USART_BSEL3_bm Predefined. */ -/* USART_BSEL3_bp Predefined. */ - - -/* SPI - Serial Peripheral Interface */ -/* SPI.CTRL bit masks and bit positions */ -#define SPI_CLK2X_bm 0x80 /* Enable Double Speed bit mask. */ -#define SPI_CLK2X_bp 7 /* Enable Double Speed bit position. */ - -#define SPI_ENABLE_bm 0x40 /* Enable Module bit mask. */ -#define SPI_ENABLE_bp 6 /* Enable Module bit position. */ - -#define SPI_DORD_bm 0x20 /* Data Order Setting bit mask. */ -#define SPI_DORD_bp 5 /* Data Order Setting bit position. */ - -#define SPI_MASTER_bm 0x10 /* Master Operation Enable bit mask. */ -#define SPI_MASTER_bp 4 /* Master Operation Enable bit position. */ - -#define SPI_MODE_gm 0x0C /* SPI Mode group mask. */ -#define SPI_MODE_gp 2 /* SPI Mode group position. */ -#define SPI_MODE0_bm (1<<2) /* SPI Mode bit 0 mask. */ -#define SPI_MODE0_bp 2 /* SPI Mode bit 0 position. */ -#define SPI_MODE1_bm (1<<3) /* SPI Mode bit 1 mask. */ -#define SPI_MODE1_bp 3 /* SPI Mode bit 1 position. */ - -#define SPI_PRESCALER_gm 0x03 /* Prescaler group mask. */ -#define SPI_PRESCALER_gp 0 /* Prescaler group position. */ -#define SPI_PRESCALER0_bm (1<<0) /* Prescaler bit 0 mask. */ -#define SPI_PRESCALER0_bp 0 /* Prescaler bit 0 position. */ -#define SPI_PRESCALER1_bm (1<<1) /* Prescaler bit 1 mask. */ -#define SPI_PRESCALER1_bp 1 /* Prescaler bit 1 position. */ - - -/* SPI.INTCTRL bit masks and bit positions */ -#define SPI_INTLVL_gm 0x03 /* Interrupt level group mask. */ -#define SPI_INTLVL_gp 0 /* Interrupt level group position. */ -#define SPI_INTLVL0_bm (1<<0) /* Interrupt level bit 0 mask. */ -#define SPI_INTLVL0_bp 0 /* Interrupt level bit 0 position. */ -#define SPI_INTLVL1_bm (1<<1) /* Interrupt level bit 1 mask. */ -#define SPI_INTLVL1_bp 1 /* Interrupt level bit 1 position. */ - - -/* SPI.STATUS bit masks and bit positions */ -#define SPI_IF_bm 0x80 /* Interrupt Flag bit mask. */ -#define SPI_IF_bp 7 /* Interrupt Flag bit position. */ - -#define SPI_WRCOL_bm 0x40 /* Write Collision bit mask. */ -#define SPI_WRCOL_bp 6 /* Write Collision bit position. */ - - -/* IRCOM - IR Communication Module */ -/* IRCOM.CTRL bit masks and bit positions */ -#define IRCOM_EVSEL_gm 0x0F /* Event Channel Select group mask. */ -#define IRCOM_EVSEL_gp 0 /* Event Channel Select group position. */ -#define IRCOM_EVSEL0_bm (1<<0) /* Event Channel Select bit 0 mask. */ -#define IRCOM_EVSEL0_bp 0 /* Event Channel Select bit 0 position. */ -#define IRCOM_EVSEL1_bm (1<<1) /* Event Channel Select bit 1 mask. */ -#define IRCOM_EVSEL1_bp 1 /* Event Channel Select bit 1 position. */ -#define IRCOM_EVSEL2_bm (1<<2) /* Event Channel Select bit 2 mask. */ -#define IRCOM_EVSEL2_bp 2 /* Event Channel Select bit 2 position. */ -#define IRCOM_EVSEL3_bm (1<<3) /* Event Channel Select bit 3 mask. */ -#define IRCOM_EVSEL3_bp 3 /* Event Channel Select bit 3 position. */ - - -/* AES - AES Module */ -/* AES.CTRL bit masks and bit positions */ -#define AES_START_bm 0x80 /* Start/Run bit mask. */ -#define AES_START_bp 7 /* Start/Run bit position. */ - -#define AES_AUTO_bm 0x40 /* Auto Start Trigger bit mask. */ -#define AES_AUTO_bp 6 /* Auto Start Trigger bit position. */ - -#define AES_RESET_bm 0x20 /* AES Software Reset bit mask. */ -#define AES_RESET_bp 5 /* AES Software Reset bit position. */ - -#define AES_DECRYPT_bm 0x10 /* Decryption / Direction bit mask. */ -#define AES_DECRYPT_bp 4 /* Decryption / Direction bit position. */ - -#define AES_XOR_bm 0x04 /* State XOR Load Enable bit mask. */ -#define AES_XOR_bp 2 /* State XOR Load Enable bit position. */ - - -/* AES.STATUS bit masks and bit positions */ -#define AES_ERROR_bm 0x80 /* AES Error bit mask. */ -#define AES_ERROR_bp 7 /* AES Error bit position. */ - -#define AES_SRIF_bm 0x01 /* State Ready Interrupt Flag bit mask. */ -#define AES_SRIF_bp 0 /* State Ready Interrupt Flag bit position. */ - - -/* AES.INTCTRL bit masks and bit positions */ -#define AES_INTLVL_gm 0x03 /* Interrupt level group mask. */ -#define AES_INTLVL_gp 0 /* Interrupt level group position. */ -#define AES_INTLVL0_bm (1<<0) /* Interrupt level bit 0 mask. */ -#define AES_INTLVL0_bp 0 /* Interrupt level bit 0 position. */ -#define AES_INTLVL1_bm (1<<1) /* Interrupt level bit 1 mask. */ -#define AES_INTLVL1_bp 1 /* Interrupt level bit 1 position. */ - - - -// Generic Port Pins - -#define PIN0_bm 0x01 -#define PIN0_bp 0 -#define PIN1_bm 0x02 -#define PIN1_bp 1 -#define PIN2_bm 0x04 -#define PIN2_bp 2 -#define PIN3_bm 0x08 -#define PIN3_bp 3 -#define PIN4_bm 0x10 -#define PIN4_bp 4 -#define PIN5_bm 0x20 -#define PIN5_bp 5 -#define PIN6_bm 0x40 -#define PIN6_bp 6 -#define PIN7_bm 0x80 -#define PIN7_bp 7 - - -/* ========== Interrupt Vector Definitions ========== */ -/* Vector 0 is the reset vector */ - -/* OSC interrupt vectors */ -#define OSC_XOSCF_vect_num 1 -#define OSC_XOSCF_vect _VECTOR(1) /* External Oscillator Failure Interrupt (NMI) */ - -/* PORTC interrupt vectors */ -#define PORTC_INT0_vect_num 2 -#define PORTC_INT0_vect _VECTOR(2) /* External Interrupt 0 */ -#define PORTC_INT1_vect_num 3 -#define PORTC_INT1_vect _VECTOR(3) /* External Interrupt 1 */ - -/* PORTR interrupt vectors */ -#define PORTR_INT0_vect_num 4 -#define PORTR_INT0_vect _VECTOR(4) /* External Interrupt 0 */ -#define PORTR_INT1_vect_num 5 -#define PORTR_INT1_vect _VECTOR(5) /* External Interrupt 1 */ - -/* DMA interrupt vectors */ -#define DMA_CH0_vect_num 6 -#define DMA_CH0_vect _VECTOR(6) /* Channel 0 Interrupt */ -#define DMA_CH1_vect_num 7 -#define DMA_CH1_vect _VECTOR(7) /* Channel 1 Interrupt */ -#define DMA_CH2_vect_num 8 -#define DMA_CH2_vect _VECTOR(8) /* Channel 2 Interrupt */ -#define DMA_CH3_vect_num 9 -#define DMA_CH3_vect _VECTOR(9) /* Channel 3 Interrupt */ - -/* RTC interrupt vectors */ -#define RTC_OVF_vect_num 10 -#define RTC_OVF_vect _VECTOR(10) /* Overflow Interrupt */ -#define RTC_COMP_vect_num 11 -#define RTC_COMP_vect _VECTOR(11) /* Compare Interrupt */ - -/* TWIC interrupt vectors */ -#define TWIC_TWIS_vect_num 12 -#define TWIC_TWIS_vect _VECTOR(12) /* TWI Slave Interrupt */ -#define TWIC_TWIM_vect_num 13 -#define TWIC_TWIM_vect _VECTOR(13) /* TWI Master Interrupt */ - -/* TCC0 interrupt vectors */ -#define TCC0_OVF_vect_num 14 -#define TCC0_OVF_vect _VECTOR(14) /* Overflow Interrupt */ -#define TCC0_ERR_vect_num 15 -#define TCC0_ERR_vect _VECTOR(15) /* Error Interrupt */ -#define TCC0_CCA_vect_num 16 -#define TCC0_CCA_vect _VECTOR(16) /* Compare or Capture A Interrupt */ -#define TCC0_CCB_vect_num 17 -#define TCC0_CCB_vect _VECTOR(17) /* Compare or Capture B Interrupt */ -#define TCC0_CCC_vect_num 18 -#define TCC0_CCC_vect _VECTOR(18) /* Compare or Capture C Interrupt */ -#define TCC0_CCD_vect_num 19 -#define TCC0_CCD_vect _VECTOR(19) /* Compare or Capture D Interrupt */ - -/* TCC1 interrupt vectors */ -#define TCC1_OVF_vect_num 20 -#define TCC1_OVF_vect _VECTOR(20) /* Overflow Interrupt */ -#define TCC1_ERR_vect_num 21 -#define TCC1_ERR_vect _VECTOR(21) /* Error Interrupt */ -#define TCC1_CCA_vect_num 22 -#define TCC1_CCA_vect _VECTOR(22) /* Compare or Capture A Interrupt */ -#define TCC1_CCB_vect_num 23 -#define TCC1_CCB_vect _VECTOR(23) /* Compare or Capture B Interrupt */ - -/* SPIC interrupt vectors */ -#define SPIC_INT_vect_num 24 -#define SPIC_INT_vect _VECTOR(24) /* SPI Interrupt */ - -/* USARTC0 interrupt vectors */ -#define USARTC0_RXC_vect_num 25 -#define USARTC0_RXC_vect _VECTOR(25) /* Reception Complete Interrupt */ -#define USARTC0_DRE_vect_num 26 -#define USARTC0_DRE_vect _VECTOR(26) /* Data Register Empty Interrupt */ -#define USARTC0_TXC_vect_num 27 -#define USARTC0_TXC_vect _VECTOR(27) /* Transmission Complete Interrupt */ - -/* USARTC1 interrupt vectors */ -#define USARTC1_RXC_vect_num 28 -#define USARTC1_RXC_vect _VECTOR(28) /* Reception Complete Interrupt */ -#define USARTC1_DRE_vect_num 29 -#define USARTC1_DRE_vect _VECTOR(29) /* Data Register Empty Interrupt */ -#define USARTC1_TXC_vect_num 30 -#define USARTC1_TXC_vect _VECTOR(30) /* Transmission Complete Interrupt */ - -/* AES interrupt vectors */ -#define AES_INT_vect_num 31 -#define AES_INT_vect _VECTOR(31) /* AES Interrupt */ - -/* NVM interrupt vectors */ -#define NVM_EE_vect_num 32 -#define NVM_EE_vect _VECTOR(32) /* EE Interrupt */ -#define NVM_SPM_vect_num 33 -#define NVM_SPM_vect _VECTOR(33) /* SPM Interrupt */ - -/* PORTB interrupt vectors */ -#define PORTB_INT0_vect_num 34 -#define PORTB_INT0_vect _VECTOR(34) /* External Interrupt 0 */ -#define PORTB_INT1_vect_num 35 -#define PORTB_INT1_vect _VECTOR(35) /* External Interrupt 1 */ - -/* ACB interrupt vectors */ -#define ACB_AC0_vect_num 36 -#define ACB_AC0_vect _VECTOR(36) /* AC0 Interrupt */ -#define ACB_AC1_vect_num 37 -#define ACB_AC1_vect _VECTOR(37) /* AC1 Interrupt */ -#define ACB_ACW_vect_num 38 -#define ACB_ACW_vect _VECTOR(38) /* ACW Window Mode Interrupt */ - -/* ADCB interrupt vectors */ -#define ADCB_CH0_vect_num 39 -#define ADCB_CH0_vect _VECTOR(39) /* Interrupt 0 */ -#define ADCB_CH1_vect_num 40 -#define ADCB_CH1_vect _VECTOR(40) /* Interrupt 1 */ -#define ADCB_CH2_vect_num 41 -#define ADCB_CH2_vect _VECTOR(41) /* Interrupt 2 */ -#define ADCB_CH3_vect_num 42 -#define ADCB_CH3_vect _VECTOR(42) /* Interrupt 3 */ - -/* PORTE interrupt vectors */ -#define PORTE_INT0_vect_num 43 -#define PORTE_INT0_vect _VECTOR(43) /* External Interrupt 0 */ -#define PORTE_INT1_vect_num 44 -#define PORTE_INT1_vect _VECTOR(44) /* External Interrupt 1 */ - -/* TWIE interrupt vectors */ -#define TWIE_TWIS_vect_num 45 -#define TWIE_TWIS_vect _VECTOR(45) /* TWI Slave Interrupt */ -#define TWIE_TWIM_vect_num 46 -#define TWIE_TWIM_vect _VECTOR(46) /* TWI Master Interrupt */ - -/* TCE0 interrupt vectors */ -#define TCE0_OVF_vect_num 47 -#define TCE0_OVF_vect _VECTOR(47) /* Overflow Interrupt */ -#define TCE0_ERR_vect_num 48 -#define TCE0_ERR_vect _VECTOR(48) /* Error Interrupt */ -#define TCE0_CCA_vect_num 49 -#define TCE0_CCA_vect _VECTOR(49) /* Compare or Capture A Interrupt */ -#define TCE0_CCB_vect_num 50 -#define TCE0_CCB_vect _VECTOR(50) /* Compare or Capture B Interrupt */ -#define TCE0_CCC_vect_num 51 -#define TCE0_CCC_vect _VECTOR(51) /* Compare or Capture C Interrupt */ -#define TCE0_CCD_vect_num 52 -#define TCE0_CCD_vect _VECTOR(52) /* Compare or Capture D Interrupt */ - -/* TCE1 interrupt vectors */ -#define TCE1_OVF_vect_num 53 -#define TCE1_OVF_vect _VECTOR(53) /* Overflow Interrupt */ -#define TCE1_ERR_vect_num 54 -#define TCE1_ERR_vect _VECTOR(54) /* Error Interrupt */ -#define TCE1_CCA_vect_num 55 -#define TCE1_CCA_vect _VECTOR(55) /* Compare or Capture A Interrupt */ -#define TCE1_CCB_vect_num 56 -#define TCE1_CCB_vect _VECTOR(56) /* Compare or Capture B Interrupt */ - -/* SPIE interrupt vectors */ -#define SPIE_INT_vect_num 57 -#define SPIE_INT_vect _VECTOR(57) /* SPI Interrupt */ - -/* USARTE0 interrupt vectors */ -#define USARTE0_RXC_vect_num 58 -#define USARTE0_RXC_vect _VECTOR(58) /* Reception Complete Interrupt */ -#define USARTE0_DRE_vect_num 59 -#define USARTE0_DRE_vect _VECTOR(59) /* Data Register Empty Interrupt */ -#define USARTE0_TXC_vect_num 60 -#define USARTE0_TXC_vect _VECTOR(60) /* Transmission Complete Interrupt */ - -/* USARTE1 interrupt vectors */ -#define USARTE1_RXC_vect_num 61 -#define USARTE1_RXC_vect _VECTOR(61) /* Reception Complete Interrupt */ -#define USARTE1_DRE_vect_num 62 -#define USARTE1_DRE_vect _VECTOR(62) /* Data Register Empty Interrupt */ -#define USARTE1_TXC_vect_num 63 -#define USARTE1_TXC_vect _VECTOR(63) /* Transmission Complete Interrupt */ - -/* PORTD interrupt vectors */ -#define PORTD_INT0_vect_num 64 -#define PORTD_INT0_vect _VECTOR(64) /* External Interrupt 0 */ -#define PORTD_INT1_vect_num 65 -#define PORTD_INT1_vect _VECTOR(65) /* External Interrupt 1 */ - -/* PORTA interrupt vectors */ -#define PORTA_INT0_vect_num 66 -#define PORTA_INT0_vect _VECTOR(66) /* External Interrupt 0 */ -#define PORTA_INT1_vect_num 67 -#define PORTA_INT1_vect _VECTOR(67) /* External Interrupt 1 */ - -/* ACA interrupt vectors */ -#define ACA_AC0_vect_num 68 -#define ACA_AC0_vect _VECTOR(68) /* AC0 Interrupt */ -#define ACA_AC1_vect_num 69 -#define ACA_AC1_vect _VECTOR(69) /* AC1 Interrupt */ -#define ACA_ACW_vect_num 70 -#define ACA_ACW_vect _VECTOR(70) /* ACW Window Mode Interrupt */ - -/* ADCA interrupt vectors */ -#define ADCA_CH0_vect_num 71 -#define ADCA_CH0_vect _VECTOR(71) /* Interrupt 0 */ -#define ADCA_CH1_vect_num 72 -#define ADCA_CH1_vect _VECTOR(72) /* Interrupt 1 */ -#define ADCA_CH2_vect_num 73 -#define ADCA_CH2_vect _VECTOR(73) /* Interrupt 2 */ -#define ADCA_CH3_vect_num 74 -#define ADCA_CH3_vect _VECTOR(74) /* Interrupt 3 */ - -/* TWID interrupt vectors */ -#define TWID_TWIS_vect_num 75 -#define TWID_TWIS_vect _VECTOR(75) /* TWI Slave Interrupt */ -#define TWID_TWIM_vect_num 76 -#define TWID_TWIM_vect _VECTOR(76) /* TWI Master Interrupt */ - -/* TCD0 interrupt vectors */ -#define TCD0_OVF_vect_num 77 -#define TCD0_OVF_vect _VECTOR(77) /* Overflow Interrupt */ -#define TCD0_ERR_vect_num 78 -#define TCD0_ERR_vect _VECTOR(78) /* Error Interrupt */ -#define TCD0_CCA_vect_num 79 -#define TCD0_CCA_vect _VECTOR(79) /* Compare or Capture A Interrupt */ -#define TCD0_CCB_vect_num 80 -#define TCD0_CCB_vect _VECTOR(80) /* Compare or Capture B Interrupt */ -#define TCD0_CCC_vect_num 81 -#define TCD0_CCC_vect _VECTOR(81) /* Compare or Capture C Interrupt */ -#define TCD0_CCD_vect_num 82 -#define TCD0_CCD_vect _VECTOR(82) /* Compare or Capture D Interrupt */ - -/* TCD1 interrupt vectors */ -#define TCD1_OVF_vect_num 83 -#define TCD1_OVF_vect _VECTOR(83) /* Overflow Interrupt */ -#define TCD1_ERR_vect_num 84 -#define TCD1_ERR_vect _VECTOR(84) /* Error Interrupt */ -#define TCD1_CCA_vect_num 85 -#define TCD1_CCA_vect _VECTOR(85) /* Compare or Capture A Interrupt */ -#define TCD1_CCB_vect_num 86 -#define TCD1_CCB_vect _VECTOR(86) /* Compare or Capture B Interrupt */ - -/* SPID interrupt vectors */ -#define SPID_INT_vect_num 87 -#define SPID_INT_vect _VECTOR(87) /* SPI Interrupt */ - -/* USARTD0 interrupt vectors */ -#define USARTD0_RXC_vect_num 88 -#define USARTD0_RXC_vect _VECTOR(88) /* Reception Complete Interrupt */ -#define USARTD0_DRE_vect_num 89 -#define USARTD0_DRE_vect _VECTOR(89) /* Data Register Empty Interrupt */ -#define USARTD0_TXC_vect_num 90 -#define USARTD0_TXC_vect _VECTOR(90) /* Transmission Complete Interrupt */ - -/* USARTD1 interrupt vectors */ -#define USARTD1_RXC_vect_num 91 -#define USARTD1_RXC_vect _VECTOR(91) /* Reception Complete Interrupt */ -#define USARTD1_DRE_vect_num 92 -#define USARTD1_DRE_vect _VECTOR(92) /* Data Register Empty Interrupt */ -#define USARTD1_TXC_vect_num 93 -#define USARTD1_TXC_vect _VECTOR(93) /* Transmission Complete Interrupt */ - -/* PORTQ interrupt vectors */ -#define PORTQ_INT0_vect_num 94 -#define PORTQ_INT0_vect _VECTOR(94) /* External Interrupt 0 */ -#define PORTQ_INT1_vect_num 95 -#define PORTQ_INT1_vect _VECTOR(95) /* External Interrupt 1 */ - -/* PORTH interrupt vectors */ -#define PORTH_INT0_vect_num 96 -#define PORTH_INT0_vect _VECTOR(96) /* External Interrupt 0 */ -#define PORTH_INT1_vect_num 97 -#define PORTH_INT1_vect _VECTOR(97) /* External Interrupt 1 */ - -/* PORTJ interrupt vectors */ -#define PORTJ_INT0_vect_num 98 -#define PORTJ_INT0_vect _VECTOR(98) /* External Interrupt 0 */ -#define PORTJ_INT1_vect_num 99 -#define PORTJ_INT1_vect _VECTOR(99) /* External Interrupt 1 */ - -/* PORTK interrupt vectors */ -#define PORTK_INT0_vect_num 100 -#define PORTK_INT0_vect _VECTOR(100) /* External Interrupt 0 */ -#define PORTK_INT1_vect_num 101 -#define PORTK_INT1_vect _VECTOR(101) /* External Interrupt 1 */ - -/* PORTF interrupt vectors */ -#define PORTF_INT0_vect_num 104 -#define PORTF_INT0_vect _VECTOR(104) /* External Interrupt 0 */ -#define PORTF_INT1_vect_num 105 -#define PORTF_INT1_vect _VECTOR(105) /* External Interrupt 1 */ - -/* TWIF interrupt vectors */ -#define TWIF_TWIS_vect_num 106 -#define TWIF_TWIS_vect _VECTOR(106) /* TWI Slave Interrupt */ -#define TWIF_TWIM_vect_num 107 -#define TWIF_TWIM_vect _VECTOR(107) /* TWI Master Interrupt */ - -/* TCF0 interrupt vectors */ -#define TCF0_OVF_vect_num 108 -#define TCF0_OVF_vect _VECTOR(108) /* Overflow Interrupt */ -#define TCF0_ERR_vect_num 109 -#define TCF0_ERR_vect _VECTOR(109) /* Error Interrupt */ -#define TCF0_CCA_vect_num 110 -#define TCF0_CCA_vect _VECTOR(110) /* Compare or Capture A Interrupt */ -#define TCF0_CCB_vect_num 111 -#define TCF0_CCB_vect _VECTOR(111) /* Compare or Capture B Interrupt */ -#define TCF0_CCC_vect_num 112 -#define TCF0_CCC_vect _VECTOR(112) /* Compare or Capture C Interrupt */ -#define TCF0_CCD_vect_num 113 -#define TCF0_CCD_vect _VECTOR(113) /* Compare or Capture D Interrupt */ - -/* TCF1 interrupt vectors */ -#define TCF1_OVF_vect_num 114 -#define TCF1_OVF_vect _VECTOR(114) /* Overflow Interrupt */ -#define TCF1_ERR_vect_num 115 -#define TCF1_ERR_vect _VECTOR(115) /* Error Interrupt */ -#define TCF1_CCA_vect_num 116 -#define TCF1_CCA_vect _VECTOR(116) /* Compare or Capture A Interrupt */ -#define TCF1_CCB_vect_num 117 -#define TCF1_CCB_vect _VECTOR(117) /* Compare or Capture B Interrupt */ - -/* SPIF interrupt vectors */ -#define SPIF_INT_vect_num 118 -#define SPIF_INT_vect _VECTOR(118) /* SPI Interrupt */ - -/* USARTF0 interrupt vectors */ -#define USARTF0_RXC_vect_num 119 -#define USARTF0_RXC_vect _VECTOR(119) /* Reception Complete Interrupt */ -#define USARTF0_DRE_vect_num 120 -#define USARTF0_DRE_vect _VECTOR(120) /* Data Register Empty Interrupt */ -#define USARTF0_TXC_vect_num 121 -#define USARTF0_TXC_vect _VECTOR(121) /* Transmission Complete Interrupt */ - -/* USARTF1 interrupt vectors */ -#define USARTF1_RXC_vect_num 122 -#define USARTF1_RXC_vect _VECTOR(122) /* Reception Complete Interrupt */ -#define USARTF1_DRE_vect_num 123 -#define USARTF1_DRE_vect _VECTOR(123) /* Data Register Empty Interrupt */ -#define USARTF1_TXC_vect_num 124 -#define USARTF1_TXC_vect _VECTOR(124) /* Transmission Complete Interrupt */ - - -#define _VECTOR_SIZE 4 /* Size of individual vector. */ -#define _VECTORS_SIZE (125 * _VECTOR_SIZE) - - -/* ========== Constants ========== */ - -#define PROGMEM_START (0x0000) -#define PROGMEM_SIZE (69632) -#define PROGMEM_END (PROGMEM_START + PROGMEM_SIZE - 1) - -#define APP_SECTION_START (0x0000) -#define APP_SECTION_SIZE (65536) -#define APP_SECTION_END (APP_SECTION_START + APP_SECTION_SIZE - 1) - -#define APPTABLE_SECTION_START (0x0F000) -#define APPTABLE_SECTION_SIZE (4096) -#define APPTABLE_SECTION_END (APPTABLE_SECTION_START + APPTABLE_SECTION_SIZE - 1) - -#define BOOT_SECTION_START (0x10000) -#define BOOT_SECTION_SIZE (4096) -#define BOOT_SECTION_END (BOOT_SECTION_START + BOOT_SECTION_SIZE - 1) - -#define DATAMEM_START (0x0000) -#define DATAMEM_SIZE (16777216) -#define DATAMEM_END (DATAMEM_START + DATAMEM_SIZE - 1) - -#define IO_START (0x0000) -#define IO_SIZE (4096) -#define IO_END (IO_START + IO_SIZE - 1) - -#define MAPPED_EEPROM_START (0x1000) -#define MAPPED_EEPROM_SIZE (2048) -#define MAPPED_EEPROM_END (MAPPED_EEPROM_START + MAPPED_EEPROM_SIZE - 1) - -#define INTERNAL_SRAM_START (0x2000) -#define INTERNAL_SRAM_SIZE (4096) -#define INTERNAL_SRAM_END (INTERNAL_SRAM_START + INTERNAL_SRAM_SIZE - 1) - -#define EXTERNAL_SRAM_START (0x3000) -#define EXTERNAL_SRAM_SIZE (16764928) -#define EXTERNAL_SRAM_END (EXTERNAL_SRAM_START + EXTERNAL_SRAM_SIZE - 1) - -#define EEPROM_START (0x0000) -#define EEPROM_SIZE (2048) -#define EEPROM_END (EEPROM_START + EEPROM_SIZE - 1) - -#define FUSE_START (0x0000) -#define FUSE_SIZE (6) -#define FUSE_END (FUSE_START + FUSE_SIZE - 1) - -#define LOCKBIT_START (0x0000) -#define LOCKBIT_SIZE (1) -#define LOCKBIT_END (LOCKBIT_START + LOCKBIT_SIZE - 1) - -#define SIGNATURES_START (0x0000) -#define SIGNATURES_SIZE (3) -#define SIGNATURES_END (SIGNATURES_START + SIGNATURES_SIZE - 1) - -#define USER_SIGNATURES_START (0x0000) -#define USER_SIGNATURES_SIZE (256) -#define USER_SIGNATURES_END (USER_SIGNATURES_START + USER_SIGNATURES_SIZE - 1) - -#define PROD_SIGNATURES_START (0x0000) -#define PROD_SIGNATURES_SIZE (52) -#define PROD_SIGNATURES_END (PROD_SIGNATURES_START + PROD_SIGNATURES_SIZE - 1) - -#define FLASHEND PROGMEM_END -#define SPM_PAGESIZE PROGMEM_PAGE_SIZE -#define RAMSTART INTERNAL_SRAM_START -#define RAMSIZE INTERNAL_SRAM_SIZE -#define RAMEND INTERNAL_SRAM_END -#define XRAMSTART EXTERNAL_SRAM_START -#define XRAMSIZE EXTERNAL_SRAM_SIZE -#define XRAMEND EXTERNAL_SRAM_END -#define E2END EEPROM_END -#define E2PAGESIZE EEPROM_PAGE_SIZE - - -/* ========== Fuses ========== */ -#define FUSE_MEMORY_SIZE 6 - -/* Fuse Byte 0 */ -#define FUSE_JTAGUSERID0 ~_BV(0) /* JTAG User ID Bit 0 */ -#define FUSE_JTAGUSERID1 ~_BV(1) /* JTAG User ID Bit 1 */ -#define FUSE_JTAGUSERID2 ~_BV(2) /* JTAG User ID Bit 2 */ -#define FUSE_JTAGUSERID3 ~_BV(3) /* JTAG User ID Bit 3 */ -#define FUSE_JTAGUSERID4 ~_BV(4) /* JTAG User ID Bit 4 */ -#define FUSE_JTAGUSERID5 ~_BV(5) /* JTAG User ID Bit 5 */ -#define FUSE_JTAGUSERID6 ~_BV(6) /* JTAG User ID Bit 6 */ -#define FUSE_JTAGUSERID7 ~_BV(7) /* JTAG User ID Bit 7 */ -#define FUSE0_DEFAULT (0xFF) - -/* Fuse Byte 1 */ -#define FUSE_WDP0 ~_BV(0) /* Watchdog Timeout Period Bit 0 */ -#define FUSE_WDP1 ~_BV(1) /* Watchdog Timeout Period Bit 1 */ -#define FUSE_WDP2 ~_BV(2) /* Watchdog Timeout Period Bit 2 */ -#define FUSE_WDP3 ~_BV(3) /* Watchdog Timeout Period Bit 3 */ -#define FUSE_WDWP0 ~_BV(4) /* Watchdog Window Timeout Period Bit 0 */ -#define FUSE_WDWP1 ~_BV(5) /* Watchdog Window Timeout Period Bit 1 */ -#define FUSE_WDWP2 ~_BV(6) /* Watchdog Window Timeout Period Bit 2 */ -#define FUSE_WDWP3 ~_BV(7) /* Watchdog Window Timeout Period Bit 3 */ -#define FUSE1_DEFAULT (0xFF) - -/* Fuse Byte 2 */ -#define FUSE_BODPD0 ~_BV(0) /* BOD Operation in Power-Down Mode Bit 0 */ -#define FUSE_BODPD1 ~_BV(1) /* BOD Operation in Power-Down Mode Bit 1 */ -#define FUSE_BODACT0 ~_BV(2) /* BOD Operation in Active Mode Bit 0 */ -#define FUSE_BODACT1 ~_BV(3) /* BOD Operation in Active Mode Bit 1 */ -#define FUSE_BOOTRST ~_BV(6) /* Boot Loader Section Reset Vector */ -#define FUSE_DVSDON ~_BV(7) /* Spike Detector Enable */ -#define FUSE2_DEFAULT (0xFF) - -/* Fuse Byte 3 Reserved */ - -/* Fuse Byte 4 */ -#define FUSE_JTAGEN ~_BV(0) /* JTAG Interface Enable */ -#define FUSE_WDLOCK ~_BV(1) /* Watchdog Timer Lock */ -#define FUSE_SUT0 ~_BV(2) /* Start-up Time Bit 0 */ -#define FUSE_SUT1 ~_BV(3) /* Start-up Time Bit 1 */ -#define FUSE4_DEFAULT (0xFF) - -/* Fuse Byte 5 */ -#define FUSE_BODLVL0 ~_BV(0) /* Brown Out Detection Voltage Level Bit 0 */ -#define FUSE_BODLVL1 ~_BV(1) /* Brown Out Detection Voltage Level Bit 1 */ -#define FUSE_BODLVL2 ~_BV(2) /* Brown Out Detection Voltage Level Bit 2 */ -#define FUSE_EESAVE ~_BV(3) /* Preserve EEPROM Through Chip Erase */ -#define FUSE5_DEFAULT (0xFF) - - -/* ========== Lock Bits ========== */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_APPLICATION_TABLE_BITS_EXIST -#define __BOOT_LOCK_APPLICATION_BITS_EXIST -#define __BOOT_LOCK_BOOT_BITS_EXIST - - -/* ========== Signature ========== */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x96 -#define SIGNATURE_2 0x4E - - -#endif /* _AVR_ATxmega64A1_H_ */ - diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iox64a3.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iox64a3.h deleted file mode 100644 index 6b365df62..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/iox64a3.h +++ /dev/null @@ -1,6852 +0,0 @@ -/* Copyright (c) 2008 Atmel Corporation - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: iox64a3.h,v 1.1.2.4 2008/11/03 04:13:18 arcanum Exp $ */ - -/* avr/iox64a3.h - definitions for ATxmega64A3 */ - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -#ifndef _AVR_IOXXX_H_ -# define _AVR_IOXXX_H_ "iox64a3.h" -#else -# error "Attempt to include more than one file." -#endif - - -#ifndef _AVR_ATxmega64A3_H_ -#define _AVR_ATxmega64A3_H_ 1 - - -/* Ungrouped common registers */ -#define GPIO0 _SFR_MEM8(0x0000) /* General Purpose IO Register 0 */ -#define GPIO1 _SFR_MEM8(0x0001) /* General Purpose IO Register 1 */ -#define GPIO2 _SFR_MEM8(0x0002) /* General Purpose IO Register 2 */ -#define GPIO3 _SFR_MEM8(0x0003) /* General Purpose IO Register 3 */ -#define GPIO4 _SFR_MEM8(0x0004) /* General Purpose IO Register 4 */ -#define GPIO5 _SFR_MEM8(0x0005) /* General Purpose IO Register 5 */ -#define GPIO6 _SFR_MEM8(0x0006) /* General Purpose IO Register 6 */ -#define GPIO7 _SFR_MEM8(0x0007) /* General Purpose IO Register 7 */ -#define GPIO8 _SFR_MEM8(0x0008) /* General Purpose IO Register 8 */ -#define GPIO9 _SFR_MEM8(0x0009) /* General Purpose IO Register 9 */ -#define GPIOA _SFR_MEM8(0x000A) /* General Purpose IO Register 10 */ -#define GPIOB _SFR_MEM8(0x000B) /* General Purpose IO Register 11 */ -#define GPIOC _SFR_MEM8(0x000C) /* General Purpose IO Register 12 */ -#define GPIOD _SFR_MEM8(0x000D) /* General Purpose IO Register 13 */ -#define GPIOE _SFR_MEM8(0x000E) /* General Purpose IO Register 14 */ -#define GPIOF _SFR_MEM8(0x000F) /* General Purpose IO Register 15 */ - -#define CCP _SFR_MEM8(0x0034) /* Configuration Change Protection */ -#define RAMPD _SFR_MEM8(0x0038) /* Ramp D */ -#define RAMPX _SFR_MEM8(0x0039) /* Ramp X */ -#define RAMPY _SFR_MEM8(0x003A) /* Ramp Y */ -#define RAMPZ _SFR_MEM8(0x003B) /* Ramp Z */ -#define EIND _SFR_MEM8(0x003C) /* Extended Indirect Jump */ -#define SPL _SFR_MEM8(0x003D) /* Stack Pointer Low */ -#define SPH _SFR_MEM8(0x003E) /* Stack Pointer High */ -#define SREG _SFR_MEM8(0x003F) /* Status Register */ - - -/* C Language Only */ -#if !defined (__ASSEMBLER__) - -#include - -typedef volatile uint8_t register8_t; -typedef volatile uint16_t register16_t; -typedef volatile uint32_t register32_t; - - -#ifdef _WORDREGISTER -#undef _WORDREGISTER -#endif -#define _WORDREGISTER(regname) \ - union \ - { \ - register16_t regname; \ - struct \ - { \ - register8_t regname ## L; \ - register8_t regname ## H; \ - }; \ - } - -#ifdef _DWORDREGISTER -#undef _DWORDREGISTER -#endif -#define _DWORDREGISTER(regname) \ - union \ - { \ - register32_t regname; \ - struct \ - { \ - register8_t regname ## 0; \ - register8_t regname ## 1; \ - register8_t regname ## 2; \ - register8_t regname ## 3; \ - }; \ - } - - -/* -========================================================================== -IO Module Structures -========================================================================== -*/ - - -/* --------------------------------------------------------------------------- -XOCD - On-Chip Debug System --------------------------------------------------------------------------- -*/ - -/* On-Chip Debug System */ -typedef struct OCD_struct -{ - register8_t OCDR0; /* OCD Register 0 */ - register8_t OCDR1; /* OCD Register 1 */ -} OCD_t; - - -/* CCP signatures */ -typedef enum CCP_enum -{ - CCP_SPM_gc = (0x9D<<0), /* SPM Instruction Protection */ - CCP_IOREG_gc = (0xD8<<0), /* IO Register Protection */ -} CCP_t; - - -/* --------------------------------------------------------------------------- -CLK - Clock System --------------------------------------------------------------------------- -*/ - -/* Clock System */ -typedef struct CLK_struct -{ - register8_t CTRL; /* Control Register */ - register8_t PSCTRL; /* Prescaler Control Register */ - register8_t LOCK; /* Lock register */ - register8_t RTCCTRL; /* RTC Control Register */ -} CLK_t; - -/* --------------------------------------------------------------------------- -CLK - Clock System --------------------------------------------------------------------------- -*/ - -/* Power Reduction */ -typedef struct PR_struct -{ - register8_t PR; /* General Power Reduction */ - register8_t PRPA; /* Power Reduction Port A */ - register8_t PRPB; /* Power Reduction Port B */ - register8_t PRPC; /* Power Reduction Port C */ - register8_t PRPD; /* Power Reduction Port D */ - register8_t PRPE; /* Power Reduction Port E */ - register8_t PRPF; /* Power Reduction Port F */ -} PR_t; - -/* System Clock Selection */ -typedef enum CLK_SCLKSEL_enum -{ - CLK_SCLKSEL_RC2M_gc = (0x00<<0), /* Internal 2MHz RC Oscillator */ - CLK_SCLKSEL_RC32M_gc = (0x01<<0), /* Internal 32MHz RC Oscillator */ - CLK_SCLKSEL_RC32K_gc = (0x02<<0), /* Internal 32kHz RC Oscillator */ - CLK_SCLKSEL_XOSC_gc = (0x03<<0), /* External Crystal Oscillator or Clock */ - CLK_SCLKSEL_PLL_gc = (0x04<<0), /* Phase Locked Loop */ -} CLK_SCLKSEL_t; - -/* Prescaler A Division Factor */ -typedef enum CLK_PSADIV_enum -{ - CLK_PSADIV_1_gc = (0x00<<2), /* Divide by 1 */ - CLK_PSADIV_2_gc = (0x01<<2), /* Divide by 2 */ - CLK_PSADIV_4_gc = (0x03<<2), /* Divide by 4 */ - CLK_PSADIV_8_gc = (0x05<<2), /* Divide by 8 */ - CLK_PSADIV_16_gc = (0x07<<2), /* Divide by 16 */ - CLK_PSADIV_32_gc = (0x09<<2), /* Divide by 32 */ - CLK_PSADIV_64_gc = (0x0B<<2), /* Divide by 64 */ - CLK_PSADIV_128_gc = (0x0D<<2), /* Divide by 128 */ - CLK_PSADIV_256_gc = (0x0F<<2), /* Divide by 256 */ - CLK_PSADIV_512_gc = (0x11<<2), /* Divide by 512 */ -} CLK_PSADIV_t; - -/* Prescaler B and C Division Factor */ -typedef enum CLK_PSBCDIV_enum -{ - CLK_PSBCDIV_1_1_gc = (0x00<<0), /* Divide B by 1 and C by 1 */ - CLK_PSBCDIV_1_2_gc = (0x01<<0), /* Divide B by 1 and C by 2 */ - CLK_PSBCDIV_4_1_gc = (0x02<<0), /* Divide B by 4 and C by 1 */ - CLK_PSBCDIV_2_2_gc = (0x03<<0), /* Divide B by 2 and C by 2 */ -} CLK_PSBCDIV_t; - -/* RTC Clock Source */ -typedef enum CLK_RTCSRC_enum -{ - CLK_RTCSRC_ULP_gc = (0x00<<1), /* 1kHz from internal 32kHz ULP */ - CLK_RTCSRC_TOSC_gc = (0x01<<1), /* 1kHz from 32kHz crystal oscillator on TOSC */ - CLK_RTCSRC_RCOSC_gc = (0x02<<1), /* 1kHz from internal 32kHz RC oscillator */ - CLK_RTCSRC_TOSC32_gc = (0x05<<1), /* 32kHz from 32kHz crystal oscillator on TOSC */ -} CLK_RTCSRC_t; - - -/* --------------------------------------------------------------------------- -SLEEP - Sleep Controller --------------------------------------------------------------------------- -*/ - -/* Sleep Controller */ -typedef struct SLEEP_struct -{ - register8_t CTRL; /* Control Register */ -} SLEEP_t; - -/* Sleep Mode */ -typedef enum SLEEP_SMODE_enum -{ - SLEEP_SMODE_IDLE_gc = (0x00<<1), /* Idle mode */ - SLEEP_SMODE_PDOWN_gc = (0x02<<1), /* Power-down Mode */ - SLEEP_SMODE_PSAVE_gc = (0x03<<1), /* Power-save Mode */ - SLEEP_SMODE_STDBY_gc = (0x06<<1), /* Standby Mode */ - SLEEP_SMODE_ESTDBY_gc = (0x07<<1), /* Extended Standby Mode */ -} SLEEP_SMODE_t; - - -/* --------------------------------------------------------------------------- -OSC - Oscillator --------------------------------------------------------------------------- -*/ - -/* Oscillator */ -typedef struct OSC_struct -{ - register8_t CTRL; /* Control Register */ - register8_t STATUS; /* Status Register */ - register8_t XOSCCTRL; /* External Oscillator Control Register */ - register8_t XOSCFAIL; /* External Oscillator Failure Detection Register */ - register8_t RC32KCAL; /* 32kHz Internal Oscillator Calibration Register */ - register8_t PLLCTRL; /* PLL Control REgister */ - register8_t DFLLCTRL; /* DFLL Control Register */ -} OSC_t; - -/* Oscillator Frequency Range */ -typedef enum OSC_FRQRANGE_enum -{ - OSC_FRQRANGE_04TO2_gc = (0x00<<6), /* 0.4 - 2 MHz */ - OSC_FRQRANGE_2TO9_gc = (0x01<<6), /* 2 - 9 MHz */ - OSC_FRQRANGE_9TO12_gc = (0x02<<6), /* 9 - 12 MHz */ - OSC_FRQRANGE_12TO16_gc = (0x03<<6), /* 12 - 16 MHz */ -} OSC_FRQRANGE_t; - -/* External Oscillator Selection and Startup Time */ -typedef enum OSC_XOSCSEL_enum -{ - OSC_XOSCSEL_EXTCLK_gc = (0x00<<0), /* External Clock - 6 CLK */ - OSC_XOSCSEL_32KHz_gc = (0x02<<0), /* 32kHz TOSC - 32K CLK */ - OSC_XOSCSEL_XTAL_256CLK_gc = (0x03<<0), /* 0.4-16MHz XTAL - 256 CLK */ - OSC_XOSCSEL_XTAL_1KCLK_gc = (0x07<<0), /* 0.4-16MHz XTAL - 1K CLK */ - OSC_XOSCSEL_XTAL_16KCLK_gc = (0x0B<<0), /* 0.4-16MHz XTAL - 16K CLK */ -} OSC_XOSCSEL_t; - -/* PLL Clock Source */ -typedef enum OSC_PLLSRC_enum -{ - OSC_PLLSRC_RC2M_gc = (0x00<<6), /* Internal 2MHz RC Oscillator */ - OSC_PLLSRC_RC32M_gc = (0x02<<6), /* Internal 32MHz RC Oscillator */ - OSC_PLLSRC_XOSC_gc = (0x03<<6), /* External Oscillator */ -} OSC_PLLSRC_t; - - -/* --------------------------------------------------------------------------- -DFLL - DFLL --------------------------------------------------------------------------- -*/ - -/* DFLL */ -typedef struct DFLL_struct -{ - register8_t CTRL; /* Control Register */ - register8_t reserved_0x01; - register8_t CALA; /* Calibration Register A */ - register8_t CALB; /* Calibration Register B */ - register8_t OSCCNT0; /* Oscillator Counter Register 0 */ - register8_t OSCCNT1; /* Oscillator Counter Register 1 */ - register8_t OSCCNT2; /* Oscillator Counter Register 2 */ - register8_t reserved_0x07; -} DFLL_t; - - -/* --------------------------------------------------------------------------- -RST - Reset --------------------------------------------------------------------------- -*/ - -/* Reset */ -typedef struct RST_struct -{ - register8_t STATUS; /* Status Register */ - register8_t CTRL; /* Control Register */ -} RST_t; - - -/* --------------------------------------------------------------------------- -WDT - Watch-Dog Timer --------------------------------------------------------------------------- -*/ - -/* Watch-Dog Timer */ -typedef struct WDT_struct -{ - register8_t CTRL; /* Control */ - register8_t WINCTRL; /* Windowed Mode Control */ - register8_t STATUS; /* Status */ -} WDT_t; - -/* Period setting */ -typedef enum WDT_PER_enum -{ - WDT_PER_8CLK_gc = (0x00<<2), /* 8 cycles (8ms @ 3.3V) */ - WDT_PER_16CLK_gc = (0x01<<2), /* 16 cycles (16ms @ 3.3V) */ - WDT_PER_32CLK_gc = (0x02<<2), /* 32 cycles (32ms @ 3.3V) */ - WDT_PER_64CLK_gc = (0x03<<2), /* 64 cycles (64ms @ 3.3V) */ - WDT_PER_128CLK_gc = (0x04<<2), /* 128 cycles (0.125s @ 3.3V) */ - WDT_PER_256CLK_gc = (0x05<<2), /* 256 cycles (0.25s @ 3.3V) */ - WDT_PER_512CLK_gc = (0x06<<2), /* 512 cycles (0.5s @ 3.3V) */ - WDT_PER_1KCLK_gc = (0x07<<2), /* 1K cycles (1s @ 3.3V) */ - WDT_PER_2KCLK_gc = (0x08<<2), /* 2K cycles (2s @ 3.3V) */ - WDT_PER_4KCLK_gc = (0x09<<2), /* 4K cycles (4s @ 3.3V) */ - WDT_PER_8KCLK_gc = (0x0A<<2), /* 8K cycles (8s @ 3.3V) */ -} WDT_PER_t; - -/* Closed window period */ -typedef enum WDT_WPER_enum -{ - WDT_WPER_8CLK_gc = (0x00<<2), /* 8 cycles (8ms @ 3.3V) */ - WDT_WPER_16CLK_gc = (0x01<<2), /* 16 cycles (16ms @ 3.3V) */ - WDT_WPER_32CLK_gc = (0x02<<2), /* 32 cycles (32ms @ 3.3V) */ - WDT_WPER_64CLK_gc = (0x03<<2), /* 64 cycles (64ms @ 3.3V) */ - WDT_WPER_128CLK_gc = (0x04<<2), /* 128 cycles (0.125s @ 3.3V) */ - WDT_WPER_256CLK_gc = (0x05<<2), /* 256 cycles (0.25s @ 3.3V) */ - WDT_WPER_512CLK_gc = (0x06<<2), /* 512 cycles (0.5s @ 3.3V) */ - WDT_WPER_1KCLK_gc = (0x07<<2), /* 1K cycles (1s @ 3.3V) */ - WDT_WPER_2KCLK_gc = (0x08<<2), /* 2K cycles (2s @ 3.3V) */ - WDT_WPER_4KCLK_gc = (0x09<<2), /* 4K cycles (4s @ 3.3V) */ - WDT_WPER_8KCLK_gc = (0x0A<<2), /* 8K cycles (8s @ 3.3V) */ -} WDT_WPER_t; - - -/* --------------------------------------------------------------------------- -MCU - MCU Control --------------------------------------------------------------------------- -*/ - -/* MCU Control */ -typedef struct MCU_struct -{ - register8_t DEVID0; /* Device ID byte 0 */ - register8_t DEVID1; /* Device ID byte 1 */ - register8_t DEVID2; /* Device ID byte 2 */ - register8_t REVID; /* Revision ID */ - register8_t JTAGUID; /* JTAG User ID */ - register8_t reserved_0x05; - register8_t MCUCR; /* MCU Control */ - register8_t reserved_0x07; - register8_t EVSYSLOCK; /* Event System Lock */ - register8_t AWEXLOCK; /* AWEX Lock */ - register8_t reserved_0x0A; - register8_t reserved_0x0B; -} MCU_t; - - -/* --------------------------------------------------------------------------- -PMIC - Programmable Multi-level Interrupt Controller --------------------------------------------------------------------------- -*/ - -/* Programmable Multi-level Interrupt Controller */ -typedef struct PMIC_struct -{ - register8_t STATUS; /* Status Register */ - register8_t INTPRI; /* Interrupt Priority */ - register8_t CTRL; /* Control Register */ -} PMIC_t; - - -/* --------------------------------------------------------------------------- -DMA - DMA Controller --------------------------------------------------------------------------- -*/ - -/* DMA Channel */ -typedef struct DMA_CH_struct -{ - register8_t CTRLA; /* Channel Control */ - register8_t CTRLB; /* Channel Control */ - register8_t ADDRCTRL; /* Address Control */ - register8_t TRIGSRC; /* Channel Trigger Source */ - _WORDREGISTER(TRFCNT); /* Channel Block Transfer Count */ - register8_t REPCNT; /* Channel Repeat Count */ - register8_t reserved_0x07; - register8_t SRCADDR0; /* Channel Source Address 0 */ - register8_t SRCADDR1; /* Channel Source Address 1 */ - register8_t SRCADDR2; /* Channel Source Address 2 */ - register8_t reserved_0x0B; - register8_t DESTADDR0; /* Channel Destination Address 0 */ - register8_t DESTADDR1; /* Channel Destination Address 1 */ - register8_t DESTADDR2; /* Channel Destination Address 2 */ - register8_t reserved_0x0F; -} DMA_CH_t; - -/* --------------------------------------------------------------------------- -DMA - DMA Controller --------------------------------------------------------------------------- -*/ - -/* DMA Controller */ -typedef struct DMA_struct -{ - register8_t CTRL; /* Control */ - register8_t reserved_0x01; - register8_t reserved_0x02; - register8_t INTFLAGS; /* Transfer Interrupt Status */ - register8_t STATUS; /* Status */ - register8_t reserved_0x05; - _WORDREGISTER(TEMP); /* Temporary Register For 16/24-bit Access */ - register8_t reserved_0x08; - register8_t reserved_0x09; - register8_t reserved_0x0A; - register8_t reserved_0x0B; - register8_t reserved_0x0C; - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t reserved_0x0F; - DMA_CH_t CH0; /* DMA Channel 0 */ - DMA_CH_t CH1; /* DMA Channel 1 */ - DMA_CH_t CH2; /* DMA Channel 2 */ - DMA_CH_t CH3; /* DMA Channel 3 */ -} DMA_t; - -/* Burst mode */ -typedef enum DMA_CH_BURSTLEN_enum -{ - DMA_CH_BURSTLEN_1BYTE_gc = (0x00<<0), /* 1-byte burst mode */ - DMA_CH_BURSTLEN_2BYTE_gc = (0x01<<0), /* 2-byte burst mode */ - DMA_CH_BURSTLEN_4BYTE_gc = (0x02<<0), /* 4-byte burst mode */ - DMA_CH_BURSTLEN_8BYTE_gc = (0x03<<0), /* 8-byte burst mode */ -} DMA_CH_BURSTLEN_t; - -/* Source address reload mode */ -typedef enum DMA_CH_SRCRELOAD_enum -{ - DMA_CH_SRCRELOAD_NONE_gc = (0x00<<6), /* No reload */ - DMA_CH_SRCRELOAD_BLOCK_gc = (0x01<<6), /* Reload at end of block */ - DMA_CH_SRCRELOAD_BURST_gc = (0x02<<6), /* Reload at end of burst */ - DMA_CH_SRCRELOAD_TRANSACTION_gc = (0x03<<6), /* Reload at end of transaction */ -} DMA_CH_SRCRELOAD_t; - -/* Source addressing mode */ -typedef enum DMA_CH_SRCDIR_enum -{ - DMA_CH_SRCDIR_FIXED_gc = (0x00<<4), /* Fixed */ - DMA_CH_SRCDIR_INC_gc = (0x01<<4), /* Increment */ - DMA_CH_SRCDIR_DEC_gc = (0x02<<4), /* Decrement */ -} DMA_CH_SRCDIR_t; - -/* Destination adress reload mode */ -typedef enum DMA_CH_DESTRELOAD_enum -{ - DMA_CH_DESTRELOAD_NONE_gc = (0x00<<2), /* No reload */ - DMA_CH_DESTRELOAD_BLOCK_gc = (0x01<<2), /* Reload at end of block */ - DMA_CH_DESTRELOAD_BURST_gc = (0x02<<2), /* Reload at end of burst */ - DMA_CH_DESTRELOAD_TRANSACTION_gc = (0x03<<2), /* Reload at end of transaction */ -} DMA_CH_DESTRELOAD_t; - -/* Destination adressing mode */ -typedef enum DMA_CH_DESTDIR_enum -{ - DMA_CH_DESTDIR_FIXED_gc = (0x00<<0), /* Fixed */ - DMA_CH_DESTDIR_INC_gc = (0x01<<0), /* Increment */ - DMA_CH_DESTDIR_DEC_gc = (0x02<<0), /* Decrement */ -} DMA_CH_DESTDIR_t; - -/* Transfer trigger source */ -typedef enum DMA_CH_TRIGSRC_enum -{ - DMA_CH_TRIGSRC_OFF_gc = (0x00<<0), /* Off software triggers only */ - DMA_CH_TRIGSRC_EVSYS_CH0_gc = (0x01<<0), /* Event System Channel 0 */ - DMA_CH_TRIGSRC_EVSYS_CH1_gc = (0x02<<0), /* Event System Channel 1 */ - DMA_CH_TRIGSRC_EVSYS_CH2_gc = (0x03<<0), /* Event System Channel 2 */ - DMA_CH_TRIGSRC_ADCA_CH0_gc = (0x10<<0), /* ADCA Channel 0 */ - DMA_CH_TRIGSRC_ADCA_CH1_gc = (0x11<<0), /* ADCA Channel 1 */ - DMA_CH_TRIGSRC_ADCA_CH2_gc = (0x12<<0), /* ADCA Channel 2 */ - DMA_CH_TRIGSRC_ADCA_CH3_gc = (0x13<<0), /* ADCA Channel 3 */ - DMA_CH_TRIGSRC_ADCA_CH4_gc = (0x14<<0), /* ADCA Channel 0,1,2,3 combined */ - DMA_CH_TRIGSRC_DACA_CH0_gc = (0x15<<0), /* DACA Channel 0 */ - DMA_CH_TRIGSRC_DACA_CH1_gc = (0x16<<0), /* DACA Channel 1 */ - DMA_CH_TRIGSRC_ADCB_CH0_gc = (0x20<<0), /* ADCB Channel 0 */ - DMA_CH_TRIGSRC_ADCB_CH1_gc = (0x21<<0), /* ADCB Channel 1 */ - DMA_CH_TRIGSRC_ADCB_CH2_gc = (0x22<<0), /* ADCB Channel 2 */ - DMA_CH_TRIGSRC_ADCB_CH3_gc = (0x23<<0), /* ADCB Channel 3 */ - DMA_CH_TRIGSRC_ADCB_CH4_gc = (0x24<<0), /* ADCB Channel 0,1,2,3 combined */ - DMA_CH_TRIGSRC_DACB_CH0_gc = (0x25<<0), /* DACB Channel 0 */ - DMA_CH_TRIGSRC_DACB_CH1_gc = (0x26<<0), /* DACB Channel 1 */ - DMA_CH_TRIGSRC_TCC0_OVF_gc = (0x40<<0), /* Timer/Counter C0 Overflow */ - DMA_CH_TRIGSRC_TCC0_ERR_gc = (0x41<<0), /* Timer/Counter C0 Error */ - DMA_CH_TRIGSRC_TCC0_CCA_gc = (0x42<<0), /* Timer/Counter C0 Compare or Capture A */ - DMA_CH_TRIGSRC_TCC0_CCB_gc = (0x43<<0), /* Timer/Counter C0 Compare or Capture B */ - DMA_CH_TRIGSRC_TCC0_CCC_gc = (0x44<<0), /* Timer/Counter C0 Compare or Capture C */ - DMA_CH_TRIGSRC_TCC0_CCD_gc = (0x45<<0), /* Timer/Counter C0 Compare or Capture D */ - DMA_CH_TRIGSRC_TCC1_OVF_gc = (0x46<<0), /* Timer/Counter C1 Overflow */ - DMA_CH_TRIGSRC_TCC1_ERR_gc = (0x47<<0), /* Timer/Counter C1 Error */ - DMA_CH_TRIGSRC_TCC1_CCA_gc = (0x48<<0), /* Timer/Counter C1 Compare or Capture A */ - DMA_CH_TRIGSRC_TCC1_CCB_gc = (0x49<<0), /* Timer/Counter C1 Compare or Capture B */ - DMA_CH_TRIGSRC_SPIC_gc = (0x4A<<0), /* SPI C Transfer Complete */ - DMA_CH_TRIGSRC_USARTC0_RXC_gc = (0x4B<<0), /* USART C0 Receive Complete */ - DMA_CH_TRIGSRC_USARTC0_DRE_gc = (0x4C<<0), /* USART C0 Data Register Empty */ - DMA_CH_TRIGSRC_USARTC1_RXC_gc = (0x4E<<0), /* USART C1 Receive Complete */ - DMA_CH_TRIGSRC_USARTC1_DRE_gc = (0x4F<<0), /* USART C1 Data Register Empty */ - DMA_CH_TRIGSRC_TCD0_OVF_gc = (0x60<<0), /* Timer/Counter D0 Overflow */ - DMA_CH_TRIGSRC_TCD0_ERR_gc = (0x61<<0), /* Timer/Counter D0 Error */ - DMA_CH_TRIGSRC_TCD0_CCA_gc = (0x62<<0), /* Timer/Counter D0 Compare or Capture A */ - DMA_CH_TRIGSRC_TCD0_CCB_gc = (0x63<<0), /* Timer/Counter D0 Compare or Capture B */ - DMA_CH_TRIGSRC_TCD0_CCC_gc = (0x64<<0), /* Timer/Counter D0 Compare or Capture C */ - DMA_CH_TRIGSRC_TCD0_CCD_gc = (0x65<<0), /* Timer/Counter D0 Compare or Capture D */ - DMA_CH_TRIGSRC_TCD1_OVF_gc = (0x66<<0), /* Timer/Counter D1 Overflow */ - DMA_CH_TRIGSRC_TCD1_ERR_gc = (0x67<<0), /* Timer/Counter D1 Error */ - DMA_CH_TRIGSRC_TCD1_CCA_gc = (0x68<<0), /* Timer/Counter D1 Compare or Capture A */ - DMA_CH_TRIGSRC_TCD1_CCB_gc = (0x69<<0), /* Timer/Counter D1 Compare or Capture B */ - DMA_CH_TRIGSRC_SPID_gc = (0x6A<<0), /* SPI D Transfer Complete */ - DMA_CH_TRIGSRC_USARTD0_RXC_gc = (0x6B<<0), /* USART D0 Receive Complete */ - DMA_CH_TRIGSRC_USARTD0_DRE_gc = (0x6C<<0), /* USART D0 Data Register Empty */ - DMA_CH_TRIGSRC_USARTD1_RXC_gc = (0x6E<<0), /* USART D1 Receive Complete */ - DMA_CH_TRIGSRC_USARTD1_DRE_gc = (0x6F<<0), /* USART D1 Data Register Empty */ - DMA_CH_TRIGSRC_TCE0_OVF_gc = (0x80<<0), /* Timer/Counter E0 Overflow */ - DMA_CH_TRIGSRC_TCE0_ERR_gc = (0x81<<0), /* Timer/Counter E0 Error */ - DMA_CH_TRIGSRC_TCE0_CCA_gc = (0x82<<0), /* Timer/Counter E0 Compare or Capture A */ - DMA_CH_TRIGSRC_TCE0_CCB_gc = (0x83<<0), /* Timer/Counter E0 Compare or Capture B */ - DMA_CH_TRIGSRC_TCE0_CCC_gc = (0x84<<0), /* Timer/Counter E0 Compare or Capture C */ - DMA_CH_TRIGSRC_TCE0_CCD_gc = (0x85<<0), /* Timer/Counter E0 Compare or Capture D */ - DMA_CH_TRIGSRC_TCE1_OVF_gc = (0x86<<0), /* Timer/Counter E1 Overflow */ - DMA_CH_TRIGSRC_TCE1_ERR_gc = (0x87<<0), /* Timer/Counter E1 Error */ - DMA_CH_TRIGSRC_TCE1_CCA_gc = (0x88<<0), /* Timer/Counter E1 Compare or Capture A */ - DMA_CH_TRIGSRC_TCE1_CCB_gc = (0x89<<0), /* Timer/Counter E1 Compare or Capture B */ - DMA_CH_TRIGSRC_SPIE_gc = (0x8A<<0), /* SPI E Transfer Complete */ - DMA_CH_TRIGSRC_USARTE0_RXC_gc = (0x8B<<0), /* USART E0 Receive Complete */ - DMA_CH_TRIGSRC_USARTE0_DRE_gc = (0x8C<<0), /* USART E0 Data Register Empty */ - DMA_CH_TRIGSRC_USARTE1_RXC_gc = (0x8E<<0), /* USART E1 Receive Complete */ - DMA_CH_TRIGSRC_USARTE1_DRE_gc = (0x8F<<0), /* USART E1 Data Register Empty */ - DMA_CH_TRIGSRC_TCF0_OVF_gc = (0xA0<<0), /* Timer/Counter F0 Overflow */ - DMA_CH_TRIGSRC_TCF0_ERR_gc = (0xA1<<0), /* Timer/Counter F0 Error */ - DMA_CH_TRIGSRC_TCF0_CCA_gc = (0xA2<<0), /* Timer/Counter F0 Compare or Capture A */ - DMA_CH_TRIGSRC_TCF0_CCB_gc = (0xA3<<0), /* Timer/Counter F0 Compare or Capture B */ - DMA_CH_TRIGSRC_TCF0_CCC_gc = (0xA4<<0), /* Timer/Counter F0 Compare or Capture C */ - DMA_CH_TRIGSRC_TCF0_CCD_gc = (0xA5<<0), /* Timer/Counter F0 Compare or Capture D */ - DMA_CH_TRIGSRC_TCF1_OVF_gc = (0xA6<<0), /* Timer/Counter F1 Overflow */ - DMA_CH_TRIGSRC_TCF1_ERR_gc = (0xA7<<0), /* Timer/Counter F1 Error */ - DMA_CH_TRIGSRC_TCF1_CCA_gc = (0xA8<<0), /* Timer/Counter F1 Compare or Capture A */ - DMA_CH_TRIGSRC_TCF1_CCB_gc = (0xA9<<0), /* Timer/Counter F1 Compare or Capture B */ - DMA_CH_TRIGSRC_SPIF_gc = (0xAA<<0), /* SPI F Transfer Complete */ - DMA_CH_TRIGSRC_USARTF0_RXC_gc = (0xAB<<0), /* USART F0 Receive Complete */ - DMA_CH_TRIGSRC_USARTF0_DRE_gc = (0xAC<<0), /* USART F0 Data Register Empty */ - DMA_CH_TRIGSRC_USARTF1_RXC_gc = (0xAE<<0), /* USART F1 Receive Complete */ - DMA_CH_TRIGSRC_USARTF1_DRE_gc = (0xAF<<0), /* USART F1 Data Register Empty */ -} DMA_CH_TRIGSRC_t; - -/* Double buffering mode */ -typedef enum DMA_DBUFMODE_enum -{ - DMA_DBUFMODE_DISABLED_gc = (0x00<<2), /* Double buffering disabled */ - DMA_DBUFMODE_CH01_gc = (0x01<<2), /* Double buffering enabled on channel 0/1 */ - DMA_DBUFMODE_CH23_gc = (0x02<<2), /* Double buffering enabled on channel 2/3 */ - DMA_DBUFMODE_CH01CH23_gc = (0x03<<2), /* Double buffering enabled on ch. 0/1 and ch. 2/3 */ -} DMA_DBUFMODE_t; - -/* Priority mode */ -typedef enum DMA_PRIMODE_enum -{ - DMA_PRIMODE_RR0123_gc = (0x00<<0), /* Round Robin */ - DMA_PRIMODE_CH0RR123_gc = (0x01<<0), /* Channel 0 > Round Robin on channel 1/2/3 */ - DMA_PRIMODE_CH01RR23_gc = (0x02<<0), /* Channel 0 > channel 1 > Round Robin on channel 2/3 */ - DMA_PRIMODE_CH0123_gc = (0x03<<0), /* Channel 0 > channel 1 > channel 2 > channel 3 */ -} DMA_PRIMODE_t; - -/* Interrupt level */ -typedef enum DMA_CH_ERRINTLVL_enum -{ - DMA_CH_ERRINTLVL_OFF_gc = (0x00<<2), /* Interrupt disabled */ - DMA_CH_ERRINTLVL_LO_gc = (0x01<<2), /* Low level */ - DMA_CH_ERRINTLVL_MED_gc = (0x02<<2), /* Medium level */ - DMA_CH_ERRINTLVL_HI_gc = (0x03<<2), /* High level */ -} DMA_CH_ERRINTLVL_t; - -/* Interrupt level */ -typedef enum DMA_CH_TRNINTLVL_enum -{ - DMA_CH_TRNINTLVL_OFF_gc = (0x00<<0), /* Interrupt disabled */ - DMA_CH_TRNINTLVL_LO_gc = (0x01<<0), /* Low level */ - DMA_CH_TRNINTLVL_MED_gc = (0x02<<0), /* Medium level */ - DMA_CH_TRNINTLVL_HI_gc = (0x03<<0), /* High level */ -} DMA_CH_TRNINTLVL_t; - - -/* --------------------------------------------------------------------------- -EVSYS - Event System --------------------------------------------------------------------------- -*/ - -/* Event System */ -typedef struct EVSYS_struct -{ - register8_t CH0MUX; /* Event Channel 0 Multiplexer */ - register8_t CH1MUX; /* Event Channel 1 Multiplexer */ - register8_t CH2MUX; /* Event Channel 2 Multiplexer */ - register8_t CH3MUX; /* Event Channel 3 Multiplexer */ - register8_t CH4MUX; /* Event Channel 4 Multiplexer */ - register8_t CH5MUX; /* Event Channel 5 Multiplexer */ - register8_t CH6MUX; /* Event Channel 6 Multiplexer */ - register8_t CH7MUX; /* Event Channel 7 Multiplexer */ - register8_t CH0CTRL; /* Channel 0 Control Register */ - register8_t CH1CTRL; /* Channel 1 Control Register */ - register8_t CH2CTRL; /* Channel 2 Control Register */ - register8_t CH3CTRL; /* Channel 3 Control Register */ - register8_t CH4CTRL; /* Channel 4 Control Register */ - register8_t CH5CTRL; /* Channel 5 Control Register */ - register8_t CH6CTRL; /* Channel 6 Control Register */ - register8_t CH7CTRL; /* Channel 7 Control Register */ - register8_t STROBE; /* Event Strobe */ - register8_t DATA; /* Event Data */ -} EVSYS_t; - -/* Quadrature Decoder Index Recognition Mode */ -typedef enum EVSYS_QDIRM_enum -{ - EVSYS_QDIRM_00_gc = (0x00<<5), /* QDPH0 = 0, QDPH90 = 0 */ - EVSYS_QDIRM_01_gc = (0x01<<5), /* QDPH0 = 0, QDPH90 = 1 */ - EVSYS_QDIRM_10_gc = (0x02<<5), /* QDPH0 = 1, QDPH90 = 0 */ - EVSYS_QDIRM_11_gc = (0x03<<5), /* QDPH0 = 1, QDPH90 = 1 */ -} EVSYS_QDIRM_t; - -/* Digital filter coefficient */ -typedef enum EVSYS_DIGFILT_enum -{ - EVSYS_DIGFILT_1SAMPLE_gc = (0x00<<0), /* 1 SAMPLE */ - EVSYS_DIGFILT_2SAMPLES_gc = (0x01<<0), /* 2 SAMPLES */ - EVSYS_DIGFILT_3SAMPLES_gc = (0x02<<0), /* 3 SAMPLES */ - EVSYS_DIGFILT_4SAMPLES_gc = (0x03<<0), /* 4 SAMPLES */ - EVSYS_DIGFILT_5SAMPLES_gc = (0x04<<0), /* 5 SAMPLES */ - EVSYS_DIGFILT_6SAMPLES_gc = (0x05<<0), /* 6 SAMPLES */ - EVSYS_DIGFILT_7SAMPLES_gc = (0x06<<0), /* 7 SAMPLES */ - EVSYS_DIGFILT_8SAMPLES_gc = (0x07<<0), /* 8 SAMPLES */ -} EVSYS_DIGFILT_t; - -/* Event Channel multiplexer input selection */ -typedef enum EVSYS_CHMUX_enum -{ - EVSYS_CHMUX_OFF_gc = (0x00<<0), /* Off */ - EVSYS_CHMUX_RTC_OVF_gc = (0x08<<0), /* RTC Overflow */ - EVSYS_CHMUX_RTC_CMP_gc = (0x09<<0), /* RTC Compare Match */ - EVSYS_CHMUX_ACA_CH0_gc = (0x10<<0), /* Analog Comparator A Channel 0 */ - EVSYS_CHMUX_ACA_CH1_gc = (0x11<<0), /* Analog Comparator A Channel 1 */ - EVSYS_CHMUX_ACA_WIN_gc = (0x12<<0), /* Analog Comparator A Window */ - EVSYS_CHMUX_ACB_CH0_gc = (0x13<<0), /* Analog Comparator B Channel 0 */ - EVSYS_CHMUX_ACB_CH1_gc = (0x14<<0), /* Analog Comparator B Channel 1 */ - EVSYS_CHMUX_ACB_WIN_gc = (0x15<<0), /* Analog Comparator B Window */ - EVSYS_CHMUX_ADCA_CH0_gc = (0x20<<0), /* ADC A Channel 0 */ - EVSYS_CHMUX_ADCA_CH1_gc = (0x21<<0), /* ADC A Channel 1 */ - EVSYS_CHMUX_ADCA_CH2_gc = (0x22<<0), /* ADC A Channel 2 */ - EVSYS_CHMUX_ADCA_CH3_gc = (0x23<<0), /* ADC A Channel 3 */ - EVSYS_CHMUX_ADCB_CH0_gc = (0x24<<0), /* ADC B Channel 0 */ - EVSYS_CHMUX_ADCB_CH1_gc = (0x25<<0), /* ADC B Channel 1 */ - EVSYS_CHMUX_ADCB_CH2_gc = (0x26<<0), /* ADC B Channel 2 */ - EVSYS_CHMUX_ADCB_CH3_gc = (0x27<<0), /* ADC B Channel 3 */ - EVSYS_CHMUX_PORTA_PIN0_gc = (0x50<<0), /* Port A, Pin0 */ - EVSYS_CHMUX_PORTA_PIN1_gc = (0x51<<0), /* Port A, Pin1 */ - EVSYS_CHMUX_PORTA_PIN2_gc = (0x52<<0), /* Port A, Pin2 */ - EVSYS_CHMUX_PORTA_PIN3_gc = (0x53<<0), /* Port A, Pin3 */ - EVSYS_CHMUX_PORTA_PIN4_gc = (0x54<<0), /* Port A, Pin4 */ - EVSYS_CHMUX_PORTA_PIN5_gc = (0x55<<0), /* Port A, Pin5 */ - EVSYS_CHMUX_PORTA_PIN6_gc = (0x56<<0), /* Port A, Pin6 */ - EVSYS_CHMUX_PORTA_PIN7_gc = (0x57<<0), /* Port A, Pin7 */ - EVSYS_CHMUX_PORTB_PIN0_gc = (0x58<<0), /* Port B, Pin0 */ - EVSYS_CHMUX_PORTB_PIN1_gc = (0x59<<0), /* Port B, Pin1 */ - EVSYS_CHMUX_PORTB_PIN2_gc = (0x5A<<0), /* Port B, Pin2 */ - EVSYS_CHMUX_PORTB_PIN3_gc = (0x5B<<0), /* Port B, Pin3 */ - EVSYS_CHMUX_PORTB_PIN4_gc = (0x5C<<0), /* Port B, Pin4 */ - EVSYS_CHMUX_PORTB_PIN5_gc = (0x5D<<0), /* Port B, Pin5 */ - EVSYS_CHMUX_PORTB_PIN6_gc = (0x5E<<0), /* Port B, Pin6 */ - EVSYS_CHMUX_PORTB_PIN7_gc = (0x5F<<0), /* Port B, Pin7 */ - EVSYS_CHMUX_PORTC_PIN0_gc = (0x60<<0), /* Port C, Pin0 */ - EVSYS_CHMUX_PORTC_PIN1_gc = (0x61<<0), /* Port C, Pin1 */ - EVSYS_CHMUX_PORTC_PIN2_gc = (0x62<<0), /* Port C, Pin2 */ - EVSYS_CHMUX_PORTC_PIN3_gc = (0x63<<0), /* Port C, Pin3 */ - EVSYS_CHMUX_PORTC_PIN4_gc = (0x64<<0), /* Port C, Pin4 */ - EVSYS_CHMUX_PORTC_PIN5_gc = (0x65<<0), /* Port C, Pin5 */ - EVSYS_CHMUX_PORTC_PIN6_gc = (0x66<<0), /* Port C, Pin6 */ - EVSYS_CHMUX_PORTC_PIN7_gc = (0x67<<0), /* Port C, Pin7 */ - EVSYS_CHMUX_PORTD_PIN0_gc = (0x68<<0), /* Port D, Pin0 */ - EVSYS_CHMUX_PORTD_PIN1_gc = (0x69<<0), /* Port D, Pin1 */ - EVSYS_CHMUX_PORTD_PIN2_gc = (0x6A<<0), /* Port D, Pin2 */ - EVSYS_CHMUX_PORTD_PIN3_gc = (0x6B<<0), /* Port D, Pin3 */ - EVSYS_CHMUX_PORTD_PIN4_gc = (0x6C<<0), /* Port D, Pin4 */ - EVSYS_CHMUX_PORTD_PIN5_gc = (0x6D<<0), /* Port D, Pin5 */ - EVSYS_CHMUX_PORTD_PIN6_gc = (0x6E<<0), /* Port D, Pin6 */ - EVSYS_CHMUX_PORTD_PIN7_gc = (0x6F<<0), /* Port D, Pin7 */ - EVSYS_CHMUX_PORTE_PIN0_gc = (0x70<<0), /* Port E, Pin0 */ - EVSYS_CHMUX_PORTE_PIN1_gc = (0x71<<0), /* Port E, Pin1 */ - EVSYS_CHMUX_PORTE_PIN2_gc = (0x72<<0), /* Port E, Pin2 */ - EVSYS_CHMUX_PORTE_PIN3_gc = (0x73<<0), /* Port E, Pin3 */ - EVSYS_CHMUX_PORTE_PIN4_gc = (0x74<<0), /* Port E, Pin4 */ - EVSYS_CHMUX_PORTE_PIN5_gc = (0x75<<0), /* Port E, Pin5 */ - EVSYS_CHMUX_PORTE_PIN6_gc = (0x76<<0), /* Port E, Pin6 */ - EVSYS_CHMUX_PORTE_PIN7_gc = (0x77<<0), /* Port E, Pin7 */ - EVSYS_CHMUX_PORTF_PIN0_gc = (0x78<<0), /* Port F, Pin0 */ - EVSYS_CHMUX_PORTF_PIN1_gc = (0x79<<0), /* Port F, Pin1 */ - EVSYS_CHMUX_PORTF_PIN2_gc = (0x7A<<0), /* Port F, Pin2 */ - EVSYS_CHMUX_PORTF_PIN3_gc = (0x7B<<0), /* Port F, Pin3 */ - EVSYS_CHMUX_PORTF_PIN4_gc = (0x7C<<0), /* Port F, Pin4 */ - EVSYS_CHMUX_PORTF_PIN5_gc = (0x7D<<0), /* Port F, Pin5 */ - EVSYS_CHMUX_PORTF_PIN6_gc = (0x7E<<0), /* Port F, Pin6 */ - EVSYS_CHMUX_PORTF_PIN7_gc = (0x7F<<0), /* Port F, Pin7 */ - EVSYS_CHMUX_PRESCALER_1_gc = (0x80<<0), /* Prescaler, divide by 1 */ - EVSYS_CHMUX_PRESCALER_2_gc = (0x81<<0), /* Prescaler, divide by 2 */ - EVSYS_CHMUX_PRESCALER_4_gc = (0x82<<0), /* Prescaler, divide by 4 */ - EVSYS_CHMUX_PRESCALER_8_gc = (0x83<<0), /* Prescaler, divide by 8 */ - EVSYS_CHMUX_PRESCALER_16_gc = (0x84<<0), /* Prescaler, divide by 16 */ - EVSYS_CHMUX_PRESCALER_32_gc = (0x85<<0), /* Prescaler, divide by 32 */ - EVSYS_CHMUX_PRESCALER_64_gc = (0x86<<0), /* Prescaler, divide by 64 */ - EVSYS_CHMUX_PRESCALER_128_gc = (0x87<<0), /* Prescaler, divide by 128 */ - EVSYS_CHMUX_PRESCALER_256_gc = (0x88<<0), /* Prescaler, divide by 256 */ - EVSYS_CHMUX_PRESCALER_512_gc = (0x89<<0), /* Prescaler, divide by 512 */ - EVSYS_CHMUX_PRESCALER_1024_gc = (0x8A<<0), /* Prescaler, divide by 1024 */ - EVSYS_CHMUX_PRESCALER_2048_gc = (0x8B<<0), /* Prescaler, divide by 2048 */ - EVSYS_CHMUX_PRESCALER_4096_gc = (0x8C<<0), /* Prescaler, divide by 4096 */ - EVSYS_CHMUX_PRESCALER_8192_gc = (0x8D<<0), /* Prescaler, divide by 8192 */ - EVSYS_CHMUX_PRESCALER_16384_gc = (0x8E<<0), /* Prescaler, divide by 16384 */ - EVSYS_CHMUX_PRESCALER_32768_gc = (0x8F<<0), /* Prescaler, divide by 32768 */ - EVSYS_CHMUX_TCC0_OVF_gc = (0xC0<<0), /* Timer/Counter C0 Overflow */ - EVSYS_CHMUX_TCC0_ERR_gc = (0xC1<<0), /* Timer/Counter C0 Error */ - EVSYS_CHMUX_TCC0_CCA_gc = (0xC4<<0), /* Timer/Counter C0 Compare or Capture A */ - EVSYS_CHMUX_TCC0_CCB_gc = (0xC5<<0), /* Timer/Counter C0 Compare or Capture B */ - EVSYS_CHMUX_TCC0_CCC_gc = (0xC6<<0), /* Timer/Counter C0 Compare or Capture C */ - EVSYS_CHMUX_TCC0_CCD_gc = (0xC7<<0), /* Timer/Counter C0 Compare or Capture D */ - EVSYS_CHMUX_TCC1_OVF_gc = (0xC8<<0), /* Timer/Counter C1 Overflow */ - EVSYS_CHMUX_TCC1_ERR_gc = (0xC9<<0), /* Timer/Counter C1 Error */ - EVSYS_CHMUX_TCC1_CCA_gc = (0xCC<<0), /* Timer/Counter C1 Compare or Capture A */ - EVSYS_CHMUX_TCC1_CCB_gc = (0xCD<<0), /* Timer/Counter C1 Compare or Capture B */ - EVSYS_CHMUX_TCD0_OVF_gc = (0xD0<<0), /* Timer/Counter D0 Overflow */ - EVSYS_CHMUX_TCD0_ERR_gc = (0xD1<<0), /* Timer/Counter D0 Error */ - EVSYS_CHMUX_TCD0_CCA_gc = (0xD4<<0), /* Timer/Counter D0 Compare or Capture A */ - EVSYS_CHMUX_TCD0_CCB_gc = (0xD5<<0), /* Timer/Counter D0 Compare or Capture B */ - EVSYS_CHMUX_TCD0_CCC_gc = (0xD6<<0), /* Timer/Counter D0 Compare or Capture C */ - EVSYS_CHMUX_TCD0_CCD_gc = (0xD7<<0), /* Timer/Counter D0 Compare or Capture D */ - EVSYS_CHMUX_TCD1_OVF_gc = (0xD8<<0), /* Timer/Counter D1 Overflow */ - EVSYS_CHMUX_TCD1_ERR_gc = (0xD9<<0), /* Timer/Counter D1 Error */ - EVSYS_CHMUX_TCD1_CCA_gc = (0xDC<<0), /* Timer/Counter D1 Compare or Capture A */ - EVSYS_CHMUX_TCD1_CCB_gc = (0xDD<<0), /* Timer/Counter D1 Compare or Capture B */ - EVSYS_CHMUX_TCE0_OVF_gc = (0xE0<<0), /* Timer/Counter E0 Overflow */ - EVSYS_CHMUX_TCE0_ERR_gc = (0xE1<<0), /* Timer/Counter E0 Error */ - EVSYS_CHMUX_TCE0_CCA_gc = (0xE4<<0), /* Timer/Counter E0 Compare or Capture A */ - EVSYS_CHMUX_TCE0_CCB_gc = (0xE5<<0), /* Timer/Counter E0 Compare or Capture B */ - EVSYS_CHMUX_TCE0_CCC_gc = (0xE6<<0), /* Timer/Counter E0 Compare or Capture C */ - EVSYS_CHMUX_TCE0_CCD_gc = (0xE7<<0), /* Timer/Counter E0 Compare or Capture D */ - EVSYS_CHMUX_TCE1_OVF_gc = (0xE8<<0), /* Timer/Counter E1 Overflow */ - EVSYS_CHMUX_TCE1_ERR_gc = (0xE9<<0), /* Timer/Counter E1 Error */ - EVSYS_CHMUX_TCE1_CCA_gc = (0xEC<<0), /* Timer/Counter E1 Compare or Capture A */ - EVSYS_CHMUX_TCE1_CCB_gc = (0xED<<0), /* Timer/Counter E1 Compare or Capture B */ - EVSYS_CHMUX_TCF0_OVF_gc = (0xF0<<0), /* Timer/Counter F0 Overflow */ - EVSYS_CHMUX_TCF0_ERR_gc = (0xF1<<0), /* Timer/Counter F0 Error */ - EVSYS_CHMUX_TCF0_CCA_gc = (0xF4<<0), /* Timer/Counter F0 Compare or Capture A */ - EVSYS_CHMUX_TCF0_CCB_gc = (0xF5<<0), /* Timer/Counter F0 Compare or Capture B */ - EVSYS_CHMUX_TCF0_CCC_gc = (0xF6<<0), /* Timer/Counter F0 Compare or Capture C */ - EVSYS_CHMUX_TCF0_CCD_gc = (0xF7<<0), /* Timer/Counter F0 Compare or Capture D */ - EVSYS_CHMUX_TCF1_OVF_gc = (0xF8<<0), /* Timer/Counter F1 Overflow */ - EVSYS_CHMUX_TCF1_ERR_gc = (0xF9<<0), /* Timer/Counter F1 Error */ - EVSYS_CHMUX_TCF1_CCA_gc = (0xFC<<0), /* Timer/Counter F1 Compare or Capture A */ - EVSYS_CHMUX_TCF1_CCB_gc = (0xFD<<0), /* Timer/Counter F1 Compare or Capture B */ -} EVSYS_CHMUX_t; - - -/* --------------------------------------------------------------------------- -NVM - Non Volatile Memory Controller --------------------------------------------------------------------------- -*/ - -/* Non-volatile Memory Controller */ -typedef struct NVM_struct -{ - register8_t ADDR0; /* Address Register 0 */ - register8_t ADDR1; /* Address Register 1 */ - register8_t ADDR2; /* Address Register 2 */ - register8_t reserved_0x03; - register8_t DATA0; /* Data Register 0 */ - register8_t DATA1; /* Data Register 1 */ - register8_t DATA2; /* Data Register 2 */ - register8_t reserved_0x07; - register8_t reserved_0x08; - register8_t reserved_0x09; - register8_t CMD; /* Command */ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t INTCTRL; /* Interrupt Control */ - register8_t reserved_0x0E; - register8_t STATUS; /* Status */ - register8_t LOCKBITS; /* Lock Bits */ -} NVM_t; - -/* --------------------------------------------------------------------------- -NVM - Non Volatile Memory Controller --------------------------------------------------------------------------- -*/ - -/* Lock Bits */ -typedef struct NVM_LOCKBITS_struct -{ - register8_t LOCKBITS; /* Lock Bits */ -} NVM_LOCKBITS_t; - -/* --------------------------------------------------------------------------- -NVM - Non Volatile Memory Controller --------------------------------------------------------------------------- -*/ - -/* Fuses */ -typedef struct NVM_FUSES_struct -{ - register8_t FUSEBYTE0; /* JTAG User ID */ - register8_t FUSEBYTE1; /* Watchdog Configuration */ - register8_t FUSEBYTE2; /* Reset Configuration */ - register8_t reserved_0x03; - register8_t FUSEBYTE4; /* Start-up Configuration */ - register8_t FUSEBYTE5; /* EESAVE and BOD Level */ -} NVM_FUSES_t; - -/* --------------------------------------------------------------------------- -NVM - Non Volatile Memory Controller --------------------------------------------------------------------------- -*/ - -/* Production Signatures */ -typedef struct NVM_PROD_SIGNATURES_struct -{ - register8_t RCOSC2M; /* RCOSC 2MHz Calibration Value */ - register8_t reserved_0x01; - register8_t RCOSC32K; /* RCOSC 32kHz Calibration Value */ - register8_t RCOSC32M; /* RCOSC 32MHz Calibration Value */ - register8_t reserved_0x04; - register8_t reserved_0x05; - register8_t reserved_0x06; - register8_t reserved_0x07; - register8_t LOTNUM0; /* Lot Number Byte 0, ASCII */ - register8_t LOTNUM1; /* Lot Number Byte 1, ASCII */ - register8_t LOTNUM2; /* Lot Number Byte 2, ASCII */ - register8_t LOTNUM3; /* Lot Number Byte 3, ASCII */ - register8_t LOTNUM4; /* Lot Number Byte 4, ASCII */ - register8_t LOTNUM5; /* Lot Number Byte 5, ASCII */ - register8_t reserved_0x0E; - register8_t reserved_0x0F; - register8_t WAFNUM; /* Wafer Number */ - register8_t reserved_0x11; - register8_t COORDX0; /* Wafer Coordinate X Byte 0 */ - register8_t COORDX1; /* Wafer Coordinate X Byte 1 */ - register8_t COORDY0; /* Wafer Coordinate Y Byte 0 */ - register8_t COORDY1; /* Wafer Coordinate Y Byte 1 */ - register8_t reserved_0x16; - register8_t reserved_0x17; - register8_t reserved_0x18; - register8_t reserved_0x19; - register8_t reserved_0x1A; - register8_t reserved_0x1B; - register8_t reserved_0x1C; - register8_t reserved_0x1D; - register8_t reserved_0x1E; - register8_t reserved_0x1F; - register8_t ADCACAL0; /* ADCA Calibration Byte 0 */ - register8_t ADCACAL1; /* ADCA Calibration Byte 1 */ - register8_t reserved_0x22; - register8_t reserved_0x23; - register8_t ADCBCAL0; /* ADCB Calibration Byte 0 */ - register8_t ADCBCAL1; /* ADCB Calibration Byte 1 */ - register8_t reserved_0x26; - register8_t reserved_0x27; - register8_t reserved_0x28; - register8_t reserved_0x29; - register8_t reserved_0x2A; - register8_t reserved_0x2B; - register8_t reserved_0x2C; - register8_t reserved_0x2D; - register8_t TEMPSENSE0; /* Temperature Sensor Calibration Byte 0 */ - register8_t TEMPSENSE1; /* Temperature Sensor Calibration Byte 0 */ - register8_t DACAOFFCAL; /* DACA Calibration Byte 0 */ - register8_t DACACAINCAL; /* DACA Calibration Byte 1 */ - register8_t DACBOFFCAL; /* DACB Calibration Byte 0 */ - register8_t DACBGAINCAL; /* DACB Calibration Byte 1 */ - register8_t reserved_0x34; - register8_t reserved_0x35; - register8_t reserved_0x36; - register8_t reserved_0x37; - register8_t reserved_0x38; - register8_t reserved_0x39; - register8_t reserved_0x3A; - register8_t reserved_0x3B; - register8_t reserved_0x3C; - register8_t reserved_0x3D; - register8_t reserved_0x3E; -} NVM_PROD_SIGNATURES_t; - -/* NVM Command */ -typedef enum NVM_CMD_enum -{ - NVM_CMD_NO_OPERATION_gc = (0x00<<0), /* Noop/Ordinary LPM */ - NVM_CMD_READ_CALIB_ROW_gc = (0x02<<0), /* Read calibration row */ - NVM_CMD_READ_USER_SIG_ROW_gc = (0x01<<0), /* Read user signature row */ - NVM_CMD_READ_EEPROM_gc = (0x06<<0), /* Read EEPROM */ - NVM_CMD_READ_FUSES_gc = (0x07<<0), /* Read fuse byte */ - NVM_CMD_WRITE_LOCK_BITS_gc = (0x08<<0), /* Write lock bits */ - NVM_CMD_ERASE_USER_SIG_ROW_gc = (0x18<<0), /* Erase user signature row */ - NVM_CMD_WRITE_USER_SIG_ROW_gc = (0x1A<<0), /* Write user signature row */ - NVM_CMD_ERASE_APP_gc = (0x20<<0), /* Erase Application Section */ - NVM_CMD_ERASE_APP_PAGE_gc = (0x22<<0), /* Erase Application Section page */ - NVM_CMD_LOAD_FLASH_BUFFER_gc = (0x23<<0), /* Load Flash page buffer */ - NVM_CMD_WRITE_APP_PAGE_gc = (0x24<<0), /* Write Application Section page */ - NVM_CMD_ERASE_WRITE_APP_PAGE_gc = (0x25<<0), /* Erase-and-write Application Section page */ - NVM_CMD_ERASE_FLASH_BUFFER_gc = (0x26<<0), /* Erase/flush Flash page buffer */ - NVM_CMD_ERASE_BOOT_PAGE_gc = (0x2A<<0), /* Erase Boot Section page */ - NVM_CMD_WRITE_BOOT_PAGE_gc = (0x2C<<0), /* Write Boot Section page */ - NVM_CMD_ERASE_WRITE_BOOT_PAGE_gc = (0x2D<<0), /* Erase-and-write Boot Section page */ - NVM_CMD_ERASE_EEPROM_gc = (0x30<<0), /* Erase EEPROM */ - NVM_CMD_ERASE_EEPROM_PAGE_gc = (0x32<<0), /* Erase EEPROM page */ - NVM_CMD_LOAD_EEPROM_BUFFER_gc = (0x33<<0), /* Load EEPROM page buffer */ - NVM_CMD_WRITE_EEPROM_PAGE_gc = (0x34<<0), /* Write EEPROM page */ - NVM_CMD_ERASE_WRITE_EEPROM_PAGE_gc = (0x35<<0), /* Erase-and-write EEPROM page */ - NVM_CMD_ERASE_EEPROM_BUFFER_gc = (0x36<<0), /* Erase/flush EEPROM page buffer */ - NVM_CMD_APP_CRC_gc = (0x38<<0), /* Generate Application section CRC */ - NVM_CMD_BOOT_CRC_gc = (0x39<<0), /* Generate Boot Section CRC */ - NVM_CMD_FLASH_RANGE_CRC_gc = (0x3A<<0), /* Generate Flash Range CRC */ -} NVM_CMD_t; - -/* SPM ready interrupt level */ -typedef enum NVM_SPMLVL_enum -{ - NVM_SPMLVL_OFF_gc = (0x00<<2), /* Interrupt disabled */ - NVM_SPMLVL_LO_gc = (0x01<<2), /* Low level */ - NVM_SPMLVL_MED_gc = (0x02<<2), /* Medium level */ - NVM_SPMLVL_HI_gc = (0x03<<2), /* High level */ -} NVM_SPMLVL_t; - -/* EEPROM ready interrupt level */ -typedef enum NVM_EELVL_enum -{ - NVM_EELVL_OFF_gc = (0x00<<0), /* Interrupt disabled */ - NVM_EELVL_LO_gc = (0x01<<0), /* Low level */ - NVM_EELVL_MED_gc = (0x02<<0), /* Medium level */ - NVM_EELVL_HI_gc = (0x03<<0), /* High level */ -} NVM_EELVL_t; - -/* Boot lock bits - boot setcion */ -typedef enum NVM_BLBB_enum -{ - NVM_BLBB_NOLOCK_gc = (0x03<<6), /* No locks */ - NVM_BLBB_WLOCK_gc = (0x02<<6), /* Write not allowed */ - NVM_BLBB_RLOCK_gc = (0x01<<6), /* Read not allowed */ - NVM_BLBB_RWLOCK_gc = (0x00<<6), /* Read and write not allowed */ -} NVM_BLBB_t; - -/* Boot lock bits - application section */ -typedef enum NVM_BLBA_enum -{ - NVM_BLBA_NOLOCK_gc = (0x03<<4), /* No locks */ - NVM_BLBA_WLOCK_gc = (0x02<<4), /* Write not allowed */ - NVM_BLBA_RLOCK_gc = (0x01<<4), /* Read not allowed */ - NVM_BLBA_RWLOCK_gc = (0x00<<4), /* Read and write not allowed */ -} NVM_BLBA_t; - -/* Boot lock bits - application table section */ -typedef enum NVM_BLBAT_enum -{ - NVM_BLBAT_NOLOCK_gc = (0x03<<2), /* No locks */ - NVM_BLBAT_WLOCK_gc = (0x02<<2), /* Write not allowed */ - NVM_BLBAT_RLOCK_gc = (0x01<<2), /* Read not allowed */ - NVM_BLBAT_RWLOCK_gc = (0x00<<2), /* Read and write not allowed */ -} NVM_BLBAT_t; - -/* Lock bits */ -typedef enum NVM_LB_enum -{ - NVM_LB_NOLOCK_gc = (0x03<<0), /* No locks */ - NVM_LB_WLOCK_gc = (0x02<<0), /* Write not allowed */ - NVM_LB_RWLOCK_gc = (0x00<<0), /* Read and write not allowed */ -} NVM_LB_t; - -/* Boot Loader Section Reset Vector */ -typedef enum BOOTRST_enum -{ - BOOTRST_BOOTLDR_gc = (0x00<<6), /* Boot Loader Reset */ - BOOTRST_APPLICATION_gc = (0x01<<6), /* Application Reset */ -} BOOTRST_t; - -/* BOD operation */ -typedef enum BOD_enum -{ - BOD_INSAMPLEDMODE_gc = (0x01<<2), /* BOD enabled in sampled mode */ - BOD_CONTINOUSLY_gc = (0x02<<2), /* BOD enabled continuously */ - BOD_DISABLED_gc = (0x03<<2), /* BOD Disabled */ -} BOD_t; - -/* Watchdog (Window) Timeout Period */ -typedef enum WD_enum -{ - WD_8CLK_gc = (0x00<<4), /* 8 cycles (8ms @ 3.3V) */ - WD_16CLK_gc = (0x01<<4), /* 16 cycles (16ms @ 3.3V) */ - WD_32CLK_gc = (0x02<<4), /* 32 cycles (32ms @ 3.3V) */ - WD_64CLK_gc = (0x03<<4), /* 64 cycles (64ms @ 3.3V) */ - WD_128CLK_gc = (0x04<<4), /* 128 cycles (0.125s @ 3.3V) */ - WD_256CLK_gc = (0x05<<4), /* 256 cycles (0.25s @ 3.3V) */ - WD_512CLK_gc = (0x06<<4), /* 512 cycles (0.5s @ 3.3V) */ - WD_1KCLK_gc = (0x07<<4), /* 1K cycles (1s @ 3.3V) */ - WD_2KCLK_gc = (0x08<<4), /* 2K cycles (2s @ 3.3V) */ - WD_4KCLK_gc = (0x09<<4), /* 4K cycles (4s @ 3.3V) */ - WD_8KCLK_gc = (0x0A<<4), /* 8K cycles (8s @ 3.3V) */ -} WD_t; - -/* Start-up Time */ -typedef enum SUT_enum -{ - SUT_0MS_gc = (0x03<<2), /* 0 ms */ - SUT_4MS_gc = (0x01<<2), /* 4 ms */ - SUT_64MS_gc = (0x00<<2), /* 64 ms */ -} SUT_t; - -/* Brown Out Detection Voltage Level */ -typedef enum BODLVL_enum -{ - BODLVL_1V6_gc = (0x07<<0), /* 1.6 V */ - BODLVL_1V8_gc = (0x06<<0), /* 1.8 V */ - BODLVL_2V0_gc = (0x05<<0), /* 2.0 V */ - BODLVL_2V2_gc = (0x04<<0), /* 2.2 V */ - BODLVL_2V4_gc = (0x03<<0), /* 2.4 V */ - BODLVL_2V7_gc = (0x02<<0), /* 2.7 V */ - BODLVL_2V9_gc = (0x01<<0), /* 2.9 V */ - BODLVL_3V2_gc = (0x00<<0), /* 3.2 V */ -} BODLVL_t; - - -/* --------------------------------------------------------------------------- -AC - Analog Comparator --------------------------------------------------------------------------- -*/ - -/* Analog Comparator */ -typedef struct AC_struct -{ - register8_t AC0CTRL; /* Comparator 0 Control */ - register8_t AC1CTRL; /* Comparator 1 Control */ - register8_t AC0MUXCTRL; /* Comparator 0 MUX Control */ - register8_t AC1MUXCTRL; /* Comparator 1 MUX Control */ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t WINCTRL; /* Window Mode Control */ - register8_t STATUS; /* Status */ -} AC_t; - -/* Interrupt mode */ -typedef enum AC_INTMODE_enum -{ - AC_INTMODE_BOTHEDGES_gc = (0x00<<6), /* Interrupt on both edges */ - AC_INTMODE_FALLING_gc = (0x02<<6), /* Interrupt on falling edge */ - AC_INTMODE_RISING_gc = (0x03<<6), /* Interrupt on rising edge */ -} AC_INTMODE_t; - -/* Interrupt level */ -typedef enum AC_INTLVL_enum -{ - AC_INTLVL_OFF_gc = (0x00<<4), /* Interrupt disabled */ - AC_INTLVL_LO_gc = (0x01<<4), /* Low level */ - AC_INTLVL_MED_gc = (0x02<<4), /* Medium level */ - AC_INTLVL_HI_gc = (0x03<<4), /* High level */ -} AC_INTLVL_t; - -/* Hysteresis mode selection */ -typedef enum AC_HYSMODE_enum -{ - AC_HYSMODE_NO_gc = (0x00<<1), /* No hysteresis */ - AC_HYSMODE_SMALL_gc = (0x01<<1), /* Small hysteresis */ - AC_HYSMODE_LARGE_gc = (0x02<<1), /* Large hysteresis */ -} AC_HYSMODE_t; - -/* Positive input multiplexer selection */ -typedef enum AC_MUXPOS_enum -{ - AC_MUXPOS_PIN0_gc = (0x00<<3), /* Pin 0 */ - AC_MUXPOS_PIN1_gc = (0x01<<3), /* Pin 1 */ - AC_MUXPOS_PIN2_gc = (0x02<<3), /* Pin 2 */ - AC_MUXPOS_PIN3_gc = (0x03<<3), /* Pin 3 */ - AC_MUXPOS_PIN4_gc = (0x04<<3), /* Pin 4 */ - AC_MUXPOS_PIN5_gc = (0x05<<3), /* Pin 5 */ - AC_MUXPOS_PIN6_gc = (0x06<<3), /* Pin 6 */ - AC_MUXPOS_DAC_gc = (0x07<<3), /* DAC output */ -} AC_MUXPOS_t; - -/* Negative input multiplexer selection */ -typedef enum AC_MUXNEG_enum -{ - AC_MUXNEG_PIN0_gc = (0x00<<0), /* Pin 0 */ - AC_MUXNEG_PIN1_gc = (0x01<<0), /* Pin 1 */ - AC_MUXNEG_PIN3_gc = (0x02<<0), /* Pin 3 */ - AC_MUXNEG_PIN5_gc = (0x03<<0), /* Pin 5 */ - AC_MUXNEG_PIN7_gc = (0x04<<0), /* Pin 7 */ - AC_MUXNEG_DAC_gc = (0x05<<0), /* DAC output */ - AC_MUXNEG_BANDGAP_gc = (0x06<<0), /* Bandgap Reference */ - AC_MUXNEG_SCALER_gc = (0x07<<0), /* Internal voltage scaler */ -} AC_MUXNEG_t; - -/* Windows interrupt mode */ -typedef enum AC_WINTMODE_enum -{ - AC_WINTMODE_ABOVE_gc = (0x00<<2), /* Interrupt on above window */ - AC_WINTMODE_INSIDE_gc = (0x01<<2), /* Interrupt on inside window */ - AC_WINTMODE_BELOW_gc = (0x02<<2), /* Interrupt on below window */ - AC_WINTMODE_OUTSIDE_gc = (0x03<<2), /* Interrupt on outside window */ -} AC_WINTMODE_t; - -/* Window interrupt level */ -typedef enum AC_WINTLVL_enum -{ - AC_WINTLVL_OFF_gc = (0x00<<0), /* Interrupt disabled */ - AC_WINTLVL_LO_gc = (0x01<<0), /* Low priority */ - AC_WINTLVL_MED_gc = (0x02<<0), /* Medium priority */ - AC_WINTLVL_HI_gc = (0x03<<0), /* High priority */ -} AC_WINTLVL_t; - -/* Window mode state */ -typedef enum AC_WSTATE_enum -{ - AC_WSTATE_ABOVE_gc = (0x00<<6), /* Signal above window */ - AC_WSTATE_INSIDE_gc = (0x01<<6), /* Signal inside window */ - AC_WSTATE_BELOW_gc = (0x02<<6), /* Signal below window */ -} AC_WSTATE_t; - - -/* --------------------------------------------------------------------------- -ADC - Analog/Digital Converter --------------------------------------------------------------------------- -*/ - -/* ADC Channel */ -typedef struct ADC_CH_struct -{ - register8_t CTRL; /* Control Register */ - register8_t MUXCTRL; /* MUX Control */ - register8_t INTCTRL; /* Channel Interrupt Control */ - register8_t INTFLAGS; /* Interrupt Flags */ - _WORDREGISTER(RES); /* Channel Result */ - register8_t reserved_0x6; - register8_t reserved_0x7; -} ADC_CH_t; - -/* --------------------------------------------------------------------------- -ADC - Analog/Digital Converter --------------------------------------------------------------------------- -*/ - -/* Analog-to-Digital Converter */ -typedef struct ADC_struct -{ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t REFCTRL; /* Reference Control */ - register8_t EVCTRL; /* Event Control */ - register8_t PRESCALER; /* Clock Prescaler */ - register8_t CALCTRL; /* Calibration Control Register */ - register8_t INTFLAGS; /* Interrupt Flags */ - register8_t reserved_0x07; - register8_t reserved_0x08; - register8_t reserved_0x09; - register8_t reserved_0x0A; - register8_t reserved_0x0B; - register8_t CALIB; /* Calibration Value */ - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t reserved_0x0F; - _WORDREGISTER(CH0RES); /* Channel 0 Result */ - _WORDREGISTER(CH1RES); /* Channel 1 Result */ - _WORDREGISTER(CH2RES); /* Channel 2 Result */ - _WORDREGISTER(CH3RES); /* Channel 3 Result */ - _WORDREGISTER(CMP); /* Compare Value */ - register8_t reserved_0x1A; - register8_t reserved_0x1B; - register8_t reserved_0x1C; - register8_t reserved_0x1D; - register8_t reserved_0x1E; - register8_t reserved_0x1F; - ADC_CH_t CH0; /* ADC Channel 0 */ - ADC_CH_t CH1; /* ADC Channel 1 */ - ADC_CH_t CH2; /* ADC Channel 2 */ - ADC_CH_t CH3; /* ADC Channel 3 */ -} ADC_t; - -/* Positive input multiplexer selection */ -typedef enum ADC_CH_MUXPOS_enum -{ - ADC_CH_MUXPOS_PIN0_gc = (0x00<<3), /* Input pin 0 */ - ADC_CH_MUXPOS_PIN1_gc = (0x01<<3), /* Input pin 1 */ - ADC_CH_MUXPOS_PIN2_gc = (0x02<<3), /* Input pin 2 */ - ADC_CH_MUXPOS_PIN3_gc = (0x03<<3), /* Input pin 3 */ - ADC_CH_MUXPOS_PIN4_gc = (0x04<<3), /* Input pin 4 */ - ADC_CH_MUXPOS_PIN5_gc = (0x05<<3), /* Input pin 5 */ - ADC_CH_MUXPOS_PIN6_gc = (0x06<<3), /* Input pin 6 */ - ADC_CH_MUXPOS_PIN7_gc = (0x07<<3), /* Input pin 7 */ -} ADC_CH_MUXPOS_t; - -/* Internal input multiplexer selections */ -typedef enum ADC_CH_MUXINT_enum -{ - ADC_CH_MUXINT_TEMP_gc = (0x00<<3), /* Temperature Reference */ - ADC_CH_MUXINT_BANDGAP_gc = (0x01<<3), /* Bandgap Reference */ - ADC_CH_MUXINT_SCALEDVCC_gc = (0x02<<3), /* 1/10 scaled VCC */ - ADC_CH_MUXINT_DAC_gc = (0x03<<3), /* DAC output */ -} ADC_CH_MUXINT_t; - -/* Negative input multiplexer selection */ -typedef enum ADC_CH_MUXNEG_enum -{ - ADC_CH_MUXNEG_PIN0_gc = (0x00<<0), /* Input pin 0 */ - ADC_CH_MUXNEG_PIN1_gc = (0x01<<0), /* Input pin 1 */ - ADC_CH_MUXNEG_PIN2_gc = (0x02<<0), /* Input pin 2 */ - ADC_CH_MUXNEG_PIN3_gc = (0x03<<0), /* Input pin 3 */ - ADC_CH_MUXNEG_PIN4_gc = (0x04<<0), /* Input pin 4 */ - ADC_CH_MUXNEG_PIN5_gc = (0x05<<0), /* Input pin 5 */ - ADC_CH_MUXNEG_PIN6_gc = (0x06<<0), /* Input pin 6 */ - ADC_CH_MUXNEG_PIN7_gc = (0x07<<0), /* Input pin 7 */ -} ADC_CH_MUXNEG_t; - -/* Input mode */ -typedef enum ADC_CH_INPUTMODE_enum -{ - ADC_CH_INPUTMODE_INTERNAL_gc = (0x00<<0), /* Internal inputs, no gain */ - ADC_CH_INPUTMODE_SINGLEENDED_gc = (0x01<<0), /* Single-ended input, no gain */ - ADC_CH_INPUTMODE_DIFF_gc = (0x02<<0), /* Differential input, no gain */ - ADC_CH_INPUTMODE_DIFFWGAIN_gc = (0x03<<0), /* Differential input, with gain */ -} ADC_CH_INPUTMODE_t; - -/* Gain factor */ -typedef enum ADC_CH_GAIN_enum -{ - ADC_CH_GAIN_1X_gc = (0x00<<2), /* 1x gain */ - ADC_CH_GAIN_2X_gc = (0x01<<2), /* 2x gain */ - ADC_CH_GAIN_4X_gc = (0x02<<2), /* 4x gain */ - ADC_CH_GAIN_8X_gc = (0x03<<2), /* 8x gain */ - ADC_CH_GAIN_16X_gc = (0x04<<2), /* 16x gain */ - ADC_CH_GAIN_32X_gc = (0x05<<2), /* 32x gain */ - ADC_CH_GAIN_64X_gc = (0x06<<2), /* 64x gain */ -} ADC_CH_GAIN_t; - -/* Conversion result resolution */ -typedef enum ADC_RESOLUTION_enum -{ - ADC_RESOLUTION_12BIT_gc = (0x00<<1), /* 12-bit right-adjusted result */ - ADC_RESOLUTION_8BIT_gc = (0x02<<1), /* 8-bit right-adjusted result */ - ADC_RESOLUTION_LEFT12BIT_gc = (0x03<<1), /* 12-bit left-adjusted result */ -} ADC_RESOLUTION_t; - -/* Voltage reference selection */ -typedef enum ADC_REFSEL_enum -{ - ADC_REFSEL_INT1V_gc = (0x00<<4), /* Internal 1V */ - ADC_REFSEL_VCC_gc = (0x01<<4), /* Internal VCC / 1.6V */ - ADC_REFSEL_AREFA_gc = (0x02<<4), /* External reference on PORT A */ - ADC_REFSEL_AREFB_gc = (0x03<<4), /* External reference on PORT B */ -} ADC_REFSEL_t; - -/* Channel sweep selection */ -typedef enum ADC_SWEEP_enum -{ - ADC_SWEEP_0_gc = (0x00<<6), /* ADC Channel 0 */ - ADC_SWEEP_01_gc = (0x01<<6), /* ADC Channel 0,1 */ - ADC_SWEEP_012_gc = (0x02<<6), /* ADC Channel 0,1,2 */ - ADC_SWEEP_0123_gc = (0x03<<6), /* ADC Channel 0,1,2,3 */ -} ADC_SWEEP_t; - -/* Event channel input selection */ -typedef enum ADC_EVSEL_enum -{ - ADC_EVSEL_0123_gc = (0x00<<3), /* Event Channel 0,1,2,3 */ - ADC_EVSEL_1234_gc = (0x01<<3), /* Event Channel 1,2,3,4 */ - ADC_EVSEL_2345_gc = (0x02<<3), /* Event Channel 2,3,4,5 */ - ADC_EVSEL_3456_gc = (0x03<<3), /* Event Channel 3,4,5,6 */ - ADC_EVSEL_4567_gc = (0x04<<3), /* Event Channel 4,5,6,7 */ - ADC_EVSEL_567_gc = (0x05<<3), /* Event Channel 5,6,7 */ - ADC_EVSEL_67_gc = (0x06<<3), /* Event Channel 6,7 */ - ADC_EVSEL_7_gc = (0x07<<3), /* Event Channel 7 */ -} ADC_EVSEL_t; - -/* Event action selection */ -typedef enum ADC_EVACT_enum -{ - ADC_EVACT_NONE_gc = (0x00<<0), /* No event action */ - ADC_EVACT_CH0_gc = (0x01<<0), /* First event triggers channel 0 */ - ADC_EVACT_CH01_gc = (0x02<<0), /* First two events trigger channel 0,1 */ - ADC_EVACT_CH012_gc = (0x03<<0), /* First three events trigger channel 0,1,2 */ - ADC_EVACT_CH0123_gc = (0x04<<0), /* Events trigger channel 0,1,2,3 */ - ADC_EVACT_SWEEP_gc = (0x05<<0), /* First event triggers sweep */ - ADC_EVACT_SYNCHSWEEP_gc = (0x06<<0), /* First event triggers synchronized sweep */ -} ADC_EVACT_t; - -/* Interupt mode */ -typedef enum ADC_CH_INTMODE_enum -{ - ADC_CH_INTMODE_COMPLETE_gc = (0x00<<2), /* Interrupt on conversion complete */ - ADC_CH_INTMODE_BELOW_gc = (0x01<<2), /* Interrupt on result below compare value */ - ADC_CH_INTMODE_ABOVE_gc = (0x03<<2), /* Interrupt on result above compare value */ -} ADC_CH_INTMODE_t; - -/* Interrupt level */ -typedef enum ADC_CH_INTLVL_enum -{ - ADC_CH_INTLVL_OFF_gc = (0x00<<0), /* Interrupt disabled */ - ADC_CH_INTLVL_LO_gc = (0x01<<0), /* Low level */ - ADC_CH_INTLVL_MED_gc = (0x02<<0), /* Medium level */ - ADC_CH_INTLVL_HI_gc = (0x03<<0), /* High level */ -} ADC_CH_INTLVL_t; - -/* DMA request selection */ -typedef enum ADC_DMASEL_enum -{ - ADC_DMASEL_OFF_gc = (0x00<<5), /* Combined DMA request OFF */ - ADC_DMASEL_CH01_gc = (0x01<<5), /* ADC Channel 0 or 1 */ - ADC_DMASEL_CH012_gc = (0x02<<5), /* ADC Channel 0 or 1 or 2 */ - ADC_DMASEL_CH0123_gc = (0x03<<5), /* ADC Channel 0 or 1 or 2 or 3 */ -} ADC_DMASEL_t; - -/* Clock prescaler */ -typedef enum ADC_PRESCALER_enum -{ - ADC_PRESCALER_DIV4_gc = (0x00<<0), /* Divide clock by 4 */ - ADC_PRESCALER_DIV8_gc = (0x01<<0), /* Divide clock by 8 */ - ADC_PRESCALER_DIV16_gc = (0x02<<0), /* Divide clock by 16 */ - ADC_PRESCALER_DIV32_gc = (0x03<<0), /* Divide clock by 32 */ - ADC_PRESCALER_DIV64_gc = (0x04<<0), /* Divide clock by 64 */ - ADC_PRESCALER_DIV128_gc = (0x05<<0), /* Divide clock by 128 */ - ADC_PRESCALER_DIV256_gc = (0x06<<0), /* Divide clock by 256 */ - ADC_PRESCALER_DIV512_gc = (0x07<<0), /* Divide clock by 512 */ -} ADC_PRESCALER_t; - - -/* --------------------------------------------------------------------------- -DAC - Digital/Analog Converter --------------------------------------------------------------------------- -*/ - -/* Digital-to-Analog Converter */ -typedef struct DAC_struct -{ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t CTRLC; /* Control Register C */ - register8_t EVCTRL; /* Event Input Control */ - register8_t TIMCTRL; /* Timing Control */ - register8_t STATUS; /* Status */ - register8_t reserved_0x06; - register8_t reserved_0x07; - register8_t GAINCAL; /* Gain Calibration */ - register8_t OFFSETCAL; /* Offset Calibration */ - register8_t reserved_0x0A; - register8_t reserved_0x0B; - register8_t reserved_0x0C; - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t reserved_0x0F; - register8_t reserved_0x10; - register8_t reserved_0x11; - register8_t reserved_0x12; - register8_t reserved_0x13; - register8_t reserved_0x14; - register8_t reserved_0x15; - register8_t reserved_0x16; - register8_t reserved_0x17; - _WORDREGISTER(CH0DATA); /* Channel 0 Data */ - _WORDREGISTER(CH1DATA); /* Channel 1 Data */ -} DAC_t; - -/* Output channel selection */ -typedef enum DAC_CHSEL_enum -{ - DAC_CHSEL_SINGLE_gc = (0x00<<5), /* Single channel operation (Channel A only) */ - DAC_CHSEL_DUAL_gc = (0x02<<5), /* Dual channel operation (S/H on both channels) */ -} DAC_CHSEL_t; - -/* Reference voltage selection */ -typedef enum DAC_REFSEL_enum -{ - DAC_REFSEL_INT1V_gc = (0x00<<3), /* Internal 1V */ - DAC_REFSEL_AVCC_gc = (0x01<<3), /* Analog supply voltage */ - DAC_REFSEL_AREFA_gc = (0x02<<3), /* External reference on AREF on PORTA */ - DAC_REFSEL_AREFB_gc = (0x03<<3), /* External reference on AREF on PORTB */ -} DAC_REFSEL_t; - -/* Event channel selection */ -typedef enum DAC_EVSEL_enum -{ - DAC_EVSEL_0_gc = (0x00<<0), /* Event Channel 0 */ - DAC_EVSEL_1_gc = (0x01<<0), /* Event Channel 1 */ - DAC_EVSEL_2_gc = (0x02<<0), /* Event Channel 2 */ - DAC_EVSEL_3_gc = (0x03<<0), /* Event Channel 3 */ - DAC_EVSEL_4_gc = (0x04<<0), /* Event Channel 4 */ - DAC_EVSEL_5_gc = (0x05<<0), /* Event Channel 5 */ - DAC_EVSEL_6_gc = (0x06<<0), /* Event Channel 6 */ - DAC_EVSEL_7_gc = (0x07<<0), /* Event Channel 7 */ -} DAC_EVSEL_t; - -/* Conversion interval */ -typedef enum DAC_CONINTVAL_enum -{ - DAC_CONINTVAL_1CLK_gc = (0x00<<4), /* 1 CLK / 2 CLK in S/H mode */ - DAC_CONINTVAL_2CLK_gc = (0x01<<4), /* 2 CLK / 3 CLK in S/H mode */ - DAC_CONINTVAL_4CLK_gc = (0x02<<4), /* 4 CLK / 6 CLK in S/H mode */ - DAC_CONINTVAL_8CLK_gc = (0x03<<4), /* 8 CLK / 12 CLK in S/H mode */ - DAC_CONINTVAL_16CLK_gc = (0x04<<4), /* 16 CLK / 24 CLK in S/H mode */ - DAC_CONINTVAL_32CLK_gc = (0x05<<4), /* 32 CLK / 48 CLK in S/H mode */ - DAC_CONINTVAL_64CLK_gc = (0x06<<4), /* 64 CLK / 96 CLK in S/H mode */ - DAC_CONINTVAL_128CLK_gc = (0x07<<4), /* 128 CLK / 192 CLK in S/H mode */ -} DAC_CONINTVAL_t; - -/* Refresh rate */ -typedef enum DAC_REFRESH_enum -{ - DAC_REFRESH_16CLK_gc = (0x00<<0), /* 16 CLK */ - DAC_REFRESH_32CLK_gc = (0x01<<0), /* 32 CLK */ - DAC_REFRESH_64CLK_gc = (0x02<<0), /* 64 CLK */ - DAC_REFRESH_128CLK_gc = (0x03<<0), /* 128 CLK */ - DAC_REFRESH_256CLK_gc = (0x04<<0), /* 256 CLK */ - DAC_REFRESH_512CLK_gc = (0x05<<0), /* 512 CLK */ - DAC_REFRESH_1024CLK_gc = (0x06<<0), /* 1024 CLK */ - DAC_REFRESH_2048CLK_gc = (0x07<<0), /* 2048 CLK */ - DAC_REFRESH_4086CLK_gc = (0x08<<0), /* 4096 CLK */ - DAC_REFRESH_8192CLK_gc = (0x09<<0), /* 8192 CLK */ - DAC_REFRESH_16384CLK_gc = (0x0A<<0), /* 16384 CLK */ - DAC_REFRESH_32768CLK_gc = (0x0B<<0), /* 32768 CLK */ - DAC_REFRESH_65536CLK_gc = (0x0C<<0), /* 65536 CLK */ - DAC_REFRESH_OFF_gc = (0x0F<<0), /* Auto refresh OFF */ -} DAC_REFRESH_t; - - -/* --------------------------------------------------------------------------- -RTC - Real-Time Clounter --------------------------------------------------------------------------- -*/ - -/* Real-Time Counter */ -typedef struct RTC_struct -{ - register8_t CTRL; /* Control Register */ - register8_t STATUS; /* Status Register */ - register8_t INTCTRL; /* Interrupt Control Register */ - register8_t INTFLAGS; /* Interrupt Flags */ - register8_t TEMP; /* Temporary register */ - register8_t reserved_0x05; - register8_t reserved_0x06; - register8_t reserved_0x07; - _WORDREGISTER(CNT); /* Count Register */ - _WORDREGISTER(PER); /* Period Register */ - _WORDREGISTER(COMP); /* Compare Register */ -} RTC_t; - -/* Prescaler Factor */ -typedef enum RTC_PRESCALER_enum -{ - RTC_PRESCALER_OFF_gc = (0x00<<0), /* RTC Off */ - RTC_PRESCALER_DIV1_gc = (0x01<<0), /* RTC Clock */ - RTC_PRESCALER_DIV2_gc = (0x02<<0), /* RTC Clock / 2 */ - RTC_PRESCALER_DIV8_gc = (0x03<<0), /* RTC Clock / 8 */ - RTC_PRESCALER_DIV16_gc = (0x04<<0), /* RTC Clock / 16 */ - RTC_PRESCALER_DIV64_gc = (0x05<<0), /* RTC Clock / 64 */ - RTC_PRESCALER_DIV256_gc = (0x06<<0), /* RTC Clock / 256 */ - RTC_PRESCALER_DIV1024_gc = (0x07<<0), /* RTC Clock / 1024 */ -} RTC_PRESCALER_t; - -/* Compare Interrupt level */ -typedef enum RTC_COMPINTLVL_enum -{ - RTC_COMPINTLVL_OFF_gc = (0x00<<2), /* Interrupt Disabled */ - RTC_COMPINTLVL_LO_gc = (0x01<<2), /* Low Level */ - RTC_COMPINTLVL_MED_gc = (0x02<<2), /* Medium Level */ - RTC_COMPINTLVL_HI_gc = (0x03<<2), /* High Level */ -} RTC_COMPINTLVL_t; - -/* Overflow Interrupt level */ -typedef enum RTC_OVFINTLVL_enum -{ - RTC_OVFINTLVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - RTC_OVFINTLVL_LO_gc = (0x01<<0), /* Low Level */ - RTC_OVFINTLVL_MED_gc = (0x02<<0), /* Medium Level */ - RTC_OVFINTLVL_HI_gc = (0x03<<0), /* High Level */ -} RTC_OVFINTLVL_t; - - -/* --------------------------------------------------------------------------- -EBI - External Bus Interface --------------------------------------------------------------------------- -*/ - -/* EBI Chip Select Module */ -typedef struct EBI_CS_struct -{ - register8_t CTRLA; /* Chip Select Control Register A */ - register8_t CTRLB; /* Chip Select Control Register B */ - _WORDREGISTER(BASEADDR); /* Chip Select Base Address */ -} EBI_CS_t; - -/* --------------------------------------------------------------------------- -EBI - External Bus Interface --------------------------------------------------------------------------- -*/ - -/* External Bus Interface */ -typedef struct EBI_struct -{ - register8_t CTRL; /* Control */ - register8_t SDRAMCTRLA; /* SDRAM Control Register A */ - register8_t reserved_0x02; - register8_t reserved_0x03; - _WORDREGISTER(REFRESH); /* SDRAM Refresh Period */ - _WORDREGISTER(INITDLY); /* SDRAM Initialization Delay */ - register8_t SDRAMCTRLB; /* SDRAM Control Register B */ - register8_t SDRAMCTRLC; /* SDRAM Control Register C */ - register8_t reserved_0x0A; - register8_t reserved_0x0B; - register8_t reserved_0x0C; - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t reserved_0x0F; - EBI_CS_t CS0; /* Chip Select 0 */ - EBI_CS_t CS1; /* Chip Select 1 */ - EBI_CS_t CS2; /* Chip Select 2 */ - EBI_CS_t CS3; /* Chip Select 3 */ -} EBI_t; - -/* Chip Select adress space */ -typedef enum EBI_CS_ASPACE_enum -{ - EBI_CS_ASPACE_256B_gc = (0x00<<2), /* 256 bytes */ - EBI_CS_ASPACE_512B_gc = (0x01<<2), /* 512 bytes */ - EBI_CS_ASPACE_1KB_gc = (0x02<<2), /* 1K bytes */ - EBI_CS_ASPACE_2KB_gc = (0x03<<2), /* 2K bytes */ - EBI_CS_ASPACE_4KB_gc = (0x04<<2), /* 4K bytes */ - EBI_CS_ASPACE_8KB_gc = (0x05<<2), /* 8K bytes */ - EBI_CS_ASPACE_16KB_gc = (0x06<<2), /* 16K bytes */ - EBI_CS_ASPACE_32KB_gc = (0x07<<2), /* 32K bytes */ - EBI_CS_ASPACE_64KB_gc = (0x08<<2), /* 64K bytes */ - EBI_CS_ASPACE_128KB_gc = (0x09<<2), /* 128K bytes */ - EBI_CS_ASPACE_256KB_gc = (0x0A<<2), /* 256K bytes */ - EBI_CS_ASPACE_512KB_gc = (0x0B<<2), /* 512K bytes */ - EBI_CS_ASPACE_1MB_gc = (0x0C<<2), /* 1M bytes */ - EBI_CS_ASPACE_2MB_gc = (0x0D<<2), /* 2M bytes */ - EBI_CS_ASPACE_4MB_gc = (0x0E<<2), /* 4M bytes */ - EBI_CS_ASPACE_8MB_gc = (0x0F<<2), /* 8M bytes */ - EBI_CS_ASPACE_16M_gc = (0x10<<2), /* 16M bytes */ -} EBI_CS_ASPACE_t; - -/* */ -typedef enum EBI_CS_SRWS_enum -{ - EBI_CS_SRWS_0CLK_gc = (0x00<<0), /* 0 cycles */ - EBI_CS_SRWS_1CLK_gc = (0x01<<0), /* 1 cycle */ - EBI_CS_SRWS_2CLK_gc = (0x02<<0), /* 2 cycles */ - EBI_CS_SRWS_3CLK_gc = (0x03<<0), /* 3 cycles */ - EBI_CS_SRWS_4CLK_gc = (0x04<<0), /* 4 cycles */ - EBI_CS_SRWS_5CLK_gc = (0x05<<0), /* 5 cycle */ - EBI_CS_SRWS_6CLK_gc = (0x06<<0), /* 6 cycles */ - EBI_CS_SRWS_7CLK_gc = (0x07<<0), /* 7 cycles */ -} EBI_CS_SRWS_t; - -/* Chip Select address mode */ -typedef enum EBI_CS_MODE_enum -{ - EBI_CS_MODE_DISABLED_gc = (0x00<<0), /* Chip Select Disabled */ - EBI_CS_MODE_SRAM_gc = (0x01<<0), /* Chip Select in SRAM mode */ - EBI_CS_MODE_LPC_gc = (0x02<<0), /* Chip Select in SRAM LPC mode */ - EBI_CS_MODE_SDRAM_gc = (0x03<<0), /* Chip Select in SDRAM mode */ -} EBI_CS_MODE_t; - -/* Chip Select SDRAM mode */ -typedef enum EBI_CS_SDMODE_enum -{ - EBI_CS_SDMODE_NORMAL_gc = (0x00<<0), /* Normal mode */ - EBI_CS_SDMODE_LOAD_gc = (0x01<<0), /* Load Mode Register command mode */ -} EBI_CS_SDMODE_t; - -/* */ -typedef enum EBI_SDDATAW_enum -{ - EBI_SDDATAW_4BIT_gc = (0x00<<6), /* 4-bit data bus */ - EBI_SDDATAW_8BIT_gc = (0x01<<6), /* 8-bit data bus */ -} EBI_SDDATAW_t; - -/* */ -typedef enum EBI_LPCMODE_enum -{ - EBI_LPCMODE_ALE1_gc = (0x00<<4), /* Data muxed with addr byte 0 */ - EBI_LPCMODE_ALE12_gc = (0x02<<4), /* Data muxed with addr byte 0 and 1 */ -} EBI_LPCMODE_t; - -/* */ -typedef enum EBI_SRMODE_enum -{ - EBI_SRMODE_ALE1_gc = (0x00<<2), /* Addr byte 0 muxed with 1 */ - EBI_SRMODE_ALE2_gc = (0x01<<2), /* Addr byte 0 muxed with 2 */ - EBI_SRMODE_ALE12_gc = (0x02<<2), /* Addr byte 0 muxed with 1 and 2 */ - EBI_SRMODE_NOALE_gc = (0x03<<2), /* No addr muxing */ -} EBI_SRMODE_t; - -/* */ -typedef enum EBI_IFMODE_enum -{ - EBI_IFMODE_DISABLED_gc = (0x00<<0), /* EBI Disabled */ - EBI_IFMODE_3PORT_gc = (0x01<<0), /* 3-port mode */ - EBI_IFMODE_4PORT_gc = (0x02<<0), /* 4-port mode */ - EBI_IFMODE_2PORT_gc = (0x03<<0), /* 2-port mode */ -} EBI_IFMODE_t; - -/* */ -typedef enum EBI_SDCOL_enum -{ - EBI_SDCOL_8BIT_gc = (0x00<<0), /* 8 column bits */ - EBI_SDCOL_9BIT_gc = (0x01<<0), /* 9 column bits */ - EBI_SDCOL_10BIT_gc = (0x02<<0), /* 10 column bits */ - EBI_SDCOL_11BIT_gc = (0x03<<0), /* 11 column bits */ -} EBI_SDCOL_t; - -/* */ -typedef enum EBI_MRDLY_enum -{ - EBI_MRDLY_0CLK_gc = (0x00<<6), /* 0 cycles */ - EBI_MRDLY_1CLK_gc = (0x01<<6), /* 1 cycle */ - EBI_MRDLY_2CLK_gc = (0x02<<6), /* 2 cycles */ - EBI_MRDLY_3CLK_gc = (0x03<<6), /* 3 cycles */ -} EBI_MRDLY_t; - -/* */ -typedef enum EBI_ROWCYCDLY_enum -{ - EBI_ROWCYCDLY_0CLK_gc = (0x00<<3), /* 0 cycles */ - EBI_ROWCYCDLY_1CLK_gc = (0x01<<3), /* 1 cycle */ - EBI_ROWCYCDLY_2CLK_gc = (0x02<<3), /* 2 cycles */ - EBI_ROWCYCDLY_3CLK_gc = (0x03<<3), /* 3 cycles */ - EBI_ROWCYCDLY_4CLK_gc = (0x04<<3), /* 4 cycles */ - EBI_ROWCYCDLY_5CLK_gc = (0x05<<3), /* 5 cycle */ - EBI_ROWCYCDLY_6CLK_gc = (0x06<<3), /* 6 cycles */ - EBI_ROWCYCDLY_7CLK_gc = (0x07<<3), /* 7 cycles */ -} EBI_ROWCYCDLY_t; - -/* */ -typedef enum EBI_RPDLY_enum -{ - EBI_RPDLY_0CLK_gc = (0x00<<0), /* 0 cycles */ - EBI_RPDLY_1CLK_gc = (0x01<<0), /* 1 cycle */ - EBI_RPDLY_2CLK_gc = (0x02<<0), /* 2 cycles */ - EBI_RPDLY_3CLK_gc = (0x03<<0), /* 3 cycles */ - EBI_RPDLY_4CLK_gc = (0x04<<0), /* 4 cycles */ - EBI_RPDLY_5CLK_gc = (0x05<<0), /* 5 cycle */ - EBI_RPDLY_6CLK_gc = (0x06<<0), /* 6 cycles */ - EBI_RPDLY_7CLK_gc = (0x07<<0), /* 7 cycles */ -} EBI_RPDLY_t; - -/* */ -typedef enum EBI_WRDLY_enum -{ - EBI_WRDLY_0CLK_gc = (0x00<<6), /* 0 cycles */ - EBI_WRDLY_1CLK_gc = (0x01<<6), /* 1 cycle */ - EBI_WRDLY_2CLK_gc = (0x02<<6), /* 2 cycles */ - EBI_WRDLY_3CLK_gc = (0x03<<6), /* 3 cycles */ -} EBI_WRDLY_t; - -/* */ -typedef enum EBI_ESRDLY_enum -{ - EBI_ESRDLY_0CLK_gc = (0x00<<3), /* 0 cycles */ - EBI_ESRDLY_1CLK_gc = (0x01<<3), /* 1 cycle */ - EBI_ESRDLY_2CLK_gc = (0x02<<3), /* 2 cycles */ - EBI_ESRDLY_3CLK_gc = (0x03<<3), /* 3 cycles */ - EBI_ESRDLY_4CLK_gc = (0x04<<3), /* 4 cycles */ - EBI_ESRDLY_5CLK_gc = (0x05<<3), /* 5 cycle */ - EBI_ESRDLY_6CLK_gc = (0x06<<3), /* 6 cycles */ - EBI_ESRDLY_7CLK_gc = (0x07<<3), /* 7 cycles */ -} EBI_ESRDLY_t; - -/* */ -typedef enum EBI_ROWCOLDLY_enum -{ - EBI_ROWCOLDLY_0CLK_gc = (0x00<<0), /* 0 cycles */ - EBI_ROWCOLDLY_1CLK_gc = (0x01<<0), /* 1 cycle */ - EBI_ROWCOLDLY_2CLK_gc = (0x02<<0), /* 2 cycles */ - EBI_ROWCOLDLY_3CLK_gc = (0x03<<0), /* 3 cycles */ - EBI_ROWCOLDLY_4CLK_gc = (0x04<<0), /* 4 cycles */ - EBI_ROWCOLDLY_5CLK_gc = (0x05<<0), /* 5 cycle */ - EBI_ROWCOLDLY_6CLK_gc = (0x06<<0), /* 6 cycles */ - EBI_ROWCOLDLY_7CLK_gc = (0x07<<0), /* 7 cycles */ -} EBI_ROWCOLDLY_t; - - -/* --------------------------------------------------------------------------- -TWI - Two-Wire Interface --------------------------------------------------------------------------- -*/ - -/* */ -typedef struct TWI_MASTER_struct -{ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t CTRLC; /* Control Register C */ - register8_t STATUS; /* Status Register */ - register8_t BAUD; /* Baurd Rate Control Register */ - register8_t ADDR; /* Address Register */ - register8_t DATA; /* Data Register */ -} TWI_MASTER_t; - -/* --------------------------------------------------------------------------- -TWI - Two-Wire Interface --------------------------------------------------------------------------- -*/ - -/* */ -typedef struct TWI_SLAVE_struct -{ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t STATUS; /* Status Register */ - register8_t ADDR; /* Address Register */ - register8_t DATA; /* Data Register */ -} TWI_SLAVE_t; - -/* --------------------------------------------------------------------------- -TWI - Two-Wire Interface --------------------------------------------------------------------------- -*/ - -/* Two-Wire Interface */ -typedef struct TWI_struct -{ - register8_t CTRL; /* TWI Common Control Register */ - TWI_MASTER_t MASTER; /* TWI master module */ - TWI_SLAVE_t SLAVE; /* TWI slave module */ -} TWI_t; - -/* Master Interrupt Level */ -typedef enum TWI_MASTER_INTLVL_enum -{ - TWI_MASTER_INTLVL_OFF_gc = (0x00<<6), /* Interrupt Disabled */ - TWI_MASTER_INTLVL_LO_gc = (0x01<<6), /* Low Level */ - TWI_MASTER_INTLVL_MED_gc = (0x02<<6), /* Medium Level */ - TWI_MASTER_INTLVL_HI_gc = (0x03<<6), /* High Level */ -} TWI_MASTER_INTLVL_t; - -/* Inactive Timeout */ -typedef enum TWI_MASTER_TIMEOUT_enum -{ - TWI_MASTER_TIMEOUT_DISABLED_gc = (0x00<<2), /* Bus Timeout Disabled */ - TWI_MASTER_TIMEOUT_50US_gc = (0x01<<2), /* 50 Microseconds */ - TWI_MASTER_TIMEOUT_100US_gc = (0x02<<2), /* 100 Microseconds */ - TWI_MASTER_TIMEOUT_200US_gc = (0x03<<2), /* 200 Microseconds */ -} TWI_MASTER_TIMEOUT_t; - -/* Master Command */ -typedef enum TWI_MASTER_CMD_enum -{ - TWI_MASTER_CMD_NOACT_gc = (0x00<<0), /* No Action */ - TWI_MASTER_CMD_REPSTART_gc = (0x01<<0), /* Issue Repeated Start Condition */ - TWI_MASTER_CMD_RECVTRANS_gc = (0x02<<0), /* Receive or Transmit Data */ - TWI_MASTER_CMD_STOP_gc = (0x03<<0), /* Issue Stop Condition */ -} TWI_MASTER_CMD_t; - -/* Master Bus State */ -typedef enum TWI_MASTER_BUSSTATE_enum -{ - TWI_MASTER_BUSSTATE_UNKNOWN_gc = (0x00<<0), /* Unknown Bus State */ - TWI_MASTER_BUSSTATE_IDLE_gc = (0x01<<0), /* Bus is Idle */ - TWI_MASTER_BUSSTATE_OWNER_gc = (0x02<<0), /* This Module Controls The Bus */ - TWI_MASTER_BUSSTATE_BUSY_gc = (0x03<<0), /* The Bus is Busy */ -} TWI_MASTER_BUSSTATE_t; - -/* Slave Interrupt Level */ -typedef enum TWI_SLAVE_INTLVL_enum -{ - TWI_SLAVE_INTLVL_OFF_gc = (0x00<<6), /* Interrupt Disabled */ - TWI_SLAVE_INTLVL_LO_gc = (0x01<<6), /* Low Level */ - TWI_SLAVE_INTLVL_MED_gc = (0x02<<6), /* Medium Level */ - TWI_SLAVE_INTLVL_HI_gc = (0x03<<6), /* High Level */ -} TWI_SLAVE_INTLVL_t; - -/* Slave Command */ -typedef enum TWI_SLAVE_CMD_enum -{ - TWI_SLAVE_CMD_NOACT_gc = (0x00<<0), /* No Action */ - TWI_SLAVE_CMD_COMPTRANS_gc = (0x02<<0), /* Used To Complete a Transaction */ - TWI_SLAVE_CMD_RESPONSE_gc = (0x03<<0), /* Used in Response to Address/Data Interrupt */ -} TWI_SLAVE_CMD_t; - - -/* --------------------------------------------------------------------------- -PORT - Port Configuration --------------------------------------------------------------------------- -*/ - -/* I/O port Configuration */ -typedef struct PORTCFG_struct -{ - register8_t MPCMASK; /* Multi-pin Configuration Mask */ - register8_t reserved_0x01; - register8_t VPCTRLA; /* Virtual Port Control Register A */ - register8_t VPCTRLB; /* Virtual Port Control Register B */ - register8_t CLKEVOUT; /* Clock and Event Out Register */ -} PORTCFG_t; - -/* --------------------------------------------------------------------------- -PORT - Port Configuration --------------------------------------------------------------------------- -*/ - -/* Virtual Port */ -typedef struct VPORT_struct -{ - register8_t DIR; /* I/O Port Data Direction */ - register8_t OUT; /* I/O Port Output */ - register8_t IN; /* I/O Port Input */ - register8_t INTFLAGS; /* Interrupt Flag Register */ -} VPORT_t; - -/* --------------------------------------------------------------------------- -PORT - Port Configuration --------------------------------------------------------------------------- -*/ - -/* I/O Ports */ -typedef struct PORT_struct -{ - register8_t DIR; /* I/O Port Data Direction */ - register8_t DIRSET; /* I/O Port Data Direction Set */ - register8_t DIRCLR; /* I/O Port Data Direction Clear */ - register8_t DIRTGL; /* I/O Port Data Direction Toggle */ - register8_t OUT; /* I/O Port Output */ - register8_t OUTSET; /* I/O Port Output Set */ - register8_t OUTCLR; /* I/O Port Output Clear */ - register8_t OUTTGL; /* I/O Port Output Toggle */ - register8_t IN; /* I/O port Input */ - register8_t INTCTRL; /* Interrupt Control Register */ - register8_t INT0MASK; /* Port Interrupt 0 Mask */ - register8_t INT1MASK; /* Port Interrupt 1 Mask */ - register8_t INTFLAGS; /* Interrupt Flag Register */ - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t reserved_0x0F; - register8_t PIN0CTRL; /* Pin 0 Control Register */ - register8_t PIN1CTRL; /* Pin 1 Control Register */ - register8_t PIN2CTRL; /* Pin 2 Control Register */ - register8_t PIN3CTRL; /* Pin 3 Control Register */ - register8_t PIN4CTRL; /* Pin 4 Control Register */ - register8_t PIN5CTRL; /* Pin 5 Control Register */ - register8_t PIN6CTRL; /* Pin 6 Control Register */ - register8_t PIN7CTRL; /* Pin 7 Control Register */ -} PORT_t; - -/* Virtual Port 0 Mapping */ -typedef enum PORTCFG_VP0MAP_enum -{ - PORTCFG_VP0MAP_PORTA_gc = (0x00<<0), /* Mapped To PORTA */ - PORTCFG_VP0MAP_PORTB_gc = (0x01<<0), /* Mapped To PORTB */ - PORTCFG_VP0MAP_PORTC_gc = (0x02<<0), /* Mapped To PORTC */ - PORTCFG_VP0MAP_PORTD_gc = (0x03<<0), /* Mapped To PORTD */ - PORTCFG_VP0MAP_PORTE_gc = (0x04<<0), /* Mapped To PORTE */ - PORTCFG_VP0MAP_PORTF_gc = (0x05<<0), /* Mapped To PORTF */ - PORTCFG_VP0MAP_PORTG_gc = (0x06<<0), /* Mapped To PORTG */ - PORTCFG_VP0MAP_PORTH_gc = (0x07<<0), /* Mapped To PORTH */ - PORTCFG_VP0MAP_PORTJ_gc = (0x08<<0), /* Mapped To PORTJ */ - PORTCFG_VP0MAP_PORTK_gc = (0x09<<0), /* Mapped To PORTK */ - PORTCFG_VP0MAP_PORTL_gc = (0x0A<<0), /* Mapped To PORTL */ - PORTCFG_VP0MAP_PORTM_gc = (0x0B<<0), /* Mapped To PORTM */ - PORTCFG_VP0MAP_PORTN_gc = (0x0C<<0), /* Mapped To PORTN */ - PORTCFG_VP0MAP_PORTP_gc = (0x0D<<0), /* Mapped To PORTP */ - PORTCFG_VP0MAP_PORTQ_gc = (0x0E<<0), /* Mapped To PORTQ */ - PORTCFG_VP0MAP_PORTR_gc = (0x0F<<0), /* Mapped To PORTR */ -} PORTCFG_VP0MAP_t; - -/* Virtual Port 1 Mapping */ -typedef enum PORTCFG_VP1MAP_enum -{ - PORTCFG_VP1MAP_PORTA_gc = (0x00<<4), /* Mapped To PORTA */ - PORTCFG_VP1MAP_PORTB_gc = (0x01<<4), /* Mapped To PORTB */ - PORTCFG_VP1MAP_PORTC_gc = (0x02<<4), /* Mapped To PORTC */ - PORTCFG_VP1MAP_PORTD_gc = (0x03<<4), /* Mapped To PORTD */ - PORTCFG_VP1MAP_PORTE_gc = (0x04<<4), /* Mapped To PORTE */ - PORTCFG_VP1MAP_PORTF_gc = (0x05<<4), /* Mapped To PORTF */ - PORTCFG_VP1MAP_PORTG_gc = (0x06<<4), /* Mapped To PORTG */ - PORTCFG_VP1MAP_PORTH_gc = (0x07<<4), /* Mapped To PORTH */ - PORTCFG_VP1MAP_PORTJ_gc = (0x08<<4), /* Mapped To PORTJ */ - PORTCFG_VP1MAP_PORTK_gc = (0x09<<4), /* Mapped To PORTK */ - PORTCFG_VP1MAP_PORTL_gc = (0x0A<<4), /* Mapped To PORTL */ - PORTCFG_VP1MAP_PORTM_gc = (0x0B<<4), /* Mapped To PORTM */ - PORTCFG_VP1MAP_PORTN_gc = (0x0C<<4), /* Mapped To PORTN */ - PORTCFG_VP1MAP_PORTP_gc = (0x0D<<4), /* Mapped To PORTP */ - PORTCFG_VP1MAP_PORTQ_gc = (0x0E<<4), /* Mapped To PORTQ */ - PORTCFG_VP1MAP_PORTR_gc = (0x0F<<4), /* Mapped To PORTR */ -} PORTCFG_VP1MAP_t; - -/* Virtual Port 2 Mapping */ -typedef enum PORTCFG_VP2MAP_enum -{ - PORTCFG_VP2MAP_PORTA_gc = (0x00<<0), /* Mapped To PORTA */ - PORTCFG_VP2MAP_PORTB_gc = (0x01<<0), /* Mapped To PORTB */ - PORTCFG_VP2MAP_PORTC_gc = (0x02<<0), /* Mapped To PORTC */ - PORTCFG_VP2MAP_PORTD_gc = (0x03<<0), /* Mapped To PORTD */ - PORTCFG_VP2MAP_PORTE_gc = (0x04<<0), /* Mapped To PORTE */ - PORTCFG_VP2MAP_PORTF_gc = (0x05<<0), /* Mapped To PORTF */ - PORTCFG_VP2MAP_PORTG_gc = (0x06<<0), /* Mapped To PORTG */ - PORTCFG_VP2MAP_PORTH_gc = (0x07<<0), /* Mapped To PORTH */ - PORTCFG_VP2MAP_PORTJ_gc = (0x08<<0), /* Mapped To PORTJ */ - PORTCFG_VP2MAP_PORTK_gc = (0x09<<0), /* Mapped To PORTK */ - PORTCFG_VP2MAP_PORTL_gc = (0x0A<<0), /* Mapped To PORTL */ - PORTCFG_VP2MAP_PORTM_gc = (0x0B<<0), /* Mapped To PORTM */ - PORTCFG_VP2MAP_PORTN_gc = (0x0C<<0), /* Mapped To PORTN */ - PORTCFG_VP2MAP_PORTP_gc = (0x0D<<0), /* Mapped To PORTP */ - PORTCFG_VP2MAP_PORTQ_gc = (0x0E<<0), /* Mapped To PORTQ */ - PORTCFG_VP2MAP_PORTR_gc = (0x0F<<0), /* Mapped To PORTR */ -} PORTCFG_VP2MAP_t; - -/* Virtual Port 3 Mapping */ -typedef enum PORTCFG_VP3MAP_enum -{ - PORTCFG_VP3MAP_PORTA_gc = (0x00<<4), /* Mapped To PORTA */ - PORTCFG_VP3MAP_PORTB_gc = (0x01<<4), /* Mapped To PORTB */ - PORTCFG_VP3MAP_PORTC_gc = (0x02<<4), /* Mapped To PORTC */ - PORTCFG_VP3MAP_PORTD_gc = (0x03<<4), /* Mapped To PORTD */ - PORTCFG_VP3MAP_PORTE_gc = (0x04<<4), /* Mapped To PORTE */ - PORTCFG_VP3MAP_PORTF_gc = (0x05<<4), /* Mapped To PORTF */ - PORTCFG_VP3MAP_PORTG_gc = (0x06<<4), /* Mapped To PORTG */ - PORTCFG_VP3MAP_PORTH_gc = (0x07<<4), /* Mapped To PORTH */ - PORTCFG_VP3MAP_PORTJ_gc = (0x08<<4), /* Mapped To PORTJ */ - PORTCFG_VP3MAP_PORTK_gc = (0x09<<4), /* Mapped To PORTK */ - PORTCFG_VP3MAP_PORTL_gc = (0x0A<<4), /* Mapped To PORTL */ - PORTCFG_VP3MAP_PORTM_gc = (0x0B<<4), /* Mapped To PORTM */ - PORTCFG_VP3MAP_PORTN_gc = (0x0C<<4), /* Mapped To PORTN */ - PORTCFG_VP3MAP_PORTP_gc = (0x0D<<4), /* Mapped To PORTP */ - PORTCFG_VP3MAP_PORTQ_gc = (0x0E<<4), /* Mapped To PORTQ */ - PORTCFG_VP3MAP_PORTR_gc = (0x0F<<4), /* Mapped To PORTR */ -} PORTCFG_VP3MAP_t; - -/* Clock Output Port */ -typedef enum PORTCFG_CLKOUT_enum -{ - PORTCFG_CLKOUT_OFF_gc = (0x00<<0), /* Clock Output Disabled */ - PORTCFG_CLKOUT_PC7_gc = (0x01<<0), /* Clock Output on Port C pin 7 */ - PORTCFG_CLKOUT_PD7_gc = (0x02<<0), /* Clock Output on Port D pin 7 */ - PORTCFG_CLKOUT_PE7_gc = (0x03<<0), /* Clock Output on Port E pin 7 */ -} PORTCFG_CLKOUT_t; - -/* Event Output Port */ -typedef enum PORTCFG_EVOUT_enum -{ - PORTCFG_EVOUT_OFF_gc = (0x00<<4), /* Event Output Disabled */ - PORTCFG_EVOUT_PC7_gc = (0x01<<4), /* Event Channel 7 Output on Port C pin 7 */ - PORTCFG_EVOUT_PD7_gc = (0x02<<4), /* Event Channel 7 Output on Port D pin 7 */ - PORTCFG_EVOUT_PE7_gc = (0x03<<4), /* Event Channel 7 Output on Port E pin 7 */ -} PORTCFG_EVOUT_t; - -/* Port Interrupt 0 Level */ -typedef enum PORT_INT0LVL_enum -{ - PORT_INT0LVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - PORT_INT0LVL_LO_gc = (0x01<<0), /* Low Level */ - PORT_INT0LVL_MED_gc = (0x02<<0), /* Medium Level */ - PORT_INT0LVL_HI_gc = (0x03<<0), /* High Level */ -} PORT_INT0LVL_t; - -/* Port Interrupt 1 Level */ -typedef enum PORT_INT1LVL_enum -{ - PORT_INT1LVL_OFF_gc = (0x00<<2), /* Interrupt Disabled */ - PORT_INT1LVL_LO_gc = (0x01<<2), /* Low Level */ - PORT_INT1LVL_MED_gc = (0x02<<2), /* Medium Level */ - PORT_INT1LVL_HI_gc = (0x03<<2), /* High Level */ -} PORT_INT1LVL_t; - -/* Output/Pull Configuration */ -typedef enum PORT_OPC_enum -{ - PORT_OPC_TOTEM_gc = (0x00<<3), /* Totempole */ - PORT_OPC_BUSKEEPER_gc = (0x01<<3), /* Totempole w/ Bus keeper on Input and Output */ - PORT_OPC_PULLDOWN_gc = (0x02<<3), /* Totempole w/ Pull-down on Input */ - PORT_OPC_PULLUP_gc = (0x03<<3), /* Totempole w/ Pull-up on Input */ - PORT_OPC_WIREDOR_gc = (0x04<<3), /* Wired OR */ - PORT_OPC_WIREDAND_gc = (0x05<<3), /* Wired AND */ - PORT_OPC_WIREDORPULL_gc = (0x06<<3), /* Wired OR w/ Pull-down */ - PORT_OPC_WIREDANDPULL_gc = (0x07<<3), /* Wired AND w/ Pull-up */ -} PORT_OPC_t; - -/* Input/Sense Configuration */ -typedef enum PORT_ISC_enum -{ - PORT_ISC_BOTHEDGES_gc = (0x00<<0), /* Sense Both Edges */ - PORT_ISC_RISING_gc = (0x01<<0), /* Sense Rising Edge */ - PORT_ISC_FALLING_gc = (0x02<<0), /* Sense Falling Edge */ - PORT_ISC_LEVEL_gc = (0x03<<0), /* Sense Level (Transparent For Events) */ - PORT_ISC_INPUT_DISABLE_gc = (0x07<<0), /* Disable Digital Input Buffer */ -} PORT_ISC_t; - - -/* --------------------------------------------------------------------------- -TC - 16-bit Timer/Counter With PWM --------------------------------------------------------------------------- -*/ - -/* 16-bit Timer/Counter 0 */ -typedef struct TC0_struct -{ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t CTRLC; /* Control register C */ - register8_t CTRLD; /* Control Register D */ - register8_t CTRLE; /* Control Register E */ - register8_t reserved_0x05; - register8_t INTCTRLA; /* Interrupt Control Register A */ - register8_t INTCTRLB; /* Interrupt Control Register B */ - register8_t CTRLFCLR; /* Control Register F Clear */ - register8_t CTRLFSET; /* Control Register F Set */ - register8_t CTRLGCLR; /* Control Register G Clear */ - register8_t CTRLGSET; /* Control Register G Set */ - register8_t INTFLAGS; /* Interrupt Flag Register */ - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t TEMP; /* Temporary Register For 16-bit Access */ - register8_t reserved_0x10; - register8_t reserved_0x11; - register8_t reserved_0x12; - register8_t reserved_0x13; - register8_t reserved_0x14; - register8_t reserved_0x15; - register8_t reserved_0x16; - register8_t reserved_0x17; - register8_t reserved_0x18; - register8_t reserved_0x19; - register8_t reserved_0x1A; - register8_t reserved_0x1B; - register8_t reserved_0x1C; - register8_t reserved_0x1D; - register8_t reserved_0x1E; - register8_t reserved_0x1F; - _WORDREGISTER(CNT); /* Count */ - register8_t reserved_0x22; - register8_t reserved_0x23; - register8_t reserved_0x24; - register8_t reserved_0x25; - _WORDREGISTER(PER); /* Period */ - _WORDREGISTER(CCA); /* Compare or Capture A */ - _WORDREGISTER(CCB); /* Compare or Capture B */ - _WORDREGISTER(CCC); /* Compare or Capture C */ - _WORDREGISTER(CCD); /* Compare or Capture D */ - register8_t reserved_0x30; - register8_t reserved_0x31; - register8_t reserved_0x32; - register8_t reserved_0x33; - register8_t reserved_0x34; - register8_t reserved_0x35; - _WORDREGISTER(PERBUF); /* Period Buffer */ - _WORDREGISTER(CCABUF); /* Compare Or Capture A Buffer */ - _WORDREGISTER(CCBBUF); /* Compare Or Capture B Buffer */ - _WORDREGISTER(CCCBUF); /* Compare Or Capture C Buffer */ - _WORDREGISTER(CCDBUF); /* Compare Or Capture D Buffer */ -} TC0_t; - -/* --------------------------------------------------------------------------- -TC - 16-bit Timer/Counter With PWM --------------------------------------------------------------------------- -*/ - -/* 16-bit Timer/Counter 1 */ -typedef struct TC1_struct -{ - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t CTRLC; /* Control register C */ - register8_t CTRLD; /* Control Register D */ - register8_t CTRLE; /* Control Register E */ - register8_t reserved_0x05; - register8_t INTCTRLA; /* Interrupt Control Register A */ - register8_t INTCTRLB; /* Interrupt Control Register B */ - register8_t CTRLFCLR; /* Control Register F Clear */ - register8_t CTRLFSET; /* Control Register F Set */ - register8_t CTRLGCLR; /* Control Register G Clear */ - register8_t CTRLGSET; /* Control Register G Set */ - register8_t INTFLAGS; /* Interrupt Flag Register */ - register8_t reserved_0x0D; - register8_t reserved_0x0E; - register8_t TEMP; /* Temporary Register For 16-bit Access */ - register8_t reserved_0x10; - register8_t reserved_0x11; - register8_t reserved_0x12; - register8_t reserved_0x13; - register8_t reserved_0x14; - register8_t reserved_0x15; - register8_t reserved_0x16; - register8_t reserved_0x17; - register8_t reserved_0x18; - register8_t reserved_0x19; - register8_t reserved_0x1A; - register8_t reserved_0x1B; - register8_t reserved_0x1C; - register8_t reserved_0x1D; - register8_t reserved_0x1E; - register8_t reserved_0x1F; - _WORDREGISTER(CNT); /* Count */ - register8_t reserved_0x22; - register8_t reserved_0x23; - register8_t reserved_0x24; - register8_t reserved_0x25; - _WORDREGISTER(PER); /* Period */ - _WORDREGISTER(CCA); /* Compare or Capture A */ - _WORDREGISTER(CCB); /* Compare or Capture B */ - register8_t reserved_0x2C; - register8_t reserved_0x2D; - register8_t reserved_0x2E; - register8_t reserved_0x2F; - register8_t reserved_0x30; - register8_t reserved_0x31; - register8_t reserved_0x32; - register8_t reserved_0x33; - register8_t reserved_0x34; - register8_t reserved_0x35; - _WORDREGISTER(PERBUF); /* Period Buffer */ - _WORDREGISTER(CCABUF); /* Compare Or Capture A Buffer */ - _WORDREGISTER(CCBBUF); /* Compare Or Capture B Buffer */ -} TC1_t; - -/* --------------------------------------------------------------------------- -TC - 16-bit Timer/Counter With PWM --------------------------------------------------------------------------- -*/ - -/* Advanced Waveform Extension */ -typedef struct AWEX_struct -{ - register8_t CTRL; /* Control Register */ - register8_t reserved_0x01; - register8_t FDEVMASK; /* Fault Detection Event Mask */ - register8_t FDCTRL; /* Fault Detection Control Register */ - register8_t STATUS; /* Status Register */ - register8_t reserved_0x05; - register8_t DTBOTH; /* Dead Time Both Sides */ - register8_t DTBOTHBUF; /* Dead Time Both Sides Buffer */ - register8_t DTLS; /* Dead Time Low Side */ - register8_t DTHS; /* Dead Time High Side */ - register8_t DTLSBUF; /* Dead Time Low Side Buffer */ - register8_t DTHSBUF; /* Dead Time High Side Buffer */ - register8_t OUTOVEN; /* Output Override Enable */ -} AWEX_t; - -/* --------------------------------------------------------------------------- -TC - 16-bit Timer/Counter With PWM --------------------------------------------------------------------------- -*/ - -/* High-Resolution Extension */ -typedef struct HIRES_struct -{ - register8_t CTRL; /* Control Register */ -} HIRES_t; - -/* Clock Selection */ -typedef enum TC_CLKSEL_enum -{ - TC_CLKSEL_OFF_gc = (0x00<<0), /* Timer Off */ - TC_CLKSEL_DIV1_gc = (0x01<<0), /* System Clock */ - TC_CLKSEL_DIV2_gc = (0x02<<0), /* System Clock / 2 */ - TC_CLKSEL_DIV4_gc = (0x03<<0), /* System Clock / 4 */ - TC_CLKSEL_DIV8_gc = (0x04<<0), /* System Clock / 8 */ - TC_CLKSEL_DIV64_gc = (0x05<<0), /* System Clock / 64 */ - TC_CLKSEL_DIV256_gc = (0x06<<0), /* System Clock / 256 */ - TC_CLKSEL_DIV1024_gc = (0x07<<0), /* System Clock / 1024 */ - TC_CLKSEL_EVCH0_gc = (0x08<<0), /* Event Channel 0 */ - TC_CLKSEL_EVCH1_gc = (0x09<<0), /* Event Channel 1 */ - TC_CLKSEL_EVCH2_gc = (0x0A<<0), /* Event Channel 2 */ - TC_CLKSEL_EVCH3_gc = (0x0B<<0), /* Event Channel 3 */ - TC_CLKSEL_EVCH4_gc = (0x0C<<0), /* Event Channel 4 */ - TC_CLKSEL_EVCH5_gc = (0x0D<<0), /* Event Channel 5 */ - TC_CLKSEL_EVCH6_gc = (0x0E<<0), /* Event Channel 6 */ - TC_CLKSEL_EVCH7_gc = (0x0F<<0), /* Event Channel 7 */ -} TC_CLKSEL_t; - -/* Waveform Generation Mode */ -typedef enum TC_WGMODE_enum -{ - TC_WGMODE_NORMAL_gc = (0x00<<0), /* Normal Mode */ - TC_WGMODE_FRQ_gc = (0x01<<0), /* Frequency Generation Mode */ - TC_WGMODE_SS_gc = (0x03<<0), /* Single Slope */ - TC_WGMODE_DS_T_gc = (0x05<<0), /* Dual Slope, Update on TOP */ - TC_WGMODE_DS_TB_gc = (0x06<<0), /* Dual Slope, Update on TOP and BOTTOM */ - TC_WGMODE_DS_B_gc = (0x07<<0), /* Dual Slope, Update on BOTTOM */ -} TC_WGMODE_t; - -/* Event Action */ -typedef enum TC_EVACT_enum -{ - TC_EVACT_OFF_gc = (0x00<<5), /* No Event Action */ - TC_EVACT_CAPT_gc = (0x01<<5), /* Input Capture */ - TC_EVACT_UPDOWN_gc = (0x02<<5), /* Externally Controlled Up/Down Count */ - TC_EVACT_QDEC_gc = (0x03<<5), /* Quadrature Decode */ - TC_EVACT_RESTART_gc = (0x04<<5), /* Restart */ - TC_EVACT_FRW_gc = (0x05<<5), /* Frequency Capture */ - TC_EVACT_PW_gc = (0x06<<5), /* Pulse-width Capture */ -} TC_EVACT_t; - -/* Event Selection */ -typedef enum TC_EVSEL_enum -{ - TC_EVSEL_OFF_gc = (0x00<<0), /* No Event Source */ - TC_EVSEL_CH0_gc = (0x08<<0), /* Event Channel 0 */ - TC_EVSEL_CH1_gc = (0x09<<0), /* Event Channel 1 */ - TC_EVSEL_CH2_gc = (0x0A<<0), /* Event Channel 2 */ - TC_EVSEL_CH3_gc = (0x0B<<0), /* Event Channel 3 */ - TC_EVSEL_CH4_gc = (0x0C<<0), /* Event Channel 4 */ - TC_EVSEL_CH5_gc = (0x0D<<0), /* Event Channel 5 */ - TC_EVSEL_CH6_gc = (0x0E<<0), /* Event Channel 6 */ - TC_EVSEL_CH7_gc = (0x0F<<0), /* Event Channel 7 */ -} TC_EVSEL_t; - -/* Error Interrupt Level */ -typedef enum TC_ERRINTLVL_enum -{ - TC_ERRINTLVL_OFF_gc = (0x00<<2), /* Interrupt Disabled */ - TC_ERRINTLVL_LO_gc = (0x01<<2), /* Low Level */ - TC_ERRINTLVL_MED_gc = (0x02<<2), /* Medium Level */ - TC_ERRINTLVL_HI_gc = (0x03<<2), /* High Level */ -} TC_ERRINTLVL_t; - -/* Overflow Interrupt Level */ -typedef enum TC_OVFINTLVL_enum -{ - TC_OVFINTLVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - TC_OVFINTLVL_LO_gc = (0x01<<0), /* Low Level */ - TC_OVFINTLVL_MED_gc = (0x02<<0), /* Medium Level */ - TC_OVFINTLVL_HI_gc = (0x03<<0), /* High Level */ -} TC_OVFINTLVL_t; - -/* Compare or Capture D Interrupt Level */ -typedef enum TC_CCDINTLVL_enum -{ - TC_CCDINTLVL_OFF_gc = (0x00<<6), /* Interrupt Disabled */ - TC_CCDINTLVL_LO_gc = (0x01<<6), /* Low Level */ - TC_CCDINTLVL_MED_gc = (0x02<<6), /* Medium Level */ - TC_CCDINTLVL_HI_gc = (0x03<<6), /* High Level */ -} TC_CCDINTLVL_t; - -/* Compare or Capture C Interrupt Level */ -typedef enum TC_CCCINTLVL_enum -{ - TC_CCCINTLVL_OFF_gc = (0x00<<4), /* Interrupt Disabled */ - TC_CCCINTLVL_LO_gc = (0x01<<4), /* Low Level */ - TC_CCCINTLVL_MED_gc = (0x02<<4), /* Medium Level */ - TC_CCCINTLVL_HI_gc = (0x03<<4), /* High Level */ -} TC_CCCINTLVL_t; - -/* Compare or Capture B Interrupt Level */ -typedef enum TC_CCBINTLVL_enum -{ - TC_CCBINTLVL_OFF_gc = (0x00<<2), /* Interrupt Disabled */ - TC_CCBINTLVL_LO_gc = (0x01<<2), /* Low Level */ - TC_CCBINTLVL_MED_gc = (0x02<<2), /* Medium Level */ - TC_CCBINTLVL_HI_gc = (0x03<<2), /* High Level */ -} TC_CCBINTLVL_t; - -/* Compare or Capture A Interrupt Level */ -typedef enum TC_CCAINTLVL_enum -{ - TC_CCAINTLVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - TC_CCAINTLVL_LO_gc = (0x01<<0), /* Low Level */ - TC_CCAINTLVL_MED_gc = (0x02<<0), /* Medium Level */ - TC_CCAINTLVL_HI_gc = (0x03<<0), /* High Level */ -} TC_CCAINTLVL_t; - -/* Timer/Counter Command */ -typedef enum TC_CMD_enum -{ - TC_CMD_NONE_gc = (0x00<<2), /* No Command */ - TC_CMD_UPDATE_gc = (0x01<<2), /* Force Update */ - TC_CMD_RESTART_gc = (0x02<<2), /* Force Restart */ - TC_CMD_RESET_gc = (0x03<<2), /* Force Hard Reset */ -} TC_CMD_t; - -/* Fault Detect Action */ -typedef enum AWEX_FDACT_enum -{ - AWEX_FDACT_NONE_gc = (0x00<<0), /* No Fault Protection */ - AWEX_FDACT_CLEAROE_gc = (0x01<<0), /* Clear Output Enable Bits */ - AWEX_FDACT_CLEARDIR_gc = (0x03<<0), /* Clear I/O Port Direction Bits */ -} AWEX_FDACT_t; - -/* High Resolution Enable */ -typedef enum HIRES_HREN_enum -{ - HIRES_HREN_NONE_gc = (0x00<<0), /* No Fault Protection */ - HIRES_HREN_TC0_gc = (0x01<<0), /* Enable High Resolution on Timer/Counter 0 */ - HIRES_HREN_TC1_gc = (0x02<<0), /* Enable High Resolution on Timer/Counter 1 */ - HIRES_HREN_BOTH_gc = (0x03<<0), /* Enable High Resolution both Timer/Counters */ -} HIRES_HREN_t; - - -/* --------------------------------------------------------------------------- -USART - Universal Asynchronous Receiver-Transmitter --------------------------------------------------------------------------- -*/ - -/* Universal Synchronous/Asynchronous Receiver/Transmitter */ -typedef struct USART_struct -{ - register8_t DATA; /* Data Register */ - register8_t STATUS; /* Status Register */ - register8_t reserved_0x02; - register8_t CTRLA; /* Control Register A */ - register8_t CTRLB; /* Control Register B */ - register8_t CTRLC; /* Control Register C */ - register8_t BAUDCTRLA; /* Baud Rate Control Register A */ - register8_t BAUDCTRLB; /* Baud Rate Control Register B */ -} USART_t; - -/* Receive Complete Interrupt level */ -typedef enum USART_RXCINTLVL_enum -{ - USART_RXCINTLVL_OFF_gc = (0x00<<4), /* Interrupt Disabled */ - USART_RXCINTLVL_LO_gc = (0x01<<4), /* Low Level */ - USART_RXCINTLVL_MED_gc = (0x02<<4), /* Medium Level */ - USART_RXCINTLVL_HI_gc = (0x03<<4), /* High Level */ -} USART_RXCINTLVL_t; - -/* Transmit Complete Interrupt level */ -typedef enum USART_TXCINTLVL_enum -{ - USART_TXCINTLVL_OFF_gc = (0x00<<2), /* Interrupt Disabled */ - USART_TXCINTLVL_LO_gc = (0x01<<2), /* Low Level */ - USART_TXCINTLVL_MED_gc = (0x02<<2), /* Medium Level */ - USART_TXCINTLVL_HI_gc = (0x03<<2), /* High Level */ -} USART_TXCINTLVL_t; - -/* Data Register Empty Interrupt level */ -typedef enum USART_DREINTLVL_enum -{ - USART_DREINTLVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - USART_DREINTLVL_LO_gc = (0x01<<0), /* Low Level */ - USART_DREINTLVL_MED_gc = (0x02<<0), /* Medium Level */ - USART_DREINTLVL_HI_gc = (0x03<<0), /* High Level */ -} USART_DREINTLVL_t; - -/* Character Size */ -typedef enum USART_CHSIZE_enum -{ - USART_CHSIZE_5BIT_gc = (0x00<<0), /* Character size: 5 bit */ - USART_CHSIZE_6BIT_gc = (0x01<<0), /* Character size: 6 bit */ - USART_CHSIZE_7BIT_gc = (0x02<<0), /* Character size: 7 bit */ - USART_CHSIZE_8BIT_gc = (0x03<<0), /* Character size: 8 bit */ - USART_CHSIZE_9BIT_gc = (0x07<<0), /* Character size: 9 bit */ -} USART_CHSIZE_t; - -/* Communication Mode */ -typedef enum USART_CMODE_enum -{ - USART_CMODE_ASYNCHRONOUS_gc = (0x00<<6), /* Asynchronous Mode */ - USART_CMODE_SYNCHRONOUS_gc = (0x01<<6), /* Synchronous Mode */ - USART_CMODE_IRDA_gc = (0x02<<6), /* IrDA Mode */ - USART_CMODE_MSPI_gc = (0x03<<6), /* Master SPI Mode */ -} USART_CMODE_t; - -/* Parity Mode */ -typedef enum USART_PMODE_enum -{ - USART_PMODE_DISABLED_gc = (0x00<<4), /* No Parity */ - USART_PMODE_EVEN_gc = (0x02<<4), /* Even Parity */ - USART_PMODE_ODD_gc = (0x03<<4), /* Odd Parity */ -} USART_PMODE_t; - - -/* --------------------------------------------------------------------------- -SPI - Serial Peripheral Interface --------------------------------------------------------------------------- -*/ - -/* Serial Peripheral Interface */ -typedef struct SPI_struct -{ - register8_t CTRL; /* Control Register */ - register8_t INTCTRL; /* Interrupt Control Register */ - register8_t STATUS; /* Status Register */ - register8_t DATA; /* Data Register */ -} SPI_t; - -/* SPI Mode */ -typedef enum SPI_MODE_enum -{ - SPI_MODE_0_gc = (0x00<<2), /* SPI Mode 0 */ - SPI_MODE_1_gc = (0x01<<2), /* SPI Mode 1 */ - SPI_MODE_2_gc = (0x02<<2), /* SPI Mode 2 */ - SPI_MODE_3_gc = (0x03<<2), /* SPI Mode 3 */ -} SPI_MODE_t; - -/* Prescaler setting */ -typedef enum SPI_PRESCALER_enum -{ - SPI_PRESCALER_DIV4_gc = (0x00<<0), /* System Clock / 4 */ - SPI_PRESCALER_DIV16_gc = (0x01<<0), /* System Clock / 16 */ - SPI_PRESCALER_DIV64_gc = (0x02<<0), /* System Clock / 64 */ - SPI_PRESCALER_DIV128_gc = (0x03<<0), /* System Clock / 128 */ -} SPI_PRESCALER_t; - -/* Interrupt level */ -typedef enum SPI_INTLVL_enum -{ - SPI_INTLVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - SPI_INTLVL_LO_gc = (0x01<<0), /* Low Level */ - SPI_INTLVL_MED_gc = (0x02<<0), /* Medium Level */ - SPI_INTLVL_HI_gc = (0x03<<0), /* High Level */ -} SPI_INTLVL_t; - - -/* --------------------------------------------------------------------------- -IRCOM - IR Communication Module --------------------------------------------------------------------------- -*/ - -/* IR Communication Module */ -typedef struct IRCOM_struct -{ - register8_t CTRL; /* Control Register */ - register8_t TXPLCTRL; /* IrDA Transmitter Pulse Length Control Register */ - register8_t RXPLCTRL; /* IrDA Receiver Pulse Length Control Register */ -} IRCOM_t; - -/* Event channel selection */ -typedef enum IRDA_EVSEL_enum -{ - IRDA_EVSEL_OFF_gc = (0x00<<0), /* No Event Source */ - IRDA_EVSEL_0_gc = (0x08<<0), /* Event Channel 0 */ - IRDA_EVSEL_1_gc = (0x09<<0), /* Event Channel 1 */ - IRDA_EVSEL_2_gc = (0x0A<<0), /* Event Channel 2 */ - IRDA_EVSEL_3_gc = (0x0B<<0), /* Event Channel 3 */ - IRDA_EVSEL_4_gc = (0x0C<<0), /* Event Channel 4 */ - IRDA_EVSEL_5_gc = (0x0D<<0), /* Event Channel 5 */ - IRDA_EVSEL_6_gc = (0x0E<<0), /* Event Channel 6 */ - IRDA_EVSEL_7_gc = (0x0F<<0), /* Event Channel 7 */ -} IRDA_EVSEL_t; - - -/* --------------------------------------------------------------------------- -AES - AES Module --------------------------------------------------------------------------- -*/ - -/* AES Module */ -typedef struct AES_struct -{ - register8_t CTRL; /* AES Control Register */ - register8_t STATUS; /* AES Status Register */ - register8_t STATE; /* AES State Register */ - register8_t KEY; /* AES Key Register */ - register8_t INTCTRL; /* AES Interrupt Control Register */ -} AES_t; - -/* Interrupt level */ -typedef enum AES_INTLVL_enum -{ - AES_INTLVL_OFF_gc = (0x00<<0), /* Interrupt Disabled */ - AES_INTLVL_LO_gc = (0x01<<0), /* Low Level */ - AES_INTLVL_MED_gc = (0x02<<0), /* Medium Level */ - AES_INTLVL_HI_gc = (0x03<<0), /* High Level */ -} AES_INTLVL_t; - - - -/* -========================================================================== -IO Module Instances. Mapped to memory. -========================================================================== -*/ - -#define GPIO (*(GPIO_t *) 0x0000) /* General Purpose IO Registers */ -#define VPORT0 (*(VPORT_t *) 0x0010) /* Virtual Port 0 */ -#define VPORT1 (*(VPORT_t *) 0x0014) /* Virtual Port 1 */ -#define VPORT2 (*(VPORT_t *) 0x0018) /* Virtual Port 2 */ -#define VPORT3 (*(VPORT_t *) 0x001C) /* Virtual Port 3 */ -#define OCD (*(OCD_t *) 0x002E) /* On-Chip Debug System */ -#define CPU (*(CPU_t *) 0x0030) /* CPU Registers */ -#define CLK (*(CLK_t *) 0x0040) /* Clock System */ -#define SLEEP (*(SLEEP_t *) 0x0048) /* Sleep Controller */ -#define OSC (*(OSC_t *) 0x0050) /* Oscillator Control */ -#define DFLLRC32M (*(DFLL_t *) 0x0060) /* DFLL for 32MHz RC Oscillator */ -#define DFLLRC2M (*(DFLL_t *) 0x0068) /* DFLL for 2MHz RC Oscillator */ -#define PR (*(PR_t *) 0x0070) /* Power Reduction */ -#define RST (*(RST_t *) 0x0078) /* Reset Controller */ -#define WDT (*(WDT_t *) 0x0080) /* Watch-Dog Timer */ -#define MCU (*(MCU_t *) 0x0090) /* MCU Control */ -#define PMIC (*(PMIC_t *) 0x00A0) /* Programmable Interrupt Controller */ -#define PORTCFG (*(PORTCFG_t *) 0x00B0) /* Port Configuration */ -#define AES (*(AES_t *) 0x00C0) /* AES Crypto Module */ -#define DMA (*(DMA_t *) 0x0100) /* DMA Controller */ -#define EVSYS (*(EVSYS_t *) 0x0180) /* Event System */ -#define NVM (*(NVM_t *) 0x01C0) /* Non Volatile Memory Controller */ -#define ADCA (*(ADC_t *) 0x0200) /* Analog to Digital Converter A */ -#define ADCB (*(ADC_t *) 0x0240) /* Analog to Digital Converter B */ -#define DACB (*(DAC_t *) 0x0320) /* Digital to Analog Converter B */ -#define ACA (*(AC_t *) 0x0380) /* Analog Comparator A */ -#define ACB (*(AC_t *) 0x0390) /* Analog Comparator B */ -#define RTC (*(RTC_t *) 0x0400) /* Real-Time Counter */ -#define TWIC (*(TWI_t *) 0x0480) /* Two-Wire Interface C */ -#define TWIE (*(TWI_t *) 0x04A0) /* Two-Wire Interface E */ -#define PORTA (*(PORT_t *) 0x0600) /* Port A */ -#define PORTB (*(PORT_t *) 0x0620) /* Port B */ -#define PORTC (*(PORT_t *) 0x0640) /* Port C */ -#define PORTD (*(PORT_t *) 0x0660) /* Port D */ -#define PORTE (*(PORT_t *) 0x0680) /* Port E */ -#define PORTF (*(PORT_t *) 0x06A0) /* Port F */ -#define PORTR (*(PORT_t *) 0x07E0) /* Port R */ -#define TCC0 (*(TC0_t *) 0x0800) /* Timer/Counter C0 */ -#define TCC1 (*(TC1_t *) 0x0840) /* Timer/Counter C1 */ -#define AWEXC (*(AWEX_t *) 0x0880) /* Advanced Waveform Extension C */ -#define HIRESC (*(HIRES_t *) 0x0890) /* High-Resolution Extension C */ -#define USARTC0 (*(USART_t *) 0x08A0) /* Universal Asynchronous Receiver-Transmitter C0 */ -#define USARTC1 (*(USART_t *) 0x08B0) /* Universal Asynchronous Receiver-Transmitter C1 */ -#define SPIC (*(SPI_t *) 0x08C0) /* Serial Peripheral Interface C */ -#define IRCOM (*(IRCOM_t *) 0x08F8) /* IR Communication Module */ -#define TCD0 (*(TC0_t *) 0x0900) /* Timer/Counter D0 */ -#define TCD1 (*(TC1_t *) 0x0940) /* Timer/Counter D1 */ -#define HIRESD (*(HIRES_t *) 0x0990) /* High-Resolution Extension D */ -#define USARTD0 (*(USART_t *) 0x09A0) /* Universal Asynchronous Receiver-Transmitter D0 */ -#define USARTD1 (*(USART_t *) 0x09B0) /* Universal Asynchronous Receiver-Transmitter D1 */ -#define SPID (*(SPI_t *) 0x09C0) /* Serial Peripheral Interface D */ -#define TCE0 (*(TC0_t *) 0x0A00) /* Timer/Counter E0 */ -#define TCE1 (*(TC1_t *) 0x0A40) /* Timer/Counter E1 */ -#define AWEXE (*(AWEX_t *) 0x0A80) /* Advanced Waveform Extension E */ -#define HIRESE (*(HIRES_t *) 0x0A90) /* High-Resolution Extension E */ -#define USARTE0 (*(USART_t *) 0x0AA0) /* Universal Asynchronous Receiver-Transmitter E0 */ -#define USARTE1 (*(USART_t *) 0x0AB0) /* Universal Asynchronous Receiver-Transmitter E1 */ -#define SPIE (*(SPI_t *) 0x0AC0) /* Serial Peripheral Interface E */ -#define TCF0 (*(TC0_t *) 0x0B00) /* Timer/Counter F0 */ -#define HIRESF (*(HIRES_t *) 0x0B90) /* High-Resolution Extension F */ -#define USARTF0 (*(USART_t *) 0x0BA0) /* Universal Asynchronous Receiver-Transmitter F0 */ -#define USARTF1 (*(USART_t *) 0x0BB0) /* Universal Asynchronous Receiver-Transmitter F1 */ -#define SPIF (*(SPI_t *) 0x0BC0) /* Serial Peripheral Interface F */ - - -#endif /* !defined (__ASSEMBLER__) */ - - -/* ========== Flattened fully qualified IO register names ========== */ - -/* GPIO - General Purpose IO Registers */ -#define GPIO_GPIO0 _SFR_MEM8(0x0000) -#define GPIO_GPIO1 _SFR_MEM8(0x0001) -#define GPIO_GPIO2 _SFR_MEM8(0x0002) -#define GPIO_GPIO3 _SFR_MEM8(0x0003) -#define GPIO_GPIO4 _SFR_MEM8(0x0004) -#define GPIO_GPIO5 _SFR_MEM8(0x0005) -#define GPIO_GPIO6 _SFR_MEM8(0x0006) -#define GPIO_GPIO7 _SFR_MEM8(0x0007) -#define GPIO_GPIO8 _SFR_MEM8(0x0008) -#define GPIO_GPIO9 _SFR_MEM8(0x0009) -#define GPIO_GPIOA _SFR_MEM8(0x000A) -#define GPIO_GPIOB _SFR_MEM8(0x000B) -#define GPIO_GPIOC _SFR_MEM8(0x000C) -#define GPIO_GPIOD _SFR_MEM8(0x000D) -#define GPIO_GPIOE _SFR_MEM8(0x000E) -#define GPIO_GPIOF _SFR_MEM8(0x000F) - -/* VPORT0 - Virtual Port 0 */ -#define VPORT0_DIR _SFR_MEM8(0x0010) -#define VPORT0_OUT _SFR_MEM8(0x0011) -#define VPORT0_IN _SFR_MEM8(0x0012) -#define VPORT0_INTFLAGS _SFR_MEM8(0x0013) - -/* VPORT1 - Virtual Port 1 */ -#define VPORT1_DIR _SFR_MEM8(0x0014) -#define VPORT1_OUT _SFR_MEM8(0x0015) -#define VPORT1_IN _SFR_MEM8(0x0016) -#define VPORT1_INTFLAGS _SFR_MEM8(0x0017) - -/* VPORT2 - Virtual Port 2 */ -#define VPORT2_DIR _SFR_MEM8(0x0018) -#define VPORT2_OUT _SFR_MEM8(0x0019) -#define VPORT2_IN _SFR_MEM8(0x001A) -#define VPORT2_INTFLAGS _SFR_MEM8(0x001B) - -/* VPORT3 - Virtual Port 3 */ -#define VPORT3_DIR _SFR_MEM8(0x001C) -#define VPORT3_OUT _SFR_MEM8(0x001D) -#define VPORT3_IN _SFR_MEM8(0x001E) -#define VPORT3_INTFLAGS _SFR_MEM8(0x001F) - -/* OCD - On-Chip Debug System */ -#define OCD_OCDR0 _SFR_MEM8(0x002E) -#define OCD_OCDR1 _SFR_MEM8(0x002F) - -/* CPU - CPU Registers */ -#define CPU_CCP _SFR_MEM8(0x0034) -#define CPU_RAMPD _SFR_MEM8(0x0038) -#define CPU_RAMPX _SFR_MEM8(0x0039) -#define CPU_RAMPY _SFR_MEM8(0x003A) -#define CPU_RAMPZ _SFR_MEM8(0x003B) -#define CPU_EIND _SFR_MEM8(0x003C) -#define CPU_SPL _SFR_MEM8(0x003D) -#define CPU_SPH _SFR_MEM8(0x003E) -#define CPU_SREG _SFR_MEM8(0x003F) - -/* CLK - Clock System */ -#define CLK_CTRL _SFR_MEM8(0x0040) -#define CLK_PSCTRL _SFR_MEM8(0x0041) -#define CLK_LOCK _SFR_MEM8(0x0042) -#define CLK_RTCCTRL _SFR_MEM8(0x0043) - -/* SLEEP - Sleep Controller */ -#define SLEEP_CTRL _SFR_MEM8(0x0048) - -/* OSC - Oscillator Control */ -#define OSC_CTRL _SFR_MEM8(0x0050) -#define OSC_STATUS _SFR_MEM8(0x0051) -#define OSC_XOSCCTRL _SFR_MEM8(0x0052) -#define OSC_XOSCFAIL _SFR_MEM8(0x0053) -#define OSC_RC32KCAL _SFR_MEM8(0x0054) -#define OSC_PLLCTRL _SFR_MEM8(0x0055) -#define OSC_DFLLCTRL _SFR_MEM8(0x0056) - -/* DFLLRC32M - DFLL for 32MHz RC Oscillator */ -#define DFLLRC32M_CTRL _SFR_MEM8(0x0060) -#define DFLLRC32M_CALA _SFR_MEM8(0x0062) -#define DFLLRC32M_CALB _SFR_MEM8(0x0063) -#define DFLLRC32M_OSCCNT0 _SFR_MEM8(0x0064) -#define DFLLRC32M_OSCCNT1 _SFR_MEM8(0x0065) -#define DFLLRC32M_OSCCNT2 _SFR_MEM8(0x0066) - -/* DFLLRC2M - DFLL for 2MHz RC Oscillator */ -#define DFLLRC2M_CTRL _SFR_MEM8(0x0068) -#define DFLLRC2M_CALA _SFR_MEM8(0x006A) -#define DFLLRC2M_CALB _SFR_MEM8(0x006B) -#define DFLLRC2M_OSCCNT0 _SFR_MEM8(0x006C) -#define DFLLRC2M_OSCCNT1 _SFR_MEM8(0x006D) -#define DFLLRC2M_OSCCNT2 _SFR_MEM8(0x006E) - -/* PR - Power Reduction */ -#define PR_PR _SFR_MEM8(0x0070) -#define PR_PRPA _SFR_MEM8(0x0071) -#define PR_PRPB _SFR_MEM8(0x0072) -#define PR_PRPC _SFR_MEM8(0x0073) -#define PR_PRPD _SFR_MEM8(0x0074) -#define PR_PRPE _SFR_MEM8(0x0075) -#define PR_PRPF _SFR_MEM8(0x0076) - -/* RST - Reset Controller */ -#define RST_STATUS _SFR_MEM8(0x0078) -#define RST_CTRL _SFR_MEM8(0x0079) - -/* WDT - Watch-Dog Timer */ -#define WDT_CTRL _SFR_MEM8(0x0080) -#define WDT_WINCTRL _SFR_MEM8(0x0081) -#define WDT_STATUS _SFR_MEM8(0x0082) - -/* MCU - MCU Control */ -#define MCU_DEVID0 _SFR_MEM8(0x0090) -#define MCU_DEVID1 _SFR_MEM8(0x0091) -#define MCU_DEVID2 _SFR_MEM8(0x0092) -#define MCU_REVID _SFR_MEM8(0x0093) -#define MCU_JTAGUID _SFR_MEM8(0x0094) -#define MCU_MCUCR _SFR_MEM8(0x0096) -#define MCU_EVSYSLOCK _SFR_MEM8(0x0098) -#define MCU_AWEXLOCK _SFR_MEM8(0x0099) - -/* PMIC - Programmable Interrupt Controller */ -#define PMIC_STATUS _SFR_MEM8(0x00A0) -#define PMIC_INTPRI _SFR_MEM8(0x00A1) -#define PMIC_CTRL _SFR_MEM8(0x00A2) - -/* PORTCFG - Port Configuration */ -#define PORTCFG_MPCMASK _SFR_MEM8(0x00B0) -#define PORTCFG_VPCTRLA _SFR_MEM8(0x00B2) -#define PORTCFG_VPCTRLB _SFR_MEM8(0x00B3) -#define PORTCFG_CLKEVOUT _SFR_MEM8(0x00B4) - -/* AES - AES Crypto Module */ -#define AES_CTRL _SFR_MEM8(0x00C0) -#define AES_STATUS _SFR_MEM8(0x00C1) -#define AES_STATE _SFR_MEM8(0x00C2) -#define AES_KEY _SFR_MEM8(0x00C3) -#define AES_INTCTRL _SFR_MEM8(0x00C4) - -/* DMA - DMA Controller */ -#define DMA_CTRL _SFR_MEM8(0x0100) -#define DMA_INTFLAGS _SFR_MEM8(0x0103) -#define DMA_STATUS _SFR_MEM8(0x0104) -#define DMA_TEMP _SFR_MEM16(0x0106) -#define DMA_CH0_CTRLA _SFR_MEM8(0x0110) -#define DMA_CH0_CTRLB _SFR_MEM8(0x0111) -#define DMA_CH0_ADDRCTRL _SFR_MEM8(0x0112) -#define DMA_CH0_TRIGSRC _SFR_MEM8(0x0113) -#define DMA_CH0_TRFCNT _SFR_MEM16(0x0114) -#define DMA_CH0_REPCNT _SFR_MEM8(0x0116) -#define DMA_CH0_SRCADDR0 _SFR_MEM8(0x0118) -#define DMA_CH0_SRCADDR1 _SFR_MEM8(0x0119) -#define DMA_CH0_SRCADDR2 _SFR_MEM8(0x011A) -#define DMA_CH0_DESTADDR0 _SFR_MEM8(0x011C) -#define DMA_CH0_DESTADDR1 _SFR_MEM8(0x011D) -#define DMA_CH0_DESTADDR2 _SFR_MEM8(0x011E) -#define DMA_CH1_CTRLA _SFR_MEM8(0x0120) -#define DMA_CH1_CTRLB _SFR_MEM8(0x0121) -#define DMA_CH1_ADDRCTRL _SFR_MEM8(0x0122) -#define DMA_CH1_TRIGSRC _SFR_MEM8(0x0123) -#define DMA_CH1_TRFCNT _SFR_MEM16(0x0124) -#define DMA_CH1_REPCNT _SFR_MEM8(0x0126) -#define DMA_CH1_SRCADDR0 _SFR_MEM8(0x0128) -#define DMA_CH1_SRCADDR1 _SFR_MEM8(0x0129) -#define DMA_CH1_SRCADDR2 _SFR_MEM8(0x012A) -#define DMA_CH1_DESTADDR0 _SFR_MEM8(0x012C) -#define DMA_CH1_DESTADDR1 _SFR_MEM8(0x012D) -#define DMA_CH1_DESTADDR2 _SFR_MEM8(0x012E) -#define DMA_CH2_CTRLA _SFR_MEM8(0x0130) -#define DMA_CH2_CTRLB _SFR_MEM8(0x0131) -#define DMA_CH2_ADDRCTRL _SFR_MEM8(0x0132) -#define DMA_CH2_TRIGSRC _SFR_MEM8(0x0133) -#define DMA_CH2_TRFCNT _SFR_MEM16(0x0134) -#define DMA_CH2_REPCNT _SFR_MEM8(0x0136) -#define DMA_CH2_SRCADDR0 _SFR_MEM8(0x0138) -#define DMA_CH2_SRCADDR1 _SFR_MEM8(0x0139) -#define DMA_CH2_SRCADDR2 _SFR_MEM8(0x013A) -#define DMA_CH2_DESTADDR0 _SFR_MEM8(0x013C) -#define DMA_CH2_DESTADDR1 _SFR_MEM8(0x013D) -#define DMA_CH2_DESTADDR2 _SFR_MEM8(0x013E) -#define DMA_CH3_CTRLA _SFR_MEM8(0x0140) -#define DMA_CH3_CTRLB _SFR_MEM8(0x0141) -#define DMA_CH3_ADDRCTRL _SFR_MEM8(0x0142) -#define DMA_CH3_TRIGSRC _SFR_MEM8(0x0143) -#define DMA_CH3_TRFCNT _SFR_MEM16(0x0144) -#define DMA_CH3_REPCNT _SFR_MEM8(0x0146) -#define DMA_CH3_SRCADDR0 _SFR_MEM8(0x0148) -#define DMA_CH3_SRCADDR1 _SFR_MEM8(0x0149) -#define DMA_CH3_SRCADDR2 _SFR_MEM8(0x014A) -#define DMA_CH3_DESTADDR0 _SFR_MEM8(0x014C) -#define DMA_CH3_DESTADDR1 _SFR_MEM8(0x014D) -#define DMA_CH3_DESTADDR2 _SFR_MEM8(0x014E) - -/* EVSYS - Event System */ -#define EVSYS_CH0MUX _SFR_MEM8(0x0180) -#define EVSYS_CH1MUX _SFR_MEM8(0x0181) -#define EVSYS_CH2MUX _SFR_MEM8(0x0182) -#define EVSYS_CH3MUX _SFR_MEM8(0x0183) -#define EVSYS_CH4MUX _SFR_MEM8(0x0184) -#define EVSYS_CH5MUX _SFR_MEM8(0x0185) -#define EVSYS_CH6MUX _SFR_MEM8(0x0186) -#define EVSYS_CH7MUX _SFR_MEM8(0x0187) -#define EVSYS_CH0CTRL _SFR_MEM8(0x0188) -#define EVSYS_CH1CTRL _SFR_MEM8(0x0189) -#define EVSYS_CH2CTRL _SFR_MEM8(0x018A) -#define EVSYS_CH3CTRL _SFR_MEM8(0x018B) -#define EVSYS_CH4CTRL _SFR_MEM8(0x018C) -#define EVSYS_CH5CTRL _SFR_MEM8(0x018D) -#define EVSYS_CH6CTRL _SFR_MEM8(0x018E) -#define EVSYS_CH7CTRL _SFR_MEM8(0x018F) -#define EVSYS_STROBE _SFR_MEM8(0x0190) -#define EVSYS_DATA _SFR_MEM8(0x0191) - -/* NVM - Non Volatile Memory Controller */ -#define NVM_ADDR0 _SFR_MEM8(0x01C0) -#define NVM_ADDR1 _SFR_MEM8(0x01C1) -#define NVM_ADDR2 _SFR_MEM8(0x01C2) -#define NVM_DATA0 _SFR_MEM8(0x01C4) -#define NVM_DATA1 _SFR_MEM8(0x01C5) -#define NVM_DATA2 _SFR_MEM8(0x01C6) -#define NVM_CMD _SFR_MEM8(0x01CA) -#define NVM_CTRLA _SFR_MEM8(0x01CB) -#define NVM_CTRLB _SFR_MEM8(0x01CC) -#define NVM_INTCTRL _SFR_MEM8(0x01CD) -#define NVM_STATUS _SFR_MEM8(0x01CF) -#define NVM_LOCKBITS _SFR_MEM8(0x01D0) - -/* ADCA - Analog to Digital Converter A */ -#define ADCA_CTRLA _SFR_MEM8(0x0200) -#define ADCA_CTRLB _SFR_MEM8(0x0201) -#define ADCA_REFCTRL _SFR_MEM8(0x0202) -#define ADCA_EVCTRL _SFR_MEM8(0x0203) -#define ADCA_PRESCALER _SFR_MEM8(0x0204) -#define ADCA_CALCTRL _SFR_MEM8(0x0205) -#define ADCA_INTFLAGS _SFR_MEM8(0x0206) -#define ADCA_CALIB _SFR_MEM8(0x020C) -#define ADCA_CH0RES _SFR_MEM16(0x0210) -#define ADCA_CH1RES _SFR_MEM16(0x0212) -#define ADCA_CH2RES _SFR_MEM16(0x0214) -#define ADCA_CH3RES _SFR_MEM16(0x0216) -#define ADCA_CMP _SFR_MEM16(0x0218) -#define ADCA_CH0_CTRL _SFR_MEM8(0x0220) -#define ADCA_CH0_MUXCTRL _SFR_MEM8(0x0221) -#define ADCA_CH0_INTCTRL _SFR_MEM8(0x0222) -#define ADCA_CH0_INTFLAGS _SFR_MEM8(0x0223) -#define ADCA_CH0_RES _SFR_MEM16(0x0224) -#define ADCA_CH1_CTRL _SFR_MEM8(0x0228) -#define ADCA_CH1_MUXCTRL _SFR_MEM8(0x0229) -#define ADCA_CH1_INTCTRL _SFR_MEM8(0x022A) -#define ADCA_CH1_INTFLAGS _SFR_MEM8(0x022B) -#define ADCA_CH1_RES _SFR_MEM16(0x022C) -#define ADCA_CH2_CTRL _SFR_MEM8(0x0230) -#define ADCA_CH2_MUXCTRL _SFR_MEM8(0x0231) -#define ADCA_CH2_INTCTRL _SFR_MEM8(0x0232) -#define ADCA_CH2_INTFLAGS _SFR_MEM8(0x0233) -#define ADCA_CH2_RES _SFR_MEM16(0x0234) -#define ADCA_CH3_CTRL _SFR_MEM8(0x0238) -#define ADCA_CH3_MUXCTRL _SFR_MEM8(0x0239) -#define ADCA_CH3_INTCTRL _SFR_MEM8(0x023A) -#define ADCA_CH3_INTFLAGS _SFR_MEM8(0x023B) -#define ADCA_CH3_RES _SFR_MEM16(0x023C) - -/* ADCB - Analog to Digital Converter B */ -#define ADCB_CTRLA _SFR_MEM8(0x0240) -#define ADCB_CTRLB _SFR_MEM8(0x0241) -#define ADCB_REFCTRL _SFR_MEM8(0x0242) -#define ADCB_EVCTRL _SFR_MEM8(0x0243) -#define ADCB_PRESCALER _SFR_MEM8(0x0244) -#define ADCB_CALCTRL _SFR_MEM8(0x0245) -#define ADCB_INTFLAGS _SFR_MEM8(0x0246) -#define ADCB_CALIB _SFR_MEM8(0x024C) -#define ADCB_CH0RES _SFR_MEM16(0x0250) -#define ADCB_CH1RES _SFR_MEM16(0x0252) -#define ADCB_CH2RES _SFR_MEM16(0x0254) -#define ADCB_CH3RES _SFR_MEM16(0x0256) -#define ADCB_CMP _SFR_MEM16(0x0258) -#define ADCB_CH0_CTRL _SFR_MEM8(0x0260) -#define ADCB_CH0_MUXCTRL _SFR_MEM8(0x0261) -#define ADCB_CH0_INTCTRL _SFR_MEM8(0x0262) -#define ADCB_CH0_INTFLAGS _SFR_MEM8(0x0263) -#define ADCB_CH0_RES _SFR_MEM16(0x0264) -#define ADCB_CH1_CTRL _SFR_MEM8(0x0268) -#define ADCB_CH1_MUXCTRL _SFR_MEM8(0x0269) -#define ADCB_CH1_INTCTRL _SFR_MEM8(0x026A) -#define ADCB_CH1_INTFLAGS _SFR_MEM8(0x026B) -#define ADCB_CH1_RES _SFR_MEM16(0x026C) -#define ADCB_CH2_CTRL _SFR_MEM8(0x0270) -#define ADCB_CH2_MUXCTRL _SFR_MEM8(0x0271) -#define ADCB_CH2_INTCTRL _SFR_MEM8(0x0272) -#define ADCB_CH2_INTFLAGS _SFR_MEM8(0x0273) -#define ADCB_CH2_RES _SFR_MEM16(0x0274) -#define ADCB_CH3_CTRL _SFR_MEM8(0x0278) -#define ADCB_CH3_MUXCTRL _SFR_MEM8(0x0279) -#define ADCB_CH3_INTCTRL _SFR_MEM8(0x027A) -#define ADCB_CH3_INTFLAGS _SFR_MEM8(0x027B) -#define ADCB_CH3_RES _SFR_MEM16(0x027C) - -/* DACB - Digital to Analog Converter B */ -#define DACB_CTRLA _SFR_MEM8(0x0320) -#define DACB_CTRLB _SFR_MEM8(0x0321) -#define DACB_CTRLC _SFR_MEM8(0x0322) -#define DACB_EVCTRL _SFR_MEM8(0x0323) -#define DACB_TIMCTRL _SFR_MEM8(0x0324) -#define DACB_STATUS _SFR_MEM8(0x0325) -#define DACB_GAINCAL _SFR_MEM8(0x0328) -#define DACB_OFFSETCAL _SFR_MEM8(0x0329) -#define DACB_CH0DATA _SFR_MEM16(0x0338) -#define DACB_CH1DATA _SFR_MEM16(0x033A) - -/* ACA - Analog Comparator A */ -#define ACA_AC0CTRL _SFR_MEM8(0x0380) -#define ACA_AC1CTRL _SFR_MEM8(0x0381) -#define ACA_AC0MUXCTRL _SFR_MEM8(0x0382) -#define ACA_AC1MUXCTRL _SFR_MEM8(0x0383) -#define ACA_CTRLA _SFR_MEM8(0x0384) -#define ACA_CTRLB _SFR_MEM8(0x0385) -#define ACA_WINCTRL _SFR_MEM8(0x0386) -#define ACA_STATUS _SFR_MEM8(0x0387) - -/* ACB - Analog Comparator B */ -#define ACB_AC0CTRL _SFR_MEM8(0x0390) -#define ACB_AC1CTRL _SFR_MEM8(0x0391) -#define ACB_AC0MUXCTRL _SFR_MEM8(0x0392) -#define ACB_AC1MUXCTRL _SFR_MEM8(0x0393) -#define ACB_CTRLA _SFR_MEM8(0x0394) -#define ACB_CTRLB _SFR_MEM8(0x0395) -#define ACB_WINCTRL _SFR_MEM8(0x0396) -#define ACB_STATUS _SFR_MEM8(0x0397) - -/* RTC - Real-Time Counter */ -#define RTC_CTRL _SFR_MEM8(0x0400) -#define RTC_STATUS _SFR_MEM8(0x0401) -#define RTC_INTCTRL _SFR_MEM8(0x0402) -#define RTC_INTFLAGS _SFR_MEM8(0x0403) -#define RTC_TEMP _SFR_MEM8(0x0404) -#define RTC_CNT _SFR_MEM16(0x0408) -#define RTC_PER _SFR_MEM16(0x040A) -#define RTC_COMP _SFR_MEM16(0x040C) - -/* TWIC - Two-Wire Interface C */ -#define TWIC_CTRL _SFR_MEM8(0x0480) -#define TWIC_MASTER_CTRLA _SFR_MEM8(0x0481) -#define TWIC_MASTER_CTRLB _SFR_MEM8(0x0482) -#define TWIC_MASTER_CTRLC _SFR_MEM8(0x0483) -#define TWIC_MASTER_STATUS _SFR_MEM8(0x0484) -#define TWIC_MASTER_BAUD _SFR_MEM8(0x0485) -#define TWIC_MASTER_ADDR _SFR_MEM8(0x0486) -#define TWIC_MASTER_DATA _SFR_MEM8(0x0487) -#define TWIC_SLAVE_CTRLA _SFR_MEM8(0x0488) -#define TWIC_SLAVE_CTRLB _SFR_MEM8(0x0489) -#define TWIC_SLAVE_STATUS _SFR_MEM8(0x048A) -#define TWIC_SLAVE_ADDR _SFR_MEM8(0x048B) -#define TWIC_SLAVE_DATA _SFR_MEM8(0x048C) - -/* TWIE - Two-Wire Interface E */ -#define TWIE_CTRL _SFR_MEM8(0x04A0) -#define TWIE_MASTER_CTRLA _SFR_MEM8(0x04A1) -#define TWIE_MASTER_CTRLB _SFR_MEM8(0x04A2) -#define TWIE_MASTER_CTRLC _SFR_MEM8(0x04A3) -#define TWIE_MASTER_STATUS _SFR_MEM8(0x04A4) -#define TWIE_MASTER_BAUD _SFR_MEM8(0x04A5) -#define TWIE_MASTER_ADDR _SFR_MEM8(0x04A6) -#define TWIE_MASTER_DATA _SFR_MEM8(0x04A7) -#define TWIE_SLAVE_CTRLA _SFR_MEM8(0x04A8) -#define TWIE_SLAVE_CTRLB _SFR_MEM8(0x04A9) -#define TWIE_SLAVE_STATUS _SFR_MEM8(0x04AA) -#define TWIE_SLAVE_ADDR _SFR_MEM8(0x04AB) -#define TWIE_SLAVE_DATA _SFR_MEM8(0x04AC) - -/* PORTA - Port A */ -#define PORTA_DIR _SFR_MEM8(0x0600) -#define PORTA_DIRSET _SFR_MEM8(0x0601) -#define PORTA_DIRCLR _SFR_MEM8(0x0602) -#define PORTA_DIRTGL _SFR_MEM8(0x0603) -#define PORTA_OUT _SFR_MEM8(0x0604) -#define PORTA_OUTSET _SFR_MEM8(0x0605) -#define PORTA_OUTCLR _SFR_MEM8(0x0606) -#define PORTA_OUTTGL _SFR_MEM8(0x0607) -#define PORTA_IN _SFR_MEM8(0x0608) -#define PORTA_INTCTRL _SFR_MEM8(0x0609) -#define PORTA_INT0MASK _SFR_MEM8(0x060A) -#define PORTA_INT1MASK _SFR_MEM8(0x060B) -#define PORTA_INTFLAGS _SFR_MEM8(0x060C) -#define PORTA_PIN0CTRL _SFR_MEM8(0x0610) -#define PORTA_PIN1CTRL _SFR_MEM8(0x0611) -#define PORTA_PIN2CTRL _SFR_MEM8(0x0612) -#define PORTA_PIN3CTRL _SFR_MEM8(0x0613) -#define PORTA_PIN4CTRL _SFR_MEM8(0x0614) -#define PORTA_PIN5CTRL _SFR_MEM8(0x0615) -#define PORTA_PIN6CTRL _SFR_MEM8(0x0616) -#define PORTA_PIN7CTRL _SFR_MEM8(0x0617) - -/* PORTB - Port B */ -#define PORTB_DIR _SFR_MEM8(0x0620) -#define PORTB_DIRSET _SFR_MEM8(0x0621) -#define PORTB_DIRCLR _SFR_MEM8(0x0622) -#define PORTB_DIRTGL _SFR_MEM8(0x0623) -#define PORTB_OUT _SFR_MEM8(0x0624) -#define PORTB_OUTSET _SFR_MEM8(0x0625) -#define PORTB_OUTCLR _SFR_MEM8(0x0626) -#define PORTB_OUTTGL _SFR_MEM8(0x0627) -#define PORTB_IN _SFR_MEM8(0x0628) -#define PORTB_INTCTRL _SFR_MEM8(0x0629) -#define PORTB_INT0MASK _SFR_MEM8(0x062A) -#define PORTB_INT1MASK _SFR_MEM8(0x062B) -#define PORTB_INTFLAGS _SFR_MEM8(0x062C) -#define PORTB_PIN0CTRL _SFR_MEM8(0x0630) -#define PORTB_PIN1CTRL _SFR_MEM8(0x0631) -#define PORTB_PIN2CTRL _SFR_MEM8(0x0632) -#define PORTB_PIN3CTRL _SFR_MEM8(0x0633) -#define PORTB_PIN4CTRL _SFR_MEM8(0x0634) -#define PORTB_PIN5CTRL _SFR_MEM8(0x0635) -#define PORTB_PIN6CTRL _SFR_MEM8(0x0636) -#define PORTB_PIN7CTRL _SFR_MEM8(0x0637) - -/* PORTC - Port C */ -#define PORTC_DIR _SFR_MEM8(0x0640) -#define PORTC_DIRSET _SFR_MEM8(0x0641) -#define PORTC_DIRCLR _SFR_MEM8(0x0642) -#define PORTC_DIRTGL _SFR_MEM8(0x0643) -#define PORTC_OUT _SFR_MEM8(0x0644) -#define PORTC_OUTSET _SFR_MEM8(0x0645) -#define PORTC_OUTCLR _SFR_MEM8(0x0646) -#define PORTC_OUTTGL _SFR_MEM8(0x0647) -#define PORTC_IN _SFR_MEM8(0x0648) -#define PORTC_INTCTRL _SFR_MEM8(0x0649) -#define PORTC_INT0MASK _SFR_MEM8(0x064A) -#define PORTC_INT1MASK _SFR_MEM8(0x064B) -#define PORTC_INTFLAGS _SFR_MEM8(0x064C) -#define PORTC_PIN0CTRL _SFR_MEM8(0x0650) -#define PORTC_PIN1CTRL _SFR_MEM8(0x0651) -#define PORTC_PIN2CTRL _SFR_MEM8(0x0652) -#define PORTC_PIN3CTRL _SFR_MEM8(0x0653) -#define PORTC_PIN4CTRL _SFR_MEM8(0x0654) -#define PORTC_PIN5CTRL _SFR_MEM8(0x0655) -#define PORTC_PIN6CTRL _SFR_MEM8(0x0656) -#define PORTC_PIN7CTRL _SFR_MEM8(0x0657) - -/* PORTD - Port D */ -#define PORTD_DIR _SFR_MEM8(0x0660) -#define PORTD_DIRSET _SFR_MEM8(0x0661) -#define PORTD_DIRCLR _SFR_MEM8(0x0662) -#define PORTD_DIRTGL _SFR_MEM8(0x0663) -#define PORTD_OUT _SFR_MEM8(0x0664) -#define PORTD_OUTSET _SFR_MEM8(0x0665) -#define PORTD_OUTCLR _SFR_MEM8(0x0666) -#define PORTD_OUTTGL _SFR_MEM8(0x0667) -#define PORTD_IN _SFR_MEM8(0x0668) -#define PORTD_INTCTRL _SFR_MEM8(0x0669) -#define PORTD_INT0MASK _SFR_MEM8(0x066A) -#define PORTD_INT1MASK _SFR_MEM8(0x066B) -#define PORTD_INTFLAGS _SFR_MEM8(0x066C) -#define PORTD_PIN0CTRL _SFR_MEM8(0x0670) -#define PORTD_PIN1CTRL _SFR_MEM8(0x0671) -#define PORTD_PIN2CTRL _SFR_MEM8(0x0672) -#define PORTD_PIN3CTRL _SFR_MEM8(0x0673) -#define PORTD_PIN4CTRL _SFR_MEM8(0x0674) -#define PORTD_PIN5CTRL _SFR_MEM8(0x0675) -#define PORTD_PIN6CTRL _SFR_MEM8(0x0676) -#define PORTD_PIN7CTRL _SFR_MEM8(0x0677) - -/* PORTE - Port E */ -#define PORTE_DIR _SFR_MEM8(0x0680) -#define PORTE_DIRSET _SFR_MEM8(0x0681) -#define PORTE_DIRCLR _SFR_MEM8(0x0682) -#define PORTE_DIRTGL _SFR_MEM8(0x0683) -#define PORTE_OUT _SFR_MEM8(0x0684) -#define PORTE_OUTSET _SFR_MEM8(0x0685) -#define PORTE_OUTCLR _SFR_MEM8(0x0686) -#define PORTE_OUTTGL _SFR_MEM8(0x0687) -#define PORTE_IN _SFR_MEM8(0x0688) -#define PORTE_INTCTRL _SFR_MEM8(0x0689) -#define PORTE_INT0MASK _SFR_MEM8(0x068A) -#define PORTE_INT1MASK _SFR_MEM8(0x068B) -#define PORTE_INTFLAGS _SFR_MEM8(0x068C) -#define PORTE_PIN0CTRL _SFR_MEM8(0x0690) -#define PORTE_PIN1CTRL _SFR_MEM8(0x0691) -#define PORTE_PIN2CTRL _SFR_MEM8(0x0692) -#define PORTE_PIN3CTRL _SFR_MEM8(0x0693) -#define PORTE_PIN4CTRL _SFR_MEM8(0x0694) -#define PORTE_PIN5CTRL _SFR_MEM8(0x0695) -#define PORTE_PIN6CTRL _SFR_MEM8(0x0696) -#define PORTE_PIN7CTRL _SFR_MEM8(0x0697) - -/* PORTF - Port F */ -#define PORTF_DIR _SFR_MEM8(0x06A0) -#define PORTF_DIRSET _SFR_MEM8(0x06A1) -#define PORTF_DIRCLR _SFR_MEM8(0x06A2) -#define PORTF_DIRTGL _SFR_MEM8(0x06A3) -#define PORTF_OUT _SFR_MEM8(0x06A4) -#define PORTF_OUTSET _SFR_MEM8(0x06A5) -#define PORTF_OUTCLR _SFR_MEM8(0x06A6) -#define PORTF_OUTTGL _SFR_MEM8(0x06A7) -#define PORTF_IN _SFR_MEM8(0x06A8) -#define PORTF_INTCTRL _SFR_MEM8(0x06A9) -#define PORTF_INT0MASK _SFR_MEM8(0x06AA) -#define PORTF_INT1MASK _SFR_MEM8(0x06AB) -#define PORTF_INTFLAGS _SFR_MEM8(0x06AC) -#define PORTF_PIN0CTRL _SFR_MEM8(0x06B0) -#define PORTF_PIN1CTRL _SFR_MEM8(0x06B1) -#define PORTF_PIN2CTRL _SFR_MEM8(0x06B2) -#define PORTF_PIN3CTRL _SFR_MEM8(0x06B3) -#define PORTF_PIN4CTRL _SFR_MEM8(0x06B4) -#define PORTF_PIN5CTRL _SFR_MEM8(0x06B5) -#define PORTF_PIN6CTRL _SFR_MEM8(0x06B6) -#define PORTF_PIN7CTRL _SFR_MEM8(0x06B7) - -/* PORTR - Port R */ -#define PORTR_DIR _SFR_MEM8(0x07E0) -#define PORTR_DIRSET _SFR_MEM8(0x07E1) -#define PORTR_DIRCLR _SFR_MEM8(0x07E2) -#define PORTR_DIRTGL _SFR_MEM8(0x07E3) -#define PORTR_OUT _SFR_MEM8(0x07E4) -#define PORTR_OUTSET _SFR_MEM8(0x07E5) -#define PORTR_OUTCLR _SFR_MEM8(0x07E6) -#define PORTR_OUTTGL _SFR_MEM8(0x07E7) -#define PORTR_IN _SFR_MEM8(0x07E8) -#define PORTR_INTCTRL _SFR_MEM8(0x07E9) -#define PORTR_INT0MASK _SFR_MEM8(0x07EA) -#define PORTR_INT1MASK _SFR_MEM8(0x07EB) -#define PORTR_INTFLAGS _SFR_MEM8(0x07EC) -#define PORTR_PIN0CTRL _SFR_MEM8(0x07F0) -#define PORTR_PIN1CTRL _SFR_MEM8(0x07F1) -#define PORTR_PIN2CTRL _SFR_MEM8(0x07F2) -#define PORTR_PIN3CTRL _SFR_MEM8(0x07F3) -#define PORTR_PIN4CTRL _SFR_MEM8(0x07F4) -#define PORTR_PIN5CTRL _SFR_MEM8(0x07F5) -#define PORTR_PIN6CTRL _SFR_MEM8(0x07F6) -#define PORTR_PIN7CTRL _SFR_MEM8(0x07F7) - -/* TCC0 - Timer/Counter C0 */ -#define TCC0_CTRLA _SFR_MEM8(0x0800) -#define TCC0_CTRLB _SFR_MEM8(0x0801) -#define TCC0_CTRLC _SFR_MEM8(0x0802) -#define TCC0_CTRLD _SFR_MEM8(0x0803) -#define TCC0_CTRLE _SFR_MEM8(0x0804) -#define TCC0_INTCTRLA _SFR_MEM8(0x0806) -#define TCC0_INTCTRLB _SFR_MEM8(0x0807) -#define TCC0_CTRLFCLR _SFR_MEM8(0x0808) -#define TCC0_CTRLFSET _SFR_MEM8(0x0809) -#define TCC0_CTRLGCLR _SFR_MEM8(0x080A) -#define TCC0_CTRLGSET _SFR_MEM8(0x080B) -#define TCC0_INTFLAGS _SFR_MEM8(0x080C) -#define TCC0_TEMP _SFR_MEM8(0x080F) -#define TCC0_CNT _SFR_MEM16(0x0820) -#define TCC0_PER _SFR_MEM16(0x0826) -#define TCC0_CCA _SFR_MEM16(0x0828) -#define TCC0_CCB _SFR_MEM16(0x082A) -#define TCC0_CCC _SFR_MEM16(0x082C) -#define TCC0_CCD _SFR_MEM16(0x082E) -#define TCC0_PERBUF _SFR_MEM16(0x0836) -#define TCC0_CCABUF _SFR_MEM16(0x0838) -#define TCC0_CCBBUF _SFR_MEM16(0x083A) -#define TCC0_CCCBUF _SFR_MEM16(0x083C) -#define TCC0_CCDBUF _SFR_MEM16(0x083E) - -/* TCC1 - Timer/Counter C1 */ -#define TCC1_CTRLA _SFR_MEM8(0x0840) -#define TCC1_CTRLB _SFR_MEM8(0x0841) -#define TCC1_CTRLC _SFR_MEM8(0x0842) -#define TCC1_CTRLD _SFR_MEM8(0x0843) -#define TCC1_CTRLE _SFR_MEM8(0x0844) -#define TCC1_INTCTRLA _SFR_MEM8(0x0846) -#define TCC1_INTCTRLB _SFR_MEM8(0x0847) -#define TCC1_CTRLFCLR _SFR_MEM8(0x0848) -#define TCC1_CTRLFSET _SFR_MEM8(0x0849) -#define TCC1_CTRLGCLR _SFR_MEM8(0x084A) -#define TCC1_CTRLGSET _SFR_MEM8(0x084B) -#define TCC1_INTFLAGS _SFR_MEM8(0x084C) -#define TCC1_TEMP _SFR_MEM8(0x084F) -#define TCC1_CNT _SFR_MEM16(0x0860) -#define TCC1_PER _SFR_MEM16(0x0866) -#define TCC1_CCA _SFR_MEM16(0x0868) -#define TCC1_CCB _SFR_MEM16(0x086A) -#define TCC1_PERBUF _SFR_MEM16(0x0876) -#define TCC1_CCABUF _SFR_MEM16(0x0878) -#define TCC1_CCBBUF _SFR_MEM16(0x087A) - -/* AWEXC - Advanced Waveform Extension C */ -#define AWEXC_CTRL _SFR_MEM8(0x0880) -#define AWEXC_FDEVMASK _SFR_MEM8(0x0882) -#define AWEXC_FDCTRL _SFR_MEM8(0x0883) -#define AWEXC_STATUS _SFR_MEM8(0x0884) -#define AWEXC_DTBOTH _SFR_MEM8(0x0886) -#define AWEXC_DTBOTHBUF _SFR_MEM8(0x0887) -#define AWEXC_DTLS _SFR_MEM8(0x0888) -#define AWEXC_DTHS _SFR_MEM8(0x0889) -#define AWEXC_DTLSBUF _SFR_MEM8(0x088A) -#define AWEXC_DTHSBUF _SFR_MEM8(0x088B) -#define AWEXC_OUTOVEN _SFR_MEM8(0x088C) - -/* HIRESC - High-Resolution Extension C */ -#define HIRESC_CTRL _SFR_MEM8(0x0890) - -/* USARTC0 - Universal Asynchronous Receiver-Transmitter C0 */ -#define USARTC0_DATA _SFR_MEM8(0x08A0) -#define USARTC0_STATUS _SFR_MEM8(0x08A1) -#define USARTC0_CTRLA _SFR_MEM8(0x08A3) -#define USARTC0_CTRLB _SFR_MEM8(0x08A4) -#define USARTC0_CTRLC _SFR_MEM8(0x08A5) -#define USARTC0_BAUDCTRLA _SFR_MEM8(0x08A6) -#define USARTC0_BAUDCTRLB _SFR_MEM8(0x08A7) - -/* USARTC1 - Universal Asynchronous Receiver-Transmitter C1 */ -#define USARTC1_DATA _SFR_MEM8(0x08B0) -#define USARTC1_STATUS _SFR_MEM8(0x08B1) -#define USARTC1_CTRLA _SFR_MEM8(0x08B3) -#define USARTC1_CTRLB _SFR_MEM8(0x08B4) -#define USARTC1_CTRLC _SFR_MEM8(0x08B5) -#define USARTC1_BAUDCTRLA _SFR_MEM8(0x08B6) -#define USARTC1_BAUDCTRLB _SFR_MEM8(0x08B7) - -/* SPIC - Serial Peripheral Interface C */ -#define SPIC_CTRL _SFR_MEM8(0x08C0) -#define SPIC_INTCTRL _SFR_MEM8(0x08C1) -#define SPIC_STATUS _SFR_MEM8(0x08C2) -#define SPIC_DATA _SFR_MEM8(0x08C3) - -/* IRCOM - IR Communication Module */ -#define IRCOM_CTRL _SFR_MEM8(0x08F8) -#define IRCOM_TXPLCTRL _SFR_MEM8(0x08F9) -#define IRCOM_RXPLCTRL _SFR_MEM8(0x08FA) - -/* TCD0 - Timer/Counter D0 */ -#define TCD0_CTRLA _SFR_MEM8(0x0900) -#define TCD0_CTRLB _SFR_MEM8(0x0901) -#define TCD0_CTRLC _SFR_MEM8(0x0902) -#define TCD0_CTRLD _SFR_MEM8(0x0903) -#define TCD0_CTRLE _SFR_MEM8(0x0904) -#define TCD0_INTCTRLA _SFR_MEM8(0x0906) -#define TCD0_INTCTRLB _SFR_MEM8(0x0907) -#define TCD0_CTRLFCLR _SFR_MEM8(0x0908) -#define TCD0_CTRLFSET _SFR_MEM8(0x0909) -#define TCD0_CTRLGCLR _SFR_MEM8(0x090A) -#define TCD0_CTRLGSET _SFR_MEM8(0x090B) -#define TCD0_INTFLAGS _SFR_MEM8(0x090C) -#define TCD0_TEMP _SFR_MEM8(0x090F) -#define TCD0_CNT _SFR_MEM16(0x0920) -#define TCD0_PER _SFR_MEM16(0x0926) -#define TCD0_CCA _SFR_MEM16(0x0928) -#define TCD0_CCB _SFR_MEM16(0x092A) -#define TCD0_CCC _SFR_MEM16(0x092C) -#define TCD0_CCD _SFR_MEM16(0x092E) -#define TCD0_PERBUF _SFR_MEM16(0x0936) -#define TCD0_CCABUF _SFR_MEM16(0x0938) -#define TCD0_CCBBUF _SFR_MEM16(0x093A) -#define TCD0_CCCBUF _SFR_MEM16(0x093C) -#define TCD0_CCDBUF _SFR_MEM16(0x093E) - -/* TCD1 - Timer/Counter D1 */ -#define TCD1_CTRLA _SFR_MEM8(0x0940) -#define TCD1_CTRLB _SFR_MEM8(0x0941) -#define TCD1_CTRLC _SFR_MEM8(0x0942) -#define TCD1_CTRLD _SFR_MEM8(0x0943) -#define TCD1_CTRLE _SFR_MEM8(0x0944) -#define TCD1_INTCTRLA _SFR_MEM8(0x0946) -#define TCD1_INTCTRLB _SFR_MEM8(0x0947) -#define TCD1_CTRLFCLR _SFR_MEM8(0x0948) -#define TCD1_CTRLFSET _SFR_MEM8(0x0949) -#define TCD1_CTRLGCLR _SFR_MEM8(0x094A) -#define TCD1_CTRLGSET _SFR_MEM8(0x094B) -#define TCD1_INTFLAGS _SFR_MEM8(0x094C) -#define TCD1_TEMP _SFR_MEM8(0x094F) -#define TCD1_CNT _SFR_MEM16(0x0960) -#define TCD1_PER _SFR_MEM16(0x0966) -#define TCD1_CCA _SFR_MEM16(0x0968) -#define TCD1_CCB _SFR_MEM16(0x096A) -#define TCD1_PERBUF _SFR_MEM16(0x0976) -#define TCD1_CCABUF _SFR_MEM16(0x0978) -#define TCD1_CCBBUF _SFR_MEM16(0x097A) - -/* HIRESD - High-Resolution Extension D */ -#define HIRESD_CTRL _SFR_MEM8(0x0990) - -/* USARTD0 - Universal Asynchronous Receiver-Transmitter D0 */ -#define USARTD0_DATA _SFR_MEM8(0x09A0) -#define USARTD0_STATUS _SFR_MEM8(0x09A1) -#define USARTD0_CTRLA _SFR_MEM8(0x09A3) -#define USARTD0_CTRLB _SFR_MEM8(0x09A4) -#define USARTD0_CTRLC _SFR_MEM8(0x09A5) -#define USARTD0_BAUDCTRLA _SFR_MEM8(0x09A6) -#define USARTD0_BAUDCTRLB _SFR_MEM8(0x09A7) - -/* USARTD1 - Universal Asynchronous Receiver-Transmitter D1 */ -#define USARTD1_DATA _SFR_MEM8(0x09B0) -#define USARTD1_STATUS _SFR_MEM8(0x09B1) -#define USARTD1_CTRLA _SFR_MEM8(0x09B3) -#define USARTD1_CTRLB _SFR_MEM8(0x09B4) -#define USARTD1_CTRLC _SFR_MEM8(0x09B5) -#define USARTD1_BAUDCTRLA _SFR_MEM8(0x09B6) -#define USARTD1_BAUDCTRLB _SFR_MEM8(0x09B7) - -/* SPID - Serial Peripheral Interface D */ -#define SPID_CTRL _SFR_MEM8(0x09C0) -#define SPID_INTCTRL _SFR_MEM8(0x09C1) -#define SPID_STATUS _SFR_MEM8(0x09C2) -#define SPID_DATA _SFR_MEM8(0x09C3) - -/* TCE0 - Timer/Counter E0 */ -#define TCE0_CTRLA _SFR_MEM8(0x0A00) -#define TCE0_CTRLB _SFR_MEM8(0x0A01) -#define TCE0_CTRLC _SFR_MEM8(0x0A02) -#define TCE0_CTRLD _SFR_MEM8(0x0A03) -#define TCE0_CTRLE _SFR_MEM8(0x0A04) -#define TCE0_INTCTRLA _SFR_MEM8(0x0A06) -#define TCE0_INTCTRLB _SFR_MEM8(0x0A07) -#define TCE0_CTRLFCLR _SFR_MEM8(0x0A08) -#define TCE0_CTRLFSET _SFR_MEM8(0x0A09) -#define TCE0_CTRLGCLR _SFR_MEM8(0x0A0A) -#define TCE0_CTRLGSET _SFR_MEM8(0x0A0B) -#define TCE0_INTFLAGS _SFR_MEM8(0x0A0C) -#define TCE0_TEMP _SFR_MEM8(0x0A0F) -#define TCE0_CNT _SFR_MEM16(0x0A20) -#define TCE0_PER _SFR_MEM16(0x0A26) -#define TCE0_CCA _SFR_MEM16(0x0A28) -#define TCE0_CCB _SFR_MEM16(0x0A2A) -#define TCE0_CCC _SFR_MEM16(0x0A2C) -#define TCE0_CCD _SFR_MEM16(0x0A2E) -#define TCE0_PERBUF _SFR_MEM16(0x0A36) -#define TCE0_CCABUF _SFR_MEM16(0x0A38) -#define TCE0_CCBBUF _SFR_MEM16(0x0A3A) -#define TCE0_CCCBUF _SFR_MEM16(0x0A3C) -#define TCE0_CCDBUF _SFR_MEM16(0x0A3E) - -/* TCE1 - Timer/Counter E1 */ -#define TCE1_CTRLA _SFR_MEM8(0x0A40) -#define TCE1_CTRLB _SFR_MEM8(0x0A41) -#define TCE1_CTRLC _SFR_MEM8(0x0A42) -#define TCE1_CTRLD _SFR_MEM8(0x0A43) -#define TCE1_CTRLE _SFR_MEM8(0x0A44) -#define TCE1_INTCTRLA _SFR_MEM8(0x0A46) -#define TCE1_INTCTRLB _SFR_MEM8(0x0A47) -#define TCE1_CTRLFCLR _SFR_MEM8(0x0A48) -#define TCE1_CTRLFSET _SFR_MEM8(0x0A49) -#define TCE1_CTRLGCLR _SFR_MEM8(0x0A4A) -#define TCE1_CTRLGSET _SFR_MEM8(0x0A4B) -#define TCE1_INTFLAGS _SFR_MEM8(0x0A4C) -#define TCE1_TEMP _SFR_MEM8(0x0A4F) -#define TCE1_CNT _SFR_MEM16(0x0A60) -#define TCE1_PER _SFR_MEM16(0x0A66) -#define TCE1_CCA _SFR_MEM16(0x0A68) -#define TCE1_CCB _SFR_MEM16(0x0A6A) -#define TCE1_PERBUF _SFR_MEM16(0x0A76) -#define TCE1_CCABUF _SFR_MEM16(0x0A78) -#define TCE1_CCBBUF _SFR_MEM16(0x0A7A) - -/* AWEXE - Advanced Waveform Extension E */ -#define AWEXE_CTRL _SFR_MEM8(0x0A80) -#define AWEXE_FDEVMASK _SFR_MEM8(0x0A82) -#define AWEXE_FDCTRL _SFR_MEM8(0x0A83) -#define AWEXE_STATUS _SFR_MEM8(0x0A84) -#define AWEXE_DTBOTH _SFR_MEM8(0x0A86) -#define AWEXE_DTBOTHBUF _SFR_MEM8(0x0A87) -#define AWEXE_DTLS _SFR_MEM8(0x0A88) -#define AWEXE_DTHS _SFR_MEM8(0x0A89) -#define AWEXE_DTLSBUF _SFR_MEM8(0x0A8A) -#define AWEXE_DTHSBUF _SFR_MEM8(0x0A8B) -#define AWEXE_OUTOVEN _SFR_MEM8(0x0A8C) - -/* HIRESE - High-Resolution Extension E */ -#define HIRESE_CTRL _SFR_MEM8(0x0A90) - -/* USARTE0 - Universal Asynchronous Receiver-Transmitter E0 */ -#define USARTE0_DATA _SFR_MEM8(0x0AA0) -#define USARTE0_STATUS _SFR_MEM8(0x0AA1) -#define USARTE0_CTRLA _SFR_MEM8(0x0AA3) -#define USARTE0_CTRLB _SFR_MEM8(0x0AA4) -#define USARTE0_CTRLC _SFR_MEM8(0x0AA5) -#define USARTE0_BAUDCTRLA _SFR_MEM8(0x0AA6) -#define USARTE0_BAUDCTRLB _SFR_MEM8(0x0AA7) - -/* USARTE1 - Universal Asynchronous Receiver-Transmitter E1 */ -#define USARTE1_DATA _SFR_MEM8(0x0AB0) -#define USARTE1_STATUS _SFR_MEM8(0x0AB1) -#define USARTE1_CTRLA _SFR_MEM8(0x0AB3) -#define USARTE1_CTRLB _SFR_MEM8(0x0AB4) -#define USARTE1_CTRLC _SFR_MEM8(0x0AB5) -#define USARTE1_BAUDCTRLA _SFR_MEM8(0x0AB6) -#define USARTE1_BAUDCTRLB _SFR_MEM8(0x0AB7) - -/* SPIE - Serial Peripheral Interface E */ -#define SPIE_CTRL _SFR_MEM8(0x0AC0) -#define SPIE_INTCTRL _SFR_MEM8(0x0AC1) -#define SPIE_STATUS _SFR_MEM8(0x0AC2) -#define SPIE_DATA _SFR_MEM8(0x0AC3) - -/* TCF0 - Timer/Counter F0 */ -#define TCF0_CTRLA _SFR_MEM8(0x0B00) -#define TCF0_CTRLB _SFR_MEM8(0x0B01) -#define TCF0_CTRLC _SFR_MEM8(0x0B02) -#define TCF0_CTRLD _SFR_MEM8(0x0B03) -#define TCF0_CTRLE _SFR_MEM8(0x0B04) -#define TCF0_INTCTRLA _SFR_MEM8(0x0B06) -#define TCF0_INTCTRLB _SFR_MEM8(0x0B07) -#define TCF0_CTRLFCLR _SFR_MEM8(0x0B08) -#define TCF0_CTRLFSET _SFR_MEM8(0x0B09) -#define TCF0_CTRLGCLR _SFR_MEM8(0x0B0A) -#define TCF0_CTRLGSET _SFR_MEM8(0x0B0B) -#define TCF0_INTFLAGS _SFR_MEM8(0x0B0C) -#define TCF0_TEMP _SFR_MEM8(0x0B0F) -#define TCF0_CNT _SFR_MEM16(0x0B20) -#define TCF0_PER _SFR_MEM16(0x0B26) -#define TCF0_CCA _SFR_MEM16(0x0B28) -#define TCF0_CCB _SFR_MEM16(0x0B2A) -#define TCF0_CCC _SFR_MEM16(0x0B2C) -#define TCF0_CCD _SFR_MEM16(0x0B2E) -#define TCF0_PERBUF _SFR_MEM16(0x0B36) -#define TCF0_CCABUF _SFR_MEM16(0x0B38) -#define TCF0_CCBBUF _SFR_MEM16(0x0B3A) -#define TCF0_CCCBUF _SFR_MEM16(0x0B3C) -#define TCF0_CCDBUF _SFR_MEM16(0x0B3E) - -/* HIRESF - High-Resolution Extension F */ -#define HIRESF_CTRL _SFR_MEM8(0x0B90) - -/* USARTF0 - Universal Asynchronous Receiver-Transmitter F0 */ -#define USARTF0_DATA _SFR_MEM8(0x0BA0) -#define USARTF0_STATUS _SFR_MEM8(0x0BA1) -#define USARTF0_CTRLA _SFR_MEM8(0x0BA3) -#define USARTF0_CTRLB _SFR_MEM8(0x0BA4) -#define USARTF0_CTRLC _SFR_MEM8(0x0BA5) -#define USARTF0_BAUDCTRLA _SFR_MEM8(0x0BA6) -#define USARTF0_BAUDCTRLB _SFR_MEM8(0x0BA7) - -/* USARTF1 - Universal Asynchronous Receiver-Transmitter F1 */ -#define USARTF1_DATA _SFR_MEM8(0x0BB0) -#define USARTF1_STATUS _SFR_MEM8(0x0BB1) -#define USARTF1_CTRLA _SFR_MEM8(0x0BB3) -#define USARTF1_CTRLB _SFR_MEM8(0x0BB4) -#define USARTF1_CTRLC _SFR_MEM8(0x0BB5) -#define USARTF1_BAUDCTRLA _SFR_MEM8(0x0BB6) -#define USARTF1_BAUDCTRLB _SFR_MEM8(0x0BB7) - -/* SPIF - Serial Peripheral Interface F */ -#define SPIF_CTRL _SFR_MEM8(0x0BC0) -#define SPIF_INTCTRL _SFR_MEM8(0x0BC1) -#define SPIF_STATUS _SFR_MEM8(0x0BC2) -#define SPIF_DATA _SFR_MEM8(0x0BC3) - - - -/*================== Bitfield Definitions ================== */ - -/* XOCD - On-Chip Debug System */ -/* OCD.OCDR1 bit masks and bit positions */ -#define OCD_OCDRD_bm 0x01 /* OCDR Dirty bit mask. */ -#define OCD_OCDRD_bp 0 /* OCDR Dirty bit position. */ - - -/* CPU - CPU */ -/* CPU.CCP bit masks and bit positions */ -#define CPU_CCP_gm 0xFF /* CCP signature group mask. */ -#define CPU_CCP_gp 0 /* CCP signature group position. */ -#define CPU_CCP0_bm (1<<0) /* CCP signature bit 0 mask. */ -#define CPU_CCP0_bp 0 /* CCP signature bit 0 position. */ -#define CPU_CCP1_bm (1<<1) /* CCP signature bit 1 mask. */ -#define CPU_CCP1_bp 1 /* CCP signature bit 1 position. */ -#define CPU_CCP2_bm (1<<2) /* CCP signature bit 2 mask. */ -#define CPU_CCP2_bp 2 /* CCP signature bit 2 position. */ -#define CPU_CCP3_bm (1<<3) /* CCP signature bit 3 mask. */ -#define CPU_CCP3_bp 3 /* CCP signature bit 3 position. */ -#define CPU_CCP4_bm (1<<4) /* CCP signature bit 4 mask. */ -#define CPU_CCP4_bp 4 /* CCP signature bit 4 position. */ -#define CPU_CCP5_bm (1<<5) /* CCP signature bit 5 mask. */ -#define CPU_CCP5_bp 5 /* CCP signature bit 5 position. */ -#define CPU_CCP6_bm (1<<6) /* CCP signature bit 6 mask. */ -#define CPU_CCP6_bp 6 /* CCP signature bit 6 position. */ -#define CPU_CCP7_bm (1<<7) /* CCP signature bit 7 mask. */ -#define CPU_CCP7_bp 7 /* CCP signature bit 7 position. */ - - -/* CPU.SREG bit masks and bit positions */ -#define CPU_I_bm 0x80 /* Global Interrupt Enable Flag bit mask. */ -#define CPU_I_bp 7 /* Global Interrupt Enable Flag bit position. */ - -#define CPU_T_bm 0x40 /* Transfer Bit bit mask. */ -#define CPU_T_bp 6 /* Transfer Bit bit position. */ - -#define CPU_H_bm 0x20 /* Half Carry Flag bit mask. */ -#define CPU_H_bp 5 /* Half Carry Flag bit position. */ - -#define CPU_S_bm 0x10 /* N Exclusive Or V Flag bit mask. */ -#define CPU_S_bp 4 /* N Exclusive Or V Flag bit position. */ - -#define CPU_V_bm 0x08 /* Two's Complement Overflow Flag bit mask. */ -#define CPU_V_bp 3 /* Two's Complement Overflow Flag bit position. */ - -#define CPU_N_bm 0x04 /* Negative Flag bit mask. */ -#define CPU_N_bp 2 /* Negative Flag bit position. */ - -#define CPU_Z_bm 0x02 /* Zero Flag bit mask. */ -#define CPU_Z_bp 1 /* Zero Flag bit position. */ - -#define CPU_C_bm 0x01 /* Carry Flag bit mask. */ -#define CPU_C_bp 0 /* Carry Flag bit position. */ - - -/* CLK - Clock System */ -/* CLK.CTRL bit masks and bit positions */ -#define CLK_SCLKSEL_gm 0x07 /* System Clock Selection group mask. */ -#define CLK_SCLKSEL_gp 0 /* System Clock Selection group position. */ -#define CLK_SCLKSEL0_bm (1<<0) /* System Clock Selection bit 0 mask. */ -#define CLK_SCLKSEL0_bp 0 /* System Clock Selection bit 0 position. */ -#define CLK_SCLKSEL1_bm (1<<1) /* System Clock Selection bit 1 mask. */ -#define CLK_SCLKSEL1_bp 1 /* System Clock Selection bit 1 position. */ -#define CLK_SCLKSEL2_bm (1<<2) /* System Clock Selection bit 2 mask. */ -#define CLK_SCLKSEL2_bp 2 /* System Clock Selection bit 2 position. */ - - -/* CLK.PSCTRL bit masks and bit positions */ -#define CLK_PSADIV_gm 0x7C /* Prescaler A Division Factor group mask. */ -#define CLK_PSADIV_gp 2 /* Prescaler A Division Factor group position. */ -#define CLK_PSADIV0_bm (1<<2) /* Prescaler A Division Factor bit 0 mask. */ -#define CLK_PSADIV0_bp 2 /* Prescaler A Division Factor bit 0 position. */ -#define CLK_PSADIV1_bm (1<<3) /* Prescaler A Division Factor bit 1 mask. */ -#define CLK_PSADIV1_bp 3 /* Prescaler A Division Factor bit 1 position. */ -#define CLK_PSADIV2_bm (1<<4) /* Prescaler A Division Factor bit 2 mask. */ -#define CLK_PSADIV2_bp 4 /* Prescaler A Division Factor bit 2 position. */ -#define CLK_PSADIV3_bm (1<<5) /* Prescaler A Division Factor bit 3 mask. */ -#define CLK_PSADIV3_bp 5 /* Prescaler A Division Factor bit 3 position. */ -#define CLK_PSADIV4_bm (1<<6) /* Prescaler A Division Factor bit 4 mask. */ -#define CLK_PSADIV4_bp 6 /* Prescaler A Division Factor bit 4 position. */ - -#define CLK_PSBCDIV_gm 0x03 /* Prescaler B and C Division factor group mask. */ -#define CLK_PSBCDIV_gp 0 /* Prescaler B and C Division factor group position. */ -#define CLK_PSBCDIV0_bm (1<<0) /* Prescaler B and C Division factor bit 0 mask. */ -#define CLK_PSBCDIV0_bp 0 /* Prescaler B and C Division factor bit 0 position. */ -#define CLK_PSBCDIV1_bm (1<<1) /* Prescaler B and C Division factor bit 1 mask. */ -#define CLK_PSBCDIV1_bp 1 /* Prescaler B and C Division factor bit 1 position. */ - - -/* CLK.LOCK bit masks and bit positions */ -#define CLK_LOCK_bm 0x01 /* Clock System Lock bit mask. */ -#define CLK_LOCK_bp 0 /* Clock System Lock bit position. */ - - -/* CLK.RTCCTRL bit masks and bit positions */ -#define CLK_RTCSRC_gm 0x0E /* Clock Source group mask. */ -#define CLK_RTCSRC_gp 1 /* Clock Source group position. */ -#define CLK_RTCSRC0_bm (1<<1) /* Clock Source bit 0 mask. */ -#define CLK_RTCSRC0_bp 1 /* Clock Source bit 0 position. */ -#define CLK_RTCSRC1_bm (1<<2) /* Clock Source bit 1 mask. */ -#define CLK_RTCSRC1_bp 2 /* Clock Source bit 1 position. */ -#define CLK_RTCSRC2_bm (1<<3) /* Clock Source bit 2 mask. */ -#define CLK_RTCSRC2_bp 3 /* Clock Source bit 2 position. */ - -#define CLK_RTCEN_bm 0x01 /* RTC Clock Source Enable bit mask. */ -#define CLK_RTCEN_bp 0 /* RTC Clock Source Enable bit position. */ - - -/* PR.PR bit masks and bit positions */ -#define PR_EBI_bm 0x08 /* External Bus Interface bit mask. */ -#define PR_EBI_bp 3 /* External Bus Interface bit position. */ - -#define PR_RTC_bm 0x04 /* Real-time Counter bit mask. */ -#define PR_RTC_bp 2 /* Real-time Counter bit position. */ - -#define PR_EVSYS_bm 0x02 /* Event System bit mask. */ -#define PR_EVSYS_bp 1 /* Event System bit position. */ - -#define PR_DMA_bm 0x01 /* DMA-Controller bit mask. */ -#define PR_DMA_bp 0 /* DMA-Controller bit position. */ - - -/* PR.PRPA bit masks and bit positions */ -#define PR_DAC_bm 0x04 /* Port A DAC bit mask. */ -#define PR_DAC_bp 2 /* Port A DAC bit position. */ - -#define PR_ADC_bm 0x02 /* Port A ADC bit mask. */ -#define PR_ADC_bp 1 /* Port A ADC bit position. */ - -#define PR_AC_bm 0x01 /* Port A Analog Comparator bit mask. */ -#define PR_AC_bp 0 /* Port A Analog Comparator bit position. */ - - -/* PR.PRPB bit masks and bit positions */ -/* PR_DAC_bm Predefined. */ -/* PR_DAC_bp Predefined. */ - -/* PR_ADC_bm Predefined. */ -/* PR_ADC_bp Predefined. */ - -/* PR_AC_bm Predefined. */ -/* PR_AC_bp Predefined. */ - - -/* PR.PRPC bit masks and bit positions */ -#define PR_TWI_bm 0x40 /* Port C Two-wire Interface bit mask. */ -#define PR_TWI_bp 6 /* Port C Two-wire Interface bit position. */ - -#define PR_USART1_bm 0x20 /* Port C USART1 bit mask. */ -#define PR_USART1_bp 5 /* Port C USART1 bit position. */ - -#define PR_USART0_bm 0x10 /* Port C USART0 bit mask. */ -#define PR_USART0_bp 4 /* Port C USART0 bit position. */ - -#define PR_SPI_bm 0x08 /* Port C SPI bit mask. */ -#define PR_SPI_bp 3 /* Port C SPI bit position. */ - -#define PR_HIRES_bm 0x04 /* Port C AWEX bit mask. */ -#define PR_HIRES_bp 2 /* Port C AWEX bit position. */ - -#define PR_TC1_bm 0x02 /* Port C Timer/Counter1 bit mask. */ -#define PR_TC1_bp 1 /* Port C Timer/Counter1 bit position. */ - -#define PR_TC0_bm 0x01 /* Port C Timer/Counter0 bit mask. */ -#define PR_TC0_bp 0 /* Port C Timer/Counter0 bit position. */ - - -/* PR.PRPD bit masks and bit positions */ -/* PR_TWI_bm Predefined. */ -/* PR_TWI_bp Predefined. */ - -/* PR_USART1_bm Predefined. */ -/* PR_USART1_bp Predefined. */ - -/* PR_USART0_bm Predefined. */ -/* PR_USART0_bp Predefined. */ - -/* PR_SPI_bm Predefined. */ -/* PR_SPI_bp Predefined. */ - -/* PR_HIRES_bm Predefined. */ -/* PR_HIRES_bp Predefined. */ - -/* PR_TC1_bm Predefined. */ -/* PR_TC1_bp Predefined. */ - -/* PR_TC0_bm Predefined. */ -/* PR_TC0_bp Predefined. */ - - -/* PR.PRPE bit masks and bit positions */ -/* PR_TWI_bm Predefined. */ -/* PR_TWI_bp Predefined. */ - -/* PR_USART1_bm Predefined. */ -/* PR_USART1_bp Predefined. */ - -/* PR_USART0_bm Predefined. */ -/* PR_USART0_bp Predefined. */ - -/* PR_SPI_bm Predefined. */ -/* PR_SPI_bp Predefined. */ - -/* PR_HIRES_bm Predefined. */ -/* PR_HIRES_bp Predefined. */ - -/* PR_TC1_bm Predefined. */ -/* PR_TC1_bp Predefined. */ - -/* PR_TC0_bm Predefined. */ -/* PR_TC0_bp Predefined. */ - - -/* PR.PRPF bit masks and bit positions */ -/* PR_TWI_bm Predefined. */ -/* PR_TWI_bp Predefined. */ - -/* PR_USART1_bm Predefined. */ -/* PR_USART1_bp Predefined. */ - -/* PR_USART0_bm Predefined. */ -/* PR_USART0_bp Predefined. */ - -/* PR_SPI_bm Predefined. */ -/* PR_SPI_bp Predefined. */ - -/* PR_HIRES_bm Predefined. */ -/* PR_HIRES_bp Predefined. */ - -/* PR_TC1_bm Predefined. */ -/* PR_TC1_bp Predefined. */ - -/* PR_TC0_bm Predefined. */ -/* PR_TC0_bp Predefined. */ - - -/* SLEEP - Sleep Controller */ -/* SLEEP.CTRL bit masks and bit positions */ -#define SLEEP_SMODE_gm 0x0E /* Sleep Mode group mask. */ -#define SLEEP_SMODE_gp 1 /* Sleep Mode group position. */ -#define SLEEP_SMODE0_bm (1<<1) /* Sleep Mode bit 0 mask. */ -#define SLEEP_SMODE0_bp 1 /* Sleep Mode bit 0 position. */ -#define SLEEP_SMODE1_bm (1<<2) /* Sleep Mode bit 1 mask. */ -#define SLEEP_SMODE1_bp 2 /* Sleep Mode bit 1 position. */ -#define SLEEP_SMODE2_bm (1<<3) /* Sleep Mode bit 2 mask. */ -#define SLEEP_SMODE2_bp 3 /* Sleep Mode bit 2 position. */ - -#define SLEEP_SEN_bm 0x01 /* Sleep Enable bit mask. */ -#define SLEEP_SEN_bp 0 /* Sleep Enable bit position. */ - - -/* OSC - Oscillator */ -/* OSC.CTRL bit masks and bit positions */ -#define OSC_PLLEN_bm 0x10 /* PLL Enable bit mask. */ -#define OSC_PLLEN_bp 4 /* PLL Enable bit position. */ - -#define OSC_XOSCEN_bm 0x08 /* External Oscillator Enable bit mask. */ -#define OSC_XOSCEN_bp 3 /* External Oscillator Enable bit position. */ - -#define OSC_RC32KEN_bm 0x04 /* Internal 32kHz RC Oscillator Enable bit mask. */ -#define OSC_RC32KEN_bp 2 /* Internal 32kHz RC Oscillator Enable bit position. */ - -#define OSC_RC32MEN_bm 0x02 /* Internal 32MHz RC Oscillator Enable bit mask. */ -#define OSC_RC32MEN_bp 1 /* Internal 32MHz RC Oscillator Enable bit position. */ - -#define OSC_RC2MEN_bm 0x01 /* Internal 2MHz RC Oscillator Enable bit mask. */ -#define OSC_RC2MEN_bp 0 /* Internal 2MHz RC Oscillator Enable bit position. */ - - -/* OSC.STATUS bit masks and bit positions */ -#define OSC_PLLRDY_bm 0x10 /* PLL Ready bit mask. */ -#define OSC_PLLRDY_bp 4 /* PLL Ready bit position. */ - -#define OSC_XOSCRDY_bm 0x08 /* External Oscillator Ready bit mask. */ -#define OSC_XOSCRDY_bp 3 /* External Oscillator Ready bit position. */ - -#define OSC_RC32KRDY_bm 0x04 /* Internal 32kHz RC Oscillator Ready bit mask. */ -#define OSC_RC32KRDY_bp 2 /* Internal 32kHz RC Oscillator Ready bit position. */ - -#define OSC_RC32MRDY_bm 0x02 /* Internal 32MHz RC Oscillator Ready bit mask. */ -#define OSC_RC32MRDY_bp 1 /* Internal 32MHz RC Oscillator Ready bit position. */ - -#define OSC_RC2MRDY_bm 0x01 /* Internal 2MHz RC Oscillator Ready bit mask. */ -#define OSC_RC2MRDY_bp 0 /* Internal 2MHz RC Oscillator Ready bit position. */ - - -/* OSC.XOSCCTRL bit masks and bit positions */ -#define OSC_FRQRANGE_gm 0xC0 /* Frequency Range group mask. */ -#define OSC_FRQRANGE_gp 6 /* Frequency Range group position. */ -#define OSC_FRQRANGE0_bm (1<<6) /* Frequency Range bit 0 mask. */ -#define OSC_FRQRANGE0_bp 6 /* Frequency Range bit 0 position. */ -#define OSC_FRQRANGE1_bm (1<<7) /* Frequency Range bit 1 mask. */ -#define OSC_FRQRANGE1_bp 7 /* Frequency Range bit 1 position. */ - -#define OSC_X32KLPM_bm 0x20 /* 32kHz XTAL OSC Low-power Mode bit mask. */ -#define OSC_X32KLPM_bp 5 /* 32kHz XTAL OSC Low-power Mode bit position. */ - -#define OSC_XOSCSEL_gm 0x0F /* External Oscillator Selection and Startup Time group mask. */ -#define OSC_XOSCSEL_gp 0 /* External Oscillator Selection and Startup Time group position. */ -#define OSC_XOSCSEL0_bm (1<<0) /* External Oscillator Selection and Startup Time bit 0 mask. */ -#define OSC_XOSCSEL0_bp 0 /* External Oscillator Selection and Startup Time bit 0 position. */ -#define OSC_XOSCSEL1_bm (1<<1) /* External Oscillator Selection and Startup Time bit 1 mask. */ -#define OSC_XOSCSEL1_bp 1 /* External Oscillator Selection and Startup Time bit 1 position. */ -#define OSC_XOSCSEL2_bm (1<<2) /* External Oscillator Selection and Startup Time bit 2 mask. */ -#define OSC_XOSCSEL2_bp 2 /* External Oscillator Selection and Startup Time bit 2 position. */ -#define OSC_XOSCSEL3_bm (1<<3) /* External Oscillator Selection and Startup Time bit 3 mask. */ -#define OSC_XOSCSEL3_bp 3 /* External Oscillator Selection and Startup Time bit 3 position. */ - - -/* OSC.XOSCFAIL bit masks and bit positions */ -#define OSC_XOSCFDIF_bm 0x02 /* Failure Detection Interrupt Flag bit mask. */ -#define OSC_XOSCFDIF_bp 1 /* Failure Detection Interrupt Flag bit position. */ - -#define OSC_XOSCFDEN_bm 0x01 /* Failure Detection Enable bit mask. */ -#define OSC_XOSCFDEN_bp 0 /* Failure Detection Enable bit position. */ - - -/* OSC.PLLCTRL bit masks and bit positions */ -#define OSC_PLLSRC_gm 0xC0 /* Clock Source group mask. */ -#define OSC_PLLSRC_gp 6 /* Clock Source group position. */ -#define OSC_PLLSRC0_bm (1<<6) /* Clock Source bit 0 mask. */ -#define OSC_PLLSRC0_bp 6 /* Clock Source bit 0 position. */ -#define OSC_PLLSRC1_bm (1<<7) /* Clock Source bit 1 mask. */ -#define OSC_PLLSRC1_bp 7 /* Clock Source bit 1 position. */ - -#define OSC_PLLFAC_gm 0x1F /* Multiplication Factor group mask. */ -#define OSC_PLLFAC_gp 0 /* Multiplication Factor group position. */ -#define OSC_PLLFAC0_bm (1<<0) /* Multiplication Factor bit 0 mask. */ -#define OSC_PLLFAC0_bp 0 /* Multiplication Factor bit 0 position. */ -#define OSC_PLLFAC1_bm (1<<1) /* Multiplication Factor bit 1 mask. */ -#define OSC_PLLFAC1_bp 1 /* Multiplication Factor bit 1 position. */ -#define OSC_PLLFAC2_bm (1<<2) /* Multiplication Factor bit 2 mask. */ -#define OSC_PLLFAC2_bp 2 /* Multiplication Factor bit 2 position. */ -#define OSC_PLLFAC3_bm (1<<3) /* Multiplication Factor bit 3 mask. */ -#define OSC_PLLFAC3_bp 3 /* Multiplication Factor bit 3 position. */ -#define OSC_PLLFAC4_bm (1<<4) /* Multiplication Factor bit 4 mask. */ -#define OSC_PLLFAC4_bp 4 /* Multiplication Factor bit 4 position. */ - - -/* OSC.DFLLCTRL bit masks and bit positions */ -#define OSC_RC32MCREF_bm 0x02 /* 32MHz Calibration Reference bit mask. */ -#define OSC_RC32MCREF_bp 1 /* 32MHz Calibration Reference bit position. */ - -#define OSC_RC2MCREF_bm 0x01 /* 2MHz Calibration Reference bit mask. */ -#define OSC_RC2MCREF_bp 0 /* 2MHz Calibration Reference bit position. */ - - -/* DFLL - DFLL */ -/* DFLL.CTRL bit masks and bit positions */ -#define DFLL_ENABLE_bm 0x01 /* DFLL Enable bit mask. */ -#define DFLL_ENABLE_bp 0 /* DFLL Enable bit position. */ - - -/* DFLL.CALA bit masks and bit positions */ -#define DFLL_CALL_gm 0x7F /* DFLL Calibration bits [6:0] group mask. */ -#define DFLL_CALL_gp 0 /* DFLL Calibration bits [6:0] group position. */ -#define DFLL_CALL0_bm (1<<0) /* DFLL Calibration bits [6:0] bit 0 mask. */ -#define DFLL_CALL0_bp 0 /* DFLL Calibration bits [6:0] bit 0 position. */ -#define DFLL_CALL1_bm (1<<1) /* DFLL Calibration bits [6:0] bit 1 mask. */ -#define DFLL_CALL1_bp 1 /* DFLL Calibration bits [6:0] bit 1 position. */ -#define DFLL_CALL2_bm (1<<2) /* DFLL Calibration bits [6:0] bit 2 mask. */ -#define DFLL_CALL2_bp 2 /* DFLL Calibration bits [6:0] bit 2 position. */ -#define DFLL_CALL3_bm (1<<3) /* DFLL Calibration bits [6:0] bit 3 mask. */ -#define DFLL_CALL3_bp 3 /* DFLL Calibration bits [6:0] bit 3 position. */ -#define DFLL_CALL4_bm (1<<4) /* DFLL Calibration bits [6:0] bit 4 mask. */ -#define DFLL_CALL4_bp 4 /* DFLL Calibration bits [6:0] bit 4 position. */ -#define DFLL_CALL5_bm (1<<5) /* DFLL Calibration bits [6:0] bit 5 mask. */ -#define DFLL_CALL5_bp 5 /* DFLL Calibration bits [6:0] bit 5 position. */ -#define DFLL_CALL6_bm (1<<6) /* DFLL Calibration bits [6:0] bit 6 mask. */ -#define DFLL_CALL6_bp 6 /* DFLL Calibration bits [6:0] bit 6 position. */ - - -/* DFLL.CALB bit masks and bit positions */ -#define DFLL_CALH_gm 0x3F /* DFLL Calibration bits [12:7] group mask. */ -#define DFLL_CALH_gp 0 /* DFLL Calibration bits [12:7] group position. */ -#define DFLL_CALH0_bm (1<<0) /* DFLL Calibration bits [12:7] bit 0 mask. */ -#define DFLL_CALH0_bp 0 /* DFLL Calibration bits [12:7] bit 0 position. */ -#define DFLL_CALH1_bm (1<<1) /* DFLL Calibration bits [12:7] bit 1 mask. */ -#define DFLL_CALH1_bp 1 /* DFLL Calibration bits [12:7] bit 1 position. */ -#define DFLL_CALH2_bm (1<<2) /* DFLL Calibration bits [12:7] bit 2 mask. */ -#define DFLL_CALH2_bp 2 /* DFLL Calibration bits [12:7] bit 2 position. */ -#define DFLL_CALH3_bm (1<<3) /* DFLL Calibration bits [12:7] bit 3 mask. */ -#define DFLL_CALH3_bp 3 /* DFLL Calibration bits [12:7] bit 3 position. */ -#define DFLL_CALH4_bm (1<<4) /* DFLL Calibration bits [12:7] bit 4 mask. */ -#define DFLL_CALH4_bp 4 /* DFLL Calibration bits [12:7] bit 4 position. */ -#define DFLL_CALH5_bm (1<<5) /* DFLL Calibration bits [12:7] bit 5 mask. */ -#define DFLL_CALH5_bp 5 /* DFLL Calibration bits [12:7] bit 5 position. */ - - -/* RST - Reset */ -/* RST.STATUS bit masks and bit positions */ -#define RST_SDRF_bm 0x40 /* Spike Detection Reset Flag bit mask. */ -#define RST_SDRF_bp 6 /* Spike Detection Reset Flag bit position. */ - -#define RST_SRF_bm 0x20 /* Software Reset Flag bit mask. */ -#define RST_SRF_bp 5 /* Software Reset Flag bit position. */ - -#define RST_PDIRF_bm 0x10 /* Programming and Debug Interface Interface Reset Flag bit mask. */ -#define RST_PDIRF_bp 4 /* Programming and Debug Interface Interface Reset Flag bit position. */ - -#define RST_WDRF_bm 0x08 /* Watchdog Reset Flag bit mask. */ -#define RST_WDRF_bp 3 /* Watchdog Reset Flag bit position. */ - -#define RST_BORF_bm 0x04 /* Brown-out Reset Flag bit mask. */ -#define RST_BORF_bp 2 /* Brown-out Reset Flag bit position. */ - -#define RST_EXTRF_bm 0x02 /* External Reset Flag bit mask. */ -#define RST_EXTRF_bp 1 /* External Reset Flag bit position. */ - -#define RST_PORF_bm 0x01 /* Power-on Reset Flag bit mask. */ -#define RST_PORF_bp 0 /* Power-on Reset Flag bit position. */ - - -/* RST.CTRL bit masks and bit positions */ -#define RST_SWRST_bm 0x01 /* Software Reset bit mask. */ -#define RST_SWRST_bp 0 /* Software Reset bit position. */ - - -/* WDT - Watch-Dog Timer */ -/* WDT.CTRL bit masks and bit positions */ -#define WDT_PER_gm 0x3C /* Period group mask. */ -#define WDT_PER_gp 2 /* Period group position. */ -#define WDT_PER0_bm (1<<2) /* Period bit 0 mask. */ -#define WDT_PER0_bp 2 /* Period bit 0 position. */ -#define WDT_PER1_bm (1<<3) /* Period bit 1 mask. */ -#define WDT_PER1_bp 3 /* Period bit 1 position. */ -#define WDT_PER2_bm (1<<4) /* Period bit 2 mask. */ -#define WDT_PER2_bp 4 /* Period bit 2 position. */ -#define WDT_PER3_bm (1<<5) /* Period bit 3 mask. */ -#define WDT_PER3_bp 5 /* Period bit 3 position. */ - -#define WDT_ENABLE_bm 0x02 /* Enable bit mask. */ -#define WDT_ENABLE_bp 1 /* Enable bit position. */ - -#define WDT_CEN_bm 0x01 /* Change Enable bit mask. */ -#define WDT_CEN_bp 0 /* Change Enable bit position. */ - - -/* WDT.WINCTRL bit masks and bit positions */ -#define WDT_WPER_gm 0x3C /* Windowed Mode Period group mask. */ -#define WDT_WPER_gp 2 /* Windowed Mode Period group position. */ -#define WDT_WPER0_bm (1<<2) /* Windowed Mode Period bit 0 mask. */ -#define WDT_WPER0_bp 2 /* Windowed Mode Period bit 0 position. */ -#define WDT_WPER1_bm (1<<3) /* Windowed Mode Period bit 1 mask. */ -#define WDT_WPER1_bp 3 /* Windowed Mode Period bit 1 position. */ -#define WDT_WPER2_bm (1<<4) /* Windowed Mode Period bit 2 mask. */ -#define WDT_WPER2_bp 4 /* Windowed Mode Period bit 2 position. */ -#define WDT_WPER3_bm (1<<5) /* Windowed Mode Period bit 3 mask. */ -#define WDT_WPER3_bp 5 /* Windowed Mode Period bit 3 position. */ - -#define WDT_WEN_bm 0x02 /* Windowed Mode Enable bit mask. */ -#define WDT_WEN_bp 1 /* Windowed Mode Enable bit position. */ - -#define WDT_WCEN_bm 0x01 /* Windowed Mode Change Enable bit mask. */ -#define WDT_WCEN_bp 0 /* Windowed Mode Change Enable bit position. */ - - -/* WDT.STATUS bit masks and bit positions */ -#define WDT_SYNCBUSY_bm 0x01 /* Syncronization busy bit mask. */ -#define WDT_SYNCBUSY_bp 0 /* Syncronization busy bit position. */ - - -/* MCU - MCU Control */ -/* MCU.MCUCR bit masks and bit positions */ -#define MCU_JTAGD_bm 0x01 /* JTAG Disable bit mask. */ -#define MCU_JTAGD_bp 0 /* JTAG Disable bit position. */ - - -/* MCU.EVSYSLOCK bit masks and bit positions */ -#define MCU_EVSYS1LOCK_bm 0x10 /* Event Channel 4-7 Lock bit mask. */ -#define MCU_EVSYS1LOCK_bp 4 /* Event Channel 4-7 Lock bit position. */ - -#define MCU_EVSYS0LOCK_bm 0x01 /* Event Channel 0-3 Lock bit mask. */ -#define MCU_EVSYS0LOCK_bp 0 /* Event Channel 0-3 Lock bit position. */ - - -/* MCU.AWEXLOCK bit masks and bit positions */ -#define MCU_AWEXELOCK_bm 0x04 /* AWeX on T/C E0 Lock bit mask. */ -#define MCU_AWEXELOCK_bp 2 /* AWeX on T/C E0 Lock bit position. */ - -#define MCU_AWEXCLOCK_bm 0x01 /* AWeX on T/C C0 Lock bit mask. */ -#define MCU_AWEXCLOCK_bp 0 /* AWeX on T/C C0 Lock bit position. */ - - -/* PMIC - Programmable Multi-level Interrupt Controller */ -/* PMIC.STATUS bit masks and bit positions */ -#define PMIC_NMIEX_bm 0x80 /* Non-maskable Interrupt Executing bit mask. */ -#define PMIC_NMIEX_bp 7 /* Non-maskable Interrupt Executing bit position. */ - -#define PMIC_HILVLEX_bm 0x04 /* High Level Interrupt Executing bit mask. */ -#define PMIC_HILVLEX_bp 2 /* High Level Interrupt Executing bit position. */ - -#define PMIC_MEDLVLEX_bm 0x02 /* Medium Level Interrupt Executing bit mask. */ -#define PMIC_MEDLVLEX_bp 1 /* Medium Level Interrupt Executing bit position. */ - -#define PMIC_LOLVLEX_bm 0x01 /* Low Level Interrupt Executing bit mask. */ -#define PMIC_LOLVLEX_bp 0 /* Low Level Interrupt Executing bit position. */ - - -/* PMIC.CTRL bit masks and bit positions */ -#define PMIC_RREN_bm 0x80 /* Round-Robin Priority Enable bit mask. */ -#define PMIC_RREN_bp 7 /* Round-Robin Priority Enable bit position. */ - -#define PMIC_IVSEL_bm 0x40 /* Interrupt Vector Select bit mask. */ -#define PMIC_IVSEL_bp 6 /* Interrupt Vector Select bit position. */ - -#define PMIC_HILVLEN_bm 0x04 /* High Level Enable bit mask. */ -#define PMIC_HILVLEN_bp 2 /* High Level Enable bit position. */ - -#define PMIC_MEDLVLEN_bm 0x02 /* Medium Level Enable bit mask. */ -#define PMIC_MEDLVLEN_bp 1 /* Medium Level Enable bit position. */ - -#define PMIC_LOLVLEN_bm 0x01 /* Low Level Enable bit mask. */ -#define PMIC_LOLVLEN_bp 0 /* Low Level Enable bit position. */ - - -/* DMA - DMA Controller */ -/* DMA_CH.CTRLA bit masks and bit positions */ -#define DMA_CH_ENABLE_bm 0x80 /* Channel Enable bit mask. */ -#define DMA_CH_ENABLE_bp 7 /* Channel Enable bit position. */ - -#define DMA_CH_RESET_bm 0x40 /* Channel Software Reset bit mask. */ -#define DMA_CH_RESET_bp 6 /* Channel Software Reset bit position. */ - -#define DMA_CH_REPEAT_bm 0x20 /* Channel Repeat Mode bit mask. */ -#define DMA_CH_REPEAT_bp 5 /* Channel Repeat Mode bit position. */ - -#define DMA_CH_TRFREQ_bm 0x10 /* Channel Transfer Request bit mask. */ -#define DMA_CH_TRFREQ_bp 4 /* Channel Transfer Request bit position. */ - -#define DMA_CH_SINGLE_bm 0x04 /* Channel Single Shot Data Transfer bit mask. */ -#define DMA_CH_SINGLE_bp 2 /* Channel Single Shot Data Transfer bit position. */ - -#define DMA_CH_BURSTLEN_gm 0x03 /* Channel Transfer Mode group mask. */ -#define DMA_CH_BURSTLEN_gp 0 /* Channel Transfer Mode group position. */ -#define DMA_CH_BURSTLEN0_bm (1<<0) /* Channel Transfer Mode bit 0 mask. */ -#define DMA_CH_BURSTLEN0_bp 0 /* Channel Transfer Mode bit 0 position. */ -#define DMA_CH_BURSTLEN1_bm (1<<1) /* Channel Transfer Mode bit 1 mask. */ -#define DMA_CH_BURSTLEN1_bp 1 /* Channel Transfer Mode bit 1 position. */ - - -/* DMA_CH.CTRLB bit masks and bit positions */ -#define DMA_CH_CHBUSY_bm 0x80 /* Block Transfer Busy bit mask. */ -#define DMA_CH_CHBUSY_bp 7 /* Block Transfer Busy bit position. */ - -#define DMA_CH_CHPEND_bm 0x40 /* Block Transfer Pending bit mask. */ -#define DMA_CH_CHPEND_bp 6 /* Block Transfer Pending bit position. */ - -#define DMA_CH_ERRIF_bm 0x20 /* Block Transfer Error Interrupt Flag bit mask. */ -#define DMA_CH_ERRIF_bp 5 /* Block Transfer Error Interrupt Flag bit position. */ - -#define DMA_CH_TRNIF_bm 0x10 /* Transaction Complete Interrup Flag bit mask. */ -#define DMA_CH_TRNIF_bp 4 /* Transaction Complete Interrup Flag bit position. */ - -#define DMA_CH_ERRINTLVL_gm 0x0C /* Transfer Error Interrupt Level group mask. */ -#define DMA_CH_ERRINTLVL_gp 2 /* Transfer Error Interrupt Level group position. */ -#define DMA_CH_ERRINTLVL0_bm (1<<2) /* Transfer Error Interrupt Level bit 0 mask. */ -#define DMA_CH_ERRINTLVL0_bp 2 /* Transfer Error Interrupt Level bit 0 position. */ -#define DMA_CH_ERRINTLVL1_bm (1<<3) /* Transfer Error Interrupt Level bit 1 mask. */ -#define DMA_CH_ERRINTLVL1_bp 3 /* Transfer Error Interrupt Level bit 1 position. */ - -#define DMA_CH_TRNINTLVL_gm 0x03 /* Transaction Complete Interrupt Level group mask. */ -#define DMA_CH_TRNINTLVL_gp 0 /* Transaction Complete Interrupt Level group position. */ -#define DMA_CH_TRNINTLVL0_bm (1<<0) /* Transaction Complete Interrupt Level bit 0 mask. */ -#define DMA_CH_TRNINTLVL0_bp 0 /* Transaction Complete Interrupt Level bit 0 position. */ -#define DMA_CH_TRNINTLVL1_bm (1<<1) /* Transaction Complete Interrupt Level bit 1 mask. */ -#define DMA_CH_TRNINTLVL1_bp 1 /* Transaction Complete Interrupt Level bit 1 position. */ - - -/* DMA_CH.ADDRCTRL bit masks and bit positions */ -#define DMA_CH_SRCRELOAD_gm 0xC0 /* Channel Source Address Reload group mask. */ -#define DMA_CH_SRCRELOAD_gp 6 /* Channel Source Address Reload group position. */ -#define DMA_CH_SRCRELOAD0_bm (1<<6) /* Channel Source Address Reload bit 0 mask. */ -#define DMA_CH_SRCRELOAD0_bp 6 /* Channel Source Address Reload bit 0 position. */ -#define DMA_CH_SRCRELOAD1_bm (1<<7) /* Channel Source Address Reload bit 1 mask. */ -#define DMA_CH_SRCRELOAD1_bp 7 /* Channel Source Address Reload bit 1 position. */ - -#define DMA_CH_SRCDIR_gm 0x30 /* Channel Source Address Mode group mask. */ -#define DMA_CH_SRCDIR_gp 4 /* Channel Source Address Mode group position. */ -#define DMA_CH_SRCDIR0_bm (1<<4) /* Channel Source Address Mode bit 0 mask. */ -#define DMA_CH_SRCDIR0_bp 4 /* Channel Source Address Mode bit 0 position. */ -#define DMA_CH_SRCDIR1_bm (1<<5) /* Channel Source Address Mode bit 1 mask. */ -#define DMA_CH_SRCDIR1_bp 5 /* Channel Source Address Mode bit 1 position. */ - -#define DMA_CH_DESTRELOAD_gm 0x0C /* Channel Destination Address Reload group mask. */ -#define DMA_CH_DESTRELOAD_gp 2 /* Channel Destination Address Reload group position. */ -#define DMA_CH_DESTRELOAD0_bm (1<<2) /* Channel Destination Address Reload bit 0 mask. */ -#define DMA_CH_DESTRELOAD0_bp 2 /* Channel Destination Address Reload bit 0 position. */ -#define DMA_CH_DESTRELOAD1_bm (1<<3) /* Channel Destination Address Reload bit 1 mask. */ -#define DMA_CH_DESTRELOAD1_bp 3 /* Channel Destination Address Reload bit 1 position. */ - -#define DMA_CH_DESTDIR_gm 0x03 /* Channel Destination Address Mode group mask. */ -#define DMA_CH_DESTDIR_gp 0 /* Channel Destination Address Mode group position. */ -#define DMA_CH_DESTDIR0_bm (1<<0) /* Channel Destination Address Mode bit 0 mask. */ -#define DMA_CH_DESTDIR0_bp 0 /* Channel Destination Address Mode bit 0 position. */ -#define DMA_CH_DESTDIR1_bm (1<<1) /* Channel Destination Address Mode bit 1 mask. */ -#define DMA_CH_DESTDIR1_bp 1 /* Channel Destination Address Mode bit 1 position. */ - - -/* DMA_CH.TRIGSRC bit masks and bit positions */ -#define DMA_CH_TRIGSRC_gm 0xFF /* Channel Trigger Source group mask. */ -#define DMA_CH_TRIGSRC_gp 0 /* Channel Trigger Source group position. */ -#define DMA_CH_TRIGSRC0_bm (1<<0) /* Channel Trigger Source bit 0 mask. */ -#define DMA_CH_TRIGSRC0_bp 0 /* Channel Trigger Source bit 0 position. */ -#define DMA_CH_TRIGSRC1_bm (1<<1) /* Channel Trigger Source bit 1 mask. */ -#define DMA_CH_TRIGSRC1_bp 1 /* Channel Trigger Source bit 1 position. */ -#define DMA_CH_TRIGSRC2_bm (1<<2) /* Channel Trigger Source bit 2 mask. */ -#define DMA_CH_TRIGSRC2_bp 2 /* Channel Trigger Source bit 2 position. */ -#define DMA_CH_TRIGSRC3_bm (1<<3) /* Channel Trigger Source bit 3 mask. */ -#define DMA_CH_TRIGSRC3_bp 3 /* Channel Trigger Source bit 3 position. */ -#define DMA_CH_TRIGSRC4_bm (1<<4) /* Channel Trigger Source bit 4 mask. */ -#define DMA_CH_TRIGSRC4_bp 4 /* Channel Trigger Source bit 4 position. */ -#define DMA_CH_TRIGSRC5_bm (1<<5) /* Channel Trigger Source bit 5 mask. */ -#define DMA_CH_TRIGSRC5_bp 5 /* Channel Trigger Source bit 5 position. */ -#define DMA_CH_TRIGSRC6_bm (1<<6) /* Channel Trigger Source bit 6 mask. */ -#define DMA_CH_TRIGSRC6_bp 6 /* Channel Trigger Source bit 6 position. */ -#define DMA_CH_TRIGSRC7_bm (1<<7) /* Channel Trigger Source bit 7 mask. */ -#define DMA_CH_TRIGSRC7_bp 7 /* Channel Trigger Source bit 7 position. */ - - -/* DMA.CTRL bit masks and bit positions */ -#define DMA_ENABLE_bm 0x80 /* Enable bit mask. */ -#define DMA_ENABLE_bp 7 /* Enable bit position. */ - -#define DMA_RESET_bm 0x40 /* Software Reset bit mask. */ -#define DMA_RESET_bp 6 /* Software Reset bit position. */ - -#define DMA_DBUFMODE_gm 0x0C /* Double Buffering Mode group mask. */ -#define DMA_DBUFMODE_gp 2 /* Double Buffering Mode group position. */ -#define DMA_DBUFMODE0_bm (1<<2) /* Double Buffering Mode bit 0 mask. */ -#define DMA_DBUFMODE0_bp 2 /* Double Buffering Mode bit 0 position. */ -#define DMA_DBUFMODE1_bm (1<<3) /* Double Buffering Mode bit 1 mask. */ -#define DMA_DBUFMODE1_bp 3 /* Double Buffering Mode bit 1 position. */ - -#define DMA_PRIMODE_gm 0x03 /* Channel Priority Mode group mask. */ -#define DMA_PRIMODE_gp 0 /* Channel Priority Mode group position. */ -#define DMA_PRIMODE0_bm (1<<0) /* Channel Priority Mode bit 0 mask. */ -#define DMA_PRIMODE0_bp 0 /* Channel Priority Mode bit 0 position. */ -#define DMA_PRIMODE1_bm (1<<1) /* Channel Priority Mode bit 1 mask. */ -#define DMA_PRIMODE1_bp 1 /* Channel Priority Mode bit 1 position. */ - - -/* DMA.INTFLAGS bit masks and bit positions */ -#define DMA_CH3ERRIF_bm 0x80 /* Channel 3 Block Transfer Error Interrupt Flag bit mask. */ -#define DMA_CH3ERRIF_bp 7 /* Channel 3 Block Transfer Error Interrupt Flag bit position. */ - -#define DMA_CH2ERRIF_bm 0x40 /* Channel 2 Block Transfer Error Interrupt Flag bit mask. */ -#define DMA_CH2ERRIF_bp 6 /* Channel 2 Block Transfer Error Interrupt Flag bit position. */ - -#define DMA_CH1ERRIF_bm 0x20 /* Channel 1 Block Transfer Error Interrupt Flag bit mask. */ -#define DMA_CH1ERRIF_bp 5 /* Channel 1 Block Transfer Error Interrupt Flag bit position. */ - -#define DMA_CH0ERRIF_bm 0x10 /* Channel 0 Block Transfer Error Interrupt Flag bit mask. */ -#define DMA_CH0ERRIF_bp 4 /* Channel 0 Block Transfer Error Interrupt Flag bit position. */ - -#define DMA_CH3TRNIF_bm 0x08 /* Channel 3 Transaction Complete Interrupt Flag bit mask. */ -#define DMA_CH3TRNIF_bp 3 /* Channel 3 Transaction Complete Interrupt Flag bit position. */ - -#define DMA_CH2TRNIF_bm 0x04 /* Channel 2 Transaction Complete Interrupt Flag bit mask. */ -#define DMA_CH2TRNIF_bp 2 /* Channel 2 Transaction Complete Interrupt Flag bit position. */ - -#define DMA_CH1TRNIF_bm 0x02 /* Channel 1 Transaction Complete Interrupt Flag bit mask. */ -#define DMA_CH1TRNIF_bp 1 /* Channel 1 Transaction Complete Interrupt Flag bit position. */ - -#define DMA_CH0TRNIF_bm 0x01 /* Channel 0 Transaction Complete Interrupt Flag bit mask. */ -#define DMA_CH0TRNIF_bp 0 /* Channel 0 Transaction Complete Interrupt Flag bit position. */ - - -/* DMA.STATUS bit masks and bit positions */ -#define DMA_CH3BUSY_bm 0x80 /* Channel 3 Block Transfer Busy bit mask. */ -#define DMA_CH3BUSY_bp 7 /* Channel 3 Block Transfer Busy bit position. */ - -#define DMA_CH2BUSY_bm 0x40 /* Channel 2 Block Transfer Busy bit mask. */ -#define DMA_CH2BUSY_bp 6 /* Channel 2 Block Transfer Busy bit position. */ - -#define DMA_CH1BUSY_bm 0x20 /* Channel 1 Block Transfer Busy bit mask. */ -#define DMA_CH1BUSY_bp 5 /* Channel 1 Block Transfer Busy bit position. */ - -#define DMA_CH0BUSY_bm 0x10 /* Channel 0 Block Transfer Busy bit mask. */ -#define DMA_CH0BUSY_bp 4 /* Channel 0 Block Transfer Busy bit position. */ - -#define DMA_CH3PEND_bm 0x08 /* Channel 3 Block Transfer Pending bit mask. */ -#define DMA_CH3PEND_bp 3 /* Channel 3 Block Transfer Pending bit position. */ - -#define DMA_CH2PEND_bm 0x04 /* Channel 2 Block Transfer Pending bit mask. */ -#define DMA_CH2PEND_bp 2 /* Channel 2 Block Transfer Pending bit position. */ - -#define DMA_CH1PEND_bm 0x02 /* Channel 1 Block Transfer Pending bit mask. */ -#define DMA_CH1PEND_bp 1 /* Channel 1 Block Transfer Pending bit position. */ - -#define DMA_CH0PEND_bm 0x01 /* Channel 0 Block Transfer Pending bit mask. */ -#define DMA_CH0PEND_bp 0 /* Channel 0 Block Transfer Pending bit position. */ - - -/* EVSYS - Event System */ -/* EVSYS.CH0MUX bit masks and bit positions */ -#define EVSYS_CHMUX_gm 0xFF /* Event Channel 0 Multiplexer group mask. */ -#define EVSYS_CHMUX_gp 0 /* Event Channel 0 Multiplexer group position. */ -#define EVSYS_CHMUX0_bm (1<<0) /* Event Channel 0 Multiplexer bit 0 mask. */ -#define EVSYS_CHMUX0_bp 0 /* Event Channel 0 Multiplexer bit 0 position. */ -#define EVSYS_CHMUX1_bm (1<<1) /* Event Channel 0 Multiplexer bit 1 mask. */ -#define EVSYS_CHMUX1_bp 1 /* Event Channel 0 Multiplexer bit 1 position. */ -#define EVSYS_CHMUX2_bm (1<<2) /* Event Channel 0 Multiplexer bit 2 mask. */ -#define EVSYS_CHMUX2_bp 2 /* Event Channel 0 Multiplexer bit 2 position. */ -#define EVSYS_CHMUX3_bm (1<<3) /* Event Channel 0 Multiplexer bit 3 mask. */ -#define EVSYS_CHMUX3_bp 3 /* Event Channel 0 Multiplexer bit 3 position. */ -#define EVSYS_CHMUX4_bm (1<<4) /* Event Channel 0 Multiplexer bit 4 mask. */ -#define EVSYS_CHMUX4_bp 4 /* Event Channel 0 Multiplexer bit 4 position. */ -#define EVSYS_CHMUX5_bm (1<<5) /* Event Channel 0 Multiplexer bit 5 mask. */ -#define EVSYS_CHMUX5_bp 5 /* Event Channel 0 Multiplexer bit 5 position. */ -#define EVSYS_CHMUX6_bm (1<<6) /* Event Channel 0 Multiplexer bit 6 mask. */ -#define EVSYS_CHMUX6_bp 6 /* Event Channel 0 Multiplexer bit 6 position. */ -#define EVSYS_CHMUX7_bm (1<<7) /* Event Channel 0 Multiplexer bit 7 mask. */ -#define EVSYS_CHMUX7_bp 7 /* Event Channel 0 Multiplexer bit 7 position. */ - - -/* EVSYS.CH1MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH2MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH3MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH4MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH5MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH6MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH7MUX bit masks and bit positions */ -/* EVSYS_CHMUX_gm Predefined. */ -/* EVSYS_CHMUX_gp Predefined. */ -/* EVSYS_CHMUX0_bm Predefined. */ -/* EVSYS_CHMUX0_bp Predefined. */ -/* EVSYS_CHMUX1_bm Predefined. */ -/* EVSYS_CHMUX1_bp Predefined. */ -/* EVSYS_CHMUX2_bm Predefined. */ -/* EVSYS_CHMUX2_bp Predefined. */ -/* EVSYS_CHMUX3_bm Predefined. */ -/* EVSYS_CHMUX3_bp Predefined. */ -/* EVSYS_CHMUX4_bm Predefined. */ -/* EVSYS_CHMUX4_bp Predefined. */ -/* EVSYS_CHMUX5_bm Predefined. */ -/* EVSYS_CHMUX5_bp Predefined. */ -/* EVSYS_CHMUX6_bm Predefined. */ -/* EVSYS_CHMUX6_bp Predefined. */ -/* EVSYS_CHMUX7_bm Predefined. */ -/* EVSYS_CHMUX7_bp Predefined. */ - - -/* EVSYS.CH0CTRL bit masks and bit positions */ -#define EVSYS_QDIRM_gm 0x60 /* Quadrature Decoder Index Recognition Mode group mask. */ -#define EVSYS_QDIRM_gp 5 /* Quadrature Decoder Index Recognition Mode group position. */ -#define EVSYS_QDIRM0_bm (1<<5) /* Quadrature Decoder Index Recognition Mode bit 0 mask. */ -#define EVSYS_QDIRM0_bp 5 /* Quadrature Decoder Index Recognition Mode bit 0 position. */ -#define EVSYS_QDIRM1_bm (1<<6) /* Quadrature Decoder Index Recognition Mode bit 1 mask. */ -#define EVSYS_QDIRM1_bp 6 /* Quadrature Decoder Index Recognition Mode bit 1 position. */ - -#define EVSYS_QDIEN_bm 0x10 /* Quadrature Decoder Index Enable bit mask. */ -#define EVSYS_QDIEN_bp 4 /* Quadrature Decoder Index Enable bit position. */ - -#define EVSYS_QDEN_bm 0x08 /* Quadrature Decoder Enable bit mask. */ -#define EVSYS_QDEN_bp 3 /* Quadrature Decoder Enable bit position. */ - -#define EVSYS_DIGFILT_gm 0x07 /* Digital Filter group mask. */ -#define EVSYS_DIGFILT_gp 0 /* Digital Filter group position. */ -#define EVSYS_DIGFILT0_bm (1<<0) /* Digital Filter bit 0 mask. */ -#define EVSYS_DIGFILT0_bp 0 /* Digital Filter bit 0 position. */ -#define EVSYS_DIGFILT1_bm (1<<1) /* Digital Filter bit 1 mask. */ -#define EVSYS_DIGFILT1_bp 1 /* Digital Filter bit 1 position. */ -#define EVSYS_DIGFILT2_bm (1<<2) /* Digital Filter bit 2 mask. */ -#define EVSYS_DIGFILT2_bp 2 /* Digital Filter bit 2 position. */ - - -/* EVSYS.CH1CTRL bit masks and bit positions */ -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* EVSYS.CH2CTRL bit masks and bit positions */ -/* EVSYS_QDIRM_gm Predefined. */ -/* EVSYS_QDIRM_gp Predefined. */ -/* EVSYS_QDIRM0_bm Predefined. */ -/* EVSYS_QDIRM0_bp Predefined. */ -/* EVSYS_QDIRM1_bm Predefined. */ -/* EVSYS_QDIRM1_bp Predefined. */ - -/* EVSYS_QDIEN_bm Predefined. */ -/* EVSYS_QDIEN_bp Predefined. */ - -/* EVSYS_QDEN_bm Predefined. */ -/* EVSYS_QDEN_bp Predefined. */ - -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* EVSYS.CH3CTRL bit masks and bit positions */ -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* EVSYS.CH4CTRL bit masks and bit positions */ -/* EVSYS_QDIRM_gm Predefined. */ -/* EVSYS_QDIRM_gp Predefined. */ -/* EVSYS_QDIRM0_bm Predefined. */ -/* EVSYS_QDIRM0_bp Predefined. */ -/* EVSYS_QDIRM1_bm Predefined. */ -/* EVSYS_QDIRM1_bp Predefined. */ - -/* EVSYS_QDIEN_bm Predefined. */ -/* EVSYS_QDIEN_bp Predefined. */ - -/* EVSYS_QDEN_bm Predefined. */ -/* EVSYS_QDEN_bp Predefined. */ - -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* EVSYS.CH5CTRL bit masks and bit positions */ -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* EVSYS.CH6CTRL bit masks and bit positions */ -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* EVSYS.CH7CTRL bit masks and bit positions */ -/* EVSYS_DIGFILT_gm Predefined. */ -/* EVSYS_DIGFILT_gp Predefined. */ -/* EVSYS_DIGFILT0_bm Predefined. */ -/* EVSYS_DIGFILT0_bp Predefined. */ -/* EVSYS_DIGFILT1_bm Predefined. */ -/* EVSYS_DIGFILT1_bp Predefined. */ -/* EVSYS_DIGFILT2_bm Predefined. */ -/* EVSYS_DIGFILT2_bp Predefined. */ - - -/* NVM - Non Volatile Memory Controller */ -/* NVM.CMD bit masks and bit positions */ -#define NVM_CMD_gm 0xFF /* Command group mask. */ -#define NVM_CMD_gp 0 /* Command group position. */ -#define NVM_CMD0_bm (1<<0) /* Command bit 0 mask. */ -#define NVM_CMD0_bp 0 /* Command bit 0 position. */ -#define NVM_CMD1_bm (1<<1) /* Command bit 1 mask. */ -#define NVM_CMD1_bp 1 /* Command bit 1 position. */ -#define NVM_CMD2_bm (1<<2) /* Command bit 2 mask. */ -#define NVM_CMD2_bp 2 /* Command bit 2 position. */ -#define NVM_CMD3_bm (1<<3) /* Command bit 3 mask. */ -#define NVM_CMD3_bp 3 /* Command bit 3 position. */ -#define NVM_CMD4_bm (1<<4) /* Command bit 4 mask. */ -#define NVM_CMD4_bp 4 /* Command bit 4 position. */ -#define NVM_CMD5_bm (1<<5) /* Command bit 5 mask. */ -#define NVM_CMD5_bp 5 /* Command bit 5 position. */ -#define NVM_CMD6_bm (1<<6) /* Command bit 6 mask. */ -#define NVM_CMD6_bp 6 /* Command bit 6 position. */ -#define NVM_CMD7_bm (1<<7) /* Command bit 7 mask. */ -#define NVM_CMD7_bp 7 /* Command bit 7 position. */ - - -/* NVM.CTRLA bit masks and bit positions */ -#define NVM_CMDEX_bm 0x01 /* Command Execute bit mask. */ -#define NVM_CMDEX_bp 0 /* Command Execute bit position. */ - - -/* NVM.CTRLB bit masks and bit positions */ -#define NVM_EEMAPEN_bm 0x08 /* EEPROM Mapping Enable bit mask. */ -#define NVM_EEMAPEN_bp 3 /* EEPROM Mapping Enable bit position. */ - -#define NVM_FPRM_bm 0x04 /* Flash Power Reduction Enable bit mask. */ -#define NVM_FPRM_bp 2 /* Flash Power Reduction Enable bit position. */ - -#define NVM_EPRM_bm 0x02 /* EEPROM Power Reduction Enable bit mask. */ -#define NVM_EPRM_bp 1 /* EEPROM Power Reduction Enable bit position. */ - -#define NVM_SPMLOCK_bm 0x01 /* SPM Lock bit mask. */ -#define NVM_SPMLOCK_bp 0 /* SPM Lock bit position. */ - - -/* NVM.INTCTRL bit masks and bit positions */ -#define NVM_SPMLVL_gm 0x0C /* SPM Interrupt Level group mask. */ -#define NVM_SPMLVL_gp 2 /* SPM Interrupt Level group position. */ -#define NVM_SPMLVL0_bm (1<<2) /* SPM Interrupt Level bit 0 mask. */ -#define NVM_SPMLVL0_bp 2 /* SPM Interrupt Level bit 0 position. */ -#define NVM_SPMLVL1_bm (1<<3) /* SPM Interrupt Level bit 1 mask. */ -#define NVM_SPMLVL1_bp 3 /* SPM Interrupt Level bit 1 position. */ - -#define NVM_EELVL_gm 0x03 /* EEPROM Interrupt Level group mask. */ -#define NVM_EELVL_gp 0 /* EEPROM Interrupt Level group position. */ -#define NVM_EELVL0_bm (1<<0) /* EEPROM Interrupt Level bit 0 mask. */ -#define NVM_EELVL0_bp 0 /* EEPROM Interrupt Level bit 0 position. */ -#define NVM_EELVL1_bm (1<<1) /* EEPROM Interrupt Level bit 1 mask. */ -#define NVM_EELVL1_bp 1 /* EEPROM Interrupt Level bit 1 position. */ - - -/* NVM.STATUS bit masks and bit positions */ -#define NVM_NVMBUSY_bm 0x80 /* Non-volatile Memory Busy bit mask. */ -#define NVM_NVMBUSY_bp 7 /* Non-volatile Memory Busy bit position. */ - -#define NVM_FBUSY_bm 0x40 /* Flash Memory Busy bit mask. */ -#define NVM_FBUSY_bp 6 /* Flash Memory Busy bit position. */ - -#define NVM_EELOAD_bm 0x02 /* EEPROM Page Buffer Active Loading bit mask. */ -#define NVM_EELOAD_bp 1 /* EEPROM Page Buffer Active Loading bit position. */ - -#define NVM_FLOAD_bm 0x01 /* Flash Page Buffer Active Loading bit mask. */ -#define NVM_FLOAD_bp 0 /* Flash Page Buffer Active Loading bit position. */ - - -/* NVM.LOCKBITS bit masks and bit positions */ -#define NVM_BLBB_gm 0xC0 /* Boot Lock Bits - Boot Section group mask. */ -#define NVM_BLBB_gp 6 /* Boot Lock Bits - Boot Section group position. */ -#define NVM_BLBB0_bm (1<<6) /* Boot Lock Bits - Boot Section bit 0 mask. */ -#define NVM_BLBB0_bp 6 /* Boot Lock Bits - Boot Section bit 0 position. */ -#define NVM_BLBB1_bm (1<<7) /* Boot Lock Bits - Boot Section bit 1 mask. */ -#define NVM_BLBB1_bp 7 /* Boot Lock Bits - Boot Section bit 1 position. */ - -#define NVM_BLBA_gm 0x30 /* Boot Lock Bits - Application Section group mask. */ -#define NVM_BLBA_gp 4 /* Boot Lock Bits - Application Section group position. */ -#define NVM_BLBA0_bm (1<<4) /* Boot Lock Bits - Application Section bit 0 mask. */ -#define NVM_BLBA0_bp 4 /* Boot Lock Bits - Application Section bit 0 position. */ -#define NVM_BLBA1_bm (1<<5) /* Boot Lock Bits - Application Section bit 1 mask. */ -#define NVM_BLBA1_bp 5 /* Boot Lock Bits - Application Section bit 1 position. */ - -#define NVM_BLBAT_gm 0x0C /* Boot Lock Bits - Application Table group mask. */ -#define NVM_BLBAT_gp 2 /* Boot Lock Bits - Application Table group position. */ -#define NVM_BLBAT0_bm (1<<2) /* Boot Lock Bits - Application Table bit 0 mask. */ -#define NVM_BLBAT0_bp 2 /* Boot Lock Bits - Application Table bit 0 position. */ -#define NVM_BLBAT1_bm (1<<3) /* Boot Lock Bits - Application Table bit 1 mask. */ -#define NVM_BLBAT1_bp 3 /* Boot Lock Bits - Application Table bit 1 position. */ - -#define NVM_LB_gm 0x03 /* Lock Bits group mask. */ -#define NVM_LB_gp 0 /* Lock Bits group position. */ -#define NVM_LB0_bm (1<<0) /* Lock Bits bit 0 mask. */ -#define NVM_LB0_bp 0 /* Lock Bits bit 0 position. */ -#define NVM_LB1_bm (1<<1) /* Lock Bits bit 1 mask. */ -#define NVM_LB1_bp 1 /* Lock Bits bit 1 position. */ - - -/* NVM_LOCKBITS.LOCKBITS bit masks and bit positions */ -#define NVM_LOCKBITS_BLBB_gm 0xC0 /* Boot Lock Bits - Boot Section group mask. */ -#define NVM_LOCKBITS_BLBB_gp 6 /* Boot Lock Bits - Boot Section group position. */ -#define NVM_LOCKBITS_BLBB0_bm (1<<6) /* Boot Lock Bits - Boot Section bit 0 mask. */ -#define NVM_LOCKBITS_BLBB0_bp 6 /* Boot Lock Bits - Boot Section bit 0 position. */ -#define NVM_LOCKBITS_BLBB1_bm (1<<7) /* Boot Lock Bits - Boot Section bit 1 mask. */ -#define NVM_LOCKBITS_BLBB1_bp 7 /* Boot Lock Bits - Boot Section bit 1 position. */ - -#define NVM_LOCKBITS_BLBA_gm 0x30 /* Boot Lock Bits - Application Section group mask. */ -#define NVM_LOCKBITS_BLBA_gp 4 /* Boot Lock Bits - Application Section group position. */ -#define NVM_LOCKBITS_BLBA0_bm (1<<4) /* Boot Lock Bits - Application Section bit 0 mask. */ -#define NVM_LOCKBITS_BLBA0_bp 4 /* Boot Lock Bits - Application Section bit 0 position. */ -#define NVM_LOCKBITS_BLBA1_bm (1<<5) /* Boot Lock Bits - Application Section bit 1 mask. */ -#define NVM_LOCKBITS_BLBA1_bp 5 /* Boot Lock Bits - Application Section bit 1 position. */ - -#define NVM_LOCKBITS_BLBAT_gm 0x0C /* Boot Lock Bits - Application Table group mask. */ -#define NVM_LOCKBITS_BLBAT_gp 2 /* Boot Lock Bits - Application Table group position. */ -#define NVM_LOCKBITS_BLBAT0_bm (1<<2) /* Boot Lock Bits - Application Table bit 0 mask. */ -#define NVM_LOCKBITS_BLBAT0_bp 2 /* Boot Lock Bits - Application Table bit 0 position. */ -#define NVM_LOCKBITS_BLBAT1_bm (1<<3) /* Boot Lock Bits - Application Table bit 1 mask. */ -#define NVM_LOCKBITS_BLBAT1_bp 3 /* Boot Lock Bits - Application Table bit 1 position. */ - -#define NVM_LOCKBITS_LB_gm 0x03 /* Lock Bits group mask. */ -#define NVM_LOCKBITS_LB_gp 0 /* Lock Bits group position. */ -#define NVM_LOCKBITS_LB0_bm (1<<0) /* Lock Bits bit 0 mask. */ -#define NVM_LOCKBITS_LB0_bp 0 /* Lock Bits bit 0 position. */ -#define NVM_LOCKBITS_LB1_bm (1<<1) /* Lock Bits bit 1 mask. */ -#define NVM_LOCKBITS_LB1_bp 1 /* Lock Bits bit 1 position. */ - - -/* NVM_FUSES.FUSEBYTE0 bit masks and bit positions */ -#define NVM_FUSES_JTAGUSERID_gm 0xFF /* JTAG User ID group mask. */ -#define NVM_FUSES_JTAGUSERID_gp 0 /* JTAG User ID group position. */ -#define NVM_FUSES_JTAGUSERID0_bm (1<<0) /* JTAG User ID bit 0 mask. */ -#define NVM_FUSES_JTAGUSERID0_bp 0 /* JTAG User ID bit 0 position. */ -#define NVM_FUSES_JTAGUSERID1_bm (1<<1) /* JTAG User ID bit 1 mask. */ -#define NVM_FUSES_JTAGUSERID1_bp 1 /* JTAG User ID bit 1 position. */ -#define NVM_FUSES_JTAGUSERID2_bm (1<<2) /* JTAG User ID bit 2 mask. */ -#define NVM_FUSES_JTAGUSERID2_bp 2 /* JTAG User ID bit 2 position. */ -#define NVM_FUSES_JTAGUSERID3_bm (1<<3) /* JTAG User ID bit 3 mask. */ -#define NVM_FUSES_JTAGUSERID3_bp 3 /* JTAG User ID bit 3 position. */ -#define NVM_FUSES_JTAGUSERID4_bm (1<<4) /* JTAG User ID bit 4 mask. */ -#define NVM_FUSES_JTAGUSERID4_bp 4 /* JTAG User ID bit 4 position. */ -#define NVM_FUSES_JTAGUSERID5_bm (1<<5) /* JTAG User ID bit 5 mask. */ -#define NVM_FUSES_JTAGUSERID5_bp 5 /* JTAG User ID bit 5 position. */ -#define NVM_FUSES_JTAGUSERID6_bm (1<<6) /* JTAG User ID bit 6 mask. */ -#define NVM_FUSES_JTAGUSERID6_bp 6 /* JTAG User ID bit 6 position. */ -#define NVM_FUSES_JTAGUSERID7_bm (1<<7) /* JTAG User ID bit 7 mask. */ -#define NVM_FUSES_JTAGUSERID7_bp 7 /* JTAG User ID bit 7 position. */ - - -/* NVM_FUSES.FUSEBYTE1 bit masks and bit positions */ -#define NVM_FUSES_WDWP_gm 0xF0 /* Watchdog Window Timeout Period group mask. */ -#define NVM_FUSES_WDWP_gp 4 /* Watchdog Window Timeout Period group position. */ -#define NVM_FUSES_WDWP0_bm (1<<4) /* Watchdog Window Timeout Period bit 0 mask. */ -#define NVM_FUSES_WDWP0_bp 4 /* Watchdog Window Timeout Period bit 0 position. */ -#define NVM_FUSES_WDWP1_bm (1<<5) /* Watchdog Window Timeout Period bit 1 mask. */ -#define NVM_FUSES_WDWP1_bp 5 /* Watchdog Window Timeout Period bit 1 position. */ -#define NVM_FUSES_WDWP2_bm (1<<6) /* Watchdog Window Timeout Period bit 2 mask. */ -#define NVM_FUSES_WDWP2_bp 6 /* Watchdog Window Timeout Period bit 2 position. */ -#define NVM_FUSES_WDWP3_bm (1<<7) /* Watchdog Window Timeout Period bit 3 mask. */ -#define NVM_FUSES_WDWP3_bp 7 /* Watchdog Window Timeout Period bit 3 position. */ - -#define NVM_FUSES_WDP_gm 0x0F /* Watchdog Timeout Period group mask. */ -#define NVM_FUSES_WDP_gp 0 /* Watchdog Timeout Period group position. */ -#define NVM_FUSES_WDP0_bm (1<<0) /* Watchdog Timeout Period bit 0 mask. */ -#define NVM_FUSES_WDP0_bp 0 /* Watchdog Timeout Period bit 0 position. */ -#define NVM_FUSES_WDP1_bm (1<<1) /* Watchdog Timeout Period bit 1 mask. */ -#define NVM_FUSES_WDP1_bp 1 /* Watchdog Timeout Period bit 1 position. */ -#define NVM_FUSES_WDP2_bm (1<<2) /* Watchdog Timeout Period bit 2 mask. */ -#define NVM_FUSES_WDP2_bp 2 /* Watchdog Timeout Period bit 2 position. */ -#define NVM_FUSES_WDP3_bm (1<<3) /* Watchdog Timeout Period bit 3 mask. */ -#define NVM_FUSES_WDP3_bp 3 /* Watchdog Timeout Period bit 3 position. */ - - -/* NVM_FUSES.FUSEBYTE2 bit masks and bit positions */ -#define NVM_FUSES_DVSDON_bm 0x80 /* Spike Detector Enable bit mask. */ -#define NVM_FUSES_DVSDON_bp 7 /* Spike Detector Enable bit position. */ - -#define NVM_FUSES_BOOTRST_bm 0x40 /* Boot Loader Section Reset Vector bit mask. */ -#define NVM_FUSES_BOOTRST_bp 6 /* Boot Loader Section Reset Vector bit position. */ - -#define NVM_FUSES_BODACT_gm 0x0C /* BOD Operation in Active Mode group mask. */ -#define NVM_FUSES_BODACT_gp 2 /* BOD Operation in Active Mode group position. */ -#define NVM_FUSES_BODACT0_bm (1<<2) /* BOD Operation in Active Mode bit 0 mask. */ -#define NVM_FUSES_BODACT0_bp 2 /* BOD Operation in Active Mode bit 0 position. */ -#define NVM_FUSES_BODACT1_bm (1<<3) /* BOD Operation in Active Mode bit 1 mask. */ -#define NVM_FUSES_BODACT1_bp 3 /* BOD Operation in Active Mode bit 1 position. */ - -#define NVM_FUSES_BODPD_gm 0x03 /* BOD Operation in Power-Down Mode group mask. */ -#define NVM_FUSES_BODPD_gp 0 /* BOD Operation in Power-Down Mode group position. */ -#define NVM_FUSES_BODPD0_bm (1<<0) /* BOD Operation in Power-Down Mode bit 0 mask. */ -#define NVM_FUSES_BODPD0_bp 0 /* BOD Operation in Power-Down Mode bit 0 position. */ -#define NVM_FUSES_BODPD1_bm (1<<1) /* BOD Operation in Power-Down Mode bit 1 mask. */ -#define NVM_FUSES_BODPD1_bp 1 /* BOD Operation in Power-Down Mode bit 1 position. */ - - -/* NVM_FUSES.FUSEBYTE4 bit masks and bit positions */ -#define NVM_FUSES_SUT_gm 0x0C /* Start-up Time group mask. */ -#define NVM_FUSES_SUT_gp 2 /* Start-up Time group position. */ -#define NVM_FUSES_SUT0_bm (1<<2) /* Start-up Time bit 0 mask. */ -#define NVM_FUSES_SUT0_bp 2 /* Start-up Time bit 0 position. */ -#define NVM_FUSES_SUT1_bm (1<<3) /* Start-up Time bit 1 mask. */ -#define NVM_FUSES_SUT1_bp 3 /* Start-up Time bit 1 position. */ - -#define NVM_FUSES_WDLOCK_bm 0x02 /* Watchdog Timer Lock bit mask. */ -#define NVM_FUSES_WDLOCK_bp 1 /* Watchdog Timer Lock bit position. */ - -#define NVM_FUSES_JTAGEN_bm 0x01 /* JTAG Interface Enable bit mask. */ -#define NVM_FUSES_JTAGEN_bp 0 /* JTAG Interface Enable bit position. */ - - -/* NVM_FUSES.FUSEBYTE5 bit masks and bit positions */ -#define NVM_FUSES_EESAVE_bm 0x08 /* Preserve EEPROM Through Chip Erase bit mask. */ -#define NVM_FUSES_EESAVE_bp 3 /* Preserve EEPROM Through Chip Erase bit position. */ - -#define NVM_FUSES_BODLVL_gm 0x07 /* Brown Out Detection Voltage Level group mask. */ -#define NVM_FUSES_BODLVL_gp 0 /* Brown Out Detection Voltage Level group position. */ -#define NVM_FUSES_BODLVL0_bm (1<<0) /* Brown Out Detection Voltage Level bit 0 mask. */ -#define NVM_FUSES_BODLVL0_bp 0 /* Brown Out Detection Voltage Level bit 0 position. */ -#define NVM_FUSES_BODLVL1_bm (1<<1) /* Brown Out Detection Voltage Level bit 1 mask. */ -#define NVM_FUSES_BODLVL1_bp 1 /* Brown Out Detection Voltage Level bit 1 position. */ -#define NVM_FUSES_BODLVL2_bm (1<<2) /* Brown Out Detection Voltage Level bit 2 mask. */ -#define NVM_FUSES_BODLVL2_bp 2 /* Brown Out Detection Voltage Level bit 2 position. */ - - -/* AC - Analog Comparator */ -/* AC.AC0CTRL bit masks and bit positions */ -#define AC_INTMODE_gm 0xC0 /* Interrupt Mode group mask. */ -#define AC_INTMODE_gp 6 /* Interrupt Mode group position. */ -#define AC_INTMODE0_bm (1<<6) /* Interrupt Mode bit 0 mask. */ -#define AC_INTMODE0_bp 6 /* Interrupt Mode bit 0 position. */ -#define AC_INTMODE1_bm (1<<7) /* Interrupt Mode bit 1 mask. */ -#define AC_INTMODE1_bp 7 /* Interrupt Mode bit 1 position. */ - -#define AC_INTLVL_gm 0x30 /* Interrupt Level group mask. */ -#define AC_INTLVL_gp 4 /* Interrupt Level group position. */ -#define AC_INTLVL0_bm (1<<4) /* Interrupt Level bit 0 mask. */ -#define AC_INTLVL0_bp 4 /* Interrupt Level bit 0 position. */ -#define AC_INTLVL1_bm (1<<5) /* Interrupt Level bit 1 mask. */ -#define AC_INTLVL1_bp 5 /* Interrupt Level bit 1 position. */ - -#define AC_HSMODE_bm 0x08 /* High-speed Mode bit mask. */ -#define AC_HSMODE_bp 3 /* High-speed Mode bit position. */ - -#define AC_HYSMODE_gm 0x06 /* Hysteresis Mode group mask. */ -#define AC_HYSMODE_gp 1 /* Hysteresis Mode group position. */ -#define AC_HYSMODE0_bm (1<<1) /* Hysteresis Mode bit 0 mask. */ -#define AC_HYSMODE0_bp 1 /* Hysteresis Mode bit 0 position. */ -#define AC_HYSMODE1_bm (1<<2) /* Hysteresis Mode bit 1 mask. */ -#define AC_HYSMODE1_bp 2 /* Hysteresis Mode bit 1 position. */ - -#define AC_ENABLE_bm 0x01 /* Enable bit mask. */ -#define AC_ENABLE_bp 0 /* Enable bit position. */ - - -/* AC.AC1CTRL bit masks and bit positions */ -/* AC_INTMODE_gm Predefined. */ -/* AC_INTMODE_gp Predefined. */ -/* AC_INTMODE0_bm Predefined. */ -/* AC_INTMODE0_bp Predefined. */ -/* AC_INTMODE1_bm Predefined. */ -/* AC_INTMODE1_bp Predefined. */ - -/* AC_INTLVL_gm Predefined. */ -/* AC_INTLVL_gp Predefined. */ -/* AC_INTLVL0_bm Predefined. */ -/* AC_INTLVL0_bp Predefined. */ -/* AC_INTLVL1_bm Predefined. */ -/* AC_INTLVL1_bp Predefined. */ - -/* AC_HSMODE_bm Predefined. */ -/* AC_HSMODE_bp Predefined. */ - -/* AC_HYSMODE_gm Predefined. */ -/* AC_HYSMODE_gp Predefined. */ -/* AC_HYSMODE0_bm Predefined. */ -/* AC_HYSMODE0_bp Predefined. */ -/* AC_HYSMODE1_bm Predefined. */ -/* AC_HYSMODE1_bp Predefined. */ - -/* AC_ENABLE_bm Predefined. */ -/* AC_ENABLE_bp Predefined. */ - - -/* AC.AC0MUXCTRL bit masks and bit positions */ -#define AC_MUXPOS_gm 0x38 /* MUX Positive Input group mask. */ -#define AC_MUXPOS_gp 3 /* MUX Positive Input group position. */ -#define AC_MUXPOS0_bm (1<<3) /* MUX Positive Input bit 0 mask. */ -#define AC_MUXPOS0_bp 3 /* MUX Positive Input bit 0 position. */ -#define AC_MUXPOS1_bm (1<<4) /* MUX Positive Input bit 1 mask. */ -#define AC_MUXPOS1_bp 4 /* MUX Positive Input bit 1 position. */ -#define AC_MUXPOS2_bm (1<<5) /* MUX Positive Input bit 2 mask. */ -#define AC_MUXPOS2_bp 5 /* MUX Positive Input bit 2 position. */ - -#define AC_MUXNEG_gm 0x07 /* MUX Negative Input group mask. */ -#define AC_MUXNEG_gp 0 /* MUX Negative Input group position. */ -#define AC_MUXNEG0_bm (1<<0) /* MUX Negative Input bit 0 mask. */ -#define AC_MUXNEG0_bp 0 /* MUX Negative Input bit 0 position. */ -#define AC_MUXNEG1_bm (1<<1) /* MUX Negative Input bit 1 mask. */ -#define AC_MUXNEG1_bp 1 /* MUX Negative Input bit 1 position. */ -#define AC_MUXNEG2_bm (1<<2) /* MUX Negative Input bit 2 mask. */ -#define AC_MUXNEG2_bp 2 /* MUX Negative Input bit 2 position. */ - - -/* AC.AC1MUXCTRL bit masks and bit positions */ -/* AC_MUXPOS_gm Predefined. */ -/* AC_MUXPOS_gp Predefined. */ -/* AC_MUXPOS0_bm Predefined. */ -/* AC_MUXPOS0_bp Predefined. */ -/* AC_MUXPOS1_bm Predefined. */ -/* AC_MUXPOS1_bp Predefined. */ -/* AC_MUXPOS2_bm Predefined. */ -/* AC_MUXPOS2_bp Predefined. */ - -/* AC_MUXNEG_gm Predefined. */ -/* AC_MUXNEG_gp Predefined. */ -/* AC_MUXNEG0_bm Predefined. */ -/* AC_MUXNEG0_bp Predefined. */ -/* AC_MUXNEG1_bm Predefined. */ -/* AC_MUXNEG1_bp Predefined. */ -/* AC_MUXNEG2_bm Predefined. */ -/* AC_MUXNEG2_bp Predefined. */ - - -/* AC.CTRLA bit masks and bit positions */ -#define AC_AC0OUT_bm 0x01 /* Comparator 0 Output Enable bit mask. */ -#define AC_AC0OUT_bp 0 /* Comparator 0 Output Enable bit position. */ - - -/* AC.CTRLB bit masks and bit positions */ -#define AC_SCALEFAC_gm 0x3F /* VCC Voltage Scaler Factor group mask. */ -#define AC_SCALEFAC_gp 0 /* VCC Voltage Scaler Factor group position. */ -#define AC_SCALEFAC0_bm (1<<0) /* VCC Voltage Scaler Factor bit 0 mask. */ -#define AC_SCALEFAC0_bp 0 /* VCC Voltage Scaler Factor bit 0 position. */ -#define AC_SCALEFAC1_bm (1<<1) /* VCC Voltage Scaler Factor bit 1 mask. */ -#define AC_SCALEFAC1_bp 1 /* VCC Voltage Scaler Factor bit 1 position. */ -#define AC_SCALEFAC2_bm (1<<2) /* VCC Voltage Scaler Factor bit 2 mask. */ -#define AC_SCALEFAC2_bp 2 /* VCC Voltage Scaler Factor bit 2 position. */ -#define AC_SCALEFAC3_bm (1<<3) /* VCC Voltage Scaler Factor bit 3 mask. */ -#define AC_SCALEFAC3_bp 3 /* VCC Voltage Scaler Factor bit 3 position. */ -#define AC_SCALEFAC4_bm (1<<4) /* VCC Voltage Scaler Factor bit 4 mask. */ -#define AC_SCALEFAC4_bp 4 /* VCC Voltage Scaler Factor bit 4 position. */ -#define AC_SCALEFAC5_bm (1<<5) /* VCC Voltage Scaler Factor bit 5 mask. */ -#define AC_SCALEFAC5_bp 5 /* VCC Voltage Scaler Factor bit 5 position. */ - - -/* AC.WINCTRL bit masks and bit positions */ -#define AC_WEN_bm 0x10 /* Window Mode Enable bit mask. */ -#define AC_WEN_bp 4 /* Window Mode Enable bit position. */ - -#define AC_WINTMODE_gm 0x0C /* Window Interrupt Mode group mask. */ -#define AC_WINTMODE_gp 2 /* Window Interrupt Mode group position. */ -#define AC_WINTMODE0_bm (1<<2) /* Window Interrupt Mode bit 0 mask. */ -#define AC_WINTMODE0_bp 2 /* Window Interrupt Mode bit 0 position. */ -#define AC_WINTMODE1_bm (1<<3) /* Window Interrupt Mode bit 1 mask. */ -#define AC_WINTMODE1_bp 3 /* Window Interrupt Mode bit 1 position. */ - -#define AC_WINTLVL_gm 0x03 /* Window Interrupt Level group mask. */ -#define AC_WINTLVL_gp 0 /* Window Interrupt Level group position. */ -#define AC_WINTLVL0_bm (1<<0) /* Window Interrupt Level bit 0 mask. */ -#define AC_WINTLVL0_bp 0 /* Window Interrupt Level bit 0 position. */ -#define AC_WINTLVL1_bm (1<<1) /* Window Interrupt Level bit 1 mask. */ -#define AC_WINTLVL1_bp 1 /* Window Interrupt Level bit 1 position. */ - - -/* AC.STATUS bit masks and bit positions */ -#define AC_WSTATE_gm 0xC0 /* Window Mode State group mask. */ -#define AC_WSTATE_gp 6 /* Window Mode State group position. */ -#define AC_WSTATE0_bm (1<<6) /* Window Mode State bit 0 mask. */ -#define AC_WSTATE0_bp 6 /* Window Mode State bit 0 position. */ -#define AC_WSTATE1_bm (1<<7) /* Window Mode State bit 1 mask. */ -#define AC_WSTATE1_bp 7 /* Window Mode State bit 1 position. */ - -#define AC_AC1STATE_bm 0x20 /* Comparator 1 State bit mask. */ -#define AC_AC1STATE_bp 5 /* Comparator 1 State bit position. */ - -#define AC_AC0STATE_bm 0x10 /* Comparator 0 State bit mask. */ -#define AC_AC0STATE_bp 4 /* Comparator 0 State bit position. */ - -#define AC_WIF_bm 0x04 /* Window Mode Interrupt Flag bit mask. */ -#define AC_WIF_bp 2 /* Window Mode Interrupt Flag bit position. */ - -#define AC_AC1IF_bm 0x02 /* Comparator 1 Interrupt Flag bit mask. */ -#define AC_AC1IF_bp 1 /* Comparator 1 Interrupt Flag bit position. */ - -#define AC_AC0IF_bm 0x01 /* Comparator 0 Interrupt Flag bit mask. */ -#define AC_AC0IF_bp 0 /* Comparator 0 Interrupt Flag bit position. */ - - -/* ADC - Analog/Digital Converter */ -/* ADC_CH.CTRL bit masks and bit positions */ -#define ADC_CH_START_bm 0x80 /* Channel Start Conversion bit mask. */ -#define ADC_CH_START_bp 7 /* Channel Start Conversion bit position. */ - -#define ADC_CH_GAINFAC_gm 0x1C /* Gain Factor group mask. */ -#define ADC_CH_GAINFAC_gp 2 /* Gain Factor group position. */ -#define ADC_CH_GAINFAC0_bm (1<<2) /* Gain Factor bit 0 mask. */ -#define ADC_CH_GAINFAC0_bp 2 /* Gain Factor bit 0 position. */ -#define ADC_CH_GAINFAC1_bm (1<<3) /* Gain Factor bit 1 mask. */ -#define ADC_CH_GAINFAC1_bp 3 /* Gain Factor bit 1 position. */ -#define ADC_CH_GAINFAC2_bm (1<<4) /* Gain Factor bit 2 mask. */ -#define ADC_CH_GAINFAC2_bp 4 /* Gain Factor bit 2 position. */ - -#define ADC_CH_INPUTMODE_gm 0x03 /* Input Mode Select group mask. */ -#define ADC_CH_INPUTMODE_gp 0 /* Input Mode Select group position. */ -#define ADC_CH_INPUTMODE0_bm (1<<0) /* Input Mode Select bit 0 mask. */ -#define ADC_CH_INPUTMODE0_bp 0 /* Input Mode Select bit 0 position. */ -#define ADC_CH_INPUTMODE1_bm (1<<1) /* Input Mode Select bit 1 mask. */ -#define ADC_CH_INPUTMODE1_bp 1 /* Input Mode Select bit 1 position. */ - - -/* ADC_CH.MUXCTRL bit masks and bit positions */ -#define ADC_CH_MUXPOS_gm 0x78 /* Positive Input Select group mask. */ -#define ADC_CH_MUXPOS_gp 3 /* Positive Input Select group position. */ -#define ADC_CH_MUXPOS0_bm (1<<3) /* Positive Input Select bit 0 mask. */ -#define ADC_CH_MUXPOS0_bp 3 /* Positive Input Select bit 0 position. */ -#define ADC_CH_MUXPOS1_bm (1<<4) /* Positive Input Select bit 1 mask. */ -#define ADC_CH_MUXPOS1_bp 4 /* Positive Input Select bit 1 position. */ -#define ADC_CH_MUXPOS2_bm (1<<5) /* Positive Input Select bit 2 mask. */ -#define ADC_CH_MUXPOS2_bp 5 /* Positive Input Select bit 2 position. */ -#define ADC_CH_MUXPOS3_bm (1<<6) /* Positive Input Select bit 3 mask. */ -#define ADC_CH_MUXPOS3_bp 6 /* Positive Input Select bit 3 position. */ - -#define ADC_CH_MUXINT_gm 0x78 /* Internal Input Select group mask. */ -#define ADC_CH_MUXINT_gp 3 /* Internal Input Select group position. */ -#define ADC_CH_MUXINT0_bm (1<<3) /* Internal Input Select bit 0 mask. */ -#define ADC_CH_MUXINT0_bp 3 /* Internal Input Select bit 0 position. */ -#define ADC_CH_MUXINT1_bm (1<<4) /* Internal Input Select bit 1 mask. */ -#define ADC_CH_MUXINT1_bp 4 /* Internal Input Select bit 1 position. */ -#define ADC_CH_MUXINT2_bm (1<<5) /* Internal Input Select bit 2 mask. */ -#define ADC_CH_MUXINT2_bp 5 /* Internal Input Select bit 2 position. */ -#define ADC_CH_MUXINT3_bm (1<<6) /* Internal Input Select bit 3 mask. */ -#define ADC_CH_MUXINT3_bp 6 /* Internal Input Select bit 3 position. */ - -#define ADC_CH_MUXNEG_gm 0x03 /* Negative Input Select group mask. */ -#define ADC_CH_MUXNEG_gp 0 /* Negative Input Select group position. */ -#define ADC_CH_MUXNEG0_bm (1<<0) /* Negative Input Select bit 0 mask. */ -#define ADC_CH_MUXNEG0_bp 0 /* Negative Input Select bit 0 position. */ -#define ADC_CH_MUXNEG1_bm (1<<1) /* Negative Input Select bit 1 mask. */ -#define ADC_CH_MUXNEG1_bp 1 /* Negative Input Select bit 1 position. */ - - -/* ADC_CH.INTCTRL bit masks and bit positions */ -#define ADC_CH_INTMODE_gm 0x0C /* Interrupt Mode group mask. */ -#define ADC_CH_INTMODE_gp 2 /* Interrupt Mode group position. */ -#define ADC_CH_INTMODE0_bm (1<<2) /* Interrupt Mode bit 0 mask. */ -#define ADC_CH_INTMODE0_bp 2 /* Interrupt Mode bit 0 position. */ -#define ADC_CH_INTMODE1_bm (1<<3) /* Interrupt Mode bit 1 mask. */ -#define ADC_CH_INTMODE1_bp 3 /* Interrupt Mode bit 1 position. */ - -#define ADC_CH_INTLVL_gm 0x03 /* Interrupt Level group mask. */ -#define ADC_CH_INTLVL_gp 0 /* Interrupt Level group position. */ -#define ADC_CH_INTLVL0_bm (1<<0) /* Interrupt Level bit 0 mask. */ -#define ADC_CH_INTLVL0_bp 0 /* Interrupt Level bit 0 position. */ -#define ADC_CH_INTLVL1_bm (1<<1) /* Interrupt Level bit 1 mask. */ -#define ADC_CH_INTLVL1_bp 1 /* Interrupt Level bit 1 position. */ - - -/* ADC_CH.INTFLAGS bit masks and bit positions */ -#define ADC_CH_CHIF_bm 0x01 /* Channel Interrupt Flag bit mask. */ -#define ADC_CH_CHIF_bp 0 /* Channel Interrupt Flag bit position. */ - - -/* ADC.CTRLA bit masks and bit positions */ -#define ADC_DMASEL_gm 0xE0 /* DMA Selection group mask. */ -#define ADC_DMASEL_gp 5 /* DMA Selection group position. */ -#define ADC_DMASEL0_bm (1<<5) /* DMA Selection bit 0 mask. */ -#define ADC_DMASEL0_bp 5 /* DMA Selection bit 0 position. */ -#define ADC_DMASEL1_bm (1<<6) /* DMA Selection bit 1 mask. */ -#define ADC_DMASEL1_bp 6 /* DMA Selection bit 1 position. */ -#define ADC_DMASEL2_bm (1<<7) /* DMA Selection bit 2 mask. */ -#define ADC_DMASEL2_bp 7 /* DMA Selection bit 2 position. */ - -#define ADC_CH3START_bm 0x20 /* Channel 3 Start Conversion bit mask. */ -#define ADC_CH3START_bp 5 /* Channel 3 Start Conversion bit position. */ - -#define ADC_CH2START_bm 0x10 /* Channel 2 Start Conversion bit mask. */ -#define ADC_CH2START_bp 4 /* Channel 2 Start Conversion bit position. */ - -#define ADC_CH1START_bm 0x08 /* Channel 1 Start Conversion bit mask. */ -#define ADC_CH1START_bp 3 /* Channel 1 Start Conversion bit position. */ - -#define ADC_CH0START_bm 0x04 /* Channel 0 Start Conversion bit mask. */ -#define ADC_CH0START_bp 2 /* Channel 0 Start Conversion bit position. */ - -#define ADC_FLUSH_bm 0x02 /* Flush Pipeline bit mask. */ -#define ADC_FLUSH_bp 1 /* Flush Pipeline bit position. */ - -#define ADC_ENABLE_bm 0x01 /* Enable ADC bit mask. */ -#define ADC_ENABLE_bp 0 /* Enable ADC bit position. */ - - -/* ADC.CTRLB bit masks and bit positions */ -#define ADC_CONMODE_bm 0x10 /* Conversion Mode bit mask. */ -#define ADC_CONMODE_bp 4 /* Conversion Mode bit position. */ - -#define ADC_FREERUN_bm 0x08 /* Free Running Mode Enable bit mask. */ -#define ADC_FREERUN_bp 3 /* Free Running Mode Enable bit position. */ - -#define ADC_RESOLUTION_gm 0x06 /* Result Resolution group mask. */ -#define ADC_RESOLUTION_gp 1 /* Result Resolution group position. */ -#define ADC_RESOLUTION0_bm (1<<1) /* Result Resolution bit 0 mask. */ -#define ADC_RESOLUTION0_bp 1 /* Result Resolution bit 0 position. */ -#define ADC_RESOLUTION1_bm (1<<2) /* Result Resolution bit 1 mask. */ -#define ADC_RESOLUTION1_bp 2 /* Result Resolution bit 1 position. */ - - -/* ADC.REFCTRL bit masks and bit positions */ -#define ADC_REFSEL_gm 0x30 /* Reference Selection group mask. */ -#define ADC_REFSEL_gp 4 /* Reference Selection group position. */ -#define ADC_REFSEL0_bm (1<<4) /* Reference Selection bit 0 mask. */ -#define ADC_REFSEL0_bp 4 /* Reference Selection bit 0 position. */ -#define ADC_REFSEL1_bm (1<<5) /* Reference Selection bit 1 mask. */ -#define ADC_REFSEL1_bp 5 /* Reference Selection bit 1 position. */ - -#define ADC_BANDGAP_bm 0x02 /* Bandgap enable bit mask. */ -#define ADC_BANDGAP_bp 1 /* Bandgap enable bit position. */ - -#define ADC_TEMPREF_bm 0x01 /* Temperature Reference Enable bit mask. */ -#define ADC_TEMPREF_bp 0 /* Temperature Reference Enable bit position. */ - - -/* ADC.EVCTRL bit masks and bit positions */ -#define ADC_SWEEP_gm 0xC0 /* Channel Sweep Selection group mask. */ -#define ADC_SWEEP_gp 6 /* Channel Sweep Selection group position. */ -#define ADC_SWEEP0_bm (1<<6) /* Channel Sweep Selection bit 0 mask. */ -#define ADC_SWEEP0_bp 6 /* Channel Sweep Selection bit 0 position. */ -#define ADC_SWEEP1_bm (1<<7) /* Channel Sweep Selection bit 1 mask. */ -#define ADC_SWEEP1_bp 7 /* Channel Sweep Selection bit 1 position. */ - -#define ADC_EVSEL_gm 0x38 /* Event Input Select group mask. */ -#define ADC_EVSEL_gp 3 /* Event Input Select group position. */ -#define ADC_EVSEL0_bm (1<<3) /* Event Input Select bit 0 mask. */ -#define ADC_EVSEL0_bp 3 /* Event Input Select bit 0 position. */ -#define ADC_EVSEL1_bm (1<<4) /* Event Input Select bit 1 mask. */ -#define ADC_EVSEL1_bp 4 /* Event Input Select bit 1 position. */ -#define ADC_EVSEL2_bm (1<<5) /* Event Input Select bit 2 mask. */ -#define ADC_EVSEL2_bp 5 /* Event Input Select bit 2 position. */ - -#define ADC_EVACT_gm 0x07 /* Event Action Select group mask. */ -#define ADC_EVACT_gp 0 /* Event Action Select group position. */ -#define ADC_EVACT0_bm (1<<0) /* Event Action Select bit 0 mask. */ -#define ADC_EVACT0_bp 0 /* Event Action Select bit 0 position. */ -#define ADC_EVACT1_bm (1<<1) /* Event Action Select bit 1 mask. */ -#define ADC_EVACT1_bp 1 /* Event Action Select bit 1 position. */ -#define ADC_EVACT2_bm (1<<2) /* Event Action Select bit 2 mask. */ -#define ADC_EVACT2_bp 2 /* Event Action Select bit 2 position. */ - - -/* ADC.PRESCALER bit masks and bit positions */ -#define ADC_PRESCALER_gm 0x07 /* Clock Prescaler Selection group mask. */ -#define ADC_PRESCALER_gp 0 /* Clock Prescaler Selection group position. */ -#define ADC_PRESCALER0_bm (1<<0) /* Clock Prescaler Selection bit 0 mask. */ -#define ADC_PRESCALER0_bp 0 /* Clock Prescaler Selection bit 0 position. */ -#define ADC_PRESCALER1_bm (1<<1) /* Clock Prescaler Selection bit 1 mask. */ -#define ADC_PRESCALER1_bp 1 /* Clock Prescaler Selection bit 1 position. */ -#define ADC_PRESCALER2_bm (1<<2) /* Clock Prescaler Selection bit 2 mask. */ -#define ADC_PRESCALER2_bp 2 /* Clock Prescaler Selection bit 2 position. */ - - -/* ADC.CALCTRL bit masks and bit positions */ -#define ADC_CAL_bm 0x01 /* ADC Calibration Start bit mask. */ -#define ADC_CAL_bp 0 /* ADC Calibration Start bit position. */ - - -/* ADC.INTFLAGS bit masks and bit positions */ -#define ADC_CH3IF_bm 0x08 /* Channel 3 Interrupt Flag bit mask. */ -#define ADC_CH3IF_bp 3 /* Channel 3 Interrupt Flag bit position. */ - -#define ADC_CH2IF_bm 0x04 /* Channel 2 Interrupt Flag bit mask. */ -#define ADC_CH2IF_bp 2 /* Channel 2 Interrupt Flag bit position. */ - -#define ADC_CH1IF_bm 0x02 /* Channel 1 Interrupt Flag bit mask. */ -#define ADC_CH1IF_bp 1 /* Channel 1 Interrupt Flag bit position. */ - -#define ADC_CH0IF_bm 0x01 /* Channel 0 Interrupt Flag bit mask. */ -#define ADC_CH0IF_bp 0 /* Channel 0 Interrupt Flag bit position. */ - - -/* DAC - Digital/Analog Converter */ -/* DAC.CTRLA bit masks and bit positions */ -#define DAC_IDOEN_bm 0x10 /* Internal Output Enable bit mask. */ -#define DAC_IDOEN_bp 4 /* Internal Output Enable bit position. */ - -#define DAC_CH1EN_bm 0x08 /* Channel 1 Output Enable bit mask. */ -#define DAC_CH1EN_bp 3 /* Channel 1 Output Enable bit position. */ - -#define DAC_CH0EN_bm 0x04 /* Channel 0 Output Enable bit mask. */ -#define DAC_CH0EN_bp 2 /* Channel 0 Output Enable bit position. */ - -#define DAC_LPMODE_bm 0x02 /* Low Power Mode bit mask. */ -#define DAC_LPMODE_bp 1 /* Low Power Mode bit position. */ - -#define DAC_ENABLE_bm 0x01 /* Enable bit mask. */ -#define DAC_ENABLE_bp 0 /* Enable bit position. */ - - -/* DAC.CTRLB bit masks and bit positions */ -#define DAC_CHSEL_gm 0x60 /* Channel Select group mask. */ -#define DAC_CHSEL_gp 5 /* Channel Select group position. */ -#define DAC_CHSEL0_bm (1<<5) /* Channel Select bit 0 mask. */ -#define DAC_CHSEL0_bp 5 /* Channel Select bit 0 position. */ -#define DAC_CHSEL1_bm (1<<6) /* Channel Select bit 1 mask. */ -#define DAC_CHSEL1_bp 6 /* Channel Select bit 1 position. */ - -#define DAC_CH1TRIG_bm 0x02 /* Channel 1 Event Trig Enable bit mask. */ -#define DAC_CH1TRIG_bp 1 /* Channel 1 Event Trig Enable bit position. */ - -#define DAC_CH0TRIG_bm 0x01 /* Channel 0 Event Trig Enable bit mask. */ -#define DAC_CH0TRIG_bp 0 /* Channel 0 Event Trig Enable bit position. */ - - -/* DAC.CTRLC bit masks and bit positions */ -#define DAC_REFSEL_gm 0x18 /* Reference Select group mask. */ -#define DAC_REFSEL_gp 3 /* Reference Select group position. */ -#define DAC_REFSEL0_bm (1<<3) /* Reference Select bit 0 mask. */ -#define DAC_REFSEL0_bp 3 /* Reference Select bit 0 position. */ -#define DAC_REFSEL1_bm (1<<4) /* Reference Select bit 1 mask. */ -#define DAC_REFSEL1_bp 4 /* Reference Select bit 1 position. */ - -#define DAC_LEFTADJ_bm 0x01 /* Left-adjust Result bit mask. */ -#define DAC_LEFTADJ_bp 0 /* Left-adjust Result bit position. */ - - -/* DAC.EVCTRL bit masks and bit positions */ -#define DAC_EVSEL_gm 0x07 /* Event Input Selection group mask. */ -#define DAC_EVSEL_gp 0 /* Event Input Selection group position. */ -#define DAC_EVSEL0_bm (1<<0) /* Event Input Selection bit 0 mask. */ -#define DAC_EVSEL0_bp 0 /* Event Input Selection bit 0 position. */ -#define DAC_EVSEL1_bm (1<<1) /* Event Input Selection bit 1 mask. */ -#define DAC_EVSEL1_bp 1 /* Event Input Selection bit 1 position. */ -#define DAC_EVSEL2_bm (1<<2) /* Event Input Selection bit 2 mask. */ -#define DAC_EVSEL2_bp 2 /* Event Input Selection bit 2 position. */ - - -/* DAC.TIMCTRL bit masks and bit positions */ -#define DAC_CONINTVAL_gm 0x70 /* Conversion Intercal group mask. */ -#define DAC_CONINTVAL_gp 4 /* Conversion Intercal group position. */ -#define DAC_CONINTVAL0_bm (1<<4) /* Conversion Intercal bit 0 mask. */ -#define DAC_CONINTVAL0_bp 4 /* Conversion Intercal bit 0 position. */ -#define DAC_CONINTVAL1_bm (1<<5) /* Conversion Intercal bit 1 mask. */ -#define DAC_CONINTVAL1_bp 5 /* Conversion Intercal bit 1 position. */ -#define DAC_CONINTVAL2_bm (1<<6) /* Conversion Intercal bit 2 mask. */ -#define DAC_CONINTVAL2_bp 6 /* Conversion Intercal bit 2 position. */ - -#define DAC_REFRESH_gm 0x0F /* Refresh Timing Control group mask. */ -#define DAC_REFRESH_gp 0 /* Refresh Timing Control group position. */ -#define DAC_REFRESH0_bm (1<<0) /* Refresh Timing Control bit 0 mask. */ -#define DAC_REFRESH0_bp 0 /* Refresh Timing Control bit 0 position. */ -#define DAC_REFRESH1_bm (1<<1) /* Refresh Timing Control bit 1 mask. */ -#define DAC_REFRESH1_bp 1 /* Refresh Timing Control bit 1 position. */ -#define DAC_REFRESH2_bm (1<<2) /* Refresh Timing Control bit 2 mask. */ -#define DAC_REFRESH2_bp 2 /* Refresh Timing Control bit 2 position. */ -#define DAC_REFRESH3_bm (1<<3) /* Refresh Timing Control bit 3 mask. */ -#define DAC_REFRESH3_bp 3 /* Refresh Timing Control bit 3 position. */ - - -/* DAC.STATUS bit masks and bit positions */ -#define DAC_CH1DRE_bm 0x02 /* Channel 1 Data Register Empty bit mask. */ -#define DAC_CH1DRE_bp 1 /* Channel 1 Data Register Empty bit position. */ - -#define DAC_CH0DRE_bm 0x01 /* Channel 0 Data Register Empty bit mask. */ -#define DAC_CH0DRE_bp 0 /* Channel 0 Data Register Empty bit position. */ - - -/* RTC - Real-Time Clounter */ -/* RTC.CTRL bit masks and bit positions */ -#define RTC_PRESCALER_gm 0x07 /* Prescaling Factor group mask. */ -#define RTC_PRESCALER_gp 0 /* Prescaling Factor group position. */ -#define RTC_PRESCALER0_bm (1<<0) /* Prescaling Factor bit 0 mask. */ -#define RTC_PRESCALER0_bp 0 /* Prescaling Factor bit 0 position. */ -#define RTC_PRESCALER1_bm (1<<1) /* Prescaling Factor bit 1 mask. */ -#define RTC_PRESCALER1_bp 1 /* Prescaling Factor bit 1 position. */ -#define RTC_PRESCALER2_bm (1<<2) /* Prescaling Factor bit 2 mask. */ -#define RTC_PRESCALER2_bp 2 /* Prescaling Factor bit 2 position. */ - - -/* RTC.STATUS bit masks and bit positions */ -#define RTC_SYNCBUSY_bm 0x01 /* Synchronization Busy Flag bit mask. */ -#define RTC_SYNCBUSY_bp 0 /* Synchronization Busy Flag bit position. */ - - -/* RTC.INTCTRL bit masks and bit positions */ -#define RTC_COMPINTLVL_gm 0x0C /* Compare Match Interrupt Level group mask. */ -#define RTC_COMPINTLVL_gp 2 /* Compare Match Interrupt Level group position. */ -#define RTC_COMPINTLVL0_bm (1<<2) /* Compare Match Interrupt Level bit 0 mask. */ -#define RTC_COMPINTLVL0_bp 2 /* Compare Match Interrupt Level bit 0 position. */ -#define RTC_COMPINTLVL1_bm (1<<3) /* Compare Match Interrupt Level bit 1 mask. */ -#define RTC_COMPINTLVL1_bp 3 /* Compare Match Interrupt Level bit 1 position. */ - -#define RTC_OVFINTLVL_gm 0x03 /* Overflow Interrupt Level group mask. */ -#define RTC_OVFINTLVL_gp 0 /* Overflow Interrupt Level group position. */ -#define RTC_OVFINTLVL0_bm (1<<0) /* Overflow Interrupt Level bit 0 mask. */ -#define RTC_OVFINTLVL0_bp 0 /* Overflow Interrupt Level bit 0 position. */ -#define RTC_OVFINTLVL1_bm (1<<1) /* Overflow Interrupt Level bit 1 mask. */ -#define RTC_OVFINTLVL1_bp 1 /* Overflow Interrupt Level bit 1 position. */ - - -/* RTC.INTFLAGS bit masks and bit positions */ -#define RTC_COMPIF_bm 0x02 /* Compare Match Interrupt Flag bit mask. */ -#define RTC_COMPIF_bp 1 /* Compare Match Interrupt Flag bit position. */ - -#define RTC_OVFIF_bm 0x01 /* Overflow Interrupt Flag bit mask. */ -#define RTC_OVFIF_bp 0 /* Overflow Interrupt Flag bit position. */ - - -/* EBI - External Bus Interface */ -/* EBI_CS.CTRLA bit masks and bit positions */ -#define EBI_CS_ASPACE_gm 0x7C /* Address Space group mask. */ -#define EBI_CS_ASPACE_gp 2 /* Address Space group position. */ -#define EBI_CS_ASPACE0_bm (1<<2) /* Address Space bit 0 mask. */ -#define EBI_CS_ASPACE0_bp 2 /* Address Space bit 0 position. */ -#define EBI_CS_ASPACE1_bm (1<<3) /* Address Space bit 1 mask. */ -#define EBI_CS_ASPACE1_bp 3 /* Address Space bit 1 position. */ -#define EBI_CS_ASPACE2_bm (1<<4) /* Address Space bit 2 mask. */ -#define EBI_CS_ASPACE2_bp 4 /* Address Space bit 2 position. */ -#define EBI_CS_ASPACE3_bm (1<<5) /* Address Space bit 3 mask. */ -#define EBI_CS_ASPACE3_bp 5 /* Address Space bit 3 position. */ -#define EBI_CS_ASPACE4_bm (1<<6) /* Address Space bit 4 mask. */ -#define EBI_CS_ASPACE4_bp 6 /* Address Space bit 4 position. */ - -#define EBI_CS_MODE_gm 0x03 /* Memory Mode group mask. */ -#define EBI_CS_MODE_gp 0 /* Memory Mode group position. */ -#define EBI_CS_MODE0_bm (1<<0) /* Memory Mode bit 0 mask. */ -#define EBI_CS_MODE0_bp 0 /* Memory Mode bit 0 position. */ -#define EBI_CS_MODE1_bm (1<<1) /* Memory Mode bit 1 mask. */ -#define EBI_CS_MODE1_bp 1 /* Memory Mode bit 1 position. */ - - -/* EBI_CS.CTRLB bit masks and bit positions */ -#define EBI_CS_SRWS_gm 0x07 /* SRAM Wait State Cycles group mask. */ -#define EBI_CS_SRWS_gp 0 /* SRAM Wait State Cycles group position. */ -#define EBI_CS_SRWS0_bm (1<<0) /* SRAM Wait State Cycles bit 0 mask. */ -#define EBI_CS_SRWS0_bp 0 /* SRAM Wait State Cycles bit 0 position. */ -#define EBI_CS_SRWS1_bm (1<<1) /* SRAM Wait State Cycles bit 1 mask. */ -#define EBI_CS_SRWS1_bp 1 /* SRAM Wait State Cycles bit 1 position. */ -#define EBI_CS_SRWS2_bm (1<<2) /* SRAM Wait State Cycles bit 2 mask. */ -#define EBI_CS_SRWS2_bp 2 /* SRAM Wait State Cycles bit 2 position. */ - -#define EBI_CS_SDINITDONE_bm 0x80 /* SDRAM Initialization Done bit mask. */ -#define EBI_CS_SDINITDONE_bp 7 /* SDRAM Initialization Done bit position. */ - -#define EBI_CS_SDSREN_bm 0x04 /* SDRAM Self-refresh Enable bit mask. */ -#define EBI_CS_SDSREN_bp 2 /* SDRAM Self-refresh Enable bit position. */ - -#define EBI_CS_SDMODE_gm 0x03 /* SDRAM Mode group mask. */ -#define EBI_CS_SDMODE_gp 0 /* SDRAM Mode group position. */ -#define EBI_CS_SDMODE0_bm (1<<0) /* SDRAM Mode bit 0 mask. */ -#define EBI_CS_SDMODE0_bp 0 /* SDRAM Mode bit 0 position. */ -#define EBI_CS_SDMODE1_bm (1<<1) /* SDRAM Mode bit 1 mask. */ -#define EBI_CS_SDMODE1_bp 1 /* SDRAM Mode bit 1 position. */ - - -/* EBI.CTRL bit masks and bit positions */ -#define EBI_SDDATAW_gm 0xC0 /* SDRAM Data Width Setting group mask. */ -#define EBI_SDDATAW_gp 6 /* SDRAM Data Width Setting group position. */ -#define EBI_SDDATAW0_bm (1<<6) /* SDRAM Data Width Setting bit 0 mask. */ -#define EBI_SDDATAW0_bp 6 /* SDRAM Data Width Setting bit 0 position. */ -#define EBI_SDDATAW1_bm (1<<7) /* SDRAM Data Width Setting bit 1 mask. */ -#define EBI_SDDATAW1_bp 7 /* SDRAM Data Width Setting bit 1 position. */ - -#define EBI_LPCMODE_gm 0x30 /* SRAM LPC Mode group mask. */ -#define EBI_LPCMODE_gp 4 /* SRAM LPC Mode group position. */ -#define EBI_LPCMODE0_bm (1<<4) /* SRAM LPC Mode bit 0 mask. */ -#define EBI_LPCMODE0_bp 4 /* SRAM LPC Mode bit 0 position. */ -#define EBI_LPCMODE1_bm (1<<5) /* SRAM LPC Mode bit 1 mask. */ -#define EBI_LPCMODE1_bp 5 /* SRAM LPC Mode bit 1 position. */ - -#define EBI_SRMODE_gm 0x0C /* SRAM Mode group mask. */ -#define EBI_SRMODE_gp 2 /* SRAM Mode group position. */ -#define EBI_SRMODE0_bm (1<<2) /* SRAM Mode bit 0 mask. */ -#define EBI_SRMODE0_bp 2 /* SRAM Mode bit 0 position. */ -#define EBI_SRMODE1_bm (1<<3) /* SRAM Mode bit 1 mask. */ -#define EBI_SRMODE1_bp 3 /* SRAM Mode bit 1 position. */ - -#define EBI_IFMODE_gm 0x03 /* Interface Mode group mask. */ -#define EBI_IFMODE_gp 0 /* Interface Mode group position. */ -#define EBI_IFMODE0_bm (1<<0) /* Interface Mode bit 0 mask. */ -#define EBI_IFMODE0_bp 0 /* Interface Mode bit 0 position. */ -#define EBI_IFMODE1_bm (1<<1) /* Interface Mode bit 1 mask. */ -#define EBI_IFMODE1_bp 1 /* Interface Mode bit 1 position. */ - - -/* EBI.SDRAMCTRLA bit masks and bit positions */ -#define EBI_SDCAS_bm 0x08 /* SDRAM CAS Latency Setting bit mask. */ -#define EBI_SDCAS_bp 3 /* SDRAM CAS Latency Setting bit position. */ - -#define EBI_SDROW_bm 0x04 /* SDRAM ROW Bits Setting bit mask. */ -#define EBI_SDROW_bp 2 /* SDRAM ROW Bits Setting bit position. */ - -#define EBI_SDCOL_gm 0x03 /* SDRAM Column Bits Setting group mask. */ -#define EBI_SDCOL_gp 0 /* SDRAM Column Bits Setting group position. */ -#define EBI_SDCOL0_bm (1<<0) /* SDRAM Column Bits Setting bit 0 mask. */ -#define EBI_SDCOL0_bp 0 /* SDRAM Column Bits Setting bit 0 position. */ -#define EBI_SDCOL1_bm (1<<1) /* SDRAM Column Bits Setting bit 1 mask. */ -#define EBI_SDCOL1_bp 1 /* SDRAM Column Bits Setting bit 1 position. */ - - -/* EBI.SDRAMCTRLB bit masks and bit positions */ -#define EBI_MRDLY_gm 0xC0 /* SDRAM Mode Register Delay group mask. */ -#define EBI_MRDLY_gp 6 /* SDRAM Mode Register Delay group position. */ -#define EBI_MRDLY0_bm (1<<6) /* SDRAM Mode Register Delay bit 0 mask. */ -#define EBI_MRDLY0_bp 6 /* SDRAM Mode Register Delay bit 0 position. */ -#define EBI_MRDLY1_bm (1<<7) /* SDRAM Mode Register Delay bit 1 mask. */ -#define EBI_MRDLY1_bp 7 /* SDRAM Mode Register Delay bit 1 position. */ - -#define EBI_ROWCYCDLY_gm 0x38 /* SDRAM Row Cycle Delay group mask. */ -#define EBI_ROWCYCDLY_gp 3 /* SDRAM Row Cycle Delay group position. */ -#define EBI_ROWCYCDLY0_bm (1<<3) /* SDRAM Row Cycle Delay bit 0 mask. */ -#define EBI_ROWCYCDLY0_bp 3 /* SDRAM Row Cycle Delay bit 0 position. */ -#define EBI_ROWCYCDLY1_bm (1<<4) /* SDRAM Row Cycle Delay bit 1 mask. */ -#define EBI_ROWCYCDLY1_bp 4 /* SDRAM Row Cycle Delay bit 1 position. */ -#define EBI_ROWCYCDLY2_bm (1<<5) /* SDRAM Row Cycle Delay bit 2 mask. */ -#define EBI_ROWCYCDLY2_bp 5 /* SDRAM Row Cycle Delay bit 2 position. */ - -#define EBI_RPDLY_gm 0x07 /* SDRAM Row-to-Precharge Delay group mask. */ -#define EBI_RPDLY_gp 0 /* SDRAM Row-to-Precharge Delay group position. */ -#define EBI_RPDLY0_bm (1<<0) /* SDRAM Row-to-Precharge Delay bit 0 mask. */ -#define EBI_RPDLY0_bp 0 /* SDRAM Row-to-Precharge Delay bit 0 position. */ -#define EBI_RPDLY1_bm (1<<1) /* SDRAM Row-to-Precharge Delay bit 1 mask. */ -#define EBI_RPDLY1_bp 1 /* SDRAM Row-to-Precharge Delay bit 1 position. */ -#define EBI_RPDLY2_bm (1<<2) /* SDRAM Row-to-Precharge Delay bit 2 mask. */ -#define EBI_RPDLY2_bp 2 /* SDRAM Row-to-Precharge Delay bit 2 position. */ - - -/* EBI.SDRAMCTRLC bit masks and bit positions */ -#define EBI_WRDLY_gm 0xC0 /* SDRAM Write Recovery Delay group mask. */ -#define EBI_WRDLY_gp 6 /* SDRAM Write Recovery Delay group position. */ -#define EBI_WRDLY0_bm (1<<6) /* SDRAM Write Recovery Delay bit 0 mask. */ -#define EBI_WRDLY0_bp 6 /* SDRAM Write Recovery Delay bit 0 position. */ -#define EBI_WRDLY1_bm (1<<7) /* SDRAM Write Recovery Delay bit 1 mask. */ -#define EBI_WRDLY1_bp 7 /* SDRAM Write Recovery Delay bit 1 position. */ - -#define EBI_ESRDLY_gm 0x38 /* SDRAM Exit-Self-refresh-to-Active Delay group mask. */ -#define EBI_ESRDLY_gp 3 /* SDRAM Exit-Self-refresh-to-Active Delay group position. */ -#define EBI_ESRDLY0_bm (1<<3) /* SDRAM Exit-Self-refresh-to-Active Delay bit 0 mask. */ -#define EBI_ESRDLY0_bp 3 /* SDRAM Exit-Self-refresh-to-Active Delay bit 0 position. */ -#define EBI_ESRDLY1_bm (1<<4) /* SDRAM Exit-Self-refresh-to-Active Delay bit 1 mask. */ -#define EBI_ESRDLY1_bp 4 /* SDRAM Exit-Self-refresh-to-Active Delay bit 1 position. */ -#define EBI_ESRDLY2_bm (1<<5) /* SDRAM Exit-Self-refresh-to-Active Delay bit 2 mask. */ -#define EBI_ESRDLY2_bp 5 /* SDRAM Exit-Self-refresh-to-Active Delay bit 2 position. */ - -#define EBI_ROWCOLDLY_gm 0x07 /* SDRAM Row-to-Column Delay group mask. */ -#define EBI_ROWCOLDLY_gp 0 /* SDRAM Row-to-Column Delay group position. */ -#define EBI_ROWCOLDLY0_bm (1<<0) /* SDRAM Row-to-Column Delay bit 0 mask. */ -#define EBI_ROWCOLDLY0_bp 0 /* SDRAM Row-to-Column Delay bit 0 position. */ -#define EBI_ROWCOLDLY1_bm (1<<1) /* SDRAM Row-to-Column Delay bit 1 mask. */ -#define EBI_ROWCOLDLY1_bp 1 /* SDRAM Row-to-Column Delay bit 1 position. */ -#define EBI_ROWCOLDLY2_bm (1<<2) /* SDRAM Row-to-Column Delay bit 2 mask. */ -#define EBI_ROWCOLDLY2_bp 2 /* SDRAM Row-to-Column Delay bit 2 position. */ - - -/* TWI - Two-Wire Interface */ -/* TWI_MASTER.CTRLA bit masks and bit positions */ -#define TWI_MASTER_INTLVL_gm 0xC0 /* Interrupt Level group mask. */ -#define TWI_MASTER_INTLVL_gp 6 /* Interrupt Level group position. */ -#define TWI_MASTER_INTLVL0_bm (1<<6) /* Interrupt Level bit 0 mask. */ -#define TWI_MASTER_INTLVL0_bp 6 /* Interrupt Level bit 0 position. */ -#define TWI_MASTER_INTLVL1_bm (1<<7) /* Interrupt Level bit 1 mask. */ -#define TWI_MASTER_INTLVL1_bp 7 /* Interrupt Level bit 1 position. */ - -#define TWI_MASTER_RIEN_bm 0x20 /* Read Interrupt Enable bit mask. */ -#define TWI_MASTER_RIEN_bp 5 /* Read Interrupt Enable bit position. */ - -#define TWI_MASTER_WIEN_bm 0x10 /* Write Interrupt Enable bit mask. */ -#define TWI_MASTER_WIEN_bp 4 /* Write Interrupt Enable bit position. */ - -#define TWI_MASTER_ENABLE_bm 0x08 /* Enable TWI Master bit mask. */ -#define TWI_MASTER_ENABLE_bp 3 /* Enable TWI Master bit position. */ - - -/* TWI_MASTER.CTRLB bit masks and bit positions */ -#define TWI_MASTER_TIMEOUT_gm 0x0C /* Inactive Bus Timeout group mask. */ -#define TWI_MASTER_TIMEOUT_gp 2 /* Inactive Bus Timeout group position. */ -#define TWI_MASTER_TIMEOUT0_bm (1<<2) /* Inactive Bus Timeout bit 0 mask. */ -#define TWI_MASTER_TIMEOUT0_bp 2 /* Inactive Bus Timeout bit 0 position. */ -#define TWI_MASTER_TIMEOUT1_bm (1<<3) /* Inactive Bus Timeout bit 1 mask. */ -#define TWI_MASTER_TIMEOUT1_bp 3 /* Inactive Bus Timeout bit 1 position. */ - -#define TWI_MASTER_QCEN_bm 0x02 /* Quick Command Enable bit mask. */ -#define TWI_MASTER_QCEN_bp 1 /* Quick Command Enable bit position. */ - -#define TWI_MASTER_SMEN_bm 0x01 /* Smart Mode Enable bit mask. */ -#define TWI_MASTER_SMEN_bp 0 /* Smart Mode Enable bit position. */ - - -/* TWI_MASTER.CTRLC bit masks and bit positions */ -#define TWI_MASTER_ACKACT_bm 0x04 /* Acknowledge Action bit mask. */ -#define TWI_MASTER_ACKACT_bp 2 /* Acknowledge Action bit position. */ - -#define TWI_MASTER_CMD_gm 0x03 /* Command group mask. */ -#define TWI_MASTER_CMD_gp 0 /* Command group position. */ -#define TWI_MASTER_CMD0_bm (1<<0) /* Command bit 0 mask. */ -#define TWI_MASTER_CMD0_bp 0 /* Command bit 0 position. */ -#define TWI_MASTER_CMD1_bm (1<<1) /* Command bit 1 mask. */ -#define TWI_MASTER_CMD1_bp 1 /* Command bit 1 position. */ - - -/* TWI_MASTER.STATUS bit masks and bit positions */ -#define TWI_MASTER_RIF_bm 0x80 /* Read Interrupt Flag bit mask. */ -#define TWI_MASTER_RIF_bp 7 /* Read Interrupt Flag bit position. */ - -#define TWI_MASTER_WIF_bm 0x40 /* Write Interrupt Flag bit mask. */ -#define TWI_MASTER_WIF_bp 6 /* Write Interrupt Flag bit position. */ - -#define TWI_MASTER_CLKHOLD_bm 0x20 /* Clock Hold bit mask. */ -#define TWI_MASTER_CLKHOLD_bp 5 /* Clock Hold bit position. */ - -#define TWI_MASTER_RXACK_bm 0x10 /* Received Acknowledge bit mask. */ -#define TWI_MASTER_RXACK_bp 4 /* Received Acknowledge bit position. */ - -#define TWI_MASTER_ARBLOST_bm 0x08 /* Arbitration Lost bit mask. */ -#define TWI_MASTER_ARBLOST_bp 3 /* Arbitration Lost bit position. */ - -#define TWI_MASTER_BUSERR_bm 0x04 /* Bus Error bit mask. */ -#define TWI_MASTER_BUSERR_bp 2 /* Bus Error bit position. */ - -#define TWI_MASTER_BUSSTATE_gm 0x03 /* Bus State group mask. */ -#define TWI_MASTER_BUSSTATE_gp 0 /* Bus State group position. */ -#define TWI_MASTER_BUSSTATE0_bm (1<<0) /* Bus State bit 0 mask. */ -#define TWI_MASTER_BUSSTATE0_bp 0 /* Bus State bit 0 position. */ -#define TWI_MASTER_BUSSTATE1_bm (1<<1) /* Bus State bit 1 mask. */ -#define TWI_MASTER_BUSSTATE1_bp 1 /* Bus State bit 1 position. */ - - -/* TWI_SLAVE.CTRLA bit masks and bit positions */ -#define TWI_SLAVE_INTLVL_gm 0xC0 /* Interrupt Level group mask. */ -#define TWI_SLAVE_INTLVL_gp 6 /* Interrupt Level group position. */ -#define TWI_SLAVE_INTLVL0_bm (1<<6) /* Interrupt Level bit 0 mask. */ -#define TWI_SLAVE_INTLVL0_bp 6 /* Interrupt Level bit 0 position. */ -#define TWI_SLAVE_INTLVL1_bm (1<<7) /* Interrupt Level bit 1 mask. */ -#define TWI_SLAVE_INTLVL1_bp 7 /* Interrupt Level bit 1 position. */ - -#define TWI_SLAVE_DIEN_bm 0x20 /* Data Interrupt Enable bit mask. */ -#define TWI_SLAVE_DIEN_bp 5 /* Data Interrupt Enable bit position. */ - -#define TWI_SLAVE_APIEN_bm 0x10 /* Address/Stop Interrupt Enable bit mask. */ -#define TWI_SLAVE_APIEN_bp 4 /* Address/Stop Interrupt Enable bit position. */ - -#define TWI_SLAVE_ENABLE_bm 0x08 /* Enable TWI Slave bit mask. */ -#define TWI_SLAVE_ENABLE_bp 3 /* Enable TWI Slave bit position. */ - -#define TWI_SLAVE_PIEN_bm 0x04 /* Stop Interrupt Enable bit mask. */ -#define TWI_SLAVE_PIEN_bp 2 /* Stop Interrupt Enable bit position. */ - -#define TWI_SLAVE_PMEN_bm 0x02 /* Promiscuous Mode Enable bit mask. */ -#define TWI_SLAVE_PMEN_bp 1 /* Promiscuous Mode Enable bit position. */ - -#define TWI_SLAVE_SMEN_bm 0x01 /* Smart Mode Enable bit mask. */ -#define TWI_SLAVE_SMEN_bp 0 /* Smart Mode Enable bit position. */ - - -/* TWI_SLAVE.CTRLB bit masks and bit positions */ -#define TWI_SLAVE_ACKACT_bm 0x04 /* Acknowledge Action bit mask. */ -#define TWI_SLAVE_ACKACT_bp 2 /* Acknowledge Action bit position. */ - -#define TWI_SLAVE_CMD_gm 0x03 /* Command group mask. */ -#define TWI_SLAVE_CMD_gp 0 /* Command group position. */ -#define TWI_SLAVE_CMD0_bm (1<<0) /* Command bit 0 mask. */ -#define TWI_SLAVE_CMD0_bp 0 /* Command bit 0 position. */ -#define TWI_SLAVE_CMD1_bm (1<<1) /* Command bit 1 mask. */ -#define TWI_SLAVE_CMD1_bp 1 /* Command bit 1 position. */ - - -/* TWI_SLAVE.STATUS bit masks and bit positions */ -#define TWI_SLAVE_DIF_bm 0x80 /* Data Interrupt Flag bit mask. */ -#define TWI_SLAVE_DIF_bp 7 /* Data Interrupt Flag bit position. */ - -#define TWI_SLAVE_APIF_bm 0x40 /* Address/Stop Interrupt Flag bit mask. */ -#define TWI_SLAVE_APIF_bp 6 /* Address/Stop Interrupt Flag bit position. */ - -#define TWI_SLAVE_CLKHOLD_bm 0x20 /* Clock Hold bit mask. */ -#define TWI_SLAVE_CLKHOLD_bp 5 /* Clock Hold bit position. */ - -#define TWI_SLAVE_RXACK_bm 0x10 /* Received Acknowledge bit mask. */ -#define TWI_SLAVE_RXACK_bp 4 /* Received Acknowledge bit position. */ - -#define TWI_SLAVE_COLL_bm 0x08 /* Collision bit mask. */ -#define TWI_SLAVE_COLL_bp 3 /* Collision bit position. */ - -#define TWI_SLAVE_BUSERR_bm 0x04 /* Bus Error bit mask. */ -#define TWI_SLAVE_BUSERR_bp 2 /* Bus Error bit position. */ - -#define TWI_SLAVE_DIR_bm 0x02 /* Read/Write Direction bit mask. */ -#define TWI_SLAVE_DIR_bp 1 /* Read/Write Direction bit position. */ - -#define TWI_SLAVE_AP_bm 0x01 /* Slave Address or Stop bit mask. */ -#define TWI_SLAVE_AP_bp 0 /* Slave Address or Stop bit position. */ - - -/* TWI.CTRL bit masks and bit positions */ -#define TWI_SDAHOLD_bm 0x02 /* SDA Hold Time Enable bit mask. */ -#define TWI_SDAHOLD_bp 1 /* SDA Hold Time Enable bit position. */ - -#define TWI_EDIEN_bm 0x01 /* External Driver Interface Enable bit mask. */ -#define TWI_EDIEN_bp 0 /* External Driver Interface Enable bit position. */ - - -/* PORT - Port Configuration */ -/* PORTCFG.VPCTRLA bit masks and bit positions */ -#define PORTCFG_VP1MAP_gm 0xF0 /* Virtual Port 1 Mapping group mask. */ -#define PORTCFG_VP1MAP_gp 4 /* Virtual Port 1 Mapping group position. */ -#define PORTCFG_VP1MAP0_bm (1<<4) /* Virtual Port 1 Mapping bit 0 mask. */ -#define PORTCFG_VP1MAP0_bp 4 /* Virtual Port 1 Mapping bit 0 position. */ -#define PORTCFG_VP1MAP1_bm (1<<5) /* Virtual Port 1 Mapping bit 1 mask. */ -#define PORTCFG_VP1MAP1_bp 5 /* Virtual Port 1 Mapping bit 1 position. */ -#define PORTCFG_VP1MAP2_bm (1<<6) /* Virtual Port 1 Mapping bit 2 mask. */ -#define PORTCFG_VP1MAP2_bp 6 /* Virtual Port 1 Mapping bit 2 position. */ -#define PORTCFG_VP1MAP3_bm (1<<7) /* Virtual Port 1 Mapping bit 3 mask. */ -#define PORTCFG_VP1MAP3_bp 7 /* Virtual Port 1 Mapping bit 3 position. */ - -#define PORTCFG_VP0MAP_gm 0x0F /* Virtual Port 0 Mapping group mask. */ -#define PORTCFG_VP0MAP_gp 0 /* Virtual Port 0 Mapping group position. */ -#define PORTCFG_VP0MAP0_bm (1<<0) /* Virtual Port 0 Mapping bit 0 mask. */ -#define PORTCFG_VP0MAP0_bp 0 /* Virtual Port 0 Mapping bit 0 position. */ -#define PORTCFG_VP0MAP1_bm (1<<1) /* Virtual Port 0 Mapping bit 1 mask. */ -#define PORTCFG_VP0MAP1_bp 1 /* Virtual Port 0 Mapping bit 1 position. */ -#define PORTCFG_VP0MAP2_bm (1<<2) /* Virtual Port 0 Mapping bit 2 mask. */ -#define PORTCFG_VP0MAP2_bp 2 /* Virtual Port 0 Mapping bit 2 position. */ -#define PORTCFG_VP0MAP3_bm (1<<3) /* Virtual Port 0 Mapping bit 3 mask. */ -#define PORTCFG_VP0MAP3_bp 3 /* Virtual Port 0 Mapping bit 3 position. */ - - -/* PORTCFG.VPCTRLB bit masks and bit positions */ -#define PORTCFG_VP3MAP_gm 0xF0 /* Virtual Port 3 Mapping group mask. */ -#define PORTCFG_VP3MAP_gp 4 /* Virtual Port 3 Mapping group position. */ -#define PORTCFG_VP3MAP0_bm (1<<4) /* Virtual Port 3 Mapping bit 0 mask. */ -#define PORTCFG_VP3MAP0_bp 4 /* Virtual Port 3 Mapping bit 0 position. */ -#define PORTCFG_VP3MAP1_bm (1<<5) /* Virtual Port 3 Mapping bit 1 mask. */ -#define PORTCFG_VP3MAP1_bp 5 /* Virtual Port 3 Mapping bit 1 position. */ -#define PORTCFG_VP3MAP2_bm (1<<6) /* Virtual Port 3 Mapping bit 2 mask. */ -#define PORTCFG_VP3MAP2_bp 6 /* Virtual Port 3 Mapping bit 2 position. */ -#define PORTCFG_VP3MAP3_bm (1<<7) /* Virtual Port 3 Mapping bit 3 mask. */ -#define PORTCFG_VP3MAP3_bp 7 /* Virtual Port 3 Mapping bit 3 position. */ - -#define PORTCFG_VP2MAP_gm 0x0F /* Virtual Port 2 Mapping group mask. */ -#define PORTCFG_VP2MAP_gp 0 /* Virtual Port 2 Mapping group position. */ -#define PORTCFG_VP2MAP0_bm (1<<0) /* Virtual Port 2 Mapping bit 0 mask. */ -#define PORTCFG_VP2MAP0_bp 0 /* Virtual Port 2 Mapping bit 0 position. */ -#define PORTCFG_VP2MAP1_bm (1<<1) /* Virtual Port 2 Mapping bit 1 mask. */ -#define PORTCFG_VP2MAP1_bp 1 /* Virtual Port 2 Mapping bit 1 position. */ -#define PORTCFG_VP2MAP2_bm (1<<2) /* Virtual Port 2 Mapping bit 2 mask. */ -#define PORTCFG_VP2MAP2_bp 2 /* Virtual Port 2 Mapping bit 2 position. */ -#define PORTCFG_VP2MAP3_bm (1<<3) /* Virtual Port 2 Mapping bit 3 mask. */ -#define PORTCFG_VP2MAP3_bp 3 /* Virtual Port 2 Mapping bit 3 position. */ - - -/* PORTCFG.CLKEVOUT bit masks and bit positions */ -#define PORTCFG_CLKOUT_gm 0x03 /* Clock Output Port group mask. */ -#define PORTCFG_CLKOUT_gp 0 /* Clock Output Port group position. */ -#define PORTCFG_CLKOUT0_bm (1<<0) /* Clock Output Port bit 0 mask. */ -#define PORTCFG_CLKOUT0_bp 0 /* Clock Output Port bit 0 position. */ -#define PORTCFG_CLKOUT1_bm (1<<1) /* Clock Output Port bit 1 mask. */ -#define PORTCFG_CLKOUT1_bp 1 /* Clock Output Port bit 1 position. */ - -#define PORTCFG_EVOUT_gm 0x30 /* Event Output Port group mask. */ -#define PORTCFG_EVOUT_gp 4 /* Event Output Port group position. */ -#define PORTCFG_EVOUT0_bm (1<<4) /* Event Output Port bit 0 mask. */ -#define PORTCFG_EVOUT0_bp 4 /* Event Output Port bit 0 position. */ -#define PORTCFG_EVOUT1_bm (1<<5) /* Event Output Port bit 1 mask. */ -#define PORTCFG_EVOUT1_bp 5 /* Event Output Port bit 1 position. */ - - -/* VPORT.INTFLAGS bit masks and bit positions */ -#define VPORT_INT1IF_bm 0x02 /* Port Interrupt 1 Flag bit mask. */ -#define VPORT_INT1IF_bp 1 /* Port Interrupt 1 Flag bit position. */ - -#define VPORT_INT0IF_bm 0x01 /* Port Interrupt 0 Flag bit mask. */ -#define VPORT_INT0IF_bp 0 /* Port Interrupt 0 Flag bit position. */ - - -/* PORT.INTCTRL bit masks and bit positions */ -#define PORT_INT1LVL_gm 0x0C /* Port Interrupt 1 Level group mask. */ -#define PORT_INT1LVL_gp 2 /* Port Interrupt 1 Level group position. */ -#define PORT_INT1LVL0_bm (1<<2) /* Port Interrupt 1 Level bit 0 mask. */ -#define PORT_INT1LVL0_bp 2 /* Port Interrupt 1 Level bit 0 position. */ -#define PORT_INT1LVL1_bm (1<<3) /* Port Interrupt 1 Level bit 1 mask. */ -#define PORT_INT1LVL1_bp 3 /* Port Interrupt 1 Level bit 1 position. */ - -#define PORT_INT0LVL_gm 0x03 /* Port Interrupt 0 Level group mask. */ -#define PORT_INT0LVL_gp 0 /* Port Interrupt 0 Level group position. */ -#define PORT_INT0LVL0_bm (1<<0) /* Port Interrupt 0 Level bit 0 mask. */ -#define PORT_INT0LVL0_bp 0 /* Port Interrupt 0 Level bit 0 position. */ -#define PORT_INT0LVL1_bm (1<<1) /* Port Interrupt 0 Level bit 1 mask. */ -#define PORT_INT0LVL1_bp 1 /* Port Interrupt 0 Level bit 1 position. */ - - -/* PORT.INTFLAGS bit masks and bit positions */ -#define PORT_INT1IF_bm 0x02 /* Port Interrupt 1 Flag bit mask. */ -#define PORT_INT1IF_bp 1 /* Port Interrupt 1 Flag bit position. */ - -#define PORT_INT0IF_bm 0x01 /* Port Interrupt 0 Flag bit mask. */ -#define PORT_INT0IF_bp 0 /* Port Interrupt 0 Flag bit position. */ - - -/* PORT.PIN0CTRL bit masks and bit positions */ -#define PORT_SRLEN_bm 0x80 /* Slew Rate Enable bit mask. */ -#define PORT_SRLEN_bp 7 /* Slew Rate Enable bit position. */ - -#define PORT_INVEN_bm 0x40 /* Inverted I/O Enable bit mask. */ -#define PORT_INVEN_bp 6 /* Inverted I/O Enable bit position. */ - -#define PORT_OPC_gm 0x38 /* Output/Pull Configuration group mask. */ -#define PORT_OPC_gp 3 /* Output/Pull Configuration group position. */ -#define PORT_OPC0_bm (1<<3) /* Output/Pull Configuration bit 0 mask. */ -#define PORT_OPC0_bp 3 /* Output/Pull Configuration bit 0 position. */ -#define PORT_OPC1_bm (1<<4) /* Output/Pull Configuration bit 1 mask. */ -#define PORT_OPC1_bp 4 /* Output/Pull Configuration bit 1 position. */ -#define PORT_OPC2_bm (1<<5) /* Output/Pull Configuration bit 2 mask. */ -#define PORT_OPC2_bp 5 /* Output/Pull Configuration bit 2 position. */ - -#define PORT_ISC_gm 0x07 /* Input/Sense Configuration group mask. */ -#define PORT_ISC_gp 0 /* Input/Sense Configuration group position. */ -#define PORT_ISC0_bm (1<<0) /* Input/Sense Configuration bit 0 mask. */ -#define PORT_ISC0_bp 0 /* Input/Sense Configuration bit 0 position. */ -#define PORT_ISC1_bm (1<<1) /* Input/Sense Configuration bit 1 mask. */ -#define PORT_ISC1_bp 1 /* Input/Sense Configuration bit 1 position. */ -#define PORT_ISC2_bm (1<<2) /* Input/Sense Configuration bit 2 mask. */ -#define PORT_ISC2_bp 2 /* Input/Sense Configuration bit 2 position. */ - - -/* PORT.PIN1CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* PORT.PIN2CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* PORT.PIN3CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* PORT.PIN4CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* PORT.PIN5CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* PORT.PIN6CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* PORT.PIN7CTRL bit masks and bit positions */ -/* PORT_SRLEN_bm Predefined. */ -/* PORT_SRLEN_bp Predefined. */ - -/* PORT_INVEN_bm Predefined. */ -/* PORT_INVEN_bp Predefined. */ - -/* PORT_OPC_gm Predefined. */ -/* PORT_OPC_gp Predefined. */ -/* PORT_OPC0_bm Predefined. */ -/* PORT_OPC0_bp Predefined. */ -/* PORT_OPC1_bm Predefined. */ -/* PORT_OPC1_bp Predefined. */ -/* PORT_OPC2_bm Predefined. */ -/* PORT_OPC2_bp Predefined. */ - -/* PORT_ISC_gm Predefined. */ -/* PORT_ISC_gp Predefined. */ -/* PORT_ISC0_bm Predefined. */ -/* PORT_ISC0_bp Predefined. */ -/* PORT_ISC1_bm Predefined. */ -/* PORT_ISC1_bp Predefined. */ -/* PORT_ISC2_bm Predefined. */ -/* PORT_ISC2_bp Predefined. */ - - -/* TC - 16-bit Timer/Counter With PWM */ -/* TC0.CTRLA bit masks and bit positions */ -#define TC0_CLKSEL_gm 0x0F /* Clock Selection group mask. */ -#define TC0_CLKSEL_gp 0 /* Clock Selection group position. */ -#define TC0_CLKSEL0_bm (1<<0) /* Clock Selection bit 0 mask. */ -#define TC0_CLKSEL0_bp 0 /* Clock Selection bit 0 position. */ -#define TC0_CLKSEL1_bm (1<<1) /* Clock Selection bit 1 mask. */ -#define TC0_CLKSEL1_bp 1 /* Clock Selection bit 1 position. */ -#define TC0_CLKSEL2_bm (1<<2) /* Clock Selection bit 2 mask. */ -#define TC0_CLKSEL2_bp 2 /* Clock Selection bit 2 position. */ -#define TC0_CLKSEL3_bm (1<<3) /* Clock Selection bit 3 mask. */ -#define TC0_CLKSEL3_bp 3 /* Clock Selection bit 3 position. */ - - -/* TC0.CTRLB bit masks and bit positions */ -#define TC0_CCDEN_bm 0x80 /* Compare or Capture D Enable bit mask. */ -#define TC0_CCDEN_bp 7 /* Compare or Capture D Enable bit position. */ - -#define TC0_CCCEN_bm 0x40 /* Compare or Capture C Enable bit mask. */ -#define TC0_CCCEN_bp 6 /* Compare or Capture C Enable bit position. */ - -#define TC0_CCBEN_bm 0x20 /* Compare or Capture B Enable bit mask. */ -#define TC0_CCBEN_bp 5 /* Compare or Capture B Enable bit position. */ - -#define TC0_CCAEN_bm 0x10 /* Compare or Capture A Enable bit mask. */ -#define TC0_CCAEN_bp 4 /* Compare or Capture A Enable bit position. */ - -#define TC0_WGMODE_gm 0x07 /* Waveform generation mode group mask. */ -#define TC0_WGMODE_gp 0 /* Waveform generation mode group position. */ -#define TC0_WGMODE0_bm (1<<0) /* Waveform generation mode bit 0 mask. */ -#define TC0_WGMODE0_bp 0 /* Waveform generation mode bit 0 position. */ -#define TC0_WGMODE1_bm (1<<1) /* Waveform generation mode bit 1 mask. */ -#define TC0_WGMODE1_bp 1 /* Waveform generation mode bit 1 position. */ -#define TC0_WGMODE2_bm (1<<2) /* Waveform generation mode bit 2 mask. */ -#define TC0_WGMODE2_bp 2 /* Waveform generation mode bit 2 position. */ - - -/* TC0.CTRLC bit masks and bit positions */ -#define TC0_CMPD_bm 0x08 /* Compare D Output Value bit mask. */ -#define TC0_CMPD_bp 3 /* Compare D Output Value bit position. */ - -#define TC0_CMPC_bm 0x04 /* Compare C Output Value bit mask. */ -#define TC0_CMPC_bp 2 /* Compare C Output Value bit position. */ - -#define TC0_CMPB_bm 0x02 /* Compare B Output Value bit mask. */ -#define TC0_CMPB_bp 1 /* Compare B Output Value bit position. */ - -#define TC0_CMPA_bm 0x01 /* Compare A Output Value bit mask. */ -#define TC0_CMPA_bp 0 /* Compare A Output Value bit position. */ - - -/* TC0.CTRLD bit masks and bit positions */ -#define TC0_EVACT_gm 0xE0 /* Event Action group mask. */ -#define TC0_EVACT_gp 5 /* Event Action group position. */ -#define TC0_EVACT0_bm (1<<5) /* Event Action bit 0 mask. */ -#define TC0_EVACT0_bp 5 /* Event Action bit 0 position. */ -#define TC0_EVACT1_bm (1<<6) /* Event Action bit 1 mask. */ -#define TC0_EVACT1_bp 6 /* Event Action bit 1 position. */ -#define TC0_EVACT2_bm (1<<7) /* Event Action bit 2 mask. */ -#define TC0_EVACT2_bp 7 /* Event Action bit 2 position. */ - -#define TC0_EVDLY_bm 0x10 /* Event Delay bit mask. */ -#define TC0_EVDLY_bp 4 /* Event Delay bit position. */ - -#define TC0_EVSEL_gm 0x0F /* Event Source Select group mask. */ -#define TC0_EVSEL_gp 0 /* Event Source Select group position. */ -#define TC0_EVSEL0_bm (1<<0) /* Event Source Select bit 0 mask. */ -#define TC0_EVSEL0_bp 0 /* Event Source Select bit 0 position. */ -#define TC0_EVSEL1_bm (1<<1) /* Event Source Select bit 1 mask. */ -#define TC0_EVSEL1_bp 1 /* Event Source Select bit 1 position. */ -#define TC0_EVSEL2_bm (1<<2) /* Event Source Select bit 2 mask. */ -#define TC0_EVSEL2_bp 2 /* Event Source Select bit 2 position. */ -#define TC0_EVSEL3_bm (1<<3) /* Event Source Select bit 3 mask. */ -#define TC0_EVSEL3_bp 3 /* Event Source Select bit 3 position. */ - - -/* TC0.CTRLE bit masks and bit positions */ -#define TC0_DTHM_bm 0x02 /* Dead Time Hold Mode bit mask. */ -#define TC0_DTHM_bp 1 /* Dead Time Hold Mode bit position. */ - -#define TC0_BYTEM_bm 0x01 /* Byte Mode bit mask. */ -#define TC0_BYTEM_bp 0 /* Byte Mode bit position. */ - - -/* TC0.INTCTRLA bit masks and bit positions */ -#define TC0_ERRINTLVL_gm 0x0C /* Error Interrupt Level group mask. */ -#define TC0_ERRINTLVL_gp 2 /* Error Interrupt Level group position. */ -#define TC0_ERRINTLVL0_bm (1<<2) /* Error Interrupt Level bit 0 mask. */ -#define TC0_ERRINTLVL0_bp 2 /* Error Interrupt Level bit 0 position. */ -#define TC0_ERRINTLVL1_bm (1<<3) /* Error Interrupt Level bit 1 mask. */ -#define TC0_ERRINTLVL1_bp 3 /* Error Interrupt Level bit 1 position. */ - -#define TC0_OVFINTLVL_gm 0x03 /* Overflow interrupt level group mask. */ -#define TC0_OVFINTLVL_gp 0 /* Overflow interrupt level group position. */ -#define TC0_OVFINTLVL0_bm (1<<0) /* Overflow interrupt level bit 0 mask. */ -#define TC0_OVFINTLVL0_bp 0 /* Overflow interrupt level bit 0 position. */ -#define TC0_OVFINTLVL1_bm (1<<1) /* Overflow interrupt level bit 1 mask. */ -#define TC0_OVFINTLVL1_bp 1 /* Overflow interrupt level bit 1 position. */ - - -/* TC0.INTCTRLB bit masks and bit positions */ -#define TC0_CCDINTLVL_gm 0xC0 /* Compare or Capture D Interrupt Level group mask. */ -#define TC0_CCDINTLVL_gp 6 /* Compare or Capture D Interrupt Level group position. */ -#define TC0_CCDINTLVL0_bm (1<<6) /* Compare or Capture D Interrupt Level bit 0 mask. */ -#define TC0_CCDINTLVL0_bp 6 /* Compare or Capture D Interrupt Level bit 0 position. */ -#define TC0_CCDINTLVL1_bm (1<<7) /* Compare or Capture D Interrupt Level bit 1 mask. */ -#define TC0_CCDINTLVL1_bp 7 /* Compare or Capture D Interrupt Level bit 1 position. */ - -#define TC0_CCCINTLVL_gm 0x30 /* Compare or Capture C Interrupt Level group mask. */ -#define TC0_CCCINTLVL_gp 4 /* Compare or Capture C Interrupt Level group position. */ -#define TC0_CCCINTLVL0_bm (1<<4) /* Compare or Capture C Interrupt Level bit 0 mask. */ -#define TC0_CCCINTLVL0_bp 4 /* Compare or Capture C Interrupt Level bit 0 position. */ -#define TC0_CCCINTLVL1_bm (1<<5) /* Compare or Capture C Interrupt Level bit 1 mask. */ -#define TC0_CCCINTLVL1_bp 5 /* Compare or Capture C Interrupt Level bit 1 position. */ - -#define TC0_CCBINTLVL_gm 0x0C /* Compare or Capture B Interrupt Level group mask. */ -#define TC0_CCBINTLVL_gp 2 /* Compare or Capture B Interrupt Level group position. */ -#define TC0_CCBINTLVL0_bm (1<<2) /* Compare or Capture B Interrupt Level bit 0 mask. */ -#define TC0_CCBINTLVL0_bp 2 /* Compare or Capture B Interrupt Level bit 0 position. */ -#define TC0_CCBINTLVL1_bm (1<<3) /* Compare or Capture B Interrupt Level bit 1 mask. */ -#define TC0_CCBINTLVL1_bp 3 /* Compare or Capture B Interrupt Level bit 1 position. */ - -#define TC0_CCAINTLVL_gm 0x03 /* Compare or Capture A Interrupt Level group mask. */ -#define TC0_CCAINTLVL_gp 0 /* Compare or Capture A Interrupt Level group position. */ -#define TC0_CCAINTLVL0_bm (1<<0) /* Compare or Capture A Interrupt Level bit 0 mask. */ -#define TC0_CCAINTLVL0_bp 0 /* Compare or Capture A Interrupt Level bit 0 position. */ -#define TC0_CCAINTLVL1_bm (1<<1) /* Compare or Capture A Interrupt Level bit 1 mask. */ -#define TC0_CCAINTLVL1_bp 1 /* Compare or Capture A Interrupt Level bit 1 position. */ - - -/* TC0.CTRLFCLR bit masks and bit positions */ -#define TC0_CMD_gm 0x0C /* Command group mask. */ -#define TC0_CMD_gp 2 /* Command group position. */ -#define TC0_CMD0_bm (1<<2) /* Command bit 0 mask. */ -#define TC0_CMD0_bp 2 /* Command bit 0 position. */ -#define TC0_CMD1_bm (1<<3) /* Command bit 1 mask. */ -#define TC0_CMD1_bp 3 /* Command bit 1 position. */ - -#define TC0_LUPD_bm 0x02 /* Lock Update bit mask. */ -#define TC0_LUPD_bp 1 /* Lock Update bit position. */ - -#define TC0_DIR_bm 0x01 /* Direction bit mask. */ -#define TC0_DIR_bp 0 /* Direction bit position. */ - - -/* TC0.CTRLFSET bit masks and bit positions */ -/* TC0_CMD_gm Predefined. */ -/* TC0_CMD_gp Predefined. */ -/* TC0_CMD0_bm Predefined. */ -/* TC0_CMD0_bp Predefined. */ -/* TC0_CMD1_bm Predefined. */ -/* TC0_CMD1_bp Predefined. */ - -/* TC0_LUPD_bm Predefined. */ -/* TC0_LUPD_bp Predefined. */ - -/* TC0_DIR_bm Predefined. */ -/* TC0_DIR_bp Predefined. */ - - -/* TC0.CTRLGCLR bit masks and bit positions */ -#define TC0_CCDBV_bm 0x10 /* Compare or Capture D Buffer Valid bit mask. */ -#define TC0_CCDBV_bp 4 /* Compare or Capture D Buffer Valid bit position. */ - -#define TC0_CCCBV_bm 0x08 /* Compare or Capture C Buffer Valid bit mask. */ -#define TC0_CCCBV_bp 3 /* Compare or Capture C Buffer Valid bit position. */ - -#define TC0_CCBBV_bm 0x04 /* Compare or Capture B Buffer Valid bit mask. */ -#define TC0_CCBBV_bp 2 /* Compare or Capture B Buffer Valid bit position. */ - -#define TC0_CCABV_bm 0x02 /* Compare or Capture A Buffer Valid bit mask. */ -#define TC0_CCABV_bp 1 /* Compare or Capture A Buffer Valid bit position. */ - -#define TC0_PERBV_bm 0x01 /* Period Buffer Valid bit mask. */ -#define TC0_PERBV_bp 0 /* Period Buffer Valid bit position. */ - - -/* TC0.CTRLGSET bit masks and bit positions */ -/* TC0_CCDBV_bm Predefined. */ -/* TC0_CCDBV_bp Predefined. */ - -/* TC0_CCCBV_bm Predefined. */ -/* TC0_CCCBV_bp Predefined. */ - -/* TC0_CCBBV_bm Predefined. */ -/* TC0_CCBBV_bp Predefined. */ - -/* TC0_CCABV_bm Predefined. */ -/* TC0_CCABV_bp Predefined. */ - -/* TC0_PERBV_bm Predefined. */ -/* TC0_PERBV_bp Predefined. */ - - -/* TC0.INTFLAGS bit masks and bit positions */ -#define TC0_CCDIF_bm 0x80 /* Compare or Capture D Interrupt Flag bit mask. */ -#define TC0_CCDIF_bp 7 /* Compare or Capture D Interrupt Flag bit position. */ - -#define TC0_CCCIF_bm 0x40 /* Compare or Capture C Interrupt Flag bit mask. */ -#define TC0_CCCIF_bp 6 /* Compare or Capture C Interrupt Flag bit position. */ - -#define TC0_CCBIF_bm 0x20 /* Compare or Capture B Interrupt Flag bit mask. */ -#define TC0_CCBIF_bp 5 /* Compare or Capture B Interrupt Flag bit position. */ - -#define TC0_CCAIF_bm 0x10 /* Compare or Capture A Interrupt Flag bit mask. */ -#define TC0_CCAIF_bp 4 /* Compare or Capture A Interrupt Flag bit position. */ - -#define TC0_ERRIF_bm 0x02 /* Error Interrupt Flag bit mask. */ -#define TC0_ERRIF_bp 1 /* Error Interrupt Flag bit position. */ - -#define TC0_OVFIF_bm 0x01 /* Overflow Interrupt Flag bit mask. */ -#define TC0_OVFIF_bp 0 /* Overflow Interrupt Flag bit position. */ - - -/* TC1.CTRLA bit masks and bit positions */ -#define TC1_CLKSEL_gm 0x0F /* Clock Selection group mask. */ -#define TC1_CLKSEL_gp 0 /* Clock Selection group position. */ -#define TC1_CLKSEL0_bm (1<<0) /* Clock Selection bit 0 mask. */ -#define TC1_CLKSEL0_bp 0 /* Clock Selection bit 0 position. */ -#define TC1_CLKSEL1_bm (1<<1) /* Clock Selection bit 1 mask. */ -#define TC1_CLKSEL1_bp 1 /* Clock Selection bit 1 position. */ -#define TC1_CLKSEL2_bm (1<<2) /* Clock Selection bit 2 mask. */ -#define TC1_CLKSEL2_bp 2 /* Clock Selection bit 2 position. */ -#define TC1_CLKSEL3_bm (1<<3) /* Clock Selection bit 3 mask. */ -#define TC1_CLKSEL3_bp 3 /* Clock Selection bit 3 position. */ - - -/* TC1.CTRLB bit masks and bit positions */ -#define TC1_CCBEN_bm 0x20 /* Compare or Capture B Enable bit mask. */ -#define TC1_CCBEN_bp 5 /* Compare or Capture B Enable bit position. */ - -#define TC1_CCAEN_bm 0x10 /* Compare or Capture A Enable bit mask. */ -#define TC1_CCAEN_bp 4 /* Compare or Capture A Enable bit position. */ - -#define TC1_WGMODE_gm 0x07 /* Waveform generation mode group mask. */ -#define TC1_WGMODE_gp 0 /* Waveform generation mode group position. */ -#define TC1_WGMODE0_bm (1<<0) /* Waveform generation mode bit 0 mask. */ -#define TC1_WGMODE0_bp 0 /* Waveform generation mode bit 0 position. */ -#define TC1_WGMODE1_bm (1<<1) /* Waveform generation mode bit 1 mask. */ -#define TC1_WGMODE1_bp 1 /* Waveform generation mode bit 1 position. */ -#define TC1_WGMODE2_bm (1<<2) /* Waveform generation mode bit 2 mask. */ -#define TC1_WGMODE2_bp 2 /* Waveform generation mode bit 2 position. */ - - -/* TC1.CTRLC bit masks and bit positions */ -#define TC1_CMPB_bm 0x02 /* Compare B Output Value bit mask. */ -#define TC1_CMPB_bp 1 /* Compare B Output Value bit position. */ - -#define TC1_CMPA_bm 0x01 /* Compare A Output Value bit mask. */ -#define TC1_CMPA_bp 0 /* Compare A Output Value bit position. */ - - -/* TC1.CTRLD bit masks and bit positions */ -#define TC1_EVACT_gm 0xE0 /* Event Action group mask. */ -#define TC1_EVACT_gp 5 /* Event Action group position. */ -#define TC1_EVACT0_bm (1<<5) /* Event Action bit 0 mask. */ -#define TC1_EVACT0_bp 5 /* Event Action bit 0 position. */ -#define TC1_EVACT1_bm (1<<6) /* Event Action bit 1 mask. */ -#define TC1_EVACT1_bp 6 /* Event Action bit 1 position. */ -#define TC1_EVACT2_bm (1<<7) /* Event Action bit 2 mask. */ -#define TC1_EVACT2_bp 7 /* Event Action bit 2 position. */ - -#define TC1_EVDLY_bm 0x10 /* Event Delay bit mask. */ -#define TC1_EVDLY_bp 4 /* Event Delay bit position. */ - -#define TC1_EVSEL_gm 0x0F /* Event Source Select group mask. */ -#define TC1_EVSEL_gp 0 /* Event Source Select group position. */ -#define TC1_EVSEL0_bm (1<<0) /* Event Source Select bit 0 mask. */ -#define TC1_EVSEL0_bp 0 /* Event Source Select bit 0 position. */ -#define TC1_EVSEL1_bm (1<<1) /* Event Source Select bit 1 mask. */ -#define TC1_EVSEL1_bp 1 /* Event Source Select bit 1 position. */ -#define TC1_EVSEL2_bm (1<<2) /* Event Source Select bit 2 mask. */ -#define TC1_EVSEL2_bp 2 /* Event Source Select bit 2 position. */ -#define TC1_EVSEL3_bm (1<<3) /* Event Source Select bit 3 mask. */ -#define TC1_EVSEL3_bp 3 /* Event Source Select bit 3 position. */ - - -/* TC1.CTRLE bit masks and bit positions */ -#define TC1_DTHM_bm 0x02 /* Dead Time Hold Mode bit mask. */ -#define TC1_DTHM_bp 1 /* Dead Time Hold Mode bit position. */ - -#define TC1_BYTEM_bm 0x01 /* Byte Mode bit mask. */ -#define TC1_BYTEM_bp 0 /* Byte Mode bit position. */ - - -/* TC1.INTCTRLA bit masks and bit positions */ -#define TC1_ERRINTLVL_gm 0x0C /* Error Interrupt Level group mask. */ -#define TC1_ERRINTLVL_gp 2 /* Error Interrupt Level group position. */ -#define TC1_ERRINTLVL0_bm (1<<2) /* Error Interrupt Level bit 0 mask. */ -#define TC1_ERRINTLVL0_bp 2 /* Error Interrupt Level bit 0 position. */ -#define TC1_ERRINTLVL1_bm (1<<3) /* Error Interrupt Level bit 1 mask. */ -#define TC1_ERRINTLVL1_bp 3 /* Error Interrupt Level bit 1 position. */ - -#define TC1_OVFINTLVL_gm 0x03 /* Overflow interrupt level group mask. */ -#define TC1_OVFINTLVL_gp 0 /* Overflow interrupt level group position. */ -#define TC1_OVFINTLVL0_bm (1<<0) /* Overflow interrupt level bit 0 mask. */ -#define TC1_OVFINTLVL0_bp 0 /* Overflow interrupt level bit 0 position. */ -#define TC1_OVFINTLVL1_bm (1<<1) /* Overflow interrupt level bit 1 mask. */ -#define TC1_OVFINTLVL1_bp 1 /* Overflow interrupt level bit 1 position. */ - - -/* TC1.INTCTRLB bit masks and bit positions */ -#define TC1_CCBINTLVL_gm 0x0C /* Compare or Capture B Interrupt Level group mask. */ -#define TC1_CCBINTLVL_gp 2 /* Compare or Capture B Interrupt Level group position. */ -#define TC1_CCBINTLVL0_bm (1<<2) /* Compare or Capture B Interrupt Level bit 0 mask. */ -#define TC1_CCBINTLVL0_bp 2 /* Compare or Capture B Interrupt Level bit 0 position. */ -#define TC1_CCBINTLVL1_bm (1<<3) /* Compare or Capture B Interrupt Level bit 1 mask. */ -#define TC1_CCBINTLVL1_bp 3 /* Compare or Capture B Interrupt Level bit 1 position. */ - -#define TC1_CCAINTLVL_gm 0x03 /* Compare or Capture A Interrupt Level group mask. */ -#define TC1_CCAINTLVL_gp 0 /* Compare or Capture A Interrupt Level group position. */ -#define TC1_CCAINTLVL0_bm (1<<0) /* Compare or Capture A Interrupt Level bit 0 mask. */ -#define TC1_CCAINTLVL0_bp 0 /* Compare or Capture A Interrupt Level bit 0 position. */ -#define TC1_CCAINTLVL1_bm (1<<1) /* Compare or Capture A Interrupt Level bit 1 mask. */ -#define TC1_CCAINTLVL1_bp 1 /* Compare or Capture A Interrupt Level bit 1 position. */ - - -/* TC1.CTRLFCLR bit masks and bit positions */ -#define TC1_CMD_gm 0x0C /* Command group mask. */ -#define TC1_CMD_gp 2 /* Command group position. */ -#define TC1_CMD0_bm (1<<2) /* Command bit 0 mask. */ -#define TC1_CMD0_bp 2 /* Command bit 0 position. */ -#define TC1_CMD1_bm (1<<3) /* Command bit 1 mask. */ -#define TC1_CMD1_bp 3 /* Command bit 1 position. */ - -#define TC1_LUPD_bm 0x02 /* Lock Update bit mask. */ -#define TC1_LUPD_bp 1 /* Lock Update bit position. */ - -#define TC1_DIR_bm 0x01 /* Direction bit mask. */ -#define TC1_DIR_bp 0 /* Direction bit position. */ - - -/* TC1.CTRLFSET bit masks and bit positions */ -/* TC1_CMD_gm Predefined. */ -/* TC1_CMD_gp Predefined. */ -/* TC1_CMD0_bm Predefined. */ -/* TC1_CMD0_bp Predefined. */ -/* TC1_CMD1_bm Predefined. */ -/* TC1_CMD1_bp Predefined. */ - -/* TC1_LUPD_bm Predefined. */ -/* TC1_LUPD_bp Predefined. */ - -/* TC1_DIR_bm Predefined. */ -/* TC1_DIR_bp Predefined. */ - - -/* TC1.CTRLGCLR bit masks and bit positions */ -#define TC1_CCBBV_bm 0x04 /* Compare or Capture B Buffer Valid bit mask. */ -#define TC1_CCBBV_bp 2 /* Compare or Capture B Buffer Valid bit position. */ - -#define TC1_CCABV_bm 0x02 /* Compare or Capture A Buffer Valid bit mask. */ -#define TC1_CCABV_bp 1 /* Compare or Capture A Buffer Valid bit position. */ - -#define TC1_PERBV_bm 0x01 /* Period Buffer Valid bit mask. */ -#define TC1_PERBV_bp 0 /* Period Buffer Valid bit position. */ - - -/* TC1.CTRLGSET bit masks and bit positions */ -/* TC1_CCBBV_bm Predefined. */ -/* TC1_CCBBV_bp Predefined. */ - -/* TC1_CCABV_bm Predefined. */ -/* TC1_CCABV_bp Predefined. */ - -/* TC1_PERBV_bm Predefined. */ -/* TC1_PERBV_bp Predefined. */ - - -/* TC1.INTFLAGS bit masks and bit positions */ -#define TC1_CCBIF_bm 0x20 /* Compare or Capture B Interrupt Flag bit mask. */ -#define TC1_CCBIF_bp 5 /* Compare or Capture B Interrupt Flag bit position. */ - -#define TC1_CCAIF_bm 0x10 /* Compare or Capture A Interrupt Flag bit mask. */ -#define TC1_CCAIF_bp 4 /* Compare or Capture A Interrupt Flag bit position. */ - -#define TC1_ERRIF_bm 0x02 /* Error Interrupt Flag bit mask. */ -#define TC1_ERRIF_bp 1 /* Error Interrupt Flag bit position. */ - -#define TC1_OVFIF_bm 0x01 /* Overflow Interrupt Flag bit mask. */ -#define TC1_OVFIF_bp 0 /* Overflow Interrupt Flag bit position. */ - - -/* AWEX.CTRL bit masks and bit positions */ -#define AWEX_PGM_bm 0x20 /* Pattern Generation Mode bit mask. */ -#define AWEX_PGM_bp 5 /* Pattern Generation Mode bit position. */ - -#define AWEX_CWCM_bm 0x10 /* Common Waveform Channel Mode bit mask. */ -#define AWEX_CWCM_bp 4 /* Common Waveform Channel Mode bit position. */ - -#define AWEX_DTICCDEN_bm 0x08 /* Dead Time Insertion Compare Channel D Enable bit mask. */ -#define AWEX_DTICCDEN_bp 3 /* Dead Time Insertion Compare Channel D Enable bit position. */ - -#define AWEX_DTICCCEN_bm 0x04 /* Dead Time Insertion Compare Channel C Enable bit mask. */ -#define AWEX_DTICCCEN_bp 2 /* Dead Time Insertion Compare Channel C Enable bit position. */ - -#define AWEX_DTICCBEN_bm 0x02 /* Dead Time Insertion Compare Channel B Enable bit mask. */ -#define AWEX_DTICCBEN_bp 1 /* Dead Time Insertion Compare Channel B Enable bit position. */ - -#define AWEX_DTICCAEN_bm 0x01 /* Dead Time Insertion Compare Channel A Enable bit mask. */ -#define AWEX_DTICCAEN_bp 0 /* Dead Time Insertion Compare Channel A Enable bit position. */ - - -/* AWEX.FDCTRL bit masks and bit positions */ -#define AWEX_FDDBD_bm 0x10 /* Fault Detect on Disable Break Disable bit mask. */ -#define AWEX_FDDBD_bp 4 /* Fault Detect on Disable Break Disable bit position. */ - -#define AWEX_FDMODE_bm 0x04 /* Fault Detect Mode bit mask. */ -#define AWEX_FDMODE_bp 2 /* Fault Detect Mode bit position. */ - -#define AWEX_FDACT_gm 0x03 /* Fault Detect Action group mask. */ -#define AWEX_FDACT_gp 0 /* Fault Detect Action group position. */ -#define AWEX_FDACT0_bm (1<<0) /* Fault Detect Action bit 0 mask. */ -#define AWEX_FDACT0_bp 0 /* Fault Detect Action bit 0 position. */ -#define AWEX_FDACT1_bm (1<<1) /* Fault Detect Action bit 1 mask. */ -#define AWEX_FDACT1_bp 1 /* Fault Detect Action bit 1 position. */ - - -/* AWEX.STATUS bit masks and bit positions */ -#define AWEX_FDF_bm 0x04 /* Fault Detect Flag bit mask. */ -#define AWEX_FDF_bp 2 /* Fault Detect Flag bit position. */ - -#define AWEX_DTHSBUFV_bm 0x02 /* Dead Time High Side Buffer Valid bit mask. */ -#define AWEX_DTHSBUFV_bp 1 /* Dead Time High Side Buffer Valid bit position. */ - -#define AWEX_DTLSBUFV_bm 0x01 /* Dead Time Low Side Buffer Valid bit mask. */ -#define AWEX_DTLSBUFV_bp 0 /* Dead Time Low Side Buffer Valid bit position. */ - - -/* HIRES.CTRL bit masks and bit positions */ -#define HIRES_HREN_gm 0x03 /* High Resolution Enable group mask. */ -#define HIRES_HREN_gp 0 /* High Resolution Enable group position. */ -#define HIRES_HREN0_bm (1<<0) /* High Resolution Enable bit 0 mask. */ -#define HIRES_HREN0_bp 0 /* High Resolution Enable bit 0 position. */ -#define HIRES_HREN1_bm (1<<1) /* High Resolution Enable bit 1 mask. */ -#define HIRES_HREN1_bp 1 /* High Resolution Enable bit 1 position. */ - - -/* USART - Universal Asynchronous Receiver-Transmitter */ -/* USART.STATUS bit masks and bit positions */ -#define USART_RXCIF_bm 0x80 /* Receive Interrupt Flag bit mask. */ -#define USART_RXCIF_bp 7 /* Receive Interrupt Flag bit position. */ - -#define USART_TXCIF_bm 0x40 /* Transmit Interrupt Flag bit mask. */ -#define USART_TXCIF_bp 6 /* Transmit Interrupt Flag bit position. */ - -#define USART_DREIF_bm 0x20 /* Data Register Empty Flag bit mask. */ -#define USART_DREIF_bp 5 /* Data Register Empty Flag bit position. */ - -#define USART_FERR_bm 0x10 /* Frame Error bit mask. */ -#define USART_FERR_bp 4 /* Frame Error bit position. */ - -#define USART_BUFOVF_bm 0x08 /* Buffer Overflow bit mask. */ -#define USART_BUFOVF_bp 3 /* Buffer Overflow bit position. */ - -#define USART_PERR_bm 0x04 /* Parity Error bit mask. */ -#define USART_PERR_bp 2 /* Parity Error bit position. */ - -#define USART_RXB8_bm 0x01 /* Receive Bit 8 bit mask. */ -#define USART_RXB8_bp 0 /* Receive Bit 8 bit position. */ - - -/* USART.CTRLA bit masks and bit positions */ -#define USART_RXCINTLVL_gm 0x30 /* Receive Interrupt Level group mask. */ -#define USART_RXCINTLVL_gp 4 /* Receive Interrupt Level group position. */ -#define USART_RXCINTLVL0_bm (1<<4) /* Receive Interrupt Level bit 0 mask. */ -#define USART_RXCINTLVL0_bp 4 /* Receive Interrupt Level bit 0 position. */ -#define USART_RXCINTLVL1_bm (1<<5) /* Receive Interrupt Level bit 1 mask. */ -#define USART_RXCINTLVL1_bp 5 /* Receive Interrupt Level bit 1 position. */ - -#define USART_TXCINTLVL_gm 0x0C /* Transmit Interrupt Level group mask. */ -#define USART_TXCINTLVL_gp 2 /* Transmit Interrupt Level group position. */ -#define USART_TXCINTLVL0_bm (1<<2) /* Transmit Interrupt Level bit 0 mask. */ -#define USART_TXCINTLVL0_bp 2 /* Transmit Interrupt Level bit 0 position. */ -#define USART_TXCINTLVL1_bm (1<<3) /* Transmit Interrupt Level bit 1 mask. */ -#define USART_TXCINTLVL1_bp 3 /* Transmit Interrupt Level bit 1 position. */ - -#define USART_DREINTLVL_gm 0x03 /* Data Register Empty Interrupt Level group mask. */ -#define USART_DREINTLVL_gp 0 /* Data Register Empty Interrupt Level group position. */ -#define USART_DREINTLVL0_bm (1<<0) /* Data Register Empty Interrupt Level bit 0 mask. */ -#define USART_DREINTLVL0_bp 0 /* Data Register Empty Interrupt Level bit 0 position. */ -#define USART_DREINTLVL1_bm (1<<1) /* Data Register Empty Interrupt Level bit 1 mask. */ -#define USART_DREINTLVL1_bp 1 /* Data Register Empty Interrupt Level bit 1 position. */ - - -/* USART.CTRLB bit masks and bit positions */ -#define USART_RXEN_bm 0x10 /* Receiver Enable bit mask. */ -#define USART_RXEN_bp 4 /* Receiver Enable bit position. */ - -#define USART_TXEN_bm 0x08 /* Transmitter Enable bit mask. */ -#define USART_TXEN_bp 3 /* Transmitter Enable bit position. */ - -#define USART_CLK2X_bm 0x04 /* Double transmission speed bit mask. */ -#define USART_CLK2X_bp 2 /* Double transmission speed bit position. */ - -#define USART_MPCM_bm 0x02 /* Multi-processor Communication Mode bit mask. */ -#define USART_MPCM_bp 1 /* Multi-processor Communication Mode bit position. */ - -#define USART_TXB8_bm 0x01 /* Transmit bit 8 bit mask. */ -#define USART_TXB8_bp 0 /* Transmit bit 8 bit position. */ - - -/* USART.CTRLC bit masks and bit positions */ -#define USART_CMODE_gm 0xC0 /* Communication Mode group mask. */ -#define USART_CMODE_gp 6 /* Communication Mode group position. */ -#define USART_CMODE0_bm (1<<6) /* Communication Mode bit 0 mask. */ -#define USART_CMODE0_bp 6 /* Communication Mode bit 0 position. */ -#define USART_CMODE1_bm (1<<7) /* Communication Mode bit 1 mask. */ -#define USART_CMODE1_bp 7 /* Communication Mode bit 1 position. */ - -#define USART_PMODE_gm 0x30 /* Parity Mode group mask. */ -#define USART_PMODE_gp 4 /* Parity Mode group position. */ -#define USART_PMODE0_bm (1<<4) /* Parity Mode bit 0 mask. */ -#define USART_PMODE0_bp 4 /* Parity Mode bit 0 position. */ -#define USART_PMODE1_bm (1<<5) /* Parity Mode bit 1 mask. */ -#define USART_PMODE1_bp 5 /* Parity Mode bit 1 position. */ - -#define USART_SBMODE_bm 0x08 /* Stop Bit Mode bit mask. */ -#define USART_SBMODE_bp 3 /* Stop Bit Mode bit position. */ - -#define USART_CHSIZE_gm 0x07 /* Character Size group mask. */ -#define USART_CHSIZE_gp 0 /* Character Size group position. */ -#define USART_CHSIZE0_bm (1<<0) /* Character Size bit 0 mask. */ -#define USART_CHSIZE0_bp 0 /* Character Size bit 0 position. */ -#define USART_CHSIZE1_bm (1<<1) /* Character Size bit 1 mask. */ -#define USART_CHSIZE1_bp 1 /* Character Size bit 1 position. */ -#define USART_CHSIZE2_bm (1<<2) /* Character Size bit 2 mask. */ -#define USART_CHSIZE2_bp 2 /* Character Size bit 2 position. */ - - -/* USART.BAUDCTRLA bit masks and bit positions */ -#define USART_BSEL_gm 0xFF /* Baud Rate Selection Bits [7:0] group mask. */ -#define USART_BSEL_gp 0 /* Baud Rate Selection Bits [7:0] group position. */ -#define USART_BSEL0_bm (1<<0) /* Baud Rate Selection Bits [7:0] bit 0 mask. */ -#define USART_BSEL0_bp 0 /* Baud Rate Selection Bits [7:0] bit 0 position. */ -#define USART_BSEL1_bm (1<<1) /* Baud Rate Selection Bits [7:0] bit 1 mask. */ -#define USART_BSEL1_bp 1 /* Baud Rate Selection Bits [7:0] bit 1 position. */ -#define USART_BSEL2_bm (1<<2) /* Baud Rate Selection Bits [7:0] bit 2 mask. */ -#define USART_BSEL2_bp 2 /* Baud Rate Selection Bits [7:0] bit 2 position. */ -#define USART_BSEL3_bm (1<<3) /* Baud Rate Selection Bits [7:0] bit 3 mask. */ -#define USART_BSEL3_bp 3 /* Baud Rate Selection Bits [7:0] bit 3 position. */ -#define USART_BSEL4_bm (1<<4) /* Baud Rate Selection Bits [7:0] bit 4 mask. */ -#define USART_BSEL4_bp 4 /* Baud Rate Selection Bits [7:0] bit 4 position. */ -#define USART_BSEL5_bm (1<<5) /* Baud Rate Selection Bits [7:0] bit 5 mask. */ -#define USART_BSEL5_bp 5 /* Baud Rate Selection Bits [7:0] bit 5 position. */ -#define USART_BSEL6_bm (1<<6) /* Baud Rate Selection Bits [7:0] bit 6 mask. */ -#define USART_BSEL6_bp 6 /* Baud Rate Selection Bits [7:0] bit 6 position. */ -#define USART_BSEL7_bm (1<<7) /* Baud Rate Selection Bits [7:0] bit 7 mask. */ -#define USART_BSEL7_bp 7 /* Baud Rate Selection Bits [7:0] bit 7 position. */ - - -/* USART.BAUDCTRLB bit masks and bit positions */ -#define USART_BSCALE_gm 0xF0 /* Baud Rate Scale group mask. */ -#define USART_BSCALE_gp 4 /* Baud Rate Scale group position. */ -#define USART_BSCALE0_bm (1<<4) /* Baud Rate Scale bit 0 mask. */ -#define USART_BSCALE0_bp 4 /* Baud Rate Scale bit 0 position. */ -#define USART_BSCALE1_bm (1<<5) /* Baud Rate Scale bit 1 mask. */ -#define USART_BSCALE1_bp 5 /* Baud Rate Scale bit 1 position. */ -#define USART_BSCALE2_bm (1<<6) /* Baud Rate Scale bit 2 mask. */ -#define USART_BSCALE2_bp 6 /* Baud Rate Scale bit 2 position. */ -#define USART_BSCALE3_bm (1<<7) /* Baud Rate Scale bit 3 mask. */ -#define USART_BSCALE3_bp 7 /* Baud Rate Scale bit 3 position. */ - -/* USART_BSEL_gm Predefined. */ -/* USART_BSEL_gp Predefined. */ -/* USART_BSEL0_bm Predefined. */ -/* USART_BSEL0_bp Predefined. */ -/* USART_BSEL1_bm Predefined. */ -/* USART_BSEL1_bp Predefined. */ -/* USART_BSEL2_bm Predefined. */ -/* USART_BSEL2_bp Predefined. */ -/* USART_BSEL3_bm Predefined. */ -/* USART_BSEL3_bp Predefined. */ - - -/* SPI - Serial Peripheral Interface */ -/* SPI.CTRL bit masks and bit positions */ -#define SPI_CLK2X_bm 0x80 /* Enable Double Speed bit mask. */ -#define SPI_CLK2X_bp 7 /* Enable Double Speed bit position. */ - -#define SPI_ENABLE_bm 0x40 /* Enable Module bit mask. */ -#define SPI_ENABLE_bp 6 /* Enable Module bit position. */ - -#define SPI_DORD_bm 0x20 /* Data Order Setting bit mask. */ -#define SPI_DORD_bp 5 /* Data Order Setting bit position. */ - -#define SPI_MASTER_bm 0x10 /* Master Operation Enable bit mask. */ -#define SPI_MASTER_bp 4 /* Master Operation Enable bit position. */ - -#define SPI_MODE_gm 0x0C /* SPI Mode group mask. */ -#define SPI_MODE_gp 2 /* SPI Mode group position. */ -#define SPI_MODE0_bm (1<<2) /* SPI Mode bit 0 mask. */ -#define SPI_MODE0_bp 2 /* SPI Mode bit 0 position. */ -#define SPI_MODE1_bm (1<<3) /* SPI Mode bit 1 mask. */ -#define SPI_MODE1_bp 3 /* SPI Mode bit 1 position. */ - -#define SPI_PRESCALER_gm 0x03 /* Prescaler group mask. */ -#define SPI_PRESCALER_gp 0 /* Prescaler group position. */ -#define SPI_PRESCALER0_bm (1<<0) /* Prescaler bit 0 mask. */ -#define SPI_PRESCALER0_bp 0 /* Prescaler bit 0 position. */ -#define SPI_PRESCALER1_bm (1<<1) /* Prescaler bit 1 mask. */ -#define SPI_PRESCALER1_bp 1 /* Prescaler bit 1 position. */ - - -/* SPI.INTCTRL bit masks and bit positions */ -#define SPI_INTLVL_gm 0x03 /* Interrupt level group mask. */ -#define SPI_INTLVL_gp 0 /* Interrupt level group position. */ -#define SPI_INTLVL0_bm (1<<0) /* Interrupt level bit 0 mask. */ -#define SPI_INTLVL0_bp 0 /* Interrupt level bit 0 position. */ -#define SPI_INTLVL1_bm (1<<1) /* Interrupt level bit 1 mask. */ -#define SPI_INTLVL1_bp 1 /* Interrupt level bit 1 position. */ - - -/* SPI.STATUS bit masks and bit positions */ -#define SPI_IF_bm 0x80 /* Interrupt Flag bit mask. */ -#define SPI_IF_bp 7 /* Interrupt Flag bit position. */ - -#define SPI_WRCOL_bm 0x40 /* Write Collision bit mask. */ -#define SPI_WRCOL_bp 6 /* Write Collision bit position. */ - - -/* IRCOM - IR Communication Module */ -/* IRCOM.CTRL bit masks and bit positions */ -#define IRCOM_EVSEL_gm 0x0F /* Event Channel Select group mask. */ -#define IRCOM_EVSEL_gp 0 /* Event Channel Select group position. */ -#define IRCOM_EVSEL0_bm (1<<0) /* Event Channel Select bit 0 mask. */ -#define IRCOM_EVSEL0_bp 0 /* Event Channel Select bit 0 position. */ -#define IRCOM_EVSEL1_bm (1<<1) /* Event Channel Select bit 1 mask. */ -#define IRCOM_EVSEL1_bp 1 /* Event Channel Select bit 1 position. */ -#define IRCOM_EVSEL2_bm (1<<2) /* Event Channel Select bit 2 mask. */ -#define IRCOM_EVSEL2_bp 2 /* Event Channel Select bit 2 position. */ -#define IRCOM_EVSEL3_bm (1<<3) /* Event Channel Select bit 3 mask. */ -#define IRCOM_EVSEL3_bp 3 /* Event Channel Select bit 3 position. */ - - -/* AES - AES Module */ -/* AES.CTRL bit masks and bit positions */ -#define AES_START_bm 0x80 /* Start/Run bit mask. */ -#define AES_START_bp 7 /* Start/Run bit position. */ - -#define AES_AUTO_bm 0x40 /* Auto Start Trigger bit mask. */ -#define AES_AUTO_bp 6 /* Auto Start Trigger bit position. */ - -#define AES_RESET_bm 0x20 /* AES Software Reset bit mask. */ -#define AES_RESET_bp 5 /* AES Software Reset bit position. */ - -#define AES_DECRYPT_bm 0x10 /* Decryption / Direction bit mask. */ -#define AES_DECRYPT_bp 4 /* Decryption / Direction bit position. */ - -#define AES_XOR_bm 0x04 /* State XOR Load Enable bit mask. */ -#define AES_XOR_bp 2 /* State XOR Load Enable bit position. */ - - -/* AES.STATUS bit masks and bit positions */ -#define AES_ERROR_bm 0x80 /* AES Error bit mask. */ -#define AES_ERROR_bp 7 /* AES Error bit position. */ - -#define AES_SRIF_bm 0x01 /* State Ready Interrupt Flag bit mask. */ -#define AES_SRIF_bp 0 /* State Ready Interrupt Flag bit position. */ - - -/* AES.INTCTRL bit masks and bit positions */ -#define AES_INTLVL_gm 0x03 /* Interrupt level group mask. */ -#define AES_INTLVL_gp 0 /* Interrupt level group position. */ -#define AES_INTLVL0_bm (1<<0) /* Interrupt level bit 0 mask. */ -#define AES_INTLVL0_bp 0 /* Interrupt level bit 0 position. */ -#define AES_INTLVL1_bm (1<<1) /* Interrupt level bit 1 mask. */ -#define AES_INTLVL1_bp 1 /* Interrupt level bit 1 position. */ - - - -// Generic Port Pins - -#define PIN0_bm 0x01 -#define PIN0_bp 0 -#define PIN1_bm 0x02 -#define PIN1_bp 1 -#define PIN2_bm 0x04 -#define PIN2_bp 2 -#define PIN3_bm 0x08 -#define PIN3_bp 3 -#define PIN4_bm 0x10 -#define PIN4_bp 4 -#define PIN5_bm 0x20 -#define PIN5_bp 5 -#define PIN6_bm 0x40 -#define PIN6_bp 6 -#define PIN7_bm 0x80 -#define PIN7_bp 7 - - -/* ========== Interrupt Vector Definitions ========== */ -/* Vector 0 is the reset vector */ - -/* OSC interrupt vectors */ -#define OSC_XOSCF_vect_num 1 -#define OSC_XOSCF_vect _VECTOR(1) /* External Oscillator Failure Interrupt (NMI) */ - -/* PORTC interrupt vectors */ -#define PORTC_INT0_vect_num 2 -#define PORTC_INT0_vect _VECTOR(2) /* External Interrupt 0 */ -#define PORTC_INT1_vect_num 3 -#define PORTC_INT1_vect _VECTOR(3) /* External Interrupt 1 */ - -/* PORTR interrupt vectors */ -#define PORTR_INT0_vect_num 4 -#define PORTR_INT0_vect _VECTOR(4) /* External Interrupt 0 */ -#define PORTR_INT1_vect_num 5 -#define PORTR_INT1_vect _VECTOR(5) /* External Interrupt 1 */ - -/* DMA interrupt vectors */ -#define DMA_CH0_vect_num 6 -#define DMA_CH0_vect _VECTOR(6) /* Channel 0 Interrupt */ -#define DMA_CH1_vect_num 7 -#define DMA_CH1_vect _VECTOR(7) /* Channel 1 Interrupt */ -#define DMA_CH2_vect_num 8 -#define DMA_CH2_vect _VECTOR(8) /* Channel 2 Interrupt */ -#define DMA_CH3_vect_num 9 -#define DMA_CH3_vect _VECTOR(9) /* Channel 3 Interrupt */ - -/* RTC interrupt vectors */ -#define RTC_OVF_vect_num 10 -#define RTC_OVF_vect _VECTOR(10) /* Overflow Interrupt */ -#define RTC_COMP_vect_num 11 -#define RTC_COMP_vect _VECTOR(11) /* Compare Interrupt */ - -/* TWIC interrupt vectors */ -#define TWIC_TWIS_vect_num 12 -#define TWIC_TWIS_vect _VECTOR(12) /* TWI Slave Interrupt */ -#define TWIC_TWIM_vect_num 13 -#define TWIC_TWIM_vect _VECTOR(13) /* TWI Master Interrupt */ - -/* TCC0 interrupt vectors */ -#define TCC0_OVF_vect_num 14 -#define TCC0_OVF_vect _VECTOR(14) /* Overflow Interrupt */ -#define TCC0_ERR_vect_num 15 -#define TCC0_ERR_vect _VECTOR(15) /* Error Interrupt */ -#define TCC0_CCA_vect_num 16 -#define TCC0_CCA_vect _VECTOR(16) /* Compare or Capture A Interrupt */ -#define TCC0_CCB_vect_num 17 -#define TCC0_CCB_vect _VECTOR(17) /* Compare or Capture B Interrupt */ -#define TCC0_CCC_vect_num 18 -#define TCC0_CCC_vect _VECTOR(18) /* Compare or Capture C Interrupt */ -#define TCC0_CCD_vect_num 19 -#define TCC0_CCD_vect _VECTOR(19) /* Compare or Capture D Interrupt */ - -/* TCC1 interrupt vectors */ -#define TCC1_OVF_vect_num 20 -#define TCC1_OVF_vect _VECTOR(20) /* Overflow Interrupt */ -#define TCC1_ERR_vect_num 21 -#define TCC1_ERR_vect _VECTOR(21) /* Error Interrupt */ -#define TCC1_CCA_vect_num 22 -#define TCC1_CCA_vect _VECTOR(22) /* Compare or Capture A Interrupt */ -#define TCC1_CCB_vect_num 23 -#define TCC1_CCB_vect _VECTOR(23) /* Compare or Capture B Interrupt */ - -/* SPIC interrupt vectors */ -#define SPIC_INT_vect_num 24 -#define SPIC_INT_vect _VECTOR(24) /* SPI Interrupt */ - -/* USARTC0 interrupt vectors */ -#define USARTC0_RXC_vect_num 25 -#define USARTC0_RXC_vect _VECTOR(25) /* Reception Complete Interrupt */ -#define USARTC0_DRE_vect_num 26 -#define USARTC0_DRE_vect _VECTOR(26) /* Data Register Empty Interrupt */ -#define USARTC0_TXC_vect_num 27 -#define USARTC0_TXC_vect _VECTOR(27) /* Transmission Complete Interrupt */ - -/* USARTC1 interrupt vectors */ -#define USARTC1_RXC_vect_num 28 -#define USARTC1_RXC_vect _VECTOR(28) /* Reception Complete Interrupt */ -#define USARTC1_DRE_vect_num 29 -#define USARTC1_DRE_vect _VECTOR(29) /* Data Register Empty Interrupt */ -#define USARTC1_TXC_vect_num 30 -#define USARTC1_TXC_vect _VECTOR(30) /* Transmission Complete Interrupt */ - -/* AES interrupt vectors */ -#define AES_INT_vect_num 31 -#define AES_INT_vect _VECTOR(31) /* AES Interrupt */ - -/* NVM interrupt vectors */ -#define NVM_EE_vect_num 32 -#define NVM_EE_vect _VECTOR(32) /* EE Interrupt */ -#define NVM_SPM_vect_num 33 -#define NVM_SPM_vect _VECTOR(33) /* SPM Interrupt */ - -/* PORTB interrupt vectors */ -#define PORTB_INT0_vect_num 34 -#define PORTB_INT0_vect _VECTOR(34) /* External Interrupt 0 */ -#define PORTB_INT1_vect_num 35 -#define PORTB_INT1_vect _VECTOR(35) /* External Interrupt 1 */ - -/* ACB interrupt vectors */ -#define ACB_AC0_vect_num 36 -#define ACB_AC0_vect _VECTOR(36) /* AC0 Interrupt */ -#define ACB_AC1_vect_num 37 -#define ACB_AC1_vect _VECTOR(37) /* AC1 Interrupt */ -#define ACB_ACW_vect_num 38 -#define ACB_ACW_vect _VECTOR(38) /* ACW Window Mode Interrupt */ - -/* ADCB interrupt vectors */ -#define ADCB_CH0_vect_num 39 -#define ADCB_CH0_vect _VECTOR(39) /* Interrupt 0 */ -#define ADCB_CH1_vect_num 40 -#define ADCB_CH1_vect _VECTOR(40) /* Interrupt 1 */ -#define ADCB_CH2_vect_num 41 -#define ADCB_CH2_vect _VECTOR(41) /* Interrupt 2 */ -#define ADCB_CH3_vect_num 42 -#define ADCB_CH3_vect _VECTOR(42) /* Interrupt 3 */ - -/* PORTE interrupt vectors */ -#define PORTE_INT0_vect_num 43 -#define PORTE_INT0_vect _VECTOR(43) /* External Interrupt 0 */ -#define PORTE_INT1_vect_num 44 -#define PORTE_INT1_vect _VECTOR(44) /* External Interrupt 1 */ - -/* TWIE interrupt vectors */ -#define TWIE_TWIS_vect_num 45 -#define TWIE_TWIS_vect _VECTOR(45) /* TWI Slave Interrupt */ -#define TWIE_TWIM_vect_num 46 -#define TWIE_TWIM_vect _VECTOR(46) /* TWI Master Interrupt */ - -/* TCE0 interrupt vectors */ -#define TCE0_OVF_vect_num 47 -#define TCE0_OVF_vect _VECTOR(47) /* Overflow Interrupt */ -#define TCE0_ERR_vect_num 48 -#define TCE0_ERR_vect _VECTOR(48) /* Error Interrupt */ -#define TCE0_CCA_vect_num 49 -#define TCE0_CCA_vect _VECTOR(49) /* Compare or Capture A Interrupt */ -#define TCE0_CCB_vect_num 50 -#define TCE0_CCB_vect _VECTOR(50) /* Compare or Capture B Interrupt */ -#define TCE0_CCC_vect_num 51 -#define TCE0_CCC_vect _VECTOR(51) /* Compare or Capture C Interrupt */ -#define TCE0_CCD_vect_num 52 -#define TCE0_CCD_vect _VECTOR(52) /* Compare or Capture D Interrupt */ - -/* TCE1 interrupt vectors */ -#define TCE1_OVF_vect_num 53 -#define TCE1_OVF_vect _VECTOR(53) /* Overflow Interrupt */ -#define TCE1_ERR_vect_num 54 -#define TCE1_ERR_vect _VECTOR(54) /* Error Interrupt */ -#define TCE1_CCA_vect_num 55 -#define TCE1_CCA_vect _VECTOR(55) /* Compare or Capture A Interrupt */ -#define TCE1_CCB_vect_num 56 -#define TCE1_CCB_vect _VECTOR(56) /* Compare or Capture B Interrupt */ - -/* SPIE interrupt vectors */ -#define SPIE_INT_vect_num 57 -#define SPIE_INT_vect _VECTOR(57) /* SPI Interrupt */ - -/* USARTE0 interrupt vectors */ -#define USARTE0_RXC_vect_num 58 -#define USARTE0_RXC_vect _VECTOR(58) /* Reception Complete Interrupt */ -#define USARTE0_DRE_vect_num 59 -#define USARTE0_DRE_vect _VECTOR(59) /* Data Register Empty Interrupt */ -#define USARTE0_TXC_vect_num 60 -#define USARTE0_TXC_vect _VECTOR(60) /* Transmission Complete Interrupt */ - -/* USARTE1 interrupt vectors */ -#define USARTE1_RXC_vect_num 61 -#define USARTE1_RXC_vect _VECTOR(61) /* Reception Complete Interrupt */ -#define USARTE1_DRE_vect_num 62 -#define USARTE1_DRE_vect _VECTOR(62) /* Data Register Empty Interrupt */ -#define USARTE1_TXC_vect_num 63 -#define USARTE1_TXC_vect _VECTOR(63) /* Transmission Complete Interrupt */ - -/* PORTD interrupt vectors */ -#define PORTD_INT0_vect_num 64 -#define PORTD_INT0_vect _VECTOR(64) /* External Interrupt 0 */ -#define PORTD_INT1_vect_num 65 -#define PORTD_INT1_vect _VECTOR(65) /* External Interrupt 1 */ - -/* PORTA interrupt vectors */ -#define PORTA_INT0_vect_num 66 -#define PORTA_INT0_vect _VECTOR(66) /* External Interrupt 0 */ -#define PORTA_INT1_vect_num 67 -#define PORTA_INT1_vect _VECTOR(67) /* External Interrupt 1 */ - -/* ACA interrupt vectors */ -#define ACA_AC0_vect_num 68 -#define ACA_AC0_vect _VECTOR(68) /* AC0 Interrupt */ -#define ACA_AC1_vect_num 69 -#define ACA_AC1_vect _VECTOR(69) /* AC1 Interrupt */ -#define ACA_ACW_vect_num 70 -#define ACA_ACW_vect _VECTOR(70) /* ACW Window Mode Interrupt */ - -/* ADCA interrupt vectors */ -#define ADCA_CH0_vect_num 71 -#define ADCA_CH0_vect _VECTOR(71) /* Interrupt 0 */ -#define ADCA_CH1_vect_num 72 -#define ADCA_CH1_vect _VECTOR(72) /* Interrupt 1 */ -#define ADCA_CH2_vect_num 73 -#define ADCA_CH2_vect _VECTOR(73) /* Interrupt 2 */ -#define ADCA_CH3_vect_num 74 -#define ADCA_CH3_vect _VECTOR(74) /* Interrupt 3 */ - -/* TCD0 interrupt vectors */ -#define TCD0_OVF_vect_num 77 -#define TCD0_OVF_vect _VECTOR(77) /* Overflow Interrupt */ -#define TCD0_ERR_vect_num 78 -#define TCD0_ERR_vect _VECTOR(78) /* Error Interrupt */ -#define TCD0_CCA_vect_num 79 -#define TCD0_CCA_vect _VECTOR(79) /* Compare or Capture A Interrupt */ -#define TCD0_CCB_vect_num 80 -#define TCD0_CCB_vect _VECTOR(80) /* Compare or Capture B Interrupt */ -#define TCD0_CCC_vect_num 81 -#define TCD0_CCC_vect _VECTOR(81) /* Compare or Capture C Interrupt */ -#define TCD0_CCD_vect_num 82 -#define TCD0_CCD_vect _VECTOR(82) /* Compare or Capture D Interrupt */ - -/* TCD1 interrupt vectors */ -#define TCD1_OVF_vect_num 83 -#define TCD1_OVF_vect _VECTOR(83) /* Overflow Interrupt */ -#define TCD1_ERR_vect_num 84 -#define TCD1_ERR_vect _VECTOR(84) /* Error Interrupt */ -#define TCD1_CCA_vect_num 85 -#define TCD1_CCA_vect _VECTOR(85) /* Compare or Capture A Interrupt */ -#define TCD1_CCB_vect_num 86 -#define TCD1_CCB_vect _VECTOR(86) /* Compare or Capture B Interrupt */ - -/* SPID interrupt vectors */ -#define SPID_INT_vect_num 87 -#define SPID_INT_vect _VECTOR(87) /* SPI Interrupt */ - -/* USARTD0 interrupt vectors */ -#define USARTD0_RXC_vect_num 88 -#define USARTD0_RXC_vect _VECTOR(88) /* Reception Complete Interrupt */ -#define USARTD0_DRE_vect_num 89 -#define USARTD0_DRE_vect _VECTOR(89) /* Data Register Empty Interrupt */ -#define USARTD0_TXC_vect_num 90 -#define USARTD0_TXC_vect _VECTOR(90) /* Transmission Complete Interrupt */ - -/* USARTD1 interrupt vectors */ -#define USARTD1_RXC_vect_num 91 -#define USARTD1_RXC_vect _VECTOR(91) /* Reception Complete Interrupt */ -#define USARTD1_DRE_vect_num 92 -#define USARTD1_DRE_vect _VECTOR(92) /* Data Register Empty Interrupt */ -#define USARTD1_TXC_vect_num 93 -#define USARTD1_TXC_vect _VECTOR(93) /* Transmission Complete Interrupt */ - -/* PORTF interrupt vectors */ -#define PORTF_INT0_vect_num 104 -#define PORTF_INT0_vect _VECTOR(104) /* External Interrupt 0 */ -#define PORTF_INT1_vect_num 105 -#define PORTF_INT1_vect _VECTOR(105) /* External Interrupt 1 */ - -/* TCF0 interrupt vectors */ -#define TCF0_OVF_vect_num 108 -#define TCF0_OVF_vect _VECTOR(108) /* Overflow Interrupt */ -#define TCF0_ERR_vect_num 109 -#define TCF0_ERR_vect _VECTOR(109) /* Error Interrupt */ -#define TCF0_CCA_vect_num 110 -#define TCF0_CCA_vect _VECTOR(110) /* Compare or Capture A Interrupt */ -#define TCF0_CCB_vect_num 111 -#define TCF0_CCB_vect _VECTOR(111) /* Compare or Capture B Interrupt */ -#define TCF0_CCC_vect_num 112 -#define TCF0_CCC_vect _VECTOR(112) /* Compare or Capture C Interrupt */ -#define TCF0_CCD_vect_num 113 -#define TCF0_CCD_vect _VECTOR(113) /* Compare or Capture D Interrupt */ - -/* USARTF0 interrupt vectors */ -#define USARTF0_RXC_vect_num 119 -#define USARTF0_RXC_vect _VECTOR(119) /* Reception Complete Interrupt */ -#define USARTF0_DRE_vect_num 120 -#define USARTF0_DRE_vect _VECTOR(120) /* Data Register Empty Interrupt */ -#define USARTF0_TXC_vect_num 121 -#define USARTF0_TXC_vect _VECTOR(121) /* Transmission Complete Interrupt */ - - -#define _VECTOR_SIZE 4 /* Size of individual vector. */ -#define _VECTORS_SIZE (122 * _VECTOR_SIZE) - - -/* ========== Constants ========== */ - -#define PROGMEM_START (0x0000) -#define PROGMEM_SIZE (69632) -#define PROGMEM_END (PROGMEM_START + PROGMEM_SIZE - 1) - -#define APP_SECTION_START (0x0000) -#define APP_SECTION_SIZE (65536) -#define APP_SECTION_END (APP_SECTION_START + APP_SECTION_SIZE - 1) - -#define APPTABLE_SECTION_START (0x0F000) -#define APPTABLE_SECTION_SIZE (4096) -#define APPTABLE_SECTION_END (APPTABLE_SECTION_START + APPTABLE_SECTION_SIZE - 1) - -#define BOOT_SECTION_START (0x10000) -#define BOOT_SECTION_SIZE (4096) -#define BOOT_SECTION_END (BOOT_SECTION_START + BOOT_SECTION_SIZE - 1) - -#define DATAMEM_START (0x0000) -#define DATAMEM_SIZE (12288) -#define DATAMEM_END (DATAMEM_START + DATAMEM_SIZE - 1) - -#define IO_START (0x0000) -#define IO_SIZE (4096) -#define IO_END (IO_START + IO_SIZE - 1) - -#define MAPPED_EEPROM_START (0x1000) -#define MAPPED_EEPROM_SIZE (2048) -#define MAPPED_EEPROM_END (MAPPED_EEPROM_START + MAPPED_EEPROM_SIZE - 1) - -#define INTERNAL_SRAM_START (0x2000) -#define INTERNAL_SRAM_SIZE (4096) -#define INTERNAL_SRAM_END (INTERNAL_SRAM_START + INTERNAL_SRAM_SIZE - 1) - -#define EEPROM_START (0x0000) -#define EEPROM_SIZE (2048) -#define EEPROM_END (EEPROM_START + EEPROM_SIZE - 1) - -#define FUSE_START (0x0000) -#define FUSE_SIZE (6) -#define FUSE_END (FUSE_START + FUSE_SIZE - 1) - -#define LOCKBIT_START (0x0000) -#define LOCKBIT_SIZE (1) -#define LOCKBIT_END (LOCKBIT_START + LOCKBIT_SIZE - 1) - -#define SIGNATURES_START (0x0000) -#define SIGNATURES_SIZE (3) -#define SIGNATURES_END (SIGNATURES_START + SIGNATURES_SIZE - 1) - -#define USER_SIGNATURES_START (0x0000) -#define USER_SIGNATURES_SIZE (256) -#define USER_SIGNATURES_END (USER_SIGNATURES_START + USER_SIGNATURES_SIZE - 1) - -#define PROD_SIGNATURES_START (0x0000) -#define PROD_SIGNATURES_SIZE (52) -#define PROD_SIGNATURES_END (PROD_SIGNATURES_START + PROD_SIGNATURES_SIZE - 1) - -#define FLASHEND PROGMEM_END -#define SPM_PAGESIZE PROGMEM_PAGE_SIZE -#define RAMSTART INTERNAL_SRAM_START -#define RAMSIZE INTERNAL_SRAM_SIZE -#define RAMEND INTERNAL_SRAM_END -#define XRAMSTART EXTERNAL_SRAM_START -#define XRAMSIZE EXTERNAL_SRAM_SIZE -#define XRAMEND INTERNAL_SRAM_END -#define E2END EEPROM_END -#define E2PAGESIZE EEPROM_PAGE_SIZE - - -/* ========== Fuses ========== */ -#define FUSE_MEMORY_SIZE 6 - -/* Fuse Byte 0 */ -#define FUSE_JTAGUSERID0 ~_BV(0) /* JTAG User ID Bit 0 */ -#define FUSE_JTAGUSERID1 ~_BV(1) /* JTAG User ID Bit 1 */ -#define FUSE_JTAGUSERID2 ~_BV(2) /* JTAG User ID Bit 2 */ -#define FUSE_JTAGUSERID3 ~_BV(3) /* JTAG User ID Bit 3 */ -#define FUSE_JTAGUSERID4 ~_BV(4) /* JTAG User ID Bit 4 */ -#define FUSE_JTAGUSERID5 ~_BV(5) /* JTAG User ID Bit 5 */ -#define FUSE_JTAGUSERID6 ~_BV(6) /* JTAG User ID Bit 6 */ -#define FUSE_JTAGUSERID7 ~_BV(7) /* JTAG User ID Bit 7 */ -#define FUSE0_DEFAULT (0xFF) - -/* Fuse Byte 1 */ -#define FUSE_WDP0 ~_BV(0) /* Watchdog Timeout Period Bit 0 */ -#define FUSE_WDP1 ~_BV(1) /* Watchdog Timeout Period Bit 1 */ -#define FUSE_WDP2 ~_BV(2) /* Watchdog Timeout Period Bit 2 */ -#define FUSE_WDP3 ~_BV(3) /* Watchdog Timeout Period Bit 3 */ -#define FUSE_WDWP0 ~_BV(4) /* Watchdog Window Timeout Period Bit 0 */ -#define FUSE_WDWP1 ~_BV(5) /* Watchdog Window Timeout Period Bit 1 */ -#define FUSE_WDWP2 ~_BV(6) /* Watchdog Window Timeout Period Bit 2 */ -#define FUSE_WDWP3 ~_BV(7) /* Watchdog Window Timeout Period Bit 3 */ -#define FUSE1_DEFAULT (0xFF) - -/* Fuse Byte 2 */ -#define FUSE_BODPD0 ~_BV(0) /* BOD Operation in Power-Down Mode Bit 0 */ -#define FUSE_BODPD1 ~_BV(1) /* BOD Operation in Power-Down Mode Bit 1 */ -#define FUSE_BODACT0 ~_BV(2) /* BOD Operation in Active Mode Bit 0 */ -#define FUSE_BODACT1 ~_BV(3) /* BOD Operation in Active Mode Bit 1 */ -#define FUSE_BOOTRST ~_BV(6) /* Boot Loader Section Reset Vector */ -#define FUSE_DVSDON ~_BV(7) /* Spike Detector Enable */ -#define FUSE2_DEFAULT (0xFF) - -/* Fuse Byte 3 Reserved */ - -/* Fuse Byte 4 */ -#define FUSE_JTAGEN ~_BV(0) /* JTAG Interface Enable */ -#define FUSE_WDLOCK ~_BV(1) /* Watchdog Timer Lock */ -#define FUSE_SUT0 ~_BV(2) /* Start-up Time Bit 0 */ -#define FUSE_SUT1 ~_BV(3) /* Start-up Time Bit 1 */ -#define FUSE4_DEFAULT (0xFF) - -/* Fuse Byte 5 */ -#define FUSE_BODLVL0 ~_BV(0) /* Brown Out Detection Voltage Level Bit 0 */ -#define FUSE_BODLVL1 ~_BV(1) /* Brown Out Detection Voltage Level Bit 1 */ -#define FUSE_BODLVL2 ~_BV(2) /* Brown Out Detection Voltage Level Bit 2 */ -#define FUSE_EESAVE ~_BV(3) /* Preserve EEPROM Through Chip Erase */ -#define FUSE5_DEFAULT (0xFF) - - -/* ========== Lock Bits ========== */ -#define __LOCK_BITS_EXIST -#define __BOOT_LOCK_APPLICATION_TABLE_BITS_EXIST -#define __BOOT_LOCK_APPLICATION_BITS_EXIST -#define __BOOT_LOCK_BOOT_BITS_EXIST - - -/* ========== Signature ========== */ -#define SIGNATURE_0 0x1E -#define SIGNATURE_1 0x96 -#define SIGNATURE_2 0x42 - - -#endif /* _AVR_ATxmega64A3_H_ */ - diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/lock.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/lock.h deleted file mode 100644 index 9ac8c577f..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/lock.h +++ /dev/null @@ -1,239 +0,0 @@ -/* Copyright (c) 2007, Atmel Corporation - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: lock.h,v 1.3.2.2 2008/04/29 18:07:36 arcanum Exp $ */ - -/* avr/lock.h - Lock Bits API */ - -#ifndef _AVR_LOCK_H_ -#define _AVR_LOCK_H_ 1 - - -/** \file */ -/** \defgroup avr_lock : Lockbit Support - - \par Introduction - - The Lockbit API allows a user to specify the lockbit settings for the - specific AVR device they are compiling for. These lockbit settings will be - placed in a special section in the ELF output file, after linking. - - Programming tools can take advantage of the lockbit information embedded in - the ELF file, by extracting this information and determining if the lockbits - need to be programmed after programming the Flash and EEPROM memories. - This also allows a single ELF file to contain all the - information needed to program an AVR. - - To use the Lockbit API, include the header file, which in turn - automatically includes the individual I/O header file and the - file. These other two files provides everything necessary to set the AVR - lockbits. - - \par Lockbit API - - Each I/O header file may define up to 3 macros that controls what kinds - of lockbits are available to the user. - - If __LOCK_BITS_EXIST is defined, then two lock bits are available to the - user and 3 mode settings are defined for these two bits. - - If __BOOT_LOCK_BITS_0_EXIST is defined, then the two BLB0 lock bits are - available to the user and 4 mode settings are defined for these two bits. - - If __BOOT_LOCK_BITS_1_EXIST is defined, then the two BLB1 lock bits are - available to the user and 4 mode settings are defined for these two bits. - - If __BOOT_LOCK_APPLICATION_TABLE_BITS_EXIST is defined then two lock bits - are available to set the locking mode for the Application Table Section - (which is used in the XMEGA family). - - If __BOOT_LOCK_APPLICATION_BITS_EXIST is defined then two lock bits are - available to set the locking mode for the Application Section (which is used - in the XMEGA family). - - If __BOOT_LOCK_BOOT_BITS_EXIST is defined then two lock bits are available - to set the locking mode for the Boot Loader Section (which is used in the - XMEGA family). - - The AVR lockbit modes have inverted values, logical 1 for an unprogrammed - (disabled) bit and logical 0 for a programmed (enabled) bit. The defined - macros for each individual lock bit represent this in their definition by a - bit-wise inversion of a mask. For example, the LB_MODE_3 macro is defined - as: - \code - #define LB_MODE_3 (0xFC) -` \endcode - - To combine the lockbit mode macros together to represent a whole byte, - use the bitwise AND operator, like so: - \code - (LB_MODE_3 & BLB0_MODE_2) - \endcode - - also defines a macro that provides a default lockbit value: - LOCKBITS_DEFAULT which is defined to be 0xFF. - - See the AVR device specific datasheet for more details about these - lock bits and the available mode settings. - - A convenience macro, LOCKMEM, is defined as a GCC attribute for a - custom-named section of ".lock". - - A convenience macro, LOCKBITS, is defined that declares a variable, __lock, - of type unsigned char with the attribute defined by LOCKMEM. This variable - allows the end user to easily set the lockbit data. - - \note If a device-specific I/O header file has previously defined LOCKMEM, - then LOCKMEM is not redefined. If a device-specific I/O header file has - previously defined LOCKBITS, then LOCKBITS is not redefined. LOCKBITS is - currently known to be defined in the I/O header files for the XMEGA devices. - - \par API Usage Example - - Putting all of this together is easy: - - \code - #include - - LOCKBITS = (LB_MODE_1 & BLB0_MODE_3 & BLB1_MODE_4); - - int main(void) - { - return 0; - } - \endcode - - Or: - - \code - #include - - unsigned char __lock __attribute__((section (".lock"))) = - (LB_MODE_1 & BLB0_MODE_3 & BLB1_MODE_4); - - int main(void) - { - return 0; - } - \endcode - - - - However there are a number of caveats that you need to be aware of to - use this API properly. - - Be sure to include to get all of the definitions for the API. - The LOCKBITS macro defines a global variable to store the lockbit data. This - variable is assigned to its own linker section. Assign the desired lockbit - values immediately in the variable initialization. - - The .lock section in the ELF file will get its values from the initial - variable assignment ONLY. This means that you can NOT assign values to - this variable in functions and the new values will not be put into the - ELF .lock section. - - The global variable is declared in the LOCKBITS macro has two leading - underscores, which means that it is reserved for the "implementation", - meaning the library, so it will not conflict with a user-named variable. - - You must initialize the lockbit variable to some meaningful value, even - if it is the default value. This is because the lockbits default to a - logical 1, meaning unprogrammed. Normal uninitialized data defaults to all - locgial zeros. So it is vital that all lockbits are initialized, even with - default data. If they are not, then the lockbits may not programmed to the - desired settings and can possibly put your device into an unrecoverable - state. - - Be sure to have the -mmcu=device flag in your compile command line and - your linker command line to have the correct device selected and to have - the correct I/O header file included when you include . - - You can print out the contents of the .lock section in the ELF file by - using this command line: - \code - avr-objdump -s -j .lock - \endcode - -*/ - - -#ifndef __ASSEMBLER__ - -#ifndef LOCKMEM -#define LOCKMEM __attribute__((section (".lock"))) -#endif - -#ifndef LOCKBITS -#define LOCKBITS unsigned char __lock LOCKMEM -#endif - -#endif /* !__ASSEMBLER */ - - -/* Lock Bit Modes */ -#if defined(__LOCK_BITS_EXIST) -#define LB_MODE_1 (0xFF) -#define LB_MODE_2 (0xFE) -#define LB_MODE_3 (0xFC) -#endif - -#if defined(__BOOT_LOCK_BITS_0_EXIST) -#define BLB0_MODE_1 (0xFF) -#define BLB0_MODE_2 (0xFB) -#define BLB0_MODE_3 (0xF3) -#define BLB0_MODE_4 (0xF7) -#endif - -#if defined(__BOOT_LOCK_BITS_1_EXIST) -#define BLB1_MODE_1 (0xFF) -#define BLB1_MODE_2 (0xEF) -#define BLB1_MODE_3 (0xCF) -#define BLB1_MODE_4 (0xDF) -#endif - -#if defined(__BOOT_LOCK_APPLICATION_TABLE_BITS_EXIST) -#define BLBAT0 ~_BV(2) -#define BLBAT1 ~_BV(3) -#endif - -#if defined(__BOOT_LOCK_APPLICATION_BITS_EXIST) -#define BLBA0 ~_BV(4) -#define BLBA1 ~_BV(5) -#endif - -#if defined(__BOOT_LOCK_BOOT_BITS_EXIST) -#define BLBB0 ~_BV(6) -#define BLBB1 ~_BV(7) -#endif - - -#define LOCKBITS_DEFAULT (0xFF) - -#endif /* _AVR_LOCK_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/parity.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/parity.h deleted file mode 100644 index cedd9b512..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/parity.h +++ /dev/null @@ -1,39 +0,0 @@ -/* Copyright (c) 2005 Joerg Wunsch - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: parity.h,v 1.7 2005/11/05 22:23:15 joerg_wunsch Exp $ */ - -#ifndef _AVR_PARITY_H_ -#define _AVR_PARITY_H_ - -#warning "This file has been moved to ." -#include - -#endif /* _AVR_PARITY_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/pgmspace.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/pgmspace.h deleted file mode 100644 index 283e269cd..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/pgmspace.h +++ /dev/null @@ -1,775 +0,0 @@ -/* Copyright (c) 2002 - 2007 Marek Michalkiewicz - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: pgmspace.h,v 1.40.2.2 2008/10/22 04:35:00 arcanum Exp $ */ - -/* - pgmspace.h - - Contributors: - Created by Marek Michalkiewicz - Eric B. Weddington - Wolfgang Haidinger (pgm_read_dword()) - Ivanov Anton (pgm_read_float()) - */ - -/** \file */ -/** \defgroup avr_pgmspace : Program Space Utilities - \code - #include - #include - \endcode - - The functions in this module provide interfaces for a program to access - data stored in program space (flash memory) of the device. In order to - use these functions, the target device must support either the \c LPM or - \c ELPM instructions. - - \note These functions are an attempt to provide some compatibility with - header files that come with IAR C, to make porting applications between - different compilers easier. This is not 100% compatibility though (GCC - does not have full support for multiple address spaces yet). - - \note If you are working with strings which are completely based in ram, - use the standard string functions described in \ref avr_string. - - \note If possible, put your constant tables in the lower 64 KB and use - pgm_read_byte_near() or pgm_read_word_near() instead of - pgm_read_byte_far() or pgm_read_word_far() since it is more efficient that - way, and you can still use the upper 64K for executable code. - All functions that are suffixed with a \c _P \e require their - arguments to be in the lower 64 KB of the flash ROM, as they do - not use ELPM instructions. This is normally not a big concern as - the linker setup arranges any program space constants declared - using the macros from this header file so they are placed right after - the interrupt vectors, and in front of any executable code. However, - it can become a problem if there are too many of these constants, or - for bootloaders on devices with more than 64 KB of ROM. - All these functions will not work in that situation. -*/ - -#ifndef __PGMSPACE_H_ -#define __PGMSPACE_H_ 1 - -#define __need_size_t -#include -#include -#include - -#ifndef __ATTR_CONST__ -#define __ATTR_CONST__ __attribute__((__const__)) -#endif - -#ifndef __ATTR_PROGMEM__ -#define __ATTR_PROGMEM__ __attribute__((__progmem__)) -#endif - -#ifndef __ATTR_PURE__ -#define __ATTR_PURE__ __attribute__((__pure__)) -#endif - -/** - \ingroup avr_pgmspace - \def PROGMEM - - Attribute to use in order to declare an object being located in - flash ROM. - */ -#define PROGMEM __ATTR_PROGMEM__ - -#ifdef __cplusplus -extern "C" { -#endif - -#if defined(__DOXYGEN__) -/* - * Doxygen doesn't grok the appended attribute syntax of - * GCC, and confuses the typedefs with function decls, so - * supply a doxygen-friendly view. - */ -/** - \ingroup avr_pgmspace - \typedef prog_void - - Type of a "void" object located in flash ROM. Does not make much - sense by itself, but can be used to declare a "void *" object in - flash ROM. -*/ -typedef void PROGMEM prog_void; -/** - \ingroup avr_pgmspace - \typedef prog_char - - Type of a "char" object located in flash ROM. -*/ -typedef char PROGMEM prog_char; - -/** - \ingroup avr_pgmspace - \typedef prog_uchar - - Type of an "unsigned char" object located in flash ROM. -*/ -typedef unsigned char PROGMEM prog_uchar; - - -/** - \ingroup avr_pgmspace - \typedef prog_int8_t - - Type of an "int8_t" object located in flash ROM. -*/ -typedef int8_t PROGMEM prog_int8_t; - -/** - \ingroup avr_pgmspace - \typedef prog_uint8_t - - Type of an "uint8_t" object located in flash ROM. -*/ -typedef uint8_t PROGMEM prog_uint8_t; - -/** - \ingroup avr_pgmspace - \typedef prog_int16_t - - Type of an "int16_t" object located in flash ROM. -*/ -typedef int16_t PROGMEM prog_int16_t; - -/** - \ingroup avr_pgmspace - \typedef prog_uint16_t - - Type of an "uint16_t" object located in flash ROM. -*/ -typedef uint16_t PROGMEM prog_uint16_t; - -/** - \ingroup avr_pgmspace - \typedef prog_int32_t - - Type of an "int32_t" object located in flash ROM. -*/ -typedef int32_t PROGMEM prog_int32_t; - -/** - \ingroup avr_pgmspace - \typedef prog_uint32_t - - Type of an "uint32_t" object located in flash ROM. -*/ -typedef uint32_t PROGMEM prog_uint32_t; - -/** - \ingroup avr_pgmspace - \typedef prog_int64_t - - Type of an "int64_t" object located in flash ROM. - - \note This type is not available when the compiler - option -mint8 is in effect. -*/ -typedef int64_t PROGMEM prog_int64_t; - -/** - \ingroup avr_pgmspace - \typedef prog_uint64_t - - Type of an "uint64_t" object located in flash ROM. - - \note This type is not available when the compiler - option -mint8 is in effect. -*/ -typedef uint64_t PROGMEM prog_uint64_t; -#else /* !DOXYGEN */ -typedef void prog_void PROGMEM; -typedef char prog_char PROGMEM; -typedef unsigned char prog_uchar PROGMEM; - -typedef int8_t prog_int8_t PROGMEM; -typedef uint8_t prog_uint8_t PROGMEM; -typedef int16_t prog_int16_t PROGMEM; -typedef uint16_t prog_uint16_t PROGMEM; -typedef int32_t prog_int32_t PROGMEM; -typedef uint32_t prog_uint32_t PROGMEM; -#if !__USING_MINT8 -typedef int64_t prog_int64_t PROGMEM; -typedef uint64_t prog_uint64_t PROGMEM; -#endif -#endif /* defined(__DOXYGEN__) */ - -/* Although in C, we can get away with just using __c, it does not work in - C++. We need to use &__c[0] to avoid the compiler puking. Dave Hylands - explaned it thusly, - - Let's suppose that we use PSTR("Test"). In this case, the type returned - by __c is a prog_char[5] and not a prog_char *. While these are - compatible, they aren't the same thing (especially in C++). The type - returned by &__c[0] is a prog_char *, which explains why it works - fine. */ - -#if defined(__DOXYGEN__) -/* - * The #define below is just a dummy that serves documentation - * purposes only. - */ -/** \ingroup avr_pgmspace - \def PSTR(s) - - Used to declare a static pointer to a string in program space. */ -# define PSTR(s) ((const PROGMEM char *)(s)) -#else /* !DOXYGEN */ -/* The real thing. */ -# define PSTR(s) (__extension__({static char __c[] PROGMEM = (s); &__c[0];})) -#endif /* DOXYGEN */ - -#define __LPM_classic__(addr) \ -(__extension__({ \ - uint16_t __addr16 = (uint16_t)(addr); \ - uint8_t __result; \ - __asm__ \ - ( \ - "lpm" "\n\t" \ - "mov %0, r0" "\n\t" \ - : "=r" (__result) \ - : "z" (__addr16) \ - : "r0" \ - ); \ - __result; \ -})) - -#define __LPM_enhanced__(addr) \ -(__extension__({ \ - uint16_t __addr16 = (uint16_t)(addr); \ - uint8_t __result; \ - __asm__ \ - ( \ - "lpm %0, Z" "\n\t" \ - : "=r" (__result) \ - : "z" (__addr16) \ - ); \ - __result; \ -})) - -#define __LPM_word_classic__(addr) \ -(__extension__({ \ - uint16_t __addr16 = (uint16_t)(addr); \ - uint16_t __result; \ - __asm__ \ - ( \ - "lpm" "\n\t" \ - "mov %A0, r0" "\n\t" \ - "adiw r30, 1" "\n\t" \ - "lpm" "\n\t" \ - "mov %B0, r0" "\n\t" \ - : "=r" (__result), "=z" (__addr16) \ - : "1" (__addr16) \ - : "r0" \ - ); \ - __result; \ -})) - -#define __LPM_word_enhanced__(addr) \ -(__extension__({ \ - uint16_t __addr16 = (uint16_t)(addr); \ - uint16_t __result; \ - __asm__ \ - ( \ - "lpm %A0, Z+" "\n\t" \ - "lpm %B0, Z" "\n\t" \ - : "=r" (__result), "=z" (__addr16) \ - : "1" (__addr16) \ - ); \ - __result; \ -})) - -#define __LPM_dword_classic__(addr) \ -(__extension__({ \ - uint16_t __addr16 = (uint16_t)(addr); \ - uint32_t __result; \ - __asm__ \ - ( \ - "lpm" "\n\t" \ - "mov %A0, r0" "\n\t" \ - "adiw r30, 1" "\n\t" \ - "lpm" "\n\t" \ - "mov %B0, r0" "\n\t" \ - "adiw r30, 1" "\n\t" \ - "lpm" "\n\t" \ - "mov %C0, r0" "\n\t" \ - "adiw r30, 1" "\n\t" \ - "lpm" "\n\t" \ - "mov %D0, r0" "\n\t" \ - : "=r" (__result), "=z" (__addr16) \ - : "1" (__addr16) \ - : "r0" \ - ); \ - __result; \ -})) - -#define __LPM_dword_enhanced__(addr) \ -(__extension__({ \ - uint16_t __addr16 = (uint16_t)(addr); \ - uint32_t __result; \ - __asm__ \ - ( \ - "lpm %A0, Z+" "\n\t" \ - "lpm %B0, Z+" "\n\t" \ - "lpm %C0, Z+" "\n\t" \ - "lpm %D0, Z" "\n\t" \ - : "=r" (__result), "=z" (__addr16) \ - : "1" (__addr16) \ - ); \ - __result; \ -})) - -#define __LPM_float_classic__(addr) \ -(__extension__({ \ - uint16_t __addr16 = (uint16_t)(addr); \ - float __result; \ - __asm__ \ - ( \ - "lpm" "\n\t" \ - "mov %A0, r0" "\n\t" \ - "adiw r30, 1" "\n\t" \ - "lpm" "\n\t" \ - "mov %B0, r0" "\n\t" \ - "adiw r30, 1" "\n\t" \ - "lpm" "\n\t" \ - "mov %C0, r0" "\n\t" \ - "adiw r30, 1" "\n\t" \ - "lpm" "\n\t" \ - "mov %D0, r0" "\n\t" \ - : "=r" (__result), "=z" (__addr16) \ - : "1" (__addr16) \ - : "r0" \ - ); \ - __result; \ -})) - -#define __LPM_float_enhanced__(addr) \ -(__extension__({ \ - uint16_t __addr16 = (uint16_t)(addr); \ - float __result; \ - __asm__ \ - ( \ - "lpm %A0, Z+" "\n\t" \ - "lpm %B0, Z+" "\n\t" \ - "lpm %C0, Z+" "\n\t" \ - "lpm %D0, Z" "\n\t" \ - : "=r" (__result), "=z" (__addr16) \ - : "1" (__addr16) \ - ); \ - __result; \ -})) - -#if defined (__AVR_HAVE_LPMX__) -#define __LPM(addr) __LPM_enhanced__(addr) -#define __LPM_word(addr) __LPM_word_enhanced__(addr) -#define __LPM_dword(addr) __LPM_dword_enhanced__(addr) -#define __LPM_float(addr) __LPM_float_enhanced__(addr) -#else -#define __LPM(addr) __LPM_classic__(addr) -#define __LPM_word(addr) __LPM_word_classic__(addr) -#define __LPM_dword(addr) __LPM_dword_classic__(addr) -#define __LPM_float(addr) __LPM_float_classic__(addr) -#endif - -/** \ingroup avr_pgmspace - \def pgm_read_byte_near(address_short) - Read a byte from the program space with a 16-bit (near) address. - \note The address is a byte address. - The address is in the program space. */ - -#define pgm_read_byte_near(address_short) __LPM((uint16_t)(address_short)) - -/** \ingroup avr_pgmspace - \def pgm_read_word_near(address_short) - Read a word from the program space with a 16-bit (near) address. - \note The address is a byte address. - The address is in the program space. */ - -#define pgm_read_word_near(address_short) __LPM_word((uint16_t)(address_short)) - -/** \ingroup avr_pgmspace - \def pgm_read_dword_near(address_short) - Read a double word from the program space with a 16-bit (near) address. - \note The address is a byte address. - The address is in the program space. */ - -#define pgm_read_dword_near(address_short) \ - __LPM_dword((uint16_t)(address_short)) - -/** \ingroup avr_pgmspace - \def pgm_read_float_near(address_short) - Read a float from the program space with a 16-bit (near) address. - \note The address is a byte address. - The address is in the program space. */ - -#define pgm_read_float_near(address_short) \ - __LPM_float((uint16_t)(address_short)) - -#if defined(RAMPZ) || defined(__DOXYGEN__) - -/* Only for devices with more than 64K of program memory. - RAMPZ must be defined (see iom103.h, iom128.h). -*/ - -/* The classic functions are needed for ATmega103. */ - -#define __ELPM_classic__(addr) \ -(__extension__({ \ - uint32_t __addr32 = (uint32_t)(addr); \ - uint8_t __result; \ - __asm__ \ - ( \ - "out %2, %C1" "\n\t" \ - "mov r31, %B1" "\n\t" \ - "mov r30, %A1" "\n\t" \ - "elpm" "\n\t" \ - "mov %0, r0" "\n\t" \ - : "=r" (__result) \ - : "r" (__addr32), \ - "I" (_SFR_IO_ADDR(RAMPZ)) \ - : "r0", "r30", "r31" \ - ); \ - __result; \ -})) - -#define __ELPM_enhanced__(addr) \ -(__extension__({ \ - uint32_t __addr32 = (uint32_t)(addr); \ - uint8_t __result; \ - __asm__ \ - ( \ - "out %2, %C1" "\n\t" \ - "movw r30, %1" "\n\t" \ - "elpm %0, Z+" "\n\t" \ - : "=r" (__result) \ - : "r" (__addr32), \ - "I" (_SFR_IO_ADDR(RAMPZ)) \ - : "r30", "r31" \ - ); \ - __result; \ -})) - -#define __ELPM_word_classic__(addr) \ -(__extension__({ \ - uint32_t __addr32 = (uint32_t)(addr); \ - uint16_t __result; \ - __asm__ \ - ( \ - "out %2, %C1" "\n\t" \ - "mov r31, %B1" "\n\t" \ - "mov r30, %A1" "\n\t" \ - "elpm" "\n\t" \ - "mov %A0, r0" "\n\t" \ - "in r0, %2" "\n\t" \ - "adiw r30, 1" "\n\t" \ - "adc r0, __zero_reg__" "\n\t" \ - "out %2, r0" "\n\t" \ - "elpm" "\n\t" \ - "mov %B0, r0" "\n\t" \ - : "=r" (__result) \ - : "r" (__addr32), \ - "I" (_SFR_IO_ADDR(RAMPZ)) \ - : "r0", "r30", "r31" \ - ); \ - __result; \ -})) - -#define __ELPM_word_enhanced__(addr) \ -(__extension__({ \ - uint32_t __addr32 = (uint32_t)(addr); \ - uint16_t __result; \ - __asm__ \ - ( \ - "out %2, %C1" "\n\t" \ - "movw r30, %1" "\n\t" \ - "elpm %A0, Z+" "\n\t" \ - "elpm %B0, Z" "\n\t" \ - : "=r" (__result) \ - : "r" (__addr32), \ - "I" (_SFR_IO_ADDR(RAMPZ)) \ - : "r30", "r31" \ - ); \ - __result; \ -})) - -#define __ELPM_dword_classic__(addr) \ -(__extension__({ \ - uint32_t __addr32 = (uint32_t)(addr); \ - uint32_t __result; \ - __asm__ \ - ( \ - "out %2, %C1" "\n\t" \ - "mov r31, %B1" "\n\t" \ - "mov r30, %A1" "\n\t" \ - "elpm" "\n\t" \ - "mov %A0, r0" "\n\t" \ - "in r0, %2" "\n\t" \ - "adiw r30, 1" "\n\t" \ - "adc r0, __zero_reg__" "\n\t" \ - "out %2, r0" "\n\t" \ - "elpm" "\n\t" \ - "mov %B0, r0" "\n\t" \ - "in r0, %2" "\n\t" \ - "adiw r30, 1" "\n\t" \ - "adc r0, __zero_reg__" "\n\t" \ - "out %2, r0" "\n\t" \ - "elpm" "\n\t" \ - "mov %C0, r0" "\n\t" \ - "in r0, %2" "\n\t" \ - "adiw r30, 1" "\n\t" \ - "adc r0, __zero_reg__" "\n\t" \ - "out %2, r0" "\n\t" \ - "elpm" "\n\t" \ - "mov %D0, r0" "\n\t" \ - : "=r" (__result) \ - : "r" (__addr32), \ - "I" (_SFR_IO_ADDR(RAMPZ)) \ - : "r0", "r30", "r31" \ - ); \ - __result; \ -})) - -#define __ELPM_dword_enhanced__(addr) \ -(__extension__({ \ - uint32_t __addr32 = (uint32_t)(addr); \ - uint32_t __result; \ - __asm__ \ - ( \ - "out %2, %C1" "\n\t" \ - "movw r30, %1" "\n\t" \ - "elpm %A0, Z+" "\n\t" \ - "elpm %B0, Z+" "\n\t" \ - "elpm %C0, Z+" "\n\t" \ - "elpm %D0, Z" "\n\t" \ - : "=r" (__result) \ - : "r" (__addr32), \ - "I" (_SFR_IO_ADDR(RAMPZ)) \ - : "r30", "r31" \ - ); \ - __result; \ -})) - -#define __ELPM_float_classic__(addr) \ -(__extension__({ \ - uint32_t __addr32 = (uint32_t)(addr); \ - float __result; \ - __asm__ \ - ( \ - "out %2, %C1" "\n\t" \ - "mov r31, %B1" "\n\t" \ - "mov r30, %A1" "\n\t" \ - "elpm" "\n\t" \ - "mov %A0, r0" "\n\t" \ - "in r0, %2" "\n\t" \ - "adiw r30, 1" "\n\t" \ - "adc r0, __zero_reg__" "\n\t" \ - "out %2, r0" "\n\t" \ - "elpm" "\n\t" \ - "mov %B0, r0" "\n\t" \ - "in r0, %2" "\n\t" \ - "adiw r30, 1" "\n\t" \ - "adc r0, __zero_reg__" "\n\t" \ - "out %2, r0" "\n\t" \ - "elpm" "\n\t" \ - "mov %C0, r0" "\n\t" \ - "in r0, %2" "\n\t" \ - "adiw r30, 1" "\n\t" \ - "adc r0, __zero_reg__" "\n\t" \ - "out %2, r0" "\n\t" \ - "elpm" "\n\t" \ - "mov %D0, r0" "\n\t" \ - : "=r" (__result) \ - : "r" (__addr32), \ - "I" (_SFR_IO_ADDR(RAMPZ)) \ - : "r0", "r30", "r31" \ - ); \ - __result; \ -})) - -#define __ELPM_float_enhanced__(addr) \ -(__extension__({ \ - uint32_t __addr32 = (uint32_t)(addr); \ - float __result; \ - __asm__ \ - ( \ - "out %2, %C1" "\n\t" \ - "movw r30, %1" "\n\t" \ - "elpm %A0, Z+" "\n\t" \ - "elpm %B0, Z+" "\n\t" \ - "elpm %C0, Z+" "\n\t" \ - "elpm %D0, Z" "\n\t" \ - : "=r" (__result) \ - : "r" (__addr32), \ - "I" (_SFR_IO_ADDR(RAMPZ)) \ - : "r30", "r31" \ - ); \ - __result; \ -})) - -#if defined (__AVR_HAVE_LPMX__) -#define __ELPM(addr) __ELPM_enhanced__(addr) -#define __ELPM_word(addr) __ELPM_word_enhanced__(addr) -#define __ELPM_dword(addr) __ELPM_dword_enhanced__(addr) -#define __ELPM_float(addr) __ELPM_float_enhanced__(addr) -#else -#define __ELPM(addr) __ELPM_classic__(addr) -#define __ELPM_word(addr) __ELPM_word_classic__(addr) -#define __ELPM_dword(addr) __ELPM_dword_classic__(addr) -#define __ELPM_float(addr) __ELPM_float_classic__(addr) -#endif - -/** \ingroup avr_pgmspace - \def pgm_read_byte_far(address_long) - Read a byte from the program space with a 32-bit (far) address. - - \note The address is a byte address. - The address is in the program space. */ - -#define pgm_read_byte_far(address_long) __ELPM((uint32_t)(address_long)) - -/** \ingroup avr_pgmspace - \def pgm_read_word_far(address_long) - Read a word from the program space with a 32-bit (far) address. - - \note The address is a byte address. - The address is in the program space. */ - -#define pgm_read_word_far(address_long) __ELPM_word((uint32_t)(address_long)) - -/** \ingroup avr_pgmspace - \def pgm_read_dword_far(address_long) - Read a double word from the program space with a 32-bit (far) address. - - \note The address is a byte address. - The address is in the program space. */ - -#define pgm_read_dword_far(address_long) __ELPM_dword((uint32_t)(address_long)) - -/** \ingroup avr_pgmspace - \def pgm_read_float_far(address_long) - Read a float from the program space with a 32-bit (far) address. - - \note The address is a byte address. - The address is in the program space. */ - -#define pgm_read_float_far(address_long) __ELPM_float((uint32_t)(address_long)) - -#endif /* RAMPZ or __DOXYGEN__ */ - -/** \ingroup avr_pgmspace - \def pgm_read_byte(address_short) - Read a byte from the program space with a 16-bit (near) address. - - \note The address is a byte address. - The address is in the program space. */ - -#define pgm_read_byte(address_short) pgm_read_byte_near(address_short) - -/** \ingroup avr_pgmspace - \def pgm_read_word(address_short) - Read a word from the program space with a 16-bit (near) address. - - \note The address is a byte address. - The address is in the program space. */ - -#define pgm_read_word(address_short) pgm_read_word_near(address_short) - -/** \ingroup avr_pgmspace - \def pgm_read_dword(address_short) - Read a double word from the program space with a 16-bit (near) address. - - \note The address is a byte address. - The address is in the program space. */ - -#define pgm_read_dword(address_short) pgm_read_dword_near(address_short) - -/** \ingroup avr_pgmspace - \def pgm_read_float(address_short) - Read a float from the program space with a 16-bit (near) address. - - \note The address is a byte address. - The address is in the program space. */ - -#define pgm_read_float(address_short) pgm_read_float_near(address_short) - -/** \ingroup avr_pgmspace - \def PGM_P - - Used to declare a variable that is a pointer to a string in program - space. */ - -#ifndef PGM_P -#define PGM_P const prog_char * -#endif - -/** \ingroup avr_pgmspace - \def PGM_VOID_P - - Used to declare a generic pointer to an object in program space. */ - -#ifndef PGM_VOID_P -#define PGM_VOID_P const prog_void * -#endif - -extern PGM_VOID_P memchr_P(PGM_VOID_P, int __val, size_t __len) __ATTR_CONST__; -extern int memcmp_P(const void *, PGM_VOID_P, size_t) __ATTR_PURE__; -extern void *memcpy_P(void *, PGM_VOID_P, size_t); -extern void *memmem_P(const void *, size_t, PGM_VOID_P, size_t) __ATTR_PURE__; -extern PGM_VOID_P memrchr_P(PGM_VOID_P, int __val, size_t __len) __ATTR_CONST__; -extern char *strcat_P(char *, PGM_P); -extern PGM_P strchr_P(PGM_P, int __val) __ATTR_CONST__; -extern PGM_P strchrnul_P(PGM_P, int __val) __ATTR_CONST__; -extern int strcmp_P(const char *, PGM_P) __ATTR_PURE__; -extern char *strcpy_P(char *, PGM_P); -extern int strcasecmp_P(const char *, PGM_P) __ATTR_PURE__; -extern char *strcasestr_P(const char *, PGM_P) __ATTR_PURE__; -extern size_t strcspn_P(const char *__s, PGM_P __reject) __ATTR_PURE__; -extern size_t strlcat_P (char *, PGM_P, size_t ); -extern size_t strlcpy_P (char *, PGM_P, size_t ); -extern size_t strlen_P(PGM_P) __ATTR_CONST__; /* program memory can't change */ -extern size_t strnlen_P(PGM_P, size_t) __ATTR_CONST__; /* program memory can't change */ -extern int strncmp_P(const char *, PGM_P, size_t) __ATTR_PURE__; -extern int strncasecmp_P(const char *, PGM_P, size_t) __ATTR_PURE__; -extern char *strncat_P(char *, PGM_P, size_t); -extern char *strncpy_P(char *, PGM_P, size_t); -extern char *strpbrk_P(const char *__s, PGM_P __accept) __ATTR_PURE__; -extern PGM_P strrchr_P(PGM_P, int __val) __ATTR_CONST__; -extern char *strsep_P(char **__sp, PGM_P __delim); -extern size_t strspn_P(const char *__s, PGM_P __accept) __ATTR_PURE__; -extern char *strstr_P(const char *, PGM_P) __ATTR_PURE__; - -#ifdef __cplusplus -} -#endif - -#endif /* __PGMSPACE_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/portpins.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/portpins.h deleted file mode 100644 index d569662ce..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/portpins.h +++ /dev/null @@ -1,373 +0,0 @@ -/* Copyright (c) 2003 Theodore A. Roth - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: portpins.h,v 1.4 2006/03/10 16:15:38 aesok Exp $ */ - -#ifndef _AVR_PORTPINS_H_ -#define _AVR_PORTPINS_H_ 1 - -/* This file should only be included from , never directly. */ - -#ifndef _AVR_IO_H_ -# error "Include instead of this file." -#endif - -/* Define Generic PORTn, DDn, and PINn values. */ - -/* Port Data Register (generic) */ -#define PORT7 7 -#define PORT6 6 -#define PORT5 5 -#define PORT4 4 -#define PORT3 3 -#define PORT2 2 -#define PORT1 1 -#define PORT0 0 - -/* Port Data Direction Register (generic) */ -#define DD7 7 -#define DD6 6 -#define DD5 5 -#define DD4 4 -#define DD3 3 -#define DD2 2 -#define DD1 1 -#define DD0 0 - -/* Port Input Pins (generic) */ -#define PIN7 7 -#define PIN6 6 -#define PIN5 5 -#define PIN4 4 -#define PIN3 3 -#define PIN2 2 -#define PIN1 1 -#define PIN0 0 - -/* Define PORTxn values for all possible port pins. */ - -/* PORT A */ - -#if defined(PA0) -# define PORTA0 PA0 -#endif -#if defined(PA1) -# define PORTA1 PA1 -#endif -#if defined(PA2) -# define PORTA2 PA2 -#endif -#if defined(PA3) -# define PORTA3 PA3 -#endif -#if defined(PA4) -# define PORTA4 PA4 -#endif -#if defined(PA5) -# define PORTA5 PA5 -#endif -#if defined(PA6) -# define PORTA6 PA6 -#endif -#if defined(PA7) -# define PORTA7 PA7 -#endif - -/* PORT B */ - -#if defined(PB0) -# define PORTB0 PB0 -#endif -#if defined(PB1) -# define PORTB1 PB1 -#endif -#if defined(PB2) -# define PORTB2 PB2 -#endif -#if defined(PB3) -# define PORTB3 PB3 -#endif -#if defined(PB4) -# define PORTB4 PB4 -#endif -#if defined(PB5) -# define PORTB5 PB5 -#endif -#if defined(PB6) -# define PORTB6 PB6 -#endif -#if defined(PB7) -# define PORTB7 PB7 -#endif - -/* PORT C */ - -#if defined(PC0) -# define PORTC0 PC0 -#endif -#if defined(PC1) -# define PORTC1 PC1 -#endif -#if defined(PC2) -# define PORTC2 PC2 -#endif -#if defined(PC3) -# define PORTC3 PC3 -#endif -#if defined(PC4) -# define PORTC4 PC4 -#endif -#if defined(PC5) -# define PORTC5 PC5 -#endif -#if defined(PC6) -# define PORTC6 PC6 -#endif -#if defined(PC7) -# define PORTC7 PC7 -#endif - -/* PORT D */ - -#if defined(PD0) -# define PORTD0 PD0 -#endif -#if defined(PD1) -# define PORTD1 PD1 -#endif -#if defined(PD2) -# define PORTD2 PD2 -#endif -#if defined(PD3) -# define PORTD3 PD3 -#endif -#if defined(PD4) -# define PORTD4 PD4 -#endif -#if defined(PD5) -# define PORTD5 PD5 -#endif -#if defined(PD6) -# define PORTD6 PD6 -#endif -#if defined(PD7) -# define PORTD7 PD7 -#endif - -/* PORT E */ - -#if defined(PE0) -# define PORTE0 PE0 -#endif -#if defined(PE1) -# define PORTE1 PE1 -#endif -#if defined(PE2) -# define PORTE2 PE2 -#endif -#if defined(PE3) -# define PORTE3 PE3 -#endif -#if defined(PE4) -# define PORTE4 PE4 -#endif -#if defined(PE5) -# define PORTE5 PE5 -#endif -#if defined(PE6) -# define PORTE6 PE6 -#endif -#if defined(PE7) -# define PORTE7 PE7 -#endif - -/* PORT F */ - -#if defined(PF0) -# define PORTF0 PF0 -#endif -#if defined(PF1) -# define PORTF1 PF1 -#endif -#if defined(PF2) -# define PORTF2 PF2 -#endif -#if defined(PF3) -# define PORTF3 PF3 -#endif -#if defined(PF4) -# define PORTF4 PF4 -#endif -#if defined(PF5) -# define PORTF5 PF5 -#endif -#if defined(PF6) -# define PORTF6 PF6 -#endif -#if defined(PF7) -# define PORTF7 PF7 -#endif - -/* PORT G */ - -#if defined(PG0) -# define PORTG0 PG0 -#endif -#if defined(PG1) -# define PORTG1 PG1 -#endif -#if defined(PG2) -# define PORTG2 PG2 -#endif -#if defined(PG3) -# define PORTG3 PG3 -#endif -#if defined(PG4) -# define PORTG4 PG4 -#endif -#if defined(PG5) -# define PORTG5 PG5 -#endif -#if defined(PG6) -# define PORTG6 PG6 -#endif -#if defined(PG7) -# define PORTG7 PG7 -#endif - -/* PORT H */ - -#if defined(PH0) -# define PORTH0 PH0 -#endif -#if defined(PH1) -# define PORTH1 PH1 -#endif -#if defined(PH2) -# define PORTH2 PH2 -#endif -#if defined(PH3) -# define PORTH3 PH3 -#endif -#if defined(PH4) -# define PORTH4 PH4 -#endif -#if defined(PH5) -# define PORTH5 PH5 -#endif -#if defined(PH6) -# define PORTH6 PH6 -#endif -#if defined(PH7) -# define PORTH7 PH7 -#endif - -/* PORT J */ - -#if defined(PJ0) -# define PORTJ0 PJ0 -#endif -#if defined(PJ1) -# define PORTJ1 PJ1 -#endif -#if defined(PJ2) -# define PORTJ2 PJ2 -#endif -#if defined(PJ3) -# define PORTJ3 PJ3 -#endif -#if defined(PJ4) -# define PORTJ4 PJ4 -#endif -#if defined(PJ5) -# define PORTJ5 PJ5 -#endif -#if defined(PJ6) -# define PORTJ6 PJ6 -#endif -#if defined(PJ7) -# define PORTJ7 PJ7 -#endif - -/* PORT K */ - -#if defined(PK0) -# define PORTK0 PK0 -#endif -#if defined(PK1) -# define PORTK1 PK1 -#endif -#if defined(PK2) -# define PORTK2 PK2 -#endif -#if defined(PK3) -# define PORTK3 PK3 -#endif -#if defined(PK4) -# define PORTK4 PK4 -#endif -#if defined(PK5) -# define PORTK5 PK5 -#endif -#if defined(PK6) -# define PORTK6 PK6 -#endif -#if defined(PK7) -# define PORTK7 PK7 -#endif - -/* PORT L */ - -#if defined(PL0) -# define PORTL0 PL0 -#endif -#if defined(PL1) -# define PORTL1 PL1 -#endif -#if defined(PL2) -# define PORTL2 PL2 -#endif -#if defined(PL3) -# define PORTL3 PL3 -#endif -#if defined(PL4) -# define PORTL4 PL4 -#endif -#if defined(PL5) -# define PORTL5 PL5 -#endif -#if defined(PL6) -# define PORTL6 PL6 -#endif -#if defined(PL7) -# define PORTL7 PL7 -#endif - -#endif /* _AVR_PORTPINS_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/power.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/power.h deleted file mode 100644 index 621af68ae..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/power.h +++ /dev/null @@ -1,1260 +0,0 @@ -/* Copyright (c) 2006, 2007, 2008 Eric B. Weddington - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: power.h,v 1.11.2.11 2008/11/03 04:13:18 arcanum Exp $ */ - -#ifndef _AVR_POWER_H_ -#define _AVR_POWER_H_ 1 - -#include -#include - - -/** \file */ -/** \defgroup avr_power : Power Reduction Management - -\code #include \endcode - -Many AVRs contain a Power Reduction Register (PRR) or Registers (PRRx) that -allow you to reduce power consumption by disabling or enabling various on-board -peripherals as needed. - -There are many macros in this header file that provide an easy interface -to enable or disable on-board peripherals to reduce power. See the table below. - -\note Not all AVR devices have a Power Reduction Register (for example -the ATmega128). On those devices without a Power Reduction Register, these -macros are not available. - -\note Not all AVR devices contain the same peripherals (for example, the LCD -interface), or they will be named differently (for example, USART and -USART0). Please consult your device's datasheet, or the header file, to -find out which macros are applicable to your device. - -*/ - - -/** \addtogroup avr_power - -\anchor avr_powermacros - -
    - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
    Power MacroDescriptionApplicable for device
    power_adc_enable()Enable the Analog to Digital Converter module.ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, ATmega165, ATmega165P, ATmega325, ATmega3250, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega3290, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega48, ATmega88, ATmega168, ATtiny24, ATtiny44, ATtiny84, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861
    power_adc_disable()Disable the Analog to Digital Converter module.ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, ATmega165, ATmega165P, ATmega325, ATmega3250, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega3290, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega48, ATmega88, ATmega168, ATtiny24, ATtiny44, ATtiny84, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861
    power_lcd_enable()Enable the LCD module.ATmega169, ATmega169P, ATmega329, ATmega3290, ATmega649, ATmega6490
    power_lcd_disable().Disable the LCD module.ATmega169, ATmega169P, ATmega329, ATmega3290, ATmega649, ATmega6490
    power_psc0_enable()Enable the Power Stage Controller 0 module.AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B
    power_psc0_disable()Disable the Power Stage Controller 0 module.AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B
    power_psc1_enable()Enable the Power Stage Controller 1 module.AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B
    power_psc1_disable()Disable the Power Stage Controller 1 module.AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B
    power_psc2_enable()Enable the Power Stage Controller 2 module.AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B
    power_psc2_disable()Disable the Power Stage Controller 2 module.AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B
    power_spi_enable()Enable the Serial Peripheral Interface module.ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, ATmega165, ATmega165P, ATmega325, ATmega3250, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega3290, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega48, ATmega88, ATmega168
    power_spi_disable()Disable the Serial Peripheral Interface module.ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, ATmega165, ATmega165P, ATmega325, ATmega3250, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega3290, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega48, ATmega88, ATmega168
    power_timer0_enable()Enable the Timer 0 module.ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM216, AT90PWM316, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, ATmega165, ATmega165P, ATmega325, ATmega3250, ATmega645, ATmega6450, ATmega164P, ATmega324P, ATmega644, ATmega406, ATmega48, ATmega88, ATmega168, ATtiny24, ATtiny44, ATtiny84, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861
    power_timer0_disable()Disable the Timer 0 module.ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, ATmega165, ATmega165P, ATmega325, ATmega3250, ATmega645, ATmega6450, ATmega164P, ATmega324P, ATmega644, ATmega406, ATmega48, ATmega88, ATmega168, ATtiny24, ATtiny44, ATtiny84, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861
    power_timer1_enable()Enable the Timer 1 module.ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, ATmega165, ATmega165P, ATmega325, ATmega3250, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega3290, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega406, ATmega48, ATmega88, ATmega168, ATtiny24, ATtiny44, ATtiny84, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861
    power_timer1_disable()Disable the Timer 1 module.ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, ATmega165, ATmega165P, ATmega325, ATmega3250, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega3290, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega406, ATmega48, ATmega88, ATmega168, ATtiny24, ATtiny44, ATtiny84, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861
    power_timer2_enable()Enable the Timer 2 module.ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega164P, ATmega324P, ATmega644, ATmega48, ATmega88, ATmega168
    power_timer2_disable()Disable the Timer 2 module.ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega164P, ATmega324P, ATmega644, ATmega48, ATmega88, ATmega168
    power_timer3_enable()Enable the Timer 3 module.ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287
    power_timer3_disable()Disable the Timer 3 module.ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287
    power_timer4_enable()Enable the Timer 4 module.ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561
    power_timer4_disable()Disable the Timer 4 module.ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561
    power_timer5_enable()Enable the Timer 5 module.ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561
    power_timer5_disable()Disable the Timer 5 module.ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561
    power_twi_enable()Enable the Two Wire Interface module.ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega164P, ATmega324P, ATmega644, ATmega406, ATmega48, ATmega88, ATmega168
    power_twi_disable()Disable the Two Wire Interface module.ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega164P, ATmega324P, ATmega644, ATmega406, ATmega48, ATmega88, ATmega168
    power_usart_enable()Enable the USART module.AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B
    power_usart_disable()Disable the USART module.AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B
    power_usart0_enable()Enable the USART 0 module.ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega165, ATmega165P, ATmega325, ATmega3250, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega3290, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega48, ATmega88, ATmega168
    power_usart0_disable()Disable the USART 0 module.ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, ATmega165, ATmega165P, ATmega325, ATmega3250, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega3290, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega48, ATmega88, ATmega168
    power_usart1_enable()Enable the USART 1 module.ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega164P, ATmega324P
    power_usart1_disable()Disable the USART 1 module.ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega164P, ATmega324P
    power_usart2_enable()Enable the USART 2 module.ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561
    power_usart2_disable()Disable the USART 2 module.ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561
    power_usart3_enable()Enable the USART 3 module.ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561
    power_usart3_disable()Disable the USART 3 module.ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561
    power_usb_enable()Enable the USB module.AT90USB646, AT90USB647, AT90USB1286, AT90USB1287
    power_usb_disable()Disable the USB module.AT90USB646, AT90USB647, AT90USB1286, AT90USB1287
    power_usi_enable()Enable the Universal Serial Interface module.ATtiny24, ATtiny44, ATtiny84, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861
    power_usi_disable()Disable the Universal Serial Interface module.ATtiny24, ATtiny44, ATtiny84, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861
    power_vadc_enable()Enable the Voltage ADC module.ATmega406
    power_vadc_disable()Disable the Voltage ADC module.ATmega406
    power_all_enable()Enable all modules.ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, ATmega165, ATmega165P, ATmega325, ATmega3250, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega3290, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega406, ATmega48, ATmega88, ATmega168, ATtiny24, ATtiny44, ATtiny84, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861
    power_all_disable()Disable all modules.ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, ATmega165, ATmega165P, ATmega325, ATmega3250, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega3290, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega406, ATmega48, ATmega88, ATmega168, ATtiny24, ATtiny44, ATtiny84, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861
    -
    -     - -@} */ - - -#if defined(__AVR_ATxmega64a1) \ -|| defined(__AVR_ATxmega64a3) \ -|| defined(__AVR_ATxmega128a1__) \ -|| defined(__AVR_ATxmega128a3__) \ -|| defined(__AVR_ATxmega256a3__) \ -|| defined(__AVR_ATxmega256a3b__) - -/* -#define power_aes_enable() (PR_PR &= (uint8_t)~(PR_AES_bm)) -#define power_aes_disable() (PR_PR |= (uint8_t)PR_AES_bm) -*/ - -#define power_ebi_enable() (PR_PR &= (uint8_t)~(PR_EBI_bm)) -#define power_ebi_disable() (PR_PR |= (uint8_t)PR_EBI_bm) - -#define power_rtc_enable() (PR_PR &= (uint8_t)~(PR_RTC_bm)) -#define power_rtc_disable() (PR_PR |= (uint8_t)PR_RTC_bm) - -#define power_evsys_enable() (PR_PR &= (uint8_t)~(PR_EVSYS_bm)) -#define power_evsys_disable() (PR_PR |= (uint8_t)PR_EVSYS_bm) - -#define power_dma_enable() (PR_PR &= (uint8_t)~(PR_DMA_bm)) -#define power_dma_disable() (PR_PR |= (uint8_t)PR_DMA_bm) - -#define power_daca_enable() (PR_PRPA &= (uint8_t)~(PR_DAC_bm)) -#define power_daca_disable() (PR_PRPA |= (uint8_t)PR_DAC_bm) -#define power_dacb_enable() (PR_PRPB &= (uint8_t)~(PR_DAC_bm)) -#define power_dacb_disable() (PR_PRPB |= (uint8_t)PR_DAC_bm) - -#define power_adca_enable() (PR_PRPA &= (uint8_t)~(PR_ADC_bm)) -#define power_adca_disable() (PR_PRPA |= (uint8_t)PR_ADC_bm) -#define power_adcb_enable() (PR_PRPB &= (uint8_t)~(PR_ADC_bm)) -#define power_adcb_disable() (PR_PRPB |= (uint8_t)PR_ADC_bm) - -#define power_aca_enable() (PR_PRPA &= (uint8_t)~(PR_AC_bm)) -#define power_aca_disable() (PR_PRPA |= (uint8_t)PR_AC_bm) -#define power_acb_enable() (PR_PRPB &= (uint8_t)~(PR_AC_bm)) -#define power_acb_disable() (PR_PRPB |= (uint8_t)PR_AC_bm) - -#define power_twic_enable() (PR_PRPC &= (uint8_t)~(PR_TWI_bm)) -#define power_twic_disable() (PR_PRPC |= (uint8_t)PR_TWI_bm) -#define power_twid_enable() (PR_PRPD &= (uint8_t)~(PR_TWI_bm)) -#define power_twid_disable() (PR_PRPD |= (uint8_t)PR_TWI_bm) -#define power_twie_enable() (PR_PRPE &= (uint8_t)~(PR_TWI_bm)) -#define power_twie_disable() (PR_PRPE |= (uint8_t)PR_TWI_bm) -#define power_twif_enable() (PR_PRPF &= (uint8_t)~(PR_TWI_bm)) -#define power_twif_disable() (PR_PRPF |= (uint8_t)PR_TWI_bm) - -#define power_usartc1_enable() (PR_PRPC &= (uint8_t)~(PR_USART1_bm)) -#define power_usartc1_disable() (PR_PRPC |= (uint8_t)PR_USART1_bm) -#define power_usartd1_enable() (PR_PRPD &= (uint8_t)~(PR_USART1_bm)) -#define power_usartd1_disable() (PR_PRPD |= (uint8_t)PR_USART1_bm) -#define power_usarte1_enable() (PR_PRPE &= (uint8_t)~(PR_USART1_bm)) -#define power_usarte1_disable() (PR_PRPE |= (uint8_t)PR_USART1_bm) -#define power_usartf1_enable() (PR_PRPF &= (uint8_t)~(PR_USART1_bm)) -#define power_usartf1_disable() (PR_PRPF |= (uint8_t)PR_USART1_bm) - -#define power_usartc0_enable() (PR_PRPC &= (uint8_t)~(PR_USART0_bm)) -#define power_usartc0_disable() (PR_PRPC |= (uint8_t)PR_USART0_bm) -#define power_usartd0_enable() (PR_PRPD &= (uint8_t)~(PR_USART0_bm)) -#define power_usartd0_disable() (PR_PRPD |= (uint8_t)PR_USART0_bm) -#define power_usarte0_enable() (PR_PRPE &= (uint8_t)~(PR_USART0_bm)) -#define power_usarte0_disable() (PR_PRPE |= (uint8_t)PR_USART0_bm) -#define power_usartf0_enable() (PR_PRPF &= (uint8_t)~(PR_USART0_bm)) -#define power_usartf0_disable() (PR_PRPF |= (uint8_t)PR_USART0_bm) - -#define power_spic_enable() (PR_PRPC &= (uint8_t)~(PR_SPI_bm)) -#define power_spic_disable() (PR_PRPC |= (uint8_t)PR_SPI_bm) -#define power_spid_enable() (PR_PRPD &= (uint8_t)~(PR_SPI_bm)) -#define power_spid_disable() (PR_PRPD |= (uint8_t)PR_SPI_bm) -#define power_spie_enable() (PR_PRPE &= (uint8_t)~(PR_SPI_bm)) -#define power_spie_disable() (PR_PRPE |= (uint8_t)PR_SPI_bm) -#define power_spif_enable() (PR_PRPF &= (uint8_t)~(PR_SPI_bm)) -#define power_spif_disable() (PR_PRPF |= (uint8_t)PR_SPI_bm) - -#define power_hiresc_enable() (PR_PRPC &= (uint8_t)~(PR_HIRES_bm)) -#define power_hiresc_disable() (PR_PRPC |= (uint8_t)PR_HIRES_bm) -#define power_hiresd_enable() (PR_PRPD &= (uint8_t)~(PR_HIRES_bm)) -#define power_hiresd_disable() (PR_PRPD |= (uint8_t)PR_HIRES_bm) -#define power_hirese_enable() (PR_PRPE &= (uint8_t)~(PR_HIRES_bm)) -#define power_hirese_disable() (PR_PRPE |= (uint8_t)PR_HIRES_bm) -#define power_hiresf_enable() (PR_PRPF &= (uint8_t)~(PR_HIRES_bm)) -#define power_hiresf_disable() (PR_PRPF |= (uint8_t)PR_HIRES_bm) - -#define power_tc1c_enable() (PR_PRPC &= (uint8_t)~(PR_TC1_bm)) -#define power_tc1c_disable() (PR_PRPC |= (uint8_t)PR_TC1_bm) -#define power_tc1d_enable() (PR_PRPD &= (uint8_t)~(PR_TC1_bm)) -#define power_tc1d_disable() (PR_PRPD |= (uint8_t)PR_TC1_bm) -#define power_tc1e_enable() (PR_PRPE &= (uint8_t)~(PR_TC1_bm)) -#define power_tc1e_disable() (PR_PRPE |= (uint8_t)PR_TC1_bm) -#define power_tc1f_enable() (PR_PRPF &= (uint8_t)~(PR_TC1_bm)) -#define power_tc1f_disable() (PR_PRPF |= (uint8_t)PR_TC1_bm) - -#define power_tc0c_enable() (PR_PRPC &= (uint8_t)~(PR_TC0_bm)) -#define power_tc0c_disable() (PR_PRPC |= (uint8_t)PR_TC0_bm) -#define power_tc0d_enable() (PR_PRPD &= (uint8_t)~(PR_TC0_bm)) -#define power_tc0d_disable() (PR_PRPD |= (uint8_t)PR_TC0_bm) -#define power_tc0e_enable() (PR_PRPE &= (uint8_t)~(PR_TC0_bm)) -#define power_tc0e_disable() (PR_PRPE |= (uint8_t)PR_TC0_bm) -#define power_tc0f_enable() (PR_PRPF &= (uint8_t)~(PR_TC0_bm)) -#define power_tc0f_disable() (PR_PRPF |= (uint8_t)PR_TC0_bm) - -#define power_all_enable() \ -do { \ - /* PR_PR &= (uint8_t)~(PR_AES_bm|PR_EBI_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm); */ \ - PR_PR &= (uint8_t)~(PR_EBI_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm); \ - PR_PRPA &= (uint8_t)~(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \ - PR_PRPB &= (uint8_t)~(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \ - PR_PRPC &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \ - PR_PRPD &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \ - PR_PRPE &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \ - PR_PRPF &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \ -} while(0) - - -#define power_all_disable() \ -do { \ - /* PM_PR_PR |= (uint8_t)(PR_AES_bm|PR_EBI_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm); */ \ - PR_PR |= (uint8_t)(PR_EBI_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm); \ - PR_PRPA |= (uint8_t)(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \ - PR_PRPB |= (uint8_t)(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \ - PR_PRPC |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \ - PR_PRPD |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \ - PR_PRPE |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \ - PR_PRPF |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \ -} while(0) - - -#elif defined(__AVR_ATmega640__) \ -|| defined(__AVR_ATmega1280__) \ -|| defined(__AVR_ATmega1281__) \ -|| defined(__AVR_ATmega2560__) \ -|| defined(__AVR_ATmega2561__) - -#define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC)) -#define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC)) - -#define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI)) -#define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI)) - -#define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI)) -#define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI)) - -#define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0)) -#define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0)) - -#define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1)) -#define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1)) - -#define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2)) -#define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2)) - -#define power_timer3_enable() (PRR1 &= (uint8_t)~(1 << PRTIM3)) -#define power_timer3_disable() (PRR1 |= (uint8_t)(1 << PRTIM3)) - -#define power_timer4_enable() (PRR1 &= (uint8_t)~(1 << PRTIM4)) -#define power_timer4_disable() (PRR1 |= (uint8_t)(1 << PRTIM4)) - -#define power_timer5_enable() (PRR1 &= (uint8_t)~(1 << PRTIM5)) -#define power_timer5_disable() (PRR1 |= (uint8_t)(1 << PRTIM5)) - -#define power_usart0_enable() (PRR0 &= (uint8_t)~(1 << PRUSART0)) -#define power_usart0_disable() (PRR0 |= (uint8_t)(1 << PRUSART0)) - -#define power_usart1_enable() (PRR1 &= (uint8_t)~(1 << PRUSART1)) -#define power_usart1_disable() (PRR1 |= (uint8_t)(1 << PRUSART1)) - -#define power_usart2_enable() (PRR1 &= (uint8_t)~(1 << PRUSART2)) -#define power_usart2_disable() (PRR1 |= (uint8_t)(1 << PRUSART2)) - -#define power_usart3_enable() (PRR1 &= (uint8_t)~(1 << PRUSART3)) -#define power_usart3_disable() (PRR1 |= (uint8_t)(1 << PRUSART3)) - -#define power_all_enable() \ -do{ \ - PRR0 &= (uint8_t)~((1< - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* avr/sfr_defs.h - macros for accessing AVR special function registers */ - -/* $Id: sfr_defs.h,v 1.18.2.1 2008/04/28 22:05:42 arcanum Exp $ */ - -#ifndef _AVR_SFR_DEFS_H_ -#define _AVR_SFR_DEFS_H_ 1 - -/** \defgroup avr_sfr_notes Additional notes from - \ingroup avr_sfr - - The \c file is included by all of the \c - files, which use macros defined here to make the special function register - definitions look like C variables or simple constants, depending on the - _SFR_ASM_COMPAT define. Some examples from \c to - show how to define such macros: - -\code -#define PORTA _SFR_IO8(0x02) -#define EEAR _SFR_IO16(0x21) -#define UDR0 _SFR_MEM8(0xC6) -#define TCNT3 _SFR_MEM16(0x94) -#define CANIDT _SFR_MEM32(0xF0) -\endcode - - If \c _SFR_ASM_COMPAT is not defined, C programs can use names like - PORTA directly in C expressions (also on the left side of - assignment operators) and GCC will do the right thing (use short I/O - instructions if possible). The \c __SFR_OFFSET definition is not used in - any way in this case. - - Define \c _SFR_ASM_COMPAT as 1 to make these names work as simple constants - (addresses of the I/O registers). This is necessary when included in - preprocessed assembler (*.S) source files, so it is done automatically if - \c __ASSEMBLER__ is defined. By default, all addresses are defined as if - they were memory addresses (used in \c lds/sts instructions). To use these - addresses in \c in/out instructions, you must subtract 0x20 from them. - - For more backwards compatibility, insert the following at the start of your - old assembler source file: - -\code -#define __SFR_OFFSET 0 -\endcode - - This automatically subtracts 0x20 from I/O space addresses, but it's a - hack, so it is recommended to change your source: wrap such addresses in - macros defined here, as shown below. After this is done, the - __SFR_OFFSET definition is no longer necessary and can be removed. - - Real example - this code could be used in a boot loader that is portable - between devices with \c SPMCR at different addresses. - -\verbatim -: #define SPMCR _SFR_IO8(0x37) -: #define SPMCR _SFR_MEM8(0x68) -\endverbatim - -\code -#if _SFR_IO_REG_P(SPMCR) - out _SFR_IO_ADDR(SPMCR), r24 -#else - sts _SFR_MEM_ADDR(SPMCR), r24 -#endif -\endcode - - You can use the \c in/out/cbi/sbi/sbic/sbis instructions, without the - _SFR_IO_REG_P test, if you know that the register is in the I/O - space (as with \c SREG, for example). If it isn't, the assembler will - complain (I/O address out of range 0...0x3f), so this should be fairly - safe. - - If you do not define \c __SFR_OFFSET (so it will be 0x20 by default), all - special register addresses are defined as memory addresses (so \c SREG is - 0x5f), and (if code size and speed are not important, and you don't like - the ugly \#if above) you can always use lds/sts to access them. But, this - will not work if __SFR_OFFSET != 0x20, so use a different macro - (defined only if __SFR_OFFSET == 0x20) for safety: - -\code - sts _SFR_ADDR(SPMCR), r24 -\endcode - - In C programs, all 3 combinations of \c _SFR_ASM_COMPAT and - __SFR_OFFSET are supported - the \c _SFR_ADDR(SPMCR) macro can be - used to get the address of the \c SPMCR register (0x57 or 0x68 depending on - device). */ - -#ifdef __ASSEMBLER__ -#define _SFR_ASM_COMPAT 1 -#elif !defined(_SFR_ASM_COMPAT) -#define _SFR_ASM_COMPAT 0 -#endif - -#ifndef __ASSEMBLER__ -/* These only work in C programs. */ -#include - -#define _MMIO_BYTE(mem_addr) (*(volatile uint8_t *)(mem_addr)) -#define _MMIO_WORD(mem_addr) (*(volatile uint16_t *)(mem_addr)) -#define _MMIO_DWORD(mem_addr) (*(volatile uint32_t *)(mem_addr)) -#endif - -#if _SFR_ASM_COMPAT - -#ifndef __SFR_OFFSET -/* Define as 0 before including this file for compatibility with old asm - sources that don't subtract __SFR_OFFSET from symbolic I/O addresses. */ -# if __AVR_ARCH__ >= 100 -# define __SFR_OFFSET 0x00 -# else -# define __SFR_OFFSET 0x20 -# endif -#endif - -#if (__SFR_OFFSET != 0) && (__SFR_OFFSET != 0x20) -#error "__SFR_OFFSET must be 0 or 0x20" -#endif - -#define _SFR_MEM8(mem_addr) (mem_addr) -#define _SFR_MEM16(mem_addr) (mem_addr) -#define _SFR_MEM32(mem_addr) (mem_addr) -#define _SFR_IO8(io_addr) ((io_addr) + __SFR_OFFSET) -#define _SFR_IO16(io_addr) ((io_addr) + __SFR_OFFSET) - -#define _SFR_IO_ADDR(sfr) ((sfr) - __SFR_OFFSET) -#define _SFR_MEM_ADDR(sfr) (sfr) -#define _SFR_IO_REG_P(sfr) ((sfr) < 0x40 + __SFR_OFFSET) - -#if (__SFR_OFFSET == 0x20) -/* No need to use ?: operator, so works in assembler too. */ -#define _SFR_ADDR(sfr) _SFR_MEM_ADDR(sfr) -#elif !defined(__ASSEMBLER__) -#define _SFR_ADDR(sfr) (_SFR_IO_REG_P(sfr) ? (_SFR_IO_ADDR(sfr) + 0x20) : _SFR_MEM_ADDR(sfr)) -#endif - -#else /* !_SFR_ASM_COMPAT */ - -#ifndef __SFR_OFFSET -# if __AVR_ARCH__ >= 100 -# define __SFR_OFFSET 0x00 -# else -# define __SFR_OFFSET 0x20 -# endif -#endif - -#define _SFR_MEM8(mem_addr) _MMIO_BYTE(mem_addr) -#define _SFR_MEM16(mem_addr) _MMIO_WORD(mem_addr) -#define _SFR_MEM32(mem_addr) _MMIO_DWORD(mem_addr) -#define _SFR_IO8(io_addr) _MMIO_BYTE((io_addr) + __SFR_OFFSET) -#define _SFR_IO16(io_addr) _MMIO_WORD((io_addr) + __SFR_OFFSET) - -#define _SFR_MEM_ADDR(sfr) ((uint16_t) &(sfr)) -#define _SFR_IO_ADDR(sfr) (_SFR_MEM_ADDR(sfr) - __SFR_OFFSET) -#define _SFR_IO_REG_P(sfr) (_SFR_MEM_ADDR(sfr) < 0x40 + __SFR_OFFSET) - -#define _SFR_ADDR(sfr) _SFR_MEM_ADDR(sfr) - -#endif /* !_SFR_ASM_COMPAT */ - -#define _SFR_BYTE(sfr) _MMIO_BYTE(_SFR_ADDR(sfr)) -#define _SFR_WORD(sfr) _MMIO_WORD(_SFR_ADDR(sfr)) -#define _SFR_DWORD(sfr) _MMIO_DWORD(_SFR_ADDR(sfr)) - -/** \name Bit manipulation */ - -/*@{*/ -/** \def _BV - \ingroup avr_sfr - - \code #include \endcode - - Converts a bit number into a byte value. - - \note The bit shift is performed by the compiler which then inserts the - result into the code. Thus, there is no run-time overhead when using - _BV(). */ - -#define _BV(bit) (1 << (bit)) - -/*@}*/ - -#ifndef _VECTOR -#define _VECTOR(N) __vector_ ## N -#endif - -#ifndef __ASSEMBLER__ - - -/** \name IO register bit manipulation */ - -/*@{*/ - - - -/** \def bit_is_set - \ingroup avr_sfr - - \code #include \endcode - - Test whether bit \c bit in IO register \c sfr is set. - This will return a 0 if the bit is clear, and non-zero - if the bit is set. */ - -#define bit_is_set(sfr, bit) (_SFR_BYTE(sfr) & _BV(bit)) - -/** \def bit_is_clear - \ingroup avr_sfr - - \code #include \endcode - - Test whether bit \c bit in IO register \c sfr is clear. - This will return non-zero if the bit is clear, and a 0 - if the bit is set. */ - -#define bit_is_clear(sfr, bit) (!(_SFR_BYTE(sfr) & _BV(bit))) - -/** \def loop_until_bit_is_set - \ingroup avr_sfr - - \code #include \endcode - - Wait until bit \c bit in IO register \c sfr is set. */ - -#define loop_until_bit_is_set(sfr, bit) do { } while (bit_is_clear(sfr, bit)) - -/** \def loop_until_bit_is_clear - \ingroup avr_sfr - - \code #include \endcode - - Wait until bit \c bit in IO register \c sfr is clear. */ - -#define loop_until_bit_is_clear(sfr, bit) do { } while (bit_is_set(sfr, bit)) - -/*@}*/ - -#endif /* !__ASSEMBLER__ */ - -#endif /* _SFR_DEFS_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/signal.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/signal.h deleted file mode 100644 index a7a7bcf65..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/signal.h +++ /dev/null @@ -1,39 +0,0 @@ -/* Copyright (c) 2002,2005,2006 Marek Michalkiewicz - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: signal.h,v 1.12 2006/02/02 19:37:16 aesok Exp $ */ - -#ifndef _AVR_SIGNAL_H_ -#define _AVR_SIGNAL_H_ - -#warning "This header file is obsolete. Use ." -#include - -#endif /* _AVR_SIGNAL_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/sleep.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/sleep.h deleted file mode 100644 index 06a96ed0e..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/sleep.h +++ /dev/null @@ -1,456 +0,0 @@ -/* Copyright (c) 2002, 2004 Theodore A. Roth - Copyright (c) 2004, 2007, 2008 Eric B. Weddington - Copyright (c) 2005, 2006, 2007 Joerg Wunsch - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: sleep.h,v 1.17.2.10 2008/11/06 14:55:34 arcanum Exp $ */ - -#ifndef _AVR_SLEEP_H_ -#define _AVR_SLEEP_H_ 1 - -#include -#include - - -/** \file */ - -/** \defgroup avr_sleep : Power Management and Sleep Modes - - \code #include \endcode - - Use of the \c SLEEP instruction can allow an application to reduce its - power comsumption considerably. AVR devices can be put into different - sleep modes. Refer to the datasheet for the details relating to the device - you are using. - - There are several macros provided in this header file to actually - put the device into sleep mode. The simplest way is to optionally - set the desired sleep mode using \c set_sleep_mode() (it usually - defaults to idle mode where the CPU is put on sleep but all - peripheral clocks are still running), and then call - \c sleep_mode(). This macro automatically sets the sleep enable bit, goes - to sleep, and clears the sleep enable bit. - - Example: - \code - #include - - ... - set_sleep_mode(); - sleep_mode(); - \endcode - - Note that unless your purpose is to completely lock the CPU (until a - hardware reset), interrupts need to be enabled before going to sleep. - - As the \c sleep_mode() macro might cause race conditions in some - situations, the individual steps of manipulating the sleep enable - (SE) bit, and actually issuing the \c SLEEP instruction, are provided - in the macros \c sleep_enable(), \c sleep_disable(), and - \c sleep_cpu(). This also allows for test-and-sleep scenarios that - take care of not missing the interrupt that will awake the device - from sleep. - - Example: - \code - #include - #include - - ... - set_sleep_mode(); - cli(); - if (some_condition) - { - sleep_enable(); - sei(); - sleep_cpu(); - sleep_disable(); - } - sei(); - \endcode - - This sequence ensures an atomic test of \c some_condition with - interrupts being disabled. If the condition is met, sleep mode - will be prepared, and the \c SLEEP instruction will be scheduled - immediately after an \c SEI instruction. As the intruction right - after the \c SEI is guaranteed to be executed before an interrupt - could trigger, it is sure the device will really be put to sleep. -*/ - - -/* Define an internal sleep control register and an internal sleep enable bit mask. */ -#if defined(SLEEP_CTRL) - - /* XMEGA devices */ - #define _SLEEP_CONTROL_REG SLEEP_CTRL - #define _SLEEP_ENABLE_MASK SLEEP_SEN_bm - -#elif defined(SMCR) - - #define _SLEEP_CONTROL_REG SMCR - #define _SLEEP_ENABLE_MASK _BV(SE) - -#elif defined(__AVR_AT94K__) - - #define _SLEEP_CONTROL_REG MCUR - #define _SLEEP_ENABLE_MASK _BV(SE) - -#else - - #define _SLEEP_CONTROL_REG MCUCR - #define _SLEEP_ENABLE_MASK _BV(SE) - -#endif - - -/* Define set_sleep_mode() and sleep mode values per device. */ -#if defined(__AVR_ATmega161__) - - #define SLEEP_MODE_IDLE 0 - #define SLEEP_MODE_PWR_DOWN 1 - #define SLEEP_MODE_PWR_SAVE 2 - - #define set_sleep_mode(mode) \ - do { \ - MCUCR = ((MCUCR & ~_BV(SM1)) | ((mode) == SLEEP_MODE_PWR_DOWN || (mode) == SLEEP_MODE_PWR_SAVE ? _BV(SM1) : 0)); \ - EMCUCR = ((EMCUCR & ~_BV(SM0)) | ((mode) == SLEEP_MODE_PWR_SAVE ? _BV(SM0) : 0)); \ - } while(0) - - -#elif defined(__AVR_ATmega162__) \ -|| defined(__AVR_ATmega8515__) - - #define SLEEP_MODE_IDLE 0 - #define SLEEP_MODE_PWR_DOWN 1 - #define SLEEP_MODE_PWR_SAVE 2 - #define SLEEP_MODE_ADC 3 - #define SLEEP_MODE_STANDBY 4 - #define SLEEP_MODE_EXT_STANDBY 5 - - #define set_sleep_mode(mode) \ - do { \ - MCUCR = ((MCUCR & ~_BV(SM1)) | ((mode) == SLEEP_MODE_IDLE ? 0 : _BV(SM1))); \ - MCUCSR = ((MCUCSR & ~_BV(SM2)) | ((mode) == SLEEP_MODE_STANDBY || (mode) == SLEEP_MODE_EXT_STANDBY ? _BV(SM2) : 0)); \ - EMCUCR = ((EMCUCR & ~_BV(SM0)) | ((mode) == SLEEP_MODE_PWR_SAVE || (mode) == SLEEP_MODE_EXT_STANDBY ? _BV(SM0) : 0)); \ - } while(0) - -#elif defined(__AVR_AT90S2313__) \ -|| defined(__AVR_AT90S2323__) \ -|| defined(__AVR_AT90S2333__) \ -|| defined(__AVR_AT90S2343__) \ -|| defined(__AVR_AT43USB320__) \ -|| defined(__AVR_AT43USB355__) \ -|| defined(__AVR_AT90S4414__) \ -|| defined(__AVR_AT90S4433__) \ -|| defined(__AVR_AT90S8515__) \ -|| defined(__AVR_ATtiny22__) - - #define SLEEP_MODE_IDLE 0 - #define SLEEP_MODE_PWR_DOWN _BV(SM) - - #define set_sleep_mode(mode) \ - do { \ - _SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~__BV(SM)) | (mode)); \ - } while(0) - -#elif defined(__AVR_ATtiny167__) - - #define SLEEP_MODE_IDLE 0 - #define SLEEP_MODE_ADC _BV(SM0) - #define SLEEP_MODE_PWR_DOWN _BV(SM1) - - #define set_sleep_mode(mode) \ - do { \ - _SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1))) | (mode)); \ - } while(0) - -#elif defined(__AVR_AT90S4434__) \ -|| defined(__AVR_AT76C711__) \ -|| defined(__AVR_AT90S8535__) \ -|| defined(__AVR_ATmega103__) \ -|| defined(__AVR_ATmega161__) \ -|| defined(__AVR_ATmega163__) \ -|| defined(__AVR_ATtiny13__) \ -|| defined(__AVR_ATtiny13A__) \ -|| defined(__AVR_ATtiny15__) \ -|| defined(__AVR_ATtiny24__) \ -|| defined(__AVR_ATtiny44__) \ -|| defined(__AVR_ATtiny84__) \ -|| defined(__AVR_ATtiny25__) \ -|| defined(__AVR_ATtiny45__) \ -|| defined(__AVR_ATtiny48__) \ -|| defined(__AVR_ATtiny85__) \ -|| defined(__AVR_ATtiny261__) \ -|| defined(__AVR_ATtiny461__) \ -|| defined(__AVR_ATtiny861__) \ -|| defined(__AVR_ATtiny88__) - - #define SLEEP_MODE_IDLE 0 - #define SLEEP_MODE_ADC _BV(SM0) - #define SLEEP_MODE_PWR_DOWN _BV(SM1) - #define SLEEP_MODE_PWR_SAVE (_BV(SM0) | _BV(SM1)) - - #define set_sleep_mode(mode) \ - do { \ - _SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1))) | (mode)); \ - } while(0) - -#elif defined(__AVR_ATtiny2313__) - - #define SLEEP_MODE_IDLE 0 - #define SLEEP_MODE_PWR_DOWN (_BV(SM0) | _BV(SM1)) - #define SLEEP_MODE_STANDBY _BV(SM1) - - #define set_sleep_mode(mode) \ - do { \ - _SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1))) | (mode)); \ - } while(0) - -#elif defined(__AVR_AT94K__) - - #define SLEEP_MODE_IDLE 0 - #define SLEEP_MODE_PWR_DOWN _BV(SM1) - #define SLEEP_MODE_PWR_SAVE (_BV(SM0) | _BV(SM1)) - - #define set_sleep_mode(mode) \ - do { \ - _SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1))) | (mode)); \ - } while(0) - -#elif defined(__AVR_ATtiny26__) \ -|| defined(__AVR_ATtiny43U__) - - #define SLEEP_MODE_IDLE 0 - #define SLEEP_MODE_ADC _BV(SM0) - #define SLEEP_MODE_PWR_DOWN _BV(SM1) - #define SLEEP_MODE_STANDBY (_BV(SM0) | _BV(SM1)) - - #define set_sleep_mode(mode) \ - do { \ - _SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1))) | (mode)); \ - } while(0) - -#elif defined(__AVR_AT90PWM216__) \ -|| defined(__AVR_AT90PWM316__) - - #define SLEEP_MODE_IDLE 0 - #define SLEEP_MODE_ADC _BV(SM0) - #define SLEEP_MODE_PWR_DOWN _BV(SM1) - #define SLEEP_MODE_STANDBY (_BV(SM1) | _BV(SM2)) - - #define set_sleep_mode(mode) \ - do { \ - _SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1) | _BV(SM2))) | (mode)); \ - } while(0) - -#elif \ -defined(__AVR_AT90PWM1__) \ -|| defined(__AVR_AT90PWM2__) \ -|| defined(__AVR_AT90PWM2B__) \ -|| defined(__AVR_AT90PWM3__) \ -|| defined(__AVR_AT90PWM3B__) \ -|| defined(__AVR_ATmega128__) \ -|| defined(__AVR_ATmega16__) \ -|| defined(__AVR_ATmega162__) \ -|| defined(__AVR_ATmega165__) \ -|| defined(__AVR_ATmega165P__) \ -|| defined(__AVR_ATmega169__) \ -|| defined(__AVR_ATmega169P__) \ -|| defined(__AVR_ATmega32__) \ -|| defined(__AVR_ATmega323__) \ -|| defined(__AVR_ATmega325__) \ -|| defined(__AVR_ATmega3250__) \ -|| defined(__AVR_ATmega329__) \ -|| defined(__AVR_ATmega3290__) \ -|| defined(__AVR_ATmega3290P__) \ -|| defined(__AVR_ATmega406__) \ -|| defined(__AVR_ATmega64__) \ -|| defined(__AVR_ATmega645__) \ -|| defined(__AVR_ATmega6450__) \ -|| defined(__AVR_ATmega649__) \ -|| defined(__AVR_ATmega6490__) \ -|| defined(__AVR_ATmega8__) \ -|| defined(__AVR_ATmega8515__) \ -|| defined(__AVR_ATmega8535__) \ -|| defined(__AVR_AT90CAN128__) \ -|| defined(__AVR_AT90CAN32__) \ -|| defined(__AVR_AT90CAN64__) \ -|| defined(__AVR_ATmega1280__) \ -|| defined(__AVR_ATmega1281__) \ -|| defined(__AVR_ATmega1284P__) \ -|| defined(__AVR_ATmega2560__) \ -|| defined(__AVR_ATmega2561__) \ -|| defined(__AVR_ATmega640__) \ -|| defined(__AVR_ATmega164P__) \ -|| defined(__AVR_ATmega324P__) \ -|| defined(__AVR_ATmega644__) \ -|| defined(__AVR_ATmega644P__) \ -|| defined(__AVR_ATmega16HVA__) \ -|| defined(__AVR_ATmega8HVA__) \ -|| defined(__AVR_ATmega32HVB__) \ -|| defined(__AVR_AT90USB162__) \ -|| defined(__AVR_AT90USB82__) \ -|| defined(__AVR_AT90USB1286__) \ -|| defined(__AVR_AT90USB1287__) \ -|| defined(__AVR_AT90USB646__) \ -|| defined(__AVR_AT90USB647__) \ -|| defined(__AVR_ATmega168__) \ -|| defined(__AVR_ATmega48__) \ -|| defined(__AVR_ATmega88__) \ -|| defined(__AVR_ATmega32C1__) \ -|| defined(__AVR_ATmega32M1__) \ -|| defined(__AVR_ATmega32U4__) \ -|| defined(__AVR_ATmega32U6__) \ -|| defined(__AVR_ATmega48P__) \ -|| defined(__AVR_ATmega88P__) \ -|| defined(__AVR_ATmega168P__) \ -|| defined(__AVR_ATmega328P__) - - #define SLEEP_MODE_IDLE (0) - #define SLEEP_MODE_ADC _BV(SM0) - #define SLEEP_MODE_PWR_DOWN _BV(SM1) - #define SLEEP_MODE_PWR_SAVE (_BV(SM0) | _BV(SM1)) - #define SLEEP_MODE_STANDBY (_BV(SM1) | _BV(SM2)) - #define SLEEP_MODE_EXT_STANDBY (_BV(SM0) | _BV(SM1) | _BV(SM2)) - - - #define set_sleep_mode(mode) \ - do { \ - _SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1) | _BV(SM2))) | (mode)); \ - } while(0) - -#elif defined(__AVR_ATxmega64A1__) \ -|| defined(__AVR_ATxmega64A3__) \ -|| defined(__AVR_ATxmega128A1__) \ -|| defined(__AVR_ATxmega128A3__) \ -|| defined(__AVR_ATxmega256A3__) \ -|| defined(__AVR_ATxmega256A3B__) - - #define SLEEP_MODE_IDLE (0) - #define SLEEP_MODE_PWR_DOWN (SLEEP_SMODE1_bm) - #define SLEEP_MODE_PWR_SAVE (SLEEP_SMODE1_bm | SLEEP_SMODE0_bm) - #define SLEEP_MODE_STANDBY (SLEEP_SMODE2_bm | SLEEP_SMODE1_bm) - #define SLEEP_MODE_EXT_STANDBY (SLEEP_SMODE2_bm | SLEEP_SMODE1_bm | SLEEP_SMODE0_bm) - - #define set_sleep_mode(mode) \ - do { \ - _SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(SLEEP_SMODE2_bm | SLEEP_SMODE1_bm | SLEEP_SMODE0_bm)) | (mode)); \ - } while(0) - -#else - - #error "No SLEEP mode defined for this device." - -#endif - - - -/** \ingroup avr_sleep - - Put the device in sleep mode. How the device is brought out of sleep mode - depends on the specific mode selected with the set_sleep_mode() function. - See the data sheet for your device for more details. */ - - -#if defined(__DOXYGEN__) - -/** \ingroup avr_sleep - - Set the SE (sleep enable) bit. -*/ -extern void sleep_enable (void); - -#else - -#define sleep_enable() \ -do { \ - _SLEEP_CONTROL_REG |= (uint8_t)_SLEEP_ENABLE_MASK; \ -} while(0) - -#endif - - -#if defined(__DOXYGEN__) - -/** \ingroup avr_sleep - - Clear the SE (sleep enable) bit. -*/ -extern void sleep_disable (void); - -#else - -#define sleep_disable() \ -do { \ - _SLEEP_CONTROL_REG &= (uint8_t)(~_SLEEP_ENABLE_MASK); \ -} while(0) - -#endif - - -/** \ingroup avr_sleep - - Put the device into sleep mode. The SE bit must be set - beforehand, and it is recommended to clear it afterwards. -*/ -#if defined(__DOXYGEN__) - -extern void sleep_cpu (void); - -#else - -#define sleep_cpu() \ -do { \ - __asm__ __volatile__ ( "sleep" "\n\t" :: ); \ -} while(0) - -#endif - - -#if defined(__DOXYGEN__) - -extern void sleep_mode (void); - -#else - -#define sleep_mode() \ -do { \ - sleep_enable(); \ - sleep_cpu(); \ - sleep_disable(); \ -} while (0) - -#endif - - - -/*@}*/ - -#endif /* _AVR_SLEEP_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/version.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/version.h deleted file mode 100644 index ffc517b2b..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/version.h +++ /dev/null @@ -1,90 +0,0 @@ -/* Copyright (c) 2005, Joerg Wunsch -*- c -*- - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: version.h.in,v 1.1 2005/09/12 20:18:12 joerg_wunsch Exp $ */ - -/** \defgroup avr_version : avr-libc version macros - \code #include \endcode - - This header file defines macros that contain version numbers and - strings describing the current version of avr-libc. - - The version number itself basically consists of three pieces that - are separated by a dot: the major number, the minor number, and - the revision number. For development versions (which use an odd - minor number), the string representation additionally gets the - date code (YYYYMMDD) appended. - - This file will also be included by \c . That way, - portable tests can be implemented using \c that can be - used in code that wants to remain backwards-compatible to library - versions prior to the date when the library version API had been - added, as referenced but undefined C preprocessor macros - automatically evaluate to 0. -*/ - -#ifndef _AVR_VERSION_H_ -#define _AVR_VERSION_H_ - -/** \ingroup avr_version - String literal representation of the current library version. */ -#define __AVR_LIBC_VERSION_STRING__ "1.6.4" - -/** \ingroup avr_version - Numerical representation of the current library version. - - In the numerical representation, the major number is multiplied by - 10000, the minor number by 100, and all three parts are then - added. It is intented to provide a monotonically increasing - numerical value that can easily be used in numerical checks. - */ -#define __AVR_LIBC_VERSION__ 10604UL - -/** \ingroup avr_version - String literal representation of the release date. */ -#define __AVR_LIBC_DATE_STRING__ "20081106" - -/** \ingroup avr_version - Numerical representation of the release date. */ -#define __AVR_LIBC_DATE_ 20081106UL - -/** \ingroup avr_version - Library major version number. */ -#define __AVR_LIBC_MAJOR__ 1 - -/** \ingroup avr_version - Library minor version number. */ -#define __AVR_LIBC_MINOR__ 6 - -/** \ingroup avr_version - Library revision number. */ -#define __AVR_LIBC_REVISION__ 4 - -#endif /* _AVR_VERSION_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/wdt.h b/build/linux/work/hardware/tools/avr/lib/avr/include/avr/wdt.h deleted file mode 100644 index b9cba6a31..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/avr/wdt.h +++ /dev/null @@ -1,392 +0,0 @@ -/* Copyright (c) 2002, 2004 Marek Michalkiewicz - Copyright (c) 2005, 2006, 2007 Eric B. Weddington - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: wdt.h,v 1.44.2.16 2008/11/06 14:55:34 arcanum Exp $ */ - -/* - avr/wdt.h - macros for AVR watchdog timer - */ - -#ifndef _AVR_WDT_H_ -#define _AVR_WDT_H_ - -#include -#include - -/** \file */ -/** \defgroup avr_watchdog : Watchdog timer handling - \code #include \endcode - - This header file declares the interface to some inline macros - handling the watchdog timer present in many AVR devices. In order - to prevent the watchdog timer configuration from being - accidentally altered by a crashing application, a special timed - sequence is required in order to change it. The macros within - this header file handle the required sequence automatically - before changing any value. Interrupts will be disabled during - the manipulation. - - \note Depending on the fuse configuration of the particular - device, further restrictions might apply, in particular it might - be disallowed to turn off the watchdog timer. - - Note that for newer devices (ATmega88 and newer, effectively any - AVR that has the option to also generate interrupts), the watchdog - timer remains active even after a system reset (except a power-on - condition), using the fastest prescaler value (approximately 15 - ms). It is therefore required to turn off the watchdog early - during program startup, the datasheet recommends a sequence like - the following: - - \code - #include - #include - - uint8_t mcusr_mirror __attribute__ ((section (".noinit"))); - - void get_mcusr(void) \ - __attribute__((naked)) \ - __attribute__((section(".init3"))); - void get_mcusr(void) - { - mcusr_mirror = MCUSR; - MCUSR = 0; - wdt_disable(); - } - \endcode - - Saving the value of MCUSR in \c mcusr_mirror is only needed if the - application later wants to examine the reset source, but in particular, - clearing the watchdog reset flag before disabling the - watchdog is required, according to the datasheet. -*/ - -/** - \ingroup avr_watchdog - Reset the watchdog timer. When the watchdog timer is enabled, - a call to this instruction is required before the timer expires, - otherwise a watchdog-initiated device reset will occur. -*/ - -#define wdt_reset() __asm__ __volatile__ ("wdr") - - -#if defined(WDP3) -# define _WD_PS3_MASK _BV(WDP3) -#else -# define _WD_PS3_MASK 0x00 -#endif - -#if defined(WDTCSR) -# define _WD_CONTROL_REG WDTCSR -#else -# define _WD_CONTROL_REG WDTCR -#endif - -#if defined(WDTOE) -#define _WD_CHANGE_BIT WDTOE -#else -#define _WD_CHANGE_BIT WDCE -#endif - - -/** - \ingroup avr_watchdog - Enable the watchdog timer, configuring it for expiry after - \c timeout (which is a combination of the \c WDP0 through - \c WDP2 bits to write into the \c WDTCR register; For those devices - that have a \c WDTCSR register, it uses the combination of the \c WDP0 - through \c WDP3 bits). - - See also the symbolic constants \c WDTO_15MS et al. -*/ - - -#if defined(__AVR_ATxmega64A1__) \ -|| defined(__AVR_ATxmega64A3__) \ -|| defined(__AVR_ATxmega128A1__) \ -|| defined(__AVR_ATxmega128A3__) \ -|| defined(__AVR_ATxmega256A3__) \ -|| defined(__AVR_ATxmega256A3B__) - -/* - wdt_enable(WDT_PER_8KCLK_gc); -*/ -#define wdt_enable(value) \ -__asm__ __volatile__ ( \ - "in __tmp_reg__, %0" "\n\t" \ - "out %1, %3" "\n\t" \ - "sts %2, %4" "\n\t" \ - "wdr" "\n\t" \ - "out %0, __tmp_reg__" "\n\t" \ - : \ - : "M" (_SFR_MEM_ADDR(RAMPD)), \ - "M" (_SFR_MEM_ADDR(CCP)), \ - "M" (_SFR_MEM_ADDR(WDT_CTRL)), \ - "r" ((uint8_t)0xD8), \ - "r" ((uint8_t)(WDT_CEN_bm | WDT_ENABLE_bm | value)) \ - : "r0" \ -) - - -#elif defined(__AVR_AT90CAN32__) \ -|| defined(__AVR_AT90CAN64__) \ -|| defined(__AVR_AT90CAN128__) \ -|| defined(__AVR_AT90PWM1__) \ -|| defined(__AVR_AT90PWM2__) \ -|| defined(__AVR_AT90PWM216__) \ -|| defined(__AVR_AT90PWM2B__) \ -|| defined(__AVR_AT90PWM3__) \ -|| defined(__AVR_AT90PWM316__) \ -|| defined(__AVR_AT90PWM3B__) \ -|| defined(__AVR_AT90USB1286__) \ -|| defined(__AVR_AT90USB1287__) \ -|| defined(__AVR_AT90USB162__) \ -|| defined(__AVR_AT90USB646__) \ -|| defined(__AVR_AT90USB647__) \ -|| defined(__AVR_AT90USB82__) \ -|| defined(__AVR_ATmega1280__) \ -|| defined(__AVR_ATmega1281__) \ -|| defined(__AVR_ATmega1284P__) \ -|| defined(__AVR_ATmega164__) \ -|| defined(__AVR_ATmega164P__) \ -|| defined(__AVR_ATmega165__) \ -|| defined(__AVR_ATmega165P__) \ -|| defined(__AVR_ATmega168__) \ -|| defined(__AVR_ATmega168P__) \ -|| defined(__AVR_ATmega169__) \ -|| defined(__AVR_ATmega169P__) \ -|| defined(__AVR_ATmega16HVA__) \ -|| defined(__AVR_ATmega2560__) \ -|| defined(__AVR_ATmega2561__) \ -|| defined(__AVR_ATmega324__) \ -|| defined(__AVR_ATmega324P__) \ -|| defined(__AVR_ATmega325__) \ -|| defined(__AVR_ATmega3250__) \ -|| defined(__AVR_ATmega328P__) \ -|| defined(__AVR_ATmega329__) \ -|| defined(__AVR_ATmega3290__) \ -|| defined(__AVR_ATmega3290P__) \ -|| defined(__AVR_ATmega32C1__) \ -|| defined(__AVR_ATmega32HVB__) \ -|| defined(__AVR_ATmega32M1__) \ -|| defined(__AVR_ATmega32U4__) \ -|| defined(__AVR_ATmega32U6__) \ -|| defined(__AVR_ATmega406__) \ -|| defined(__AVR_ATmega48__) \ -|| defined(__AVR_ATmega48P__) \ -|| defined(__AVR_ATmega640__) \ -|| defined(__AVR_ATmega644__) \ -|| defined(__AVR_ATmega644P__) \ -|| defined(__AVR_ATmega645__) \ -|| defined(__AVR_ATmega6450__) \ -|| defined(__AVR_ATmega649__) \ -|| defined(__AVR_ATmega6490__) \ -|| defined(__AVR_ATmega8HVA__) \ -|| defined(__AVR_ATmega88__) \ -|| defined(__AVR_ATmega88P__) \ -|| defined(__AVR_ATtiny48__) \ -|| defined(__AVR_ATtiny88__) \ -|| defined(__AVR_ATtiny167__) - -/* Use STS instruction. */ - -#define wdt_enable(value) \ -__asm__ __volatile__ ( \ - "in __tmp_reg__,__SREG__" "\n\t" \ - "cli" "\n\t" \ - "wdr" "\n\t" \ - "sts %0,%1" "\n\t" \ - "out __SREG__,__tmp_reg__" "\n\t" \ - "sts %0,%2" "\n\t" \ - : /* no outputs */ \ - : "M" (_SFR_MEM_ADDR(_WD_CONTROL_REG)), \ - "r" (_BV(_WD_CHANGE_BIT) | _BV(WDE)), \ - "r" ((uint8_t) ((value & 0x08 ? _WD_PS3_MASK : 0x00) | \ - _BV(WDE) | (value & 0x07)) ) \ - : "r0" \ -) - -#define wdt_disable() \ -__asm__ __volatile__ ( \ - "in __tmp_reg__, __SREG__" "\n\t" \ - "cli" "\n\t" \ - "sts %0, %1" "\n\t" \ - "sts %0, __zero_reg__" "\n\t" \ - "out __SREG__,__tmp_reg__" "\n\t" \ - : /* no outputs */ \ - : "M" (_SFR_MEM_ADDR(_WD_CONTROL_REG)), \ - "r" ((uint8_t)(_BV(_WD_CHANGE_BIT) | _BV(WDE))) \ - : "r0" \ -) - - - -#else - -/* Use OUT instruction. */ - -#define wdt_enable(value) \ - __asm__ __volatile__ ( \ - "in __tmp_reg__,__SREG__" "\n\t" \ - "cli" "\n\t" \ - "wdr" "\n\t" \ - "out %0,%1" "\n\t" \ - "out __SREG__,__tmp_reg__" "\n\t" \ - "out %0,%2" \ - : /* no outputs */ \ - : "I" (_SFR_IO_ADDR(_WD_CONTROL_REG)), \ - "r" (_BV(_WD_CHANGE_BIT) | _BV(WDE)), \ - "r" ((uint8_t) ((value & 0x08 ? _WD_PS3_MASK : 0x00) | \ - _BV(WDE) | (value & 0x07)) ) \ - : "r0" \ - ) - -/** - \ingroup avr_watchdog - Disable the watchdog timer, if possible. This attempts to turn off the - Enable bit in the watchdog control register. See the datasheet for - details. -*/ -#define wdt_disable() \ -__asm__ __volatile__ ( \ - "in __tmp_reg__, __SREG__" "\n\t" \ - "cli" "\n\t" \ - "out %0, %1" "\n\t" \ - "out %0, __zero_reg__" "\n\t" \ - "out __SREG__,__tmp_reg__" "\n\t" \ - : /* no outputs */ \ - : "I" (_SFR_IO_ADDR(_WD_CONTROL_REG)), \ - "r" ((uint8_t)(_BV(_WD_CHANGE_BIT) | _BV(WDE))) \ - : "r0" \ -) - -#endif - - - -/** - \ingroup avr_watchdog - Symbolic constants for the watchdog timeout. Since the watchdog - timer is based on a free-running RC oscillator, the times are - approximate only and apply to a supply voltage of 5 V. At lower - supply voltages, the times will increase. For older devices, the - times will be as large as three times when operating at Vcc = 3 V, - while the newer devices (e. g. ATmega128, ATmega8) only experience - a negligible change. - - Possible timeout values are: 15 ms, 30 ms, 60 ms, 120 ms, 250 ms, - 500 ms, 1 s, 2 s. (Some devices also allow for 4 s and 8 s.) - Symbolic constants are formed by the prefix - \c WDTO_, followed by the time. - - Example that would select a watchdog timer expiry of approximately - 500 ms: - \code - wdt_enable(WDTO_500MS); - \endcode -*/ -#define WDTO_15MS 0 - -/** \ingroup avr_watchdog - See \c WDT0_15MS */ -#define WDTO_30MS 1 - -/** \ingroup avr_watchdog See - \c WDT0_15MS */ -#define WDTO_60MS 2 - -/** \ingroup avr_watchdog - See \c WDT0_15MS */ -#define WDTO_120MS 3 - -/** \ingroup avr_watchdog - See \c WDT0_15MS */ -#define WDTO_250MS 4 - -/** \ingroup avr_watchdog - See \c WDT0_15MS */ -#define WDTO_500MS 5 - -/** \ingroup avr_watchdog - See \c WDT0_15MS */ -#define WDTO_1S 6 - -/** \ingroup avr_watchdog - See \c WDT0_15MS */ -#define WDTO_2S 7 - -#if defined(__DOXYGEN__) || defined(WDP3) - -/** \ingroup avr_watchdog - See \c WDT0_15MS - Note: This is only available on the - ATtiny2313, - ATtiny24, ATtiny44, ATtiny84, - ATtiny25, ATtiny45, ATtiny85, - ATtiny261, ATtiny461, ATtiny861, - ATmega48, ATmega88, ATmega168, - ATmega48P, ATmega88P, ATmega168P, ATmega328P, - ATmega164P, ATmega324P, ATmega644P, ATmega644, - ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, - ATmega8HVA, ATmega16HVA, ATmega32HVB, - ATmega406, ATmega1284P, - AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316 - AT90USB82, AT90USB162, - AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, - ATtiny48, ATtiny88. - */ -#define WDTO_4S 8 - -/** \ingroup avr_watchdog - See \c WDT0_15MS - Note: This is only available on the - ATtiny2313, - ATtiny24, ATtiny44, ATtiny84, - ATtiny25, ATtiny45, ATtiny85, - ATtiny261, ATtiny461, ATtiny861, - ATmega48, ATmega88, ATmega168, - ATmega48P, ATmega88P, ATmega168P, ATmega328P, - ATmega164P, ATmega324P, ATmega644P, ATmega644, - ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561, - ATmega8HVA, ATmega16HVA, ATmega32HVB, - ATmega406, ATmega1284P, - AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316 - AT90USB82, AT90USB162, - AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, - ATtiny48, ATtiny88. - */ -#define WDTO_8S 9 - -#endif /* defined(__DOXYGEN__) || defined(WDP3) */ - - -#endif /* _AVR_WDT_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/compat/deprecated.h b/build/linux/work/hardware/tools/avr/lib/avr/include/compat/deprecated.h deleted file mode 100644 index 39567e9f2..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/compat/deprecated.h +++ /dev/null @@ -1,226 +0,0 @@ -/* Copyright (c) 2005,2006 Joerg Wunsch - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: deprecated.h,v 1.6.2.2 2008/07/30 21:39:21 arcanum Exp $ */ - -#ifndef _COMPAT_DEPRECATED_H_ -#define _COMPAT_DEPRECATED_H_ - -/** \defgroup deprecated_items : Deprecated items - - This header file contains several items that used to be available - in previous versions of this library, but have eventually been - deprecated over time. - - \code #include \endcode - - These items are supplied within that header file for backward - compatibility reasons only, so old source code that has been - written for previous library versions could easily be maintained - until its end-of-life. Use of any of these items in new code is - strongly discouraged. - */ - -/** \name Allowing specific system-wide interrupts - - In addition to globally enabling interrupts, each device's particular - interrupt needs to be enabled separately if interrupts for this device are - desired. While some devices maintain their interrupt enable bit inside - the device's register set, external and timer interrupts have system-wide - configuration registers. - - Example: - - \code - // Enable timer 1 overflow interrupts. - timer_enable_int(_BV(TOIE1)); - - // Do some work... - - // Disable all timer interrupts. - timer_enable_int(0); - \endcode - - \note Be careful when you use these functions. If you already have a - different interrupt enabled, you could inadvertantly disable it by - enabling another intterupt. */ - -/*@{*/ - -/** \ingroup deprecated_items - \def enable_external_int(mask) - \deprecated - - This macro gives access to the \c GIMSK register (or \c EIMSK register - if using an AVR Mega device or \c GICR register for others). Although this - macro is essentially the same as assigning to the register, it does - adapt slightly to the type of device being used. This macro is - unavailable if none of the registers listed above are defined. */ - -/* Define common register definition if available. */ -#if defined(EIMSK) -# define __EICR EIMSK -#elif defined(GIMSK) -# define __EICR GIMSK -#elif defined(GICR) -# define __EICR GICR -#endif - -/* If common register defined, define macro. */ -#if defined(__EICR) || defined(__DOXYGEN__) -#define enable_external_int(mask) (__EICR = mask) -#endif - -/** \ingroup deprecated_items - \deprecated - - This function modifies the \c timsk register. - The value you pass via \c ints is device specific. */ - -static __inline__ void timer_enable_int (unsigned char ints) -{ -#ifdef TIMSK - TIMSK = ints; -#endif -} - -/** \def INTERRUPT(signame) - \ingroup deprecated_items - \deprecated - - Introduces an interrupt handler function that runs with global interrupts - initially enabled. This allows interrupt handlers to be interrupted. - - As this macro has been used by too many unsuspecting people in the - past, it has been deprecated, and will be removed in a future - version of the library. Users who want to legitimately re-enable - interrupts in their interrupt handlers as quickly as possible are - encouraged to explicitly declare their handlers as described - \ref attr_interrupt "above". -*/ - -#if (__GNUC__ == 4 && __GNUC_MINOR__ >= 1) || (__GNUC__ > 4) -# define __INTR_ATTRS used, externally_visible -#else /* GCC < 4.1 */ -# define __INTR_ATTRS used -#endif - -#ifdef __cplusplus -#define INTERRUPT(signame) \ -extern "C" void signame(void); \ -void signame (void) __attribute__ ((interrupt,__INTR_ATTRS)); \ -void signame (void) -#else -#define INTERRUPT(signame) \ -void signame (void) __attribute__ ((interrupt,__INTR_ATTRS)); \ -void signame (void) -#endif - -/*@}*/ - -/** - \name Obsolete IO macros - - Back in a time when AVR-GCC and avr-libc could not handle IO port - access in the direct assignment form as they are handled now, all - IO port access had to be done through specific macros that - eventually resulted in inline assembly instructions performing the - desired action. - - These macros became obsolete, as reading and writing IO ports can - be done by simply using the IO port name in an expression, and all - bit manipulation (including those on IO ports) can be done using - generic C bit manipulation operators. - - The macros in this group simulate the historical behaviour. While - they are supposed to be applied to IO ports, the emulation actually - uses standard C methods, so they could be applied to arbitrary - memory locations as well. -*/ - -/*@{*/ - -/** - \ingroup deprecated_items - \def inp(port) - \deprecated - - Read a value from an IO port \c port. -*/ -#define inp(port) (port) - -/** - \ingroup deprecated_items - \def outp(val, port) - \deprecated - - Write \c val to IO port \c port. -*/ -#define outp(val, port) (port) = (val) - -/** - \ingroup deprecated_items - \def inb(port) - \deprecated - - Read a value from an IO port \c port. -*/ -#define inb(port) (port) - -/** - \ingroup deprecated_items - \def outb(port, val) - \deprecated - - Write \c val to IO port \c port. -*/ -#define outb(port, val) (port) = (val) - -/** - \ingroup deprecated_items - \def sbi(port, bit) - \deprecated - - Set \c bit in IO port \c port. -*/ -#define sbi(port, bit) (port) |= (1 << (bit)) - -/** - \ingroup deprecated_items - \def cbi(port, bit) - \deprecated - - Clear \c bit in IO port \c port. -*/ -#define cbi(port, bit) (port) &= ~(1 << (bit)) - -/*@}*/ - -#endif /* _COMPAT_DEPRECATED_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/compat/ina90.h b/build/linux/work/hardware/tools/avr/lib/avr/include/compat/ina90.h deleted file mode 100644 index 2ab196afd..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/compat/ina90.h +++ /dev/null @@ -1,99 +0,0 @@ -/* Copyright (c) 2002,2004 Marek Michalkiewicz - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: ina90.h,v 1.2 2005/11/05 21:22:33 joerg_wunsch Exp $ */ -/* copied from: Id: avr/ina90.h,v 1.8 2004/11/09 19:16:09 arcanum Exp */ - -/* - ina90.h - - Contributors: - Created by Marek Michalkiewicz - */ - -/** - \defgroup compat_ina90 : Compatibility with IAR EWB 3.x - - \code #include \endcode - - This is an attempt to provide some compatibility with - header files that come with IAR C, to make porting applications - between different compilers easier. No 100% compatibility though. - - \note For actual documentation, please see the IAR manual. - */ - -#ifndef _INA90_H_ -#define _INA90_H_ 1 - -#define _CLI() do { __asm__ __volatile__ ("cli"); } while (0) -#define _SEI() do { __asm__ __volatile__ ("sei"); } while (0) -#define _NOP() do { __asm__ __volatile__ ("nop"); } while (0) -#define _WDR() do { __asm__ __volatile__ ("wdr"); } while (0) -#define _SLEEP() do { __asm__ __volatile__ ("sleep"); } while (0) -#define _OPC(op) do { __asm__ __volatile__ (".word %0" : : "n" (op)); } while (0) - -/* _LPM, _ELPM */ -#include -#define _LPM(x) do { __LPM(x); } while (0) -#define _ELPM(x) do { __ELPM(x); } while (0) - -/* _EEGET, _EEPUT */ -#include - -#define input(port) (port) -#define output(port, val) do { (port) = (val); } while (0) - -#define __inp_blk__(port, addr, cnt, op) do { \ - unsigned char __i = (cnt); \ - unsigned char *__addr = (addr); \ - while (__i) { \ - *(__addr op) = input(port); \ - __i--; \ - } \ - } while (0) - -#define input_block_inc(port, addr, cnt) __inp_blk__(port, addr, cnt, ++) -#define input_block_dec(port, addr, cnt) __inp_blk__(port, addr, cnt, --) - -#define __out_blk__(port, addr, cnt, op) do { \ - unsigned char __i = (cnt); \ - const unsigned char *__addr = (addr); \ - while (__i) { \ - output(port, *(__addr op)); \ - __i--; \ - } \ - } while (0) - -#define output_block_inc(port, addr, cnt) __out_blk__(port, addr, cnt, ++) -#define output_block_dec(port, addr, cnt) __out_blk__(port, addr, cnt, --) - -#endif - diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/compat/twi.h b/build/linux/work/hardware/tools/avr/lib/avr/include/compat/twi.h deleted file mode 100644 index 6d88cbba4..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/compat/twi.h +++ /dev/null @@ -1,38 +0,0 @@ -/* Copyright (c) 2005 Joerg Wunsch - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: twi.h,v 1.2 2005/11/05 22:23:15 joerg_wunsch Exp $ */ - -#ifndef _COMPAT_TWI_H_ -#define _COMPAT_TWI_H_ - -#include - -#endif /* _COMPAT_TWI_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/ctype.h b/build/linux/work/hardware/tools/avr/lib/avr/include/ctype.h deleted file mode 100644 index d225f7056..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/ctype.h +++ /dev/null @@ -1,193 +0,0 @@ -/* Copyright (c) 2002,2007 Michael Stumpf - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: ctype.h,v 1.8 2007/12/16 07:33:59 dmix Exp $ */ - -/* - ctype.h - character conversion macros and ctype macros - - Author : Michael Stumpf - Michael.Stumpf@t-online.de -*/ - -#ifndef __CTYPE_H_ -#define __CTYPE_H_ 1 - -#ifndef __ATTR_CONST__ -#define __ATTR_CONST__ __attribute__((__const__)) -#endif - -#ifdef __cplusplus -extern "C" { -#endif - -/** \file */ -/** \defgroup ctype : Character Operations - These functions perform various operations on characters. - - \code #include \endcode - -*/ - -/** \name Character classification routines - - These functions perform character classification. They return true or - false status depending whether the character passed to the function falls - into the function's classification (i.e. isdigit() returns true if its - argument is any value '0' though '9', inclusive). If the input is not - an unsigned char value, all of this function return false. */ - - /* @{ */ - -/** \ingroup ctype - - Checks for an alphanumeric character. It is equivalent to (isalpha(c) - || isdigit(c)). */ - -extern int isalnum(int __c) __ATTR_CONST__; - -/** \ingroup ctype - - Checks for an alphabetic character. It is equivalent to (isupper(c) || - islower(c)). */ - -extern int isalpha(int __c) __ATTR_CONST__; - -/** \ingroup ctype - - Checks whether \c c is a 7-bit unsigned char value that fits into the - ASCII character set. */ - -extern int isascii(int __c) __ATTR_CONST__; - -/** \ingroup ctype - - Checks for a blank character, that is, a space or a tab. */ - -extern int isblank(int __c) __ATTR_CONST__; - -/** \ingroup ctype - - Checks for a control character. */ - -extern int iscntrl(int __c) __ATTR_CONST__; - -/** \ingroup ctype - - Checks for a digit (0 through 9). */ - -extern int isdigit(int __c) __ATTR_CONST__; - -/** \ingroup ctype - - Checks for any printable character except space. */ - -extern int isgraph(int __c) __ATTR_CONST__; - -/** \ingroup ctype - - Checks for a lower-case character. */ - -extern int islower(int __c) __ATTR_CONST__; - -/** \ingroup ctype - - Checks for any printable character including space. */ - -extern int isprint(int __c) __ATTR_CONST__; - -/** \ingroup ctype - - Checks for any printable character which is not a space or an alphanumeric - character. */ - -extern int ispunct(int __c) __ATTR_CONST__; - -/** \ingroup ctype - - Checks for white-space characters. For the avr-libc library, these are: - space, form-feed ('\\f'), newline ('\\n'), carriage return ('\\r'), - horizontal tab ('\\t'), and vertical tab ('\\v'). */ - -extern int isspace(int __c) __ATTR_CONST__; - -/** \ingroup ctype - - Checks for an uppercase letter. */ - -extern int isupper(int __c) __ATTR_CONST__; - -/** \ingroup ctype - - Checks for a hexadecimal digits, i.e. one of 0 1 2 3 4 5 6 7 8 9 a b c d e - f A B C D E F. */ - -extern int isxdigit(int __c) __ATTR_CONST__; - -/* @} */ - -/** \name Character convertion routines - - This realization permits all possible values of integer argument. - The toascii() function clears all highest bits. The tolower() and - toupper() functions return an input argument as is, if it is not an - unsigned char value. */ - -/* @{ */ - -/** \ingroup ctype - - Converts \c c to a 7-bit unsigned char value that fits into the ASCII - character set, by clearing the high-order bits. - - \warning Many people will be unhappy if you use this function. This - function will convert accented letters into random characters. */ - -extern int toascii(int __c) __ATTR_CONST__; - -/** \ingroup ctype - - Converts the letter \c c to lower case, if possible. */ - -extern int tolower(int __c) __ATTR_CONST__; - -/** \ingroup ctype - - Converts the letter \c c to upper case, if possible. */ - -extern int toupper(int __c) __ATTR_CONST__; - -/* @} */ - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/errno.h b/build/linux/work/hardware/tools/avr/lib/avr/include/errno.h deleted file mode 100644 index bdd326f0e..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/errno.h +++ /dev/null @@ -1,73 +0,0 @@ -/* Copyright (c) 2002,2007 Marek Michalkiewicz - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: errno.h,v 1.6 2007/01/23 15:32:48 joerg_wunsch Exp $ */ - -#ifndef __ERRNO_H_ -#define __ERRNO_H_ 1 - -/** \file */ -/** \defgroup avr_errno : System Errors - - \code #include \endcode - - Some functions in the library set the global variable \c errno when an - error occurs. The file, \c , provides symbolic names for various - error codes. - - \warning The \c errno global variable is not safe to use in a threaded or - multi-task system. A race condition can occur if a task is interrupted - between the call which sets \c error and when the task examines \c - errno. If another task changes \c errno during this time, the result will - be incorrect for the interrupted task. */ - -#ifdef __cplusplus -extern "C" { -#endif - -extern int errno; - -#ifdef __cplusplus -} -#endif - -/** \ingroup avr_errno - \def EDOM - - Domain error. */ -#define EDOM 33 - -/** \ingroup avr_errno - \def ERANGE - - Range error. */ -#define ERANGE 34 - -#endif diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/inttypes.h b/build/linux/work/hardware/tools/avr/lib/avr/include/inttypes.h deleted file mode 100644 index 1062468ae..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/inttypes.h +++ /dev/null @@ -1,533 +0,0 @@ -/* Copyright (c) 2004,2005,2007 Joerg Wunsch - Copyright (c) 2005, Carlos Lamas - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: inttypes.h,v 1.16.2.1 2008/10/17 21:33:57 arcanum Exp $ */ - -#ifndef __INTTYPES_H_ -#define __INTTYPES_H_ - -#include - -/** \file */ -/** \defgroup avr_inttypes : Integer Type conversions - \code #include \endcode - - This header file includes the exact-width integer definitions from - , and extends them with additional facilities - provided by the implementation. - - Currently, the extensions include two additional integer types - that could hold a "far" pointer (i.e. a code pointer that can - address more than 64 KB), as well as standard names for all printf - and scanf formatting options that are supported by the \ref avr_stdio. - As the library does not support the full range of conversion - specifiers from ISO 9899:1999, only those conversions that are - actually implemented will be listed here. - - The idea behind these conversion macros is that, for each of the - types defined by , a macro will be supplied that portably - allows formatting an object of that type in printf() or scanf() - operations. Example: - - \code - #include - - uint8_t smallval; - int32_t longval; - ... - printf("The hexadecimal value of smallval is %" PRIx8 - ", the decimal value of longval is %" PRId32 ".\n", - smallval, longval); - \endcode -*/ - -/** \name Far pointers for memory access >64K */ - -/*@{*/ -/** \ingroup avr_inttypes - signed integer type that can hold a pointer > 64 KB */ -typedef int32_t int_farptr_t; - -/** \ingroup avr_inttypes - unsigned integer type that can hold a pointer > 64 KB */ -typedef uint32_t uint_farptr_t; -/*@}*/ - -#if !defined(__cplusplus) || defined(__STDC_LIMIT_MACROS) - - -/** \name macros for printf and scanf format specifiers - - For C++, these are only included if __STDC_LIMIT_MACROS - is defined before including . - */ - -/*@{*/ -/** \ingroup avr_inttypes - decimal printf format for int8_t */ -#define PRId8 "d" -/** \ingroup avr_inttypes - decimal printf format for int_least8_t */ -#define PRIdLEAST8 "d" -/** \ingroup avr_inttypes - decimal printf format for int_fast8_t */ -#define PRIdFAST8 "d" - -/** \ingroup avr_inttypes - integer printf format for int8_t */ -#define PRIi8 "i" -/** \ingroup avr_inttypes - integer printf format for int_least8_t */ -#define PRIiLEAST8 "i" -/** \ingroup avr_inttypes - integer printf format for int_fast8_t */ -#define PRIiFAST8 "i" - - -/** \ingroup avr_inttypes - decimal printf format for int16_t */ -#define PRId16 "d" -/** \ingroup avr_inttypes - decimal printf format for int_least16_t */ -#define PRIdLEAST16 "d" -/** \ingroup avr_inttypes - decimal printf format for int_fast16_t */ -#define PRIdFAST16 "d" - -/** \ingroup avr_inttypes - integer printf format for int16_t */ -#define PRIi16 "i" -/** \ingroup avr_inttypes - integer printf format for int_least16_t */ -#define PRIiLEAST16 "i" -/** \ingroup avr_inttypes - integer printf format for int_fast16_t */ -#define PRIiFAST16 "i" - - -/** \ingroup avr_inttypes - decimal printf format for int32_t */ -#define PRId32 "ld" -/** \ingroup avr_inttypes - decimal printf format for int_least32_t */ -#define PRIdLEAST32 "ld" -/** \ingroup avr_inttypes - decimal printf format for int_fast32_t */ -#define PRIdFAST32 "ld" - -/** \ingroup avr_inttypes - integer printf format for int32_t */ -#define PRIi32 "li" -/** \ingroup avr_inttypes - integer printf format for int_least32_t */ -#define PRIiLEAST32 "li" -/** \ingroup avr_inttypes - integer printf format for int_fast32_t */ -#define PRIiFAST32 "li" - - -#ifdef __avr_libc_does_not_implement_long_long_in_printf_or_scanf - -#define PRId64 "lld" -#define PRIdLEAST64 "lld" -#define PRIdFAST64 "lld" - -#define PRIi64 "lli" -#define PRIiLEAST64 "lli" -#define PRIiFAST64 "lli" - - -#define PRIdMAX "lld" -#define PRIiMAX "lli" - -#endif - -/** \ingroup avr_inttypes - decimal printf format for intptr_t */ -#define PRIdPTR PRId16 -/** \ingroup avr_inttypes - integer printf format for intptr_t */ -#define PRIiPTR PRIi16 - -/** \ingroup avr_inttypes - octal printf format for uint8_t */ -#define PRIo8 "o" -/** \ingroup avr_inttypes - octal printf format for uint_least8_t */ -#define PRIoLEAST8 "o" -/** \ingroup avr_inttypes - octal printf format for uint_fast8_t */ -#define PRIoFAST8 "o" - -/** \ingroup avr_inttypes - decimal printf format for uint8_t */ -#define PRIu8 "u" -/** \ingroup avr_inttypes - decimal printf format for uint_least8_t */ -#define PRIuLEAST8 "u" -/** \ingroup avr_inttypes - decimal printf format for uint_fast8_t */ -#define PRIuFAST8 "u" - -/** \ingroup avr_inttypes - hexadecimal printf format for uint8_t */ -#define PRIx8 "x" -/** \ingroup avr_inttypes - hexadecimal printf format for uint_least8_t */ -#define PRIxLEAST8 "x" -/** \ingroup avr_inttypes - hexadecimal printf format for uint_fast8_t */ -#define PRIxFAST8 "x" - -/** \ingroup avr_inttypes - uppercase hexadecimal printf format for uint8_t */ -#define PRIX8 "X" -/** \ingroup avr_inttypes - uppercase hexadecimal printf format for uint_least8_t */ -#define PRIXLEAST8 "X" -/** \ingroup avr_inttypes - uppercase hexadecimal printf format for uint_fast8_t */ -#define PRIXFAST8 "X" - - -/** \ingroup avr_inttypes - octal printf format for uint16_t */ -#define PRIo16 "o" -/** \ingroup avr_inttypes - octal printf format for uint_least16_t */ -#define PRIoLEAST16 "o" -/** \ingroup avr_inttypes - octal printf format for uint_fast16_t */ -#define PRIoFAST16 "o" - -/** \ingroup avr_inttypes - decimal printf format for uint16_t */ -#define PRIu16 "u" -/** \ingroup avr_inttypes - decimal printf format for uint_least16_t */ -#define PRIuLEAST16 "u" -/** \ingroup avr_inttypes - decimal printf format for uint_fast16_t */ -#define PRIuFAST16 "u" - -/** \ingroup avr_inttypes - hexadecimal printf format for uint16_t */ -#define PRIx16 "x" -/** \ingroup avr_inttypes - hexadecimal printf format for uint_least16_t */ -#define PRIxLEAST16 "x" -/** \ingroup avr_inttypes - hexadecimal printf format for uint_fast16_t */ -#define PRIxFAST16 "x" - -/** \ingroup avr_inttypes - uppercase hexadecimal printf format for uint16_t */ -#define PRIX16 "X" -/** \ingroup avr_inttypes - uppercase hexadecimal printf format for uint_least16_t */ -#define PRIXLEAST16 "X" -/** \ingroup avr_inttypes - uppercase hexadecimal printf format for uint_fast16_t */ -#define PRIXFAST16 "X" - - -/** \ingroup avr_inttypes - octal printf format for uint32_t */ -#define PRIo32 "lo" -/** \ingroup avr_inttypes - octal printf format for uint_least32_t */ -#define PRIoLEAST32 "lo" -/** \ingroup avr_inttypes - octal printf format for uint_fast32_t */ -#define PRIoFAST32 "lo" - -/** \ingroup avr_inttypes - decimal printf format for uint32_t */ -#define PRIu32 "lu" -/** \ingroup avr_inttypes - decimal printf format for uint_least32_t */ -#define PRIuLEAST32 "lu" -/** \ingroup avr_inttypes - decimal printf format for uint_fast32_t */ -#define PRIuFAST32 "lu" - -/** \ingroup avr_inttypes - hexadecimal printf format for uint32_t */ -#define PRIx32 "lx" -/** \ingroup avr_inttypes - hexadecimal printf format for uint_least32_t */ -#define PRIxLEAST32 "lx" -/** \ingroup avr_inttypes - hexadecimal printf format for uint_fast32_t */ -#define PRIxFAST32 "lx" - -/** \ingroup avr_inttypes - uppercase hexadecimal printf format for uint32_t */ -#define PRIX32 "lX" -/** \ingroup avr_inttypes - uppercase hexadecimal printf format for uint_least32_t */ -#define PRIXLEAST32 "lX" -/** \ingroup avr_inttypes - uppercase hexadecimal printf format for uint_fast32_t */ -#define PRIXFAST32 "lX" - - -#ifdef __avr_libc_does_not_implement_long_long_in_printf_or_scanf - -#define PRIo64 "llo" -#define PRIoLEAST64 "llo" -#define PRIoFAST64 "llo" - -#define PRIu64 "llu" -#define PRIuLEAST64 "llu" -#define PRIuFAST64 "llu" - -#define PRIx64 "llx" -#define PRIxLEAST64 "llx" -#define PRIxFAST64 "llx" - -#define PRIX64 "llX" -#define PRIXLEAST64 "llX" -#define PRIXFAST64 "llX" - -#define PRIoMAX "llo" -#define PRIuMAX "llu" -#define PRIxMAX "llx" -#define PRIXMAX "llX" - -#endif - -/** \ingroup avr_inttypes - octal printf format for uintptr_t */ -#define PRIoPTR PRIo16 -/** \ingroup avr_inttypes - decimal printf format for uintptr_t */ -#define PRIuPTR PRIu16 -/** \ingroup avr_inttypes - hexadecimal printf format for uintptr_t */ -#define PRIxPTR PRIx16 -/** \ingroup avr_inttypes - uppercase hexadecimal printf format for uintptr_t */ -#define PRIXPTR PRIX16 - - -#ifdef __avr_libc_does_not_implement_hh_in_scanf - -#define SCNd8 "hhd" -#define SCNdLEAST8 "hhd" -#define SCNdFAST8 "hhd" - -#define SCNi8 "hhi" -#define SCNiLEAST8 "hhi" -#define SCNiFAST8 "hhi" - -#endif - - -/** \ingroup avr_inttypes - decimal scanf format for int16_t */ -#define SCNd16 "d" -/** \ingroup avr_inttypes - decimal scanf format for int_least16_t */ -#define SCNdLEAST16 "d" -/** \ingroup avr_inttypes - decimal scanf format for int_fast16_t */ -#define SCNdFAST16 "d" - -/** \ingroup avr_inttypes - generic-integer scanf format for int16_t */ -#define SCNi16 "i" -/** \ingroup avr_inttypes - generic-integer scanf format for int_least16_t */ -#define SCNiLEAST16 "i" -/** \ingroup avr_inttypes - generic-integer scanf format for int_fast16_t */ -#define SCNiFAST16 "i" - - -/** \ingroup avr_inttypes - decimal scanf format for int32_t */ -#define SCNd32 "ld" -/** \ingroup avr_inttypes - decimal scanf format for int_least32_t */ -#define SCNdLEAST32 "ld" -/** \ingroup avr_inttypes - decimal scanf format for int_fast32_t */ -#define SCNdFAST32 "ld" - -/** \ingroup avr_inttypes - generic-integer scanf format for int32_t */ -#define SCNi32 "li" -/** \ingroup avr_inttypes - generic-integer scanf format for int_least32_t */ -#define SCNiLEAST32 "li" -/** \ingroup avr_inttypes - generic-integer scanf format for int_fast32_t */ -#define SCNiFAST32 "li" - - -#ifdef __avr_libc_does_not_implement_long_long_in_printf_or_scanf - -#define SCNd64 "lld" -#define SCNdLEAST64 "lld" -#define SCNdFAST64 "lld" - -#define SCNi64 "lli" -#define SCNiLEAST64 "lli" -#define SCNiFAST64 "lli" - -#define SCNdMAX "lld" -#define SCNiMAX "lli" - -#endif - -/** \ingroup avr_inttypes - decimal scanf format for intptr_t */ -#define SCNdPTR SCNd16 -/** \ingroup avr_inttypes - generic-integer scanf format for intptr_t */ -#define SCNiPTR SCNi16 - -#ifdef __avr_libc_does_not_implement_hh_in_scanf - -#define SCNo8 "hho" -#define SCNoLEAST8 "hho" -#define SCNoFAST8 "hho" - -#define SCNu8 "hhu" -#define SCNuLEAST8 "hhu" -#define SCNuFAST8 "hhu" - -#define SCNx8 "hhx" -#define SCNxLEAST8 "hhx" -#define SCNxFAST8 "hhx" - -#endif - -/** \ingroup avr_inttypes - octal scanf format for uint16_t */ -#define SCNo16 "o" -/** \ingroup avr_inttypes - octal scanf format for uint_least16_t */ -#define SCNoLEAST16 "o" -/** \ingroup avr_inttypes - octal scanf format for uint_fast16_t */ -#define SCNoFAST16 "o" - -/** \ingroup avr_inttypes - decimal scanf format for uint16_t */ -#define SCNu16 "u" -/** \ingroup avr_inttypes - decimal scanf format for uint_least16_t */ -#define SCNuLEAST16 "u" -/** \ingroup avr_inttypes - decimal scanf format for uint_fast16_t */ -#define SCNuFAST16 "u" - -/** \ingroup avr_inttypes - hexadecimal scanf format for uint16_t */ -#define SCNx16 "x" -/** \ingroup avr_inttypes - hexadecimal scanf format for uint_least16_t */ -#define SCNxLEAST16 "x" -/** \ingroup avr_inttypes - hexadecimal scanf format for uint_fast16_t */ -#define SCNxFAST16 "x" - - -/** \ingroup avr_inttypes - octal scanf format for uint32_t */ -#define SCNo32 "lo" -/** \ingroup avr_inttypes - octal scanf format for uint_least32_t */ -#define SCNoLEAST32 "lo" -/** \ingroup avr_inttypes - octal scanf format for uint_fast32_t */ -#define SCNoFAST32 "lo" - -/** \ingroup avr_inttypes - decimal scanf format for uint32_t */ -#define SCNu32 "lu" -/** \ingroup avr_inttypes - decimal scanf format for uint_least32_t */ -#define SCNuLEAST32 "lu" -/** \ingroup avr_inttypes - decimal scanf format for uint_fast32_t */ -#define SCNuFAST32 "lu" - -/** \ingroup avr_inttypes - hexadecimal scanf format for uint32_t */ -#define SCNx32 "lx" -/** \ingroup avr_inttypes - hexadecimal scanf format for uint_least32_t */ -#define SCNxLEAST32 "lx" -/** \ingroup avr_inttypes - hexadecimal scanf format for uint_fast32_t */ -#define SCNxFAST32 "lx" - - -#ifdef __avr_libc_does_not_implement_long_long_in_printf_or_scanf - -#define SCNo64 "llo" -#define SCNoLEAST64 "llo" -#define SCNoFAST64 "llo" - -#define SCNu64 "llu" -#define SCNuLEAST64 "llu" -#define SCNuFAST64 "llu" - -#define SCNx64 "llx" -#define SCNxLEAST64 "llx" -#define SCNxFAST64 "llx" - -#define SCNoMAX "llo" -#define SCNuMAX "llu" -#define SCNxMAX "llx" - -#endif - -/** \ingroup avr_inttypes - octal scanf format for uintptr_t */ -#define SCNoPTR SCNo16 -/** \ingroup avr_inttypes - decimal scanf format for uintptr_t */ -#define SCNuPTR SCNu16 -/** \ingroup avr_inttypes - hexadecimal scanf format for uintptr_t */ -#define SCNxPTR SCNx16 - -/*@}*/ - - -#endif /* !defined(__cplusplus) || defined(__STDC_LIMIT_MACROS) */ - - -#endif /* __INTTYPES_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/math.h b/build/linux/work/hardware/tools/avr/lib/avr/include/math.h deleted file mode 100644 index 7804d6ef3..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/math.h +++ /dev/null @@ -1,473 +0,0 @@ -/* Copyright (c) 2002,2007 Michael Stumpf - - Portions of documentation Copyright (c) 1990 - 1994 - The Regents of the University of California. - - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: math.h,v 1.21.2.2 2008/04/10 13:39:16 arcanum Exp $ */ - -/* - math.h - mathematical functions - - Author : Michael Stumpf - Michael.Stumpf@t-online.de - - __ATTR_CONST__ added by marekm@linux.org.pl for functions - that "do not examine any values except their arguments, and have - no effects except the return value", for better optimization by gcc. - */ - -#ifndef __MATH_H -#define __MATH_H - -/** \file */ -/** \defgroup avr_math : Mathematics - \code #include \endcode - - This header file declares basic mathematics constants and - functions. - - \par Notes: - - In order to access the functions delcared herein, it is usually - also required to additionally link against the library \c libm.a. - See also the related \ref faq_libm "FAQ entry". - - Math functions do not raise exceptions and do not change the - \c errno variable. Therefore the majority of them are declared - with const attribute, for better optimization by GCC. */ - -/** - \ingroup avr_math - - The constant \c pi. */ -#define M_PI 3.141592653589793238462643 - -/** - \ingroup avr_math - - The square root of 2. */ -#define M_SQRT2 1.4142135623730950488016887 - -/** - \ingroup avr_math - - NAN constant. */ -#define NAN __builtin_nan("") - -/** - \ingroup avr_math - - INFINITY constant. */ -#define INFINITY __builtin_inf() - -#ifndef __ATTR_CONST__ -# define __ATTR_CONST__ __attribute__((__const__)) -#endif - -#ifdef __cplusplus -extern "C" { -#endif - - /** - \ingroup avr_math - - The cos() function returns the cosine of \a __x, measured in radians. - */ -extern double cos(double __x) __ATTR_CONST__; - - /** - \ingroup avr_math - - The fabs() function computes the absolute value of a floating-point - number \a __x. - */ -extern double fabs(double __x) __ATTR_CONST__; -#if 0 -/* fabs seems to be built in already */ -static inline double fabs( double __x ) - { double __res; - __asm__ __volatile__ ("andi %D0,0x7F \n\t" - : "=d" (__res) : "0" (__x) ); - return __res; - } -#endif - - /** - \ingroup avr_math - - The function fmod() returns the floating-point remainder of __x / - __y. - */ -extern double fmod(double __x, double __y) __ATTR_CONST__; - - /** - \ingroup avr_math - - The modf() function breaks the argument \a __x into integral and - fractional parts, each of which has the same sign as the argument. - It stores the integral part as a double in the object pointed to by - \a __iptr. - - The modf() function returns the signed fractional part of \a __x. - - \note - This implementation skips writing by zero pointer. - */ -extern double modf(double __x, double *__iptr); - - /** - \ingroup avr_math - - The sin() function returns the sine of \a __x, measured in radians. - */ -extern double sin(double __x) __ATTR_CONST__; - - /** - \ingroup avr_math - - The sqrt() function returns the non-negative square root of \a __x. - */ -extern double sqrt(double __x) __ATTR_CONST__; - - /** - \ingroup avr_math - - The tan() function returns the tangent of \a __x, measured in - radians. - */ -extern double tan(double __x) __ATTR_CONST__; - - /** - \ingroup avr_math - - The floor() function returns the largest integral value less than or - equal to \a __x, expressed as a floating-point number. - */ -extern double floor(double __x) __ATTR_CONST__; - - /** - \ingroup avr_math - - The ceil() function returns the smallest integral value greater than - or equal to \a __x, expressed as a floating-point number. - */ -extern double ceil(double __x) __ATTR_CONST__; - - /** - \ingroup avr_math - - The frexp() function breaks a floating-point number into a normalized - fraction and an integral power of 2. It stores the integer in the \c - int object pointed to by \a __pexp. - - If \a __x is a normal float point number, the frexp() function - returns the value \c v, such that \c v has a magnitude in the - interval [1/2, 1) or zero, and \a __x equals \c v times 2 raised to - the power \a __pexp. If \a __x is zero, both parts of the result are - zero. If \a __x is not a finite number, the frexp() returns \a __x as - is and stores 0 by \a __pexp. - - \note This implementation permits a zero pointer as a directive to - skip a storing the exponent. - */ -extern double frexp(double __x, int *__pexp); - - /** - \ingroup avr_math - - The ldexp() function multiplies a floating-point number by an integral - power of 2. - - The ldexp() function returns the value of \a __x times 2 raised to - the power \a __exp. - */ -extern double ldexp(double __x, int __exp) __ATTR_CONST__; - - /** - \ingroup avr_math - - The exp() function returns the exponential value of \a __x. - */ -extern double exp(double __x) __ATTR_CONST__; - - /** - \ingroup avr_math - - The cosh() function returns the hyperbolic cosine of \a __x. - */ -extern double cosh(double __x) __ATTR_CONST__; - - /** - \ingroup avr_math - - The sinh() function returns the hyperbolic sine of \a __x. - */ -extern double sinh(double __x) __ATTR_CONST__; - - /** - \ingroup avr_math - - The tanh() function returns the hyperbolic tangent of \a __x. - */ -extern double tanh(double __x) __ATTR_CONST__; - - /** - \ingroup avr_math - - The acos() function computes the principal value of the arc cosine of - \a __x. The returned value is in the range [0, pi] radians. A domain - error occurs for arguments not in the range [-1, +1]. - */ -extern double acos(double __x) __ATTR_CONST__; - - /** - \ingroup avr_math - - The asin() function computes the principal value of the arc sine of - \a __x. The returned value is in the range [-pi/2, pi/2] radians. A - domain error occurs for arguments not in the range [-1, +1]. - */ -extern double asin(double __x) __ATTR_CONST__; - - /** - \ingroup avr_math - - The atan() function computes the principal value of the arc tangent - of \a __x. The returned value is in the range [-pi/2, pi/2] radians. - */ -extern double atan(double __x) __ATTR_CONST__; - - /** - \ingroup avr_math - - The atan2() function computes the principal value of the arc tangent - of __y / __x, using the signs of both arguments to determine - the quadrant of the return value. The returned value is in the range - [-pi, +pi] radians. - */ -extern double atan2(double __y, double __x) __ATTR_CONST__; - - /** - \ingroup avr_math - - The log() function returns the natural logarithm of argument \a __x. - */ -extern double log(double __x) __ATTR_CONST__; - - /** - \ingroup avr_math - - The log10() function returns the logarithm of argument \a __x to base - 10. - */ -extern double log10(double __x) __ATTR_CONST__; - - /** - \ingroup avr_math - - The function pow() returns the value of \a __x to the exponent \a __y. - */ -extern double pow(double __x, double __y) __ATTR_CONST__; - - /** - \ingroup avr_math - - The function isnan() returns 1 if the argument \a __x represents a - "not-a-number" (NaN) object, otherwise 0. - */ -extern int isnan(double __x) __ATTR_CONST__; - - /** - \ingroup avr_math - - The function isinf() returns 1 if the argument \a __x is positive - infinity, -1 if \a __x is negative infinity, and 0 otherwise. - */ -extern int isinf(double __x) __ATTR_CONST__; - - /** - \ingroup avr_math - - The function square() returns __x * __x. - - \note - This function does not belong to the C standard definition. - */ -extern double square(double __x) __ATTR_CONST__; - - /** - \ingroup avr_math - - The copysign() function returns \a __x but with the sign of \a __y. - They work even if \a __x or \a __y are NaN or zero. - */ -__ATTR_CONST__ static inline double copysign (double __x, double __y) -{ - __asm__ ( - "bst %D2, 7 \n\t" - "bld %D0, 7 " - : "=r" (__x) - : "0" (__x), "r" (__y) ); - return __x; -} - - /** - \ingroup avr_math - - The fdim() function returns max(__x - __y, 0). If \a __x or - \a __y or both are NaN, NaN is returned. - */ -extern double fdim (double __x, double __y) __ATTR_CONST__; - - /** - \ingroup avr_math - - The fma() function performs floating-point multiply-add. This is the - operation (__x * __y) + __z, but the intermediate result is - not rounded to the destination type. This can sometimes improve the - precision of a calculation. - */ -extern double fma (double __x, double __y, double __z) __ATTR_CONST__; - - /** - \ingroup avr_math - - The fmax() function returns the greater of the two values \a __x and - \a __y. If an argument is NaN, the other argument is returned. If - both arguments are NaN, NaN is returned. - */ -extern double fmax (double __x, double __y) __ATTR_CONST__; - - /** - \ingroup avr_math - - The fmin() function returns the lesser of the two values \a __x and - \a __y. If an argument is NaN, the other argument is returned. If - both arguments are NaN, NaN is returned. - */ -extern double fmin (double __x, double __y) __ATTR_CONST__; - - /** - \ingroup avr_math - - The signbit() function returns a nonzero value if the value of \a __x - has its sign bit set. This is not the same as `\a __x < 0.0', - because IEEE 754 floating point allows zero to be signed. The - comparison `-0.0 < 0.0' is false, but `signbit (-0.0)' will return a - nonzero value. - - \note - This implementation returns 1 if sign bit is set. - */ -extern int signbit (double __x) __ATTR_CONST__; - - /** - \ingroup avr_math - - The trunc() function rounds \a __x to the nearest integer not larger - in absolute value. - */ -extern double trunc (double __x) __ATTR_CONST__; - - /** - \ingroup avr_math - - The isfinite() function returns a nonzero value if \a __x is finite: - not plus or minus infinity, and not NaN. - */ -__ATTR_CONST__ static inline int isfinite (double __x) -{ - unsigned char __exp; - __asm__ ( - "mov %0, %C1 \n\t" - "lsl %0 \n\t" - "mov %0, %D1 \n\t" - "rol %0 " - : "=r" (__exp) - : "r" (__x) ); - return __exp != 0xff; -} - - /** - \ingroup avr_math - - The hypot() function returns sqrt(__x*__x + __y*__y). This - is the length of the hypotenuse of a right triangle with sides of - length \a __x and \a __y, or the distance of the point (\a __x, \a - __y) from the origin. Using this function instead of the direct - formula is wise, since the error is much smaller. No underflow with - small \a __x and \a __y. No overflow if result is in range. - */ -double hypot (double __x, double __y) __ATTR_CONST__; - -/** \ingroup avr_math - - The round() function rounds \a __x to the nearest integer, but rounds - halfway cases away from zero (instead of to the nearest even integer). - Overflow is impossible. - - \return The rounded value. If \a __x is an integral or infinite, \a - __x itself is returned. If \a __x is \c NaN, then \c NaN is returned. - */ -double round (double __x) __ATTR_CONST__; - -/** \ingroup avr_math - - The lround() function rounds \a __x to the nearest integer, but rounds - halfway cases away from zero (instead of to the nearest even integer). - This function is similar to round() function, but it differs in type of - return value and in that an overflow is possible. - - \return The rounded long integer value. If \a __x is not a finite number - or an overflow was, this realization returns the \c LONG_MIN value - (0x80000000). - */ -long lround (double __x) __ATTR_CONST__; - -/** \ingroup avr_math - - The lrint() function rounds \a __x to the nearest integer, rounding the - halfway cases to the even integer direction. (That is both 1.5 and 2.5 - values are rounded to 2). This function is similar to rint() function, - but it differs in type of return value and in that an overflow is - possible. - - \return The rounded long integer value. If \a __x is not a finite - number or an overflow was, this realization returns the \c LONG_MIN - value (0x80000000). - */ -long lrint (double __x) __ATTR_CONST__; - -#ifdef __cplusplus -} -#endif - -#endif /* _MATH_H */ - diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/setjmp.h b/build/linux/work/hardware/tools/avr/lib/avr/include/setjmp.h deleted file mode 100644 index 6713e3b08..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/setjmp.h +++ /dev/null @@ -1,160 +0,0 @@ -/* Copyright (c) 2002,2007 Marek Michalkiewicz - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: setjmp.h,v 1.10.2.1 2008/03/24 11:29:53 dmix Exp $ */ - -#ifndef __SETJMP_H_ -#define __SETJMP_H_ 1 - -#ifdef __cplusplus -extern "C" { -#endif - -/* - jmp_buf: - offset size description - 0 16 call-saved registers (r2-r17) - 16 2 frame pointer (r29:r28) - 18 2 stack pointer (SPH:SPL) - 20 1 status register (SREG) - 21 2/3 return address (PC) (2 bytes used for <=128Kw flash) - 23/24 = total size - */ - -#if !defined(__DOXYGEN__) - -#if defined(__AVR_3_BYTE_PC__) && __AVR_3_BYTE_PC__ -# define _JBLEN 24 -#else -# define _JBLEN 23 -#endif -typedef struct _jmp_buf { unsigned char _jb[_JBLEN]; } jmp_buf[1]; - -#endif /* not __DOXYGEN__ */ - -/** \file */ -/** \defgroup setjmp : Non-local goto - - While the C language has the dreaded \c goto statement, it can only be - used to jump to a label in the same (local) function. In order to jump - directly to another (non-local) function, the C library provides the - setjmp() and longjmp() functions. setjmp() and longjmp() are useful for - dealing with errors and interrupts encountered in a low-level subroutine - of a program. - - \note setjmp() and longjmp() make programs hard to understand and maintain. - If possible, an alternative should be used. - - \note longjmp() can destroy changes made to global register - variables (see \ref faq_regbind). - - For a very detailed discussion of setjmp()/longjmp(), see Chapter 7 of - Advanced Programming in the UNIX Environment, by W. Richard - Stevens. - - Example: - - \code - #include - - jmp_buf env; - - int main (void) - { - if (setjmp (env)) - { - ... handle error ... - } - - while (1) - { - ... main processing loop which calls foo() some where ... - } - } - - ... - - void foo (void) - { - ... blah, blah, blah ... - - if (err) - { - longjmp (env, 1); - } - } - \endcode */ - -#ifndef __ATTR_NORETURN__ -#define __ATTR_NORETURN__ __attribute__((__noreturn__)) -#endif - -/** \ingroup setjmp - \brief Save stack context for non-local goto. - - \code #include \endcode - - setjmp() saves the stack context/environment in \e __jmpb for later use by - longjmp(). The stack context will be invalidated if the function which - called setjmp() returns. - - \param __jmpb Variable of type \c jmp_buf which holds the stack - information such that the environment can be restored. - - \returns setjmp() returns 0 if returning directly, and - non-zero when returning from longjmp() using the saved context. */ - -extern int setjmp(jmp_buf __jmpb); - -/** \ingroup setjmp - \brief Non-local jump to a saved stack context. - - \code #include \endcode - - longjmp() restores the environment saved by the last call of setjmp() with - the corresponding \e __jmpb argument. After longjmp() is completed, - program execution continues as if the corresponding call of setjmp() had - just returned the value \e __ret. - - \note longjmp() cannot cause 0 to be returned. If longjmp() is invoked - with a second argument of 0, 1 will be returned instead. - - \param __jmpb Information saved by a previous call to setjmp(). - \param __ret Value to return to the caller of setjmp(). - - \returns This function never returns. */ - -extern void longjmp(jmp_buf __jmpb, int __ret) __ATTR_NORETURN__; - -#ifdef __cplusplus -} -#endif - -#endif /* !__SETJMP_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/stdint.h b/build/linux/work/hardware/tools/avr/lib/avr/include/stdint.h deleted file mode 100644 index 3a99d865b..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/stdint.h +++ /dev/null @@ -1,673 +0,0 @@ -/* Copyright (c) 2002,2004,2005 Marek Michalkiewicz - Copyright (c) 2005, Carlos Lamas - Copyright (c) 2005,2007 Joerg Wunsch - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: stdint.h,v 1.10 2007/01/23 15:32:48 joerg_wunsch Exp $ */ - -/* - * ISO/IEC 9899:1999 7.18 Integer types - */ - -#ifndef __STDINT_H_ -#define __STDINT_H_ - -/** \file */ -/** \defgroup avr_stdint : Standard Integer Types - \code #include \endcode - - Use [u]intN_t if you need exactly N bits. - - Since these typedefs are mandated by the C99 standard, they are preferred - over rolling your own typedefs. */ - -/* - * __USING_MINT8 is defined to 1 if the -mint8 option is in effect. - */ -#if __INT_MAX__ == 127 -# define __USING_MINT8 1 -#else -# define __USING_MINT8 0 -#endif - -/* Integer types */ - -#if defined(__DOXYGEN__) - -/* doxygen gets confused by the __attribute__ stuff */ - -/** \name Exact-width integer types - Integer types having exactly the specified width */ - -/*@{*/ - -/** \ingroup avr_stdint - 8-bit signed type. */ - -typedef signed char int8_t; - -/** \ingroup avr_stdint - 8-bit unsigned type. */ - -typedef unsigned char uint8_t; - -/** \ingroup avr_stdint - 16-bit signed type. */ - -typedef signed int int16_t; - -/** \ingroup avr_stdint - 16-bit unsigned type. */ - -typedef unsigned int uint16_t; - -/** \ingroup avr_stdint - 32-bit signed type. */ - -typedef signed long int int32_t; - -/** \ingroup avr_stdint - 32-bit unsigned type. */ - -typedef unsigned long int uint32_t; - -/** \ingroup avr_stdint - 64-bit signed type. - \note This type is not available when the compiler - option -mint8 is in effect. */ - -typedef signed long long int int64_t; - -/** \ingroup avr_stdint - 64-bit unsigned type. - \note This type is not available when the compiler - option -mint8 is in effect. */ - -typedef unsigned long long int uint64_t; - -/*@}*/ - -#else /* !defined(__DOXYGEN__) */ - -/* actual implementation goes here */ - -typedef int int8_t __attribute__((__mode__(__QI__))); -typedef unsigned int uint8_t __attribute__((__mode__(__QI__))); -typedef int int16_t __attribute__ ((__mode__ (__HI__))); -typedef unsigned int uint16_t __attribute__ ((__mode__ (__HI__))); -typedef int int32_t __attribute__ ((__mode__ (__SI__))); -typedef unsigned int uint32_t __attribute__ ((__mode__ (__SI__))); -#if !__USING_MINT8 -typedef int int64_t __attribute__((__mode__(__DI__))); -typedef unsigned int uint64_t __attribute__((__mode__(__DI__))); -#endif - -#endif /* defined(__DOXYGEN__) */ - -/** \name Integer types capable of holding object pointers - These allow you to declare variables of the same size as a pointer. */ - -/*@{*/ - -/** \ingroup avr_stdint - Signed pointer compatible type. */ - -typedef int16_t intptr_t; - -/** \ingroup avr_stdint - Unsigned pointer compatible type. */ - -typedef uint16_t uintptr_t; - -/*@}*/ - -/** \name Minimum-width integer types - Integer types having at least the specified width */ - -/*@{*/ - -/** \ingroup avr_stdint - signed int with at least 8 bits. */ - -typedef int8_t int_least8_t; - -/** \ingroup avr_stdint - unsigned int with at least 8 bits. */ - -typedef uint8_t uint_least8_t; - -/** \ingroup avr_stdint - signed int with at least 16 bits. */ - -typedef int16_t int_least16_t; - -/** \ingroup avr_stdint - unsigned int with at least 16 bits. */ - -typedef uint16_t uint_least16_t; - -/** \ingroup avr_stdint - signed int with at least 32 bits. */ - -typedef int32_t int_least32_t; - -/** \ingroup avr_stdint - unsigned int with at least 32 bits. */ - -typedef uint32_t uint_least32_t; - -#if !__USING_MINT8 || defined(__DOXYGEN__) -/** \ingroup avr_stdint - signed int with at least 64 bits. - \note This type is not available when the compiler - option -mint8 is in effect. */ - -typedef int64_t int_least64_t; - -/** \ingroup avr_stdint - unsigned int with at least 64 bits. - \note This type is not available when the compiler - option -mint8 is in effect. */ - -typedef uint64_t uint_least64_t; -#endif - -/*@}*/ - - -/** \name Fastest minimum-width integer types - Integer types being usually fastest having at least the specified width */ - -/*@{*/ - -/** \ingroup avr_stdint - fastest signed int with at least 8 bits. */ - -typedef int8_t int_fast8_t; - -/** \ingroup avr_stdint - fastest unsigned int with at least 8 bits. */ - -typedef uint8_t uint_fast8_t; - -/** \ingroup avr_stdint - fastest signed int with at least 16 bits. */ - -typedef int16_t int_fast16_t; - -/** \ingroup avr_stdint - fastest unsigned int with at least 16 bits. */ - -typedef uint16_t uint_fast16_t; - -/** \ingroup avr_stdint - fastest signed int with at least 32 bits. */ - -typedef int32_t int_fast32_t; - -/** \ingroup avr_stdint - fastest unsigned int with at least 32 bits. */ - -typedef uint32_t uint_fast32_t; - -#if !__USING_MINT8 || defined(__DOXYGEN__) -/** \ingroup avr_stdint - fastest signed int with at least 64 bits. - \note This type is not available when the compiler - option -mint8 is in effect. */ - -typedef int64_t int_fast64_t; - -/** \ingroup avr_stdint - fastest unsigned int with at least 64 bits. - \note This type is not available when the compiler - option -mint8 is in effect. */ - -typedef uint64_t uint_fast64_t; -#endif - -/*@}*/ - - -/** \name Greatest-width integer types - Types designating integer data capable of representing any value of - any integer type in the corresponding signed or unsigned category */ - -/*@{*/ - -#if __USING_MINT8 -typedef int32_t intmax_t; - -typedef uint32_t uintmax_t; -#else /* !__USING_MINT8 */ -/** \ingroup avr_stdint - largest signed int available. */ - -typedef int64_t intmax_t; - -/** \ingroup avr_stdint - largest unsigned int available. */ - -typedef uint64_t uintmax_t; -#endif /* __USING_MINT8 */ - -/*@}*/ - -/* Helping macro */ -#ifndef __CONCAT -#define __CONCATenate(left, right) left ## right -#define __CONCAT(left, right) __CONCATenate(left, right) -#endif - -#if !defined(__cplusplus) || defined(__STDC_LIMIT_MACROS) - -/** \name Limits of specified-width integer types - C++ implementations should define these macros only when - __STDC_LIMIT_MACROS is defined before is included */ - -/*@{*/ - -/** \ingroup avr_stdint - largest positive value an int8_t can hold. */ - -#define INT8_MAX 0x7f - -/** \ingroup avr_stdint - smallest negative value an int8_t can hold. */ - -#define INT8_MIN (-INT8_MAX - 1) - -/** \ingroup avr_stdint - largest value an uint8_t can hold. */ - -#define UINT8_MAX (__CONCAT(INT8_MAX, U) * 2U + 1U) - -#if __USING_MINT8 - -#define INT16_MAX 0x7fffL -#define INT16_MIN (-INT16_MAX - 1L) -#define UINT16_MAX (__CONCAT(INT16_MAX, U) * 2UL + 1UL) - -#define INT32_MAX 0x7fffffffLL -#define INT32_MIN (-INT32_MAX - 1LL) -#define UINT32_MAX (__CONCAT(INT32_MAX, U) * 2ULL + 1ULL) - -#else /* !__USING_MINT8 */ - -/** \ingroup avr_stdint - largest positive value an int16_t can hold. */ - -#define INT16_MAX 0x7fff - -/** \ingroup avr_stdint - smallest negative value an int16_t can hold. */ - -#define INT16_MIN (-INT16_MAX - 1) - -/** \ingroup avr_stdint - largest value an uint16_t can hold. */ - -#define UINT16_MAX (__CONCAT(INT16_MAX, U) * 2U + 1U) - -/** \ingroup avr_stdint - largest positive value an int32_t can hold. */ - -#define INT32_MAX 0x7fffffffL - -/** \ingroup avr_stdint - smallest negative value an int32_t can hold. */ - -#define INT32_MIN (-INT32_MAX - 1L) - -/** \ingroup avr_stdint - largest value an uint32_t can hold. */ - -#define UINT32_MAX (__CONCAT(INT32_MAX, U) * 2UL + 1UL) - -#endif /* __USING_MINT8 */ - -/** \ingroup avr_stdint - largest positive value an int64_t can hold. */ - -#define INT64_MAX 0x7fffffffffffffffLL - -/** \ingroup avr_stdint - smallest negative value an int64_t can hold. */ - -#define INT64_MIN (-INT64_MAX - 1LL) - -/** \ingroup avr_stdint - largest value an uint64_t can hold. */ - -#define UINT64_MAX (__CONCAT(INT64_MAX, U) * 2ULL + 1ULL) - -/*@}*/ - -/** \name Limits of minimum-width integer types */ -/*@{*/ - -/** \ingroup avr_stdint - largest positive value an int_least8_t can hold. */ - -#define INT_LEAST8_MAX INT8_MAX - -/** \ingroup avr_stdint - smallest negative value an int_least8_t can hold. */ - -#define INT_LEAST8_MIN INT8_MIN - -/** \ingroup avr_stdint - largest value an uint_least8_t can hold. */ - -#define UINT_LEAST8_MAX UINT8_MAX - -/** \ingroup avr_stdint - largest positive value an int_least16_t can hold. */ - -#define INT_LEAST16_MAX INT16_MAX - -/** \ingroup avr_stdint - smallest negative value an int_least16_t can hold. */ - -#define INT_LEAST16_MIN INT16_MIN - -/** \ingroup avr_stdint - largest value an uint_least16_t can hold. */ - -#define UINT_LEAST16_MAX UINT16_MAX - -/** \ingroup avr_stdint - largest positive value an int_least32_t can hold. */ - -#define INT_LEAST32_MAX INT32_MAX - -/** \ingroup avr_stdint - smallest negative value an int_least32_t can hold. */ - -#define INT_LEAST32_MIN INT32_MIN - -/** \ingroup avr_stdint - largest value an uint_least32_t can hold. */ - -#define UINT_LEAST32_MAX UINT32_MAX - -/** \ingroup avr_stdint - largest positive value an int_least64_t can hold. */ - -#define INT_LEAST64_MAX INT64_MAX - -/** \ingroup avr_stdint - smallest negative value an int_least64_t can hold. */ - -#define INT_LEAST64_MIN INT64_MIN - -/** \ingroup avr_stdint - largest value an uint_least64_t can hold. */ - -#define UINT_LEAST64_MAX UINT64_MAX - -/*@}*/ - -/** \name Limits of fastest minimum-width integer types */ - -/*@{*/ - -/** \ingroup avr_stdint - largest positive value an int_fast8_t can hold. */ - -#define INT_FAST8_MAX INT8_MAX - -/** \ingroup avr_stdint - smallest negative value an int_fast8_t can hold. */ - -#define INT_FAST8_MIN INT8_MIN - -/** \ingroup avr_stdint - largest value an uint_fast8_t can hold. */ - -#define UINT_FAST8_MAX UINT8_MAX - -/** \ingroup avr_stdint - largest positive value an int_fast16_t can hold. */ - -#define INT_FAST16_MAX INT16_MAX - -/** \ingroup avr_stdint - smallest negative value an int_fast16_t can hold. */ - -#define INT_FAST16_MIN INT16_MIN - -/** \ingroup avr_stdint - largest value an uint_fast16_t can hold. */ - -#define UINT_FAST16_MAX UINT16_MAX - -/** \ingroup avr_stdint - largest positive value an int_fast32_t can hold. */ - -#define INT_FAST32_MAX INT32_MAX - -/** \ingroup avr_stdint - smallest negative value an int_fast32_t can hold. */ - -#define INT_FAST32_MIN INT32_MIN - -/** \ingroup avr_stdint - largest value an uint_fast32_t can hold. */ - -#define UINT_FAST32_MAX UINT32_MAX - -/** \ingroup avr_stdint - largest positive value an int_fast64_t can hold. */ - -#define INT_FAST64_MAX INT64_MAX - -/** \ingroup avr_stdint - smallest negative value an int_fast64_t can hold. */ - -#define INT_FAST64_MIN INT64_MIN - -/** \ingroup avr_stdint - largest value an uint_fast64_t can hold. */ - -#define UINT_FAST64_MAX UINT64_MAX - -/*@}*/ - -/** \name Limits of integer types capable of holding object pointers */ - -/*@{*/ - -/** \ingroup avr_stdint - largest positive value an intptr_t can hold. */ - -#define INTPTR_MAX INT16_MAX - -/** \ingroup avr_stdint - smallest negative value an intptr_t can hold. */ - -#define INTPTR_MIN INT16_MIN - -/** \ingroup avr_stdint - largest value an uintptr_t can hold. */ - -#define UINTPTR_MAX UINT16_MAX - -/*@}*/ - -/** \name Limits of greatest-width integer types */ - -/*@{*/ - -/** \ingroup avr_stdint - largest positive value an intmax_t can hold. */ - -#define INTMAX_MAX INT64_MAX - -/** \ingroup avr_stdint - smallest negative value an intmax_t can hold. */ - -#define INTMAX_MIN INT64_MIN - -/** \ingroup avr_stdint - largest value an uintmax_t can hold. */ - -#define UINTMAX_MAX UINT64_MAX - -/*@}*/ - -/** \name Limits of other integer types - C++ implementations should define these macros only when - __STDC_LIMIT_MACROS is defined before is included */ - -/*@{*/ - -/** \ingroup avr_stdint - largest positive value a ptrdiff_t can hold. */ - -#define PTRDIFF_MAX INT16_MAX - -/** \ingroup avr_stdint - smallest negative value a ptrdiff_t can hold. */ - -#define PTRDIFF_MIN INT16_MIN - - -/* Limits of sig_atomic_t */ -/* signal.h is currently not implemented (not avr/signal.h) */ - -/** \ingroup avr_stdint - largest positive value a sig_atomic_t can hold. */ - -#define SIG_ATOMIC_MAX INT8_MAX - -/** \ingroup avr_stdint - smallest negative value a sig_atomic_t can hold. */ - -#define SIG_ATOMIC_MIN INT8_MIN - - -/** \ingroup avr_stdint - largest value a size_t can hold. */ - -#define SIZE_MAX (__CONCAT(INT16_MAX, U)) - - -/* Limits of wchar_t */ -/* wchar.h is currently not implemented */ -/* #define WCHAR_MAX */ -/* #define WCHAR_MIN */ - - -/* Limits of wint_t */ -/* wchar.h is currently not implemented */ -/* #define WINT_MAX */ -/* #define WINT_MIN */ - - -#endif /* !defined(__cplusplus) || defined(__STDC_LIMIT_MACROS) */ - -#if !defined(__cplusplus) || defined(__STDC_CONSTANT_MACROS) - -/** \name Macros for integer constants - C++ implementations should define these macros only when - __STDC_CONSTANT_MACROS is defined before is included. - - These definitions are valid for integer constants without suffix and - for macros defined as integer constant without suffix */ - -/** \ingroup avr_stdint - define a constant of type int8_t */ - -#define INT8_C(value) ((int8_t) value) - -/** \ingroup avr_stdint - define a constant of type uint8_t */ - -#define UINT8_C(value) ((uint8_t) __CONCAT(value, U)) - -#if __USING_MINT8 - -#define INT16_C(value) __CONCAT(value, L) -#define UINT16_C(value) __CONCAT(value, UL) - -#define INT32_C(value) ((int32_t) __CONCAT(value, LL)) -#define UINT32_C(value) ((uint32_t) __CONCAT(value, ULL)) - -#else /* !__USING_MINT8 */ - -/** \ingroup avr_stdint - define a constant of type int16_t */ - -#define INT16_C(value) value - -/** \ingroup avr_stdint - define a constant of type uint16_t */ - -#define UINT16_C(value) __CONCAT(value, U) - -/** \ingroup avr_stdint - define a constant of type int32_t */ - -#define INT32_C(value) __CONCAT(value, L) - -/** \ingroup avr_stdint - define a constant of type uint32_t */ - -#define UINT32_C(value) __CONCAT(value, UL) - -#endif /* __USING_MINT8 */ - -/** \ingroup avr_stdint - define a constant of type int64_t */ - -#define INT64_C(value) __CONCAT(value, LL) - -/** \ingroup avr_stdint - define a constant of type uint64_t */ - -#define UINT64_C(value) __CONCAT(value, ULL) - -/** \ingroup avr_stdint - define a constant of type intmax_t */ - -#define INTMAX_C(value) __CONCAT(value, LL) - -/** \ingroup avr_stdint - define a constant of type uintmax_t */ - -#define UINTMAX_C(value) __CONCAT(value, ULL) - -/*@}*/ - -#endif /* !defined(__cplusplus) || defined(__STDC_LIMIT_MACROS) */ - - -#endif /* _STDINT_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/stdio.h b/build/linux/work/hardware/tools/avr/lib/avr/include/stdio.h deleted file mode 100644 index 7c87a3f06..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/stdio.h +++ /dev/null @@ -1,961 +0,0 @@ -/* Copyright (c) 2002, 2005, 2007 Joerg Wunsch - All rights reserved. - - Portions of documentation Copyright (c) 1990, 1991, 1993 - The Regents of the University of California. - - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. - - $Id: stdio.h,v 1.29.2.1 2008/02/23 08:59:27 dmix Exp $ -*/ - -#ifndef _STDIO_H_ -#define _STDIO_H_ 1 - -#ifndef __ASSEMBLER__ - -#include -#include - -#define __need_NULL -#define __need_size_t -#include - -/** \file */ -/** \defgroup avr_stdio : Standard IO facilities - \code #include \endcode - -

    Introduction to the Standard IO facilities

    - - This file declares the standard IO facilities that are implemented - in \c avr-libc. Due to the nature of the underlying hardware, - only a limited subset of standard IO is implemented. There is no - actual file implementation available, so only device IO can be - performed. Since there's no operating system, the application - needs to provide enough details about their devices in order to - make them usable by the standard IO facilities. - - Due to space constraints, some functionality has not been - implemented at all (like some of the \c printf conversions that - have been left out). Nevertheless, potential users of this - implementation should be warned: the \c printf and \c scanf families of functions, although - usually associated with presumably simple things like the - famous "Hello, world!" program, are actually fairly complex - which causes their inclusion to eat up a fair amount of code space. - Also, they are not fast due to the nature of interpreting the - format string at run-time. Whenever possible, resorting to the - (sometimes non-standard) predetermined conversion facilities that are - offered by avr-libc will usually cost much less in terms of speed - and code size. - -

    Tunable options for code size vs. feature set

    - - In order to allow programmers a code size vs. functionality tradeoff, - the function vfprintf() which is the heart of the printf family can be - selected in different flavours using linker options. See the - documentation of vfprintf() for a detailed description. The same - applies to vfscanf() and the \c scanf family of functions. - -

    Outline of the chosen API

    - - The standard streams \c stdin, \c stdout, and \c stderr are - provided, but contrary to the C standard, since avr-libc has no - knowledge about applicable devices, these streams are not already - pre-initialized at application startup. Also, since there is no - notion of "file" whatsoever to avr-libc, there is no function - \c fopen() that could be used to associate a stream to some device. - (See \ref stdio_note1 "note 1".) Instead, the function \c fdevopen() - is provided to associate a stream to a device, where the device - needs to provide a function to send a character, to receive a - character, or both. There is no differentiation between "text" and - "binary" streams inside avr-libc. Character \c \\n is sent - literally down to the device's \c put() function. If the device - requires a carriage return (\c \\r) character to be sent before - the linefeed, its \c put() routine must implement this (see - \ref stdio_note2 "note 2"). - - As an alternative method to fdevopen(), the macro - fdev_setup_stream() might be used to setup a user-supplied FILE - structure. - - It should be noted that the automatic conversion of a newline - character into a carriage return - newline sequence breaks binary - transfers. If binary transfers are desired, no automatic - conversion should be performed, but instead any string that aims - to issue a CR-LF sequence must use "\r\n" explicitly. - - For convenience, the first call to \c fdevopen() that opens a - stream for reading will cause the resulting stream to be aliased - to \c stdin. Likewise, the first call to \c fdevopen() that opens - a stream for writing will cause the resulting stream to be aliased - to both, \c stdout, and \c stderr. Thus, if the open was done - with both, read and write intent, all three standard streams will - be identical. Note that these aliases are indistinguishable from - each other, thus calling \c fclose() on such a stream will also - effectively close all of its aliases (\ref stdio_note3 "note 3"). - - It is possible to tie additional user data to a stream, using - fdev_set_udata(). The backend put and get functions can then - extract this user data using fdev_get_udata(), and act - appropriately. For example, a single put function could be used - to talk to two different UARTs that way, or the put and get - functions could keep internal state between calls there. - -

    Format strings in flash ROM

    - - All the \c printf and \c scanf family functions come in two flavours: the - standard name, where the format string is expected to be in - SRAM, as well as a version with the suffix "_P" where the format - string is expected to reside in the flash ROM. The macro - \c PSTR (explained in \ref avr_pgmspace) becomes very handy - for declaring these format strings. - - \anchor stdio_without_malloc -

    Running stdio without malloc()

    - - By default, fdevopen() requires malloc(). As this is often - not desired in the limited environment of a microcontroller, an - alternative option is provided to run completely without malloc(). - - The macro fdev_setup_stream() is provided to prepare a - user-supplied FILE buffer for operation with stdio. - -

    Example

    - - \code - #include - - static int uart_putchar(char c, FILE *stream); - - static FILE mystdout = FDEV_SETUP_STREAM(uart_putchar, NULL, - _FDEV_SETUP_WRITE); - - static int - uart_putchar(char c, FILE *stream) - { - - if (c == '\n') - uart_putchar('\r', stream); - loop_until_bit_is_set(UCSRA, UDRE); - UDR = c; - return 0; - } - - int - main(void) - { - init_uart(); - stdout = &mystdout; - printf("Hello, world!\n"); - - return 0; - } - \endcode - - This example uses the initializer form FDEV_SETUP_STREAM() rather - than the function-like fdev_setup_stream(), so all data - initialization happens during C start-up. - - If streams initialized that way are no longer needed, they can be - destroyed by first calling the macro fdev_close(), and then - destroying the object itself. No call to fclose() should be - issued for these streams. While calling fclose() itself is - harmless, it will cause an undefined reference to free() and thus - cause the linker to link the malloc module into the application. - -

    Notes

    - - \anchor stdio_note1 \par Note 1: - It might have been possible to implement a device abstraction that - is compatible with \c fopen() but since this would have required - to parse a string, and to take all the information needed either - out of this string, or out of an additional table that would need to be - provided by the application, this approach was not taken. - - \anchor stdio_note2 \par Note 2: - This basically follows the Unix approach: if a device such as a - terminal needs special handling, it is in the domain of the - terminal device driver to provide this functionality. Thus, a - simple function suitable as \c put() for \c fdevopen() that talks - to a UART interface might look like this: - - \code - int - uart_putchar(char c, FILE *stream) - { - - if (c == '\n') - uart_putchar('\r'); - loop_until_bit_is_set(UCSRA, UDRE); - UDR = c; - return 0; - } - \endcode - - \anchor stdio_note3 \par Note 3: - This implementation has been chosen because the cost of maintaining - an alias is considerably smaller than the cost of maintaining full - copies of each stream. Yet, providing an implementation that offers - the complete set of standard streams was deemed to be useful. Not - only that writing \c printf() instead of fprintf(mystream, ...) - saves typing work, but since avr-gcc needs to resort to pass all - arguments of variadic functions on the stack (as opposed to passing - them in registers for functions that take a fixed number of - parameters), the ability to pass one parameter less by implying - \c stdin will also save some execution time. -*/ - -#if !defined(__DOXYGEN__) - -/* - * This is an internal structure of the library that is subject to be - * changed without warnings at any time. Please do *never* reference - * elements of it beyond by using the official interfaces provided. - */ -struct __file { - char *buf; /* buffer pointer */ - unsigned char unget; /* ungetc() buffer */ - uint8_t flags; /* flags, see below */ -#define __SRD 0x0001 /* OK to read */ -#define __SWR 0x0002 /* OK to write */ -#define __SSTR 0x0004 /* this is an sprintf/snprintf string */ -#define __SPGM 0x0008 /* fmt string is in progmem */ -#define __SERR 0x0010 /* found error */ -#define __SEOF 0x0020 /* found EOF */ -#define __SUNGET 0x040 /* ungetc() happened */ -#define __SMALLOC 0x80 /* handle is malloc()ed */ -#if 0 -/* possible future extensions, will require uint16_t flags */ -#define __SRW 0x0100 /* open for reading & writing */ -#define __SLBF 0x0200 /* line buffered */ -#define __SNBF 0x0400 /* unbuffered */ -#define __SMBF 0x0800 /* buf is from malloc */ -#endif - int size; /* size of buffer */ - int len; /* characters read or written so far */ - int (*put)(char, struct __file *); /* function to write one char to device */ - int (*get)(struct __file *); /* function to read one char from device */ - void *udata; /* User defined and accessible data. */ -}; - -#endif /* not __DOXYGEN__ */ - -/*@{*/ -/** - \c FILE is the opaque structure that is passed around between the - various standard IO functions. -*/ -#define FILE struct __file - -/** - Stream that will be used as an input stream by the simplified - functions that don't take a \c stream argument. - - The first stream opened with read intent using \c fdevopen() - will be assigned to \c stdin. -*/ -#define stdin (__iob[0]) - -/** - Stream that will be used as an output stream by the simplified - functions that don't take a \c stream argument. - - The first stream opened with write intent using \c fdevopen() - will be assigned to both, \c stdin, and \c stderr. -*/ -#define stdout (__iob[1]) - -/** - Stream destined for error output. Unless specifically assigned, - identical to \c stdout. - - If \c stderr should point to another stream, the result of - another \c fdevopen() must be explicitly assigned to it without - closing the previous \c stderr (since this would also close - \c stdout). -*/ -#define stderr (__iob[2]) - -/** - \c EOF declares the value that is returned by various standard IO - functions in case of an error. Since the AVR platform (currently) - doesn't contain an abstraction for actual files, its origin as - "end of file" is somewhat meaningless here. -*/ -#define EOF (-1) - -/** This macro inserts a pointer to user defined data into a FILE - stream object. - - The user data can be useful for tracking state in the put and get - functions supplied to the fdevopen() function. */ -#define fdev_set_udata(stream, u) do { (stream)->udata = u; } while(0) - -/** This macro retrieves a pointer to user defined data from a FILE - stream object. */ -#define fdev_get_udata(stream) ((stream)->udata) - -#if defined(__DOXYGEN__) -/** - \brief Setup a user-supplied buffer as an stdio stream - - This macro takes a user-supplied buffer \c stream, and sets it up - as a stream that is valid for stdio operations, similar to one that - has been obtained dynamically from fdevopen(). The buffer to setup - must be of type FILE. - - The arguments \c put and \c get are identical to those that need to - be passed to fdevopen(). - - The \c rwflag argument can take one of the values _FDEV_SETUP_READ, - _FDEV_SETUP_WRITE, or _FDEV_SETUP_RW, for read, write, or read/write - intent, respectively. - - \note No assignments to the standard streams will be performed by - fdev_setup_stream(). If standard streams are to be used, these - need to be assigned by the user. See also under - \ref stdio_without_malloc "Running stdio without malloc()". - */ -#define fdev_setup_stream(stream, put, get, rwflag) -#else /* !DOXYGEN */ -#define fdev_setup_stream(stream, p, g, f) \ - do { \ - (stream)->put = p; \ - (stream)->get = g; \ - (stream)->flags = f; \ - (stream)->udata = 0; \ - } while(0) -#endif /* DOXYGEN */ - -#define _FDEV_SETUP_READ __SRD /**< fdev_setup_stream() with read intent */ -#define _FDEV_SETUP_WRITE __SWR /**< fdev_setup_stream() with write intent */ -#define _FDEV_SETUP_RW (__SRD|__SWR) /**< fdev_setup_stream() with read/write intent */ - -/** - * Return code for an error condition during device read. - * - * To be used in the get function of fdevopen(). - */ -#define _FDEV_ERR (-1) - -/** - * Return code for an end-of-file condition during device read. - * - * To be used in the get function of fdevopen(). - */ -#define _FDEV_EOF (-2) - -#if defined(__DOXYGEN__) -/** - \brief Initializer for a user-supplied stdio stream - - This macro acts similar to fdev_setup_stream(), but it is to be - used as the initializer of a variable of type FILE. - - The remaining arguments are to be used as explained in - fdev_setup_stream(). - */ -#define FDEV_SETUP_STREAM(put, get, rwflag) -#else /* !DOXYGEN */ -#define FDEV_SETUP_STREAM(p, g, f) \ - { \ - .put = p, \ - .get = g, \ - .flags = f, \ - .udata = 0, \ - } -#endif /* DOXYGEN */ - -#ifdef __cplusplus -extern "C" { -#endif - -#if !defined(__DOXYGEN__) -/* - * Doxygen documentation can be found in fdevopen.c. - */ - -extern struct __file *__iob[]; - -#if defined(__STDIO_FDEVOPEN_COMPAT_12) -/* - * Declare prototype for the discontinued version of fdevopen() that - * has been in use up to avr-libc 1.2.x. The new implementation has - * some backwards compatibility with the old version. - */ -extern FILE *fdevopen(int (*__put)(char), int (*__get)(void), - int __opts __attribute__((unused))); -#else /* !defined(__STDIO_FDEVOPEN_COMPAT_12) */ -/* New prototype for avr-libc 1.4 and above. */ -extern FILE *fdevopen(int (*__put)(char, FILE*), int (*__get)(FILE*)); -#endif /* defined(__STDIO_FDEVOPEN_COMPAT_12) */ - -#endif /* not __DOXYGEN__ */ - -/** - This function closes \c stream, and disallows and further - IO to and from it. - - When using fdevopen() to setup the stream, a call to fclose() is - needed in order to free the internal resources allocated. - - If the stream has been set up using fdev_setup_stream() or - FDEV_SETUP_STREAM(), use fdev_close() instead. - - It currently always returns 0 (for success). -*/ -extern int fclose(FILE *__stream); - -/** - This macro frees up any library resources that might be associated - with \c stream. It should be called if \c stream is no longer - needed, right before the application is going to destroy the - \c stream object itself. - - (Currently, this macro evaluates to nothing, but this might change - in future versions of the library.) -*/ -#if defined(__DOXYGEN__) -# define fdev_close() -#else -# define fdev_close() ((void)0) -#endif - -/** - \c vfprintf is the central facility of the \c printf family of - functions. It outputs values to \c stream under control of a - format string passed in \c fmt. The actual values to print are - passed as a variable argument list \c ap. - - \c vfprintf returns the number of characters written to \c stream, - or \c EOF in case of an error. Currently, this will only happen - if \c stream has not been opened with write intent. - - The format string is composed of zero or more directives: ordinary - characters (not \c %), which are copied unchanged to the output - stream; and conversion specifications, each of which results in - fetching zero or more subsequent arguments. Each conversion - specification is introduced by the \c % character. The arguments must - properly correspond (after type promotion) with the conversion - specifier. After the \c %, the following appear in sequence: - - - Zero or more of the following flags: -
      -
    • \c # The value should be converted to an "alternate form". For - c, d, i, s, and u conversions, this option has no effect. - For o conversions, the precision of the number is - increased to force the first character of the output - string to a zero (except if a zero value is printed with - an explicit precision of zero). For x and X conversions, - a non-zero result has the string `0x' (or `0X' for X - conversions) prepended to it.
      • -
    • \c 0 (zero) Zero padding. For all conversions, the converted - value is padded on the left with zeros rather than blanks. - If a precision is given with a numeric conversion (d, i, - o, u, i, x, and X), the 0 flag is ignored.
      • -
    • \c - A negative field width flag; the converted value is to be - left adjusted on the field boundary. The converted value - is padded on the right with blanks, rather than on the - left with blanks or zeros. A - overrides a 0 if both are - given.
      • -
    • ' ' (space) A blank should be left before a positive number - produced by a signed conversion (d, or i).
      • -
    • \c + A sign must always be placed before a number produced by a - signed conversion. A + overrides a space if both are - used.
      • -
    - - - An optional decimal digit string specifying a minimum field width. - If the converted value has fewer characters than the field width, it - will be padded with spaces on the left (or right, if the left-adjustment - flag has been given) to fill out the field width. - - An optional precision, in the form of a period . followed by an - optional digit string. If the digit string is omitted, the - precision is taken as zero. This gives the minimum number of - digits to appear for d, i, o, u, x, and X conversions, or the - maximum number of characters to be printed from a string for \c s - conversions. - - An optional \c l or \c h length modifier, that specifies that the - argument for the d, i, o, u, x, or X conversion is a \c "long int" - rather than \c int. The \c h is ignored, as \c "short int" is - equivalent to \c int. - - A character that specifies the type of conversion to be applied. - - The conversion specifiers and their meanings are: - - - \c diouxX The int (or appropriate variant) argument is converted - to signed decimal (d and i), unsigned octal (o), unsigned - decimal (u), or unsigned hexadecimal (x and X) notation. - The letters "abcdef" are used for x conversions; the - letters "ABCDEF" are used for X conversions. The - precision, if any, gives the minimum number of digits that - must appear; if the converted value requires fewer digits, - it is padded on the left with zeros. - - \c p The void * argument is taken as an unsigned integer, - and converted similarly as a %\#x command would do. - - \c c The \c int argument is converted to an \c "unsigned char", and the - resulting character is written. - - \c s The \c "char *" argument is expected to be a pointer to an array - of character type (pointer to a string). Characters from - the array are written up to (but not including) a - terminating NUL character; if a precision is specified, no - more than the number specified are written. If a precision - is given, no null character need be present; if the - precision is not specified, or is greater than the size of - the array, the array must contain a terminating NUL - character. - - \c % A \c % is written. No argument is converted. The complete - conversion specification is "%%". - - \c eE The double argument is rounded and converted in the format - \c "[-]d.dddedd" where there is one digit before the - decimal-point character and the number of digits after it - is equal to the precision; if the precision is missing, it - is taken as 6; if the precision is zero, no decimal-point - character appears. An \e E conversion uses the letter \c 'E' - (rather than \c 'e') to introduce the exponent. The exponent - always contains two digits; if the value is zero, - the exponent is 00. - - \c fF The double argument is rounded and converted to decimal notation - in the format \c "[-]ddd.ddd", where the number of digits after the - decimal-point character is equal to the precision specification. - If the precision is missing, it is taken as 6; if the precision - is explicitly zero, no decimal-point character appears. If a - decimal point appears, at least one digit appears before it. - - \c gG The double argument is converted in style \c f or \c e (or - \c F or \c E for \c G conversions). The precision - specifies the number of significant digits. If the - precision is missing, 6 digits are given; if the precision - is zero, it is treated as 1. Style \c e is used if the - exponent from its conversion is less than -4 or greater - than or equal to the precision. Trailing zeros are removed - from the fractional part of the result; a decimal point - appears only if it is followed by at least one digit. - - \c S Similar to the \c s format, except the pointer is expected to - point to a program-memory (ROM) string instead of a RAM string. - - In no case does a non-existent or small field width cause truncation of a - numeric field; if the result of a conversion is wider than the field - width, the field is expanded to contain the conversion result. - - Since the full implementation of all the mentioned features becomes - fairly large, three different flavours of vfprintf() can be - selected using linker options. The default vfprintf() implements - all the mentioned functionality except floating point conversions. - A minimized version of vfprintf() is available that only implements - the very basic integer and string conversion facilities, but only - the \c # additional option can be specified using conversion - flags (these flags are parsed correctly from the format - specification, but then simply ignored). This version can be - requested using the following \ref gcc_minusW "compiler options": - - \code - -Wl,-u,vfprintf -lprintf_min - \endcode - - If the full functionality including the floating point conversions - is required, the following options should be used: - - \code - -Wl,-u,vfprintf -lprintf_flt -lm - \endcode - - \par Limitations: - - The specified width and precision can be at most 255. - - \par Notes: - - For floating-point conversions, if you link default or minimized - version of vfprintf(), the symbol \c ? will be output and double - argument will be skiped. So you output below will not be crashed. - For default version the width field and the "pad to left" ( symbol - minus ) option will work in this case. - - The \c hh length modifier is ignored (\c char argument is - promouted to \c int). More exactly, this realization does not check - the number of \c h symbols. - - But the \c ll length modifier will to abort the output, as this - realization does not operate \c long \c long arguments. - - The variable width or precision field (an asterisk \c * symbol) - is not realized and will to abort the output. - - */ - -extern int vfprintf(FILE *__stream, const char *__fmt, va_list __ap); - -/** - Variant of \c vfprintf() that uses a \c fmt string that resides - in program memory. -*/ -extern int vfprintf_P(FILE *__stream, const char *__fmt, va_list __ap); - -/** - The function \c fputc sends the character \c c (though given as type - \c int) to \c stream. It returns the character, or \c EOF in case - an error occurred. -*/ -extern int fputc(int __c, FILE *__stream); - -#if !defined(__DOXYGEN__) - -/* putc() function implementation, required by standard */ -extern int putc(int __c, FILE *__stream); - -/* putchar() function implementation, required by standard */ -extern int putchar(int __c); - -#endif /* not __DOXYGEN__ */ - -/** - The macro \c putc used to be a "fast" macro implementation with a - functionality identical to fputc(). For space constraints, in - \c avr-libc, it is just an alias for \c fputc. -*/ -#define putc(__c, __stream) fputc(__c, __stream) - -/** - The macro \c putchar sends character \c c to \c stdout. -*/ -#define putchar(__c) fputc(__c, stdout) - -/** - The function \c printf performs formatted output to stream - \c stderr. See \c vfprintf() for details. -*/ -extern int printf(const char *__fmt, ...); - -/** - Variant of \c printf() that uses a \c fmt string that resides - in program memory. -*/ -extern int printf_P(const char *__fmt, ...); - -/** - The function \c vprintf performs formatted output to stream - \c stdout, taking a variable argument list as in vfprintf(). - - See vfprintf() for details. -*/ -extern int vprintf(const char *__fmt, va_list __ap); - -/** - Variant of \c printf() that sends the formatted characters - to string \c s. -*/ -extern int sprintf(char *__s, const char *__fmt, ...); - -/** - Variant of \c sprintf() that uses a \c fmt string that resides - in program memory. -*/ -extern int sprintf_P(char *__s, const char *__fmt, ...); - -/** - Like \c sprintf(), but instead of assuming \c s to be of infinite - size, no more than \c n characters (including the trailing NUL - character) will be converted to \c s. - - Returns the number of characters that would have been written to - \c s if there were enough space. -*/ -extern int snprintf(char *__s, size_t __n, const char *__fmt, ...); - -/** - Variant of \c snprintf() that uses a \c fmt string that resides - in program memory. -*/ -extern int snprintf_P(char *__s, size_t __n, const char *__fmt, ...); - -/** - Like \c sprintf() but takes a variable argument list for the - arguments. -*/ -extern int vsprintf(char *__s, const char *__fmt, va_list ap); - -/** - Variant of \c vsprintf() that uses a \c fmt string that resides - in program memory. -*/ -extern int vsprintf_P(char *__s, const char *__fmt, va_list ap); - -/** - Like \c vsprintf(), but instead of assuming \c s to be of infinite - size, no more than \c n characters (including the trailing NUL - character) will be converted to \c s. - - Returns the number of characters that would have been written to - \c s if there were enough space. -*/ -extern int vsnprintf(char *__s, size_t __n, const char *__fmt, va_list ap); - -/** - Variant of \c vsnprintf() that uses a \c fmt string that resides - in program memory. -*/ -extern int vsnprintf_P(char *__s, size_t __n, const char *__fmt, va_list ap); -/** - The function \c fprintf performs formatted output to \c stream. - See \c vfprintf() for details. -*/ -extern int fprintf(FILE *__stream, const char *__fmt, ...); - -/** - Variant of \c fprintf() that uses a \c fmt string that resides - in program memory. -*/ -extern int fprintf_P(FILE *__stream, const char *__fmt, ...); - -/** - Write the string pointed to by \c str to stream \c stream. - - Returns 0 on success and EOF on error. -*/ -extern int fputs(const char *__str, FILE *__stream); - -/** - Variant of fputs() where \c str resides in program memory. -*/ -extern int fputs_P(const char *__str, FILE *__stream); - -/** - Write the string pointed to by \c str, and a trailing newline - character, to \c stdout. -*/ -extern int puts(const char *__str); - -/** - Variant of puts() where \c str resides in program memory. -*/ -extern int puts_P(const char *__str); - -/** - Write \c nmemb objects, \c size bytes each, to \c stream. - The first byte of the first object is referenced by \c ptr. - - Returns the number of objects successfully written, i. e. - \c nmemb unless an output error occured. - */ -extern size_t fwrite(const void *__ptr, size_t __size, size_t __nmemb, - FILE *__stream); - -/** - The function \c fgetc reads a character from \c stream. It returns - the character, or \c EOF in case end-of-file was encountered or an - error occurred. The routines feof() or ferror() must be used to - distinguish between both situations. -*/ -extern int fgetc(FILE *__stream); - -#if !defined(__DOXYGEN__) - -/* getc() function implementation, required by standard */ -extern int getc(FILE *__stream); - -/* getchar() function implementation, required by standard */ -extern int getchar(void); - -#endif /* not __DOXYGEN__ */ - -/** - The macro \c getc used to be a "fast" macro implementation with a - functionality identical to fgetc(). For space constraints, in - \c avr-libc, it is just an alias for \c fgetc. -*/ -#define getc(__stream) fgetc(__stream) - -/** - The macro \c getchar reads a character from \c stdin. Return - values and error handling is identical to fgetc(). -*/ -#define getchar() fgetc(stdin) - -/** - The ungetc() function pushes the character \c c (converted to an - unsigned char) back onto the input stream pointed to by \c stream. - The pushed-back character will be returned by a subsequent read on - the stream. - - Currently, only a single character can be pushed back onto the - stream. - - The ungetc() function returns the character pushed back after the - conversion, or \c EOF if the operation fails. If the value of the - argument \c c character equals \c EOF, the operation will fail and - the stream will remain unchanged. -*/ -extern int ungetc(int __c, FILE *__stream); - -/** - Read at most size - 1 bytes from \c stream, until a - newline character was encountered, and store the characters in the - buffer pointed to by \c str. Unless an error was encountered while - reading, the string will then be terminated with a \c NUL - character. - - If an error was encountered, the function returns NULL and sets the - error flag of \c stream, which can be tested using ferror(). - Otherwise, a pointer to the string will be returned. */ -extern char *fgets(char *__str, int __size, FILE *__stream); - -/** - Similar to fgets() except that it will operate on stream \c stdin, - and the trailing newline (if any) will not be stored in the string. - It is the caller's responsibility to provide enough storage to hold - the characters read. */ -extern char *gets(char *__str); - -/** - Read \c nmemb objects, \c size bytes each, from \c stream, - to the buffer pointed to by \c ptr. - - Returns the number of objects successfully read, i. e. - \c nmemb unless an input error occured or end-of-file was - encountered. feof() and ferror() must be used to distinguish - between these two conditions. - */ -extern size_t fread(void *__ptr, size_t __size, size_t __nmemb, - FILE *__stream); - -/** - Clear the error and end-of-file flags of \c stream. - */ -extern void clearerr(FILE *__stream); - -#if !defined(__DOXYGEN__) -/* fast inlined version of clearerr() */ -#define clearerror(s) do { (s)->flags &= ~(__SERR | __SEOF); } while(0) -#endif /* !defined(__DOXYGEN__) */ - -/** - Test the end-of-file flag of \c stream. This flag can only be cleared - by a call to clearerr(). - */ -extern int feof(FILE *__stream); - -#if !defined(__DOXYGEN__) -/* fast inlined version of feof() */ -#define feof(s) ((s)->flags & __SEOF) -#endif /* !defined(__DOXYGEN__) */ - -/** - Test the error flag of \c stream. This flag can only be cleared - by a call to clearerr(). - */ -extern int ferror(FILE *__stream); - -#if !defined(__DOXYGEN__) -/* fast inlined version of ferror() */ -#define ferror(s) ((s)->flags & __SERR) -#endif /* !defined(__DOXYGEN__) */ - -extern int vfscanf(FILE *__stream, const char *__fmt, va_list __ap); - -/** - Variant of vfscanf() using a \c fmt string in program memory. - */ -extern int vfscanf_P(FILE *__stream, const char *__fmt, va_list __ap); - -/** - The function \c fscanf performs formatted input, reading the - input data from \c stream. - - See vfscanf() for details. - */ -extern int fscanf(FILE *__stream, const char *__fmt, ...); - -/** - Variant of fscanf() using a \c fmt string in program memory. - */ -extern int fscanf_P(FILE *__stream, const char *__fmt, ...); - -/** - The function \c scanf performs formatted input from stream \c stdin. - - See vfscanf() for details. - */ -extern int scanf(const char *__fmt, ...); - -/** - Variant of scanf() where \c fmt resides in program memory. - */ -extern int scanf_P(const char *__fmt, ...); - -/** - The function \c vscanf performs formatted input from stream - \c stdin, taking a variable argument list as in vfscanf(). - - See vfscanf() for details. -*/ -extern int vscanf(const char *__fmt, va_list __ap); - -/** - The function \c sscanf performs formatted input, reading the - input data from the buffer pointed to by \c buf. - - See vfscanf() for details. - */ -extern int sscanf(const char *__buf, const char *__fmt, ...); - -/** - Variant of sscanf() using a \c fmt string in program memory. - */ -extern int sscanf_P(const char *__buf, const char *__fmt, ...); - -#if defined(__DOXYGEN__) -/** - Flush \c stream. - - This is a null operation provided for source-code compatibility - only, as the standard IO implementation currently does not perform - any buffering. - */ -extern int fflush(FILE *stream); -#else -static __inline__ int fflush(FILE *stream __attribute__((unused))) -{ - return 0; -} -#endif - -#ifdef __cplusplus -} -#endif - -/*@}*/ - -/* - * The following constants are currently not used by avr-libc's - * stdio subsystem. They are defined here since the gcc build - * environment expects them to be here. - */ -#define SEEK_SET 0 -#define SEEK_CUR 1 -#define SEEK_END 2 - -#endif /* __ASSEMBLER */ - -#endif /* _STDLIB_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/stdlib.h b/build/linux/work/hardware/tools/avr/lib/avr/include/stdlib.h deleted file mode 100644 index 25511a3ff..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/stdlib.h +++ /dev/null @@ -1,595 +0,0 @@ -/* Copyright (c) 2002, Marek Michalkiewicz - Copyright (c) 2004,2007 Joerg Wunsch - - Portions of documentation Copyright (c) 1990, 1991, 1993, 1994 - The Regents of the University of California. - - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. - - $Id: stdlib.h,v 1.33.2.2 2008/03/16 13:44:44 dmix Exp $ -*/ - -#ifndef _STDLIB_H_ -#define _STDLIB_H_ 1 - -#ifndef __ASSEMBLER__ - -#define __need_NULL -#define __need_size_t -#define __need_wchar_t -#include - -#ifndef __ptr_t -#define __ptr_t void * -#endif - -#ifdef __cplusplus -extern "C" { -#endif - -/** \file */ - -/** \defgroup avr_stdlib : General utilities - \code #include \endcode - - This file declares some basic C macros and functions as - defined by the ISO standard, plus some AVR-specific extensions. -*/ - -/*@{*/ -/** Result type for function div(). */ -typedef struct { - int quot; /**< The Quotient. */ - int rem; /**< The Remainder. */ -} div_t; - -/** Result type for function ldiv(). */ -typedef struct { - long quot; /**< The Quotient. */ - long rem; /**< The Remainder. */ -} ldiv_t; - -/** Comparision function type for qsort(), just for convenience. */ -typedef int (*__compar_fn_t)(const void *, const void *); - -#ifndef __DOXYGEN__ - -#ifndef __ATTR_CONST__ -#define __ATTR_CONST__ __attribute__((__const__)) -#endif - -#ifndef __ATTR_MALLOC__ -#define __ATTR_MALLOC__ __attribute__((__malloc__)) -#endif - -#ifndef __ATTR_NORETURN__ -#define __ATTR_NORETURN__ __attribute__((__noreturn__)) -#endif - -#ifndef __ATTR_PURE__ -#define __ATTR_PURE__ __attribute__((__pure__)) -#endif - -#endif - -/** The abort() function causes abnormal program termination to occur. - This realization disables interrupts and jumps to _exit() function - with argument equal to 1. In the limited AVR environment, execution is - effectively halted by entering an infinite loop. */ -extern void abort(void) __ATTR_NORETURN__; - -/** The abs() function computes the absolute value of the integer \c i. - \note The abs() and labs() functions are builtins of gcc. -*/ -extern int abs(int __i) __ATTR_CONST__; -#ifndef __DOXYGEN__ -#define abs(__i) __builtin_abs(__i) -#endif - -/** The labs() function computes the absolute value of the long integer - \c i. - \note The abs() and labs() functions are builtins of gcc. -*/ -extern long labs(long __i) __ATTR_CONST__; -#ifndef __DOXYGEN__ -#define labs(__i) __builtin_labs(__i) -#endif - -/** - The bsearch() function searches an array of \c nmemb objects, the - initial member of which is pointed to by \c base, for a member - that matches the object pointed to by \c key. The size of each - member of the array is specified by \c size. - - The contents of the array should be in ascending sorted order - according to the comparison function referenced by \c compar. - The \c compar routine is expected to have two arguments which - point to the key object and to an array member, in that order, - and should return an integer less than, equal to, or greater than - zero if the key object is found, respectively, to be less than, - to match, or be greater than the array member. - - The bsearch() function returns a pointer to a matching member of - the array, or a null pointer if no match is found. If two - members compare as equal, which member is matched is unspecified. -*/ -extern void *bsearch(const void *__key, const void *__base, size_t __nmemb, - size_t __size, int (*__compar)(const void *, const void *)); - -/* __divmodhi4 and __divmodsi4 from libgcc.a */ -/** - The div() function computes the value \c num/denom and returns - the quotient and remainder in a structure named \c div_t that - contains two int members named \c quot and \c rem. -*/ -extern div_t div(int __num, int __denom) __asm__("__divmodhi4") __ATTR_CONST__; -/** - The ldiv() function computes the value \c num/denom and returns - the quotient and remainder in a structure named \c ldiv_t that - contains two long integer members named \c quot and \c rem. -*/ -extern ldiv_t ldiv(long __num, long __denom) __asm__("__divmodsi4") __ATTR_CONST__; - -/** - The qsort() function is a modified partition-exchange sort, or - quicksort. - - The qsort() function sorts an array of \c nmemb objects, the - initial member of which is pointed to by \c base. The size of - each object is specified by \c size. The contents of the array - base are sorted in ascending order according to a comparison - function pointed to by \c compar, which requires two arguments - pointing to the objects being compared. - - The comparison function must return an integer less than, equal - to, or greater than zero if the first argument is considered to - be respectively less than, equal to, or greater than the second. -*/ -extern void qsort(void *__base, size_t __nmemb, size_t __size, - __compar_fn_t __compar); - -/** - The strtol() function converts the string in \c nptr to a long - value. The conversion is done according to the given base, which - must be between 2 and 36 inclusive, or be the special value 0. - - The string may begin with an arbitrary amount of white space (as - determined by isspace()) followed by a single optional \c '+' or \c '-' - sign. If \c base is zero or 16, the string may then include a - \c "0x" prefix, and the number will be read in base 16; otherwise, - a zero base is taken as 10 (decimal) unless the next character is - \c '0', in which case it is taken as 8 (octal). - - The remainder of the string is converted to a long value in the - obvious manner, stopping at the first character which is not a - valid digit in the given base. (In bases above 10, the letter \c 'A' - in either upper or lower case represents 10, \c 'B' represents 11, - and so forth, with \c 'Z' representing 35.) - - If \c endptr is not NULL, strtol() stores the address of the first - invalid character in \c *endptr. If there were no digits at all, - however, strtol() stores the original value of \c nptr in \c - *endptr. (Thus, if \c *nptr is not \c '\\0' but \c **endptr is \c '\\0' - on return, the entire string was valid.) - - The strtol() function returns the result of the conversion, unless - the value would underflow or overflow. If no conversion could be - performed, 0 is returned. If an overflow or underflow occurs, \c - errno is set to \ref avr_errno "ERANGE" and the function return value - is clamped to \c LONG_MIN or \c LONG_MAX, respectively. -*/ -extern long strtol(const char *__nptr, char **__endptr, int __base); - -/** - The strtoul() function converts the string in \c nptr to an - unsigned long value. The conversion is done according to the - given base, which must be between 2 and 36 inclusive, or be the - special value 0. - - The string may begin with an arbitrary amount of white space (as - determined by isspace()) followed by a single optional \c '+' or \c '-' - sign. If \c base is zero or 16, the string may then include a - \c "0x" prefix, and the number will be read in base 16; otherwise, - a zero base is taken as 10 (decimal) unless the next character is - \c '0', in which case it is taken as 8 (octal). - - The remainder of the string is converted to an unsigned long value - in the obvious manner, stopping at the first character which is - not a valid digit in the given base. (In bases above 10, the - letter \c 'A' in either upper or lower case represents 10, \c 'B' - represents 11, and so forth, with \c 'Z' representing 35.) - - If \c endptr is not NULL, strtoul() stores the address of the first - invalid character in \c *endptr. If there were no digits at all, - however, strtoul() stores the original value of \c nptr in \c - *endptr. (Thus, if \c *nptr is not \c '\\0' but \c **endptr is \c '\\0' - on return, the entire string was valid.) - - The strtoul() function return either the result of the conversion - or, if there was a leading minus sign, the negation of the result - of the conversion, unless the original (non-negated) value would - overflow; in the latter case, strtoul() returns ULONG_MAX, and \c - errno is set to \ref avr_errno "ERANGE". If no conversion could - be performed, 0 is returned. -*/ -extern unsigned long strtoul(const char *__nptr, char **__endptr, int __base); - -/** - The atol() function converts the initial portion of the string - pointed to by \p s to long integer representation. In contrast to - - \code strtol(s, (char **)NULL, 10); \endcode - - this function does not detect overflow (\c errno is not changed and - the result value is not predictable), uses smaller memory (flash and - stack) and works more quickly. -*/ -extern long atol(const char *__s) __ATTR_PURE__; - -/** - The atoi() function converts the initial portion of the string - pointed to by \p s to integer representation. In contrast to - - \code (int)strtol(s, (char **)NULL, 10); \endcode - - this function does not detect overflow (\c errno is not changed and - the result value is not predictable), uses smaller memory (flash and - stack) and works more quickly. -*/ -extern int atoi(const char *__s) __ATTR_PURE__; - -/** - The exit() function terminates the application. Since there is no - environment to return to, \c status is ignored, and code execution - will eventually reach an infinite loop, thereby effectively halting - all code processing. Before entering the infinite loop, interrupts - are globally disabled. - - In a C++ context, global destructors will be called before halting - execution. -*/ -extern void exit(int __status) __ATTR_NORETURN__; - -/** - The malloc() function allocates \c size bytes of memory. - If malloc() fails, a NULL pointer is returned. - - Note that malloc() does \e not initialize the returned memory to - zero bytes. - - See the chapter about \ref malloc "malloc() usage" for implementation - details. -*/ -extern void *malloc(size_t __size) __ATTR_MALLOC__; - -/** - The free() function causes the allocated memory referenced by \c - ptr to be made available for future allocations. If \c ptr is - NULL, no action occurs. -*/ -extern void free(void *__ptr); - -/** - \c malloc() \ref malloc_tunables "tunable". -*/ -extern size_t __malloc_margin; - -/** - \c malloc() \ref malloc_tunables "tunable". -*/ -extern char *__malloc_heap_start; - -/** - \c malloc() \ref malloc_tunables "tunable". -*/ -extern char *__malloc_heap_end; - -/** - Allocate \c nele elements of \c size each. Identical to calling - \c malloc() using nele * size as argument, except the - allocated memory will be cleared to zero. -*/ -extern void *calloc(size_t __nele, size_t __size) __ATTR_MALLOC__; - -/** - The realloc() function tries to change the size of the region - allocated at \c ptr to the new \c size value. It returns a - pointer to the new region. The returned pointer might be the - same as the old pointer, or a pointer to a completely different - region. - - The contents of the returned region up to either the old or the new - size value (whatever is less) will be identical to the contents of - the old region, even in case a new region had to be allocated. - - It is acceptable to pass \c ptr as NULL, in which case realloc() - will behave identical to malloc(). - - If the new memory cannot be allocated, realloc() returns NULL, and - the region at \c ptr will not be changed. -*/ -extern void *realloc(void *__ptr, size_t __size) __ATTR_MALLOC__; - -extern double strtod(const char *__nptr, char **__endptr); - -extern double atof(const char *__nptr); - -/** Highest number that can be generated by rand(). */ -#define RAND_MAX 0x7FFF - -/** - The rand() function computes a sequence of pseudo-random integers in the - range of 0 to \c RAND_MAX (as defined by the header file ). - - The srand() function sets its argument \c seed as the seed for a new - sequence of pseudo-random numbers to be returned by rand(). These - sequences are repeatable by calling srand() with the same seed value. - - If no seed value is provided, the functions are automatically seeded with - a value of 1. - - In compliance with the C standard, these functions operate on - \c int arguments. Since the underlying algorithm already uses - 32-bit calculations, this causes a loss of precision. See - \c random() for an alternate set of functions that retains full - 32-bit precision. -*/ -extern int rand(void); -/** - Pseudo-random number generator seeding; see rand(). -*/ -extern void srand(unsigned int __seed); - -/** - Variant of rand() that stores the context in the user-supplied - variable located at \c ctx instead of a static library variable - so the function becomes re-entrant. -*/ -extern int rand_r(unsigned long *__ctx); -/*@}*/ - -/*@{*/ -/** \name Non-standard (i.e. non-ISO C) functions. - \ingroup avr_stdlib -*/ -/** - \brief Convert an integer to a string. - - The function itoa() converts the integer value from \c val into an - ASCII representation that will be stored under \c s. The caller - is responsible for providing sufficient storage in \c s. - - \note The minimal size of the buffer \c s depends on the choice of - radix. For example, if the radix is 2 (binary), you need to supply a buffer - with a minimal length of 8 * sizeof (int) + 1 characters, i.e. one - character for each bit plus one for the string terminator. Using a larger - radix will require a smaller minimal buffer size. - - \warning If the buffer is too small, you risk a buffer overflow. - - Conversion is done using the \c radix as base, which may be a - number between 2 (binary conversion) and up to 36. If \c radix - is greater than 10, the next digit after \c '9' will be the letter - \c 'a'. - - If radix is 10 and val is negative, a minus sign will be prepended. - - The itoa() function returns the pointer passed as \c s. -*/ -extern char *itoa(int __val, char *__s, int __radix); - -/** - \ingroup avr_stdlib - - \brief Convert a long integer to a string. - - The function ltoa() converts the long integer value from \c val into an - ASCII representation that will be stored under \c s. The caller - is responsible for providing sufficient storage in \c s. - - \note The minimal size of the buffer \c s depends on the choice of - radix. For example, if the radix is 2 (binary), you need to supply a buffer - with a minimal length of 8 * sizeof (long int) + 1 characters, i.e. one - character for each bit plus one for the string terminator. Using a larger - radix will require a smaller minimal buffer size. - - \warning If the buffer is too small, you risk a buffer overflow. - - Conversion is done using the \c radix as base, which may be a - number between 2 (binary conversion) and up to 36. If \c radix - is greater than 10, the next digit after \c '9' will be the letter - \c 'a'. - - If radix is 10 and val is negative, a minus sign will be prepended. - - The ltoa() function returns the pointer passed as \c s. -*/ -extern char *ltoa(long int __val, char *__s, int __radix); - -/** - \ingroup avr_stdlib - - \brief Convert an unsigned integer to a string. - - The function utoa() converts the unsigned integer value from \c val into an - ASCII representation that will be stored under \c s. The caller - is responsible for providing sufficient storage in \c s. - - \note The minimal size of the buffer \c s depends on the choice of - radix. For example, if the radix is 2 (binary), you need to supply a buffer - with a minimal length of 8 * sizeof (unsigned int) + 1 characters, i.e. one - character for each bit plus one for the string terminator. Using a larger - radix will require a smaller minimal buffer size. - - \warning If the buffer is too small, you risk a buffer overflow. - - Conversion is done using the \c radix as base, which may be a - number between 2 (binary conversion) and up to 36. If \c radix - is greater than 10, the next digit after \c '9' will be the letter - \c 'a'. - - The utoa() function returns the pointer passed as \c s. -*/ -extern char *utoa(unsigned int __val, char *__s, int __radix); - -/** - \ingroup avr_stdlib - \brief Convert an unsigned long integer to a string. - - The function ultoa() converts the unsigned long integer value from - \c val into an - ASCII representation that will be stored under \c s. The caller - is responsible for providing sufficient storage in \c s. - - \note The minimal size of the buffer \c s depends on the choice of - radix. For example, if the radix is 2 (binary), you need to supply a buffer - with a minimal length of 8 * sizeof (unsigned long int) + 1 characters, - i.e. one character for each bit plus one for the string terminator. Using a - larger radix will require a smaller minimal buffer size. - - \warning If the buffer is too small, you risk a buffer overflow. - - Conversion is done using the \c radix as base, which may be a - number between 2 (binary conversion) and up to 36. If \c radix - is greater than 10, the next digit after \c '9' will be the letter - \c 'a'. - - The ultoa() function returns the pointer passed as \c s. -*/ -extern char *ultoa(unsigned long int __val, char *__s, int __radix); - -/** \ingroup avr_stdlib -Highest number that can be generated by random(). */ -#define RANDOM_MAX 0x7FFFFFFF - -/** - \ingroup avr_stdlib - The random() function computes a sequence of pseudo-random integers in the - range of 0 to \c RANDOM_MAX (as defined by the header file ). - - The srandom() function sets its argument \c seed as the seed for a new - sequence of pseudo-random numbers to be returned by rand(). These - sequences are repeatable by calling srandom() with the same seed value. - - If no seed value is provided, the functions are automatically seeded with - a value of 1. -*/ -extern long random(void); -/** - \ingroup avr_stdlib - Pseudo-random number generator seeding; see random(). -*/ -extern void srandom(unsigned long __seed); - -/** - \ingroup avr_stdlib - Variant of random() that stores the context in the user-supplied - variable located at \c ctx instead of a static library variable - so the function becomes re-entrant. -*/ -extern long random_r(unsigned long *__ctx); -#endif /* __ASSEMBLER */ -/*@}*/ - -/*@{*/ -/** \name Conversion functions for double arguments. - \ingroup avr_stdlib - Note that these functions are not located in the default library, - libc.a, but in the mathematical library, libm.a. - So when linking the application, the \c -lm option needs to be - specified. -*/ -/** \ingroup avr_stdlib - Bit value that can be passed in \c flags to dtostre(). */ -#define DTOSTR_ALWAYS_SIGN 0x01 /* put '+' or ' ' for positives */ -/** \ingroup avr_stdlib - Bit value that can be passed in \c flags to dtostre(). */ -#define DTOSTR_PLUS_SIGN 0x02 /* put '+' rather than ' ' */ -/** \ingroup avr_stdlib - Bit value that can be passed in \c flags to dtostre(). */ -#define DTOSTR_UPPERCASE 0x04 /* put 'E' rather 'e' */ - -#ifndef __ASSEMBLER__ - -/** - \ingroup avr_stdlib - The dtostre() function converts the double value passed in \c val into - an ASCII representation that will be stored under \c s. The caller - is responsible for providing sufficient storage in \c s. - - Conversion is done in the format \c "[-]d.dddedd" where there is - one digit before the decimal-point character and the number of - digits after it is equal to the precision \c prec; if the precision - is zero, no decimal-point character appears. If \c flags has the - DTOSTRE_UPPERCASE bit set, the letter \c 'E' (rather than \c 'e' ) will be - used to introduce the exponent. The exponent always contains two - digits; if the value is zero, the exponent is \c "00". - - If \c flags has the DTOSTRE_ALWAYS_SIGN bit set, a space character - will be placed into the leading position for positive numbers. - - If \c flags has the DTOSTRE_PLUS_SIGN bit set, a plus sign will be - used instead of a space character in this case. - - The dtostre() function returns the pointer to the converted string \c s. -*/ -extern char *dtostre(double __val, char *__s, unsigned char __prec, - unsigned char __flags); - -/** - \ingroup avr_stdlib - The dtostrf() function converts the double value passed in \c val into - an ASCII representationthat will be stored under \c s. The caller - is responsible for providing sufficient storage in \c s. - - Conversion is done in the format \c "[-]d.ddd". The minimum field - width of the output string (including the \c '.' and the possible - sign for negative values) is given in \c width, and \c prec determines - the number of digits after the decimal sign. \c width is signed value, - negative for left adjustment. - - The dtostrf() function returns the pointer to the converted string \c s. -*/ -extern char *dtostrf(double __val, signed char __width, - unsigned char __prec, char *__s); - -/*@}*/ - -#if 0 /* not yet implemented */ -extern int atexit(void (*)(void)); -#endif - -#ifdef __cplusplus -} -#endif - -#endif /* __ASSEMBLER */ - -#endif /* _STDLIB_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/string.h b/build/linux/work/hardware/tools/avr/lib/avr/include/string.h deleted file mode 100644 index 3537a6f0f..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/string.h +++ /dev/null @@ -1,154 +0,0 @@ -/* Copyright (c) 2002,2007 Marek Michalkiewicz - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: string.h,v 1.19.2.3 2008/08/20 16:18:54 arcanum Exp $ */ - -/* - string.h - - Contributors: - Created by Marek Michalkiewicz - */ - -#ifndef _STRING_H_ -#define _STRING_H_ 1 - -#define __need_NULL -#define __need_size_t -#include - -#ifndef __ATTR_PURE__ -#define __ATTR_PURE__ __attribute__((__pure__)) -#endif - -#ifndef __ATTR_CONST__ -# define __ATTR_CONST__ __attribute__((__const__)) -#endif - -#ifdef __cplusplus -extern "C" { -#endif - -/** \file */ -/** \defgroup avr_string : Strings - \code #include \endcode - - The string functions perform string operations on NULL terminated - strings. - - \note If the strings you are working on resident in program space (flash), - you will need to use the string functions described in \ref avr_pgmspace. */ - - -/** \ingroup avr_string - - This macro finds the first (least significant) bit set in the - input value. - - This macro is very similar to the function ffs() except that - it evaluates its argument at compile-time, so it should only - be applied to compile-time constant expressions where it will - reduce to a constant itself. - Application of this macro to expressions that are not constant - at compile-time is not recommended, and might result in a huge - amount of code generated. - - \returns The _FFS() macro returns the position of the first - (least significant) bit set in the word val, or 0 if no bits are set. - The least significant bit is position 1. -*/ -#if defined(__DOXYGEN__) -#define _FFS(x) -#else /* !DOXYGEN */ -#define _FFS(x) \ - ( (x) & 1 ? 1 \ - : (x) & 2 ? 2 \ - : (x) & 4 ? 3 \ - : (x) & 010 ? 4 \ - : (x) & 020 ? 5 \ - : (x) & 040 ? 6 \ - : (x) & 0100 ? 7 \ - : (x) & 0200 ? 8 \ - : (x) & 0400 ? 9 \ - : (x) & 01000 ? 10 \ - : (x) & 02000 ? 11 \ - : (x) & 04000 ? 12 \ - : (x) & 010000 ? 13 \ - : (x) & 020000 ? 14 \ - : (x) & 040000 ? 15 \ - : (x) & 0100000 ? 16 \ - : 0 ) -#endif /* DOXYGEN */ - -extern int ffs (int __val) __ATTR_CONST__; -extern int ffsl (long __val) __ATTR_CONST__; -extern int ffsll (long long __val) __ATTR_CONST__; -extern void *memccpy(void *, const void *, int, size_t); -extern void *memchr(const void *, int, size_t) __ATTR_PURE__; -extern int memcmp(const void *, const void *, size_t) __ATTR_PURE__; -extern void *memcpy(void *, const void *, size_t); -extern void *memmem(const void *, size_t, const void *, size_t) __ATTR_PURE__; -extern void *memmove(void *, const void *, size_t); -extern void *memrchr(const void *, int, size_t) __ATTR_PURE__; -extern void *memset(void *, int, size_t); -extern char *strcat(char *, const char *); -extern char *strchr(const char *, int) __ATTR_PURE__; -extern char *strchrnul(const char *, int) __ATTR_PURE__; -extern int strcmp(const char *, const char *) __ATTR_PURE__; -extern char *strcpy(char *, const char *); -extern int strcasecmp(const char *, const char *) __ATTR_PURE__; -extern char *strcasestr(const char *, const char *) __ATTR_PURE__; -extern size_t strcspn(const char *__s, const char *__reject) __ATTR_PURE__; -extern char *strdup(const char *s1); -extern size_t strlcat(char *, const char *, size_t); -extern size_t strlcpy(char *, const char *, size_t); -extern size_t strlen(const char *) __ATTR_PURE__; -extern char *strlwr(char *); -extern char *strncat(char *, const char *, size_t); -extern int strncmp(const char *, const char *, size_t) __ATTR_PURE__; -extern char *strncpy(char *, const char *, size_t); -extern int strncasecmp(const char *, const char *, size_t) __ATTR_PURE__; -extern size_t strnlen(const char *, size_t) __ATTR_PURE__; -extern char *strpbrk(const char *__s, const char *__accept) __ATTR_PURE__; -extern char *strrchr(const char *, int) __ATTR_PURE__; -extern char *strrev(char *); -extern char *strsep(char **, const char *); -extern size_t strspn(const char *__s, const char *__accept) __ATTR_PURE__; -extern char *strstr(const char *, const char *) __ATTR_PURE__; -extern char *strtok(char *, const char *); -extern char *strtok_r(char *, const char *, char **); -extern char *strupr(char *); - -#ifdef __cplusplus -} -#endif - -#endif /* _STRING_H_ */ - diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/util/atomic.h b/build/linux/work/hardware/tools/avr/lib/avr/include/util/atomic.h deleted file mode 100644 index cef0f7369..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/util/atomic.h +++ /dev/null @@ -1,306 +0,0 @@ -/* Copyright (c) 2007 Dean Camera - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. -*/ - -/* $Id: atomic.h,v 1.3 2007/12/20 14:17:56 joerg_wunsch Exp $ */ - -#ifndef _UTIL_ATOMIC_H_ -#define _UTIL_ATOMIC_H_ 1 - -#include -#include - -#if !defined(__DOXYGEN__) -/* Internal helper functions. */ -static __inline__ uint8_t __iSeiRetVal(void) -{ - sei(); - return 1; -} - -static __inline__ uint8_t __iCliRetVal(void) -{ - cli(); - return 1; -} - -static __inline__ void __iSeiParam(const uint8_t *__s) -{ - sei(); - __asm__ volatile ("" ::: "memory"); - (void)__s; -} - -static __inline__ void __iCliParam(const uint8_t *__s) -{ - cli(); - __asm__ volatile ("" ::: "memory"); - (void)__s; -} - -static __inline__ void __iRestore(const uint8_t *__s) -{ - SREG = *__s; - __asm__ volatile ("" ::: "memory"); -} -#endif /* !__DOXYGEN__ */ - -/** \file */ -/** \defgroup util_atomic Atomically and Non-Atomically Executed Code Blocks - - \code - #include - \endcode - - \note The macros in this header file require the ISO/IEC 9899:1999 - ("ISO C99") feature of for loop variables that are declared inside - the for loop itself. For that reason, this header file can only - be used if the standard level of the compiler (option --std=) is - set to either \c c99 or \c gnu99. - - The macros in this header file deal with code blocks that are - guaranteed to be excuted Atomically or Non-Atmomically. The term - "Atomic" in this context refers to the unability of the respective - code to be interrupted. - - These macros operate via automatic manipulation of the Global - Interrupt Status (I) bit of the SREG register. Exit paths from - both block types are all managed automatically without the need - for special considerations, i. e. the interrupt status will be - restored to the same value it has been when entering the - respective block. - - A typical example that requires atomic access is a 16 (or more) - bit variable that is shared between the main execution path and an - ISR. While declaring such a variable as volatile ensures that the - compiler will not optimize accesses to it away, it does not - guarantee atomic access to it. Assuming the following example: - - \code -#include -#include -#include - -volatile uint16_t ctr; - -ISR(TIMER1_OVF_vect) -{ - ctr--; -} - -... -int -main(void) -{ - ... - ctr = 0x200; - start_timer(); - while (ctr != 0) - // wait - ; - ... -} - \endcode - - There is a chance where the main context will exit its wait loop - when the variable \c ctr just reached the value 0xFF. This happens - because the compiler cannot natively access a 16-bit variable - atomically in an 8-bit CPU. So the variable is for example at - 0x100, the compiler then tests the low byte for 0, which succeeds. - It then proceeds to test the high byte, but that moment the ISR - triggers, and the main context is interrupted. The ISR will - decrement the variable from 0x100 to 0xFF, and the main context - proceeds. It now tests the high byte of the variable which is - (now) also 0, so it concludes the variable has reached 0, and - terminates the loop. - - Using the macros from this header file, the above code can be - rewritten like: - - \code -#include -#include -#include -#include - -volatile uint16_t ctr; - -ISR(TIMER1_OVF_vect) -{ - ctr--; -} - -... -int -main(void) -{ - ... - ctr = 0x200; - start_timer(); - sei(); - uint16_t ctr_copy; - do - { - ATOMIC_BLOCK(ATOMIC_FORCEON) - { - ctr_copy = ctr; - } - } - while (ctr_copy != 0); - ... -} - \endcode - - This will install the appropriate interrupt protection before - accessing variable \c ctr, so it is guaranteed to be consistently - tested. If the global interrupt state were uncertain before - entering the ATOMIC_BLOCK, it should be executed with the - parameter ATOMIC_RESTORESTATE rather than ATOMIC_FORCEON. - -*/ - -/** \def ATOMIC_BLOCK(type) - \ingroup util_atomic - - Creates a block of code that is guaranteed to be executed - atomically. Upon entering the block the Global Interrupt Status - flag in SREG is disabled, and re-enabled upon exiting the block - from any exit path. - - Two possible macro parameters are permitted, ATOMIC_RESTORESTATE - and ATOMIC_FORCEON. -*/ -#if defined(__DOXYGEN__) -#define ATOMIC_BLOCK(type) -#else -#define ATOMIC_BLOCK(type) for ( type, __ToDo = __iCliRetVal(); \ - __ToDo ; __ToDo = 0 ) -#endif /* __DOXYGEN__ */ - -/** \def NONATOMIC_BLOCK(type) - \ingroup util_atomic - - Creates a block of code that is executed non-atomically. Upon - entering the block the Global Interrupt Status flag in SREG is - enabled, and disabled upon exiting the block from any exit - path. This is useful when nested inside ATOMIC_BLOCK sections, - allowing for non-atomic execution of small blocks of code while - maintaining the atomic access of the other sections of the parent - ATOMIC_BLOCK. - - Two possible macro parameters are permitted, - NONATOMIC_RESTORESTATE and NONATOMIC_FORCEOFF. -*/ -#if defined(__DOXYGEN__) -#define NONATOMIC_BLOCK(type) -#else -#define NONATOMIC_BLOCK(type) for ( type, __ToDo = __iSeiRetVal(); \ - __ToDo ; __ToDo = 0 ) -#endif /* __DOXYGEN__ */ - -/** \def ATOMIC_RESTORESTATE - \ingroup util_atomic - - This is a possible parameter for ATOMIC_BLOCK. When used, it will - cause the ATOMIC_BLOCK to restore the previous state of the SREG - register, saved before the Global Interrupt Status flag bit was - disabled. The net effect of this is to make the ATOMIC_BLOCK's - contents guaranteed atomic, without changing the state of the - Global Interrupt Status flag when execution of the block - completes. -*/ -#if defined(__DOXYGEN__) -#define ATOMIC_RESTORESTATE -#else -#define ATOMIC_RESTORESTATE uint8_t sreg_save \ - __attribute__((__cleanup__(__iRestore))) = SREG -#endif /* __DOXYGEN__ */ - -/** \def ATOMIC_FORCEON - \ingroup util_atomic - - This is a possible parameter for ATOMIC_BLOCK. When used, it will - cause the ATOMIC_BLOCK to force the state of the SREG register on - exit, enabling the Global Interrupt Status flag bit. This saves on - flash space as the previous value of the SREG register does not - need to be saved at the start of the block. - - Care should be taken that ATOMIC_FORCEON is only used when it is - known that interrupts are enabled before the block's execution or - when the side effects of enabling global interrupts at the block's - completion are known and understood. -*/ -#if defined(__DOXYGEN__) -#define ATOMIC_FORCEON -#else -#define ATOMIC_FORCEON uint8_t sreg_save \ - __attribute__((__cleanup__(__iSeiParam))) = 0 -#endif /* __DOXYGEN__ */ - -/** \def NONATOMIC_RESTORESTATE - \ingroup util_atomic - - This is a possible parameter for NONATOMIC_BLOCK. When used, it - will cause the NONATOMIC_BLOCK to restore the previous state of - the SREG register, saved before the Global Interrupt Status flag - bit was enabled. The net effect of this is to make the - NONATOMIC_BLOCK's contents guaranteed non-atomic, without changing - the state of the Global Interrupt Status flag when execution of - the block completes. -*/ -#if defined(__DOXYGEN__) -#define NONATOMIC_RESTORESTATE -#else -#define NONATOMIC_RESTORESTATE uint8_t sreg_save \ - __attribute__((__cleanup__(__iRestore))) = SREG -#endif /* __DOXYGEN__ */ - -/** \def NONATOMIC_FORCEOFF - \ingroup util_atomic - - This is a possible parameter for NONATOMIC_BLOCK. When used, it - will cause the NONATOMIC_BLOCK to force the state of the SREG - register on exit, disabling the Global Interrupt Status flag - bit. This saves on flash space as the previous value of the SREG - register does not need to be saved at the start of the block. - - Care should be taken that NONATOMIC_FORCEOFF is only used when it - is known that interrupts are disabled before the block's execution - or when the side effects of disabling global interrupts at the - block's completion are known and understood. -*/ -#if defined(__DOXYGEN__) -#define NONATOMIC_FORCEOFF -#else -#define NONATOMIC_FORCEOFF uint8_t sreg_save \ - __attribute__((__cleanup__(__iCliParam))) = 0 -#endif /* __DOXYGEN__ */ - -#endif diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/util/crc16.h b/build/linux/work/hardware/tools/avr/lib/avr/include/util/crc16.h deleted file mode 100644 index 79d67d604..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/util/crc16.h +++ /dev/null @@ -1,336 +0,0 @@ -/* Copyright (c) 2002, 2003, 2004 Marek Michalkiewicz - Copyright (c) 2005, 2007 Joerg Wunsch - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: crc16.h,v 1.4 2007/01/23 15:32:48 joerg_wunsch Exp $ */ - -#ifndef _UTIL_CRC16_H_ -#define _UTIL_CRC16_H_ - -#include - -/** \file */ -/** \defgroup util_crc : CRC Computations - \code#include \endcode - - This header file provides a optimized inline functions for calculating - cyclic redundancy checks (CRC) using common polynomials. - - \par References: - - \par - - See the Dallas Semiconductor app note 27 for 8051 assembler example and - general CRC optimization suggestions. The table on the last page of the - app note is the key to understanding these implementations. - - \par - - Jack Crenshaw's "Implementing CRCs" article in the January 1992 isue of \e - Embedded \e Systems \e Programming. This may be difficult to find, but it - explains CRC's in very clear and concise terms. Well worth the effort to - obtain a copy. - - A typical application would look like: - - \code - // Dallas iButton test vector. - uint8_t serno[] = { 0x02, 0x1c, 0xb8, 0x01, 0, 0, 0, 0xa2 }; - - int - checkcrc(void) - { - uint8_t crc = 0, i; - - for (i = 0; i < sizeof serno / sizeof serno[0]; i++) - crc = _crc_ibutton_update(crc, serno[i]); - - return crc; // must be 0 - } - \endcode -*/ - -/** \ingroup util_crc - Optimized CRC-16 calculation. - - Polynomial: x^16 + x^15 + x^2 + 1 (0xa001)
    - Initial value: 0xffff - - This CRC is normally used in disk-drive controllers. - - The following is the equivalent functionality written in C. - - \code - uint16_t - crc16_update(uint16_t crc, uint8_t a) - { - int i; - - crc ^= a; - for (i = 0; i < 8; ++i) - { - if (crc & 1) - crc = (crc >> 1) ^ 0xA001; - else - crc = (crc >> 1); - } - - return crc; - } - - \endcode */ - -static __inline__ uint16_t -_crc16_update(uint16_t __crc, uint8_t __data) -{ - uint8_t __tmp; - uint16_t __ret; - - __asm__ __volatile__ ( - "eor %A0,%2" "\n\t" - "mov %1,%A0" "\n\t" - "swap %1" "\n\t" - "eor %1,%A0" "\n\t" - "mov __tmp_reg__,%1" "\n\t" - "lsr %1" "\n\t" - "lsr %1" "\n\t" - "eor %1,__tmp_reg__" "\n\t" - "mov __tmp_reg__,%1" "\n\t" - "lsr %1" "\n\t" - "eor %1,__tmp_reg__" "\n\t" - "andi %1,0x07" "\n\t" - "mov __tmp_reg__,%A0" "\n\t" - "mov %A0,%B0" "\n\t" - "lsr %1" "\n\t" - "ror __tmp_reg__" "\n\t" - "ror %1" "\n\t" - "mov %B0,__tmp_reg__" "\n\t" - "eor %A0,%1" "\n\t" - "lsr __tmp_reg__" "\n\t" - "ror %1" "\n\t" - "eor %B0,__tmp_reg__" "\n\t" - "eor %A0,%1" - : "=r" (__ret), "=d" (__tmp) - : "r" (__data), "0" (__crc) - : "r0" - ); - return __ret; -} - -/** \ingroup util_crc - Optimized CRC-XMODEM calculation. - - Polynomial: x^16 + x^12 + x^5 + 1 (0x1021)
    - Initial value: 0x0 - - This is the CRC used by the Xmodem-CRC protocol. - - The following is the equivalent functionality written in C. - - \code - uint16_t - crc_xmodem_update (uint16_t crc, uint8_t data) - { - int i; - - crc = crc ^ ((uint16_t)data << 8); - for (i=0; i<8; i++) - { - if (crc & 0x8000) - crc = (crc << 1) ^ 0x1021; - else - crc <<= 1; - } - - return crc; - } - \endcode */ - -static __inline__ uint16_t -_crc_xmodem_update(uint16_t __crc, uint8_t __data) -{ - uint16_t __ret; /* %B0:%A0 (alias for __crc) */ - uint8_t __tmp1; /* %1 */ - uint8_t __tmp2; /* %2 */ - /* %3 __data */ - - __asm__ __volatile__ ( - "eor %B0,%3" "\n\t" /* crc.hi ^ data */ - "mov __tmp_reg__,%B0" "\n\t" - "swap __tmp_reg__" "\n\t" /* swap(crc.hi ^ data) */ - - /* Calculate the ret.lo of the CRC. */ - "mov %1,__tmp_reg__" "\n\t" - "andi %1,0x0f" "\n\t" - "eor %1,%B0" "\n\t" - "mov %2,%B0" "\n\t" - "eor %2,__tmp_reg__" "\n\t" - "lsl %2" "\n\t" - "andi %2,0xe0" "\n\t" - "eor %1,%2" "\n\t" /* __tmp1 is now ret.lo. */ - - /* Calculate the ret.hi of the CRC. */ - "mov %2,__tmp_reg__" "\n\t" - "eor %2,%B0" "\n\t" - "andi %2,0xf0" "\n\t" - "lsr %2" "\n\t" - "mov __tmp_reg__,%B0" "\n\t" - "lsl __tmp_reg__" "\n\t" - "rol %2" "\n\t" - "lsr %B0" "\n\t" - "lsr %B0" "\n\t" - "lsr %B0" "\n\t" - "andi %B0,0x1f" "\n\t" - "eor %B0,%2" "\n\t" - "eor %B0,%A0" "\n\t" /* ret.hi is now ready. */ - "mov %A0,%1" "\n\t" /* ret.lo is now ready. */ - : "=d" (__ret), "=d" (__tmp1), "=d" (__tmp2) - : "r" (__data), "0" (__crc) - : "r0" - ); - return __ret; -} - -/** \ingroup util_crc - Optimized CRC-CCITT calculation. - - Polynomial: x^16 + x^12 + x^5 + 1 (0x8408)
    - Initial value: 0xffff - - This is the CRC used by PPP and IrDA. - - See RFC1171 (PPP protocol) and IrDA IrLAP 1.1 - - \note Although the CCITT polynomial is the same as that used by the Xmodem - protocol, they are quite different. The difference is in how the bits are - shifted through the alorgithm. Xmodem shifts the MSB of the CRC and the - input first, while CCITT shifts the LSB of the CRC and the input first. - - The following is the equivalent functionality written in C. - - \code - uint16_t - crc_ccitt_update (uint16_t crc, uint8_t data) - { - data ^= lo8 (crc); - data ^= data << 4; - - return ((((uint16_t)data << 8) | hi8 (crc)) ^ (uint8_t)(data >> 4) - ^ ((uint16_t)data << 3)); - } - \endcode */ - -static __inline__ uint16_t -_crc_ccitt_update (uint16_t __crc, uint8_t __data) -{ - uint16_t __ret; - - __asm__ __volatile__ ( - "eor %A0,%1" "\n\t" - - "mov __tmp_reg__,%A0" "\n\t" - "swap %A0" "\n\t" - "andi %A0,0xf0" "\n\t" - "eor %A0,__tmp_reg__" "\n\t" - - "mov __tmp_reg__,%B0" "\n\t" - - "mov %B0,%A0" "\n\t" - - "swap %A0" "\n\t" - "andi %A0,0x0f" "\n\t" - "eor __tmp_reg__,%A0" "\n\t" - - "lsr %A0" "\n\t" - "eor %B0,%A0" "\n\t" - - "eor %A0,%B0" "\n\t" - "lsl %A0" "\n\t" - "lsl %A0" "\n\t" - "lsl %A0" "\n\t" - "eor %A0,__tmp_reg__" - - : "=d" (__ret) - : "r" (__data), "0" (__crc) - : "r0" - ); - return __ret; -} - -/** \ingroup util_crc - Optimized Dallas (now Maxim) iButton 8-bit CRC calculation. - - Polynomial: x^8 + x^5 + x^4 + 1 (0x8C)
    - Initial value: 0x0 - - See http://www.maxim-ic.com/appnotes.cfm/appnote_number/27 - - The following is the equivalent functionality written in C. - - \code - uint8_t - _crc_ibutton_update(uint8_t crc, uint8_t data) - { - uint8_t i; - - crc = crc ^ data; - for (i = 0; i < 8; i++) - { - if (crc & 0x01) - crc = (crc >> 1) ^ 0x8C; - else - crc >>= 1; - } - - return crc; - } - \endcode -*/ - -static __inline__ uint8_t -_crc_ibutton_update(uint8_t __crc, uint8_t __data) -{ - uint8_t __i, __pattern; - __asm__ __volatile__ ( - " eor %0, %4" "\n\t" - " ldi %1, 8" "\n\t" - " ldi %2, 0x8C" "\n\t" - "1: bst %0, 0" "\n\t" - " lsr %0" "\n\t" - " brtc 2f" "\n\t" - " eor %0, %2" "\n\t" - "2: dec %1" "\n\t" - " brne 1b" "\n\t" - : "=r" (__crc), "=d" (__i), "=d" (__pattern) - : "0" (__crc), "r" (__data)); - return __crc; -} - -#endif /* _UTIL_CRC16_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/util/delay.h b/build/linux/work/hardware/tools/avr/lib/avr/include/util/delay.h deleted file mode 100644 index 77c95e43c..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/util/delay.h +++ /dev/null @@ -1,165 +0,0 @@ -/* Copyright (c) 2002, Marek Michalkiewicz - Copyright (c) 2004,2005,2007 Joerg Wunsch - Copyright (c) 2007 Florin-Viorel Petrov - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: delay.h,v 1.5 2007/10/28 23:25:56 joerg_wunsch Exp $ */ - -#ifndef _UTIL_DELAY_H_ -#define _UTIL_DELAY_H_ 1 - -#include -#include - -/** \file */ -/** \defgroup util_delay : Convenience functions for busy-wait delay loops - \code - #define F_CPU 1000000UL // 1 MHz - //#define F_CPU 14.7456E6 - #include - \endcode - - \note As an alternative method, it is possible to pass the - F_CPU macro down to the compiler from the Makefile. - Obviously, in that case, no \c \#define statement should be - used. - - The functions in this header file are wrappers around the basic - busy-wait functions from . They are meant as - convenience functions where actual time values can be specified - rather than a number of cycles to wait for. The idea behind is - that compile-time constant expressions will be eliminated by - compiler optimization so floating-point expressions can be used - to calculate the number of delay cycles needed based on the CPU - frequency passed by the macro F_CPU. - - \note In order for these functions to work as intended, compiler - optimizations must be enabled, and the delay time - must be an expression that is a known constant at - compile-time. If these requirements are not met, the resulting - delay will be much longer (and basically unpredictable), and - applications that otherwise do not use floating-point calculations - will experience severe code bloat by the floating-point library - routines linked into the application. - - The functions available allow the specification of microsecond, and - millisecond delays directly, using the application-supplied macro - F_CPU as the CPU clock frequency (in Hertz). - -*/ - -#if !defined(__DOXYGEN__) -static inline void _delay_us(double __us) __attribute__((always_inline)); -static inline void _delay_ms(double __ms) __attribute__((always_inline)); -#endif - -#ifndef F_CPU -/* prevent compiler error by supplying a default */ -# warning "F_CPU not defined for " -# define F_CPU 1000000UL -#endif - -#ifndef __OPTIMIZE__ -# warning "Compiler optimizations disabled; functions from won't work as designed" -#endif - -/** - \ingroup util_delay - - Perform a delay of \c __us microseconds, using _delay_loop_1(). - - The macro F_CPU is supposed to be defined to a - constant defining the CPU clock frequency (in Hertz). - - The maximal possible delay is 768 us / F_CPU in MHz. - - If the user requests a delay greater than the maximal possible one, - _delay_us() will automatically call _delay_ms() instead. The user - will not be informed about this case. - */ -void -_delay_us(double __us) -{ - uint8_t __ticks; - double __tmp = ((F_CPU) / 3e6) * __us; - if (__tmp < 1.0) - __ticks = 1; - else if (__tmp > 255) - { - _delay_ms(__us / 1000.0); - return; - } - else - __ticks = (uint8_t)__tmp; - _delay_loop_1(__ticks); -} - - -/** - \ingroup util_delay - - Perform a delay of \c __ms milliseconds, using _delay_loop_2(). - - The macro F_CPU is supposed to be defined to a - constant defining the CPU clock frequency (in Hertz). - - The maximal possible delay is 262.14 ms / F_CPU in MHz. - - When the user request delay which exceed the maximum possible one, - _delay_ms() provides a decreased resolution functionality. In this - mode _delay_ms() will work with a resolution of 1/10 ms, providing - delays up to 6.5535 seconds (independent from CPU frequency). The - user will not be informed about decreased resolution. - */ -void -_delay_ms(double __ms) -{ - uint16_t __ticks; - double __tmp = ((F_CPU) / 4e3) * __ms; - if (__tmp < 1.0) - __ticks = 1; - else if (__tmp > 65535) - { - // __ticks = requested delay in 1/10 ms - __ticks = (uint16_t) (__ms * 10.0); - while(__ticks) - { - // wait 1/10 ms - _delay_loop_2(((F_CPU) / 4e3) / 10); - __ticks --; - } - return; - } - else - __ticks = (uint16_t)__tmp; - _delay_loop_2(__ticks); -} - -#endif /* _UTIL_DELAY_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/util/delay_basic.h b/build/linux/work/hardware/tools/avr/lib/avr/include/util/delay_basic.h deleted file mode 100644 index f967aa724..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/util/delay_basic.h +++ /dev/null @@ -1,113 +0,0 @@ -/* Copyright (c) 2002, Marek Michalkiewicz - Copyright (c) 2007 Joerg Wunsch - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: delay_basic.h,v 1.1 2007/05/13 21:23:20 joerg_wunsch Exp $ */ - -#ifndef _UTIL_DELAY_BASIC_H_ -#define _UTIL_DELAY_BASIC_H_ 1 - -#include - -/** \file */ -/** \defgroup util_delay_basic : Basic busy-wait delay loops - \code - #include - \endcode - - The functions in this header file implement simple delay loops - that perform a busy-waiting. They are typically used to - facilitate short delays in the program execution. They are - implemented as count-down loops with a well-known CPU cycle - count per loop iteration. As such, no other processing can - occur simultaneously. It should be kept in mind that the - functions described here do not disable interrupts. - - In general, for long delays, the use of hardware timers is - much preferrable, as they free the CPU, and allow for - concurrent processing of other events while the timer is - running. However, in particular for very short delays, the - overhead of setting up a hardware timer is too much compared - to the overall delay time. - - Two inline functions are provided for the actual delay algorithms. - -*/ - -#if !defined(__DOXYGEN__) -static inline void _delay_loop_1(uint8_t __count) __attribute__((always_inline)); -static inline void _delay_loop_2(uint16_t __count) __attribute__((always_inline)); -#endif - -/** \ingroup util_delay_basic - - Delay loop using an 8-bit counter \c __count, so up to 256 - iterations are possible. (The value 256 would have to be passed - as 0.) The loop executes three CPU cycles per iteration, not - including the overhead the compiler needs to setup the counter - register. - - Thus, at a CPU speed of 1 MHz, delays of up to 768 microseconds - can be achieved. -*/ -void -_delay_loop_1(uint8_t __count) -{ - __asm__ volatile ( - "1: dec %0" "\n\t" - "brne 1b" - : "=r" (__count) - : "0" (__count) - ); -} - -/** \ingroup util_delay_basic - - Delay loop using a 16-bit counter \c __count, so up to 65536 - iterations are possible. (The value 65536 would have to be - passed as 0.) The loop executes four CPU cycles per iteration, - not including the overhead the compiler requires to setup the - counter register pair. - - Thus, at a CPU speed of 1 MHz, delays of up to about 262.1 - milliseconds can be achieved. - */ -void -_delay_loop_2(uint16_t __count) -{ - __asm__ volatile ( - "1: sbiw %0,1" "\n\t" - "brne 1b" - : "=w" (__count) - : "0" (__count) - ); -} - -#endif /* _UTIL_DELAY_BASIC_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/util/parity.h b/build/linux/work/hardware/tools/avr/lib/avr/include/util/parity.h deleted file mode 100644 index 2e7a7147b..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/util/parity.h +++ /dev/null @@ -1,65 +0,0 @@ -/* Copyright (c) 2002, Marek Michalkiewicz - Copyright (c) 2004,2005,2007 Joerg Wunsch - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: parity.h,v 1.2 2007/01/23 15:32:48 joerg_wunsch Exp $ */ - -#ifndef _UTIL_PARITY_H_ -#define _UTIL_PARITY_H_ - -/** \file */ -/** \defgroup util_parity : Parity bit generation - \code #include \endcode - - This header file contains optimized assembler code to calculate - the parity bit for a byte. -*/ -/** \def parity_even_bit - \ingroup util_parity - \returns 1 if \c val has an odd number of bits set. */ -#define parity_even_bit(val) \ -(__extension__({ \ - unsigned char __t; \ - __asm__ ( \ - "mov __tmp_reg__,%0" "\n\t" \ - "swap %0" "\n\t" \ - "eor %0,__tmp_reg__" "\n\t" \ - "mov __tmp_reg__,%0" "\n\t" \ - "lsr %0" "\n\t" \ - "lsr %0" "\n\t" \ - "eor %0,__tmp_reg__" \ - : "=r" (__t) \ - : "0" ((unsigned char)(val)) \ - : "r0" \ - ); \ - (((__t + 1) >> 1) & 1); \ - })) - -#endif /* _UTIL_PARITY_H_ */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/util/setbaud.h b/build/linux/work/hardware/tools/avr/lib/avr/include/util/setbaud.h deleted file mode 100644 index 087ccacce..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/util/setbaud.h +++ /dev/null @@ -1,229 +0,0 @@ -/* Copyright (c) 2007 Cliff Lawson - Copyright (c) 2007 Carlos Lamas - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: setbaud.h,v 1.1 2007/10/28 23:01:09 joerg_wunsch Exp $ */ - -/** - \file -*/ - -/** - \defgroup util_setbaud : Helper macros for baud rate calculations - \code - #define F_CPU 11059200 - #define BAUD 38400 - #include - \endcode - - This header file requires that on entry values are already defined - for F_CPU and BAUD. In addition, the macro BAUD_TOL will define - the baud rate tolerance (in percent) that is acceptable during - the calculations. The value of BAUD_TOL will default to 2 %. - - This header file defines macros suitable to setup the UART baud - rate prescaler registers of an AVR. All calculations are done - using the C preprocessor. Including this header file causes no - other side effects so it is possible to include this file more than - once (supposedly, with different values for the BAUD parameter), - possibly even within the same function. - - Assuming that the requested BAUD is valid for the given F_CPU then - the macro UBRR_VALUE is set to the required prescaler value. Two - additional macros are provided for the low and high bytes of the - prescaler, respectively: UBRRL_VALUE is set to the lower byte of - the UBRR_VALUE and UBRRH_VALUE is set to the upper byte. An - additional macro USE_2X will be defined. Its value is set to 1 if - the desired BAUD rate within the given tolerance could only be - achieved by setting the U2X bit in the UART configuration. It will - be defined to 0 if U2X is not needed. - - Example usage: - - \code - #include - - #define F_CPU 4000000 - - static void - uart_9600(void) - { - #define BAUD 9600 - #include - UBRRH = UBRRH_VALUE; - UBRRL = UBRRL_VALUE; - #if USE_2X - UCSRA |= (1 << U2X); - #else - UCSRA &= ~(1 << U2X); - #endif - } - - static void - uart_38400(void) - { - #undef BAUD // avoid compiler warning - #define BAUD 38400 - #include - UBRRH = UBRRH_VALUE; - UBRRL = UBRRL_VALUE; - #if USE_2X - UCSRA |= (1 << U2X); - #else - UCSRA &= ~(1 << U2X); - #endif - } - \endcode - - In this example, two functions are defined to setup the UART - to run at 9600 Bd, and 38400 Bd, respectively. Using a CPU - clock of 4 MHz, 9600 Bd can be achieved with an acceptable - tolerance without setting U2X (prescaler 25), while 38400 Bd - require U2X to be set (prescaler 12). -*/ - -#ifndef F_CPU -# error "setbaud.h requires F_CPU to be defined" -#endif - -#ifndef BAUD -# error "setbaud.h requires BAUD to be defined" -#endif - -#if !(F_CPU) -# error "F_CPU must be a constant value" -#endif - -#if !(BAUD) -# error "BAUD must be a constant value" -#endif - -#if defined(__DOXYGEN__) -/** - \def BAUD_TOL - \ingroup util_setbaud - - Input and output macro for - - Define the acceptable baud rate tolerance in percent. If not set - on entry, it will be set to its default value of 2. -*/ -#define BAUD_TOL 2 - -/** - \def UBRR_VALUE - \ingroup util_setbaud - - Output macro from - - Contains the calculated baud rate prescaler value for the UBRR - register. -*/ -#define UBRR_VALUE - -/** - \def UBRRL_VALUE - \ingroup util_setbaud - - Output macro from - - Contains the lower byte of the calculated prescaler value - (UBRR_VALUE). -*/ -#define UBRRL_VALUE - -/** - \def UBRRH_VALUE - \ingroup util_setbaud - - Output macro from - - Contains the upper byte of the calculated prescaler value - (UBRR_VALUE). -*/ -#define UBRRH_VALUE - -/** - \def USE_2X - \ingroup util_setbaud - - Output bacro from - - Contains the value 1 if the desired baud rate tolerance could only - be achieved by setting the U2X bit in the UART configuration. - Contains 0 otherwise. -*/ -#define USE_2X 0 - -#else /* !__DOXYGEN__ */ - -#undef USE_2X - -/* Baud rate tolerance is 2 % unless previously defined */ -#ifndef BAUD_TOL -# define BAUD_TOL 2 -#endif - -#define UBRR_VALUE (((F_CPU) + 8UL * (BAUD)) / (16UL * (BAUD)) -1UL) - -#if 100 * (F_CPU) > \ - (16 * ((UBRR_VALUE) + 1)) * (100 * (BAUD) + (BAUD) * (BAUD_TOL)) -# define USE_2X 1 -#elif 100 * (F_CPU) < \ - (16 * ((UBRR_VALUE) + 1)) * (100 * (BAUD) - (BAUD) * (BAUD_TOL)) -# define USE_2X 1 -#else -# define USE_2X 0 -#endif - -#if USE_2X -/* U2X required, recalculate */ -#undef UBRR_VALUE -#define UBRR_VALUE (((F_CPU) + 4UL * (BAUD)) / (8UL * (BAUD)) -1UL) - -#if 100 * (F_CPU) > \ - (8 * ((UBRR_VALUE) + 1)) * (100 * (BAUD) + (BAUD) * (BAUD_TOL)) -# warning "Baud rate achieved is higher than allowed" -#endif - -#if 100 * (F_CPU) < \ - (8 * ((UBRR_VALUE) + 1)) * (100 * (BAUD) - (BAUD) * (BAUD_TOL)) -# warning "Baud rate achieved is lower than allowed" -#endif - -#endif /* USE_U2X */ - -#ifdef UBRR_VALUE -# define UBRRL_VALUE (UBRR_VALUE & 0xff) -# define UBRRH_VALUE (UBRR_VALUE >> 8) -#endif - -#endif /* __DOXYGEN__ */ -/* end of util/setbaud.h */ diff --git a/build/linux/work/hardware/tools/avr/lib/avr/include/util/twi.h b/build/linux/work/hardware/tools/avr/lib/avr/include/util/twi.h deleted file mode 100644 index 5876204fd..000000000 --- a/build/linux/work/hardware/tools/avr/lib/avr/include/util/twi.h +++ /dev/null @@ -1,237 +0,0 @@ -/* Copyright (c) 2002, Marek Michalkiewicz - Copyright (c) 2005, 2007 Joerg Wunsch - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - - * Neither the name of the copyright holders nor the names of - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - -/* $Id: twi.h,v 1.2 2007/01/23 15:32:48 joerg_wunsch Exp $ */ -/* copied from: Id: avr/twi.h,v 1.4 2004/11/01 21:19:54 arcanum Exp */ - -#ifndef _UTIL_TWI_H_ -#define _UTIL_TWI_H_ 1 - -#include - -/** \file */ -/** \defgroup util_twi : TWI bit mask definitions - \code #include \endcode - - This header file contains bit mask definitions for use with - the AVR TWI interface. -*/ -/** \name TWSR values - - Mnemonics: -
    TW_MT_xxx - master transmitter -
    TW_MR_xxx - master receiver -
    TW_ST_xxx - slave transmitter -
    TW_SR_xxx - slave receiver - */ - -/*@{*/ -/* Master */ -/** \ingroup util_twi - \def TW_START - start condition transmitted */ -#define TW_START 0x08 - -/** \ingroup util_twi - \def TW_REP_START - repeated start condition transmitted */ -#define TW_REP_START 0x10 - -/* Master Transmitter */ -/** \ingroup util_twi - \def TW_MT_SLA_ACK - SLA+W transmitted, ACK received */ -#define TW_MT_SLA_ACK 0x18 - -/** \ingroup util_twi - \def TW_MT_SLA_NACK - SLA+W transmitted, NACK received */ -#define TW_MT_SLA_NACK 0x20 - -/** \ingroup util_twi - \def TW_MT_DATA_ACK - data transmitted, ACK received */ -#define TW_MT_DATA_ACK 0x28 - -/** \ingroup util_twi - \def TW_MT_DATA_NACK - data transmitted, NACK received */ -#define TW_MT_DATA_NACK 0x30 - -/** \ingroup util_twi - \def TW_MT_ARB_LOST - arbitration lost in SLA+W or data */ -#define TW_MT_ARB_LOST 0x38 - -/* Master Receiver */ -/** \ingroup util_twi - \def TW_MR_ARB_LOST - arbitration lost in SLA+R or NACK */ -#define TW_MR_ARB_LOST 0x38 - -/** \ingroup util_twi - \def TW_MR_SLA_ACK - SLA+R transmitted, ACK received */ -#define TW_MR_SLA_ACK 0x40 - -/** \ingroup util_twi - \def TW_MR_SLA_NACK - SLA+R transmitted, NACK received */ -#define TW_MR_SLA_NACK 0x48 - -/** \ingroup util_twi - \def TW_MR_DATA_ACK - data received, ACK returned */ -#define TW_MR_DATA_ACK 0x50 - -/** \ingroup util_twi - \def TW_MR_DATA_NACK - data received, NACK returned */ -#define TW_MR_DATA_NACK 0x58 - -/* Slave Transmitter */ -/** \ingroup util_twi - \def TW_ST_SLA_ACK - SLA+R received, ACK returned */ -#define TW_ST_SLA_ACK 0xA8 - -/** \ingroup util_twi - \def TW_ST_ARB_LOST_SLA_ACK - arbitration lost in SLA+RW, SLA+R received, ACK returned */ -#define TW_ST_ARB_LOST_SLA_ACK 0xB0 - -/** \ingroup util_twi - \def TW_ST_DATA_ACK - data transmitted, ACK received */ -#define TW_ST_DATA_ACK 0xB8 - -/** \ingroup util_twi - \def TW_ST_DATA_NACK - data transmitted, NACK received */ -#define TW_ST_DATA_NACK 0xC0 - -/** \ingroup util_twi - \def TW_ST_LAST_DATA - last data byte transmitted, ACK received */ -#define TW_ST_LAST_DATA 0xC8 - -/* Slave Receiver */ -/** \ingroup util_twi - \def TW_SR_SLA_ACK - SLA+W received, ACK returned */ -#define TW_SR_SLA_ACK 0x60 - -/** \ingroup util_twi - \def TW_SR_ARB_LOST_SLA_ACK - arbitration lost in SLA+RW, SLA+W received, ACK returned */ -#define TW_SR_ARB_LOST_SLA_ACK 0x68 - -/** \ingroup util_twi - \def TW_SR_GCALL_ACK - general call received, ACK returned */ -#define TW_SR_GCALL_ACK 0x70 - -/** \ingroup util_twi - \def TW_SR_ARB_LOST_GCALL_ACK - arbitration lost in SLA+RW, general call received, ACK returned */ -#define TW_SR_ARB_LOST_GCALL_ACK 0x78 - -/** \ingroup util_twi - \def TW_SR_DATA_ACK - data received, ACK returned */ -#define TW_SR_DATA_ACK 0x80 - -/** \ingroup util_twi - \def TW_SR_DATA_NACK - data received, NACK returned */ -#define TW_SR_DATA_NACK 0x88 - -/** \ingroup util_twi - \def TW_SR_GCALL_DATA_ACK - general call data received, ACK returned */ -#define TW_SR_GCALL_DATA_ACK 0x90 - -/** \ingroup util_twi - \def TW_SR_GCALL_DATA_NACK - general call data received, NACK returned */ -#define TW_SR_GCALL_DATA_NACK 0x98 - -/** \ingroup util_twi - \def TW_SR_STOP - stop or repeated start condition received while selected */ -#define TW_SR_STOP 0xA0 - -/* Misc */ -/** \ingroup util_twi - \def TW_NO_INFO - no state information available */ -#define TW_NO_INFO 0xF8 - -/** \ingroup util_twi - \def TW_BUS_ERROR - illegal start or stop condition */ -#define TW_BUS_ERROR 0x00 - - -/** - * \ingroup util_twi - * \def TW_STATUS_MASK - * The lower 3 bits of TWSR are reserved on the ATmega163. - * The 2 LSB carry the prescaler bits on the newer ATmegas. - */ -#define TW_STATUS_MASK (_BV(TWS7)|_BV(TWS6)|_BV(TWS5)|_BV(TWS4)|\ - _BV(TWS3)) -/** - * \ingroup util_twi - * \def TW_STATUS - * - * TWSR, masked by TW_STATUS_MASK - */ -#define TW_STATUS (TWSR & TW_STATUS_MASK) -/*@}*/ - -/** - * \name R/~W bit in SLA+R/W address field. - */ - -/*@{*/ -/** \ingroup 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b/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/include-fixed/README deleted file mode 100644 index 7086a7782..000000000 --- a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/include-fixed/README +++ /dev/null @@ -1,14 +0,0 @@ -This README file is copied into the directory for GCC-only header files -when fixincludes is run by the makefile for GCC. - -Many of the files in this directory were automatically edited from the -standard system header files by the fixincludes process. They are -system-specific, and will not work on any other kind of system. They -are also not part of GCC. The reason we have to do this is because -GCC requires ANSI C headers and many vendors supply ANSI-incompatible -headers. - -Because this is an automated process, sometimes headers get "fixed" -that do not, strictly speaking, need a fix. As long as nothing is broken -by the process, it is just an unfortunate collateral inconvenience. -We would like to rectify it, if it is not "too inconvenient". diff --git a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/include-fixed/fixed b/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/include-fixed/fixed deleted file mode 100644 index 9788f7023..000000000 --- a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/include-fixed/fixed +++ /dev/null @@ -1 +0,0 @@ -timestamp diff --git a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/include-fixed/limits.h b/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/include-fixed/limits.h deleted file mode 100644 index 710cbb528..000000000 --- a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/include-fixed/limits.h +++ /dev/null @@ -1,103 +0,0 @@ -#ifndef _LIMITS_H___ -#define _LIMITS_H___ - -/* Number of bits in a `char'. */ -#undef CHAR_BIT -#define CHAR_BIT __CHAR_BIT__ - -/* Maximum length of a multibyte character. */ -#ifndef MB_LEN_MAX -#define MB_LEN_MAX 1 -#endif - -/* Minimum and maximum values a `signed char' can hold. */ -#undef SCHAR_MIN -#define SCHAR_MIN (-SCHAR_MAX - 1) -#undef SCHAR_MAX -#define SCHAR_MAX __SCHAR_MAX__ - -/* Maximum value an `unsigned char' can hold. (Minimum is 0). */ -#undef UCHAR_MAX -#if __SCHAR_MAX__ == __INT_MAX__ -# define UCHAR_MAX (SCHAR_MAX * 2U + 1U) -#else -# define UCHAR_MAX (SCHAR_MAX * 2 + 1) -#endif - -/* Minimum and maximum values a `char' can hold. */ -#ifdef __CHAR_UNSIGNED__ -# undef CHAR_MIN -# if __SCHAR_MAX__ == __INT_MAX__ -# define CHAR_MIN 0U -# else -# define CHAR_MIN 0 -# endif -# undef CHAR_MAX -# define CHAR_MAX UCHAR_MAX -#else -# undef CHAR_MIN -# define CHAR_MIN SCHAR_MIN -# undef CHAR_MAX -# define CHAR_MAX SCHAR_MAX -#endif - -/* Minimum and maximum values a `signed short int' can hold. */ -#undef SHRT_MIN -#define SHRT_MIN (-SHRT_MAX - 1) -#undef SHRT_MAX -#define SHRT_MAX __SHRT_MAX__ - -/* Maximum value an `unsigned short int' can hold. (Minimum is 0). */ -#undef USHRT_MAX -#if __SHRT_MAX__ == __INT_MAX__ -# define USHRT_MAX (SHRT_MAX * 2U + 1U) -#else -# define USHRT_MAX (SHRT_MAX * 2 + 1) -#endif - -/* Minimum and maximum values a `signed int' can hold. */ -#undef INT_MIN -#define INT_MIN (-INT_MAX - 1) -#undef INT_MAX -#define INT_MAX __INT_MAX__ - -/* Maximum value an `unsigned int' can hold. (Minimum is 0). */ -#undef UINT_MAX -#define UINT_MAX (INT_MAX * 2U + 1U) - -/* Minimum and maximum values a `signed long int' can hold. - (Same as `int'). */ -#undef LONG_MIN -#define LONG_MIN (-LONG_MAX - 1L) -#undef LONG_MAX -#define LONG_MAX __LONG_MAX__ - -/* Maximum value an `unsigned long int' can hold. (Minimum is 0). */ -#undef ULONG_MAX -#define ULONG_MAX (LONG_MAX * 2UL + 1UL) - -#if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L -/* Minimum and maximum values a `signed long long int' can hold. */ -# undef LLONG_MIN -# define LLONG_MIN (-LLONG_MAX - 1LL) -# undef LLONG_MAX -# define LLONG_MAX __LONG_LONG_MAX__ - -/* Maximum value an `unsigned long long int' can hold. (Minimum is 0). */ -# undef ULLONG_MAX -# define ULLONG_MAX (LLONG_MAX * 2ULL + 1ULL) -#endif - -#if defined (__GNU_LIBRARY__) ? defined (__USE_GNU) : !defined (__STRICT_ANSI__) -/* Minimum and maximum values a `signed long long int' can hold. */ -# undef LONG_LONG_MIN -# define LONG_LONG_MIN (-LONG_LONG_MAX - 1LL) -# undef LONG_LONG_MAX -# define LONG_LONG_MAX __LONG_LONG_MAX__ - -/* Maximum value an `unsigned long long int' can hold. (Minimum is 0). */ -# undef ULONG_LONG_MAX -# define ULONG_LONG_MAX (LONG_LONG_MAX * 2ULL + 1ULL) -#endif - -#endif /* _LIMITS_H___ */ diff --git a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/include-fixed/syslimits.h b/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/include-fixed/syslimits.h deleted file mode 100644 index a3628025e..000000000 --- a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/include-fixed/syslimits.h +++ /dev/null @@ -1,8 +0,0 @@ -/* syslimits.h stands for the system's own limits.h file. - If we can use it ok unmodified, then we install this text. - If fixincludes fixes it, then the fixed version is installed - instead of this text. */ - -#define _GCC_NEXT_LIMITS_H /* tell gcc's limits.h to recurse */ -#include_next -#undef _GCC_NEXT_LIMITS_H diff --git a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/include/float.h b/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/include/float.h deleted file mode 100644 index 23ce8f42c..000000000 --- a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/include/float.h +++ /dev/null @@ -1,241 +0,0 @@ -/* Copyright (C) 2002, 2007 Free Software Foundation, Inc. - -This file is part of GCC. - -GCC is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -GCC is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with GCC; see the file COPYING. If not, write to -the Free Software Foundation, 51 Franklin Street, Fifth Floor, -Boston, MA 02110-1301, USA. */ - -/* As a special exception, if you include this header file into source - files compiled by GCC, this header file does not by itself cause - the resulting executable to be covered by the GNU General Public - License. This exception does not however invalidate any other - reasons why the executable file might be covered by the GNU General - Public License. */ - -/* - * ISO C Standard: 5.2.4.2.2 Characteristics of floating types - */ - -#ifndef _FLOAT_H___ -#define _FLOAT_H___ - -/* Radix of exponent representation, b. */ -#undef FLT_RADIX -#define FLT_RADIX __FLT_RADIX__ - -/* Number of base-FLT_RADIX digits in the significand, p. */ -#undef FLT_MANT_DIG -#undef DBL_MANT_DIG -#undef LDBL_MANT_DIG -#define FLT_MANT_DIG __FLT_MANT_DIG__ -#define DBL_MANT_DIG __DBL_MANT_DIG__ -#define LDBL_MANT_DIG __LDBL_MANT_DIG__ - -/* Number of decimal digits, q, such that any floating-point number with q - decimal digits can be rounded into a floating-point number with p radix b - digits and back again without change to the q decimal digits, - - p * log10(b) if b is a power of 10 - floor((p - 1) * log10(b)) otherwise -*/ -#undef FLT_DIG -#undef DBL_DIG -#undef LDBL_DIG -#define FLT_DIG __FLT_DIG__ -#define DBL_DIG __DBL_DIG__ -#define LDBL_DIG __LDBL_DIG__ - -/* Minimum int x such that FLT_RADIX**(x-1) is a normalized float, emin */ -#undef FLT_MIN_EXP -#undef DBL_MIN_EXP -#undef LDBL_MIN_EXP -#define FLT_MIN_EXP __FLT_MIN_EXP__ -#define DBL_MIN_EXP __DBL_MIN_EXP__ -#define LDBL_MIN_EXP __LDBL_MIN_EXP__ - -/* Minimum negative integer such that 10 raised to that power is in the - range of normalized floating-point numbers, - - ceil(log10(b) * (emin - 1)) -*/ -#undef FLT_MIN_10_EXP -#undef DBL_MIN_10_EXP -#undef LDBL_MIN_10_EXP -#define FLT_MIN_10_EXP __FLT_MIN_10_EXP__ -#define DBL_MIN_10_EXP __DBL_MIN_10_EXP__ -#define LDBL_MIN_10_EXP __LDBL_MIN_10_EXP__ - -/* Maximum int x such that FLT_RADIX**(x-1) is a representable float, emax. */ -#undef FLT_MAX_EXP -#undef DBL_MAX_EXP -#undef LDBL_MAX_EXP -#define FLT_MAX_EXP __FLT_MAX_EXP__ -#define DBL_MAX_EXP __DBL_MAX_EXP__ -#define LDBL_MAX_EXP __LDBL_MAX_EXP__ - -/* Maximum integer such that 10 raised to that power is in the range of - representable finite floating-point numbers, - - floor(log10((1 - b**-p) * b**emax)) -*/ -#undef FLT_MAX_10_EXP -#undef DBL_MAX_10_EXP -#undef LDBL_MAX_10_EXP -#define FLT_MAX_10_EXP __FLT_MAX_10_EXP__ -#define DBL_MAX_10_EXP __DBL_MAX_10_EXP__ -#define LDBL_MAX_10_EXP __LDBL_MAX_10_EXP__ - -/* Maximum representable finite floating-point number, - - (1 - b**-p) * b**emax -*/ -#undef FLT_MAX -#undef DBL_MAX -#undef LDBL_MAX -#define FLT_MAX __FLT_MAX__ -#define DBL_MAX __DBL_MAX__ -#define LDBL_MAX __LDBL_MAX__ - -/* The difference between 1 and the least value greater than 1 that is - representable in the given floating point type, b**1-p. */ -#undef FLT_EPSILON -#undef DBL_EPSILON -#undef LDBL_EPSILON -#define FLT_EPSILON __FLT_EPSILON__ -#define DBL_EPSILON __DBL_EPSILON__ -#define LDBL_EPSILON __LDBL_EPSILON__ - -/* Minimum normalized positive floating-point number, b**(emin - 1). */ -#undef FLT_MIN -#undef DBL_MIN -#undef LDBL_MIN -#define FLT_MIN __FLT_MIN__ -#define DBL_MIN __DBL_MIN__ -#define LDBL_MIN __LDBL_MIN__ - -/* Addition rounds to 0: zero, 1: nearest, 2: +inf, 3: -inf, -1: unknown. */ -/* ??? This is supposed to change with calls to fesetround in . */ -#undef FLT_ROUNDS -#define FLT_ROUNDS 1 - -#if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L -/* The floating-point expression evaluation method. - -1 indeterminate - 0 evaluate all operations and constants just to the range and - precision of the type - 1 evaluate operations and constants of type float and double - to the range and precision of the double type, evaluate - long double operations and constants to the range and - precision of the long double type - 2 evaluate all operations and constants to the range and - precision of the long double type - - ??? This ought to change with the setting of the fp control word; - the value provided by the compiler assumes the widest setting. */ -#undef FLT_EVAL_METHOD -#define FLT_EVAL_METHOD __FLT_EVAL_METHOD__ - -/* Number of decimal digits, n, such that any floating-point number in the - widest supported floating type with pmax radix b digits can be rounded - to a floating-point number with n decimal digits and back again without - change to the value, - - pmax * log10(b) if b is a power of 10 - ceil(1 + pmax * log10(b)) otherwise -*/ -#undef DECIMAL_DIG -#define DECIMAL_DIG __DECIMAL_DIG__ - -#endif /* C99 */ - -#ifdef __STDC_WANT_DEC_FP__ -/* Draft Technical Report 24732, extension for decimal floating-point - arithmetic: Characteristic of decimal floating types . */ - -/* Number of base-FLT_RADIX digits in the significand, p. */ -#undef DEC32_MANT_DIG -#undef DEC64_MANT_DIG -#undef DEC128_MANT_DIG -#define DEC32_MANT_DIG __DEC32_MANT_DIG__ -#define DEC64_MANT_DIG __DEC64_MANT_DIG__ -#define DEC128_MANT_DIG __DEC128_MANT_DIG__ - -/* Minimum exponent. */ -#undef DEC32_MIN_EXP -#undef DEC64_MIN_EXP -#undef DEC128_MIN_EXP -#define DEC32_MIN_EXP __DEC32_MIN_EXP__ -#define DEC64_MIN_EXP __DEC64_MIN_EXP__ -#define DEC128_MIN_EXP __DEC128_MIN_EXP__ - -/* Maximum exponent. */ -#undef DEC32_MAX_EXP -#undef DEC64_MAX_EXP -#undef DEC128_MAX_EXP -#define DEC32_MAX_EXP __DEC32_MAX_EXP__ -#define DEC64_MAX_EXP __DEC64_MAX_EXP__ -#define DEC128_MAX_EXP __DEC128_MAX_EXP__ - -/* Maximum representable finite decimal floating-point number - (there are 6, 15, and 33 9s after the decimal points respectively). */ -#undef DEC32_MAX -#undef DEC64_MAX -#undef DEC128_MAX -#define DEC32_MAX __DEC32_MAX__ -#define DEC64_MAX __DEC64_MAX__ -#define DEC128_MAX __DEC128_MAX__ - -/* The difference between 1 and the least value greater than 1 that is - representable in the given floating point type. */ -#undef DEC32_EPSILON -#undef DEC64_EPSILON -#undef DEC128_EPSILON -#define DEC32_EPSILON __DEC32_EPSILON__ -#define DEC64_EPSILON __DEC64_EPSILON__ -#define DEC128_EPSILON __DEC128_EPSILON__ - -/* Minimum normalized positive floating-point number. */ -#undef DEC32_MIN -#undef DEC64_MIN -#undef DEC128_MIN -#define DEC32_MIN __DEC32_MIN__ -#define DEC64_MIN __DEC64_MIN__ -#define DEC128_MIN __DEC128_MIN__ - -/* Minimum denormalized positive floating-point number. */ -#undef DEC32_DEN -#undef DEC64_DEN -#undef DEC128_DEN -#define DEC32_DEN __DEC32_DEN__ -#define DEC64_DEN __DEC64_DEN__ -#define DEC128_DEN __DEC128_DEN__ - -/* The floating-point expression evaluation method. - -1 indeterminate - 0 evaluate all operations and constants just to the range and - precision of the type - 1 evaluate operations and constants of type _Decimal32 - and _Decimal64 to the range and precision of the _Decimal64 - type, evaluate _Decimal128 operations and constants to the - range and precision of the _Decimal128 type; - 2 evaluate all operations and constants to the range and - precision of the _Decimal128 type. */ - -#undef DECFLT_EVAL_METHOD -#define DECFLT_EVAL_METHOD __DECFLT_EVAL_METHOD__ - -#endif /* __STDC_WANT_DEC_FP__ */ - -#endif /* _FLOAT_H___ */ diff --git a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/include/iso646.h b/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/include/iso646.h deleted file mode 100644 index 445d37298..000000000 --- a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/include/iso646.h +++ /dev/null @@ -1,48 +0,0 @@ -/* Copyright (C) 1997, 1999 Free Software Foundation, Inc. - -This file is part of GCC. - -GCC is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -GCC is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with GCC; see the file COPYING. If not, write to -the Free Software Foundation, 51 Franklin Street, Fifth Floor, -Boston, MA 02110-1301, USA. */ - -/* As a special exception, if you include this header file into source - files compiled by GCC, this header file does not by itself cause - the resulting executable to be covered by the GNU General Public - License. This exception does not however invalidate any other - reasons why the executable file might be covered by the GNU General - Public License. */ - -/* - * ISO C Standard: 7.9 Alternative spellings - */ - -#ifndef _ISO646_H -#define _ISO646_H - -#ifndef __cplusplus -#define and && -#define and_eq &= -#define bitand & -#define bitor | -#define compl ~ -#define not ! -#define not_eq != -#define or || -#define or_eq |= -#define xor ^ -#define xor_eq ^= -#endif - -#endif diff --git a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/include/stdarg.h b/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/include/stdarg.h deleted file mode 100644 index c9ddd6b7f..000000000 --- a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/include/stdarg.h +++ /dev/null @@ -1,133 +0,0 @@ -/* Copyright (C) 1989, 1997, 1998, 1999, 2000 Free Software Foundation, Inc. - -This file is part of GCC. - -GCC is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -GCC is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with GCC; see the file COPYING. If not, write to -the Free Software Foundation, 51 Franklin Street, Fifth Floor, -Boston, MA 02110-1301, USA. */ - -/* As a special exception, if you include this header file into source - files compiled by GCC, this header file does not by itself cause - the resulting executable to be covered by the GNU General Public - License. This exception does not however invalidate any other - reasons why the executable file might be covered by the GNU General - Public License. */ - -/* - * ISO C Standard: 7.15 Variable arguments - */ - -#ifndef _STDARG_H -#ifndef _ANSI_STDARG_H_ -#ifndef __need___va_list -#define _STDARG_H -#define _ANSI_STDARG_H_ -#endif /* not __need___va_list */ -#undef __need___va_list - -/* Define __gnuc_va_list. */ - -#ifndef __GNUC_VA_LIST -#define __GNUC_VA_LIST -typedef __builtin_va_list __gnuc_va_list; -#endif - -/* Define the standard macros for the user, - if this invocation was from the user program. */ -#ifdef _STDARG_H - -#define va_start(v,l) __builtin_va_start(v,l) -#define va_end(v) __builtin_va_end(v) -#define va_arg(v,l) __builtin_va_arg(v,l) -#if !defined(__STRICT_ANSI__) || __STDC_VERSION__ + 0 >= 199900L -#define va_copy(d,s) __builtin_va_copy(d,s) -#endif -#define __va_copy(d,s) __builtin_va_copy(d,s) - -/* Define va_list, if desired, from __gnuc_va_list. */ -/* We deliberately do not define va_list when called from - stdio.h, because ANSI C says that stdio.h is not supposed to define - va_list. stdio.h needs to have access to that data type, - but must not use that name. It should use the name __gnuc_va_list, - which is safe because it is reserved for the implementation. */ - -#ifdef _HIDDEN_VA_LIST /* On OSF1, this means varargs.h is "half-loaded". */ -#undef _VA_LIST -#endif - -#ifdef _BSD_VA_LIST -#undef _BSD_VA_LIST -#endif - -#if defined(__svr4__) || (defined(_SCO_DS) && !defined(__VA_LIST)) -/* SVR4.2 uses _VA_LIST for an internal alias for va_list, - so we must avoid testing it and setting it here. - SVR4 uses _VA_LIST as a flag in stdarg.h, but we should - have no conflict with that. */ -#ifndef _VA_LIST_ -#define _VA_LIST_ -#ifdef __i860__ -#ifndef _VA_LIST -#define _VA_LIST va_list -#endif -#endif /* __i860__ */ -typedef __gnuc_va_list va_list; -#ifdef _SCO_DS -#define __VA_LIST -#endif -#endif /* _VA_LIST_ */ -#else /* not __svr4__ || _SCO_DS */ - -/* The macro _VA_LIST_ is the same thing used by this file in Ultrix. - But on BSD NET2 we must not test or define or undef it. - (Note that the comments in NET 2's ansi.h - are incorrect for _VA_LIST_--see stdio.h!) */ -#if !defined (_VA_LIST_) || defined (__BSD_NET2__) || defined (____386BSD____) || defined (__bsdi__) || defined (__sequent__) || defined (__FreeBSD__) || defined(WINNT) -/* The macro _VA_LIST_DEFINED is used in Windows NT 3.5 */ -#ifndef _VA_LIST_DEFINED -/* The macro _VA_LIST is used in SCO Unix 3.2. */ -#ifndef _VA_LIST -/* The macro _VA_LIST_T_H is used in the Bull dpx2 */ -#ifndef _VA_LIST_T_H -/* The macro __va_list__ is used by BeOS. */ -#ifndef __va_list__ -typedef __gnuc_va_list va_list; -#endif /* not __va_list__ */ -#endif /* not _VA_LIST_T_H */ -#endif /* not _VA_LIST */ -#endif /* not _VA_LIST_DEFINED */ -#if !(defined (__BSD_NET2__) || defined (____386BSD____) || defined (__bsdi__) || defined (__sequent__) || defined (__FreeBSD__)) -#define _VA_LIST_ -#endif -#ifndef _VA_LIST -#define _VA_LIST -#endif -#ifndef _VA_LIST_DEFINED -#define _VA_LIST_DEFINED -#endif -#ifndef _VA_LIST_T_H -#define _VA_LIST_T_H -#endif -#ifndef __va_list__ -#define __va_list__ -#endif - -#endif /* not _VA_LIST_, except on certain systems */ - -#endif /* not __svr4__ */ - -#endif /* _STDARG_H */ - -#endif /* not _ANSI_STDARG_H_ */ -#endif /* not _STDARG_H */ diff --git a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/include/stdbool.h b/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/include/stdbool.h deleted file mode 100644 index b36e6503d..000000000 --- a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/include/stdbool.h +++ /dev/null @@ -1,53 +0,0 @@ -/* Copyright (C) 1998, 1999, 2000 Free Software Foundation, Inc. - -This file is part of GCC. - -GCC is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -GCC is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with GCC; see the file COPYING. If not, write to -the Free Software Foundation, 51 Franklin Street, Fifth Floor, -Boston, MA 02110-1301, USA. */ - -/* As a special exception, if you include this header file into source - files compiled by GCC, this header file does not by itself cause - the resulting executable to be covered by the GNU General Public - License. This exception does not however invalidate any other - reasons why the executable file might be covered by the GNU General - Public License. */ - -/* - * ISO C Standard: 7.16 Boolean type and values - */ - -#ifndef _STDBOOL_H -#define _STDBOOL_H - -#ifndef __cplusplus - -#define bool _Bool -#define true 1 -#define false 0 - -#else /* __cplusplus */ - -/* Supporting in C++ is a GCC extension. */ -#define _Bool bool -#define bool bool -#define false false -#define true true - -#endif /* __cplusplus */ - -/* Signal that all the definitions are present. */ -#define __bool_true_false_are_defined 1 - -#endif /* stdbool.h */ diff --git a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/include/stddef.h b/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/include/stddef.h deleted file mode 100644 index 7e6179595..000000000 --- a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/include/stddef.h +++ /dev/null @@ -1,419 +0,0 @@ -/* Copyright (C) 1989, 1997, 1998, 1999, 2000, 2002, 2004 - Free Software Foundation, Inc. - -This file is part of GCC. - -GCC is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -GCC is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with GCC; see the file COPYING. If not, write to -the Free Software Foundation, 51 Franklin Street, Fifth Floor, -Boston, MA 02110-1301, USA. */ - -/* As a special exception, if you include this header file into source - files compiled by GCC, this header file does not by itself cause - the resulting executable to be covered by the GNU General Public - License. This exception does not however invalidate any other - reasons why the executable file might be covered by the GNU General - Public License. */ - -/* - * ISO C Standard: 7.17 Common definitions - */ -#if (!defined(_STDDEF_H) && !defined(_STDDEF_H_) && !defined(_ANSI_STDDEF_H) \ - && !defined(__STDDEF_H__)) \ - || defined(__need_wchar_t) || defined(__need_size_t) \ - || defined(__need_ptrdiff_t) || defined(__need_NULL) \ - || defined(__need_wint_t) - -/* Any one of these symbols __need_* means that GNU libc - wants us just to define one data type. So don't define - the symbols that indicate this file's entire job has been done. */ -#if (!defined(__need_wchar_t) && !defined(__need_size_t) \ - && !defined(__need_ptrdiff_t) && !defined(__need_NULL) \ - && !defined(__need_wint_t)) -#define _STDDEF_H -#define _STDDEF_H_ -/* snaroff@next.com says the NeXT needs this. */ -#define _ANSI_STDDEF_H -/* Irix 5.1 needs this. */ -#define __STDDEF_H__ -#endif - -#ifndef __sys_stdtypes_h -/* This avoids lossage on SunOS but only if stdtypes.h comes first. - There's no way to win with the other order! Sun lossage. */ - -/* On 4.3bsd-net2, make sure ansi.h is included, so we have - one less case to deal with in the following. */ -#if defined (__BSD_NET2__) || defined (____386BSD____) || (defined (__FreeBSD__) && (__FreeBSD__ < 5)) || defined(__NetBSD__) -#include -#endif -/* On FreeBSD 5, machine/ansi.h does not exist anymore... */ -#if defined (__FreeBSD__) && (__FreeBSD__ >= 5) -#include -#endif - -/* In 4.3bsd-net2, machine/ansi.h defines these symbols, which are - defined if the corresponding type is *not* defined. - FreeBSD-2.1 defines _MACHINE_ANSI_H_ instead of _ANSI_H_ */ -#if defined(_ANSI_H_) || defined(_MACHINE_ANSI_H_) -#if !defined(_SIZE_T_) && !defined(_BSD_SIZE_T_) -#define _SIZE_T -#endif -#if !defined(_PTRDIFF_T_) && !defined(_BSD_PTRDIFF_T_) -#define _PTRDIFF_T -#endif -/* On BSD/386 1.1, at least, machine/ansi.h defines _BSD_WCHAR_T_ - instead of _WCHAR_T_. */ -#if !defined(_WCHAR_T_) && !defined(_BSD_WCHAR_T_) -#ifndef _BSD_WCHAR_T_ -#define _WCHAR_T -#endif -#endif -/* Undef _FOO_T_ if we are supposed to define foo_t. */ -#if defined (__need_ptrdiff_t) || defined (_STDDEF_H_) -#undef _PTRDIFF_T_ -#undef _BSD_PTRDIFF_T_ -#endif -#if defined (__need_size_t) || defined (_STDDEF_H_) -#undef _SIZE_T_ -#undef _BSD_SIZE_T_ -#endif -#if defined (__need_wchar_t) || defined (_STDDEF_H_) -#undef _WCHAR_T_ -#undef _BSD_WCHAR_T_ -#endif -#endif /* defined(_ANSI_H_) || defined(_MACHINE_ANSI_H_) */ - -/* Sequent's header files use _PTRDIFF_T_ in some conflicting way. - Just ignore it. */ -#if defined (__sequent__) && defined (_PTRDIFF_T_) -#undef _PTRDIFF_T_ -#endif - -/* On VxWorks, may have defined macros like - _TYPE_size_t which will typedef size_t. fixincludes patched the - vxTypesBase.h so that this macro is only defined if _GCC_SIZE_T is - not defined, and so that defining this macro defines _GCC_SIZE_T. - If we find that the macros are still defined at this point, we must - invoke them so that the type is defined as expected. */ -#if defined (_TYPE_ptrdiff_t) && (defined (__need_ptrdiff_t) || defined (_STDDEF_H_)) -_TYPE_ptrdiff_t; -#undef _TYPE_ptrdiff_t -#endif -#if defined (_TYPE_size_t) && (defined (__need_size_t) || defined (_STDDEF_H_)) -_TYPE_size_t; -#undef _TYPE_size_t -#endif -#if defined (_TYPE_wchar_t) && (defined (__need_wchar_t) || defined (_STDDEF_H_)) -_TYPE_wchar_t; -#undef _TYPE_wchar_t -#endif - -/* In case nobody has defined these types, but we aren't running under - GCC 2.00, make sure that __PTRDIFF_TYPE__, __SIZE_TYPE__, and - __WCHAR_TYPE__ have reasonable values. This can happen if the - parts of GCC is compiled by an older compiler, that actually - include gstddef.h, such as collect2. */ - -/* Signed type of difference of two pointers. */ - -/* Define this type if we are doing the whole job, - or if we want this type in particular. */ -#if defined (_STDDEF_H) || defined (__need_ptrdiff_t) -#ifndef _PTRDIFF_T /* in case has defined it. */ -#ifndef _T_PTRDIFF_ -#ifndef _T_PTRDIFF -#ifndef __PTRDIFF_T -#ifndef _PTRDIFF_T_ -#ifndef _BSD_PTRDIFF_T_ -#ifndef ___int_ptrdiff_t_h -#ifndef _GCC_PTRDIFF_T -#define _PTRDIFF_T -#define _T_PTRDIFF_ -#define _T_PTRDIFF -#define __PTRDIFF_T -#define _PTRDIFF_T_ -#define _BSD_PTRDIFF_T_ -#define ___int_ptrdiff_t_h -#define _GCC_PTRDIFF_T -#ifndef __PTRDIFF_TYPE__ -#define __PTRDIFF_TYPE__ long int -#endif -typedef __PTRDIFF_TYPE__ ptrdiff_t; -#endif /* _GCC_PTRDIFF_T */ -#endif /* ___int_ptrdiff_t_h */ -#endif /* _BSD_PTRDIFF_T_ */ -#endif /* _PTRDIFF_T_ */ -#endif /* __PTRDIFF_T */ -#endif /* _T_PTRDIFF */ -#endif /* _T_PTRDIFF_ */ -#endif /* _PTRDIFF_T */ - -/* If this symbol has done its job, get rid of it. */ -#undef __need_ptrdiff_t - -#endif /* _STDDEF_H or __need_ptrdiff_t. */ - -/* Unsigned type of `sizeof' something. */ - -/* Define this type if we are doing the whole job, - or if we want this type in particular. */ -#if defined (_STDDEF_H) || defined (__need_size_t) -#ifndef __size_t__ /* BeOS */ -#ifndef __SIZE_T__ /* Cray Unicos/Mk */ -#ifndef _SIZE_T /* in case has defined it. */ -#ifndef _SYS_SIZE_T_H -#ifndef _T_SIZE_ -#ifndef _T_SIZE -#ifndef __SIZE_T -#ifndef _SIZE_T_ -#ifndef _BSD_SIZE_T_ -#ifndef _SIZE_T_DEFINED_ -#ifndef _SIZE_T_DEFINED -#ifndef _BSD_SIZE_T_DEFINED_ /* Darwin */ -#ifndef _SIZE_T_DECLARED /* FreeBSD 5 */ -#ifndef ___int_size_t_h -#ifndef _GCC_SIZE_T -#ifndef _SIZET_ -#ifndef __size_t -#define __size_t__ /* BeOS */ -#define __SIZE_T__ /* Cray Unicos/Mk */ -#define _SIZE_T -#define _SYS_SIZE_T_H -#define _T_SIZE_ -#define _T_SIZE -#define __SIZE_T -#define _SIZE_T_ -#define _BSD_SIZE_T_ -#define _SIZE_T_DEFINED_ -#define _SIZE_T_DEFINED -#define _BSD_SIZE_T_DEFINED_ /* Darwin */ -#define _SIZE_T_DECLARED /* FreeBSD 5 */ -#define ___int_size_t_h -#define _GCC_SIZE_T -#define _SIZET_ -#if defined (__FreeBSD__) && (__FreeBSD__ >= 5) -/* __size_t is a typedef on FreeBSD 5!, must not trash it. */ -#else -#define __size_t -#endif -#ifndef __SIZE_TYPE__ -#define __SIZE_TYPE__ long unsigned int -#endif -#if !(defined (__GNUG__) && defined (size_t)) -typedef __SIZE_TYPE__ size_t; -#ifdef __BEOS__ -typedef long ssize_t; -#endif /* __BEOS__ */ -#endif /* !(defined (__GNUG__) && defined (size_t)) */ -#endif /* __size_t */ -#endif /* _SIZET_ */ -#endif /* _GCC_SIZE_T */ -#endif /* ___int_size_t_h */ -#endif /* _SIZE_T_DECLARED */ -#endif /* _BSD_SIZE_T_DEFINED_ */ -#endif /* _SIZE_T_DEFINED */ -#endif /* _SIZE_T_DEFINED_ */ -#endif /* _BSD_SIZE_T_ */ -#endif /* _SIZE_T_ */ -#endif /* __SIZE_T */ -#endif /* _T_SIZE */ -#endif /* _T_SIZE_ */ -#endif /* _SYS_SIZE_T_H */ -#endif /* _SIZE_T */ -#endif /* __SIZE_T__ */ -#endif /* __size_t__ */ -#undef __need_size_t -#endif /* _STDDEF_H or __need_size_t. */ - - -/* Wide character type. - Locale-writers should change this as necessary to - be big enough to hold unique values not between 0 and 127, - and not (wchar_t) -1, for each defined multibyte character. */ - -/* Define this type if we are doing the whole job, - or if we want this type in particular. */ -#if defined (_STDDEF_H) || defined (__need_wchar_t) -#ifndef __wchar_t__ /* BeOS */ -#ifndef __WCHAR_T__ /* Cray Unicos/Mk */ -#ifndef _WCHAR_T -#ifndef _T_WCHAR_ -#ifndef _T_WCHAR -#ifndef __WCHAR_T -#ifndef _WCHAR_T_ -#ifndef _BSD_WCHAR_T_ -#ifndef _BSD_WCHAR_T_DEFINED_ /* Darwin */ -#ifndef _BSD_RUNE_T_DEFINED_ /* Darwin */ -#ifndef _WCHAR_T_DECLARED /* FreeBSD 5 */ -#ifndef _WCHAR_T_DEFINED_ -#ifndef _WCHAR_T_DEFINED -#ifndef _WCHAR_T_H -#ifndef ___int_wchar_t_h -#ifndef __INT_WCHAR_T_H -#ifndef _GCC_WCHAR_T -#define __wchar_t__ /* BeOS */ -#define __WCHAR_T__ /* Cray Unicos/Mk */ -#define _WCHAR_T -#define _T_WCHAR_ -#define _T_WCHAR -#define __WCHAR_T -#define _WCHAR_T_ -#define _BSD_WCHAR_T_ -#define _WCHAR_T_DEFINED_ -#define _WCHAR_T_DEFINED -#define _WCHAR_T_H -#define ___int_wchar_t_h -#define __INT_WCHAR_T_H -#define _GCC_WCHAR_T -#define _WCHAR_T_DECLARED - -/* On BSD/386 1.1, at least, machine/ansi.h defines _BSD_WCHAR_T_ - instead of _WCHAR_T_, and _BSD_RUNE_T_ (which, unlike the other - symbols in the _FOO_T_ family, stays defined even after its - corresponding type is defined). If we define wchar_t, then we - must undef _WCHAR_T_; for BSD/386 1.1 (and perhaps others), if - we undef _WCHAR_T_, then we must also define rune_t, since - headers like runetype.h assume that if machine/ansi.h is included, - and _BSD_WCHAR_T_ is not defined, then rune_t is available. - machine/ansi.h says, "Note that _WCHAR_T_ and _RUNE_T_ must be of - the same type." */ -#ifdef _BSD_WCHAR_T_ -#undef _BSD_WCHAR_T_ -#ifdef _BSD_RUNE_T_ -#if !defined (_ANSI_SOURCE) && !defined (_POSIX_SOURCE) -typedef _BSD_RUNE_T_ rune_t; -#define _BSD_WCHAR_T_DEFINED_ -#define _BSD_RUNE_T_DEFINED_ /* Darwin */ -#if defined (__FreeBSD__) && (__FreeBSD__ < 5) -/* Why is this file so hard to maintain properly? In contrast to - the comment above regarding BSD/386 1.1, on FreeBSD for as long - as the symbol has existed, _BSD_RUNE_T_ must not stay defined or - redundant typedefs will occur when stdlib.h is included after this file. */ -#undef _BSD_RUNE_T_ -#endif -#endif -#endif -#endif -/* FreeBSD 5 can't be handled well using "traditional" logic above - since it no longer defines _BSD_RUNE_T_ yet still desires to export - rune_t in some cases... */ -#if defined (__FreeBSD__) && (__FreeBSD__ >= 5) -#if !defined (_ANSI_SOURCE) && !defined (_POSIX_SOURCE) -#if __BSD_VISIBLE -#ifndef _RUNE_T_DECLARED -typedef __rune_t rune_t; -#define _RUNE_T_DECLARED -#endif -#endif -#endif -#endif - -#ifndef __WCHAR_TYPE__ -#define __WCHAR_TYPE__ int -#endif -#ifndef __cplusplus -typedef __WCHAR_TYPE__ wchar_t; -#endif -#endif -#endif -#endif -#endif -#endif -#endif -#endif /* _WCHAR_T_DECLARED */ -#endif /* _BSD_RUNE_T_DEFINED_ */ -#endif -#endif -#endif -#endif -#endif -#endif -#endif -#endif /* __WCHAR_T__ */ -#endif /* __wchar_t__ */ -#undef __need_wchar_t -#endif /* _STDDEF_H or __need_wchar_t. */ - -#if defined (__need_wint_t) -#ifndef _WINT_T -#define _WINT_T - -#ifndef __WINT_TYPE__ -#define __WINT_TYPE__ unsigned int -#endif -typedef __WINT_TYPE__ wint_t; -#endif -#undef __need_wint_t -#endif - -/* In 4.3bsd-net2, leave these undefined to indicate that size_t, etc. - are already defined. */ -/* BSD/OS 3.1 and FreeBSD [23].x require the MACHINE_ANSI_H check here. */ -#if defined(_ANSI_H_) || defined(_MACHINE_ANSI_H_) -/* The references to _GCC_PTRDIFF_T_, _GCC_SIZE_T_, and _GCC_WCHAR_T_ - are probably typos and should be removed before 2.8 is released. */ -#ifdef _GCC_PTRDIFF_T_ -#undef _PTRDIFF_T_ -#undef _BSD_PTRDIFF_T_ -#endif -#ifdef _GCC_SIZE_T_ -#undef _SIZE_T_ -#undef _BSD_SIZE_T_ -#endif -#ifdef _GCC_WCHAR_T_ -#undef _WCHAR_T_ -#undef _BSD_WCHAR_T_ -#endif -/* The following ones are the real ones. */ -#ifdef _GCC_PTRDIFF_T -#undef _PTRDIFF_T_ -#undef _BSD_PTRDIFF_T_ -#endif -#ifdef _GCC_SIZE_T -#undef _SIZE_T_ -#undef _BSD_SIZE_T_ -#endif -#ifdef _GCC_WCHAR_T -#undef _WCHAR_T_ -#undef _BSD_WCHAR_T_ -#endif -#endif /* _ANSI_H_ || _MACHINE_ANSI_H_ */ - -#endif /* __sys_stdtypes_h */ - -/* A null pointer constant. */ - -#if defined (_STDDEF_H) || defined (__need_NULL) -#undef NULL /* in case has defined it. */ -#ifdef __GNUG__ -#define NULL __null -#else /* G++ */ -#ifndef __cplusplus -#define NULL ((void *)0) -#else /* C++ */ -#define NULL 0 -#endif /* C++ */ -#endif /* G++ */ -#endif /* NULL not defined and or need NULL. */ -#undef __need_NULL - -#ifdef _STDDEF_H - -/* Offset of member MEMBER in a struct of type TYPE. */ -#define offsetof(TYPE, MEMBER) __builtin_offsetof (TYPE, MEMBER) - -#endif /* _STDDEF_H was defined this time */ - -#endif /* !_STDDEF_H && !_STDDEF_H_ && !_ANSI_STDDEF_H && !__STDDEF_H__ - || __need_XXX was not defined before */ diff --git a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/include/stdfix.h b/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/include/stdfix.h deleted file mode 100644 index 5e7cb2eed..000000000 --- a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/include/stdfix.h +++ /dev/null @@ -1,207 +0,0 @@ -/* Copyright (C) 2007 Free Software Foundation, Inc. - -This file is part of GCC. - -GCC is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -GCC is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with GCC; see the file COPYING. If not, write to -the Free Software Foundation, 51 Franklin Street, Fifth Floor, -Boston, MA 02110-1301, USA. */ - -/* As a special exception, if you include this header file into source - files compiled by GCC, this header file does not by itself cause - the resulting executable to be covered by the GNU General Public - License. This exception does not however invalidate any other - reasons why the executable file might be covered by the GNU General - Public License. */ - -/* ISO/IEC JTC1 SC22 WG14 N1169 - * Date: 2006-04-04 - * ISO/IEC TR 18037 - * Programming languages - C - Extensions to support embedded processors - */ - -#ifndef _STDFIX_H -#define _STDFIX_H - -/* 7.18a.1 Introduction. */ - -#undef fract -#undef accum -#undef sat -#define fract _Fract -#define accum _Accum -#define sat _Sat - -/* 7.18a.3 Precision macros. */ - -#undef SFRACT_FBIT -#undef SFRACT_MIN -#undef SFRACT_MAX -#undef SFRACT_EPSILON -#define SFRACT_FBIT __SFRACT_FBIT__ -#define SFRACT_MIN __SFRACT_MIN__ -#define SFRACT_MAX __SFRACT_MAX__ -#define SFRACT_EPSILON __SFRACT_EPSILON__ - -#undef USFRACT_FBIT -#undef USFRACT_MIN -#undef USFRACT_MAX -#undef USFRACT_EPSILON -#define USFRACT_FBIT __USFRACT_FBIT__ -#define USFRACT_MIN __USFRACT_MIN__ /* GCC extension. */ -#define USFRACT_MAX __USFRACT_MAX__ -#define USFRACT_EPSILON __USFRACT_EPSILON__ - -#undef FRACT_FBIT -#undef FRACT_MIN -#undef FRACT_MAX -#undef FRACT_EPSILON -#define FRACT_FBIT __FRACT_FBIT__ -#define FRACT_MIN __FRACT_MIN__ -#define FRACT_MAX __FRACT_MAX__ -#define FRACT_EPSILON __FRACT_EPSILON__ - -#undef UFRACT_FBIT -#undef UFRACT_MIN -#undef UFRACT_MAX -#undef UFRACT_EPSILON -#define UFRACT_FBIT __UFRACT_FBIT__ -#define UFRACT_MIN __UFRACT_MIN__ /* GCC extension. */ -#define UFRACT_MAX __UFRACT_MAX__ -#define UFRACT_EPSILON __UFRACT_EPSILON__ - -#undef LFRACT_FBIT -#undef LFRACT_MIN -#undef LFRACT_MAX -#undef LFRACT_EPSILON -#define LFRACT_FBIT __LFRACT_FBIT__ -#define LFRACT_MIN __LFRACT_MIN__ -#define LFRACT_MAX __LFRACT_MAX__ -#define LFRACT_EPSILON __LFRACT_EPSILON__ - -#undef ULFRACT_FBIT -#undef ULFRACT_MIN -#undef ULFRACT_MAX -#undef ULFRACT_EPSILON -#define ULFRACT_FBIT __ULFRACT_FBIT__ -#define ULFRACT_MIN __ULFRACT_MIN__ /* GCC extension. */ -#define ULFRACT_MAX __ULFRACT_MAX__ -#define ULFRACT_EPSILON __ULFRACT_EPSILON__ - -#undef LLFRACT_FBIT -#undef LLFRACT_MIN -#undef LLFRACT_MAX -#undef LLFRACT_EPSILON -#define LLFRACT_FBIT __LLFRACT_FBIT__ /* GCC extension. */ -#define LLFRACT_MIN __LLFRACT_MIN__ /* GCC extension. */ -#define LLFRACT_MAX __LLFRACT_MAX__ /* GCC extension. */ -#define LLFRACT_EPSILON __LLFRACT_EPSILON__ /* GCC extension. */ - -#undef ULLFRACT_FBIT -#undef ULLFRACT_MIN -#undef ULLFRACT_MAX -#undef ULLFRACT_EPSILON -#define ULLFRACT_FBIT __ULLFRACT_FBIT__ /* GCC extension. */ -#define ULLFRACT_MIN __ULLFRACT_MIN__ /* GCC extension. */ -#define ULLFRACT_MAX __ULLFRACT_MAX__ /* GCC extension. */ -#define ULLFRACT_EPSILON __ULLFRACT_EPSILON__ /* GCC extension. */ - -#undef SACCUM_FBIT -#undef SACCUM_IBIT -#undef SACCUM_MIN -#undef SACCUM_MAX -#undef SACCUM_EPSILON -#define SACCUM_FBIT __SACCUM_FBIT__ -#define SACCUM_IBIT __SACCUM_IBIT__ -#define SACCUM_MIN __SACCUM_MIN__ -#define SACCUM_MAX __SACCUM_MAX__ -#define SACCUM_EPSILON __SACCUM_EPSILON__ - -#undef USACCUM_FBIT -#undef USACCUM_IBIT -#undef USACCUM_MIN -#undef USACCUM_MAX -#undef USACCUM_EPSILON -#define USACCUM_FBIT __USACCUM_FBIT__ -#define USACCUM_IBIT __USACCUM_IBIT__ -#define USACCUM_MIN __USACCUM_MIN__ /* GCC extension. */ -#define USACCUM_MAX __USACCUM_MAX__ -#define USACCUM_EPSILON __USACCUM_EPSILON__ - -#undef ACCUM_FBIT -#undef ACCUM_IBIT -#undef ACCUM_MIN -#undef ACCUM_MAX -#undef ACCUM_EPSILON -#define ACCUM_FBIT __ACCUM_FBIT__ -#define ACCUM_IBIT __ACCUM_IBIT__ -#define ACCUM_MIN __ACCUM_MIN__ -#define ACCUM_MAX __ACCUM_MAX__ -#define ACCUM_EPSILON __ACCUM_EPSILON__ - -#undef UACCUM_FBIT -#undef UACCUM_IBIT -#undef UACCUM_MIN -#undef UACCUM_MAX -#undef UACCUM_EPSILON -#define UACCUM_FBIT __UACCUM_FBIT__ -#define UACCUM_IBIT __UACCUM_IBIT__ -#define UACCUM_MIN __UACCUM_MIN__ /* GCC extension. */ -#define UACCUM_MAX __UACCUM_MAX__ -#define UACCUM_EPSILON __UACCUM_EPSILON__ - -#undef LACCUM_FBIT -#undef LACCUM_IBIT -#undef LACCUM_MIN -#undef LACCUM_MAX -#undef LACCUM_EPSILON -#define LACCUM_FBIT __LACCUM_FBIT__ -#define LACCUM_IBIT __LACCUM_IBIT__ -#define LACCUM_MIN __LACCUM_MIN__ -#define LACCUM_MAX __LACCUM_MAX__ -#define LACCUM_EPSILON __LACCUM_EPSILON__ - -#undef ULACCUM_FBIT -#undef ULACCUM_IBIT -#undef ULACCUM_MIN -#undef ULACCUM_MAX -#undef ULACCUM_EPSILON -#define ULACCUM_FBIT __ULACCUM_FBIT__ -#define ULACCUM_IBIT __ULACCUM_IBIT__ -#define ULACCUM_MIN __ULACCUM_MIN__ /* GCC extension. */ -#define ULACCUM_MAX __ULACCUM_MAX__ -#define ULACCUM_EPSILON __ULACCUM_EPSILON__ - -#undef LLACCUM_FBIT -#undef LLACCUM_IBIT -#undef LLACCUM_MIN -#undef LLACCUM_MAX -#undef LLACCUM_EPSILON -#define LLACCUM_FBIT __LLACCUM_FBIT__ /* GCC extension. */ -#define LLACCUM_IBIT __LLACCUM_IBIT__ /* GCC extension. */ -#define LLACCUM_MIN __LLACCUM_MIN__ /* GCC extension. */ -#define LLACCUM_MAX __LLACCUM_MAX__ /* GCC extension. */ -#define LLACCUM_EPSILON __LLACCUM_EPSILON__ /* GCC extension. */ - -#undef ULLACCUM_FBIT -#undef ULLACCUM_IBIT -#undef ULLACCUM_MIN -#undef ULLACCUM_MAX -#undef ULLACCUM_EPSILON -#define ULLACCUM_FBIT __ULLACCUM_FBIT__ /* GCC extension. */ -#define ULLACCUM_IBIT __ULLACCUM_IBIT__ /* GCC extension. */ -#define ULLACCUM_MIN __ULLACCUM_MIN__ /* GCC extension. */ -#define ULLACCUM_MAX __ULLACCUM_MAX__ /* GCC extension. */ -#define ULLACCUM_EPSILON __ULLACCUM_EPSILON__ /* GCC extension. */ - -#endif /* _STDFIX_H */ diff --git a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/include/tgmath.h b/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/include/tgmath.h deleted file mode 100644 index 1c0fb37cf..000000000 --- a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/include/tgmath.h +++ /dev/null @@ -1,174 +0,0 @@ -/* Copyright (C) 2004, 2005 Free Software Foundation, Inc. - Contributed by Apple, Inc. - -This file is part of GCC. - -GCC is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -GCC is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with GCC; see the file COPYING. If not, write to -the Free Software Foundation, 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ - -/* As a special exception, if you include this header file into source - files compiled by GCC, this header file does not by itself cause - the resulting executable to be covered by the GNU General Public - License. This exception does not however invalidate any other - reasons why the executable file might be covered by the GNU General - Public License. */ - -/* - * ISO C Standard: 7.22 Type-generic math - */ - -#ifndef _TGMATH_H -#define _TGMATH_H - -#include - -#ifndef __cplusplus -#include - -/* Naming convention: generic macros are defining using - __TGMATH_CPLX*, __TGMATH_REAL*, and __TGMATH_CPLX_ONLY. _CPLX - means the generic argument(s) may be real or complex, _REAL means - real only, _CPLX means complex only. If there is no suffix, we are - defining a function of one generic argument. If the suffix is _n - it is a function of n generic arguments. If the suffix is _m_n it - is a function of n arguments, the first m of which are generic. We - only define these macros for values of n and/or m that are needed. */ - -/* The general rules for generic macros are given in 7.22 paragraphs 1 and 2. - If any generic parameter is complex, we use a complex version. Otherwise - we use a real version. If the real part of any generic parameter is long - double, we use the long double version. Otherwise if the real part of any - generic parameter is double or of integer type, we use the double version. - Otherwise we use the float version. */ - -#define __tg_cplx(expr) \ - __builtin_classify_type(expr) == 9 - -#define __tg_ldbl(expr) \ - __builtin_types_compatible_p(__typeof__(expr), long double) - -#define __tg_dbl(expr) \ - (__builtin_types_compatible_p(__typeof__(expr), double) \ - || __builtin_classify_type(expr) == 1) - -#define __tg_choose(x,f,d,l) \ - __builtin_choose_expr(__tg_ldbl(x), l, \ - __builtin_choose_expr(__tg_dbl(x), d, \ - f)) - -#define __tg_choose_2(x,y,f,d,l) \ - __builtin_choose_expr(__tg_ldbl(x) || __tg_ldbl(y), l, \ - __builtin_choose_expr(__tg_dbl(x) || __tg_dbl(y), d, \ - f)) - -#define __tg_choose_3(x,y,z,f,d,l) \ - __builtin_choose_expr(__tg_ldbl(x) || __tg_ldbl(y) || __tg_ldbl(z), l, \ - __builtin_choose_expr(__tg_dbl(x) || __tg_dbl(y) \ - || __tg_dbl(z), d, \ - f)) - -#define __TGMATH_CPLX(z,R,C) \ - __builtin_choose_expr (__tg_cplx(z), \ - __tg_choose (__real__(z), C##f(z), (C)(z), C##l(z)), \ - __tg_choose (z, R##f(z), (R)(z), R##l(z))) - -#define __TGMATH_CPLX_2(z1,z2,R,C) \ - __builtin_choose_expr (__tg_cplx(z1) || __tg_cplx(z2), \ - __tg_choose_2 (__real__(z1), __real__(z2), \ - C##f(z1,z2), (C)(z1,z2), C##l(z1,z2)), \ - __tg_choose_2 (z1, z2, \ - R##f(z1,z2), (R)(z1,z2), R##l(z1,z2))) - -#define __TGMATH_REAL(x,R) \ - __tg_choose (x, R##f(x), (R)(x), R##l(x)) -#define __TGMATH_REAL_2(x,y,R) \ - __tg_choose_2 (x, y, R##f(x,y), (R)(x,y), R##l(x,y)) -#define __TGMATH_REAL_3(x,y,z,R) \ - __tg_choose_3 (x, y, z, R##f(x,y,z), (R)(x,y,z), R##l(x,y,z)) -#define __TGMATH_REAL_1_2(x,y,R) \ - __tg_choose (x, R##f(x,y), (R)(x,y), R##l(x,y)) -#define __TGMATH_REAL_2_3(x,y,z,R) \ - __tg_choose_2 (x, y, R##f(x,y,z), (R)(x,y,z), R##l(x,y,z)) -#define __TGMATH_CPLX_ONLY(z,C) \ - __tg_choose (__real__(z), C##f(z), (C)(z), C##l(z)) - -/* Functions defined in both and (7.22p4) */ -#define acos(z) __TGMATH_CPLX(z, acos, cacos) -#define asin(z) __TGMATH_CPLX(z, asin, casin) -#define atan(z) __TGMATH_CPLX(z, atan, catan) -#define acosh(z) __TGMATH_CPLX(z, acosh, cacosh) -#define asinh(z) __TGMATH_CPLX(z, asinh, casinh) -#define atanh(z) __TGMATH_CPLX(z, atanh, catanh) -#define cos(z) __TGMATH_CPLX(z, cos, ccos) -#define sin(z) __TGMATH_CPLX(z, sin, csin) -#define tan(z) __TGMATH_CPLX(z, tan, ctan) -#define cosh(z) __TGMATH_CPLX(z, cosh, ccosh) -#define sinh(z) __TGMATH_CPLX(z, sinh, csinh) -#define tanh(z) __TGMATH_CPLX(z, tanh, ctanh) -#define exp(z) __TGMATH_CPLX(z, exp, cexp) -#define log(z) __TGMATH_CPLX(z, log, clog) -#define pow(z1,z2) __TGMATH_CPLX_2(z1, z2, pow, cpow) -#define sqrt(z) __TGMATH_CPLX(z, sqrt, csqrt) -#define fabs(z) __TGMATH_CPLX(z, fabs, cabs) - -/* Functions defined in only (7.22p5) */ -#define atan2(x,y) __TGMATH_REAL_2(x, y, atan2) -#define cbrt(x) __TGMATH_REAL(x, cbrt) -#define ceil(x) __TGMATH_REAL(x, ceil) -#define copysign(x,y) __TGMATH_REAL_2(x, y, copysign) -#define erf(x) __TGMATH_REAL(x, erf) -#define erfc(x) __TGMATH_REAL(x, erfc) -#define exp2(x) __TGMATH_REAL(x, exp2) -#define expm1(x) __TGMATH_REAL(x, expm1) -#define fdim(x,y) __TGMATH_REAL_2(x, y, fdim) -#define floor(x) __TGMATH_REAL(x, floor) -#define fma(x,y,z) __TGMATH_REAL_3(x, y, z, fma) -#define fmax(x,y) __TGMATH_REAL_2(x, y, fmax) -#define fmin(x,y) __TGMATH_REAL_2(x, y, fmin) -#define fmod(x,y) __TGMATH_REAL_2(x, y, fmod) -#define frexp(x,y) __TGMATH_REAL_1_2(x, y, frexp) -#define hypot(x,y) __TGMATH_REAL_2(x, y, hypot) -#define ilogb(x) __TGMATH_REAL(x, ilogb) -#define ldexp(x,y) __TGMATH_REAL_1_2(x, y, ldexp) -#define lgamma(x) __TGMATH_REAL(x, lgamma) -#define llrint(x) __TGMATH_REAL(x, llrint) -#define llround(x) __TGMATH_REAL(x, llround) -#define log10(x) __TGMATH_REAL(x, log10) -#define log1p(x) __TGMATH_REAL(x, log1p) -#define log2(x) __TGMATH_REAL(x, log2) -#define logb(x) __TGMATH_REAL(x, logb) -#define lrint(x) __TGMATH_REAL(x, lrint) -#define lround(x) __TGMATH_REAL(x, lround) -#define nearbyint(x) __TGMATH_REAL(x, nearbyint) -#define nextafter(x,y) __TGMATH_REAL_2(x, y, nextafter) -#define nexttoward(x,y) __TGMATH_REAL_1_2(x, y, nexttoward) -#define remainder(x,y) __TGMATH_REAL_2(x, y, remainder) -#define remquo(x,y,z) __TGMATH_REAL_2_3(x, y, z, remquo) -#define rint(x) __TGMATH_REAL(x, rint) -#define round(x) __TGMATH_REAL(x, round) -#define scalbn(x,y) __TGMATH_REAL_1_2(x, y, scalbn) -#define scalbln(x,y) __TGMATH_REAL_1_2(x, y, scalbln) -#define tgamma(x) __TGMATH_REAL(x, tgamma) -#define trunc(x) __TGMATH_REAL(x, trunc) - -/* Functions defined in only (7.22p6) */ -#define carg(z) __TGMATH_CPLX_ONLY(z, carg) -#define cimag(z) __TGMATH_CPLX_ONLY(z, cimag) -#define conj(z) __TGMATH_CPLX_ONLY(z, conj) -#define cproj(z) __TGMATH_CPLX_ONLY(z, cproj) -#define creal(z) __TGMATH_CPLX_ONLY(z, creal) - -#endif /* __cplusplus */ -#endif /* _TGMATH_H */ diff --git a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/include/unwind.h b/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/include/unwind.h deleted file mode 100644 index 5e0f608d8..000000000 --- a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/include/unwind.h +++ /dev/null @@ -1,279 +0,0 @@ -/* Exception handling and frame unwind runtime interface routines. - Copyright (C) 2001, 2003, 2004, 2006 Free Software Foundation, Inc. - - This file is part of GCC. - - GCC is free software; you can redistribute it and/or modify it - under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2, or (at your option) - any later version. - - GCC is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY - or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public - License for more details. - - You should have received a copy of the GNU General Public License - along with GCC; see the file COPYING. If not, write to the Free - Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA - 02110-1301, USA. */ - -/* As a special exception, if you include this header file into source - files compiled by GCC, this header file does not by itself cause - the resulting executable to be covered by the GNU General Public - License. This exception does not however invalidate any other - reasons why the executable file might be covered by the GNU General - Public License. */ - -/* This is derived from the C++ ABI for IA-64. Where we diverge - for cross-architecture compatibility are noted with "@@@". */ - -#ifndef _UNWIND_H -#define _UNWIND_H - -#ifndef HIDE_EXPORTS -#pragma GCC visibility push(default) -#endif - -#ifdef __cplusplus -extern "C" { -#endif - -/* Level 1: Base ABI */ - -/* @@@ The IA-64 ABI uses uint64 throughout. Most places this is - inefficient for 32-bit and smaller machines. */ -typedef unsigned _Unwind_Word __attribute__((__mode__(__unwind_word__))); -typedef signed _Unwind_Sword __attribute__((__mode__(__unwind_word__))); -#if defined(__ia64__) && defined(__hpux__) -typedef unsigned _Unwind_Ptr __attribute__((__mode__(__word__))); -#else -typedef unsigned _Unwind_Ptr __attribute__((__mode__(__pointer__))); -#endif -typedef unsigned _Unwind_Internal_Ptr __attribute__((__mode__(__pointer__))); - -/* @@@ The IA-64 ABI uses a 64-bit word to identify the producer and - consumer of an exception. We'll go along with this for now even on - 32-bit machines. We'll need to provide some other option for - 16-bit machines and for machines with > 8 bits per byte. */ -typedef unsigned _Unwind_Exception_Class __attribute__((__mode__(__DI__))); - -/* The unwind interface uses reason codes in several contexts to - identify the reasons for failures or other actions. */ -typedef enum -{ - _URC_NO_REASON = 0, - _URC_FOREIGN_EXCEPTION_CAUGHT = 1, - _URC_FATAL_PHASE2_ERROR = 2, - _URC_FATAL_PHASE1_ERROR = 3, - _URC_NORMAL_STOP = 4, - _URC_END_OF_STACK = 5, - _URC_HANDLER_FOUND = 6, - _URC_INSTALL_CONTEXT = 7, - _URC_CONTINUE_UNWIND = 8 -} _Unwind_Reason_Code; - - -/* The unwind interface uses a pointer to an exception header object - as its representation of an exception being thrown. In general, the - full representation of an exception object is language- and - implementation-specific, but it will be prefixed by a header - understood by the unwind interface. */ - -struct _Unwind_Exception; - -typedef void (*_Unwind_Exception_Cleanup_Fn) (_Unwind_Reason_Code, - struct _Unwind_Exception *); - -struct _Unwind_Exception -{ - _Unwind_Exception_Class exception_class; - _Unwind_Exception_Cleanup_Fn exception_cleanup; - _Unwind_Word private_1; - _Unwind_Word private_2; - - /* @@@ The IA-64 ABI says that this structure must be double-word aligned. - Taking that literally does not make much sense generically. Instead we - provide the maximum alignment required by any type for the machine. */ -} __attribute__((__aligned__)); - - -/* The ACTIONS argument to the personality routine is a bitwise OR of one - or more of the following constants. */ -typedef int _Unwind_Action; - -#define _UA_SEARCH_PHASE 1 -#define _UA_CLEANUP_PHASE 2 -#define _UA_HANDLER_FRAME 4 -#define _UA_FORCE_UNWIND 8 -#define _UA_END_OF_STACK 16 - -/* The target can override this macro to define any back-end-specific - attributes required for the lowest-level stack frame. */ -#ifndef LIBGCC2_UNWIND_ATTRIBUTE -#define LIBGCC2_UNWIND_ATTRIBUTE -#endif - -/* This is an opaque type used to refer to a system-specific data - structure used by the system unwinder. This context is created and - destroyed by the system, and passed to the personality routine - during unwinding. */ -struct _Unwind_Context; - -/* Raise an exception, passing along the given exception object. */ -extern _Unwind_Reason_Code LIBGCC2_UNWIND_ATTRIBUTE -_Unwind_RaiseException (struct _Unwind_Exception *); - -/* Raise an exception for forced unwinding. */ - -typedef _Unwind_Reason_Code (*_Unwind_Stop_Fn) - (int, _Unwind_Action, _Unwind_Exception_Class, - struct _Unwind_Exception *, struct _Unwind_Context *, void *); - -extern _Unwind_Reason_Code LIBGCC2_UNWIND_ATTRIBUTE -_Unwind_ForcedUnwind (struct _Unwind_Exception *, _Unwind_Stop_Fn, void *); - -/* Helper to invoke the exception_cleanup routine. */ -extern void _Unwind_DeleteException (struct _Unwind_Exception *); - -/* Resume propagation of an existing exception. This is used after - e.g. executing cleanup code, and not to implement rethrowing. */ -extern void LIBGCC2_UNWIND_ATTRIBUTE -_Unwind_Resume (struct _Unwind_Exception *); - -/* @@@ Resume propagation of a FORCE_UNWIND exception, or to rethrow - a normal exception that was handled. */ -extern _Unwind_Reason_Code LIBGCC2_UNWIND_ATTRIBUTE -_Unwind_Resume_or_Rethrow (struct _Unwind_Exception *); - -/* @@@ Use unwind data to perform a stack backtrace. The trace callback - is called for every stack frame in the call chain, but no cleanup - actions are performed. */ -typedef _Unwind_Reason_Code (*_Unwind_Trace_Fn) - (struct _Unwind_Context *, void *); - -extern _Unwind_Reason_Code LIBGCC2_UNWIND_ATTRIBUTE -_Unwind_Backtrace (_Unwind_Trace_Fn, void *); - -/* These functions are used for communicating information about the unwind - context (i.e. the unwind descriptors and the user register state) between - the unwind library and the personality routine and landing pad. Only - selected registers may be manipulated. */ - -extern _Unwind_Word _Unwind_GetGR (struct _Unwind_Context *, int); -extern void _Unwind_SetGR (struct _Unwind_Context *, int, _Unwind_Word); - -extern _Unwind_Ptr _Unwind_GetIP (struct _Unwind_Context *); -extern _Unwind_Ptr _Unwind_GetIPInfo (struct _Unwind_Context *, int *); -extern void _Unwind_SetIP (struct _Unwind_Context *, _Unwind_Ptr); - -/* @@@ Retrieve the CFA of the given context. */ -extern _Unwind_Word _Unwind_GetCFA (struct _Unwind_Context *); - -extern void *_Unwind_GetLanguageSpecificData (struct _Unwind_Context *); - -extern _Unwind_Ptr _Unwind_GetRegionStart (struct _Unwind_Context *); - - -/* The personality routine is the function in the C++ (or other language) - runtime library which serves as an interface between the system unwind - library and language-specific exception handling semantics. It is - specific to the code fragment described by an unwind info block, and - it is always referenced via the pointer in the unwind info block, and - hence it has no ABI-specified name. - - Note that this implies that two different C++ implementations can - use different names, and have different contents in the language - specific data area. Moreover, that the language specific data - area contains no version info because name of the function invoked - provides more effective versioning by detecting at link time the - lack of code to handle the different data format. */ - -typedef _Unwind_Reason_Code (*_Unwind_Personality_Fn) - (int, _Unwind_Action, _Unwind_Exception_Class, - struct _Unwind_Exception *, struct _Unwind_Context *); - -/* @@@ The following alternate entry points are for setjmp/longjmp - based unwinding. */ - -struct SjLj_Function_Context; -extern void _Unwind_SjLj_Register (struct SjLj_Function_Context *); -extern void _Unwind_SjLj_Unregister (struct SjLj_Function_Context *); - -extern _Unwind_Reason_Code LIBGCC2_UNWIND_ATTRIBUTE -_Unwind_SjLj_RaiseException (struct _Unwind_Exception *); -extern _Unwind_Reason_Code LIBGCC2_UNWIND_ATTRIBUTE -_Unwind_SjLj_ForcedUnwind (struct _Unwind_Exception *, _Unwind_Stop_Fn, void *); -extern void LIBGCC2_UNWIND_ATTRIBUTE -_Unwind_SjLj_Resume (struct _Unwind_Exception *); -extern _Unwind_Reason_Code LIBGCC2_UNWIND_ATTRIBUTE -_Unwind_SjLj_Resume_or_Rethrow (struct _Unwind_Exception *); - -/* @@@ The following provide access to the base addresses for text - and data-relative addressing in the LDSA. In order to stay link - compatible with the standard ABI for IA-64, we inline these. */ - -#ifdef __ia64__ -#include - -static inline _Unwind_Ptr -_Unwind_GetDataRelBase (struct _Unwind_Context *_C) -{ - /* The GP is stored in R1. */ - return _Unwind_GetGR (_C, 1); -} - -static inline _Unwind_Ptr -_Unwind_GetTextRelBase (struct _Unwind_Context *_C __attribute__ ((__unused__))) -{ - abort (); - return 0; -} - -/* @@@ Retrieve the Backing Store Pointer of the given context. */ -extern _Unwind_Word _Unwind_GetBSP (struct _Unwind_Context *); -#else -extern _Unwind_Ptr _Unwind_GetDataRelBase (struct _Unwind_Context *); -extern _Unwind_Ptr _Unwind_GetTextRelBase (struct _Unwind_Context *); -#endif - -/* @@@ Given an address, return the entry point of the function that - contains it. */ -extern void * _Unwind_FindEnclosingFunction (void *pc); - -#ifndef __SIZEOF_LONG__ - #error "__SIZEOF_LONG__ macro not defined" -#endif - -#ifndef __SIZEOF_POINTER__ - #error "__SIZEOF_POINTER__ macro not defined" -#endif - - -/* leb128 type numbers have a potentially unlimited size. - The target of the following definitions of _sleb128_t and _uleb128_t - is to have efficient data types large enough to hold the leb128 type - numbers used in the unwind code. - Mostly these types will simply be defined to long and unsigned long - except when a unsigned long data type on the target machine is not - capable of storing a pointer. */ - -#if __SIZEOF_LONG__ >= __SIZEOF_POINTER__ - typedef long _sleb128_t; - typedef unsigned long _uleb128_t; -#elif __SIZEOF_LONG_LONG__ >= __SIZEOF_POINTER__ - typedef long long _sleb128_t; - typedef unsigned long long _uleb128_t; -#else -# error "What type shall we use for _sleb128_t?" -#endif - -#ifdef __cplusplus -} -#endif - -#ifndef HIDE_EXPORTS -#pragma GCC visibility pop -#endif - -#endif /* unwind.h */ diff --git a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/include/varargs.h b/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/include/varargs.h deleted file mode 100644 index 4b9803e71..000000000 --- a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/include/varargs.h +++ /dev/null @@ -1,7 +0,0 @@ -#ifndef _VARARGS_H -#define _VARARGS_H - -#error "GCC no longer implements ." -#error "Revise your code to use ." - -#endif diff --git a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/install-tools/fix-header b/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/install-tools/fix-header deleted file mode 100755 index 9a786f87f..000000000 Binary files a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/install-tools/fix-header and /dev/null differ diff --git a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/install-tools/fixinc_list b/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/install-tools/fixinc_list deleted file mode 100644 index 092bc2b04..000000000 --- a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/install-tools/fixinc_list +++ /dev/null @@ -1 +0,0 @@ -; diff --git a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/install-tools/fixproto b/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/install-tools/fixproto deleted file mode 100755 index d1a32bd43..000000000 --- a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/install-tools/fixproto +++ /dev/null @@ -1,340 +0,0 @@ -#!/bin/sh -# -# SYNOPSIS -# fixproto TARGET-DIR SOURCE-DIR-ALL SOURCE-DIR-STD -# -# COPYRIGHT -# Copyright (C) 1993, 1994, 1997, 1998, 2002, 2003, 2007 -# Free Software Foundation, Inc. -# This file is part of GCC. -# -# GCC is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 3, or (at your option) -# any later version. -# -# GCC is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with GCC; see the file COPYING3. If not see -# . -# -# DESCRIPTION -# Adjunct script for GCC to populate a directory with ANSI, -# Posix.1, and C++ compatible header files. -# -# Each file found under SOURCE-DIR-ALL is analyzed and "fixed." -# Only standard ANSI/POSIX files found under SOURCE-DIR-STD -# are analyzed and "fixed." -# The SOURCE-DIRs are searched in order; a file found -# under multiple SOURCE-DIRs is only handled for the first one. -# -# STRATEGY -# Each include file is fed through cpp, and the scan-decls program -# parses it, and emits any found function declarations. -# The fix-header program analyzes the scan-decls output, -# together with the original include file, and writes a "fixed" -# include file, if needed. -# -# The comment at the beginning of fix-header.c lists specifically -# what kind of changes are made. -# -# NOTE -# Some file space will be wasted, because the original header -# files are copied. An earlier version just included the original -# by "reference", using GNU cpp's #include_next mechanism. -# This is currently not done, partly because #include_next is -# fragile (susceptible to version incompatibilities, and depends -# and GCC-specific features), and partly for performance reasons. -# -# AUTHORS -# Ron Guilmette (rfg@netcom.com) (original idea and code) -# Per Bothner (bothner@cygnus.com) (major re-write) - -dirname=`echo "$0" | sed 's,^[^/]*$,.,;s,//*[^/]*$,,'` -progname=`echo "$0" | sed 's,.*/,,'` -original_dir=`${PWDCMD-pwd}` -FIX_HEADER=${FIX_HEADER-$original_dir/fix-header} -DEFINES="-D__STDC__=0 -D__cplusplus ${FIXPROTO_DEFINES}" - -if mkdir -p . 2> /dev/null; then - # Great, mkdir accepts -p - mkinstalldirs="mkdir -p" -else - # We expect mkinstalldirs to be passed in the environment. - # If it is not, assume it is in the directory that contains this script. - mkinstalldirs=${mkinstalldirs-"/bin/sh $dirname/mkinstalldirs"} - if $mkinstalldirs . 2> /dev/null; then - : - else - # But, in case of failure, fallback to plain mkdir, and hope it works - mkinstalldirs=mkdir - fi -fi - -if [ `echo $1 | wc -w` = 0 ] ; then - echo $progname\: usage\: $progname target-dir \[ source-dir \.\.\. \] - exit 1 -fi - -std_files="ctype.h dirent.h errno.h curses.h fcntl.h grp.h locale.h math.h pwd.h setjmp.h signal.h stdio.h stdlib.h string.h sys/socket.h sys/stat.h sys/times.h sys/resource.h sys/utsname.h sys/wait.h tar.h termios.h time.h unistd.h utime.h" - -rel_target_dir=$1 -# All files in $src_dir_all (normally same as $rel_target_dir) are -# processed. -src_dir_all=$2 -# In $src_dir_std (normally same as /usr/include), only the -# "standard" ANSI/POSIX files listed in $std_files are processed. -src_dir_std=$3 - -case $rel_target_dir in - /* | [A-Za-z]:[\\/]*) - abs_target_dir=$rel_target_dir - ;; - *) - abs_target_dir=$original_dir/$rel_target_dir - ;; -esac - -# Determine whether this system has symbolic links. -if ln -s X $rel_target_dir/ShouldNotExist 2>/dev/null; then - rm -f $rel_target_dir/ShouldNotExist - LINKS=true -elif ln -s X /tmp/ShouldNotExist 2>/dev/null; then - rm -f /tmp/ShouldNotExist - LINKS=true -else - LINKS=false -fi - -if [ \! -d $abs_target_dir ] ; then - echo $progname\: creating directory $rel_target_dir - $mkinstalldirs $abs_target_dir -fi - -echo $progname\: populating \`$rel_target_dir\' - -include_path="" - -if [ `echo $* | wc -w` != 0 ] ; then - for rel_source_dir in $src_dir_all $src_dir_std; do - case $rel_source_dir in - /* | [A-Za-z]:[\\/]*) - abs_source_dir=$rel_source_dir - ;; - *) - abs_source_dir=$original_dir/$rel_source_dir - ;; - esac - include_path="$include_path -I$abs_source_dir" - done -fi - -done_dirs="" -subdirs_made="" -echo "" >fixproto.list - -for code in ALL STD ; do - - subdirs="." - - case $code in - ALL) - rel_source_dir=$src_dir_all - - dirs="." - levels=2 - while $LINKS && test -n "$dirs" -a $levels -gt 0 - do - levels=`expr $levels - 1` - newdirs= - for d in $dirs ; do - # Find all directories under $d, relative to $d, excluding $d itself. - # Assume directory names ending in CC or containing ++ are - # for C++, so skip those. - subdirs="$subdirs "`cd $rel_source_dir/$d; find . -type d -print | \ - sed -e '/^\.$/d' -e "s|^\./|${d}/|" -e 's|^\./||' \ - -e '/CC$/d' -e '/[+][+]/d'` - links= - links=`cd $rel_source_dir; find $d/. -type l -print | \ - sed -e "s|$d/./|$d/|" -e 's|^\./||'` - for link in $links --dummy-- ; do - test -d $rel_source_dir/$link/. && newdirs="$newdirs $link" - done - done - dirs="$newdirs" - subdirs="$subdirs $newdirs" - done - ;; - STD) - rel_source_dir=$src_dir_std - ;; - esac - - case $rel_source_dir in - /* | [A-Za-z]:[\\/]*) - abs_source_dir=$rel_source_dir - ;; - *) - abs_source_dir=$original_dir/$rel_source_dir - ;; - esac - - if [ \! -d $abs_source_dir ] ; then - echo $progname\: warning\: no such directory\: \`$rel_source_dir\' - continue - fi - - for rel_source_subdir in $subdirs; do - - abs_target_subdir=${abs_target_dir}/${rel_source_subdir} - if [ \! -d $abs_target_subdir ] ; then - if $mkinstalldirs $abs_target_subdir ; then - subdirs_made="$abs_target_subdir $subdirs_made" - fi - fi - # Append "/"; remove initial "./". Hence "." -> "" and "sys" -> "sys/". - rel_source_prefix=`echo $rel_source_subdir | sed -e 's|$|/|' -e 's|^\./||'` - - case $code in - ALL) - # The 'sed' is in case the *.h matches nothing, which yields "*.h" - # which would then get re-globbed in the current directory. Sigh. - rel_source_files=`cd ${abs_source_dir}/${rel_source_subdir}; echo *.h | sed -e 's|[*].h|NONE|'` - ;; - - STD) - files_to_check="$std_files" - rel_source_files="" - - # Also process files #included by the $std_files. - while [ -n "${files_to_check}" ] - do - new_files_to_check="" - for file in $files_to_check ; do - xxfile=`echo $file | sed -e 's|/\([^/\.][^/\.]*\)/\.\./|/|'` - # Create the dir where this file will go when fixed. - xxdir=`echo ./$file | sed -e 's|/[^/]*$||'` - if [ \! -d $abs_target_subdir/$xxdir ] ; then - if $mkinstalldirs $abs_target_subdir/$xxdir ; then - subdirs_made="$abs_target_subdir/$xxdir $subdirs_made" - fi - fi - # Just in case we have edited out a symbolic link - if [ -f $src_dir_std/$file -a -f $src_dir_std/$xxfile ] ; then - file=$xxfile - fi - case " $rel_source_files " in - *" ${file} "*) - # Already seen $file; nothing to do - ;; - *) - if test -f $src_dir_std/$file ; then - rel_dir=`echo $file | sed -n -e 's|^\(.*/\)[^/]*$|\1|p'` - # For #include "foo.h", that might be either "foo.h" - # or "${rel_dir}foo.h (or something bogus). - new_files_to_check="$new_files_to_check "`sed -n \ - -e 's@ @ @g' \ - -e 's@^ *# *include *<\([^>]*\)>.*$@\1@p' -e \ - 's@^ *# *include *\"\([^\"]*\)\".*$@\1 '$rel_dir'\1@p'\ - <$src_dir_std/$file` - rel_source_files="$rel_source_files $file" - fi - ;; - esac - done - files_to_check="$new_files_to_check" - done - rel_source_files="$rel_source_files" - ;; - esac - - for filename in $rel_source_files ; do - rel_source_file=${rel_source_prefix}${filename} - abs_source_file=$abs_source_dir/$rel_source_file - abs_target_file=$abs_target_dir/$rel_source_file - - if test "$filename" = 'NONE' ; then - echo "(No *.h files in $abs_source_dir/$rel_source_subdir)" - # If target file exists, check if was written while processing one - # of the earlier source directories; if so ignore it. - elif test -f $abs_target_file -a -n "$done_dirs" \ - && grep "$rel_source_file" fixproto.list >/dev/null - then true - else - $FIX_HEADER $rel_source_file $abs_source_file $abs_target_file ${DEFINES} $include_path - if test $? != 0 ; then exit 1 ; fi - echo "${rel_source_file}" >>fixproto.list - fi - done - done - done_dirs="$done_dir $rel_source_dir" -done - -# This might be more cleanly moved into the main loop, by adding -# a source directory at the end. FIXME! - -# All the headers we create define size_t and NULL. -for rel_source_file in unistd.h stdlib.h string.h time.h ; do - if grep "$rel_source_file" fixproto.list >/dev/null ; then - : # It exists, we don't need to make it - else - echo Adding missing $rel_source_file - rel_source_ident=`echo $rel_source_file | tr ./ __` - cat >tmp.h < -EOF - # Insert special stuff for particular files here. - case ${rel_source_file} in - time.h) - # If time.h doesn't exist, find out if sys/time.h does. - if test -f $src_dir_std/sys/time.h \ - || grep "sys/time.h" fixproto.list >/dev/null ; then - # It does; include it and hope it has the needed declarations. - # Some versions require sys/types.h. - cat >>tmp.h < -#include -EOF - else - # It doesn't. Make up plausible definitions for time_t, clock_t. - # Forward-declare struct tm. Hope nobody tries to use it. (Odds - # are they won't.) - cat >>tmp.h <>tmp.h </dev/null - -exit 0 diff --git a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/install-tools/gsyslimits.h b/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/install-tools/gsyslimits.h deleted file mode 100644 index a3628025e..000000000 --- a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/install-tools/gsyslimits.h +++ /dev/null @@ -1,8 +0,0 @@ -/* syslimits.h stands for the system's own limits.h file. - If we can use it ok unmodified, then we install this text. - If fixincludes fixes it, then the fixed version is installed - instead of this text. */ - -#define _GCC_NEXT_LIMITS_H /* tell gcc's limits.h to recurse */ -#include_next -#undef _GCC_NEXT_LIMITS_H diff --git a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/install-tools/include/limits.h b/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/install-tools/include/limits.h deleted file mode 100644 index 710cbb528..000000000 --- a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/install-tools/include/limits.h +++ /dev/null @@ -1,103 +0,0 @@ -#ifndef _LIMITS_H___ -#define _LIMITS_H___ - -/* Number of bits in a `char'. */ -#undef CHAR_BIT -#define CHAR_BIT __CHAR_BIT__ - -/* Maximum length of a multibyte character. */ -#ifndef MB_LEN_MAX -#define MB_LEN_MAX 1 -#endif - -/* Minimum and maximum values a `signed char' can hold. */ -#undef SCHAR_MIN -#define SCHAR_MIN (-SCHAR_MAX - 1) -#undef SCHAR_MAX -#define SCHAR_MAX __SCHAR_MAX__ - -/* Maximum value an `unsigned char' can hold. (Minimum is 0). */ -#undef UCHAR_MAX -#if __SCHAR_MAX__ == __INT_MAX__ -# define UCHAR_MAX (SCHAR_MAX * 2U + 1U) -#else -# define UCHAR_MAX (SCHAR_MAX * 2 + 1) -#endif - -/* Minimum and maximum values a `char' can hold. */ -#ifdef __CHAR_UNSIGNED__ -# undef CHAR_MIN -# if __SCHAR_MAX__ == __INT_MAX__ -# define CHAR_MIN 0U -# else -# define CHAR_MIN 0 -# endif -# undef CHAR_MAX -# define CHAR_MAX UCHAR_MAX -#else -# undef CHAR_MIN -# define CHAR_MIN SCHAR_MIN -# undef CHAR_MAX -# define CHAR_MAX SCHAR_MAX -#endif - -/* Minimum and maximum values a `signed short int' can hold. */ -#undef SHRT_MIN -#define SHRT_MIN (-SHRT_MAX - 1) -#undef SHRT_MAX -#define SHRT_MAX __SHRT_MAX__ - -/* Maximum value an `unsigned short int' can hold. (Minimum is 0). */ -#undef USHRT_MAX -#if __SHRT_MAX__ == __INT_MAX__ -# define USHRT_MAX (SHRT_MAX * 2U + 1U) -#else -# define USHRT_MAX (SHRT_MAX * 2 + 1) -#endif - -/* Minimum and maximum values a `signed int' can hold. */ -#undef INT_MIN -#define INT_MIN (-INT_MAX - 1) -#undef INT_MAX -#define INT_MAX __INT_MAX__ - -/* Maximum value an `unsigned int' can hold. (Minimum is 0). */ -#undef UINT_MAX -#define UINT_MAX (INT_MAX * 2U + 1U) - -/* Minimum and maximum values a `signed long int' can hold. - (Same as `int'). */ -#undef LONG_MIN -#define LONG_MIN (-LONG_MAX - 1L) -#undef LONG_MAX -#define LONG_MAX __LONG_MAX__ - -/* Maximum value an `unsigned long int' can hold. (Minimum is 0). */ -#undef ULONG_MAX -#define ULONG_MAX (LONG_MAX * 2UL + 1UL) - -#if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L -/* Minimum and maximum values a `signed long long int' can hold. */ -# undef LLONG_MIN -# define LLONG_MIN (-LLONG_MAX - 1LL) -# undef LLONG_MAX -# define LLONG_MAX __LONG_LONG_MAX__ - -/* Maximum value an `unsigned long long int' can hold. (Minimum is 0). */ -# undef ULLONG_MAX -# define ULLONG_MAX (LLONG_MAX * 2ULL + 1ULL) -#endif - -#if defined (__GNU_LIBRARY__) ? defined (__USE_GNU) : !defined (__STRICT_ANSI__) -/* Minimum and maximum values a `signed long long int' can hold. */ -# undef LONG_LONG_MIN -# define LONG_LONG_MIN (-LONG_LONG_MAX - 1LL) -# undef LONG_LONG_MAX -# define LONG_LONG_MAX __LONG_LONG_MAX__ - -/* Maximum value an `unsigned long long int' can hold. (Minimum is 0). */ -# undef ULONG_LONG_MAX -# define ULONG_LONG_MAX (LONG_LONG_MAX * 2ULL + 1ULL) -#endif - -#endif /* _LIMITS_H___ */ diff --git a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/install-tools/macro_list b/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/install-tools/macro_list deleted file mode 100644 index c3e2b66c0..000000000 --- a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/install-tools/macro_list +++ /dev/null @@ -1 +0,0 @@ -AVR diff --git a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/install-tools/mkheaders.conf b/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/install-tools/mkheaders.conf deleted file mode 100644 index 1d4e54b3f..000000000 --- a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/install-tools/mkheaders.conf +++ /dev/null @@ -1,5 +0,0 @@ -SYSTEM_HEADER_DIR="/usr/lib/avr/sys-include" -OTHER_FIXINCLUDES_DIRS="" -FIXPROTO_DEFINES="" -STMP_FIXPROTO="stmp-fixproto" -STMP_FIXINC="stmp-fixinc" diff --git a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/install-tools/mkinstalldirs b/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/install-tools/mkinstalldirs deleted file mode 100755 index 259dbfcd3..000000000 --- a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/install-tools/mkinstalldirs +++ /dev/null @@ -1,158 +0,0 @@ -#! /bin/sh -# mkinstalldirs --- make directory hierarchy - -scriptversion=2005-06-29.22 - -# Original author: Noah Friedman -# Created: 1993-05-16 -# Public domain. -# -# This file is maintained in Automake, please report -# bugs to or send patches to -# . - -errstatus=0 -dirmode= - -usage="\ -Usage: mkinstalldirs [-h] [--help] [--version] [-m MODE] DIR ... - -Create each directory DIR (with mode MODE, if specified), including all -leading file name components. - -Report bugs to ." - -# process command line arguments -while test $# -gt 0 ; do - case $1 in - -h | --help | --h*) # -h for help - echo "$usage" - exit $? - ;; - -m) # -m PERM arg - shift - test $# -eq 0 && { echo "$usage" 1>&2; exit 1; } - dirmode=$1 - shift - ;; - --version) - echo "$0 $scriptversion" - exit $? - ;; - --) # stop option processing - shift - break - ;; - -*) # unknown option - echo "$usage" 1>&2 - exit 1 - ;; - *) # first non-opt arg - break - ;; - esac -done - -for file -do - if test -d "$file"; then - shift - else - break - fi -done - -case $# in - 0) exit 0 ;; -esac - -# Solaris 8's mkdir -p isn't thread-safe. If you mkdir -p a/b and -# mkdir -p a/c at the same time, both will detect that a is missing, -# one will create a, then the other will try to create a and die with -# a "File exists" error. This is a problem when calling mkinstalldirs -# from a parallel make. We use --version in the probe to restrict -# ourselves to GNU mkdir, which is thread-safe. -case $dirmode in - '') - if mkdir -p --version . >/dev/null 2>&1 && test ! -d ./--version; then - echo "mkdir -p -- $*" - exec mkdir -p -- "$@" - else - # On NextStep and OpenStep, the `mkdir' command does not - # recognize any option. It will interpret all options as - # directories to create, and then abort because `.' already - # exists. - test -d ./-p && rmdir ./-p - test -d ./--version && rmdir ./--version - fi - ;; - *) - if mkdir -m "$dirmode" -p --version . >/dev/null 2>&1 && - test ! -d ./--version; then - echo "mkdir -m $dirmode -p -- $*" - exec mkdir -m "$dirmode" -p -- "$@" - else - # Clean up after NextStep and OpenStep mkdir. - for d in ./-m ./-p ./--version "./$dirmode"; - do - test -d $d && rmdir $d - done - fi - ;; -esac - -for file -do - case $file in - /*) pathcomp=/ ;; - *) pathcomp= ;; - esac - oIFS=$IFS - IFS=/ - set fnord $file - shift - IFS=$oIFS - - for d - do - test "x$d" = x && continue - - pathcomp=$pathcomp$d - case $pathcomp in - -*) pathcomp=./$pathcomp ;; - esac - - if test ! -d "$pathcomp"; then - echo "mkdir $pathcomp" - - mkdir "$pathcomp" || lasterr=$? - - if test ! -d "$pathcomp"; then - errstatus=$lasterr - else - if test ! -z "$dirmode"; then - echo "chmod $dirmode $pathcomp" - lasterr= - chmod "$dirmode" "$pathcomp" || lasterr=$? - - if test ! -z "$lasterr"; then - errstatus=$lasterr - fi - fi - fi - fi - - pathcomp=$pathcomp/ - done -done - -exit $errstatus - -# Local Variables: -# mode: shell-script -# sh-indentation: 2 -# eval: (add-hook 'write-file-hooks 'time-stamp) -# time-stamp-start: "scriptversion=" -# time-stamp-format: "%:y-%02m-%02d.%02H" -# time-stamp-end: "$" -# End: diff --git a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/libgcc.a b/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/libgcc.a deleted file mode 100644 index 949fcfdc3..000000000 Binary files a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/libgcc.a and /dev/null differ diff --git a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/libgcov.a b/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/libgcov.a deleted file mode 100644 index 4a53241fa..000000000 Binary files a/build/linux/work/hardware/tools/avr/lib/gcc/avr/4.3.2/libgcov.a and /dev/null differ diff --git a/build/linux/work/hardware/tools/avr/lib/libgmp.so.3 b/build/linux/work/hardware/tools/avr/lib/libgmp.so.3 deleted file mode 120000 index 29e0242c0..000000000 --- a/build/linux/work/hardware/tools/avr/lib/libgmp.so.3 +++ /dev/null @@ -1 +0,0 @@ -libgmp.so.3.4.4 \ No newline at end of file diff --git a/build/linux/work/hardware/tools/avr/lib/libgmp.so.3.4.4 b/build/linux/work/hardware/tools/avr/lib/libgmp.so.3.4.4 deleted file mode 100644 index b330a676e..000000000 Binary files a/build/linux/work/hardware/tools/avr/lib/libgmp.so.3.4.4 and /dev/null differ diff --git a/build/linux/work/hardware/tools/avr/lib/libmpfr.so.1 b/build/linux/work/hardware/tools/avr/lib/libmpfr.so.1 deleted file mode 120000 index dc32ed0c6..000000000 --- a/build/linux/work/hardware/tools/avr/lib/libmpfr.so.1 +++ /dev/null @@ -1 +0,0 @@ -libmpfr.so.1.2.0 \ No newline at end of file diff --git a/build/linux/work/hardware/tools/avr/lib/libmpfr.so.1.2.0 b/build/linux/work/hardware/tools/avr/lib/libmpfr.so.1.2.0 deleted file mode 100644 index b1a4f2d3b..000000000 Binary files a/build/linux/work/hardware/tools/avr/lib/libmpfr.so.1.2.0 and /dev/null differ diff --git a/build/linux/work/hardware/tools/avr/share/doc/binutils-avr/README.Debian b/build/linux/work/hardware/tools/avr/share/doc/binutils-avr/README.Debian deleted file mode 100644 index 430170fc9..000000000 --- a/build/linux/work/hardware/tools/avr/share/doc/binutils-avr/README.Debian +++ /dev/null @@ -1,8 +0,0 @@ -To make it possible to have different versions of binutils packages -installed for diffrent targets the locale and most common documentation have -been removed from the cross packages. If you want these files aswell you'll -have to install the same version of the native package as of this package. - -For nesC/TinyOS users, the addition of "OPTFLAGS:= -Wa,--allow-dollars" -to their makefiles will allow the use of dollars in function names (with -nesC >=1.1.3). diff --git a/build/linux/work/hardware/tools/avr/share/doc/binutils-avr/changelog.Debian.gz b/build/linux/work/hardware/tools/avr/share/doc/binutils-avr/changelog.Debian.gz deleted file mode 100644 index fa60ec7e0..000000000 Binary files a/build/linux/work/hardware/tools/avr/share/doc/binutils-avr/changelog.Debian.gz and /dev/null differ diff --git a/build/linux/work/hardware/tools/avr/share/doc/binutils-avr/copyright b/build/linux/work/hardware/tools/avr/share/doc/binutils-avr/copyright deleted file mode 100644 index 5af9c9247..000000000 --- a/build/linux/work/hardware/tools/avr/share/doc/binutils-avr/copyright +++ /dev/null @@ -1,11 +0,0 @@ -This is a debian pakcage of the GNU assembler, linker, and binary -utilities compiled for cross develoopment for the avr processor. -It is created from a cvs snapshot downloaded from: - - ftp://ftp.funet.fi/pub/gnu/prep/binutils/ - - -Copyright: GNU General Public License - -On Debian GNU/Linux systems, the complete text of the GNU General -Public License can be found in `/usr/share/common-licenses/GPL'. diff --git a/build/linux/work/hardware/tools/avr/share/doc/gcc-avr/README.Debian b/build/linux/work/hardware/tools/avr/share/doc/gcc-avr/README.Debian deleted file mode 100644 index 3a441795e..000000000 --- a/build/linux/work/hardware/tools/avr/share/doc/gcc-avr/README.Debian +++ /dev/null @@ -1,9 +0,0 @@ -To make it possible to have different versions of gcc packages -installed for diffrent targets the locale and most common documentation have -been removed from the cross packages. If you want these files aswell you'll -have to install the same version of the native package as of this package. - -For nesC/TinyOS users, the addition of "OPTFLAGS:= -Wa,--allow-dollars" -to their makefiles will allow the use of dollars in function names (with -nesC >=1.1.3). Note, this will require binutils-avr >= 2.15-2. - diff --git a/build/linux/work/hardware/tools/avr/share/doc/gcc-avr/changelog.Debian.gz b/build/linux/work/hardware/tools/avr/share/doc/gcc-avr/changelog.Debian.gz deleted file mode 100644 index 565930ece..000000000 Binary files a/build/linux/work/hardware/tools/avr/share/doc/gcc-avr/changelog.Debian.gz and /dev/null differ diff --git a/build/linux/work/hardware/tools/avr/share/doc/gcc-avr/copyright b/build/linux/work/hardware/tools/avr/share/doc/gcc-avr/copyright deleted file mode 100644 index b4f7c807d..000000000 --- a/build/linux/work/hardware/tools/avr/share/doc/gcc-avr/copyright +++ /dev/null @@ -1,9 +0,0 @@ -This is a debian pakcage of the GNU gcc compiler compiled as an avr -crosscompiler. This package was downloaded from: - - ftp://ftp.funet.fi/pub/gnu/prep/gcc/gcc-3.3.2/ - -Copyright: GNU General Public License - -On Debian GNU/Linux systems, the complete text of the GNU General -Public License can be found in `/usr/share/common-licenses/GPL'. diff --git a/build/linux/work/hardware/tools/avrdude b/build/linux/work/hardware/tools/avrdude deleted file mode 100755 index 8d97d8b32..000000000 Binary files a/build/linux/work/hardware/tools/avrdude and /dev/null differ diff --git a/build/linux/work/hardware/tools/avrdude.conf b/build/linux/work/hardware/tools/avrdude.conf deleted file mode 100644 index d3dd109c6..000000000 --- a/build/linux/work/hardware/tools/avrdude.conf +++ /dev/null @@ -1,16919 +0,0 @@ -# $Id: avrdude.conf.in 991 2011-08-26 20:50:32Z joerg_wunsch $ -*- text -*- -# -# AVRDUDE Configuration File -# -# This file contains configuration data used by AVRDUDE which describes -# the programming hardware pinouts and also provides part definitions. -# AVRDUDE's "-C" command line option specifies the location of the -# configuration file. The "-c" option names the programmer configuration -# which must match one of the entry's "id" parameter. The "-p" option -# identifies which part AVRDUDE is going to be programming and must match -# one of the parts' "id" parameter. -# -# Possible entry formats are: -# -# programmer -# id = [, [, ] ...] ; # are quoted strings -# desc = ; # quoted string -# type = par | stk500 | stk500v2 | stk500pp | stk500hvsp | stk500generic | -# stk600 | stk600pp | stk600hvsp | -# avr910 | butterfly | usbasp | -# jtagmki | jtagmkii | jtagmkii_isp | jtagmkii_dw | -# jtagmkII_avr32 | jtagmkii_pdi | -# dragon_dw | dragon_jtag | dragon_isp | dragon_pp | -# dragon_hvsp | dragon_pdi | arduino | wiring; # programmer type -# baudrate = ; # baudrate for avr910-programmer -# vcc = [, ... ] ; # pin number(s) -# reset = ; # pin number -# sck = ; # pin number -# mosi = ; # pin number -# miso = ; # pin number -# errled = ; # pin number -# rdyled = ; # pin number -# pgmled = ; # pin number -# vfyled = ; # pin number -# usbvid = ; # USB VID (Vendor ID) -# usbpid = ; # USB PID (Product ID) -# usbdev = ; # USB interface or other device info -# usbvendor = ; # USB Vendor Name -# usbproduct = ; # USB Product Name -# usbsn = ; # USB Serial Number -# -# To invert a bit, use = ~ , the spaces are important. -# ; -# -# part -# id = ; # quoted string -# desc = ; # quoted string -# has_jtag = ; # part has JTAG i/f -# has_debugwire = ; # part has debugWire i/f -# has_pdi = ; # part has PDI i/f -# has_tpi = ; # part has TPI i/f -# devicecode = ; # deprecated, use stk500_devcode -# stk500_devcode = ; # numeric -# avr910_devcode = ; # numeric -# signature = ; # signature bytes -# chip_erase_delay = ; # micro-seconds -# reset = dedicated | io; -# retry_pulse = reset | sck; -# pgm_enable = ; -# chip_erase = ; -# chip_erase_delay = ; # chip erase delay (us) -# # STK500 parameters (parallel programming IO lines) -# pagel = ; # pin name in hex, i.e., 0xD7 -# bs2 = ; # pin name in hex, i.e., 0xA0 -# serial = ; # can use serial downloading -# parallel = ; # can use par. programming -# # STK500v2 parameters, to be taken from Atmel's XML files -# timeout = ; -# stabdelay = ; -# cmdexedelay = ; -# synchloops = ; -# bytedelay = ; -# pollvalue = ; -# pollindex = ; -# predelay = ; -# postdelay = ; -# pollmethod = ; -# mode = ; -# delay = ; -# blocksize = ; -# readsize = ; -# hvspcmdexedelay = ; -# # STK500v2 HV programming parameters, from XML -# pp_controlstack = , , ...; # PP only -# hvsp_controlstack = , , ...; # HVSP only -# hventerstabdelay = ; -# progmodedelay = ; # PP only -# latchcycles = ; -# togglevtg = ; -# poweroffdelay = ; -# resetdelayms = ; -# resetdelayus = ; -# hvleavestabdelay = ; -# resetdelay = ; -# synchcycles = ; # HVSP only -# chiperasepulsewidth = ; # PP only -# chiperasepolltimeout = ; -# chiperasetime = ; # HVSP only -# programfusepulsewidth = ; # PP only -# programfusepolltimeout = ; -# programlockpulsewidth = ; # PP only -# programlockpolltimeout = ; -# # JTAG ICE mkII parameters, also from XML files -# allowfullpagebitstream = ; -# enablepageprogramming = ; -# idr = ; # IO addr of IDR (OCD) reg. -# rampz = ; # IO addr of RAMPZ reg. -# spmcr = ; # mem addr of SPMC[S]R reg. -# eecr = ; # mem addr of EECR reg. -# # (only when != 0x3c) -# is_avr32 = ; # AVR32 part -# -# memory -# paged = ; # yes / no -# size = ; # bytes -# page_size = ; # bytes -# num_pages = ; # numeric -# min_write_delay = ; # micro-seconds -# max_write_delay = ; # micro-seconds -# readback_p1 = ; # byte value -# readback_p2 = ; # byte value -# pwroff_after_write = ; # yes / no -# read = ; -# write = ; -# read_lo = ; -# read_hi = ; -# write_lo = ; -# write_hi = ; -# loadpage_lo = ; -# loadpage_hi = ; -# writepage = ; -# ; -# ; -# -# If any of the above parameters are not specified, the default value -# of 0 is used for numerics or the empty string ("") for string -# values. If a required parameter is left empty, AVRDUDE will -# complain. -# -# NOTES: -# * 'devicecode' is the device code used by the STK500 (see codes -# listed below) -# * Not all memory types will implement all instructions. -# * AVR Fuse bits and Lock bits are implemented as a type of memory. -# * Example memory types are: -# "flash", "eeprom", "fuse", "lfuse" (low fuse), "hfuse" (high -# fuse), "signature", "calibration", "lock" -# * The memory type specified on the avrdude command line must match -# one of the memory types defined for the specified chip. -# * The pwroff_after_write flag causes avrdude to attempt to -# power the device off and back on after an unsuccessful write to -# the affected memory area if VCC programmer pins are defined. If -# VCC pins are not defined for the programmer, a message -# indicating that the device needs a power-cycle is printed out. -# This flag was added to work around a problem with the -# at90s4433/2333's; see the at90s4433 errata at: -# -# http://www.atmel.com/atmel/acrobat/doc1280.pdf -# -# INSTRUCTION FORMATS -# -# Instruction formats are specified as a comma seperated list of -# string values containing information (bit specifiers) about each -# of the 32 bits of the instruction. Bit specifiers may be one of -# the following formats: -# -# '1' = the bit is always set on input as well as output -# -# '0' = the bit is always clear on input as well as output -# -# 'x' = the bit is ignored on input and output -# -# 'a' = the bit is an address bit, the bit-number matches this bit -# specifier's position within the current instruction byte -# -# 'aN' = the bit is the Nth address bit, bit-number = N, i.e., a12 -# is address bit 12 on input, a0 is address bit 0. -# -# 'i' = the bit is an input data bit -# -# 'o' = the bit is an output data bit -# -# Each instruction must be composed of 32 bit specifiers. The -# instruction specification closely follows the instruction data -# provided in Atmel's data sheets for their parts. -# -# See below for some examples. -# -# -# The following are STK500 part device codes to use for the -# "devicecode" field of the part. These came from Atmel's software -# section avr061.zip which accompanies the application note -# AVR061 available from: -# -# http://www.atmel.com/atmel/acrobat/doc2525.pdf -# - -#define ATTINY10 0x10 /* the _old_ one that never existed! */ -#define ATTINY11 0x11 -#define ATTINY12 0x12 -#define ATTINY15 0x13 -#define ATTINY13 0x14 - -#define ATTINY22 0x20 -#define ATTINY26 0x21 -#define ATTINY28 0x22 -#define ATTINY2313 0x23 - -#define AT90S1200 0x33 - -#define AT90S2313 0x40 -#define AT90S2323 0x41 -#define AT90S2333 0x42 -#define AT90S2343 0x43 - -#define AT90S4414 0x50 -#define AT90S4433 0x51 -#define AT90S4434 0x52 -#define ATMEGA48 0x59 - -#define AT90S8515 0x60 -#define AT90S8535 0x61 -#define AT90C8534 0x62 -#define ATMEGA8515 0x63 -#define ATMEGA8535 0x64 - -#define ATMEGA8 0x70 -#define ATMEGA88 0x73 -#define ATMEGA168 0x86 - -#define ATMEGA161 0x80 -#define ATMEGA163 0x81 -#define ATMEGA16 0x82 -#define ATMEGA162 0x83 -#define ATMEGA169 0x84 - -#define ATMEGA323 0x90 -#define ATMEGA32 0x91 - -#define ATMEGA64 0xA0 - -#define ATMEGA103 0xB1 -#define ATMEGA128 0xB2 -#define AT90CAN128 0xB3 -#define AT90CAN64 0xB3 -#define AT90CAN32 0xB3 - -#define AT86RF401 0xD0 - -#define AT89START 0xE0 -#define AT89S51 0xE0 -#define AT89S52 0xE1 - -# The following table lists the devices in the original AVR910 -# appnote: -# |Device |Signature | Code | -# +-------+----------+------+ -# |tiny12 | 1E 90 05 | 0x55 | -# |tiny15 | 1E 90 06 | 0x56 | -# | | | | -# | S1200 | 1E 90 01 | 0x13 | -# | | | | -# | S2313 | 1E 91 01 | 0x20 | -# | S2323 | 1E 91 02 | 0x48 | -# | S2333 | 1E 91 05 | 0x34 | -# | S2343 | 1E 91 03 | 0x4C | -# | | | | -# | S4414 | 1E 92 01 | 0x28 | -# | S4433 | 1E 92 03 | 0x30 | -# | S4434 | 1E 92 02 | 0x6C | -# | | | | -# | S8515 | 1E 93 01 | 0x38 | -# | S8535 | 1E 93 03 | 0x68 | -# | | | | -# |mega32 | 1E 95 01 | 0x72 | -# |mega83 | 1E 93 05 | 0x65 | -# |mega103| 1E 97 01 | 0x41 | -# |mega161| 1E 94 01 | 0x60 | -# |mega163| 1E 94 02 | 0x64 | - -# Appnote AVR109 also has a table of AVR910 device codes, which -# lists: -# dev avr910 signature -# ATmega8 0x77 0x1E 0x93 0x07 -# ATmega8515 0x3B 0x1E 0x93 0x06 -# ATmega8535 0x6A 0x1E 0x93 0x08 -# ATmega16 0x75 0x1E 0x94 0x03 -# ATmega162 0x63 0x1E 0x94 0x04 -# ATmega163 0x66 0x1E 0x94 0x02 -# ATmega169 0x79 0x1E 0x94 0x05 -# ATmega32 0x7F 0x1E 0x95 0x02 -# ATmega323 0x73 0x1E 0x95 0x01 -# ATmega64 0x46 0x1E 0x96 0x02 -# ATmega128 0x44 0x1E 0x97 0x02 -# -# These codes refer to "BOOT" device codes which are apparently -# different than standard device codes, for whatever reasons -# (often one above the standard code). - -# There are several extended versions of AVR910 implementations around -# in the Internet. These add the following codes (only devices that -# actually exist are listed): - -# ATmega8515 0x3A -# ATmega128 0x43 -# ATmega64 0x45 -# ATtiny26 0x5E -# ATmega8535 0x69 -# ATmega32 0x72 -# ATmega16 0x74 -# ATmega8 0x76 -# ATmega169 0x78 - -# -# Overall avrdude defaults -# -default_parallel = "/dev/parport0"; -default_serial = "/dev/ttyS0"; -# default_bitclock = 2.5 - - -# -# PROGRAMMER DEFINITIONS -# - -# http://wiring.org.co/ -# Basically STK500v2 protocol, with some glue to trigger the -# bootloader. -programmer - id = "wiring"; - desc = "Wiring"; - type = wiring; -; - -programmer - id = "arduino"; - desc = "Arduino"; - type = arduino; -; -# this will interface with the chips on these programmers: -# -# http://real.kiev.ua/old/avreal/en/adapters -# http://www.amontec.com/jtagkey.shtml, jtagkey-tiny.shtml -# http://www.olimex.com/dev/arm-usb-ocd.html, arm-usb-tiny.html -# http://www.ethernut.de/en/hardware/turtelizer/index.html -# http://elk.informatik.fh-augsburg.de/hhweb/doc/openocd/usbjtag/usbjtag.html -# http://dangerousprototypes.com/docs/FT2232_breakout_board -# http://www.ftdichip.com/Products/Modules/DLPModules.htm,DLP-2232*,DLP-USB1232H -# http://flashrom.org/FT2232SPI_Programmer -# -# The drivers will look for a specific device and use the first one found. -# If you have mulitple devices, then look for unique information (like SN) -# And fill that in here. - -programmer - id = "avrftdi"; - desc = "FT2232D based generic programmer"; - type = avrftdi; - usbvid = 0x0403; - usbpid = 0x6010; - usbvendor = ""; - usbproduct = ""; - usbdev = "A"; - usbsn = ""; -#ISP-signals - lower ACBUS-Nibble (default) - reset = 4; - sck = 1; - mosi = 2; - miso = 3; -#LED SIGNALs - higher ACBUS-Nibble -# errled = 5; -# rdyled = 6; -# pgmled = 7; -# vfyled = 8; -#Buffer Signal - ADBUS - Nibble -# buff = 9; -; -# This is an implementation of the above with a buffer IC (74AC244) and -# 4 LEDs directly attached, active low. The buff and reset pins are -# understood (by avrdude) to be active low, so there's no -# need to invert the bits. -programmer - id = "2232HIO"; - desc = "FT2232H based generic programmer"; - type = avrftdi; - usbvid = 0x0403; -# Note: This PID is reserved for generic H devices and -# should be programmed into the EEPROM -# usbpid = 0x8A48; - usbpid = 0x6010; - usbdev = "A"; - usbvendor = ""; - usbproduct = ""; - usbsn = ""; -#ISP-signals - reset = 4; - sck = 1; - mosi = 2; - miso = 3; - buff = 5; -#LED SIGNALs - errled = ~ 12; - rdyled = ~ 15; - pgmled = ~ 14; - vfyled = ~ 13; -; - -programmer - id = "jtagkey"; - desc = "Amontec JTAGKey, JTAGKey-Tiny and JTAGKey2"; - type = avrftdi; - usbvid = 0x0403; -# Note: This PID is used in all JTAGKey variants - usbpid = 0xCFF8; - usbdev = "A"; - usbvendor = ""; - usbproduct = ""; - usbsn = ""; -#ISP-signals => 20 - Pin connector on JTAGKey - reset = 4; # TMS 7 violet - sck = 1; # TCK 9 white - mosi = 2; # TDI 5 green - miso = 3; # TDO 13 orange - buff = 5; -# VTG VREF 1 brown with red tip -# GND GND 20 black -# The colors are on the 20 pin breakout cable -# from Amontec -; - -programmer - id = "avrisp"; - desc = "Atmel AVR ISP"; - type = stk500; -; - -programmer - id = "avrispv2"; - desc = "Atmel AVR ISP V2"; - type = stk500v2; -; - -programmer - id = "avrispmkII"; - desc = "Atmel AVR ISP mkII"; - type = stk500v2; -; - -programmer - id = "avrisp2"; - desc = "Atmel AVR ISP mkII"; - type = stk500v2; -; - -programmer - id = "buspirate"; - desc = "The Bus Pirate"; - type = buspirate; -; - -# This is supposed to be the "default" STK500 entry. -# Attempts to select the correct firmware version -# by probing for it. Better use one of the entries -# below instead. -programmer - id = "stk500"; - desc = "Atmel STK500"; - type = stk500generic; -; - -programmer - id = "stk500v1"; - desc = "Atmel STK500 Version 1.x firmware"; - type = stk500; -; - -programmer - id = "mib510"; - desc = "Crossbow MIB510 programming board"; - type = stk500; -; - -programmer - id = "stk500v2"; - desc = "Atmel STK500 Version 2.x firmware"; - type = stk500v2; -; - -programmer - id = "stk500pp"; - desc = "Atmel STK500 V2 in parallel programming mode"; - type = stk500pp; -; - -programmer - id = "stk500hvsp"; - desc = "Atmel STK500 V2 in high-voltage serial programming mode"; - type = stk500hvsp; -; - -programmer - id = "stk600"; - desc = "Atmel STK600"; - type = stk600; -; - -programmer - id = "stk600pp"; - desc = "Atmel STK600 in parallel programming mode"; - type = stk600pp; -; - -programmer - id = "stk600hvsp"; - desc = "Atmel STK600 in high-voltage serial programming mode"; - type = stk600hvsp; -; - -programmer - id = "avr910"; - desc = "Atmel Low Cost Serial Programmer"; - type = avr910; -; - -programmer - id = "usbasp"; - desc = "USBasp, http://www.fischl.de/usbasp/"; - type = usbasp; -; - -programmer - id = "usbtiny"; - desc = "USBtiny simple USB programmer, http://www.ladyada.net/make/usbtinyisp/"; - type = usbtiny; -; - -programmer - id = "butterfly"; - desc = "Atmel Butterfly Development Board"; - type = butterfly; -; - -programmer - id = "avr109"; - desc = "Atmel AppNote AVR109 Boot Loader"; - type = butterfly; -; - -programmer - id = "avr911"; - desc = "Atmel AppNote AVR911 AVROSP"; - type = butterfly; -; - -# suggested in http://forum.mikrokopter.de/topic-post48317.html -programmer - id = "mkbutterfly"; - desc = "Mikrokopter.de Butterfly"; - type = butterfly_mk; -; - -programmer - id = "butterfly_mk"; - desc = "Mikrokopter.de Butterfly"; - type = butterfly_mk; -; - -programmer - id = "jtagmkI"; - desc = "Atmel JTAG ICE (mkI)"; - baudrate = 115200; # default is 115200 - type = jtagmki; -; - -# easier to type -programmer - id = "jtag1"; - desc = "Atmel JTAG ICE (mkI)"; - baudrate = 115200; # default is 115200 - type = jtagmki; -; - -# easier to type -programmer - id = "jtag1slow"; - desc = "Atmel JTAG ICE (mkI)"; - baudrate = 19200; - type = jtagmki; -; - -programmer - id = "jtagmkII"; - desc = "Atmel JTAG ICE mkII"; - baudrate = 19200; # default is 19200 - type = jtagmkii; -; - -# easier to type -programmer - id = "jtag2slow"; - desc = "Atmel JTAG ICE mkII"; - baudrate = 19200; # default is 19200 - type = jtagmkii; -; - -# JTAG ICE mkII @ 115200 Bd -programmer - id = "jtag2fast"; - desc = "Atmel JTAG ICE mkII"; - baudrate = 115200; - type = jtagmkii; -; - -# make the fast one the default, people will love that -programmer - id = "jtag2"; - desc = "Atmel JTAG ICE mkII"; - baudrate = 115200; - type = jtagmkii; -; - -# JTAG ICE mkII in ISP mode -programmer - id = "jtag2isp"; - desc = "Atmel JTAG ICE mkII in ISP mode"; - baudrate = 115200; - type = jtagmkii_isp; -; - -# JTAG ICE mkII in debugWire mode -programmer - id = "jtag2dw"; - desc = "Atmel JTAG ICE mkII in debugWire mode"; - baudrate = 115200; - type = jtagmkii_dw; -; - -# JTAG ICE mkII in AVR32 mode -programmer - id = "jtagmkII_avr32"; - desc = "Atmel JTAG ICE mkII im AVR32 mode"; - baudrate = 115200; - type = jtagmkii_avr32; -; - -# JTAG ICE mkII in AVR32 mode -programmer - id = "jtag2avr32"; - desc = "Atmel JTAG ICE mkII im AVR32 mode"; - baudrate = 115200; - type = jtagmkii_avr32; -; - -# JTAG ICE mkII in PDI mode -programmer - id = "jtag2pdi"; - desc = "Atmel JTAG ICE mkII PDI mode"; - baudrate = 115200; - type = jtagmkii_pdi; -; - -# AVR Dragon in JTAG mode -programmer - id = "dragon_jtag"; - desc = "Atmel AVR Dragon in JTAG mode"; - baudrate = 115200; - type = dragon_jtag; -; - -# AVR Dragon in ISP mode -programmer - id = "dragon_isp"; - desc = "Atmel AVR Dragon in ISP mode"; - baudrate = 115200; - type = dragon_isp; -; - -# AVR Dragon in PP mode -programmer - id = "dragon_pp"; - desc = "Atmel AVR Dragon in PP mode"; - baudrate = 115200; - type = dragon_pp; -; - -# AVR Dragon in HVSP mode -programmer - id = "dragon_hvsp"; - desc = "Atmel AVR Dragon in HVSP mode"; - baudrate = 115200; - type = dragon_hvsp; -; - -# AVR Dragon in debugWire mode -programmer - id = "dragon_dw"; - desc = "Atmel AVR Dragon in debugWire mode"; - baudrate = 115200; - type = dragon_dw; -; - -# AVR Dragon in PDI mode -programmer - id = "dragon_pdi"; - desc = "Atmel AVR Dragon in PDI mode"; - baudrate = 115200; - type = dragon_pdi; -; - -programmer - id = "pavr"; - desc = "Jason Kyle's pAVR Serial Programmer"; - type = avr910; -; - -# Parallel port programmers. - -programmer - id = "bsd"; - desc = "Brian Dean's Programmer, http://www.bsdhome.com/avrdude/"; - type = par; - vcc = 2, 3, 4, 5; - reset = 7; - sck = 8; - mosi = 9; - miso = 10; -; - -programmer - id = "stk200"; - desc = "STK200"; - type = par; - buff = 4, 5; - sck = 6; - mosi = 7; - reset = 9; - miso = 10; -; - -# The programming dongle used by the popular Ponyprog -# utility. It is almost similar to the STK200 one, -# except that there is a LED indicating that the -# programming is currently in progress. - -programmer - id = "pony-stk200"; - desc = "Pony Prog STK200"; - type = par; - buff = 4, 5; - sck = 6; - mosi = 7; - reset = 9; - miso = 10; - pgmled = 8; -; - -programmer - id = "dt006"; - desc = "Dontronics DT006"; - type = par; - reset = 4; - sck = 5; - mosi = 2; - miso = 11; -; - -programmer - id = "bascom"; - desc = "Bascom SAMPLE programming cable"; - type = par; - reset = 4; - sck = 5; - mosi = 2; - miso = 11; -; - -programmer - id = "alf"; - desc = "Nightshade ALF-PgmAVR, http://nightshade.homeip.net/"; - type = par; - vcc = 2, 3, 4, 5; - buff = 6; - reset = 7; - sck = 8; - mosi = 9; - miso = 10; - errled = 1; - rdyled = 14; - pgmled = 16; - vfyled = 17; -; - -programmer - id = "sp12"; - desc = "Steve Bolt's Programmer"; - type = par; - vcc = 4,5,6,7,8; - reset = 3; - sck = 2; - mosi = 9; - miso = 11; -; - -programmer - id = "picoweb"; - desc = "Picoweb Programming Cable, http://www.picoweb.net/"; - type = par; - reset = 2; - sck = 3; - mosi = 4; - miso = 13; -; - -programmer - id = "abcmini"; - desc = "ABCmini Board, aka Dick Smith HOTCHIP"; - type = par; - reset = 4; - sck = 3; - mosi = 2; - miso = 10; -; - -programmer - id = "futurlec"; - desc = "Futurlec.com programming cable."; - type = par; - reset = 3; - sck = 2; - mosi = 1; - miso = 10; -; - - -# From the contributor of the "xil" jtag cable: -# The "vcc" definition isn't really vcc (the cable gets its power from -# the programming circuit) but is necessary to switch one of the -# buffer lines (trying to add it to the "buff" lines doesn't work in -# avrdude versions before 5.5j). -# With this, TMS connects to RESET, TDI to MOSI, TDO to MISO and TCK -# to SCK (plus vcc/gnd of course) -programmer - id = "xil"; - desc = "Xilinx JTAG cable"; - type = par; - mosi = 2; - sck = 3; - reset = 4; - buff = 5; - miso = 13; - vcc = 6; -; - - -programmer - id = "dapa"; - desc = "Direct AVR Parallel Access cable"; - type = par; - vcc = 3; - reset = 16; - sck = 1; - mosi = 2; - miso = 11; -; - -programmer - id = "atisp"; - desc = "AT-ISP V1.1 programming cable for AVR-SDK1 from micro-research.co.th"; - type = par; - reset = ~6; - sck = ~8; - mosi = ~7; - miso = ~10; -; - -programmer - id = "ere-isp-avr"; - desc = "ERE ISP-AVR "; - type = par; - reset = ~4; - sck = 3; - mosi = 2; - miso = 10; -; - -programmer - id = "blaster"; - desc = "Altera ByteBlaster"; - type = par; - sck = 2; - miso = 11; - reset = 3; - mosi = 8; - buff = 14; -; - -# It is almost same as pony-stk200, except vcc on pin 5 to auto -# disconnect port (download on http://electropol.free.fr) -programmer - id = "frank-stk200"; - desc = "Frank STK200"; - type = par; - vcc = 5; - sck = 6; - mosi = 7; - reset = 9; - miso = 10; - pgmled = 8; -; - -# The AT98ISP Cable is a simple parallel dongle for AT89 family. -# http://www.atmel.com/dyn/products/tools_card.asp?tool_id=2877 -programmer -id = "89isp"; -desc = "Atmel at89isp cable"; -type = par; -reset = 17; -sck = 1; -mosi = 2; -miso = 10; -; - - -# -# some ultra cheap programmers use bitbanging on the -# serialport. -# -# PC - DB9 - Pins for RS232: -# -# GND 5 -- |O -# | O| <- 9 RI -# DTR 4 <- |O | -# | O| <- 8 CTS -# TXD 3 <- |O | -# | O| -> 7 RTS -# RXD 2 -> |O | -# | O| <- 6 DSR -# DCD 1 -> |O -# -# Using RXD is currently not supported. -# Using RI is not supported under Win32 but is supported under Posix. - -# serial ponyprog design (dasa2 in uisp) -# reset=!txd sck=rts mosi=dtr miso=cts - -programmer - id = "ponyser"; - desc = "design ponyprog serial, reset=!txd sck=rts mosi=dtr miso=cts"; - type = serbb; - reset = ~3; - sck = 7; - mosi = 4; - miso = 8; -; - -# Same as above, different name -# reset=!txd sck=rts mosi=dtr miso=cts - -programmer - id = "siprog"; - desc = "Lancos SI-Prog "; - type = serbb; - reset = ~3; - sck = 7; - mosi = 4; - miso = 8; -; - -# unknown (dasa in uisp) -# reset=rts sck=dtr mosi=txd miso=cts - -programmer - id = "dasa"; - desc = "serial port banging, reset=rts sck=dtr mosi=txd miso=cts"; - type = serbb; - reset = 7; - sck = 4; - mosi = 3; - miso = 8; -; - -# unknown (dasa3 in uisp) -# reset=!dtr sck=rts mosi=txd miso=cts - -programmer - id = "dasa3"; - desc = "serial port banging, reset=!dtr sck=rts mosi=txd miso=cts"; - type = serbb; - reset = ~4; - sck = 7; - mosi = 3; - miso = 8; -; - -# C2N232i (jumper configuration "auto") -# reset=dtr sck=!rts mosi=!txd miso=!cts - -programmer - id = "c2n232i"; - desc = "serial port banging, reset=dtr sck=!rts mosi=!txd miso=!cts"; - type = serbb; - reset = 4; - sck = ~7; - mosi = ~3; - miso = ~8; -; - -# -# PART DEFINITIONS -# - -#------------------------------------------------------------ -# ATtiny11 -#------------------------------------------------------------ - -# This is an HVSP-only device. - -part - id = "t11"; - desc = "ATtiny11"; - stk500_devcode = 0x11; - signature = 0x1e 0x90 0x04; - chip_erase_delay = 20000; - - timeout = 200; - hvsp_controlstack = - 0x4C, 0x0C, 0x1C, 0x2C, 0x3C, 0x64, 0x74, 0x00, - 0x68, 0x78, 0x68, 0x68, 0x00, 0x00, 0x68, 0x78, - 0x78, 0x00, 0x6D, 0x0C, 0x80, 0x40, 0x20, 0x10, - 0x11, 0x08, 0x04, 0x02, 0x03, 0x08, 0x04, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - hvspcmdexedelay = 0; - synchcycles = 6; - latchcycles = 1; - togglevtg = 1; - poweroffdelay = 25; - resetdelayms = 0; - resetdelayus = 50; - hvleavestabdelay = 100; - resetdelay = 25; - chiperasepolltimeout = 40; - chiperasetime = 0; - programfusepolltimeout = 25; - programlockpolltimeout = 25; - - memory "eeprom" - size = 64; - blocksize = 64; - readsize = 256; - delay = 5; - ; - - memory "flash" - size = 1024; - blocksize = 128; - readsize = 256; - delay = 3; - ; - - memory "signature" - size = 3; - ; - - memory "lock" - size = 1; - ; - - memory "calibration" - size = 1; - ; - - memory "fuse" - size = 1; - ; -; - -#------------------------------------------------------------ -# ATtiny12 -#------------------------------------------------------------ - -part - id = "t12"; - desc = "ATtiny12"; - stk500_devcode = 0x12; - avr910_devcode = 0x55; - signature = 0x1e 0x90 0x05; - chip_erase_delay = 20000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - hvsp_controlstack = - 0x4C, 0x0C, 0x1C, 0x2C, 0x3C, 0x64, 0x74, 0x00, - 0x68, 0x78, 0x68, 0x68, 0x00, 0x00, 0x68, 0x78, - 0x78, 0x00, 0x6D, 0x0C, 0x80, 0x40, 0x20, 0x10, - 0x11, 0x08, 0x04, 0x02, 0x03, 0x08, 0x04, 0x00; - hventerstabdelay = 100; - hvspcmdexedelay = 0; - synchcycles = 6; - latchcycles = 1; - togglevtg = 1; - poweroffdelay = 25; - resetdelayms = 0; - resetdelayus = 50; - hvleavestabdelay = 100; - resetdelay = 25; - chiperasepolltimeout = 40; - chiperasetime = 0; - programfusepolltimeout = 25; - programlockpolltimeout = 25; - - memory "eeprom" - size = 64; - min_write_delay = 9000; - max_write_delay = 20000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = "1 0 1 0 0 0 0 0 x x x x x x x x", - "x x a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = "1 1 0 0 0 0 0 0 x x x x x x x x", - "x x a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - mode = 0x04; - delay = 8; - blocksize = 64; - readsize = 256; - ; - - memory "flash" - size = 1024; - min_write_delay = 4500; - max_write_delay = 20000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " x x x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x x x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - write_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x04; - delay = 5; - blocksize = 128; - readsize = 256; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "0 0 0 0 0 0 a1 a0 o o o o o o o o"; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 x x x x x x x x", - "x x x x x x x x x x x x x o o x"; - - write = "1 0 1 0 1 1 0 0 1 1 1 1 1 i i 1", - "x x x x x x x x x x x x x x x x"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 x x x x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - - memory "fuse" - size = 1; - read = "0 1 0 1 0 0 0 0 x x x x x x x x", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 x x x x x", - "x x x x x x x x i i i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; -; - -#------------------------------------------------------------ -# ATtiny13 -#------------------------------------------------------------ - -part - id = "t13"; - desc = "ATtiny13"; - has_debugwire = yes; - flash_instr = 0xB4, 0x0E, 0x1E; - eeprom_instr = 0xBB, 0xFE, 0xBB, 0xEE, 0xBB, 0xCC, 0xB2, 0x0D, - 0xBC, 0x0E, 0xB4, 0x0E, 0xBA, 0x0D, 0xBB, 0xBC, - 0x99, 0xE1, 0xBB, 0xAC; - stk500_devcode = 0x14; - signature = 0x1e 0x90 0x07; - chip_erase_delay = 4000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - hvsp_controlstack = - 0x4C, 0x0C, 0x1C, 0x2C, 0x3C, 0x64, 0x74, 0x66, - 0x68, 0x78, 0x68, 0x68, 0x7A, 0x6A, 0x68, 0x78, - 0x78, 0x7D, 0x6D, 0x0C, 0x80, 0x40, 0x20, 0x10, - 0x11, 0x08, 0x04, 0x02, 0x03, 0x08, 0x04, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - hvspcmdexedelay = 0; - synchcycles = 6; - latchcycles = 1; - togglevtg = 1; - poweroffdelay = 25; - resetdelayms = 0; - resetdelayus = 90; - hvleavestabdelay = 100; - resetdelay = 25; - chiperasepolltimeout = 40; - chiperasetime = 0; - programfusepolltimeout = 25; - programlockpolltimeout = 25; - - memory "eeprom" - size = 64; - page_size = 4; - min_write_delay = 4000; - max_write_delay = 4000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = "1 0 1 0 0 0 0 0 0 0 0 x x x x x", - "x x a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = "1 1 0 0 0 0 0 0 0 0 0 x x x x x", - "x x a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x x x x", - " x x a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 5; - blocksize = 4; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 1024; - page_size = 32; - num_pages = 32; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 0 0 0 0 0 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 0 0 0 0 0 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " x x x x a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 x x x x x", - " x x x x a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 0 0 0 0 0 a8", - " a7 a6 a5 a4 x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 32; - readsize = 256; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - - memory "lock" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "calibration" - size = 2; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 a0 o o o o o o o o"; - ; - - memory "lfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "hfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - -; - - -#------------------------------------------------------------ -# ATtiny15 -#------------------------------------------------------------ - -part - id = "t15"; - desc = "ATtiny15"; - stk500_devcode = 0x13; - avr910_devcode = 0x56; - signature = 0x1e 0x90 0x06; - chip_erase_delay = 8200; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - hvsp_controlstack = - 0x4C, 0x0C, 0x1C, 0x2C, 0x3C, 0x64, 0x74, 0x00, - 0x68, 0x78, 0x68, 0x68, 0x00, 0x00, 0x68, 0x78, - 0x78, 0x00, 0x6D, 0x0C, 0x80, 0x40, 0x20, 0x10, - 0x11, 0x08, 0x04, 0x02, 0x03, 0x08, 0x04, 0x00; - hventerstabdelay = 100; - hvspcmdexedelay = 5; - synchcycles = 6; - latchcycles = 16; - togglevtg = 1; - poweroffdelay = 25; - resetdelayms = 0; - resetdelayus = 50; - hvleavestabdelay = 100; - resetdelay = 25; - chiperasepolltimeout = 40; - chiperasetime = 0; - programfusepolltimeout = 25; - programlockpolltimeout = 25; - - memory "eeprom" - size = 64; - min_write_delay = 8200; - max_write_delay = 8200; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = "1 0 1 0 0 0 0 0 x x x x x x x x", - "x x a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = "1 1 0 0 0 0 0 0 x x x x x x x x", - "x x a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - mode = 0x04; - delay = 10; - blocksize = 64; - readsize = 256; - ; - - memory "flash" - size = 1024; - min_write_delay = 4100; - max_write_delay = 4100; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " x x x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x x x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - write_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x04; - delay = 5; - blocksize = 128; - readsize = 256; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "0 0 0 0 0 0 a1 a0 o o o o o o o o"; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 x x x x x x x x", - "x x x x x x x x x x x x x o o x"; - - write = "1 0 1 0 1 1 0 0 1 1 1 1 1 i i 1", - "x x x x x x x x x x x x x x x x"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 x x x x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - - memory "fuse" - size = 1; - read = "0 1 0 1 0 0 0 0 x x x x x x x x", - "x x x x x x x x o o o o x x o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 x x x x x", - "x x x x x x x x i i i i 1 1 i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; -; - -#------------------------------------------------------------ -# AT90s1200 -#------------------------------------------------------------ - -part - id = "1200"; - desc = "AT90S1200"; - stk500_devcode = 0x33; - avr910_devcode = 0x13; - signature = 0x1e 0x90 0x01; - pagel = 0xd7; - bs2 = 0xa0; - chip_erase_delay = 20000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 1; - bytedelay = 0; - pollindex = 0; - pollvalue = 0xFF; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 0; - togglevtg = 0; - poweroffdelay = 0; - resetdelayms = 0; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 15; - chiperasepolltimeout = 0; - programfusepulsewidth = 2; - programfusepolltimeout = 0; - programlockpulsewidth = 0; - programlockpolltimeout = 1; - - memory "eeprom" - size = 64; - min_write_delay = 4000; - max_write_delay = 9000; - readback_p1 = 0x00; - readback_p2 = 0xff; - read = "1 0 1 0 0 0 0 0 x x x x x x x x", - "x x a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = "1 1 0 0 0 0 0 0 x x x x x x x x", - "x x a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - mode = 0x04; - delay = 20; - blocksize = 32; - readsize = 256; - ; - memory "flash" - size = 1024; - min_write_delay = 4000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " x x x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x x x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - write_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x02; - delay = 15; - blocksize = 128; - readsize = 256; - ; - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - memory "fuse" - size = 1; - ; - memory "lock" - size = 1; - min_write_delay = 9000; - max_write_delay = 20000; - write = "1 0 1 0 1 1 0 0 1 1 1 1 1 i i 1", - "x x x x x x x x x x x x x x x x"; - ; - ; - -#------------------------------------------------------------ -# AT90s4414 -#------------------------------------------------------------ - -part - id = "4414"; - desc = "AT90S4414"; - stk500_devcode = 0x50; - avr910_devcode = 0x28; - signature = 0x1e 0x92 0x01; - chip_erase_delay = 20000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 0; - togglevtg = 0; - poweroffdelay = 0; - resetdelayms = 0; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 15; - chiperasepolltimeout = 0; - programfusepulsewidth = 2; - programfusepolltimeout = 0; - programlockpulsewidth = 0; - programlockpolltimeout = 1; - - memory "eeprom" - size = 256; - min_write_delay = 9000; - max_write_delay = 20000; - readback_p1 = 0x80; - readback_p2 = 0x7f; - read = " 1 0 1 0 0 0 0 0 x x x x x x x a8", - "a7 a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0 x x x x x x x a8", - "a7 a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - mode = 0x04; - delay = 12; - blocksize = 64; - readsize = 256; - ; - memory "flash" - size = 4096; - min_write_delay = 9000; - max_write_delay = 20000; - readback_p1 = 0x7f; - readback_p2 = 0x7f; - read_lo = " 0 0 1 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write_lo = " 0 1 0 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - write_hi = " 0 1 0 0 1 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x04; - delay = 12; - blocksize = 64; - readsize = 256; - ; - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - memory "fuse" - size = 1; - ; - memory "lock" - size = 1; - write = "1 0 1 0 1 1 0 0 1 1 1 1 1 i i 1", - "x x x x x x x x x x x x x x x x"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - ; - -#------------------------------------------------------------ -# AT90s2313 -#------------------------------------------------------------ - -part - id = "2313"; - desc = "AT90S2313"; - stk500_devcode = 0x40; - avr910_devcode = 0x20; - signature = 0x1e 0x91 0x01; - chip_erase_delay = 20000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 0; - togglevtg = 0; - poweroffdelay = 0; - resetdelayms = 0; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 15; - chiperasepolltimeout = 0; - programfusepulsewidth = 2; - programfusepolltimeout = 0; - programlockpulsewidth = 0; - programlockpolltimeout = 1; - - memory "eeprom" - size = 128; - min_write_delay = 4000; - max_write_delay = 9000; - readback_p1 = 0x80; - readback_p2 = 0x7f; - read = "1 0 1 0 0 0 0 0 x x x x x x x x", - "x a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = "1 1 0 0 0 0 0 0 x x x x x x x x", - "x a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - mode = 0x04; - delay = 12; - blocksize = 64; - readsize = 256; - ; - memory "flash" - size = 2048; - min_write_delay = 4000; - max_write_delay = 9000; - readback_p1 = 0x7f; - readback_p2 = 0x7f; - read_lo = " 0 0 1 0 0 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - write_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x04; - delay = 12; - blocksize = 128; - readsize = 256; - ; - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - memory "fuse" - size = 1; - ; - memory "lock" - size = 1; - write = "1 0 1 0 1 1 0 0 1 1 1 x x i i x", - "x x x x x x x x x x x x x x x x"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - ; - -#------------------------------------------------------------ -# AT90s2333 -#------------------------------------------------------------ - -part - id = "2333"; -##### WARNING: No XML file for device 'AT90S2333'! ##### - desc = "AT90S2333"; - stk500_devcode = 0x42; - avr910_devcode = 0x34; - signature = 0x1e 0x91 0x05; - chip_erase_delay = 20000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 0; - togglevtg = 0; - poweroffdelay = 0; - resetdelayms = 0; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 15; - chiperasepolltimeout = 0; - programfusepulsewidth = 2; - programfusepolltimeout = 0; - programlockpulsewidth = 0; - programlockpolltimeout = 1; - - memory "eeprom" - size = 128; - min_write_delay = 9000; - max_write_delay = 20000; - readback_p1 = 0x00; - readback_p2 = 0xff; - read = "1 0 1 0 0 0 0 0 x x x x x x x x", - "x a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = "1 1 0 0 0 0 0 0 x x x x x x x x", - "x a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - mode = 0x04; - delay = 12; - blocksize = 128; - readsize = 256; - ; - - memory "flash" - size = 2048; - min_write_delay = 9000; - max_write_delay = 20000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - write_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x04; - delay = 12; - blocksize = 128; - readsize = 256; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - memory "fuse" - size = 1; - min_write_delay = 9000; - max_write_delay = 20000; - pwroff_after_write = yes; - read = "0 1 0 1 0 0 0 0 x x x x x x x x", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 i i i i i", - "x x x x x x x x x x x x x x x x"; - ; - memory "lock" - size = 1; - min_write_delay = 9000; - max_write_delay = 20000; - read = "0 1 0 1 1 0 0 0 x x x x x x x x", - "x x x x x x x x x x x x x o o x"; - - write = "1 0 1 0 1 1 0 0 1 1 1 1 1 i i 1", - "x x x x x x x x x x x x x x x x"; - ; - ; - - -#------------------------------------------------------------ -# AT90s2343 (also AT90s2323 and ATtiny22) -#------------------------------------------------------------ - -part - id = "2343"; - desc = "AT90S2343"; - stk500_devcode = 0x43; - avr910_devcode = 0x4c; - signature = 0x1e 0x91 0x03; - chip_erase_delay = 18000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - hvsp_controlstack = - 0x4C, 0x0C, 0x1C, 0x2C, 0x3C, 0x64, 0x74, 0x00, - 0x68, 0x78, 0x68, 0x68, 0x00, 0x00, 0x68, 0x78, - 0x78, 0x00, 0x6D, 0x0C, 0x80, 0x40, 0x20, 0x10, - 0x11, 0x08, 0x04, 0x02, 0x03, 0x08, 0x04, 0x00; - hventerstabdelay = 100; - hvspcmdexedelay = 0; - synchcycles = 6; - latchcycles = 1; - togglevtg = 0; - poweroffdelay = 25; - resetdelayms = 0; - resetdelayus = 50; - hvleavestabdelay = 100; - resetdelay = 25; - chiperasepolltimeout = 40; - chiperasetime = 0; - programfusepolltimeout = 25; - programlockpolltimeout = 25; - - memory "eeprom" - size = 128; - min_write_delay = 9000; - max_write_delay = 20000; - readback_p1 = 0x00; - readback_p2 = 0xff; - read = "1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0", - "x a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = "1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0", - "x a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - mode = 0x04; - delay = 12; - blocksize = 64; - readsize = 256; - ; - memory "flash" - size = 2048; - min_write_delay = 9000; - max_write_delay = 20000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - write_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x04; - delay = 12; - blocksize = 128; - readsize = 128; - ; - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - memory "fuse" - size = 1; - min_write_delay = 9000; - max_write_delay = 20000; - read = "0 1 0 1 1 0 0 0 x x x x x x x x", - "x x x x x x x x o o o x x x x o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 1 1 1 1 i", - "x x x x x x x x x x x x x x x x"; - ; - memory "lock" - size = 1; - min_write_delay = 9000; - max_write_delay = 20000; - read = "0 1 0 1 1 0 0 0 x x x x x x x x", - "x x x x x x x x o o o x x x x o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 1 1 i i 1", - "x x x x x x x x x x x x x x x x"; - ; - ; - - -#------------------------------------------------------------ -# AT90s4433 -#------------------------------------------------------------ - -part - id = "4433"; - desc = "AT90S4433"; - stk500_devcode = 0x51; - avr910_devcode = 0x30; - signature = 0x1e 0x92 0x03; - chip_erase_delay = 20000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 0; - togglevtg = 0; - poweroffdelay = 0; - resetdelayms = 0; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 15; - chiperasepolltimeout = 0; - programfusepulsewidth = 2; - programfusepolltimeout = 0; - programlockpulsewidth = 0; - programlockpolltimeout = 1; - - memory "eeprom" - size = 256; - min_write_delay = 9000; - max_write_delay = 20000; - readback_p1 = 0x00; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0 x x x x x x x x", - "a7 a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0 x x x x x x x x", - "a7 a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - mode = 0x04; - delay = 12; - blocksize = 128; - readsize = 256; - ; - memory "flash" - size = 4096; - min_write_delay = 9000; - max_write_delay = 20000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " x x x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x x x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write_lo = " 0 1 0 0 0 0 0 0", - " x x x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - write_hi = " 0 1 0 0 1 0 0 0", - " x x x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x04; - delay = 12; - blocksize = 128; - readsize = 256; - ; - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - memory "fuse" - size = 1; - min_write_delay = 9000; - max_write_delay = 20000; - pwroff_after_write = yes; - read = "0 1 0 1 0 0 0 0 x x x x x x x x", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 i i i i i", - "x x x x x x x x x x x x x x x x"; - ; - memory "lock" - size = 1; - min_write_delay = 9000; - max_write_delay = 20000; - read = "0 1 0 1 1 0 0 0 x x x x x x x x", - "x x x x x x x x x x x x x o o x"; - - write = "1 0 1 0 1 1 0 0 1 1 1 1 1 i i 1", - "x x x x x x x x x x x x x x x x"; - ; - ; - -#------------------------------------------------------------ -# AT90s4434 -#------------------------------------------------------------ - -part - id = "4434"; -##### WARNING: No XML file for device 'AT90S4434'! ##### - desc = "AT90S4434"; - stk500_devcode = 0x52; - avr910_devcode = 0x6c; - signature = 0x1e 0x92 0x02; - chip_erase_delay = 20000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - - memory "eeprom" - size = 256; - min_write_delay = 9000; - max_write_delay = 20000; - readback_p1 = 0x00; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0 x x x x x x x x", - "a7 a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0 x x x x x x x x", - "a7 a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - ; - memory "flash" - size = 4096; - min_write_delay = 9000; - max_write_delay = 20000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " x x x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x x x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write_lo = " 0 1 0 0 0 0 0 0", - " x x x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - write_hi = " 0 1 0 0 1 0 0 0", - " x x x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - ; - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - memory "fuse" - size = 1; - min_write_delay = 9000; - max_write_delay = 20000; - read = "0 1 0 1 0 0 0 0 x x x x x x x x", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 i i i i i", - "x x x x x x x x x x x x x x x x"; - ; - memory "lock" - size = 1; - min_write_delay = 9000; - max_write_delay = 20000; - read = "0 1 0 1 1 0 0 0 x x x x x x x x", - "x x x x x x x x x x x x x o o x"; - - write = "1 0 1 0 1 1 0 0 1 1 1 1 1 i i 1", - "x x x x x x x x x x x x x x x x"; - ; - ; - -#------------------------------------------------------------ -# AT90s8515 -#------------------------------------------------------------ - -part - id = "8515"; - desc = "AT90S8515"; - stk500_devcode = 0x60; - avr910_devcode = 0x38; - signature = 0x1e 0x93 0x01; - chip_erase_delay = 20000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 0; - togglevtg = 0; - poweroffdelay = 0; - resetdelayms = 0; - resetdelayus = 0; - hvleavestabdelay = 15; - resetdelay = 15; - chiperasepulsewidth = 15; - chiperasepolltimeout = 0; - programfusepulsewidth = 2; - programfusepolltimeout = 0; - programlockpulsewidth = 0; - programlockpolltimeout = 1; - - memory "eeprom" - size = 512; - min_write_delay = 4000; - max_write_delay = 9000; - readback_p1 = 0x80; - readback_p2 = 0x7f; - read = " 1 0 1 0 0 0 0 0 x x x x x x x a8", - "a7 a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0 x x x x x x x a8", - "a7 a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - mode = 0x04; - delay = 12; - blocksize = 128; - readsize = 256; - ; - memory "flash" - size = 8192; - min_write_delay = 4000; - max_write_delay = 9000; - readback_p1 = 0x7f; - readback_p2 = 0x7f; - read_lo = " 0 0 1 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write_lo = " 0 1 0 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - write_hi = " 0 1 0 0 1 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x04; - delay = 12; - blocksize = 128; - readsize = 256; - ; - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - memory "fuse" - size = 1; - ; - memory "lock" - size = 1; - write = "1 0 1 0 1 1 0 0 1 1 1 1 1 i i 1", - "x x x x x x x x x x x x x x x x"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - ; - -#------------------------------------------------------------ -# AT90s8535 -#------------------------------------------------------------ - -part - id = "8535"; - desc = "AT90S8535"; - stk500_devcode = 0x61; - avr910_devcode = 0x68; - signature = 0x1e 0x93 0x03; - chip_erase_delay = 20000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 0; - togglevtg = 0; - poweroffdelay = 0; - resetdelayms = 0; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 15; - chiperasepolltimeout = 0; - programfusepulsewidth = 2; - programfusepolltimeout = 0; - programlockpulsewidth = 0; - programlockpolltimeout = 1; - - memory "eeprom" - size = 512; - min_write_delay = 9000; - max_write_delay = 20000; - readback_p1 = 0x00; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0 x x x x x x x a8", - "a7 a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0 x x x x x x x a8", - "a7 a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - mode = 0x04; - delay = 12; - blocksize = 128; - readsize = 256; - ; - memory "flash" - size = 8192; - min_write_delay = 9000; - max_write_delay = 20000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write_lo = " 0 1 0 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - write_hi = " 0 1 0 0 1 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x04; - delay = 12; - blocksize = 128; - readsize = 256; - ; - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - memory "fuse" - size = 1; - read = "0 1 0 1 1 0 0 0 x x x x x x x x", - "x x x x x x x x x x x x x x x o"; - write = "1 0 1 0 1 1 0 0 1 0 1 1 1 1 1 i", - "x x x x x x x x x x x x x x x x"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 x x x x x x x x", - "x x x x x x x x o o x x x x x x"; - write = "1 0 1 0 1 1 0 0 1 1 1 1 1 i i 1", - "x x x x x x x x x x x x x x x x"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - ; - -#------------------------------------------------------------ -# ATmega103 -#------------------------------------------------------------ - -part - id = "m103"; - desc = "ATMEGA103"; - stk500_devcode = 0xB1; - avr910_devcode = 0x41; - signature = 0x1e 0x97 0x01; - chip_erase_delay = 112000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - pp_controlstack = - 0x0E, 0x1E, 0x8E, 0x9E, 0x2E, 0x3E, 0xAE, 0xBE, - 0x4E, 0x5E, 0xCE, 0xDE, 0x6E, 0x7E, 0xEE, 0xDE, - 0x66, 0x76, 0xE6, 0xF6, 0x6A, 0x7A, 0xEA, 0x7A, - 0x7F, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 0; - togglevtg = 0; - poweroffdelay = 0; - resetdelayms = 0; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 15; - chiperasepolltimeout = 0; - programfusepulsewidth = 2; - programfusepolltimeout = 0; - programlockpulsewidth = 0; - programlockpolltimeout = 10; - - memory "eeprom" - size = 4096; - min_write_delay = 4000; - max_write_delay = 9000; - readback_p1 = 0x80; - readback_p2 = 0x7f; - read = " 1 0 1 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x04; - delay = 12; - blocksize = 64; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 131072; - page_size = 256; - num_pages = 512; - min_write_delay = 22000; - max_write_delay = 56000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 x x x x x x x", - " x x x x x x x x"; - - mode = 0x11; - delay = 70; - blocksize = 256; - readsize = 256; - ; - - memory "fuse" - size = 1; - read = "0 1 0 1 0 0 0 0 x x x x x x x x", - "x x x x x x x x x x o x o 1 o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 1 i 1 i i", - "x x x x x x x x x x x x x x x x"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 x x x x x x x x", - "x x x x x x x x x x x x x o o x"; - - write = "1 0 1 0 1 1 0 0 1 1 1 1 1 i i 1", - "x x x x x x x x x x x x x x x x"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - - -#------------------------------------------------------------ -# ATmega64 -#------------------------------------------------------------ - -part - id = "m64"; - desc = "ATMEGA64"; - has_jtag = yes; - stk500_devcode = 0xA0; - avr910_devcode = 0x45; - signature = 0x1e 0x96 0x02; - chip_erase_delay = 9000; - pagel = 0xD7; - bs2 = 0xA0; - reset = dedicated; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 6; - togglevtg = 0; - poweroffdelay = 0; - resetdelayms = 0; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - idr = 0x22; - spmcr = 0x68; - allowfullpagebitstream = yes; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 8; /* for parallel programming */ - size = 2048; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x04; - delay = 20; - blocksize = 64; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 65536; - page_size = 256; - num_pages = 256; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " x a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " x a14 a13 a12 a11 a10 a9 a8", - " a7 x x x x x x x", - " x x x x x x x x"; - - mode = 0x21; - delay = 6; - blocksize = 128; - readsize = 256; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x x i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "calibration" - size = 4; - read = "0 0 1 1 1 0 0 0 x x x x x x x x", - "0 0 0 0 0 0 a1 a0 o o o o o o o o"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - - - - -#------------------------------------------------------------ -# ATmega128 -#------------------------------------------------------------ - -part - id = "m128"; - desc = "ATMEGA128"; - has_jtag = yes; - stk500_devcode = 0xB2; - avr910_devcode = 0x43; - signature = 0x1e 0x97 0x02; - chip_erase_delay = 9000; - pagel = 0xD7; - bs2 = 0xA0; - reset = dedicated; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 6; - togglevtg = 0; - poweroffdelay = 0; - resetdelayms = 0; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - idr = 0x22; - spmcr = 0x68; - rampz = 0x3b; - allowfullpagebitstream = yes; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 8; /* for parallel programming */ - size = 4096; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x04; - delay = 12; - blocksize = 64; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 131072; - page_size = 256; - num_pages = 512; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 x x x x x x x", - " x x x x x x x x"; - - mode = 0x21; - delay = 6; - blocksize = 128; - readsize = 256; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x x i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "calibration" - size = 4; - read = "0 0 1 1 1 0 0 0 x x x x x x x x", - "0 0 0 0 0 0 a1 a0 o o o o o o o o"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# AT90CAN128 -#------------------------------------------------------------ - -part - id = "c128"; - desc = "AT90CAN128"; - has_jtag = yes; - stk500_devcode = 0xB3; -# avr910_devcode = 0x43; - signature = 0x1e 0x97 0x81; - chip_erase_delay = 9000; - pagel = 0xD7; - bs2 = 0xA0; - reset = dedicated; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 6; - togglevtg = 0; - poweroffdelay = 0; - resetdelayms = 0; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - idr = 0x31; - spmcr = 0x57; - rampz = 0x3b; - eecr = 0x3f; - allowfullpagebitstream = no; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 8; /* for parallel programming */ - size = 4096; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " 0 0 0 x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 0 x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 0 0 0", - " x x x x x x x x"; - - - mode = 0x41; - delay = 20; - blocksize = 8; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 131072; - page_size = 256; - num_pages = 512; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 x x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 256; - readsize = 256; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# AT90CAN64 -#------------------------------------------------------------ - -part - id = "c64"; - desc = "AT90CAN64"; - has_jtag = yes; - stk500_devcode = 0xB3; -# avr910_devcode = 0x43; - signature = 0x1e 0x96 0x81; - chip_erase_delay = 9000; - pagel = 0xD7; - bs2 = 0xA0; - reset = dedicated; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 6; - togglevtg = 0; - poweroffdelay = 0; - resetdelayms = 0; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - idr = 0x31; - spmcr = 0x57; - rampz = 0x3b; - eecr = 0x3f; - allowfullpagebitstream = no; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 8; /* for parallel programming */ - size = 2048; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " 0 0 0 x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 0 x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x a10 a9 a8", - " a7 a6 a5 a4 a3 0 0 0", - " x x x x x x x x"; - - - mode = 0x41; - delay = 20; - blocksize = 8; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 65536; - page_size = 256; - num_pages = 256; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 x x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 256; - readsize = 256; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# AT90CAN32 -#------------------------------------------------------------ - -part - id = "c32"; - desc = "AT90CAN32"; - has_jtag = yes; - stk500_devcode = 0xB3; -# avr910_devcode = 0x43; - signature = 0x1e 0x95 0x81; - chip_erase_delay = 9000; - pagel = 0xD7; - bs2 = 0xA0; - reset = dedicated; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 6; - togglevtg = 0; - poweroffdelay = 0; - resetdelayms = 0; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - idr = 0x31; - spmcr = 0x57; - rampz = 0x3b; - eecr = 0x3f; - allowfullpagebitstream = no; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 8; /* for parallel programming */ - size = 1024; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " 0 0 0 x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 0 x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x x a9 a8", - " a7 a6 a5 a4 a3 0 0 0", - " x x x x x x x x"; - - - mode = 0x41; - delay = 20; - blocksize = 8; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 32768; - page_size = 256; - num_pages = 128; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 x x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 256; - readsize = 256; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - - -#------------------------------------------------------------ -# ATmega16 -#------------------------------------------------------------ - -part - id = "m16"; - desc = "ATMEGA16"; - has_jtag = yes; - stk500_devcode = 0x82; - avr910_devcode = 0x74; - signature = 0x1e 0x94 0x03; - pagel = 0xd7; - bs2 = 0xa0; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 100; - latchcycles = 6; - togglevtg = 0; - poweroffdelay = 0; - resetdelayms = 0; - resetdelayus = 0; - hvleavestabdelay = 15; - resetdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - idr = 0x31; - spmcr = 0x57; - allowfullpagebitstream = yes; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 4; /* for parallel programming */ - size = 512; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " 0 0 x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x04; - delay = 10; - blocksize = 128; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 16384; - page_size = 128; - num_pages = 128; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 a13 a12 a11 a10 a9 a8", - " a7 a6 x x x x x x", - " x x x x x x x x"; - - mode = 0x21; - delay = 6; - blocksize = 128; - readsize = 256; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lfuse" - size = 1; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - memory "calibration" - size = 4; - - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 a1 a0 o o o o o o o o"; - ; - ; - - -#------------------------------------------------------------ -# ATmega164P -#------------------------------------------------------------ - -# close to ATmega16 - -part - id = "m164p"; - desc = "ATMEGA164P"; - has_jtag = yes; - stk500_devcode = 0x82; # no STK500v1 support, use the ATmega16 one - avr910_devcode = 0x74; - signature = 0x1e 0x94 0x0a; - pagel = 0xd7; - bs2 = 0xa0; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - idr = 0x31; - spmcr = 0x57; - allowfullpagebitstream = no; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 4; /* for parallel programming */ - size = 512; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " 0 0 x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 10; - blocksize = 128; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 16384; - page_size = 128; - num_pages = 128; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 a13 a12 a11 a10 a9 a8", - " a7 a6 x x x x x x", - " x x x x x x x x"; - - mode = 0x21; - delay = 6; - blocksize = 128; - readsize = 256; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lfuse" - size = 1; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x 1 1 1 1 1 i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - - memory "calibration" - size = 1; - - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - ; - - -#------------------------------------------------------------ -# ATmega324P -#------------------------------------------------------------ - -# similar to ATmega164P - -part - id = "m324p"; - desc = "ATMEGA324P"; - has_jtag = yes; - stk500_devcode = 0x82; # no STK500v1 support, use the ATmega16 one - avr910_devcode = 0x74; - signature = 0x1e 0x95 0x08; - pagel = 0xd7; - bs2 = 0xa0; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - idr = 0x31; - spmcr = 0x57; - allowfullpagebitstream = no; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 4; /* for parallel programming */ - size = 1024; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " 0 0 x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 10; - blocksize = 128; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 32768; - page_size = 128; - num_pages = 256; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 x x x x x x", - " x x x x x x x x"; - - mode = 0x21; - delay = 6; - blocksize = 256; - readsize = 256; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lfuse" - size = 1; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x 1 1 1 1 1 i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - - memory "calibration" - size = 1; - - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - ; - - -#------------------------------------------------------------ -# ATmega324PA -#------------------------------------------------------------ - -# similar to ATmega324P - -part - id = "m324pa"; - desc = "ATmega324PA"; - has_jtag = yes; - stk500_devcode = 0x82; # no STK500v1 support, use the ATmega16 one - avr910_devcode = 0x74; - signature = 0x1e 0x95 0x11; - pagel = 0xd7; - bs2 = 0xa0; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - idr = 0x31; - spmcr = 0x57; - allowfullpagebitstream = no; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 4; /* for parallel programming */ - size = 1024; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " 0 0 x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 10; - blocksize = 128; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 32768; - page_size = 128; - num_pages = 256; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 x x x x x x", - " x x x x x x x x"; - - mode = 0x21; - delay = 6; - blocksize = 256; - readsize = 256; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lfuse" - size = 1; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x 1 1 1 1 1 i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - - memory "calibration" - size = 1; - - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - ; - - -#------------------------------------------------------------ -# ATmega644 -#------------------------------------------------------------ - -# similar to ATmega164 - -part - id = "m644"; - desc = "ATMEGA644"; - has_jtag = yes; - stk500_devcode = 0x82; # no STK500v1 support, use the ATmega16 one - avr910_devcode = 0x74; - signature = 0x1e 0x96 0x09; - pagel = 0xd7; - bs2 = 0xa0; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x02; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 6; - togglevtg = 0; - poweroffdelay = 0; - resetdelayms = 0; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - idr = 0x31; - spmcr = 0x57; - allowfullpagebitstream = no; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 8; /* for parallel programming */ - size = 2048; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " 0 0 x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 0 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 10; - blocksize = 128; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 65536; - page_size = 256; - num_pages = 256; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 x x x x x x x", - " x x x x x x x x"; - - mode = 0x21; - delay = 6; - blocksize = 256; - readsize = 256; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lfuse" - size = 1; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x 1 1 1 1 1 i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - - memory "calibration" - size = 1; - - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATmega644P -#------------------------------------------------------------ - -# similar to ATmega164p - -part - id = "m644p"; - desc = "ATMEGA644P"; - has_jtag = yes; - stk500_devcode = 0x82; # no STK500v1 support, use the ATmega16 one - avr910_devcode = 0x74; - signature = 0x1e 0x96 0x0a; - pagel = 0xd7; - bs2 = 0xa0; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x02; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 6; - togglevtg = 0; - poweroffdelay = 0; - resetdelayms = 0; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - idr = 0x31; - spmcr = 0x57; - allowfullpagebitstream = no; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 8; /* for parallel programming */ - size = 2048; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " 0 0 x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 0 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 10; - blocksize = 128; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 65536; - page_size = 256; - num_pages = 256; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 x x x x x x x", - " x x x x x x x x"; - - mode = 0x21; - delay = 6; - blocksize = 256; - readsize = 256; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lfuse" - size = 1; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x 1 1 1 1 1 i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - - memory "calibration" - size = 1; - - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - ; - - - -#------------------------------------------------------------ -# ATmega1284P -#------------------------------------------------------------ - -# similar to ATmega164p - -part - id = "m1284p"; - desc = "ATMEGA1284P"; - has_jtag = yes; - stk500_devcode = 0x82; # no STK500v1 support, use the ATmega16 one - avr910_devcode = 0x74; - signature = 0x1e 0x97 0x05; - pagel = 0xd7; - bs2 = 0xa0; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x02; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 6; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - idr = 0x31; - spmcr = 0x57; - allowfullpagebitstream = no; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 8; /* for parallel programming */ - size = 4096; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " 0 0 x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 0 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 10; - blocksize = 128; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 131072; - page_size = 256; - num_pages = 512; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 x x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 10; - blocksize = 256; - readsize = 256; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lfuse" - size = 1; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x 1 1 1 1 1 i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - - memory "calibration" - size = 1; - - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - ; - - - -#------------------------------------------------------------ -# ATmega162 -#------------------------------------------------------------ - -part - id = "m162"; - desc = "ATMEGA162"; - has_jtag = yes; - stk500_devcode = 0x83; - avr910_devcode = 0x63; - signature = 0x1e 0x94 0x04; - chip_erase_delay = 9000; - pagel = 0xd7; - bs2 = 0xa0; - - idr = 0x04; - spmcr = 0x57; - allowfullpagebitstream = yes; - - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - memory "flash" - paged = yes; - size = 16384; - page_size = 128; - num_pages = 128; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 a13 a12 a11 a10 a9 a8", - " a7 a6 x x x x x x", - " x x x x x x x x"; - mode = 0x41; - delay = 10; - blocksize = 128; - readsize = 256; - - ; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 6; - togglevtg = 0; - poweroffdelay = 0; - resetdelayms = 0; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 4; /* for parallel programming */ - size = 512; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - - read = " 1 0 1 0 0 0 0 0", - " 0 0 x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 20; - blocksize = 4; - readsize = 256; - ; - - memory "lfuse" - size = 1; - min_write_delay = 16000; - max_write_delay = 16000; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "hfuse" - size = 1; - min_write_delay = 16000; - max_write_delay = 16000; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "efuse" - size = 1; - min_write_delay = 16000; - max_write_delay = 16000; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x 1 1 1 1 1 i i i"; - ; - - memory "lock" - size = 1; - min_write_delay = 16000; - max_write_delay = 16000; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "signature" - size = 3; - - read = "0 0 1 1 0 0 0 0 0 0 x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - - memory "calibration" - size = 1; - - read = "0 0 1 1 1 0 0 0 0 0 x x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; -; - - - -#------------------------------------------------------------ -# ATmega163 -#------------------------------------------------------------ - -part - id = "m163"; - desc = "ATMEGA163"; - stk500_devcode = 0x81; - avr910_devcode = 0x64; - signature = 0x1e 0x94 0x02; - chip_erase_delay = 32000; - pagel = 0xd7; - bs2 = 0xa0; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 0; - togglevtg = 0; - poweroffdelay = 0; - resetdelayms = 0; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 30; - programfusepulsewidth = 0; - programfusepolltimeout = 2; - programlockpulsewidth = 0; - programlockpolltimeout = 2; - - - memory "eeprom" - size = 512; - min_write_delay = 4000; - max_write_delay = 4000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " x x x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " x x x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - mode = 0x41; - delay = 20; - blocksize = 4; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 16384; - page_size = 128; - num_pages = 128; - min_write_delay = 16000; - max_write_delay = 16000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " x x x a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x x x a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " x x x a12 a11 a10 a9 a8", - " a7 a6 x x x x x x", - " x x x x x x x x"; - - mode = 0x11; - delay = 20; - blocksize = 128; - readsize = 256; - ; - - memory "lfuse" - size = 1; - min_write_delay = 2000; - max_write_delay = 2000; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o x x o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i 1 1 i i i i"; - ; - - memory "hfuse" - size = 1; - min_write_delay = 2000; - max_write_delay = 2000; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x x x x x 1 o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x 1 1 1 1 1 i i i"; - ; - - memory "lock" - size = 1; - min_write_delay = 2000; - max_write_delay = 2000; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x 0 x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 x x x x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATmega169 -#------------------------------------------------------------ - -part - id = "m169"; - desc = "ATMEGA169"; - has_jtag = yes; - stk500_devcode = 0x85; - avr910_devcode = 0x78; - signature = 0x1e 0x94 0x05; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - idr = 0x31; - spmcr = 0x57; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 4; /* for parallel programming */ - size = 512; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " x x x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " x x x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x x x a8", - " a7 a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 20; - blocksize = 4; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 16384; - page_size = 128; - num_pages = 128; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " x x x a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x x x a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " x x x a12 a11 a10 a9 a8", - " a7 a6 x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 128; - readsize = 256; - ; - - memory "lfuse" - size = 1; - min_write_delay = 2000; - max_write_delay = 2000; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "hfuse" - size = 1; - min_write_delay = 2000; - max_write_delay = 2000; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - ; - - memory "lock" - size = 1; - min_write_delay = 2000; - max_write_delay = 2000; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATmega329 -#------------------------------------------------------------ - -part - id = "m329"; - desc = "ATMEGA329"; - has_jtag = yes; -# stk500_devcode = 0x85; # no STK500 support, only STK500v2 -# avr910_devcode = 0x?; # try the ATmega169 one: - avr910_devcode = 0x75; - signature = 0x1e 0x95 0x03; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - idr = 0x31; - spmcr = 0x57; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 4; /* for parallel programming */ - size = 1024; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 20; - blocksize = 8; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 32768; - page_size = 128; - num_pages = 256; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " x a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " x x x a12 a11 a10 a9 a8", - " a7 a6 x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 256; - readsize = 256; - ; - - memory "lfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "hfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "efuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x i i i"; - ; - - memory "lock" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATmega329P -#------------------------------------------------------------ -# Identical to ATmega329 except of the signature - -part - id = "m329p"; - desc = "ATMEGA329P"; - has_jtag = yes; -# stk500_devcode = 0x85; # no STK500 support, only STK500v2 -# avr910_devcode = 0x?; # try the ATmega169 one: - avr910_devcode = 0x75; - signature = 0x1e 0x95 0x0b; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - idr = 0x31; - spmcr = 0x57; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 4; /* for parallel programming */ - size = 1024; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 20; - blocksize = 8; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 32768; - page_size = 128; - num_pages = 256; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " x a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " x x x a12 a11 a10 a9 a8", - " a7 a6 x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 256; - readsize = 256; - ; - - memory "lfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "hfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "efuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x i i i"; - ; - - memory "lock" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATmega3290 -#------------------------------------------------------------ - -# identical to ATmega329 - -part - id = "m3290"; - desc = "ATMEGA3290"; - has_jtag = yes; -# stk500_devcode = 0x85; # no STK500 support, only STK500v2 -# avr910_devcode = 0x?; # try the ATmega169 one: - avr910_devcode = 0x75; - signature = 0x1e 0x95 0x04; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - idr = 0x31; - spmcr = 0x57; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 4; /* for parallel programming */ - size = 1024; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x x a9 a8", - " a7 a6 a5 a4 a3 a3 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 20; - blocksize = 8; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 32768; - page_size = 128; - num_pages = 256; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " x a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " x x x a12 a11 a10 a9 a8", - " a7 a6 x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 256; - readsize = 256; - ; - - memory "lfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "hfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "efuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x i i i"; - ; - - memory "lock" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATmega3290P -#------------------------------------------------------------ - -# identical to ATmega3290 except of the signature - -part - id = "m3290p"; - desc = "ATMEGA3290P"; - has_jtag = yes; -# stk500_devcode = 0x85; # no STK500 support, only STK500v2 -# avr910_devcode = 0x?; # try the ATmega169 one: - avr910_devcode = 0x75; - signature = 0x1e 0x95 0x0c; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - idr = 0x31; - spmcr = 0x57; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 4; /* for parallel programming */ - size = 1024; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x x a9 a8", - " a7 a6 a5 a4 a3 a3 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 20; - blocksize = 8; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 32768; - page_size = 128; - num_pages = 256; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " x a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " x x x a12 a11 a10 a9 a8", - " a7 a6 x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 256; - readsize = 256; - ; - - memory "lfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "hfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "efuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x i i i"; - ; - - memory "lock" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATmega649 -#------------------------------------------------------------ - -part - id = "m649"; - desc = "ATMEGA649"; - has_jtag = yes; -# stk500_devcode = 0x85; # no STK500 support, only STK500v2 -# avr910_devcode = 0x?; # try the ATmega169 one: - avr910_devcode = 0x75; - signature = 0x1e 0x96 0x03; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - idr = 0x31; - spmcr = 0x57; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 8; /* for parallel programming */ - size = 2048; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " x x x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " x x x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x a10 a9 a8", - " a7 a6 a5 a4 a3 0 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 20; - blocksize = 8; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 65536; - page_size = 256; - num_pages = 256; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " x x x a12 a11 a10 a9 a8", - " a7 x x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 256; - readsize = 256; - ; - - memory "lfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "hfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "efuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x i i i"; - ; - - memory "lock" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATmega6490 -#------------------------------------------------------------ - -# identical to ATmega649 - -part - id = "m6490"; - desc = "ATMEGA6490"; - has_jtag = yes; -# stk500_devcode = 0x85; # no STK500 support, only STK500v2 -# avr910_devcode = 0x?; # try the ATmega169 one: - avr910_devcode = 0x75; - signature = 0x1e 0x96 0x04; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - idr = 0x31; - spmcr = 0x57; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 8; /* for parallel programming */ - size = 2048; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " x x x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " x x x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x x x a8", - " a7 a6 a5 a4 a3 0 0 0", - " x x x x x x x x"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x a10 a9 a8", - " a7 a6 a5 a4 a3 0 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 20; - blocksize = 8; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 65536; - page_size = 256; - num_pages = 256; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " x x x a12 a11 a10 a9 a8", - " a7 x x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 256; - readsize = 256; - ; - - memory "lfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "hfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "efuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x i i i"; - ; - - memory "lock" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATmega32 -#------------------------------------------------------------ - -part - id = "m32"; - desc = "ATMEGA32"; - has_jtag = yes; - stk500_devcode = 0x91; - avr910_devcode = 0x72; - signature = 0x1e 0x95 0x02; - chip_erase_delay = 9000; - pagel = 0xd7; - bs2 = 0xa0; - reset = dedicated; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 6; - togglevtg = 0; - poweroffdelay = 0; - resetdelayms = 0; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - idr = 0x31; - spmcr = 0x57; - allowfullpagebitstream = yes; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 4; /* for parallel programming */ - size = 1024; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " 0 0 x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x04; - delay = 10; - blocksize = 64; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 32768; - page_size = 128; - num_pages = 256; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 a13 a12 a11 a10 a9 a8", - " a7 a6 x x x x x x", - " x x x x x x x x"; - - mode = 0x21; - delay = 6; - blocksize = 64; - readsize = 256; - ; - - memory "lfuse" - size = 1; - min_write_delay = 2000; - max_write_delay = 2000; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "hfuse" - size = 1; - min_write_delay = 2000; - max_write_delay = 2000; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "lock" - size = 1; - min_write_delay = 2000; - max_write_delay = 2000; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - - memory "calibration" - size = 4; - read = "0 0 1 1 1 0 0 0 0 0 x x x x x x", - "0 0 0 0 0 0 a1 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATmega161 -#------------------------------------------------------------ - -part - id = "m161"; - desc = "ATMEGA161"; - stk500_devcode = 0x80; - avr910_devcode = 0x60; - signature = 0x1e 0x94 0x01; - chip_erase_delay = 28000; - pagel = 0xd7; - bs2 = 0xa0; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 0; - togglevtg = 0; - poweroffdelay = 0; - resetdelayms = 0; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 30; - programfusepulsewidth = 0; - programfusepolltimeout = 2; - programlockpulsewidth = 0; - programlockpolltimeout = 2; - - memory "eeprom" - size = 512; - min_write_delay = 3400; - max_write_delay = 3400; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " x x x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " x x x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x04; - delay = 5; - blocksize = 128; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 16384; - page_size = 128; - num_pages = 128; - min_write_delay = 14000; - max_write_delay = 14000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " x x x a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x x x a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " x x x a12 a11 a10 a9 a8", - " a7 a6 x x x x x x", - " x x x x x x x x"; - - mode = 0x21; - delay = 16; - blocksize = 128; - readsize = 256; - ; - - memory "fuse" - size = 1; - min_write_delay = 2000; - max_write_delay = 2000; - read = "0 1 0 1 0 0 0 0 x x x x x x x x", - "x x x x x x x x x o x o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 x x x x x", - "x x x x x x x x 1 i 1 i i i i i"; - ; - - memory "lock" - size = 1; - min_write_delay = 2000; - max_write_delay = 2000; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - - -#------------------------------------------------------------ -# ATmega8 -#------------------------------------------------------------ - -part - id = "m8"; - desc = "ATMEGA8"; - stk500_devcode = 0x70; - avr910_devcode = 0x76; - signature = 0x1e 0x93 0x07; - pagel = 0xd7; - bs2 = 0xc2; - chip_erase_delay = 10000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 2; - resetdelayus = 0; - hvleavestabdelay = 15; - resetdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - memory "eeprom" - size = 512; - page_size = 4; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " 0 0 x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x04; - delay = 20; - blocksize = 128; - readsize = 256; - ; - memory "flash" - paged = yes; - size = 8192; - page_size = 64; - num_pages = 128; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0x00; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 0 x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 0 x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 x x x x x", - " x x x x x x x x"; - - mode = 0x21; - delay = 10; - blocksize = 64; - readsize = 256; - ; - - memory "lfuse" - size = 1; - min_write_delay = 2000; - max_write_delay = 2000; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "hfuse" - size = 1; - min_write_delay = 2000; - max_write_delay = 2000; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "lock" - size = 1; - min_write_delay = 2000; - max_write_delay = 2000; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "calibration" - size = 4; - read = "0 0 1 1 1 0 0 0 0 0 x x x x x x", - "0 0 0 0 0 0 a1 a0 o o o o o o o o"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - - - -#------------------------------------------------------------ -# ATmega8515 -#------------------------------------------------------------ - -part - id = "m8515"; - desc = "ATMEGA8515"; - stk500_devcode = 0x63; - avr910_devcode = 0x3A; - signature = 0x1e 0x93 0x06; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 6; - togglevtg = 0; - poweroffdelay = 0; - resetdelayms = 0; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - memory "eeprom" - size = 512; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " 0 0 x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x04; - delay = 20; - blocksize = 128; - readsize = 256; - ; - memory "flash" - paged = yes; - size = 8192; - page_size = 64; - num_pages = 128; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 0 x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 0 x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 x x x x x", - " x x x x x x x x"; - - mode = 0x21; - delay = 6; - blocksize = 64; - readsize = 256; - ; - - memory "lfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "hfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "lock" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "calibration" - size = 4; - read = "0 0 1 1 1 0 0 0 0 0 x x x x x x", - "0 0 0 0 0 0 a1 a0 o o o o o o o o"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - - - - -#------------------------------------------------------------ -# ATmega8535 -#------------------------------------------------------------ - -part - id = "m8535"; - desc = "ATMEGA8535"; - stk500_devcode = 0x64; - avr910_devcode = 0x69; - signature = 0x1e 0x93 0x08; - pagel = 0xd7; - bs2 = 0xa0; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 6; - togglevtg = 0; - poweroffdelay = 0; - resetdelayms = 0; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - memory "eeprom" - size = 512; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " 0 0 x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 x x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - mode = 0x04; - delay = 20; - blocksize = 128; - readsize = 256; - ; - memory "flash" - paged = yes; - size = 8192; - page_size = 64; - num_pages = 128; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 0 x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 0 x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 x x x x x", - " x x x x x x x x"; - - mode = 0x21; - delay = 6; - blocksize = 64; - readsize = 256; - ; - - memory "lfuse" - size = 1; - min_write_delay = 2000; - max_write_delay = 2000; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "hfuse" - size = 1; - min_write_delay = 2000; - max_write_delay = 2000; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "lock" - size = 1; - min_write_delay = 2000; - max_write_delay = 2000; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "calibration" - size = 4; - read = "0 0 1 1 1 0 0 0 0 0 x x x x x x", - "0 0 0 0 0 0 a1 a0 o o o o o o o o"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - - -#------------------------------------------------------------ -# ATtiny26 -#------------------------------------------------------------ - -part - id = "t26"; - desc = "ATTINY26"; - stk500_devcode = 0x21; - avr910_devcode = 0x5e; - signature = 0x1e 0x91 0x09; - pagel = 0xb3; - bs2 = 0xb2; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - pp_controlstack = - 0xC4, 0xE4, 0xC4, 0xE4, 0xCC, 0xEC, 0xCC, 0xEC, - 0xD4, 0xF4, 0xD4, 0xF4, 0xDC, 0xFC, 0xDC, 0xFC, - 0xC8, 0xE8, 0xD8, 0xF8, 0x4C, 0x6C, 0x5C, 0x7C, - 0xEC, 0xBC, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 2; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - memory "eeprom" - size = 128; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = "1 0 1 0 0 0 0 0 x x x x x x x x", - "x a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = "1 1 0 0 0 0 0 0 x x x x x x x x", - "x a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - mode = 0x04; - delay = 10; - blocksize = 64; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 2048; - page_size = 32; - num_pages = 64; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x x x x a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x x x x a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 x x x x", - " x x x x x x x x"; - - mode = 0x21; - delay = 6; - blocksize = 16; - readsize = 256; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "0 0 0 0 0 0 a1 a0 o o o o o o o o"; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 x x x x x x x x", - "x x x x x x x x x x x x x x o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 1 1 1 i i", - "x x x x x x x x x x x x x x x x"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x x x x i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x x x x o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "calibration" - size = 4; - read = "0 0 1 1 1 0 0 0 x x x x x x x x", - "0 0 0 0 0 0 a1 a0 o o o o o o o o"; - ; - -; - - -#------------------------------------------------------------ -# ATtiny261 -#------------------------------------------------------------ -# Close to ATtiny26 - -part - id = "t261"; - desc = "ATTINY261"; - has_debugwire = yes; - flash_instr = 0xB4, 0x00, 0x10; - eeprom_instr = 0xBB, 0xFF, 0xBB, 0xEE, 0xBB, 0xCC, 0xB2, 0x0D, - 0xBC, 0x00, 0xB4, 0x00, 0xBA, 0x0D, 0xBB, 0xBC, - 0x99, 0xE1, 0xBB, 0xAC; -# stk500_devcode = 0x21; -# avr910_devcode = 0x5e; - signature = 0x1e 0x91 0x0c; - pagel = 0xb3; - bs2 = 0xb2; - chip_erase_delay = 4000; - - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - pp_controlstack = - 0xC4, 0xE4, 0xC4, 0xE4, 0xCC, 0xEC, 0xCC, 0xEC, - 0xD4, 0xF4, 0xD4, 0xF4, 0xDC, 0xFC, 0xDC, 0xFC, - 0xC8, 0xE8, 0xD8, 0xF8, 0x4C, 0x6C, 0x5C, 0x7C, - 0xEC, 0xBC, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 2; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - memory "eeprom" - paged = no; - size = 128; - page_size = 4; - num_pages = 32; - min_write_delay = 4000; - max_write_delay = 4000; - readback_p1 = 0xff; - readback_p2 = 0xff; - - read = "1 0 1 0 0 0 0 0 x x x x x x x x", - "x a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = "1 1 0 0 0 0 0 0 x x x x x x x x", - "x a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x x x x", - " x a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 10; - blocksize = 4; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 2048; - page_size = 32; - num_pages = 64; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - - read_lo = " 0 0 1 0 0 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x x x x a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x x x x a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " x x x x x x a9 a8", - " a7 a6 a5 a4 x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 32; - readsize = 256; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "0 0 0 0 0 0 a1 a0 o o o o o o o o"; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 x x x x x x x x", - "x x x x x x x x x x x x x x o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 1 1 1 i i", - "x x x x x x x x x x x x x x x x"; - min_write_delay = 4500; - max_write_delay = 4500; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 4500; - max_write_delay = 4500; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 4500; - max_write_delay = 4500; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x x x i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x x x x x x x x o"; - min_write_delay = 4500; - max_write_delay = 4500; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 x x x x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - -; - - -#------------------------------------------------------------ -# ATtiny461 -#------------------------------------------------------------ -# Close to ATtiny261 - -part - id = "t461"; - desc = "ATTINY461"; - has_debugwire = yes; - flash_instr = 0xB4, 0x00, 0x10; - eeprom_instr = 0xBB, 0xFF, 0xBB, 0xEE, 0xBB, 0xCC, 0xB2, 0x0D, - 0xBC, 0x00, 0xB4, 0x00, 0xBA, 0x0D, 0xBB, 0xBC, - 0x99, 0xE1, 0xBB, 0xAC; -# stk500_devcode = 0x21; -# avr910_devcode = 0x5e; - signature = 0x1e 0x92 0x08; - pagel = 0xb3; - bs2 = 0xb2; - chip_erase_delay = 4000; - - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - pp_controlstack = - 0xC4, 0xE4, 0xC4, 0xE4, 0xCC, 0xEC, 0xCC, 0xEC, - 0xD4, 0xF4, 0xD4, 0xF4, 0xDC, 0xFC, 0xDC, 0xFC, - 0xC8, 0xE8, 0xD8, 0xF8, 0x4C, 0x6C, 0x5C, 0x7C, - 0xEC, 0xBC, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 2; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - memory "eeprom" - paged = no; - size = 256; - page_size = 4; - num_pages = 64; - min_write_delay = 4000; - max_write_delay = 4000; - readback_p1 = 0xff; - readback_p2 = 0xff; - - read = " 1 0 1 0 0 0 0 0 x x x x x x x x", - "a7 a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0 x x x x x x x x", - "a7 a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x x x x", - " a7 a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 10; - blocksize = 4; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 4096; - page_size = 64; - num_pages = 64; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - - read_lo = " 0 0 1 0 0 0 0 0", - " x x x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x x x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " x x x x x a10 a9 a8", - " a7 a6 a5 x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 64; - readsize = 256; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "0 0 0 0 0 0 a1 a0 o o o o o o o o"; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 x x x x x x x x", - "x x x x x x x x x x x x x x o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 1 1 1 i i", - "x x x x x x x x x x x x x x x x"; - min_write_delay = 4500; - max_write_delay = 4500; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 4500; - max_write_delay = 4500; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 4500; - max_write_delay = 4500; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x x x i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x x x x x x x x o"; - min_write_delay = 4500; - max_write_delay = 4500; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 x x x x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - -; - - -#------------------------------------------------------------ -# ATtiny861 -#------------------------------------------------------------ -# Close to ATtiny461 - -part - id = "t861"; - desc = "ATTINY861"; - has_debugwire = yes; - flash_instr = 0xB4, 0x00, 0x10; - eeprom_instr = 0xBB, 0xFF, 0xBB, 0xEE, 0xBB, 0xCC, 0xB2, 0x0D, - 0xBC, 0x00, 0xB4, 0x00, 0xBA, 0x0D, 0xBB, 0xBC, - 0x99, 0xE1, 0xBB, 0xAC; -# stk500_devcode = 0x21; -# avr910_devcode = 0x5e; - signature = 0x1e 0x93 0x0d; - pagel = 0xb3; - bs2 = 0xb2; - chip_erase_delay = 4000; - - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 0; - - pp_controlstack = - 0xC4, 0xE4, 0xC4, 0xE4, 0xCC, 0xEC, 0xCC, 0xEC, - 0xD4, 0xF4, 0xD4, 0xF4, 0xDC, 0xFC, 0xDC, 0xFC, - 0xC8, 0xE8, 0xD8, 0xF8, 0x4C, 0x6C, 0x5C, 0x7C, - 0xEC, 0xBC, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 2; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - memory "eeprom" - paged = no; - size = 512; - num_pages = 128; - page_size = 4; - min_write_delay = 4000; - max_write_delay = 4000; - readback_p1 = 0xff; - readback_p2 = 0xff; - - read = " 1 0 1 0 0 0 0 0 x x x x x x x a8", - "a7 a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0 x x x x x x x a8", - "a7 a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x x x a8", - " a7 a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 10; - blocksize = 4; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 8192; - page_size = 64; - num_pages = 128; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - - read_lo = " 0 0 1 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 64; - readsize = 256; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "0 0 0 0 0 0 a1 a0 o o o o o o o o"; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 x x x x x x x x", - "x x x x x x x x x x x x x x o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 1 1 1 i i", - "x x x x x x x x x x x x x x x x"; - min_write_delay = 4500; - max_write_delay = 4500; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 4500; - max_write_delay = 4500; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 4500; - max_write_delay = 4500; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x x x i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x x x x x x x x o"; - min_write_delay = 4500; - max_write_delay = 4500; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 x x x x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - -; - - -#------------------------------------------------------------ -# ATmega48 -#------------------------------------------------------------ - -part - id = "m48"; - desc = "ATMEGA48"; - has_debugwire = yes; - flash_instr = 0xB6, 0x01, 0x11; - eeprom_instr = 0xBD, 0xF2, 0xBD, 0xE1, 0xBB, 0xCF, 0xB4, 0x00, - 0xBE, 0x01, 0xB6, 0x01, 0xBC, 0x00, 0xBB, 0xBF, - 0x99, 0xF9, 0xBB, 0xAF; - stk500_devcode = 0x59; -# avr910_devcode = 0x; - signature = 0x1e 0x92 0x05; - pagel = 0xd7; - bs2 = 0xc2; - chip_erase_delay = 45000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - resetdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - memory "eeprom" - paged = no; - page_size = 4; - size = 256; - min_write_delay = 3600; - max_write_delay = 3600; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " 0 0 0 x x x x x", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x x x x", - " a7 a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 20; - blocksize = 4; - readsize = 256; - ; - memory "flash" - paged = yes; - size = 4096; - page_size = 64; - num_pages = 64; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0x00; - readback_p2 = 0x00; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 0 0 0 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 0 0 0 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 0 0 0 a10 a9 a8", - " a7 a6 a5 x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 64; - readsize = 256; - ; - - memory "lfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "hfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "efuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x x x x x x x x o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x x x i"; - ; - - memory "lock" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - - -#------------------------------------------------------------ -# ATmega88 -#------------------------------------------------------------ - -part - id = "m88"; - desc = "ATMEGA88"; - has_debugwire = yes; - flash_instr = 0xB6, 0x01, 0x11; - eeprom_instr = 0xBD, 0xF2, 0xBD, 0xE1, 0xBB, 0xCF, 0xB4, 0x00, - 0xBE, 0x01, 0xB6, 0x01, 0xBC, 0x00, 0xBB, 0xBF, - 0x99, 0xF9, 0xBB, 0xAF; - stk500_devcode = 0x73; -# avr910_devcode = 0x; - signature = 0x1e 0x93 0x0a; - pagel = 0xd7; - bs2 = 0xc2; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - resetdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - memory "eeprom" - paged = no; - page_size = 4; - size = 512; - min_write_delay = 3600; - max_write_delay = 3600; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " 0 0 0 x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 0 x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x x x a8", - " a7 a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 20; - blocksize = 4; - readsize = 256; - ; - memory "flash" - paged = yes; - size = 8192; - page_size = 64; - num_pages = 128; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 64; - readsize = 256; - ; - - memory "lfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "hfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "efuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x x x x x x o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x i i i"; - ; - - memory "lock" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATmega88P -#------------------------------------------------------------ - -part - id = "m88p"; - desc = "ATMEGA88P"; - has_debugwire = yes; - flash_instr = 0xB6, 0x01, 0x11; - eeprom_instr = 0xBD, 0xF2, 0xBD, 0xE1, 0xBB, 0xCF, 0xB4, 0x00, - 0xBE, 0x01, 0xB6, 0x01, 0xBC, 0x00, 0xBB, 0xBF, - 0x99, 0xF9, 0xBB, 0xAF; - stk500_devcode = 0x73; -# avr910_devcode = 0x; - signature = 0x1e 0x93 0x0f; - pagel = 0xd7; - bs2 = 0xc2; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - resetdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - memory "eeprom" - paged = no; - page_size = 4; - size = 512; - min_write_delay = 3600; - max_write_delay = 3600; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " 0 0 0 x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 0 x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x x x a8", - " a7 a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 20; - blocksize = 4; - readsize = 256; - ; - memory "flash" - paged = yes; - size = 8192; - page_size = 64; - num_pages = 128; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 64; - readsize = 256; - ; - - memory "lfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "hfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "efuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x x x x x x o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x i i i"; - ; - - memory "lock" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - - -#------------------------------------------------------------ -# ATmega168 -#------------------------------------------------------------ - -part - id = "m168"; - desc = "ATMEGA168"; - has_debugwire = yes; - flash_instr = 0xB6, 0x01, 0x11; - eeprom_instr = 0xBD, 0xF2, 0xBD, 0xE1, 0xBB, 0xCF, 0xB4, 0x00, - 0xBE, 0x01, 0xB6, 0x01, 0xBC, 0x00, 0xBB, 0xBF, - 0x99, 0xF9, 0xBB, 0xAF; - stk500_devcode = 0x86; - # avr910_devcode = 0x; - signature = 0x1e 0x94 0x06; - pagel = 0xd7; - bs2 = 0xc2; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - resetdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - memory "eeprom" - paged = no; - page_size = 4; - size = 512; - min_write_delay = 3600; - max_write_delay = 3600; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " 0 0 0 x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 0 x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x x x a8", - " a7 a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 20; - blocksize = 4; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 16384; - page_size = 128; - num_pages = 128; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 0 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 0 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 0 a12 a11 a10 a9 a8", - " a7 a6 x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 128; - readsize = 256; - - ; - - memory "lfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "hfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "efuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x x x x x x o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x i i i"; - ; - - memory "lock" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; -; - -#------------------------------------------------------------ -# ATmega168P -#------------------------------------------------------------ - -part - id = "m168p"; - desc = "ATMEGA168P"; - has_debugwire = yes; - flash_instr = 0xB6, 0x01, 0x11; - eeprom_instr = 0xBD, 0xF2, 0xBD, 0xE1, 0xBB, 0xCF, 0xB4, 0x00, - 0xBE, 0x01, 0xB6, 0x01, 0xBC, 0x00, 0xBB, 0xBF, - 0x99, 0xF9, 0xBB, 0xAF; - stk500_devcode = 0x86; - # avr910_devcode = 0x; - signature = 0x1e 0x94 0x0b; - pagel = 0xd7; - bs2 = 0xc2; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - resetdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - memory "eeprom" - paged = no; - page_size = 4; - size = 512; - min_write_delay = 3600; - max_write_delay = 3600; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " 0 0 0 x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 0 x x x x a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x x x a8", - " a7 a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 20; - blocksize = 4; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 16384; - page_size = 128; - num_pages = 128; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 0 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 0 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 0 a12 a11 a10 a9 a8", - " a7 a6 x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 128; - readsize = 256; - - ; - - memory "lfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "hfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "efuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x x x x x x o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x i i i"; - ; - - memory "lock" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; -; - -#------------------------------------------------------------ -# ATtiny88 -#------------------------------------------------------------ - -part - id = "t88"; - desc = "attiny88"; - has_debugwire = yes; - flash_instr = 0xB6, 0x01, 0x11; - eeprom_instr = 0xBD, 0xF2, 0xBD, 0xE1, 0xBB, 0xCF, 0xB4, 0x00, - 0xBE, 0x01, 0xB6, 0x01, 0xBC, 0x00, 0xBB, 0xBF, - 0x99, 0xF9, 0xBB, 0xAF; - stk500_devcode = 0x73; -# avr910_devcode = 0x; - signature = 0x1e 0x93 0x11; - pagel = 0xd7; - bs2 = 0xc2; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - resetdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - memory "eeprom" - paged = no; - page_size = 4; - size = 64; - min_write_delay = 3600; - max_write_delay = 3600; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " 0 0 0 x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x x x x", - " x a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 20; - blocksize = 4; - readsize = 64; - ; - memory "flash" - paged = yes; - size = 8192; - page_size = 64; - num_pages = 128; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 64; - readsize = 256; - ; - - memory "lfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "hfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "efuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x x x x x x o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x x x i"; - ; - - memory "lock" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATmega328P -#------------------------------------------------------------ - -part - id = "m328p"; - desc = "ATMEGA328P"; - has_debugwire = yes; - flash_instr = 0xB6, 0x01, 0x11; - eeprom_instr = 0xBD, 0xF2, 0xBD, 0xE1, 0xBB, 0xCF, 0xB4, 0x00, - 0xBE, 0x01, 0xB6, 0x01, 0xBC, 0x00, 0xBB, 0xBF, - 0x99, 0xF9, 0xBB, 0xAF; - stk500_devcode = 0x86; - # avr910_devcode = 0x; - signature = 0x1e 0x95 0x0F; - pagel = 0xd7; - bs2 = 0xc2; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - resetdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - memory "eeprom" - paged = no; - page_size = 4; - size = 1024; - min_write_delay = 3600; - max_write_delay = 3600; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " 0 0 0 x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 0 x x x a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x x a9 a8", - " a7 a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 20; - blocksize = 4; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 32768; - page_size = 128; - num_pages = 256; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 a13 a12 a11 a10 a9 a8", - " a7 a6 x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 128; - readsize = 256; - - ; - - memory "lfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "hfuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - ; - - memory "efuse" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x x x x x x o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x i i i"; - ; - - memory "lock" - size = 1; - min_write_delay = 4500; - max_write_delay = 4500; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; -; - -#------------------------------------------------------------ -# ATtiny2313 -#------------------------------------------------------------ - -part - id = "t2313"; - desc = "ATtiny2313"; - has_debugwire = yes; - flash_instr = 0xB2, 0x0F, 0x1F; - eeprom_instr = 0xBB, 0xFE, 0xBB, 0xEE, 0xBB, 0xCC, 0xB2, 0x0D, - 0xBA, 0x0F, 0xB2, 0x0F, 0xBA, 0x0D, 0xBB, 0xBC, - 0x99, 0xE1, 0xBB, 0xAC; - stk500_devcode = 0x23; -## Use the ATtiny26 devcode: - avr910_devcode = 0x5e; - signature = 0x1e 0x91 0x0a; - pagel = 0xD4; - bs2 = 0xD6; - reset = io; - chip_erase_delay = 9000; - - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0E, 0x1E, 0x2E, 0x3E, 0x2E, 0x3E, - 0x4E, 0x5E, 0x4E, 0x5E, 0x6E, 0x7E, 0x6E, 0x7E, - 0x26, 0x36, 0x66, 0x76, 0x2A, 0x3A, 0x6A, 0x7A, - 0x2E, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - memory "eeprom" - size = 128; - paged = no; - page_size = 4; - min_write_delay = 4000; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = "1 0 1 0 0 0 0 0 0 0 0 x x x x x", - "x a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = "1 1 0 0 0 0 0 0 0 0 0 x x x x x", - "x a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x x x x", - " x a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 4; - readsize = 256; - ; - memory "flash" - paged = yes; - size = 2048; - page_size = 32; - num_pages = 64; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 0 0 0 0 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 0 0 0 0 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - -# The information in the data sheet of April/2004 is wrong, this works: - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " x x x x a3 a2 a1 a0", - " i i i i i i i i"; - -# The information in the data sheet of April/2004 is wrong, this works: - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 x x x x x", - " x x x x a3 a2 a1 a0", - " i i i i i i i i"; - -# The information in the data sheet of April/2004 is wrong, this works: - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 0 0 0 0 a9 a8", - " a7 a6 a5 a4 x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 32; - readsize = 256; - ; -# ATtiny2313 has Signature Bytes: 0x1E 0x91 0x0A. - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - memory "lock" - size = 1; - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x x x i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; -# The Tiny2313 has calibration data for both 4 MHz and 8 MHz. -# The information in the data sheet of April/2004 is wrong, this works: - - memory "calibration" - size = 2; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATtiny4313 -#------------------------------------------------------------ - -part - id = "t4313"; - desc = "ATtiny4313"; - has_debugwire = yes; - flash_instr = 0xB2, 0x0F, 0x1F; - eeprom_instr = 0xBB, 0xFE, 0xBB, 0xEE, 0xBB, 0xCC, 0xB2, 0x0D, - 0xBA, 0x0F, 0xB2, 0x0F, 0xBA, 0x0D, 0xBB, 0xBC, - 0x99, 0xE1, 0xBB, 0xAC; - stk500_devcode = 0x23; -## Use the ATtiny26 devcode: - avr910_devcode = 0x5e; - signature = 0x1e 0x92 0x0d; - pagel = 0xD4; - bs2 = 0xD6; - reset = io; - chip_erase_delay = 9000; - - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0E, 0x1E, 0x2E, 0x3E, 0x2E, 0x3E, - 0x4E, 0x5E, 0x4E, 0x5E, 0x6E, 0x7E, 0x6E, 0x7E, - 0x26, 0x36, 0x66, 0x76, 0x2A, 0x3A, 0x6A, 0x7A, - 0x2E, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - memory "eeprom" - size = 256; - paged = no; - page_size = 4; - min_write_delay = 4000; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = "1 0 1 0 0 0 0 0 0 0 0 x x x x x", - "a7 a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = "1 1 0 0 0 0 0 0 0 0 0 x x x x x", - "a7 a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x x x x", - " a7 a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 4; - readsize = 256; - ; - memory "flash" - paged = yes; - size = 4096; - page_size = 64; - num_pages = 64; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 0 0 0 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 0 0 0 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 0 0 0 a10 a9 a8", - " a7 a6 a5 x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 32; - readsize = 256; - ; -# ATtiny4313 has Signature Bytes: 0x1E 0x92 0x0D. - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - memory "lock" - size = 1; - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x x x i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "calibration" - size = 2; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# AT90PWM2 -#------------------------------------------------------------ - -part - id = "pwm2"; - desc = "AT90PWM2"; - has_debugwire = yes; - flash_instr = 0xB6, 0x01, 0x11; - eeprom_instr = 0xBD, 0xF2, 0xBD, 0xE1, 0xBB, 0xCF, 0xB4, 0x00, - 0xBE, 0x01, 0xB6, 0x01, 0xBC, 0x00, 0xBB, 0xBF, - 0x99, 0xF9, 0xBB, 0xAF; - stk500_devcode = 0x65; -## avr910_devcode = ?; - signature = 0x1e 0x93 0x81; - pagel = 0xD8; - bs2 = 0xE2; - reset = io; - chip_erase_delay = 9000; - - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - memory "eeprom" - size = 512; - paged = no; - page_size = 4; - min_write_delay = 4000; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = "1 0 1 0 0 0 0 0 0 0 0 x x x x a8", - "a7 a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = "1 1 0 0 0 0 0 0 0 0 0 x x x x a8", - "a7 a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x x x x", - " a7 a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 4; - readsize = 256; - ; - memory "flash" - paged = yes; - size = 8192; - page_size = 64; - num_pages = 128; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 64; - readsize = 256; - ; -# AT90PWM2 has Signature Bytes: 0x1E 0x93 0x81. - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - memory "lock" - size = 1; - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x x x i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# AT90PWM3 -#------------------------------------------------------------ - -# Completely identical to AT90PWM2 (including the signature!) - -part - id = "pwm3"; - desc = "AT90PWM3"; - has_debugwire = yes; - flash_instr = 0xB6, 0x01, 0x11; - eeprom_instr = 0xBD, 0xF2, 0xBD, 0xE1, 0xBB, 0xCF, 0xB4, 0x00, - 0xBE, 0x01, 0xB6, 0x01, 0xBC, 0x00, 0xBB, 0xBF, - 0x99, 0xF9, 0xBB, 0xAF; - stk500_devcode = 0x65; -## avr910_devcode = ?; - signature = 0x1e 0x93 0x81; - pagel = 0xD8; - bs2 = 0xE2; - reset = io; - chip_erase_delay = 9000; - - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - memory "eeprom" - size = 512; - paged = no; - page_size = 4; - min_write_delay = 4000; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = "1 0 1 0 0 0 0 0 0 0 0 x x x x a8", - "a7 a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = "1 1 0 0 0 0 0 0 0 0 0 x x x x a8", - "a7 a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x x x x", - " a7 a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 4; - readsize = 256; - ; - memory "flash" - paged = yes; - size = 8192; - page_size = 64; - num_pages = 128; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 64; - readsize = 256; - ; -# AT90PWM2 has Signature Bytes: 0x1E 0x93 0x81. - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - memory "lock" - size = 1; - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x x x i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# AT90PWM2B -#------------------------------------------------------------ -# Same as AT90PWM2 but different signature. - -part - id = "pwm2b"; - desc = "AT90PWM2B"; - has_debugwire = yes; - flash_instr = 0xB6, 0x01, 0x11; - eeprom_instr = 0xBD, 0xF2, 0xBD, 0xE1, 0xBB, 0xCF, 0xB4, 0x00, - 0xBE, 0x01, 0xB6, 0x01, 0xBC, 0x00, 0xBB, 0xBF, - 0x99, 0xF9, 0xBB, 0xAF; - stk500_devcode = 0x65; -## avr910_devcode = ?; - signature = 0x1e 0x93 0x83; - pagel = 0xD8; - bs2 = 0xE2; - reset = io; - chip_erase_delay = 9000; - - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - memory "eeprom" - size = 512; - paged = no; - page_size = 4; - min_write_delay = 4000; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = "1 0 1 0 0 0 0 0 0 0 0 x x x x a8", - "a7 a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = "1 1 0 0 0 0 0 0 0 0 0 x x x x a8", - "a7 a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x x x x", - " a7 a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 4; - readsize = 256; - ; - memory "flash" - paged = yes; - size = 8192; - page_size = 64; - num_pages = 128; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 64; - readsize = 256; - ; - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - memory "lock" - size = 1; - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x x x i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# AT90PWM3B -#------------------------------------------------------------ - -# Completely identical to AT90PWM2B (including the signature!) - -part - id = "pwm3b"; - desc = "AT90PWM3B"; - has_debugwire = yes; - flash_instr = 0xB6, 0x01, 0x11; - eeprom_instr = 0xBD, 0xF2, 0xBD, 0xE1, 0xBB, 0xCF, 0xB4, 0x00, - 0xBE, 0x01, 0xB6, 0x01, 0xBC, 0x00, 0xBB, 0xBF, - 0x99, 0xF9, 0xBB, 0xAF; - stk500_devcode = 0x65; -## avr910_devcode = ?; - signature = 0x1e 0x93 0x83; - pagel = 0xD8; - bs2 = 0xE2; - reset = io; - chip_erase_delay = 9000; - - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - memory "eeprom" - size = 512; - paged = no; - page_size = 4; - min_write_delay = 4000; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = "1 0 1 0 0 0 0 0 0 0 0 x x x x a8", - "a7 a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = "1 1 0 0 0 0 0 0 0 0 0 x x x x a8", - "a7 a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x x x x", - " a7 a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 4; - readsize = 256; - ; - memory "flash" - paged = yes; - size = 8192; - page_size = 64; - num_pages = 128; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 64; - readsize = 256; - ; - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - memory "lock" - size = 1; - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x x x i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATtiny25 -#------------------------------------------------------------ - -part - id = "t25"; - desc = "ATtiny25"; - has_debugwire = yes; - flash_instr = 0xB4, 0x02, 0x12; - eeprom_instr = 0xBB, 0xFF, 0xBB, 0xEE, 0xBB, 0xCC, 0xB2, 0x0D, - 0xBC, 0x02, 0xB4, 0x02, 0xBA, 0x0D, 0xBB, 0xBC, - 0x99, 0xE1, 0xBB, 0xAC; -## no STK500 devcode in XML file, use the ATtiny45 one - stk500_devcode = 0x14; -## avr910_devcode = ?; -## Try the AT90S2313 devcode: - avr910_devcode = 0x20; - signature = 0x1e 0x91 0x08; - reset = io; - chip_erase_delay = 4500; - - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - hvsp_controlstack = - 0x4C, 0x0C, 0x1C, 0x2C, 0x3C, 0x64, 0x74, 0x66, - 0x68, 0x78, 0x68, 0x68, 0x7A, 0x6A, 0x68, 0x78, - 0x78, 0x7D, 0x6D, 0x0C, 0x80, 0x40, 0x20, 0x10, - 0x11, 0x08, 0x04, 0x02, 0x03, 0x08, 0x04, 0x00; - hventerstabdelay = 100; - hvspcmdexedelay = 0; - synchcycles = 6; - latchcycles = 1; - togglevtg = 1; - poweroffdelay = 25; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 100; - resetdelay = 25; - chiperasepolltimeout = 40; - chiperasetime = 0; - programfusepolltimeout = 25; - programlockpolltimeout = 25; - - memory "eeprom" - size = 128; - paged = no; - page_size = 4; - min_write_delay = 4000; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = "1 0 1 0 0 0 0 0 0 0 0 x x x x x", - "x a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = "1 1 0 0 0 0 0 0 0 0 0 x x x x x", - "x a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x x x x", - " x a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 4; - readsize = 256; - ; - memory "flash" - paged = yes; - size = 2048; - page_size = 32; - num_pages = 64; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 0 0 0 0 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 0 0 0 0 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " x x x x a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 x x x x x", - " x x x x a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 0 0 0 0 a9 a8", - " a7 a6 a5 a4 x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 32; - readsize = 256; - ; -# ATtiny25 has Signature Bytes: 0x1E 0x91 0x08. - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - memory "lock" - size = 1; - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x x x i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "calibration" - size = 2; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATtiny45 -#------------------------------------------------------------ - -part - id = "t45"; - desc = "ATtiny45"; - has_debugwire = yes; - flash_instr = 0xB4, 0x02, 0x12; - eeprom_instr = 0xBB, 0xFF, 0xBB, 0xEE, 0xBB, 0xCC, 0xB2, 0x0D, - 0xBC, 0x02, 0xB4, 0x02, 0xBA, 0x0D, 0xBB, 0xBC, - 0x99, 0xE1, 0xBB, 0xAC; - stk500_devcode = 0x14; -## avr910_devcode = ?; -## Try the AT90S2313 devcode: - avr910_devcode = 0x20; - signature = 0x1e 0x92 0x06; - reset = io; - chip_erase_delay = 4500; - - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - hvsp_controlstack = - 0x4C, 0x0C, 0x1C, 0x2C, 0x3C, 0x64, 0x74, 0x66, - 0x68, 0x78, 0x68, 0x68, 0x7A, 0x6A, 0x68, 0x78, - 0x78, 0x7D, 0x6D, 0x0C, 0x80, 0x40, 0x20, 0x10, - 0x11, 0x08, 0x04, 0x02, 0x03, 0x08, 0x04, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - hvspcmdexedelay = 0; - synchcycles = 6; - latchcycles = 1; - togglevtg = 1; - poweroffdelay = 25; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 100; - resetdelay = 25; - chiperasepolltimeout = 40; - chiperasetime = 0; - programfusepolltimeout = 25; - programlockpolltimeout = 25; - - memory "eeprom" - size = 256; - page_size = 4; - min_write_delay = 4000; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = "1 0 1 0 0 0 0 0 0 0 0 x x x x x", - "a7 a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = "1 1 0 0 0 0 0 0 0 0 0 x x x x x", - "a7 a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x x x x", - " a7 a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 4; - readsize = 256; - ; - memory "flash" - paged = yes; - size = 4096; - page_size = 64; - num_pages = 64; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 0 0 0 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 0 0 0 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 0 0 0 a10 a9 a8", - " a7 a6 a5 x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 32; - readsize = 256; - ; -# ATtiny45 has Signature Bytes: 0x1E 0x92 0x08. (Data sheet 2586C-AVR-06/05 (doc2586.pdf) indicates otherwise!) - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - memory "lock" - size = 1; - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x x x i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "calibration" - size = 2; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATtiny85 -#------------------------------------------------------------ - -part - id = "t85"; - desc = "ATtiny85"; - has_debugwire = yes; - flash_instr = 0xB4, 0x02, 0x12; - eeprom_instr = 0xBB, 0xFF, 0xBB, 0xEE, 0xBB, 0xCC, 0xB2, 0x0D, - 0xBC, 0x02, 0xB4, 0x02, 0xBA, 0x0D, 0xBB, 0xBC, - 0x99, 0xE1, 0xBB, 0xAC; -## no STK500 devcode in XML file, use the ATtiny45 one - stk500_devcode = 0x14; -## avr910_devcode = ?; -## Try the AT90S2313 devcode: - avr910_devcode = 0x20; - signature = 0x1e 0x93 0x0b; - reset = io; - chip_erase_delay = 4500; - - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - hvsp_controlstack = - 0x4C, 0x0C, 0x1C, 0x2C, 0x3C, 0x64, 0x74, 0x66, - 0x68, 0x78, 0x68, 0x68, 0x7A, 0x6A, 0x68, 0x78, - 0x78, 0x7D, 0x6D, 0x0C, 0x80, 0x40, 0x20, 0x10, - 0x11, 0x08, 0x04, 0x02, 0x03, 0x08, 0x04, 0x00; - hventerstabdelay = 100; - hvspcmdexedelay = 0; - synchcycles = 6; - latchcycles = 1; - togglevtg = 1; - poweroffdelay = 25; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 100; - resetdelay = 25; - chiperasepolltimeout = 40; - chiperasetime = 0; - programfusepolltimeout = 25; - programlockpolltimeout = 25; - - memory "eeprom" - size = 512; - paged = no; - page_size = 4; - min_write_delay = 4000; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = "1 0 1 0 0 0 0 0 0 0 0 x x x x a8", - "a7 a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = "1 1 0 0 0 0 0 0 0 0 0 x x x x a8", - "a7 a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x x x a8", - " a7 a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 4; - readsize = 256; - ; - memory "flash" - paged = yes; - size = 8192; - page_size = 64; - num_pages = 128; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 32; - readsize = 256; - ; -# ATtiny85 has Signature Bytes: 0x1E 0x93 0x08. - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - memory "lock" - size = 1; - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x x x i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "calibration" - size = 2; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATmega640 -#------------------------------------------------------------ -# Almost same as ATmega1280, except for different memory sizes - -part - id = "m640"; - desc = "ATMEGA640"; - signature = 0x1e 0x96 0x08; - has_jtag = yes; -# stk500_devcode = 0xB2; -# avr910_devcode = 0x43; - chip_erase_delay = 9000; - pagel = 0xD7; - bs2 = 0xA0; - reset = dedicated; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - idr = 0x31; - spmcr = 0x57; - rampz = 0x3b; - allowfullpagebitstream = no; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 8; /* for parallel programming */ - size = 4096; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0x00; - readback_p2 = 0x00; - read = " 1 0 1 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 0 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 10; - blocksize = 8; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 65536; - page_size = 256; - num_pages = 256; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0x00; - readback_p2 = 0x00; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 a14 a13 a12 a11 a10 a9 a8", - " a7 x x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 10; - blocksize = 256; - readsize = 256; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 x x x x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATmega1280 -#------------------------------------------------------------ - -part - id = "m1280"; - desc = "ATMEGA1280"; - signature = 0x1e 0x97 0x03; - has_jtag = yes; -# stk500_devcode = 0xB2; -# avr910_devcode = 0x43; - chip_erase_delay = 9000; - pagel = 0xD7; - bs2 = 0xA0; - reset = dedicated; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - idr = 0x31; - spmcr = 0x57; - rampz = 0x3b; - allowfullpagebitstream = no; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 8; /* for parallel programming */ - size = 4096; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0x00; - readback_p2 = 0x00; - read = " 1 0 1 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 0 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 10; - blocksize = 8; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 131072; - page_size = 256; - num_pages = 512; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0x00; - readback_p2 = 0x00; - read_lo = " 0 0 1 0 0 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 x x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 10; - blocksize = 256; - readsize = 256; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 x x x x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATmega1281 -#------------------------------------------------------------ -# Identical to ATmega1280 - -part - id = "m1281"; - desc = "ATMEGA1281"; - signature = 0x1e 0x97 0x04; - has_jtag = yes; -# stk500_devcode = 0xB2; -# avr910_devcode = 0x43; - chip_erase_delay = 9000; - pagel = 0xD7; - bs2 = 0xA0; - reset = dedicated; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - idr = 0x31; - spmcr = 0x57; - rampz = 0x3b; - allowfullpagebitstream = no; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 8; /* for parallel programming */ - size = 4096; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0x00; - readback_p2 = 0x00; - read = " 1 0 1 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 0 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 10; - blocksize = 8; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 131072; - page_size = 256; - num_pages = 512; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0x00; - readback_p2 = 0x00; - read_lo = " 0 0 1 0 0 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 x x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 10; - blocksize = 256; - readsize = 256; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 x x x x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATmega2560 -#------------------------------------------------------------ - -part - id = "m2560"; - desc = "ATMEGA2560"; - signature = 0x1e 0x98 0x01; - has_jtag = yes; -# stk500_devcode = 0xB2; -# avr910_devcode = 0x43; - chip_erase_delay = 9000; - pagel = 0xD7; - bs2 = 0xA0; - reset = dedicated; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x02; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - idr = 0x31; - spmcr = 0x57; - rampz = 0x3b; - allowfullpagebitstream = no; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 8; /* for parallel programming */ - size = 4096; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0x00; - readback_p2 = 0x00; - read = " 1 0 1 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 0 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 10; - blocksize = 8; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 262144; - page_size = 256; - num_pages = 1024; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0x00; - readback_p2 = 0x00; - read_lo = " 0 0 1 0 0 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 x x x x x x x", - " x x x x x x x x"; - - load_ext_addr = " 0 1 0 0 1 1 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 0 a16", - " 0 0 0 0 0 0 0 0"; - - mode = 0x41; - delay = 10; - blocksize = 256; - readsize = 256; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 x x x x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATmega2561 -#------------------------------------------------------------ - -part - id = "m2561"; - desc = "ATMEGA2561"; - signature = 0x1e 0x98 0x02; - has_jtag = yes; -# stk500_devcode = 0xB2; -# avr910_devcode = 0x43; - chip_erase_delay = 9000; - pagel = 0xD7; - bs2 = 0xA0; - reset = dedicated; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x02; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - idr = 0x31; - spmcr = 0x57; - rampz = 0x3b; - allowfullpagebitstream = no; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 8; /* for parallel programming */ - size = 4096; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0x00; - readback_p2 = 0x00; - read = " 1 0 1 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 0 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 10; - blocksize = 8; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 262144; - page_size = 256; - num_pages = 1024; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0x00; - readback_p2 = 0x00; - read_lo = " 0 0 1 0 0 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 x x x x x x x", - " x x x x x x x x"; - - load_ext_addr = " 0 1 0 0 1 1 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 0 a16", - " 0 0 0 0 0 0 0 0"; - - mode = 0x41; - delay = 10; - blocksize = 256; - readsize = 256; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 x x x x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATmega128RFA1 -#------------------------------------------------------------ -# Identical to ATmega2561 but half the ROM - -part - id = "m128rfa1"; - desc = "ATMEGA128RFA1"; - signature = 0x1e 0xa7 0x01; - has_jtag = yes; -# stk500_devcode = 0xB2; -# avr910_devcode = 0x43; - chip_erase_delay = 55000; - pagel = 0xD7; - bs2 = 0xE2; - reset = dedicated; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x02; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - idr = 0x31; - spmcr = 0x57; - rampz = 0x3b; - allowfullpagebitstream = no; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 8; /* for parallel programming */ - size = 4096; - min_write_delay = 50000; - max_write_delay = 50000; - readback_p1 = 0x00; - readback_p2 = 0x00; - read = " 1 0 1 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 0 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 10; - blocksize = 8; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 131072; - page_size = 256; - num_pages = 512; - min_write_delay = 50000; - max_write_delay = 50000; - readback_p1 = 0x00; - readback_p2 = 0x00; - read_lo = " 0 0 1 0 0 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 x x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 20; - blocksize = 256; - readsize = 256; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 x x x x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATtiny24 -#------------------------------------------------------------ - -part - id = "t24"; - desc = "ATtiny24"; - has_debugwire = yes; - flash_instr = 0xB4, 0x07, 0x17; - eeprom_instr = 0xBB, 0xFF, 0xBB, 0xEE, 0xBB, 0xCC, 0xB2, 0x0D, - 0xBC, 0x07, 0xB4, 0x07, 0xBA, 0x0D, 0xBB, 0xBC, - 0x99, 0xE1, 0xBB, 0xAC; -## no STK500 devcode in XML file, use the ATtiny45 one - stk500_devcode = 0x14; -## avr910_devcode = ?; -## Try the AT90S2313 devcode: - avr910_devcode = 0x20; - signature = 0x1e 0x91 0x0b; - reset = io; - chip_erase_delay = 4500; - - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - hvsp_controlstack = - 0x4C, 0x0C, 0x1C, 0x2C, 0x3C, 0x64, 0x74, 0x66, - 0x68, 0x78, 0x68, 0x68, 0x7A, 0x6A, 0x68, 0x78, - 0x78, 0x7D, 0x6D, 0x0C, 0x80, 0x40, 0x20, 0x10, - 0x11, 0x08, 0x04, 0x02, 0x03, 0x08, 0x04, 0x0F; - hventerstabdelay = 100; - hvspcmdexedelay = 0; - synchcycles = 6; - latchcycles = 1; - togglevtg = 1; - poweroffdelay = 25; - resetdelayms = 0; - resetdelayus = 70; - hvleavestabdelay = 100; - resetdelay = 25; - chiperasepolltimeout = 40; - chiperasetime = 0; - programfusepolltimeout = 25; - programlockpolltimeout = 25; - - memory "eeprom" - size = 128; - paged = no; - page_size = 4; - min_write_delay = 4000; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = "1 0 1 0 0 0 0 0 0 0 0 x x x x x", - "x a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = "1 1 0 0 0 0 0 0 0 0 0 x x x x x", - "x a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x x x x", - " x a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 4; - readsize = 256; - ; - memory "flash" - paged = yes; - size = 2048; - page_size = 32; - num_pages = 64; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 0 0 0 0 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 0 0 0 0 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " x x x x a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 x x x x x", - " x x x x a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 0 0 0 0 a9 a8", - " a7 a6 a5 a4 x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 32; - readsize = 256; - ; -# ATtiny24 has Signature Bytes: 0x1E 0x91 0x0B. - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - memory "lock" - size = 1; - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x x x x x x x i i"; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x x x i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATtiny44 -#------------------------------------------------------------ - -part - id = "t44"; - desc = "ATtiny44"; - has_debugwire = yes; - flash_instr = 0xB4, 0x07, 0x17; - eeprom_instr = 0xBB, 0xFF, 0xBB, 0xEE, 0xBB, 0xCC, 0xB2, 0x0D, - 0xBC, 0x07, 0xB4, 0x07, 0xBA, 0x0D, 0xBB, 0xBC, - 0x99, 0xE1, 0xBB, 0xAC; -## no STK500 devcode in XML file, use the ATtiny45 one - stk500_devcode = 0x14; -## avr910_devcode = ?; -## Try the AT90S2313 devcode: - avr910_devcode = 0x20; - signature = 0x1e 0x92 0x07; - reset = io; - chip_erase_delay = 4500; - - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - hvsp_controlstack = - 0x4C, 0x0C, 0x1C, 0x2C, 0x3C, 0x64, 0x74, 0x66, - 0x68, 0x78, 0x68, 0x68, 0x7A, 0x6A, 0x68, 0x78, - 0x78, 0x7D, 0x6D, 0x0C, 0x80, 0x40, 0x20, 0x10, - 0x11, 0x08, 0x04, 0x02, 0x03, 0x08, 0x04, 0x0F; - hventerstabdelay = 100; - hvspcmdexedelay = 0; - synchcycles = 6; - latchcycles = 1; - togglevtg = 1; - poweroffdelay = 25; - resetdelayms = 0; - resetdelayus = 70; - hvleavestabdelay = 100; - resetdelay = 25; - chiperasepolltimeout = 40; - chiperasetime = 0; - programfusepolltimeout = 25; - programlockpolltimeout = 25; - - memory "eeprom" - size = 256; - paged = no; - page_size = 4; - min_write_delay = 4000; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = "1 0 1 0 0 0 0 0 0 0 0 x x x x x", - "a7 a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = "1 1 0 0 0 0 0 0 0 0 0 x x x x x", - "a7 a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x x x x", - " x a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 4; - readsize = 256; - ; - memory "flash" - paged = yes; - size = 4096; - page_size = 64; - num_pages = 64; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 0 0 0 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 0 0 0 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 0 0 0 a10 a9 a8", - " a7 a6 a5 x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 32; - readsize = 256; - ; -# ATtiny44 has Signature Bytes: 0x1E 0x92 0x07. - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - memory "lock" - size = 1; - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x x x x x x x i i"; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x x x i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATtiny84 -#------------------------------------------------------------ - -part - id = "t84"; - desc = "ATtiny84"; - has_debugwire = yes; - flash_instr = 0xB4, 0x07, 0x17; - eeprom_instr = 0xBB, 0xFF, 0xBB, 0xEE, 0xBB, 0xCC, 0xB2, 0x0D, - 0xBC, 0x07, 0xB4, 0x07, 0xBA, 0x0D, 0xBB, 0xBC, - 0x99, 0xE1, 0xBB, 0xAC; -## no STK500 devcode in XML file, use the ATtiny45 one - stk500_devcode = 0x14; -## avr910_devcode = ?; -## Try the AT90S2313 devcode: - avr910_devcode = 0x20; - signature = 0x1e 0x93 0x0c; - reset = io; - chip_erase_delay = 4500; - - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - hvsp_controlstack = - 0x4C, 0x0C, 0x1C, 0x2C, 0x3C, 0x64, 0x74, 0x66, - 0x68, 0x78, 0x68, 0x68, 0x7A, 0x6A, 0x68, 0x78, - 0x78, 0x7D, 0x6D, 0x0C, 0x80, 0x40, 0x20, 0x10, - 0x11, 0x08, 0x04, 0x02, 0x03, 0x08, 0x04, 0x0F; - hventerstabdelay = 100; - hvspcmdexedelay = 0; - synchcycles = 6; - latchcycles = 1; - togglevtg = 1; - poweroffdelay = 25; - resetdelayms = 0; - resetdelayus = 70; - hvleavestabdelay = 100; - resetdelay = 25; - chiperasepolltimeout = 40; - chiperasetime = 0; - programfusepolltimeout = 25; - programlockpolltimeout = 25; - - memory "eeprom" - size = 512; - paged = no; - page_size = 4; - min_write_delay = 4000; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = "1 0 1 0 0 0 0 0 0 0 0 x x x x a8", - "a7 a6 a5 a4 a3 a2 a1 a0 o o o o o o o o"; - - write = "1 1 0 0 0 0 0 0 0 0 0 x x x x a8", - "a7 a6 a5 a4 a3 a2 a1 a0 i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x x x x", - " x a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 4; - readsize = 256; - ; - memory "flash" - paged = yes; - size = 8192; - page_size = 64; - num_pages = 128; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 x x x x x", - " x x x a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 32; - readsize = 256; - ; -# ATtiny84 has Signature Bytes: 0x1E 0x93 0x0C. - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - - memory "lock" - size = 1; - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x x x x x x x i i"; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x x x x i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATmega32u4 -#------------------------------------------------------------ - -part - id = "m32u4"; - desc = "ATmega32U4"; - signature = 0x1e 0x95 0x87; - has_jtag = yes; -# stk500_devcode = 0xB2; -# avr910_devcode = 0x43; - chip_erase_delay = 9000; - pagel = 0xD7; - bs2 = 0xA0; - reset = dedicated; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - idr = 0x31; - spmcr = 0x57; - rampz = 0x3b; - allowfullpagebitstream = no; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 8; /* for parallel programming */ - size = 1024; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0x00; - readback_p2 = 0x00; - read = " 1 0 1 0 0 0 0 0", - " x x x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " x x x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x a10 a9 a8", - " a7 a6 a5 a4 a3 0 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 10; - blocksize = 8; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 32768; - page_size = 128; - num_pages = 256; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0x00; - readback_p2 = 0x00; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 128; - readsize = 256; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 x x x x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# AT90USB646 -#------------------------------------------------------------ - -part - id = "usb646"; - desc = "AT90USB646"; - signature = 0x1e 0x96 0x82; - has_jtag = yes; -# stk500_devcode = 0xB2; -# avr910_devcode = 0x43; - chip_erase_delay = 9000; - pagel = 0xD7; - bs2 = 0xA0; - reset = dedicated; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - idr = 0x31; - spmcr = 0x57; - rampz = 0x3b; - allowfullpagebitstream = no; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 8; /* for parallel programming */ - size = 2048; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0x00; - readback_p2 = 0x00; - read = " 1 0 1 0 0 0 0 0", - " x x x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " x x x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x a10 a9 a8", - " a7 a6 a5 a4 a3 0 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 10; - blocksize = 8; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 65536; - page_size = 256; - num_pages = 256; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0x00; - readback_p2 = 0x00; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 a14 a13 a12 a11 a10 a9 a8", - " a7 x x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 256; - readsize = 256; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 x x x x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# AT90USB647 -#------------------------------------------------------------ -# identical to AT90USB646 - -part - id = "usb647"; - desc = "AT90USB647"; - signature = 0x1e 0x96 0x82; - has_jtag = yes; -# stk500_devcode = 0xB2; -# avr910_devcode = 0x43; - chip_erase_delay = 9000; - pagel = 0xD7; - bs2 = 0xA0; - reset = dedicated; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - idr = 0x31; - spmcr = 0x57; - rampz = 0x3b; - allowfullpagebitstream = no; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 8; /* for parallel programming */ - size = 2048; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0x00; - readback_p2 = 0x00; - read = " 1 0 1 0 0 0 0 0", - " x x x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " x x x x x a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x a10 a9 a8", - " a7 a6 a5 a4 a3 0 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 10; - blocksize = 8; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 65536; - page_size = 256; - num_pages = 256; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0x00; - readback_p2 = 0x00; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 a14 a13 a12 a11 a10 a9 a8", - " a7 x x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 256; - readsize = 256; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 x x x x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# AT90USB1286 -#------------------------------------------------------------ - -part - id = "usb1286"; - desc = "AT90USB1286"; - signature = 0x1e 0x97 0x82; - has_jtag = yes; -# stk500_devcode = 0xB2; -# avr910_devcode = 0x43; - chip_erase_delay = 9000; - pagel = 0xD7; - bs2 = 0xA0; - reset = dedicated; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - idr = 0x31; - spmcr = 0x57; - rampz = 0x3b; - allowfullpagebitstream = no; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 8; /* for parallel programming */ - size = 4096; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0x00; - readback_p2 = 0x00; - read = " 1 0 1 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x a10 a9 a8", - " a7 a6 a5 a4 a3 0 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 10; - blocksize = 8; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 131072; - page_size = 256; - num_pages = 512; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0x00; - readback_p2 = 0x00; - read_lo = " 0 0 1 0 0 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 x x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 256; - readsize = 256; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 x x x x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# AT90USB1287 -#------------------------------------------------------------ -# identical to AT90USB1286 - -part - id = "usb1287"; - desc = "AT90USB1287"; - signature = 0x1e 0x97 0x82; - has_jtag = yes; -# stk500_devcode = 0xB2; -# avr910_devcode = 0x43; - chip_erase_delay = 9000; - pagel = 0xD7; - bs2 = 0xA0; - reset = dedicated; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "x x x x x x x x x x x x x x x x"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - idr = 0x31; - spmcr = 0x57; - rampz = 0x3b; - allowfullpagebitstream = no; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 8; /* for parallel programming */ - size = 4096; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0x00; - readback_p2 = 0x00; - read = " 1 0 1 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " x x x x a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 x x x a10 a9 a8", - " a7 a6 a5 a4 a3 0 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 10; - blocksize = 8; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 131072; - page_size = 256; - num_pages = 512; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0x00; - readback_p2 = 0x00; - read_lo = " 0 0 1 0 0 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 x x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 256; - readsize = 256; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x x x x x i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 x x x x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 x x x x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - - -#------------------------------------------------------------ -# AT90USB162 -#------------------------------------------------------------ - -part - id = "usb162"; - desc = "AT90USB162"; - has_jtag = no; - has_debugwire = yes; - signature = 0x1e 0x94 0x82; - chip_erase_delay = 9000; - reset = io; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - pagel = 0xD7; - bs2 = 0xC6; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 4; /* for parallel programming */ - size = 512; - num_pages = 128; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0x00; - readback_p2 = 0x00; - read = " 1 0 1 0 0 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 20; - blocksize = 4; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 16384; - page_size = 128; - num_pages = 128; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0x00; - readback_p2 = 0x00; - read_lo = " 0 0 1 0 0 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 128; - readsize = 256; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# AT90USB82 -#------------------------------------------------------------ -# Changes against AT90USB162 (beside IDs) -# memory "flash" -# size = 8192; -# num_pages = 64; - -part - id = "usb82"; - desc = "AT90USB82"; - has_jtag = no; - has_debugwire = yes; - signature = 0x1e 0x93 0x82; - chip_erase_delay = 9000; - reset = io; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - pagel = 0xD7; - bs2 = 0xC6; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 4; /* for parallel programming */ - size = 512; - num_pages = 128; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0x00; - readback_p2 = 0x00; - read = " 1 0 1 0 0 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 20; - blocksize = 4; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 8192; - page_size = 128; - num_pages = 64; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0x00; - readback_p2 = 0x00; - read_lo = " 0 0 1 0 0 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 128; - readsize = 256; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATmega32U2 -#------------------------------------------------------------ -# Changes against AT90USB162 (beside IDs) -# memory "flash" -# size = 32768; -# num_pages = 256; -# memory "eeprom" -# size = 1024; -# num_pages = 256; -part - id = "m32u2"; - desc = "ATmega32U2"; - has_jtag = no; - has_debugwire = yes; - signature = 0x1e 0x95 0x8a; - chip_erase_delay = 9000; - reset = io; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - pagel = 0xD7; - bs2 = 0xC6; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 4; /* for parallel programming */ - size = 1024; - num_pages = 256; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0x00; - readback_p2 = 0x00; - read = " 1 0 1 0 0 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 20; - blocksize = 4; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 32768; - page_size = 128; - num_pages = 256; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0x00; - readback_p2 = 0x00; - read_lo = " 0 0 1 0 0 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 128; - readsize = 256; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; -#------------------------------------------------------------ -# ATmega16U2 -#------------------------------------------------------------ -# Changes against ATmega32U2 (beside IDs) -# memory "flash" -# size = 16384; -# num_pages = 128; -# memory "eeprom" -# size = 512; -# num_pages = 128; -part - id = "m16u2"; - desc = "ATmega16U2"; - has_jtag = no; - has_debugwire = yes; - signature = 0x1e 0x94 0x89; - chip_erase_delay = 9000; - reset = io; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - pagel = 0xD7; - bs2 = 0xC6; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 4; /* for parallel programming */ - size = 512; - num_pages = 128; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0x00; - readback_p2 = 0x00; - read = " 1 0 1 0 0 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 20; - blocksize = 4; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 16384; - page_size = 128; - num_pages = 128; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0x00; - readback_p2 = 0x00; - read_lo = " 0 0 1 0 0 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 128; - readsize = 256; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATmega8U2 -#------------------------------------------------------------ -# Changes against ATmega16U2 (beside IDs) -# memory "flash" -# size = 8192; -# page_size = 64; -# blocksize = 64; - -part - id = "m8u2"; - desc = "ATmega8U2"; - has_jtag = no; - has_debugwire = yes; - signature = 0x1e 0x93 0x89; - chip_erase_delay = 9000; - reset = io; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "x x x x x x x x x x x x x x x x"; - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 x x x x x", - "x x x x x x x x x x x x x x x x"; - pagel = 0xD7; - bs2 = 0xC6; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 4; /* for parallel programming */ - size = 512; - num_pages = 128; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0x00; - readback_p2 = 0x00; - read = " 1 0 1 0 0 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 0 0 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 20; - blocksize = 4; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 8192; - page_size = 64; - num_pages = 128; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0x00; - readback_p2 = 0x00; - read_lo = " 0 0 1 0 0 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " x x x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " x x x x x x x x", - " x x a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - "a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 x x x x x x", - " x x x x x x x x"; - - mode = 0x41; - delay = 6; - blocksize = 64; - readsize = 256; - ; - - memory "lfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "x x x x x x x x i i i i i i i i"; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "x x x x x x x x o o o o o o o o"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 x x x x x", - "x x x x x x x x 1 1 i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "calibration" - size = 1; - read = "0 0 1 1 1 0 0 0 0 0 0 x x x x x", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 x x x x x", - "x x x x x x a1 a0 o o o o o o o o"; - ; - ; -#------------------------------------------------------------ -# ATmega325 -#------------------------------------------------------------ - -part - id = "m325"; - desc = "ATMEGA325"; - signature = 0x1e 0x95 0x05; - has_jtag = yes; -# stk500_devcode = 0x??; # No STK500v1 support? -# avr910_devcode = 0x??; # Try the ATmega16 one - avr910_devcode = 0x74; - pagel = 0xd7; - bs2 = 0xa0; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - idr = 0x31; - spmcr = 0x57; - allowfullpagebitstream = no; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 4; /* for parallel programming */ - size = 1024; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " 0 0 0 0 0 0 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 0 0 0 0 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 0 0 0 0 a9 a8", - " a7 a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 10; - blocksize = 4; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 32768; - page_size = 128; - num_pages = 256; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 0 0 0 0 0", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 0 0 0 0 0", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " x x x x x x x x"; - - mode = 0x41; - delay = 10; - blocksize = 128; - readsize = 256; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 0 0 0 0 0", - "0 0 0 0 0 0 0 0 1 1 i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lfuse" - size = 1; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "0 0 0 0 0 0 0 0 i i i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "0 0 0 0 0 0 0 0 i i i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "0 0 0 0 0 0 0 0 1 1 1 1 1 i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0", - "0 0 0 0 0 0 a1 a0 o o o o o o o o"; - ; - - memory "calibration" - size = 1; - - read = "0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATmega645 -#------------------------------------------------------------ - -part - id = "m645"; - desc = "ATMEGA645"; - signature = 0x1E 0x96 0x05; - has_jtag = yes; -# stk500_devcode = 0x??; # No STK500v1 support? -# avr910_devcode = 0x??; # Try the ATmega16 one - avr910_devcode = 0x74; - pagel = 0xd7; - bs2 = 0xa0; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - idr = 0x31; - spmcr = 0x57; - allowfullpagebitstream = no; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 8; /* for parallel programming */ - size = 2048; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " 0 0 0 0 0 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 0 0 0 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 0 0 0 a10 a9 a8", - " a7 a6 a5 a4 a3 0 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 10; - blocksize = 8; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 65536; - page_size = 256; - num_pages = 256; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 0 0 0 0 0", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 0 0 0 0 0", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " 0 0 0 0 0 0 0 0"; - - mode = 0x41; - delay = 10; - blocksize = 128; - readsize = 256; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 0 0 0 0 0", - "0 0 0 0 0 0 0 0 1 1 i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lfuse" - size = 1; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "0 0 0 0 0 0 0 0 i i i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "0 0 0 0 0 0 0 0 i i i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "0 0 0 0 0 0 0 0 1 1 1 1 1 i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0", - "0 0 0 0 0 0 a1 a0 o o o o o o o o"; - ; - - memory "calibration" - size = 1; - - read = "0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATmega3250 -#------------------------------------------------------------ - -part - id = "m3250"; - desc = "ATMEGA3250"; - signature = 0x1E 0x95 0x06; - has_jtag = yes; -# stk500_devcode = 0x??; # No STK500v1 support? -# avr910_devcode = 0x??; # Try the ATmega16 one - avr910_devcode = 0x74; - pagel = 0xd7; - bs2 = 0xa0; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - idr = 0x31; - spmcr = 0x57; - allowfullpagebitstream = no; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 4; /* for parallel programming */ - size = 1024; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " 0 0 0 0 0 0 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 0 0 0 0 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 0 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 0 0 0 0 a9 a8", - " a7 a6 a5 a4 a3 a2 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 10; - blocksize = 4; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 32768; - page_size = 128; - num_pages = 256; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " 0 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " 0 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 0 0 0 0 0", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 0 0 0 0 0", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " 0 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " x x x x x x x x"; - - mode = 0x41; - delay = 10; - blocksize = 128; - readsize = 256; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 0 0 0 0 0", - "0 0 0 0 0 0 0 0 1 1 i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lfuse" - size = 1; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "0 0 0 0 0 0 0 0 i i i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "0 0 0 0 0 0 0 0 i i i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "0 0 0 0 0 0 0 0 1 1 1 1 1 i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0", - "0 0 0 0 0 0 a1 a0 o o o o o o o o"; - ; - - memory "calibration" - size = 1; - - read = "0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATmega6450 -#------------------------------------------------------------ - -part - id = "m6450"; - desc = "ATMEGA6450"; - signature = 0x1E 0x96 0x06; - has_jtag = yes; -# stk500_devcode = 0x??; # No STK500v1 support? -# avr910_devcode = 0x??; # Try the ATmega16 one - avr910_devcode = 0x74; - pagel = 0xd7; - bs2 = 0xa0; - chip_erase_delay = 9000; - pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", - "0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0"; - - chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", - "0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0"; - - timeout = 200; - stabdelay = 100; - cmdexedelay = 25; - synchloops = 32; - bytedelay = 0; - pollindex = 3; - pollvalue = 0x53; - predelay = 1; - postdelay = 1; - pollmethod = 1; - - pp_controlstack = - 0x0E, 0x1E, 0x0F, 0x1F, 0x2E, 0x3E, 0x2F, 0x3F, - 0x4E, 0x5E, 0x4F, 0x5F, 0x6E, 0x7E, 0x6F, 0x7F, - 0x66, 0x76, 0x67, 0x77, 0x6A, 0x7A, 0x6B, 0x7B, - 0xBE, 0xFD, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00; - hventerstabdelay = 100; - progmodedelay = 0; - latchcycles = 5; - togglevtg = 1; - poweroffdelay = 15; - resetdelayms = 1; - resetdelayus = 0; - hvleavestabdelay = 15; - chiperasepulsewidth = 0; - chiperasepolltimeout = 10; - programfusepulsewidth = 0; - programfusepolltimeout = 5; - programlockpulsewidth = 0; - programlockpolltimeout = 5; - - idr = 0x31; - spmcr = 0x57; - allowfullpagebitstream = no; - - memory "eeprom" - paged = no; /* leave this "no" */ - page_size = 8; /* for parallel programming */ - size = 2048; - min_write_delay = 9000; - max_write_delay = 9000; - readback_p1 = 0xff; - readback_p2 = 0xff; - read = " 1 0 1 0 0 0 0 0", - " 0 0 0 0 0 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - write = " 1 1 0 0 0 0 0 0", - " 0 0 0 0 0 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_lo = " 1 1 0 0 0 0 0 1", - " 0 0 0 0 0 0 0 0", - " 0 0 0 0 0 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 1 1 0 0 0 0 1 0", - " 0 0 0 0 0 a10 a9 a8", - " a7 a6 a5 a4 a3 0 0 0", - " x x x x x x x x"; - - mode = 0x41; - delay = 10; - blocksize = 4; - readsize = 256; - ; - - memory "flash" - paged = yes; - size = 65536; - page_size = 256; - num_pages = 256; - min_write_delay = 4500; - max_write_delay = 4500; - readback_p1 = 0xff; - readback_p2 = 0xff; - read_lo = " 0 0 1 0 0 0 0 0", - " a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - read_hi = " 0 0 1 0 1 0 0 0", - " a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " o o o o o o o o"; - - loadpage_lo = " 0 1 0 0 0 0 0 0", - " 0 0 0 0 0 0 0 0", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - loadpage_hi = " 0 1 0 0 1 0 0 0", - " 0 0 0 0 0 0 0 0", - " a7 a6 a5 a4 a3 a2 a1 a0", - " i i i i i i i i"; - - writepage = " 0 1 0 0 1 1 0 0", - " a15 a14 a13 a12 a11 a10 a9 a8", - " a7 a6 a5 a4 a3 a2 a1 a0", - " 0 0 0 0 0 0 0 0"; - - mode = 0x41; - delay = 10; - blocksize = 128; - readsize = 256; - ; - - memory "lock" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0", - "x x x x x x x x x x o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 1 1 0 0 0 0 0", - "0 0 0 0 0 0 0 0 1 1 i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "lfuse" - size = 1; - read = "0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 0 0 0", - "0 0 0 0 0 0 0 0 i i i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "hfuse" - size = 1; - read = "0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 1 0 0 0", - "0 0 0 0 0 0 0 0 i i i i i i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "efuse" - size = 1; - - read = "0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - - write = "1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 0", - "0 0 0 0 0 0 0 0 1 1 1 1 1 i i i"; - min_write_delay = 9000; - max_write_delay = 9000; - ; - - memory "signature" - size = 3; - read = "0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0", - "0 0 0 0 0 0 a1 a0 o o o o o o o o"; - ; - - memory "calibration" - size = 1; - - read = "0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0", - "0 0 0 0 0 0 0 0 o o o o o o o o"; - ; - ; - -#------------------------------------------------------------ -# ATXMEGA64A1 -#------------------------------------------------------------ - -part - id = "x64a1"; - desc = "ATXMEGA64A1"; - signature = 0x1e 0x96 0x4e; - has_jtag = yes; - has_pdi = yes; - nvm_base = 0x01c0; - - memory "eeprom" - size = 0x0800; - offset = 0x08c0000; - page_size = 0x20; - readsize = 0x100; - ; - - memory "application" - size = 0x00010000; - offset = 0x0800000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "apptable" - size = 0x00001000; - offset = 0x0080f000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "boot" - size = 0x00001000; - offset = 0x00810000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "flash" - size = 0x00011000; - offset = 0x0800000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "prodsig" - size = 0x200; - offset = 0x8e0200; - page_size = 0x100; - readsize = 0x100; - ; - - memory "usersig" - size = 0x200; - offset = 0x8e0400; - page_size = 0x100; - readsize = 0x100; - ; - - memory "signature" - size = 3; - offset = 0x1000090; - ; - - memory "fuse0" - size = 1; - offset = 0x8f0020; - ; - - memory "fuse1" - size = 1; - offset = 0x8f0021; - ; - - memory "fuse2" - size = 1; - offset = 0x8f0022; - ; - - memory "fuse4" - size = 1; - offset = 0x8f0024; - ; - - memory "fuse5" - size = 1; - offset = 0x8f0025; - ; - - memory "lock" - size = 1; - offset = 0x8f0027; - ; -; - -#------------------------------------------------------------ -# ATXMEGA128A1 -#------------------------------------------------------------ - -part - id = "x128a1"; - desc = "ATXMEGA128A1"; - signature = 0x1e 0x97 0x4c; - has_jtag = yes; - has_pdi = yes; - nvm_base = 0x01c0; - - memory "eeprom" - size = 0x0800; - offset = 0x08c0000; - page_size = 0x20; - readsize = 0x100; - ; - - memory "application" - size = 0x00020000; - offset = 0x0800000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "apptable" - size = 0x00002000; - offset = 0x0081e000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "boot" - size = 0x00002000; - offset = 0x00820000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "flash" - size = 0x00022000; - offset = 0x0800000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "prodsig" - size = 0x200; - offset = 0x8e0200; - page_size = 0x100; - readsize = 0x100; - ; - - memory "usersig" - size = 0x200; - offset = 0x8e0400; - page_size = 0x100; - readsize = 0x100; - ; - - memory "signature" - size = 3; - offset = 0x1000090; - ; - - memory "fuse0" - size = 1; - offset = 0x8f0020; - ; - - memory "fuse1" - size = 1; - offset = 0x8f0021; - ; - - memory "fuse2" - size = 1; - offset = 0x8f0022; - ; - - memory "fuse4" - size = 1; - offset = 0x8f0024; - ; - - memory "fuse5" - size = 1; - offset = 0x8f0025; - ; - - memory "lock" - size = 1; - offset = 0x8f0027; - ; -; - -#------------------------------------------------------------ -# ATXMEGA128A1REVD -#------------------------------------------------------------ - -part - id = "x128a1d"; - desc = "ATXMEGA128A1REVD"; - signature = 0x1e 0x97 0x41; - has_jtag = yes; - has_pdi = yes; - nvm_base = 0x01c0; - - memory "eeprom" - size = 0x0800; - offset = 0x08c0000; - page_size = 0x20; - readsize = 0x100; - ; - - memory "application" - size = 0x00020000; - offset = 0x0800000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "apptable" - size = 0x00002000; - offset = 0x0081e000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "boot" - size = 0x00002000; - offset = 0x00820000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "flash" - size = 0x00022000; - offset = 0x0800000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "prodsig" - size = 0x200; - offset = 0x8e0200; - page_size = 0x100; - readsize = 0x100; - ; - - memory "usersig" - size = 0x200; - offset = 0x8e0400; - page_size = 0x100; - readsize = 0x100; - ; - - memory "signature" - size = 3; - offset = 0x1000090; - ; - - memory "fuse0" - size = 1; - offset = 0x8f0020; - ; - - memory "fuse1" - size = 1; - offset = 0x8f0021; - ; - - memory "fuse2" - size = 1; - offset = 0x8f0022; - ; - - memory "fuse4" - size = 1; - offset = 0x8f0024; - ; - - memory "fuse5" - size = 1; - offset = 0x8f0025; - ; - - memory "lock" - size = 1; - offset = 0x8f0027; - ; -; - -#------------------------------------------------------------ -# ATXMEGA192A1 -#------------------------------------------------------------ - -part - id = "x192a1"; - desc = "ATXMEGA192A1"; - signature = 0x1e 0x97 0x4e; - has_jtag = yes; - has_pdi = yes; - nvm_base = 0x01c0; - - memory "eeprom" - size = 0x0800; - offset = 0x08c0000; - page_size = 0x20; - readsize = 0x100; - ; - - memory "application" - size = 0x00030000; - offset = 0x0800000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "apptable" - size = 0x00002000; - offset = 0x0082e000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "boot" - size = 0x00002000; - offset = 0x00830000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "flash" - size = 0x00032000; - offset = 0x0800000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "prodsig" - size = 0x200; - offset = 0x8e0200; - page_size = 0x100; - readsize = 0x100; - ; - - memory "usersig" - size = 0x200; - offset = 0x8e0400; - page_size = 0x100; - readsize = 0x100; - ; - - memory "signature" - size = 3; - offset = 0x1000090; - ; - - memory "fuse0" - size = 1; - offset = 0x8f0020; - ; - - memory "fuse1" - size = 1; - offset = 0x8f0021; - ; - - memory "fuse2" - size = 1; - offset = 0x8f0022; - ; - - memory "fuse4" - size = 1; - offset = 0x8f0024; - ; - - memory "fuse5" - size = 1; - offset = 0x8f0025; - ; - - memory "lock" - size = 1; - offset = 0x8f0027; - ; -; - -#------------------------------------------------------------ -# ATXMEGA256A1 -#------------------------------------------------------------ - -part - id = "x256a1"; - desc = "ATXMEGA256A1"; - signature = 0x1e 0x98 0x46; - has_jtag = yes; - has_pdi = yes; - nvm_base = 0x01c0; - - memory "eeprom" - size = 0x1000; - offset = 0x08c0000; - page_size = 0x20; - readsize = 0x100; - ; - - memory "application" - size = 0x00040000; - offset = 0x0800000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "apptable" - size = 0x00002000; - offset = 0x0083e000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "boot" - size = 0x00002000; - offset = 0x00840000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "flash" - size = 0x00042000; - offset = 0x0800000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "prodsig" - size = 0x200; - offset = 0x8e0200; - page_size = 0x100; - readsize = 0x100; - ; - - memory "usersig" - size = 0x200; - offset = 0x8e0400; - page_size = 0x100; - readsize = 0x100; - ; - - memory "signature" - size = 3; - offset = 0x1000090; - ; - - memory "fuse0" - size = 1; - offset = 0x8f0020; - ; - - memory "fuse1" - size = 1; - offset = 0x8f0021; - ; - - memory "fuse2" - size = 1; - offset = 0x8f0022; - ; - - memory "fuse4" - size = 1; - offset = 0x8f0024; - ; - - memory "fuse5" - size = 1; - offset = 0x8f0025; - ; - - memory "lock" - size = 1; - offset = 0x8f0027; - ; -; - -#------------------------------------------------------------ -# ATXMEGA64A3 -#------------------------------------------------------------ - -part - id = "x64a3"; - desc = "ATXMEGA64A3"; - signature = 0x1e 0x96 0x42; - has_jtag = yes; - has_pdi = yes; - nvm_base = 0x01c0; - - memory "eeprom" - size = 0x0800; - offset = 0x08c0000; - page_size = 0x20; - readsize = 0x100; - ; - - memory "application" - size = 0x00010000; - offset = 0x0800000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "apptable" - size = 0x00001000; - offset = 0x0080f000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "boot" - size = 0x00001000; - offset = 0x00810000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "flash" - size = 0x00011000; - offset = 0x0800000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "prodsig" - size = 0x200; - offset = 0x8e0200; - page_size = 0x100; - readsize = 0x100; - ; - - memory "usersig" - size = 0x200; - offset = 0x8e0400; - page_size = 0x100; - readsize = 0x100; - ; - - memory "signature" - size = 3; - offset = 0x1000090; - ; - - memory "fuse0" - size = 1; - offset = 0x8f0020; - ; - - memory "fuse1" - size = 1; - offset = 0x8f0021; - ; - - memory "fuse2" - size = 1; - offset = 0x8f0022; - ; - - memory "fuse4" - size = 1; - offset = 0x8f0024; - ; - - memory "fuse5" - size = 1; - offset = 0x8f0025; - ; - - memory "lock" - size = 1; - offset = 0x8f0027; - ; -; - -#------------------------------------------------------------ -# ATXMEGA128A3 -#------------------------------------------------------------ - -part - id = "x128a3"; - desc = "ATXMEGA128A3"; - signature = 0x1e 0x97 0x42; - has_jtag = yes; - has_pdi = yes; - nvm_base = 0x01c0; - - memory "eeprom" - size = 0x0800; - offset = 0x08c0000; - page_size = 0x20; - readsize = 0x100; - ; - - memory "application" - size = 0x00020000; - offset = 0x0800000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "apptable" - size = 0x00002000; - offset = 0x0081e000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "boot" - size = 0x00002000; - offset = 0x00820000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "flash" - size = 0x00022000; - offset = 0x0800000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "prodsig" - size = 0x200; - offset = 0x8e0200; - page_size = 0x100; - readsize = 0x100; - ; - - memory "usersig" - size = 0x200; - offset = 0x8e0400; - page_size = 0x100; - readsize = 0x100; - ; - - memory "signature" - size = 3; - offset = 0x1000090; - ; - - memory "fuse0" - size = 1; - offset = 0x8f0020; - ; - - memory "fuse1" - size = 1; - offset = 0x8f0021; - ; - - memory "fuse2" - size = 1; - offset = 0x8f0022; - ; - - memory "fuse4" - size = 1; - offset = 0x8f0024; - ; - - memory "fuse5" - size = 1; - offset = 0x8f0025; - ; - - memory "lock" - size = 1; - offset = 0x8f0027; - ; -; - -#------------------------------------------------------------ -# ATXMEGA192A3 -#------------------------------------------------------------ - -part - id = "x192a3"; - desc = "ATXMEGA192A3"; - signature = 0x1e 0x97 0x44; - has_jtag = yes; - has_pdi = yes; - nvm_base = 0x01c0; - - memory "eeprom" - size = 0x0800; - offset = 0x08c0000; - page_size = 0x20; - readsize = 0x100; - ; - - memory "application" - size = 0x00030000; - offset = 0x0800000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "apptable" - size = 0x00002000; - offset = 0x0082e000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "boot" - size = 0x00002000; - offset = 0x00830000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "flash" - size = 0x00032000; - offset = 0x0800000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "prodsig" - size = 0x200; - offset = 0x8e0200; - page_size = 0x100; - readsize = 0x100; - ; - - memory "usersig" - size = 0x200; - offset = 0x8e0400; - page_size = 0x100; - readsize = 0x100; - ; - - memory "signature" - size = 3; - offset = 0x1000090; - ; - - memory "fuse0" - size = 1; - offset = 0x8f0020; - ; - - memory "fuse1" - size = 1; - offset = 0x8f0021; - ; - - memory "fuse2" - size = 1; - offset = 0x8f0022; - ; - - memory "fuse4" - size = 1; - offset = 0x8f0024; - ; - - memory "fuse5" - size = 1; - offset = 0x8f0025; - ; - - memory "lock" - size = 1; - offset = 0x8f0027; - ; -; - -#------------------------------------------------------------ -# ATXMEGA256A3 -#------------------------------------------------------------ - -part - id = "x256a3"; - desc = "ATXMEGA256A3"; - signature = 0x1e 0x98 0x42; - has_jtag = yes; - has_pdi = yes; - nvm_base = 0x01c0; - - memory "eeprom" - size = 0x1000; - offset = 0x08c0000; - page_size = 0x20; - readsize = 0x100; - ; - - memory "application" - size = 0x00040000; - offset = 0x0800000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "apptable" - size = 0x00002000; - offset = 0x0083e000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "boot" - size = 0x00002000; - offset = 0x00840000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "flash" - size = 0x00042000; - offset = 0x0800000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "prodsig" - size = 0x200; - offset = 0x8e0200; - page_size = 0x100; - readsize = 0x100; - ; - - memory "usersig" - size = 0x200; - offset = 0x8e0400; - page_size = 0x100; - readsize = 0x100; - ; - - memory "signature" - size = 3; - offset = 0x1000090; - ; - - memory "fuse0" - size = 1; - offset = 0x8f0020; - ; - - memory "fuse1" - size = 1; - offset = 0x8f0021; - ; - - memory "fuse2" - size = 1; - offset = 0x8f0022; - ; - - memory "fuse4" - size = 1; - offset = 0x8f0024; - ; - - memory "fuse5" - size = 1; - offset = 0x8f0025; - ; - - memory "lock" - size = 1; - offset = 0x8f0027; - ; -; - -#------------------------------------------------------------ -# ATXMEGA256A3B -#------------------------------------------------------------ - -part - id = "x256a3b"; - desc = "ATXMEGA256A3B"; - signature = 0x1e 0x98 0x43; - has_jtag = yes; - has_pdi = yes; - nvm_base = 0x01c0; - - memory "eeprom" - size = 0x1000; - offset = 0x08c0000; - page_size = 0x20; - readsize = 0x100; - ; - - memory "application" - size = 0x00040000; - offset = 0x0800000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "apptable" - size = 0x00002000; - offset = 0x0083e000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "boot" - size = 0x00002000; - offset = 0x00840000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "flash" - size = 0x00042000; - offset = 0x0800000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "prodsig" - size = 0x200; - offset = 0x8e0200; - page_size = 0x100; - readsize = 0x100; - ; - - memory "usersig" - size = 0x200; - offset = 0x8e0400; - page_size = 0x100; - readsize = 0x100; - ; - - memory "signature" - size = 3; - offset = 0x1000090; - ; - - memory "fuse0" - size = 1; - offset = 0x8f0020; - ; - - memory "fuse1" - size = 1; - offset = 0x8f0021; - ; - - memory "fuse2" - size = 1; - offset = 0x8f0022; - ; - - memory "fuse4" - size = 1; - offset = 0x8f0024; - ; - - memory "fuse5" - size = 1; - offset = 0x8f0025; - ; - - memory "lock" - size = 1; - offset = 0x8f0027; - ; -; - -#------------------------------------------------------------ -# ATXMEGA16A4 -#------------------------------------------------------------ - -part - id = "x16a4"; - desc = "ATXMEGA16A4"; - signature = 0x1e 0x94 0x41; - has_jtag = yes; - has_pdi = yes; - nvm_base = 0x01c0; - - memory "eeprom" - size = 0x0400; - offset = 0x08c0000; - page_size = 0x20; - readsize = 0x100; - ; - - memory "application" - size = 0x00004000; - offset = 0x0800000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "apptable" - size = 0x00001000; - offset = 0x00803000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "boot" - size = 0x00001000; - offset = 0x00804000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "flash" - size = 0x00005000; - offset = 0x0800000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "prodsig" - size = 0x200; - offset = 0x8e0200; - page_size = 0x100; - readsize = 0x100; - ; - - memory "usersig" - size = 0x200; - offset = 0x8e0400; - page_size = 0x100; - readsize = 0x100; - ; - - memory "signature" - size = 3; - offset = 0x1000090; - ; - - memory "fuse0" - size = 1; - offset = 0x8f0020; - ; - - memory "fuse1" - size = 1; - offset = 0x8f0021; - ; - - memory "fuse2" - size = 1; - offset = 0x8f0022; - ; - - memory "fuse4" - size = 1; - offset = 0x8f0024; - ; - - memory "fuse5" - size = 1; - offset = 0x8f0025; - ; - - memory "lock" - size = 1; - offset = 0x8f0027; - ; -; - -#------------------------------------------------------------ -# ATXMEGA32A4 -#------------------------------------------------------------ - -part - id = "x32a4"; - desc = "ATXMEGA32A4"; - signature = 0x1e 0x95 0x41; - has_jtag = yes; - has_pdi = yes; - nvm_base = 0x01c0; - - memory "eeprom" - size = 0x0400; - offset = 0x08c0000; - page_size = 0x20; - readsize = 0x100; - ; - - memory "application" - size = 0x00008000; - offset = 0x0800000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "apptable" - size = 0x00001000; - offset = 0x00807000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "boot" - size = 0x00001000; - offset = 0x00808000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "flash" - size = 0x00009000; - offset = 0x0800000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "prodsig" - size = 0x200; - offset = 0x8e0200; - page_size = 0x100; - readsize = 0x100; - ; - - memory "usersig" - size = 0x200; - offset = 0x8e0400; - page_size = 0x100; - readsize = 0x100; - ; - - memory "signature" - size = 3; - offset = 0x1000090; - ; - - memory "fuse0" - size = 1; - offset = 0x8f0020; - ; - - memory "fuse1" - size = 1; - offset = 0x8f0021; - ; - - memory "fuse2" - size = 1; - offset = 0x8f0022; - ; - - memory "fuse4" - size = 1; - offset = 0x8f0024; - ; - - memory "fuse5" - size = 1; - offset = 0x8f0025; - ; - - memory "lock" - size = 1; - offset = 0x8f0027; - ; -; - -#------------------------------------------------------------ -# ATXMEGA64A4 -#------------------------------------------------------------ - -part - id = "x64a4"; - desc = "ATXMEGA64A4"; - signature = 0x1e 0x96 0x46; - has_jtag = yes; - has_pdi = yes; - nvm_base = 0x01c0; - - memory "eeprom" - size = 0x0800; - offset = 0x08c0000; - page_size = 0x20; - readsize = 0x100; - ; - - memory "application" - size = 0x00010000; - offset = 0x0800000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "apptable" - size = 0x00001000; - offset = 0x0080f000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "boot" - size = 0x00001000; - offset = 0x00810000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "flash" - size = 0x00011000; - offset = 0x0800000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "prodsig" - size = 0x200; - offset = 0x8e0200; - page_size = 0x100; - readsize = 0x100; - ; - - memory "usersig" - size = 0x200; - offset = 0x8e0400; - page_size = 0x100; - readsize = 0x100; - ; - - memory "signature" - size = 3; - offset = 0x1000090; - ; - - memory "fuse0" - size = 1; - offset = 0x8f0020; - ; - - memory "fuse1" - size = 1; - offset = 0x8f0021; - ; - - memory "fuse2" - size = 1; - offset = 0x8f0022; - ; - - memory "fuse4" - size = 1; - offset = 0x8f0024; - ; - - memory "fuse5" - size = 1; - offset = 0x8f0025; - ; - - memory "lock" - size = 1; - offset = 0x8f0027; - ; -; - -#------------------------------------------------------------ -# ATXMEGA128A4 -#------------------------------------------------------------ - -part - id = "x128a4"; - desc = "ATXMEGA128A4"; - signature = 0x1e 0x97 0x46; - has_jtag = yes; - has_pdi = yes; - nvm_base = 0x01c0; - - memory "eeprom" - size = 0x0800; - offset = 0x08c0000; - page_size = 0x20; - readsize = 0x100; - ; - - memory "application" - size = 0x00020000; - offset = 0x0800000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "apptable" - size = 0x00002000; - offset = 0x0081e000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "boot" - size = 0x00002000; - offset = 0x00820000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "flash" - size = 0x00022000; - offset = 0x0800000; - page_size = 0x100; - readsize = 0x100; - ; - - memory "prodsig" - size = 0x200; - offset = 0x8e0200; - page_size = 0x100; - readsize = 0x100; - ; - - memory "usersig" - size = 0x200; - offset = 0x8e0400; - page_size = 0x100; - readsize = 0x100; - ; - - memory "signature" - size = 3; - offset = 0x1000090; - ; - - memory "fuse0" - size = 1; - offset = 0x8f0020; - ; - - memory "fuse1" - size = 1; - offset = 0x8f0021; - ; - - memory "fuse2" - size = 1; - offset = 0x8f0022; - ; - - memory "fuse4" - size = 1; - offset = 0x8f0024; - ; - - memory "fuse5" - size = 1; - offset = 0x8f0025; - ; - - memory "lock" - size = 1; - offset = 0x8f0027; - ; -; - - -#------------------------------------------------------------ -# AVR32UC3A0512 -#------------------------------------------------------------ - -part - id = "ucr2"; - desc = "32UC3A0512"; - signature = 0xED 0xC0 0x3F; - has_jtag = yes; - is_avr32 = yes; - - memory "flash" - paged = yes; - page_size = 512; # bytes - readsize = 512; # bytes - num_pages = 1024; # could be set dynamicly - size = 0x00080000; # could be set dynamicly - offset = 0x80000000; - ; -; - -#------------------------------------------------------------ -# ATtiny4 -#------------------------------------------------------------ - -part - id = "t4"; - desc = "ATtiny4"; - signature = 0x1e 0x8f 0x0a; - has_tpi = yes; - - memory "flash" - size = 512; - offset = 0x4000; - page_size = 16; - blocksize = 128; - ; - - memory "signature" - size = 3; - offset = 0x3fc0; - page_size = 16; - ; - - memory "fuse" - size = 1; - offset = 0x3f40; - page_size = 16; - blocksize = 4; - ; - - memory "calibration" - size = 1; - offset = 0x3f80; - page_size = 16; - ; - - memory "lockbits" - size = 1; - offset = 0x3f00; - page_size = 16; - ; -; - - -#------------------------------------------------------------ -# ATtiny5 -#------------------------------------------------------------ - -part - id = "t5"; - desc = "ATtiny5"; - signature = 0x1e 0x8f 0x09; - has_tpi = yes; - - memory "flash" - size = 512; - offset = 0x4000; - page_size = 16; - blocksize = 128; - ; - - memory "signature" - size = 3; - offset = 0x3fc0; - page_size = 16; - ; - - memory "fuse" - size = 1; - offset = 0x3f40; - page_size = 16; - blocksize = 4; - ; - - memory "calibration" - size = 1; - offset = 0x3f80; - page_size = 16; - ; - - memory "lockbits" - size = 1; - offset = 0x3f00; - page_size = 16; - ; -; - - -#------------------------------------------------------------ -# ATtiny9 -#------------------------------------------------------------ - -part - id = "t9"; - desc = "ATtiny9"; - signature = 0x1e 0x90 0x08; - has_tpi = yes; - - memory "flash" - size = 1024; - offset = 0x4000; - page_size = 16; - blocksize = 128; - ; - - memory "signature" - size = 3; - offset = 0x3fc0; - page_size = 16; - ; - - memory "fuse" - size = 1; - offset = 0x3f40; - page_size = 16; - blocksize = 4; - ; - - memory "calibration" - size = 1; - offset = 0x3f80; - page_size = 16; - ; - - memory "lockbits" - size = 1; - offset = 0x3f00; - page_size = 16; - ; -; - - -#------------------------------------------------------------ -# ATtiny10 -#------------------------------------------------------------ - -part - id = "t10"; - desc = "ATtiny10"; - signature = 0x1e 0x90 0x03; - has_tpi = yes; - - memory "flash" - size = 1024; - offset = 0x4000; - page_size = 16; - blocksize = 128; - ; - - memory "signature" - size = 3; - offset = 0x3fc0; - page_size = 16; - ; - - memory "fuse" - size = 1; - offset = 0x3f40; - page_size = 16; - blocksize = 4; - ; - - memory "calibration" - size = 1; - offset = 0x3f80; - page_size = 16; - ; - - memory "lockbits" - size = 1; - offset = 0x3f00; - page_size = 16; - ; -; - - diff --git a/build/linux/work/hardware/tools/avrdude64 b/build/linux/work/hardware/tools/avrdude64 deleted file mode 100644 index 8d97d8b32..000000000 Binary files a/build/linux/work/hardware/tools/avrdude64 and /dev/null differ diff --git a/build/linux/work/hardware/tools/readme.txt b/build/linux/work/hardware/tools/readme.txt deleted file mode 100644 index 82192cc91..000000000 --- a/build/linux/work/hardware/tools/readme.txt +++ /dev/null @@ -1,20 +0,0 @@ -AVR Toolchain for 64 bit Linux (x86_64-linux-gnu) - -This toolchain was created by extracting the Debian gcc-avr and binutils-avr -packages from Ubuntu 9.04 (Jaunty Jackalope). These versions closely match -the toolchain Arduino bundles on Mac and Windows. - -AVR libc 1.6.4 was compiled compiled from source on Jaunty and then and -copied to the avr/lib/avr directory. The eeprom.h file was replaced by -Arduino's modified copy. - -Ubuntu libraries libgmp and libmpfr were copied to avr/lib. The main -gcc binaries avr-gcc, avr-g++ and avr-cpp were moved to avr/bin.gcc, and -scripts were placed in the avr/bin directory to run these with -LD_LIBRARY_PATH set to use libgmp and libmpfr from the avr/lib directory. - -A patch was applied to the Arduino IDE to use this toolchain if the -tools/avr/bin directory is present. If this directory is removed, Arduino -will attempt to use the AVR toolchain provided by your system. - -Finally, this readme file was added. diff --git a/build/linux/work/lib/RXTXcomm.jar b/build/linux/work/lib/RXTXcomm.jar deleted file mode 100644 index 8971c8114..000000000 Binary files a/build/linux/work/lib/RXTXcomm.jar and /dev/null differ diff --git a/build/linux/work/lib/about.jpg b/build/linux/work/lib/about.jpg deleted file mode 100644 index 0b168bba1..000000000 Binary files a/build/linux/work/lib/about.jpg and /dev/null differ diff --git a/build/linux/work/lib/core.jar b/build/linux/work/lib/core.jar deleted file mode 100644 index 6bb794a27..000000000 Binary files a/build/linux/work/lib/core.jar and /dev/null differ diff --git a/build/linux/work/lib/ecj.jar b/build/linux/work/lib/ecj.jar deleted file mode 100644 index 878a32cfc..000000000 Binary files a/build/linux/work/lib/ecj.jar and /dev/null differ diff --git a/build/linux/work/lib/jna.jar b/build/linux/work/lib/jna.jar deleted file mode 100644 index 5c669aff6..000000000 Binary files a/build/linux/work/lib/jna.jar and /dev/null differ diff --git a/build/linux/work/lib/keywords.txt b/build/linux/work/lib/keywords.txt deleted file mode 100644 index eb3bd4b09..000000000 --- a/build/linux/work/lib/keywords.txt +++ /dev/null @@ -1,186 +0,0 @@ -# LITERAL1 specifies constants - -HIGH LITERAL1 Constants -LOW LITERAL1 Constants -INPUT LITERAL1 Constants -INPUT_PULLUP LITERAL1 Constants -OUTPUT LITERAL1 Constants -DEC LITERAL1 Serial_Print -BIN LITERAL1 Serial_Print -HEX LITERAL1 Serial_Print -OCT LITERAL1 Serial_Print -PI LITERAL1 -HALF_PI LITERAL1 -TWO_PI LITERAL1 -LSBFIRST LITERAL1 ShiftOut -MSBFIRST LITERAL1 ShiftOut -CHANGE LITERAL1 AttachInterrupt -FALLING LITERAL1 AttachInterrupt -RISING LITERAL1 AttachInterrupt -DEFAULT LITERAL1 AnalogReference -EXTERNAL LITERAL1 AnalogReference -INTERNAL LITERAL1 AnalogReference -INTERNAL1V1 LITERAL1 AnalogReference -INTERNAL2V56 LITERAL1 AnalogReference - -# KEYWORD1 specifies datatypes and C/C++ keywords - -boolean KEYWORD1 BooleanVariables -break KEYWORD1 Break -byte KEYWORD1 Byte -case KEYWORD1 SwitchCase -char KEYWORD1 Char -class KEYWORD1 -const KEYWORD1 Const -continue KEYWORD1 Continue -default KEYWORD1 SwitchCase -do KEYWORD1 DoWhile -double KEYWORD1 Double -else KEYWORD1 Else -false KEYWORD1 Constants -float KEYWORD1 Float -for KEYWORD1 For -if KEYWORD1 If -int KEYWORD1 Int -long KEYWORD1 Long -new KEYWORD1 -null KEYWORD1 -private KEYWORD1 -protected KEYWORD1 -public KEYWORD1 -return KEYWORD1 Return -short KEYWORD1 -signed KEYWORD1 -static KEYWORD1 Static -String KEYWORD1 String -switch KEYWORD1 SwitchCase -this KEYWORD1 -throw KEYWORD1 -try KEYWORD1 -true KEYWORD1 -unsigned KEYWORD1 -void KEYWORD1 Void -while KEYWORD1 While -word KEYWORD1 Word - -# operators aren't highlighted, but may have documentation - -+= IncrementCompound -+ Arithmetic -[] arrayaccess -= assign -& BitwiseAnd -| BitwiseAnd -, -// Comments -?: -{} Braces --- Increment -/ Arithmetic -/* Comments -. dot -== -< greaterthan -<= greaterthanorequalto -++ Increment -!= inequality -<< Bitshift -< lessthan -<= lessthanorequalto -&& Boolean -! Boolean -|| Boolean -- Arithmetic -% Modulo -* Arithmetic -() parentheses ->> Bitshift -; SemiColon --= IncrementCompound - -# these are datatypes, but we've also defined functions to cast to them - -boolean KEYWORD2 boolean_ -byte KEYWORD2 byte_ -char KEYWORD2 char_ -float KEYWORD2 float_ -int KEYWORD2 int_ -long KEYWORD2 long_ -word KEYWORD2 word_ - -# KEYWORD2 specifies methods and functions - -abs KEYWORD2 Abs -acos KEYWORD2 ACos -asin KEYWORD2 ASin -atan KEYWORD2 ATan -atan2 KEYWORD2 ATan2 -ceil KEYWORD2 Ceil -constrain KEYWORD2 Constrain -cos KEYWORD2 Cos -degrees KEYWORD2 -exp KEYWORD2 Exp -floor KEYWORD2 Floor -log KEYWORD2 Log -map KEYWORD2 Map -max KEYWORD2 Max -min KEYWORD2 Min -radians KEYWORD2 -random KEYWORD2 Random -randomSeed KEYWORD2 RandomSeed -round KEYWORD2 -sin KEYWORD2 Sin -sq KEYWORD2 Sq -sqrt KEYWORD2 Sqrt -tan KEYWORD2 Tan - -bitRead KEYWORD2 BitRead -bitWrite KEYWORD2 BitWrite -bitSet KEYWORD2 BitSet -bitClear KEYWORD2 BitClear -bit KEYWORD2 Bit -highByte KEYWORD2 HighByte -lowByte KEYWORD2 LowByte - -analogReference KEYWORD2 AnalogReference -analogRead KEYWORD2 AnalogRead -analogWrite KEYWORD2 AnalogWrite -attachInterrupt KEYWORD2 AttachInterrupt -detachInterrupt KEYWORD2 DetachInterrupt -delay KEYWORD2 Delay -delayMicroseconds KEYWORD2 DelayMicroseconds -digitalWrite KEYWORD2 DigitalWrite -digitalRead KEYWORD2 DigitalRead -interrupts KEYWORD2 -millis KEYWORD2 Millis -micros KEYWORD2 Micros -noInterrupts KEYWORD2 NoInterrupts -noTone KEYWORD2 NoTone -pinMode KEYWORD2 PinMode -pulseIn KEYWORD2 PulseIn -shiftIn KEYWORD2 ShiftIn -shiftOut KEYWORD2 ShiftOut -tone KEYWORD2 Tone - -Serial KEYWORD3 Serial -Serial1 KEYWORD3 Serial -Serial2 KEYWORD3 Serial -Serial3 KEYWORD3 Serial -begin KEYWORD2 Serial_Begin -end KEYWORD2 Serial_End -peek KEYWORD2 Serial_Peek -read KEYWORD2 Serial_Read -print KEYWORD2 Serial_Print -println KEYWORD2 Serial_Println -available KEYWORD2 Serial_Available -flush KEYWORD2 Serial_Flush -setTimeout KEYWORD2 -find KEYWORD2 -findUntil KEYWORD2 -parseInt KEYWORD2 -parseFloat KEYWORD2 -readBytes KEYWORD2 -readBytesUntil KEYWORD2 - -setup KEYWORD3 Setup -loop KEYWORD3 Loop diff --git a/build/linux/work/lib/librxtxSerial.so b/build/linux/work/lib/librxtxSerial.so deleted file mode 100644 index 853b87a22..000000000 Binary files a/build/linux/work/lib/librxtxSerial.so and /dev/null differ diff --git a/build/linux/work/lib/librxtxSerial64.so b/build/linux/work/lib/librxtxSerial64.so deleted file mode 100644 index 853b87a22..000000000 Binary files a/build/linux/work/lib/librxtxSerial64.so and /dev/null differ diff --git a/build/linux/work/lib/pde.jar b/build/linux/work/lib/pde.jar deleted file mode 100644 index 36c8c093e..000000000 Binary files a/build/linux/work/lib/pde.jar and /dev/null differ diff --git a/build/linux/work/lib/preferences.txt b/build/linux/work/lib/preferences.txt deleted file mode 100644 index 51043bbbf..000000000 --- a/build/linux/work/lib/preferences.txt +++ /dev/null @@ -1,257 +0,0 @@ -# !!!!!!!! UNLIKE PREVIOUS VERSIONS OF PROCESSING !!!!!!!!!! -# DO NOT MODIFY THIS FILE, OR DELETE SETTINGS FROM THIS FILE - -# These are the default preferences. If you want to modify -# them directly, use the per-user local version of the file: - -# Documents and Settings -> [username] -> Application Data -> -# Processing -> preferences.txt (on Windows XP) - -# Users -> [username] -> AppData -> Roaming -> -# Processing -> preferences.txt (on Windows Vista) - -# ~/Library -> Processing -> preferences.txt (on Mac OS X) - -# ~/.processing -> preferences.txt (on Linux) - -# The exact location of your preferences file can be found at -# the bottom of the Preferences window inside Processing. - -# Because AppData and Application Data may be considered -# hidden or system folders on Windows, you'll have to ensure -# that they're visible in order to get at preferences.txt - -# You'll have problems running Processing if you incorrectly -# modify lines in this file. - - -# !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! - - -# DEFAULT PATHS FOR SKETCHBOOK AND SETTINGS - -# relative paths will be relative to processing.exe or procesing.app. -# absolute paths may also be used. - -# note that this path should use forward slashes (like unix) -# instead of \ on windows or : on macos or whatever else - -# If you don't want users to have their sketchbook default to -# "My Documents/Processing" on Windows and "Documents/Processing" on OS X, -# set this to another path that will be used by default. -# Note that this path must exist already otherwise it won't see -# the sketchbook folder, and will instead assume the sketchbook -# has gone missing, and that it should instead use the default. -#sketchbook.path= - -# if you don't want settings to go into "application data" on windows -# and "library" on macosx, set this to the alternate location. -#settings.path=data - -# temporary build path, normally this goes into the default -# "temp" folder for that platform (as defined by java) -# but this can be used to set a specific file in case of problems -#build.path=build - -# By default, no sketches currently open -last.sketch.count=0 - - -# !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! - - -# by default, check the processing server for any updates -# (please avoid disabling, this also helps us know basic numbers -# on how many people are using Processing) -update.check = true - -# on windows, automatically associate .pde files with processing.exe -platform.auto_file_type_associations = true - -# !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! - - -# default size for the main window -editor.window.width.default = 500 -editor.window.height.default = 600 - -editor.window.width.min = 400 -editor.window.height.min = 290 - -# the following commented out to better support netbooks -# http://code.google.com/p/arduino/issues/detail?id=52 -#editor.window.height.min = 500 -# tested as approx 440 on OS X -#editor.window.height.min.macosx = 450 -# tested to be 515 on Windows XP, this leaves some room -#editor.window.height.min.windows = 530 - - -# font size for editor -editor.font=Monospaced,plain,12 -# Monaco is nicer on Mac OS X, so use that explicitly -editor.font.macosx = Monaco,plain,10 - -# anti-aliased text, turned off by default -editor.antialias=false - -# color to be used for background when 'external editor' enabled -editor.external=false - -# caret blinking -editor.caret.blink=true - -# area that's not in use by the text (replaced with tildes) -editor.invalid=false - -# enable ctrl-ins, shift-ins, shift-delete for cut/copy/paste -# on windows and linux, but disable on the mac -editor.keys.alternative_cut_copy_paste = true -editor.keys.alternative_cut_copy_paste.macosx = false - -# true if shift-backspace sends the delete character, -# false if shift-backspace just means backspace -editor.keys.shift_backspace_is_delete = true - -# home and end keys should only travel to the start/end of the current line -editor.keys.home_and_end_travel_far = false -# the OS X HI Guidelines say that home/end are relative to the document -# if you don't like it, this is the preference to change -editor.keys.home_and_end_travel_far.macosx = true - -console = true -console.output.file = stdout.txt -console.error.file = stderr.txt -console.lines = 4 - -# set to false to disable automatically clearing the console -# each time 'run' is hit -console.auto_clear = true - -# set the maximum number of lines remembered by the console -# the default is 500, lengthen at your own peril -console.length = 500 - -# convert tabs to spaces? how many spaces? -editor.tabs.expand = true -editor.tabs.size = 2 - -# automatically indent each line -editor.indent = true - -# size of divider between editing area and the console -editor.divider.size = 0 -# the larger divider on windows is ugly with the little arrows -# this makes it large enough to see (mouse changes) and use, -# but keeps it from being annoyingly obtrusive -editor.divider.size.windows = 2 - -# any additional java options when running externally -# (for applets that are run external to the environment... -# those with a code folder, or using any libraries) -# if you hose this and can't run things, it's your own durn fault -run.options = - -# settings for the -XmsNNNm and -XmxNNNm command line option -run.options.memory = false -run.options.memory.initial = 64 -run.options.memory.maximum = 256 - -# example of increasing the memory size for applets run externally -#run.options = -Xms128m -Xmx1024m - -# index of the default display to use for present mode -# (this setting not yet completely implemented) -run.display = 1 - -# set internally -#run.window.bgcolor= - -# set to false to open a new untitled window when closing the last window -# (otherwise, the environment will quit) -# default to the relative norm for the different platforms, -# but the setting can be changed in the prefs dialog anyway -#sketchbook.closing_last_window_quits = true -#sketchbook.closing_last_window_quits.macosx = false - - -# !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! - - -#history.recording = true - -# for advanced users, enable option to export a library -#export.library = false - -# which platforms to export by default -export.application.platform.windows = true -export.application.platform.macosx = true -export.application.platform.linux = true - -# whether or not to export as full screen (present) mode -export.application.fullscreen = false - -# whether to show the stop button when exporting to application -export.application.stop = true - -# false will place all exported files into a single .jar -export.applet.separate_jar_files = false - -# set to false to no longer delete applet or application folders before export -export.delete_target_folder = true - -# may be useful when attempting to debug the preprocessor -preproc.save_build_files=false - -# allows various preprocessor features to be toggled -# in case they are causing problems - -# preprocessor: pde.g -preproc.color_datatype = true -preproc.web_colors = true -preproc.enhanced_casting = true - -# preprocessor: PdeEmitter.java -preproc.substitute_floats = true -#preproc.substitute_image = false -#preproc.substitute_font = false - -# auto-convert non-ascii chars to unicode escape sequences -preproc.substitute_unicode = true - -# PdePreproc.java -# writes out the parse tree as parseTree.xml, which can be usefully -# viewed in (at least) Mozilla or IE. useful when debugging the preprocessor. -preproc.output_parse_tree = false - -# Changed after 1.0.9 to a new name, and also includes the specific entries -preproc.imports.list = java.applet.*,java.awt.Dimension,java.awt.Frame,java.awt.event.MouseEvent,java.awt.event.KeyEvent,java.awt.event.FocusEvent,java.awt.Image,java.io.*,java.net.*,java.text.*,java.util.*,java.util.zip.*,java.util.regex.* - -# set the browser to be used on linux -browser.linux = mozilla - -# set to the program to be used for launching apps on linux -#launcher.linux = xdg-open - -# FULL SCREEN (PRESENT MODE) -run.present.bgcolor = #666666 -run.present.stop.color = #cccccc -# starting in release 0159, don't use full screen exclusive anymore -run.present.exclusive = false -# use this by default to hide the menu bar and dock on osx -run.present.exclusive.macosx = true - -# ARDUINO PREFERENCES -board = uno -target = arduino - -programmer = arduino:avrispmkii - -upload.using = bootloader -upload.verify = true - -serial.port=COM1 -serial.databits=8 -serial.stopbits=1 -serial.parity=N -serial.debug_rate=9600 diff --git a/build/linux/work/lib/theme/buttons.gif b/build/linux/work/lib/theme/buttons.gif deleted file mode 100644 index 4de0905d2..000000000 Binary files a/build/linux/work/lib/theme/buttons.gif and /dev/null differ diff --git a/build/linux/work/lib/theme/resize.gif b/build/linux/work/lib/theme/resize.gif deleted file mode 100644 index ed31c0ad8..000000000 Binary files a/build/linux/work/lib/theme/resize.gif and /dev/null differ diff --git a/build/linux/work/lib/theme/tab-sel-left.gif b/build/linux/work/lib/theme/tab-sel-left.gif deleted file mode 100644 index 252ebcc6d..000000000 Binary files a/build/linux/work/lib/theme/tab-sel-left.gif and /dev/null differ diff --git a/build/linux/work/lib/theme/tab-sel-menu.gif b/build/linux/work/lib/theme/tab-sel-menu.gif deleted file mode 100644 index 3b213f4a7..000000000 Binary files a/build/linux/work/lib/theme/tab-sel-menu.gif and /dev/null differ diff --git a/build/linux/work/lib/theme/tab-sel-mid.gif b/build/linux/work/lib/theme/tab-sel-mid.gif deleted file mode 100644 index 4bd19a0c3..000000000 Binary files a/build/linux/work/lib/theme/tab-sel-mid.gif and /dev/null differ diff --git a/build/linux/work/lib/theme/tab-sel-right.gif b/build/linux/work/lib/theme/tab-sel-right.gif deleted file mode 100644 index 4ceb3ed80..000000000 Binary files a/build/linux/work/lib/theme/tab-sel-right.gif and /dev/null differ diff --git a/build/linux/work/lib/theme/tab-unsel-left.gif b/build/linux/work/lib/theme/tab-unsel-left.gif deleted file mode 100644 index cdc98861f..000000000 Binary files a/build/linux/work/lib/theme/tab-unsel-left.gif and /dev/null differ diff --git a/build/linux/work/lib/theme/tab-unsel-menu.gif b/build/linux/work/lib/theme/tab-unsel-menu.gif deleted file mode 100644 index 3c9177118..000000000 Binary files a/build/linux/work/lib/theme/tab-unsel-menu.gif and /dev/null differ diff --git a/build/linux/work/lib/theme/tab-unsel-mid.gif b/build/linux/work/lib/theme/tab-unsel-mid.gif deleted file mode 100644 index c538ad2fe..000000000 Binary files a/build/linux/work/lib/theme/tab-unsel-mid.gif and /dev/null differ diff --git a/build/linux/work/lib/theme/tab-unsel-right.gif b/build/linux/work/lib/theme/tab-unsel-right.gif deleted file mode 100644 index 3150eb5ea..000000000 Binary files a/build/linux/work/lib/theme/tab-unsel-right.gif and /dev/null differ diff --git a/build/linux/work/lib/theme/theme.txt b/build/linux/work/lib/theme/theme.txt deleted file mode 100644 index 98a8ef7a5..000000000 --- a/build/linux/work/lib/theme/theme.txt +++ /dev/null @@ -1,104 +0,0 @@ -# GUI - STATUS -status.notice.fgcolor = #002325 -status.notice.bgcolor = #17A1A5 -status.error.fgcolor = #FFFFFF -status.error.bgcolor = #E34C00 -status.edit.fgcolor = #000000 -status.edit.bgcolor = #F1B500 -status.font = SansSerif,plain,12 - -# GUI - TABS -# settings for the tabs at the top -# (tab images are stored in the lib/theme folder) -header.bgcolor = #17A1A5 -header.text.selected.color = #005B5B -header.text.unselected.color = #007e82 -header.text.font = SansSerif,plain,12 - -# GUI - CONSOLE -console.font = Monospaced,plain,11 -console.font.macosx = Monaco,plain,10 -console.color = #000000 -console.output.color = #eeeeee -console.error.color = #E34C00 - -# GUI - BUTTONS -buttons.bgcolor = #006468 -buttons.status.font = SansSerif,plain,12 -buttons.status.color = #ffffff - -# GUI - LINESTATUS -linestatus.color = #ffffff -linestatus.bgcolor = #006468 - -# EDITOR - DETAILS - -# foreground and background colors -editor.fgcolor = #000000 -editor.bgcolor = #ffffff - -# highlight for the current line -editor.linehighlight.color=#e2e2e2 -# highlight for the current line -editor.linehighlight=true - -# caret blinking and caret color -editor.caret.color = #333300 - -# color to be used for background when 'external editor' enabled -editor.external.bgcolor = #c8d2dc - -# selection color -editor.selection.color = #ffcc00 - -# area that's not in use by the text (replaced with tildes) -editor.invalid.style = #7e7e7e,bold - -# little pooties at the end of lines that show where they finish -editor.eolmarkers = false -editor.eolmarkers.color = #999999 - -# bracket/brace highlighting -editor.brackethighlight = true -editor.brackethighlight.color = #006699 - - -# TEXT - KEYWORDS - -# e.g abstract, final, private -editor.keyword1.style = #cc6600,plain - -# e.g. beginShape, point, line -editor.keyword2.style = #cc6600,plain - -# e.g. byte, char, short, color -editor.keyword3.style = #cc6600,bold - - -# TEXT - LITERALS - -# constants: e.g. null, true, this, RGB, TWO_PI -editor.literal1.style = #006699,plain - -# p5 built in variables: e.g. mouseX, width, pixels -editor.literal2.style = #006699,plain - -# http://arduino.cc/ -editor.url.style = #0000ff,underlined - -# e.g. + - = / -editor.operator.style = #000000,plain - -# ?? maybe this is for words followed by a colon -# like in case statements or goto -editor.label.style = #7e7e7e,bold - - -# TEXT - COMMENTS -editor.comment1.style = #7e7e7e,plain -editor.comment2.style = #7e7e7e,plain - - -# LINE STATUS - editor line number status bar at the bottom of the screen -linestatus.font = SansSerif,plain,10 -linestatus.height = 20 diff --git a/build/linux/work/lib/version.txt b/build/linux/work/lib/version.txt deleted file mode 100644 index e78e52237..000000000 --- a/build/linux/work/lib/version.txt +++ /dev/null @@ -1 +0,0 @@ -${version} \ No newline at end of file diff --git a/build/linux/work/libraries/EEPROM/EEPROM.cpp b/build/linux/work/libraries/EEPROM/EEPROM.cpp deleted file mode 100644 index dfa1deb56..000000000 --- a/build/linux/work/libraries/EEPROM/EEPROM.cpp +++ /dev/null @@ -1,50 +0,0 @@ -/* - EEPROM.cpp - EEPROM library - Copyright (c) 2006 David A. Mellis. All right reserved. - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with this library; if not, write to the Free Software - Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -*/ - -/****************************************************************************** - * Includes - ******************************************************************************/ - -#include -#include "Arduino.h" -#include "EEPROM.h" - -/****************************************************************************** - * Definitions - ******************************************************************************/ - -/****************************************************************************** - * Constructors - ******************************************************************************/ - -/****************************************************************************** - * User API - ******************************************************************************/ - -uint8_t EEPROMClass::read(int address) -{ - return eeprom_read_byte((unsigned char *) address); -} - -void EEPROMClass::write(int address, uint8_t value) -{ - eeprom_write_byte((unsigned char *) address, value); -} - -EEPROMClass EEPROM; diff --git a/build/linux/work/libraries/EEPROM/EEPROM.h b/build/linux/work/libraries/EEPROM/EEPROM.h deleted file mode 100644 index aa2b57726..000000000 --- a/build/linux/work/libraries/EEPROM/EEPROM.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - EEPROM.h - EEPROM library - Copyright (c) 2006 David A. Mellis. All right reserved. - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with this library; if not, write to the Free Software - Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -*/ - -#ifndef EEPROM_h -#define EEPROM_h - -#include - -class EEPROMClass -{ - public: - uint8_t read(int); - void write(int, uint8_t); -}; - -extern EEPROMClass EEPROM; - -#endif - diff --git a/build/linux/work/libraries/EEPROM/examples/eeprom_clear/eeprom_clear.ino b/build/linux/work/libraries/EEPROM/examples/eeprom_clear/eeprom_clear.ino deleted file mode 100644 index d1e29bdbd..000000000 --- a/build/linux/work/libraries/EEPROM/examples/eeprom_clear/eeprom_clear.ino +++ /dev/null @@ -1,23 +0,0 @@ -/* - * EEPROM Clear - * - * Sets all of the bytes of the EEPROM to 0. - * This example code is in the public domain. - - */ - -#include - -void setup() -{ - // write a 0 to all 512 bytes of the EEPROM - for (int i = 0; i < 512; i++) - EEPROM.write(i, 0); - - // turn the LED on when we're done - digitalWrite(13, HIGH); -} - -void loop() -{ -} diff --git a/build/linux/work/libraries/EEPROM/examples/eeprom_read/eeprom_read.ino b/build/linux/work/libraries/EEPROM/examples/eeprom_read/eeprom_read.ino deleted file mode 100644 index 88e3488e9..000000000 --- a/build/linux/work/libraries/EEPROM/examples/eeprom_read/eeprom_read.ino +++ /dev/null @@ -1,39 +0,0 @@ -/* - * EEPROM Read - * - * Reads the value of each byte of the EEPROM and prints it - * to the computer. - * This example code is in the public domain. - */ - -#include - -// start reading from the first byte (address 0) of the EEPROM -int address = 0; -byte value; - -void setup() -{ - Serial.begin(9600); -} - -void loop() -{ - // read a byte from the current address of the EEPROM - value = EEPROM.read(address); - - Serial.print(address); - Serial.print("\t"); - Serial.print(value, DEC); - Serial.println(); - - // advance to the next address of the EEPROM - address = address + 1; - - // there are only 512 bytes of EEPROM, from 0 to 511, so if we're - // on address 512, wrap around to address 0 - if (address == 512) - address = 0; - - delay(500); -} diff --git a/build/linux/work/libraries/EEPROM/examples/eeprom_write/eeprom_write.ino b/build/linux/work/libraries/EEPROM/examples/eeprom_write/eeprom_write.ino deleted file mode 100644 index ae7c57ebd..000000000 --- a/build/linux/work/libraries/EEPROM/examples/eeprom_write/eeprom_write.ino +++ /dev/null @@ -1,38 +0,0 @@ -/* - * EEPROM Write - * - * Stores values read from analog input 0 into the EEPROM. - * These values will stay in the EEPROM when the board is - * turned off and may be retrieved later by another sketch. - */ - -#include - -// the current address in the EEPROM (i.e. which byte -// we're going to write to next) -int addr = 0; - -void setup() -{ -} - -void loop() -{ - // need to divide by 4 because analog inputs range from - // 0 to 1023 and each byte of the EEPROM can only hold a - // value from 0 to 255. - int val = analogRead(0) / 4; - - // write the value to the appropriate byte of the EEPROM. - // these values will remain there when the board is - // turned off. - EEPROM.write(addr, val); - - // advance to the next address. there are 512 bytes in - // the EEPROM, so go back to 0 when we hit 512. - addr = addr + 1; - if (addr == 512) - addr = 0; - - delay(100); -} diff --git a/build/linux/work/libraries/EEPROM/keywords.txt b/build/linux/work/libraries/EEPROM/keywords.txt deleted file mode 100644 index d3218fe2a..000000000 --- a/build/linux/work/libraries/EEPROM/keywords.txt +++ /dev/null @@ -1,18 +0,0 @@ -####################################### -# Syntax Coloring Map For Ultrasound -####################################### - -####################################### -# Datatypes (KEYWORD1) -####################################### - -EEPROM KEYWORD1 - -####################################### -# Methods and Functions (KEYWORD2) -####################################### - -####################################### -# Constants (LITERAL1) -####################################### - diff --git a/build/linux/work/libraries/Ethernet/Dhcp.cpp b/build/linux/work/libraries/Ethernet/Dhcp.cpp deleted file mode 100644 index e4d27f722..000000000 --- a/build/linux/work/libraries/Ethernet/Dhcp.cpp +++ /dev/null @@ -1,479 +0,0 @@ -// DHCP Library v0.3 - April 25, 2009 -// Author: Jordan Terrell - blog.jordanterrell.com - -#include "w5100.h" - -#include -#include -#include "Dhcp.h" -#include "Arduino.h" -#include "util.h" - -int DhcpClass::beginWithDHCP(uint8_t *mac, unsigned long timeout, unsigned long responseTimeout) -{ - _dhcpLeaseTime=0; - _dhcpT1=0; - _dhcpT2=0; - _lastCheck=0; - _timeout = timeout; - _responseTimeout = responseTimeout; - - // zero out _dhcpMacAddr - memset(_dhcpMacAddr, 0, 6); - reset_DHCP_lease(); - - memcpy((void*)_dhcpMacAddr, (void*)mac, 6); - _dhcp_state = STATE_DHCP_START; - return request_DHCP_lease(); -} - -void DhcpClass::reset_DHCP_lease(){ - // zero out _dhcpSubnetMask, _dhcpGatewayIp, _dhcpLocalIp, _dhcpDhcpServerIp, _dhcpDnsServerIp - memset(_dhcpLocalIp, 0, 20); -} - -//return:0 on error, 1 if request is sent and response is received -int DhcpClass::request_DHCP_lease(){ - - uint8_t messageType = 0; - - - - // Pick an initial transaction ID - _dhcpTransactionId = random(1UL, 2000UL); - _dhcpInitialTransactionId = _dhcpTransactionId; - - if (_dhcpUdpSocket.begin(DHCP_CLIENT_PORT) == 0) - { - // Couldn't get a socket - return 0; - } - - presend_DHCP(); - - int result = 0; - - unsigned long startTime = millis(); - - while(_dhcp_state != STATE_DHCP_LEASED) - { - if(_dhcp_state == STATE_DHCP_START) - { - _dhcpTransactionId++; - - send_DHCP_MESSAGE(DHCP_DISCOVER, ((millis() - startTime) / 1000)); - _dhcp_state = STATE_DHCP_DISCOVER; - } - else if(_dhcp_state == STATE_DHCP_REREQUEST){ - _dhcpTransactionId++; - send_DHCP_MESSAGE(DHCP_REQUEST, ((millis() - startTime)/1000)); - _dhcp_state = STATE_DHCP_REQUEST; - } - else if(_dhcp_state == STATE_DHCP_DISCOVER) - { - uint32_t respId; - messageType = parseDHCPResponse(_responseTimeout, respId); - if(messageType == DHCP_OFFER) - { - // We'll use the transaction ID that the offer came with, - // rather than the one we were up to - _dhcpTransactionId = respId; - send_DHCP_MESSAGE(DHCP_REQUEST, ((millis() - startTime) / 1000)); - _dhcp_state = STATE_DHCP_REQUEST; - } - } - else if(_dhcp_state == STATE_DHCP_REQUEST) - { - uint32_t respId; - messageType = parseDHCPResponse(_responseTimeout, respId); - if(messageType == DHCP_ACK) - { - _dhcp_state = STATE_DHCP_LEASED; - result = 1; - //use default lease time if we didn't get it - if(_dhcpLeaseTime == 0){ - _dhcpLeaseTime = DEFAULT_LEASE; - } - //calculate T1 & T2 if we didn't get it - if(_dhcpT1 == 0){ - //T1 should be 50% of _dhcpLeaseTime - _dhcpT1 = _dhcpLeaseTime >> 1; - } - if(_dhcpT2 == 0){ - //T2 should be 87.5% (7/8ths) of _dhcpLeaseTime - _dhcpT2 = _dhcpT1 << 1; - } - _renewInSec = _dhcpT1; - _rebindInSec = _dhcpT2; - } - else if(messageType == DHCP_NAK) - _dhcp_state = STATE_DHCP_START; - } - - if(messageType == 255) - { - messageType = 0; - _dhcp_state = STATE_DHCP_START; - } - - if(result != 1 && ((millis() - startTime) > _timeout)) - break; - } - - // We're done with the socket now - _dhcpUdpSocket.stop(); - _dhcpTransactionId++; - - return result; -} - -void DhcpClass::presend_DHCP() -{ -} - -void DhcpClass::send_DHCP_MESSAGE(uint8_t messageType, uint16_t secondsElapsed) -{ - uint8_t buffer[32]; - memset(buffer, 0, 32); - IPAddress dest_addr( 255, 255, 255, 255 ); // Broadcast address - - if (-1 == _dhcpUdpSocket.beginPacket(dest_addr, DHCP_SERVER_PORT)) - { - // FIXME Need to return errors - return; - } - - buffer[0] = DHCP_BOOTREQUEST; // op - buffer[1] = DHCP_HTYPE10MB; // htype - buffer[2] = DHCP_HLENETHERNET; // hlen - buffer[3] = DHCP_HOPS; // hops - - // xid - unsigned long xid = htonl(_dhcpTransactionId); - memcpy(buffer + 4, &(xid), 4); - - // 8, 9 - seconds elapsed - buffer[8] = ((secondsElapsed & 0xff00) >> 8); - buffer[9] = (secondsElapsed & 0x00ff); - - // flags - unsigned short flags = htons(DHCP_FLAGSBROADCAST); - memcpy(buffer + 10, &(flags), 2); - - // ciaddr: already zeroed - // yiaddr: already zeroed - // siaddr: already zeroed - // giaddr: already zeroed - - //put data in W5100 transmit buffer - _dhcpUdpSocket.write(buffer, 28); - - memset(buffer, 0, 32); // clear local buffer - - memcpy(buffer, _dhcpMacAddr, 6); // chaddr - - //put data in W5100 transmit buffer - _dhcpUdpSocket.write(buffer, 16); - - memset(buffer, 0, 32); // clear local buffer - - // leave zeroed out for sname && file - // put in W5100 transmit buffer x 6 (192 bytes) - - for(int i = 0; i < 6; i++) { - _dhcpUdpSocket.write(buffer, 32); - } - - // OPT - Magic Cookie - buffer[0] = (uint8_t)((MAGIC_COOKIE >> 24)& 0xFF); - buffer[1] = (uint8_t)((MAGIC_COOKIE >> 16)& 0xFF); - buffer[2] = (uint8_t)((MAGIC_COOKIE >> 8)& 0xFF); - buffer[3] = (uint8_t)(MAGIC_COOKIE& 0xFF); - - // OPT - message type - buffer[4] = dhcpMessageType; - buffer[5] = 0x01; - buffer[6] = messageType; //DHCP_REQUEST; - - // OPT - client identifier - buffer[7] = dhcpClientIdentifier; - buffer[8] = 0x07; - buffer[9] = 0x01; - memcpy(buffer + 10, _dhcpMacAddr, 6); - - // OPT - host name - buffer[16] = hostName; - buffer[17] = strlen(HOST_NAME) + 6; // length of hostname + last 3 bytes of mac address - strcpy((char*)&(buffer[18]), HOST_NAME); - - printByte((char*)&(buffer[24]), _dhcpMacAddr[3]); - printByte((char*)&(buffer[26]), _dhcpMacAddr[4]); - printByte((char*)&(buffer[28]), _dhcpMacAddr[5]); - - //put data in W5100 transmit buffer - _dhcpUdpSocket.write(buffer, 30); - - if(messageType == DHCP_REQUEST) - { - buffer[0] = dhcpRequestedIPaddr; - buffer[1] = 0x04; - buffer[2] = _dhcpLocalIp[0]; - buffer[3] = _dhcpLocalIp[1]; - buffer[4] = _dhcpLocalIp[2]; - buffer[5] = _dhcpLocalIp[3]; - - buffer[6] = dhcpServerIdentifier; - buffer[7] = 0x04; - buffer[8] = _dhcpDhcpServerIp[0]; - buffer[9] = _dhcpDhcpServerIp[1]; - buffer[10] = _dhcpDhcpServerIp[2]; - buffer[11] = _dhcpDhcpServerIp[3]; - - //put data in W5100 transmit buffer - _dhcpUdpSocket.write(buffer, 12); - } - - buffer[0] = dhcpParamRequest; - buffer[1] = 0x06; - buffer[2] = subnetMask; - buffer[3] = routersOnSubnet; - buffer[4] = dns; - buffer[5] = domainName; - buffer[6] = dhcpT1value; - buffer[7] = dhcpT2value; - buffer[8] = endOption; - - //put data in W5100 transmit buffer - _dhcpUdpSocket.write(buffer, 9); - - _dhcpUdpSocket.endPacket(); -} - -uint8_t DhcpClass::parseDHCPResponse(unsigned long responseTimeout, uint32_t& transactionId) -{ - uint8_t type = 0; - uint8_t opt_len = 0; - - unsigned long startTime = millis(); - - while(_dhcpUdpSocket.parsePacket() <= 0) - { - if((millis() - startTime) > responseTimeout) - { - return 255; - } - delay(50); - } - // start reading in the packet - RIP_MSG_FIXED fixedMsg; - _dhcpUdpSocket.read((uint8_t*)&fixedMsg, sizeof(RIP_MSG_FIXED)); - - if(fixedMsg.op == DHCP_BOOTREPLY && _dhcpUdpSocket.remotePort() == DHCP_SERVER_PORT) - { - transactionId = ntohl(fixedMsg.xid); - if(memcmp(fixedMsg.chaddr, _dhcpMacAddr, 6) != 0 || (transactionId < _dhcpInitialTransactionId) || (transactionId > _dhcpTransactionId)) - { - // Need to read the rest of the packet here regardless - _dhcpUdpSocket.flush(); - return 0; - } - - memcpy(_dhcpLocalIp, fixedMsg.yiaddr, 4); - - // Skip to the option part - // Doing this a byte at a time so we don't have to put a big buffer - // on the stack (as we don't have lots of memory lying around) - for (int i =0; i < (240 - (int)sizeof(RIP_MSG_FIXED)); i++) - { - _dhcpUdpSocket.read(); // we don't care about the returned byte - } - - while (_dhcpUdpSocket.available() > 0) - { - switch (_dhcpUdpSocket.read()) - { - case endOption : - break; - - case padOption : - break; - - case dhcpMessageType : - opt_len = _dhcpUdpSocket.read(); - type = _dhcpUdpSocket.read(); - break; - - case subnetMask : - opt_len = _dhcpUdpSocket.read(); - _dhcpUdpSocket.read(_dhcpSubnetMask, 4); - break; - - case routersOnSubnet : - opt_len = _dhcpUdpSocket.read(); - _dhcpUdpSocket.read(_dhcpGatewayIp, 4); - for (int i = 0; i < opt_len-4; i++) - { - _dhcpUdpSocket.read(); - } - break; - - case dns : - opt_len = _dhcpUdpSocket.read(); - _dhcpUdpSocket.read(_dhcpDnsServerIp, 4); - for (int i = 0; i < opt_len-4; i++) - { - _dhcpUdpSocket.read(); - } - break; - - case dhcpServerIdentifier : - opt_len = _dhcpUdpSocket.read(); - if( *((uint32_t*)_dhcpDhcpServerIp) == 0 || - IPAddress(_dhcpDhcpServerIp) == _dhcpUdpSocket.remoteIP() ) - { - _dhcpUdpSocket.read(_dhcpDhcpServerIp, sizeof(_dhcpDhcpServerIp)); - } - else - { - // Skip over the rest of this option - while (opt_len--) - { - _dhcpUdpSocket.read(); - } - } - break; - - case dhcpT1value : - opt_len = _dhcpUdpSocket.read(); - _dhcpUdpSocket.read((uint8_t*)&_dhcpT1, sizeof(_dhcpT1)); - _dhcpT1 = ntohl(_dhcpT1); - break; - - case dhcpT2value : - opt_len = _dhcpUdpSocket.read(); - _dhcpUdpSocket.read((uint8_t*)&_dhcpT2, sizeof(_dhcpT2)); - _dhcpT2 = ntohl(_dhcpT2); - break; - - case dhcpIPaddrLeaseTime : - opt_len = _dhcpUdpSocket.read(); - _dhcpUdpSocket.read((uint8_t*)&_dhcpLeaseTime, sizeof(_dhcpLeaseTime)); - _dhcpLeaseTime = ntohl(_dhcpLeaseTime); - _renewInSec = _dhcpLeaseTime; - break; - - default : - opt_len = _dhcpUdpSocket.read(); - // Skip over the rest of this option - while (opt_len--) - { - _dhcpUdpSocket.read(); - } - break; - } - } - } - - // Need to skip to end of the packet regardless here - _dhcpUdpSocket.flush(); - - return type; -} - - -/* - returns: - 0/DHCP_CHECK_NONE: nothing happened - 1/DHCP_CHECK_RENEW_FAIL: renew failed - 2/DHCP_CHECK_RENEW_OK: renew success - 3/DHCP_CHECK_REBIND_FAIL: rebind fail - 4/DHCP_CHECK_REBIND_OK: rebind success -*/ -int DhcpClass::checkLease(){ - //this uses a signed / unsigned trick to deal with millis overflow - unsigned long now = millis(); - signed long snow = (long)now; - int rc=DHCP_CHECK_NONE; - if (_lastCheck != 0){ - signed long factor; - //calc how many ms past the timeout we are - factor = snow - (long)_secTimeout; - //if on or passed the timeout, reduce the counters - if ( factor >= 0 ){ - //next timeout should be now plus 1000 ms minus parts of second in factor - _secTimeout = snow + 1000 - factor % 1000; - //how many seconds late are we, minimum 1 - factor = factor / 1000 +1; - - //reduce the counters by that mouch - //if we can assume that the cycle time (factor) is fairly constant - //and if the remainder is less than cycle time * 2 - //do it early instead of late - if(_renewInSec < factor*2 ) - _renewInSec = 0; - else - _renewInSec -= factor; - - if(_rebindInSec < factor*2 ) - _rebindInSec = 0; - else - _rebindInSec -= factor; - } - - //if we have a lease but should renew, do it - if (_dhcp_state == STATE_DHCP_LEASED && _renewInSec <=0){ - _dhcp_state = STATE_DHCP_REREQUEST; - rc = 1 + request_DHCP_lease(); - } - - //if we have a lease or is renewing but should bind, do it - if( (_dhcp_state == STATE_DHCP_LEASED || _dhcp_state == STATE_DHCP_START) && _rebindInSec <=0){ - //this should basically restart completely - _dhcp_state = STATE_DHCP_START; - reset_DHCP_lease(); - rc = 3 + request_DHCP_lease(); - } - } - else{ - _secTimeout = snow + 1000; - } - - _lastCheck = now; - return rc; -} - -IPAddress DhcpClass::getLocalIp() -{ - return IPAddress(_dhcpLocalIp); -} - -IPAddress DhcpClass::getSubnetMask() -{ - return IPAddress(_dhcpSubnetMask); -} - -IPAddress DhcpClass::getGatewayIp() -{ - return IPAddress(_dhcpGatewayIp); -} - -IPAddress DhcpClass::getDhcpServerIp() -{ - return IPAddress(_dhcpDhcpServerIp); -} - -IPAddress DhcpClass::getDnsServerIp() -{ - return IPAddress(_dhcpDnsServerIp); -} - -void DhcpClass::printByte(char * buf, uint8_t n ) { - char *str = &buf[1]; - buf[0]='0'; - do { - unsigned long m = n; - n /= 16; - char c = m - 16 * n; - *str-- = c < 10 ? c + '0' : c + 'A' - 10; - } while(n); -} diff --git a/build/linux/work/libraries/Ethernet/Dhcp.h b/build/linux/work/libraries/Ethernet/Dhcp.h deleted file mode 100644 index 4a47936f0..000000000 --- a/build/linux/work/libraries/Ethernet/Dhcp.h +++ /dev/null @@ -1,178 +0,0 @@ -// DHCP Library v0.3 - April 25, 2009 -// Author: Jordan Terrell - blog.jordanterrell.com - -#ifndef Dhcp_h -#define Dhcp_h - -#include "EthernetUdp.h" - -/* DHCP state machine. */ -#define STATE_DHCP_START 0 -#define STATE_DHCP_DISCOVER 1 -#define STATE_DHCP_REQUEST 2 -#define STATE_DHCP_LEASED 3 -#define STATE_DHCP_REREQUEST 4 -#define STATE_DHCP_RELEASE 5 - -#define DHCP_FLAGSBROADCAST 0x8000 - -/* UDP port numbers for DHCP */ -#define DHCP_SERVER_PORT 67 /* from server to client */ -#define DHCP_CLIENT_PORT 68 /* from client to server */ - -/* DHCP message OP code */ -#define DHCP_BOOTREQUEST 1 -#define DHCP_BOOTREPLY 2 - -/* DHCP message type */ -#define DHCP_DISCOVER 1 -#define DHCP_OFFER 2 -#define DHCP_REQUEST 3 -#define DHCP_DECLINE 4 -#define DHCP_ACK 5 -#define DHCP_NAK 6 -#define DHCP_RELEASE 7 -#define DHCP_INFORM 8 - -#define DHCP_HTYPE10MB 1 -#define DHCP_HTYPE100MB 2 - -#define DHCP_HLENETHERNET 6 -#define DHCP_HOPS 0 -#define DHCP_SECS 0 - -#define MAGIC_COOKIE 0x63825363 -#define MAX_DHCP_OPT 16 - -#define HOST_NAME "WIZnet" -#define DEFAULT_LEASE (900) //default lease time in seconds - -#define DHCP_CHECK_NONE (0) -#define DHCP_CHECK_RENEW_FAIL (1) -#define DHCP_CHECK_RENEW_OK (2) -#define DHCP_CHECK_REBIND_FAIL (3) -#define DHCP_CHECK_REBIND_OK (4) - -enum -{ - padOption = 0, - subnetMask = 1, - timerOffset = 2, - routersOnSubnet = 3, - /* timeServer = 4, - nameServer = 5,*/ - dns = 6, - /*logServer = 7, - cookieServer = 8, - lprServer = 9, - impressServer = 10, - resourceLocationServer = 11,*/ - hostName = 12, - /*bootFileSize = 13, - meritDumpFile = 14,*/ - domainName = 15, - /*swapServer = 16, - rootPath = 17, - extentionsPath = 18, - IPforwarding = 19, - nonLocalSourceRouting = 20, - policyFilter = 21, - maxDgramReasmSize = 22, - defaultIPTTL = 23, - pathMTUagingTimeout = 24, - pathMTUplateauTable = 25, - ifMTU = 26, - allSubnetsLocal = 27, - broadcastAddr = 28, - performMaskDiscovery = 29, - maskSupplier = 30, - performRouterDiscovery = 31, - routerSolicitationAddr = 32, - staticRoute = 33, - trailerEncapsulation = 34, - arpCacheTimeout = 35, - ethernetEncapsulation = 36, - tcpDefaultTTL = 37, - tcpKeepaliveInterval = 38, - tcpKeepaliveGarbage = 39, - nisDomainName = 40, - nisServers = 41, - ntpServers = 42, - vendorSpecificInfo = 43, - netBIOSnameServer = 44, - netBIOSdgramDistServer = 45, - netBIOSnodeType = 46, - netBIOSscope = 47, - xFontServer = 48, - xDisplayManager = 49,*/ - dhcpRequestedIPaddr = 50, - dhcpIPaddrLeaseTime = 51, - /*dhcpOptionOverload = 52,*/ - dhcpMessageType = 53, - dhcpServerIdentifier = 54, - dhcpParamRequest = 55, - /*dhcpMsg = 56, - dhcpMaxMsgSize = 57,*/ - dhcpT1value = 58, - dhcpT2value = 59, - /*dhcpClassIdentifier = 60,*/ - dhcpClientIdentifier = 61, - endOption = 255 -}; - -typedef struct _RIP_MSG_FIXED -{ - uint8_t op; - uint8_t htype; - uint8_t hlen; - uint8_t hops; - uint32_t xid; - uint16_t secs; - uint16_t flags; - uint8_t ciaddr[4]; - uint8_t yiaddr[4]; - uint8_t siaddr[4]; - uint8_t giaddr[4]; - uint8_t chaddr[6]; -}RIP_MSG_FIXED; - -class DhcpClass { -private: - uint32_t _dhcpInitialTransactionId; - uint32_t _dhcpTransactionId; - uint8_t _dhcpMacAddr[6]; - uint8_t _dhcpLocalIp[4]; - uint8_t _dhcpSubnetMask[4]; - uint8_t _dhcpGatewayIp[4]; - uint8_t _dhcpDhcpServerIp[4]; - uint8_t _dhcpDnsServerIp[4]; - uint32_t _dhcpLeaseTime; - uint32_t _dhcpT1, _dhcpT2; - signed long _renewInSec; - signed long _rebindInSec; - signed long _lastCheck; - unsigned long _timeout; - unsigned long _responseTimeout; - unsigned long _secTimeout; - uint8_t _dhcp_state; - EthernetUDP _dhcpUdpSocket; - - int request_DHCP_lease(); - void reset_DHCP_lease(); - void presend_DHCP(); - void send_DHCP_MESSAGE(uint8_t, uint16_t); - void printByte(char *, uint8_t); - - uint8_t parseDHCPResponse(unsigned long responseTimeout, uint32_t& transactionId); -public: - IPAddress getLocalIp(); - IPAddress getSubnetMask(); - IPAddress getGatewayIp(); - IPAddress getDhcpServerIp(); - IPAddress getDnsServerIp(); - - int beginWithDHCP(uint8_t *, unsigned long timeout = 60000, unsigned long responseTimeout = 4000); - int checkLease(); -}; - -#endif diff --git a/build/linux/work/libraries/Ethernet/Dns.cpp b/build/linux/work/libraries/Ethernet/Dns.cpp deleted file mode 100644 index b3c1a9dc1..000000000 --- a/build/linux/work/libraries/Ethernet/Dns.cpp +++ /dev/null @@ -1,423 +0,0 @@ -// Arduino DNS client for WizNet5100-based Ethernet shield -// (c) Copyright 2009-2010 MCQN Ltd. -// Released under Apache License, version 2.0 - -#include "w5100.h" -#include "EthernetUdp.h" -#include "util.h" - -#include "Dns.h" -#include -//#include -#include "Arduino.h" - - -#define SOCKET_NONE 255 -// Various flags and header field values for a DNS message -#define UDP_HEADER_SIZE 8 -#define DNS_HEADER_SIZE 12 -#define TTL_SIZE 4 -#define QUERY_FLAG (0) -#define RESPONSE_FLAG (1<<15) -#define QUERY_RESPONSE_MASK (1<<15) -#define OPCODE_STANDARD_QUERY (0) -#define OPCODE_INVERSE_QUERY (1<<11) -#define OPCODE_STATUS_REQUEST (2<<11) -#define OPCODE_MASK (15<<11) -#define AUTHORITATIVE_FLAG (1<<10) -#define TRUNCATION_FLAG (1<<9) -#define RECURSION_DESIRED_FLAG (1<<8) -#define RECURSION_AVAILABLE_FLAG (1<<7) -#define RESP_NO_ERROR (0) -#define RESP_FORMAT_ERROR (1) -#define RESP_SERVER_FAILURE (2) -#define RESP_NAME_ERROR (3) -#define RESP_NOT_IMPLEMENTED (4) -#define RESP_REFUSED (5) -#define RESP_MASK (15) -#define TYPE_A (0x0001) -#define CLASS_IN (0x0001) -#define LABEL_COMPRESSION_MASK (0xC0) -// Port number that DNS servers listen on -#define DNS_PORT 53 - -// Possible return codes from ProcessResponse -#define SUCCESS 1 -#define TIMED_OUT -1 -#define INVALID_SERVER -2 -#define TRUNCATED -3 -#define INVALID_RESPONSE -4 - -void DNSClient::begin(const IPAddress& aDNSServer) -{ - iDNSServer = aDNSServer; - iRequestId = 0; -} - - -int DNSClient::inet_aton(const char* aIPAddrString, IPAddress& aResult) -{ - // See if we've been given a valid IP address - const char* p =aIPAddrString; - while (*p && - ( (*p == '.') || (*p >= '0') || (*p <= '9') )) - { - p++; - } - - if (*p == '\0') - { - // It's looking promising, we haven't found any invalid characters - p = aIPAddrString; - int segment =0; - int segmentValue =0; - while (*p && (segment < 4)) - { - if (*p == '.') - { - // We've reached the end of a segment - if (segmentValue > 255) - { - // You can't have IP address segments that don't fit in a byte - return 0; - } - else - { - aResult[segment] = (byte)segmentValue; - segment++; - segmentValue = 0; - } - } - else - { - // Next digit - segmentValue = (segmentValue*10)+(*p - '0'); - } - p++; - } - // We've reached the end of address, but there'll still be the last - // segment to deal with - if ((segmentValue > 255) || (segment > 3)) - { - // You can't have IP address segments that don't fit in a byte, - // or more than four segments - return 0; - } - else - { - aResult[segment] = (byte)segmentValue; - return 1; - } - } - else - { - return 0; - } -} - -int DNSClient::getHostByName(const char* aHostname, IPAddress& aResult) -{ - int ret =0; - - // See if it's a numeric IP address - if (inet_aton(aHostname, aResult)) - { - // It is, our work here is done - return 1; - } - - // Check we've got a valid DNS server to use - if (iDNSServer == INADDR_NONE) - { - return INVALID_SERVER; - } - - // Find a socket to use - if (iUdp.begin(1024+(millis() & 0xF)) == 1) - { - // Try up to three times - int retries = 0; -// while ((retries < 3) && (ret <= 0)) - { - // Send DNS request - ret = iUdp.beginPacket(iDNSServer, DNS_PORT); - if (ret != 0) - { - // Now output the request data - ret = BuildRequest(aHostname); - if (ret != 0) - { - // And finally send the request - ret = iUdp.endPacket(); - if (ret != 0) - { - // Now wait for a response - int wait_retries = 0; - ret = TIMED_OUT; - while ((wait_retries < 3) && (ret == TIMED_OUT)) - { - ret = ProcessResponse(5000, aResult); - wait_retries++; - } - } - } - } - retries++; - } - - // We're done with the socket now - iUdp.stop(); - } - - return ret; -} - -uint16_t DNSClient::BuildRequest(const char* aName) -{ - // Build header - // 1 1 1 1 1 1 - // 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 - // +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+ - // | ID | - // +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+ - // |QR| Opcode |AA|TC|RD|RA| Z | RCODE | - // +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+ - // | QDCOUNT | - // +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+ - // | ANCOUNT | - // +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+ - // | NSCOUNT | - // +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+ - // | ARCOUNT | - // +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+ - // As we only support one request at a time at present, we can simplify - // some of this header - iRequestId = millis(); // generate a random ID - uint16_t twoByteBuffer; - - // FIXME We should also check that there's enough space available to write to, rather - // FIXME than assume there's enough space (as the code does at present) - iUdp.write((uint8_t*)&iRequestId, sizeof(iRequestId)); - - twoByteBuffer = htons(QUERY_FLAG | OPCODE_STANDARD_QUERY | RECURSION_DESIRED_FLAG); - iUdp.write((uint8_t*)&twoByteBuffer, sizeof(twoByteBuffer)); - - twoByteBuffer = htons(1); // One question record - iUdp.write((uint8_t*)&twoByteBuffer, sizeof(twoByteBuffer)); - - twoByteBuffer = 0; // Zero answer records - iUdp.write((uint8_t*)&twoByteBuffer, sizeof(twoByteBuffer)); - - iUdp.write((uint8_t*)&twoByteBuffer, sizeof(twoByteBuffer)); - // and zero additional records - iUdp.write((uint8_t*)&twoByteBuffer, sizeof(twoByteBuffer)); - - // Build question - const char* start =aName; - const char* end =start; - uint8_t len; - // Run through the name being requested - while (*end) - { - // Find out how long this section of the name is - end = start; - while (*end && (*end != '.') ) - { - end++; - } - - if (end-start > 0) - { - // Write out the size of this section - len = end-start; - iUdp.write(&len, sizeof(len)); - // And then write out the section - iUdp.write((uint8_t*)start, end-start); - } - start = end+1; - } - - // We've got to the end of the question name, so - // terminate it with a zero-length section - len = 0; - iUdp.write(&len, sizeof(len)); - // Finally the type and class of question - twoByteBuffer = htons(TYPE_A); - iUdp.write((uint8_t*)&twoByteBuffer, sizeof(twoByteBuffer)); - - twoByteBuffer = htons(CLASS_IN); // Internet class of question - iUdp.write((uint8_t*)&twoByteBuffer, sizeof(twoByteBuffer)); - // Success! Everything buffered okay - return 1; -} - - -uint16_t DNSClient::ProcessResponse(uint16_t aTimeout, IPAddress& aAddress) -{ - uint32_t startTime = millis(); - - // Wait for a response packet - while(iUdp.parsePacket() <= 0) - { - if((millis() - startTime) > aTimeout) - return TIMED_OUT; - delay(50); - } - - // We've had a reply! - // Read the UDP header - uint8_t header[DNS_HEADER_SIZE]; // Enough space to reuse for the DNS header - // Check that it's a response from the right server and the right port - if ( (iDNSServer != iUdp.remoteIP()) || - (iUdp.remotePort() != DNS_PORT) ) - { - // It's not from who we expected - return INVALID_SERVER; - } - - // Read through the rest of the response - if (iUdp.available() < DNS_HEADER_SIZE) - { - return TRUNCATED; - } - iUdp.read(header, DNS_HEADER_SIZE); - - uint16_t header_flags = htons(*((uint16_t*)&header[2])); - // Check that it's a response to this request - if ( ( iRequestId != (*((uint16_t*)&header[0])) ) || - ((header_flags & QUERY_RESPONSE_MASK) != (uint16_t)RESPONSE_FLAG) ) - { - // Mark the entire packet as read - iUdp.flush(); - return INVALID_RESPONSE; - } - // Check for any errors in the response (or in our request) - // although we don't do anything to get round these - if ( (header_flags & TRUNCATION_FLAG) || (header_flags & RESP_MASK) ) - { - // Mark the entire packet as read - iUdp.flush(); - return -5; //INVALID_RESPONSE; - } - - // And make sure we've got (at least) one answer - uint16_t answerCount = htons(*((uint16_t*)&header[6])); - if (answerCount == 0 ) - { - // Mark the entire packet as read - iUdp.flush(); - return -6; //INVALID_RESPONSE; - } - - // Skip over any questions - for (uint16_t i =0; i < htons(*((uint16_t*)&header[4])); i++) - { - // Skip over the name - uint8_t len; - do - { - iUdp.read(&len, sizeof(len)); - if (len > 0) - { - // Don't need to actually read the data out for the string, just - // advance ptr to beyond it - while(len--) - { - iUdp.read(); // we don't care about the returned byte - } - } - } while (len != 0); - - // Now jump over the type and class - for (int i =0; i < 4; i++) - { - iUdp.read(); // we don't care about the returned byte - } - } - - // Now we're up to the bit we're interested in, the answer - // There might be more than one answer (although we'll just use the first - // type A answer) and some authority and additional resource records but - // we're going to ignore all of them. - - for (uint16_t i =0; i < answerCount; i++) - { - // Skip the name - uint8_t len; - do - { - iUdp.read(&len, sizeof(len)); - if ((len & LABEL_COMPRESSION_MASK) == 0) - { - // It's just a normal label - if (len > 0) - { - // And it's got a length - // Don't need to actually read the data out for the string, - // just advance ptr to beyond it - while(len--) - { - iUdp.read(); // we don't care about the returned byte - } - } - } - else - { - // This is a pointer to a somewhere else in the message for the - // rest of the name. We don't care about the name, and RFC1035 - // says that a name is either a sequence of labels ended with a - // 0 length octet or a pointer or a sequence of labels ending in - // a pointer. Either way, when we get here we're at the end of - // the name - // Skip over the pointer - iUdp.read(); // we don't care about the returned byte - // And set len so that we drop out of the name loop - len = 0; - } - } while (len != 0); - - // Check the type and class - uint16_t answerType; - uint16_t answerClass; - iUdp.read((uint8_t*)&answerType, sizeof(answerType)); - iUdp.read((uint8_t*)&answerClass, sizeof(answerClass)); - - // Ignore the Time-To-Live as we don't do any caching - for (int i =0; i < TTL_SIZE; i++) - { - iUdp.read(); // we don't care about the returned byte - } - - // And read out the length of this answer - // Don't need header_flags anymore, so we can reuse it here - iUdp.read((uint8_t*)&header_flags, sizeof(header_flags)); - - if ( (htons(answerType) == TYPE_A) && (htons(answerClass) == CLASS_IN) ) - { - if (htons(header_flags) != 4) - { - // It's a weird size - // Mark the entire packet as read - iUdp.flush(); - return -9;//INVALID_RESPONSE; - } - iUdp.read(aAddress.raw_address(), 4); - return SUCCESS; - } - else - { - // This isn't an answer type we're after, move onto the next one - for (uint16_t i =0; i < htons(header_flags); i++) - { - iUdp.read(); // we don't care about the returned byte - } - } - } - - // Mark the entire packet as read - iUdp.flush(); - - // If we get here then we haven't found an answer - return -10;//INVALID_RESPONSE; -} - diff --git a/build/linux/work/libraries/Ethernet/Dns.h b/build/linux/work/libraries/Ethernet/Dns.h deleted file mode 100644 index 6bcb98ab9..000000000 --- a/build/linux/work/libraries/Ethernet/Dns.h +++ /dev/null @@ -1,41 +0,0 @@ -// Arduino DNS client for WizNet5100-based Ethernet shield -// (c) Copyright 2009-2010 MCQN Ltd. -// Released under Apache License, version 2.0 - -#ifndef DNSClient_h -#define DNSClient_h - -#include - -class DNSClient -{ -public: - // ctor - void begin(const IPAddress& aDNSServer); - - /** Convert a numeric IP address string into a four-byte IP address. - @param aIPAddrString IP address to convert - @param aResult IPAddress structure to store the returned IP address - @result 1 if aIPAddrString was successfully converted to an IP address, - else error code - */ - int inet_aton(const char *aIPAddrString, IPAddress& aResult); - - /** Resolve the given hostname to an IP address. - @param aHostname Name to be resolved - @param aResult IPAddress structure to store the returned IP address - @result 1 if aIPAddrString was successfully converted to an IP address, - else error code - */ - int getHostByName(const char* aHostname, IPAddress& aResult); - -protected: - uint16_t BuildRequest(const char* aName); - uint16_t ProcessResponse(uint16_t aTimeout, IPAddress& aAddress); - - IPAddress iDNSServer; - uint16_t iRequestId; - EthernetUDP iUdp; -}; - -#endif diff --git a/build/linux/work/libraries/Ethernet/Ethernet.cpp b/build/linux/work/libraries/Ethernet/Ethernet.cpp deleted file mode 100644 index 5d28f71f9..000000000 --- a/build/linux/work/libraries/Ethernet/Ethernet.cpp +++ /dev/null @@ -1,121 +0,0 @@ -#include "w5100.h" -#include "Ethernet.h" -#include "Dhcp.h" - -// XXX: don't make assumptions about the value of MAX_SOCK_NUM. -uint8_t EthernetClass::_state[MAX_SOCK_NUM] = { - 0, 0, 0, 0 }; -uint16_t EthernetClass::_server_port[MAX_SOCK_NUM] = { - 0, 0, 0, 0 }; - -int EthernetClass::begin(uint8_t *mac_address) -{ - _dhcp = new DhcpClass(); - - - // Initialise the basic info - W5100.init(); - W5100.setMACAddress(mac_address); - W5100.setIPAddress(IPAddress(0,0,0,0).raw_address()); - - // Now try to get our config info from a DHCP server - int ret = _dhcp->beginWithDHCP(mac_address); - if(ret == 1) - { - // We've successfully found a DHCP server and got our configuration info, so set things - // accordingly - W5100.setIPAddress(_dhcp->getLocalIp().raw_address()); - W5100.setGatewayIp(_dhcp->getGatewayIp().raw_address()); - W5100.setSubnetMask(_dhcp->getSubnetMask().raw_address()); - _dnsServerAddress = _dhcp->getDnsServerIp(); - } - - return ret; -} - -void EthernetClass::begin(uint8_t *mac_address, IPAddress local_ip) -{ - // Assume the DNS server will be the machine on the same network as the local IP - // but with last octet being '1' - IPAddress dns_server = local_ip; - dns_server[3] = 1; - begin(mac_address, local_ip, dns_server); -} - -void EthernetClass::begin(uint8_t *mac_address, IPAddress local_ip, IPAddress dns_server) -{ - // Assume the gateway will be the machine on the same network as the local IP - // but with last octet being '1' - IPAddress gateway = local_ip; - gateway[3] = 1; - begin(mac_address, local_ip, dns_server, gateway); -} - -void EthernetClass::begin(uint8_t *mac_address, IPAddress local_ip, IPAddress dns_server, IPAddress gateway) -{ - IPAddress subnet(255, 255, 255, 0); - begin(mac_address, local_ip, dns_server, gateway, subnet); -} - -void EthernetClass::begin(uint8_t *mac, IPAddress local_ip, IPAddress dns_server, IPAddress gateway, IPAddress subnet) -{ - W5100.init(); - W5100.setMACAddress(mac); - W5100.setIPAddress(local_ip._address); - W5100.setGatewayIp(gateway._address); - W5100.setSubnetMask(subnet._address); - _dnsServerAddress = dns_server; -} - -int EthernetClass::maintain(){ - int rc = DHCP_CHECK_NONE; - if(_dhcp != NULL){ - //we have a pointer to dhcp, use it - rc = _dhcp->checkLease(); - switch ( rc ){ - case DHCP_CHECK_NONE: - //nothing done - break; - case DHCP_CHECK_RENEW_OK: - case DHCP_CHECK_REBIND_OK: - //we might have got a new IP. - W5100.setIPAddress(_dhcp->getLocalIp().raw_address()); - W5100.setGatewayIp(_dhcp->getGatewayIp().raw_address()); - W5100.setSubnetMask(_dhcp->getSubnetMask().raw_address()); - _dnsServerAddress = _dhcp->getDnsServerIp(); - break; - default: - //this is actually a error, it will retry though - break; - } - } - return rc; -} - -IPAddress EthernetClass::localIP() -{ - IPAddress ret; - W5100.getIPAddress(ret.raw_address()); - return ret; -} - -IPAddress EthernetClass::subnetMask() -{ - IPAddress ret; - W5100.getSubnetMask(ret.raw_address()); - return ret; -} - -IPAddress EthernetClass::gatewayIP() -{ - IPAddress ret; - W5100.getGatewayIp(ret.raw_address()); - return ret; -} - -IPAddress EthernetClass::dnsServerIP() -{ - return _dnsServerAddress; -} - -EthernetClass Ethernet; diff --git a/build/linux/work/libraries/Ethernet/Ethernet.h b/build/linux/work/libraries/Ethernet/Ethernet.h deleted file mode 100644 index 2a07ff35f..000000000 --- a/build/linux/work/libraries/Ethernet/Ethernet.h +++ /dev/null @@ -1,41 +0,0 @@ -#ifndef ethernet_h -#define ethernet_h - -#include -//#include "w5100.h" -#include "IPAddress.h" -#include "EthernetClient.h" -#include "EthernetServer.h" -#include "Dhcp.h" - -#define MAX_SOCK_NUM 4 - -class EthernetClass { -private: - IPAddress _dnsServerAddress; - DhcpClass* _dhcp; -public: - static uint8_t _state[MAX_SOCK_NUM]; - static uint16_t _server_port[MAX_SOCK_NUM]; - // Initialise the Ethernet shield to use the provided MAC address and gain the rest of the - // configuration through DHCP. - // Returns 0 if the DHCP configuration failed, and 1 if it succeeded - int begin(uint8_t *mac_address); - void begin(uint8_t *mac_address, IPAddress local_ip); - void begin(uint8_t *mac_address, IPAddress local_ip, IPAddress dns_server); - void begin(uint8_t *mac_address, IPAddress local_ip, IPAddress dns_server, IPAddress gateway); - void begin(uint8_t *mac_address, IPAddress local_ip, IPAddress dns_server, IPAddress gateway, IPAddress subnet); - int maintain(); - - IPAddress localIP(); - IPAddress subnetMask(); - IPAddress gatewayIP(); - IPAddress dnsServerIP(); - - friend class EthernetClient; - friend class EthernetServer; -}; - -extern EthernetClass Ethernet; - -#endif diff --git a/build/linux/work/libraries/Ethernet/EthernetClient.cpp b/build/linux/work/libraries/Ethernet/EthernetClient.cpp deleted file mode 100644 index a77a62beb..000000000 --- a/build/linux/work/libraries/Ethernet/EthernetClient.cpp +++ /dev/null @@ -1,165 +0,0 @@ -#include "w5100.h" -#include "socket.h" - -extern "C" { - #include "string.h" -} - -#include "Arduino.h" - -#include "Ethernet.h" -#include "EthernetClient.h" -#include "EthernetServer.h" -#include "Dns.h" - -uint16_t EthernetClient::_srcport = 1024; - -EthernetClient::EthernetClient() : _sock(MAX_SOCK_NUM) { -} - -EthernetClient::EthernetClient(uint8_t sock) : _sock(sock) { -} - -int EthernetClient::connect(const char* host, uint16_t port) { - // Look up the host first - int ret = 0; - DNSClient dns; - IPAddress remote_addr; - - dns.begin(Ethernet.dnsServerIP()); - ret = dns.getHostByName(host, remote_addr); - if (ret == 1) { - return connect(remote_addr, port); - } else { - return ret; - } -} - -int EthernetClient::connect(IPAddress ip, uint16_t port) { - if (_sock != MAX_SOCK_NUM) - return 0; - - for (int i = 0; i < MAX_SOCK_NUM; i++) { - uint8_t s = W5100.readSnSR(i); - if (s == SnSR::CLOSED || s == SnSR::FIN_WAIT) { - _sock = i; - break; - } - } - - if (_sock == MAX_SOCK_NUM) - return 0; - - _srcport++; - if (_srcport == 0) _srcport = 1024; - socket(_sock, SnMR::TCP, _srcport, 0); - - if (!::connect(_sock, rawIPAddress(ip), port)) { - _sock = MAX_SOCK_NUM; - return 0; - } - - while (status() != SnSR::ESTABLISHED) { - delay(1); - if (status() == SnSR::CLOSED) { - _sock = MAX_SOCK_NUM; - return 0; - } - } - - return 1; -} - -size_t EthernetClient::write(uint8_t b) { - return write(&b, 1); -} - -size_t EthernetClient::write(const uint8_t *buf, size_t size) { - if (_sock == MAX_SOCK_NUM) { - setWriteError(); - return 0; - } - if (!send(_sock, buf, size)) { - setWriteError(); - return 0; - } - return size; -} - -int EthernetClient::available() { - if (_sock != MAX_SOCK_NUM) - return W5100.getRXReceivedSize(_sock); - return 0; -} - -int EthernetClient::read() { - uint8_t b; - if ( recv(_sock, &b, 1) > 0 ) - { - // recv worked - return b; - } - else - { - // No data available - return -1; - } -} - -int EthernetClient::read(uint8_t *buf, size_t size) { - return recv(_sock, buf, size); -} - -int EthernetClient::peek() { - uint8_t b; - // Unlike recv, peek doesn't check to see if there's any data available, so we must - if (!available()) - return -1; - ::peek(_sock, &b); - return b; -} - -void EthernetClient::flush() { - while (available()) - read(); -} - -void EthernetClient::stop() { - if (_sock == MAX_SOCK_NUM) - return; - - // attempt to close the connection gracefully (send a FIN to other side) - disconnect(_sock); - unsigned long start = millis(); - - // wait a second for the connection to close - while (status() != SnSR::CLOSED && millis() - start < 1000) - delay(1); - - // if it hasn't closed, close it forcefully - if (status() != SnSR::CLOSED) - close(_sock); - - EthernetClass::_server_port[_sock] = 0; - _sock = MAX_SOCK_NUM; -} - -uint8_t EthernetClient::connected() { - if (_sock == MAX_SOCK_NUM) return 0; - - uint8_t s = status(); - return !(s == SnSR::LISTEN || s == SnSR::CLOSED || s == SnSR::FIN_WAIT || - (s == SnSR::CLOSE_WAIT && !available())); -} - -uint8_t EthernetClient::status() { - if (_sock == MAX_SOCK_NUM) return SnSR::CLOSED; - return W5100.readSnSR(_sock); -} - -// the next function allows us to use the client returned by -// EthernetServer::available() as the condition in an if-statement. - -EthernetClient::operator bool() { - return _sock != MAX_SOCK_NUM; -} diff --git a/build/linux/work/libraries/Ethernet/EthernetClient.h b/build/linux/work/libraries/Ethernet/EthernetClient.h deleted file mode 100644 index 44740fea7..000000000 --- a/build/linux/work/libraries/Ethernet/EthernetClient.h +++ /dev/null @@ -1,37 +0,0 @@ -#ifndef ethernetclient_h -#define ethernetclient_h -#include "Arduino.h" -#include "Print.h" -#include "Client.h" -#include "IPAddress.h" - -class EthernetClient : public Client { - -public: - EthernetClient(); - EthernetClient(uint8_t sock); - - uint8_t status(); - virtual int connect(IPAddress ip, uint16_t port); - virtual int connect(const char *host, uint16_t port); - virtual size_t write(uint8_t); - virtual size_t write(const uint8_t *buf, size_t size); - virtual int available(); - virtual int read(); - virtual int read(uint8_t *buf, size_t size); - virtual int peek(); - virtual void flush(); - virtual void stop(); - virtual uint8_t connected(); - virtual operator bool(); - - friend class EthernetServer; - - using Print::write; - -private: - static uint16_t _srcport; - uint8_t _sock; -}; - -#endif diff --git a/build/linux/work/libraries/Ethernet/EthernetServer.cpp b/build/linux/work/libraries/Ethernet/EthernetServer.cpp deleted file mode 100644 index 0308b9261..000000000 --- a/build/linux/work/libraries/Ethernet/EthernetServer.cpp +++ /dev/null @@ -1,91 +0,0 @@ -#include "w5100.h" -#include "socket.h" -extern "C" { -#include "string.h" -} - -#include "Ethernet.h" -#include "EthernetClient.h" -#include "EthernetServer.h" - -EthernetServer::EthernetServer(uint16_t port) -{ - _port = port; -} - -void EthernetServer::begin() -{ - for (int sock = 0; sock < MAX_SOCK_NUM; sock++) { - EthernetClient client(sock); - if (client.status() == SnSR::CLOSED) { - socket(sock, SnMR::TCP, _port, 0); - listen(sock); - EthernetClass::_server_port[sock] = _port; - break; - } - } -} - -void EthernetServer::accept() -{ - int listening = 0; - - for (int sock = 0; sock < MAX_SOCK_NUM; sock++) { - EthernetClient client(sock); - - if (EthernetClass::_server_port[sock] == _port) { - if (client.status() == SnSR::LISTEN) { - listening = 1; - } - else if (client.status() == SnSR::CLOSE_WAIT && !client.available()) { - client.stop(); - } - } - } - - if (!listening) { - begin(); - } -} - -EthernetClient EthernetServer::available() -{ - accept(); - - for (int sock = 0; sock < MAX_SOCK_NUM; sock++) { - EthernetClient client(sock); - if (EthernetClass::_server_port[sock] == _port && - (client.status() == SnSR::ESTABLISHED || - client.status() == SnSR::CLOSE_WAIT)) { - if (client.available()) { - // XXX: don't always pick the lowest numbered socket. - return client; - } - } - } - - return EthernetClient(MAX_SOCK_NUM); -} - -size_t EthernetServer::write(uint8_t b) -{ - return write(&b, 1); -} - -size_t EthernetServer::write(const uint8_t *buffer, size_t size) -{ - size_t n = 0; - - accept(); - - for (int sock = 0; sock < MAX_SOCK_NUM; sock++) { - EthernetClient client(sock); - - if (EthernetClass::_server_port[sock] == _port && - client.status() == SnSR::ESTABLISHED) { - n += client.write(buffer, size); - } - } - - return n; -} diff --git a/build/linux/work/libraries/Ethernet/EthernetServer.h b/build/linux/work/libraries/Ethernet/EthernetServer.h deleted file mode 100644 index 86ccafe96..000000000 --- a/build/linux/work/libraries/Ethernet/EthernetServer.h +++ /dev/null @@ -1,22 +0,0 @@ -#ifndef ethernetserver_h -#define ethernetserver_h - -#include "Server.h" - -class EthernetClient; - -class EthernetServer : -public Server { -private: - uint16_t _port; - void accept(); -public: - EthernetServer(uint16_t); - EthernetClient available(); - virtual void begin(); - virtual size_t write(uint8_t); - virtual size_t write(const uint8_t *buf, size_t size); - using Print::write; -}; - -#endif diff --git a/build/linux/work/libraries/Ethernet/EthernetUdp.cpp b/build/linux/work/libraries/Ethernet/EthernetUdp.cpp deleted file mode 100644 index 37600529f..000000000 --- a/build/linux/work/libraries/Ethernet/EthernetUdp.cpp +++ /dev/null @@ -1,218 +0,0 @@ -/* - * Udp.cpp: Library to send/receive UDP packets with the Arduino ethernet shield. - * This version only offers minimal wrapping of socket.c/socket.h - * Drop Udp.h/.cpp into the Ethernet library directory at hardware/libraries/Ethernet/ - * - * MIT License: - * Copyright (c) 2008 Bjoern Hartmann - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * bjoern@cs.stanford.edu 12/30/2008 - */ - -#include "w5100.h" -#include "socket.h" -#include "Ethernet.h" -#include "Udp.h" -#include "Dns.h" - -/* Constructor */ -EthernetUDP::EthernetUDP() : _sock(MAX_SOCK_NUM) {} - -/* Start EthernetUDP socket, listening at local port PORT */ -uint8_t EthernetUDP::begin(uint16_t port) { - if (_sock != MAX_SOCK_NUM) - return 0; - - for (int i = 0; i < MAX_SOCK_NUM; i++) { - uint8_t s = W5100.readSnSR(i); - if (s == SnSR::CLOSED || s == SnSR::FIN_WAIT) { - _sock = i; - break; - } - } - - if (_sock == MAX_SOCK_NUM) - return 0; - - _port = port; - _remaining = 0; - socket(_sock, SnMR::UDP, _port, 0); - - return 1; -} - -/* return number of bytes available in the current packet, - will return zero if parsePacket hasn't been called yet */ -int EthernetUDP::available() { - return _remaining; -} - -/* Release any resources being used by this EthernetUDP instance */ -void EthernetUDP::stop() -{ - if (_sock == MAX_SOCK_NUM) - return; - - close(_sock); - - EthernetClass::_server_port[_sock] = 0; - _sock = MAX_SOCK_NUM; -} - -int EthernetUDP::beginPacket(const char *host, uint16_t port) -{ - // Look up the host first - int ret = 0; - DNSClient dns; - IPAddress remote_addr; - - dns.begin(Ethernet.dnsServerIP()); - ret = dns.getHostByName(host, remote_addr); - if (ret == 1) { - return beginPacket(remote_addr, port); - } else { - return ret; - } -} - -int EthernetUDP::beginPacket(IPAddress ip, uint16_t port) -{ - _offset = 0; - return startUDP(_sock, rawIPAddress(ip), port); -} - -int EthernetUDP::endPacket() -{ - return sendUDP(_sock); -} - -size_t EthernetUDP::write(uint8_t byte) -{ - return write(&byte, 1); -} - -size_t EthernetUDP::write(const uint8_t *buffer, size_t size) -{ - uint16_t bytes_written = bufferData(_sock, _offset, buffer, size); - _offset += bytes_written; - return bytes_written; -} - -int EthernetUDP::parsePacket() -{ - // discard any remaining bytes in the last packet - flush(); - - if (W5100.getRXReceivedSize(_sock) > 0) - { - //HACK - hand-parse the UDP packet using TCP recv method - uint8_t tmpBuf[8]; - int ret =0; - //read 8 header bytes and get IP and port from it - ret = recv(_sock,tmpBuf,8); - if (ret > 0) - { - _remoteIP = tmpBuf; - _remotePort = tmpBuf[4]; - _remotePort = (_remotePort << 8) + tmpBuf[5]; - _remaining = tmpBuf[6]; - _remaining = (_remaining << 8) + tmpBuf[7]; - - // When we get here, any remaining bytes are the data - ret = _remaining; - } - return ret; - } - // There aren't any packets available - return 0; -} - -int EthernetUDP::read() -{ - uint8_t byte; - - if ((_remaining > 0) && (recv(_sock, &byte, 1) > 0)) - { - // We read things without any problems - _remaining--; - return byte; - } - - // If we get here, there's no data available - return -1; -} - -int EthernetUDP::read(unsigned char* buffer, size_t len) -{ - - if (_remaining > 0) - { - - int got; - - if (_remaining <= len) - { - // data should fit in the buffer - got = recv(_sock, buffer, _remaining); - } - else - { - // too much data for the buffer, - // grab as much as will fit - got = recv(_sock, buffer, len); - } - - if (got > 0) - { - _remaining -= got; - return got; - } - - } - - // If we get here, there's no data available or recv failed - return -1; - -} - -int EthernetUDP::peek() -{ - uint8_t b; - // Unlike recv, peek doesn't check to see if there's any data available, so we must. - // If the user hasn't called parsePacket yet then return nothing otherwise they - // may get the UDP header - if (!_remaining) - return -1; - ::peek(_sock, &b); - return b; -} - -void EthernetUDP::flush() -{ - // could this fail (loop endlessly) if _remaining > 0 and recv in read fails? - // should only occur if recv fails after telling us the data is there, lets - // hope the w5100 always behaves :) - - while (_remaining) - { - read(); - } -} - diff --git a/build/linux/work/libraries/Ethernet/EthernetUdp.h b/build/linux/work/libraries/Ethernet/EthernetUdp.h deleted file mode 100644 index 8a6b7ab5a..000000000 --- a/build/linux/work/libraries/Ethernet/EthernetUdp.h +++ /dev/null @@ -1,99 +0,0 @@ -/* - * Udp.cpp: Library to send/receive UDP packets with the Arduino ethernet shield. - * This version only offers minimal wrapping of socket.c/socket.h - * Drop Udp.h/.cpp into the Ethernet library directory at hardware/libraries/Ethernet/ - * - * NOTE: UDP is fast, but has some important limitations (thanks to Warren Gray for mentioning these) - * 1) UDP does not guarantee the order in which assembled UDP packets are received. This - * might not happen often in practice, but in larger network topologies, a UDP - * packet can be received out of sequence. - * 2) UDP does not guard against lost packets - so packets *can* disappear without the sender being - * aware of it. Again, this may not be a concern in practice on small local networks. - * For more information, see http://www.cafeaulait.org/course/week12/35.html - * - * MIT License: - * Copyright (c) 2008 Bjoern Hartmann - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * bjoern@cs.stanford.edu 12/30/2008 - */ - -#ifndef ethernetudp_h -#define ethernetudp_h - -#include - -#define UDP_TX_PACKET_MAX_SIZE 24 - -class EthernetUDP : public UDP { -private: - uint8_t _sock; // socket ID for Wiz5100 - uint16_t _port; // local port to listen on - IPAddress _remoteIP; // remote IP address for the incoming packet whilst it's being processed - uint16_t _remotePort; // remote port for the incoming packet whilst it's being processed - uint16_t _offset; // offset into the packet being sent - uint16_t _remaining; // remaining bytes of incoming packet yet to be processed - -public: - EthernetUDP(); // Constructor - virtual uint8_t begin(uint16_t); // initialize, start listening on specified port. Returns 1 if successful, 0 if there are no sockets available to use - virtual void stop(); // Finish with the UDP socket - - // Sending UDP packets - - // Start building up a packet to send to the remote host specific in ip and port - // Returns 1 if successful, 0 if there was a problem with the supplied IP address or port - virtual int beginPacket(IPAddress ip, uint16_t port); - // Start building up a packet to send to the remote host specific in host and port - // Returns 1 if successful, 0 if there was a problem resolving the hostname or port - virtual int beginPacket(const char *host, uint16_t port); - // Finish off this packet and send it - // Returns 1 if the packet was sent successfully, 0 if there was an error - virtual int endPacket(); - // Write a single byte into the packet - virtual size_t write(uint8_t); - // Write size bytes from buffer into the packet - virtual size_t write(const uint8_t *buffer, size_t size); - - using Print::write; - - // Start processing the next available incoming packet - // Returns the size of the packet in bytes, or 0 if no packets are available - virtual int parsePacket(); - // Number of bytes remaining in the current packet - virtual int available(); - // Read a single byte from the current packet - virtual int read(); - // Read up to len bytes from the current packet and place them into buffer - // Returns the number of bytes read, or 0 if none are available - virtual int read(unsigned char* buffer, size_t len); - // Read up to len characters from the current packet and place them into buffer - // Returns the number of characters read, or 0 if none are available - virtual int read(char* buffer, size_t len) { return read((unsigned char*)buffer, len); }; - // Return the next byte from the current packet without moving on to the next byte - virtual int peek(); - virtual void flush(); // Finish reading the current packet - - // Return the IP address of the host who sent the current incoming packet - virtual IPAddress remoteIP() { return _remoteIP; }; - // Return the port of the host who sent the current incoming packet - virtual uint16_t remotePort() { return _remotePort; }; -}; - -#endif diff --git a/build/linux/work/libraries/Ethernet/examples/BarometricPressureWebServer/BarometricPressureWebServer.ino b/build/linux/work/libraries/Ethernet/examples/BarometricPressureWebServer/BarometricPressureWebServer.ino deleted file mode 100644 index bfbcb6d4a..000000000 --- a/build/linux/work/libraries/Ethernet/examples/BarometricPressureWebServer/BarometricPressureWebServer.ino +++ /dev/null @@ -1,222 +0,0 @@ -/* - SCP1000 Barometric Pressure Sensor Display - - Serves the output of a Barometric Pressure Sensor as a web page. - Uses the SPI library. For details on the sensor, see: - http://www.sparkfun.com/commerce/product_info.php?products_id=8161 - http://www.vti.fi/en/support/obsolete_products/pressure_sensors/ - - This sketch adapted from Nathan Seidle's SCP1000 example for PIC: - http://www.sparkfun.com/datasheets/Sensors/SCP1000-Testing.zip - - Circuit: - SCP1000 sensor attached to pins 6,7, and 11 - 13: - DRDY: pin 6 - CSB: pin 7 - MOSI: pin 11 - MISO: pin 12 - SCK: pin 13 - - created 31 July 2010 - by Tom Igoe - */ - -#include -// the sensor communicates using SPI, so include the library: -#include - - -// assign a MAC address for the ethernet controller. -// fill in your address here: -byte mac[] = { - 0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED}; -// assign an IP address for the controller: -IPAddress ip(192,168,1,20); -IPAddress gateway(192,168,1,1); -IPAddress subnet(255, 255, 255, 0); - - -// Initialize the Ethernet server library -// with the IP address and port you want to use -// (port 80 is default for HTTP): -EthernetServer server(80); - - -//Sensor's memory register addresses: -const int PRESSURE = 0x1F; //3 most significant bits of pressure -const int PRESSURE_LSB = 0x20; //16 least significant bits of pressure -const int TEMPERATURE = 0x21; //16 bit temperature reading - -// pins used for the connection with the sensor -// the others you need are controlled by the SPI library): -const int dataReadyPin = 6; -const int chipSelectPin = 7; - -float temperature = 0.0; -long pressure = 0; -long lastReadingTime = 0; - -void setup() { - // start the SPI library: - SPI.begin(); - - // start the Ethernet connection and the server: - Ethernet.begin(mac, ip); - server.begin(); - - // initalize the data ready and chip select pins: - pinMode(dataReadyPin, INPUT); - pinMode(chipSelectPin, OUTPUT); - - Serial.begin(9600); - - //Configure SCP1000 for low noise configuration: - writeRegister(0x02, 0x2D); - writeRegister(0x01, 0x03); - writeRegister(0x03, 0x02); - - // give the sensor and Ethernet shield time to set up: - delay(1000); - - //Set the sensor to high resolution mode tp start readings: - writeRegister(0x03, 0x0A); - -} - -void loop() { - // check for a reading no more than once a second. - if (millis() - lastReadingTime > 1000){ - // if there's a reading ready, read it: - // don't do anything until the data ready pin is high: - if (digitalRead(dataReadyPin) == HIGH) { - getData(); - // timestamp the last time you got a reading: - lastReadingTime = millis(); - } - } - - // listen for incoming Ethernet connections: - listenForEthernetClients(); -} - - -void getData() { - Serial.println("Getting reading"); - //Read the temperature data - int tempData = readRegister(0x21, 2); - - // convert the temperature to celsius and display it: - temperature = (float)tempData / 20.0; - - //Read the pressure data highest 3 bits: - byte pressureDataHigh = readRegister(0x1F, 1); - pressureDataHigh &= 0b00000111; //you only needs bits 2 to 0 - - //Read the pressure data lower 16 bits: - unsigned int pressureDataLow = readRegister(0x20, 2); - //combine the two parts into one 19-bit number: - pressure = ((pressureDataHigh << 16) | pressureDataLow)/4; - - Serial.print("Temperature: "); - Serial.print(temperature); - Serial.println(" degrees C"); - Serial.print("Pressure: " + String(pressure)); - Serial.println(" Pa"); -} - -void listenForEthernetClients() { - // listen for incoming clients - EthernetClient client = server.available(); - if (client) { - Serial.println("Got a client"); - // an http request ends with a blank line - boolean currentLineIsBlank = true; - while (client.connected()) { - if (client.available()) { - char c = client.read(); - // if you've gotten to the end of the line (received a newline - // character) and the line is blank, the http request has ended, - // so you can send a reply - if (c == '\n' && currentLineIsBlank) { - // send a standard http response header - client.println("HTTP/1.1 200 OK"); - client.println("Content-Type: text/html"); - client.println(); - // print the current readings, in HTML format: - client.print("Temperature: "); - client.print(temperature); - client.print(" degrees C"); - client.println("
    "); - client.print("Pressure: " + String(pressure)); - client.print(" Pa"); - client.println("
    "); - break; - } - if (c == '\n') { - // you're starting a new line - currentLineIsBlank = true; - } - else if (c != '\r') { - // you've gotten a character on the current line - currentLineIsBlank = false; - } - } - } - // give the web browser time to receive the data - delay(1); - // close the connection: - client.stop(); - } -} - - -//Send a write command to SCP1000 -void writeRegister(byte registerName, byte registerValue) { - // SCP1000 expects the register name in the upper 6 bits - // of the byte: - registerName <<= 2; - // command (read or write) goes in the lower two bits: - registerName |= 0b00000010; //Write command - - // take the chip select low to select the device: - digitalWrite(chipSelectPin, LOW); - - SPI.transfer(registerName); //Send register location - SPI.transfer(registerValue); //Send value to record into register - - // take the chip select high to de-select: - digitalWrite(chipSelectPin, HIGH); -} - - -//Read register from the SCP1000: -unsigned int readRegister(byte registerName, int numBytes) { - byte inByte = 0; // incoming from the SPI read - unsigned int result = 0; // result to return - - // SCP1000 expects the register name in the upper 6 bits - // of the byte: - registerName <<= 2; - // command (read or write) goes in the lower two bits: - registerName &= 0b11111100; //Read command - - // take the chip select low to select the device: - digitalWrite(chipSelectPin, LOW); - // send the device the register you want to read: - int command = SPI.transfer(registerName); - // send a value of 0 to read the first byte returned: - inByte = SPI.transfer(0x00); - - result = inByte; - // if there's more than one byte returned, - // shift the first byte then get the second byte: - if (numBytes > 1){ - result = inByte << 8; - inByte = SPI.transfer(0x00); - result = result |inByte; - } - // take the chip select high to de-select: - digitalWrite(chipSelectPin, HIGH); - // return the result: - return(result); -} diff --git a/build/linux/work/libraries/Ethernet/examples/ChatServer/ChatServer.ino b/build/linux/work/libraries/Ethernet/examples/ChatServer/ChatServer.ino deleted file mode 100644 index a61d17e54..000000000 --- a/build/linux/work/libraries/Ethernet/examples/ChatServer/ChatServer.ino +++ /dev/null @@ -1,78 +0,0 @@ -/* - Chat Server - - A simple server that distributes any incoming messages to all - connected clients. To use telnet to your device's IP address and type. - You can see the client's input in the serial monitor as well. - Using an Arduino Wiznet Ethernet shield. - - Circuit: - * Ethernet shield attached to pins 10, 11, 12, 13 - * Analog inputs attached to pins A0 through A5 (optional) - - created 18 Dec 2009 - by David A. Mellis - modified 2 Apr 2012 - by Tom Igoe - - */ - -#include -#include - -// Enter a MAC address and IP address for your controller below. -// The IP address will be dependent on your local network. -// gateway and subnet are optional: -byte mac[] = { - 0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED }; -IPAddress ip(192,168,1, 177); -IPAddress gateway(192,168,1, 1); -IPAddress subnet(255, 255, 0, 0); - - -// telnet defaults to port 23 -EthernetServer server(23); -boolean alreadyConnected = false; // whether or not the client was connected previously - -void setup() { - // initialize the ethernet device - Ethernet.begin(mac, ip, gateway, subnet); - // start listening for clients - server.begin(); - // Open serial communications and wait for port to open: - Serial.begin(9600); - // this check is only needed on the Leonardo: - while (!Serial) ; - ; - - Serial.print("Chat server address:"); - Serial.println(Ethernet.localIP()); -} - -void loop() { - // wait for a new client: - EthernetClient client = server.available(); - - // when the client sends the first byte, say hello: - if (client) { - if (!alreadyConnected) { - // clead out the input buffer: - client.flush(); - Serial.println("We have a new client"); - client.println("Hello, client!"); - alreadyConnected = true; - } - - if (client.available() > 0) { - // read the bytes incoming from the client: - char thisChar = client.read(); - // echo the bytes back to the client: - server.write(thisChar); - // echo the bytes to the server as well: - Serial.write(thisChar); - } - } -} - - - diff --git a/build/linux/work/libraries/Ethernet/examples/DhcpAddressPrinter/DhcpAddressPrinter.ino b/build/linux/work/libraries/Ethernet/examples/DhcpAddressPrinter/DhcpAddressPrinter.ino deleted file mode 100644 index 6ae5253fe..000000000 --- a/build/linux/work/libraries/Ethernet/examples/DhcpAddressPrinter/DhcpAddressPrinter.ino +++ /dev/null @@ -1,58 +0,0 @@ -/* - DHCP-based IP printer - - This sketch uses the DHCP extensions to the Ethernet library - to get an IP address via DHCP and print the address obtained. - using an Arduino Wiznet Ethernet shield. - - Circuit: - * Ethernet shield attached to pins 10, 11, 12, 13 - - created 12 April 2011 - modified 2 Apr 2012 - by Tom Igoe - - */ - -#include -#include - -// Enter a MAC address for your controller below. -// Newer Ethernet shields have a MAC address printed on a sticker on the shield -byte mac[] = { - 0x00, 0xAA, 0xBB, 0xCC, 0xDE, 0x02 }; - -// Initialize the Ethernet client library -// with the IP address and port of the server -// that you want to connect to (port 80 is default for HTTP): -EthernetClient client; - -void setup() { - // Open serial communications and wait for port to open: - Serial.begin(9600); - // this check is only needed on the Leonardo: - while (!Serial) ; - ; - - // start the Ethernet connection: - if (Ethernet.begin(mac) == 0) { - Serial.println("Failed to configure Ethernet using DHCP"); - // no point in carrying on, so do nothing forevermore: - for(;;) - ; - } - // print your local IP address: - Serial.print("My IP address: "); - for (byte thisByte = 0; thisByte < 4; thisByte++) { - // print the value of each byte of the IP address: - Serial.print(Ethernet.localIP()[thisByte], DEC); - Serial.print("."); - } - Serial.println(); -} - -void loop() { - -} - - diff --git a/build/linux/work/libraries/Ethernet/examples/DhcpChatServer/DhcpChatServer.ino b/build/linux/work/libraries/Ethernet/examples/DhcpChatServer/DhcpChatServer.ino deleted file mode 100644 index 222251a94..000000000 --- a/build/linux/work/libraries/Ethernet/examples/DhcpChatServer/DhcpChatServer.ino +++ /dev/null @@ -1,85 +0,0 @@ -/* - DHCP Chat Server - - A simple server that distributes any incoming messages to all - connected clients. To use telnet to your device's IP address and type. - You can see the client's input in the serial monitor as well. - Using an Arduino Wiznet Ethernet shield. - - THis version attempts to get an IP address using DHCP - - Circuit: - * Ethernet shield attached to pins 10, 11, 12, 13 - - created 21 May 2011 - modified 2 Apr 2012 - by Tom Igoe - Based on ChatServer example by David A. Mellis - - */ - -#include -#include - -// Enter a MAC address and IP address for your controller below. -// The IP address will be dependent on your local network. -// gateway and subnet are optional: -byte mac[] = { - 0x00, 0xAA, 0xBB, 0xCC, 0xDE, 0x02 }; -IPAddress ip(192,168,1, 177); -IPAddress gateway(192,168,1, 1); -IPAddress subnet(255, 255, 0, 0); - -// telnet defaults to port 23 -EthernetServer server(23); -boolean gotAMessage = false; // whether or not you got a message from the client yet - -void setup() { - // Open serial communications and wait for port to open: - Serial.begin(9600); - // this check is only needed on the Leonardo: - while (!Serial) ; - ; - - // start the Ethernet connection: - Serial.println("Trying to get an IP address using DHCP"); - if (Ethernet.begin(mac) == 0) { - Serial.println("Failed to configure Ethernet using DHCP"); - // initialize the ethernet device not using DHCP: - Ethernet.begin(mac, ip, gateway, subnet); - } - // print your local IP address: - Serial.print("My IP address: "); - ip = Ethernet.localIP(); - for (byte thisByte = 0; thisByte < 4; thisByte++) { - // print the value of each byte of the IP address: - Serial.print(ip[thisByte], DEC); - Serial.print("."); - } - Serial.println(); - // start listening for clients - server.begin(); - -} - -void loop() { - // wait for a new client: - EthernetClient client = server.available(); - - // when the client sends the first byte, say hello: - if (client) { - if (!gotAMessage) { - Serial.println("We have a new client"); - client.println("Hello, client!"); - gotAMessage = true; - } - - // read the bytes incoming from the client: - char thisChar = client.read(); - // echo the bytes back to the client: - server.write(thisChar); - // echo the bytes to the server as well: - Serial.print(thisChar); - } -} - diff --git a/build/linux/work/libraries/Ethernet/examples/DnsWebClient/DnsWebClient.ino b/build/linux/work/libraries/Ethernet/examples/DnsWebClient/DnsWebClient.ino deleted file mode 100644 index f15b835f9..000000000 --- a/build/linux/work/libraries/Ethernet/examples/DnsWebClient/DnsWebClient.ino +++ /dev/null @@ -1,80 +0,0 @@ -/* - DNS and DHCP-based Web client - - This sketch connects to a website (http://www.google.com) - using an Arduino Wiznet Ethernet shield. - - Circuit: - * Ethernet shield attached to pins 10, 11, 12, 13 - - created 18 Dec 2009 - by David A. Mellis - modified 2 Apr 2012 - by Tom Igoe, based on work by Adrian McEwen - - */ - -#include -#include - -// Enter a MAC address for your controller below. -// Newer Ethernet shields have a MAC address printed on a sticker on the shield -byte mac[] = { 0x00, 0xAA, 0xBB, 0xCC, 0xDE, 0x02 }; -char serverName[] = "www.google.com"; - -// Initialize the Ethernet client library -// with the IP address and port of the server -// that you want to connect to (port 80 is default for HTTP): -EthernetClient client; - -void setup() { - // Open serial communications and wait for port to open: - Serial.begin(9600); - // this check is only needed on the Leonardo: - while (!Serial) ; - ; - - // start the Ethernet connection: - if (Ethernet.begin(mac) == 0) { - Serial.println("Failed to configure Ethernet using DHCP"); - // no point in carrying on, so do nothing forevermore: - while(true); - } - // give the Ethernet shield a second to initialize: - delay(1000); - Serial.println("connecting..."); - - // if you get a connection, report back via serial: - - if (client.connect(serverName, 80)) { - Serial.println("connected"); - // Make a HTTP request: - client.println("GET /search?q=arduino HTTP/1.0"); - client.println(); - } - else { - // kf you didn't get a connection to the server: - Serial.println("connection failed"); - } -} - -void loop() -{ - // if there are incoming bytes available - // from the server, read them and print them: - if (client.available()) { - char c = client.read(); - Serial.print(c); - } - - // if the server's disconnected, stop the client: - if (!client.connected()) { - Serial.println(); - Serial.println("disconnecting."); - client.stop(); - - // do nothing forevermore: - while(true); - } -} - diff --git a/build/linux/work/libraries/Ethernet/examples/PachubeClient/PachubeClient.ino b/build/linux/work/libraries/Ethernet/examples/PachubeClient/PachubeClient.ino deleted file mode 100644 index 3b5ce9c13..000000000 --- a/build/linux/work/libraries/Ethernet/examples/PachubeClient/PachubeClient.ino +++ /dev/null @@ -1,162 +0,0 @@ -/* - Pachube sensor client - - This sketch connects an analog sensor to Pachube (http://www.pachube.com) - using a Wiznet Ethernet shield. You can use the Arduino Ethernet shield, or - the Adafruit Ethernet shield, either one will work, as long as it's got - a Wiznet Ethernet module on board. - - This example has been updated to use version 2.0 of the Pachube.com API. - To make it work, create a feed with a datastream, and give it the ID - sensor1. Or change the code below to match your feed. - - - Circuit: - * Analog sensor attached to analog in 0 - * Ethernet shield attached to pins 10, 11, 12, 13 - - created 15 March 2010 - modified 2 Apr 2012 - by Tom Igoe with input from Usman Haque and Joe Saavedra - -http://arduino.cc/en/Tutorial/PachubeClient - This code is in the public domain. - - */ - -#include -#include - -#define APIKEY "YOUR API KEY GOES HERE" // replace your pachube api key here -#define FEEDID 00000 // replace your feed ID -#define USERAGENT "My Project" // user agent is the project name - -// assign a MAC address for the ethernet controller. -// Newer Ethernet shields have a MAC address printed on a sticker on the shield -// fill in your address here: -byte mac[] = { - 0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED}; - -// fill in an available IP address on your network here, -// for manual configuration: -IPAddress ip(10,0,1,20); -// initialize the library instance: -EthernetClient client; - -// if you don't want to use DNS (and reduce your sketch size) -// use the numeric IP instead of the name for the server: -IPAddress server(216,52,233,122); // numeric IP for api.pachube.com -//char server[] = "api.pachube.com"; // name address for pachube API - -unsigned long lastConnectionTime = 0; // last time you connected to the server, in milliseconds -boolean lastConnected = false; // state of the connection last time through the main loop -const unsigned long postingInterval = 10*1000; //delay between updates to Pachube.com - -void setup() { - // Open serial communications and wait for port to open: - Serial.begin(9600); - // this check is only needed on the Leonardo: - while (!Serial) ; - ; - - // start the Ethernet connection: - if (Ethernet.begin(mac) == 0) { - Serial.println("Failed to configure Ethernet using DHCP"); - // DHCP failed, so use a fixed IP address: - Ethernet.begin(mac, ip); - } -} - -void loop() { - // read the analog sensor: - int sensorReading = analogRead(A0); - - // if there's incoming data from the net connection. - // send it out the serial port. This is for debugging - // purposes only: - if (client.available()) { - char c = client.read(); - Serial.print(c); - } - - // if there's no net connection, but there was one last time - // through the loop, then stop the client: - if (!client.connected() && lastConnected) { - Serial.println(); - Serial.println("disconnecting."); - client.stop(); - } - - // if you're not connected, and ten seconds have passed since - // your last connection, then connect again and send data: - if(!client.connected() && (millis() - lastConnectionTime > postingInterval)) { - sendData(sensorReading); - } - // store the state of the connection for next time through - // the loop: - lastConnected = client.connected(); -} - -// this method makes a HTTP connection to the server: -void sendData(int thisData) { - // if there's a successful connection: - if (client.connect(server, 80)) { - Serial.println("connecting..."); - // send the HTTP PUT request: - client.print("PUT /v2/feeds/"); - client.print(FEEDID); - client.println(".csv HTTP/1.1"); - client.println("Host: api.pachube.com"); - client.print("X-PachubeApiKey: "); - client.println(APIKEY); - client.print("User-Agent: "); - client.println(USERAGENT); - client.print("Content-Length: "); - - // calculate the length of the sensor reading in bytes: - // 8 bytes for "sensor1," + number of digits of the data: - int thisLength = 8 + getLength(thisData); - client.println(thisLength); - - // last pieces of the HTTP PUT request: - client.println("Content-Type: text/csv"); - client.println("Connection: close"); - client.println(); - - // here's the actual content of the PUT request: - client.print("sensor1,"); - client.println(thisData); - - } - else { - // if you couldn't make a connection: - Serial.println("connection failed"); - Serial.println(); - Serial.println("disconnecting."); - client.stop(); - } - // note the time that the connection was made or attempted: - lastConnectionTime = millis(); -} - - -// This method calculates the number of digits in the -// sensor reading. Since each digit of the ASCII decimal -// representation is a byte, the number of digits equals -// the number of bytes: - -int getLength(int someValue) { - // there's at least one byte: - int digits = 1; - // continually divide the value by ten, - // adding one to the digit count for each - // time you divide, until you're at 0: - int dividend = someValue /10; - while (dividend > 0) { - dividend = dividend /10; - digits++; - } - // return the number of digits: - return digits; -} - diff --git a/build/linux/work/libraries/Ethernet/examples/PachubeClientString/PachubeClientString.ino b/build/linux/work/libraries/Ethernet/examples/PachubeClientString/PachubeClientString.ino deleted file mode 100644 index dda28db82..000000000 --- a/build/linux/work/libraries/Ethernet/examples/PachubeClientString/PachubeClientString.ino +++ /dev/null @@ -1,149 +0,0 @@ -/* - Pachube sensor client with Strings - - This sketch connects an analog sensor to Pachube (http://www.pachube.com) - using a Wiznet Ethernet shield. You can use the Arduino Ethernet shield, or - the Adafruit Ethernet shield, either one will work, as long as it's got - a Wiznet Ethernet module on board. - - This example has been updated to use version 2.0 of the Pachube.com API. - To make it work, create a feed with two datastreams, and give them the IDs - sensor1 and sensor2. Or change the code below to match your feed. - - This example uses the String library, which is part of the Arduino core from - version 0019. - - Circuit: - * Analog sensor attached to analog in 0 - * Ethernet shield attached to pins 10, 11, 12, 13 - - created 15 March 2010 - modified 2 Apr 2012 - by Tom Igoe with input from Usman Haque and Joe Saavedra - - http://arduino.cc/en/Tutorial/PachubeClientString - This code is in the public domain. - - */ - -#include -#include - - -#define APIKEY "YOUR API KEY GOES HERE" // replace your pachube api key here -#define FEEDID 00000 // replace your feed ID -#define USERAGENT "My Project" // user agent is the project name - -// assign a MAC address for the ethernet controller. -// fill in your address here: - byte mac[] = { - 0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED}; -// fill in an available IP address on your network here, -// for manual configuration: -IPAddress ip(10,0,1,20); - -// initialize the library instance: -EthernetClient client; - -// if you don't want to use DNS (and reduce your sketch size) -// use the numeric IP instead of the name for the server: -//IPAddress server(216,52,233,122); // numeric IP for api.pachube.com -char server[] = "api.pachube.com"; // name address for pachube API - -unsigned long lastConnectionTime = 0; // last time you connected to the server, in milliseconds -boolean lastConnected = false; // state of the connection last time through the main loop -const unsigned long postingInterval = 10*1000; //delay between updates to Pachube.com - -void setup() { - // Open serial communications and wait for port to open: - Serial.begin(9600); - // this check is only needed on the Leonardo: - while (!Serial) ; - ; - - // give the ethernet module time to boot up: - delay(1000); - // start the Ethernet connection: - if (Ethernet.begin(mac) == 0) { - Serial.println("Failed to configure Ethernet using DHCP"); - // DHCP failed, so use a fixed IP address: - Ethernet.begin(mac, ip); - } -} - -void loop() { - // read the analog sensor: - int sensorReading = analogRead(A0); - // convert the data to a String to send it: - - String dataString = "sensor1,"; - dataString += sensorReading; - - // you can append multiple readings to this String if your - // pachube feed is set up to handle multiple values: - int otherSensorReading = analogRead(A1); - dataString += "\nsensor2,"; - dataString += otherSensorReading; - - // if there's incoming data from the net connection. - // send it out the serial port. This is for debugging - // purposes only: - if (client.available()) { - char c = client.read(); - Serial.print(c); - } - - // if there's no net connection, but there was one last time - // through the loop, then stop the client: - if (!client.connected() && lastConnected) { - Serial.println(); - Serial.println("disconnecting."); - client.stop(); - } - - // if you're not connected, and ten seconds have passed since - // your last connection, then connect again and send data: - if(!client.connected() && (millis() - lastConnectionTime > postingInterval)) { - sendData(dataString); - } - // store the state of the connection for next time through - // the loop: - lastConnected = client.connected(); -} - -// this method makes a HTTP connection to the server: -void sendData(String thisData) { - // if there's a successful connection: - if (client.connect(server, 80)) { - Serial.println("connecting..."); - // send the HTTP PUT request: - client.print("PUT /v2/feeds/"); - client.print(FEEDID); - client.println(".csv HTTP/1.1"); - client.println("Host: api.pachube.com"); - client.print("X-PachubeApiKey: "); - client.println(APIKEY); - client.print("User-Agent: "); - client.println(USERAGENT); - client.print("Content-Length: "); - client.println(thisData.length()); - - // last pieces of the HTTP PUT request: - client.println("Content-Type: text/csv"); - client.println("Connection: close"); - client.println(); - - // here's the actual content of the PUT request: - client.println(thisData); - } - else { - // if you couldn't make a connection: - Serial.println("connection failed"); - Serial.println(); - Serial.println("disconnecting."); - client.stop(); - } - // note the time that the connection was made or attempted: - lastConnectionTime = millis(); -} - diff --git a/build/linux/work/libraries/Ethernet/examples/TelnetClient/TelnetClient.ino b/build/linux/work/libraries/Ethernet/examples/TelnetClient/TelnetClient.ino deleted file mode 100644 index b9a22947f..000000000 --- a/build/linux/work/libraries/Ethernet/examples/TelnetClient/TelnetClient.ino +++ /dev/null @@ -1,92 +0,0 @@ -/* - Telnet client - - This sketch connects to a a telnet server (http://www.google.com) - using an Arduino Wiznet Ethernet shield. You'll need a telnet server - to test this with. - Processing's ChatServer example (part of the network library) works well, - running on port 10002. It can be found as part of the examples - in the Processing application, available at - http://processing.org/ - - Circuit: - * Ethernet shield attached to pins 10, 11, 12, 13 - - created 14 Sep 2010 - modified 2 Apr 2012 - by Tom Igoe - - */ - -#include -#include - -// Enter a MAC address and IP address for your controller below. -// The IP address will be dependent on your local network: -byte mac[] = { - 0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED }; -IPAddress ip(192,168,1,177); - -// Enter the IP address of the server you're connecting to: -IPAddress server(1,1,1,1); - -// Initialize the Ethernet client library -// with the IP address and port of the server -// that you want to connect to (port 23 is default for telnet; -// if you're using Processing's ChatServer, use port 10002): -EthernetClient client; - -void setup() { - // start the Ethernet connection: - Ethernet.begin(mac, ip); - // Open serial communications and wait for port to open: - Serial.begin(9600); - // this check is only needed on the Leonardo: - while (!Serial) ; - ; - - // give the Ethernet shield a second to initialize: - delay(1000); - Serial.println("connecting..."); - - // if you get a connection, report back via serial: - if (client.connect(server, 10002)) { - Serial.println("connected"); - } - else { - // if you didn't get a connection to the server: - Serial.println("connection failed"); - } -} - -void loop() -{ - // if there are incoming bytes available - // from the server, read them and print them: - if (client.available()) { - char c = client.read(); - Serial.print(c); - } - - // as long as there are bytes in the serial queue, - // read them and send them out the socket if it's open: - while (Serial.available() > 0) { - char inChar = Serial.read(); - if (client.connected()) { - client.print(inChar); - } - } - - // if the server's disconnected, stop the client: - if (!client.connected()) { - Serial.println(); - Serial.println("disconnecting."); - client.stop(); - // do nothing: - while(true); - } -} - - - - diff --git a/build/linux/work/libraries/Ethernet/examples/TwitterClient/TwitterClient.ino b/build/linux/work/libraries/Ethernet/examples/TwitterClient/TwitterClient.ino deleted file mode 100644 index b704f4f62..000000000 --- a/build/linux/work/libraries/Ethernet/examples/TwitterClient/TwitterClient.ino +++ /dev/null @@ -1,134 +0,0 @@ -/* - Twitter Client with Strings - - This sketch connects to Twitter using an Ethernet shield. It parses the XML - returned, and looks for this is a tweet - - You can use the Arduino Ethernet shield, or the Adafruit Ethernet shield, - either one will work, as long as it's got a Wiznet Ethernet module on board. - - This example uses the DHCP routines in the Ethernet library which is part of the - Arduino core from version 1.0 beta 1 - - This example uses the String library, which is part of the Arduino core from - version 0019. - - Circuit: - * Ethernet shield attached to pins 10, 11, 12, 13 - - created 21 May 2011 - modified 2 Apr 2012 - by Tom Igoe - - This code is in the public domain. - - */ -#include -#include - - -// Enter a MAC address and IP address for your controller below. -// The IP address will be dependent on your local network: -byte mac[] = { - 0x00, 0xAA, 0xBB, 0xCC, 0xDE, 0x01 }; -IPAddress ip(192,168,1,20); - -// initialize the library instance: -EthernetClient client; - -const unsigned long requestInterval = 60000; // delay between requests - -char serverName[] = "api.twitter.com"; // twitter URL - -boolean requested; // whether you've made a request since connecting -unsigned long lastAttemptTime = 0; // last time you connected to the server, in milliseconds - -String currentLine = ""; // string to hold the text from server -String tweet = ""; // string to hold the tweet -boolean readingTweet = false; // if you're currently reading the tweet - -void setup() { - // reserve space for the strings: - currentLine.reserve(256); - tweet.reserve(150); - - // Open serial communications and wait for port to open: - Serial.begin(9600); - // this check is only needed on the Leonardo: - while (!Serial) ; - ; - - // attempt a DHCP connection: - Serial.println("Attempting to get an IP address using DHCP:"); - if (!Ethernet.begin(mac)) { - // if DHCP fails, start with a hard-coded address: - Serial.println("failed to get an IP address using DHCP, trying manually"); - Ethernet.begin(mac, ip); - } - Serial.print("My address:"); - Serial.println(Ethernet.localIP()); - // connect to Twitter: - connectToServer(); -} - - - -void loop() -{ - if (client.connected()) { - if (client.available()) { - // read incoming bytes: - char inChar = client.read(); - - // add incoming byte to end of line: - currentLine += inChar; - - // if you get a newline, clear the line: - if (inChar == '\n') { - currentLine = ""; - } - // if the current line ends with , it will - // be followed by the tweet: - if ( currentLine.endsWith("")) { - // tweet is beginning. Clear the tweet string: - readingTweet = true; - tweet = ""; - } - // if you're currently reading the bytes of a tweet, - // add them to the tweet String: - if (readingTweet) { - if (inChar != '<') { - tweet += inChar; - } - else { - // if you got a "<" character, - // you've reached the end of the tweet: - readingTweet = false; - Serial.println(tweet); - // close the connection to the server: - client.stop(); - } - } - } - } - else if (millis() - lastAttemptTime > requestInterval) { - // if you're not connected, and two minutes have passed since - // your last connection, then attempt to connect again: - connectToServer(); - } -} - -void connectToServer() { - // attempt to connect, and wait a millisecond: - Serial.println("connecting to server..."); - if (client.connect(serverName, 80)) { - Serial.println("making HTTP request..."); - // make HTTP GET request to twitter: - client.println("GET /1/statuses/user_timeline.xml?screen_name=arduino&count=1 HTTP/1.1"); - client.println("HOST: api.twitter.com"); - client.println(); - } - // note the time of this connect attempt: - lastAttemptTime = millis(); -} - diff --git a/build/linux/work/libraries/Ethernet/examples/UDPSendReceiveString/UDPSendReceiveString.ino b/build/linux/work/libraries/Ethernet/examples/UDPSendReceiveString/UDPSendReceiveString.ino deleted file mode 100644 index 4d4045cac..000000000 --- a/build/linux/work/libraries/Ethernet/examples/UDPSendReceiveString/UDPSendReceiveString.ino +++ /dev/null @@ -1,118 +0,0 @@ -/* - UDPSendReceive.pde: - This sketch receives UDP message strings, prints them to the serial port - and sends an "acknowledge" string back to the sender - - A Processing sketch is included at the end of file that can be used to send - and received messages for testing with a computer. - - created 21 Aug 2010 - by Michael Margolis - - This code is in the public domain. - */ - - -#include // needed for Arduino versions later than 0018 -#include -#include // UDP library from: bjoern@cs.stanford.edu 12/30/2008 - - -// Enter a MAC address and IP address for your controller below. -// The IP address will be dependent on your local network: -byte mac[] = { - 0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED }; -IPAddress ip(192, 168, 1, 177); - -unsigned int localPort = 8888; // local port to listen on - -// buffers for receiving and sending data -char packetBuffer[UDP_TX_PACKET_MAX_SIZE]; //buffer to hold incoming packet, -char ReplyBuffer[] = "acknowledged"; // a string to send back - -// An EthernetUDP instance to let us send and receive packets over UDP -EthernetUDP Udp; - -void setup() { - // start the Ethernet and UDP: - Ethernet.begin(mac,ip); - Udp.begin(localPort); - - Serial.begin(9600); -} - -void loop() { - // if there's data available, read a packet - int packetSize = Udp.parsePacket(); - if(packetSize) - { - Serial.print("Received packet of size "); - Serial.println(packetSize); - Serial.print("From "); - IPAddress remote = Udp.remoteIP(); - for (int i =0; i < 4; i++) - { - Serial.print(remote[i], DEC); - if (i < 3) - { - Serial.print("."); - } - } - Serial.print(", port "); - Serial.println(Udp.remotePort()); - - // read the packet into packetBufffer - Udp.read(packetBuffer,UDP_TX_PACKET_MAX_SIZE); - Serial.println("Contents:"); - Serial.println(packetBuffer); - - // send a reply, to the IP address and port that sent us the packet we received - Udp.beginPacket(Udp.remoteIP(), Udp.remotePort()); - Udp.write(ReplyBuffer); - Udp.endPacket(); - } - delay(10); -} - - -/* - Processing sketch to run with this example - ===================================================== - - // Processing UDP example to send and receive string data from Arduino - // press any key to send the "Hello Arduino" message - - - import hypermedia.net.*; - - UDP udp; // define the UDP object - - - void setup() { - udp = new UDP( this, 6000 ); // create a new datagram connection on port 6000 - //udp.log( true ); // <-- printout the connection activity - udp.listen( true ); // and wait for incoming message - } - - void draw() - { - } - - void keyPressed() { - String ip = "192.168.1.177"; // the remote IP address - int port = 8888; // the destination port - - udp.send("Hello World", ip, port ); // the message to send - - } - - void receive( byte[] data ) { // <-- default handler - //void receive( byte[] data, String ip, int port ) { // <-- extended handler - - for(int i=0; i < data.length; i++) - print(char(data[i])); - println(); - } - */ - - diff --git a/build/linux/work/libraries/Ethernet/examples/UdpNtpClient/UdpNtpClient.ino b/build/linux/work/libraries/Ethernet/examples/UdpNtpClient/UdpNtpClient.ino deleted file mode 100644 index 7367af8b0..000000000 --- a/build/linux/work/libraries/Ethernet/examples/UdpNtpClient/UdpNtpClient.ino +++ /dev/null @@ -1,140 +0,0 @@ -/* - - Udp NTP Client - - Get the time from a Network Time Protocol (NTP) time server - Demonstrates use of UDP sendPacket and ReceivePacket - For more on NTP time servers and the messages needed to communicate with them, - see http://en.wikipedia.org/wiki/Network_Time_Protocol - - created 4 Sep 2010 - by Michael Margolis - modified 2 Apr 2012 - by Tom Igoe - - This code is in the public domain. - - */ - -#include -#include -#include - -// Enter a MAC address for your controller below. -// Newer Ethernet shields have a MAC address printed on a sticker on the shield -byte mac[] = { - 0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED }; - -unsigned int localPort = 8888; // local port to listen for UDP packets - -IPAddress timeServer(192, 43, 244, 18); // time.nist.gov NTP server - -const int NTP_PACKET_SIZE= 48; // NTP time stamp is in the first 48 bytes of the message - -byte packetBuffer[ NTP_PACKET_SIZE]; //buffer to hold incoming and outgoing packets - -// A UDP instance to let us send and receive packets over UDP -EthernetUDP Udp; - -void setup() -{ - // Open serial communications and wait for port to open: - Serial.begin(9600); - // this check is only needed on the Leonardo: - while (!Serial) ; - ; - - // start Ethernet and UDP - if (Ethernet.begin(mac) == 0) { - Serial.println("Failed to configure Ethernet using DHCP"); - // no point in carrying on, so do nothing forevermore: - for(;;) - ; - } - Udp.begin(localPort); -} - -void loop() -{ - sendNTPpacket(timeServer); // send an NTP packet to a time server - - // wait to see if a reply is available - delay(1000); - if ( Udp.parsePacket() ) { - // We've received a packet, read the data from it - Udp.read(packetBuffer,NTP_PACKET_SIZE); // read the packet into the buffer - - //the timestamp starts at byte 40 of the received packet and is four bytes, - // or two words, long. First, esxtract the two words: - - unsigned long highWord = word(packetBuffer[40], packetBuffer[41]); - unsigned long lowWord = word(packetBuffer[42], packetBuffer[43]); - // combine the four bytes (two words) into a long integer - // this is NTP time (seconds since Jan 1 1900): - unsigned long secsSince1900 = highWord << 16 | lowWord; - Serial.print("Seconds since Jan 1 1900 = " ); - Serial.println(secsSince1900); - - // now convert NTP time into everyday time: - Serial.print("Unix time = "); - // Unix time starts on Jan 1 1970. In seconds, that's 2208988800: - const unsigned long seventyYears = 2208988800UL; - // subtract seventy years: - unsigned long epoch = secsSince1900 - seventyYears; - // print Unix time: - Serial.println(epoch); - - - // print the hour, minute and second: - Serial.print("The UTC time is "); // UTC is the time at Greenwich Meridian (GMT) - Serial.print((epoch % 86400L) / 3600); // print the hour (86400 equals secs per day) - Serial.print(':'); - if ( ((epoch % 3600) / 60) < 10 ) { - // In the first 10 minutes of each hour, we'll want a leading '0' - Serial.print('0'); - } - Serial.print((epoch % 3600) / 60); // print the minute (3600 equals secs per minute) - Serial.print(':'); - if ( (epoch % 60) < 10 ) { - // In the first 10 seconds of each minute, we'll want a leading '0' - Serial.print('0'); - } - Serial.println(epoch %60); // print the second - } - // wait ten seconds before asking for the time again - delay(10000); -} - -// send an NTP request to the time server at the given address -unsigned long sendNTPpacket(IPAddress& address) -{ - // set all bytes in the buffer to 0 - memset(packetBuffer, 0, NTP_PACKET_SIZE); - // Initialize values needed to form NTP request - // (see URL above for details on the packets) - packetBuffer[0] = 0b11100011; // LI, Version, Mode - packetBuffer[1] = 0; // Stratum, or type of clock - packetBuffer[2] = 6; // Polling Interval - packetBuffer[3] = 0xEC; // Peer Clock Precision - // 8 bytes of zero for Root Delay & Root Dispersion - packetBuffer[12] = 49; - packetBuffer[13] = 0x4E; - packetBuffer[14] = 49; - packetBuffer[15] = 52; - - // all NTP fields have been given values, now - // you can send a packet requesting a timestamp: - Udp.beginPacket(address, 123); //NTP requests are to port 123 - Udp.write(packetBuffer,NTP_PACKET_SIZE); - Udp.endPacket(); -} - - - - - - - - - - diff --git a/build/linux/work/libraries/Ethernet/examples/WebClient/WebClient.ino b/build/linux/work/libraries/Ethernet/examples/WebClient/WebClient.ino deleted file mode 100644 index 054a13e27..000000000 --- a/build/linux/work/libraries/Ethernet/examples/WebClient/WebClient.ino +++ /dev/null @@ -1,80 +0,0 @@ -/* - Web client - - This sketch connects to a website (http://www.google.com) - using an Arduino Wiznet Ethernet shield. - - Circuit: - * Ethernet shield attached to pins 10, 11, 12, 13 - - created 18 Dec 2009 - modified 2 Apr 2012 - by David A. Mellis - - */ - -#include -#include - -// Enter a MAC address for your controller below. -// Newer Ethernet shields have a MAC address printed on a sticker on the shield -byte mac[] = { 0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED }; -IPAddress server(173,194,33,104); // Google - -// Initialize the Ethernet client library -// with the IP address and port of the server -// that you want to connect to (port 80 is default for HTTP): -EthernetClient client; - -void setup() { - // Open serial communications and wait for port to open: - Serial.begin(9600); - // this check is only needed on the Leonardo: - while (!Serial) ; - ; - - // start the Ethernet connection: - if (Ethernet.begin(mac) == 0) { - Serial.println("Failed to configure Ethernet using DHCP"); - // no point in carrying on, so do nothing forevermore: - for(;;) - ; - } - // give the Ethernet shield a second to initialize: - delay(1000); - Serial.println("connecting..."); - - // if you get a connection, report back via serial: - if (client.connect(server, 80)) { - Serial.println("connected"); - // Make a HTTP request: - client.println("GET /search?q=arduino HTTP/1.0"); - client.println(); - } - else { - // kf you didn't get a connection to the server: - Serial.println("connection failed"); - } -} - -void loop() -{ - // if there are incoming bytes available - // from the server, read them and print them: - if (client.available()) { - char c = client.read(); - Serial.print(c); - } - - // if the server's disconnected, stop the client: - if (!client.connected()) { - Serial.println(); - Serial.println("disconnecting."); - client.stop(); - - // do nothing forevermore: - for(;;) - ; - } -} - diff --git a/build/linux/work/libraries/Ethernet/examples/WebServer/WebServer.ino b/build/linux/work/libraries/Ethernet/examples/WebServer/WebServer.ino deleted file mode 100644 index 57368489a..000000000 --- a/build/linux/work/libraries/Ethernet/examples/WebServer/WebServer.ino +++ /dev/null @@ -1,100 +0,0 @@ -/* - Web Server - - A simple web server that shows the value of the analog input pins. - using an Arduino Wiznet Ethernet shield. - - Circuit: - * Ethernet shield attached to pins 10, 11, 12, 13 - * Analog inputs attached to pins A0 through A5 (optional) - - created 18 Dec 2009 - by David A. Mellis - modified 2 Apr 2012 - by Tom Igoe - - */ - -#include -#include - -// Enter a MAC address and IP address for your controller below. -// The IP address will be dependent on your local network: -byte mac[] = { - 0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED }; -IPAddress ip(192,168,1, 177); - -// Initialize the Ethernet server library -// with the IP address and port you want to use -// (port 80 is default for HTTP): -EthernetServer server(80); - -void setup() { - // Open serial communications and wait for port to open: - Serial.begin(9600); - // this check is only needed on the Leonardo: - while (!Serial) ; - ; - - // start the Ethernet connection and the server: - Ethernet.begin(mac, ip); - server.begin(); - Serial.print("server is at "); - Serial.println(Ethernet.localIP()); -} - - -void loop() { - // listen for incoming clients - EthernetClient client = server.available(); - if (client) { - Serial.println("new client"); - // an http request ends with a blank line - boolean currentLineIsBlank = true; - while (client.connected()) { - if (client.available()) { - char c = client.read(); - Serial.write(c); - // if you've gotten to the end of the line (received a newline - // character) and the line is blank, the http request has ended, - // so you can send a reply - if (c == '\n' && currentLineIsBlank) { - // send a standard http response header - client.println("HTTP/1.1 200 OK"); - client.println("Content-Type: text/html"); - client.println("Connnection: close"); - client.println(); - client.println(""); - client.println(""); - // add a meta refresh tag, so the browser pulls again every 5 seconds: - client.println(""); - // output the value of each analog input pin - for (int analogChannel = 0; analogChannel < 6; analogChannel++) { - int sensorReading = analogRead(analogChannel); - client.print("analog input "); - client.print(analogChannel); - client.print(" is "); - client.print(sensorReading); - client.println("
    "); - } - client.println(""); - break; - } - if (c == '\n') { - // you're starting a new line - currentLineIsBlank = true; - } - else if (c != '\r') { - // you've gotten a character on the current line - currentLineIsBlank = false; - } - } - } - // give the web browser time to receive the data - delay(1); - // close the connection: - client.stop(); - Serial.println("client disonnected"); - } -} - diff --git a/build/linux/work/libraries/Ethernet/keywords.txt b/build/linux/work/libraries/Ethernet/keywords.txt deleted file mode 100644 index 6b37cbe05..000000000 --- a/build/linux/work/libraries/Ethernet/keywords.txt +++ /dev/null @@ -1,37 +0,0 @@ -####################################### -# Syntax Coloring Map For Ethernet -####################################### - -####################################### -# Datatypes (KEYWORD1) -####################################### - -Ethernet KEYWORD1 -EthernetClient KEYWORD1 -EthernetServer KEYWORD1 -IPAddress KEYWORD1 - -####################################### -# Methods and Functions (KEYWORD2) -####################################### - -status KEYWORD2 -connect KEYWORD2 -write KEYWORD2 -available KEYWORD2 -read KEYWORD2 -peek KEYWORD2 -flush KEYWORD2 -stop KEYWORD2 -connected KEYWORD2 -begin KEYWORD2 -beginPacket KEYWORD2 -endPacket KEYWORD2 -parsePacket KEYWORD2 -remoteIP KEYWORD2 -remotePort KEYWORD2 - -####################################### -# Constants (LITERAL1) -####################################### - diff --git a/build/linux/work/libraries/Ethernet/util.h b/build/linux/work/libraries/Ethernet/util.h deleted file mode 100644 index 5042e82e3..000000000 --- a/build/linux/work/libraries/Ethernet/util.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifndef UTIL_H -#define UTIL_H - -#define htons(x) ( ((x)<<8) | (((x)>>8)&0xFF) ) -#define ntohs(x) htons(x) - -#define htonl(x) ( ((x)<<24 & 0xFF000000UL) | \ - ((x)<< 8 & 0x00FF0000UL) | \ - ((x)>> 8 & 0x0000FF00UL) | \ - ((x)>>24 & 0x000000FFUL) ) -#define ntohl(x) htonl(x) - -#endif diff --git a/build/linux/work/libraries/Ethernet/utility/socket.cpp b/build/linux/work/libraries/Ethernet/utility/socket.cpp deleted file mode 100644 index fd3e4426a..000000000 --- a/build/linux/work/libraries/Ethernet/utility/socket.cpp +++ /dev/null @@ -1,400 +0,0 @@ -#include "w5100.h" -#include "socket.h" - -static uint16_t local_port; - -/** - * @brief This Socket function initialize the channel in perticular mode, and set the port and wait for W5100 done it. - * @return 1 for success else 0. - */ -uint8_t socket(SOCKET s, uint8_t protocol, uint16_t port, uint8_t flag) -{ - if ((protocol == SnMR::TCP) || (protocol == SnMR::UDP) || (protocol == SnMR::IPRAW) || (protocol == SnMR::MACRAW) || (protocol == SnMR::PPPOE)) - { - close(s); - W5100.writeSnMR(s, protocol | flag); - if (port != 0) { - W5100.writeSnPORT(s, port); - } - else { - local_port++; // if don't set the source port, set local_port number. - W5100.writeSnPORT(s, local_port); - } - - W5100.execCmdSn(s, Sock_OPEN); - - return 1; - } - - return 0; -} - - -/** - * @brief This function close the socket and parameter is "s" which represent the socket number - */ -void close(SOCKET s) -{ - W5100.execCmdSn(s, Sock_CLOSE); - W5100.writeSnIR(s, 0xFF); -} - - -/** - * @brief This function established the connection for the channel in passive (server) mode. This function waits for the request from the peer. - * @return 1 for success else 0. - */ -uint8_t listen(SOCKET s) -{ - if (W5100.readSnSR(s) != SnSR::INIT) - return 0; - W5100.execCmdSn(s, Sock_LISTEN); - return 1; -} - - -/** - * @brief This function established the connection for the channel in Active (client) mode. - * This function waits for the untill the connection is established. - * - * @return 1 for success else 0. - */ -uint8_t connect(SOCKET s, uint8_t * addr, uint16_t port) -{ - if - ( - ((addr[0] == 0xFF) && (addr[1] == 0xFF) && (addr[2] == 0xFF) && (addr[3] == 0xFF)) || - ((addr[0] == 0x00) && (addr[1] == 0x00) && (addr[2] == 0x00) && (addr[3] == 0x00)) || - (port == 0x00) - ) - return 0; - - // set destination IP - W5100.writeSnDIPR(s, addr); - W5100.writeSnDPORT(s, port); - W5100.execCmdSn(s, Sock_CONNECT); - - return 1; -} - - - -/** - * @brief This function used for disconnect the socket and parameter is "s" which represent the socket number - * @return 1 for success else 0. - */ -void disconnect(SOCKET s) -{ - W5100.execCmdSn(s, Sock_DISCON); -} - - -/** - * @brief This function used to send the data in TCP mode - * @return 1 for success else 0. - */ -uint16_t send(SOCKET s, const uint8_t * buf, uint16_t len) -{ - uint8_t status=0; - uint16_t ret=0; - uint16_t freesize=0; - - if (len > W5100.SSIZE) - ret = W5100.SSIZE; // check size not to exceed MAX size. - else - ret = len; - - // if freebuf is available, start. - do - { - freesize = W5100.getTXFreeSize(s); - status = W5100.readSnSR(s); - if ((status != SnSR::ESTABLISHED) && (status != SnSR::CLOSE_WAIT)) - { - ret = 0; - break; - } - } - while (freesize < ret); - - // copy data - W5100.send_data_processing(s, (uint8_t *)buf, ret); - W5100.execCmdSn(s, Sock_SEND); - - /* +2008.01 bj */ - while ( (W5100.readSnIR(s) & SnIR::SEND_OK) != SnIR::SEND_OK ) - { - /* m2008.01 [bj] : reduce code */ - if ( W5100.readSnSR(s) == SnSR::CLOSED ) - { - close(s); - return 0; - } - } - /* +2008.01 bj */ - W5100.writeSnIR(s, SnIR::SEND_OK); - return ret; -} - - -/** - * @brief This function is an application I/F function which is used to receive the data in TCP mode. - * It continues to wait for data as much as the application wants to receive. - * - * @return received data size for success else -1. - */ -int16_t recv(SOCKET s, uint8_t *buf, int16_t len) -{ - // Check how much data is available - int16_t ret = W5100.getRXReceivedSize(s); - if ( ret == 0 ) - { - // No data available. - uint8_t status = W5100.readSnSR(s); - if ( status == SnSR::LISTEN || status == SnSR::CLOSED || status == SnSR::CLOSE_WAIT ) - { - // The remote end has closed its side of the connection, so this is the eof state - ret = 0; - } - else - { - // The connection is still up, but there's no data waiting to be read - ret = -1; - } - } - else if (ret > len) - { - ret = len; - } - - if ( ret > 0 ) - { - W5100.recv_data_processing(s, buf, ret); - W5100.execCmdSn(s, Sock_RECV); - } - return ret; -} - - -/** - * @brief Returns the first byte in the receive queue (no checking) - * - * @return - */ -uint16_t peek(SOCKET s, uint8_t *buf) -{ - W5100.recv_data_processing(s, buf, 1, 1); - - return 1; -} - - -/** - * @brief This function is an application I/F function which is used to send the data for other then TCP mode. - * Unlike TCP transmission, The peer's destination address and the port is needed. - * - * @return This function return send data size for success else -1. - */ -uint16_t sendto(SOCKET s, const uint8_t *buf, uint16_t len, uint8_t *addr, uint16_t port) -{ - uint16_t ret=0; - - if (len > W5100.SSIZE) ret = W5100.SSIZE; // check size not to exceed MAX size. - else ret = len; - - if - ( - ((addr[0] == 0x00) && (addr[1] == 0x00) && (addr[2] == 0x00) && (addr[3] == 0x00)) || - ((port == 0x00)) ||(ret == 0) - ) - { - /* +2008.01 [bj] : added return value */ - ret = 0; - } - else - { - W5100.writeSnDIPR(s, addr); - W5100.writeSnDPORT(s, port); - - // copy data - W5100.send_data_processing(s, (uint8_t *)buf, ret); - W5100.execCmdSn(s, Sock_SEND); - - /* +2008.01 bj */ - while ( (W5100.readSnIR(s) & SnIR::SEND_OK) != SnIR::SEND_OK ) - { - if (W5100.readSnIR(s) & SnIR::TIMEOUT) - { - /* +2008.01 [bj]: clear interrupt */ - W5100.writeSnIR(s, (SnIR::SEND_OK | SnIR::TIMEOUT)); /* clear SEND_OK & TIMEOUT */ - return 0; - } - } - - /* +2008.01 bj */ - W5100.writeSnIR(s, SnIR::SEND_OK); - } - return ret; -} - - -/** - * @brief This function is an application I/F function which is used to receive the data in other then - * TCP mode. This function is used to receive UDP, IP_RAW and MAC_RAW mode, and handle the header as well. - * - * @return This function return received data size for success else -1. - */ -uint16_t recvfrom(SOCKET s, uint8_t *buf, uint16_t len, uint8_t *addr, uint16_t *port) -{ - uint8_t head[8]; - uint16_t data_len=0; - uint16_t ptr=0; - - if ( len > 0 ) - { - ptr = W5100.readSnRX_RD(s); - switch (W5100.readSnMR(s) & 0x07) - { - case SnMR::UDP : - W5100.read_data(s, (uint8_t *)ptr, head, 0x08); - ptr += 8; - // read peer's IP address, port number. - addr[0] = head[0]; - addr[1] = head[1]; - addr[2] = head[2]; - addr[3] = head[3]; - *port = head[4]; - *port = (*port << 8) + head[5]; - data_len = head[6]; - data_len = (data_len << 8) + head[7]; - - W5100.read_data(s, (uint8_t *)ptr, buf, data_len); // data copy. - ptr += data_len; - - W5100.writeSnRX_RD(s, ptr); - break; - - case SnMR::IPRAW : - W5100.read_data(s, (uint8_t *)ptr, head, 0x06); - ptr += 6; - - addr[0] = head[0]; - addr[1] = head[1]; - addr[2] = head[2]; - addr[3] = head[3]; - data_len = head[4]; - data_len = (data_len << 8) + head[5]; - - W5100.read_data(s, (uint8_t *)ptr, buf, data_len); // data copy. - ptr += data_len; - - W5100.writeSnRX_RD(s, ptr); - break; - - case SnMR::MACRAW: - W5100.read_data(s,(uint8_t*)ptr,head,2); - ptr+=2; - data_len = head[0]; - data_len = (data_len<<8) + head[1] - 2; - - W5100.read_data(s,(uint8_t*) ptr,buf,data_len); - ptr += data_len; - W5100.writeSnRX_RD(s, ptr); - break; - - default : - break; - } - W5100.execCmdSn(s, Sock_RECV); - } - return data_len; -} - - -uint16_t igmpsend(SOCKET s, const uint8_t * buf, uint16_t len) -{ - uint8_t status=0; - uint16_t ret=0; - - if (len > W5100.SSIZE) - ret = W5100.SSIZE; // check size not to exceed MAX size. - else - ret = len; - - if (ret == 0) - return 0; - - W5100.send_data_processing(s, (uint8_t *)buf, ret); - W5100.execCmdSn(s, Sock_SEND); - - while ( (W5100.readSnIR(s) & SnIR::SEND_OK) != SnIR::SEND_OK ) - { - status = W5100.readSnSR(s); - if (W5100.readSnIR(s) & SnIR::TIMEOUT) - { - /* in case of igmp, if send fails, then socket closed */ - /* if you want change, remove this code. */ - close(s); - return 0; - } - } - - W5100.writeSnIR(s, SnIR::SEND_OK); - return ret; -} - -uint16_t bufferData(SOCKET s, uint16_t offset, const uint8_t* buf, uint16_t len) -{ - uint16_t ret =0; - if (len > W5100.getTXFreeSize(s)) - { - ret = W5100.getTXFreeSize(s); // check size not to exceed MAX size. - } - else - { - ret = len; - } - W5100.send_data_processing_offset(s, offset, buf, ret); - return ret; -} - -int startUDP(SOCKET s, uint8_t* addr, uint16_t port) -{ - if - ( - ((addr[0] == 0x00) && (addr[1] == 0x00) && (addr[2] == 0x00) && (addr[3] == 0x00)) || - ((port == 0x00)) - ) - { - return 0; - } - else - { - W5100.writeSnDIPR(s, addr); - W5100.writeSnDPORT(s, port); - return 1; - } -} - -int sendUDP(SOCKET s) -{ - W5100.execCmdSn(s, Sock_SEND); - - /* +2008.01 bj */ - while ( (W5100.readSnIR(s) & SnIR::SEND_OK) != SnIR::SEND_OK ) - { - if (W5100.readSnIR(s) & SnIR::TIMEOUT) - { - /* +2008.01 [bj]: clear interrupt */ - W5100.writeSnIR(s, (SnIR::SEND_OK|SnIR::TIMEOUT)); - return 0; - } - } - - /* +2008.01 bj */ - W5100.writeSnIR(s, SnIR::SEND_OK); - - /* Sent ok */ - return 1; -} - diff --git a/build/linux/work/libraries/Ethernet/utility/socket.h b/build/linux/work/libraries/Ethernet/utility/socket.h deleted file mode 100644 index 45e0fb3e8..000000000 --- a/build/linux/work/libraries/Ethernet/utility/socket.h +++ /dev/null @@ -1,41 +0,0 @@ -#ifndef _SOCKET_H_ -#define _SOCKET_H_ - -#include "w5100.h" - -extern uint8_t socket(SOCKET s, uint8_t protocol, uint16_t port, uint8_t flag); // Opens a socket(TCP or UDP or IP_RAW mode) -extern void close(SOCKET s); // Close socket -extern uint8_t connect(SOCKET s, uint8_t * addr, uint16_t port); // Establish TCP connection (Active connection) -extern void disconnect(SOCKET s); // disconnect the connection -extern uint8_t listen(SOCKET s); // Establish TCP connection (Passive connection) -extern uint16_t send(SOCKET s, const uint8_t * buf, uint16_t len); // Send data (TCP) -extern int16_t recv(SOCKET s, uint8_t * buf, int16_t len); // Receive data (TCP) -extern uint16_t peek(SOCKET s, uint8_t *buf); -extern uint16_t sendto(SOCKET s, const uint8_t * buf, uint16_t len, uint8_t * addr, uint16_t port); // Send data (UDP/IP RAW) -extern uint16_t recvfrom(SOCKET s, uint8_t * buf, uint16_t len, uint8_t * addr, uint16_t *port); // Receive data (UDP/IP RAW) - -extern uint16_t igmpsend(SOCKET s, const uint8_t * buf, uint16_t len); - -// Functions to allow buffered UDP send (i.e. where the UDP datagram is built up over a -// number of calls before being sent -/* - @brief This function sets up a UDP datagram, the data for which will be provided by one - or more calls to bufferData and then finally sent with sendUDP. - @return 1 if the datagram was successfully set up, or 0 if there was an error -*/ -extern int startUDP(SOCKET s, uint8_t* addr, uint16_t port); -/* - @brief This function copies up to len bytes of data from buf into a UDP datagram to be - sent later by sendUDP. Allows datagrams to be built up from a series of bufferData calls. - @return Number of bytes successfully buffered -*/ -uint16_t bufferData(SOCKET s, uint16_t offset, const uint8_t* buf, uint16_t len); -/* - @brief Send a UDP datagram built up from a sequence of startUDP followed by one or more - calls to bufferData. - @return 1 if the datagram was successfully sent, or 0 if there was an error -*/ -int sendUDP(SOCKET s); - -#endif -/* _SOCKET_H_ */ diff --git a/build/linux/work/libraries/Ethernet/utility/w5100.cpp b/build/linux/work/libraries/Ethernet/utility/w5100.cpp deleted file mode 100644 index 9c748fd20..000000000 --- a/build/linux/work/libraries/Ethernet/utility/w5100.cpp +++ /dev/null @@ -1,188 +0,0 @@ -/* - * Copyright (c) 2010 by Cristian Maglie - * - * This file is free software; you can redistribute it and/or modify - * it under the terms of either the GNU General Public License version 2 - * or the GNU Lesser General Public License version 2.1, both as - * published by the Free Software Foundation. - */ - -#include -#include -#include - -#include "w5100.h" - -// W5100 controller instance -W5100Class W5100; - -#define TX_RX_MAX_BUF_SIZE 2048 -#define TX_BUF 0x1100 -#define RX_BUF (TX_BUF + TX_RX_MAX_BUF_SIZE) - -#define TXBUF_BASE 0x4000 -#define RXBUF_BASE 0x6000 - -void W5100Class::init(void) -{ - delay(300); - - SPI.begin(); - initSS(); - - writeMR(1< SSIZE) - { - // Wrap around circular buffer - uint16_t size = SSIZE - offset; - write(dstAddr, data, size); - write(SBASE[s], data + size, len - size); - } - else { - write(dstAddr, data, len); - } - - ptr += len; - writeSnTX_WR(s, ptr); -} - - -void W5100Class::recv_data_processing(SOCKET s, uint8_t *data, uint16_t len, uint8_t peek) -{ - uint16_t ptr; - ptr = readSnRX_RD(s); - read_data(s, (uint8_t *)ptr, data, len); - if (!peek) - { - ptr += len; - writeSnRX_RD(s, ptr); - } -} - -void W5100Class::read_data(SOCKET s, volatile uint8_t *src, volatile uint8_t *dst, uint16_t len) -{ - uint16_t size; - uint16_t src_mask; - uint16_t src_ptr; - - src_mask = (uint16_t)src & RMASK; - src_ptr = RBASE[s] + src_mask; - - if( (src_mask + len) > RSIZE ) - { - size = RSIZE - src_mask; - read(src_ptr, (uint8_t *)dst, size); - dst += size; - read(RBASE[s], (uint8_t *) dst, len - size); - } - else - read(src_ptr, (uint8_t *) dst, len); -} - - -uint8_t W5100Class::write(uint16_t _addr, uint8_t _data) -{ - setSS(); - SPI.transfer(0xF0); - SPI.transfer(_addr >> 8); - SPI.transfer(_addr & 0xFF); - SPI.transfer(_data); - resetSS(); - return 1; -} - -uint16_t W5100Class::write(uint16_t _addr, const uint8_t *_buf, uint16_t _len) -{ - for (uint16_t i=0; i<_len; i++) - { - setSS(); - SPI.transfer(0xF0); - SPI.transfer(_addr >> 8); - SPI.transfer(_addr & 0xFF); - _addr++; - SPI.transfer(_buf[i]); - resetSS(); - } - return _len; -} - -uint8_t W5100Class::read(uint16_t _addr) -{ - setSS(); - SPI.transfer(0x0F); - SPI.transfer(_addr >> 8); - SPI.transfer(_addr & 0xFF); - uint8_t _data = SPI.transfer(0); - resetSS(); - return _data; -} - -uint16_t W5100Class::read(uint16_t _addr, uint8_t *_buf, uint16_t _len) -{ - for (uint16_t i=0; i<_len; i++) - { - setSS(); - SPI.transfer(0x0F); - SPI.transfer(_addr >> 8); - SPI.transfer(_addr & 0xFF); - _addr++; - _buf[i] = SPI.transfer(0); - resetSS(); - } - return _len; -} - -void W5100Class::execCmdSn(SOCKET s, SockCMD _cmd) { - // Send command to socket - writeSnCR(s, _cmd); - // Wait for command to complete - while (readSnCR(s)) - ; -} diff --git a/build/linux/work/libraries/Ethernet/utility/w5100.h b/build/linux/work/libraries/Ethernet/utility/w5100.h deleted file mode 100644 index 8dccd9f29..000000000 --- a/build/linux/work/libraries/Ethernet/utility/w5100.h +++ /dev/null @@ -1,404 +0,0 @@ -/* - * Copyright (c) 2010 by Cristian Maglie - * - * This file is free software; you can redistribute it and/or modify - * it under the terms of either the GNU General Public License version 2 - * or the GNU Lesser General Public License version 2.1, both as - * published by the Free Software Foundation. - */ - -#ifndef W5100_H_INCLUDED -#define W5100_H_INCLUDED - -#include -#include - -#define MAX_SOCK_NUM 4 - -typedef uint8_t SOCKET; - -#define IDM_OR 0x8000 -#define IDM_AR0 0x8001 -#define IDM_AR1 0x8002 -#define IDM_DR 0x8003 -/* -class MR { -public: - static const uint8_t RST = 0x80; - static const uint8_t PB = 0x10; - static const uint8_t PPPOE = 0x08; - static const uint8_t LB = 0x04; - static const uint8_t AI = 0x02; - static const uint8_t IND = 0x01; -}; -*/ -/* -class IR { -public: - static const uint8_t CONFLICT = 0x80; - static const uint8_t UNREACH = 0x40; - static const uint8_t PPPoE = 0x20; - static const uint8_t SOCK0 = 0x01; - static const uint8_t SOCK1 = 0x02; - static const uint8_t SOCK2 = 0x04; - static const uint8_t SOCK3 = 0x08; - static inline uint8_t SOCK(SOCKET ch) { return (0x01 << ch); }; -}; -*/ - -class SnMR { -public: - static const uint8_t CLOSE = 0x00; - static const uint8_t TCP = 0x01; - static const uint8_t UDP = 0x02; - static const uint8_t IPRAW = 0x03; - static const uint8_t MACRAW = 0x04; - static const uint8_t PPPOE = 0x05; - static const uint8_t ND = 0x20; - static const uint8_t MULTI = 0x80; -}; - -enum SockCMD { - Sock_OPEN = 0x01, - Sock_LISTEN = 0x02, - Sock_CONNECT = 0x04, - Sock_DISCON = 0x08, - Sock_CLOSE = 0x10, - Sock_SEND = 0x20, - Sock_SEND_MAC = 0x21, - Sock_SEND_KEEP = 0x22, - Sock_RECV = 0x40 -}; - -/*class SnCmd { -public: - static const uint8_t OPEN = 0x01; - static const uint8_t LISTEN = 0x02; - static const uint8_t CONNECT = 0x04; - static const uint8_t DISCON = 0x08; - static const uint8_t CLOSE = 0x10; - static const uint8_t SEND = 0x20; - static const uint8_t SEND_MAC = 0x21; - static const uint8_t SEND_KEEP = 0x22; - static const uint8_t RECV = 0x40; -}; -*/ - -class SnIR { -public: - static const uint8_t SEND_OK = 0x10; - static const uint8_t TIMEOUT = 0x08; - static const uint8_t RECV = 0x04; - static const uint8_t DISCON = 0x02; - static const uint8_t CON = 0x01; -}; - -class SnSR { -public: - static const uint8_t CLOSED = 0x00; - static const uint8_t INIT = 0x13; - static const uint8_t LISTEN = 0x14; - static const uint8_t SYNSENT = 0x15; - static const uint8_t SYNRECV = 0x16; - static const uint8_t ESTABLISHED = 0x17; - static const uint8_t FIN_WAIT = 0x18; - static const uint8_t CLOSING = 0x1A; - static const uint8_t TIME_WAIT = 0x1B; - static const uint8_t CLOSE_WAIT = 0x1C; - static const uint8_t LAST_ACK = 0x1D; - static const uint8_t UDP = 0x22; - static const uint8_t IPRAW = 0x32; - static const uint8_t MACRAW = 0x42; - static const uint8_t PPPOE = 0x5F; -}; - -class IPPROTO { -public: - static const uint8_t IP = 0; - static const uint8_t ICMP = 1; - static const uint8_t IGMP = 2; - static const uint8_t GGP = 3; - static const uint8_t TCP = 6; - static const uint8_t PUP = 12; - static const uint8_t UDP = 17; - static const uint8_t IDP = 22; - static const uint8_t ND = 77; - static const uint8_t RAW = 255; -}; - -class W5100Class { - -public: - void init(); - - /** - * @brief This function is being used for copy the data form Receive buffer of the chip to application buffer. - * - * It calculate the actual physical address where one has to read - * the data from Receive buffer. Here also take care of the condition while it exceed - * the Rx memory uper-bound of socket. - */ - void read_data(SOCKET s, volatile uint8_t * src, volatile uint8_t * dst, uint16_t len); - - /** - * @brief This function is being called by send() and sendto() function also. - * - * This function read the Tx write pointer register and after copy the data in buffer update the Tx write pointer - * register. User should read upper byte first and lower byte later to get proper value. - */ - void send_data_processing(SOCKET s, const uint8_t *data, uint16_t len); - /** - * @brief A copy of send_data_processing that uses the provided ptr for the - * write offset. Only needed for the "streaming" UDP API, where - * a single UDP packet is built up over a number of calls to - * send_data_processing_ptr, because TX_WR doesn't seem to get updated - * correctly in those scenarios - * @param ptr value to use in place of TX_WR. If 0, then the value is read - * in from TX_WR - * @return New value for ptr, to be used in the next call - */ -// FIXME Update documentation - void send_data_processing_offset(SOCKET s, uint16_t data_offset, const uint8_t *data, uint16_t len); - - /** - * @brief This function is being called by recv() also. - * - * This function read the Rx read pointer register - * and after copy the data from receive buffer update the Rx write pointer register. - * User should read upper byte first and lower byte later to get proper value. - */ - void recv_data_processing(SOCKET s, uint8_t *data, uint16_t len, uint8_t peek = 0); - - inline void setGatewayIp(uint8_t *_addr); - inline void getGatewayIp(uint8_t *_addr); - - inline void setSubnetMask(uint8_t *_addr); - inline void getSubnetMask(uint8_t *_addr); - - inline void setMACAddress(uint8_t * addr); - inline void getMACAddress(uint8_t * addr); - - inline void setIPAddress(uint8_t * addr); - inline void getIPAddress(uint8_t * addr); - - inline void setRetransmissionTime(uint16_t timeout); - inline void setRetransmissionCount(uint8_t _retry); - - void execCmdSn(SOCKET s, SockCMD _cmd); - - uint16_t getTXFreeSize(SOCKET s); - uint16_t getRXReceivedSize(SOCKET s); - - - // W5100 Registers - // --------------- -private: - static uint8_t write(uint16_t _addr, uint8_t _data); - static uint16_t write(uint16_t addr, const uint8_t *buf, uint16_t len); - static uint8_t read(uint16_t addr); - static uint16_t read(uint16_t addr, uint8_t *buf, uint16_t len); - -#define __GP_REGISTER8(name, address) \ - static inline void write##name(uint8_t _data) { \ - write(address, _data); \ - } \ - static inline uint8_t read##name() { \ - return read(address); \ - } -#define __GP_REGISTER16(name, address) \ - static void write##name(uint16_t _data) { \ - write(address, _data >> 8); \ - write(address+1, _data & 0xFF); \ - } \ - static uint16_t read##name() { \ - uint16_t res = read(address); \ - res = (res << 8) + read(address + 1); \ - return res; \ - } -#define __GP_REGISTER_N(name, address, size) \ - static uint16_t write##name(uint8_t *_buff) { \ - return write(address, _buff, size); \ - } \ - static uint16_t read##name(uint8_t *_buff) { \ - return read(address, _buff, size); \ - } - -public: - __GP_REGISTER8 (MR, 0x0000); // Mode - __GP_REGISTER_N(GAR, 0x0001, 4); // Gateway IP address - __GP_REGISTER_N(SUBR, 0x0005, 4); // Subnet mask address - __GP_REGISTER_N(SHAR, 0x0009, 6); // Source MAC address - __GP_REGISTER_N(SIPR, 0x000F, 4); // Source IP address - __GP_REGISTER8 (IR, 0x0015); // Interrupt - __GP_REGISTER8 (IMR, 0x0016); // Interrupt Mask - __GP_REGISTER16(RTR, 0x0017); // Timeout address - __GP_REGISTER8 (RCR, 0x0019); // Retry count - __GP_REGISTER8 (RMSR, 0x001A); // Receive memory size - __GP_REGISTER8 (TMSR, 0x001B); // Transmit memory size - __GP_REGISTER8 (PATR, 0x001C); // Authentication type address in PPPoE mode - __GP_REGISTER8 (PTIMER, 0x0028); // PPP LCP Request Timer - __GP_REGISTER8 (PMAGIC, 0x0029); // PPP LCP Magic Number - __GP_REGISTER_N(UIPR, 0x002A, 4); // Unreachable IP address in UDP mode - __GP_REGISTER16(UPORT, 0x002E); // Unreachable Port address in UDP mode - -#undef __GP_REGISTER8 -#undef __GP_REGISTER16 -#undef __GP_REGISTER_N - - // W5100 Socket registers - // ---------------------- -private: - static inline uint8_t readSn(SOCKET _s, uint16_t _addr); - static inline uint8_t writeSn(SOCKET _s, uint16_t _addr, uint8_t _data); - static inline uint16_t readSn(SOCKET _s, uint16_t _addr, uint8_t *_buf, uint16_t len); - static inline uint16_t writeSn(SOCKET _s, uint16_t _addr, uint8_t *_buf, uint16_t len); - - static const uint16_t CH_BASE = 0x0400; - static const uint16_t CH_SIZE = 0x0100; - -#define __SOCKET_REGISTER8(name, address) \ - static inline void write##name(SOCKET _s, uint8_t _data) { \ - writeSn(_s, address, _data); \ - } \ - static inline uint8_t read##name(SOCKET _s) { \ - return readSn(_s, address); \ - } -#define __SOCKET_REGISTER16(name, address) \ - static void write##name(SOCKET _s, uint16_t _data) { \ - writeSn(_s, address, _data >> 8); \ - writeSn(_s, address+1, _data & 0xFF); \ - } \ - static uint16_t read##name(SOCKET _s) { \ - uint16_t res = readSn(_s, address); \ - uint16_t res2 = readSn(_s,address + 1); \ - res = res << 8; \ - res2 = res2 & 0xFF; \ - res = res | res2; \ - return res; \ - } -#define __SOCKET_REGISTER_N(name, address, size) \ - static uint16_t write##name(SOCKET _s, uint8_t *_buff) { \ - return writeSn(_s, address, _buff, size); \ - } \ - static uint16_t read##name(SOCKET _s, uint8_t *_buff) { \ - return readSn(_s, address, _buff, size); \ - } - -public: - __SOCKET_REGISTER8(SnMR, 0x0000) // Mode - __SOCKET_REGISTER8(SnCR, 0x0001) // Command - __SOCKET_REGISTER8(SnIR, 0x0002) // Interrupt - __SOCKET_REGISTER8(SnSR, 0x0003) // Status - __SOCKET_REGISTER16(SnPORT, 0x0004) // Source Port - __SOCKET_REGISTER_N(SnDHAR, 0x0006, 6) // Destination Hardw Addr - __SOCKET_REGISTER_N(SnDIPR, 0x000C, 4) // Destination IP Addr - __SOCKET_REGISTER16(SnDPORT, 0x0010) // Destination Port - __SOCKET_REGISTER16(SnMSSR, 0x0012) // Max Segment Size - __SOCKET_REGISTER8(SnPROTO, 0x0014) // Protocol in IP RAW Mode - __SOCKET_REGISTER8(SnTOS, 0x0015) // IP TOS - __SOCKET_REGISTER8(SnTTL, 0x0016) // IP TTL - __SOCKET_REGISTER16(SnTX_FSR, 0x0020) // TX Free Size - __SOCKET_REGISTER16(SnTX_RD, 0x0022) // TX Read Pointer - __SOCKET_REGISTER16(SnTX_WR, 0x0024) // TX Write Pointer - __SOCKET_REGISTER16(SnRX_RSR, 0x0026) // RX Free Size - __SOCKET_REGISTER16(SnRX_RD, 0x0028) // RX Read Pointer - __SOCKET_REGISTER16(SnRX_WR, 0x002A) // RX Write Pointer (supported?) - -#undef __SOCKET_REGISTER8 -#undef __SOCKET_REGISTER16 -#undef __SOCKET_REGISTER_N - - -private: - static const uint8_t RST = 7; // Reset BIT - - static const int SOCKETS = 4; - static const uint16_t SMASK = 0x07FF; // Tx buffer MASK - static const uint16_t RMASK = 0x07FF; // Rx buffer MASK -public: - static const uint16_t SSIZE = 2048; // Max Tx buffer size -private: - static const uint16_t RSIZE = 2048; // Max Rx buffer size - uint16_t SBASE[SOCKETS]; // Tx buffer base address - uint16_t RBASE[SOCKETS]; // Rx buffer base address - -private: -#if defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__) - inline static void initSS() { DDRB |= _BV(4); }; - inline static void setSS() { PORTB &= ~_BV(4); }; - inline static void resetSS() { PORTB |= _BV(4); }; -#elif defined(__AVR_ATmega32U4__) - inline static void initSS() { DDRB |= _BV(6); }; - inline static void setSS() { PORTB &= ~_BV(6); }; - inline static void resetSS() { PORTB |= _BV(6); }; -#elif defined(__AVR_AT90USB1286__) || defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB162__) - inline static void initSS() { DDRB |= _BV(0); }; - inline static void setSS() { PORTB &= ~_BV(0); }; - inline static void resetSS() { PORTB |= _BV(0); }; -#else - inline static void initSS() { DDRB |= _BV(2); }; - inline static void setSS() { PORTB &= ~_BV(2); }; - inline static void resetSS() { PORTB |= _BV(2); }; -#endif - -}; - -extern W5100Class W5100; - -uint8_t W5100Class::readSn(SOCKET _s, uint16_t _addr) { - return read(CH_BASE + _s * CH_SIZE + _addr); -} - -uint8_t W5100Class::writeSn(SOCKET _s, uint16_t _addr, uint8_t _data) { - return write(CH_BASE + _s * CH_SIZE + _addr, _data); -} - -uint16_t W5100Class::readSn(SOCKET _s, uint16_t _addr, uint8_t *_buf, uint16_t _len) { - return read(CH_BASE + _s * CH_SIZE + _addr, _buf, _len); -} - -uint16_t W5100Class::writeSn(SOCKET _s, uint16_t _addr, uint8_t *_buf, uint16_t _len) { - return write(CH_BASE + _s * CH_SIZE + _addr, _buf, _len); -} - -void W5100Class::getGatewayIp(uint8_t *_addr) { - readGAR(_addr); -} - -void W5100Class::setGatewayIp(uint8_t *_addr) { - writeGAR(_addr); -} - -void W5100Class::getSubnetMask(uint8_t *_addr) { - readSUBR(_addr); -} - -void W5100Class::setSubnetMask(uint8_t *_addr) { - writeSUBR(_addr); -} - -void W5100Class::getMACAddress(uint8_t *_addr) { - readSHAR(_addr); -} - -void W5100Class::setMACAddress(uint8_t *_addr) { - writeSHAR(_addr); -} - -void W5100Class::getIPAddress(uint8_t *_addr) { - readSIPR(_addr); -} - -void W5100Class::setIPAddress(uint8_t *_addr) { - writeSIPR(_addr); -} - -void W5100Class::setRetransmissionTime(uint16_t _timeout) { - writeRTR(_timeout); -} - -void W5100Class::setRetransmissionCount(uint8_t _retry) { - writeRCR(_retry); -} - -#endif diff --git a/build/linux/work/libraries/Firmata/Boards.h b/build/linux/work/libraries/Firmata/Boards.h deleted file mode 100644 index 06f69c629..000000000 --- a/build/linux/work/libraries/Firmata/Boards.h +++ /dev/null @@ -1,366 +0,0 @@ -/* Boards.h - Hardware Abstraction Layer for Firmata library */ - -#ifndef Firmata_Boards_h -#define Firmata_Boards_h - -#include - -#if defined(ARDUINO) && ARDUINO >= 100 -#include "Arduino.h" // for digitalRead, digitalWrite, etc -#else -#include "WProgram.h" -#endif - -// Normally Servo.h must be included before Firmata.h (which then includes -// this file). If Servo.h wasn't included, this allows the code to still -// compile, but without support for any Servos. Hopefully that's what the -// user intended by not including Servo.h -#ifndef MAX_SERVOS -#define MAX_SERVOS 0 -#endif - -/* - Firmata Hardware Abstraction Layer - -Firmata is built on top of the hardware abstraction functions of Arduino, -specifically digitalWrite, digitalRead, analogWrite, analogRead, and -pinMode. While these functions offer simple integer pin numbers, Firmata -needs more information than is provided by Arduino. This file provides -all other hardware specific details. To make Firmata support a new board, -only this file should require editing. - -The key concept is every "pin" implemented by Firmata may be mapped to -any pin as implemented by Arduino. Usually a simple 1-to-1 mapping is -best, but such mapping should not be assumed. This hardware abstraction -layer allows Firmata to implement any number of pins which map onto the -Arduino implemented pins in almost any arbitrary way. - - -General Constants: - -These constants provide basic information Firmata requires. - -TOTAL_PINS: The total number of pins Firmata implemented by Firmata. - Usually this will match the number of pins the Arduino functions - implement, including any pins pins capable of analog or digital. - However, Firmata may implement any number of pins. For example, - on Arduino Mini with 8 analog inputs, 6 of these may be used - for digital functions, and 2 are analog only. On such boards, - Firmata can implement more pins than Arduino's pinMode() - function, in order to accommodate those special pins. The - Firmata protocol supports a maximum of 128 pins, so this - constant must not exceed 128. - -TOTAL_ANALOG_PINS: The total number of analog input pins implemented. - The Firmata protocol allows up to 16 analog inputs, accessed - using offsets 0 to 15. Because Firmata presents the analog - inputs using different offsets than the actual pin numbers - (a legacy of Arduino's analogRead function, and the way the - analog input capable pins are physically labeled on all - Arduino boards), the total number of analog input signals - must be specified. 16 is the maximum. - -VERSION_BLINK_PIN: When Firmata starts up, it will blink the version - number. This constant is the Arduino pin number where a - LED is connected. - - -Pin Mapping Macros: - -These macros provide the mapping between pins as implemented by -Firmata protocol and the actual pin numbers used by the Arduino -functions. Even though such mappings are often simple, pin -numbers received by Firmata protocol should always be used as -input to these macros, and the result of the macro should be -used with with any Arduino function. - -When Firmata is extended to support a new pin mode or feature, -a pair of macros should be added and used for all hardware -access. For simple 1:1 mapping, these macros add no actual -overhead, yet their consistent use allows source code which -uses them consistently to be easily adapted to all other boards -with different requirements. - -IS_PIN_XXXX(pin): The IS_PIN macros resolve to true or non-zero - if a pin as implemented by Firmata corresponds to a pin - that actually implements the named feature. - -PIN_TO_XXXX(pin): The PIN_TO macros translate pin numbers as - implemented by Firmata to the pin numbers needed as inputs - to the Arduino functions. The corresponding IS_PIN macro - should always be tested before using a PIN_TO macro, so - these macros only need to handle valid Firmata pin - numbers for the named feature. - - -Port Access Inline Funtions: - -For efficiency, Firmata protocol provides access to digital -input and output pins grouped by 8 bit ports. When these -groups of 8 correspond to actual 8 bit ports as implemented -by the hardware, these inline functions can provide high -speed direct port access. Otherwise, a default implementation -using 8 calls to digitalWrite or digitalRead is used. - -When porting Firmata to a new board, it is recommended to -use the default functions first and focus only on the constants -and macros above. When those are working, if optimized port -access is desired, these inline functions may be extended. -The recommended approach defines a symbol indicating which -optimization to use, and then conditional complication is -used within these functions. - -readPort(port, bitmask): Read an 8 bit port, returning the value. - port: The port number, Firmata pins port*8 to port*8+7 - bitmask: The actual pins to read, indicated by 1 bits. - -writePort(port, value, bitmask): Write an 8 bit port. - port: The port number, Firmata pins port*8 to port*8+7 - value: The 8 bit value to write - bitmask: The actual pins to write, indicated by 1 bits. -*/ - -/*============================================================================== - * Board Specific Configuration - *============================================================================*/ - -#ifndef digitalPinHasPWM -#define digitalPinHasPWM(p) IS_PIN_DIGITAL(p) -#endif - -// Arduino Duemilanove, Diecimila, and NG -#if defined(__AVR_ATmega168__) || defined(__AVR_ATmega328P__) -#if defined(NUM_ANALOG_INPUTS) && NUM_ANALOG_INPUTS == 6 -#define TOTAL_ANALOG_PINS 6 -#define TOTAL_PINS 20 // 14 digital + 6 analog -#else -#define TOTAL_ANALOG_PINS 8 -#define TOTAL_PINS 22 // 14 digital + 8 analog -#endif -#define VERSION_BLINK_PIN 13 -#define IS_PIN_DIGITAL(p) ((p) >= 2 && (p) <= 19) -#define IS_PIN_ANALOG(p) ((p) >= 14 && (p) < 14 + TOTAL_ANALOG_PINS) -#define IS_PIN_PWM(p) digitalPinHasPWM(p) -#define IS_PIN_SERVO(p) (IS_PIN_DIGITAL(p) && (p) - 2 < MAX_SERVOS) -#define IS_PIN_I2C(p) ((p) == 18 || (p) == 19) -#define PIN_TO_DIGITAL(p) (p) -#define PIN_TO_ANALOG(p) ((p) - 14) -#define PIN_TO_PWM(p) PIN_TO_DIGITAL(p) -#define PIN_TO_SERVO(p) ((p) - 2) -#define ARDUINO_PINOUT_OPTIMIZE 1 - - -// Wiring (and board) -#elif defined(WIRING) -#define VERSION_BLINK_PIN WLED -#define IS_PIN_DIGITAL(p) ((p) >= 0 && (p) < TOTAL_PINS) -#define IS_PIN_ANALOG(p) ((p) >= FIRST_ANALOG_PIN && (p) < (FIRST_ANALOG_PIN+TOTAL_ANALOG_PINS)) -#define IS_PIN_PWM(p) digitalPinHasPWM(p) -#define IS_PIN_SERVO(p) ((p) >= 0 && (p) < MAX_SERVOS) -#define IS_PIN_I2C(p) ((p) == SDA || (p) == SCL) -#define PIN_TO_DIGITAL(p) (p) -#define PIN_TO_ANALOG(p) ((p) - FIRST_ANALOG_PIN) -#define PIN_TO_PWM(p) PIN_TO_DIGITAL(p) -#define PIN_TO_SERVO(p) (p) - - -// old Arduinos -#elif defined(__AVR_ATmega8__) -#define TOTAL_ANALOG_PINS 6 -#define TOTAL_PINS 20 // 14 digital + 6 analog -#define VERSION_BLINK_PIN 13 -#define IS_PIN_DIGITAL(p) ((p) >= 2 && (p) <= 19) -#define IS_PIN_ANALOG(p) ((p) >= 14 && (p) <= 19) -#define IS_PIN_PWM(p) digitalPinHasPWM(p) -#define IS_PIN_SERVO(p) (IS_PIN_DIGITAL(p) && (p) - 2 < MAX_SERVOS) -#define IS_PIN_I2C(p) ((p) == 18 || (p) == 19) -#define PIN_TO_DIGITAL(p) (p) -#define PIN_TO_ANALOG(p) ((p) - 14) -#define PIN_TO_PWM(p) PIN_TO_DIGITAL(p) -#define PIN_TO_SERVO(p) ((p) - 2) -#define ARDUINO_PINOUT_OPTIMIZE 1 - - -// Arduino Mega -#elif defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__) -#define TOTAL_ANALOG_PINS 16 -#define TOTAL_PINS 70 // 54 digital + 16 analog -#define VERSION_BLINK_PIN 13 -#define IS_PIN_DIGITAL(p) ((p) >= 2 && (p) < TOTAL_PINS) -#define IS_PIN_ANALOG(p) ((p) >= 54 && (p) < TOTAL_PINS) -#define IS_PIN_PWM(p) digitalPinHasPWM(p) -#define IS_PIN_SERVO(p) ((p) >= 2 && (p) - 2 < MAX_SERVOS) -#define IS_PIN_I2C(p) ((p) == 20 || (p) == 21) -#define PIN_TO_DIGITAL(p) (p) -#define PIN_TO_ANALOG(p) ((p) - 54) -#define PIN_TO_PWM(p) PIN_TO_DIGITAL(p) -#define PIN_TO_SERVO(p) ((p) - 2) - - -// Teensy 1.0 -#elif defined(__AVR_AT90USB162__) -#define TOTAL_ANALOG_PINS 0 -#define TOTAL_PINS 21 // 21 digital + no analog -#define VERSION_BLINK_PIN 6 -#define IS_PIN_DIGITAL(p) ((p) >= 0 && (p) < TOTAL_PINS) -#define IS_PIN_ANALOG(p) (0) -#define IS_PIN_PWM(p) digitalPinHasPWM(p) -#define IS_PIN_SERVO(p) ((p) >= 0 && (p) < MAX_SERVOS) -#define IS_PIN_I2C(p) (0) -#define PIN_TO_DIGITAL(p) (p) -#define PIN_TO_ANALOG(p) (0) -#define PIN_TO_PWM(p) PIN_TO_DIGITAL(p) -#define PIN_TO_SERVO(p) (p) - - -// Teensy 2.0 -#elif defined(__AVR_ATmega32U4__) -#define TOTAL_ANALOG_PINS 12 -#define TOTAL_PINS 25 // 11 digital + 12 analog -#define VERSION_BLINK_PIN 11 -#define IS_PIN_DIGITAL(p) ((p) >= 0 && (p) < TOTAL_PINS) -#define IS_PIN_ANALOG(p) ((p) >= 11 && (p) <= 22) -#define IS_PIN_PWM(p) digitalPinHasPWM(p) -#define IS_PIN_SERVO(p) ((p) >= 0 && (p) < MAX_SERVOS) -#define IS_PIN_I2C(p) ((p) == 5 || (p) == 6) -#define PIN_TO_DIGITAL(p) (p) -#define PIN_TO_ANALOG(p) (((p)<22)?21-(p):11) -#define PIN_TO_PWM(p) PIN_TO_DIGITAL(p) -#define PIN_TO_SERVO(p) (p) - - -// Teensy++ 1.0 and 2.0 -#elif defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB1286__) -#define TOTAL_ANALOG_PINS 8 -#define TOTAL_PINS 46 // 38 digital + 8 analog -#define VERSION_BLINK_PIN 6 -#define IS_PIN_DIGITAL(p) ((p) >= 0 && (p) < TOTAL_PINS) -#define IS_PIN_ANALOG(p) ((p) >= 38 && (p) < TOTAL_PINS) -#define IS_PIN_PWM(p) digitalPinHasPWM(p) -#define IS_PIN_SERVO(p) ((p) >= 0 && (p) < MAX_SERVOS) -#define IS_PIN_I2C(p) ((p) == 0 || (p) == 1) -#define PIN_TO_DIGITAL(p) (p) -#define PIN_TO_ANALOG(p) ((p) - 38) -#define PIN_TO_PWM(p) PIN_TO_DIGITAL(p) -#define PIN_TO_SERVO(p) (p) - - -// Sanguino -#elif defined(__AVR_ATmega644P__) || defined(__AVR_ATmega644__) -#define TOTAL_ANALOG_PINS 8 -#define TOTAL_PINS 32 // 24 digital + 8 analog -#define VERSION_BLINK_PIN 0 -#define IS_PIN_DIGITAL(p) ((p) >= 2 && (p) < TOTAL_PINS) -#define IS_PIN_ANALOG(p) ((p) >= 24 && (p) < TOTAL_PINS) -#define IS_PIN_PWM(p) digitalPinHasPWM(p) -#define IS_PIN_SERVO(p) ((p) >= 0 && (p) < MAX_SERVOS) -#define IS_PIN_I2C(p) ((p) == 16 || (p) == 17) -#define PIN_TO_DIGITAL(p) (p) -#define PIN_TO_ANALOG(p) ((p) - 24) -#define PIN_TO_PWM(p) PIN_TO_DIGITAL(p) -#define PIN_TO_SERVO(p) ((p) - 2) - - -// Illuminato -#elif defined(__AVR_ATmega645__) -#define TOTAL_ANALOG_PINS 6 -#define TOTAL_PINS 42 // 36 digital + 6 analog -#define VERSION_BLINK_PIN 13 -#define IS_PIN_DIGITAL(p) ((p) >= 2 && (p) < TOTAL_PINS) -#define IS_PIN_ANALOG(p) ((p) >= 36 && (p) < TOTAL_PINS) -#define IS_PIN_PWM(p) digitalPinHasPWM(p) -#define IS_PIN_SERVO(p) ((p) >= 0 && (p) < MAX_SERVOS) -#define IS_PIN_I2C(p) ((p) == 4 || (p) == 5) -#define PIN_TO_DIGITAL(p) (p) -#define PIN_TO_ANALOG(p) ((p) - 36) -#define PIN_TO_PWM(p) PIN_TO_DIGITAL(p) -#define PIN_TO_SERVO(p) ((p) - 2) - - -// anything else -#else -#error "Please edit Boards.h with a hardware abstraction for this board" -#endif - - -/*============================================================================== - * readPort() - Read an 8 bit port - *============================================================================*/ - -static inline unsigned char readPort(byte, byte) __attribute__((always_inline, unused)); -static inline unsigned char readPort(byte port, byte bitmask) -{ -#if defined(ARDUINO_PINOUT_OPTIMIZE) - if (port == 0) return (PIND & 0xFC) & bitmask; // ignore Rx/Tx 0/1 - if (port == 1) return ((PINB & 0x3F) | ((PINC & 0x03) << 6)) & bitmask; - if (port == 2) return ((PINC & 0x3C) >> 2) & bitmask; - return 0; -#else - unsigned char out=0, pin=port*8; - if (IS_PIN_DIGITAL(pin+0) && (bitmask & 0x01) && digitalRead(PIN_TO_DIGITAL(pin+0))) out |= 0x01; - if (IS_PIN_DIGITAL(pin+1) && (bitmask & 0x02) && digitalRead(PIN_TO_DIGITAL(pin+1))) out |= 0x02; - if (IS_PIN_DIGITAL(pin+2) && (bitmask & 0x04) && digitalRead(PIN_TO_DIGITAL(pin+2))) out |= 0x04; - if (IS_PIN_DIGITAL(pin+3) && (bitmask & 0x08) && digitalRead(PIN_TO_DIGITAL(pin+3))) out |= 0x08; - if (IS_PIN_DIGITAL(pin+4) && (bitmask & 0x10) && digitalRead(PIN_TO_DIGITAL(pin+4))) out |= 0x10; - if (IS_PIN_DIGITAL(pin+5) && (bitmask & 0x20) && digitalRead(PIN_TO_DIGITAL(pin+5))) out |= 0x20; - if (IS_PIN_DIGITAL(pin+6) && (bitmask & 0x40) && digitalRead(PIN_TO_DIGITAL(pin+6))) out |= 0x40; - if (IS_PIN_DIGITAL(pin+7) && (bitmask & 0x80) && digitalRead(PIN_TO_DIGITAL(pin+7))) out |= 0x80; - return out; -#endif -} - -/*============================================================================== - * writePort() - Write an 8 bit port, only touch pins specified by a bitmask - *============================================================================*/ - -static inline unsigned char writePort(byte, byte, byte) __attribute__((always_inline, unused)); -static inline unsigned char writePort(byte port, byte value, byte bitmask) -{ -#if defined(ARDUINO_PINOUT_OPTIMIZE) - if (port == 0) { - bitmask = bitmask & 0xFC; // do not touch Tx & Rx pins - byte valD = value & bitmask; - byte maskD = ~bitmask; - cli(); - PORTD = (PORTD & maskD) | valD; - sei(); - } else if (port == 1) { - byte valB = (value & bitmask) & 0x3F; - byte valC = (value & bitmask) >> 6; - byte maskB = ~(bitmask & 0x3F); - byte maskC = ~((bitmask & 0xC0) >> 6); - cli(); - PORTB = (PORTB & maskB) | valB; - PORTC = (PORTC & maskC) | valC; - sei(); - } else if (port == 2) { - bitmask = bitmask & 0x0F; - byte valC = (value & bitmask) << 2; - byte maskC = ~(bitmask << 2); - cli(); - PORTC = (PORTC & maskC) | valC; - sei(); - } -#else - byte pin=port*8; - if ((bitmask & 0x01)) digitalWrite(PIN_TO_DIGITAL(pin+0), (value & 0x01)); - if ((bitmask & 0x02)) digitalWrite(PIN_TO_DIGITAL(pin+1), (value & 0x02)); - if ((bitmask & 0x04)) digitalWrite(PIN_TO_DIGITAL(pin+2), (value & 0x04)); - if ((bitmask & 0x08)) digitalWrite(PIN_TO_DIGITAL(pin+3), (value & 0x08)); - if ((bitmask & 0x10)) digitalWrite(PIN_TO_DIGITAL(pin+4), (value & 0x10)); - if ((bitmask & 0x20)) digitalWrite(PIN_TO_DIGITAL(pin+5), (value & 0x20)); - if ((bitmask & 0x40)) digitalWrite(PIN_TO_DIGITAL(pin+6), (value & 0x40)); - if ((bitmask & 0x80)) digitalWrite(PIN_TO_DIGITAL(pin+7), (value & 0x80)); -#endif -} - - - - -#ifndef TOTAL_PORTS -#define TOTAL_PORTS ((TOTAL_PINS + 7) / 8) -#endif - - -#endif /* Firmata_Boards_h */ - diff --git a/build/linux/work/libraries/Firmata/Firmata.cpp b/build/linux/work/libraries/Firmata/Firmata.cpp deleted file mode 100644 index e81c10bb1..000000000 --- a/build/linux/work/libraries/Firmata/Firmata.cpp +++ /dev/null @@ -1,444 +0,0 @@ -/* - Firmata.cpp - Firmata library - Copyright (C) 2006-2008 Hans-Christoph Steiner. All rights reserved. - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - See file LICENSE.txt for further informations on licensing terms. -*/ - -//****************************************************************************** -//* Includes -//****************************************************************************** - -#include "Firmata.h" -#include "HardwareSerial.h" - -extern "C" { -#include -#include -} - -//****************************************************************************** -//* Support Functions -//****************************************************************************** - -void FirmataClass::sendValueAsTwo7bitBytes(int value) -{ - FirmataSerial.write(value & B01111111); // LSB - FirmataSerial.write(value >> 7 & B01111111); // MSB -} - -void FirmataClass::startSysex(void) -{ - FirmataSerial.write(START_SYSEX); -} - -void FirmataClass::endSysex(void) -{ - FirmataSerial.write(END_SYSEX); -} - -//****************************************************************************** -//* Constructors -//****************************************************************************** - -FirmataClass::FirmataClass(Stream &s) : FirmataSerial(s) -{ - firmwareVersionCount = 0; - systemReset(); -} - -//****************************************************************************** -//* Public Methods -//****************************************************************************** - -/* begin method for overriding default serial bitrate */ -void FirmataClass::begin(void) -{ - begin(57600); -} - -/* begin method for overriding default serial bitrate */ -void FirmataClass::begin(long speed) -{ - Serial.begin(speed); - FirmataSerial = Serial; - blinkVersion(); - printVersion(); - printFirmwareVersion(); -} - -void FirmataClass::begin(Stream &s) -{ - FirmataSerial = s; - systemReset(); - printVersion(); - printFirmwareVersion(); -} - -// output the protocol version message to the serial port -void FirmataClass::printVersion(void) { - FirmataSerial.write(REPORT_VERSION); - FirmataSerial.write(FIRMATA_MAJOR_VERSION); - FirmataSerial.write(FIRMATA_MINOR_VERSION); -} - -void FirmataClass::blinkVersion(void) -{ - // flash the pin with the protocol version - pinMode(VERSION_BLINK_PIN,OUTPUT); - pin13strobe(FIRMATA_MAJOR_VERSION, 40, 210); - delay(250); - pin13strobe(FIRMATA_MINOR_VERSION, 40, 210); - delay(125); -} - -void FirmataClass::printFirmwareVersion(void) -{ - byte i; - - if(firmwareVersionCount) { // make sure that the name has been set before reporting - startSysex(); - FirmataSerial.write(REPORT_FIRMWARE); - FirmataSerial.write(firmwareVersionVector[0]); // major version number - FirmataSerial.write(firmwareVersionVector[1]); // minor version number - for(i=2; i 0) && (inputData < 128) ) { - waitForData--; - storedInputData[waitForData] = inputData; - if( (waitForData==0) && executeMultiByteCommand ) { // got the whole message - switch(executeMultiByteCommand) { - case ANALOG_MESSAGE: - if(currentAnalogCallback) { - (*currentAnalogCallback)(multiByteChannel, - (storedInputData[0] << 7) - + storedInputData[1]); - } - break; - case DIGITAL_MESSAGE: - if(currentDigitalCallback) { - (*currentDigitalCallback)(multiByteChannel, - (storedInputData[0] << 7) - + storedInputData[1]); - } - break; - case SET_PIN_MODE: - if(currentPinModeCallback) - (*currentPinModeCallback)(storedInputData[1], storedInputData[0]); - break; - case REPORT_ANALOG: - if(currentReportAnalogCallback) - (*currentReportAnalogCallback)(multiByteChannel,storedInputData[0]); - break; - case REPORT_DIGITAL: - if(currentReportDigitalCallback) - (*currentReportDigitalCallback)(multiByteChannel,storedInputData[0]); - break; - } - executeMultiByteCommand = 0; - } - } else { - // remove channel info from command byte if less than 0xF0 - if(inputData < 0xF0) { - command = inputData & 0xF0; - multiByteChannel = inputData & 0x0F; - } else { - command = inputData; - // commands in the 0xF* range don't use channel data - } - switch (command) { - case ANALOG_MESSAGE: - case DIGITAL_MESSAGE: - case SET_PIN_MODE: - waitForData = 2; // two data bytes needed - executeMultiByteCommand = command; - break; - case REPORT_ANALOG: - case REPORT_DIGITAL: - waitForData = 1; // two data bytes needed - executeMultiByteCommand = command; - break; - case START_SYSEX: - parsingSysex = true; - sysexBytesRead = 0; - break; - case SYSTEM_RESET: - systemReset(); - break; - case REPORT_VERSION: - Firmata.printVersion(); - break; - } - } -} - -//------------------------------------------------------------------------------ -// Serial Send Handling - -// send an analog message -void FirmataClass::sendAnalog(byte pin, int value) -{ - // pin can only be 0-15, so chop higher bits - FirmataSerial.write(ANALOG_MESSAGE | (pin & 0xF)); - sendValueAsTwo7bitBytes(value); -} - -// send a single digital pin in a digital message -void FirmataClass::sendDigital(byte pin, int value) -{ - /* TODO add single pin digital messages to the protocol, this needs to - * track the last digital data sent so that it can be sure to change just - * one bit in the packet. This is complicated by the fact that the - * numbering of the pins will probably differ on Arduino, Wiring, and - * other boards. The DIGITAL_MESSAGE sends 14 bits at a time, but it is - * probably easier to send 8 bit ports for any board with more than 14 - * digital pins. - */ - - // TODO: the digital message should not be sent on the serial port every - // time sendDigital() is called. Instead, it should add it to an int - // which will be sent on a schedule. If a pin changes more than once - // before the digital message is sent on the serial port, it should send a - // digital message for each change. - - // if(value == 0) - // sendDigitalPortPair(); -} - - -// send 14-bits in a single digital message (protocol v1) -// send an 8-bit port in a single digital message (protocol v2) -void FirmataClass::sendDigitalPort(byte portNumber, int portData) -{ - FirmataSerial.write(DIGITAL_MESSAGE | (portNumber & 0xF)); - FirmataSerial.write((byte)portData % 128); // Tx bits 0-6 - FirmataSerial.write(portData >> 7); // Tx bits 7-13 -} - - -void FirmataClass::sendSysex(byte command, byte bytec, byte* bytev) -{ - byte i; - startSysex(); - FirmataSerial.write(command); - for(i=0; i - -byte pin; - -int analogValue; -int previousAnalogValues[TOTAL_ANALOG_PINS]; - -byte portStatus[TOTAL_PORTS]; // each bit: 1=pin is digital input, 0=other/ignore -byte previousPINs[TOTAL_PORTS]; - -/* timer variables */ -unsigned long currentMillis; // store the current value from millis() -unsigned long previousMillis; // for comparison with currentMillis -/* make sure that the FTDI buffer doesn't go over 60 bytes, otherwise you - get long, random delays. So only read analogs every 20ms or so */ -int samplingInterval = 19; // how often to run the main loop (in ms) - -void sendPort(byte portNumber, byte portValue) -{ - portValue = portValue & portStatus[portNumber]; - if(previousPINs[portNumber] != portValue) { - Firmata.sendDigitalPort(portNumber, portValue); - previousPINs[portNumber] = portValue; - } -} - -void setup() -{ - byte i, port, status; - - Firmata.setFirmwareVersion(0, 1); - - for(pin = 0; pin < TOTAL_PINS; pin++) { - if IS_PIN_DIGITAL(pin) pinMode(PIN_TO_DIGITAL(pin), INPUT); - } - - for (port=0; port samplingInterval) { - previousMillis += samplingInterval; - while(Firmata.available()) { - Firmata.processInput(); - } - for(pin = 0; pin < TOTAL_ANALOG_PINS; pin++) { - analogValue = analogRead(pin); - if(analogValue != previousAnalogValues[pin]) { - Firmata.sendAnalog(pin, analogValue); - previousAnalogValues[pin] = analogValue; - } - } - } -} - - diff --git a/build/linux/work/libraries/Firmata/examples/AnalogFirmata/AnalogFirmata.ino b/build/linux/work/libraries/Firmata/examples/AnalogFirmata/AnalogFirmata.ino deleted file mode 100644 index ff1d664b8..000000000 --- a/build/linux/work/libraries/Firmata/examples/AnalogFirmata/AnalogFirmata.ino +++ /dev/null @@ -1,94 +0,0 @@ -/* - * Firmata is a generic protocol for communicating with microcontrollers - * from software on a host computer. It is intended to work with - * any host computer software package. - * - * To download a host software package, please clink on the following link - * to open the download page in your default browser. - * - * http://firmata.org/wiki/Download - */ - -/* This firmware supports as many analog ports as possible, all analog inputs, - * four PWM outputs, and two with servo support. - * - * This example code is in the public domain. - */ -#include -#include - -/*============================================================================== - * GLOBAL VARIABLES - *============================================================================*/ - -/* servos */ -Servo servo9, servo10; // one instance per pin -/* analog inputs */ -int analogInputsToReport = 0; // bitwise array to store pin reporting -int analogPin = 0; // counter for reading analog pins -/* timer variables */ -unsigned long currentMillis; // store the current value from millis() -unsigned long previousMillis; // for comparison with currentMillis - - -/*============================================================================== - * FUNCTIONS - *============================================================================*/ - -void analogWriteCallback(byte pin, int value) -{ - switch(pin) { - case 9: servo9.write(value); break; - case 10: servo10.write(value); break; - case 3: - case 5: - case 6: - case 11: // PWM pins - analogWrite(pin, value); - break; - } -} -// ----------------------------------------------------------------------------- -// sets bits in a bit array (int) to toggle the reporting of the analogIns -void reportAnalogCallback(byte pin, int value) -{ - if(value == 0) { - analogInputsToReport = analogInputsToReport &~ (1 << pin); - } - else { // everything but 0 enables reporting of that pin - analogInputsToReport = analogInputsToReport | (1 << pin); - } - // TODO: save status to EEPROM here, if changed -} - -/*============================================================================== - * SETUP() - *============================================================================*/ -void setup() -{ - Firmata.setFirmwareVersion(0, 2); - Firmata.attach(ANALOG_MESSAGE, analogWriteCallback); - Firmata.attach(REPORT_ANALOG, reportAnalogCallback); - - servo9.attach(9); - servo10.attach(10); - Firmata.begin(57600); -} - -/*============================================================================== - * LOOP() - *============================================================================*/ -void loop() -{ - while(Firmata.available()) - Firmata.processInput(); - currentMillis = millis(); - if(currentMillis - previousMillis > 20) { - previousMillis += 20; // run this every 20ms - for(analogPin=0;analogPin - -byte analogPin; - -void stringCallback(char *myString) -{ - Firmata.sendString(myString); -} - - -void sysexCallback(byte command, byte argc, byte*argv) -{ - Firmata.sendSysex(command, argc, argv); -} - -void setup() -{ - Firmata.setFirmwareVersion(0, 1); - Firmata.attach(STRING_DATA, stringCallback); - Firmata.attach(START_SYSEX, sysexCallback); - Firmata.begin(57600); -} - -void loop() -{ - while(Firmata.available()) { - Firmata.processInput(); - } -} - - diff --git a/build/linux/work/libraries/Firmata/examples/I2CFirmata/I2CFirmata.ino b/build/linux/work/libraries/Firmata/examples/I2CFirmata/I2CFirmata.ino deleted file mode 100644 index 1da8963a0..000000000 --- a/build/linux/work/libraries/Firmata/examples/I2CFirmata/I2CFirmata.ino +++ /dev/null @@ -1,228 +0,0 @@ -/* - * Firmata is a generic protocol for communicating with microcontrollers - * from software on a host computer. It is intended to work with - * any host computer software package. - * - * To download a host software package, please clink on the following link - * to open the download page in your default browser. - * - * http://firmata.org/wiki/Download - */ - -/* - Copyright (C) 2009 Jeff Hoefs. All rights reserved. - Copyright (C) 2009 Shigeru Kobayashi. All rights reserved. - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - See file LICENSE.txt for further informations on licensing terms. - */ - -#include -#include - - -#define I2C_WRITE B00000000 -#define I2C_READ B00001000 -#define I2C_READ_CONTINUOUSLY B00010000 -#define I2C_STOP_READING B00011000 -#define I2C_READ_WRITE_MODE_MASK B00011000 - -#define MAX_QUERIES 8 - -unsigned long currentMillis; // store the current value from millis() -unsigned long previousMillis; // for comparison with currentMillis -unsigned int samplingInterval = 32; // default sampling interval is 33ms -unsigned int i2cReadDelayTime = 0; // default delay time between i2c read request and Wire.requestFrom() -unsigned int powerPinsEnabled = 0; // use as boolean to prevent enablePowerPins from being called more than once - -#define MINIMUM_SAMPLING_INTERVAL 10 - -#define REGISTER_NOT_SPECIFIED -1 - -struct i2c_device_info { - byte addr; - byte reg; - byte bytes; -}; - -i2c_device_info query[MAX_QUERIES]; - -byte i2cRxData[32]; -boolean readingContinuously = false; -byte queryIndex = 0; - -void readAndReportData(byte address, int theRegister, byte numBytes) -{ - if (theRegister != REGISTER_NOT_SPECIFIED) { - Wire.beginTransmission(address); - Wire.write((byte)theRegister); - Wire.endTransmission(); - delayMicroseconds(i2cReadDelayTime); // delay is necessary for some devices such as WiiNunchuck - } - else { - theRegister = 0; // fill the register with a dummy value - } - - Wire.requestFrom(address, numBytes); - - // check to be sure correct number of bytes were returned by slave - if(numBytes == Wire.available()) { - i2cRxData[0] = address; - i2cRxData[1] = theRegister; - for (int i = 0; i < numBytes; i++) { - i2cRxData[2 + i] = Wire.read(); - } - // send slave address, register and received bytes - Firmata.sendSysex(I2C_REPLY, numBytes + 2, i2cRxData); - } - else { - if(numBytes > Wire.available()) { - Firmata.sendString("I2C Read Error: Too many bytes received"); - } else { - Firmata.sendString("I2C Read Error: Too few bytes received"); - } - } - -} - -void sysexCallback(byte command, byte argc, byte *argv) -{ - byte mode; - byte slaveAddress; - byte slaveRegister; - byte data; - int delayTime; - - if (command == I2C_REQUEST) { - mode = argv[1] & I2C_READ_WRITE_MODE_MASK; - slaveAddress = argv[0]; - - switch(mode) { - case I2C_WRITE: - Wire.beginTransmission(slaveAddress); - for (byte i = 2; i < argc; i += 2) { - data = argv[i] + (argv[i + 1] << 7); - Wire.write(data); - } - Wire.endTransmission(); - delayMicroseconds(70); // TODO is this needed? - break; - case I2C_READ: - if (argc == 6) { - // a slave register is specified - slaveRegister = argv[2] + (argv[3] << 7); - data = argv[4] + (argv[5] << 7); // bytes to read - readAndReportData(slaveAddress, (int)slaveRegister, data); - } - else { - // a slave register is NOT specified - data = argv[2] + (argv[3] << 7); // bytes to read - readAndReportData(slaveAddress, (int)REGISTER_NOT_SPECIFIED, data); - } - break; - case I2C_READ_CONTINUOUSLY: - if ((queryIndex + 1) >= MAX_QUERIES) { - // too many queries, just ignore - Firmata.sendString("too many queries"); - break; - } - query[queryIndex].addr = slaveAddress; - query[queryIndex].reg = argv[2] + (argv[3] << 7); - query[queryIndex].bytes = argv[4] + (argv[5] << 7); - readingContinuously = true; - queryIndex++; - break; - case I2C_STOP_READING: - readingContinuously = false; - queryIndex = 0; - break; - default: - break; - } - } - else if (command == SAMPLING_INTERVAL) { - samplingInterval = argv[0] + (argv[1] << 7); - - if (samplingInterval < MINIMUM_SAMPLING_INTERVAL) { - samplingInterval = MINIMUM_SAMPLING_INTERVAL; - } - - samplingInterval -= 1; - Firmata.sendString("sampling interval"); - } - - else if (command == I2C_CONFIG) { - delayTime = (argv[4] + (argv[5] << 7)); // MSB - delayTime = (delayTime << 8) + (argv[2] + (argv[3] << 7)); // add LSB - - if((argv[0] + (argv[1] << 7)) > 0) { - enablePowerPins(PORTC3, PORTC2); - } - - if(delayTime > 0) { - i2cReadDelayTime = delayTime; - } - - if(argc > 6) { - // If you extend I2C_Config, handle your data here - } - - } -} - -void systemResetCallback() -{ - readingContinuously = false; - queryIndex = 0; -} - -/* reference: BlinkM_funcs.h by Tod E. Kurt, ThingM, http://thingm.com/ */ -// Enables Pins A2 and A3 to be used as GND and Power -// so that I2C devices can be plugged directly -// into Arduino header (pins A2 - A5) -static void enablePowerPins(byte pwrpin, byte gndpin) -{ - if(powerPinsEnabled == 0) { - DDRC |= _BV(pwrpin) | _BV(gndpin); - PORTC &=~ _BV(gndpin); - PORTC |= _BV(pwrpin); - powerPinsEnabled = 1; - Firmata.sendString("Power pins enabled"); - delay(100); - } -} - -void setup() -{ - Firmata.setFirmwareVersion(2, 0); - - Firmata.attach(START_SYSEX, sysexCallback); - Firmata.attach(SYSTEM_RESET, systemResetCallback); - - for (int i = 0; i < TOTAL_PINS; ++i) { - pinMode(i, OUTPUT); - } - - Firmata.begin(57600); - Wire.begin(); -} - -void loop() -{ - while (Firmata.available()) { - Firmata.processInput(); - } - - currentMillis = millis(); - if (currentMillis - previousMillis > samplingInterval) { - previousMillis += samplingInterval; - - for (byte i = 0; i < queryIndex; i++) { - readAndReportData(query[i].addr, query[i].reg, query[i].bytes); - } - } -} diff --git a/build/linux/work/libraries/Firmata/examples/OldStandardFirmata/LICENSE.txt b/build/linux/work/libraries/Firmata/examples/OldStandardFirmata/LICENSE.txt deleted file mode 100644 index 77cec6dd1..000000000 --- a/build/linux/work/libraries/Firmata/examples/OldStandardFirmata/LICENSE.txt +++ /dev/null @@ -1,458 +0,0 @@ - - GNU LESSER GENERAL PUBLIC LICENSE - Version 2.1, February 1999 - - Copyright (C) 1991, 1999 Free Software Foundation, Inc. - 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA - Everyone is permitted to copy and distribute verbatim copies - of this license document, but changing it is not allowed. - -[This is the first released version of the Lesser GPL. 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It is intended to work with - * any host computer software package. - * - * To download a host software package, please clink on the following link - * to open the download page in your default browser. - * - * http://firmata.org/wiki/Download - */ - -/* - Copyright (C) 2006-2008 Hans-Christoph Steiner. All rights reserved. - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - See file LICENSE.txt for further informations on licensing terms. - */ - -/* - * This is an old version of StandardFirmata (v2.0). It is kept here because - * its the last version that works on an ATMEGA8 chip. Also, it can be used - * for host software that has not been updated to a newer version of the - * protocol. It also uses the old baud rate of 115200 rather than 57600. - */ - -#include -#include - -/*============================================================================== - * GLOBAL VARIABLES - *============================================================================*/ - -/* analog inputs */ -int analogInputsToReport = 0; // bitwise array to store pin reporting -int analogPin = 0; // counter for reading analog pins - -/* digital pins */ -byte reportPINs[TOTAL_PORTS]; // PIN == input port -byte previousPINs[TOTAL_PORTS]; // PIN == input port -byte pinStatus[TOTAL_PINS]; // store pin status, default OUTPUT -byte portStatus[TOTAL_PORTS]; - -/* timer variables */ -unsigned long currentMillis; // store the current value from millis() -unsigned long previousMillis; // for comparison with currentMillis - - -/*============================================================================== - * FUNCTIONS - *============================================================================*/ - -void outputPort(byte portNumber, byte portValue) -{ - portValue = portValue &~ portStatus[portNumber]; - if(previousPINs[portNumber] != portValue) { - Firmata.sendDigitalPort(portNumber, portValue); - previousPINs[portNumber] = portValue; - Firmata.sendDigitalPort(portNumber, portValue); - } -} - -/* ----------------------------------------------------------------------------- - * check all the active digital inputs for change of state, then add any events - * to the Serial output queue using Serial.print() */ -void checkDigitalInputs(void) -{ - byte i, tmp; - for(i=0; i < TOTAL_PORTS; i++) { - if(reportPINs[i]) { - switch(i) { - case 0: outputPort(0, PIND &~ B00000011); break; // ignore Rx/Tx 0/1 - case 1: outputPort(1, PINB); break; - case 2: outputPort(2, PINC); break; - } - } - } -} - -// ----------------------------------------------------------------------------- -/* sets the pin mode to the correct state and sets the relevant bits in the - * two bit-arrays that track Digital I/O and PWM status - */ -void setPinModeCallback(byte pin, int mode) { - byte port = 0; - byte offset = 0; - - if (pin < 8) { - port = 0; - offset = 0; - } else if (pin < 14) { - port = 1; - offset = 8; - } else if (pin < 22) { - port = 2; - offset = 14; - } - - if(pin > 1) { // ignore RxTx (pins 0 and 1) - pinStatus[pin] = mode; - switch(mode) { - case INPUT: - pinMode(pin, INPUT); - portStatus[port] = portStatus[port] &~ (1 << (pin - offset)); - break; - case OUTPUT: - digitalWrite(pin, LOW); // disable PWM - case PWM: - pinMode(pin, OUTPUT); - portStatus[port] = portStatus[port] | (1 << (pin - offset)); - break; - //case ANALOG: // TODO figure this out - default: - Firmata.sendString(""); - } - // TODO: save status to EEPROM here, if changed - } -} - -void analogWriteCallback(byte pin, int value) -{ - setPinModeCallback(pin,PWM); - analogWrite(pin, value); -} - -void digitalWriteCallback(byte port, int value) -{ - switch(port) { - case 0: // pins 2-7 (don't change Rx/Tx, pins 0 and 1) - // 0xFF03 == B1111111100000011 0x03 == B00000011 - PORTD = (value &~ 0xFF03) | (PORTD & 0x03); - break; - case 1: // pins 8-13 (14,15 are disabled for the crystal) - PORTB = (byte)value; - break; - case 2: // analog pins used as digital - PORTC = (byte)value; - break; - } -} - -// ----------------------------------------------------------------------------- -/* sets bits in a bit array (int) to toggle the reporting of the analogIns - */ -//void FirmataClass::setAnalogPinReporting(byte pin, byte state) { -//} -void reportAnalogCallback(byte pin, int value) -{ - if(value == 0) { - analogInputsToReport = analogInputsToReport &~ (1 << pin); - } - else { // everything but 0 enables reporting of that pin - analogInputsToReport = analogInputsToReport | (1 << pin); - } - // TODO: save status to EEPROM here, if changed -} - -void reportDigitalCallback(byte port, int value) -{ - reportPINs[port] = (byte)value; - if(port == 2) // turn off analog reporting when used as digital - analogInputsToReport = 0; -} - -/*============================================================================== - * SETUP() - *============================================================================*/ -void setup() -{ - byte i; - - Firmata.setFirmwareVersion(2, 0); - - Firmata.attach(ANALOG_MESSAGE, analogWriteCallback); - Firmata.attach(DIGITAL_MESSAGE, digitalWriteCallback); - Firmata.attach(REPORT_ANALOG, reportAnalogCallback); - Firmata.attach(REPORT_DIGITAL, reportDigitalCallback); - Firmata.attach(SET_PIN_MODE, setPinModeCallback); - - portStatus[0] = B00000011; // ignore Tx/RX pins - portStatus[1] = B11000000; // ignore 14/15 pins - portStatus[2] = B00000000; - -// for(i=0; i 20) { - previousMillis += 20; // run this every 20ms - /* SERIALREAD - Serial.read() uses a 128 byte circular buffer, so handle - * all serialReads at once, i.e. empty the buffer */ - while(Firmata.available()) - Firmata.processInput(); - /* SEND FTDI WRITE BUFFER - make sure that the FTDI buffer doesn't go over - * 60 bytes. use a timer to sending an event character every 4 ms to - * trigger the buffer to dump. */ - - /* ANALOGREAD - right after the event character, do all of the - * analogReads(). These only need to be done every 4ms. */ - for(analogPin=0;analogPin -#include - -Servo servos[MAX_SERVOS]; - -void analogWriteCallback(byte pin, int value) -{ - if (IS_PIN_SERVO(pin)) { - servos[PIN_TO_SERVO(pin)].write(value); - } -} - -void setup() -{ - byte pin; - - Firmata.setFirmwareVersion(0, 2); - Firmata.attach(ANALOG_MESSAGE, analogWriteCallback); - - for (pin=0; pin < TOTAL_PINS; pin++) { - if (IS_PIN_SERVO(pin)) { - servos[PIN_TO_SERVO(pin)].attach(PIN_TO_DIGITAL(pin)); - } - } - - Firmata.begin(57600); -} - -void loop() -{ - while(Firmata.available()) - Firmata.processInput(); -} - diff --git a/build/linux/work/libraries/Firmata/examples/SimpleAnalogFirmata/SimpleAnalogFirmata.ino b/build/linux/work/libraries/Firmata/examples/SimpleAnalogFirmata/SimpleAnalogFirmata.ino deleted file mode 100644 index 44ea91eea..000000000 --- a/build/linux/work/libraries/Firmata/examples/SimpleAnalogFirmata/SimpleAnalogFirmata.ino +++ /dev/null @@ -1,46 +0,0 @@ -/* - * Firmata is a generic protocol for communicating with microcontrollers - * from software on a host computer. It is intended to work with - * any host computer software package. - * - * To download a host software package, please clink on the following link - * to open the download page in your default browser. - * - * http://firmata.org/wiki/Download - */ - -/* Supports as many analog inputs and analog PWM outputs as possible. - * - * This example code is in the public domain. - */ -#include - -byte analogPin = 0; - -void analogWriteCallback(byte pin, int value) -{ - if (IS_PIN_PWM(pin)) { - pinMode(PIN_TO_DIGITAL(pin), OUTPUT); - analogWrite(PIN_TO_PWM(pin), value); - } -} - -void setup() -{ - Firmata.setFirmwareVersion(0, 1); - Firmata.attach(ANALOG_MESSAGE, analogWriteCallback); - Firmata.begin(57600); -} - -void loop() -{ - while(Firmata.available()) { - Firmata.processInput(); - } - // do one analogRead per loop, so if PC is sending a lot of - // analog write messages, we will only delay 1 analogRead - Firmata.sendAnalog(analogPin, analogRead(analogPin)); - analogPin = analogPin + 1; - if (analogPin >= TOTAL_ANALOG_PINS) analogPin = 0; -} - diff --git a/build/linux/work/libraries/Firmata/examples/SimpleDigitalFirmata/SimpleDigitalFirmata.ino b/build/linux/work/libraries/Firmata/examples/SimpleDigitalFirmata/SimpleDigitalFirmata.ino deleted file mode 100644 index a0d764f72..000000000 --- a/build/linux/work/libraries/Firmata/examples/SimpleDigitalFirmata/SimpleDigitalFirmata.ino +++ /dev/null @@ -1,72 +0,0 @@ -/* - * Firmata is a generic protocol for communicating with microcontrollers - * from software on a host computer. It is intended to work with - * any host computer software package. - * - * To download a host software package, please clink on the following link - * to open the download page in your default browser. - * - * http://firmata.org/wiki/Download - */ - -/* Supports as many digital inputs and outputs as possible. - * - * This example code is in the public domain. - */ -#include - -byte previousPIN[TOTAL_PORTS]; // PIN means PORT for input -byte previousPORT[TOTAL_PORTS]; - -void outputPort(byte portNumber, byte portValue) -{ - // only send the data when it changes, otherwise you get too many messages! - if (previousPIN[portNumber] != portValue) { - Firmata.sendDigitalPort(portNumber, portValue); - previousPIN[portNumber] = portValue; - } -} - -void setPinModeCallback(byte pin, int mode) { - if (IS_PIN_DIGITAL(pin)) { - pinMode(PIN_TO_DIGITAL(pin), mode); - } -} - -void digitalWriteCallback(byte port, int value) -{ - byte i; - byte currentPinValue, previousPinValue; - - if (port < TOTAL_PORTS && value != previousPORT[port]) { - for(i=0; i<8; i++) { - currentPinValue = (byte) value & (1 << i); - previousPinValue = previousPORT[port] & (1 << i); - if(currentPinValue != previousPinValue) { - digitalWrite(i + (port*8), currentPinValue); - } - } - previousPORT[port] = value; - } -} - -void setup() -{ - Firmata.setFirmwareVersion(0, 1); - Firmata.attach(DIGITAL_MESSAGE, digitalWriteCallback); - Firmata.attach(SET_PIN_MODE, setPinModeCallback); - Firmata.begin(57600); -} - -void loop() -{ - byte i; - - for (i=0; i -#include -#include - -// move the following defines to Firmata.h? -#define I2C_WRITE B00000000 -#define I2C_READ B00001000 -#define I2C_READ_CONTINUOUSLY B00010000 -#define I2C_STOP_READING B00011000 -#define I2C_READ_WRITE_MODE_MASK B00011000 -#define I2C_10BIT_ADDRESS_MODE_MASK B00100000 - -#define MAX_QUERIES 8 -#define MINIMUM_SAMPLING_INTERVAL 10 - -#define REGISTER_NOT_SPECIFIED -1 - -/*============================================================================== - * GLOBAL VARIABLES - *============================================================================*/ - -/* analog inputs */ -int analogInputsToReport = 0; // bitwise array to store pin reporting - -/* digital input ports */ -byte reportPINs[TOTAL_PORTS]; // 1 = report this port, 0 = silence -byte previousPINs[TOTAL_PORTS]; // previous 8 bits sent - -/* pins configuration */ -byte pinConfig[TOTAL_PINS]; // configuration of every pin -byte portConfigInputs[TOTAL_PORTS]; // each bit: 1 = pin in INPUT, 0 = anything else -int pinState[TOTAL_PINS]; // any value that has been written - -/* timer variables */ -unsigned long currentMillis; // store the current value from millis() -unsigned long previousMillis; // for comparison with currentMillis -int samplingInterval = 19; // how often to run the main loop (in ms) - -/* i2c data */ -struct i2c_device_info { - byte addr; - byte reg; - byte bytes; -}; - -/* for i2c read continuous more */ -i2c_device_info query[MAX_QUERIES]; - -byte i2cRxData[32]; -boolean isI2CEnabled = false; -signed char queryIndex = -1; -unsigned int i2cReadDelayTime = 0; // default delay time between i2c read request and Wire.requestFrom() - -Servo servos[MAX_SERVOS]; -/*============================================================================== - * FUNCTIONS - *============================================================================*/ - -void readAndReportData(byte address, int theRegister, byte numBytes) { - // allow I2C requests that don't require a register read - // for example, some devices using an interrupt pin to signify new data available - // do not always require the register read so upon interrupt you call Wire.requestFrom() - if (theRegister != REGISTER_NOT_SPECIFIED) { - Wire.beginTransmission(address); - #if ARDUINO >= 100 - Wire.write((byte)theRegister); - #else - Wire.send((byte)theRegister); - #endif - Wire.endTransmission(); - delayMicroseconds(i2cReadDelayTime); // delay is necessary for some devices such as WiiNunchuck - } else { - theRegister = 0; // fill the register with a dummy value - } - - Wire.requestFrom(address, numBytes); // all bytes are returned in requestFrom - - // check to be sure correct number of bytes were returned by slave - if(numBytes == Wire.available()) { - i2cRxData[0] = address; - i2cRxData[1] = theRegister; - for (int i = 0; i < numBytes; i++) { - #if ARDUINO >= 100 - i2cRxData[2 + i] = Wire.read(); - #else - i2cRxData[2 + i] = Wire.receive(); - #endif - } - } - else { - if(numBytes > Wire.available()) { - Firmata.sendString("I2C Read Error: Too many bytes received"); - } else { - Firmata.sendString("I2C Read Error: Too few bytes received"); - } - } - - // send slave address, register and received bytes - Firmata.sendSysex(SYSEX_I2C_REPLY, numBytes + 2, i2cRxData); -} - -void outputPort(byte portNumber, byte portValue, byte forceSend) -{ - // pins not configured as INPUT are cleared to zeros - portValue = portValue & portConfigInputs[portNumber]; - // only send if the value is different than previously sent - if(forceSend || previousPINs[portNumber] != portValue) { - Firmata.sendDigitalPort(portNumber, portValue); - previousPINs[portNumber] = portValue; - } -} - -/* ----------------------------------------------------------------------------- - * check all the active digital inputs for change of state, then add any events - * to the Serial output queue using Serial.print() */ -void checkDigitalInputs(void) -{ - /* Using non-looping code allows constants to be given to readPort(). - * The compiler will apply substantial optimizations if the inputs - * to readPort() are compile-time constants. */ - if (TOTAL_PORTS > 0 && reportPINs[0]) outputPort(0, readPort(0, portConfigInputs[0]), false); - if (TOTAL_PORTS > 1 && reportPINs[1]) outputPort(1, readPort(1, portConfigInputs[1]), false); - if (TOTAL_PORTS > 2 && reportPINs[2]) outputPort(2, readPort(2, portConfigInputs[2]), false); - if (TOTAL_PORTS > 3 && reportPINs[3]) outputPort(3, readPort(3, portConfigInputs[3]), false); - if (TOTAL_PORTS > 4 && reportPINs[4]) outputPort(4, readPort(4, portConfigInputs[4]), false); - if (TOTAL_PORTS > 5 && reportPINs[5]) outputPort(5, readPort(5, portConfigInputs[5]), false); - if (TOTAL_PORTS > 6 && reportPINs[6]) outputPort(6, readPort(6, portConfigInputs[6]), false); - if (TOTAL_PORTS > 7 && reportPINs[7]) outputPort(7, readPort(7, portConfigInputs[7]), false); - if (TOTAL_PORTS > 8 && reportPINs[8]) outputPort(8, readPort(8, portConfigInputs[8]), false); - if (TOTAL_PORTS > 9 && reportPINs[9]) outputPort(9, readPort(9, portConfigInputs[9]), false); - if (TOTAL_PORTS > 10 && reportPINs[10]) outputPort(10, readPort(10, portConfigInputs[10]), false); - if (TOTAL_PORTS > 11 && reportPINs[11]) outputPort(11, readPort(11, portConfigInputs[11]), false); - if (TOTAL_PORTS > 12 && reportPINs[12]) outputPort(12, readPort(12, portConfigInputs[12]), false); - if (TOTAL_PORTS > 13 && reportPINs[13]) outputPort(13, readPort(13, portConfigInputs[13]), false); - if (TOTAL_PORTS > 14 && reportPINs[14]) outputPort(14, readPort(14, portConfigInputs[14]), false); - if (TOTAL_PORTS > 15 && reportPINs[15]) outputPort(15, readPort(15, portConfigInputs[15]), false); -} - -// ----------------------------------------------------------------------------- -/* sets the pin mode to the correct state and sets the relevant bits in the - * two bit-arrays that track Digital I/O and PWM status - */ -void setPinModeCallback(byte pin, int mode) -{ - if (pinConfig[pin] == I2C && isI2CEnabled && mode != I2C) { - // disable i2c so pins can be used for other functions - // the following if statements should reconfigure the pins properly - disableI2CPins(); - } - if (IS_PIN_SERVO(pin) && mode != SERVO && servos[PIN_TO_SERVO(pin)].attached()) { - servos[PIN_TO_SERVO(pin)].detach(); - } - if (IS_PIN_ANALOG(pin)) { - reportAnalogCallback(PIN_TO_ANALOG(pin), mode == ANALOG ? 1 : 0); // turn on/off reporting - } - if (IS_PIN_DIGITAL(pin)) { - if (mode == INPUT) { - portConfigInputs[pin/8] |= (1 << (pin & 7)); - } else { - portConfigInputs[pin/8] &= ~(1 << (pin & 7)); - } - } - pinState[pin] = 0; - switch(mode) { - case ANALOG: - if (IS_PIN_ANALOG(pin)) { - if (IS_PIN_DIGITAL(pin)) { - pinMode(PIN_TO_DIGITAL(pin), INPUT); // disable output driver - digitalWrite(PIN_TO_DIGITAL(pin), LOW); // disable internal pull-ups - } - pinConfig[pin] = ANALOG; - } - break; - case INPUT: - if (IS_PIN_DIGITAL(pin)) { - pinMode(PIN_TO_DIGITAL(pin), INPUT); // disable output driver - digitalWrite(PIN_TO_DIGITAL(pin), LOW); // disable internal pull-ups - pinConfig[pin] = INPUT; - } - break; - case OUTPUT: - if (IS_PIN_DIGITAL(pin)) { - digitalWrite(PIN_TO_DIGITAL(pin), LOW); // disable PWM - pinMode(PIN_TO_DIGITAL(pin), OUTPUT); - pinConfig[pin] = OUTPUT; - } - break; - case PWM: - if (IS_PIN_PWM(pin)) { - pinMode(PIN_TO_PWM(pin), OUTPUT); - analogWrite(PIN_TO_PWM(pin), 0); - pinConfig[pin] = PWM; - } - break; - case SERVO: - if (IS_PIN_SERVO(pin)) { - pinConfig[pin] = SERVO; - if (!servos[PIN_TO_SERVO(pin)].attached()) { - servos[PIN_TO_SERVO(pin)].attach(PIN_TO_DIGITAL(pin)); - } - } - break; - case I2C: - if (IS_PIN_I2C(pin)) { - // mark the pin as i2c - // the user must call I2C_CONFIG to enable I2C for a device - pinConfig[pin] = I2C; - } - break; - default: - Firmata.sendString("Unknown pin mode"); // TODO: put error msgs in EEPROM - } - // TODO: save status to EEPROM here, if changed -} - -void analogWriteCallback(byte pin, int value) -{ - if (pin < TOTAL_PINS) { - switch(pinConfig[pin]) { - case SERVO: - if (IS_PIN_SERVO(pin)) - servos[PIN_TO_SERVO(pin)].write(value); - pinState[pin] = value; - break; - case PWM: - if (IS_PIN_PWM(pin)) - analogWrite(PIN_TO_PWM(pin), value); - pinState[pin] = value; - break; - } - } -} - -void digitalWriteCallback(byte port, int value) -{ - byte pin, lastPin, mask=1, pinWriteMask=0; - - if (port < TOTAL_PORTS) { - // create a mask of the pins on this port that are writable. - lastPin = port*8+8; - if (lastPin > TOTAL_PINS) lastPin = TOTAL_PINS; - for (pin=port*8; pin < lastPin; pin++) { - // do not disturb non-digital pins (eg, Rx & Tx) - if (IS_PIN_DIGITAL(pin)) { - // only write to OUTPUT and INPUT (enables pullup) - // do not touch pins in PWM, ANALOG, SERVO or other modes - if (pinConfig[pin] == OUTPUT || pinConfig[pin] == INPUT) { - pinWriteMask |= mask; - pinState[pin] = ((byte)value & mask) ? 1 : 0; - } - } - mask = mask << 1; - } - writePort(port, (byte)value, pinWriteMask); - } -} - - -// ----------------------------------------------------------------------------- -/* sets bits in a bit array (int) to toggle the reporting of the analogIns - */ -//void FirmataClass::setAnalogPinReporting(byte pin, byte state) { -//} -void reportAnalogCallback(byte analogPin, int value) -{ - if (analogPin < TOTAL_ANALOG_PINS) { - if(value == 0) { - analogInputsToReport = analogInputsToReport &~ (1 << analogPin); - } else { - analogInputsToReport = analogInputsToReport | (1 << analogPin); - } - } - // TODO: save status to EEPROM here, if changed -} - -void reportDigitalCallback(byte port, int value) -{ - if (port < TOTAL_PORTS) { - reportPINs[port] = (byte)value; - } - // do not disable analog reporting on these 8 pins, to allow some - // pins used for digital, others analog. Instead, allow both types - // of reporting to be enabled, but check if the pin is configured - // as analog when sampling the analog inputs. Likewise, while - // scanning digital pins, portConfigInputs will mask off values from any - // pins configured as analog -} - -/*============================================================================== - * SYSEX-BASED commands - *============================================================================*/ - -void sysexCallback(byte command, byte argc, byte *argv) -{ - byte mode; - byte slaveAddress; - byte slaveRegister; - byte data; - unsigned int delayTime; - - switch(command) { - case I2C_REQUEST: - mode = argv[1] & I2C_READ_WRITE_MODE_MASK; - if (argv[1] & I2C_10BIT_ADDRESS_MODE_MASK) { - Firmata.sendString("10-bit addressing mode is not yet supported"); - return; - } - else { - slaveAddress = argv[0]; - } - - switch(mode) { - case I2C_WRITE: - Wire.beginTransmission(slaveAddress); - for (byte i = 2; i < argc; i += 2) { - data = argv[i] + (argv[i + 1] << 7); - #if ARDUINO >= 100 - Wire.write(data); - #else - Wire.send(data); - #endif - } - Wire.endTransmission(); - delayMicroseconds(70); - break; - case I2C_READ: - if (argc == 6) { - // a slave register is specified - slaveRegister = argv[2] + (argv[3] << 7); - data = argv[4] + (argv[5] << 7); // bytes to read - readAndReportData(slaveAddress, (int)slaveRegister, data); - } - else { - // a slave register is NOT specified - data = argv[2] + (argv[3] << 7); // bytes to read - readAndReportData(slaveAddress, (int)REGISTER_NOT_SPECIFIED, data); - } - break; - case I2C_READ_CONTINUOUSLY: - if ((queryIndex + 1) >= MAX_QUERIES) { - // too many queries, just ignore - Firmata.sendString("too many queries"); - break; - } - queryIndex++; - query[queryIndex].addr = slaveAddress; - query[queryIndex].reg = argv[2] + (argv[3] << 7); - query[queryIndex].bytes = argv[4] + (argv[5] << 7); - break; - case I2C_STOP_READING: - byte queryIndexToSkip; - // if read continuous mode is enabled for only 1 i2c device, disable - // read continuous reporting for that device - if (queryIndex <= 0) { - queryIndex = -1; - } else { - // if read continuous mode is enabled for multiple devices, - // determine which device to stop reading and remove it's data from - // the array, shifiting other array data to fill the space - for (byte i = 0; i < queryIndex + 1; i++) { - if (query[i].addr = slaveAddress) { - queryIndexToSkip = i; - break; - } - } - - for (byte i = queryIndexToSkip; i 0) { - i2cReadDelayTime = delayTime; - } - - if (!isI2CEnabled) { - enableI2CPins(); - } - - break; - case SERVO_CONFIG: - if(argc > 4) { - // these vars are here for clarity, they'll optimized away by the compiler - byte pin = argv[0]; - int minPulse = argv[1] + (argv[2] << 7); - int maxPulse = argv[3] + (argv[4] << 7); - - if (IS_PIN_SERVO(pin)) { - if (servos[PIN_TO_SERVO(pin)].attached()) - servos[PIN_TO_SERVO(pin)].detach(); - servos[PIN_TO_SERVO(pin)].attach(PIN_TO_DIGITAL(pin), minPulse, maxPulse); - setPinModeCallback(pin, SERVO); - } - } - break; - case SAMPLING_INTERVAL: - if (argc > 1) { - samplingInterval = argv[0] + (argv[1] << 7); - if (samplingInterval < MINIMUM_SAMPLING_INTERVAL) { - samplingInterval = MINIMUM_SAMPLING_INTERVAL; - } - } else { - //Firmata.sendString("Not enough data"); - } - break; - case EXTENDED_ANALOG: - if (argc > 1) { - int val = argv[1]; - if (argc > 2) val |= (argv[2] << 7); - if (argc > 3) val |= (argv[3] << 14); - analogWriteCallback(argv[0], val); - } - break; - case CAPABILITY_QUERY: - Serial.write(START_SYSEX); - Serial.write(CAPABILITY_RESPONSE); - for (byte pin=0; pin < TOTAL_PINS; pin++) { - if (IS_PIN_DIGITAL(pin)) { - Serial.write((byte)INPUT); - Serial.write(1); - Serial.write((byte)OUTPUT); - Serial.write(1); - } - if (IS_PIN_ANALOG(pin)) { - Serial.write(ANALOG); - Serial.write(10); - } - if (IS_PIN_PWM(pin)) { - Serial.write(PWM); - Serial.write(8); - } - if (IS_PIN_SERVO(pin)) { - Serial.write(SERVO); - Serial.write(14); - } - if (IS_PIN_I2C(pin)) { - Serial.write(I2C); - Serial.write(1); // to do: determine appropriate value - } - Serial.write(127); - } - Serial.write(END_SYSEX); - break; - case PIN_STATE_QUERY: - if (argc > 0) { - byte pin=argv[0]; - Serial.write(START_SYSEX); - Serial.write(PIN_STATE_RESPONSE); - Serial.write(pin); - if (pin < TOTAL_PINS) { - Serial.write((byte)pinConfig[pin]); - Serial.write((byte)pinState[pin] & 0x7F); - if (pinState[pin] & 0xFF80) Serial.write((byte)(pinState[pin] >> 7) & 0x7F); - if (pinState[pin] & 0xC000) Serial.write((byte)(pinState[pin] >> 14) & 0x7F); - } - Serial.write(END_SYSEX); - } - break; - case ANALOG_MAPPING_QUERY: - Serial.write(START_SYSEX); - Serial.write(ANALOG_MAPPING_RESPONSE); - for (byte pin=0; pin < TOTAL_PINS; pin++) { - Serial.write(IS_PIN_ANALOG(pin) ? PIN_TO_ANALOG(pin) : 127); - } - Serial.write(END_SYSEX); - break; - } -} - -void enableI2CPins() -{ - byte i; - // is there a faster way to do this? would probaby require importing - // Arduino.h to get SCL and SDA pins - for (i=0; i < TOTAL_PINS; i++) { - if(IS_PIN_I2C(i)) { - // mark pins as i2c so they are ignore in non i2c data requests - setPinModeCallback(i, I2C); - } - } - - isI2CEnabled = true; - - // is there enough time before the first I2C request to call this here? - Wire.begin(); -} - -/* disable the i2c pins so they can be used for other functions */ -void disableI2CPins() { - isI2CEnabled = false; - // disable read continuous mode for all devices - queryIndex = -1; - // uncomment the following if or when the end() method is added to Wire library - // Wire.end(); -} - -/*============================================================================== - * SETUP() - *============================================================================*/ - -void systemResetCallback() -{ - // initialize a defalt state - // TODO: option to load config from EEPROM instead of default - if (isI2CEnabled) { - disableI2CPins(); - } - for (byte i=0; i < TOTAL_PORTS; i++) { - reportPINs[i] = false; // by default, reporting off - portConfigInputs[i] = 0; // until activated - previousPINs[i] = 0; - } - // pins with analog capability default to analog input - // otherwise, pins default to digital output - for (byte i=0; i < TOTAL_PINS; i++) { - if (IS_PIN_ANALOG(i)) { - // turns off pullup, configures everything - setPinModeCallback(i, ANALOG); - } else { - // sets the output to 0, configures portConfigInputs - setPinModeCallback(i, OUTPUT); - } - } - // by default, do not report any analog inputs - analogInputsToReport = 0; - - /* send digital inputs to set the initial state on the host computer, - * since once in the loop(), this firmware will only send on change */ - /* - TODO: this can never execute, since no pins default to digital input - but it will be needed when/if we support EEPROM stored config - for (byte i=0; i < TOTAL_PORTS; i++) { - outputPort(i, readPort(i, portConfigInputs[i]), true); - } - */ -} - -void setup() -{ - Firmata.setFirmwareVersion(FIRMATA_MAJOR_VERSION, FIRMATA_MINOR_VERSION); - - Firmata.attach(ANALOG_MESSAGE, analogWriteCallback); - Firmata.attach(DIGITAL_MESSAGE, digitalWriteCallback); - Firmata.attach(REPORT_ANALOG, reportAnalogCallback); - Firmata.attach(REPORT_DIGITAL, reportDigitalCallback); - Firmata.attach(SET_PIN_MODE, setPinModeCallback); - Firmata.attach(START_SYSEX, sysexCallback); - Firmata.attach(SYSTEM_RESET, systemResetCallback); - - Firmata.begin(57600); - systemResetCallback(); // reset to default config -} - -/*============================================================================== - * LOOP() - *============================================================================*/ -void loop() -{ - byte pin, analogPin; - - /* DIGITALREAD - as fast as possible, check for changes and output them to the - * FTDI buffer using Serial.print() */ - checkDigitalInputs(); - - /* SERIALREAD - processing incoming messagse as soon as possible, while still - * checking digital inputs. */ - while(Firmata.available()) - Firmata.processInput(); - - /* SEND FTDI WRITE BUFFER - make sure that the FTDI buffer doesn't go over - * 60 bytes. use a timer to sending an event character every 4 ms to - * trigger the buffer to dump. */ - - currentMillis = millis(); - if (currentMillis - previousMillis > samplingInterval) { - previousMillis += samplingInterval; - /* ANALOGREAD - do all analogReads() at the configured sampling interval */ - for(pin=0; pin -1) { - for (byte i = 0; i < queryIndex + 1; i++) { - readAndReportData(query[i].addr, query[i].reg, query[i].bytes); - } - } - } -} diff --git a/build/linux/work/libraries/Firmata/keywords.txt b/build/linux/work/libraries/Firmata/keywords.txt deleted file mode 100644 index 52e0a9c74..000000000 --- a/build/linux/work/libraries/Firmata/keywords.txt +++ /dev/null @@ -1,62 +0,0 @@ -####################################### -# Syntax Coloring Map For Firmata -####################################### - -####################################### -# Datatypes (KEYWORD1) -####################################### - -Firmata KEYWORD1 -callbackFunction KEYWORD1 -systemResetCallbackFunction KEYWORD1 -stringCallbackFunction KEYWORD1 -sysexCallbackFunction KEYWORD1 - -####################################### -# Methods and Functions (KEYWORD2) -####################################### - -begin KEYWORD2 -begin KEYWORD2 -printVersion KEYWORD2 -blinkVersion KEYWORD2 -printFirmwareVersion KEYWORD2 -setFirmwareVersion KEYWORD2 -setFirmwareNameAndVersion KEYWORD2 -available KEYWORD2 -processInput KEYWORD2 -sendAnalog KEYWORD2 -sendDigital KEYWORD2 -sendDigitalPortPair KEYWORD2 -sendDigitalPort KEYWORD2 -sendString KEYWORD2 -sendString KEYWORD2 -sendSysex KEYWORD2 -attach KEYWORD2 -detach KEYWORD2 -flush KEYWORD2 - - -####################################### -# Constants (LITERAL1) -####################################### - -MAX_DATA_BYTES LITERAL1 - -DIGITAL_MESSAGE LITERAL1 -ANALOG_MESSAGE LITERAL1 -REPORT_ANALOG LITERAL1 -REPORT_DIGITAL LITERAL1 -REPORT_VERSION LITERAL1 -SET_PIN_MODE LITERAL1 -SYSTEM_RESET LITERAL1 - -START_SYSEX LITERAL1 -END_SYSEX LITERAL1 - -PWM LITERAL1 - -TOTAL_ANALOG_PINS LITERAL1 -TOTAL_DIGITAL_PINS LITERAL1 -TOTAL_PORTS LITERAL1 -ANALOG_PORT LITERAL1 diff --git a/build/linux/work/libraries/LiquidCrystal/LiquidCrystal.cpp b/build/linux/work/libraries/LiquidCrystal/LiquidCrystal.cpp deleted file mode 100644 index 0653487d7..000000000 --- a/build/linux/work/libraries/LiquidCrystal/LiquidCrystal.cpp +++ /dev/null @@ -1,310 +0,0 @@ -#include "LiquidCrystal.h" - -#include -#include -#include -#include "Arduino.h" - -// When the display powers up, it is configured as follows: -// -// 1. Display clear -// 2. Function set: -// DL = 1; 8-bit interface data -// N = 0; 1-line display -// F = 0; 5x8 dot character font -// 3. Display on/off control: -// D = 0; Display off -// C = 0; Cursor off -// B = 0; Blinking off -// 4. Entry mode set: -// I/D = 1; Increment by 1 -// S = 0; No shift -// -// Note, however, that resetting the Arduino doesn't reset the LCD, so we -// can't assume that its in that state when a sketch starts (and the -// LiquidCrystal constructor is called). - -LiquidCrystal::LiquidCrystal(uint8_t rs, uint8_t rw, uint8_t enable, - uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, - uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7) -{ - init(0, rs, rw, enable, d0, d1, d2, d3, d4, d5, d6, d7); -} - -LiquidCrystal::LiquidCrystal(uint8_t rs, uint8_t enable, - uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, - uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7) -{ - init(0, rs, 255, enable, d0, d1, d2, d3, d4, d5, d6, d7); -} - -LiquidCrystal::LiquidCrystal(uint8_t rs, uint8_t rw, uint8_t enable, - uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3) -{ - init(1, rs, rw, enable, d0, d1, d2, d3, 0, 0, 0, 0); -} - -LiquidCrystal::LiquidCrystal(uint8_t rs, uint8_t enable, - uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3) -{ - init(1, rs, 255, enable, d0, d1, d2, d3, 0, 0, 0, 0); -} - -void LiquidCrystal::init(uint8_t fourbitmode, uint8_t rs, uint8_t rw, uint8_t enable, - uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, - uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7) -{ - _rs_pin = rs; - _rw_pin = rw; - _enable_pin = enable; - - _data_pins[0] = d0; - _data_pins[1] = d1; - _data_pins[2] = d2; - _data_pins[3] = d3; - _data_pins[4] = d4; - _data_pins[5] = d5; - _data_pins[6] = d6; - _data_pins[7] = d7; - - pinMode(_rs_pin, OUTPUT); - // we can save 1 pin by not using RW. Indicate by passing 255 instead of pin# - if (_rw_pin != 255) { - pinMode(_rw_pin, OUTPUT); - } - pinMode(_enable_pin, OUTPUT); - - if (fourbitmode) - _displayfunction = LCD_4BITMODE | LCD_1LINE | LCD_5x8DOTS; - else - _displayfunction = LCD_8BITMODE | LCD_1LINE | LCD_5x8DOTS; - - begin(16, 1); -} - -void LiquidCrystal::begin(uint8_t cols, uint8_t lines, uint8_t dotsize) { - if (lines > 1) { - _displayfunction |= LCD_2LINE; - } - _numlines = lines; - _currline = 0; - - // for some 1 line displays you can select a 10 pixel high font - if ((dotsize != 0) && (lines == 1)) { - _displayfunction |= LCD_5x10DOTS; - } - - // SEE PAGE 45/46 FOR INITIALIZATION SPECIFICATION! - // according to datasheet, we need at least 40ms after power rises above 2.7V - // before sending commands. Arduino can turn on way befer 4.5V so we'll wait 50 - delayMicroseconds(50000); - // Now we pull both RS and R/W low to begin commands - digitalWrite(_rs_pin, LOW); - digitalWrite(_enable_pin, LOW); - if (_rw_pin != 255) { - digitalWrite(_rw_pin, LOW); - } - - //put the LCD into 4 bit or 8 bit mode - if (! (_displayfunction & LCD_8BITMODE)) { - // this is according to the hitachi HD44780 datasheet - // figure 24, pg 46 - - // we start in 8bit mode, try to set 4 bit mode - write4bits(0x03); - delayMicroseconds(4500); // wait min 4.1ms - - // second try - write4bits(0x03); - delayMicroseconds(4500); // wait min 4.1ms - - // third go! - write4bits(0x03); - delayMicroseconds(150); - - // finally, set to 4-bit interface - write4bits(0x02); - } else { - // this is according to the hitachi HD44780 datasheet - // page 45 figure 23 - - // Send function set command sequence - command(LCD_FUNCTIONSET | _displayfunction); - delayMicroseconds(4500); // wait more than 4.1ms - - // second try - command(LCD_FUNCTIONSET | _displayfunction); - delayMicroseconds(150); - - // third go - command(LCD_FUNCTIONSET | _displayfunction); - } - - // finally, set # lines, font size, etc. - command(LCD_FUNCTIONSET | _displayfunction); - - // turn the display on with no cursor or blinking default - _displaycontrol = LCD_DISPLAYON | LCD_CURSOROFF | LCD_BLINKOFF; - display(); - - // clear it off - clear(); - - // Initialize to default text direction (for romance languages) - _displaymode = LCD_ENTRYLEFT | LCD_ENTRYSHIFTDECREMENT; - // set the entry mode - command(LCD_ENTRYMODESET | _displaymode); - -} - -/********** high level commands, for the user! */ -void LiquidCrystal::clear() -{ - command(LCD_CLEARDISPLAY); // clear display, set cursor position to zero - delayMicroseconds(2000); // this command takes a long time! -} - -void LiquidCrystal::home() -{ - command(LCD_RETURNHOME); // set cursor position to zero - delayMicroseconds(2000); // this command takes a long time! -} - -void LiquidCrystal::setCursor(uint8_t col, uint8_t row) -{ - int row_offsets[] = { 0x00, 0x40, 0x14, 0x54 }; - if ( row >= _numlines ) { - row = _numlines-1; // we count rows starting w/0 - } - - command(LCD_SETDDRAMADDR | (col + row_offsets[row])); -} - -// Turn the display on/off (quickly) -void LiquidCrystal::noDisplay() { - _displaycontrol &= ~LCD_DISPLAYON; - command(LCD_DISPLAYCONTROL | _displaycontrol); -} -void LiquidCrystal::display() { - _displaycontrol |= LCD_DISPLAYON; - command(LCD_DISPLAYCONTROL | _displaycontrol); -} - -// Turns the underline cursor on/off -void LiquidCrystal::noCursor() { - _displaycontrol &= ~LCD_CURSORON; - command(LCD_DISPLAYCONTROL | _displaycontrol); -} -void LiquidCrystal::cursor() { - _displaycontrol |= LCD_CURSORON; - command(LCD_DISPLAYCONTROL | _displaycontrol); -} - -// Turn on and off the blinking cursor -void LiquidCrystal::noBlink() { - _displaycontrol &= ~LCD_BLINKON; - command(LCD_DISPLAYCONTROL | _displaycontrol); -} -void LiquidCrystal::blink() { - _displaycontrol |= LCD_BLINKON; - command(LCD_DISPLAYCONTROL | _displaycontrol); -} - -// These commands scroll the display without changing the RAM -void LiquidCrystal::scrollDisplayLeft(void) { - command(LCD_CURSORSHIFT | LCD_DISPLAYMOVE | LCD_MOVELEFT); -} -void LiquidCrystal::scrollDisplayRight(void) { - command(LCD_CURSORSHIFT | LCD_DISPLAYMOVE | LCD_MOVERIGHT); -} - -// This is for text that flows Left to Right -void LiquidCrystal::leftToRight(void) { - _displaymode |= LCD_ENTRYLEFT; - command(LCD_ENTRYMODESET | _displaymode); -} - -// This is for text that flows Right to Left -void LiquidCrystal::rightToLeft(void) { - _displaymode &= ~LCD_ENTRYLEFT; - command(LCD_ENTRYMODESET | _displaymode); -} - -// This will 'right justify' text from the cursor -void LiquidCrystal::autoscroll(void) { - _displaymode |= LCD_ENTRYSHIFTINCREMENT; - command(LCD_ENTRYMODESET | _displaymode); -} - -// This will 'left justify' text from the cursor -void LiquidCrystal::noAutoscroll(void) { - _displaymode &= ~LCD_ENTRYSHIFTINCREMENT; - command(LCD_ENTRYMODESET | _displaymode); -} - -// Allows us to fill the first 8 CGRAM locations -// with custom characters -void LiquidCrystal::createChar(uint8_t location, uint8_t charmap[]) { - location &= 0x7; // we only have 8 locations 0-7 - command(LCD_SETCGRAMADDR | (location << 3)); - for (int i=0; i<8; i++) { - write(charmap[i]); - } -} - -/*********** mid level commands, for sending data/cmds */ - -inline void LiquidCrystal::command(uint8_t value) { - send(value, LOW); -} - -inline size_t LiquidCrystal::write(uint8_t value) { - send(value, HIGH); - return 1; // assume sucess -} - -/************ low level data pushing commands **********/ - -// write either command or data, with automatic 4/8-bit selection -void LiquidCrystal::send(uint8_t value, uint8_t mode) { - digitalWrite(_rs_pin, mode); - - // if there is a RW pin indicated, set it low to Write - if (_rw_pin != 255) { - digitalWrite(_rw_pin, LOW); - } - - if (_displayfunction & LCD_8BITMODE) { - write8bits(value); - } else { - write4bits(value>>4); - write4bits(value); - } -} - -void LiquidCrystal::pulseEnable(void) { - digitalWrite(_enable_pin, LOW); - delayMicroseconds(1); - digitalWrite(_enable_pin, HIGH); - delayMicroseconds(1); // enable pulse must be >450ns - digitalWrite(_enable_pin, LOW); - delayMicroseconds(100); // commands need > 37us to settle -} - -void LiquidCrystal::write4bits(uint8_t value) { - for (int i = 0; i < 4; i++) { - pinMode(_data_pins[i], OUTPUT); - digitalWrite(_data_pins[i], (value >> i) & 0x01); - } - - pulseEnable(); -} - -void LiquidCrystal::write8bits(uint8_t value) { - for (int i = 0; i < 8; i++) { - pinMode(_data_pins[i], OUTPUT); - digitalWrite(_data_pins[i], (value >> i) & 0x01); - } - - pulseEnable(); -} diff --git a/build/linux/work/libraries/LiquidCrystal/LiquidCrystal.h b/build/linux/work/libraries/LiquidCrystal/LiquidCrystal.h deleted file mode 100644 index 24ec5afdf..000000000 --- a/build/linux/work/libraries/LiquidCrystal/LiquidCrystal.h +++ /dev/null @@ -1,106 +0,0 @@ -#ifndef LiquidCrystal_h -#define LiquidCrystal_h - -#include -#include "Print.h" - -// commands -#define LCD_CLEARDISPLAY 0x01 -#define LCD_RETURNHOME 0x02 -#define LCD_ENTRYMODESET 0x04 -#define LCD_DISPLAYCONTROL 0x08 -#define LCD_CURSORSHIFT 0x10 -#define LCD_FUNCTIONSET 0x20 -#define LCD_SETCGRAMADDR 0x40 -#define LCD_SETDDRAMADDR 0x80 - -// flags for display entry mode -#define LCD_ENTRYRIGHT 0x00 -#define LCD_ENTRYLEFT 0x02 -#define LCD_ENTRYSHIFTINCREMENT 0x01 -#define LCD_ENTRYSHIFTDECREMENT 0x00 - -// flags for display on/off control -#define LCD_DISPLAYON 0x04 -#define LCD_DISPLAYOFF 0x00 -#define LCD_CURSORON 0x02 -#define LCD_CURSOROFF 0x00 -#define LCD_BLINKON 0x01 -#define LCD_BLINKOFF 0x00 - -// flags for display/cursor shift -#define LCD_DISPLAYMOVE 0x08 -#define LCD_CURSORMOVE 0x00 -#define LCD_MOVERIGHT 0x04 -#define LCD_MOVELEFT 0x00 - -// flags for function set -#define LCD_8BITMODE 0x10 -#define LCD_4BITMODE 0x00 -#define LCD_2LINE 0x08 -#define LCD_1LINE 0x00 -#define LCD_5x10DOTS 0x04 -#define LCD_5x8DOTS 0x00 - -class LiquidCrystal : public Print { -public: - LiquidCrystal(uint8_t rs, uint8_t enable, - uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, - uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7); - LiquidCrystal(uint8_t rs, uint8_t rw, uint8_t enable, - uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, - uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7); - LiquidCrystal(uint8_t rs, uint8_t rw, uint8_t enable, - uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3); - LiquidCrystal(uint8_t rs, uint8_t enable, - uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3); - - void init(uint8_t fourbitmode, uint8_t rs, uint8_t rw, uint8_t enable, - uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, - uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7); - - void begin(uint8_t cols, uint8_t rows, uint8_t charsize = LCD_5x8DOTS); - - void clear(); - void home(); - - void noDisplay(); - void display(); - void noBlink(); - void blink(); - void noCursor(); - void cursor(); - void scrollDisplayLeft(); - void scrollDisplayRight(); - void leftToRight(); - void rightToLeft(); - void autoscroll(); - void noAutoscroll(); - - void createChar(uint8_t, uint8_t[]); - void setCursor(uint8_t, uint8_t); - virtual size_t write(uint8_t); - void command(uint8_t); - - using Print::write; -private: - void send(uint8_t, uint8_t); - void write4bits(uint8_t); - void write8bits(uint8_t); - void pulseEnable(); - - uint8_t _rs_pin; // LOW: command. HIGH: character. - uint8_t _rw_pin; // LOW: write to LCD. HIGH: read from LCD. - uint8_t _enable_pin; // activated by a HIGH pulse. - uint8_t _data_pins[8]; - - uint8_t _displayfunction; - uint8_t _displaycontrol; - uint8_t _displaymode; - - uint8_t _initialized; - - uint8_t _numlines,_currline; -}; - -#endif diff --git a/build/linux/work/libraries/LiquidCrystal/examples/Autoscroll/Autoscroll.ino b/build/linux/work/libraries/LiquidCrystal/examples/Autoscroll/Autoscroll.ino deleted file mode 100644 index 27123ad4c..000000000 --- a/build/linux/work/libraries/LiquidCrystal/examples/Autoscroll/Autoscroll.ino +++ /dev/null @@ -1,73 +0,0 @@ -/* - LiquidCrystal Library - Autoscroll - - Demonstrates the use a 16x2 LCD display. The LiquidCrystal - library works with all LCD displays that are compatible with the - Hitachi HD44780 driver. There are many of them out there, and you - can usually tell them by the 16-pin interface. - - This sketch demonstrates the use of the autoscroll() - and noAutoscroll() functions to make new text scroll or not. - - The circuit: - * LCD RS pin to digital pin 12 - * LCD Enable pin to digital pin 11 - * LCD D4 pin to digital pin 5 - * LCD D5 pin to digital pin 4 - * LCD D6 pin to digital pin 3 - * LCD D7 pin to digital pin 2 - * LCD R/W pin to ground - * 10K resistor: - * ends to +5V and ground - * wiper to LCD VO pin (pin 3) - - Library originally added 18 Apr 2008 - by David A. Mellis - library modified 5 Jul 2009 - by Limor Fried (http://www.ladyada.net) - example added 9 Jul 2009 - by Tom Igoe - modified 22 Nov 2010 - by Tom Igoe - - This example code is in the public domain. - - http://www.arduino.cc/en/Tutorial/LiquidCrystal - */ - -// include the library code: -#include - -// initialize the library with the numbers of the interface pins -LiquidCrystal lcd(12, 11, 5, 4, 3, 2); - -void setup() { - // set up the LCD's number of columns and rows: - lcd.begin(16,2); -} - -void loop() { - // set the cursor to (0,0): - lcd.setCursor(0, 0); - // print from 0 to 9: - for (int thisChar = 0; thisChar < 10; thisChar++) { - lcd.print(thisChar); - delay(500); - } - - // set the cursor to (16,1): - lcd.setCursor(16,1); - // set the display to automatically scroll: - lcd.autoscroll(); - // print from 0 to 9: - for (int thisChar = 0; thisChar < 10; thisChar++) { - lcd.print(thisChar); - delay(500); - } - // turn off automatic scrolling - lcd.noAutoscroll(); - - // clear screen for the next loop: - lcd.clear(); -} - diff --git a/build/linux/work/libraries/LiquidCrystal/examples/Blink/Blink.ino b/build/linux/work/libraries/LiquidCrystal/examples/Blink/Blink.ino deleted file mode 100644 index e4104242e..000000000 --- a/build/linux/work/libraries/LiquidCrystal/examples/Blink/Blink.ino +++ /dev/null @@ -1,61 +0,0 @@ -/* - LiquidCrystal Library - Blink - - Demonstrates the use a 16x2 LCD display. The LiquidCrystal - library works with all LCD displays that are compatible with the - Hitachi HD44780 driver. There are many of them out there, and you - can usually tell them by the 16-pin interface. - - This sketch prints "Hello World!" to the LCD and makes the - cursor block blink. - - The circuit: - * LCD RS pin to digital pin 12 - * LCD Enable pin to digital pin 11 - * LCD D4 pin to digital pin 5 - * LCD D5 pin to digital pin 4 - * LCD D6 pin to digital pin 3 - * LCD D7 pin to digital pin 2 - * LCD R/W pin to ground - * 10K resistor: - * ends to +5V and ground - * wiper to LCD VO pin (pin 3) - - Library originally added 18 Apr 2008 - by David A. Mellis - library modified 5 Jul 2009 - by Limor Fried (http://www.ladyada.net) - example added 9 Jul 2009 - by Tom Igoe - modified 22 Nov 2010 - by Tom Igoe - - This example code is in the public domain. - - http://www.arduino.cc/en/Tutorial/LiquidCrystal - - */ - -// include the library code: -#include - -// initialize the library with the numbers of the interface pins -LiquidCrystal lcd(12, 11, 5, 4, 3, 2); - -void setup() { - // set up the LCD's number of columns and rows: - lcd.begin(16, 2); - // Print a message to the LCD. - lcd.print("hello, world!"); -} - -void loop() { - // Turn off the blinking cursor: - lcd.noBlink(); - delay(3000); - // Turn on the blinking cursor: - lcd.blink(); - delay(3000); -} - - diff --git a/build/linux/work/libraries/LiquidCrystal/examples/Cursor/Cursor.ino b/build/linux/work/libraries/LiquidCrystal/examples/Cursor/Cursor.ino deleted file mode 100644 index 28e2a6a22..000000000 --- a/build/linux/work/libraries/LiquidCrystal/examples/Cursor/Cursor.ino +++ /dev/null @@ -1,60 +0,0 @@ -/* - LiquidCrystal Library - Cursor - - Demonstrates the use a 16x2 LCD display. The LiquidCrystal - library works with all LCD displays that are compatible with the - Hitachi HD44780 driver. There are many of them out there, and you - can usually tell them by the 16-pin interface. - - This sketch prints "Hello World!" to the LCD and - uses the cursor() and noCursor() methods to turn - on and off the cursor. - - The circuit: - * LCD RS pin to digital pin 12 - * LCD Enable pin to digital pin 11 - * LCD D4 pin to digital pin 5 - * LCD D5 pin to digital pin 4 - * LCD D6 pin to digital pin 3 - * LCD D7 pin to digital pin 2 - * LCD R/W pin to ground - * 10K resistor: - * ends to +5V and ground - * wiper to LCD VO pin (pin 3) - - Library originally added 18 Apr 2008 - by David A. Mellis - library modified 5 Jul 2009 - by Limor Fried (http://www.ladyada.net) - example added 9 Jul 2009 - by Tom Igoe - modified 22 Nov 2010 - by Tom Igoe - - This example code is in the public domain. - - http://www.arduino.cc/en/Tutorial/LiquidCrystal - */ - -// include the library code: -#include - -// initialize the library with the numbers of the interface pins -LiquidCrystal lcd(12, 11, 5, 4, 3, 2); - -void setup() { - // set up the LCD's number of columns and rows: - lcd.begin(16, 2); - // Print a message to the LCD. - lcd.print("hello, world!"); -} - -void loop() { - // Turn off the cursor: - lcd.noCursor(); - delay(500); - // Turn on the cursor: - lcd.cursor(); - delay(500); -} - diff --git a/build/linux/work/libraries/LiquidCrystal/examples/CustomCharacter/CustomCharacter.ino b/build/linux/work/libraries/LiquidCrystal/examples/CustomCharacter/CustomCharacter.ino deleted file mode 100644 index d3ce47924..000000000 --- a/build/linux/work/libraries/LiquidCrystal/examples/CustomCharacter/CustomCharacter.ino +++ /dev/null @@ -1,138 +0,0 @@ -/* - LiquidCrystal Library - Custom Characters - - Demonstrates how to add custom characters on an LCD display. - The LiquidCrystal library works with all LCD displays that are - compatible with the Hitachi HD44780 driver. There are many of - them out there, and you can usually tell them by the 16-pin interface. - - This sketch prints "I Arduino!" and a little dancing man - to the LCD. - - The circuit: - * LCD RS pin to digital pin 12 - * LCD Enable pin to digital pin 11 - * LCD D4 pin to digital pin 5 - * LCD D5 pin to digital pin 4 - * LCD D6 pin to digital pin 3 - * LCD D7 pin to digital pin 2 - * LCD R/W pin to ground - * 10K potentiometer: - * ends to +5V and ground - * wiper to LCD VO pin (pin 3) - * 10K poterntiometer on pin A0 - - created21 Mar 2011 - by Tom Igoe - Based on Adafruit's example at - https://github.com/adafruit/SPI_VFD/blob/master/examples/createChar/createChar.pde - - This example code is in the public domain. - http://www.arduino.cc/en/Tutorial/LiquidCrystal - - Also useful: - http://icontexto.com/charactercreator/ - - */ - -// include the library code: -#include - -// initialize the library with the numbers of the interface pins -LiquidCrystal lcd(12, 11, 5, 4, 3, 2); - -// make some custom characters: -byte heart[8] = { - 0b00000, - 0b01010, - 0b11111, - 0b11111, - 0b11111, - 0b01110, - 0b00100, - 0b00000 -}; - -byte smiley[8] = { - 0b00000, - 0b00000, - 0b01010, - 0b00000, - 0b00000, - 0b10001, - 0b01110, - 0b00000 -}; - -byte frownie[8] = { - 0b00000, - 0b00000, - 0b01010, - 0b00000, - 0b00000, - 0b00000, - 0b01110, - 0b10001 -}; - -byte armsDown[8] = { - 0b00100, - 0b01010, - 0b00100, - 0b00100, - 0b01110, - 0b10101, - 0b00100, - 0b01010 -}; - -byte armsUp[8] = { - 0b00100, - 0b01010, - 0b00100, - 0b10101, - 0b01110, - 0b00100, - 0b00100, - 0b01010 -}; -void setup() { - // create a new character - lcd.createChar(0, heart); - // create a new character - lcd.createChar(1, smiley); - // create a new character - lcd.createChar(2, frownie); - // create a new character - lcd.createChar(3, armsDown); - // create a new character - lcd.createChar(4, armsUp); - - // set up the lcd's number of columns and rows: - lcd.begin(16, 2); - // Print a message to the lcd. - lcd.print("I "); - lcd.write(0); - lcd.print(" Arduino! "); - lcd.write(1); - -} - -void loop() { - // read the potentiometer on A0: - int sensorReading = analogRead(A0); - // map the result to 200 - 1000: - int delayTime = map(sensorReading, 0, 1023, 200, 1000); - // set the cursor to the bottom row, 5th position: - lcd.setCursor(4, 1); - // draw the little man, arms down: - lcd.write(3); - delay(delayTime); - lcd.setCursor(4, 1); - // draw him arms up: - lcd.write(4); - delay(delayTime); -} - - - diff --git a/build/linux/work/libraries/LiquidCrystal/examples/Display/Display.ino b/build/linux/work/libraries/LiquidCrystal/examples/Display/Display.ino deleted file mode 100644 index b000731a4..000000000 --- a/build/linux/work/libraries/LiquidCrystal/examples/Display/Display.ino +++ /dev/null @@ -1,60 +0,0 @@ -/* - LiquidCrystal Library - display() and noDisplay() - - Demonstrates the use a 16x2 LCD display. The LiquidCrystal - library works with all LCD displays that are compatible with the - Hitachi HD44780 driver. There are many of them out there, and you - can usually tell them by the 16-pin interface. - - This sketch prints "Hello World!" to the LCD and uses the - display() and noDisplay() functions to turn on and off - the display. - - The circuit: - * LCD RS pin to digital pin 12 - * LCD Enable pin to digital pin 11 - * LCD D4 pin to digital pin 5 - * LCD D5 pin to digital pin 4 - * LCD D6 pin to digital pin 3 - * LCD D7 pin to digital pin 2 - * LCD R/W pin to ground - * 10K resistor: - * ends to +5V and ground - * wiper to LCD VO pin (pin 3) - - Library originally added 18 Apr 2008 - by David A. Mellis - library modified 5 Jul 2009 - by Limor Fried (http://www.ladyada.net) - example added 9 Jul 2009 - by Tom Igoe - modified 22 Nov 2010 - by Tom Igoe - - This example code is in the public domain. - - http://www.arduino.cc/en/Tutorial/LiquidCrystal - */ - -// include the library code: -#include - -// initialize the library with the numbers of the interface pins -LiquidCrystal lcd(12, 11, 5, 4, 3, 2); - -void setup() { - // set up the LCD's number of columns and rows: - lcd.begin(16, 2); - // Print a message to the LCD. - lcd.print("hello, world!"); -} - -void loop() { - // Turn off the display: - lcd.noDisplay(); - delay(500); - // Turn on the display: - lcd.display(); - delay(500); -} - diff --git a/build/linux/work/libraries/LiquidCrystal/examples/HelloWorld/HelloWorld.ino b/build/linux/work/libraries/LiquidCrystal/examples/HelloWorld/HelloWorld.ino deleted file mode 100644 index e99957d9a..000000000 --- a/build/linux/work/libraries/LiquidCrystal/examples/HelloWorld/HelloWorld.ino +++ /dev/null @@ -1,58 +0,0 @@ -/* - LiquidCrystal Library - Hello World - - Demonstrates the use a 16x2 LCD display. The LiquidCrystal - library works with all LCD displays that are compatible with the - Hitachi HD44780 driver. There are many of them out there, and you - can usually tell them by the 16-pin interface. - - This sketch prints "Hello World!" to the LCD - and shows the time. - - The circuit: - * LCD RS pin to digital pin 12 - * LCD Enable pin to digital pin 11 - * LCD D4 pin to digital pin 5 - * LCD D5 pin to digital pin 4 - * LCD D6 pin to digital pin 3 - * LCD D7 pin to digital pin 2 - * LCD R/W pin to ground - * 10K resistor: - * ends to +5V and ground - * wiper to LCD VO pin (pin 3) - - Library originally added 18 Apr 2008 - by David A. Mellis - library modified 5 Jul 2009 - by Limor Fried (http://www.ladyada.net) - example added 9 Jul 2009 - by Tom Igoe - modified 22 Nov 2010 - by Tom Igoe - - This example code is in the public domain. - - http://www.arduino.cc/en/Tutorial/LiquidCrystal - */ - -// include the library code: -#include - -// initialize the library with the numbers of the interface pins -LiquidCrystal lcd(12, 11, 5, 4, 3, 2); - -void setup() { - // set up the LCD's number of columns and rows: - lcd.begin(16, 2); - // Print a message to the LCD. - lcd.print("hello, world!"); -} - -void loop() { - // set the cursor to column 0, line 1 - // (note: line 1 is the second row, since counting begins with 0): - lcd.setCursor(0, 1); - // print the number of seconds since reset: - lcd.print(millis()/1000); -} - diff --git a/build/linux/work/libraries/LiquidCrystal/examples/Scroll/Scroll.ino b/build/linux/work/libraries/LiquidCrystal/examples/Scroll/Scroll.ino deleted file mode 100644 index 71e5e8cce..000000000 --- a/build/linux/work/libraries/LiquidCrystal/examples/Scroll/Scroll.ino +++ /dev/null @@ -1,85 +0,0 @@ -/* - LiquidCrystal Library - scrollDisplayLeft() and scrollDisplayRight() - - Demonstrates the use a 16x2 LCD display. The LiquidCrystal - library works with all LCD displays that are compatible with the - Hitachi HD44780 driver. There are many of them out there, and you - can usually tell them by the 16-pin interface. - - This sketch prints "Hello World!" to the LCD and uses the - scrollDisplayLeft() and scrollDisplayRight() methods to scroll - the text. - - The circuit: - * LCD RS pin to digital pin 12 - * LCD Enable pin to digital pin 11 - * LCD D4 pin to digital pin 5 - * LCD D5 pin to digital pin 4 - * LCD D6 pin to digital pin 3 - * LCD D7 pin to digital pin 2 - * LCD R/W pin to ground - * 10K resistor: - * ends to +5V and ground - * wiper to LCD VO pin (pin 3) - - Library originally added 18 Apr 2008 - by David A. Mellis - library modified 5 Jul 2009 - by Limor Fried (http://www.ladyada.net) - example added 9 Jul 2009 - by Tom Igoe - modified 22 Nov 2010 - by Tom Igoe - - This example code is in the public domain. - - http://www.arduino.cc/en/Tutorial/LiquidCrystal - */ - -// include the library code: -#include - -// initialize the library with the numbers of the interface pins -LiquidCrystal lcd(12, 11, 5, 4, 3, 2); - -void setup() { - // set up the LCD's number of columns and rows: - lcd.begin(16, 2); - // Print a message to the LCD. - lcd.print("hello, world!"); - delay(1000); -} - -void loop() { - // scroll 13 positions (string length) to the left - // to move it offscreen left: - for (int positionCounter = 0; positionCounter < 13; positionCounter++) { - // scroll one position left: - lcd.scrollDisplayLeft(); - // wait a bit: - delay(150); - } - - // scroll 29 positions (string length + display length) to the right - // to move it offscreen right: - for (int positionCounter = 0; positionCounter < 29; positionCounter++) { - // scroll one position right: - lcd.scrollDisplayRight(); - // wait a bit: - delay(150); - } - - // scroll 16 positions (display length + string length) to the left - // to move it back to center: - for (int positionCounter = 0; positionCounter < 16; positionCounter++) { - // scroll one position left: - lcd.scrollDisplayLeft(); - // wait a bit: - delay(150); - } - - // delay at the end of the full loop: - delay(1000); - -} - diff --git a/build/linux/work/libraries/LiquidCrystal/examples/SerialDisplay/SerialDisplay.ino b/build/linux/work/libraries/LiquidCrystal/examples/SerialDisplay/SerialDisplay.ino deleted file mode 100644 index 9727cee03..000000000 --- a/build/linux/work/libraries/LiquidCrystal/examples/SerialDisplay/SerialDisplay.ino +++ /dev/null @@ -1,65 +0,0 @@ -/* - LiquidCrystal Library - Serial Input - - Demonstrates the use a 16x2 LCD display. The LiquidCrystal - library works with all LCD displays that are compatible with the - Hitachi HD44780 driver. There are many of them out there, and you - can usually tell them by the 16-pin interface. - - This sketch displays text sent over the serial port - (e.g. from the Serial Monitor) on an attached LCD. - - The circuit: - * LCD RS pin to digital pin 12 - * LCD Enable pin to digital pin 11 - * LCD D4 pin to digital pin 5 - * LCD D5 pin to digital pin 4 - * LCD D6 pin to digital pin 3 - * LCD D7 pin to digital pin 2 - * LCD R/W pin to ground - * 10K resistor: - * ends to +5V and ground - * wiper to LCD VO pin (pin 3) - - Library originally added 18 Apr 2008 - by David A. Mellis - library modified 5 Jul 2009 - by Limor Fried (http://www.ladyada.net) - example added 9 Jul 2009 - by Tom Igoe - modified 22 Nov 2010 - by Tom Igoe - - This example code is in the public domain. - - http://www.arduino.cc/en/Tutorial/LiquidCrystal - */ - -// include the library code: -#include - -// initialize the library with the numbers of the interface pins -LiquidCrystal lcd(12, 11, 5, 4, 3, 2); - -void setup(){ - // set up the LCD's number of columns and rows: - lcd.begin(16, 2); - // initialize the serial communications: - Serial.begin(9600); -} - -void loop() -{ - // when characters arrive over the serial port... - if (Serial.available()) { - // wait a bit for the entire message to arrive - delay(100); - // clear the screen - lcd.clear(); - // read all the available characters - while (Serial.available() > 0) { - // display each character to the LCD - lcd.write(Serial.read()); - } - } -} diff --git a/build/linux/work/libraries/LiquidCrystal/examples/TextDirection/TextDirection.ino b/build/linux/work/libraries/LiquidCrystal/examples/TextDirection/TextDirection.ino deleted file mode 100644 index 51bab1fb5..000000000 --- a/build/linux/work/libraries/LiquidCrystal/examples/TextDirection/TextDirection.ino +++ /dev/null @@ -1,87 +0,0 @@ - /* - LiquidCrystal Library - TextDirection - - Demonstrates the use a 16x2 LCD display. The LiquidCrystal - library works with all LCD displays that are compatible with the - Hitachi HD44780 driver. There are many of them out there, and you - can usually tell them by the 16-pin interface. - - This sketch demonstrates how to use leftToRight() and rightToLeft() - to move the cursor. - - The circuit: - * LCD RS pin to digital pin 12 - * LCD Enable pin to digital pin 11 - * LCD D4 pin to digital pin 5 - * LCD D5 pin to digital pin 4 - * LCD D6 pin to digital pin 3 - * LCD D7 pin to digital pin 2 - * LCD R/W pin to ground - * 10K resistor: - * ends to +5V and ground - * wiper to LCD VO pin (pin 3) - - Library originally added 18 Apr 2008 - by David A. Mellis - library modified 5 Jul 2009 - by Limor Fried (http://www.ladyada.net) - example added 9 Jul 2009 - by Tom Igoe - modified 22 Nov 2010 - by Tom Igoe - - This example code is in the public domain. - - http://www.arduino.cc/en/Tutorial/LiquidCrystal - - */ - -// include the library code: -#include - -// initialize the library with the numbers of the interface pins -LiquidCrystal lcd(12, 11, 5, 4, 3, 2); - -int thisChar = 'a'; - -void setup() { - // set up the LCD's number of columns and rows: - lcd.begin(16, 2); - // turn on the cursor: - lcd.cursor(); - Serial.begin(9600); -} - -void loop() { - // reverse directions at 'm': - if (thisChar == 'm') { - // go right for the next letter - lcd.rightToLeft(); - } - // reverse again at 's': - if (thisChar == 's') { - // go left for the next letter - lcd.leftToRight(); - } - // reset at 'z': - if (thisChar > 'z') { - // go to (0,0): - lcd.home(); - // start again at 0 - thisChar = 'a'; - } - // print the character - lcd.write(thisChar); - // wait a second: - delay(1000); - // increment the letter: - thisChar++; -} - - - - - - - - diff --git a/build/linux/work/libraries/LiquidCrystal/examples/setCursor/setCursor.ino b/build/linux/work/libraries/LiquidCrystal/examples/setCursor/setCursor.ino deleted file mode 100644 index 3c4edf3c4..000000000 --- a/build/linux/work/libraries/LiquidCrystal/examples/setCursor/setCursor.ino +++ /dev/null @@ -1,71 +0,0 @@ -/* - LiquidCrystal Library - setCursor - - Demonstrates the use a 16x2 LCD display. The LiquidCrystal - library works with all LCD displays that are compatible with the - Hitachi HD44780 driver. There are many of them out there, and you - can usually tell them by the 16-pin interface. - - This sketch prints to all the positions of the LCD using the - setCursor(0 method: - - The circuit: - * LCD RS pin to digital pin 12 - * LCD Enable pin to digital pin 11 - * LCD D4 pin to digital pin 5 - * LCD D5 pin to digital pin 4 - * LCD D6 pin to digital pin 3 - * LCD D7 pin to digital pin 2 - * LCD R/W pin to ground - * 10K resistor: - * ends to +5V and ground - * wiper to LCD VO pin (pin 3) - - Library originally added 18 Apr 2008 - by David A. Mellis - library modified 5 Jul 2009 - by Limor Fried (http://www.ladyada.net) - example added 9 Jul 2009 - by Tom Igoe - modified 22 Nov 2010 - by Tom Igoe - - This example code is in the public domain. - - http://www.arduino.cc/en/Tutorial/LiquidCrystal - */ - -// include the library code: -#include - -// these constants won't change. But you can change the size of -// your LCD using them: -const int numRows = 2; -const int numCols = 16; - -// initialize the library with the numbers of the interface pins -LiquidCrystal lcd(12, 11, 5, 4, 3, 2); - -void setup() { - // set up the LCD's number of columns and rows: - lcd.begin(numCols,numRows); -} - -void loop() { - // loop from ASCII 'a' to ASCII 'z': - for (int thisLetter = 'a'; thisLetter <= 'z'; thisLetter++) { - // loop over the columns: - for (int thisCol = 0; thisCol < numRows; thisCol++) { - // loop over the rows: - for (int thisRow = 0; thisRow < numCols; thisRow++) { - // set the cursor position: - lcd.setCursor(thisRow,thisCol); - // print the letter: - lcd.write(thisLetter); - delay(200); - } - } - } -} - - diff --git a/build/linux/work/libraries/LiquidCrystal/keywords.txt b/build/linux/work/libraries/LiquidCrystal/keywords.txt deleted file mode 100644 index 132845cb6..000000000 --- a/build/linux/work/libraries/LiquidCrystal/keywords.txt +++ /dev/null @@ -1,37 +0,0 @@ -####################################### -# Syntax Coloring Map For LiquidCrystal -####################################### - -####################################### -# Datatypes (KEYWORD1) -####################################### - -LiquidCrystal KEYWORD1 - -####################################### -# Methods and Functions (KEYWORD2) -####################################### - -begin KEYWORD2 -clear KEYWORD2 -home KEYWORD2 -print KEYWORD2 -setCursor KEYWORD2 -cursor KEYWORD2 -noCursor KEYWORD2 -blink KEYWORD2 -noBlink KEYWORD2 -display KEYWORD2 -noDisplay KEYWORD2 -autoscroll KEYWORD2 -noAutoscroll KEYWORD2 -leftToRight KEYWORD2 -rightToLeft KEYWORD2 -scrollDisplayLeft KEYWORD2 -scrollDisplayRight KEYWORD2 -createChar KEYWORD2 - -####################################### -# Constants (LITERAL1) -####################################### - diff --git a/build/linux/work/libraries/SD/File.cpp b/build/linux/work/libraries/SD/File.cpp deleted file mode 100644 index 88d9e9ac9..000000000 --- a/build/linux/work/libraries/SD/File.cpp +++ /dev/null @@ -1,150 +0,0 @@ -/* - - SD - a slightly more friendly wrapper for sdfatlib - - This library aims to expose a subset of SD card functionality - in the form of a higher level "wrapper" object. - - License: GNU General Public License V3 - (Because sdfatlib is licensed with this.) - - (C) Copyright 2010 SparkFun Electronics - - */ - -#include - -/* for debugging file open/close leaks - uint8_t nfilecount=0; -*/ - -File::File(SdFile f, const char *n) { - // oh man you are kidding me, new() doesnt exist? Ok we do it by hand! - _file = (SdFile *)malloc(sizeof(SdFile)); - if (_file) { - memcpy(_file, &f, sizeof(SdFile)); - - strncpy(_name, n, 12); - _name[12] = 0; - - /* for debugging file open/close leaks - nfilecount++; - Serial.print("Created \""); - Serial.print(n); - Serial.print("\": "); - Serial.println(nfilecount, DEC); - */ - } -} - -File::File(void) { - _file = 0; - _name[0] = 0; - //Serial.print("Created empty file object"); -} - -File::~File(void) { - // Serial.print("Deleted file object"); -} - -// returns a pointer to the file name -char *File::name(void) { - return _name; -} - -// a directory is a special type of file -boolean File::isDirectory(void) { - return (_file && _file->isDir()); -} - - -size_t File::write(uint8_t val) { - return write(&val, 1); -} - -size_t File::write(const uint8_t *buf, size_t size) { - size_t t; - if (!_file) { - setWriteError(); - return 0; - } - _file->clearWriteError(); - t = _file->write(buf, size); - if (_file->getWriteError()) { - setWriteError(); - return 0; - } - return t; -} - -int File::peek() { - if (! _file) - return 0; - - int c = _file->read(); - if (c != -1) _file->seekCur(-1); - return c; -} - -int File::read() { - if (_file) - return _file->read(); - return -1; -} - -// buffered read for more efficient, high speed reading -int File::read(void *buf, uint16_t nbyte) { - if (_file) - return _file->read(buf, nbyte); - return 0; -} - -int File::available() { - if (! _file) return 0; - - uint32_t n = size() - position(); - - return n > 0X7FFF ? 0X7FFF : n; -} - -void File::flush() { - if (_file) - _file->sync(); -} - -boolean File::seek(uint32_t pos) { - if (! _file) return false; - - return _file->seekSet(pos); -} - -uint32_t File::position() { - if (! _file) return -1; - return _file->curPosition(); -} - -uint32_t File::size() { - if (! _file) return 0; - return _file->fileSize(); -} - -void File::close() { - if (_file) { - _file->close(); - free(_file); - _file = 0; - - /* for debugging file open/close leaks - nfilecount--; - Serial.print("Deleted "); - Serial.println(nfilecount, DEC); - */ - } -} - -File::operator bool() { - if (_file) - return _file->isOpen(); - return false; -} - diff --git a/build/linux/work/libraries/SD/README.txt b/build/linux/work/libraries/SD/README.txt deleted file mode 100644 index 495ea4c79..000000000 --- a/build/linux/work/libraries/SD/README.txt +++ /dev/null @@ -1,13 +0,0 @@ - -** SD - a slightly more friendly wrapper for sdfatlib ** - -This library aims to expose a subset of SD card functionality in the -form of a higher level "wrapper" object. - -License: GNU General Public License V3 - (Because sdfatlib is licensed with this.) - -(C) Copyright 2010 SparkFun Electronics - -Now better than ever with optimization, multiple file support, directory handling, etc - ladyada! - diff --git a/build/linux/work/libraries/SD/SD.cpp b/build/linux/work/libraries/SD/SD.cpp deleted file mode 100644 index c746809b6..000000000 --- a/build/linux/work/libraries/SD/SD.cpp +++ /dev/null @@ -1,616 +0,0 @@ -/* - - SD - a slightly more friendly wrapper for sdfatlib - - This library aims to expose a subset of SD card functionality - in the form of a higher level "wrapper" object. - - License: GNU General Public License V3 - (Because sdfatlib is licensed with this.) - - (C) Copyright 2010 SparkFun Electronics - - - This library provides four key benefits: - - * Including `SD.h` automatically creates a global - `SD` object which can be interacted with in a similar - manner to other standard global objects like `Serial` and `Ethernet`. - - * Boilerplate initialisation code is contained in one method named - `begin` and no further objects need to be created in order to access - the SD card. - - * Calls to `open` can supply a full path name including parent - directories which simplifies interacting with files in subdirectories. - - * Utility methods are provided to determine whether a file exists - and to create a directory heirarchy. - - - Note however that not all functionality provided by the underlying - sdfatlib library is exposed. - - */ - -/* - - Implementation Notes - - In order to handle multi-directory path traversal, functionality that - requires this ability is implemented as callback functions. - - Individual methods call the `walkPath` function which performs the actual - directory traversal (swapping between two different directory/file handles - along the way) and at each level calls the supplied callback function. - - Some types of functionality will take an action at each level (e.g. exists - or make directory) which others will only take an action at the bottom - level (e.g. open). - - */ - -#include "SD.h" - -// Used by `getNextPathComponent` -#define MAX_COMPONENT_LEN 12 // What is max length? -#define PATH_COMPONENT_BUFFER_LEN MAX_COMPONENT_LEN+1 - -bool getNextPathComponent(char *path, unsigned int *p_offset, - char *buffer) { - /* - - Parse individual path components from a path. - - e.g. after repeated calls '/foo/bar/baz' will be split - into 'foo', 'bar', 'baz'. - - This is similar to `strtok()` but copies the component into the - supplied buffer rather than modifying the original string. - - - `buffer` needs to be PATH_COMPONENT_BUFFER_LEN in size. - - `p_offset` needs to point to an integer of the offset at - which the previous path component finished. - - Returns `true` if more components remain. - - Returns `false` if this is the last component. - (This means path ended with 'foo' or 'foo/'.) - - */ - - // TODO: Have buffer local to this function, so we know it's the - // correct length? - - int bufferOffset = 0; - - int offset = *p_offset; - - // Skip root or other separator - if (path[offset] == '/') { - offset++; - } - - // Copy the next next path segment - while (bufferOffset < MAX_COMPONENT_LEN - && (path[offset] != '/') - && (path[offset] != '\0')) { - buffer[bufferOffset++] = path[offset++]; - } - - buffer[bufferOffset] = '\0'; - - // Skip trailing separator so we can determine if this - // is the last component in the path or not. - if (path[offset] == '/') { - offset++; - } - - *p_offset = offset; - - return (path[offset] != '\0'); -} - - - -boolean walkPath(char *filepath, SdFile& parentDir, - boolean (*callback)(SdFile& parentDir, - char *filePathComponent, - boolean isLastComponent, - void *object), - void *object = NULL) { - /* - - When given a file path (and parent directory--normally root), - this function traverses the directories in the path and at each - level calls the supplied callback function while also providing - the supplied object for context if required. - - e.g. given the path '/foo/bar/baz' - the callback would be called at the equivalent of - '/foo', '/foo/bar' and '/foo/bar/baz'. - - The implementation swaps between two different directory/file - handles as it traverses the directories and does not use recursion - in an attempt to use memory efficiently. - - If a callback wishes to stop the directory traversal it should - return false--in this case the function will stop the traversal, - tidy up and return false. - - If a directory path doesn't exist at some point this function will - also return false and not subsequently call the callback. - - If a directory path specified is complete, valid and the callback - did not indicate the traversal should be interrupted then this - function will return true. - - */ - - - SdFile subfile1; - SdFile subfile2; - - char buffer[PATH_COMPONENT_BUFFER_LEN]; - - unsigned int offset = 0; - - SdFile *p_parent; - SdFile *p_child; - - SdFile *p_tmp_sdfile; - - p_child = &subfile1; - - p_parent = &parentDir; - - while (true) { - - boolean moreComponents = getNextPathComponent(filepath, &offset, buffer); - - boolean shouldContinue = callback((*p_parent), buffer, !moreComponents, object); - - if (!shouldContinue) { - // TODO: Don't repeat this code? - // If it's one we've created then we - // don't need the parent handle anymore. - if (p_parent != &parentDir) { - (*p_parent).close(); - } - return false; - } - - if (!moreComponents) { - break; - } - - boolean exists = (*p_child).open(*p_parent, buffer, O_RDONLY); - - // If it's one we've created then we - // don't need the parent handle anymore. - if (p_parent != &parentDir) { - (*p_parent).close(); - } - - // Handle case when it doesn't exist and we can't continue... - if (exists) { - // We alternate between two file handles as we go down - // the path. - if (p_parent == &parentDir) { - p_parent = &subfile2; - } - - p_tmp_sdfile = p_parent; - p_parent = p_child; - p_child = p_tmp_sdfile; - } else { - return false; - } - } - - if (p_parent != &parentDir) { - (*p_parent).close(); // TODO: Return/ handle different? - } - - return true; -} - - - -/* - - The callbacks used to implement various functionality follow. - - Each callback is supplied with a parent directory handle, - character string with the name of the current file path component, - a flag indicating if this component is the last in the path and - a pointer to an arbitrary object used for context. - - */ - -boolean callback_pathExists(SdFile& parentDir, char *filePathComponent, - boolean isLastComponent, void *object) { - /* - - Callback used to determine if a file/directory exists in parent - directory. - - Returns true if file path exists. - - */ - SdFile child; - - boolean exists = child.open(parentDir, filePathComponent, O_RDONLY); - - if (exists) { - child.close(); - } - - return exists; -} - - - -boolean callback_makeDirPath(SdFile& parentDir, char *filePathComponent, - boolean isLastComponent, void *object) { - /* - - Callback used to create a directory in the parent directory if - it does not already exist. - - Returns true if a directory was created or it already existed. - - */ - boolean result = false; - SdFile child; - - result = callback_pathExists(parentDir, filePathComponent, isLastComponent, object); - if (!result) { - result = child.makeDir(parentDir, filePathComponent); - } - - return result; -} - - - /* - -boolean callback_openPath(SdFile& parentDir, char *filePathComponent, - boolean isLastComponent, void *object) { - - Callback used to open a file specified by a filepath that may - specify one or more directories above it. - - Expects the context object to be an instance of `SDClass` and - will use the `file` property of the instance to open the requested - file/directory with the associated file open mode property. - - Always returns true if the directory traversal hasn't reached the - bottom of the directory heirarchy. - - Returns false once the file has been opened--to prevent the traversal - from descending further. (This may be unnecessary.) - - if (isLastComponent) { - SDClass *p_SD = static_cast(object); - p_SD->file.open(parentDir, filePathComponent, p_SD->fileOpenMode); - if (p_SD->fileOpenMode == FILE_WRITE) { - p_SD->file.seekSet(p_SD->file.fileSize()); - } - // TODO: Return file open result? - return false; - } - return true; -} - */ - - - -boolean callback_remove(SdFile& parentDir, char *filePathComponent, - boolean isLastComponent, void *object) { - if (isLastComponent) { - return SdFile::remove(parentDir, filePathComponent); - } - return true; -} - -boolean callback_rmdir(SdFile& parentDir, char *filePathComponent, - boolean isLastComponent, void *object) { - if (isLastComponent) { - SdFile f; - if (!f.open(parentDir, filePathComponent, O_READ)) return false; - return f.rmDir(); - } - return true; -} - - - -/* Implementation of class used to create `SDCard` object. */ - - - -boolean SDClass::begin(uint8_t csPin) { - /* - - Performs the initialisation required by the sdfatlib library. - - Return true if initialization succeeds, false otherwise. - - */ - return card.init(SPI_HALF_SPEED, csPin) && - volume.init(card) && - root.openRoot(volume); -} - - - -// this little helper is used to traverse paths -SdFile SDClass::getParentDir(const char *filepath, int *index) { - // get parent directory - SdFile d1 = root; // start with the mostparent, root! - SdFile d2; - - // we'll use the pointers to swap between the two objects - SdFile *parent = &d1; - SdFile *subdir = &d2; - - const char *origpath = filepath; - - while (strchr(filepath, '/')) { - - // get rid of leading /'s - if (filepath[0] == '/') { - filepath++; - continue; - } - - if (! strchr(filepath, '/')) { - // it was in the root directory, so leave now - break; - } - - // extract just the name of the next subdirectory - uint8_t idx = strchr(filepath, '/') - filepath; - if (idx > 12) - idx = 12; // dont let them specify long names - char subdirname[13]; - strncpy(subdirname, filepath, idx); - subdirname[idx] = 0; - - // close the subdir (we reuse them) if open - subdir->close(); - if (! subdir->open(parent, subdirname, O_READ)) { - // failed to open one of the subdirectories - return SdFile(); - } - // move forward to the next subdirectory - filepath += idx; - - // we reuse the objects, close it. - parent->close(); - - // swap the pointers - SdFile *t = parent; - parent = subdir; - subdir = t; - } - - *index = (int)(filepath - origpath); - // parent is now the parent diretory of the file! - return *parent; -} - - -File SDClass::open(const char *filepath, uint8_t mode) { - /* - - Open the supplied file path for reading or writing. - - The file content can be accessed via the `file` property of - the `SDClass` object--this property is currently - a standard `SdFile` object from `sdfatlib`. - - Defaults to read only. - - If `write` is true, default action (when `append` is true) is to - append data to the end of the file. - - If `append` is false then the file will be truncated first. - - If the file does not exist and it is opened for writing the file - will be created. - - An attempt to open a file for reading that does not exist is an - error. - - */ - - int pathidx; - - // do the interative search - SdFile parentdir = getParentDir(filepath, &pathidx); - // no more subdirs! - - filepath += pathidx; - - if (! filepath[0]) { - // it was the directory itself! - return File(parentdir, "/"); - } - - // Open the file itself - SdFile file; - - // failed to open a subdir! - if (!parentdir.isOpen()) - return File(); - - // there is a special case for the Root directory since its a static dir - if (parentdir.isRoot()) { - if ( ! file.open(SD.root, filepath, mode)) { - // failed to open the file :( - return File(); - } - // dont close the root! - } else { - if ( ! file.open(parentdir, filepath, mode)) { - return File(); - } - // close the parent - parentdir.close(); - } - - if (mode & (O_APPEND | O_WRITE)) - file.seekSet(file.fileSize()); - return File(file, filepath); -} - - -/* -File SDClass::open(char *filepath, uint8_t mode) { - // - - Open the supplied file path for reading or writing. - - The file content can be accessed via the `file` property of - the `SDClass` object--this property is currently - a standard `SdFile` object from `sdfatlib`. - - Defaults to read only. - - If `write` is true, default action (when `append` is true) is to - append data to the end of the file. - - If `append` is false then the file will be truncated first. - - If the file does not exist and it is opened for writing the file - will be created. - - An attempt to open a file for reading that does not exist is an - error. - - // - - // TODO: Allow for read&write? (Possibly not, as it requires seek.) - - fileOpenMode = mode; - walkPath(filepath, root, callback_openPath, this); - - return File(); - -} -*/ - - -//boolean SDClass::close() { -// /* -// -// Closes the file opened by the `open` method. -// -// */ -// file.close(); -//} - - -boolean SDClass::exists(char *filepath) { - /* - - Returns true if the supplied file path exists. - - */ - return walkPath(filepath, root, callback_pathExists); -} - - -//boolean SDClass::exists(char *filepath, SdFile& parentDir) { -// /* -// -// Returns true if the supplied file path rooted at `parentDir` -// exists. -// -// */ -// return walkPath(filepath, parentDir, callback_pathExists); -//} - - -boolean SDClass::mkdir(char *filepath) { - /* - - Makes a single directory or a heirarchy of directories. - - A rough equivalent to `mkdir -p`. - - */ - return walkPath(filepath, root, callback_makeDirPath); -} - -boolean SDClass::rmdir(char *filepath) { - /* - - Makes a single directory or a heirarchy of directories. - - A rough equivalent to `mkdir -p`. - - */ - return walkPath(filepath, root, callback_rmdir); -} - -boolean SDClass::remove(char *filepath) { - return walkPath(filepath, root, callback_remove); -} - - -// allows you to recurse into a directory -File File::openNextFile(uint8_t mode) { - dir_t p; - - //Serial.print("\t\treading dir..."); - while (_file->readDir(&p) > 0) { - - // done if past last used entry - if (p.name[0] == DIR_NAME_FREE) { - //Serial.println("end"); - return File(); - } - - // skip deleted entry and entries for . and .. - if (p.name[0] == DIR_NAME_DELETED || p.name[0] == '.') { - //Serial.println("dots"); - continue; - } - - // only list subdirectories and files - if (!DIR_IS_FILE_OR_SUBDIR(&p)) { - //Serial.println("notafile"); - continue; - } - - // print file name with possible blank fill - SdFile f; - char name[13]; - _file->dirName(p, name); - //Serial.print("try to open file "); - //Serial.println(name); - - if (f.open(_file, name, mode)) { - //Serial.println("OK!"); - return File(f, name); - } else { - //Serial.println("ugh"); - return File(); - } - } - - //Serial.println("nothing"); - return File(); -} - -void File::rewindDirectory(void) { - if (isDirectory()) - _file->rewind(); -} - -SDClass SD; diff --git a/build/linux/work/libraries/SD/SD.h b/build/linux/work/libraries/SD/SD.h deleted file mode 100644 index f21ec0f29..000000000 --- a/build/linux/work/libraries/SD/SD.h +++ /dev/null @@ -1,103 +0,0 @@ -/* - - SD - a slightly more friendly wrapper for sdfatlib - - This library aims to expose a subset of SD card functionality - in the form of a higher level "wrapper" object. - - License: GNU General Public License V3 - (Because sdfatlib is licensed with this.) - - (C) Copyright 2010 SparkFun Electronics - - */ - -#ifndef __SD_H__ -#define __SD_H__ - -#include - -#include -#include - -#define FILE_READ O_READ -#define FILE_WRITE (O_READ | O_WRITE | O_CREAT) - -class File : public Stream { - private: - char _name[13]; // our name - SdFile *_file; // underlying file pointer - -public: - File(SdFile f, const char *name); // wraps an underlying SdFile - File(void); // 'empty' constructor - ~File(void); // destructor - virtual size_t write(uint8_t); - virtual size_t write(const uint8_t *buf, size_t size); - virtual int read(); - virtual int peek(); - virtual int available(); - virtual void flush(); - int read(void *buf, uint16_t nbyte); - boolean seek(uint32_t pos); - uint32_t position(); - uint32_t size(); - void close(); - operator bool(); - char * name(); - - boolean isDirectory(void); - File openNextFile(uint8_t mode = O_RDONLY); - void rewindDirectory(void); - - using Print::write; -}; - -class SDClass { - -private: - // These are required for initialisation and use of sdfatlib - Sd2Card card; - SdVolume volume; - SdFile root; - - // my quick&dirty iterator, should be replaced - SdFile getParentDir(const char *filepath, int *indx); -public: - // This needs to be called to set up the connection to the SD card - // before other methods are used. - boolean begin(uint8_t csPin = SD_CHIP_SELECT_PIN); - - // Open the specified file/directory with the supplied mode (e.g. read or - // write, etc). Returns a File object for interacting with the file. - // Note that currently only one file can be open at a time. - File open(const char *filename, uint8_t mode = FILE_READ); - - // Methods to determine if the requested file path exists. - boolean exists(char *filepath); - - // Create the requested directory heirarchy--if intermediate directories - // do not exist they will be created. - boolean mkdir(char *filepath); - - // Delete the file. - boolean remove(char *filepath); - - boolean rmdir(char *filepath); - -private: - - // This is used to determine the mode used to open a file - // it's here because it's the easiest place to pass the - // information through the directory walking function. But - // it's probably not the best place for it. - // It shouldn't be set directly--it is set via the parameters to `open`. - int fileOpenMode; - - friend class File; - friend boolean callback_openPath(SdFile&, char *, boolean, void *); -}; - -extern SDClass SD; - -#endif diff --git a/build/linux/work/libraries/SD/examples/CardInfo/CardInfo.ino b/build/linux/work/libraries/SD/examples/CardInfo/CardInfo.ino deleted file mode 100644 index 0fa864740..000000000 --- a/build/linux/work/libraries/SD/examples/CardInfo/CardInfo.ino +++ /dev/null @@ -1,116 +0,0 @@ -/* - SD card test - - This example shows how use the utility libraries on which the' - SD library is based in order to get info about your SD card. - Very useful for testing a card when you're not sure whether its working or not. - - The circuit: - * SD card attached to SPI bus as follows: - ** MOSI - pin 11 on Arduino Uno/Duemilanove/Diecimila - ** MISO - pin 12 on Arduino Uno/Duemilanove/Diecimila - ** CLK - pin 13 on Arduino Uno/Duemilanove/Diecimila - ** CS - depends on your SD card shield or module. - Pin 4 used here for consistency with other Arduino examples - - - created 28 Mar 2011 - by Limor Fried - modified 2 Apr 2012 - by Tom Igoe - */ - // include the SD library: -#include - -// set up variables using the SD utility library functions: -Sd2Card card; -SdVolume volume; -SdFile root; - -// change this to match your SD shield or module; -// Arduino Ethernet shield: pin 4 -// Adafruit SD shields and modules: pin 10 -// Sparkfun SD shield: pin 8 -const int chipSelect = 4; - -void setup() -{ - // Open serial communications and wait for port to open: - Serial.begin(9600); - // this check is only needed on the Leonardo: - while (!Serial) ; - ; - - Serial.print("\nInitializing SD card..."); - // On the Ethernet Shield, CS is pin 4. It's set as an output by default. - // Note that even if it's not used as the CS pin, the hardware SS pin - // (10 on most Arduino boards, 53 on the Mega) must be left as an output - // or the SD library functions will not work. - pinMode(10, OUTPUT); // change this to 53 on a mega - - - // we'll use the initialization code from the utility libraries - // since we're just testing if the card is working! - if (!card.init(SPI_HALF_SPEED, chipSelect)) { - Serial.println("initialization failed. Things to check:"); - Serial.println("* is a card is inserted?"); - Serial.println("* Is your wiring correct?"); - Serial.println("* did you change the chipSelect pin to match your shield or module?"); - return; - } else { - Serial.println("Wiring is correct and a card is present."); - } - - // print the type of card - Serial.print("\nCard type: "); - switch(card.type()) { - case SD_CARD_TYPE_SD1: - Serial.println("SD1"); - break; - case SD_CARD_TYPE_SD2: - Serial.println("SD2"); - break; - case SD_CARD_TYPE_SDHC: - Serial.println("SDHC"); - break; - default: - Serial.println("Unknown"); - } - - // Now we will try to open the 'volume'/'partition' - it should be FAT16 or FAT32 - if (!volume.init(card)) { - Serial.println("Could not find FAT16/FAT32 partition.\nMake sure you've formatted the card"); - return; - } - - - // print the type and size of the first FAT-type volume - uint32_t volumesize; - Serial.print("\nVolume type is FAT"); - Serial.println(volume.fatType(), DEC); - Serial.println(); - - volumesize = volume.blocksPerCluster(); // clusters are collections of blocks - volumesize *= volume.clusterCount(); // we'll have a lot of clusters - volumesize *= 512; // SD card blocks are always 512 bytes - Serial.print("Volume size (bytes): "); - Serial.println(volumesize); - Serial.print("Volume size (Kbytes): "); - volumesize /= 1024; - Serial.println(volumesize); - Serial.print("Volume size (Mbytes): "); - volumesize /= 1024; - Serial.println(volumesize); - - - Serial.println("\nFiles found on the card (name, date and size in bytes): "); - root.openRoot(volume); - - // list all files in the card with date and size - root.ls(LS_R | LS_DATE | LS_SIZE); -} - - -void loop(void) { - -} diff --git a/build/linux/work/libraries/SD/examples/Datalogger/Datalogger.ino b/build/linux/work/libraries/SD/examples/Datalogger/Datalogger.ino deleted file mode 100644 index 9e1d8e7ce..000000000 --- a/build/linux/work/libraries/SD/examples/Datalogger/Datalogger.ino +++ /dev/null @@ -1,91 +0,0 @@ -/* - SD card datalogger - - This example shows how to log data from three analog sensors - to an SD card using the SD library. - - The circuit: - * analog sensors on analog ins 0, 1, and 2 - * SD card attached to SPI bus as follows: - ** MOSI - pin 11 - ** MISO - pin 12 - ** CLK - pin 13 - ** CS - pin 4 - - created 24 Nov 2010 - modified 2 Apr 2012 - by Tom Igoe - - This example code is in the public domain. - - */ - -#include - -// On the Ethernet Shield, CS is pin 4. Note that even if it's not -// used as the CS pin, the hardware CS pin (10 on most Arduino boards, -// 53 on the Mega) must be left as an output or the SD library -// functions will not work. -const int chipSelect = 4; - -void setup() -{ - // Open serial communications and wait for port to open: - Serial.begin(9600); - // this check is only needed on the Leonardo: - while (!Serial) ; - ; - - Serial.print("Initializing SD card..."); - // make sure that the default chip select pin is set to - // output, even if you don't use it: - pinMode(10, OUTPUT); - - // see if the card is present and can be initialized: - if (!SD.begin(chipSelect)) { - Serial.println("Card failed, or not present"); - // don't do anything more: - return; - } - Serial.println("card initialized."); -} - -void loop() -{ - // make a string for assembling the data to log: - String dataString = ""; - - // read three sensors and append to the string: - for (int analogPin = 0; analogPin < 3; analogPin++) { - int sensor = analogRead(analogPin); - dataString += String(sensor); - if (analogPin < 2) { - dataString += ","; - } - } - - // open the file. note that only one file can be open at a time, - // so you have to close this one before opening another. - File dataFile = SD.open("datalog.txt", FILE_WRITE); - - // if the file is available, write to it: - if (dataFile) { - dataFile.println(dataString); - dataFile.close(); - // print to the serial port too: - Serial.println(dataString); - } - // if the file isn't open, pop up an error: - else { - Serial.println("error opening datalog.txt"); - } -} - - - - - - - - - diff --git a/build/linux/work/libraries/SD/examples/DumpFile/DumpFile.ino b/build/linux/work/libraries/SD/examples/DumpFile/DumpFile.ino deleted file mode 100644 index 9de34c4c8..000000000 --- a/build/linux/work/libraries/SD/examples/DumpFile/DumpFile.ino +++ /dev/null @@ -1,72 +0,0 @@ -/* - SD card file dump - - This example shows how to read a file from the SD card using the - SD library and send it over the serial port. - - The circuit: - * SD card attached to SPI bus as follows: - ** MOSI - pin 11 - ** MISO - pin 12 - ** CLK - pin 13 - ** CS - pin 4 - - created 22 December 2010 - by Limor Fried - modified 2 Apr 2012 - by Tom Igoe - - This example code is in the public domain. - - */ - -#include - -// On the Ethernet Shield, CS is pin 4. Note that even if it's not -// used as the CS pin, the hardware CS pin (10 on most Arduino boards, -// 53 on the Mega) must be left as an output or the SD library -// functions will not work. -const int chipSelect = 4; - -void setup() -{ - // Open serial communications and wait for port to open: - Serial.begin(9600); - // this check is only needed on the Leonardo: - while (!Serial) ; - ; - - Serial.print("Initializing SD card..."); - // make sure that the default chip select pin is set to - // output, even if you don't use it: - pinMode(10, OUTPUT); - - // see if the card is present and can be initialized: - if (!SD.begin(chipSelect)) { - Serial.println("Card failed, or not present"); - // don't do anything more: - return; - } - Serial.println("card initialized."); - - // open the file. note that only one file can be open at a time, - // so you have to close this one before opening another. - File dataFile = SD.open("datalog.txt"); - - // if the file is available, write to it: - if (dataFile) { - while (dataFile.available()) { - Serial.write(dataFile.read()); - } - dataFile.close(); - } - // if the file isn't open, pop up an error: - else { - Serial.println("error opening datalog.txt"); - } -} - -void loop() -{ -} - diff --git a/build/linux/work/libraries/SD/examples/Files/Files.ino b/build/linux/work/libraries/SD/examples/Files/Files.ino deleted file mode 100644 index 983c67fac..000000000 --- a/build/linux/work/libraries/SD/examples/Files/Files.ino +++ /dev/null @@ -1,83 +0,0 @@ -/* - SD card basic file example - - This example shows how to create and destroy an SD card file - The circuit: - * SD card attached to SPI bus as follows: - ** MOSI - pin 11 - ** MISO - pin 12 - ** CLK - pin 13 - ** CS - pin 4 - - created Nov 2010 - by David A. Mellis - modified 2 Apr 2012 - by Tom Igoe - - This example code is in the public domain. - - */ -#include - -File myFile; - -void setup() -{ - // Open serial communications and wait for port to open: - Serial.begin(9600); - // this check is only needed on the Leonardo: - while (!Serial) ; - ; - - Serial.print("Initializing SD card..."); - // On the Ethernet Shield, CS is pin 4. It's set as an output by default. - // Note that even if it's not used as the CS pin, the hardware SS pin - // (10 on most Arduino boards, 53 on the Mega) must be left as an output - // or the SD library functions will not work. - pinMode(10, OUTPUT); - - if (!SD.begin(4)) { - Serial.println("initialization failed!"); - return; - } - Serial.println("initialization done."); - - if (SD.exists("example.txt")) { - Serial.println("example.txt exists."); - } - else { - Serial.println("example.txt doesn't exist."); - } - - // open a new file and immediately close it: - Serial.println("Creating example.txt..."); - myFile = SD.open("example.txt", FILE_WRITE); - myFile.close(); - - // Check to see if the file exists: - if (SD.exists("example.txt")) { - Serial.println("example.txt exists."); - } - else { - Serial.println("example.txt doesn't exist."); - } - - // delete the file: - Serial.println("Removing example.txt..."); - SD.remove("example.txt"); - - if (SD.exists("example.txt")){ - Serial.println("example.txt exists."); - } - else { - Serial.println("example.txt doesn't exist."); - } -} - -void loop() -{ - // nothing happens after setup finishes. -} - - - diff --git a/build/linux/work/libraries/SD/examples/ReadWrite/ReadWrite.ino b/build/linux/work/libraries/SD/examples/ReadWrite/ReadWrite.ino deleted file mode 100644 index 5d1037404..000000000 --- a/build/linux/work/libraries/SD/examples/ReadWrite/ReadWrite.ino +++ /dev/null @@ -1,84 +0,0 @@ -/* - SD card read/write - - This example shows how to read and write data to and from an SD card file - The circuit: - * SD card attached to SPI bus as follows: - ** MOSI - pin 11 - ** MISO - pin 12 - ** CLK - pin 13 - ** CS - pin 4 - - created Nov 2010 - by David A. Mellis - modified 2 Apr 2012 - by Tom Igoe - - This example code is in the public domain. - - */ - -#include - -File myFile; - -void setup() -{ - // Open serial communications and wait for port to open: - Serial.begin(9600); - // this check is only needed on the Leonardo: - while (!Serial) ; - ; - - Serial.print("Initializing SD card..."); - // On the Ethernet Shield, CS is pin 4. It's set as an output by default. - // Note that even if it's not used as the CS pin, the hardware SS pin - // (10 on most Arduino boards, 53 on the Mega) must be left as an output - // or the SD library functions will not work. - pinMode(10, OUTPUT); - - if (!SD.begin(4)) { - Serial.println("initialization failed!"); - return; - } - Serial.println("initialization done."); - - // open the file. note that only one file can be open at a time, - // so you have to close this one before opening another. - myFile = SD.open("test.txt", FILE_WRITE); - - // if the file opened okay, write to it: - if (myFile) { - Serial.print("Writing to test.txt..."); - myFile.println("testing 1, 2, 3."); - // close the file: - myFile.close(); - Serial.println("done."); - } else { - // if the file didn't open, print an error: - Serial.println("error opening test.txt"); - } - - // re-open the file for reading: - myFile = SD.open("test.txt"); - if (myFile) { - Serial.println("test.txt:"); - - // read from the file until there's nothing else in it: - while (myFile.available()) { - Serial.write(myFile.read()); - } - // close the file: - myFile.close(); - } else { - // if the file didn't open, print an error: - Serial.println("error opening test.txt"); - } -} - -void loop() -{ - // nothing happens after setup -} - - diff --git a/build/linux/work/libraries/SD/examples/listfiles/listfiles.ino b/build/linux/work/libraries/SD/examples/listfiles/listfiles.ino deleted file mode 100644 index 1faef1184..000000000 --- a/build/linux/work/libraries/SD/examples/listfiles/listfiles.ino +++ /dev/null @@ -1,82 +0,0 @@ -/* - SD card basic file example - - This example shows how to create and destroy an SD card file - The circuit: - * SD card attached to SPI bus as follows: - ** MOSI - pin 11 - ** MISO - pin 12 - ** CLK - pin 13 - ** CS - pin 4 - - created Nov 2010 - by David A. Mellis - modified 2 Apr 2012 - by Tom Igoe - - This example code is in the public domain. - - */ -#include - -File root; - -void setup() -{ - // Open serial communications and wait for port to open: - Serial.begin(9600); - // this check is only needed on the Leonardo: - while (!Serial) ; - ; - - Serial.print("Initializing SD card..."); - // On the Ethernet Shield, CS is pin 4. It's set as an output by default. - // Note that even if it's not used as the CS pin, the hardware SS pin - // (10 on most Arduino boards, 53 on the Mega) must be left as an output - // or the SD library functions will not work. - pinMode(10, OUTPUT); - - if (!SD.begin(10)) { - Serial.println("initialization failed!"); - return; - } - Serial.println("initialization done."); - - root = SD.open("/"); - - printDirectory(root, 0); - - Serial.println("done!"); -} - -void loop() -{ - // nothing happens after setup finishes. -} - -void printDirectory(File dir, int numTabs) { - while(true) { - - File entry = dir.openNextFile(); - if (! entry) { - // no more files - //Serial.println("**nomorefiles**"); - break; - } - for (uint8_t i=0; i. - */ -#ifndef FatStructs_h -#define FatStructs_h -/** - * \file - * FAT file structures - */ -/* - * mostly from Microsoft document fatgen103.doc - * http://www.microsoft.com/whdc/system/platform/firmware/fatgen.mspx - */ -//------------------------------------------------------------------------------ -/** Value for byte 510 of boot block or MBR */ -uint8_t const BOOTSIG0 = 0X55; -/** Value for byte 511 of boot block or MBR */ -uint8_t const BOOTSIG1 = 0XAA; -//------------------------------------------------------------------------------ -/** - * \struct partitionTable - * \brief MBR partition table entry - * - * A partition table entry for a MBR formatted storage device. - * The MBR partition table has four entries. - */ -struct partitionTable { - /** - * Boot Indicator . Indicates whether the volume is the active - * partition. Legal values include: 0X00. Do not use for booting. - * 0X80 Active partition. - */ - uint8_t boot; - /** - * Head part of Cylinder-head-sector address of the first block in - * the partition. Legal values are 0-255. Only used in old PC BIOS. - */ - uint8_t beginHead; - /** - * Sector part of Cylinder-head-sector address of the first block in - * the partition. Legal values are 1-63. Only used in old PC BIOS. - */ - unsigned beginSector : 6; - /** High bits cylinder for first block in partition. */ - unsigned beginCylinderHigh : 2; - /** - * Combine beginCylinderLow with beginCylinderHigh. Legal values - * are 0-1023. Only used in old PC BIOS. - */ - uint8_t beginCylinderLow; - /** - * Partition type. See defines that begin with PART_TYPE_ for - * some Microsoft partition types. - */ - uint8_t type; - /** - * head part of cylinder-head-sector address of the last sector in the - * partition. Legal values are 0-255. Only used in old PC BIOS. - */ - uint8_t endHead; - /** - * Sector part of cylinder-head-sector address of the last sector in - * the partition. Legal values are 1-63. Only used in old PC BIOS. - */ - unsigned endSector : 6; - /** High bits of end cylinder */ - unsigned endCylinderHigh : 2; - /** - * Combine endCylinderLow with endCylinderHigh. Legal values - * are 0-1023. Only used in old PC BIOS. - */ - uint8_t endCylinderLow; - /** Logical block address of the first block in the partition. */ - uint32_t firstSector; - /** Length of the partition, in blocks. */ - uint32_t totalSectors; -}; -/** Type name for partitionTable */ -typedef struct partitionTable part_t; -//------------------------------------------------------------------------------ -/** - * \struct masterBootRecord - * - * \brief Master Boot Record - * - * The first block of a storage device that is formatted with a MBR. - */ -struct masterBootRecord { - /** Code Area for master boot program. */ - uint8_t codeArea[440]; - /** Optional WindowsNT disk signature. May contain more boot code. */ - uint32_t diskSignature; - /** Usually zero but may be more boot code. */ - uint16_t usuallyZero; - /** Partition tables. */ - part_t part[4]; - /** First MBR signature byte. Must be 0X55 */ - uint8_t mbrSig0; - /** Second MBR signature byte. Must be 0XAA */ - uint8_t mbrSig1; -}; -/** Type name for masterBootRecord */ -typedef struct masterBootRecord mbr_t; -//------------------------------------------------------------------------------ -/** - * \struct biosParmBlock - * - * \brief BIOS parameter block - * - * The BIOS parameter block describes the physical layout of a FAT volume. - */ -struct biosParmBlock { - /** - * Count of bytes per sector. This value may take on only the - * following values: 512, 1024, 2048 or 4096 - */ - uint16_t bytesPerSector; - /** - * Number of sectors per allocation unit. This value must be a - * power of 2 that is greater than 0. The legal values are - * 1, 2, 4, 8, 16, 32, 64, and 128. - */ - uint8_t sectorsPerCluster; - /** - * Number of sectors before the first FAT. - * This value must not be zero. - */ - uint16_t reservedSectorCount; - /** The count of FAT data structures on the volume. This field should - * always contain the value 2 for any FAT volume of any type. - */ - uint8_t fatCount; - /** - * For FAT12 and FAT16 volumes, this field contains the count of - * 32-byte directory entries in the root directory. For FAT32 volumes, - * this field must be set to 0. For FAT12 and FAT16 volumes, this - * value should always specify a count that when multiplied by 32 - * results in a multiple of bytesPerSector. FAT16 volumes should - * use the value 512. - */ - uint16_t rootDirEntryCount; - /** - * This field is the old 16-bit total count of sectors on the volume. - * This count includes the count of all sectors in all four regions - * of the volume. This field can be 0; if it is 0, then totalSectors32 - * must be non-zero. For FAT32 volumes, this field must be 0. For - * FAT12 and FAT16 volumes, this field contains the sector count, and - * totalSectors32 is 0 if the total sector count fits - * (is less than 0x10000). - */ - uint16_t totalSectors16; - /** - * This dates back to the old MS-DOS 1.x media determination and is - * no longer usually used for anything. 0xF8 is the standard value - * for fixed (non-removable) media. For removable media, 0xF0 is - * frequently used. Legal values are 0xF0 or 0xF8-0xFF. - */ - uint8_t mediaType; - /** - * Count of sectors occupied by one FAT on FAT12/FAT16 volumes. - * On FAT32 volumes this field must be 0, and sectorsPerFat32 - * contains the FAT size count. - */ - uint16_t sectorsPerFat16; - /** Sectors per track for interrupt 0x13. Not used otherwise. */ - uint16_t sectorsPerTrtack; - /** Number of heads for interrupt 0x13. Not used otherwise. */ - uint16_t headCount; - /** - * Count of hidden sectors preceding the partition that contains this - * FAT volume. This field is generally only relevant for media - * visible on interrupt 0x13. - */ - uint32_t hidddenSectors; - /** - * This field is the new 32-bit total count of sectors on the volume. - * This count includes the count of all sectors in all four regions - * of the volume. This field can be 0; if it is 0, then - * totalSectors16 must be non-zero. - */ - uint32_t totalSectors32; - /** - * Count of sectors occupied by one FAT on FAT32 volumes. - */ - uint32_t sectorsPerFat32; - /** - * This field is only defined for FAT32 media and does not exist on - * FAT12 and FAT16 media. - * Bits 0-3 -- Zero-based number of active FAT. - * Only valid if mirroring is disabled. - * Bits 4-6 -- Reserved. - * Bit 7 -- 0 means the FAT is mirrored at runtime into all FATs. - * -- 1 means only one FAT is active; it is the one referenced in bits 0-3. - * Bits 8-15 -- Reserved. - */ - uint16_t fat32Flags; - /** - * FAT32 version. High byte is major revision number. - * Low byte is minor revision number. Only 0.0 define. - */ - uint16_t fat32Version; - /** - * Cluster number of the first cluster of the root directory for FAT32. - * This usually 2 but not required to be 2. - */ - uint32_t fat32RootCluster; - /** - * Sector number of FSINFO structure in the reserved area of the - * FAT32 volume. Usually 1. - */ - uint16_t fat32FSInfo; - /** - * If non-zero, indicates the sector number in the reserved area - * of the volume of a copy of the boot record. Usually 6. - * No value other than 6 is recommended. - */ - uint16_t fat32BackBootBlock; - /** - * Reserved for future expansion. Code that formats FAT32 volumes - * should always set all of the bytes of this field to 0. - */ - uint8_t fat32Reserved[12]; -}; -/** Type name for biosParmBlock */ -typedef struct biosParmBlock bpb_t; -//------------------------------------------------------------------------------ -/** - * \struct fat32BootSector - * - * \brief Boot sector for a FAT16 or FAT32 volume. - * - */ -struct fat32BootSector { - /** X86 jmp to boot program */ - uint8_t jmpToBootCode[3]; - /** informational only - don't depend on it */ - char oemName[8]; - /** BIOS Parameter Block */ - bpb_t bpb; - /** for int0x13 use value 0X80 for hard drive */ - uint8_t driveNumber; - /** used by Windows NT - should be zero for FAT */ - uint8_t reserved1; - /** 0X29 if next three fields are valid */ - uint8_t bootSignature; - /** usually generated by combining date and time */ - uint32_t volumeSerialNumber; - /** should match volume label in root dir */ - char volumeLabel[11]; - /** informational only - don't depend on it */ - char fileSystemType[8]; - /** X86 boot code */ - uint8_t bootCode[420]; - /** must be 0X55 */ - uint8_t bootSectorSig0; - /** must be 0XAA */ - uint8_t bootSectorSig1; -}; -//------------------------------------------------------------------------------ -// End Of Chain values for FAT entries -/** FAT16 end of chain value used by Microsoft. */ -uint16_t const FAT16EOC = 0XFFFF; -/** Minimum value for FAT16 EOC. Use to test for EOC. */ -uint16_t const FAT16EOC_MIN = 0XFFF8; -/** FAT32 end of chain value used by Microsoft. */ -uint32_t const FAT32EOC = 0X0FFFFFFF; -/** Minimum value for FAT32 EOC. Use to test for EOC. */ -uint32_t const FAT32EOC_MIN = 0X0FFFFFF8; -/** Mask a for FAT32 entry. Entries are 28 bits. */ -uint32_t const FAT32MASK = 0X0FFFFFFF; - -/** Type name for fat32BootSector */ -typedef struct fat32BootSector fbs_t; -//------------------------------------------------------------------------------ -/** - * \struct directoryEntry - * \brief FAT short directory entry - * - * Short means short 8.3 name, not the entry size. - * - * Date Format. A FAT directory entry date stamp is a 16-bit field that is - * basically a date relative to the MS-DOS epoch of 01/01/1980. Here is the - * format (bit 0 is the LSB of the 16-bit word, bit 15 is the MSB of the - * 16-bit word): - * - * Bits 9-15: Count of years from 1980, valid value range 0-127 - * inclusive (1980-2107). - * - * Bits 5-8: Month of year, 1 = January, valid value range 1-12 inclusive. - * - * Bits 0-4: Day of month, valid value range 1-31 inclusive. - * - * Time Format. A FAT directory entry time stamp is a 16-bit field that has - * a granularity of 2 seconds. Here is the format (bit 0 is the LSB of the - * 16-bit word, bit 15 is the MSB of the 16-bit word). - * - * Bits 11-15: Hours, valid value range 0-23 inclusive. - * - * Bits 5-10: Minutes, valid value range 0-59 inclusive. - * - * Bits 0-4: 2-second count, valid value range 0-29 inclusive (0 - 58 seconds). - * - * The valid time range is from Midnight 00:00:00 to 23:59:58. - */ -struct directoryEntry { - /** - * Short 8.3 name. - * The first eight bytes contain the file name with blank fill. - * The last three bytes contain the file extension with blank fill. - */ - uint8_t name[11]; - /** Entry attributes. - * - * The upper two bits of the attribute byte are reserved and should - * always be set to 0 when a file is created and never modified or - * looked at after that. See defines that begin with DIR_ATT_. - */ - uint8_t attributes; - /** - * Reserved for use by Windows NT. Set value to 0 when a file is - * created and never modify or look at it after that. - */ - uint8_t reservedNT; - /** - * The granularity of the seconds part of creationTime is 2 seconds - * so this field is a count of tenths of a second and its valid - * value range is 0-199 inclusive. (WHG note - seems to be hundredths) - */ - uint8_t creationTimeTenths; - /** Time file was created. */ - uint16_t creationTime; - /** Date file was created. */ - uint16_t creationDate; - /** - * Last access date. Note that there is no last access time, only - * a date. This is the date of last read or write. In the case of - * a write, this should be set to the same date as lastWriteDate. - */ - uint16_t lastAccessDate; - /** - * High word of this entry's first cluster number (always 0 for a - * FAT12 or FAT16 volume). - */ - uint16_t firstClusterHigh; - /** Time of last write. File creation is considered a write. */ - uint16_t lastWriteTime; - /** Date of last write. File creation is considered a write. */ - uint16_t lastWriteDate; - /** Low word of this entry's first cluster number. */ - uint16_t firstClusterLow; - /** 32-bit unsigned holding this file's size in bytes. */ - uint32_t fileSize; -}; -//------------------------------------------------------------------------------ -// Definitions for directory entries -// -/** Type name for directoryEntry */ -typedef struct directoryEntry dir_t; -/** escape for name[0] = 0XE5 */ -uint8_t const DIR_NAME_0XE5 = 0X05; -/** name[0] value for entry that is free after being "deleted" */ -uint8_t const DIR_NAME_DELETED = 0XE5; -/** name[0] value for entry that is free and no allocated entries follow */ -uint8_t const DIR_NAME_FREE = 0X00; -/** file is read-only */ -uint8_t const DIR_ATT_READ_ONLY = 0X01; -/** File should hidden in directory listings */ -uint8_t const DIR_ATT_HIDDEN = 0X02; -/** Entry is for a system file */ -uint8_t const DIR_ATT_SYSTEM = 0X04; -/** Directory entry contains the volume label */ -uint8_t const DIR_ATT_VOLUME_ID = 0X08; -/** Entry is for a directory */ -uint8_t const DIR_ATT_DIRECTORY = 0X10; -/** Old DOS archive bit for backup support */ -uint8_t const DIR_ATT_ARCHIVE = 0X20; -/** Test value for long name entry. Test is - (d->attributes & DIR_ATT_LONG_NAME_MASK) == DIR_ATT_LONG_NAME. */ -uint8_t const DIR_ATT_LONG_NAME = 0X0F; -/** Test mask for long name entry */ -uint8_t const DIR_ATT_LONG_NAME_MASK = 0X3F; -/** defined attribute bits */ -uint8_t const DIR_ATT_DEFINED_BITS = 0X3F; -/** Directory entry is part of a long name */ -static inline uint8_t DIR_IS_LONG_NAME(const dir_t* dir) { - return (dir->attributes & DIR_ATT_LONG_NAME_MASK) == DIR_ATT_LONG_NAME; -} -/** Mask for file/subdirectory tests */ -uint8_t const DIR_ATT_FILE_TYPE_MASK = (DIR_ATT_VOLUME_ID | DIR_ATT_DIRECTORY); -/** Directory entry is for a file */ -static inline uint8_t DIR_IS_FILE(const dir_t* dir) { - return (dir->attributes & DIR_ATT_FILE_TYPE_MASK) == 0; -} -/** Directory entry is for a subdirectory */ -static inline uint8_t DIR_IS_SUBDIR(const dir_t* dir) { - return (dir->attributes & DIR_ATT_FILE_TYPE_MASK) == DIR_ATT_DIRECTORY; -} -/** Directory entry is for a file or subdirectory */ -static inline uint8_t DIR_IS_FILE_OR_SUBDIR(const dir_t* dir) { - return (dir->attributes & DIR_ATT_VOLUME_ID) == 0; -} -#endif // FatStructs_h diff --git a/build/linux/work/libraries/SD/utility/Sd2Card.cpp b/build/linux/work/libraries/SD/utility/Sd2Card.cpp deleted file mode 100644 index 361cd0a06..000000000 --- a/build/linux/work/libraries/SD/utility/Sd2Card.cpp +++ /dev/null @@ -1,644 +0,0 @@ -/* Arduino Sd2Card Library - * Copyright (C) 2009 by William Greiman - * - * This file is part of the Arduino Sd2Card Library - * - * This Library is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This Library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with the Arduino Sd2Card Library. If not, see - * . - */ -#include -#include "Sd2Card.h" -//------------------------------------------------------------------------------ -#ifndef SOFTWARE_SPI -// functions for hardware SPI -/** Send a byte to the card */ -static void spiSend(uint8_t b) { - SPDR = b; - while (!(SPSR & (1 << SPIF))); -} -/** Receive a byte from the card */ -static uint8_t spiRec(void) { - spiSend(0XFF); - return SPDR; -} -#else // SOFTWARE_SPI -//------------------------------------------------------------------------------ -/** nop to tune soft SPI timing */ -#define nop asm volatile ("nop\n\t") -//------------------------------------------------------------------------------ -/** Soft SPI receive */ -uint8_t spiRec(void) { - uint8_t data = 0; - // no interrupts during byte receive - about 8 us - cli(); - // output pin high - like sending 0XFF - fastDigitalWrite(SPI_MOSI_PIN, HIGH); - - for (uint8_t i = 0; i < 8; i++) { - fastDigitalWrite(SPI_SCK_PIN, HIGH); - - // adjust so SCK is nice - nop; - nop; - - data <<= 1; - - if (fastDigitalRead(SPI_MISO_PIN)) data |= 1; - - fastDigitalWrite(SPI_SCK_PIN, LOW); - } - // enable interrupts - sei(); - return data; -} -//------------------------------------------------------------------------------ -/** Soft SPI send */ -void spiSend(uint8_t data) { - // no interrupts during byte send - about 8 us - cli(); - for (uint8_t i = 0; i < 8; i++) { - fastDigitalWrite(SPI_SCK_PIN, LOW); - - fastDigitalWrite(SPI_MOSI_PIN, data & 0X80); - - data <<= 1; - - fastDigitalWrite(SPI_SCK_PIN, HIGH); - } - // hold SCK high for a few ns - nop; - nop; - nop; - nop; - - fastDigitalWrite(SPI_SCK_PIN, LOW); - // enable interrupts - sei(); -} -#endif // SOFTWARE_SPI -//------------------------------------------------------------------------------ -// send command and return error code. Return zero for OK -uint8_t Sd2Card::cardCommand(uint8_t cmd, uint32_t arg) { - // end read if in partialBlockRead mode - readEnd(); - - // select card - chipSelectLow(); - - // wait up to 300 ms if busy - waitNotBusy(300); - - // send command - spiSend(cmd | 0x40); - - // send argument - for (int8_t s = 24; s >= 0; s -= 8) spiSend(arg >> s); - - // send CRC - uint8_t crc = 0XFF; - if (cmd == CMD0) crc = 0X95; // correct crc for CMD0 with arg 0 - if (cmd == CMD8) crc = 0X87; // correct crc for CMD8 with arg 0X1AA - spiSend(crc); - - // wait for response - for (uint8_t i = 0; ((status_ = spiRec()) & 0X80) && i != 0XFF; i++); - return status_; -} -//------------------------------------------------------------------------------ -/** - * Determine the size of an SD flash memory card. - * - * \return The number of 512 byte data blocks in the card - * or zero if an error occurs. - */ -uint32_t Sd2Card::cardSize(void) { - csd_t csd; - if (!readCSD(&csd)) return 0; - if (csd.v1.csd_ver == 0) { - uint8_t read_bl_len = csd.v1.read_bl_len; - uint16_t c_size = (csd.v1.c_size_high << 10) - | (csd.v1.c_size_mid << 2) | csd.v1.c_size_low; - uint8_t c_size_mult = (csd.v1.c_size_mult_high << 1) - | csd.v1.c_size_mult_low; - return (uint32_t)(c_size + 1) << (c_size_mult + read_bl_len - 7); - } else if (csd.v2.csd_ver == 1) { - uint32_t c_size = ((uint32_t)csd.v2.c_size_high << 16) - | (csd.v2.c_size_mid << 8) | csd.v2.c_size_low; - return (c_size + 1) << 10; - } else { - error(SD_CARD_ERROR_BAD_CSD); - return 0; - } -} -//------------------------------------------------------------------------------ -void Sd2Card::chipSelectHigh(void) { - digitalWrite(chipSelectPin_, HIGH); -} -//------------------------------------------------------------------------------ -void Sd2Card::chipSelectLow(void) { - digitalWrite(chipSelectPin_, LOW); -} -//------------------------------------------------------------------------------ -/** Erase a range of blocks. - * - * \param[in] firstBlock The address of the first block in the range. - * \param[in] lastBlock The address of the last block in the range. - * - * \note This function requests the SD card to do a flash erase for a - * range of blocks. The data on the card after an erase operation is - * either 0 or 1, depends on the card vendor. The card must support - * single block erase. - * - * \return The value one, true, is returned for success and - * the value zero, false, is returned for failure. - */ -uint8_t Sd2Card::erase(uint32_t firstBlock, uint32_t lastBlock) { - if (!eraseSingleBlockEnable()) { - error(SD_CARD_ERROR_ERASE_SINGLE_BLOCK); - goto fail; - } - if (type_ != SD_CARD_TYPE_SDHC) { - firstBlock <<= 9; - lastBlock <<= 9; - } - if (cardCommand(CMD32, firstBlock) - || cardCommand(CMD33, lastBlock) - || cardCommand(CMD38, 0)) { - error(SD_CARD_ERROR_ERASE); - goto fail; - } - if (!waitNotBusy(SD_ERASE_TIMEOUT)) { - error(SD_CARD_ERROR_ERASE_TIMEOUT); - goto fail; - } - chipSelectHigh(); - return true; - - fail: - chipSelectHigh(); - return false; -} -//------------------------------------------------------------------------------ -/** Determine if card supports single block erase. - * - * \return The value one, true, is returned if single block erase is supported. - * The value zero, false, is returned if single block erase is not supported. - */ -uint8_t Sd2Card::eraseSingleBlockEnable(void) { - csd_t csd; - return readCSD(&csd) ? csd.v1.erase_blk_en : 0; -} -//------------------------------------------------------------------------------ -/** - * Initialize an SD flash memory card. - * - * \param[in] sckRateID SPI clock rate selector. See setSckRate(). - * \param[in] chipSelectPin SD chip select pin number. - * - * \return The value one, true, is returned for success and - * the value zero, false, is returned for failure. The reason for failure - * can be determined by calling errorCode() and errorData(). - */ -uint8_t Sd2Card::init(uint8_t sckRateID, uint8_t chipSelectPin) { - errorCode_ = inBlock_ = partialBlockRead_ = type_ = 0; - chipSelectPin_ = chipSelectPin; - // 16-bit init start time allows over a minute - uint16_t t0 = (uint16_t)millis(); - uint32_t arg; - - // set pin modes - pinMode(chipSelectPin_, OUTPUT); - chipSelectHigh(); - pinMode(SPI_MISO_PIN, INPUT); - pinMode(SPI_MOSI_PIN, OUTPUT); - pinMode(SPI_SCK_PIN, OUTPUT); - -#ifndef SOFTWARE_SPI - // SS must be in output mode even it is not chip select - pinMode(SS_PIN, OUTPUT); - digitalWrite(SS_PIN, HIGH); // disable any SPI device using hardware SS pin - // Enable SPI, Master, clock rate f_osc/128 - SPCR = (1 << SPE) | (1 << MSTR) | (1 << SPR1) | (1 << SPR0); - // clear double speed - SPSR &= ~(1 << SPI2X); -#endif // SOFTWARE_SPI - - // must supply min of 74 clock cycles with CS high. - for (uint8_t i = 0; i < 10; i++) spiSend(0XFF); - - chipSelectLow(); - - // command to go idle in SPI mode - while ((status_ = cardCommand(CMD0, 0)) != R1_IDLE_STATE) { - if (((uint16_t)millis() - t0) > SD_INIT_TIMEOUT) { - error(SD_CARD_ERROR_CMD0); - goto fail; - } - } - // check SD version - if ((cardCommand(CMD8, 0x1AA) & R1_ILLEGAL_COMMAND)) { - type(SD_CARD_TYPE_SD1); - } else { - // only need last byte of r7 response - for (uint8_t i = 0; i < 4; i++) status_ = spiRec(); - if (status_ != 0XAA) { - error(SD_CARD_ERROR_CMD8); - goto fail; - } - type(SD_CARD_TYPE_SD2); - } - // initialize card and send host supports SDHC if SD2 - arg = type() == SD_CARD_TYPE_SD2 ? 0X40000000 : 0; - - while ((status_ = cardAcmd(ACMD41, arg)) != R1_READY_STATE) { - // check for timeout - if (((uint16_t)millis() - t0) > SD_INIT_TIMEOUT) { - error(SD_CARD_ERROR_ACMD41); - goto fail; - } - } - // if SD2 read OCR register to check for SDHC card - if (type() == SD_CARD_TYPE_SD2) { - if (cardCommand(CMD58, 0)) { - error(SD_CARD_ERROR_CMD58); - goto fail; - } - if ((spiRec() & 0XC0) == 0XC0) type(SD_CARD_TYPE_SDHC); - // discard rest of ocr - contains allowed voltage range - for (uint8_t i = 0; i < 3; i++) spiRec(); - } - chipSelectHigh(); - -#ifndef SOFTWARE_SPI - return setSckRate(sckRateID); -#else // SOFTWARE_SPI - return true; -#endif // SOFTWARE_SPI - - fail: - chipSelectHigh(); - return false; -} -//------------------------------------------------------------------------------ -/** - * Enable or disable partial block reads. - * - * Enabling partial block reads improves performance by allowing a block - * to be read over the SPI bus as several sub-blocks. Errors may occur - * if the time between reads is too long since the SD card may timeout. - * The SPI SS line will be held low until the entire block is read or - * readEnd() is called. - * - * Use this for applications like the Adafruit Wave Shield. - * - * \param[in] value The value TRUE (non-zero) or FALSE (zero).) - */ -void Sd2Card::partialBlockRead(uint8_t value) { - readEnd(); - partialBlockRead_ = value; -} -//------------------------------------------------------------------------------ -/** - * Read a 512 byte block from an SD card device. - * - * \param[in] block Logical block to be read. - * \param[out] dst Pointer to the location that will receive the data. - - * \return The value one, true, is returned for success and - * the value zero, false, is returned for failure. - */ -uint8_t Sd2Card::readBlock(uint32_t block, uint8_t* dst) { - return readData(block, 0, 512, dst); -} -//------------------------------------------------------------------------------ -/** - * Read part of a 512 byte block from an SD card. - * - * \param[in] block Logical block to be read. - * \param[in] offset Number of bytes to skip at start of block - * \param[out] dst Pointer to the location that will receive the data. - * \param[in] count Number of bytes to read - * \return The value one, true, is returned for success and - * the value zero, false, is returned for failure. - */ -uint8_t Sd2Card::readData(uint32_t block, - uint16_t offset, uint16_t count, uint8_t* dst) { - uint16_t n; - if (count == 0) return true; - if ((count + offset) > 512) { - goto fail; - } - if (!inBlock_ || block != block_ || offset < offset_) { - block_ = block; - // use address if not SDHC card - if (type()!= SD_CARD_TYPE_SDHC) block <<= 9; - if (cardCommand(CMD17, block)) { - error(SD_CARD_ERROR_CMD17); - goto fail; - } - if (!waitStartBlock()) { - goto fail; - } - offset_ = 0; - inBlock_ = 1; - } - -#ifdef OPTIMIZE_HARDWARE_SPI - // start first spi transfer - SPDR = 0XFF; - - // skip data before offset - for (;offset_ < offset; offset_++) { - while (!(SPSR & (1 << SPIF))); - SPDR = 0XFF; - } - // transfer data - n = count - 1; - for (uint16_t i = 0; i < n; i++) { - while (!(SPSR & (1 << SPIF))); - dst[i] = SPDR; - SPDR = 0XFF; - } - // wait for last byte - while (!(SPSR & (1 << SPIF))); - dst[n] = SPDR; - -#else // OPTIMIZE_HARDWARE_SPI - - // skip data before offset - for (;offset_ < offset; offset_++) { - spiRec(); - } - // transfer data - for (uint16_t i = 0; i < count; i++) { - dst[i] = spiRec(); - } -#endif // OPTIMIZE_HARDWARE_SPI - - offset_ += count; - if (!partialBlockRead_ || offset_ >= 512) { - // read rest of data, checksum and set chip select high - readEnd(); - } - return true; - - fail: - chipSelectHigh(); - return false; -} -//------------------------------------------------------------------------------ -/** Skip remaining data in a block when in partial block read mode. */ -void Sd2Card::readEnd(void) { - if (inBlock_) { - // skip data and crc -#ifdef OPTIMIZE_HARDWARE_SPI - // optimize skip for hardware - SPDR = 0XFF; - while (offset_++ < 513) { - while (!(SPSR & (1 << SPIF))); - SPDR = 0XFF; - } - // wait for last crc byte - while (!(SPSR & (1 << SPIF))); -#else // OPTIMIZE_HARDWARE_SPI - while (offset_++ < 514) spiRec(); -#endif // OPTIMIZE_HARDWARE_SPI - chipSelectHigh(); - inBlock_ = 0; - } -} -//------------------------------------------------------------------------------ -/** read CID or CSR register */ -uint8_t Sd2Card::readRegister(uint8_t cmd, void* buf) { - uint8_t* dst = reinterpret_cast(buf); - if (cardCommand(cmd, 0)) { - error(SD_CARD_ERROR_READ_REG); - goto fail; - } - if (!waitStartBlock()) goto fail; - // transfer data - for (uint16_t i = 0; i < 16; i++) dst[i] = spiRec(); - spiRec(); // get first crc byte - spiRec(); // get second crc byte - chipSelectHigh(); - return true; - - fail: - chipSelectHigh(); - return false; -} -//------------------------------------------------------------------------------ -/** - * Set the SPI clock rate. - * - * \param[in] sckRateID A value in the range [0, 6]. - * - * The SPI clock will be set to F_CPU/pow(2, 1 + sckRateID). The maximum - * SPI rate is F_CPU/2 for \a sckRateID = 0 and the minimum rate is F_CPU/128 - * for \a scsRateID = 6. - * - * \return The value one, true, is returned for success and the value zero, - * false, is returned for an invalid value of \a sckRateID. - */ -uint8_t Sd2Card::setSckRate(uint8_t sckRateID) { - if (sckRateID > 6) { - error(SD_CARD_ERROR_SCK_RATE); - return false; - } - // see avr processor datasheet for SPI register bit definitions - if ((sckRateID & 1) || sckRateID == 6) { - SPSR &= ~(1 << SPI2X); - } else { - SPSR |= (1 << SPI2X); - } - SPCR &= ~((1 < SD_READ_TIMEOUT) { - error(SD_CARD_ERROR_READ_TIMEOUT); - goto fail; - } - } - if (status_ != DATA_START_BLOCK) { - error(SD_CARD_ERROR_READ); - goto fail; - } - return true; - - fail: - chipSelectHigh(); - return false; -} -//------------------------------------------------------------------------------ -/** - * Writes a 512 byte block to an SD card. - * - * \param[in] blockNumber Logical block to be written. - * \param[in] src Pointer to the location of the data to be written. - * \return The value one, true, is returned for success and - * the value zero, false, is returned for failure. - */ -uint8_t Sd2Card::writeBlock(uint32_t blockNumber, const uint8_t* src) { -#if SD_PROTECT_BLOCK_ZERO - // don't allow write to first block - if (blockNumber == 0) { - error(SD_CARD_ERROR_WRITE_BLOCK_ZERO); - goto fail; - } -#endif // SD_PROTECT_BLOCK_ZERO - - // use address if not SDHC card - if (type() != SD_CARD_TYPE_SDHC) blockNumber <<= 9; - if (cardCommand(CMD24, blockNumber)) { - error(SD_CARD_ERROR_CMD24); - goto fail; - } - if (!writeData(DATA_START_BLOCK, src)) goto fail; - - // wait for flash programming to complete - if (!waitNotBusy(SD_WRITE_TIMEOUT)) { - error(SD_CARD_ERROR_WRITE_TIMEOUT); - goto fail; - } - // response is r2 so get and check two bytes for nonzero - if (cardCommand(CMD13, 0) || spiRec()) { - error(SD_CARD_ERROR_WRITE_PROGRAMMING); - goto fail; - } - chipSelectHigh(); - return true; - - fail: - chipSelectHigh(); - return false; -} -//------------------------------------------------------------------------------ -/** Write one data block in a multiple block write sequence */ -uint8_t Sd2Card::writeData(const uint8_t* src) { - // wait for previous write to finish - if (!waitNotBusy(SD_WRITE_TIMEOUT)) { - error(SD_CARD_ERROR_WRITE_MULTIPLE); - chipSelectHigh(); - return false; - } - return writeData(WRITE_MULTIPLE_TOKEN, src); -} -//------------------------------------------------------------------------------ -// send one block of data for write block or write multiple blocks -uint8_t Sd2Card::writeData(uint8_t token, const uint8_t* src) { -#ifdef OPTIMIZE_HARDWARE_SPI - - // send data - optimized loop - SPDR = token; - - // send two byte per iteration - for (uint16_t i = 0; i < 512; i += 2) { - while (!(SPSR & (1 << SPIF))); - SPDR = src[i]; - while (!(SPSR & (1 << SPIF))); - SPDR = src[i+1]; - } - - // wait for last data byte - while (!(SPSR & (1 << SPIF))); - -#else // OPTIMIZE_HARDWARE_SPI - spiSend(token); - for (uint16_t i = 0; i < 512; i++) { - spiSend(src[i]); - } -#endif // OPTIMIZE_HARDWARE_SPI - spiSend(0xff); // dummy crc - spiSend(0xff); // dummy crc - - status_ = spiRec(); - if ((status_ & DATA_RES_MASK) != DATA_RES_ACCEPTED) { - error(SD_CARD_ERROR_WRITE); - chipSelectHigh(); - return false; - } - return true; -} -//------------------------------------------------------------------------------ -/** Start a write multiple blocks sequence. - * - * \param[in] blockNumber Address of first block in sequence. - * \param[in] eraseCount The number of blocks to be pre-erased. - * - * \note This function is used with writeData() and writeStop() - * for optimized multiple block writes. - * - * \return The value one, true, is returned for success and - * the value zero, false, is returned for failure. - */ -uint8_t Sd2Card::writeStart(uint32_t blockNumber, uint32_t eraseCount) { -#if SD_PROTECT_BLOCK_ZERO - // don't allow write to first block - if (blockNumber == 0) { - error(SD_CARD_ERROR_WRITE_BLOCK_ZERO); - goto fail; - } -#endif // SD_PROTECT_BLOCK_ZERO - // send pre-erase count - if (cardAcmd(ACMD23, eraseCount)) { - error(SD_CARD_ERROR_ACMD23); - goto fail; - } - // use address if not SDHC card - if (type() != SD_CARD_TYPE_SDHC) blockNumber <<= 9; - if (cardCommand(CMD25, blockNumber)) { - error(SD_CARD_ERROR_CMD25); - goto fail; - } - return true; - - fail: - chipSelectHigh(); - return false; -} -//------------------------------------------------------------------------------ -/** End a write multiple blocks sequence. - * -* \return The value one, true, is returned for success and - * the value zero, false, is returned for failure. - */ -uint8_t Sd2Card::writeStop(void) { - if (!waitNotBusy(SD_WRITE_TIMEOUT)) goto fail; - spiSend(STOP_TRAN_TOKEN); - if (!waitNotBusy(SD_WRITE_TIMEOUT)) goto fail; - chipSelectHigh(); - return true; - - fail: - error(SD_CARD_ERROR_STOP_TRAN); - chipSelectHigh(); - return false; -} diff --git a/build/linux/work/libraries/SD/utility/Sd2Card.h b/build/linux/work/libraries/SD/utility/Sd2Card.h deleted file mode 100644 index 73b46fb44..000000000 --- a/build/linux/work/libraries/SD/utility/Sd2Card.h +++ /dev/null @@ -1,233 +0,0 @@ -/* Arduino Sd2Card Library - * Copyright (C) 2009 by William Greiman - * - * This file is part of the Arduino Sd2Card Library - * - * This Library is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This Library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with the Arduino Sd2Card Library. If not, see - * . - */ -#ifndef Sd2Card_h -#define Sd2Card_h -/** - * \file - * Sd2Card class - */ -#include "Sd2PinMap.h" -#include "SdInfo.h" -/** Set SCK to max rate of F_CPU/2. See Sd2Card::setSckRate(). */ -uint8_t const SPI_FULL_SPEED = 0; -/** Set SCK rate to F_CPU/4. See Sd2Card::setSckRate(). */ -uint8_t const SPI_HALF_SPEED = 1; -/** Set SCK rate to F_CPU/8. Sd2Card::setSckRate(). */ -uint8_t const SPI_QUARTER_SPEED = 2; -/** - * Define MEGA_SOFT_SPI non-zero to use software SPI on Mega Arduinos. - * Pins used are SS 10, MOSI 11, MISO 12, and SCK 13. - * - * MEGA_SOFT_SPI allows an unmodified Adafruit GPS Shield to be used - * on Mega Arduinos. Software SPI works well with GPS Shield V1.1 - * but many SD cards will fail with GPS Shield V1.0. - */ -#define MEGA_SOFT_SPI 0 -//------------------------------------------------------------------------------ -#if MEGA_SOFT_SPI && (defined(__AVR_ATmega1280__)||defined(__AVR_ATmega2560__)) -#define SOFTWARE_SPI -#endif // MEGA_SOFT_SPI -//------------------------------------------------------------------------------ -// SPI pin definitions -// -#ifndef SOFTWARE_SPI -// hardware pin defs -/** - * SD Chip Select pin - * - * Warning if this pin is redefined the hardware SS will pin will be enabled - * as an output by init(). An avr processor will not function as an SPI - * master unless SS is set to output mode. - */ -/** The default chip select pin for the SD card is SS. */ -uint8_t const SD_CHIP_SELECT_PIN = SS_PIN; -// The following three pins must not be redefined for hardware SPI. -/** SPI Master Out Slave In pin */ -uint8_t const SPI_MOSI_PIN = MOSI_PIN; -/** SPI Master In Slave Out pin */ -uint8_t const SPI_MISO_PIN = MISO_PIN; -/** SPI Clock pin */ -uint8_t const SPI_SCK_PIN = SCK_PIN; -/** optimize loops for hardware SPI */ -#define OPTIMIZE_HARDWARE_SPI - -#else // SOFTWARE_SPI -// define software SPI pins so Mega can use unmodified GPS Shield -/** SPI chip select pin */ -uint8_t const SD_CHIP_SELECT_PIN = 10; -/** SPI Master Out Slave In pin */ -uint8_t const SPI_MOSI_PIN = 11; -/** SPI Master In Slave Out pin */ -uint8_t const SPI_MISO_PIN = 12; -/** SPI Clock pin */ -uint8_t const SPI_SCK_PIN = 13; -#endif // SOFTWARE_SPI -//------------------------------------------------------------------------------ -/** Protect block zero from write if nonzero */ -#define SD_PROTECT_BLOCK_ZERO 1 -/** init timeout ms */ -uint16_t const SD_INIT_TIMEOUT = 2000; -/** erase timeout ms */ -uint16_t const SD_ERASE_TIMEOUT = 10000; -/** read timeout ms */ -uint16_t const SD_READ_TIMEOUT = 300; -/** write time out ms */ -uint16_t const SD_WRITE_TIMEOUT = 600; -//------------------------------------------------------------------------------ -// SD card errors -/** timeout error for command CMD0 */ -uint8_t const SD_CARD_ERROR_CMD0 = 0X1; -/** CMD8 was not accepted - not a valid SD card*/ -uint8_t const SD_CARD_ERROR_CMD8 = 0X2; -/** card returned an error response for CMD17 (read block) */ -uint8_t const SD_CARD_ERROR_CMD17 = 0X3; -/** card returned an error response for CMD24 (write block) */ -uint8_t const SD_CARD_ERROR_CMD24 = 0X4; -/** WRITE_MULTIPLE_BLOCKS command failed */ -uint8_t const SD_CARD_ERROR_CMD25 = 0X05; -/** card returned an error response for CMD58 (read OCR) */ -uint8_t const SD_CARD_ERROR_CMD58 = 0X06; -/** SET_WR_BLK_ERASE_COUNT failed */ -uint8_t const SD_CARD_ERROR_ACMD23 = 0X07; -/** card's ACMD41 initialization process timeout */ -uint8_t const SD_CARD_ERROR_ACMD41 = 0X08; -/** card returned a bad CSR version field */ -uint8_t const SD_CARD_ERROR_BAD_CSD = 0X09; -/** erase block group command failed */ -uint8_t const SD_CARD_ERROR_ERASE = 0X0A; -/** card not capable of single block erase */ -uint8_t const SD_CARD_ERROR_ERASE_SINGLE_BLOCK = 0X0B; -/** Erase sequence timed out */ -uint8_t const SD_CARD_ERROR_ERASE_TIMEOUT = 0X0C; -/** card returned an error token instead of read data */ -uint8_t const SD_CARD_ERROR_READ = 0X0D; -/** read CID or CSD failed */ -uint8_t const SD_CARD_ERROR_READ_REG = 0X0E; -/** timeout while waiting for start of read data */ -uint8_t const SD_CARD_ERROR_READ_TIMEOUT = 0X0F; -/** card did not accept STOP_TRAN_TOKEN */ -uint8_t const SD_CARD_ERROR_STOP_TRAN = 0X10; -/** card returned an error token as a response to a write operation */ -uint8_t const SD_CARD_ERROR_WRITE = 0X11; -/** attempt to write protected block zero */ -uint8_t const SD_CARD_ERROR_WRITE_BLOCK_ZERO = 0X12; -/** card did not go ready for a multiple block write */ -uint8_t const SD_CARD_ERROR_WRITE_MULTIPLE = 0X13; -/** card returned an error to a CMD13 status check after a write */ -uint8_t const SD_CARD_ERROR_WRITE_PROGRAMMING = 0X14; -/** timeout occurred during write programming */ -uint8_t const SD_CARD_ERROR_WRITE_TIMEOUT = 0X15; -/** incorrect rate selected */ -uint8_t const SD_CARD_ERROR_SCK_RATE = 0X16; -//------------------------------------------------------------------------------ -// card types -/** Standard capacity V1 SD card */ -uint8_t const SD_CARD_TYPE_SD1 = 1; -/** Standard capacity V2 SD card */ -uint8_t const SD_CARD_TYPE_SD2 = 2; -/** High Capacity SD card */ -uint8_t const SD_CARD_TYPE_SDHC = 3; -//------------------------------------------------------------------------------ -/** - * \class Sd2Card - * \brief Raw access to SD and SDHC flash memory cards. - */ -class Sd2Card { - public: - /** Construct an instance of Sd2Card. */ - Sd2Card(void) : errorCode_(0), inBlock_(0), partialBlockRead_(0), type_(0) {} - uint32_t cardSize(void); - uint8_t erase(uint32_t firstBlock, uint32_t lastBlock); - uint8_t eraseSingleBlockEnable(void); - /** - * \return error code for last error. See Sd2Card.h for a list of error codes. - */ - uint8_t errorCode(void) const {return errorCode_;} - /** \return error data for last error. */ - uint8_t errorData(void) const {return status_;} - /** - * Initialize an SD flash memory card with default clock rate and chip - * select pin. See sd2Card::init(uint8_t sckRateID, uint8_t chipSelectPin). - */ - uint8_t init(void) { - return init(SPI_FULL_SPEED, SD_CHIP_SELECT_PIN); - } - /** - * Initialize an SD flash memory card with the selected SPI clock rate - * and the default SD chip select pin. - * See sd2Card::init(uint8_t sckRateID, uint8_t chipSelectPin). - */ - uint8_t init(uint8_t sckRateID) { - return init(sckRateID, SD_CHIP_SELECT_PIN); - } - uint8_t init(uint8_t sckRateID, uint8_t chipSelectPin); - void partialBlockRead(uint8_t value); - /** Returns the current value, true or false, for partial block read. */ - uint8_t partialBlockRead(void) const {return partialBlockRead_;} - uint8_t readBlock(uint32_t block, uint8_t* dst); - uint8_t readData(uint32_t block, - uint16_t offset, uint16_t count, uint8_t* dst); - /** - * Read a cards CID register. The CID contains card identification - * information such as Manufacturer ID, Product name, Product serial - * number and Manufacturing date. */ - uint8_t readCID(cid_t* cid) { - return readRegister(CMD10, cid); - } - /** - * Read a cards CSD register. The CSD contains Card-Specific Data that - * provides information regarding access to the card's contents. */ - uint8_t readCSD(csd_t* csd) { - return readRegister(CMD9, csd); - } - void readEnd(void); - uint8_t setSckRate(uint8_t sckRateID); - /** Return the card type: SD V1, SD V2 or SDHC */ - uint8_t type(void) const {return type_;} - uint8_t writeBlock(uint32_t blockNumber, const uint8_t* src); - uint8_t writeData(const uint8_t* src); - uint8_t writeStart(uint32_t blockNumber, uint32_t eraseCount); - uint8_t writeStop(void); - private: - uint32_t block_; - uint8_t chipSelectPin_; - uint8_t errorCode_; - uint8_t inBlock_; - uint16_t offset_; - uint8_t partialBlockRead_; - uint8_t status_; - uint8_t type_; - // private functions - uint8_t cardAcmd(uint8_t cmd, uint32_t arg) { - cardCommand(CMD55, 0); - return cardCommand(cmd, arg); - } - uint8_t cardCommand(uint8_t cmd, uint32_t arg); - void error(uint8_t code) {errorCode_ = code;} - uint8_t readRegister(uint8_t cmd, void* buf); - uint8_t sendWriteCommand(uint32_t blockNumber, uint32_t eraseCount); - void chipSelectHigh(void); - void chipSelectLow(void); - void type(uint8_t value) {type_ = value;} - uint8_t waitNotBusy(uint16_t timeoutMillis); - uint8_t writeData(uint8_t token, const uint8_t* src); - uint8_t waitStartBlock(void); -}; -#endif // Sd2Card_h diff --git a/build/linux/work/libraries/SD/utility/Sd2PinMap.h b/build/linux/work/libraries/SD/utility/Sd2PinMap.h deleted file mode 100644 index 4bd75a35d..000000000 --- a/build/linux/work/libraries/SD/utility/Sd2PinMap.h +++ /dev/null @@ -1,353 +0,0 @@ -/* Arduino SdFat Library - * Copyright (C) 2010 by William Greiman - * - * This file is part of the Arduino SdFat Library - * - * This Library is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This Library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with the Arduino SdFat Library. If not, see - * . - */ -// Warning this file was generated by a program. -#ifndef Sd2PinMap_h -#define Sd2PinMap_h -#include - -//------------------------------------------------------------------------------ -/** struct for mapping digital pins */ -struct pin_map_t { - volatile uint8_t* ddr; - volatile uint8_t* pin; - volatile uint8_t* port; - uint8_t bit; -}; -//------------------------------------------------------------------------------ -#if defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__) -// Mega - -// Two Wire (aka I2C) ports -uint8_t const SDA_PIN = 20; -uint8_t const SCL_PIN = 21; - -// SPI port -uint8_t const SS_PIN = 53; -uint8_t const MOSI_PIN = 51; -uint8_t const MISO_PIN = 50; -uint8_t const SCK_PIN = 52; - -static const pin_map_t digitalPinMap[] = { - {&DDRE, &PINE, &PORTE, 0}, // E0 0 - {&DDRE, &PINE, &PORTE, 1}, // E1 1 - {&DDRE, &PINE, &PORTE, 4}, // E4 2 - {&DDRE, &PINE, &PORTE, 5}, // E5 3 - {&DDRG, &PING, &PORTG, 5}, // G5 4 - {&DDRE, &PINE, &PORTE, 3}, // E3 5 - {&DDRH, &PINH, &PORTH, 3}, // H3 6 - {&DDRH, &PINH, &PORTH, 4}, // H4 7 - {&DDRH, &PINH, &PORTH, 5}, // H5 8 - {&DDRH, &PINH, &PORTH, 6}, // H6 9 - {&DDRB, &PINB, &PORTB, 4}, // B4 10 - {&DDRB, &PINB, &PORTB, 5}, // B5 11 - {&DDRB, &PINB, &PORTB, 6}, // B6 12 - {&DDRB, &PINB, &PORTB, 7}, // B7 13 - {&DDRJ, &PINJ, &PORTJ, 1}, // J1 14 - {&DDRJ, &PINJ, &PORTJ, 0}, // J0 15 - {&DDRH, &PINH, &PORTH, 1}, // H1 16 - {&DDRH, &PINH, &PORTH, 0}, // H0 17 - {&DDRD, &PIND, &PORTD, 3}, // D3 18 - {&DDRD, &PIND, &PORTD, 2}, // D2 19 - {&DDRD, &PIND, &PORTD, 1}, // D1 20 - {&DDRD, &PIND, &PORTD, 0}, // D0 21 - {&DDRA, &PINA, &PORTA, 0}, // A0 22 - {&DDRA, &PINA, &PORTA, 1}, // A1 23 - {&DDRA, &PINA, &PORTA, 2}, // A2 24 - {&DDRA, &PINA, &PORTA, 3}, // A3 25 - {&DDRA, &PINA, &PORTA, 4}, // A4 26 - {&DDRA, &PINA, &PORTA, 5}, // A5 27 - {&DDRA, &PINA, &PORTA, 6}, // A6 28 - {&DDRA, &PINA, &PORTA, 7}, // A7 29 - {&DDRC, &PINC, &PORTC, 7}, // C7 30 - {&DDRC, &PINC, &PORTC, 6}, // C6 31 - {&DDRC, &PINC, &PORTC, 5}, // C5 32 - {&DDRC, &PINC, &PORTC, 4}, // C4 33 - {&DDRC, &PINC, &PORTC, 3}, // C3 34 - {&DDRC, &PINC, &PORTC, 2}, // C2 35 - {&DDRC, &PINC, &PORTC, 1}, // C1 36 - {&DDRC, &PINC, &PORTC, 0}, // C0 37 - {&DDRD, &PIND, &PORTD, 7}, // D7 38 - {&DDRG, &PING, &PORTG, 2}, // G2 39 - {&DDRG, &PING, &PORTG, 1}, // G1 40 - {&DDRG, &PING, &PORTG, 0}, // G0 41 - {&DDRL, &PINL, &PORTL, 7}, // L7 42 - {&DDRL, &PINL, &PORTL, 6}, // L6 43 - {&DDRL, &PINL, &PORTL, 5}, // L5 44 - {&DDRL, &PINL, &PORTL, 4}, // L4 45 - {&DDRL, &PINL, &PORTL, 3}, // L3 46 - {&DDRL, &PINL, &PORTL, 2}, // L2 47 - {&DDRL, &PINL, &PORTL, 1}, // L1 48 - {&DDRL, &PINL, &PORTL, 0}, // L0 49 - {&DDRB, &PINB, &PORTB, 3}, // B3 50 - {&DDRB, &PINB, &PORTB, 2}, // B2 51 - {&DDRB, &PINB, &PORTB, 1}, // B1 52 - {&DDRB, &PINB, &PORTB, 0}, // B0 53 - {&DDRF, &PINF, &PORTF, 0}, // F0 54 - {&DDRF, &PINF, &PORTF, 1}, // F1 55 - {&DDRF, &PINF, &PORTF, 2}, // F2 56 - {&DDRF, &PINF, &PORTF, 3}, // F3 57 - {&DDRF, &PINF, &PORTF, 4}, // F4 58 - {&DDRF, &PINF, &PORTF, 5}, // F5 59 - {&DDRF, &PINF, &PORTF, 6}, // F6 60 - {&DDRF, &PINF, &PORTF, 7}, // F7 61 - {&DDRK, &PINK, &PORTK, 0}, // K0 62 - {&DDRK, &PINK, &PORTK, 1}, // K1 63 - {&DDRK, &PINK, &PORTK, 2}, // K2 64 - {&DDRK, &PINK, &PORTK, 3}, // K3 65 - {&DDRK, &PINK, &PORTK, 4}, // K4 66 - {&DDRK, &PINK, &PORTK, 5}, // K5 67 - {&DDRK, &PINK, &PORTK, 6}, // K6 68 - {&DDRK, &PINK, &PORTK, 7} // K7 69 -}; -//------------------------------------------------------------------------------ -#elif defined(__AVR_ATmega644P__) || defined(__AVR_ATmega644__) -// Sanguino - -// Two Wire (aka I2C) ports -uint8_t const SDA_PIN = 17; -uint8_t const SCL_PIN = 18; - -// SPI port -uint8_t const SS_PIN = 4; -uint8_t const MOSI_PIN = 5; -uint8_t const MISO_PIN = 6; -uint8_t const SCK_PIN = 7; - -static const pin_map_t digitalPinMap[] = { - {&DDRB, &PINB, &PORTB, 0}, // B0 0 - {&DDRB, &PINB, &PORTB, 1}, // B1 1 - {&DDRB, &PINB, &PORTB, 2}, // B2 2 - {&DDRB, &PINB, &PORTB, 3}, // B3 3 - {&DDRB, &PINB, &PORTB, 4}, // B4 4 - {&DDRB, &PINB, &PORTB, 5}, // B5 5 - {&DDRB, &PINB, &PORTB, 6}, // B6 6 - {&DDRB, &PINB, &PORTB, 7}, // B7 7 - {&DDRD, &PIND, &PORTD, 0}, // D0 8 - {&DDRD, &PIND, &PORTD, 1}, // D1 9 - {&DDRD, &PIND, &PORTD, 2}, // D2 10 - {&DDRD, &PIND, &PORTD, 3}, // D3 11 - {&DDRD, &PIND, &PORTD, 4}, // D4 12 - {&DDRD, &PIND, &PORTD, 5}, // D5 13 - {&DDRD, &PIND, &PORTD, 6}, // D6 14 - {&DDRD, &PIND, &PORTD, 7}, // D7 15 - {&DDRC, &PINC, &PORTC, 0}, // C0 16 - {&DDRC, &PINC, &PORTC, 1}, // C1 17 - {&DDRC, &PINC, &PORTC, 2}, // C2 18 - {&DDRC, &PINC, &PORTC, 3}, // C3 19 - {&DDRC, &PINC, &PORTC, 4}, // C4 20 - {&DDRC, &PINC, &PORTC, 5}, // C5 21 - {&DDRC, &PINC, &PORTC, 6}, // C6 22 - {&DDRC, &PINC, &PORTC, 7}, // C7 23 - {&DDRA, &PINA, &PORTA, 7}, // A7 24 - {&DDRA, &PINA, &PORTA, 6}, // A6 25 - {&DDRA, &PINA, &PORTA, 5}, // A5 26 - {&DDRA, &PINA, &PORTA, 4}, // A4 27 - {&DDRA, &PINA, &PORTA, 3}, // A3 28 - {&DDRA, &PINA, &PORTA, 2}, // A2 29 - {&DDRA, &PINA, &PORTA, 1}, // A1 30 - {&DDRA, &PINA, &PORTA, 0} // A0 31 -}; -//------------------------------------------------------------------------------ -#elif defined(__AVR_ATmega32U4__) -// Teensy 2.0 - -// Two Wire (aka I2C) ports -uint8_t const SDA_PIN = 6; -uint8_t const SCL_PIN = 5; - -// SPI port -uint8_t const SS_PIN = 0; -uint8_t const MOSI_PIN = 2; -uint8_t const MISO_PIN = 3; -uint8_t const SCK_PIN = 1; - -static const pin_map_t digitalPinMap[] = { - {&DDRB, &PINB, &PORTB, 0}, // B0 0 - {&DDRB, &PINB, &PORTB, 1}, // B1 1 - {&DDRB, &PINB, &PORTB, 2}, // B2 2 - {&DDRB, &PINB, &PORTB, 3}, // B3 3 - {&DDRB, &PINB, &PORTB, 7}, // B7 4 - {&DDRD, &PIND, &PORTD, 0}, // D0 5 - {&DDRD, &PIND, &PORTD, 1}, // D1 6 - {&DDRD, &PIND, &PORTD, 2}, // D2 7 - {&DDRD, &PIND, &PORTD, 3}, // D3 8 - {&DDRC, &PINC, &PORTC, 6}, // C6 9 - {&DDRC, &PINC, &PORTC, 7}, // C7 10 - {&DDRD, &PIND, &PORTD, 6}, // D6 11 - {&DDRD, &PIND, &PORTD, 7}, // D7 12 - {&DDRB, &PINB, &PORTB, 4}, // B4 13 - {&DDRB, &PINB, &PORTB, 5}, // B5 14 - {&DDRB, &PINB, &PORTB, 6}, // B6 15 - {&DDRF, &PINF, &PORTF, 7}, // F7 16 - {&DDRF, &PINF, &PORTF, 6}, // F6 17 - {&DDRF, &PINF, &PORTF, 5}, // F5 18 - {&DDRF, &PINF, &PORTF, 4}, // F4 19 - {&DDRF, &PINF, &PORTF, 1}, // F1 20 - {&DDRF, &PINF, &PORTF, 0}, // F0 21 - {&DDRD, &PIND, &PORTD, 4}, // D4 22 - {&DDRD, &PIND, &PORTD, 5}, // D5 23 - {&DDRE, &PINE, &PORTE, 6} // E6 24 -}; -//------------------------------------------------------------------------------ -#elif defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB1286__) -// Teensy++ 1.0 & 2.0 - -// Two Wire (aka I2C) ports -uint8_t const SDA_PIN = 1; -uint8_t const SCL_PIN = 0; - -// SPI port -uint8_t const SS_PIN = 20; -uint8_t const MOSI_PIN = 22; -uint8_t const MISO_PIN = 23; -uint8_t const SCK_PIN = 21; - -static const pin_map_t digitalPinMap[] = { - {&DDRD, &PIND, &PORTD, 0}, // D0 0 - {&DDRD, &PIND, &PORTD, 1}, // D1 1 - {&DDRD, &PIND, &PORTD, 2}, // D2 2 - {&DDRD, &PIND, &PORTD, 3}, // D3 3 - {&DDRD, &PIND, &PORTD, 4}, // D4 4 - {&DDRD, &PIND, &PORTD, 5}, // D5 5 - {&DDRD, &PIND, &PORTD, 6}, // D6 6 - {&DDRD, &PIND, &PORTD, 7}, // D7 7 - {&DDRE, &PINE, &PORTE, 0}, // E0 8 - {&DDRE, &PINE, &PORTE, 1}, // E1 9 - {&DDRC, &PINC, &PORTC, 0}, // C0 10 - {&DDRC, &PINC, &PORTC, 1}, // C1 11 - {&DDRC, &PINC, &PORTC, 2}, // C2 12 - {&DDRC, &PINC, &PORTC, 3}, // C3 13 - {&DDRC, &PINC, &PORTC, 4}, // C4 14 - {&DDRC, &PINC, &PORTC, 5}, // C5 15 - {&DDRC, &PINC, &PORTC, 6}, // C6 16 - {&DDRC, &PINC, &PORTC, 7}, // C7 17 - {&DDRE, &PINE, &PORTE, 6}, // E6 18 - {&DDRE, &PINE, &PORTE, 7}, // E7 19 - {&DDRB, &PINB, &PORTB, 0}, // B0 20 - {&DDRB, &PINB, &PORTB, 1}, // B1 21 - {&DDRB, &PINB, &PORTB, 2}, // B2 22 - {&DDRB, &PINB, &PORTB, 3}, // B3 23 - {&DDRB, &PINB, &PORTB, 4}, // B4 24 - {&DDRB, &PINB, &PORTB, 5}, // B5 25 - {&DDRB, &PINB, &PORTB, 6}, // B6 26 - {&DDRB, &PINB, &PORTB, 7}, // B7 27 - {&DDRA, &PINA, &PORTA, 0}, // A0 28 - {&DDRA, &PINA, &PORTA, 1}, // A1 29 - {&DDRA, &PINA, &PORTA, 2}, // A2 30 - {&DDRA, &PINA, &PORTA, 3}, // A3 31 - {&DDRA, &PINA, &PORTA, 4}, // A4 32 - {&DDRA, &PINA, &PORTA, 5}, // A5 33 - {&DDRA, &PINA, &PORTA, 6}, // A6 34 - {&DDRA, &PINA, &PORTA, 7}, // A7 35 - {&DDRE, &PINE, &PORTE, 4}, // E4 36 - {&DDRE, &PINE, &PORTE, 5}, // E5 37 - {&DDRF, &PINF, &PORTF, 0}, // F0 38 - {&DDRF, &PINF, &PORTF, 1}, // F1 39 - {&DDRF, &PINF, &PORTF, 2}, // F2 40 - {&DDRF, &PINF, &PORTF, 3}, // F3 41 - {&DDRF, &PINF, &PORTF, 4}, // F4 42 - {&DDRF, &PINF, &PORTF, 5}, // F5 43 - {&DDRF, &PINF, &PORTF, 6}, // F6 44 - {&DDRF, &PINF, &PORTF, 7} // F7 45 -}; -//------------------------------------------------------------------------------ -#else // defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__) -// 168 and 328 Arduinos - -// Two Wire (aka I2C) ports -uint8_t const SDA_PIN = 18; -uint8_t const SCL_PIN = 19; - -// SPI port -uint8_t const SS_PIN = 10; -uint8_t const MOSI_PIN = 11; -uint8_t const MISO_PIN = 12; -uint8_t const SCK_PIN = 13; - -static const pin_map_t digitalPinMap[] = { - {&DDRD, &PIND, &PORTD, 0}, // D0 0 - {&DDRD, &PIND, &PORTD, 1}, // D1 1 - {&DDRD, &PIND, &PORTD, 2}, // D2 2 - {&DDRD, &PIND, &PORTD, 3}, // D3 3 - {&DDRD, &PIND, &PORTD, 4}, // D4 4 - {&DDRD, &PIND, &PORTD, 5}, // D5 5 - {&DDRD, &PIND, &PORTD, 6}, // D6 6 - {&DDRD, &PIND, &PORTD, 7}, // D7 7 - {&DDRB, &PINB, &PORTB, 0}, // B0 8 - {&DDRB, &PINB, &PORTB, 1}, // B1 9 - {&DDRB, &PINB, &PORTB, 2}, // B2 10 - {&DDRB, &PINB, &PORTB, 3}, // B3 11 - {&DDRB, &PINB, &PORTB, 4}, // B4 12 - {&DDRB, &PINB, &PORTB, 5}, // B5 13 - {&DDRC, &PINC, &PORTC, 0}, // C0 14 - {&DDRC, &PINC, &PORTC, 1}, // C1 15 - {&DDRC, &PINC, &PORTC, 2}, // C2 16 - {&DDRC, &PINC, &PORTC, 3}, // C3 17 - {&DDRC, &PINC, &PORTC, 4}, // C4 18 - {&DDRC, &PINC, &PORTC, 5} // C5 19 -}; -#endif // defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__) -//------------------------------------------------------------------------------ -static const uint8_t digitalPinCount = sizeof(digitalPinMap)/sizeof(pin_map_t); - -uint8_t badPinNumber(void) - __attribute__((error("Pin number is too large or not a constant"))); - -static inline __attribute__((always_inline)) - uint8_t getPinMode(uint8_t pin) { - if (__builtin_constant_p(pin) && pin < digitalPinCount) { - return (*digitalPinMap[pin].ddr >> digitalPinMap[pin].bit) & 1; - } else { - return badPinNumber(); - } -} -static inline __attribute__((always_inline)) - void setPinMode(uint8_t pin, uint8_t mode) { - if (__builtin_constant_p(pin) && pin < digitalPinCount) { - if (mode) { - *digitalPinMap[pin].ddr |= 1 << digitalPinMap[pin].bit; - } else { - *digitalPinMap[pin].ddr &= ~(1 << digitalPinMap[pin].bit); - } - } else { - badPinNumber(); - } -} -static inline __attribute__((always_inline)) - uint8_t fastDigitalRead(uint8_t pin) { - if (__builtin_constant_p(pin) && pin < digitalPinCount) { - return (*digitalPinMap[pin].pin >> digitalPinMap[pin].bit) & 1; - } else { - return badPinNumber(); - } -} -static inline __attribute__((always_inline)) - void fastDigitalWrite(uint8_t pin, uint8_t value) { - if (__builtin_constant_p(pin) && pin < digitalPinCount) { - if (value) { - *digitalPinMap[pin].port |= 1 << digitalPinMap[pin].bit; - } else { - *digitalPinMap[pin].port &= ~(1 << digitalPinMap[pin].bit); - } - } else { - badPinNumber(); - } -} -#endif // Sd2PinMap_h diff --git a/build/linux/work/libraries/SD/utility/SdFat.h b/build/linux/work/libraries/SD/utility/SdFat.h deleted file mode 100644 index 344326f98..000000000 --- a/build/linux/work/libraries/SD/utility/SdFat.h +++ /dev/null @@ -1,547 +0,0 @@ -/* Arduino SdFat Library - * Copyright (C) 2009 by William Greiman - * - * This file is part of the Arduino SdFat Library - * - * This Library is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This Library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with the Arduino SdFat Library. If not, see - * . - */ -#ifndef SdFat_h -#define SdFat_h -/** - * \file - * SdFile and SdVolume classes - */ -#include -#include "Sd2Card.h" -#include "FatStructs.h" -#include "Print.h" -//------------------------------------------------------------------------------ -/** - * Allow use of deprecated functions if non-zero - */ -#define ALLOW_DEPRECATED_FUNCTIONS 1 -//------------------------------------------------------------------------------ -// forward declaration since SdVolume is used in SdFile -class SdVolume; -//============================================================================== -// SdFile class - -// flags for ls() -/** ls() flag to print modify date */ -uint8_t const LS_DATE = 1; -/** ls() flag to print file size */ -uint8_t const LS_SIZE = 2; -/** ls() flag for recursive list of subdirectories */ -uint8_t const LS_R = 4; - -// use the gnu style oflag in open() -/** open() oflag for reading */ -uint8_t const O_READ = 0X01; -/** open() oflag - same as O_READ */ -uint8_t const O_RDONLY = O_READ; -/** open() oflag for write */ -uint8_t const O_WRITE = 0X02; -/** open() oflag - same as O_WRITE */ -uint8_t const O_WRONLY = O_WRITE; -/** open() oflag for reading and writing */ -uint8_t const O_RDWR = (O_READ | O_WRITE); -/** open() oflag mask for access modes */ -uint8_t const O_ACCMODE = (O_READ | O_WRITE); -/** The file offset shall be set to the end of the file prior to each write. */ -uint8_t const O_APPEND = 0X04; -/** synchronous writes - call sync() after each write */ -uint8_t const O_SYNC = 0X08; -/** create the file if nonexistent */ -uint8_t const O_CREAT = 0X10; -/** If O_CREAT and O_EXCL are set, open() shall fail if the file exists */ -uint8_t const O_EXCL = 0X20; -/** truncate the file to zero length */ -uint8_t const O_TRUNC = 0X40; - -// flags for timestamp -/** set the file's last access date */ -uint8_t const T_ACCESS = 1; -/** set the file's creation date and time */ -uint8_t const T_CREATE = 2; -/** Set the file's write date and time */ -uint8_t const T_WRITE = 4; -// values for type_ -/** This SdFile has not been opened. */ -uint8_t const FAT_FILE_TYPE_CLOSED = 0; -/** SdFile for a file */ -uint8_t const FAT_FILE_TYPE_NORMAL = 1; -/** SdFile for a FAT16 root directory */ -uint8_t const FAT_FILE_TYPE_ROOT16 = 2; -/** SdFile for a FAT32 root directory */ -uint8_t const FAT_FILE_TYPE_ROOT32 = 3; -/** SdFile for a subdirectory */ -uint8_t const FAT_FILE_TYPE_SUBDIR = 4; -/** Test value for directory type */ -uint8_t const FAT_FILE_TYPE_MIN_DIR = FAT_FILE_TYPE_ROOT16; - -/** date field for FAT directory entry */ -static inline uint16_t FAT_DATE(uint16_t year, uint8_t month, uint8_t day) { - return (year - 1980) << 9 | month << 5 | day; -} -/** year part of FAT directory date field */ -static inline uint16_t FAT_YEAR(uint16_t fatDate) { - return 1980 + (fatDate >> 9); -} -/** month part of FAT directory date field */ -static inline uint8_t FAT_MONTH(uint16_t fatDate) { - return (fatDate >> 5) & 0XF; -} -/** day part of FAT directory date field */ -static inline uint8_t FAT_DAY(uint16_t fatDate) { - return fatDate & 0X1F; -} -/** time field for FAT directory entry */ -static inline uint16_t FAT_TIME(uint8_t hour, uint8_t minute, uint8_t second) { - return hour << 11 | minute << 5 | second >> 1; -} -/** hour part of FAT directory time field */ -static inline uint8_t FAT_HOUR(uint16_t fatTime) { - return fatTime >> 11; -} -/** minute part of FAT directory time field */ -static inline uint8_t FAT_MINUTE(uint16_t fatTime) { - return(fatTime >> 5) & 0X3F; -} -/** second part of FAT directory time field */ -static inline uint8_t FAT_SECOND(uint16_t fatTime) { - return 2*(fatTime & 0X1F); -} -/** Default date for file timestamps is 1 Jan 2000 */ -uint16_t const FAT_DEFAULT_DATE = ((2000 - 1980) << 9) | (1 << 5) | 1; -/** Default time for file timestamp is 1 am */ -uint16_t const FAT_DEFAULT_TIME = (1 << 11); -//------------------------------------------------------------------------------ -/** - * \class SdFile - * \brief Access FAT16 and FAT32 files on SD and SDHC cards. - */ -class SdFile : public Print { - public: - /** Create an instance of SdFile. */ - SdFile(void) : type_(FAT_FILE_TYPE_CLOSED) {} - /** - * writeError is set to true if an error occurs during a write(). - * Set writeError to false before calling print() and/or write() and check - * for true after calls to print() and/or write(). - */ - //bool writeError; - /** - * Cancel unbuffered reads for this file. - * See setUnbufferedRead() - */ - void clearUnbufferedRead(void) { - flags_ &= ~F_FILE_UNBUFFERED_READ; - } - uint8_t close(void); - uint8_t contiguousRange(uint32_t* bgnBlock, uint32_t* endBlock); - uint8_t createContiguous(SdFile* dirFile, - const char* fileName, uint32_t size); - /** \return The current cluster number for a file or directory. */ - uint32_t curCluster(void) const {return curCluster_;} - /** \return The current position for a file or directory. */ - uint32_t curPosition(void) const {return curPosition_;} - /** - * Set the date/time callback function - * - * \param[in] dateTime The user's call back function. The callback - * function is of the form: - * - * \code - * void dateTime(uint16_t* date, uint16_t* time) { - * uint16_t year; - * uint8_t month, day, hour, minute, second; - * - * // User gets date and time from GPS or real-time clock here - * - * // return date using FAT_DATE macro to format fields - * *date = FAT_DATE(year, month, day); - * - * // return time using FAT_TIME macro to format fields - * *time = FAT_TIME(hour, minute, second); - * } - * \endcode - * - * Sets the function that is called when a file is created or when - * a file's directory entry is modified by sync(). All timestamps, - * access, creation, and modify, are set when a file is created. - * sync() maintains the last access date and last modify date/time. - * - * See the timestamp() function. - */ - static void dateTimeCallback( - void (*dateTime)(uint16_t* date, uint16_t* time)) { - dateTime_ = dateTime; - } - /** - * Cancel the date/time callback function. - */ - static void dateTimeCallbackCancel(void) { - // use explicit zero since NULL is not defined for Sanguino - dateTime_ = 0; - } - /** \return Address of the block that contains this file's directory. */ - uint32_t dirBlock(void) const {return dirBlock_;} - uint8_t dirEntry(dir_t* dir); - /** \return Index of this file's directory in the block dirBlock. */ - uint8_t dirIndex(void) const {return dirIndex_;} - static void dirName(const dir_t& dir, char* name); - /** \return The total number of bytes in a file or directory. */ - uint32_t fileSize(void) const {return fileSize_;} - /** \return The first cluster number for a file or directory. */ - uint32_t firstCluster(void) const {return firstCluster_;} - /** \return True if this is a SdFile for a directory else false. */ - uint8_t isDir(void) const {return type_ >= FAT_FILE_TYPE_MIN_DIR;} - /** \return True if this is a SdFile for a file else false. */ - uint8_t isFile(void) const {return type_ == FAT_FILE_TYPE_NORMAL;} - /** \return True if this is a SdFile for an open file/directory else false. */ - uint8_t isOpen(void) const {return type_ != FAT_FILE_TYPE_CLOSED;} - /** \return True if this is a SdFile for a subdirectory else false. */ - uint8_t isSubDir(void) const {return type_ == FAT_FILE_TYPE_SUBDIR;} - /** \return True if this is a SdFile for the root directory. */ - uint8_t isRoot(void) const { - return type_ == FAT_FILE_TYPE_ROOT16 || type_ == FAT_FILE_TYPE_ROOT32; - } - void ls(uint8_t flags = 0, uint8_t indent = 0); - uint8_t makeDir(SdFile* dir, const char* dirName); - uint8_t open(SdFile* dirFile, uint16_t index, uint8_t oflag); - uint8_t open(SdFile* dirFile, const char* fileName, uint8_t oflag); - - uint8_t openRoot(SdVolume* vol); - static void printDirName(const dir_t& dir, uint8_t width); - static void printFatDate(uint16_t fatDate); - static void printFatTime(uint16_t fatTime); - static void printTwoDigits(uint8_t v); - /** - * Read the next byte from a file. - * - * \return For success read returns the next byte in the file as an int. - * If an error occurs or end of file is reached -1 is returned. - */ - int16_t read(void) { - uint8_t b; - return read(&b, 1) == 1 ? b : -1; - } - int16_t read(void* buf, uint16_t nbyte); - int8_t readDir(dir_t* dir); - static uint8_t remove(SdFile* dirFile, const char* fileName); - uint8_t remove(void); - /** Set the file's current position to zero. */ - void rewind(void) { - curPosition_ = curCluster_ = 0; - } - uint8_t rmDir(void); - uint8_t rmRfStar(void); - /** Set the files position to current position + \a pos. See seekSet(). */ - uint8_t seekCur(uint32_t pos) { - return seekSet(curPosition_ + pos); - } - /** - * Set the files current position to end of file. Useful to position - * a file for append. See seekSet(). - */ - uint8_t seekEnd(void) {return seekSet(fileSize_);} - uint8_t seekSet(uint32_t pos); - /** - * Use unbuffered reads to access this file. Used with Wave - * Shield ISR. Used with Sd2Card::partialBlockRead() in WaveRP. - * - * Not recommended for normal applications. - */ - void setUnbufferedRead(void) { - if (isFile()) flags_ |= F_FILE_UNBUFFERED_READ; - } - uint8_t timestamp(uint8_t flag, uint16_t year, uint8_t month, uint8_t day, - uint8_t hour, uint8_t minute, uint8_t second); - uint8_t sync(void); - /** Type of this SdFile. You should use isFile() or isDir() instead of type() - * if possible. - * - * \return The file or directory type. - */ - uint8_t type(void) const {return type_;} - uint8_t truncate(uint32_t size); - /** \return Unbuffered read flag. */ - uint8_t unbufferedRead(void) const { - return flags_ & F_FILE_UNBUFFERED_READ; - } - /** \return SdVolume that contains this file. */ - SdVolume* volume(void) const {return vol_;} - size_t write(uint8_t b); - size_t write(const void* buf, uint16_t nbyte); - size_t write(const char* str); - void write_P(PGM_P str); - void writeln_P(PGM_P str); -//------------------------------------------------------------------------------ -#if ALLOW_DEPRECATED_FUNCTIONS -// Deprecated functions - suppress cpplint warnings with NOLINT comment - /** \deprecated Use: - * uint8_t SdFile::contiguousRange(uint32_t* bgnBlock, uint32_t* endBlock); - */ - uint8_t contiguousRange(uint32_t& bgnBlock, uint32_t& endBlock) { // NOLINT - return contiguousRange(&bgnBlock, &endBlock); - } - /** \deprecated Use: - * uint8_t SdFile::createContiguous(SdFile* dirFile, - * const char* fileName, uint32_t size) - */ - uint8_t createContiguous(SdFile& dirFile, // NOLINT - const char* fileName, uint32_t size) { - return createContiguous(&dirFile, fileName, size); - } - - /** - * \deprecated Use: - * static void SdFile::dateTimeCallback( - * void (*dateTime)(uint16_t* date, uint16_t* time)); - */ - static void dateTimeCallback( - void (*dateTime)(uint16_t& date, uint16_t& time)) { // NOLINT - oldDateTime_ = dateTime; - dateTime_ = dateTime ? oldToNew : 0; - } - /** \deprecated Use: uint8_t SdFile::dirEntry(dir_t* dir); */ - uint8_t dirEntry(dir_t& dir) {return dirEntry(&dir);} // NOLINT - /** \deprecated Use: - * uint8_t SdFile::makeDir(SdFile* dir, const char* dirName); - */ - uint8_t makeDir(SdFile& dir, const char* dirName) { // NOLINT - return makeDir(&dir, dirName); - } - /** \deprecated Use: - * uint8_t SdFile::open(SdFile* dirFile, const char* fileName, uint8_t oflag); - */ - uint8_t open(SdFile& dirFile, // NOLINT - const char* fileName, uint8_t oflag) { - return open(&dirFile, fileName, oflag); - } - /** \deprecated Do not use in new apps */ - uint8_t open(SdFile& dirFile, const char* fileName) { // NOLINT - return open(dirFile, fileName, O_RDWR); - } - /** \deprecated Use: - * uint8_t SdFile::open(SdFile* dirFile, uint16_t index, uint8_t oflag); - */ - uint8_t open(SdFile& dirFile, uint16_t index, uint8_t oflag) { // NOLINT - return open(&dirFile, index, oflag); - } - /** \deprecated Use: uint8_t SdFile::openRoot(SdVolume* vol); */ - uint8_t openRoot(SdVolume& vol) {return openRoot(&vol);} // NOLINT - - /** \deprecated Use: int8_t SdFile::readDir(dir_t* dir); */ - int8_t readDir(dir_t& dir) {return readDir(&dir);} // NOLINT - /** \deprecated Use: - * static uint8_t SdFile::remove(SdFile* dirFile, const char* fileName); - */ - static uint8_t remove(SdFile& dirFile, const char* fileName) { // NOLINT - return remove(&dirFile, fileName); - } -//------------------------------------------------------------------------------ -// rest are private - private: - static void (*oldDateTime_)(uint16_t& date, uint16_t& time); // NOLINT - static void oldToNew(uint16_t* date, uint16_t* time) { - uint16_t d; - uint16_t t; - oldDateTime_(d, t); - *date = d; - *time = t; - } -#endif // ALLOW_DEPRECATED_FUNCTIONS - private: - // bits defined in flags_ - // should be 0XF - static uint8_t const F_OFLAG = (O_ACCMODE | O_APPEND | O_SYNC); - // available bits - static uint8_t const F_UNUSED = 0X30; - // use unbuffered SD read - static uint8_t const F_FILE_UNBUFFERED_READ = 0X40; - // sync of directory entry required - static uint8_t const F_FILE_DIR_DIRTY = 0X80; - -// make sure F_OFLAG is ok -#if ((F_UNUSED | F_FILE_UNBUFFERED_READ | F_FILE_DIR_DIRTY) & F_OFLAG) -#error flags_ bits conflict -#endif // flags_ bits - - // private data - uint8_t flags_; // See above for definition of flags_ bits - uint8_t type_; // type of file see above for values - uint32_t curCluster_; // cluster for current file position - uint32_t curPosition_; // current file position in bytes from beginning - uint32_t dirBlock_; // SD block that contains directory entry for file - uint8_t dirIndex_; // index of entry in dirBlock 0 <= dirIndex_ <= 0XF - uint32_t fileSize_; // file size in bytes - uint32_t firstCluster_; // first cluster of file - SdVolume* vol_; // volume where file is located - - // private functions - uint8_t addCluster(void); - uint8_t addDirCluster(void); - dir_t* cacheDirEntry(uint8_t action); - static void (*dateTime_)(uint16_t* date, uint16_t* time); - static uint8_t make83Name(const char* str, uint8_t* name); - uint8_t openCachedEntry(uint8_t cacheIndex, uint8_t oflags); - dir_t* readDirCache(void); -}; -//============================================================================== -// SdVolume class -/** - * \brief Cache for an SD data block - */ -union cache_t { - /** Used to access cached file data blocks. */ - uint8_t data[512]; - /** Used to access cached FAT16 entries. */ - uint16_t fat16[256]; - /** Used to access cached FAT32 entries. */ - uint32_t fat32[128]; - /** Used to access cached directory entries. */ - dir_t dir[16]; - /** Used to access a cached MasterBoot Record. */ - mbr_t mbr; - /** Used to access to a cached FAT boot sector. */ - fbs_t fbs; -}; -//------------------------------------------------------------------------------ -/** - * \class SdVolume - * \brief Access FAT16 and FAT32 volumes on SD and SDHC cards. - */ -class SdVolume { - public: - /** Create an instance of SdVolume */ - SdVolume(void) :allocSearchStart_(2), fatType_(0) {} - /** Clear the cache and returns a pointer to the cache. Used by the WaveRP - * recorder to do raw write to the SD card. Not for normal apps. - */ - static uint8_t* cacheClear(void) { - cacheFlush(); - cacheBlockNumber_ = 0XFFFFFFFF; - return cacheBuffer_.data; - } - /** - * Initialize a FAT volume. Try partition one first then try super - * floppy format. - * - * \param[in] dev The Sd2Card where the volume is located. - * - * \return The value one, true, is returned for success and - * the value zero, false, is returned for failure. Reasons for - * failure include not finding a valid partition, not finding a valid - * FAT file system or an I/O error. - */ - uint8_t init(Sd2Card* dev) { return init(dev, 1) ? true : init(dev, 0);} - uint8_t init(Sd2Card* dev, uint8_t part); - - // inline functions that return volume info - /** \return The volume's cluster size in blocks. */ - uint8_t blocksPerCluster(void) const {return blocksPerCluster_;} - /** \return The number of blocks in one FAT. */ - uint32_t blocksPerFat(void) const {return blocksPerFat_;} - /** \return The total number of clusters in the volume. */ - uint32_t clusterCount(void) const {return clusterCount_;} - /** \return The shift count required to multiply by blocksPerCluster. */ - uint8_t clusterSizeShift(void) const {return clusterSizeShift_;} - /** \return The logical block number for the start of file data. */ - uint32_t dataStartBlock(void) const {return dataStartBlock_;} - /** \return The number of FAT structures on the volume. */ - uint8_t fatCount(void) const {return fatCount_;} - /** \return The logical block number for the start of the first FAT. */ - uint32_t fatStartBlock(void) const {return fatStartBlock_;} - /** \return The FAT type of the volume. Values are 12, 16 or 32. */ - uint8_t fatType(void) const {return fatType_;} - /** \return The number of entries in the root directory for FAT16 volumes. */ - uint32_t rootDirEntryCount(void) const {return rootDirEntryCount_;} - /** \return The logical block number for the start of the root directory - on FAT16 volumes or the first cluster number on FAT32 volumes. */ - uint32_t rootDirStart(void) const {return rootDirStart_;} - /** return a pointer to the Sd2Card object for this volume */ - static Sd2Card* sdCard(void) {return sdCard_;} -//------------------------------------------------------------------------------ -#if ALLOW_DEPRECATED_FUNCTIONS - // Deprecated functions - suppress cpplint warnings with NOLINT comment - /** \deprecated Use: uint8_t SdVolume::init(Sd2Card* dev); */ - uint8_t init(Sd2Card& dev) {return init(&dev);} // NOLINT - - /** \deprecated Use: uint8_t SdVolume::init(Sd2Card* dev, uint8_t vol); */ - uint8_t init(Sd2Card& dev, uint8_t part) { // NOLINT - return init(&dev, part); - } -#endif // ALLOW_DEPRECATED_FUNCTIONS -//------------------------------------------------------------------------------ - private: - // Allow SdFile access to SdVolume private data. - friend class SdFile; - - // value for action argument in cacheRawBlock to indicate read from cache - static uint8_t const CACHE_FOR_READ = 0; - // value for action argument in cacheRawBlock to indicate cache dirty - static uint8_t const CACHE_FOR_WRITE = 1; - - static cache_t cacheBuffer_; // 512 byte cache for device blocks - static uint32_t cacheBlockNumber_; // Logical number of block in the cache - static Sd2Card* sdCard_; // Sd2Card object for cache - static uint8_t cacheDirty_; // cacheFlush() will write block if true - static uint32_t cacheMirrorBlock_; // block number for mirror FAT -// - uint32_t allocSearchStart_; // start cluster for alloc search - uint8_t blocksPerCluster_; // cluster size in blocks - uint32_t blocksPerFat_; // FAT size in blocks - uint32_t clusterCount_; // clusters in one FAT - uint8_t clusterSizeShift_; // shift to convert cluster count to block count - uint32_t dataStartBlock_; // first data block number - uint8_t fatCount_; // number of FATs on volume - uint32_t fatStartBlock_; // start block for first FAT - uint8_t fatType_; // volume type (12, 16, OR 32) - uint16_t rootDirEntryCount_; // number of entries in FAT16 root dir - uint32_t rootDirStart_; // root start block for FAT16, cluster for FAT32 - //---------------------------------------------------------------------------- - uint8_t allocContiguous(uint32_t count, uint32_t* curCluster); - uint8_t blockOfCluster(uint32_t position) const { - return (position >> 9) & (blocksPerCluster_ - 1);} - uint32_t clusterStartBlock(uint32_t cluster) const { - return dataStartBlock_ + ((cluster - 2) << clusterSizeShift_);} - uint32_t blockNumber(uint32_t cluster, uint32_t position) const { - return clusterStartBlock(cluster) + blockOfCluster(position);} - static uint8_t cacheFlush(void); - static uint8_t cacheRawBlock(uint32_t blockNumber, uint8_t action); - static void cacheSetDirty(void) {cacheDirty_ |= CACHE_FOR_WRITE;} - static uint8_t cacheZeroBlock(uint32_t blockNumber); - uint8_t chainSize(uint32_t beginCluster, uint32_t* size) const; - uint8_t fatGet(uint32_t cluster, uint32_t* value) const; - uint8_t fatPut(uint32_t cluster, uint32_t value); - uint8_t fatPutEOC(uint32_t cluster) { - return fatPut(cluster, 0x0FFFFFFF); - } - uint8_t freeChain(uint32_t cluster); - uint8_t isEOC(uint32_t cluster) const { - return cluster >= (fatType_ == 16 ? FAT16EOC_MIN : FAT32EOC_MIN); - } - uint8_t readBlock(uint32_t block, uint8_t* dst) { - return sdCard_->readBlock(block, dst);} - uint8_t readData(uint32_t block, uint16_t offset, - uint16_t count, uint8_t* dst) { - return sdCard_->readData(block, offset, count, dst); - } - uint8_t writeBlock(uint32_t block, const uint8_t* dst) { - return sdCard_->writeBlock(block, dst); - } -}; -#endif // SdFat_h diff --git a/build/linux/work/libraries/SD/utility/SdFatUtil.h b/build/linux/work/libraries/SD/utility/SdFatUtil.h deleted file mode 100644 index 7d6b4104f..000000000 --- a/build/linux/work/libraries/SD/utility/SdFatUtil.h +++ /dev/null @@ -1,71 +0,0 @@ -/* Arduino SdFat Library - * Copyright (C) 2008 by William Greiman - * - * This file is part of the Arduino SdFat Library - * - * This Library is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This Library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - - * You should have received a copy of the GNU General Public License - * along with the Arduino SdFat Library. If not, see - * . - */ -#ifndef SdFatUtil_h -#define SdFatUtil_h -/** - * \file - * Useful utility functions. - */ -#include -#include -/** Store and print a string in flash memory.*/ -#define PgmPrint(x) SerialPrint_P(PSTR(x)) -/** Store and print a string in flash memory followed by a CR/LF.*/ -#define PgmPrintln(x) SerialPrintln_P(PSTR(x)) -/** Defined so doxygen works for function definitions. */ -#define NOINLINE __attribute__((noinline,unused)) -#define UNUSEDOK __attribute__((unused)) -//------------------------------------------------------------------------------ -/** Return the number of bytes currently free in RAM. */ -static UNUSEDOK int FreeRam(void) { - extern int __bss_end; - extern int* __brkval; - int free_memory; - if (reinterpret_cast(__brkval) == 0) { - // if no heap use from end of bss section - free_memory = reinterpret_cast(&free_memory) - - reinterpret_cast(&__bss_end); - } else { - // use from top of stack to heap - free_memory = reinterpret_cast(&free_memory) - - reinterpret_cast(__brkval); - } - return free_memory; -} -//------------------------------------------------------------------------------ -/** - * %Print a string in flash memory to the serial port. - * - * \param[in] str Pointer to string stored in flash memory. - */ -static NOINLINE void SerialPrint_P(PGM_P str) { - for (uint8_t c; (c = pgm_read_byte(str)); str++) Serial.write(c); -} -//------------------------------------------------------------------------------ -/** - * %Print a string in flash memory followed by a CR/LF. - * - * \param[in] str Pointer to string stored in flash memory. - */ -static NOINLINE void SerialPrintln_P(PGM_P str) { - SerialPrint_P(str); - Serial.println(); -} -#endif // #define SdFatUtil_h diff --git a/build/linux/work/libraries/SD/utility/SdFatmainpage.h b/build/linux/work/libraries/SD/utility/SdFatmainpage.h deleted file mode 100644 index 73b3b63bd..000000000 --- a/build/linux/work/libraries/SD/utility/SdFatmainpage.h +++ /dev/null @@ -1,202 +0,0 @@ -/* Arduino SdFat Library - * Copyright (C) 2009 by William Greiman - * - * This file is part of the Arduino SdFat Library - * - * This Library is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This Library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with the Arduino SdFat Library. If not, see - * . - */ - -/** -\mainpage Arduino SdFat Library -
    Copyright © 2009 by William Greiman -
    - -\section Intro Introduction -The Arduino SdFat Library is a minimal implementation of FAT16 and FAT32 -file systems on SD flash memory cards. Standard SD and high capacity -SDHC cards are supported. - -The SdFat only supports short 8.3 names. - -The main classes in SdFat are Sd2Card, SdVolume, and SdFile. - -The Sd2Card class supports access to standard SD cards and SDHC cards. Most -applications will only need to call the Sd2Card::init() member function. - -The SdVolume class supports FAT16 and FAT32 partitions. Most applications -will only need to call the SdVolume::init() member function. - -The SdFile class provides file access functions such as open(), read(), -remove(), write(), close() and sync(). This class supports access to the root -directory and subdirectories. - -A number of example are provided in the SdFat/examples folder. These were -developed to test SdFat and illustrate its use. - -SdFat was developed for high speed data recording. SdFat was used to implement -an audio record/play class, WaveRP, for the Adafruit Wave Shield. This -application uses special Sd2Card calls to write to contiguous files in raw mode. -These functions reduce write latency so that audio can be recorded with the -small amount of RAM in the Arduino. - -\section SDcard SD\SDHC Cards - -Arduinos access SD cards using the cards SPI protocol. PCs, Macs, and -most consumer devices use the 4-bit parallel SD protocol. A card that -functions well on A PC or Mac may not work well on the Arduino. - -Most cards have good SPI read performance but cards vary widely in SPI -write performance. Write performance is limited by how efficiently the -card manages internal erase/remapping operations. The Arduino cannot -optimize writes to reduce erase operations because of its limit RAM. - -SanDisk cards generally have good write performance. They seem to have -more internal RAM buffering than other cards and therefore can limit -the number of flash erase operations that the Arduino forces due to its -limited RAM. - -\section Hardware Hardware Configuration - -SdFat was developed using an - Adafruit Industries - Wave Shield. - -The hardware interface to the SD card should not use a resistor based level -shifter. SdFat sets the SPI bus frequency to 8 MHz which results in signal -rise times that are too slow for the edge detectors in many newer SD card -controllers when resistor voltage dividers are used. - -The 5 to 3.3 V level shifter for 5 V Arduinos should be IC based like the -74HC4050N based circuit shown in the file SdLevel.png. The Adafruit Wave Shield -uses a 74AHC125N. Gravitech sells SD and MicroSD Card Adapters based on the -74LCX245. - -If you are using a resistor based level shifter and are having problems try -setting the SPI bus frequency to 4 MHz. This can be done by using -card.init(SPI_HALF_SPEED) to initialize the SD card. - -\section comment Bugs and Comments - -If you wish to report bugs or have comments, send email to fat16lib@sbcglobal.net. - -\section SdFatClass SdFat Usage - -SdFat uses a slightly restricted form of short names. -Only printable ASCII characters are supported. No characters with code point -values greater than 127 are allowed. Space is not allowed even though space -was allowed in the API of early versions of DOS. - -Short names are limited to 8 characters followed by an optional period (.) -and extension of up to 3 characters. The characters may be any combination -of letters and digits. The following special characters are also allowed: - -$ % ' - _ @ ~ ` ! ( ) { } ^ # & - -Short names are always converted to upper case and their original case -value is lost. - -\note - The Arduino Print class uses character -at a time writes so it was necessary to use a \link SdFile::sync() sync() \endlink -function to control when data is written to the SD card. - -\par -An application which writes to a file using \link Print::print() print()\endlink, -\link Print::println() println() \endlink -or \link SdFile::write write() \endlink must call \link SdFile::sync() sync() \endlink -at the appropriate time to force data and directory information to be written -to the SD Card. Data and directory information are also written to the SD card -when \link SdFile::close() close() \endlink is called. - -\par -Applications must use care calling \link SdFile::sync() sync() \endlink -since 2048 bytes of I/O is required to update file and -directory information. This includes writing the current data block, reading -the block that contains the directory entry for update, writing the directory -block back and reading back the current data block. - -It is possible to open a file with two or more instances of SdFile. A file may -be corrupted if data is written to the file by more than one instance of SdFile. - -\section HowTo How to format SD Cards as FAT Volumes - -You should use a freshly formatted SD card for best performance. FAT -file systems become slower if many files have been created and deleted. -This is because the directory entry for a deleted file is marked as deleted, -but is not deleted. When a new file is created, these entries must be scanned -before creating the file, a flaw in the FAT design. Also files can become -fragmented which causes reads and writes to be slower. - -Microsoft operating systems support removable media formatted with a -Master Boot Record, MBR, or formatted as a super floppy with a FAT Boot Sector -in block zero. - -Microsoft operating systems expect MBR formatted removable media -to have only one partition. The first partition should be used. - -Microsoft operating systems do not support partitioning SD flash cards. -If you erase an SD card with a program like KillDisk, Most versions of -Windows will format the card as a super floppy. - -The best way to restore an SD card's format is to use SDFormatter -which can be downloaded from: - -http://www.sdcard.org/consumers/formatter/ - -SDFormatter aligns flash erase boundaries with file -system structures which reduces write latency and file system overhead. - -SDFormatter does not have an option for FAT type so it may format -small cards as FAT12. - -After the MBR is restored by SDFormatter you may need to reformat small -cards that have been formatted FAT12 to force the volume type to be FAT16. - -If you reformat the SD card with an OS utility, choose a cluster size that -will result in: - -4084 < CountOfClusters && CountOfClusters < 65525 - -The volume will then be FAT16. - -If you are formatting an SD card on OS X or Linux, be sure to use the first -partition. Format this partition with a cluster count in above range. - -\section References References - -Adafruit Industries: - -http://www.adafruit.com/ - -http://www.ladyada.net/make/waveshield/ - -The Arduino site: - -http://www.arduino.cc/ - -For more information about FAT file systems see: - -http://www.microsoft.com/whdc/system/platform/firmware/fatgen.mspx - -For information about using SD cards as SPI devices see: - -http://www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf - -The ATmega328 datasheet: - -http://www.atmel.com/dyn/resources/prod_documents/doc8161.pdf - - - */ diff --git a/build/linux/work/libraries/SD/utility/SdFile.cpp b/build/linux/work/libraries/SD/utility/SdFile.cpp deleted file mode 100644 index e786f56bb..000000000 --- a/build/linux/work/libraries/SD/utility/SdFile.cpp +++ /dev/null @@ -1,1253 +0,0 @@ -/* Arduino SdFat Library - * Copyright (C) 2009 by William Greiman - * - * This file is part of the Arduino SdFat Library - * - * This Library is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This Library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with the Arduino SdFat Library. If not, see - * . - */ -#include -#include -#include -//------------------------------------------------------------------------------ -// callback function for date/time -void (*SdFile::dateTime_)(uint16_t* date, uint16_t* time) = NULL; - -#if ALLOW_DEPRECATED_FUNCTIONS -// suppress cpplint warnings with NOLINT comment -void (*SdFile::oldDateTime_)(uint16_t& date, uint16_t& time) = NULL; // NOLINT -#endif // ALLOW_DEPRECATED_FUNCTIONS -//------------------------------------------------------------------------------ -// add a cluster to a file -uint8_t SdFile::addCluster() { - if (!vol_->allocContiguous(1, &curCluster_)) return false; - - // if first cluster of file link to directory entry - if (firstCluster_ == 0) { - firstCluster_ = curCluster_; - flags_ |= F_FILE_DIR_DIRTY; - } - return true; -} -//------------------------------------------------------------------------------ -// Add a cluster to a directory file and zero the cluster. -// return with first block of cluster in the cache -uint8_t SdFile::addDirCluster(void) { - if (!addCluster()) return false; - - // zero data in cluster insure first cluster is in cache - uint32_t block = vol_->clusterStartBlock(curCluster_); - for (uint8_t i = vol_->blocksPerCluster_; i != 0; i--) { - if (!SdVolume::cacheZeroBlock(block + i - 1)) return false; - } - // Increase directory file size by cluster size - fileSize_ += 512UL << vol_->clusterSizeShift_; - return true; -} -//------------------------------------------------------------------------------ -// cache a file's directory entry -// return pointer to cached entry or null for failure -dir_t* SdFile::cacheDirEntry(uint8_t action) { - if (!SdVolume::cacheRawBlock(dirBlock_, action)) return NULL; - return SdVolume::cacheBuffer_.dir + dirIndex_; -} -//------------------------------------------------------------------------------ -/** - * Close a file and force cached data and directory information - * to be written to the storage device. - * - * \return The value one, true, is returned for success and - * the value zero, false, is returned for failure. - * Reasons for failure include no file is open or an I/O error. - */ -uint8_t SdFile::close(void) { - if (!sync())return false; - type_ = FAT_FILE_TYPE_CLOSED; - return true; -} -//------------------------------------------------------------------------------ -/** - * Check for contiguous file and return its raw block range. - * - * \param[out] bgnBlock the first block address for the file. - * \param[out] endBlock the last block address for the file. - * - * \return The value one, true, is returned for success and - * the value zero, false, is returned for failure. - * Reasons for failure include file is not contiguous, file has zero length - * or an I/O error occurred. - */ -uint8_t SdFile::contiguousRange(uint32_t* bgnBlock, uint32_t* endBlock) { - // error if no blocks - if (firstCluster_ == 0) return false; - - for (uint32_t c = firstCluster_; ; c++) { - uint32_t next; - if (!vol_->fatGet(c, &next)) return false; - - // check for contiguous - if (next != (c + 1)) { - // error if not end of chain - if (!vol_->isEOC(next)) return false; - *bgnBlock = vol_->clusterStartBlock(firstCluster_); - *endBlock = vol_->clusterStartBlock(c) - + vol_->blocksPerCluster_ - 1; - return true; - } - } -} -//------------------------------------------------------------------------------ -/** - * Create and open a new contiguous file of a specified size. - * - * \note This function only supports short DOS 8.3 names. - * See open() for more information. - * - * \param[in] dirFile The directory where the file will be created. - * \param[in] fileName A valid DOS 8.3 file name. - * \param[in] size The desired file size. - * - * \return The value one, true, is returned for success and - * the value zero, false, is returned for failure. - * Reasons for failure include \a fileName contains - * an invalid DOS 8.3 file name, the FAT volume has not been initialized, - * a file is already open, the file already exists, the root - * directory is full or an I/O error. - * - */ -uint8_t SdFile::createContiguous(SdFile* dirFile, - const char* fileName, uint32_t size) { - // don't allow zero length file - if (size == 0) return false; - if (!open(dirFile, fileName, O_CREAT | O_EXCL | O_RDWR)) return false; - - // calculate number of clusters needed - uint32_t count = ((size - 1) >> (vol_->clusterSizeShift_ + 9)) + 1; - - // allocate clusters - if (!vol_->allocContiguous(count, &firstCluster_)) { - remove(); - return false; - } - fileSize_ = size; - - // insure sync() will update dir entry - flags_ |= F_FILE_DIR_DIRTY; - return sync(); -} -//------------------------------------------------------------------------------ -/** - * Return a files directory entry - * - * \param[out] dir Location for return of the files directory entry. - * - * \return The value one, true, is returned for success and - * the value zero, false, is returned for failure. - */ -uint8_t SdFile::dirEntry(dir_t* dir) { - // make sure fields on SD are correct - if (!sync()) return false; - - // read entry - dir_t* p = cacheDirEntry(SdVolume::CACHE_FOR_READ); - if (!p) return false; - - // copy to caller's struct - memcpy(dir, p, sizeof(dir_t)); - return true; -} -//------------------------------------------------------------------------------ -/** - * Format the name field of \a dir into the 13 byte array - * \a name in standard 8.3 short name format. - * - * \param[in] dir The directory structure containing the name. - * \param[out] name A 13 byte char array for the formatted name. - */ -void SdFile::dirName(const dir_t& dir, char* name) { - uint8_t j = 0; - for (uint8_t i = 0; i < 11; i++) { - if (dir.name[i] == ' ')continue; - if (i == 8) name[j++] = '.'; - name[j++] = dir.name[i]; - } - name[j] = 0; -} -//------------------------------------------------------------------------------ -/** List directory contents to Serial. - * - * \param[in] flags The inclusive OR of - * - * LS_DATE - %Print file modification date - * - * LS_SIZE - %Print file size. - * - * LS_R - Recursive list of subdirectories. - * - * \param[in] indent Amount of space before file name. Used for recursive - * list to indicate subdirectory level. - */ -void SdFile::ls(uint8_t flags, uint8_t indent) { - dir_t* p; - - rewind(); - while ((p = readDirCache())) { - // done if past last used entry - if (p->name[0] == DIR_NAME_FREE) break; - - // skip deleted entry and entries for . and .. - if (p->name[0] == DIR_NAME_DELETED || p->name[0] == '.') continue; - - // only list subdirectories and files - if (!DIR_IS_FILE_OR_SUBDIR(p)) continue; - - // print any indent spaces - for (int8_t i = 0; i < indent; i++) Serial.print(' '); - - // print file name with possible blank fill - printDirName(*p, flags & (LS_DATE | LS_SIZE) ? 14 : 0); - - // print modify date/time if requested - if (flags & LS_DATE) { - printFatDate(p->lastWriteDate); - Serial.print(' '); - printFatTime(p->lastWriteTime); - } - // print size if requested - if (!DIR_IS_SUBDIR(p) && (flags & LS_SIZE)) { - Serial.print(' '); - Serial.print(p->fileSize); - } - Serial.println(); - - // list subdirectory content if requested - if ((flags & LS_R) && DIR_IS_SUBDIR(p)) { - uint16_t index = curPosition()/32 - 1; - SdFile s; - if (s.open(this, index, O_READ)) s.ls(flags, indent + 2); - seekSet(32 * (index + 1)); - } - } -} -//------------------------------------------------------------------------------ -// format directory name field from a 8.3 name string -uint8_t SdFile::make83Name(const char* str, uint8_t* name) { - uint8_t c; - uint8_t n = 7; // max index for part before dot - uint8_t i = 0; - // blank fill name and extension - while (i < 11) name[i++] = ' '; - i = 0; - while ((c = *str++) != '\0') { - if (c == '.') { - if (n == 10) return false; // only one dot allowed - n = 10; // max index for full 8.3 name - i = 8; // place for extension - } else { - // illegal FAT characters - PGM_P p = PSTR("|<>^+=?/[];,*\"\\"); - uint8_t b; - while ((b = pgm_read_byte(p++))) if (b == c) return false; - // check size and only allow ASCII printable characters - if (i > n || c < 0X21 || c > 0X7E)return false; - // only upper case allowed in 8.3 names - convert lower to upper - name[i++] = c < 'a' || c > 'z' ? c : c + ('A' - 'a'); - } - } - // must have a file name, extension is optional - return name[0] != ' '; -} -//------------------------------------------------------------------------------ -/** Make a new directory. - * - * \param[in] dir An open SdFat instance for the directory that will containing - * the new directory. - * - * \param[in] dirName A valid 8.3 DOS name for the new directory. - * - * \return The value one, true, is returned for success and - * the value zero, false, is returned for failure. - * Reasons for failure include this SdFile is already open, \a dir is not a - * directory, \a dirName is invalid or already exists in \a dir. - */ -uint8_t SdFile::makeDir(SdFile* dir, const char* dirName) { - dir_t d; - - // create a normal file - if (!open(dir, dirName, O_CREAT | O_EXCL | O_RDWR)) return false; - - // convert SdFile to directory - flags_ = O_READ; - type_ = FAT_FILE_TYPE_SUBDIR; - - // allocate and zero first cluster - if (!addDirCluster())return false; - - // force entry to SD - if (!sync()) return false; - - // cache entry - should already be in cache due to sync() call - dir_t* p = cacheDirEntry(SdVolume::CACHE_FOR_WRITE); - if (!p) return false; - - // change directory entry attribute - p->attributes = DIR_ATT_DIRECTORY; - - // make entry for '.' - memcpy(&d, p, sizeof(d)); - for (uint8_t i = 1; i < 11; i++) d.name[i] = ' '; - d.name[0] = '.'; - - // cache block for '.' and '..' - uint32_t block = vol_->clusterStartBlock(firstCluster_); - if (!SdVolume::cacheRawBlock(block, SdVolume::CACHE_FOR_WRITE)) return false; - - // copy '.' to block - memcpy(&SdVolume::cacheBuffer_.dir[0], &d, sizeof(d)); - - // make entry for '..' - d.name[1] = '.'; - if (dir->isRoot()) { - d.firstClusterLow = 0; - d.firstClusterHigh = 0; - } else { - d.firstClusterLow = dir->firstCluster_ & 0XFFFF; - d.firstClusterHigh = dir->firstCluster_ >> 16; - } - // copy '..' to block - memcpy(&SdVolume::cacheBuffer_.dir[1], &d, sizeof(d)); - - // set position after '..' - curPosition_ = 2 * sizeof(d); - - // write first block - return SdVolume::cacheFlush(); -} -//------------------------------------------------------------------------------ -/** - * Open a file or directory by name. - * - * \param[in] dirFile An open SdFat instance for the directory containing the - * file to be opened. - * - * \param[in] fileName A valid 8.3 DOS name for a file to be opened. - * - * \param[in] oflag Values for \a oflag are constructed by a bitwise-inclusive - * OR of flags from the following list - * - * O_READ - Open for reading. - * - * O_RDONLY - Same as O_READ. - * - * O_WRITE - Open for writing. - * - * O_WRONLY - Same as O_WRITE. - * - * O_RDWR - Open for reading and writing. - * - * O_APPEND - If set, the file offset shall be set to the end of the - * file prior to each write. - * - * O_CREAT - If the file exists, this flag has no effect except as noted - * under O_EXCL below. Otherwise, the file shall be created - * - * O_EXCL - If O_CREAT and O_EXCL are set, open() shall fail if the file exists. - * - * O_SYNC - Call sync() after each write. This flag should not be used with - * write(uint8_t), write_P(PGM_P), writeln_P(PGM_P), or the Arduino Print class. - * These functions do character at a time writes so sync() will be called - * after each byte. - * - * O_TRUNC - If the file exists and is a regular file, and the file is - * successfully opened and is not read only, its length shall be truncated to 0. - * - * \note Directory files must be opened read only. Write and truncation is - * not allowed for directory files. - * - * \return The value one, true, is returned for success and - * the value zero, false, is returned for failure. - * Reasons for failure include this SdFile is already open, \a difFile is not - * a directory, \a fileName is invalid, the file does not exist - * or can't be opened in the access mode specified by oflag. - */ -uint8_t SdFile::open(SdFile* dirFile, const char* fileName, uint8_t oflag) { - uint8_t dname[11]; - dir_t* p; - - // error if already open - if (isOpen())return false; - - if (!make83Name(fileName, dname)) return false; - vol_ = dirFile->vol_; - dirFile->rewind(); - - // bool for empty entry found - uint8_t emptyFound = false; - - // search for file - while (dirFile->curPosition_ < dirFile->fileSize_) { - uint8_t index = 0XF & (dirFile->curPosition_ >> 5); - p = dirFile->readDirCache(); - if (p == NULL) return false; - - if (p->name[0] == DIR_NAME_FREE || p->name[0] == DIR_NAME_DELETED) { - // remember first empty slot - if (!emptyFound) { - emptyFound = true; - dirIndex_ = index; - dirBlock_ = SdVolume::cacheBlockNumber_; - } - // done if no entries follow - if (p->name[0] == DIR_NAME_FREE) break; - } else if (!memcmp(dname, p->name, 11)) { - // don't open existing file if O_CREAT and O_EXCL - if ((oflag & (O_CREAT | O_EXCL)) == (O_CREAT | O_EXCL)) return false; - - // open found file - return openCachedEntry(0XF & index, oflag); - } - } - // only create file if O_CREAT and O_WRITE - if ((oflag & (O_CREAT | O_WRITE)) != (O_CREAT | O_WRITE)) return false; - - // cache found slot or add cluster if end of file - if (emptyFound) { - p = cacheDirEntry(SdVolume::CACHE_FOR_WRITE); - if (!p) return false; - } else { - if (dirFile->type_ == FAT_FILE_TYPE_ROOT16) return false; - - // add and zero cluster for dirFile - first cluster is in cache for write - if (!dirFile->addDirCluster()) return false; - - // use first entry in cluster - dirIndex_ = 0; - p = SdVolume::cacheBuffer_.dir; - } - // initialize as empty file - memset(p, 0, sizeof(dir_t)); - memcpy(p->name, dname, 11); - - // set timestamps - if (dateTime_) { - // call user function - dateTime_(&p->creationDate, &p->creationTime); - } else { - // use default date/time - p->creationDate = FAT_DEFAULT_DATE; - p->creationTime = FAT_DEFAULT_TIME; - } - p->lastAccessDate = p->creationDate; - p->lastWriteDate = p->creationDate; - p->lastWriteTime = p->creationTime; - - // force write of entry to SD - if (!SdVolume::cacheFlush()) return false; - - // open entry in cache - return openCachedEntry(dirIndex_, oflag); -} -//------------------------------------------------------------------------------ -/** - * Open a file by index. - * - * \param[in] dirFile An open SdFat instance for the directory. - * - * \param[in] index The \a index of the directory entry for the file to be - * opened. The value for \a index is (directory file position)/32. - * - * \param[in] oflag Values for \a oflag are constructed by a bitwise-inclusive - * OR of flags O_READ, O_WRITE, O_TRUNC, and O_SYNC. - * - * See open() by fileName for definition of flags and return values. - * - */ -uint8_t SdFile::open(SdFile* dirFile, uint16_t index, uint8_t oflag) { - // error if already open - if (isOpen())return false; - - // don't open existing file if O_CREAT and O_EXCL - user call error - if ((oflag & (O_CREAT | O_EXCL)) == (O_CREAT | O_EXCL)) return false; - - vol_ = dirFile->vol_; - - // seek to location of entry - if (!dirFile->seekSet(32 * index)) return false; - - // read entry into cache - dir_t* p = dirFile->readDirCache(); - if (p == NULL) return false; - - // error if empty slot or '.' or '..' - if (p->name[0] == DIR_NAME_FREE || - p->name[0] == DIR_NAME_DELETED || p->name[0] == '.') { - return false; - } - // open cached entry - return openCachedEntry(index & 0XF, oflag); -} -//------------------------------------------------------------------------------ -// open a cached directory entry. Assumes vol_ is initializes -uint8_t SdFile::openCachedEntry(uint8_t dirIndex, uint8_t oflag) { - // location of entry in cache - dir_t* p = SdVolume::cacheBuffer_.dir + dirIndex; - - // write or truncate is an error for a directory or read-only file - if (p->attributes & (DIR_ATT_READ_ONLY | DIR_ATT_DIRECTORY)) { - if (oflag & (O_WRITE | O_TRUNC)) return false; - } - // remember location of directory entry on SD - dirIndex_ = dirIndex; - dirBlock_ = SdVolume::cacheBlockNumber_; - - // copy first cluster number for directory fields - firstCluster_ = (uint32_t)p->firstClusterHigh << 16; - firstCluster_ |= p->firstClusterLow; - - // make sure it is a normal file or subdirectory - if (DIR_IS_FILE(p)) { - fileSize_ = p->fileSize; - type_ = FAT_FILE_TYPE_NORMAL; - } else if (DIR_IS_SUBDIR(p)) { - if (!vol_->chainSize(firstCluster_, &fileSize_)) return false; - type_ = FAT_FILE_TYPE_SUBDIR; - } else { - return false; - } - // save open flags for read/write - flags_ = oflag & (O_ACCMODE | O_SYNC | O_APPEND); - - // set to start of file - curCluster_ = 0; - curPosition_ = 0; - - // truncate file to zero length if requested - if (oflag & O_TRUNC) return truncate(0); - return true; -} -//------------------------------------------------------------------------------ -/** - * Open a volume's root directory. - * - * \param[in] vol The FAT volume containing the root directory to be opened. - * - * \return The value one, true, is returned for success and - * the value zero, false, is returned for failure. - * Reasons for failure include the FAT volume has not been initialized - * or it a FAT12 volume. - */ -uint8_t SdFile::openRoot(SdVolume* vol) { - // error if file is already open - if (isOpen()) return false; - - if (vol->fatType() == 16) { - type_ = FAT_FILE_TYPE_ROOT16; - firstCluster_ = 0; - fileSize_ = 32 * vol->rootDirEntryCount(); - } else if (vol->fatType() == 32) { - type_ = FAT_FILE_TYPE_ROOT32; - firstCluster_ = vol->rootDirStart(); - if (!vol->chainSize(firstCluster_, &fileSize_)) return false; - } else { - // volume is not initialized or FAT12 - return false; - } - vol_ = vol; - // read only - flags_ = O_READ; - - // set to start of file - curCluster_ = 0; - curPosition_ = 0; - - // root has no directory entry - dirBlock_ = 0; - dirIndex_ = 0; - return true; -} -//------------------------------------------------------------------------------ -/** %Print the name field of a directory entry in 8.3 format to Serial. - * - * \param[in] dir The directory structure containing the name. - * \param[in] width Blank fill name if length is less than \a width. - */ -void SdFile::printDirName(const dir_t& dir, uint8_t width) { - uint8_t w = 0; - for (uint8_t i = 0; i < 11; i++) { - if (dir.name[i] == ' ')continue; - if (i == 8) { - Serial.print('.'); - w++; - } - Serial.write(dir.name[i]); - w++; - } - if (DIR_IS_SUBDIR(&dir)) { - Serial.print('/'); - w++; - } - while (w < width) { - Serial.print(' '); - w++; - } -} -//------------------------------------------------------------------------------ -/** %Print a directory date field to Serial. - * - * Format is yyyy-mm-dd. - * - * \param[in] fatDate The date field from a directory entry. - */ -void SdFile::printFatDate(uint16_t fatDate) { - Serial.print(FAT_YEAR(fatDate)); - Serial.print('-'); - printTwoDigits(FAT_MONTH(fatDate)); - Serial.print('-'); - printTwoDigits(FAT_DAY(fatDate)); -} -//------------------------------------------------------------------------------ -/** %Print a directory time field to Serial. - * - * Format is hh:mm:ss. - * - * \param[in] fatTime The time field from a directory entry. - */ -void SdFile::printFatTime(uint16_t fatTime) { - printTwoDigits(FAT_HOUR(fatTime)); - Serial.print(':'); - printTwoDigits(FAT_MINUTE(fatTime)); - Serial.print(':'); - printTwoDigits(FAT_SECOND(fatTime)); -} -//------------------------------------------------------------------------------ -/** %Print a value as two digits to Serial. - * - * \param[in] v Value to be printed, 0 <= \a v <= 99 - */ -void SdFile::printTwoDigits(uint8_t v) { - char str[3]; - str[0] = '0' + v/10; - str[1] = '0' + v % 10; - str[2] = 0; - Serial.print(str); -} -//------------------------------------------------------------------------------ -/** - * Read data from a file starting at the current position. - * - * \param[out] buf Pointer to the location that will receive the data. - * - * \param[in] nbyte Maximum number of bytes to read. - * - * \return For success read() returns the number of bytes read. - * A value less than \a nbyte, including zero, will be returned - * if end of file is reached. - * If an error occurs, read() returns -1. Possible errors include - * read() called before a file has been opened, corrupt file system - * or an I/O error occurred. - */ -int16_t SdFile::read(void* buf, uint16_t nbyte) { - uint8_t* dst = reinterpret_cast(buf); - - // error if not open or write only - if (!isOpen() || !(flags_ & O_READ)) return -1; - - // max bytes left in file - if (nbyte > (fileSize_ - curPosition_)) nbyte = fileSize_ - curPosition_; - - // amount left to read - uint16_t toRead = nbyte; - while (toRead > 0) { - uint32_t block; // raw device block number - uint16_t offset = curPosition_ & 0X1FF; // offset in block - if (type_ == FAT_FILE_TYPE_ROOT16) { - block = vol_->rootDirStart() + (curPosition_ >> 9); - } else { - uint8_t blockOfCluster = vol_->blockOfCluster(curPosition_); - if (offset == 0 && blockOfCluster == 0) { - // start of new cluster - if (curPosition_ == 0) { - // use first cluster in file - curCluster_ = firstCluster_; - } else { - // get next cluster from FAT - if (!vol_->fatGet(curCluster_, &curCluster_)) return -1; - } - } - block = vol_->clusterStartBlock(curCluster_) + blockOfCluster; - } - uint16_t n = toRead; - - // amount to be read from current block - if (n > (512 - offset)) n = 512 - offset; - - // no buffering needed if n == 512 or user requests no buffering - if ((unbufferedRead() || n == 512) && - block != SdVolume::cacheBlockNumber_) { - if (!vol_->readData(block, offset, n, dst)) return -1; - dst += n; - } else { - // read block to cache and copy data to caller - if (!SdVolume::cacheRawBlock(block, SdVolume::CACHE_FOR_READ)) return -1; - uint8_t* src = SdVolume::cacheBuffer_.data + offset; - uint8_t* end = src + n; - while (src != end) *dst++ = *src++; - } - curPosition_ += n; - toRead -= n; - } - return nbyte; -} -//------------------------------------------------------------------------------ -/** - * Read the next directory entry from a directory file. - * - * \param[out] dir The dir_t struct that will receive the data. - * - * \return For success readDir() returns the number of bytes read. - * A value of zero will be returned if end of file is reached. - * If an error occurs, readDir() returns -1. Possible errors include - * readDir() called before a directory has been opened, this is not - * a directory file or an I/O error occurred. - */ -int8_t SdFile::readDir(dir_t* dir) { - int8_t n; - // if not a directory file or miss-positioned return an error - if (!isDir() || (0X1F & curPosition_)) return -1; - - while ((n = read(dir, sizeof(dir_t))) == sizeof(dir_t)) { - // last entry if DIR_NAME_FREE - if (dir->name[0] == DIR_NAME_FREE) break; - // skip empty entries and entry for . and .. - if (dir->name[0] == DIR_NAME_DELETED || dir->name[0] == '.') continue; - // return if normal file or subdirectory - if (DIR_IS_FILE_OR_SUBDIR(dir)) return n; - } - // error, end of file, or past last entry - return n < 0 ? -1 : 0; -} -//------------------------------------------------------------------------------ -// Read next directory entry into the cache -// Assumes file is correctly positioned -dir_t* SdFile::readDirCache(void) { - // error if not directory - if (!isDir()) return NULL; - - // index of entry in cache - uint8_t i = (curPosition_ >> 5) & 0XF; - - // use read to locate and cache block - if (read() < 0) return NULL; - - // advance to next entry - curPosition_ += 31; - - // return pointer to entry - return (SdVolume::cacheBuffer_.dir + i); -} -//------------------------------------------------------------------------------ -/** - * Remove a file. - * - * The directory entry and all data for the file are deleted. - * - * \note This function should not be used to delete the 8.3 version of a - * file that has a long name. For example if a file has the long name - * "New Text Document.txt" you should not delete the 8.3 name "NEWTEX~1.TXT". - * - * \return The value one, true, is returned for success and - * the value zero, false, is returned for failure. - * Reasons for failure include the file read-only, is a directory, - * or an I/O error occurred. - */ -uint8_t SdFile::remove(void) { - // free any clusters - will fail if read-only or directory - if (!truncate(0)) return false; - - // cache directory entry - dir_t* d = cacheDirEntry(SdVolume::CACHE_FOR_WRITE); - if (!d) return false; - - // mark entry deleted - d->name[0] = DIR_NAME_DELETED; - - // set this SdFile closed - type_ = FAT_FILE_TYPE_CLOSED; - - // write entry to SD - return SdVolume::cacheFlush(); -} -//------------------------------------------------------------------------------ -/** - * Remove a file. - * - * The directory entry and all data for the file are deleted. - * - * \param[in] dirFile The directory that contains the file. - * \param[in] fileName The name of the file to be removed. - * - * \note This function should not be used to delete the 8.3 version of a - * file that has a long name. For example if a file has the long name - * "New Text Document.txt" you should not delete the 8.3 name "NEWTEX~1.TXT". - * - * \return The value one, true, is returned for success and - * the value zero, false, is returned for failure. - * Reasons for failure include the file is a directory, is read only, - * \a dirFile is not a directory, \a fileName is not found - * or an I/O error occurred. - */ -uint8_t SdFile::remove(SdFile* dirFile, const char* fileName) { - SdFile file; - if (!file.open(dirFile, fileName, O_WRITE)) return false; - return file.remove(); -} -//------------------------------------------------------------------------------ -/** Remove a directory file. - * - * The directory file will be removed only if it is empty and is not the - * root directory. rmDir() follows DOS and Windows and ignores the - * read-only attribute for the directory. - * - * \note This function should not be used to delete the 8.3 version of a - * directory that has a long name. For example if a directory has the - * long name "New folder" you should not delete the 8.3 name "NEWFOL~1". - * - * \return The value one, true, is returned for success and - * the value zero, false, is returned for failure. - * Reasons for failure include the file is not a directory, is the root - * directory, is not empty, or an I/O error occurred. - */ -uint8_t SdFile::rmDir(void) { - // must be open subdirectory - if (!isSubDir()) return false; - - rewind(); - - // make sure directory is empty - while (curPosition_ < fileSize_) { - dir_t* p = readDirCache(); - if (p == NULL) return false; - // done if past last used entry - if (p->name[0] == DIR_NAME_FREE) break; - // skip empty slot or '.' or '..' - if (p->name[0] == DIR_NAME_DELETED || p->name[0] == '.') continue; - // error not empty - if (DIR_IS_FILE_OR_SUBDIR(p)) return false; - } - // convert empty directory to normal file for remove - type_ = FAT_FILE_TYPE_NORMAL; - flags_ |= O_WRITE; - return remove(); -} -//------------------------------------------------------------------------------ -/** Recursively delete a directory and all contained files. - * - * This is like the Unix/Linux 'rm -rf *' if called with the root directory - * hence the name. - * - * Warning - This will remove all contents of the directory including - * subdirectories. The directory will then be removed if it is not root. - * The read-only attribute for files will be ignored. - * - * \note This function should not be used to delete the 8.3 version of - * a directory that has a long name. See remove() and rmDir(). - * - * \return The value one, true, is returned for success and - * the value zero, false, is returned for failure. - */ -uint8_t SdFile::rmRfStar(void) { - rewind(); - while (curPosition_ < fileSize_) { - SdFile f; - - // remember position - uint16_t index = curPosition_/32; - - dir_t* p = readDirCache(); - if (!p) return false; - - // done if past last entry - if (p->name[0] == DIR_NAME_FREE) break; - - // skip empty slot or '.' or '..' - if (p->name[0] == DIR_NAME_DELETED || p->name[0] == '.') continue; - - // skip if part of long file name or volume label in root - if (!DIR_IS_FILE_OR_SUBDIR(p)) continue; - - if (!f.open(this, index, O_READ)) return false; - if (f.isSubDir()) { - // recursively delete - if (!f.rmRfStar()) return false; - } else { - // ignore read-only - f.flags_ |= O_WRITE; - if (!f.remove()) return false; - } - // position to next entry if required - if (curPosition_ != (32*(index + 1))) { - if (!seekSet(32*(index + 1))) return false; - } - } - // don't try to delete root - if (isRoot()) return true; - return rmDir(); -} -//------------------------------------------------------------------------------ -/** - * Sets a file's position. - * - * \param[in] pos The new position in bytes from the beginning of the file. - * - * \return The value one, true, is returned for success and - * the value zero, false, is returned for failure. - */ -uint8_t SdFile::seekSet(uint32_t pos) { - // error if file not open or seek past end of file - if (!isOpen() || pos > fileSize_) return false; - - if (type_ == FAT_FILE_TYPE_ROOT16) { - curPosition_ = pos; - return true; - } - if (pos == 0) { - // set position to start of file - curCluster_ = 0; - curPosition_ = 0; - return true; - } - // calculate cluster index for cur and new position - uint32_t nCur = (curPosition_ - 1) >> (vol_->clusterSizeShift_ + 9); - uint32_t nNew = (pos - 1) >> (vol_->clusterSizeShift_ + 9); - - if (nNew < nCur || curPosition_ == 0) { - // must follow chain from first cluster - curCluster_ = firstCluster_; - } else { - // advance from curPosition - nNew -= nCur; - } - while (nNew--) { - if (!vol_->fatGet(curCluster_, &curCluster_)) return false; - } - curPosition_ = pos; - return true; -} -//------------------------------------------------------------------------------ -/** - * The sync() call causes all modified data and directory fields - * to be written to the storage device. - * - * \return The value one, true, is returned for success and - * the value zero, false, is returned for failure. - * Reasons for failure include a call to sync() before a file has been - * opened or an I/O error. - */ -uint8_t SdFile::sync(void) { - // only allow open files and directories - if (!isOpen()) return false; - - if (flags_ & F_FILE_DIR_DIRTY) { - dir_t* d = cacheDirEntry(SdVolume::CACHE_FOR_WRITE); - if (!d) return false; - - // do not set filesize for dir files - if (!isDir()) d->fileSize = fileSize_; - - // update first cluster fields - d->firstClusterLow = firstCluster_ & 0XFFFF; - d->firstClusterHigh = firstCluster_ >> 16; - - // set modify time if user supplied a callback date/time function - if (dateTime_) { - dateTime_(&d->lastWriteDate, &d->lastWriteTime); - d->lastAccessDate = d->lastWriteDate; - } - // clear directory dirty - flags_ &= ~F_FILE_DIR_DIRTY; - } - return SdVolume::cacheFlush(); -} -//------------------------------------------------------------------------------ -/** - * Set a file's timestamps in its directory entry. - * - * \param[in] flags Values for \a flags are constructed by a bitwise-inclusive - * OR of flags from the following list - * - * T_ACCESS - Set the file's last access date. - * - * T_CREATE - Set the file's creation date and time. - * - * T_WRITE - Set the file's last write/modification date and time. - * - * \param[in] year Valid range 1980 - 2107 inclusive. - * - * \param[in] month Valid range 1 - 12 inclusive. - * - * \param[in] day Valid range 1 - 31 inclusive. - * - * \param[in] hour Valid range 0 - 23 inclusive. - * - * \param[in] minute Valid range 0 - 59 inclusive. - * - * \param[in] second Valid range 0 - 59 inclusive - * - * \note It is possible to set an invalid date since there is no check for - * the number of days in a month. - * - * \note - * Modify and access timestamps may be overwritten if a date time callback - * function has been set by dateTimeCallback(). - * - * \return The value one, true, is returned for success and - * the value zero, false, is returned for failure. - */ -uint8_t SdFile::timestamp(uint8_t flags, uint16_t year, uint8_t month, - uint8_t day, uint8_t hour, uint8_t minute, uint8_t second) { - if (!isOpen() - || year < 1980 - || year > 2107 - || month < 1 - || month > 12 - || day < 1 - || day > 31 - || hour > 23 - || minute > 59 - || second > 59) { - return false; - } - dir_t* d = cacheDirEntry(SdVolume::CACHE_FOR_WRITE); - if (!d) return false; - - uint16_t dirDate = FAT_DATE(year, month, day); - uint16_t dirTime = FAT_TIME(hour, minute, second); - if (flags & T_ACCESS) { - d->lastAccessDate = dirDate; - } - if (flags & T_CREATE) { - d->creationDate = dirDate; - d->creationTime = dirTime; - // seems to be units of 1/100 second not 1/10 as Microsoft states - d->creationTimeTenths = second & 1 ? 100 : 0; - } - if (flags & T_WRITE) { - d->lastWriteDate = dirDate; - d->lastWriteTime = dirTime; - } - SdVolume::cacheSetDirty(); - return sync(); -} -//------------------------------------------------------------------------------ -/** - * Truncate a file to a specified length. The current file position - * will be maintained if it is less than or equal to \a length otherwise - * it will be set to end of file. - * - * \param[in] length The desired length for the file. - * - * \return The value one, true, is returned for success and - * the value zero, false, is returned for failure. - * Reasons for failure include file is read only, file is a directory, - * \a length is greater than the current file size or an I/O error occurs. - */ -uint8_t SdFile::truncate(uint32_t length) { -// error if not a normal file or read-only - if (!isFile() || !(flags_ & O_WRITE)) return false; - - // error if length is greater than current size - if (length > fileSize_) return false; - - // fileSize and length are zero - nothing to do - if (fileSize_ == 0) return true; - - // remember position for seek after truncation - uint32_t newPos = curPosition_ > length ? length : curPosition_; - - // position to last cluster in truncated file - if (!seekSet(length)) return false; - - if (length == 0) { - // free all clusters - if (!vol_->freeChain(firstCluster_)) return false; - firstCluster_ = 0; - } else { - uint32_t toFree; - if (!vol_->fatGet(curCluster_, &toFree)) return false; - - if (!vol_->isEOC(toFree)) { - // free extra clusters - if (!vol_->freeChain(toFree)) return false; - - // current cluster is end of chain - if (!vol_->fatPutEOC(curCluster_)) return false; - } - } - fileSize_ = length; - - // need to update directory entry - flags_ |= F_FILE_DIR_DIRTY; - - if (!sync()) return false; - - // set file to correct position - return seekSet(newPos); -} -//------------------------------------------------------------------------------ -/** - * Write data to an open file. - * - * \note Data is moved to the cache but may not be written to the - * storage device until sync() is called. - * - * \param[in] buf Pointer to the location of the data to be written. - * - * \param[in] nbyte Number of bytes to write. - * - * \return For success write() returns the number of bytes written, always - * \a nbyte. If an error occurs, write() returns -1. Possible errors - * include write() is called before a file has been opened, write is called - * for a read-only file, device is full, a corrupt file system or an I/O error. - * - */ -size_t SdFile::write(const void* buf, uint16_t nbyte) { - // convert void* to uint8_t* - must be before goto statements - const uint8_t* src = reinterpret_cast(buf); - - // number of bytes left to write - must be before goto statements - uint16_t nToWrite = nbyte; - - // error if not a normal file or is read-only - if (!isFile() || !(flags_ & O_WRITE)) goto writeErrorReturn; - - // seek to end of file if append flag - if ((flags_ & O_APPEND) && curPosition_ != fileSize_) { - if (!seekEnd()) goto writeErrorReturn; - } - - while (nToWrite > 0) { - uint8_t blockOfCluster = vol_->blockOfCluster(curPosition_); - uint16_t blockOffset = curPosition_ & 0X1FF; - if (blockOfCluster == 0 && blockOffset == 0) { - // start of new cluster - if (curCluster_ == 0) { - if (firstCluster_ == 0) { - // allocate first cluster of file - if (!addCluster()) goto writeErrorReturn; - } else { - curCluster_ = firstCluster_; - } - } else { - uint32_t next; - if (!vol_->fatGet(curCluster_, &next)) return false; - if (vol_->isEOC(next)) { - // add cluster if at end of chain - if (!addCluster()) goto writeErrorReturn; - } else { - curCluster_ = next; - } - } - } - // max space in block - uint16_t n = 512 - blockOffset; - - // lesser of space and amount to write - if (n > nToWrite) n = nToWrite; - - // block for data write - uint32_t block = vol_->clusterStartBlock(curCluster_) + blockOfCluster; - if (n == 512) { - // full block - don't need to use cache - // invalidate cache if block is in cache - if (SdVolume::cacheBlockNumber_ == block) { - SdVolume::cacheBlockNumber_ = 0XFFFFFFFF; - } - if (!vol_->writeBlock(block, src)) goto writeErrorReturn; - src += 512; - } else { - if (blockOffset == 0 && curPosition_ >= fileSize_) { - // start of new block don't need to read into cache - if (!SdVolume::cacheFlush()) goto writeErrorReturn; - SdVolume::cacheBlockNumber_ = block; - SdVolume::cacheSetDirty(); - } else { - // rewrite part of block - if (!SdVolume::cacheRawBlock(block, SdVolume::CACHE_FOR_WRITE)) { - goto writeErrorReturn; - } - } - uint8_t* dst = SdVolume::cacheBuffer_.data + blockOffset; - uint8_t* end = dst + n; - while (dst != end) *dst++ = *src++; - } - nToWrite -= n; - curPosition_ += n; - } - if (curPosition_ > fileSize_) { - // update fileSize and insure sync will update dir entry - fileSize_ = curPosition_; - flags_ |= F_FILE_DIR_DIRTY; - } else if (dateTime_ && nbyte) { - // insure sync will update modified date and time - flags_ |= F_FILE_DIR_DIRTY; - } - - if (flags_ & O_SYNC) { - if (!sync()) goto writeErrorReturn; - } - return nbyte; - - writeErrorReturn: - // return for write error - //writeError = true; - setWriteError(); - return 0; -} -//------------------------------------------------------------------------------ -/** - * Write a byte to a file. Required by the Arduino Print class. - * - * Use SdFile::writeError to check for errors. - */ -size_t SdFile::write(uint8_t b) { - return write(&b, 1); -} -//------------------------------------------------------------------------------ -/** - * Write a string to a file. Used by the Arduino Print class. - * - * Use SdFile::writeError to check for errors. - */ -size_t SdFile::write(const char* str) { - return write(str, strlen(str)); -} -//------------------------------------------------------------------------------ -/** - * Write a PROGMEM string to a file. - * - * Use SdFile::writeError to check for errors. - */ -void SdFile::write_P(PGM_P str) { - for (uint8_t c; (c = pgm_read_byte(str)); str++) write(c); -} -//------------------------------------------------------------------------------ -/** - * Write a PROGMEM string followed by CR/LF to a file. - * - * Use SdFile::writeError to check for errors. - */ -void SdFile::writeln_P(PGM_P str) { - write_P(str); - println(); -} diff --git a/build/linux/work/libraries/SD/utility/SdInfo.h b/build/linux/work/libraries/SD/utility/SdInfo.h deleted file mode 100644 index acde74d97..000000000 --- a/build/linux/work/libraries/SD/utility/SdInfo.h +++ /dev/null @@ -1,232 +0,0 @@ -/* Arduino Sd2Card Library - * Copyright (C) 2009 by William Greiman - * - * This file is part of the Arduino Sd2Card Library - * - * This Library is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This Library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with the Arduino Sd2Card Library. If not, see - * . - */ -#ifndef SdInfo_h -#define SdInfo_h -#include -// Based on the document: -// -// SD Specifications -// Part 1 -// Physical Layer -// Simplified Specification -// Version 2.00 -// September 25, 2006 -// -// www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf -//------------------------------------------------------------------------------ -// SD card commands -/** GO_IDLE_STATE - init card in spi mode if CS low */ -uint8_t const CMD0 = 0X00; -/** SEND_IF_COND - verify SD Memory Card interface operating condition.*/ -uint8_t const CMD8 = 0X08; -/** SEND_CSD - read the Card Specific Data (CSD register) */ -uint8_t const CMD9 = 0X09; -/** SEND_CID - read the card identification information (CID register) */ -uint8_t const CMD10 = 0X0A; -/** SEND_STATUS - read the card status register */ -uint8_t const CMD13 = 0X0D; -/** READ_BLOCK - read a single data block from the card */ -uint8_t const CMD17 = 0X11; -/** WRITE_BLOCK - write a single data block to the card */ -uint8_t const CMD24 = 0X18; -/** WRITE_MULTIPLE_BLOCK - write blocks of data until a STOP_TRANSMISSION */ -uint8_t const CMD25 = 0X19; -/** ERASE_WR_BLK_START - sets the address of the first block to be erased */ -uint8_t const CMD32 = 0X20; -/** ERASE_WR_BLK_END - sets the address of the last block of the continuous - range to be erased*/ -uint8_t const CMD33 = 0X21; -/** ERASE - erase all previously selected blocks */ -uint8_t const CMD38 = 0X26; -/** APP_CMD - escape for application specific command */ -uint8_t const CMD55 = 0X37; -/** READ_OCR - read the OCR register of a card */ -uint8_t const CMD58 = 0X3A; -/** SET_WR_BLK_ERASE_COUNT - Set the number of write blocks to be - pre-erased before writing */ -uint8_t const ACMD23 = 0X17; -/** SD_SEND_OP_COMD - Sends host capacity support information and - activates the card's initialization process */ -uint8_t const ACMD41 = 0X29; -//------------------------------------------------------------------------------ -/** status for card in the ready state */ -uint8_t const R1_READY_STATE = 0X00; -/** status for card in the idle state */ -uint8_t const R1_IDLE_STATE = 0X01; -/** status bit for illegal command */ -uint8_t const R1_ILLEGAL_COMMAND = 0X04; -/** start data token for read or write single block*/ -uint8_t const DATA_START_BLOCK = 0XFE; -/** stop token for write multiple blocks*/ -uint8_t const STOP_TRAN_TOKEN = 0XFD; -/** start data token for write multiple blocks*/ -uint8_t const WRITE_MULTIPLE_TOKEN = 0XFC; -/** mask for data response tokens after a write block operation */ -uint8_t const DATA_RES_MASK = 0X1F; -/** write data accepted token */ -uint8_t const DATA_RES_ACCEPTED = 0X05; -//------------------------------------------------------------------------------ -typedef struct CID { - // byte 0 - uint8_t mid; // Manufacturer ID - // byte 1-2 - char oid[2]; // OEM/Application ID - // byte 3-7 - char pnm[5]; // Product name - // byte 8 - unsigned prv_m : 4; // Product revision n.m - unsigned prv_n : 4; - // byte 9-12 - uint32_t psn; // Product serial number - // byte 13 - unsigned mdt_year_high : 4; // Manufacturing date - unsigned reserved : 4; - // byte 14 - unsigned mdt_month : 4; - unsigned mdt_year_low :4; - // byte 15 - unsigned always1 : 1; - unsigned crc : 7; -}cid_t; -//------------------------------------------------------------------------------ -// CSD for version 1.00 cards -typedef struct CSDV1 { - // byte 0 - unsigned reserved1 : 6; - unsigned csd_ver : 2; - // byte 1 - uint8_t taac; - // byte 2 - uint8_t nsac; - // byte 3 - uint8_t tran_speed; - // byte 4 - uint8_t ccc_high; - // byte 5 - unsigned read_bl_len : 4; - unsigned ccc_low : 4; - // byte 6 - unsigned c_size_high : 2; - unsigned reserved2 : 2; - unsigned dsr_imp : 1; - unsigned read_blk_misalign :1; - unsigned write_blk_misalign : 1; - unsigned read_bl_partial : 1; - // byte 7 - uint8_t c_size_mid; - // byte 8 - unsigned vdd_r_curr_max : 3; - unsigned vdd_r_curr_min : 3; - unsigned c_size_low :2; - // byte 9 - unsigned c_size_mult_high : 2; - unsigned vdd_w_cur_max : 3; - unsigned vdd_w_curr_min : 3; - // byte 10 - unsigned sector_size_high : 6; - unsigned erase_blk_en : 1; - unsigned c_size_mult_low : 1; - // byte 11 - unsigned wp_grp_size : 7; - unsigned sector_size_low : 1; - // byte 12 - unsigned write_bl_len_high : 2; - unsigned r2w_factor : 3; - unsigned reserved3 : 2; - unsigned wp_grp_enable : 1; - // byte 13 - unsigned reserved4 : 5; - unsigned write_partial : 1; - unsigned write_bl_len_low : 2; - // byte 14 - unsigned reserved5: 2; - unsigned file_format : 2; - unsigned tmp_write_protect : 1; - unsigned perm_write_protect : 1; - unsigned copy : 1; - unsigned file_format_grp : 1; - // byte 15 - unsigned always1 : 1; - unsigned crc : 7; -}csd1_t; -//------------------------------------------------------------------------------ -// CSD for version 2.00 cards -typedef struct CSDV2 { - // byte 0 - unsigned reserved1 : 6; - unsigned csd_ver : 2; - // byte 1 - uint8_t taac; - // byte 2 - uint8_t nsac; - // byte 3 - uint8_t tran_speed; - // byte 4 - uint8_t ccc_high; - // byte 5 - unsigned read_bl_len : 4; - unsigned ccc_low : 4; - // byte 6 - unsigned reserved2 : 4; - unsigned dsr_imp : 1; - unsigned read_blk_misalign :1; - unsigned write_blk_misalign : 1; - unsigned read_bl_partial : 1; - // byte 7 - unsigned reserved3 : 2; - unsigned c_size_high : 6; - // byte 8 - uint8_t c_size_mid; - // byte 9 - uint8_t c_size_low; - // byte 10 - unsigned sector_size_high : 6; - unsigned erase_blk_en : 1; - unsigned reserved4 : 1; - // byte 11 - unsigned wp_grp_size : 7; - unsigned sector_size_low : 1; - // byte 12 - unsigned write_bl_len_high : 2; - unsigned r2w_factor : 3; - unsigned reserved5 : 2; - unsigned wp_grp_enable : 1; - // byte 13 - unsigned reserved6 : 5; - unsigned write_partial : 1; - unsigned write_bl_len_low : 2; - // byte 14 - unsigned reserved7: 2; - unsigned file_format : 2; - unsigned tmp_write_protect : 1; - unsigned perm_write_protect : 1; - unsigned copy : 1; - unsigned file_format_grp : 1; - // byte 15 - unsigned always1 : 1; - unsigned crc : 7; -}csd2_t; -//------------------------------------------------------------------------------ -// union of old and new style CSD register -union csd_t { - csd1_t v1; - csd2_t v2; -}; -#endif // SdInfo_h diff --git a/build/linux/work/libraries/SD/utility/SdVolume.cpp b/build/linux/work/libraries/SD/utility/SdVolume.cpp deleted file mode 100644 index ece4acbac..000000000 --- a/build/linux/work/libraries/SD/utility/SdVolume.cpp +++ /dev/null @@ -1,295 +0,0 @@ -/* Arduino SdFat Library - * Copyright (C) 2009 by William Greiman - * - * This file is part of the Arduino SdFat Library - * - * This Library is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This Library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with the Arduino SdFat Library. If not, see - * . - */ -#include -//------------------------------------------------------------------------------ -// raw block cache -// init cacheBlockNumber_to invalid SD block number -uint32_t SdVolume::cacheBlockNumber_ = 0XFFFFFFFF; -cache_t SdVolume::cacheBuffer_; // 512 byte cache for Sd2Card -Sd2Card* SdVolume::sdCard_; // pointer to SD card object -uint8_t SdVolume::cacheDirty_ = 0; // cacheFlush() will write block if true -uint32_t SdVolume::cacheMirrorBlock_ = 0; // mirror block for second FAT -//------------------------------------------------------------------------------ -// find a contiguous group of clusters -uint8_t SdVolume::allocContiguous(uint32_t count, uint32_t* curCluster) { - // start of group - uint32_t bgnCluster; - - // flag to save place to start next search - uint8_t setStart; - - // set search start cluster - if (*curCluster) { - // try to make file contiguous - bgnCluster = *curCluster + 1; - - // don't save new start location - setStart = false; - } else { - // start at likely place for free cluster - bgnCluster = allocSearchStart_; - - // save next search start if one cluster - setStart = 1 == count; - } - // end of group - uint32_t endCluster = bgnCluster; - - // last cluster of FAT - uint32_t fatEnd = clusterCount_ + 1; - - // search the FAT for free clusters - for (uint32_t n = 0;; n++, endCluster++) { - // can't find space checked all clusters - if (n >= clusterCount_) return false; - - // past end - start from beginning of FAT - if (endCluster > fatEnd) { - bgnCluster = endCluster = 2; - } - uint32_t f; - if (!fatGet(endCluster, &f)) return false; - - if (f != 0) { - // cluster in use try next cluster as bgnCluster - bgnCluster = endCluster + 1; - } else if ((endCluster - bgnCluster + 1) == count) { - // done - found space - break; - } - } - // mark end of chain - if (!fatPutEOC(endCluster)) return false; - - // link clusters - while (endCluster > bgnCluster) { - if (!fatPut(endCluster - 1, endCluster)) return false; - endCluster--; - } - if (*curCluster != 0) { - // connect chains - if (!fatPut(*curCluster, bgnCluster)) return false; - } - // return first cluster number to caller - *curCluster = bgnCluster; - - // remember possible next free cluster - if (setStart) allocSearchStart_ = bgnCluster + 1; - - return true; -} -//------------------------------------------------------------------------------ -uint8_t SdVolume::cacheFlush(void) { - if (cacheDirty_) { - if (!sdCard_->writeBlock(cacheBlockNumber_, cacheBuffer_.data)) { - return false; - } - // mirror FAT tables - if (cacheMirrorBlock_) { - if (!sdCard_->writeBlock(cacheMirrorBlock_, cacheBuffer_.data)) { - return false; - } - cacheMirrorBlock_ = 0; - } - cacheDirty_ = 0; - } - return true; -} -//------------------------------------------------------------------------------ -uint8_t SdVolume::cacheRawBlock(uint32_t blockNumber, uint8_t action) { - if (cacheBlockNumber_ != blockNumber) { - if (!cacheFlush()) return false; - if (!sdCard_->readBlock(blockNumber, cacheBuffer_.data)) return false; - cacheBlockNumber_ = blockNumber; - } - cacheDirty_ |= action; - return true; -} -//------------------------------------------------------------------------------ -// cache a zero block for blockNumber -uint8_t SdVolume::cacheZeroBlock(uint32_t blockNumber) { - if (!cacheFlush()) return false; - - // loop take less flash than memset(cacheBuffer_.data, 0, 512); - for (uint16_t i = 0; i < 512; i++) { - cacheBuffer_.data[i] = 0; - } - cacheBlockNumber_ = blockNumber; - cacheSetDirty(); - return true; -} -//------------------------------------------------------------------------------ -// return the size in bytes of a cluster chain -uint8_t SdVolume::chainSize(uint32_t cluster, uint32_t* size) const { - uint32_t s = 0; - do { - if (!fatGet(cluster, &cluster)) return false; - s += 512UL << clusterSizeShift_; - } while (!isEOC(cluster)); - *size = s; - return true; -} -//------------------------------------------------------------------------------ -// Fetch a FAT entry -uint8_t SdVolume::fatGet(uint32_t cluster, uint32_t* value) const { - if (cluster > (clusterCount_ + 1)) return false; - uint32_t lba = fatStartBlock_; - lba += fatType_ == 16 ? cluster >> 8 : cluster >> 7; - if (lba != cacheBlockNumber_) { - if (!cacheRawBlock(lba, CACHE_FOR_READ)) return false; - } - if (fatType_ == 16) { - *value = cacheBuffer_.fat16[cluster & 0XFF]; - } else { - *value = cacheBuffer_.fat32[cluster & 0X7F] & FAT32MASK; - } - return true; -} -//------------------------------------------------------------------------------ -// Store a FAT entry -uint8_t SdVolume::fatPut(uint32_t cluster, uint32_t value) { - // error if reserved cluster - if (cluster < 2) return false; - - // error if not in FAT - if (cluster > (clusterCount_ + 1)) return false; - - // calculate block address for entry - uint32_t lba = fatStartBlock_; - lba += fatType_ == 16 ? cluster >> 8 : cluster >> 7; - - if (lba != cacheBlockNumber_) { - if (!cacheRawBlock(lba, CACHE_FOR_READ)) return false; - } - // store entry - if (fatType_ == 16) { - cacheBuffer_.fat16[cluster & 0XFF] = value; - } else { - cacheBuffer_.fat32[cluster & 0X7F] = value; - } - cacheSetDirty(); - - // mirror second FAT - if (fatCount_ > 1) cacheMirrorBlock_ = lba + blocksPerFat_; - return true; -} -//------------------------------------------------------------------------------ -// free a cluster chain -uint8_t SdVolume::freeChain(uint32_t cluster) { - // clear free cluster location - allocSearchStart_ = 2; - - do { - uint32_t next; - if (!fatGet(cluster, &next)) return false; - - // free cluster - if (!fatPut(cluster, 0)) return false; - - cluster = next; - } while (!isEOC(cluster)); - - return true; -} -//------------------------------------------------------------------------------ -/** - * Initialize a FAT volume. - * - * \param[in] dev The SD card where the volume is located. - * - * \param[in] part The partition to be used. Legal values for \a part are - * 1-4 to use the corresponding partition on a device formatted with - * a MBR, Master Boot Record, or zero if the device is formatted as - * a super floppy with the FAT boot sector in block zero. - * - * \return The value one, true, is returned for success and - * the value zero, false, is returned for failure. Reasons for - * failure include not finding a valid partition, not finding a valid - * FAT file system in the specified partition or an I/O error. - */ -uint8_t SdVolume::init(Sd2Card* dev, uint8_t part) { - uint32_t volumeStartBlock = 0; - sdCard_ = dev; - // if part == 0 assume super floppy with FAT boot sector in block zero - // if part > 0 assume mbr volume with partition table - if (part) { - if (part > 4)return false; - if (!cacheRawBlock(volumeStartBlock, CACHE_FOR_READ)) return false; - part_t* p = &cacheBuffer_.mbr.part[part-1]; - if ((p->boot & 0X7F) !=0 || - p->totalSectors < 100 || - p->firstSector == 0) { - // not a valid partition - return false; - } - volumeStartBlock = p->firstSector; - } - if (!cacheRawBlock(volumeStartBlock, CACHE_FOR_READ)) return false; - bpb_t* bpb = &cacheBuffer_.fbs.bpb; - if (bpb->bytesPerSector != 512 || - bpb->fatCount == 0 || - bpb->reservedSectorCount == 0 || - bpb->sectorsPerCluster == 0) { - // not valid FAT volume - return false; - } - fatCount_ = bpb->fatCount; - blocksPerCluster_ = bpb->sectorsPerCluster; - - // determine shift that is same as multiply by blocksPerCluster_ - clusterSizeShift_ = 0; - while (blocksPerCluster_ != (1 << clusterSizeShift_)) { - // error if not power of 2 - if (clusterSizeShift_++ > 7) return false; - } - blocksPerFat_ = bpb->sectorsPerFat16 ? - bpb->sectorsPerFat16 : bpb->sectorsPerFat32; - - fatStartBlock_ = volumeStartBlock + bpb->reservedSectorCount; - - // count for FAT16 zero for FAT32 - rootDirEntryCount_ = bpb->rootDirEntryCount; - - // directory start for FAT16 dataStart for FAT32 - rootDirStart_ = fatStartBlock_ + bpb->fatCount * blocksPerFat_; - - // data start for FAT16 and FAT32 - dataStartBlock_ = rootDirStart_ + ((32 * bpb->rootDirEntryCount + 511)/512); - - // total blocks for FAT16 or FAT32 - uint32_t totalBlocks = bpb->totalSectors16 ? - bpb->totalSectors16 : bpb->totalSectors32; - // total data blocks - clusterCount_ = totalBlocks - (dataStartBlock_ - volumeStartBlock); - - // divide by cluster size to get cluster count - clusterCount_ >>= clusterSizeShift_; - - // FAT type is determined by cluster count - if (clusterCount_ < 4085) { - fatType_ = 12; - } else if (clusterCount_ < 65525) { - fatType_ = 16; - } else { - rootDirStart_ = bpb->fat32RootCluster; - fatType_ = 32; - } - return true; -} diff --git a/build/linux/work/libraries/SPI/SPI.cpp b/build/linux/work/libraries/SPI/SPI.cpp deleted file mode 100644 index 42915df1e..000000000 --- a/build/linux/work/libraries/SPI/SPI.cpp +++ /dev/null @@ -1,61 +0,0 @@ -/* - * Copyright (c) 2010 by Cristian Maglie - * SPI Master library for arduino. - * - * This file is free software; you can redistribute it and/or modify - * it under the terms of either the GNU General Public License version 2 - * or the GNU Lesser General Public License version 2.1, both as - * published by the Free Software Foundation. - */ - -#include "pins_arduino.h" -#include "SPI.h" - -SPIClass SPI; - -void SPIClass::begin() { - // Set direction register for SCK and MOSI pin. - // MISO pin automatically overrides to INPUT. - // When the SS pin is set as OUTPUT, it can be used as - // a general purpose output port (it doesn't influence - // SPI operations). - - pinMode(SCK, OUTPUT); - pinMode(MOSI, OUTPUT); - pinMode(SS, OUTPUT); - - digitalWrite(SCK, LOW); - digitalWrite(MOSI, LOW); - digitalWrite(SS, HIGH); - - // Warning: if the SS pin ever becomes a LOW INPUT then SPI - // automatically switches to Slave, so the data direction of - // the SS pin MUST be kept as OUTPUT. - SPCR |= _BV(MSTR); - SPCR |= _BV(SPE); -} - -void SPIClass::end() { - SPCR &= ~_BV(SPE); -} - -void SPIClass::setBitOrder(uint8_t bitOrder) -{ - if(bitOrder == LSBFIRST) { - SPCR |= _BV(DORD); - } else { - SPCR &= ~(_BV(DORD)); - } -} - -void SPIClass::setDataMode(uint8_t mode) -{ - SPCR = (SPCR & ~SPI_MODE_MASK) | mode; -} - -void SPIClass::setClockDivider(uint8_t rate) -{ - SPCR = (SPCR & ~SPI_CLOCK_MASK) | (rate & SPI_CLOCK_MASK); - SPSR = (SPSR & ~SPI_2XCLOCK_MASK) | ((rate >> 2) & SPI_2XCLOCK_MASK); -} - diff --git a/build/linux/work/libraries/SPI/SPI.h b/build/linux/work/libraries/SPI/SPI.h deleted file mode 100644 index f647d5c89..000000000 --- a/build/linux/work/libraries/SPI/SPI.h +++ /dev/null @@ -1,70 +0,0 @@ -/* - * Copyright (c) 2010 by Cristian Maglie - * SPI Master library for arduino. - * - * This file is free software; you can redistribute it and/or modify - * it under the terms of either the GNU General Public License version 2 - * or the GNU Lesser General Public License version 2.1, both as - * published by the Free Software Foundation. - */ - -#ifndef _SPI_H_INCLUDED -#define _SPI_H_INCLUDED - -#include -#include -#include - -#define SPI_CLOCK_DIV4 0x00 -#define SPI_CLOCK_DIV16 0x01 -#define SPI_CLOCK_DIV64 0x02 -#define SPI_CLOCK_DIV128 0x03 -#define SPI_CLOCK_DIV2 0x04 -#define SPI_CLOCK_DIV8 0x05 -#define SPI_CLOCK_DIV32 0x06 -//#define SPI_CLOCK_DIV64 0x07 - -#define SPI_MODE0 0x00 -#define SPI_MODE1 0x04 -#define SPI_MODE2 0x08 -#define SPI_MODE3 0x0C - -#define SPI_MODE_MASK 0x0C // CPOL = bit 3, CPHA = bit 2 on SPCR -#define SPI_CLOCK_MASK 0x03 // SPR1 = bit 1, SPR0 = bit 0 on SPCR -#define SPI_2XCLOCK_MASK 0x01 // SPI2X = bit 0 on SPSR - -class SPIClass { -public: - inline static byte transfer(byte _data); - - // SPI Configuration methods - - inline static void attachInterrupt(); - inline static void detachInterrupt(); // Default - - static void begin(); // Default - static void end(); - - static void setBitOrder(uint8_t); - static void setDataMode(uint8_t); - static void setClockDivider(uint8_t); -}; - -extern SPIClass SPI; - -byte SPIClass::transfer(byte _data) { - SPDR = _data; - while (!(SPSR & _BV(SPIF))) - ; - return SPDR; -} - -void SPIClass::attachInterrupt() { - SPCR |= _BV(SPIE); -} - -void SPIClass::detachInterrupt() { - SPCR &= ~_BV(SPIE); -} - -#endif diff --git a/build/linux/work/libraries/SPI/examples/BarometricPressureSensor/BarometricPressureSensor.ino b/build/linux/work/libraries/SPI/examples/BarometricPressureSensor/BarometricPressureSensor.ino deleted file mode 100644 index 9d77a4261..000000000 --- a/build/linux/work/libraries/SPI/examples/BarometricPressureSensor/BarometricPressureSensor.ino +++ /dev/null @@ -1,143 +0,0 @@ -/* - SCP1000 Barometric Pressure Sensor Display - - Shows the output of a Barometric Pressure Sensor on a - Uses the SPI library. For details on the sensor, see: - http://www.sparkfun.com/commerce/product_info.php?products_id=8161 - http://www.vti.fi/en/support/obsolete_products/pressure_sensors/ - - This sketch adapted from Nathan Seidle's SCP1000 example for PIC: - http://www.sparkfun.com/datasheets/Sensors/SCP1000-Testing.zip - - Circuit: - SCP1000 sensor attached to pins 6, 7, 10 - 13: - DRDY: pin 6 - CSB: pin 7 - MOSI: pin 11 - MISO: pin 12 - SCK: pin 13 - - created 31 July 2010 - modified 14 August 2010 - by Tom Igoe - */ - -// the sensor communicates using SPI, so include the library: -#include - -//Sensor's memory register addresses: -const int PRESSURE = 0x1F; //3 most significant bits of pressure -const int PRESSURE_LSB = 0x20; //16 least significant bits of pressure -const int TEMPERATURE = 0x21; //16 bit temperature reading -const byte READ = 0b11111100; // SCP1000's read command -const byte WRITE = 0b00000010; // SCP1000's write command - -// pins used for the connection with the sensor -// the other you need are controlled by the SPI library): -const int dataReadyPin = 6; -const int chipSelectPin = 7; - -void setup() { - Serial.begin(9600); - - // start the SPI library: - SPI.begin(); - - // initalize the data ready and chip select pins: - pinMode(dataReadyPin, INPUT); - pinMode(chipSelectPin, OUTPUT); - - //Configure SCP1000 for low noise configuration: - writeRegister(0x02, 0x2D); - writeRegister(0x01, 0x03); - writeRegister(0x03, 0x02); - // give the sensor time to set up: - delay(100); -} - -void loop() { - //Select High Resolution Mode - writeRegister(0x03, 0x0A); - - // don't do anything until the data ready pin is high: - if (digitalRead(dataReadyPin) == HIGH) { - //Read the temperature data - int tempData = readRegister(0x21, 2); - - // convert the temperature to celsius and display it: - float realTemp = (float)tempData / 20.0; - Serial.print("Temp[C]="); - Serial.print(realTemp); - - - //Read the pressure data highest 3 bits: - byte pressure_data_high = readRegister(0x1F, 1); - pressure_data_high &= 0b00000111; //you only needs bits 2 to 0 - - //Read the pressure data lower 16 bits: - unsigned int pressure_data_low = readRegister(0x20, 2); - //combine the two parts into one 19-bit number: - long pressure = ((pressure_data_high << 16) | pressure_data_low)/4; - - // display the temperature: - Serial.println("\tPressure [Pa]=" + String(pressure)); - } -} - -//Read from or write to register from the SCP1000: -unsigned int readRegister(byte thisRegister, int bytesToRead ) { - byte inByte = 0; // incoming byte from the SPI - unsigned int result = 0; // result to return - Serial.print(thisRegister, BIN); - Serial.print("\t"); - // SCP1000 expects the register name in the upper 6 bits - // of the byte. So shift the bits left by two bits: - thisRegister = thisRegister << 2; - // now combine the address and the command into one byte - byte dataToSend = thisRegister & READ; - Serial.println(thisRegister, BIN); - // take the chip select low to select the device: - digitalWrite(chipSelectPin, LOW); - // send the device the register you want to read: - SPI.transfer(dataToSend); - // send a value of 0 to read the first byte returned: - result = SPI.transfer(0x00); - // decrement the number of bytes left to read: - bytesToRead--; - // if you still have another byte to read: - if (bytesToRead > 0) { - // shift the first byte left, then get the second byte: - result = result << 8; - inByte = SPI.transfer(0x00); - // combine the byte you just got with the previous one: - result = result | inByte; - // decrement the number of bytes left to read: - bytesToRead--; - } - // take the chip select high to de-select: - digitalWrite(chipSelectPin, HIGH); - // return the result: - return(result); -} - - -//Sends a write command to SCP1000 - -void writeRegister(byte thisRegister, byte thisValue) { - - // SCP1000 expects the register address in the upper 6 bits - // of the byte. So shift the bits left by two bits: - thisRegister = thisRegister << 2; - // now combine the register address and the command into one byte: - byte dataToSend = thisRegister | WRITE; - - // take the chip select low to select the device: - digitalWrite(chipSelectPin, LOW); - - SPI.transfer(dataToSend); //Send register location - SPI.transfer(thisValue); //Send value to record into register - - // take the chip select high to de-select: - digitalWrite(chipSelectPin, HIGH); -} - diff --git a/build/linux/work/libraries/SPI/examples/BarometricPressureSensor/BarometricPressureSensor/BarometricPressureSensor.ino b/build/linux/work/libraries/SPI/examples/BarometricPressureSensor/BarometricPressureSensor/BarometricPressureSensor.ino deleted file mode 100644 index 9c9c9b6c8..000000000 --- a/build/linux/work/libraries/SPI/examples/BarometricPressureSensor/BarometricPressureSensor/BarometricPressureSensor.ino +++ /dev/null @@ -1,143 +0,0 @@ -/* - SCP1000 Barometric Pressure Sensor Display - - Shows the output of a Barometric Pressure Sensor on a - Uses the SPI library. For details on the sensor, see: - http://www.sparkfun.com/commerce/product_info.php?products_id=8161 - http://www.vti.fi/en/support/obsolete_products/pressure_sensors/ - - This sketch adapted from Nathan Seidle's SCP1000 example for PIC: - http://www.sparkfun.com/datasheets/Sensors/SCP1000-Testing.zip - - Circuit: - SCP1000 sensor attached to pins 6, 7, 10 - 13: - DRDY: pin 6 - CSB: pin 7 - MOSI: pin 11 - MISO: pin 12 - SCK: pin 13 - - created 31 July 2010 - modified 14 August 2010 - by Tom Igoe - */ - -// the sensor communicates using SPI, so include the library: -#include - -//Sensor's memory register addresses: -const int PRESSURE = 0x1F; //3 most significant bits of pressure -const int PRESSURE_LSB = 0x20; //16 least significant bits of pressure -const int TEMPERATURE = 0x21; //16 bit temperature reading -cont byte READ = 0b00000000; // SCP1000's read command -const byte WRITE = 0b00000010; // SCP1000's write command -// pins used for the connection with the sensor -// the other you need are controlled by the SPI library): -const int dataReadyPin = 6; -const int chipSelectPin = 7; - -void setup() { - Serial.begin(9600); - - // start the SPI library: - SPI.begin(); - - // initalize the data ready and chip select pins: - pinMode(dataReadyPin, INPUT); - pinMode(chipSelectPin, OUTPUT); - - //Configure SCP1000 for low noise configuration: - writeRegister(0x02, 0x2D); - writeRegister(0x01, 0x03); - writeRegister(0x03, 0x02); - // give the sensor time to set up: - delay(100); -} - -void loop() { - //Select High Resolution Mode - writeRegister(0x03, 0x0A); - - // don't do anything until the data ready pin is high: - if (digitalRead(dataReadyPin) == HIGH) { - //Read the temperature data - int tempData = readRegister(0x21, 2); - - // convert the temperature to celsius and display it: - float realTemp = (float)tempData / 20.0; - Serial.print("Temp[C]="); - Serial.print(realTemp); - - - //Read the pressure data highest 3 bits: - byte pressure_data_high = readRegister(0x1F, 1); - pressure_data_high &= 0b00000111; //you only needs bits 2 to 0 - - //Read the pressure data lower 16 bits: - unsigned int pressure_data_low = readRegister(0x20, 2); - //combine the two parts into one 19-bit number: - long pressure = ((pressure_data_high << 16) | pressure_data_low)/4; - - // display the temperature: - Serial.println("\tPressure [Pa]=" + String(pressure)); - } -} - -//Read from or write to register from the SCP1000: -unsigned int readRegister(byte thisRegister, int bytesToRead ) { - byte inByte = 0; // incoming byte from the SPI - unsigned int result = 0; // result to return - - // SCP1000 expects the register name in the upper 6 bits - // of the byte. So shift the bits left by two bits: - thisRegister = thisRegister << 2; - // now combine the address and the command into one byte - dataToSend = thisRegister & READ; - - // take the chip select low to select the device: - digitalWrite(chipSelectPin, LOW); - // send the device the register you want to read: - SPI.transfer(dataToSend); - // send a value of 0 to read the first byte returned: - result = SPI.transfer(0x00); - // decrement the number of bytes left to read: - bytesToRead--; - // if you still have another byte to read: - if (bytesToRead > 0) { - // shift the first byte left, then get the second byte: - result = result << 8; - inByte = SPI.transfer(0x00); - // combine the byte you just got with the previous one: - result = result | inByte; - // decrement the number of bytes left to read: - bytesToRead--; - } - // take the chip select high to de-select: - digitalWrite(chipSelectPin, HIGH); - // return the result: - return(result); -} - - -//Sends a write command to SCP1000 - -void writeRegister(byte thisRegister, byte thisValue) { - - // SCP1000 expects the register address in the upper 6 bits - // of the byte. So shift the bits left by two bits: - thisRegister = thisRegister << 2; - // now combine the register address and the command into one byte: - dataToSend = thisRegister | WRITE; - - // take the chip select low to select the device: - digitalWrite(chipSelectPin, LOW); - - SPI.transfer(dataToSend); //Send register location - SPI.transfer(thisValue); //Send value to record into register - - // take the chip select high to de-select: - digitalWrite(chipSelectPin, HIGH); -} - - - diff --git a/build/linux/work/libraries/SPI/examples/DigitalPotControl/DigitalPotControl.ino b/build/linux/work/libraries/SPI/examples/DigitalPotControl/DigitalPotControl.ino deleted file mode 100644 index ef97dae88..000000000 --- a/build/linux/work/libraries/SPI/examples/DigitalPotControl/DigitalPotControl.ino +++ /dev/null @@ -1,71 +0,0 @@ -/* - Digital Pot Control - - This example controls an Analog Devices AD5206 digital potentiometer. - The AD5206 has 6 potentiometer channels. Each channel's pins are labeled - A - connect this to voltage - W - this is the pot's wiper, which changes when you set it - B - connect this to ground. - - The AD5206 is SPI-compatible,and to command it, you send two bytes, - one with the channel number (0 - 5) and one with the resistance value for the - channel (0 - 255). - - The circuit: - * All A pins of AD5206 connected to +5V - * All B pins of AD5206 connected to ground - * An LED and a 220-ohm resisor in series connected from each W pin to ground - * CS - to digital pin 10 (SS pin) - * SDI - to digital pin 11 (MOSI pin) - * CLK - to digital pin 13 (SCK pin) - - created 10 Aug 2010 - by Tom Igoe - - Thanks to Heather Dewey-Hagborg for the original tutorial, 2005 - -*/ - - -// inslude the SPI library: -#include - - -// set pin 10 as the slave select for the digital pot: -const int slaveSelectPin = 10; - -void setup() { - // set the slaveSelectPin as an output: - pinMode (slaveSelectPin, OUTPUT); - // initialize SPI: - SPI.begin(); -} - -void loop() { - // go through the six channels of the digital pot: - for (int channel = 0; channel < 6; channel++) { - // change the resistance on this channel from min to max: - for (int level = 0; level < 255; level++) { - digitalPotWrite(channel, level); - delay(10); - } - // wait a second at the top: - delay(100); - // change the resistance on this channel from max to min: - for (int level = 0; level < 255; level++) { - digitalPotWrite(channel, 255 - level); - delay(10); - } - } - -} - -int digitalPotWrite(int address, int value) { - // take the SS pin low to select the chip: - digitalWrite(slaveSelectPin,LOW); - // send in the address and value via SPI: - SPI.transfer(address); - SPI.transfer(value); - // take the SS pin high to de-select the chip: - digitalWrite(slaveSelectPin,HIGH); -} \ No newline at end of file diff --git a/build/linux/work/libraries/SPI/keywords.txt b/build/linux/work/libraries/SPI/keywords.txt deleted file mode 100644 index fa7616581..000000000 --- a/build/linux/work/libraries/SPI/keywords.txt +++ /dev/null @@ -1,36 +0,0 @@ -####################################### -# Syntax Coloring Map SPI -####################################### - -####################################### -# Datatypes (KEYWORD1) -####################################### - -SPI KEYWORD1 - -####################################### -# Methods and Functions (KEYWORD2) -####################################### -begin KEYWORD2 -end KEYWORD2 -transfer KEYWORD2 -setBitOrder KEYWORD2 -setDataMode KEYWORD2 -setClockDivider KEYWORD2 - - -####################################### -# Constants (LITERAL1) -####################################### -SPI_CLOCK_DIV4 LITERAL1 -SPI_CLOCK_DIV16 LITERAL1 -SPI_CLOCK_DIV64 LITERAL1 -SPI_CLOCK_DIV128 LITERAL1 -SPI_CLOCK_DIV2 LITERAL1 -SPI_CLOCK_DIV8 LITERAL1 -SPI_CLOCK_DIV32 LITERAL1 -SPI_CLOCK_DIV64 LITERAL1 -SPI_MODE0 LITERAL1 -SPI_MODE1 LITERAL1 -SPI_MODE2 LITERAL1 -SPI_MODE3 LITERAL1 \ No newline at end of file diff --git a/build/linux/work/libraries/Servo/Servo.cpp b/build/linux/work/libraries/Servo/Servo.cpp deleted file mode 100644 index dbe3bedd9..000000000 --- a/build/linux/work/libraries/Servo/Servo.cpp +++ /dev/null @@ -1,337 +0,0 @@ -/* - Servo.cpp - Interrupt driven Servo library for Arduino using 16 bit timers- Version 2 - Copyright (c) 2009 Michael Margolis. All right reserved. - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with this library; if not, write to the Free Software - Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/* - - A servo is activated by creating an instance of the Servo class passing the desired pin to the attach() method. - The servos are pulsed in the background using the value most recently written using the write() method - - Note that analogWrite of PWM on pins associated with the timer are disabled when the first servo is attached. - Timers are seized as needed in groups of 12 servos - 24 servos use two timers, 48 servos will use four. - - The methods are: - - Servo - Class for manipulating servo motors connected to Arduino pins. - - attach(pin ) - Attaches a servo motor to an i/o pin. - attach(pin, min, max ) - Attaches to a pin setting min and max values in microseconds - default min is 544, max is 2400 - - write() - Sets the servo angle in degrees. (invalid angle that is valid as pulse in microseconds is treated as microseconds) - writeMicroseconds() - Sets the servo pulse width in microseconds - read() - Gets the last written servo pulse width as an angle between 0 and 180. - readMicroseconds() - Gets the last written servo pulse width in microseconds. (was read_us() in first release) - attached() - Returns true if there is a servo attached. - detach() - Stops an attached servos from pulsing its i/o pin. - -*/ - -#include -#include - -#include "Servo.h" - -#define usToTicks(_us) (( clockCyclesPerMicrosecond()* _us) / 8) // converts microseconds to tick (assumes prescale of 8) // 12 Aug 2009 -#define ticksToUs(_ticks) (( (unsigned)_ticks * 8)/ clockCyclesPerMicrosecond() ) // converts from ticks back to microseconds - - -#define TRIM_DURATION 2 // compensation ticks to trim adjust for digitalWrite delays // 12 August 2009 - -//#define NBR_TIMERS (MAX_SERVOS / SERVOS_PER_TIMER) - -static servo_t servos[MAX_SERVOS]; // static array of servo structures -static volatile int8_t Channel[_Nbr_16timers ]; // counter for the servo being pulsed for each timer (or -1 if refresh interval) - -uint8_t ServoCount = 0; // the total number of attached servos - - -// convenience macros -#define SERVO_INDEX_TO_TIMER(_servo_nbr) ((timer16_Sequence_t)(_servo_nbr / SERVOS_PER_TIMER)) // returns the timer controlling this servo -#define SERVO_INDEX_TO_CHANNEL(_servo_nbr) (_servo_nbr % SERVOS_PER_TIMER) // returns the index of the servo on this timer -#define SERVO_INDEX(_timer,_channel) ((_timer*SERVOS_PER_TIMER) + _channel) // macro to access servo index by timer and channel -#define SERVO(_timer,_channel) (servos[SERVO_INDEX(_timer,_channel)]) // macro to access servo class by timer and channel - -#define SERVO_MIN() (MIN_PULSE_WIDTH - this->min * 4) // minimum value in uS for this servo -#define SERVO_MAX() (MAX_PULSE_WIDTH - this->max * 4) // maximum value in uS for this servo - -/************ static functions common to all instances ***********************/ - -static inline void handle_interrupts(timer16_Sequence_t timer, volatile uint16_t *TCNTn, volatile uint16_t* OCRnA) -{ - if( Channel[timer] < 0 ) - *TCNTn = 0; // channel set to -1 indicated that refresh interval completed so reset the timer - else{ - if( SERVO_INDEX(timer,Channel[timer]) < ServoCount && SERVO(timer,Channel[timer]).Pin.isActive == true ) - digitalWrite( SERVO(timer,Channel[timer]).Pin.nbr,LOW); // pulse this channel low if activated - } - - Channel[timer]++; // increment to the next channel - if( SERVO_INDEX(timer,Channel[timer]) < ServoCount && Channel[timer] < SERVOS_PER_TIMER) { - *OCRnA = *TCNTn + SERVO(timer,Channel[timer]).ticks; - if(SERVO(timer,Channel[timer]).Pin.isActive == true) // check if activated - digitalWrite( SERVO(timer,Channel[timer]).Pin.nbr,HIGH); // its an active channel so pulse it high - } - else { - // finished all channels so wait for the refresh period to expire before starting over - if( (unsigned)*TCNTn < (usToTicks(REFRESH_INTERVAL) + 4) ) // allow a few ticks to ensure the next OCR1A not missed - *OCRnA = (unsigned int)usToTicks(REFRESH_INTERVAL); - else - *OCRnA = *TCNTn + 4; // at least REFRESH_INTERVAL has elapsed - Channel[timer] = -1; // this will get incremented at the end of the refresh period to start again at the first channel - } -} - -#ifndef WIRING // Wiring pre-defines signal handlers so don't define any if compiling for the Wiring platform -// Interrupt handlers for Arduino -#if defined(_useTimer1) -SIGNAL (TIMER1_COMPA_vect) -{ - handle_interrupts(_timer1, &TCNT1, &OCR1A); -} -#endif - -#if defined(_useTimer3) -SIGNAL (TIMER3_COMPA_vect) -{ - handle_interrupts(_timer3, &TCNT3, &OCR3A); -} -#endif - -#if defined(_useTimer4) -SIGNAL (TIMER4_COMPA_vect) -{ - handle_interrupts(_timer4, &TCNT4, &OCR4A); -} -#endif - -#if defined(_useTimer5) -SIGNAL (TIMER5_COMPA_vect) -{ - handle_interrupts(_timer5, &TCNT5, &OCR5A); -} -#endif - -#elif defined WIRING -// Interrupt handlers for Wiring -#if defined(_useTimer1) -void Timer1Service() -{ - handle_interrupts(_timer1, &TCNT1, &OCR1A); -} -#endif -#if defined(_useTimer3) -void Timer3Service() -{ - handle_interrupts(_timer3, &TCNT3, &OCR3A); -} -#endif -#endif - - -static void initISR(timer16_Sequence_t timer) -{ -#if defined (_useTimer1) - if(timer == _timer1) { - TCCR1A = 0; // normal counting mode - TCCR1B = _BV(CS11); // set prescaler of 8 - TCNT1 = 0; // clear the timer count -#if defined(__AVR_ATmega8__)|| defined(__AVR_ATmega128__) - TIFR |= _BV(OCF1A); // clear any pending interrupts; - TIMSK |= _BV(OCIE1A) ; // enable the output compare interrupt -#else - // here if not ATmega8 or ATmega128 - TIFR1 |= _BV(OCF1A); // clear any pending interrupts; - TIMSK1 |= _BV(OCIE1A) ; // enable the output compare interrupt -#endif -#if defined(WIRING) - timerAttach(TIMER1OUTCOMPAREA_INT, Timer1Service); -#endif - } -#endif - -#if defined (_useTimer3) - if(timer == _timer3) { - TCCR3A = 0; // normal counting mode - TCCR3B = _BV(CS31); // set prescaler of 8 - TCNT3 = 0; // clear the timer count -#if defined(__AVR_ATmega128__) - TIFR |= _BV(OCF3A); // clear any pending interrupts; - ETIMSK |= _BV(OCIE3A); // enable the output compare interrupt -#else - TIFR3 = _BV(OCF3A); // clear any pending interrupts; - TIMSK3 = _BV(OCIE3A) ; // enable the output compare interrupt -#endif -#if defined(WIRING) - timerAttach(TIMER3OUTCOMPAREA_INT, Timer3Service); // for Wiring platform only -#endif - } -#endif - -#if defined (_useTimer4) - if(timer == _timer4) { - TCCR4A = 0; // normal counting mode - TCCR4B = _BV(CS41); // set prescaler of 8 - TCNT4 = 0; // clear the timer count - TIFR4 = _BV(OCF4A); // clear any pending interrupts; - TIMSK4 = _BV(OCIE4A) ; // enable the output compare interrupt - } -#endif - -#if defined (_useTimer5) - if(timer == _timer5) { - TCCR5A = 0; // normal counting mode - TCCR5B = _BV(CS51); // set prescaler of 8 - TCNT5 = 0; // clear the timer count - TIFR5 = _BV(OCF5A); // clear any pending interrupts; - TIMSK5 = _BV(OCIE5A) ; // enable the output compare interrupt - } -#endif -} - -static void finISR(timer16_Sequence_t timer) -{ - //disable use of the given timer -#if defined WIRING // Wiring - if(timer == _timer1) { - #if defined(__AVR_ATmega1281__)||defined(__AVR_ATmega2561__) - TIMSK1 &= ~_BV(OCIE1A) ; // disable timer 1 output compare interrupt - #else - TIMSK &= ~_BV(OCIE1A) ; // disable timer 1 output compare interrupt - #endif - timerDetach(TIMER1OUTCOMPAREA_INT); - } - else if(timer == _timer3) { - #if defined(__AVR_ATmega1281__)||defined(__AVR_ATmega2561__) - TIMSK3 &= ~_BV(OCIE3A); // disable the timer3 output compare A interrupt - #else - ETIMSK &= ~_BV(OCIE3A); // disable the timer3 output compare A interrupt - #endif - timerDetach(TIMER3OUTCOMPAREA_INT); - } -#else - //For arduino - in future: call here to a currently undefined function to reset the timer -#endif -} - -static boolean isTimerActive(timer16_Sequence_t timer) -{ - // returns true if any servo is active on this timer - for(uint8_t channel=0; channel < SERVOS_PER_TIMER; channel++) { - if(SERVO(timer,channel).Pin.isActive == true) - return true; - } - return false; -} - - -/****************** end of static functions ******************************/ - -Servo::Servo() -{ - if( ServoCount < MAX_SERVOS) { - this->servoIndex = ServoCount++; // assign a servo index to this instance - servos[this->servoIndex].ticks = usToTicks(DEFAULT_PULSE_WIDTH); // store default values - 12 Aug 2009 - } - else - this->servoIndex = INVALID_SERVO ; // too many servos -} - -uint8_t Servo::attach(int pin) -{ - return this->attach(pin, MIN_PULSE_WIDTH, MAX_PULSE_WIDTH); -} - -uint8_t Servo::attach(int pin, int min, int max) -{ - if(this->servoIndex < MAX_SERVOS ) { - pinMode( pin, OUTPUT) ; // set servo pin to output - servos[this->servoIndex].Pin.nbr = pin; - // todo min/max check: abs(min - MIN_PULSE_WIDTH) /4 < 128 - this->min = (MIN_PULSE_WIDTH - min)/4; //resolution of min/max is 4 uS - this->max = (MAX_PULSE_WIDTH - max)/4; - // initialize the timer if it has not already been initialized - timer16_Sequence_t timer = SERVO_INDEX_TO_TIMER(servoIndex); - if(isTimerActive(timer) == false) - initISR(timer); - servos[this->servoIndex].Pin.isActive = true; // this must be set after the check for isTimerActive - } - return this->servoIndex ; -} - -void Servo::detach() -{ - servos[this->servoIndex].Pin.isActive = false; - timer16_Sequence_t timer = SERVO_INDEX_TO_TIMER(servoIndex); - if(isTimerActive(timer) == false) { - finISR(timer); - } -} - -void Servo::write(int value) -{ - if(value < MIN_PULSE_WIDTH) - { // treat values less than 544 as angles in degrees (valid values in microseconds are handled as microseconds) - if(value < 0) value = 0; - if(value > 180) value = 180; - value = map(value, 0, 180, SERVO_MIN(), SERVO_MAX()); - } - this->writeMicroseconds(value); -} - -void Servo::writeMicroseconds(int value) -{ - // calculate and store the values for the given channel - byte channel = this->servoIndex; - if( (channel < MAX_SERVOS) ) // ensure channel is valid - { - if( value < SERVO_MIN() ) // ensure pulse width is valid - value = SERVO_MIN(); - else if( value > SERVO_MAX() ) - value = SERVO_MAX(); - - value = value - TRIM_DURATION; - value = usToTicks(value); // convert to ticks after compensating for interrupt overhead - 12 Aug 2009 - - uint8_t oldSREG = SREG; - cli(); - servos[channel].ticks = value; - SREG = oldSREG; - } -} - -int Servo::read() // return the value as degrees -{ - return map( this->readMicroseconds()+1, SERVO_MIN(), SERVO_MAX(), 0, 180); -} - -int Servo::readMicroseconds() -{ - unsigned int pulsewidth; - if( this->servoIndex != INVALID_SERVO ) - pulsewidth = ticksToUs(servos[this->servoIndex].ticks) + TRIM_DURATION ; // 12 aug 2009 - else - pulsewidth = 0; - - return pulsewidth; -} - -bool Servo::attached() -{ - return servos[this->servoIndex].Pin.isActive ; -} diff --git a/build/linux/work/libraries/Servo/Servo.h b/build/linux/work/libraries/Servo/Servo.h deleted file mode 100644 index bf3e01215..000000000 --- a/build/linux/work/libraries/Servo/Servo.h +++ /dev/null @@ -1,127 +0,0 @@ -/* - Servo.h - Interrupt driven Servo library for Arduino using 16 bit timers- Version 2 - Copyright (c) 2009 Michael Margolis. All right reserved. - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with this library; if not, write to the Free Software - Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -*/ - -/* - - A servo is activated by creating an instance of the Servo class passing the desired pin to the attach() method. - The servos are pulsed in the background using the value most recently written using the write() method - - Note that analogWrite of PWM on pins associated with the timer are disabled when the first servo is attached. - Timers are seized as needed in groups of 12 servos - 24 servos use two timers, 48 servos will use four. - The sequence used to sieze timers is defined in timers.h - - The methods are: - - Servo - Class for manipulating servo motors connected to Arduino pins. - - attach(pin ) - Attaches a servo motor to an i/o pin. - attach(pin, min, max ) - Attaches to a pin setting min and max values in microseconds - default min is 544, max is 2400 - - write() - Sets the servo angle in degrees. (invalid angle that is valid as pulse in microseconds is treated as microseconds) - writeMicroseconds() - Sets the servo pulse width in microseconds - read() - Gets the last written servo pulse width as an angle between 0 and 180. - readMicroseconds() - Gets the last written servo pulse width in microseconds. (was read_us() in first release) - attached() - Returns true if there is a servo attached. - detach() - Stops an attached servos from pulsing its i/o pin. - */ - -#ifndef Servo_h -#define Servo_h - -#include - -/* - * Defines for 16 bit timers used with Servo library - * - * If _useTimerX is defined then TimerX is a 16 bit timer on the curent board - * timer16_Sequence_t enumerates the sequence that the timers should be allocated - * _Nbr_16timers indicates how many 16 bit timers are available. - * - */ - -// Say which 16 bit timers can be used and in what order -#if defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__) -#define _useTimer5 -#define _useTimer1 -#define _useTimer3 -#define _useTimer4 -typedef enum { _timer5, _timer1, _timer3, _timer4, _Nbr_16timers } timer16_Sequence_t ; - -#elif defined(__AVR_ATmega32U4__) -#define _useTimer3 -#define _useTimer1 -typedef enum { _timer3, _timer1, _Nbr_16timers } timer16_Sequence_t ; - -#elif defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB1286__) -#define _useTimer3 -#define _useTimer1 -typedef enum { _timer3, _timer1, _Nbr_16timers } timer16_Sequence_t ; - -#elif defined(__AVR_ATmega128__) ||defined(__AVR_ATmega1281__)||defined(__AVR_ATmega2561__) -#define _useTimer3 -#define _useTimer1 -typedef enum { _timer3, _timer1, _Nbr_16timers } timer16_Sequence_t ; - -#else // everything else -#define _useTimer1 -typedef enum { _timer1, _Nbr_16timers } timer16_Sequence_t ; -#endif - -#define Servo_VERSION 2 // software version of this library - -#define MIN_PULSE_WIDTH 544 // the shortest pulse sent to a servo -#define MAX_PULSE_WIDTH 2400 // the longest pulse sent to a servo -#define DEFAULT_PULSE_WIDTH 1500 // default pulse width when servo is attached -#define REFRESH_INTERVAL 20000 // minumim time to refresh servos in microseconds - -#define SERVOS_PER_TIMER 12 // the maximum number of servos controlled by one timer -#define MAX_SERVOS (_Nbr_16timers * SERVOS_PER_TIMER) - -#define INVALID_SERVO 255 // flag indicating an invalid servo index - -typedef struct { - uint8_t nbr :6 ; // a pin number from 0 to 63 - uint8_t isActive :1 ; // true if this channel is enabled, pin not pulsed if false -} ServoPin_t ; - -typedef struct { - ServoPin_t Pin; - unsigned int ticks; -} servo_t; - -class Servo -{ -public: - Servo(); - uint8_t attach(int pin); // attach the given pin to the next free channel, sets pinMode, returns channel number or 0 if failure - uint8_t attach(int pin, int min, int max); // as above but also sets min and max values for writes. - void detach(); - void write(int value); // if value is < 200 its treated as an angle, otherwise as pulse width in microseconds - void writeMicroseconds(int value); // Write pulse width in microseconds - int read(); // returns current pulse width as an angle between 0 and 180 degrees - int readMicroseconds(); // returns current pulse width in microseconds for this servo (was read_us() in first release) - bool attached(); // return true if this servo is attached, otherwise false -private: - uint8_t servoIndex; // index into the channel data for this servo - int8_t min; // minimum is this value times 4 added to MIN_PULSE_WIDTH - int8_t max; // maximum is this value times 4 added to MAX_PULSE_WIDTH -}; - -#endif \ No newline at end of file diff --git a/build/linux/work/libraries/Servo/examples/Knob/Knob.ino b/build/linux/work/libraries/Servo/examples/Knob/Knob.ino deleted file mode 100644 index 886e107f8..000000000 --- a/build/linux/work/libraries/Servo/examples/Knob/Knob.ino +++ /dev/null @@ -1,22 +0,0 @@ -// Controlling a servo position using a potentiometer (variable resistor) -// by Michal Rinott - -#include - -Servo myservo; // create servo object to control a servo - -int potpin = 0; // analog pin used to connect the potentiometer -int val; // variable to read the value from the analog pin - -void setup() -{ - myservo.attach(9); // attaches the servo on pin 9 to the servo object -} - -void loop() -{ - val = analogRead(potpin); // reads the value of the potentiometer (value between 0 and 1023) - val = map(val, 0, 1023, 0, 179); // scale it to use it with the servo (value between 0 and 180) - myservo.write(val); // sets the servo position according to the scaled value - delay(15); // waits for the servo to get there -} diff --git a/build/linux/work/libraries/Servo/examples/Sweep/Sweep.ino b/build/linux/work/libraries/Servo/examples/Sweep/Sweep.ino deleted file mode 100644 index fb326e7e7..000000000 --- a/build/linux/work/libraries/Servo/examples/Sweep/Sweep.ino +++ /dev/null @@ -1,31 +0,0 @@ -// Sweep -// by BARRAGAN -// This example code is in the public domain. - - -#include - -Servo myservo; // create servo object to control a servo - // a maximum of eight servo objects can be created - -int pos = 0; // variable to store the servo position - -void setup() -{ - myservo.attach(9); // attaches the servo on pin 9 to the servo object -} - - -void loop() -{ - for(pos = 0; pos < 180; pos += 1) // goes from 0 degrees to 180 degrees - { // in steps of 1 degree - myservo.write(pos); // tell servo to go to position in variable 'pos' - delay(15); // waits 15ms for the servo to reach the position - } - for(pos = 180; pos>=1; pos-=1) // goes from 180 degrees to 0 degrees - { - myservo.write(pos); // tell servo to go to position in variable 'pos' - delay(15); // waits 15ms for the servo to reach the position - } -} diff --git a/build/linux/work/libraries/Servo/keywords.txt b/build/linux/work/libraries/Servo/keywords.txt deleted file mode 100644 index ca5ba79e3..000000000 --- a/build/linux/work/libraries/Servo/keywords.txt +++ /dev/null @@ -1,24 +0,0 @@ -####################################### -# Syntax Coloring Map Servo -####################################### - -####################################### -# Datatypes (KEYWORD1) -####################################### - -Servo KEYWORD1 - -####################################### -# Methods and Functions (KEYWORD2) -####################################### -attach KEYWORD2 -detach KEYWORD2 -write KEYWORD2 -read KEYWORD2 -attached KEYWORD2 -writeMicroseconds KEYWORD2 -readMicroseconds KEYWORD2 - -####################################### -# Constants (LITERAL1) -####################################### diff --git a/build/linux/work/libraries/SoftwareSerial/SoftwareSerial.cpp b/build/linux/work/libraries/SoftwareSerial/SoftwareSerial.cpp deleted file mode 100644 index c15bdda0d..000000000 --- a/build/linux/work/libraries/SoftwareSerial/SoftwareSerial.cpp +++ /dev/null @@ -1,515 +0,0 @@ -/* -SoftwareSerial.cpp (formerly NewSoftSerial.cpp) - -Multi-instance software serial library for Arduino/Wiring --- Interrupt-driven receive and other improvements by ladyada - (http://ladyada.net) --- Tuning, circular buffer, derivation from class Print/Stream, - multi-instance support, porting to 8MHz processors, - various optimizations, PROGMEM delay tables, inverse logic and - direct port writing by Mikal Hart (http://www.arduiniana.org) --- Pin change interrupt macros by Paul Stoffregen (http://www.pjrc.com) --- 20MHz processor support by Garrett Mace (http://www.macetech.com) --- ATmega1280/2560 support by Brett Hagman (http://www.roguerobotics.com/) - -This library is free software; you can redistribute it and/or -modify it under the terms of the GNU Lesser General Public -License as published by the Free Software Foundation; either -version 2.1 of the License, or (at your option) any later version. - -This library is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -Lesser General Public License for more details. - -You should have received a copy of the GNU Lesser General Public -License along with this library; if not, write to the Free Software -Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - -The latest version of this library can always be found at -http://arduiniana.org. -*/ - -// When set, _DEBUG co-opts pins 11 and 13 for debugging with an -// oscilloscope or logic analyzer. Beware: it also slightly modifies -// the bit times, so don't rely on it too much at high baud rates -#define _DEBUG 0 -#define _DEBUG_PIN1 11 -#define _DEBUG_PIN2 13 -// -// Includes -// -#include -#include -#include "Arduino.h" -#include "SoftwareSerial.h" -// -// Lookup table -// -typedef struct _DELAY_TABLE -{ - long baud; - unsigned short rx_delay_centering; - unsigned short rx_delay_intrabit; - unsigned short rx_delay_stopbit; - unsigned short tx_delay; -} DELAY_TABLE; - -#if F_CPU == 16000000 - -static const DELAY_TABLE PROGMEM table[] = -{ - // baud rxcenter rxintra rxstop tx - { 115200, 1, 17, 17, 12, }, - { 57600, 10, 37, 37, 33, }, - { 38400, 25, 57, 57, 54, }, - { 31250, 31, 70, 70, 68, }, - { 28800, 34, 77, 77, 74, }, - { 19200, 54, 117, 117, 114, }, - { 14400, 74, 156, 156, 153, }, - { 9600, 114, 236, 236, 233, }, - { 4800, 233, 474, 474, 471, }, - { 2400, 471, 950, 950, 947, }, - { 1200, 947, 1902, 1902, 1899, }, - { 300, 3804, 7617, 7617, 7614, }, -}; - -const int XMIT_START_ADJUSTMENT = 5; - -#elif F_CPU == 8000000 - -static const DELAY_TABLE table[] PROGMEM = -{ - // baud rxcenter rxintra rxstop tx - { 115200, 1, 5, 5, 3, }, - { 57600, 1, 15, 15, 13, }, - { 38400, 2, 25, 26, 23, }, - { 31250, 7, 32, 33, 29, }, - { 28800, 11, 35, 35, 32, }, - { 19200, 20, 55, 55, 52, }, - { 14400, 30, 75, 75, 72, }, - { 9600, 50, 114, 114, 112, }, - { 4800, 110, 233, 233, 230, }, - { 2400, 229, 472, 472, 469, }, - { 1200, 467, 948, 948, 945, }, - { 300, 1895, 3805, 3805, 3802, }, -}; - -const int XMIT_START_ADJUSTMENT = 4; - -#elif F_CPU == 20000000 - -// 20MHz support courtesy of the good people at macegr.com. -// Thanks, Garrett! - -static const DELAY_TABLE PROGMEM table[] = -{ - // baud rxcenter rxintra rxstop tx - { 115200, 3, 21, 21, 18, }, - { 57600, 20, 43, 43, 41, }, - { 38400, 37, 73, 73, 70, }, - { 31250, 45, 89, 89, 88, }, - { 28800, 46, 98, 98, 95, }, - { 19200, 71, 148, 148, 145, }, - { 14400, 96, 197, 197, 194, }, - { 9600, 146, 297, 297, 294, }, - { 4800, 296, 595, 595, 592, }, - { 2400, 592, 1189, 1189, 1186, }, - { 1200, 1187, 2379, 2379, 2376, }, - { 300, 4759, 9523, 9523, 9520, }, -}; - -const int XMIT_START_ADJUSTMENT = 6; - -#else - -#error This version of SoftwareSerial supports only 20, 16 and 8MHz processors - -#endif - -// -// Statics -// -SoftwareSerial *SoftwareSerial::active_object = 0; -char SoftwareSerial::_receive_buffer[_SS_MAX_RX_BUFF]; -volatile uint8_t SoftwareSerial::_receive_buffer_tail = 0; -volatile uint8_t SoftwareSerial::_receive_buffer_head = 0; - -// -// Debugging -// -// This function generates a brief pulse -// for debugging or measuring on an oscilloscope. -inline void DebugPulse(uint8_t pin, uint8_t count) -{ -#if _DEBUG - volatile uint8_t *pport = portOutputRegister(digitalPinToPort(pin)); - - uint8_t val = *pport; - while (count--) - { - *pport = val | digitalPinToBitMask(pin); - *pport = val; - } -#endif -} - -// -// Private methods -// - -/* static */ -inline void SoftwareSerial::tunedDelay(uint16_t delay) { - uint8_t tmp=0; - - asm volatile("sbiw %0, 0x01 \n\t" - "ldi %1, 0xFF \n\t" - "cpi %A0, 0xFF \n\t" - "cpc %B0, %1 \n\t" - "brne .-10 \n\t" - : "+r" (delay), "+a" (tmp) - : "0" (delay) - ); -} - -// This function sets the current object as the "listening" -// one and returns true if it replaces another -bool SoftwareSerial::listen() -{ - if (active_object != this) - { - _buffer_overflow = false; - uint8_t oldSREG = SREG; - cli(); - _receive_buffer_head = _receive_buffer_tail = 0; - active_object = this; - SREG = oldSREG; - return true; - } - - return false; -} - -// -// The receive routine called by the interrupt handler -// -void SoftwareSerial::recv() -{ - -#if GCC_VERSION < 40302 -// Work-around for avr-gcc 4.3.0 OSX version bug -// Preserve the registers that the compiler misses -// (courtesy of Arduino forum user *etracer*) - asm volatile( - "push r18 \n\t" - "push r19 \n\t" - "push r20 \n\t" - "push r21 \n\t" - "push r22 \n\t" - "push r23 \n\t" - "push r26 \n\t" - "push r27 \n\t" - ::); -#endif - - uint8_t d = 0; - - // If RX line is high, then we don't see any start bit - // so interrupt is probably not for us - if (_inverse_logic ? rx_pin_read() : !rx_pin_read()) - { - // Wait approximately 1/2 of a bit width to "center" the sample - tunedDelay(_rx_delay_centering); - DebugPulse(_DEBUG_PIN2, 1); - - // Read each of the 8 bits - for (uint8_t i=0x1; i; i <<= 1) - { - tunedDelay(_rx_delay_intrabit); - DebugPulse(_DEBUG_PIN2, 1); - uint8_t noti = ~i; - if (rx_pin_read()) - d |= i; - else // else clause added to ensure function timing is ~balanced - d &= noti; - } - - // skip the stop bit - tunedDelay(_rx_delay_stopbit); - DebugPulse(_DEBUG_PIN2, 1); - - if (_inverse_logic) - d = ~d; - - // if buffer full, set the overflow flag and return - if ((_receive_buffer_tail + 1) % _SS_MAX_RX_BUFF != _receive_buffer_head) - { - // save new data in buffer: tail points to where byte goes - _receive_buffer[_receive_buffer_tail] = d; // save new byte - _receive_buffer_tail = (_receive_buffer_tail + 1) % _SS_MAX_RX_BUFF; - } - else - { -#if _DEBUG // for scope: pulse pin as overflow indictator - DebugPulse(_DEBUG_PIN1, 1); -#endif - _buffer_overflow = true; - } - } - -#if GCC_VERSION < 40302 -// Work-around for avr-gcc 4.3.0 OSX version bug -// Restore the registers that the compiler misses - asm volatile( - "pop r27 \n\t" - "pop r26 \n\t" - "pop r23 \n\t" - "pop r22 \n\t" - "pop r21 \n\t" - "pop r20 \n\t" - "pop r19 \n\t" - "pop r18 \n\t" - ::); -#endif -} - -void SoftwareSerial::tx_pin_write(uint8_t pin_state) -{ - if (pin_state == LOW) - *_transmitPortRegister &= ~_transmitBitMask; - else - *_transmitPortRegister |= _transmitBitMask; -} - -uint8_t SoftwareSerial::rx_pin_read() -{ - return *_receivePortRegister & _receiveBitMask; -} - -// -// Interrupt handling -// - -/* static */ -inline void SoftwareSerial::handle_interrupt() -{ - if (active_object) - { - active_object->recv(); - } -} - -#if defined(PCINT0_vect) -ISR(PCINT0_vect) -{ - SoftwareSerial::handle_interrupt(); -} -#endif - -#if defined(PCINT1_vect) -ISR(PCINT1_vect) -{ - SoftwareSerial::handle_interrupt(); -} -#endif - -#if defined(PCINT2_vect) -ISR(PCINT2_vect) -{ - SoftwareSerial::handle_interrupt(); -} -#endif - -#if defined(PCINT3_vect) -ISR(PCINT3_vect) -{ - SoftwareSerial::handle_interrupt(); -} -#endif - -// -// Constructor -// -SoftwareSerial::SoftwareSerial(uint8_t receivePin, uint8_t transmitPin, bool inverse_logic /* = false */) : - _rx_delay_centering(0), - _rx_delay_intrabit(0), - _rx_delay_stopbit(0), - _tx_delay(0), - _buffer_overflow(false), - _inverse_logic(inverse_logic) -{ - setTX(transmitPin); - setRX(receivePin); -} - -// -// Destructor -// -SoftwareSerial::~SoftwareSerial() -{ - end(); -} - -void SoftwareSerial::setTX(uint8_t tx) -{ - pinMode(tx, OUTPUT); - digitalWrite(tx, HIGH); - _transmitBitMask = digitalPinToBitMask(tx); - uint8_t port = digitalPinToPort(tx); - _transmitPortRegister = portOutputRegister(port); -} - -void SoftwareSerial::setRX(uint8_t rx) -{ - pinMode(rx, INPUT); - if (!_inverse_logic) - digitalWrite(rx, HIGH); // pullup for normal logic! - _receivePin = rx; - _receiveBitMask = digitalPinToBitMask(rx); - uint8_t port = digitalPinToPort(rx); - _receivePortRegister = portInputRegister(port); -} - -// -// Public methods -// - -void SoftwareSerial::begin(long speed) -{ - _rx_delay_centering = _rx_delay_intrabit = _rx_delay_stopbit = _tx_delay = 0; - - for (unsigned i=0; i -#include - -/****************************************************************************** -* Definitions -******************************************************************************/ - -#define _SS_MAX_RX_BUFF 64 // RX buffer size -#ifndef GCC_VERSION -#define GCC_VERSION (__GNUC__ * 10000 + __GNUC_MINOR__ * 100 + __GNUC_PATCHLEVEL__) -#endif - -class SoftwareSerial : public Stream -{ -private: - // per object data - uint8_t _receivePin; - uint8_t _receiveBitMask; - volatile uint8_t *_receivePortRegister; - uint8_t _transmitBitMask; - volatile uint8_t *_transmitPortRegister; - - uint16_t _rx_delay_centering; - uint16_t _rx_delay_intrabit; - uint16_t _rx_delay_stopbit; - uint16_t _tx_delay; - - uint16_t _buffer_overflow:1; - uint16_t _inverse_logic:1; - - // static data - static char _receive_buffer[_SS_MAX_RX_BUFF]; - static volatile uint8_t _receive_buffer_tail; - static volatile uint8_t _receive_buffer_head; - static SoftwareSerial *active_object; - - // private methods - void recv(); - uint8_t rx_pin_read(); - void tx_pin_write(uint8_t pin_state); - void setTX(uint8_t transmitPin); - void setRX(uint8_t receivePin); - - // private static method for timing - static inline void tunedDelay(uint16_t delay); - -public: - // public methods - SoftwareSerial(uint8_t receivePin, uint8_t transmitPin, bool inverse_logic = false); - ~SoftwareSerial(); - void begin(long speed); - bool listen(); - void end(); - bool isListening() { return this == active_object; } - bool overflow() { bool ret = _buffer_overflow; _buffer_overflow = false; return ret; } - int peek(); - - virtual size_t write(uint8_t byte); - virtual int read(); - virtual int available(); - virtual void flush(); - - using Print::write; - - // public only for easy access by interrupt handlers - static inline void handle_interrupt(); -}; - -// Arduino 0012 workaround -#undef int -#undef char -#undef long -#undef byte -#undef float -#undef abs -#undef round - -#endif diff --git a/build/linux/work/libraries/SoftwareSerial/examples/SoftwareSerialExample/SoftwareSerialExample.ino b/build/linux/work/libraries/SoftwareSerial/examples/SoftwareSerialExample/SoftwareSerialExample.ino deleted file mode 100644 index a19307b14..000000000 --- a/build/linux/work/libraries/SoftwareSerial/examples/SoftwareSerialExample/SoftwareSerialExample.ino +++ /dev/null @@ -1,44 +0,0 @@ -/* - Software serial multple serial test - - Receives from the hardware serial, sends to software serial. - Receives from software serial, sends to hardware serial. - - The circuit: - * RX is digital pin 2 (connect to TX of other device) - * TX is digital pin 3 (connect to RX of other device) - - created back in the mists of time - modified 2 Apr 2012 - by Tom Igoe - based on Mikal Hart's example - - This example code is in the public domain. - - */ -#include - -SoftwareSerial mySerial(2, 3); // RX, TX - -void setup() -{ - // Open serial communications and wait for port to open: - Serial.begin57600; - // this check is only needed on the Leonardo: - while (!Serial) ; - ; - - Serial.println("Goodnight moon!"); - - // set the data rate for the SoftwareSerial port - mySerial.begin(4800); - mySerial.println("Hello, world?"); -} - -void loop() // run over and over -{ - if (mySerial.available()) - Serial.write(mySerial.read()); - if (Serial.available()) - mySerial.write(Serial.read()); -} diff --git a/build/linux/work/libraries/SoftwareSerial/examples/TwoPortReceive/TwoPortReceive.ino b/build/linux/work/libraries/SoftwareSerial/examples/TwoPortReceive/TwoPortReceive.ino deleted file mode 100644 index bc0ae725c..000000000 --- a/build/linux/work/libraries/SoftwareSerial/examples/TwoPortReceive/TwoPortReceive.ino +++ /dev/null @@ -1,82 +0,0 @@ -/* - Software serial multple serial test - - Receives from the two software serial ports, - sends to the hardware serial port. - - In order to listen on a software port, you call port.listen(). - When using two software serial ports, you have to switch ports - by listen()ing on each one in turn. Pick a logical time to switch - ports, like the end of an expected transmission, or when the - buffer is empty. This example switches ports when there is nothing - more to read from a port - - The circuit: - Two devices which communicate serially are needed. - * First serial device's TX attached to digital pin 2, RX to pin 3 - * Second serial device's TX attached to digital pin 4, RX to pin 5 - - created 18 Apr. 2011 - modified 2 Apr 2012 - by Tom Igoe - based on Mikal Hart's twoPortRXExample - - This example code is in the public domain. - - */ - -#include -// software serial #1: TX = digital pin 2, RX = digital pin 3 -SoftwareSerial portOne(2, 3); - -// software serial #2: TX = digital pin 4, RX = digital pin 5 -SoftwareSerial portTwo(4, 5); - -void setup() -{ - // Open serial communications and wait for port to open: - Serial.begin(9600); - // this check is only needed on the Leonardo: - while (!Serial) ; - ; - - // Start each software serial port - portOne.begin(9600); - portTwo.begin(9600); -} - -void loop() -{ - // By default, the last intialized port is listening. - // when you want to listen on a port, explicitly select it: - portOne.listen(); - Serial.println("Data from port one:"); - // while there is data coming in, read it - // and send to the hardware serial port: - while (portOne.available() > 0) { - char inByte = portOne.read(); - Serial.write(inByte); - } - - // blank line to separate data from the two ports: - Serial.println(); - - // Now listen on the second port - portTwo.listen(); - // while there is data coming in, read it - // and send to the hardware serial port: - Serial.println("Data from port two:"); - while (portTwo.available() > 0) { - char inByte = portTwo.read(); - Serial.write(inByte); - } - - // blank line to separate data from the two ports: - Serial.println(); -} - - - - - - diff --git a/build/linux/work/libraries/SoftwareSerial/keywords.txt b/build/linux/work/libraries/SoftwareSerial/keywords.txt deleted file mode 100644 index 90d4c152d..000000000 --- a/build/linux/work/libraries/SoftwareSerial/keywords.txt +++ /dev/null @@ -1,27 +0,0 @@ -####################################### -# Syntax Coloring Map for NewSoftSerial -####################################### - -####################################### -# Datatypes (KEYWORD1) -####################################### - -NewSoftSerial KEYWORD1 - -####################################### -# Methods and Functions (KEYWORD2) -####################################### - -begin KEYWORD2 -end KEYWORD2 -read KEYWORD2 -available KEYWORD2 -isListening KEYWORD2 -overflow KEYWORD2 -flush KEYWORD2 -listen KEYWORD2 - -####################################### -# Constants (LITERAL1) -####################################### - diff --git a/build/linux/work/libraries/Stepper/Stepper.cpp b/build/linux/work/libraries/Stepper/Stepper.cpp deleted file mode 100644 index 5d6b5e536..000000000 --- a/build/linux/work/libraries/Stepper/Stepper.cpp +++ /dev/null @@ -1,220 +0,0 @@ -/* - Stepper.cpp - - Stepper library for Wiring/Arduino - Version 0.4 - - Original library (0.1) by Tom Igoe. - Two-wire modifications (0.2) by Sebastian Gassner - Combination version (0.3) by Tom Igoe and David Mellis - Bug fix for four-wire (0.4) by Tom Igoe, bug fix from Noah Shibley - - Drives a unipolar or bipolar stepper motor using 2 wires or 4 wires - - When wiring multiple stepper motors to a microcontroller, - you quickly run out of output pins, with each motor requiring 4 connections. - - By making use of the fact that at any time two of the four motor - coils are the inverse of the other two, the number of - control connections can be reduced from 4 to 2. - - A slightly modified circuit around a Darlington transistor array or an L293 H-bridge - connects to only 2 microcontroler pins, inverts the signals received, - and delivers the 4 (2 plus 2 inverted ones) output signals required - for driving a stepper motor. - - The sequence of control signals for 4 control wires is as follows: - - Step C0 C1 C2 C3 - 1 1 0 1 0 - 2 0 1 1 0 - 3 0 1 0 1 - 4 1 0 0 1 - - The sequence of controls signals for 2 control wires is as follows - (columns C1 and C2 from above): - - Step C0 C1 - 1 0 1 - 2 1 1 - 3 1 0 - 4 0 0 - - The circuits can be found at - -http://www.arduino.cc/en/Tutorial/Stepper - - - */ - - -#include "Arduino.h" -#include "Stepper.h" - -/* - * two-wire constructor. - * Sets which wires should control the motor. - */ -Stepper::Stepper(int number_of_steps, int motor_pin_1, int motor_pin_2) -{ - this->step_number = 0; // which step the motor is on - this->speed = 0; // the motor speed, in revolutions per minute - this->direction = 0; // motor direction - this->last_step_time = 0; // time stamp in ms of the last step taken - this->number_of_steps = number_of_steps; // total number of steps for this motor - - // Arduino pins for the motor control connection: - this->motor_pin_1 = motor_pin_1; - this->motor_pin_2 = motor_pin_2; - - // setup the pins on the microcontroller: - pinMode(this->motor_pin_1, OUTPUT); - pinMode(this->motor_pin_2, OUTPUT); - - // When there are only 2 pins, set the other two to 0: - this->motor_pin_3 = 0; - this->motor_pin_4 = 0; - - // pin_count is used by the stepMotor() method: - this->pin_count = 2; -} - - -/* - * constructor for four-pin version - * Sets which wires should control the motor. - */ - -Stepper::Stepper(int number_of_steps, int motor_pin_1, int motor_pin_2, int motor_pin_3, int motor_pin_4) -{ - this->step_number = 0; // which step the motor is on - this->speed = 0; // the motor speed, in revolutions per minute - this->direction = 0; // motor direction - this->last_step_time = 0; // time stamp in ms of the last step taken - this->number_of_steps = number_of_steps; // total number of steps for this motor - - // Arduino pins for the motor control connection: - this->motor_pin_1 = motor_pin_1; - this->motor_pin_2 = motor_pin_2; - this->motor_pin_3 = motor_pin_3; - this->motor_pin_4 = motor_pin_4; - - // setup the pins on the microcontroller: - pinMode(this->motor_pin_1, OUTPUT); - pinMode(this->motor_pin_2, OUTPUT); - pinMode(this->motor_pin_3, OUTPUT); - pinMode(this->motor_pin_4, OUTPUT); - - // pin_count is used by the stepMotor() method: - this->pin_count = 4; -} - -/* - Sets the speed in revs per minute - -*/ -void Stepper::setSpeed(long whatSpeed) -{ - this->step_delay = 60L * 1000L / this->number_of_steps / whatSpeed; -} - -/* - Moves the motor steps_to_move steps. If the number is negative, - the motor moves in the reverse direction. - */ -void Stepper::step(int steps_to_move) -{ - int steps_left = abs(steps_to_move); // how many steps to take - - // determine direction based on whether steps_to_mode is + or -: - if (steps_to_move > 0) {this->direction = 1;} - if (steps_to_move < 0) {this->direction = 0;} - - - // decrement the number of steps, moving one step each time: - while(steps_left > 0) { - // move only if the appropriate delay has passed: - if (millis() - this->last_step_time >= this->step_delay) { - // get the timeStamp of when you stepped: - this->last_step_time = millis(); - // increment or decrement the step number, - // depending on direction: - if (this->direction == 1) { - this->step_number++; - if (this->step_number == this->number_of_steps) { - this->step_number = 0; - } - } - else { - if (this->step_number == 0) { - this->step_number = this->number_of_steps; - } - this->step_number--; - } - // decrement the steps left: - steps_left--; - // step the motor to step number 0, 1, 2, or 3: - stepMotor(this->step_number % 4); - } - } -} - -/* - * Moves the motor forward or backwards. - */ -void Stepper::stepMotor(int thisStep) -{ - if (this->pin_count == 2) { - switch (thisStep) { - case 0: /* 01 */ - digitalWrite(motor_pin_1, LOW); - digitalWrite(motor_pin_2, HIGH); - break; - case 1: /* 11 */ - digitalWrite(motor_pin_1, HIGH); - digitalWrite(motor_pin_2, HIGH); - break; - case 2: /* 10 */ - digitalWrite(motor_pin_1, HIGH); - digitalWrite(motor_pin_2, LOW); - break; - case 3: /* 00 */ - digitalWrite(motor_pin_1, LOW); - digitalWrite(motor_pin_2, LOW); - break; - } - } - if (this->pin_count == 4) { - switch (thisStep) { - case 0: // 1010 - digitalWrite(motor_pin_1, HIGH); - digitalWrite(motor_pin_2, LOW); - digitalWrite(motor_pin_3, HIGH); - digitalWrite(motor_pin_4, LOW); - break; - case 1: // 0110 - digitalWrite(motor_pin_1, LOW); - digitalWrite(motor_pin_2, HIGH); - digitalWrite(motor_pin_3, HIGH); - digitalWrite(motor_pin_4, LOW); - break; - case 2: //0101 - digitalWrite(motor_pin_1, LOW); - digitalWrite(motor_pin_2, HIGH); - digitalWrite(motor_pin_3, LOW); - digitalWrite(motor_pin_4, HIGH); - break; - case 3: //1001 - digitalWrite(motor_pin_1, HIGH); - digitalWrite(motor_pin_2, LOW); - digitalWrite(motor_pin_3, LOW); - digitalWrite(motor_pin_4, HIGH); - break; - } - } -} - -/* - version() returns the version of the library: -*/ -int Stepper::version(void) -{ - return 4; -} diff --git a/build/linux/work/libraries/Stepper/Stepper.h b/build/linux/work/libraries/Stepper/Stepper.h deleted file mode 100644 index 4094aee90..000000000 --- a/build/linux/work/libraries/Stepper/Stepper.h +++ /dev/null @@ -1,83 +0,0 @@ -/* - Stepper.h - - Stepper library for Wiring/Arduino - Version 0.4 - - Original library (0.1) by Tom Igoe. - Two-wire modifications (0.2) by Sebastian Gassner - Combination version (0.3) by Tom Igoe and David Mellis - Bug fix for four-wire (0.4) by Tom Igoe, bug fix from Noah Shibley - - Drives a unipolar or bipolar stepper motor using 2 wires or 4 wires - - When wiring multiple stepper motors to a microcontroller, - you quickly run out of output pins, with each motor requiring 4 connections. - - By making use of the fact that at any time two of the four motor - coils are the inverse of the other two, the number of - control connections can be reduced from 4 to 2. - - A slightly modified circuit around a Darlington transistor array or an L293 H-bridge - connects to only 2 microcontroler pins, inverts the signals received, - and delivers the 4 (2 plus 2 inverted ones) output signals required - for driving a stepper motor. - - The sequence of control signals for 4 control wires is as follows: - - Step C0 C1 C2 C3 - 1 1 0 1 0 - 2 0 1 1 0 - 3 0 1 0 1 - 4 1 0 0 1 - - The sequence of controls signals for 2 control wires is as follows - (columns C1 and C2 from above): - - Step C0 C1 - 1 0 1 - 2 1 1 - 3 1 0 - 4 0 0 - - The circuits can be found at - http://www.arduino.cc/en/Tutorial/Stepper -*/ - -// ensure this library description is only included once -#ifndef Stepper_h -#define Stepper_h - -// library interface description -class Stepper { - public: - // constructors: - Stepper(int number_of_steps, int motor_pin_1, int motor_pin_2); - Stepper(int number_of_steps, int motor_pin_1, int motor_pin_2, int motor_pin_3, int motor_pin_4); - - // speed setter method: - void setSpeed(long whatSpeed); - - // mover method: - void step(int number_of_steps); - - int version(void); - - private: - void stepMotor(int this_step); - - int direction; // Direction of rotation - int speed; // Speed in RPMs - unsigned long step_delay; // delay between steps, in ms, based on speed - int number_of_steps; // total number of steps this motor can take - int pin_count; // whether you're driving the motor with 2 or 4 pins - int step_number; // which step the motor is on - - // motor pin numbers: - int motor_pin_1; - int motor_pin_2; - int motor_pin_3; - int motor_pin_4; - - long last_step_time; // time stamp in ms of when the last step was taken -}; - -#endif - diff --git a/build/linux/work/libraries/Stepper/examples/MotorKnob/MotorKnob.ino b/build/linux/work/libraries/Stepper/examples/MotorKnob/MotorKnob.ino deleted file mode 100644 index d42818634..000000000 --- a/build/linux/work/libraries/Stepper/examples/MotorKnob/MotorKnob.ino +++ /dev/null @@ -1,41 +0,0 @@ -/* - * MotorKnob - * - * A stepper motor follows the turns of a potentiometer - * (or other sensor) on analog input 0. - * - * http://www.arduino.cc/en/Reference/Stepper - * This example code is in the public domain. - */ - -#include - -// change this to the number of steps on your motor -#define STEPS 100 - -// create an instance of the stepper class, specifying -// the number of steps of the motor and the pins it's -// attached to -Stepper stepper(STEPS, 8, 9, 10, 11); - -// the previous reading from the analog input -int previous = 0; - -void setup() -{ - // set the speed of the motor to 30 RPMs - stepper.setSpeed(30); -} - -void loop() -{ - // get the sensor value - int val = analogRead(0); - - // move a number of steps equal to the change in the - // sensor reading - stepper.step(val - previous); - - // remember the previous value of the sensor - previous = val; -} \ No newline at end of file diff --git a/build/linux/work/libraries/Stepper/examples/stepper_oneRevolution/stepper_oneRevolution.ino b/build/linux/work/libraries/Stepper/examples/stepper_oneRevolution/stepper_oneRevolution.ino deleted file mode 100644 index 2dbb57d7a..000000000 --- a/build/linux/work/libraries/Stepper/examples/stepper_oneRevolution/stepper_oneRevolution.ino +++ /dev/null @@ -1,44 +0,0 @@ - -/* - Stepper Motor Control - one revolution - - This program drives a unipolar or bipolar stepper motor. - The motor is attached to digital pins 8 - 11 of the Arduino. - - The motor should revolve one revolution in one direction, then - one revolution in the other direction. - - - Created 11 Mar. 2007 - Modified 30 Nov. 2009 - by Tom Igoe - - */ - -#include - -const int stepsPerRevolution = 200; // change this to fit the number of steps per revolution - // for your motor - -// initialize the stepper library on pins 8 through 11: -Stepper myStepper(stepsPerRevolution, 8,9,10,11); - -void setup() { - // set the speed at 60 rpm: - myStepper.setSpeed(60); - // initialize the serial port: - Serial.begin(9600); -} - -void loop() { - // step one revolution in one direction: - Serial.println("clockwise"); - myStepper.step(stepsPerRevolution); - delay(500); - - // step one revolution in the other direction: - Serial.println("counterclockwise"); - myStepper.step(-stepsPerRevolution); - delay(500); -} - diff --git a/build/linux/work/libraries/Stepper/examples/stepper_oneStepAtATime/stepper_oneStepAtATime.ino b/build/linux/work/libraries/Stepper/examples/stepper_oneStepAtATime/stepper_oneStepAtATime.ino deleted file mode 100644 index 36d32991d..000000000 --- a/build/linux/work/libraries/Stepper/examples/stepper_oneStepAtATime/stepper_oneStepAtATime.ino +++ /dev/null @@ -1,44 +0,0 @@ - -/* - Stepper Motor Control - one step at a time - - This program drives a unipolar or bipolar stepper motor. - The motor is attached to digital pins 8 - 11 of the Arduino. - - The motor will step one step at a time, very slowly. You can use this to - test that you've got the four wires of your stepper wired to the correct - pins. If wired correctly, all steps should be in the same direction. - - Use this also to count the number of steps per revolution of your motor, - if you don't know it. Then plug that number into the oneRevolution - example to see if you got it right. - - Created 30 Nov. 2009 - by Tom Igoe - - */ - -#include - -const int stepsPerRevolution = 200; // change this to fit the number of steps per revolution - // for your motor - -// initialize the stepper library on pins 8 through 11: -Stepper myStepper(stepsPerRevolution, 8,9,10,11); - -int stepCount = 0; // number of steps the motor has taken - -void setup() { - // initialize the serial port: - Serial.begin(9600); -} - -void loop() { - // step one step: - myStepper.step(1); - Serial.print("steps:" ); - Serial.println(stepCount); - stepCount++; - delay(500); -} - diff --git a/build/linux/work/libraries/Stepper/examples/stepper_speedControl/stepper_speedControl.ino b/build/linux/work/libraries/Stepper/examples/stepper_speedControl/stepper_speedControl.ino deleted file mode 100644 index dbd0f7f02..000000000 --- a/build/linux/work/libraries/Stepper/examples/stepper_speedControl/stepper_speedControl.ino +++ /dev/null @@ -1,49 +0,0 @@ - -/* - Stepper Motor Control - speed control - - This program drives a unipolar or bipolar stepper motor. - The motor is attached to digital pins 8 - 11 of the Arduino. - A potentiometer is connected to analog input 0. - - The motor will rotate in a clockwise direction. The higher the potentiometer value, - the faster the motor speed. Because setSpeed() sets the delay between steps, - you may notice the motor is less responsive to changes in the sensor value at - low speeds. - - Created 30 Nov. 2009 - Modified 28 Oct 2010 - by Tom Igoe - - */ - -#include - -const int stepsPerRevolution = 200; // change this to fit the number of steps per revolution -// for your motor - - -// initialize the stepper library on pins 8 through 11: -Stepper myStepper(stepsPerRevolution, 8,9,10,11); - -int stepCount = 0; // number of steps the motor has taken - -void setup() { - // initialize the serial port: - Serial.begin(9600); -} - -void loop() { - // read the sensor value: - int sensorReading = analogRead(A0); - // map it to a range from 0 to 100: - int motorSpeed = map(sensorReading, 0, 1023, 0, 100); - // set the motor speed: - if (motorSpeed > 0) { - myStepper.setSpeed(motorSpeed); - // step 1/100 of a revolution: - myStepper.step(stepsPerRevolution/100); - } -} - - diff --git a/build/linux/work/libraries/Stepper/keywords.txt b/build/linux/work/libraries/Stepper/keywords.txt deleted file mode 100644 index 19a0fadf2..000000000 --- a/build/linux/work/libraries/Stepper/keywords.txt +++ /dev/null @@ -1,28 +0,0 @@ -####################################### -# Syntax Coloring Map For Test -####################################### - -####################################### -# Datatypes (KEYWORD1) -####################################### - -Stepper KEYWORD1 - -####################################### -# Methods and Functions (KEYWORD2) -####################################### - -step KEYWORD2 -setSpeed KEYWORD2 -version KEYWORD2 - -###################################### -# Instances (KEYWORD2) -####################################### -direction KEYWORD2 -speed KEYWORD2 - - -####################################### -# Constants (LITERAL1) -####################################### diff --git a/build/linux/work/libraries/Wire/Wire.cpp b/build/linux/work/libraries/Wire/Wire.cpp deleted file mode 100644 index 4e7a17c47..000000000 --- a/build/linux/work/libraries/Wire/Wire.cpp +++ /dev/null @@ -1,298 +0,0 @@ -/* - TwoWire.cpp - TWI/I2C library for Wiring & Arduino - Copyright (c) 2006 Nicholas Zambetti. All right reserved. - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with this library; if not, write to the Free Software - Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - - Modified 2012 by Todd Krein (todd@krein.org) to implement repeated starts -*/ - -extern "C" { - #include - #include - #include - #include "twi.h" -} - -#include "Wire.h" - -// Initialize Class Variables ////////////////////////////////////////////////// - -uint8_t TwoWire::rxBuffer[BUFFER_LENGTH]; -uint8_t TwoWire::rxBufferIndex = 0; -uint8_t TwoWire::rxBufferLength = 0; - -uint8_t TwoWire::txAddress = 0; -uint8_t TwoWire::txBuffer[BUFFER_LENGTH]; -uint8_t TwoWire::txBufferIndex = 0; -uint8_t TwoWire::txBufferLength = 0; - -uint8_t TwoWire::transmitting = 0; -void (*TwoWire::user_onRequest)(void); -void (*TwoWire::user_onReceive)(int); - -// Constructors //////////////////////////////////////////////////////////////// - -TwoWire::TwoWire() -{ -} - -// Public Methods ////////////////////////////////////////////////////////////// - -void TwoWire::begin(void) -{ - rxBufferIndex = 0; - rxBufferLength = 0; - - txBufferIndex = 0; - txBufferLength = 0; - - twi_init(); -} - -void TwoWire::begin(uint8_t address) -{ - twi_setAddress(address); - twi_attachSlaveTxEvent(onRequestService); - twi_attachSlaveRxEvent(onReceiveService); - begin(); -} - -void TwoWire::begin(int address) -{ - begin((uint8_t)address); -} - -uint8_t TwoWire::requestFrom(uint8_t address, uint8_t quantity, uint8_t sendStop) -{ - // clamp to buffer length - if(quantity > BUFFER_LENGTH){ - quantity = BUFFER_LENGTH; - } - // perform blocking read into buffer - uint8_t read = twi_readFrom(address, rxBuffer, quantity, sendStop); - // set rx buffer iterator vars - rxBufferIndex = 0; - rxBufferLength = read; - - return read; -} - -uint8_t TwoWire::requestFrom(uint8_t address, uint8_t quantity) -{ - return requestFrom((uint8_t)address, (uint8_t)quantity, (uint8_t)true); -} - -uint8_t TwoWire::requestFrom(int address, int quantity) -{ - return requestFrom((uint8_t)address, (uint8_t)quantity, (uint8_t)true); -} - -uint8_t TwoWire::requestFrom(int address, int quantity, int sendStop) -{ - return requestFrom((uint8_t)address, (uint8_t)quantity, (uint8_t)sendStop); -} - -void TwoWire::beginTransmission(uint8_t address) -{ - // indicate that we are transmitting - transmitting = 1; - // set address of targeted slave - txAddress = address; - // reset tx buffer iterator vars - txBufferIndex = 0; - txBufferLength = 0; -} - -void TwoWire::beginTransmission(int address) -{ - beginTransmission((uint8_t)address); -} - -// -// Originally, 'endTransmission' was an f(void) function. -// It has been modified to take one parameter indicating -// whether or not a STOP should be performed on the bus. -// Calling endTransmission(false) allows a sketch to -// perform a repeated start. -// -// WARNING: Nothing in the library keeps track of whether -// the bus tenure has been properly ended with a STOP. It -// is very possible to leave the bus in a hung state if -// no call to endTransmission(true) is made. Some I2C -// devices will behave oddly if they do not see a STOP. -// -uint8_t TwoWire::endTransmission(uint8_t sendStop) -{ - // transmit buffer (blocking) - int8_t ret = twi_writeTo(txAddress, txBuffer, txBufferLength, 1, sendStop); - // reset tx buffer iterator vars - txBufferIndex = 0; - txBufferLength = 0; - // indicate that we are done transmitting - transmitting = 0; - return ret; -} - -// This provides backwards compatibility with the original -// definition, and expected behaviour, of endTransmission -// -uint8_t TwoWire::endTransmission(void) -{ - return endTransmission(true); -} - -// must be called in: -// slave tx event callback -// or after beginTransmission(address) -size_t TwoWire::write(uint8_t data) -{ - if(transmitting){ - // in master transmitter mode - // don't bother if buffer is full - if(txBufferLength >= BUFFER_LENGTH){ - setWriteError(); - return 0; - } - // put byte in tx buffer - txBuffer[txBufferIndex] = data; - ++txBufferIndex; - // update amount in buffer - txBufferLength = txBufferIndex; - }else{ - // in slave send mode - // reply to master - twi_transmit(&data, 1); - } - return 1; -} - -// must be called in: -// slave tx event callback -// or after beginTransmission(address) -size_t TwoWire::write(const uint8_t *data, size_t quantity) -{ - if(transmitting){ - // in master transmitter mode - for(size_t i = 0; i < quantity; ++i){ - write(data[i]); - } - }else{ - // in slave send mode - // reply to master - twi_transmit(data, quantity); - } - return quantity; -} - -// must be called in: -// slave rx event callback -// or after requestFrom(address, numBytes) -int TwoWire::available(void) -{ - return rxBufferLength - rxBufferIndex; -} - -// must be called in: -// slave rx event callback -// or after requestFrom(address, numBytes) -int TwoWire::read(void) -{ - int value = -1; - - // get each successive byte on each call - if(rxBufferIndex < rxBufferLength){ - value = rxBuffer[rxBufferIndex]; - ++rxBufferIndex; - } - - return value; -} - -// must be called in: -// slave rx event callback -// or after requestFrom(address, numBytes) -int TwoWire::peek(void) -{ - int value = -1; - - if(rxBufferIndex < rxBufferLength){ - value = rxBuffer[rxBufferIndex]; - } - - return value; -} - -void TwoWire::flush(void) -{ - // XXX: to be implemented. -} - -// behind the scenes function that is called when data is received -void TwoWire::onReceiveService(uint8_t* inBytes, int numBytes) -{ - // don't bother if user hasn't registered a callback - if(!user_onReceive){ - return; - } - // don't bother if rx buffer is in use by a master requestFrom() op - // i know this drops data, but it allows for slight stupidity - // meaning, they may not have read all the master requestFrom() data yet - if(rxBufferIndex < rxBufferLength){ - return; - } - // copy twi rx buffer into local read buffer - // this enables new reads to happen in parallel - for(uint8_t i = 0; i < numBytes; ++i){ - rxBuffer[i] = inBytes[i]; - } - // set rx iterator vars - rxBufferIndex = 0; - rxBufferLength = numBytes; - // alert user program - user_onReceive(numBytes); -} - -// behind the scenes function that is called when data is requested -void TwoWire::onRequestService(void) -{ - // don't bother if user hasn't registered a callback - if(!user_onRequest){ - return; - } - // reset tx buffer iterator vars - // !!! this will kill any pending pre-master sendTo() activity - txBufferIndex = 0; - txBufferLength = 0; - // alert user program - user_onRequest(); -} - -// sets function called on slave write -void TwoWire::onReceive( void (*function)(int) ) -{ - user_onReceive = function; -} - -// sets function called on slave read -void TwoWire::onRequest( void (*function)(void) ) -{ - user_onRequest = function; -} - -// Preinstantiate Objects ////////////////////////////////////////////////////// - -TwoWire Wire = TwoWire(); - diff --git a/build/linux/work/libraries/Wire/Wire.h b/build/linux/work/libraries/Wire/Wire.h deleted file mode 100644 index a93d0f5bb..000000000 --- a/build/linux/work/libraries/Wire/Wire.h +++ /dev/null @@ -1,79 +0,0 @@ -/* - TwoWire.h - TWI/I2C library for Arduino & Wiring - Copyright (c) 2006 Nicholas Zambetti. All right reserved. - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with this library; if not, write to the Free Software - Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - - Modified 2012 by Todd Krein (todd@krein.org) to implement repeated starts -*/ - -#ifndef TwoWire_h -#define TwoWire_h - -#include -#include "Stream.h" - -#define BUFFER_LENGTH 32 - -class TwoWire : public Stream -{ - private: - static uint8_t rxBuffer[]; - static uint8_t rxBufferIndex; - static uint8_t rxBufferLength; - - static uint8_t txAddress; - static uint8_t txBuffer[]; - static uint8_t txBufferIndex; - static uint8_t txBufferLength; - - static uint8_t transmitting; - static void (*user_onRequest)(void); - static void (*user_onReceive)(int); - static void onRequestService(void); - static void onReceiveService(uint8_t*, int); - public: - TwoWire(); - void begin(); - void begin(uint8_t); - void begin(int); - void beginTransmission(uint8_t); - void beginTransmission(int); - uint8_t endTransmission(void); - uint8_t endTransmission(uint8_t); - uint8_t requestFrom(uint8_t, uint8_t); - uint8_t requestFrom(uint8_t, uint8_t, uint8_t); - uint8_t requestFrom(int, int); - uint8_t requestFrom(int, int, int); - virtual size_t write(uint8_t); - virtual size_t write(const uint8_t *, size_t); - virtual int available(void); - virtual int read(void); - virtual int peek(void); - virtual void flush(void); - void onReceive( void (*)(int) ); - void onRequest( void (*)(void) ); - - inline size_t write(unsigned long n) { return write((uint8_t)n); } - inline size_t write(long n) { return write((uint8_t)n); } - inline size_t write(unsigned int n) { return write((uint8_t)n); } - inline size_t write(int n) { return write((uint8_t)n); } - using Print::write; -}; - -extern TwoWire Wire; - -#endif - diff --git a/build/linux/work/libraries/Wire/examples/SFRRanger_reader/SFRRanger_reader.ino b/build/linux/work/libraries/Wire/examples/SFRRanger_reader/SFRRanger_reader.ino deleted file mode 100644 index 9c41c18f1..000000000 --- a/build/linux/work/libraries/Wire/examples/SFRRanger_reader/SFRRanger_reader.ino +++ /dev/null @@ -1,87 +0,0 @@ -// I2C SRF10 or SRF08 Devantech Ultrasonic Ranger Finder -// by Nicholas Zambetti -// and James Tichenor - -// Demonstrates use of the Wire library reading data from the -// Devantech Utrasonic Rangers SFR08 and SFR10 - -// Created 29 April 2006 - -// This example code is in the public domain. - - -#include - -void setup() -{ - Wire.begin(); // join i2c bus (address optional for master) - Serial.begin(9600); // start serial communication at 9600bps -} - -int reading = 0; - -void loop() -{ - // step 1: instruct sensor to read echoes - Wire.beginTransmission(112); // transmit to device #112 (0x70) - // the address specified in the datasheet is 224 (0xE0) - // but i2c adressing uses the high 7 bits so it's 112 - Wire.write(byte(0x00)); // sets register pointer to the command register (0x00) - Wire.write(byte(0x50)); // command sensor to measure in "inches" (0x50) - // use 0x51 for centimeters - // use 0x52 for ping microseconds - Wire.endTransmission(); // stop transmitting - - // step 2: wait for readings to happen - delay(70); // datasheet suggests at least 65 milliseconds - - // step 3: instruct sensor to return a particular echo reading - Wire.beginTransmission(112); // transmit to device #112 - Wire.write(byte(0x02)); // sets register pointer to echo #1 register (0x02) - Wire.endTransmission(); // stop transmitting - - // step 4: request reading from sensor - Wire.requestFrom(112, 2); // request 2 bytes from slave device #112 - - // step 5: receive reading from sensor - if(2 <= Wire.available()) // if two bytes were received - { - reading = Wire.read(); // receive high byte (overwrites previous reading) - reading = reading << 8; // shift high byte to be high 8 bits - reading |= Wire.read(); // receive low byte as lower 8 bits - Serial.println(reading); // print the reading - } - - delay(250); // wait a bit since people have to read the output :) -} - - -/* - -// The following code changes the address of a Devantech Ultrasonic Range Finder (SRF10 or SRF08) -// usage: changeAddress(0x70, 0xE6); - -void changeAddress(byte oldAddress, byte newAddress) -{ - Wire.beginTransmission(oldAddress); - Wire.write(byte(0x00)); - Wire.write(byte(0xA0)); - Wire.endTransmission(); - - Wire.beginTransmission(oldAddress); - Wire.write(byte(0x00)); - Wire.write(byte(0xAA)); - Wire.endTransmission(); - - Wire.beginTransmission(oldAddress); - Wire.write(byte(0x00)); - Wire.write(byte(0xA5)); - Wire.endTransmission(); - - Wire.beginTransmission(oldAddress); - Wire.write(byte(0x00)); - Wire.write(newAddress); - Wire.endTransmission(); -} - -*/ diff --git a/build/linux/work/libraries/Wire/examples/digital_potentiometer/digital_potentiometer.ino b/build/linux/work/libraries/Wire/examples/digital_potentiometer/digital_potentiometer.ino deleted file mode 100644 index 38da1c543..000000000 --- a/build/linux/work/libraries/Wire/examples/digital_potentiometer/digital_potentiometer.ino +++ /dev/null @@ -1,39 +0,0 @@ -// I2C Digital Potentiometer -// by Nicholas Zambetti -// and Shawn Bonkowski - -// Demonstrates use of the Wire library -// Controls AD5171 digital potentiometer via I2C/TWI - -// Created 31 March 2006 - -// This example code is in the public domain. - -// This example code is in the public domain. - - -#include - -void setup() -{ - Wire.begin(); // join i2c bus (address optional for master) -} - -byte val = 0; - -void loop() -{ - Wire.beginTransmission(44); // transmit to device #44 (0x2c) - // device address is specified in datasheet - Wire.write(byte(0x00)); // sends instruction byte - Wire.write(val); // sends potentiometer value byte - Wire.endTransmission(); // stop transmitting - - val++; // increment value - if(val == 64) // if reached 64th position (max) - { - val = 0; // start over from lowest value - } - delay(500); -} - diff --git a/build/linux/work/libraries/Wire/examples/master_reader/master_reader.ino b/build/linux/work/libraries/Wire/examples/master_reader/master_reader.ino deleted file mode 100644 index 4124d7d6b..000000000 --- a/build/linux/work/libraries/Wire/examples/master_reader/master_reader.ino +++ /dev/null @@ -1,32 +0,0 @@ -// Wire Master Reader -// by Nicholas Zambetti - -// Demonstrates use of the Wire library -// Reads data from an I2C/TWI slave device -// Refer to the "Wire Slave Sender" example for use with this - -// Created 29 March 2006 - -// This example code is in the public domain. - - -#include - -void setup() -{ - Wire.begin(); // join i2c bus (address optional for master) - Serial.begin(9600); // start serial for output -} - -void loop() -{ - Wire.requestFrom(2, 6); // request 6 bytes from slave device #2 - - while(Wire.available()) // slave may send less than requested - { - char c = Wire.read(); // receive a byte as character - Serial.print(c); // print the character - } - - delay(500); -} diff --git a/build/linux/work/libraries/Wire/examples/master_writer/master_writer.ino b/build/linux/work/libraries/Wire/examples/master_writer/master_writer.ino deleted file mode 100644 index ccaa0361b..000000000 --- a/build/linux/work/libraries/Wire/examples/master_writer/master_writer.ino +++ /dev/null @@ -1,31 +0,0 @@ -// Wire Master Writer -// by Nicholas Zambetti - -// Demonstrates use of the Wire library -// Writes data to an I2C/TWI slave device -// Refer to the "Wire Slave Receiver" example for use with this - -// Created 29 March 2006 - -// This example code is in the public domain. - - -#include - -void setup() -{ - Wire.begin(); // join i2c bus (address optional for master) -} - -byte x = 0; - -void loop() -{ - Wire.beginTransmission(4); // transmit to device #4 - Wire.write("x is "); // sends five bytes - Wire.write(x); // sends one byte - Wire.endTransmission(); // stop transmitting - - x++; - delay(500); -} diff --git a/build/linux/work/libraries/Wire/examples/slave_receiver/slave_receiver.ino b/build/linux/work/libraries/Wire/examples/slave_receiver/slave_receiver.ino deleted file mode 100644 index 60dd4bdde..000000000 --- a/build/linux/work/libraries/Wire/examples/slave_receiver/slave_receiver.ino +++ /dev/null @@ -1,38 +0,0 @@ -// Wire Slave Receiver -// by Nicholas Zambetti - -// Demonstrates use of the Wire library -// Receives data as an I2C/TWI slave device -// Refer to the "Wire Master Writer" example for use with this - -// Created 29 March 2006 - -// This example code is in the public domain. - - -#include - -void setup() -{ - Wire.begin(4); // join i2c bus with address #4 - Wire.onReceive(receiveEvent); // register event - Serial.begin(9600); // start serial for output -} - -void loop() -{ - delay(100); -} - -// function that executes whenever data is received from master -// this function is registered as an event, see setup() -void receiveEvent(int howMany) -{ - while(1 < Wire.available()) // loop through all but the last - { - char c = Wire.read(); // receive byte as a character - Serial.print(c); // print the character - } - int x = Wire.read(); // receive byte as an integer - Serial.println(x); // print the integer -} diff --git a/build/linux/work/libraries/Wire/examples/slave_sender/slave_sender.ino b/build/linux/work/libraries/Wire/examples/slave_sender/slave_sender.ino deleted file mode 100644 index d3b238af9..000000000 --- a/build/linux/work/libraries/Wire/examples/slave_sender/slave_sender.ino +++ /dev/null @@ -1,32 +0,0 @@ -// Wire Slave Sender -// by Nicholas Zambetti - -// Demonstrates use of the Wire library -// Sends data as an I2C/TWI slave device -// Refer to the "Wire Master Reader" example for use with this - -// Created 29 March 2006 - -// This example code is in the public domain. - - -#include - -void setup() -{ - Wire.begin(2); // join i2c bus with address #2 - Wire.onRequest(requestEvent); // register event -} - -void loop() -{ - delay(100); -} - -// function that executes whenever data is requested by master -// this function is registered as an event, see setup() -void requestEvent() -{ - Wire.write("hello "); // respond with message of 6 bytes - // as expected by master -} diff --git a/build/linux/work/libraries/Wire/keywords.txt b/build/linux/work/libraries/Wire/keywords.txt deleted file mode 100644 index 12f129b99..000000000 --- a/build/linux/work/libraries/Wire/keywords.txt +++ /dev/null @@ -1,31 +0,0 @@ -####################################### -# Syntax Coloring Map For Wire -####################################### - -####################################### -# Datatypes (KEYWORD1) -####################################### - -####################################### -# Methods and Functions (KEYWORD2) -####################################### - -begin KEYWORD2 -beginTransmission KEYWORD2 -endTransmission KEYWORD2 -requestFrom KEYWORD2 -send KEYWORD2 -receive KEYWORD2 -onReceive KEYWORD2 -onRequest KEYWORD2 - -####################################### -# Instances (KEYWORD2) -####################################### - -Wire KEYWORD2 - -####################################### -# Constants (LITERAL1) -####################################### - diff --git a/build/linux/work/libraries/Wire/utility/twi.c b/build/linux/work/libraries/Wire/utility/twi.c deleted file mode 100644 index 6b2db3cdc..000000000 --- a/build/linux/work/libraries/Wire/utility/twi.c +++ /dev/null @@ -1,527 +0,0 @@ -/* - twi.c - TWI/I2C library for Wiring & Arduino - Copyright (c) 2006 Nicholas Zambetti. All right reserved. - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with this library; if not, write to the Free Software - Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - - Modified 2012 by Todd Krein (todd@krein.org) to implement repeated starts -*/ - -#include -#include -#include -#include -#include -#include -#include "Arduino.h" // for digitalWrite - -#ifndef cbi -#define cbi(sfr, bit) (_SFR_BYTE(sfr) &= ~_BV(bit)) -#endif - -#ifndef sbi -#define sbi(sfr, bit) (_SFR_BYTE(sfr) |= _BV(bit)) -#endif - -#include "pins_arduino.h" -#include "twi.h" - -static volatile uint8_t twi_state; -static volatile uint8_t twi_slarw; -static volatile uint8_t twi_sendStop; // should the transaction end with a stop -static volatile uint8_t twi_inRepStart; // in the middle of a repeated start - -static void (*twi_onSlaveTransmit)(void); -static void (*twi_onSlaveReceive)(uint8_t*, int); - -static uint8_t twi_masterBuffer[TWI_BUFFER_LENGTH]; -static volatile uint8_t twi_masterBufferIndex; -static volatile uint8_t twi_masterBufferLength; - -static uint8_t twi_txBuffer[TWI_BUFFER_LENGTH]; -static volatile uint8_t twi_txBufferIndex; -static volatile uint8_t twi_txBufferLength; - -static uint8_t twi_rxBuffer[TWI_BUFFER_LENGTH]; -static volatile uint8_t twi_rxBufferIndex; - -static volatile uint8_t twi_error; - -/* - * Function twi_init - * Desc readys twi pins and sets twi bitrate - * Input none - * Output none - */ -void twi_init(void) -{ - // initialize state - twi_state = TWI_READY; - twi_sendStop = true; // default value - twi_inRepStart = false; - - // activate internal pullups for twi. - digitalWrite(SDA, 1); - digitalWrite(SCL, 1); - - // initialize twi prescaler and bit rate - cbi(TWSR, TWPS0); - cbi(TWSR, TWPS1); - TWBR = ((F_CPU / TWI_FREQ) - 16) / 2; - - /* twi bit rate formula from atmega128 manual pg 204 - SCL Frequency = CPU Clock Frequency / (16 + (2 * TWBR)) - note: TWBR should be 10 or higher for master mode - It is 72 for a 16mhz Wiring board with 100kHz TWI */ - - // enable twi module, acks, and twi interrupt - TWCR = _BV(TWEN) | _BV(TWIE) | _BV(TWEA); -} - -/* - * Function twi_slaveInit - * Desc sets slave address and enables interrupt - * Input none - * Output none - */ -void twi_setAddress(uint8_t address) -{ - // set twi slave address (skip over TWGCE bit) - TWAR = address << 1; -} - -/* - * Function twi_readFrom - * Desc attempts to become twi bus master and read a - * series of bytes from a device on the bus - * Input address: 7bit i2c device address - * data: pointer to byte array - * length: number of bytes to read into array - * sendStop: Boolean indicating whether to send a stop at the end - * Output number of bytes read - */ -uint8_t twi_readFrom(uint8_t address, uint8_t* data, uint8_t length, uint8_t sendStop) -{ - uint8_t i; - - // ensure data will fit into buffer - if(TWI_BUFFER_LENGTH < length){ - return 0; - } - - // wait until twi is ready, become master receiver - while(TWI_READY != twi_state){ - continue; - } - twi_state = TWI_MRX; - twi_sendStop = sendStop; - // reset error state (0xFF.. no error occured) - twi_error = 0xFF; - - // initialize buffer iteration vars - twi_masterBufferIndex = 0; - twi_masterBufferLength = length-1; // This is not intuitive, read on... - // On receive, the previously configured ACK/NACK setting is transmitted in - // response to the received byte before the interrupt is signalled. - // Therefor we must actually set NACK when the _next_ to last byte is - // received, causing that NACK to be sent in response to receiving the last - // expected byte of data. - - // build sla+w, slave device address + w bit - twi_slarw = TW_READ; - twi_slarw |= address << 1; - - if (true == twi_inRepStart) { - // if we're in the repeated start state, then we've already sent the start, - // (@@@ we hope), and the TWI statemachine is just waiting for the address byte. - // We need to remove ourselves from the repeated start state before we enable interrupts, - // since the ISR is ASYNC, and we could get confused if we hit the ISR before cleaning - // up. Also, don't enable the START interrupt. There may be one pending from the - // repeated start that we sent outselves, and that would really confuse things. - twi_inRepStart = false; // remember, we're dealing with an ASYNC ISR - TWDR = twi_slarw; - TWCR = _BV(TWINT) | _BV(TWEA) | _BV(TWEN) | _BV(TWIE); // enable INTs, but not START - } - else - // send start condition - TWCR = _BV(TWEN) | _BV(TWIE) | _BV(TWEA) | _BV(TWINT) | _BV(TWSTA); - - // wait for read operation to complete - while(TWI_MRX == twi_state){ - continue; - } - - if (twi_masterBufferIndex < length) - length = twi_masterBufferIndex; - - // copy twi buffer to data - for(i = 0; i < length; ++i){ - data[i] = twi_masterBuffer[i]; - } - - return length; -} - -/* - * Function twi_writeTo - * Desc attempts to become twi bus master and write a - * series of bytes to a device on the bus - * Input address: 7bit i2c device address - * data: pointer to byte array - * length: number of bytes in array - * wait: boolean indicating to wait for write or not - * sendStop: boolean indicating whether or not to send a stop at the end - * Output 0 .. success - * 1 .. length to long for buffer - * 2 .. address send, NACK received - * 3 .. data send, NACK received - * 4 .. other twi error (lost bus arbitration, bus error, ..) - */ -uint8_t twi_writeTo(uint8_t address, uint8_t* data, uint8_t length, uint8_t wait, uint8_t sendStop) -{ - uint8_t i; - - // ensure data will fit into buffer - if(TWI_BUFFER_LENGTH < length){ - return 1; - } - - // wait until twi is ready, become master transmitter - while(TWI_READY != twi_state){ - continue; - } - twi_state = TWI_MTX; - twi_sendStop = sendStop; - // reset error state (0xFF.. no error occured) - twi_error = 0xFF; - - // initialize buffer iteration vars - twi_masterBufferIndex = 0; - twi_masterBufferLength = length; - - // copy data to twi buffer - for(i = 0; i < length; ++i){ - twi_masterBuffer[i] = data[i]; - } - - // build sla+w, slave device address + w bit - twi_slarw = TW_WRITE; - twi_slarw |= address << 1; - - // if we're in a repeated start, then we've already sent the START - // in the ISR. Don't do it again. - // - if (true == twi_inRepStart) { - // if we're in the repeated start state, then we've already sent the start, - // (@@@ we hope), and the TWI statemachine is just waiting for the address byte. - // We need to remove ourselves from the repeated start state before we enable interrupts, - // since the ISR is ASYNC, and we could get confused if we hit the ISR before cleaning - // up. Also, don't enable the START interrupt. There may be one pending from the - // repeated start that we sent outselves, and that would really confuse things. - twi_inRepStart = false; // remember, we're dealing with an ASYNC ISR - TWDR = twi_slarw; - TWCR = _BV(TWINT) | _BV(TWEA) | _BV(TWEN) | _BV(TWIE); // enable INTs, but not START - } - else - // send start condition - TWCR = _BV(TWINT) | _BV(TWEA) | _BV(TWEN) | _BV(TWIE) | _BV(TWSTA); // enable INTs - - // wait for write operation to complete - while(wait && (TWI_MTX == twi_state)){ - continue; - } - - if (twi_error == 0xFF) - return 0; // success - else if (twi_error == TW_MT_SLA_NACK) - return 2; // error: address send, nack received - else if (twi_error == TW_MT_DATA_NACK) - return 3; // error: data send, nack received - else - return 4; // other twi error -} - -/* - * Function twi_transmit - * Desc fills slave tx buffer with data - * must be called in slave tx event callback - * Input data: pointer to byte array - * length: number of bytes in array - * Output 1 length too long for buffer - * 2 not slave transmitter - * 0 ok - */ -uint8_t twi_transmit(const uint8_t* data, uint8_t length) -{ - uint8_t i; - - // ensure data will fit into buffer - if(TWI_BUFFER_LENGTH < length){ - return 1; - } - - // ensure we are currently a slave transmitter - if(TWI_STX != twi_state){ - return 2; - } - - // set length and copy data into tx buffer - twi_txBufferLength = length; - for(i = 0; i < length; ++i){ - twi_txBuffer[i] = data[i]; - } - - return 0; -} - -/* - * Function twi_attachSlaveRxEvent - * Desc sets function called before a slave read operation - * Input function: callback function to use - * Output none - */ -void twi_attachSlaveRxEvent( void (*function)(uint8_t*, int) ) -{ - twi_onSlaveReceive = function; -} - -/* - * Function twi_attachSlaveTxEvent - * Desc sets function called before a slave write operation - * Input function: callback function to use - * Output none - */ -void twi_attachSlaveTxEvent( void (*function)(void) ) -{ - twi_onSlaveTransmit = function; -} - -/* - * Function twi_reply - * Desc sends byte or readys receive line - * Input ack: byte indicating to ack or to nack - * Output none - */ -void twi_reply(uint8_t ack) -{ - // transmit master read ready signal, with or without ack - if(ack){ - TWCR = _BV(TWEN) | _BV(TWIE) | _BV(TWINT) | _BV(TWEA); - }else{ - TWCR = _BV(TWEN) | _BV(TWIE) | _BV(TWINT); - } -} - -/* - * Function twi_stop - * Desc relinquishes bus master status - * Input none - * Output none - */ -void twi_stop(void) -{ - // send stop condition - TWCR = _BV(TWEN) | _BV(TWIE) | _BV(TWEA) | _BV(TWINT) | _BV(TWSTO); - - // wait for stop condition to be exectued on bus - // TWINT is not set after a stop condition! - while(TWCR & _BV(TWSTO)){ - continue; - } - - // update twi state - twi_state = TWI_READY; -} - -/* - * Function twi_releaseBus - * Desc releases bus control - * Input none - * Output none - */ -void twi_releaseBus(void) -{ - // release bus - TWCR = _BV(TWEN) | _BV(TWIE) | _BV(TWEA) | _BV(TWINT); - - // update twi state - twi_state = TWI_READY; -} - -SIGNAL(TWI_vect) -{ - switch(TW_STATUS){ - // All Master - case TW_START: // sent start condition - case TW_REP_START: // sent repeated start condition - // copy device address and r/w bit to output register and ack - TWDR = twi_slarw; - twi_reply(1); - break; - - // Master Transmitter - case TW_MT_SLA_ACK: // slave receiver acked address - case TW_MT_DATA_ACK: // slave receiver acked data - // if there is data to send, send it, otherwise stop - if(twi_masterBufferIndex < twi_masterBufferLength){ - // copy data to output register and ack - TWDR = twi_masterBuffer[twi_masterBufferIndex++]; - twi_reply(1); - }else{ - if (twi_sendStop) - twi_stop(); - else { - twi_inRepStart = true; // we're gonna send the START - // don't enable the interrupt. We'll generate the start, but we - // avoid handling the interrupt until we're in the next transaction, - // at the point where we would normally issue the start. - TWCR = _BV(TWINT) | _BV(TWSTA)| _BV(TWEN) ; - twi_state = TWI_READY; - } - } - break; - case TW_MT_SLA_NACK: // address sent, nack received - twi_error = TW_MT_SLA_NACK; - twi_stop(); - break; - case TW_MT_DATA_NACK: // data sent, nack received - twi_error = TW_MT_DATA_NACK; - twi_stop(); - break; - case TW_MT_ARB_LOST: // lost bus arbitration - twi_error = TW_MT_ARB_LOST; - twi_releaseBus(); - break; - - // Master Receiver - case TW_MR_DATA_ACK: // data received, ack sent - // put byte into buffer - twi_masterBuffer[twi_masterBufferIndex++] = TWDR; - case TW_MR_SLA_ACK: // address sent, ack received - // ack if more bytes are expected, otherwise nack - if(twi_masterBufferIndex < twi_masterBufferLength){ - twi_reply(1); - }else{ - twi_reply(0); - } - break; - case TW_MR_DATA_NACK: // data received, nack sent - // put final byte into buffer - twi_masterBuffer[twi_masterBufferIndex++] = TWDR; - if (twi_sendStop) - twi_stop(); - else { - twi_inRepStart = true; // we're gonna send the START - // don't enable the interrupt. We'll generate the start, but we - // avoid handling the interrupt until we're in the next transaction, - // at the point where we would normally issue the start. - TWCR = _BV(TWINT) | _BV(TWSTA)| _BV(TWEN) ; - twi_state = TWI_READY; - } - break; - case TW_MR_SLA_NACK: // address sent, nack received - twi_stop(); - break; - // TW_MR_ARB_LOST handled by TW_MT_ARB_LOST case - - // Slave Receiver - case TW_SR_SLA_ACK: // addressed, returned ack - case TW_SR_GCALL_ACK: // addressed generally, returned ack - case TW_SR_ARB_LOST_SLA_ACK: // lost arbitration, returned ack - case TW_SR_ARB_LOST_GCALL_ACK: // lost arbitration, returned ack - // enter slave receiver mode - twi_state = TWI_SRX; - // indicate that rx buffer can be overwritten and ack - twi_rxBufferIndex = 0; - twi_reply(1); - break; - case TW_SR_DATA_ACK: // data received, returned ack - case TW_SR_GCALL_DATA_ACK: // data received generally, returned ack - // if there is still room in the rx buffer - if(twi_rxBufferIndex < TWI_BUFFER_LENGTH){ - // put byte in buffer and ack - twi_rxBuffer[twi_rxBufferIndex++] = TWDR; - twi_reply(1); - }else{ - // otherwise nack - twi_reply(0); - } - break; - case TW_SR_STOP: // stop or repeated start condition received - // put a null char after data if there's room - if(twi_rxBufferIndex < TWI_BUFFER_LENGTH){ - twi_rxBuffer[twi_rxBufferIndex] = '\0'; - } - // sends ack and stops interface for clock stretching - twi_stop(); - // callback to user defined callback - twi_onSlaveReceive(twi_rxBuffer, twi_rxBufferIndex); - // since we submit rx buffer to "wire" library, we can reset it - twi_rxBufferIndex = 0; - // ack future responses and leave slave receiver state - twi_releaseBus(); - break; - case TW_SR_DATA_NACK: // data received, returned nack - case TW_SR_GCALL_DATA_NACK: // data received generally, returned nack - // nack back at master - twi_reply(0); - break; - - // Slave Transmitter - case TW_ST_SLA_ACK: // addressed, returned ack - case TW_ST_ARB_LOST_SLA_ACK: // arbitration lost, returned ack - // enter slave transmitter mode - twi_state = TWI_STX; - // ready the tx buffer index for iteration - twi_txBufferIndex = 0; - // set tx buffer length to be zero, to verify if user changes it - twi_txBufferLength = 0; - // request for txBuffer to be filled and length to be set - // note: user must call twi_transmit(bytes, length) to do this - twi_onSlaveTransmit(); - // if they didn't change buffer & length, initialize it - if(0 == twi_txBufferLength){ - twi_txBufferLength = 1; - twi_txBuffer[0] = 0x00; - } - // transmit first byte from buffer, fall - case TW_ST_DATA_ACK: // byte sent, ack returned - // copy data to output register - TWDR = twi_txBuffer[twi_txBufferIndex++]; - // if there is more to send, ack, otherwise nack - if(twi_txBufferIndex < twi_txBufferLength){ - twi_reply(1); - }else{ - twi_reply(0); - } - break; - case TW_ST_DATA_NACK: // received nack, we are done - case TW_ST_LAST_DATA: // received ack, but we are done already! - // ack future responses - twi_reply(1); - // leave slave receiver state - twi_state = TWI_READY; - break; - - // All - case TW_NO_INFO: // no state information - break; - case TW_BUS_ERROR: // bus error, illegal stop/start - twi_error = TW_BUS_ERROR; - twi_stop(); - break; - } -} - diff --git a/build/linux/work/libraries/Wire/utility/twi.h b/build/linux/work/libraries/Wire/utility/twi.h deleted file mode 100644 index 652659339..000000000 --- a/build/linux/work/libraries/Wire/utility/twi.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - twi.h - TWI/I2C library for Wiring & Arduino - Copyright (c) 2006 Nicholas Zambetti. All right reserved. - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with this library; if not, write to the Free Software - Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -*/ - -#ifndef twi_h -#define twi_h - - #include - - //#define ATMEGA8 - - #ifndef TWI_FREQ - #define TWI_FREQ 100000L - #endif - - #ifndef TWI_BUFFER_LENGTH - #define TWI_BUFFER_LENGTH 32 - #endif - - #define TWI_READY 0 - #define TWI_MRX 1 - #define TWI_MTX 2 - #define TWI_SRX 3 - #define TWI_STX 4 - - void twi_init(void); - void twi_setAddress(uint8_t); - uint8_t twi_readFrom(uint8_t, uint8_t*, uint8_t, uint8_t); - uint8_t twi_writeTo(uint8_t, uint8_t*, uint8_t, uint8_t, uint8_t); - uint8_t twi_transmit(const uint8_t*, uint8_t); - void twi_attachSlaveRxEvent( void (*)(uint8_t*, int) ); - void twi_attachSlaveTxEvent( void (*)(void) ); - void twi_reply(uint8_t); - void twi_stop(void); - void twi_releaseBus(void); - -#endif - diff --git a/build/linux/work/reference/Abs.html b/build/linux/work/reference/Abs.html deleted file mode 100644 index 34a158681..000000000 --- a/build/linux/work/reference/Abs.html +++ /dev/null @@ -1,112 +0,0 @@ - - - - Arduino Reference - Abs - - - - - - - -
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    Reference   Language | Libraries | Comparison | Changes -

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    abs(x)

    -

    Description

    -

    Computes the absolute value of a number. -

    -

    Parameters

    -

    x: the number -

    -

    Returns

    -

    x: if x is greater than or equal to 0. -

    -

    -x: if x is less than 0. -

    -

    Warning

    -

    Because of the way the abs() function is implemented, avoid using other functions inside the brackets, it may lead to incorrect results. -

    -

    -abs(a++);   // avoid this - yields incorrect results
-
-a++;          // use this instead -
-abs(a);       // keep other math outside the function
-
-
    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - diff --git a/build/linux/work/reference/AnalogRead.html b/build/linux/work/reference/AnalogRead.html deleted file mode 100644 index 1f76c4f02..000000000 --- a/build/linux/work/reference/AnalogRead.html +++ /dev/null @@ -1,129 +0,0 @@ - - - - Arduino Reference - AnalogRead - - - - - - - -
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    Reference   Language | Libraries | Comparison | Changes -

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    analogRead()

    -

    Description

    -

    Reads the value from the specified analog pin. The Arduino board contains a 6 channel (8 channels on the Mini and Nano, 16 on the Mega), 10-bit analog to digital converter. This means that it will map input voltages between 0 and 5 volts into integer values between 0 and 1023. This yields a resolution between readings of: 5 volts / 1024 units or, .0049 volts (4.9 mV) per unit. The input range and resolution can be changed using analogReference(). -

    -

    It takes about 100 microseconds (0.0001 s) to read an analog input, so the maximum reading rate is about 10,000 times a second. -

    -

    Syntax

    -

    analogRead(pin) -

    -

    Parameters

    -

    pin: the number of the analog input pin to read from (0 to 5 on most boards, 0 to 7 on the Mini and Nano, 0 to 15 on the Mega) -

    -

    Returns

    -

    int (0 to 1023) -

    -

    Note

    -

    If the analog input pin is not connected to anything, the value returned by analogRead() will fluctuate based on a number of factors (e.g. the values of the other analog inputs, how close your hand is to the board, etc.). -

    -

    Example

    -
     
-int analogPin = 3;     // potentiometer wiper (middle terminal) connected to analog pin 3
-                       // outside leads to ground and +5V
-int val = 0;           // variable to store the value read
-
-void setup()
-{
-  Serial.begin(9600);          //  setup serial
-}
-
-void loop()
-{
-  val = analogRead(analogPin);    // read the input pin
-  Serial.println(val);             // debug value
-}
-
-
    -

    See also

    -

    Reference Home -

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    Corrections, suggestions, and new documentation should be posted to the Forum. -

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    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    Reference   Language | Libraries | Comparison | Changes -

    -

    analogReference(type)

    -

    Description

    -

    Configures the reference voltage used for analog input (i.e. the value used as the top of the input range). The options are: -

    -

    • DEFAULT: the default analog reference of 5 volts (on 5V Arduino boards) or 3.3 volts (on 3.3V Arduino boards) -
    • INTERNAL: an built-in reference, equal to 1.1 volts on the ATmega168 or ATmega328 and 2.56 volts on the ATmega8 (not available on the Arduino Mega) -
    • INTERNAL1V1: a built-in 1.1V reference (Arduino Mega only) -
    • INTERNAL2V56: a built-in 2.56V reference (Arduino Mega only) -
    • EXTERNAL: the voltage applied to the AREF pin (0 to 5V only) is used as the reference. -

    Parameters

    -

    type: which type of reference to use (DEFAULT, INTERNAL, INTERNAL1V1, INTERNAL2V56, or EXTERNAL). -

    -

    Returns

    -

    None. -

    -

    Note

    -

    After changing the analog reference, the first few readings from analogRead() may not be accurate. -

    -

    Warning

    -

    Don't use anything less than 0V or more than 5V for external reference voltage on the AREF pin! If you're using an external reference on the AREF pin, you must set the analog reference to EXTERNAL before calling analogRead(). Otherwise, you will short together the active reference voltage (internally generated) and the AREF pin, possibly damaging the microcontroller on your Arduino board. -

    -

    Alternatively, you can connect the external reference voltage to the AREF pin through a 5K resistor, allowing you to switch between external and internal reference voltages. Note that the resistor will alter the voltage that gets used as the reference because there is an internal 32K resistor on the AREF pin. The two act as a voltage divider, so, for example, 2.5V applied through the resistor will yield 2.5 * 32 / (32 + 5) = ~2.2V at the AREF pin. -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
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    - - - - - -
    - - diff --git a/build/linux/work/reference/AnalogWrite.html b/build/linux/work/reference/AnalogWrite.html deleted file mode 100644 index 8636a8e3f..000000000 --- a/build/linux/work/reference/AnalogWrite.html +++ /dev/null @@ -1,135 +0,0 @@ - - - - Arduino Reference - AnalogWrite - - - - - - - -
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    Reference   Language | Libraries | Comparison | Changes -

    -

    analogWrite()

    -

    Description

    -

    Writes an analog value (PWM wave) to a pin. Can be used to light a LED at varying brightnesses or drive a motor at various speeds. After a call to analogWrite(), the pin will generate a steady square wave of the specified duty cycle until the next call to analogWrite() (or a call to digitalRead() or digitalWrite() on the same pin). The frequency of the PWM signal is approximately 490 Hz. -

    -

    On most Arduino boards (those with the ATmega168 or ATmega328), this function works on pins 3, 5, 6, 9, 10, and 11. On the Arduino Mega, it works on pins 2 through 13. Older Arduino boards with an ATmega8 only support analogWrite() on pins 9, 10, and 11. You do not need to call pinMode() to set the pin as an output before calling analogWrite(). -

    -

    The analogWrite function has nothing whatsoever to do with the analog pins or the analogRead function. -

    -

    Syntax

    -

    analogWrite(pin, value) -

    -

    Parameters

    -

    pin: the pin to write to. -

    -

    value: the duty cycle: between 0 (always off) and 255 (always on). -

    -

    Returns

    -

    nothing -

    -

    Notes and Known Issues

    -

    The PWM outputs generated on pins 5 and 6 will have higher-than-expected duty cycles. This is because of interactions with the millis() and delay() functions, which share the same internal timer used to generate those PWM outputs. This will be noticed mostly on low duty-cycle settings (e.g 0 - 10) and may result in a value of 0 not fully turning off the output on pins 5 and 6. -

    -

    Example

    -

    Sets the output to the LED proportional to the value read from the potentiometer. -

    -

     
-int ledPin = 9;      // LED connected to digital pin 9
-int analogPin = 3;   // potentiometer connected to analog pin 3
-int val = 0;         // variable to store the read value
-
-void setup()
-{
-  pinMode(ledPin, OUTPUT);   // sets the pin as output
-}
-
-void loop()
-{
-  val = analogRead(analogPin);   // read the input pin
-  analogWrite(ledPin, val / 4);  // analogRead values go from 0 to 1023, analogWrite values from 0 to 255
-}
-
-
    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - - - - - - - -
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    Reference   Language | Libraries | Comparison | Changes -

    -

    Addition, Subtraction, Multiplication, & Division

    -

    Description

    -

    These operators return the sum, difference, product, or quotient (respectively) of the two operands. The operation is conducted using the data type of the operands, so, for example, 9 / 4 gives 2 since 9 and 4 are ints. This also means that the operation can overflow if the result is larger than that which can be stored in the data type (e.g. adding 1 to an int with the value 32,767 gives -32,768). If the operands are of different types, the "larger" type is used for the calculation. -

    -

    If one of the numbers (operands) are of the type float or of type double, floating point math will be used for the calculation. -

    -

    Examples

    -
    -y = y + 3;
-x = x - 7;
-i = j * 6;
-r = r / 5;
-
-
    -

    Syntax

    -
    -result = value1 + value2;
-result = value1 - value2;
-result = value1 * value2;
-result = value1 / value2;
-
-
    -

    Parameters:

    -

    value1: any variable or constant -

    -

    value2: any variable or constant -

    -

    Programming Tips:

    -
    • Know that integer constants default to int, so some constant calculations may overflow (e.g. 60 * 1000 will yield a negative result). -

    • Choose variable sizes that are large enough to hold the largest results from your calculations -

    • Know at what point your variable will "roll over" and also what happens in the other direction e.g. (0 - 1) OR (0 - - 32768) -

    • For math that requires fractions, use float variables, but be aware of their drawbacks: large size, slow computation speeds -

    • Use the cast operator e.g. (int)myFloat to convert one variable type to another on the fly. -

    Reference Home -

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    Corrections, suggestions, and new documentation should be posted to the Forum. -

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    Reference   Language | Libraries | Comparison | Changes -

    -

    Arrays

    -

    An array is a collection of variables that are accessed with an index number. Arrays in the C programming language, on which Arduino is based, can be complicated, but using simple arrays is relatively straightforward. -

    -

    Creating (Declaring) an Array

    -

    All of the methods below are valid ways to create (declare) an array. -

    -

    -  int myInts[6];
-  int myPins[] = {2, 4, 8, 3, 6};
-  int mySensVals[6] = {2, 4, -8, 3, 2};
-  char message[6] = "hello";
-
-
    -

    You can declare an array without initializing it as in myInts.

    In myPins we declare an array without explicitly choosing a size. The compiler counts the elements and creates an array of the appropriate size. -

    -

    Finally you can both initialize and size your array, as in mySensVals. Note that when declaring an array of type char, one more element than your initialization is required, to hold the required null character. -

    -

    Accessing an Array

    -

    Arrays are zero indexed, that is, referring to the array initialization above, the first element of the array is at index 0, hence

    mySensVals[0] == 2, mySensVals[1] == 4, and so forth. -

    -

    It also means that in an array with ten elements, index nine is the last element. Hence: -

    -int myArray[10]={9,3,2,4,3,2,7,8,9,11};
-     // myArray[9]    contains 11
-     // myArray[10]   is invalid and contains random information (other memory address)      
-
-
    -

    For this reason you should be careful in accessing arrays. Accessing past the end of an array (using an index number greater than your declared array size - 1) is reading from memory that is in use for other purposes. Reading from these locations is probably not going to do much except yield invalid data. Writing to random memory locations is definitely a bad idea and can often lead to unhappy results such as crashes or program malfunction. This can also be a difficult bug to track down. -

    -

    Unlike BASIC or JAVA, the C compiler does no checking to see if array access is within legal bounds of the array size that you have declared. -

    -

    To assign a value to an array:

    -
    -mySensVals[0] = 10;
-
    -

    To retrieve a value from an array:

    -

    x = mySensVals[4]; -

    -

    Arrays and FOR Loops

    -

    Arrays are often manipulated inside for loops, where the loop counter is used as the index for each array element. For example, to print the elements of an array over the serial port, you could do something like this: -

    -

    -int i;
-for (i = 0; i < 5; i = i + 1) {
-  Serial.println(myPins[i]);
-}
-

    Example

    -

    For a complete program that demonstrates the use of arrays, see the Knight Rider example from the Tutorials. -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    Reference   Language | Libraries | Comparison | Changes -

    -

    = assignment operator (single equal sign)

    -

    Stores the value to the right of the equal sign in the variable to the left of the equal sign. -

    -

    The single equal sign in the C programming language is called the assignment operator. It has a different meaning than in algebra class where it indicated an equation or equality. The assignment operator tells the microcontroller to evaluate whatever value or expression is on the right side of the equal sign, and store it in the variable to the left of the equal sign. -

    -

    Example

    -
     int sensVal;                 // declare an integer variable named sensVal
- senVal = analogRead(0);       // store the (digitized) input voltage at analog pin 0 in SensVal
-
    -

    Programming Tips

    -

    The variable on the left side of the assignment operator ( = sign ) needs to be able to hold the value stored in it. If it is not large enough to hold a value, the value stored in the variable will be incorrect. -

    -

    Don't confuse the assignment operator [ = ] (single equal sign) with the comparison operator [ == ] (double equal signs), which evaluates whether two expressions are equal. -

    -

    See Also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

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    Reference   Language | Libraries | Comparison | Changes -

    -

    attachInterrupt(interrupt, function, mode)

    -

    Description

    -

    Specifies a function to call when an external interrupt occurs. Replaces any previous function that was attached to the interrupt. Most Arduino boards have two external interrupts: numbers 0 (on digital pin 2) and 1 (on digital pin 3). The Arduino Mega has an additional four: numbers 2 (pin 21), 3 (pin 20), 4 (pin 19), and 5 (pin 18). -

    -

    Parameters

    -

    interrupt: the number of the interrupt (int) -

    -

    function: the function to call when the interrupt occurs; this function must take no parameters and return nothing. This function is sometimes referred to as an interrupt service routine. -

    -

    mode defines when the interrupt should be triggered. Four contstants are predefined as valid values: -

    • LOW to trigger the interrupt whenever the pin is low, -
    • CHANGE to trigger the interrupt whenever the pin changes value -
    • RISING to trigger when the pin goes from low to high, -
    • FALLING for when the pin goes from high to low. -

    Returns

    -

    none -

    -

    Note

    -

    Inside the attached function, delay() won't work and the value returned by millis() will not increment. Serial data received while in the function may be lost. You should declare as volatile any variables that you modify within the attached function. -

    -

    Using Interrupts

    -

    Interrupts are useful for making things happen automatically in microcontroller programs, and can help solve timing problems. A good task for using an interrupt might be reading a rotary encoder, monitoring user input. -

    -

    If you wanted to insure that a program always caught the pulses from a rotary encoder, never missing a pulse, it would make it very tricky to write a program to do anything else, because the program would need to constantly poll the sensor lines for the encoder, in order to catch pulses when they occurred. Other sensors have a similar interface dynamic too, such as trying to read a sound sensor that is trying to catch a click, or an infrared slot sensor (photo-interrupter) trying to catch a coin drop. In all of these situations, using an interrupt can free the microcontroller to get some other work done while not missing the doorbell. -

    -

    Example

    -
    int pin = 13;
-volatile int state = LOW;
-
-void setup()
-{
-  pinMode(pin, OUTPUT);
-  attachInterrupt(0, blink, CHANGE);
-}
-
-void loop()
-{
-  digitalWrite(pin, state);
-}
-
-void blink()
-{
-  state = !state;
-}
-
-
    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    Reference   Language | Libraries | Comparison | Changes -

    -

    bit()

    -

    Description

    -

    Computes the value of the specified bit (bit 0 is 1, bit 1 is 2, bit 2 is 4, etc.). -

    -

    Syntax

    -

    bit(n) -

    -

    Parameters

    -

    n: the bit whose value to compute -

    -

    Returns

    -

    the value of the bit -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

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    -

    bitClear()

    -

    Description

    -

    Clears (writes a 0 to) a bit of a numeric variable. -

    -

    Syntax

    -

    bitClear(x, n) -

    -

    Parameters

    -

    x: the numeric variable whose bit to clear -

    -

    n: which bit to clear, starting at 0 for the least-significant (rightmost) bit -

    -

    Returns

    -

    none -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

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    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    Reference   Language | Libraries | Comparison | Changes -

    -

    bitRead()

    -

    Description

    -

    Reads a bit of a number. -

    -

    Syntax

    -

    bitRead(x, n) -

    -

    Parameters

    -

    x: the number from which to read -

    -

    n: which bit to read, starting at 0 for the least-significant (rightmost) bit -

    -

    Returns

    -

    the value of the bit (0 or 1). -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

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    bitSet()

    -

    Description

    -

    Sets (writes a 1 to) a bit of a numeric variable. -

    -

    Syntax

    -

    bitSet(x, n) -

    -

    Parameters

    -

    x: the numeric variable whose bit to set -

    -

    n: which bit to set, starting at 0 for the least-significant (rightmost) bit -

    -

    Returns

    -

    none -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

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    bitWrite()

    -

    Description

    -

    Writes a bit of a numeric variable. -

    -

    Syntax

    -

    bitWrite(x, n, b) -

    -

    Parameters

    -

    x: the numeric variable to which to write -

    -

    n: which bit of the number to write, starting at 0 for the least-significant (rightmost) bit -

    -

    b: the value to write to the bit (0 or 1) -

    -

    Returns

    -

    none -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

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    bitshift left (<<), bitshift right (>>)

    -

    Description

    -

    From The Bitmath Tutorial in The Playground -

    -

    There are two bit shift operators in C++: the left shift operator << and the right shift operator >>. These operators cause the bits in the left operand to be shifted left or right by the number of positions specified by the right operand.

    More on bitwise math may be found here. -

    -

    Syntax

    -

    variable << number_of_bits -

    -

    variable >> number_of_bits -

    -

    Parameters

    -

    variable - (byte, int, long) -number_of_bits integer <= 32 -

    -

    Example:

    -
        int a = 5;        // binary: 0000000000000101
-    int b = a << 3;   // binary: 0000000000101000, or 40 in decimal
-    int c = b >> 3;   // binary: 0000000000000101, or back to 5 like we started with
-
    -

    When you shift a value x by y bits (x << y), the leftmost y bits in x are lost, literally shifted out of existence: -

    -

        int a = 5;        // binary: 0000000000000101
-    int b = a << 14;  // binary: 0100000000000000 - the first 1 in 101 was discarded
-
    -

    If you are certain that none of the ones in a value are being shifted into oblivion, a simple way to think of the left-shift operator is that it multiplies the left operand by 2 raised to the right operand power. For example, to generate powers of 2, the following expressions can be employed: -

    -

        1 <<  0  ==    1
-    1 <<  1  ==    2
-    1 <<  2  ==    4
-    1 <<  3  ==    8
-    ...
-    1 <<  8  ==  256
-    1 <<  9  ==  512
-    1 << 10  == 1024
-    ...
-
    -

    When you shift x right by y bits (x >> y), and the highest bit in x is a 1, the behavior depends on the exact data type of x. If x is of type int, the highest bit is the sign bit, determining whether x is negative or not, as we have discussed above. In that case, the sign bit is copied into lower bits, for esoteric historical reasons: -

    -

        int x = -16;     // binary: 1111111111110000
-    int y = x >> 3;  // binary: 1111111111111110
-
    -

    This behavior, called sign extension, is often not the behavior you want. Instead, you may wish zeros to be shifted in from the left. It turns out that the right shift rules are different for unsigned int expressions, so you can use a typecast to suppress ones being copied from the left: -

    -

        int x = -16;                   // binary: 1111111111110000
-    int y = (unsigned int)x >> 3;  // binary: 0001111111111110
-
    -

    If you are careful to avoid sign extension, you can use the right-shift operator >> as a way to divide by powers of 2. For example: -

    -

        int x = 1000;
-    int y = x >> 3;   // integer division of 1000 by 8, causing y = 125.
-
    -

    Reference Home -

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    Corrections, suggestions, and new documentation should be posted to the Forum. -

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    Bitwise AND (&), Bitwise OR (|), Bitwise XOR (^)

    -

    Bitwise AND (&)

    -

    The bitwise operators perform their calculations at the bit level of variables. They help solve a wide range of common programming problems. Much of the material below is from an excellent tutorial on bitwise math wihch may be found here. -

    -

    Description and Syntax

    -

    Below are descriptions and syntax for all of the operators. Further details may be found in the referenced tutorial. -

    -

    Bitwise AND (&)

    -

    The bitwise AND operator in C++ is a single ampersand, &, used between two other integer expressions. Bitwise AND operates on each bit position of the surrounding expressions independently, according to this rule: if both input bits are 1, the resulting output is 1, otherwise the output is 0. Another way of expressing this is: -

    -

        0  0  1  1    operand1
-    0  1  0  1    operand2
-    ----------
-    0  0  0  1    (operand1 & operand2) - returned result
-
    -

    In Arduino, the type int is a 16-bit value, so using & between two int expressions causes 16 simultaneous AND operations to occur. In a code fragment like: -

    -

        int a =  92;    // in binary: 0000000001011100
-    int b = 101;    // in binary: 0000000001100101
-    int c = a & b;  // result:    0000000001000100, or 68 in decimal.
-
    -

    Each of the 16 bits in a and b are processed by using the bitwise AND, and all 16 resulting bits are stored in c, resulting in the value 01000100 in binary, which is 68 in decimal. -

    -

    One of the most common uses of bitwise AND is to select a particular bit (or bits) from an integer value, often called masking. See below for an example -

    -

    Bitwise OR (|)

    -

    The bitwise OR operator in C++ is the vertical bar symbol, |. Like the & operator, | operates independently each bit in its two surrounding integer expressions, but what it does is different (of course). The bitwise OR of two bits is 1 if either or both of the input bits is 1, otherwise it is 0. In other words: -

    -

        0  0  1  1    operand1
-    0  1  0  1    operand2
-    ----------
-    0  1  1  1    (operand1 | operand2) - returned result
-
    -

    Here is an example of the bitwise OR used in a snippet of C++ code: -

    -

        int a =  92;    // in binary: 0000000001011100
-    int b = 101;    // in binary: 0000000001100101
-    int c = a | b;  // result:    0000000001111101, or 125 in decimal.
-
    -

    Example Program

    -

    A common job for the bitwise AND and OR operators is what programmers call Read-Modify-Write on a port. On microcontrollers, a port is an 8 bit number that represents something about the condition of the pins. Writing to a port controls all of the pins at once. -

    -

    PORTD is a built-in constant that refers to the output states of digital pins 0,1,2,3,4,5,6,7. If there is 1 in an bit position, then that pin is HIGH. (The pins already need to be set to outputs with the pinMode() command.) So if we write PORTD = B00110001; we have made pins 2,3 & 7 HIGH. -One slight hitch here is that we may also have changeed the state of Pins 0 & 1, which are used by the Arduino for serial communications so we may have interfered with serial communication. -

    -

         Our algorithm for the program is:
-
    • Get PORTD and clear out only the bits corresponding to the pins we wish to control (with bitwise AND). -
    • Combine the modified PORTD value with the new value for the pins under control (with biwise OR). -

    int i;     // counter variable
-int j;
-
-void setup(){
-DDRD = DDRD | B11111100; // set direction bits for pins 2 to 7, leave 0 and 1 untouched (xx | 00 == xx)
-// same as pinMode(pin, OUTPUT) for pins 2 to 7
-Serial.begin(9600);
-}
-
-void loop(){
-for (i=0; i<64; i++){
-
-PORTD = PORTD & B00000011;  // clear out bits 2 - 7, leave pins 0 and 1 untouched (xx & 11 == xx)
-j = (i << 2);               // shift variable up to pins 2 - 7 - to avoid pins 0 and 1
-PORTD = PORTD | j;          // combine the port information with the new information for LED pins
-Serial.println(PORTD, BIN); // debug to show masking
-delay(100);
-   }
-}
-
    -

    Bitwise XOR (^)

    -

    There is a somewhat unusual operator in C++ called bitwise EXCLUSIVE OR, also known as bitwise XOR. (In English this is usually pronounced "eks-or".) The bitwise XOR operator is written using the caret symbol ^. This operator is very similar to the bitwise OR operator |, only it evaluates to 0 for a given bit position when both of the input bits for that position are 1: -

    -

        0  0  1  1    operand1
-    0  1  0  1    operand2
-    ----------
-    0  1  1  0    (operand1 ^ operand2) - returned result
-
    -

    Another way to look at bitwise XOR is that each bit in the result is a 1 if the input bits are different, or 0 if they are the same. -

    -

    Here is a simple code example: -

    -

        int x = 12;     // binary: 1100
-    int y = 10;     // binary: 1010
-    int z = x ^ y;  // binary: 0110, or decimal 6
-
    -

    The ^ operator is often used to toggle (i.e. change from 0 to 1, or 1 to 0) some of the bits in an integer expression. In a bitwise OR operation if there is a 1 in the mask bit, that bit is inverted; if there is a 0, the bit is not inverted and stays the same. Below is a program to blink digital pin 5. -

    -

    -// Blink_Pin_5
-// demo for Exclusive OR
-void setup(){
-DDRD = DDRD | B00100000; // set digital pin five as OUTPUT 
-Serial.begin(9600);
-}
-
-void loop(){
-PORTD = PORTD ^ B00100000;  // invert bit 5 (digital pin 5), leave others untouched
-delay(100);
-}
-
    -

    See Also -

    • &&(Boolean AND) -
    • ||(Boolean OR) -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - - - - - - - -
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    Reference   Language | Libraries | Comparison | Changes -

    -

    compound bitwise AND (&=)

    -

    Description

    -

    The compound bitwise AND operator (&=) is often used with a variable and a constant to force particular bits in a variable to the LOW state (to 0). This is often referred to in programming guides as "clearing" or "resetting" bits. -

    -

    Syntax:

    -
    -x &= y;   // equivalent to x = x & y; 
-
    -

    Parameters

    -

    x: a char, int or long variable
    y: an integer constant or char, int, or long -

    -

    Example:

    -

    First, a review of the Bitwise AND (&) operator -

    -   0  0  1  1    operand1
-   0  1  0  1    operand2
-   ----------
-   0  0  0  1    (operand1 & operand2) - returned result
-
-
    -

    Bits that are "bitwise ANDed" with 0 are cleared to 0 so, if myByte is a byte variable,
    -myByte & B00000000 = 0; -

    -

    Bits that are "bitwise ANDed" with 1 are unchanged so,
    -myByte & B11111111 = myByte; -

    -

    Note: because we are dealing with bits in a bitwise operator - it is convenient to use the binary formatter with constants. The numbers are still the same value in other representations, they are just not as easy to understand. Also, B00000000 is shown for clarity, but zero in any number format is zero (hmmm something philosophical there?) -

    -

    Consequently - to clear (set to zero) bits 0 & 1 of a variable, while leaving the rest of the variable unchanged, use the compound bitwise AND operator (&=) with the constant B11111100 -

    -   1  0  1  0  1  0  1  0    variable  
-   1  1  1  1  1  1  0  0    mask
-   ----------------------
-   1  0  1  0  1  0  0  0
-
- variable unchanged
-                     bits cleared
-  
-

    Here is the same representation with the variable's bits replaced with the symbol x -

    -

    -   x  x  x  x  x  x  x  x    variable
-   1  1  1  1  1  1  0  0    mask
-   ----------------------
-   x  x  x  x  x  x  0  0
-
- variable unchanged
-                     bits cleared
- 
-

    So if: -

    -myByte =  10101010;
-
-myByte &= B1111100 == B10101000;
-
    -

    See Also -

    • |= (compound bitwise or) -
    • & (bitwise AND) -
    • | (bitwise OR) -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

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    -

    compound bitwise OR (|=)

    -

    Description

    -

    The compound bitwise OR operator (|=) is often used with a variable and a constant to "set" (set to 1) particular bits in a variable. -

    -

    Syntax:

    -
    -x |= y;   // equivalent to x = x | y; 
-
    -

    Parameters

    -

    x: a char, int or long variable
    y: an integer constant or char, int, or long -

    -

    Example:

    -

    First, a review of the Bitwise OR (|) operator -

    -   0  0  1  1    operand1
-   0  1  0  1    operand2
-   ----------
-   0  1  1  1    (operand1 | operand2) - returned result
-
-

    Bits that are "bitwise ORed" with 0 are unchanged, so if myByte is a byte variable,
    -myByte | B00000000 = myByte; -

    -

    Bits that are "bitwise ORed" with 1 are set to 1 so:
    myByte | B11111111 = B11111111; -

    -

    Consequently - to set bits 0 & 1 of a variable, while leaving the rest of the variable unchanged, use the compound bitwise AND operator (|=) with the constant B00000011 -

    -   1  0  1  0  1  0  1  0    variable
-   0  0  0  0  0  0  1  1    mask
-   ----------------------
-   1  0  1  0  1  0  1  1
-
- variable unchanged
-                     bits set
-
-
-

    Here is the same representation with the variables bits replaced with the symbol x -

    -

    -   x  x  x  x  x  x  x  x    variable
-   0  0  0  0  0  0  1  1    mask
-   ----------------------
-   x  x  x  x  x  x  1  1
-
- variable unchanged
-                     bits set
-
-

    So if: -

    -myByte =  B10101010;
-
-myByte |= B00000011 == B10101011;
-
-
    -

    See Also -

    • &= (compound bitwise and) -
    • & (bitwise and) -
    • | (bitwise or) -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

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    Bitwise NOT (~)

    -

    The bitwise NOT operator in C++ is the tilde character ~. Unlike & and |, the bitwise NOT operator is applied to a single operand to its right. Bitwise NOT changes each bit to its opposite: 0 becomes 1, and 1 becomes 0. For example: -

    -

        0  1    operand1
-
    -

       ----------
-    1  0   ~ operand1
-
    -

        int a = 103;    // binary:  0000000001100111
-    int b = ~a;     // binary:  1111111110011000 = -104
-
    -

    You might be surprised to see a negative number like -104 as the result of this operation. This is because the highest bit in an int variable is the so-called sign bit. If the highest bit is 1, the number is interpreted as negative. This encoding of positive and negative numbers is referred to as two's complement. For more information, see the Wikipedia article on two's complement. -

    -

    As an aside, it is interesting to note that for any integer x, ~x is the same as -x-1. -

    -

    At times, the sign bit in a signed integer expression can cause some unwanted surprises. -

    -

    Reference Home -

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    - - - - - - - - -
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    Reference   Language | Libraries | Comparison | Changes -

    -

    Boolean Operators

    -

    These can be used inside the condition of an if statement. -

    -

    && (logical and)

    -

    True only if both operands are true, e.g. -

    -if (digitalRead(2) == HIGH  && digitalRead(3) == HIGH) { // read two switches 
-  // ...
-} 
-

    is true only if both inputs are high. -

    -

    || (logical or)

    -

    True if either operand is true, e.g. -

    -if (x > 0 || y > 0) {
-  // ...
-} 
-

    is true if either x or y is greater than 0. -

    -

    ! (not)

    -

    True if the operand is false, e.g. -

    -if (!x) { 
-  // ...
-} 
-

    is true if x is false (i.e. if x equals 0). -

    -

    Warning

    -

    Make sure you don't mistake the boolean AND operator, && (double ampersand) for the bitwise AND operator & (single ampersand). They are entirely different beasts. -

    -

    Similarly, do not confuse the boolean || (double pipe) operator with the bitwise OR operator | (single pipe). -

    -

    The bitwise not ~ (tilde) looks much different than the boolean not ! (exclamation point or "bang" as the programmers say) but you still have to be sure which one you want where. -

    -

    Examples

    -
    -if (a >= 10 && a <= 20){}   // true if a is between 10 and 20
-
-
    -

    See also

    -
    • & (bitwise AND) -
    • | (bitwise OR) -
    • ~ (bitwise NOT -
    • if -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

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    -

    boolean

    -

    A boolean holds one of two values, true or false. (Each boolean variable occupies one byte of memory.) -

    -

    Example

    -
    -int LEDpin = 5;       // LED on pin 5
-int switchPin = 13;   // momentary switch on 13, other side connected to ground
-
-boolean running = false;
-
-void setup()
-{
-  pinMode(LEDpin, OUTPUT);
-  pinMode(switchPin, INPUT);
-  digitalWrite(switchPin, HIGH);      // turn on pullup resistor
-}
-
-void loop()
-{
-  if (digitalRead(switchPin) == LOW)
-  {  // switch is pressed - pullup keeps pin high normally
-    delay(100);                        // delay to debounce switch
-    running = !running;                // toggle running variable
-    digitalWrite(LEDpin, running)      // indicate via LED
-  }
-}
-
-
-
-
-
    -

    See also

    -

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    -

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    {} Curly Braces

    -

    Curly braces (also referred to as just "braces" or as "curly brackets") are a major part of the C programming language. They are used in several different constructs, outlined below, and this can sometimes be confusing for beginners. -

    -

    An opening curly brace "{" must always be followed by a closing curly brace "}". This is a condition that is often referred to as the braces being balanced. The Arduino IDE (integrated development environment) includes a convenient feature to check the balance of curly braces. Just select a brace, or even click the insertion point immediately following a brace, and its logical companion will be highlighted. -

    -

    At present this feature is slightly buggy as the IDE will often find (incorrectly) a brace in text that has been "commented out." -

    -

    Beginning programmers, and programmers coming to C from the BASIC language often find using braces confusing or daunting. After all, the same curly braces replace the RETURN statement in a subroutine (function), the ENDIF statement in a conditional and the NEXT statement in a FOR loop. -

    -

    Because the use of the curly brace is so varied, it is good programming practice to type the closing brace immediately after typing the opening brace when inserting a construct which requires curly braces. Then insert some carriage returns between your braces and begin inserting statements. Your braces, and your attitude, will never become unbalanced. -

    -

    Unbalanced braces can often lead to cryptic, impenetrable compiler errors that can sometimes be hard to track down in a large program. Because of their varied usages, braces are also incredibly important to the syntax of a program and moving a brace one or two lines will often dramatically affect the meaning of a program. -

    -

    The main uses of curly braces

    -

    Functions

    -
      void myfunction(datatype argument){
-    statements(s)
-  }
-
    -

    Loops

    -
      while (boolean expression)
-  {
-     statement(s)
-  }
-
-  do
-  {
-     statement(s)
-  } while (boolean expression);
-
-  for (initialisation; termination condition; incrementing expr)
-  {
-     statement(s)
-  } 
-
    -

    Conditional statements

    -

      if (boolean expression)
-  {
-     statement(s)
-  }
-
-  else if (boolean expression)
-  {
-     statement(s)
-  } 
-  else
-  {
-     statement(s)
-  }
-
    -

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    break

    -

    break is used to exit from a do, for, or while loop, bypassing the normal loop condition. It is also used to exit from a switch statement. -

    -

    Example

    -
    -for (x = 0; x < 255; x ++)
-{
-    digitalWrite(PWMpin, x);
-    sens = analogRead(sensorPin);  
-    if (sens > threshold){      // bail out on sensor detect
-       x = 0;
-       break;
-    }  
-    delay(50);
-}
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    byte

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    -

    A byte stores an 8-bit unsigned number, from 0 to 255. -

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    -
        byte b = B10010;  // "B" is the binary formatter (B10010 = 18 decimal) 
-
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    -

    Syntax

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    byte(x) -

    -

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    x: a value of any type -

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    byte -

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    Changes in Arduino 0019

    -
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    • Added aliases for the analog input pins: A0, A1, etc. -

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    Changes in Arduino 0018

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    Changes in Arduino 0017

    -
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    Changes in Arduino 0016

    -
    • New functions for writing a string, write(str), or buffer, write(buf, len), were added to the Print, Serial, and Ethernet library Client and Server classes. -

    Changes in Arduino 0015

    -
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    Changes in Arduino 0013

    -
    • Support for printing floats was added to the Print, Serial, and Ethernet library Client and Server classes. -

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    Changes in Arduino 0012

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    -

    Characters are stored as numbers however. You can see the specific encoding in the ASCII chart. This means that it is possible to do arithmetic on characters, in which the ASCII value of the character is used (e.g. 'A' + 1 has the value 66, since the ASCII value of the capital letter A is 65). See Serial.println reference for more on how characters are translated to numbers. -

    -

    The char datatype is a signed type, meaning that it encodes numbers from -128 to 127. For an unsigned, one-byte (8 bit) data type, use the byte data type. -

    -

    Example

    -
      char myChar = 'A';
-  char myChar = 65;      // both are equivalent
-
-
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    See also

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    Description

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    Converts a value to the char data type. -

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    Syntax

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    char(x) -

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    x: a value of any type -

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    char -

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    - - -
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    - - diff --git a/build/linux/work/reference/ClientAvailable.html b/build/linux/work/reference/ClientAvailable.html deleted file mode 100644 index f7b03d0c5..000000000 --- a/build/linux/work/reference/ClientAvailable.html +++ /dev/null @@ -1,209 +0,0 @@ - - - - Arduino Reference - ClientAvailable - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    Ethernet : Client class -

    -

    available()

    -

    Description

    -

    Returns the number of bytes available for reading (that is, the amount of data that has been written to the client by the server it is connected to). -

    -

    available() inherits from the Stream utility class. -

    -

    Syntax

    -

    client.available() -

    -

    Parameters

    -

    none -

    -

    Returns

    -

    The number of bytes available. -

    -

    Example

    -

    -

    -
    #include <Ethernet.h>
    -#include <SPI.h>
    -
    -byte mac[] = { 0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED };
    -byte ip[] = { 10, 0, 0, 177 };
    -byte server[] = { 64, 233, 187, 99 }; // Google
    -
    -EthernetClient client;
    -
    -void setup()
    -{
    -  Ethernet.begin(mac, ip);
    -  Serial.begin(9600);
    -
    -  delay(1000);
    -
    -  Serial.println("connecting...");
    -
    -  if (client.connect(server, 80)) {
    -    Serial.println("connected");
    -    client.println("GET /search?q=arduino HTTP/1.0");
    -    client.println();
    -  } else {
    -    Serial.println("connection failed");
    -  }
    -}
    -
    -void loop()
    -{
    -  if (client.available()) {
    -    char c = client.read();
    -    Serial.print(c);
    -  }
    -
    -  if (!client.connected()) {
    -    Serial.println();
    -    Serial.println("disconnecting.");
    -    client.stop();
    -    for(;;)
    -      ;
    -  }
    -}
    -
    [Get Code]
    -
    - -

    -

    See also

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/ClientConnect.html b/build/linux/work/reference/ClientConnect.html deleted file mode 100644 index 64ece8cc8..000000000 --- a/build/linux/work/reference/ClientConnect.html +++ /dev/null @@ -1,211 +0,0 @@ - - - - Arduino Reference - ClientConnect - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    Ethernet : Client class -

    -

    connect()

    -

    Description

    -

    Connects to a specified IP address and port. The return value indicates success or failure. Also supports DNS lookups when using a domain name. -

    -

    Syntax

    -

    client.connect(ip, port)
    client.connect(URL, port) -

    -

    Parameters

    -

    ip: the IP address that the client will connect to (array of 4 bytes) -

    -

    URL: the domain name the client will connect to (string, ex.:"arduino.cc") -

    -

    port: the port that the client will connect to (int) -

    -

    Returns

    -

    Returns true if the connection succeeds, false if not. -

    -

    Example

    -

    -

    -
    #include <Ethernet.h>
    -#include <SPI.h>
    -
    -byte mac[] = { 0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED };
    -byte ip[] = { 10, 0, 0, 177 };
    -byte server[] = { 64, 233, 187, 99 }; // Google
    -
    -EthernetClient client;
    -
    -void setup()
    -{
    -  Ethernet.begin(mac, ip);
    -  Serial.begin(9600);
    -
    -  delay(1000);
    -
    -  Serial.println("connecting...");
    -
    -  if (client.connect(server, 80)) {
    -    Serial.println("connected");
    -    client.println("GET /search?q=arduino HTTP/1.0");
    -    client.println();
    -  } else {
    -    Serial.println("connection failed");
    -  }
    -}
    -
    -void loop()
    -{
    -  if (client.available()) {
    -    char c = client.read();
    -    Serial.print(c);
    -  }
    -
    -  if (!client.connected()) {
    -    Serial.println();
    -    Serial.println("disconnecting.");
    -    client.stop();
    -    for(;;)
    -      ;
    -  }
    -}
    -
    [Get Code]
    -
    - -

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/ClientConnected.html b/build/linux/work/reference/ClientConnected.html deleted file mode 100644 index 78dd2c6f0..000000000 --- a/build/linux/work/reference/ClientConnected.html +++ /dev/null @@ -1,207 +0,0 @@ - - - - Arduino Reference - ClientConnected - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    Ethernet : Client class -

    -

    connected()

    -

    Description

    -

    Whether or not the client is connected. Note that a client is considered connected if the connection has been closed but there is still unread data. -

    -

    Syntax

    -

    client.connected() -

    -

    Parameters

    -

    none -

    -

    Returns

    -

    Returns true if the client is connected, false if not. -

    -

    Example

    -

    -

    -
    #include <Ethernet.h>
    -#include <SPI.h>
    -
    -byte mac[] = { 0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED };
    -byte ip[] = { 10, 0, 0, 177 };
    -byte server[] = { 64, 233, 187, 99 }; // Google
    -
    -EthernetClient client;
    -
    -void setup()
    -{
    -  Ethernet.begin(mac, ip);
    -  Serial.begin(9600);
    -
    -  delay(1000);
    -
    -  Serial.println("connecting...");
    -
    -  if (client.connect(server, 80)) {
    -    Serial.println("connected");
    -    client.println("GET /search?q=arduino HTTP/1.0");
    -    client.println();
    -  } else {
    -    Serial.println("connection failed");
    -  }
    -}
    -
    -void loop()
    -{
    -  if (client.available()) {
    -    char c = client.read();
    -    Serial.print(c);
    -  }
    -
    -  if (!client.connected()) {
    -    Serial.println();
    -    Serial.println("disconnecting.");
    -    client.stop();
    -    for(;;)
    -      ;
    -  }
    -}
    -
    [Get Code]
    -
    - -

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/ClientConstructor.html b/build/linux/work/reference/ClientConstructor.html deleted file mode 100644 index e2dd4db4b..000000000 --- a/build/linux/work/reference/ClientConstructor.html +++ /dev/null @@ -1,107 +0,0 @@ - - - - Arduino Reference - ClientConstructor - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    Ethernet : Client class -

    -

    Client

    -

    Description

    -

    Client is the base class for all Ethernet client based calls. It is not called directly, but invoked whenever you use a function that relies on it. -

    -

    Functions

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/ClientFlush.html b/build/linux/work/reference/ClientFlush.html deleted file mode 100644 index bf4761a8e..000000000 --- a/build/linux/work/reference/ClientFlush.html +++ /dev/null @@ -1,106 +0,0 @@ - - - - Arduino Reference - ClientFlush - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    Ethernet : Client class -

    -

    flush()

    -

    Discard any bytes that have been written to the client but not yet read. -

    -

    flush() inherits from the Stream utility class. -

    -

    Syntax

    -

    client.flush() -

    -

    Parameters

    -

    none -

    -

    Returns

    -

    none -

    -

    See also

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/ClientPrint.html b/build/linux/work/reference/ClientPrint.html deleted file mode 100644 index efc869e78..000000000 --- a/build/linux/work/reference/ClientPrint.html +++ /dev/null @@ -1,106 +0,0 @@ - - - - Arduino Reference - ClientPrint - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    Ethernet : Client class -

    -

    print()

    -

    Description

    -

    Print data to the server that a client is connected to. Prints numbers as a sequence of digits, each an ASCII character (e.g. the number 123 is sent as the three characters '1', '2', '3'). -

    -

    Syntax

    -

    client.print(data)
    client.print(data, BASE) -

    -

    Parameters

    -

    data: the data to print (char, byte, int, long, or string) -

    -

    BASE (optional): the base in which to print numbers: DEC for decimal (base 10), OCT for octal (base 8), HEX for hexadecimal (base 16).
    -

    -

    Returns

    -

    byte
    print() will return the number of bytes written, though reading that number is optional -Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/ClientPrintln.html b/build/linux/work/reference/ClientPrintln.html deleted file mode 100644 index 2d82039f2..000000000 --- a/build/linux/work/reference/ClientPrintln.html +++ /dev/null @@ -1,106 +0,0 @@ - - - - Arduino Reference - ClientPrintln - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    Ethernet : Client class -

    -

    println()

    -

    Description

    -

    Print data, followed by a carriage return and newline, to the server a client is connected to. Prints numbers as a sequence of digits, each an ASCII character (e.g. the number 123 is sent as the three characters '1', '2', '3'). -

    -

    Syntax

    -

    client.println()
    client.println(data)
    client.print(data, BASE) -

    -

    Parameters

    -

    data (optional): the data to print (char, byte, int, long, or string) -

    -

    BASE (optional): the base in which to print numbers: DEC for decimal (base 10), OCT for octal (base 8), HEX for hexadecimal (base 16). -

    -

    Returns

    -

    byte
    print()ln will return the number of bytes written, though reading that number is optional -Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/ClientRead.html b/build/linux/work/reference/ClientRead.html deleted file mode 100644 index fd8b0adcf..000000000 --- a/build/linux/work/reference/ClientRead.html +++ /dev/null @@ -1,106 +0,0 @@ - - - - Arduino Reference - ClientRead - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    Ethernet : Client class -

    -

    read()

    -

    Read the next byte received from the server the client is connected to (after the last call to read()). -

    -

    read() inherits from the Stream utility class. -

    -

    Syntax

    -

    client.read() -

    -

    Parameters

    -

    none -

    -

    Returns

    -

    The next byte (or character), or -1 if none is available. -

    -

    See Also

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/ClientStop.html b/build/linux/work/reference/ClientStop.html deleted file mode 100644 index 21d739dea..000000000 --- a/build/linux/work/reference/ClientStop.html +++ /dev/null @@ -1,103 +0,0 @@ - - - - Arduino Reference - ClientStop - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    Ethernet : Client class -

    -

    stop()

    -

    Description

    -

    Disconnect from the server. -

    -

    Syntax

    -

    client.stop() -

    -

    Parameters

    -

    none -

    -

    Returns

    -

    none

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/ClientWrite.html b/build/linux/work/reference/ClientWrite.html deleted file mode 100644 index f606a5d34..000000000 --- a/build/linux/work/reference/ClientWrite.html +++ /dev/null @@ -1,103 +0,0 @@ - - - - Arduino Reference - ClientWrite - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    Ethernet : Client class -

    -

    write()

    -

    Description

    -

    Write data to the server the client is connected to. -

    -

    Syntax

    -

    client.write(data) -

    -

    Parameters

    -

    data: the byte or char to write -

    -

    Returns

    -

    byte: the number of characters written. it is not necessary to read this value.

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/Comments.html b/build/linux/work/reference/Comments.html deleted file mode 100644 index 756eda603..000000000 --- a/build/linux/work/reference/Comments.html +++ /dev/null @@ -1,111 +0,0 @@ - - - - Arduino Reference - Comments - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    Comments

    -

    Comments are lines in the program that are used to inform yourself or others about the way the program works. They are ignored by the compiler, and not exported to the processor, so they don't take up any space on the Atmega chip. -

    -

    Comments only purpose are to help you understand (or remember) how your program works or to inform others how your program works. -There are two different ways of marking a line as a comment: -

    -

    Example

    -
     x = 5;  // This is a single line comment. Anything after the slashes is a comment 
-         // to the end of the line
-
-/* this is multiline comment - use it to comment out whole blocks of code
-
-if (gwb == 0){   // single line comment is OK inside a multiline comment
-x = 3;           /* but not another multiline comment - this is invalid */
-}
-// don't forget the "closing" comment - they have to be balanced!
-*/
-
-
    -

    Tip
    When experimenting with code, "commenting out" parts of your program is a convenient way to remove lines that may be buggy. This leaves the lines in the code, but turns them into comments, so the compiler just ignores them. This can be especially useful when trying to locate a problem, or when a program refuses to compile and the compiler error is cryptic or unhelpful. -

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - -
    - - - - - -
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    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    Arduino/Processing Language Comparison

    -

    The Arduino language (based on Wiring) is implemented in C/C++, and therefore has some differences from the Processing language, which is based on Java. -

    -

    Arrays

    -
    Arduino - Processing -
    int bar[8];
    bar[0] = 1; -    		 int[] bar = new int[8];
    bar[0] = 1; -
    int foo[] = { 0, 1, 2 }; - int foo[] = { 0, 1, 2 };
    or
    int[] foo = { 0, 1, 2 }; -
    -

    Loops

    -
    Arduino - Processing -
    int i;
    for (i = 0; i < 5; i++) { ... } -    		 for (int i = 0; i < 5; i++) { ... } -
    -

    Printing

    -
    Arduino - Processing -
    Serial.println("hello world"); - println("hello world"); -
    int i = 5;
    Serial.println(i); -    		 int i = 5;
    println(i); -
    int i = 5;
    Serial.print("i = ");
    Serial.print(i);
    Serial.println(); -    		 int i = 5;
    println("i = " + i); -
    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - - - - -
    - - diff --git a/build/linux/work/reference/Const.html b/build/linux/work/reference/Const.html deleted file mode 100644 index c332a4b63..000000000 --- a/build/linux/work/reference/Const.html +++ /dev/null @@ -1,113 +0,0 @@ - - - - Arduino Reference - Const - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    const keyword

    -

    The const keyword stands for constant. It is a variable qualifier that modifies the behavior of the variable, making a variable "read-only". This means that the variable can be used just as any other variable of its type, but its value cannot be changed. You will get a compiler error if you try to assign a value to a const variable. -

    -

    Constants defined with the const keyword obey the rules of variable scoping that govern other variables. This, and the pitfalls of using#define, makes the const keyword a superior method for defining constants and is preferred over using #define. -

    -

    Example

    -
    -const float pi = 3.14;
-float x;
-
-// ....
-
-x = pi * 2;    // it's fine to use const's in math
-
-pi = 7;        // illegal - you can't write to (modify) a constant
-
-
-

    #define or const

    -

    You can use either const or #define for creating numeric or string constants. For arrays, you will need to use const. In general const is preferred over #define for defining constants. -

    -

    See also: -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - diff --git a/build/linux/work/reference/Constants.html b/build/linux/work/reference/Constants.html deleted file mode 100644 index 24ee915a1..000000000 --- a/build/linux/work/reference/Constants.html +++ /dev/null @@ -1,135 +0,0 @@ - - - - Arduino Reference - Constants - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    constants

    -

    Constants are predefined variables in the Arduino language. They are used to make the programs easier to read. We classify constants in groups. -

    -

    Defining Logical Levels, true and false (Boolean Constants)

    -

    There are two constants used to represent truth and falsity in the Arduino language: true, and false. -

    -

    false

    -

    false is the easier of the two to define. false is defined as 0 (zero). -

    -

    true

    -

    true is often said to be defined as 1, which is correct, but true has a wider definition. Any integer which is non-zero is TRUE, in a Boolean sense. So -1, 2 and -200 are all defined as true, too, in a Boolean sense. -

    -

    Note that the true and false constants are typed in lowercase unlike HIGH, LOW, INPUT, & OUTPUT. -

    -

    Defining Pin Levels, HIGH and LOW

    -

    When reading or writing to a digital pin there are only two possible values a pin can take/be-set-to: HIGH and LOW. -

    -

    HIGH -

    -

    The meaning of HIGH (in reference to a pin) is somewhat different depending on whether a pin is set to an INPUT or OUTPUT. -When a pin is configured as an INPUT with pinMode, and read with digitalRead, the microcontroller will report HIGH if a voltage of 3 volts or more is present at the pin. -

    -

    A pin may also be configured as an INPUT with pinMode, and subsequently made HIGH with digitalWrite, this will set the internal 20K pullup resistors, which will steer the input pin to a HIGH reading unless it is pulled LOW by external circuitry. -

    -

    When a pin is configured to OUTPUT with pinMode, and set to HIGH with digitalWrite, the pin is at 5 volts. In this state it can source current, e.g. light an LED that is connected through a series resistor to ground, or to another pin configured as an output, and set to LOW. -

    -

    LOW -

    -

    The meaning of LOW also has a different meaning depending on whether a pin is set to INPUT or OUTPUT. When a pin is configured as an INPUT with pinMode, and read with digitalRead, the microcontroller will report LOW if a voltage of 2 volts or less is present at the pin. -

    -

    When a pin is configured to OUTPUT with pinMode, and set to LOW with digitalWrite, the pin is at 0 volts. In this state it can sink current, e.g. light an LED that is connected through a series resistor to, +5 volts, or to another pin configured as an output, and set to HIGH. -

    -

    Defining Digital Pins, INPUT and OUTPUT

    -

    Digital pins can be used either as INPUT or OUTPUT. Changing a pin from INPUT TO OUTPUT with pinMode() drastically changes the electrical behavior of the pin. -

    -

    Pins Configured as Inputs

    -

    Arduino (Atmega) pins configured as INPUT with pinMode() are said to be in a high-impedance state. One way of explaining this is that pins configured as INPUT make extremely small demands on the circuit that they are sampling, say equivalent to a series resistor of 100 Megohms in front of the pin. This makes them useful for reading a sensor, but not powering an LED. -

    -

    Pins Configured as Outputs

    -

    Pins configured as OUTPUT with pinMode() are said to be in a low-impedance state. This means that they can provide a substantial amount of current to other circuits. Atmega pins can source (provide positive current) or sink (provide negative current) up to 40 mA (milliamps) of current to other devices/circuits. This makes them useful for powering LED's but useless for reading sensors. Pins configured as outputs can also be damaged or destroyed if short circuited to either ground or 5 volt power rails. The amount of current provided by an Atmega pin is also not enough to power most relays or motors, and some interface circuitry will be required. -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - -
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    - - diff --git a/build/linux/work/reference/Constrain.html b/build/linux/work/reference/Constrain.html deleted file mode 100644 index a457f0511..000000000 --- a/build/linux/work/reference/Constrain.html +++ /dev/null @@ -1,115 +0,0 @@ - - - - Arduino Reference - Constrain - - - - - - - -
    - - - - - - - - -
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    Reference   Language | Libraries | Comparison | Changes -

    -

    constrain(x, a, b)

    -

    Description

    -

    Constrains a number to be within a range. -

    -

    Parameters

    -

    x: the number to constrain, all data types -

    -

    a: the lower end of the range, all data types -

    -

    b: the upper end of the range, all data types -

    -

    Returns

    -

    x: if x is between a and b -

    -

    a: if x is less than a -

    -

    b: if x is greater than b -

    -

    Example

    -
    sensVal = constrain(sensVal, 10, 150);
-// limits range of sensor values to between 10 and 150 
-
    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - diff --git a/build/linux/work/reference/Continue.html b/build/linux/work/reference/Continue.html deleted file mode 100644 index 7727fbb01..000000000 --- a/build/linux/work/reference/Continue.html +++ /dev/null @@ -1,107 +0,0 @@ - - - - Arduino Reference - Continue - - - - - - - -
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    continue

    -

    The continue statement skips the rest of the current iteration of a loop (do, for, or while). It continues by checking the conditional expression of the loop, and proceeding with any subsequent iterations. -

    -

    Example

    -
    -
-for (x = 0; x < 255; x ++)
-{
-    if (x > 40 && x < 120){      // create jump in values
-        continue;
-    }
-
-    digitalWrite(PWMpin, x);
-    delay(50);
-}
-
-
    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

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    - - - - - - - - -
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    Reference   Language | Libraries | Comparison | Changes -

    -

    cos(rad)

    -

    Description

    -

    Calculates the cos of an angle (in radians). The result will be between -1 and 1.
    -

    Parameters

    -

    rad: the angle in radians (float) -

    -

    Returns

    -

    The cos of the angle ("double") -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    Reference   Language | Libraries | Comparison | Changes -

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    Define

    -

    #define is a useful C component that allows the programmer to give a name to a constant value before the program is compiled. Defined constants in arduino don't take up any program memory space on the chip. The compiler will replace references to these constants with the defined value at compile time. -

    -

    This can have some unwanted side effects though, if for example, a constant name that had been #defined is included in some other constant or variable name. In that case the text would be replaced by the #defined number (or text). -

    -

    In general, the const keyword is preferred for defining constants and should be used instead of #define. -

    -

    Arduino defines have the same syntax as C defines: -

    -

    Syntax

    -

    #define constantName value -

    -

    Note that the # is necessary. -

    -

    Example

    -
    #define ledPin 3
-// The compiler will replace any mention of ledPin with the value 3 at compile time.
-
    -

    Tip

    -

    There is no semicolon after the #define statement. If you include one, the compiler will throw cryptic errors further down the page. -

    -

    #define ledPin 3;    // this is an error 
-
-
    -

    Similarly, including an equal sign after the #define statement will also generate a cryptic compiler error further down the page. -

    -

    #define ledPin  = 3  // this is also an error 
-
-
    -

    See

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - diff --git a/build/linux/work/reference/Delay.html b/build/linux/work/reference/Delay.html deleted file mode 100644 index dfefae413..000000000 --- a/build/linux/work/reference/Delay.html +++ /dev/null @@ -1,131 +0,0 @@ - - - - Arduino Reference - Delay - - - - - - - -
    - - - - - - - - -
    - -
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    Reference   Language | Libraries | Comparison | Changes -

    -

    delay()

    -

    Description

    -

    Pauses the program for the amount of time (in miliseconds) specified as parameter. (There are 1000 milliseconds in a second.) -

    -

    Syntax

    -

    delay(ms) -

    -

    Parameters

    -

    ms: the number of milliseconds to pause (unsigned long) -

    -

    Returns

    -

    nothing -

    -

    Example

    -
    -int ledPin = 13;                 // LED connected to digital pin 13
-
-void setup()
-{
-  pinMode(ledPin, OUTPUT);      // sets the digital pin as output
-}
-
-void loop()
-{
-  digitalWrite(ledPin, HIGH);   // sets the LED on
-  delay(1000);                  // waits for a second
-  digitalWrite(ledPin, LOW);    // sets the LED off
-  delay(1000);                  // waits for a second
-}
-
-
    -

    Caveat

    -

    While it is easy to create a blinking LED with the delay() function, and many sketches use short delays for such tasks as switch debouncing, the use of delay() in a sketch has significant drawbacks. No other reading of sensors, mathematical calculations, or pin manipulation can go on during the delay function, so in effect, it brings most other activity to a halt. For alternative approaches to controlling timing see the millis() function and the sketch sited below. More knowledgeable programmers usually avoid the use of delay() for timing of events longer than 10's of milliseconds unless the Arduino sketch is very simple. -

    -

    Certain things do go on while the delay() function is controlling the Atmega chip however, because the delay function does not disable interrupts. Serial communication that appears at the RX pin is recorded, PWM (analogWrite) values and pin states are maintained, and interrupts will work as they should. -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - - - - -
    - - diff --git a/build/linux/work/reference/DelayMicroseconds.html b/build/linux/work/reference/DelayMicroseconds.html deleted file mode 100644 index 3139e43b9..000000000 --- a/build/linux/work/reference/DelayMicroseconds.html +++ /dev/null @@ -1,134 +0,0 @@ - - - - Arduino Reference - DelayMicroseconds - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    delayMicroseconds()

    -

    Description

    -

    Pauses the program for the amount of time (in microseconds) specified as parameter. There are a thousand microseconds in a millisecond, and a million microseconds in a second. -

    -

    Currently, the largest value that will produce an accurate delay is 16383. This could change in future Arduino releases. For delays longer than a few thousand microseconds, you should use delay() instead. -

    -

    Syntax

    -

    delayMicroseconds(us) -

    -

    Parameters

    -

    us: the number of microseconds to pause (unsigned int) -

    -

    Returns

    -

    None -

    -

    Example

    -
     
-int outPin = 8;                 // digital pin 8
-
-void setup()
-{
-  pinMode(outPin, OUTPUT);      // sets the digital pin as output
-}
-
-void loop()
-{
-  digitalWrite(outPin, HIGH);   // sets the pin on
-  delayMicroseconds(50);        // pauses for 50 microseconds      
-  digitalWrite(outPin, LOW);    // sets the pin off
-  delayMicroseconds(50);        // pauses for 50 microseconds      
-}
-
-
    -

    configures pin number 8 to work as an output pin. It sends a train of pulses with 100 microseconds period. -

    -

    Caveats and Known Issues

    -

    This function works very accurately in the range 3 microseconds and up. We cannot assure that delayMicroseconds will perform precisely for smaller delay-times. -

    -

    As of Arduino 0018, delayMicroseconds() no longer disables interrupts. -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - - - - -
    - - diff --git a/build/linux/work/reference/DetachInterrupt.html b/build/linux/work/reference/DetachInterrupt.html deleted file mode 100644 index 22580cbba..000000000 --- a/build/linux/work/reference/DetachInterrupt.html +++ /dev/null @@ -1,99 +0,0 @@ - - - - Arduino Reference - DetachInterrupt - - - - - - - -
    - - - - - - - - -
    - -
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    Reference   Language | Libraries | Comparison | Changes -

    -

    detachInterrupt(interrupt)

    -

    Description

    -

    Turns off the given interrupt. -

    -

    Parameters

    -

    interrupt: the number of interrupt to disable (0 or 1). -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - - - - -
    - - diff --git a/build/linux/work/reference/DigitalRead.html b/build/linux/work/reference/DigitalRead.html deleted file mode 100644 index 4c1c3be98..000000000 --- a/build/linux/work/reference/DigitalRead.html +++ /dev/null @@ -1,133 +0,0 @@ - - - - Arduino Reference - DigitalRead - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    digitalRead()

    -

    Description

    -

    Reads the value from a specified digital pin, either HIGH or LOW. -

    -

    Syntax

    -

    digitalRead(pin) -

    -

    Parameters

    -

    pin: the number of the digital pin you want to read (int) -

    -

    Returns

    -

    HIGH or LOW -

    -

    Example

    -
     
-int ledPin = 13; // LED connected to digital pin 13
-int inPin = 7;   // pushbutton connected to digital pin 7
-int val = 0;     // variable to store the read value
-
-void setup()
-{
-  pinMode(ledPin, OUTPUT);      // sets the digital pin 13 as output
-  pinMode(inPin, INPUT);      // sets the digital pin 7 as input
-}
-
-void loop()
-{
-  val = digitalRead(inPin);   // read the input pin
-  digitalWrite(ledPin, val);    // sets the LED to the button's value
-}
-
-
    -

    Sets pin 13 to the same value as the pin 7, which is an input. -

    -

    Note

    -

    If the pin isn't connected to anything, digitalRead() can return either HIGH or LOW (and this can change randomly). -

    -

    The analog input pins can be used as digital pins, referred to as A0, A1, etc. -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - - - - -
    - - diff --git a/build/linux/work/reference/DigitalWrite.html b/build/linux/work/reference/DigitalWrite.html deleted file mode 100644 index 41276584c..000000000 --- a/build/linux/work/reference/DigitalWrite.html +++ /dev/null @@ -1,138 +0,0 @@ - - - - Arduino Reference - DigitalWrite - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    digitalWrite()

    -

    Description

    -

    Write a HIGH or a LOW value to a digital pin. -

    -

    If the pin has been configured as an OUTPUT with pinMode(), its voltage will be set to the corresponding value: 5V (or 3.3V on 3.3V boards) for HIGH, 0V (ground) for LOW. -

    -

    If the pin is configured as an INPUT, writing a HIGH value with digitalWrite() will enable an internal 20K pullup resistor (see the tutorial on digital pins). Writing LOW will disable the pullup. The pullup resistor is enough to light an LED dimly, so if LEDs appear to work, but very dimly, this is a likely cause. The remedy is to set the pin to an output with the pinMode() function. -

    -

    NOTE: Digital pin 13 is harder to use as a digital input than the other digital pins because it has an LED and resistor attached to it that's soldered to the board on most boards. If you enable its internal 20k pull-up resistor, it will hang at around 1.7 V instead of the expected 5V because the onboard LED and series resistor pull the voltage level down, meaning it always returns LOW. If you must use pin 13 as a digital input, use an external pull down resistor. -

    -

    Syntax

    -

    digitalWrite(pin, value) -

    -

    Parameters

    -

    pin: the pin number -

    -

    value: HIGH or LOW -

    -

    Returns

    -

    none -

    -

    Example

    -
     
-int ledPin = 13;                 // LED connected to digital pin 13
-
-void setup()
-{
-  pinMode(ledPin, OUTPUT);      // sets the digital pin as output
-}
-
-void loop()
-{
-  digitalWrite(ledPin, HIGH);   // sets the LED on
-  delay(1000);                  // waits for a second
-  digitalWrite(ledPin, LOW);    // sets the LED off
-  delay(1000);                  // waits for a second
-}
-
-
    -

    Sets pin 13 to HIGH, makes a one-second-long delay, and sets the pin back to LOW. -

    -

    Note

    -

    The analog input pins can be used as digital pins, referred to as A0, A1, etc. -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - diff --git a/build/linux/work/reference/DoWhile.html b/build/linux/work/reference/DoWhile.html deleted file mode 100644 index 9b905dd25..000000000 --- a/build/linux/work/reference/DoWhile.html +++ /dev/null @@ -1,109 +0,0 @@ - - - - Arduino Reference - DoWhile - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    do - while

    -

    The do loop works in the same manner as the while loop, with the exception that the condition is tested at the end of the loop, so the do loop will always run at least once. -

    -

    -do
-{
-    // statement block
-} while (test condition);
-
-
    -

    Example

    -
    -do
-{
-  delay(50);          // wait for sensors to stabilize
-  x = readSensors();  // check the sensors
-
-} while (x < 100);
-
-

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    Reference   Language | Libraries | Comparison | Changes -

    -

    double

    -

    Desciption

    -

    Double precision floating point number. Occupies 4 bytes. -

    -

    The double implementation on the Arduino is currently exactly the same as the float, with no gain in precision. -

    -

    Tip

    -

    Users who borrow code from other sources that includes double variables may wish to examine the code to see if the implied precision is different from that actually achieved on the Arduino. -

    -

    See:

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    EEPROM Library

    -

    The microcontroller on the Arduino board has EEPROM: memory whose values are kept when the board is turned off (like a tiny hard drive). This library enables you to read and write those bytes. -

    -

    The microcontrollers on the various Arduino boards have different amounts of EEPROM: 1024 bytes on the ATmega328, 512 bytes on the ATmega168 and ATmega8, 4 KB (4096 bytes) on the ATmega1280 and ATmega2560. -

    -

    Functions

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - diff --git a/build/linux/work/reference/EEPROMRead.html b/build/linux/work/reference/EEPROMRead.html deleted file mode 100644 index 817c697bb..000000000 --- a/build/linux/work/reference/EEPROMRead.html +++ /dev/null @@ -1,137 +0,0 @@ - - - - Arduino Reference - EEPROMRead - - - - - - - -
    - - - - - - - - -
    - -
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    Reference   Language | Libraries | Comparison | Changes -

    -

    EEPROM -

    -

    read()

    -

    Description

    -

    Reads a byte from the EEPROM. Locations that have never been written to have the value of 255. -

    -

    Syntax

    -

    EEPROM.read(address) -

    -

    Parameters

    -

    address: the location to read from, starting from 0 (int) -

    -

    Returns

    -

    the value stored in that location (byte) -

    -

    Example

    -
    -#include <EEPROM.h>
-
-int a = 0;
-int value;
-
-void setup()
-{
-  Serial.begin(9600);
-}
-
-void loop()
-{
-  value = EEPROM.read(a);
-
-  Serial.print(a);
-  Serial.print("\t");
-  Serial.print(value);
-  Serial.println();
-
-  a = a + 1;
-
-  if (a == 512)
-    a = 0;
-
-  delay(500);
-}
-
-
    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - - - - -
    - - diff --git a/build/linux/work/reference/EEPROMWrite.html b/build/linux/work/reference/EEPROMWrite.html deleted file mode 100644 index d2f303863..000000000 --- a/build/linux/work/reference/EEPROMWrite.html +++ /dev/null @@ -1,185 +0,0 @@ - - - - Arduino Reference - EEPROMWrite - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    EEPROM -

    -

    write()

    -

    Description

    -

    Write a byte to the EEPROM. -

    -

    Syntax

    -

    EEPROM.write(address, value) -

    -

    Parameters

    -

    address: the location to write to, starting from 0 (int) -

    -

    value: the value to write, from 0 to 255 (byte) -

    -

    Returns

    -

    none -

    -

    Note

    -

    An EEPROM write takes 3.3 ms to complete. The EEPROM memory has a specified life of 100,000 write/erase cycles, so you may need to be careful about how often you write to it. -

    -

    Example

    -

    -

    -

    -#include <EEPROM.h>
    -
    -void setup()
    -{
    -  for (int i = 0; i < 512; i++)
    -    EEPROM.write(i, i);
    -}
    -
    -void loop()
    -{
    -}
    - 
    -
    [Get Code]
    -
    - -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - - - - - - - -
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    Reference   Language | Libraries | Comparison | Changes -

    -

    if / else

    -

    if/else allows greater control over the flow of code than the basic if statement, by allowing multiple tests to be grouped together. For example, an analog input could be tested and one action taken if the input was less than 500, and another action taken if the input was 500 or greater. The code would look like this: -

    -

    if (pinFiveInput < 500)
-{
-  // action A
-}
-else
-{
-  // action B
-}
-
    -

    else can proceed another if test, so that multiple, mutually exclusive tests can be run at the same time. -

    -

    Each test will proceed to the next one until a true test is encountered. When a true test is found, its associated block of code is run, and the program then skips to the line following the entire if/else construction. If no test proves to be true, the default else block is executed, if one is present, and sets the default behavior. -

    -

    Note that an else if block may be used with or without a terminating else block and vice versa. An unlimited number of such else if branches is allowed. -

    -

    if (pinFiveInput < 500)
-{
-  // do Thing A
-}
-else if (pinFiveInput >= 1000)
-{
-  // do Thing B
-}
-else
-{
-  // do Thing C
-}
-
-

    Another way to express branching, mutually exclusive tests, is with the switch case statement. -

    -

    See also:

    -

    switch case -Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - - - - - - - -
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    Reference   Language | Libraries | Comparison | Changes -

    -

    Ethernet library

    -

    With the Arduino Ethernet Shield, this library allows an Arduino board to connect to the internet. It can serve as either a server accepting incoming connections or a client making outgoing ones. The library supports up to four concurrent connection (incoming or outgoing or a combination). -

    -

    Arduino communicates with the shield using the SPI bus. This is on digital pins 11, 12, and 13 on the Uno and pins 50, 51, and 52 on the Mega. On both boards, pin 10 is used as SS. On the Mega, the hardware SS pin, 53, is not used to select the W5100, but it must be kept as an output or the SPI interface won't work. -

    -

    -

    -

    Ethernet class

    -

    The Ethernet class initializes the ethernet library and network settings. -

    -

    IPAddress class

    -

    The IPAddress class works with local and remote IP addressing. -

    -

    Server class

    -

    The Server class creates servers which can send data to and receive data from connected clients (programs running on other computers or devices). -

    -

    Client class

    -

    The client class creates clients that can connect to servers and send and receive data. -

    -

    EthernetUDP class

    -

    The EthernetUDP class enables UDP message to be sent and received. -

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/EthernetBegin.html b/build/linux/work/reference/EthernetBegin.html deleted file mode 100644 index eec3c9f8e..000000000 --- a/build/linux/work/reference/EthernetBegin.html +++ /dev/null @@ -1,185 +0,0 @@ - - - - Arduino Reference - EthernetBegin - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    Ethernet -

    -

    Ethernet.begin()

    -

    Description

    -

    Initializes the ethernet library and network settings. -

    -

    With version 1.0, the library supports DHCP. Using Ethernet.begin(mac) with the proper network setup, the Ethernet shield will automatically obtain an IP address. This increases the sketch size significantly. -

    -

    Syntax

    -

    Ethernet.begin(mac);
    Ethernet.begin(mac, ip);
    Ethernet.begin(mac, ip, gateway);
    Ethernet.begin(mac, ip, gateway, subnet);
    -

    Parameters

    -

    mac: the MAC (Media access control) address for the device (array of 6 bytes). this is the Ethernet hardware address of your shield. Newer Arduino Ethernet Shields include a sticker with the device's MAC address. For older shields, choose your own. -

    -

    ip: the IP address of the device (array of 4 bytes) -

    -

    gateway: the IP address of the network gateway (array of 4 bytes). optional: defaults to the device IP address with the last octet set to 1 -

    -

    subnet: the subnet mask of the network (array of 4 bytes). optional: defaults to 255.255.255.0 -

    -

    Returns

    -

    None -

    -

    Example

    -

    -

    -
    #include <Ethernet.h>
    -
    -// the media access control (ethernet hardware) address for the shield:
    -byte mac[] = { 0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED };  
    -//the IP address for the shield:
    -byte ip[] = { 10, 0, 0, 177 };    
    -
    -void setup()
    -{
    -  Ethernet.begin(mac, ip);
    -}
    -
    -void loop () {}
    -
    [Get Code]
    -
    - -

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/EthernetClient.html b/build/linux/work/reference/EthernetClient.html deleted file mode 100644 index 2d92392a5..000000000 --- a/build/linux/work/reference/EthernetClient.html +++ /dev/null @@ -1,204 +0,0 @@ - - - - Arduino Reference - EthernetClient - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    Ethernet : EthernetClient -

    -

    EthernetClient()

    -

    Description

    -

    Creates a client which can connect to a specified internet IP address and port (defined in the client.connect() function). -

    -

    Syntax

    -

    EthernetClient() -

    -

    Parameters

    -

    None -

    -

    Example

    -

    -

    -
    #include <Ethernet.h>
    -#include <SPI.h>
    -
    -
    -byte mac[] = { 0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED };
    -byte ip[] = { 10, 0, 0, 177 };
    -byte server[] = { 64, 233, 187, 99 }; // Google
    -
    -EthernetClient client;
    -
    -void setup()
    -{
    -  Ethernet.begin(mac, ip);
    -  Serial.begin(9600);
    -
    -  delay(1000);
    -
    -  Serial.println("connecting...");
    -
    -  if (client.connect(server, 80)) {
    -    Serial.println("connected");
    -    client.println("GET /search?q=arduino HTTP/1.0");
    -    client.println();
    -  } else {
    -    Serial.println("connection failed");
    -  }
    -}
    -
    -void loop()
    -{
    -  if (client.available()) {
    -    char c = client.read();
    -    Serial.print(c);
    -  }
    -
    -  if (!client.connected()) {
    -    Serial.println();
    -    Serial.println("disconnecting.");
    -    client.stop();
    -    for(;;)
    -      ;
    -  }
    -}
    -
    [Get Code]
    -
    - -Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/EthernetIPAddress.html b/build/linux/work/reference/EthernetIPAddress.html deleted file mode 100644 index 5e1f0839a..000000000 --- a/build/linux/work/reference/EthernetIPAddress.html +++ /dev/null @@ -1,194 +0,0 @@ - - - - Arduino Reference - EthernetIPAddress - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    Ethernet : IPAddress class -

    -

    IPAddress()

    -

    Description

    -

    Defines an IP address. It can be used to declare both local and remote addresses. -

    -

    Syntax

    -

    IPAddress(address); -

    -

    Parameters

    -

    address: a comma delimited list representing the address (4 bytes, ex. 192, 168, 1, 1) -

    -

    Returns

    -

    None -

    -

    Example

    -

    -

    -
    #include <Ethernet.h>
    -
    -// network configuration.  gateway and subnet are optional.
    -
    - // the media access control (ethernet hardware) address for the shield:
    -byte mac[] = { 0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED };  
    -// the router's gateway address:
    -byte gateway[] = { 10, 0, 0, 1 };
    -// the subnet:
    -byte subnet[] = { 255, 255, 0, 0 };
    -
    -EthernetServer server = EthernetServer(23);
    -
    -//the IP address is dependent on your network
    -IPAddress ip(192,168,1,1);
    -
    -void setup()
    -{
    -  // initialize the ethernet device
    -  Ethernet.begin(mac, ip, gateway, subnet);
    -
    -  // start listening for clients
    -  server.begin();
    -}
    -
    -void loop()
    -{
    -  //print out the IP address
    -  Serial.println(myIPaddress);
    -}
    -
    [Get Code]
    -
    - -Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/EthernetLocalIP.html b/build/linux/work/reference/EthernetLocalIP.html deleted file mode 100644 index 1dd87dad8..000000000 --- a/build/linux/work/reference/EthernetLocalIP.html +++ /dev/null @@ -1,195 +0,0 @@ - - - - Arduino Reference - EthernetLocalIP - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    Ethernet -

    -

    Ethernet.localIP()

    -

    Description

    -

    Obtains the IP address of the Ethernet shield. Useful when the address is auto assigned through DHCP. -

    -

    Syntax

    -

    Ethernet.localIP(); -

    -

    Parameters

    -

    none -

    -

    Returns

    -

    the IP address -

    -

    Example

    -

    -

    -
    #include <SPI.h>
    -#include <Ethernet.h>
    -
    -// Enter a MAC address for your controller below.
    -// Newer Ethernet shields have a MAC address printed on a sticker on the shield
    -byte mac[] = {  
    -  0x00, 0xAA, 0xBB, 0xCC, 0xDE, 0x02 };
    -
    -// Initialize the Ethernet client library
    -// with the IP address and port of the server
    -// that you want to connect to (port 80 is default for HTTP):
    -EthernetClient client;
    -
    -void setup() {
    -  // start the serial library:
    -  Serial.begin(9600);
    -  // start the Ethernet connection:
    -  if (Ethernet.begin(mac) == 0) {
    -    Serial.println("Failed to configure Ethernet using DHCP");
    -    // no point in carrying on, so do nothing forevermore:
    -    for(;;)
    -      ;
    -  }
    -  // print your local IP address:
    -  Serial.println(Ethernet.localIP());
    -
    -}
    -
    -void loop() {
    -
    -}
    -
    [Get Code]
    -
    - -Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/EthernetServer.html b/build/linux/work/reference/EthernetServer.html deleted file mode 100644 index e703ba76d..000000000 --- a/build/linux/work/reference/EthernetServer.html +++ /dev/null @@ -1,200 +0,0 @@ - - - - Arduino Reference - EthernetServer - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    Ethernet : EthernetServer -

    -

    EthernetServer()

    -

    Description

    -

    Create a server that listens for incoming connections on the specified port. -

    -

    Syntax

    -

    Server(port); -

    -

    Parameters

    -

    port: the port to listen on (int) -

    -

    Returns

    -

    None -

    -

    Example

    -

    -

    -
    #include <SPI.h>
    -#include <Ethernet.h>
    -
    -// network configuration.  gateway and subnet are optional.
    -
    - // the media access control (ethernet hardware) address for the shield:
    -byte mac[] = { 0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED };  
    -//the IP address for the shield:
    -byte ip[] = { 10, 0, 0, 177 };    
    -// the router's gateway address:
    -byte gateway[] = { 10, 0, 0, 1 };
    -// the subnet:
    -byte subnet[] = { 255, 255, 0, 0 };
    -
    -// telnet defaults to port 23
    -EthernetServer server = EthernetServer(23);
    -
    -void setup()
    -{
    -  // initialize the ethernet device
    -  Ethernet.begin(mac, ip, gateway, subnet);
    -
    -  // start listening for clients
    -  server.begin();
    -}
    -
    -void loop()
    -{
    -  // if an incoming client connects, there will be bytes available to read:
    -  EthernetClient client = server.available();
    -  if (client == true) {
    -    // read bytes from the incoming client and write them back
    -    // to any clients connected to the server:
    -    server.write(client.read());
    -  }
    -}
    -
    [Get Code]
    -
    - -Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/EthernetUDPAvailable.html b/build/linux/work/reference/EthernetUDPAvailable.html deleted file mode 100644 index c6fcef467..000000000 --- a/build/linux/work/reference/EthernetUDPAvailable.html +++ /dev/null @@ -1,221 +0,0 @@ - - - - Arduino Reference - EthernetUDPAvailable - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    Ethernet : UDP.available() -

    -

    available()

    -

    Description

    -

    Get the number of bytes (characters) available for reading from the buffer. This is data that's already arrived. -

    -

    This function can only be successfully called after UDP.parsePacket(). -

    -

    available() inherits from the Stream utility class. -

    -

    Syntax

    -

    UDP.available() -

    -

    Parameters

    -

    None -

    -

    Returns

    -

    the number of bytes available to read -

    -

    Example

    -

    -

    -
    #include <SPI.h>        
    -#include <Ethernet.h>
    -#include <EthernetUdp.h>
    -
    -// Enter a MAC address and IP address for your controller below.
    -// The IP address will be dependent on your local network:
    -byte mac[] = {  
    -  0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED };
    -IPAddress ip(192, 168, 1, 177);
    -
    -unsigned int localPort = 8888;      // local port to listen on
    -
    -// An EthernetUDP instance to let us send and receive packets over UDP
    -EthernetUDP Udp;
    -
    -char packetBuffer[UDP_TX_PACKET_MAX_SIZE]; //buffer to hold incoming packet,
    -
    -void setup() {
    -  // start the Ethernet and UDP:
    -  Ethernet.begin(mac,ip);
    -  Udp.begin(localPort);
    -
    -}
    -
    -void loop() {
    -
    -  int packetSize = Udp.parsePacket();
    -  if(Udp.available())
    -  {
    -    Serial.print("Received packet of size ");
    -    Serial.println(packetSize);
    -    Serial.print("From ");
    -    IPAddress remote = Udp.remoteIP();
    -    for (int i =0; i < 4; i++)
    -    {
    -      Serial.print(remote[i], DEC);
    -      if (i < 3)
    -      {
    -        Serial.print(".");
    -      }
    -    }
    -    Serial.print(", port ");
    -    Serial.println(Udp.remotePort());
    -
    -    // read the packet into packetBufffer
    -    Udp.read(packetBuffer,UDP_TX_PACKET_MAX_SIZE);
    -    Serial.println("Contents:");
    -    Serial.println(packetBuffer);
    - }
    -}
    -
    [Get Code]
    -
    - -

    -

    See Also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/EthernetUDPBegin.html b/build/linux/work/reference/EthernetUDPBegin.html deleted file mode 100644 index 18bc94573..000000000 --- a/build/linux/work/reference/EthernetUDPBegin.html +++ /dev/null @@ -1,189 +0,0 @@ - - - - Arduino Reference - EthernetUDPBegin - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    Ethernet : UDP.begin() -

    -

    Description

    -

    Initializes the ethernet UDP library and network settings. -

    -

    Syntax

    -

    EthernetUDP.begin(localPort);
    -

    Parameters

    -

    localPort: the local port to listen on (int) -

    -

    Returns

    -

    None -

    -

    Example

    -
    -
-
    
-  
    #include <SPI.h>        
    
-#include <Ethernet.h>
    
-#include <EthernetUdp.h>
    
-
    
-// Enter a MAC address and IP address for your controller below.
    
-// The IP address will be dependent on your local network:
    
-byte mac[] = {  
    
-  0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED };
    
-IPAddress ip(192, 168, 1, 177);
    
-
    
-unsigned int localPort = 8888;      // local port to listen on
    
-
    
-// An EthernetUDP instance to let us send and receive packets over UDP
    
-EthernetUDP Udp;
    
-
    
-void setup() {
    
-  // start the Ethernet and UDP:
    
-  Ethernet.begin(mac,ip);
    
-  Udp.begin(localPort);
    
-
    
-}
    
-
    
-void loop() {
    
-
    
-}
    
-  
    [Get Code]
    
-
    
-
-
-

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/EthernetUDPBeginPacket.html b/build/linux/work/reference/EthernetUDPBeginPacket.html deleted file mode 100644 index 0d9fb105d..000000000 --- a/build/linux/work/reference/EthernetUDPBeginPacket.html +++ /dev/null @@ -1,190 +0,0 @@ - - - - Arduino Reference - EthernetUDPBeginPacket - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    Ethernet : UDP.beginPacket() -

    -

    Description

    -

    Starts a connection to write UDP data to the remote connection -

    -

    Syntax

    -

    UDP.beginPacket(remoteIP, remotePort);
    -

    Parameters

    -

    remoteIP: the IP address of the remote connection (4 bytes)
    remotePort: the port of the remote connection (int)
    -

    Returns

    -

    None -

    -

    Example

    -

    -

    -
    #include <SPI.h>        
    -#include <Ethernet.h>
    -#include <EthernetUdp.h>
    -
    -// Enter a MAC address and IP address for your controller below.
    -// The IP address will be dependent on your local network:
    -byte mac[] = {  
    -  0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED };
    -IPAddress ip(192, 168, 1, 177);
    -
    -unsigned int localPort = 8888;      // local port to listen on
    -
    -// An EthernetUDP instance to let us send and receive packets over UDP
    -EthernetUDP Udp;
    -
    -void setup() {
    -  // start the Ethernet and UDP:
    -  Ethernet.begin(mac,ip);
    -  Udp.begin(localPort);
    -
    -}
    -
    -void loop() {
    -
    -  Udp.beginPacket(Udp.remoteIP(), Udp.remotePort());
    -    Udp.write("hello");
    -    Udp.endPacket();
    -
    -}
    -
    [Get Code]
    -
    - -Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/EthernetUDPEndPacket.html b/build/linux/work/reference/EthernetUDPEndPacket.html deleted file mode 100644 index f1ecb800e..000000000 --- a/build/linux/work/reference/EthernetUDPEndPacket.html +++ /dev/null @@ -1,192 +0,0 @@ - - - - Arduino Reference - EthernetUDPEndPacket - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    Ethernet : UDP.endPacket() -

    -

    Description

    -

    Called after writing UDP data to the remote connection. -

    -

    Syntax

    -

    UDP.endPacket();
    -

    Parameters

    -

    None -

    -

    Returns

    -

    None -

    -

    Example

    -

    -

    -
    #include <SPI.h>        
    -#include <Ethernet.h>
    -#include <EthernetUdp.h>
    -
    -// Enter a MAC address and IP address for your controller below.
    -// The IP address will be dependent on your local network:
    -byte mac[] = {  
    -  0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED };
    -IPAddress ip(192, 168, 1, 177);
    -
    -unsigned int localPort = 8888;      // local port to listen on
    -
    -// An EthernetUDP instance to let us send and receive packets over UDP
    -EthernetUDP Udp;
    -
    -void setup() {
    -  // start the Ethernet and UDP:
    -  Ethernet.begin(mac,ip);
    -  Udp.begin(localPort);
    -
    -}
    -
    -void loop() {
    -
    -  Udp.beginPacket(Udp.remoteIP(), Udp.remotePort());
    -    Udp.write("hello");
    -    Udp.endPacket();
    -
    -}
    -
    [Get Code]
    -
    - -

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/EthernetUDPParsePacket.html b/build/linux/work/reference/EthernetUDPParsePacket.html deleted file mode 100644 index ff7663676..000000000 --- a/build/linux/work/reference/EthernetUDPParsePacket.html +++ /dev/null @@ -1,200 +0,0 @@ - - - - Arduino Reference - EthernetUDPParsePacket - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    Ethernet : UDP.parsePacket() -

    -

    Description

    -

    Checks for the presence of a UDP packet, and reports the size. parsePacket() must be called before reading the buffer with UDP.read(). -

    -

    Syntax

    -

    UDP.parsePacket();
    -

    Parameters

    -

    None -

    -

    Returns

    -

    int: the size of a received UDP packet -

    -

    Example

    -

    -

    -

    -#include <SPI.h>         // needed for Arduino versions later than 0018
    -#include <Ethernet.h>
    -#include <EthernetUdp.h>         // UDP library from: bjoern@cs.stanford.edu 12/30/2008
    -
    -
    -// Enter a MAC address and IP address for your controller below.
    -// The IP address will be dependent on your local network:
    -byte mac[] = {  
    -  0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED };
    -IPAddress ip(192, 168, 1, 177);
    -
    -unsigned int localPort = 8888;      // local port to listen on
    -
    -// An EthernetUDP instance to let us send and receive packets over UDP
    -EthernetUDP Udp;
    -
    -void setup() {
    -  // start the Ethernet and UDP:
    -  Ethernet.begin(mac,ip);
    -  Udp.begin(localPort);
    -
    -  Serial.begin(9600);
    -}
    -
    -void loop() {
    -  // if there's data available, read a packet
    -  int packetSize = Udp.parsePacket();
    -  if(packetSize)
    -  {
    -    Serial.print("Received packet of size ");
    -    Serial.println(packetSize);
    -  }
    -  delay(10);
    -}
    -
    [Get Code]
    -
    - -

    -

    See Also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - - - - -
    - - diff --git a/build/linux/work/reference/EthernetUDPRead.html b/build/linux/work/reference/EthernetUDPRead.html deleted file mode 100644 index 000740842..000000000 --- a/build/linux/work/reference/EthernetUDPRead.html +++ /dev/null @@ -1,215 +0,0 @@ - - - - Arduino Reference - EthernetUDPRead - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    Ethernet : UDP.read() -

    -

    Description

    -

    Reads UDP data from the specified buffer. If no arguments are given, it will return the next character in the buffer. -

    -

    This function can only be successfully called after UDP.parsePacket(). -

    -

    Syntax

    -

    UDP.read();
    UDP.read(packetBuffer, MaxSize);
    -

    Parameters

    -

    packetBuffer: buffer to hold incoming packets (char)
    MaxSize: maximum size of the buffer (int) -

    -

    Returns

    -

    char : returns the characters in the buffer -

    -

    Example

    -

    -

    -
    #include <SPI.h>        
    -#include <Ethernet.h>
    -#include <EthernetUdp.h>
    -
    -// Enter a MAC address and IP address for your controller below.
    -// The IP address will be dependent on your local network:
    -byte mac[] = {  
    -  0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED };
    -IPAddress ip(192, 168, 1, 177);
    -
    -unsigned int localPort = 8888;      // local port to listen on
    -
    -// An EthernetUDP instance to let us send and receive packets over UDP
    -EthernetUDP Udp;
    -
    -char packetBuffer[UDP_TX_PACKET_MAX_SIZE]; //buffer to hold incoming packet,
    -
    -void setup() {
    -  // start the Ethernet and UDP:
    -  Ethernet.begin(mac,ip);
    -  Udp.begin(localPort);
    -
    -}
    -
    -void loop() {
    -
    -  int packetSize = Udp.parsePacket();
    -  if(packetSize)
    -  {
    -    Serial.print("Received packet of size ");
    -    Serial.println(packetSize);
    -    Serial.print("From ");
    -    IPAddress remote = Udp.remoteIP();
    -    for (int i =0; i < 4; i++)
    -    {
    -      Serial.print(remote[i], DEC);
    -      if (i < 3)
    -      {
    -        Serial.print(".");
    -      }
    -    }
    -    Serial.print(", port ");
    -    Serial.println(Udp.remotePort());
    -
    -    // read the packet into packetBufffer
    -    Udp.read(packetBuffer,UDP_TX_PACKET_MAX_SIZE);
    -    Serial.println("Contents:");
    -    Serial.println(packetBuffer);
    -}
    -}
    -
    [Get Code]
    -
    - -

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - - - - -
    - - diff --git a/build/linux/work/reference/EthernetUDPRemoteIP.html b/build/linux/work/reference/EthernetUDPRemoteIP.html deleted file mode 100644 index 695bb7a27..000000000 --- a/build/linux/work/reference/EthernetUDPRemoteIP.html +++ /dev/null @@ -1,207 +0,0 @@ - - - - Arduino Reference - EthernetUDPRemoteIP - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    Ethernet : UDP.remoteIP() -

    -

    Description

    -

    Gets the IP address of the remote connection. -

    -

    This function must be called after UDP.parsePacket(). -

    -

    Syntax

    -

    UDP.remoteIP();
    -

    Parameters

    -

    None -

    -

    Returns

    -

    4 bytes : the IP address of the remote connection -

    -

    Example

    -

    -

    -

    -#include <SPI.h>        
    -#include <Ethernet.h>
    -#include <EthernetUdp.h>
    -
    -// Enter a MAC address and IP address for your controller below.
    -// The IP address will be dependent on your local network:
    -byte mac[] = {  
    -  0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED };
    -IPAddress ip(192, 168, 1, 177);
    -
    -unsigned int localPort = 8888;      // local port to listen on
    -
    -// An EthernetUDP instance to let us send and receive packets over UDP
    -EthernetUDP Udp;
    -
    -void setup() {
    -  // start the Ethernet and UDP:
    -  Ethernet.begin(mac,ip);
    -  Udp.begin(localPort);
    -}
    -
    -void loop() {
    -
    -  int packetSize = Udp.parsePacket();
    -  if(packetSize)
    -  {
    -    Serial.print("Received packet of size ");
    -    Serial.println(packetSize);
    -    Serial.print("From IP : ");
    -
    -    IPAddress remote = Udp.remoteIP();
    -    //print out the remote connection's IP address
    -    Serial.print(remote);
    -
    -    Serial.print(" on port : ");
    -    //print out the remote connection's port
    -    Serial.println(Udp.remotePort());
    -  }
    -
    -}
    -
    - 
    -
    [Get Code]
    -
    - -Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/EthernetUDPRemotePort.html b/build/linux/work/reference/EthernetUDPRemotePort.html deleted file mode 100644 index b997a9ea3..000000000 --- a/build/linux/work/reference/EthernetUDPRemotePort.html +++ /dev/null @@ -1,215 +0,0 @@ - - - - Arduino Reference - EthernetUDPRemotePort - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    Ethernet : UDP.remotePort() -

    -

    Description

    -

    Gets the port of the remote UDP connection. -

    -

    This function must be called after UDP.parsePacket(). -

    -

    Syntax

    -

    UDP.remotePort();
    -

    Parameters

    -

    None -

    -

    Returns

    -

    int : the port of the UDP connection to a remote host -

    -

    Example

    -

    -

    -
    #include <SPI.h>        
    -#include <Ethernet.h>
    -#include <EthernetUdp.h>
    -
    -// Enter a MAC address and IP address for your controller below.
    -// The IP address will be dependent on your local network:
    -byte mac[] = {  
    -  0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED };
    -IPAddress ip(192, 168, 1, 177);
    -
    -unsigned int localPort = 8888;      // local port to listen on
    -
    -// An EthernetUDP instance to let us send and receive packets over UDP
    -EthernetUDP Udp;
    -
    -char packetBuffer[UDP_TX_PACKET_MAX_SIZE]; //buffer to hold incoming packet,
    -
    -void setup() {
    -  // start the Ethernet and UDP:
    -  Ethernet.begin(mac,ip);
    -  Udp.begin(localPort);
    -
    -}
    -
    -void loop() {
    -
    -  int packetSize = Udp.parsePacket();
    -  if(packetSize)
    -  {
    -    Serial.print("Received packet of size ");
    -    Serial.println(packetSize);
    -    Serial.print("From ");
    -    IPAddress remote = Udp.remoteIP();
    -    for (int i =0; i < 4; i++)
    -    {
    -      Serial.print(remote[i], DEC);
    -      if (i < 3)
    -      {
    -        Serial.print(".");
    -      }
    -    }
    -    Serial.print(", port ");
    -    Serial.println(Udp.remotePort());
    -
    -    // read the packet into packetBufffer
    -    Udp.read(packetBuffer,UDP_TX_PACKET_MAX_SIZE);
    -    Serial.println("Contents:");
    -    Serial.println(packetBuffer);
    - }
    -}
    - 
    -
    [Get Code]
    -
    - -Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
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    - - diff --git a/build/linux/work/reference/EthernetUDPWrite.html b/build/linux/work/reference/EthernetUDPWrite.html deleted file mode 100644 index 2aa043235..000000000 --- a/build/linux/work/reference/EthernetUDPWrite.html +++ /dev/null @@ -1,188 +0,0 @@ - - - - Arduino Reference - EthernetUDPWrite - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    Ethernet : UDP.write() -

    -

    Description

    -

    Writes UDP data to the remote connection. Must be wrapped between beginPacket() and endPacket(). beginPacket() initializes the packet of data, it is not sent until endPacket() is called. -

    -

    Syntax

    -

    UDP.write(message);
    -

    Parameters

    -

    message: the outgoing message (char)
    -

    Returns

    -

    byte : returns the number of characters sent. This does not have to be read -

    -

    Example

    -
    - 
-
    
-  
    #include <SPI.h>        
    
-#include <Ethernet.h>
    
-#include <EthernetUdp.h>
    
-
    
-// Enter a MAC address and IP address for your controller below.
    
-// The IP address will be dependent on your local network:
    
-byte mac[] = { 0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED };
    
-IPAddress ip(192, 168, 1, 177);
    
-
    
-unsigned int localPort = 8888;      // local port to listen on
    
-
    
-// An EthernetUDP instance to let us send and receive packets over UDP
    
-EthernetUDP Udp;
    
-
    
-void setup() {
    
-  // start the Ethernet and UDP:
    
-  Ethernet.begin(mac,ip);
    
-  Udp.begin(localPort);
    
-}
    
-
    
-void loop() {
    
-  Udp.beginPacket(Udp.remoteIP(), Udp.remotePort());
    
-    Udp.write("hello");
    
-    Udp.endPacket();
    
-}
    
-  
    [Get Code]
    
-
    
-
-
-

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - diff --git a/build/linux/work/reference/FAQ.html b/build/linux/work/reference/FAQ.html deleted file mode 100644 index bb7ee2c73..000000000 --- a/build/linux/work/reference/FAQ.html +++ /dev/null @@ -1,137 +0,0 @@ - - - - Arduino Reference - FAQ - - - - - - - -
    - - - - - - - - -
    - -
    -

    Frequently Asked Questions

    -
    What is an Arduino? -

    Glad you asked, we have a great introduction page on Arduino, click here to read it. -

    What do you mean by open-source hardware? -

    Open-source hardware shares much of the principles and approach of free and open-source software. In particular, we believe that people should be able to study our hardware to understand how it works, make changes to it, and share those changes. To facilitate this, we release all of the original design files (Eagle CAD) for the Arduino hardware. These files are licensed under a Creative Commons Attribution Share-Alike license, which allows for both personal and commercial derivative works, as long as they credit Arduino and release their designs under the same license. -

    The Arduino software is also open-source. The source code for the Java environment is released under the GPL and the C/C++ microcontroller libraries are under the LGPL. -

    -

    How can I get an Arduino board? -

    You can buy an Arduino board from the official store online or from one of the distributors listed on the buy page. If you'd prefer to build your own, see the Arduino Single-Sided Serial board, which can be easily etched and assembled. -

    Who makes Arduino boards? -

    Most of the official Arduino boards are manufactured by SmartProjects in Italy. The Arduino Pro, Pro Mini, and LilyPad are manufactured by SparkFun Electronics (a US company). The Arduino Nano is manufactured by Gravitech (also a US company). -

    Which are the official Arduino boards? -

    The official Arduino boards are the ones listed on the hardware page: the Uno, Mega2560, Nano, Bluetooth (BT), LilyPad, Mini, Pro, Pro Mini, and a few older models, along with the Ethernet, XBee, motor, and prototyping shields. These are boards whose manufacturers work with the Arduino team to ensure a good user experience, compatibility with the Arduino software, and a quality product. In return for their status as official boards, the manufacturers pay a licensing fee to the Arduino team to support the further development of the project. -

    In general, we try to restrict use of the name "Arduino" to the official boards. If you find a product under a different name but described as "Arduino compatible", it’s probably not an official board and doesn’t fund continued work on the project. -

    -

    I want to design my own board; what should I do? -

    The reference designs for the Arduino boards are available from the hardware page. They're licensed under a Creative Commons Attribution Share-Alike license, so you are free to use and adapt them for your own needs without asking permission or paying a fee. If you're looking to make something of interest to the community, we'd encourage you to discuss your ideas on the hardware development forum so that potential users can offer suggestions. -

    -

    What should I call my boards? -

    If you're making your own board, come up with your own name! This will allow people identify you with your products and help you to build a brand. Be creative: try to suggest what people might use the board for, or emphasize the form factor, or just pick a random word that sounds cool. "Arduino" is a trademark of Arduino team and should not be used for unofficial variants. If you're interested in having your design included in the official Arduino product line, please see the So you want to make an Arduino document and contact the Arduino team. -

    While unofficial products should not have "Arduino" in their name, it's okay to describe your product in relation to the Arduino project and platform. Here are a few guidelines that explain which uses we consider reasonable. -Not okay: -

    • Arduino Xxxxxx -
    • Xxxxxx Arduino -
    • Arduino Compatible Xxxxxx - use "Xxxxxx (Arduino-Compatible)" instead -

    Okay: -

    • Xxxxxx for Arduino - products that work with official Arduino boards (e.g. shields or kits) -
    • Xxxxxx (Arduino-Compatible) - variations and clones which are software and hardware compatible -

    Note that while we don't attempt to restrict uses of the "duino" suffix, its use causes the Italians on the team to cringe (apparently it sounds terrible); you might want to avoid it. (It's also trademarked by a Hungarian company.) -

    -

    Can I build a commercial product based on Arduino? -

    Yes, with the following conditions: -
    • Physically embedding an Arduino board inside a commercial product does not require you to disclose or open-source any information about its design. -
    • Deriving the design of a commercial product from the Eagle files for an Arduino board requires you to release the modified files under the same Creative Commons Attribution Share-Alike license. You may manufacture and sell the resulting product. -
    • Using the Arduino core and libraries for the firmware of a commercial product does not require you to release the source code for the firmware. The LGPL does, however, require you to make available object files that allow for the relinking of the firmware against updated versions of the Arduino core and libraries. Any modifications to the core and libraries must be released under the LGPL. -
    • The source code for the Arduino environment is covered by the GPL, which requires any modifications to be open-sourced under the same license. It does not prevent the sale of derivative software or its inclusion in commercial products. -

    In all cases, the exact requirements are determined by the applicable license. Additionally, see the previous question for information about the use of the name “Arduino”. -

    -

    -

    How can I run the Arduino IDE under Linux? -

    See instructions for Ubuntu Linux, for Debian Linux, for Gentoo Linux, for Linux, or for Linux on PPC. This this forum thread has more information. Or, you can use Arduino from the command line, and not have to install Java. -

    Can I program the Arduino board in C? -

    In fact, you already are; the Arduino language is merely a set of C/C++ functions that can be called from your code. Your sketch undergoes minor changes (e.g. automatic generation of function prototypes) and then is passed directly to a C/C++ compiler (avr-g++). All standard C and C++ constructs supported by avr-g++ should work in Arduino. For more details, see the page on the Arduino build process. -

    Can I use a different IDE to program the Arduino board? -

    It is possible to compile programs for the Arduino using other build tools (e.g. Makefiles and/or AVR Studio). You'll need to configure these to link against the appropriate files in the Arduino core libraries. See the description of the Arduino build process. -

    Can I use an Arduino board without the Arduino software? -

    Sure. It's just an AVR development board, you can use straight AVR C or C++ (with avr-gcc and avrdude or AVR Studio) to program it. -

    Can I use the Arduino software with other AVR boards? -

    Yes, although it may require some modifications to the Arduino core libraries. See the porting page in the Arduino Google Code project for details. -

    Where is the troubleshooting section? -
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    - - diff --git a/build/linux/work/reference/FileAvailable.html b/build/linux/work/reference/FileAvailable.html deleted file mode 100644 index a6b45ef8c..000000000 --- a/build/linux/work/reference/FileAvailable.html +++ /dev/null @@ -1,110 +0,0 @@ - - - - Arduino Reference - FileAvailable - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    SD : File class -

    -

    available()

    -

    Check if there are any bytes available for reading from the file. -

    -

    available() inherits from the Stream utility class. -

    -

    Syntax

    -

    file.available() -

    -

    Parameters

    -

    file: an instance of the File class (returned by SD.open()) -

    -

    Returns

    -

    the number of bytes available (int) -

    -

    See Also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

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    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - - - - - - - -
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    Reference   Language | Libraries | Comparison | Changes -

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    SD : File class -

    -

    close()

    -

    Close the file, and ensure that any data written to it is physically saved to the SD card. Because the SD library support only one open file at a time, you must close a file before opening another one. -

    -

    Syntax

    -

    file.close() -

    -

    Parameters

    -

    file: an instance of the File class (returned by SD.open()) -

    -

    Returns

    -

    none -

    -

    See Also

    -

    Reference Home -

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    Corrections, suggestions, and new documentation should be posted to the Forum. -

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    - - - - - - - - -
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    Reference   Language | Libraries | Comparison | Changes -

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    SD : File class -

    -

    flush()

    -

    Ensures that any bytes written to the file are physically saved to the SD card. This is done automatically when the file is closed. -

    -

    flush() inherits from the Stream utility class. -

    -

    Syntax

    -

    file.flush() -

    -

    Parameters

    -

    file: an instance of the File class (returned by SD.open()) -

    -

    Returns

    -

    none -

    -

    See Also

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    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

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    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    Reference   Language | Libraries | Comparison | Changes -

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    SD : File class -

    -

    isDirectory()

    -

    Directories (or folders) are special kinds of files, this function reports if the current file is a directory or not. -

    -

    Syntax

    -

    file.isDirectory() -

    -

    Parameters

    -

    file: an instance of the File class (returned by file.open() -

    -

    Returns

    -

    boolean -

    -

    Example

    -

    -

    -
    #include <SD.h>
    -
    -File root;
    -
    -void setup()
    -{
    -  Serial.begin(9600);
    -  pinMode(10, OUTPUT);
    -
    -  SD.begin(10);
    -
    -  root = SD.open("/");
    -
    -  printDirectory(root, 0);
    -
    -  Serial.println("done!");
    -}
    -
    -void loop()
    -{
    -  // nothing happens after setup finishes.
    -}
    -
    -void printDirectory(File dir, int numTabs) {
    -   while(true) {
    -
    -     File entry =  dir.openNextFile();
    -     if (! entry) {
    -       // no more files
    -       //Serial.println("**nomorefiles**");
    -       break;
    -     }
    -     for (uint8_t i=0; i<numTabs; i++) {
    -       Serial.print('\t');
    -     }
    -     Serial.print(entry.name());
    -     if (entry.isDirectory()) {
    -       Serial.println("/");
    -       printDirectory(entry, numTabs+1);
    -     } else {
    -       // files have sizes, directories do not
    -       Serial.print("\t\t");
    -       Serial.println(entry.size(), DEC);
    -     }
    -   }
    -}
    -
    [Get Code]
    -
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    See Also

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    Reference Home -

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    - - - - - - - - -
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    Reference   Language | Libraries | Comparison | Changes -

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    SD : File class -

    -

    openNextFile()

    -

    Reports the next file or folder in a directory. -

    -

    Syntax

    -

    file.openNextFile() -

    -

    Parameters

    -

    file: an instance of the File class that is a directory -

    -

    Returns

    -

    char : the next file or folder in the path -

    -

    Example

    -

    -

    -
    #include <SD.h>
    -
    -File root;
    -
    -void setup()
    -{
    -  Serial.begin(9600);
    -  pinMode(10, OUTPUT);
    -
    -  SD.begin(10);
    -
    -  root = SD.open("/");
    -
    -  printDirectory(root, 0);
    -
    -  Serial.println("done!");
    -}
    -
    -void loop()
    -{
    -  // nothing happens after setup finishes.
    -}
    -
    -void printDirectory(File dir, int numTabs) {
    -   while(true) {
    -
    -     File entry =  dir.openNextFile();
    -     if (! entry) {
    -       // no more files
    -       Serial.println("**nomorefiles**");
    -     }
    -     for (uint8_t i=0; i<numTabs; i++) {
    -       Serial.print('\t');
    -     }
    -     Serial.print(entry.name());
    -     if (entry.isDirectory()) {
    -       Serial.println("/");
    -       printDirectory(entry, numTabs+1);
    -     } else {
    -       // files have sizes, directories do not
    -       Serial.print("\t\t");
    -       Serial.println(entry.size(), DEC);
    -     }
    -   }
    -}
    -
    [Get Code]
    -
    - -

    -

    See Also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/FilePeek.html b/build/linux/work/reference/FilePeek.html deleted file mode 100644 index 0aad64ed3..000000000 --- a/build/linux/work/reference/FilePeek.html +++ /dev/null @@ -1,109 +0,0 @@ - - - - Arduino Reference - FilePeek - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    SD : File class -

    -

    peek()

    -

    Read a byte from the file without advancing to the next one. That is, successive calls to peek() will return the same value, as will the next call to read(). -

    -

    peek() inherits from the Stream utility class. -

    -

    Syntax

    -

    file.peek() -

    -

    Parameters

    -

    file: an instance of the File class (returned by SD.open()) -

    -

    Returns

    -

    The next byte (or character), or -1 if none is available. -

    -

    See Also

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/FilePosition.html b/build/linux/work/reference/FilePosition.html deleted file mode 100644 index e6d525f62..000000000 --- a/build/linux/work/reference/FilePosition.html +++ /dev/null @@ -1,106 +0,0 @@ - - - - Arduino Reference - FilePosition - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    SD : File class -

    -

    position()

    -

    Get the current position within the file (i.e. the location to which the next byte will be read from or written to). -

    -

    Syntax

    -

    file.position() -

    -

    Parameters

    -

    file: an instance of the File class (returned by SD.open()) -

    -

    Returns

    -

    the position within the file (unsigned long) -

    -

    See Also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/FilePrint.html b/build/linux/work/reference/FilePrint.html deleted file mode 100644 index 87e57f3db..000000000 --- a/build/linux/work/reference/FilePrint.html +++ /dev/null @@ -1,112 +0,0 @@ - - - - Arduino Reference - FilePrint - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    SD : File class -

    -

    print()

    -

    Description

    -

    Print data to the file, which must have been opened for writing. Prints numbers as a sequence of digits, each an ASCII character (e.g. the number 123 is sent as the three characters '1', '2', '3'). -

    -

    Syntax

    -

    file.print(data)
    file.print(data, BASE) -

    -

    Parameters

    -

    file: an instance of the File class (returned by SD.open()) -

    -

    data: the data to print (char, byte, int, long, or string) -

    -

    BASE (optional): the base in which to print numbers: BIN for binary (base 2), DEC for decimal (base 10), OCT for octal (base 8), HEX for hexadecimal (base 16). -

    -

    Returns

    -

    byte
    print() will return the number of bytes written, though reading that number is optional -

    -

    See Also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/FilePrintln.html b/build/linux/work/reference/FilePrintln.html deleted file mode 100644 index 2fc370249..000000000 --- a/build/linux/work/reference/FilePrintln.html +++ /dev/null @@ -1,112 +0,0 @@ - - - - Arduino Reference - FilePrintln - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    SD : File class -

    -

    println()

    -

    Description

    -

    Print data, followed by a carriage return and newline, to the File, which must have been opened for writing. Prints numbers as a sequence of digits, each an ASCII character (e.g. the number 123 is sent as the three characters '1', '2', '3'). -

    -

    Syntax

    -

    file.println()
    file.println(data)
    file.print(data, BASE) -

    -

    Parameters

    -

    file: an instance of the File class (returned by SD.open()) -

    -

    data (optional): the data to print (char, byte, int, long, or string) -

    -

    BASE (optional): the base in which to print numbers: BIN for binary (base 2), DEC for decimal (base 10), OCT for octal (base 8), HEX for hexadecimal (base 16). -

    -

    Returns

    -

    byte
    println() will return the number of bytes written, though reading that number is optional -

    -

    See Also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/FileRead.html b/build/linux/work/reference/FileRead.html deleted file mode 100644 index f81031a9d..000000000 --- a/build/linux/work/reference/FileRead.html +++ /dev/null @@ -1,111 +0,0 @@ - - - - Arduino Reference - FileRead - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    SD : File class -

    -

    read()

    -

    Read a byte from the file. -

    -

    read() inherits from the Stream utility class. -

    -

    Syntax

    -

    file.read() -

    -

    Parameters

    -

    file: an instance of the File class (returned by SD.open()) -

    -

    Returns

    -

    The next byte (or character), or -1 if none is available. -

    -

    See Also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/FileRewindDirectory.html b/build/linux/work/reference/FileRewindDirectory.html deleted file mode 100644 index 9f59800da..000000000 --- a/build/linux/work/reference/FileRewindDirectory.html +++ /dev/null @@ -1,215 +0,0 @@ - - - - Arduino Reference - FileRewindDirectory - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    SD : File class -

    -

    rewindDirectory()

    -

    rewindDirectory() will bring you back to the first file in the directory, used in conjunction with openNextFile(). -

    -

    Syntax

    -

    file.rewindDirectory() -

    -

    Parameters

    -

    file: an instance of the File class. -

    -

    Returns

    -

    None -

    -

    -

    -
    #include <SD.h>
    -
    -File root;
    -
    -void setup()
    -{
    -  Serial.begin(9600);
    -  pinMode(10, OUTPUT);
    -
    -  SD.begin(10);
    -
    -  root = SD.open("/");
    -
    -  printDirectory(root, 0);
    -
    -  Serial.println("done!");
    -}
    -
    -void loop()
    -{
    -  // nothing happens after setup finishes.
    -}
    -
    -void printDirectory(File dir, int numTabs) {
    -   while(true) {
    -
    -     File entry =  dir.openNextFile();
    -     if (! entry) {
    -       // no more files
    -       // return to the first file in the directory
    -       dir.rewindDirectory();
    -       break;
    -     }
    -     for (uint8_t i=0; i<numTabs; i++) {
    -       Serial.print('\t');
    -     }
    -     Serial.print(entry.name());
    -     if (entry.isDirectory()) {
    -       Serial.println("/");
    -       printDirectory(entry, numTabs+1);
    -     } else {
    -       // files have sizes, directories do not
    -       Serial.print("\t\t");
    -       Serial.println(entry.size(), DEC);
    -     }
    -   }
    -}
    - 
    -
    [Get Code]
    -
    - -

    -

    See Also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/FileSeek.html b/build/linux/work/reference/FileSeek.html deleted file mode 100644 index a2e47b975..000000000 --- a/build/linux/work/reference/FileSeek.html +++ /dev/null @@ -1,108 +0,0 @@ - - - - Arduino Reference - FileSeek - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    SD : File class -

    -

    seek()

    -

    Seek to a new position in the file, which must be between 0 and the size of the file (inclusive). -

    -

    Syntax

    -

    file.seek(pos) -

    -

    Parameters

    -

    file: an instance of the File class (returned by SD.open()) -

    -

    pos: the position to which to seek (unsigned long) -

    -

    Returns

    -

    true for success, false for failure (boolean) -

    -

    See Also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/FileSize.html b/build/linux/work/reference/FileSize.html deleted file mode 100644 index db2be4e4a..000000000 --- a/build/linux/work/reference/FileSize.html +++ /dev/null @@ -1,104 +0,0 @@ - - - - Arduino Reference - FileSize - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    SD : File class -

    -

    size()

    -

    Get the size of the file. -

    -

    Syntax

    -

    file.size() -

    -

    Parameters

    -

    file: an instance of the File class (returned by SD.open()) -

    -

    Returns

    -

    the size of the file in bytes (unsigned long) -

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/FileWrite.html b/build/linux/work/reference/FileWrite.html deleted file mode 100644 index 683134e63..000000000 --- a/build/linux/work/reference/FileWrite.html +++ /dev/null @@ -1,115 +0,0 @@ - - - - Arduino Reference - FileWrite - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    SD : File class -

    -

    write()

    -

    Description

    -

    Write data to the file. -

    -

    Syntax

    -

    file.write(data)
    file.write(buf, len) -

    -

    Parameters

    -

    file: an instance of the File class (returned by SD.open()) -

    -

    data: the byte, char, or string (char *) to write -

    -

    buf: an array of characters or bytes -

    -

    len: the number of elements in buf -

    -

    Returns

    -

    byte
    write() will return the number of bytes written, though reading that number is optional -

    -

    See Also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/Float.html b/build/linux/work/reference/Float.html deleted file mode 100644 index b7656167d..000000000 --- a/build/linux/work/reference/Float.html +++ /dev/null @@ -1,123 +0,0 @@ - - - - Arduino Reference - Float - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    float

    -

    Description

    -

    Datatype for floating-point numbers, a number that has a decimal point. Floating-point numbers are often used to approximate analog and continuous values because they have greater resolution than integers. Floating-point numbers can be as large as 3.4028235E+38 and as low as -3.4028235E+38. They are stored as 32 bits (4 bytes) of information. -

    -

    Floats have only 6-7 decimal digits of precision. That means the total number of digits, not the number to the right of the decimal point. Unlike other platforms, where you can get more precision by using a double (e.g. up to 15 digits), on the Arduino, double is the same size as float. -

    -

    Floating point numbers are not exact, and may yield strange results when compared. For example 6.0 / 3.0 may not equal 2.0. You should instead check that the absolute value of the difference between the numbers is less than some small number. -

    -

    Floating point math is also much slower than integer math in performing calculations, so should be avoided if, for example, a loop has to run at top speed for a critical timing function. Programmers often go to some lengths to convert floating point calculations to integer math to increase speed. -

    -

    Examples

    -
        float myfloat;
-    float sensorCalbrate = 1.117;
-
    -

    Syntax

    -
        float var = val;
-
    -

    • var - your float variable name -
    • val - the value you assign to that variable -

    Example Code

    -
    -   int x;
-   int y;
-   float z;
-
-   x = 1;
-   y = x / 2;            // y now contains 0, ints can't hold fractions
-   z = (float)x / 2.0;   // z now contains .5 (you have to use 2.0, not 2)
-
    -

    See Also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/FloatCast.html b/build/linux/work/reference/FloatCast.html deleted file mode 100644 index 6153585bc..000000000 --- a/build/linux/work/reference/FloatCast.html +++ /dev/null @@ -1,108 +0,0 @@ - - - - Arduino Reference - FloatCast - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    float()

    -

    Description

    -

    Converts a value to the float data type. -

    -

    Syntax

    -

    float(x) -

    -

    Parameters

    -

    x: a value of any type -

    -

    Returns

    -

    float -

    -

    Notes

    -

    See the reference for float for details about the precision and limitations of floating point numbers on Arduino. -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/For.html b/build/linux/work/reference/For.html deleted file mode 100644 index cff5e0c66..000000000 --- a/build/linux/work/reference/For.html +++ /dev/null @@ -1,147 +0,0 @@ - - - - Arduino Reference - For - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    for statements

    -

    Desciption

    -

    The for statement is used to repeat a block of statements enclosed in curly braces. An increment counter is usually used to increment and terminate the loop. The for statement is useful for any repetitive operation, and is often used in combination with arrays to operate on collections of data/pins. -

    -

    There are three parts to the for loop header: -

    -

    for (initialization; condition; increment) { -

    -

    //statement(s); -

    -

    } -

    -

    The initialization happens first and exactly once. Each time through the loop, the condition is tested; if it's true, the statement block, and the increment is executed, then the condition is tested again. When the condition becomes false, the loop ends. -

    -

    Example

    -
    -// Dim an LED using a PWM pin
-int PWMpin = 10; // LED in series with 470 ohm resistor on pin 10
-
-void setup()
-{
-  // no setup needed
-}
-
-void loop()
-{
-   for (int i=0; i <= 255; i++){
-      analogWrite(PWMpin, i);
-      delay(10);
-   } 
-}
-
-
    -

    Coding Tips

    -

    The C for loop is much more flexible than for loops found in some other computer languages, including BASIC. Any or all of the three header elements may be omitted, although the semicolons are required. Also the statements for initialization, condition, and increment can be any valid C statements with unrelated variables, and use any C datatypes including floats. These types of unusual for statements may provide solutions to some rare programming problems. -

    -

    For example, using a multiplication in the increment line will generate a logarithmic progression:
    -

    for(int x = 2; x < 100; x = x * 1.5){
-println(x);
-}
-
    -

    Generates: 2,3,4,6,9,13,19,28,42,63,94 -

    -

    Another example, fade an LED up and down with one for loop: -

    -

    void loop()
-{
-   int x = 1;
-   for (int i = 0; i > -1; i = i + x){
-      analogWrite(PWMpin, i);
-      if (i == 255) x = -1;             // switch direction at peak
-      delay(10);
-   } 
-}
-
    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/Fpconstants.html b/build/linux/work/reference/Fpconstants.html deleted file mode 100644 index 6cc70a13f..000000000 --- a/build/linux/work/reference/Fpconstants.html +++ /dev/null @@ -1,108 +0,0 @@ - - - - Arduino Reference - Fpconstants - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    floating point constants

    -

    Similar to integer constants, floating point constants are used to make code more readable. Floating point constants are swapped at compile time for the value to which the expression evaluates. -

    -

    Examples: -

    -

    n = .005; -

    -

    Floating point constants can also be expressed in a variety of scientific notation. 'E' and 'e' are both accepted as valid exponent indicators. -

    -

    -
-floating-point   evaluates to:      also evaluates to:
-  constant 
-
-   10.0	             10
-  2.34E5          2.34 * 10^5             234000
-  67e-12        67.0 * 10^-12         .000000000067
-
-

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/Goto.html b/build/linux/work/reference/Goto.html deleted file mode 100644 index d42bccb4b..000000000 --- a/build/linux/work/reference/Goto.html +++ /dev/null @@ -1,116 +0,0 @@ - - - - Arduino Reference - Goto - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    goto

    -

    Transfers program flow to a labeled point in the program -

    -

    Syntax

    -

    label: -

    -

    goto label; // sends program flow to the label -

    -

    Tip

    -

    The use of goto is discouraged in C programming, and some authors of C programming books claim that the goto statement is never necessary, but used judiciously, it can simplify certain programs. The reason that many programmers frown upon the use of goto is that with the unrestrained use of goto statements, it is easy to create a program with undefined program flow, which can never be debugged. -

    -

    With that said, there are instances where a goto statement can come in handy, and simplify coding. One of these situations is to break out of deeply nested for loops, or if logic blocks, on a certain condition. -

    -

    Example

    -
    -for(byte r = 0; r < 255; r++){
-    for(byte g = 255; g > -1; g--){
-        for(byte b = 0; b < 255; b++){
-            if (analogRead(0) > 250){ goto bailout;}
-            // more statements ... 
-        }
-    }
-}
-bailout:
-
-
    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/Guide_ArduinoBT.html b/build/linux/work/reference/Guide_ArduinoBT.html deleted file mode 100644 index 86e03358a..000000000 --- a/build/linux/work/reference/Guide_ArduinoBT.html +++ /dev/null @@ -1,106 +0,0 @@ - - - - Arduino Reference - ArduinoBT - - - - - - - -
    - - - - - - - - -
    - -
    -

    ArduinoBT

    -

    The Arduino BT is an Arduino board with built-in bluetooth module, allowing for wireless communication. To get started with the Arduino BT, follow the directions for the Arduino NG on your operating system (Windows, Mac OS X, Linux), with the following modifications: -

    -

    • First, pair the Arduino BT with your computer and create a virtual serial port for it. Look for a bluetooth device called ARDUINOBT and the pass code is 12345. -

    • Select Arduino BT from the Tools | Board menu of the Arduino environment. -

    When uploading to the Arduino BT, you may need to press the reset button on the board shortly before (or shortly after) clicking upload in the Arduino software. -

    -

    Information about the Arduino BT

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    In most respects, the Arduino BT is similar to the Arduino Diecimila. Here are the main differences of BT board (besides the fact that it communicates over bluetooth instead of USB): -

    -

    • The Arduino BT is more fragile and easy to break than a regular Arduino board. -

    • Don't power the board with more than 5.5 volts to the or reverse the polarity (power and ground pins) of your power supply, or you might kill the ATmega168 on the Arduino BT. The Arduino BT can, however, run with a minimum of 1.2 volts, making it easier to power with batteries. -

    • The microcontroller (an ATmega168) on the Arduino BT is a physically smaller version of the chip on the USB Arduino boards. You can't remove it, so if you kill it, you need a new Arduino BT. -

    • There are two extra analog inputs on the Arduino BT (8 total). Two of these, however, are not connected to the pin headers on the board; you'll need to solder something to the pads next to the numbers "6" and "7". -

    • Pin 7 is connected to the reset pin of the bluetooth module; don't use it for anything (except resetting the module). -

    For more details, see the Arduino BT hardware page. -

    -

    Using the Arduino BT

    -

    The on-board serial communication between the bluetooth module and the Arduino sketch (running on the ATmega168) needs to be at 115200 baud (i.e. call Serial.begin(115200) in your setup() function). Communication between the bluetooth module and the computer can be at any baud rate. -

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    Communication between the BT module and the computer can be temperamental. You might want to open the serial monitor a couple of seconds after resetting the board. -

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    The text of the Arduino getting started guide is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the guide are released into the public domain. -

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    Arduino Ethernet Shield

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    The Arduino Ethernet shield allows an Arduino board to connect to the internet using the Ethernet library and to read and write an SD card using the SD library. -

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    Connecting the Shield

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    -

    To use the shield, mount it on top of an Arduino board (e.g. the Uno). To upload sketches to the board, connect it to your computer with a USB cable as you normally would. Once the sketch has been uploaded, you can disconnect the board from your computer and power it with an external power supply. -

    -

    Connect the shield to your computer or a network hub or router using a standard ethernet cable (CAT5 or CAT6 with RJ45 connectors). Connecting to a computer may require the use of a cross-over cable (although many computers, including all recent Macs can do the cross-over internally). -

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    Network Settings

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    The shield must be assigned a MAC address and a fixed IP address using the Ethernet.begin() function. A MAC address is a globally unique identifier for a particular device. Current Ethernet shields come with a sticker indicating the MAC address you should use with them. For older shields without a dedicated MAC address, inventing a random one should work, but don't use the same one for multiple boards. Valid IP addresses depend on the configuration of your network. It is possible to use DHCP to dynamically assign an IP to the shield. Optionally, you can also specify a network gateway and subnet. -

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    SD Card

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    The latest revision of the Ethernet Shield includes a micro-SD card slot, which can be interfaced with using the SD library. -

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    The text of the Arduino getting started guide is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the guide are released into the public domain. -

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    Guide to the LilyPad Arduino

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    To get started with the LilyPad Arduino, follow the directions for the Arduino NG on your operating system (Windows, Mac OS X, Linux. Connecting the LilyPad Arduino is a bit more complicated than a regular Arduino board (see below for instructions and photos). -

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    The LilyPad Arduino is more fragile and easy to break than a regular Arduino board. Don't connect more than 5.5 volts to the + tab or reverse the power and ground pins of your power supply, or you will very likely kill the ATmega on the LilyPad Arduino. You can't remove the ATmega, so if you kill it, you need a new LilyPad. -

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    Note: More information about getting started with the LilyPad Arduino can be found here. -

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    Connecting the LilyPad Arduino

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    To program the LilyPad Arduino, you need to connect it to your computer. The SparkFun FTDI Basic Breakout plugs into the 6-pin male header on the newest version of the LilyPad. Use a USB MiniB cable to connect the FTDI basic breakout to your computer. You can also use an FTDI USB-TTL Serial cable. -

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    To connect earlier versions of the board or for information on other connection options see the LilyPad Arduino tutorial on Leah's website -

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    Sewing the LilyPad Arduino

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    The hole on each tab of the LilyPad is large enough for a sewing needle to pass through. You can make both electrical and physical connections with stitching in conductive thread. Sew through the holes several times to insure good contact. Here's a picture showing a sewn LilyPad: -

    -

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    See the LilyPad Arduino tutorial on Leah's website for more information about building a working wearable. See SparkFun for more stitchable modules that you can use with your LilyPad Arduino. -

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    The text of the Arduino getting started guide is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the guide are released into the public domain. -

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    Guide to the Arduino Mini

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    To get started with the Arduino Mini, follow the directions for the regular Arduino on your operating system (Windows, Mac OS X, Linux), with the following modifications: -

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    • Connecting the Arduino Mini is a bit more complicated than a regular Arduino board (see below for instructions and photos). -

    • You need to select Arduino Mini from the Tools | Board menu of the Arduino environment. -

    • To upload a new sketch to the Arduino Mini, you need to press the reset button on the board immediately before pressing the upload button in the Arduino environment. -

    Information about the Arduino Mini

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    The microcontroller (an ATmega168) on the Arduino Mini is a physically smaller version of the chip on the USB Arduino boards, with the following small difference: -

    -

    • There are two extra analog inputs on the Mini (8 total). Four of these, however, are not connected to the legs that come on the Arduino Mini, requiring you to solder wires to their holes to use them. Two of these unconnected pins are also used by the Wire library (I2C), meaning that its use will require soldering as well. -

    Also, the Arduino Mini is more fragile and easy to break than a regular Arduino board. -

    -

    • Don't connect more than 9 volts to the +9V pin or reverse the power and ground pins of your power supply, or you might kill the ATmega168 on the Arduino Mini. -

    • You can't remove the ATmega168, so if you kill it, you need a new Mini. -

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    Connecting the Arduino Mini

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    Here's a diagram of the pin layout of the Arduino Mini: -

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    Mini 03 pinout (compatible with earlier revisions) -

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    		 -

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    Mini 04 pinout (the ground on the left has moved down one pin) -

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    To use the Arduino Mini, you need to connect: -

    -

    • Power. This can be a regulated +5V power source (e.g. from the +5V pin of the Mini USB Adapter or an Arduino NG) connected to the +5V pin of the Arduino Mini. Or, a +9V power source (e.g. a 9 volt battery) connected to the +9V pin of the Arduino Mini. -

    • Ground. One of the ground pins on the Arduino Mini must be connected to ground of the power source. -

    • TX/RX. These pins are used both for uploading new sketches to the board and communicating with a computer or other device. -

    • Reset. Whenever this pin is connected to ground, the Arduino Mini resets. You can wire it to a pushbutton, or connect it to +5V to prevent the Arduino Mini from resetting (except when it loses power). If you leave the reset pin unconnected, the Arduino Mini will reset randomly. -

    • An LED. While not technically necessary, connecting an LED to the Arduino Mini makes it easier to check if it's working. Pin 13 has a 1 KB resistor on it, so you can connect an LED to it directly between it and ground. When using another pin, you will need an external resistor. -

    You have a few options for connecting the board: the Mini USB Adapter, a regular Arduino board, or your own power supply and USB/Serial adapter. -

    -

    Connecting the Arduino Mini and Mini USB Adapter

    -

    Here is a photo showing the Arduino Mini connected to the Mini USB adapter. Notice that the reset pin is connected directly to +5V (the orange wire), without a pushbutton. Thus, to reset the Arduino Mini, you will need to unplug and reconnect the USB cable to the Mini USB Adapter, or manually move the orange wire connected to the reset pin from +5V to ground and back. -

    -

    -

    Connecting the Arduino Mini and a regular Arduino

    -

    Here's a photo of the Arduino Mini connected to an Arduino NG. The NG has its ATmega8 removed and is being used for its USB connection, power source, and reset button. Thus, you can reset the Arduino Mini just by pressing the button on the NG. -

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    The text of the Arduino getting started guide is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the guide are released into the public domain. -

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    Guide to the Arduino Nano

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    Connecting the Arduino Nano 2.2 to a computer with a Mini-B USB cable. Note the blue power LED underneath the board. -

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    To connect the Arduino Nano to your computer, you'll need a Mini-B USB cable. This also provides power to the board, as indicated by the blue LED (which is on the bottom of the Arduino Nano 2.x and the top of the Arduino Nano 3.0). -

    -

    If you have an Arduino Nano 3.0, you'll need to select Arduino Duemilanove or Nano w/ ATmega32 from the Tools > Board menu. If you have an Arduino Nano 2.x, select Arduino Diecimila, Duemilanove, or Nano w/ ATmega168. Select the correct serial port selected from the Tools > Serial Port menu. Then simply press the upload button in the Arduino environment. The board will automatically reset and the sketch will be uploaded. If you have any problems, see the troubleshooting guide. -

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    For more details on the Arduino Nano, see the hardware page. -

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    The text of the Arduino getting started guide is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the guide are released into the public domain. -

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    Arduino Pro

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    The Arduino Pro is intended for advanced users who require flexibility and low-cost. It comes with the minimum of components (no on-board USB or pin headers) to keep the cost down. It's a good choice for a board you want to leave embedded in a project. Please note that there are multiple variants of the board which operate at different voltages and clock speeds. You need to know if you have the 3.3V / 8 MHz version or the 5V / 16 MHz version. -

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    Uploading Sketches

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    The board comes without built-in USB circuitry, so an off-board USB-to-TTL serial convertor must be used to upload sketches. For the 3.3V Arduino Pro boards, this can be a FTDI TTL-232R-3V3 USB - TTL Level Serial Converter Cable or the SparkFun FTDI Basic Breakout Board (3.3V). For the 5V Arduino Pro boards, use a TTL-232R USB - TTL Level Serial Converter or the SparkFun FTDI Basic Breakout Board (5V). (You can probably also get away with using a 5V USB-to-serial convertor with a 3.3V board and vice-versa, but it's not recommended.) -

    -

    If using the FTDI cable on Windows, you'll need to make one configuration change to enable the auto-reset. With the board connected, open the Device Manager (in Control Panels > System > Hardware), and find the USB Serial Port under Ports. Right-click and select properties, then go to Port Settings > Advanced and check Set RTS on Close under Miscellaneous Options. -

    -

    For the 3.3V versions of the Arduino Pro, select Arduino Pro or Pro Mini (3.3V, 8 MHz) w/ ATmega328 or Arduino Pro or Pro Mini (3.3V, 8 MHz) w/ ATmega168 from the Tools > Board menu (depending on the microcontroller on your board). For the 5V versions of the Arduino Pro, select Arduino Duemilanove or Nano w/ ATmega328 or Arduino Diecimila, Duemilanove, or Nano w/ ATmega168. -

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    An Arduino Pro connected to (and powered by) an FTDI USB - TTL Level Serial Converter Cable. The green and yellow wires align with the words "green" and "yellow" written underneath the pins. -

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    The Arduino Pro connected to (and powered by) a SparkFun FTDI Basic Breakout Board (prototype version) and USB Mini-B cable. -

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    Power

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    The external USB-to-TTL serial convertor will power the Arduino Pro, regardless of the position of the switch. To use the board standalone, with no connection to a computer, it can be be powered by a battery or an external power supply (wall wart). You can solder the + and - wires of a battery connector to the corresponding holes on the board. For the 3.3V boards, you can connect a LiPo battery (with JST connector) to the JST jack. Alternatively, solder a DC power jack into the three large holes on the board, and connect a DC power supply (center positive). When the switch is in the "Batt" position, the board will draw power from an attached battery; when it is in the "Ext." position, power comes from an external power supply. In either position, the board can be powered by the 6-pin USB header. -

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    A 3.3V Arduino Pro powered by a 2000 mAh LiPo battery from SparkFun. -

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    Connectors

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    Any standard 0.1" spaced header can be soldered to the holes on the Arduino Pro. To use every pin requires two 6-pin header and two 8-pin headers. Bare wire can also be soldered directly to the holes. Note that the header spacing is compatible with Arduino shields. -

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    The text of the Arduino getting started guide is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the guide are released into the public domain. -

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    Arduino Pro Mini

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    The Arduino Pro Mini is intended for advanced users who require flexibility, low-cost, and small size. It comes with the minimum of components (no on-board USB or pin headers) to keep the cost down. It's a good choice for a board you want to leave embedded in a project. Please note that there are two versions of the board: one that operates at 5V (like most Arduino boards), and one that operates at 3.3V. Be sure to provide the correct power and use components whose operating voltage matches that of the board. -

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    Uploading Sketches

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    The board comes without built-in USB circuitry, so an off-board USB-to-TTL serial convertor must be used to upload sketches. This can be a FTDI TTL-232R USB - TTL Level Serial Converter Cable for the 5V Arduino Mini Pro), or a FTDI TTL-232R-3V3 USB - TTL Level Serial Converter Cable or the SparkFun FTDI Basic Breakout Board for a 3.3V Arduino Mini Pro. -One quick way to connect these is by inserting a six-pin 0.1" male pin header into the end of the FTDI cable or breakout board, and pressing it against the six hole programming header on the Mini Pro. If, however, you're going to be uploading lots of sketches to your Pro Mini, you'll probably want to solder some pins (male headers) to the holes. -

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    If using the FTDI cable on Windows, you'll need to make one configuration change to enable the auto-reset. With the board connected, open the Device Manager (in Control Panels > System > Hardware), and find the USB Serial Port under Ports. Right-click and select properties, then go to Port Settings > Advanced and check Set RTS on Close under Miscellaneous Options. -

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    For the 3.3V versions of the Arduino Pro Mini, select Arduino Pro or Pro Mini (3.3V, 8 MHz) w/ ATmega328 or Arduino Pro or Pro Mini (3.3V, 8 MHz) w/ ATmega168 from the Tools > Board menu (depending on the microcontroller on your board). For the 5V versions of the Arduino Pro Mini, select Arduino Duemilanove or Nano w/ ATmega328 or Arduino Diecimila, Duemilanove, or Nano w/ ATmega168. -

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    The Arduino Pro Mini connected to (and powered by) an FTDI TTL-232R-3V3 USB - TTL Level Serial Converter Cable. The green and black wires align with the labels "GRN" and "BLK" written next to the holes. -

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    The Arduino Pro Mini connected to (and powered by) a SparkFun FTDI Basic Breakout Board and USB Mini-B cable. Note that on earlier Pro Mini boards the orientation of the 6-pin header may be reversed; check that the words GRN and BLK align on the Pro Mini and FTDI Basic Breakout. -

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    The board can be powered through USB via the six-pin programming header, or from a regulated 5V or 3.3V (depending on the model) supply applied to the VCC pin or an unregulated supply on the RAW pin. -

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    Connectors

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    Any standard 0.1" spaced header can be soldered to the holes on the Arduino Pro Mini. To use every pin requires two 12-pin headers, plus a six pin header for programming, if desired. Bare wire can also be soldered directly to the holes. -

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    The text of the Arduino getting started guide is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the guide are released into the public domain. -

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    Arduino XBee Shield

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    The Arduino Xbee shield allows your Arduino board to communicate wirelessly using Zigbee. It was developed in collaboration with Libelium. This documentation describes the use of the shield with the XBee 802.15.4 module (sometimes called "Series 1" to distinguish them from the Series 2 modules, although "Series 1" doesn't appear in the official name or product description). For the XBee ZNet 2.5 ("Series 2") modules, see this configuration guide. -

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    A Simple Example

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    You should be able to get two Arduino boards with Xbee shields talking to each other without any configuration, using just the standard Arduino serial commands (described in the reference). -

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    To upload a sketch to an Arduino board with a Xbee shield, you'll need to put both jumpers on the shield to the "USB" setting (i.e. place them on the two pins closest to the edge of the board) or remove them completely (but be sure not to lose them!). Then, you can upload a sketch normally from the Arduino environment. In this case, upload the Communication | Physical Pixel sketch to one of the boards. This sketch instructs the board to turn on the LED attached to pin 13 whenever it receives an 'H' over its serial connection, and turn the LED off when it gets an 'L'. You can test it by connecting to the board with the Arduino serial monitor (be sure it's set at 9600 baud), typing an H, and pressing enter (or clicking send). The LED should turn on. Send an L and the LED should turn off. If nothing happens, you may have an Arduino board that doesn't have a built-in LED on pin 13 (see the board index to check for sure), in this case you'll need to supply your own. -

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    Once you've uploaded the Physical Pixel sketch and made sure that it's working, unplug the first Arduino board from the computer. Switch the jumpers to the Xbee setting (i.e. place each on the center pin and the pin farthest from the edge of the board). Now, you need to upload a sketch to the other board. Make sure its jumpers are in the USB setting. Then upload the following sketch to the board: -

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    -void setup()
-{
-  Serial.begin(9600);
-}
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-void loop()
-{
-  Serial.print('H');
-  delay(1000);
-  Serial.print('L');
-  delay(1000);
-}
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    When it's finished uploading, you can check that it's working with the Arduino serial monitor. You should see H's and L's arriving one a second. Turn off the serial monitor and unplug the board. Switch the jumpers to the Xbee setting. Now connect both boards to the computer. After a few seconds, you should see the LED on the first board turn on and off, once a second. (This is the LED on the Arduino board itself, not the one on the Xbee shield, which conveys information about the state of the Xbee module.) If so, congratulations, your Arduino boards are communicating wirelessly. This may not seem that exciting when both boards are connected to the same computer, but if you connect them to different computers (or power them with an external power supply - being sure to switch the power jumper on the Arduino board), they should still be able to communicate. -

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    A Few Notes

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    You can use any of the standard Arduino serial commands with the Xbee shield. With the shield's jumpers in the Xbee position, the print and println commands will send data over the Xbee shield and the USB connection (i.e. to other Xbee shields and to the computer at the same time). In this configuration, however, the board will only receive data from the Xbee shield not from the USB connection (you'll need to switch the jumpers to allow the board to receive data from the computer). -

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    The Xbee module on the shield is set up to work at 9600 baud by default, so unless you reconfigure it, you'll need to make sure you're passing 9600 to the Serial.begin() command in your sketch. -

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    To allow your computer to communicate directly with the Xbee shield, connect it to an Arduino board whose microcontroller has been removed and place its jumpers in the USB configuration. Then you can send data to and receive data from the Xbee module from any terminal program. This allows you, for example, to see the data that the module is receiving from other Xbee shields (e.g. to collect sensor data wirelessly from a number of locations). -

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    Configuring the Xbee Module

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    You can configure the Xbee module from code running on the Arduino board or from software on the computer. To configure it from the Arduino board, you'll need to have the jumpers in the Xbee position. To configure it from the computer, you'll need to have the jumpers in the USB configuration and have removed the microncontroller from your Arduino board. -

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    To get the module into configuration mode, you need to send it three plus signs: +++ and there needs to be at least one second before and after during which you send no other character to the module. Note that this includes newlines or carriage return characters. Thus, if you're trying to configure the module from the computer, you need to make sure your terminal software is configured to send characters as you type them, without waiting for you to press enter. Otherwise, it will send the plus signs immediately followed by a newline (i.e. you won't get the needed one second delay after the +++). If you successfully enter configuration mode, the module will send back the two characters 'OK', followed by a carriage return. -

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    Send Command - Expected Response -
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    Once in configuration mode, you can send AT commands to the module. Command strings have the form ATxx (where xx is the name of a setting). To read the current value of the setting, send the command string followed by a carriage return. To write a new value to the setting, send the command string, immediately followed by the new setting (with no spaces or newlines in-between), followed by a carriage return. For example, to read the network ID of the module (which determines which other Xbee modules it will communicate with), use the 'ATID command: -

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    Send Command - Expected Response -
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    Unless you tell the module to write the changes to non-volatile (long-term) memory, they will only be in effect until the module loses power. To save the changes permanently (until you explicitly modify them again), use the ATWR command: -

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    References

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    For more information, see: the hardware page for the Xbee shield, the Libelium SquidBee wiki, and the MaxStream Xbee page. -

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    Arduino Development Environment

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    The Arduino development environment contains a text editor for writing code, a message area, a text console, a toolbar with buttons for common functions, and a series of menus. It connects to the Arduino hardware to upload programs and communicate with them. -

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    Software written using Arduino are called sketches. These sketches are written in the text editor. Sketches are saved with the file extension .ino. It has features for cutting/pasting and for searching/replacing text. The message area gives feedback while saving and exporting and also displays errors. The console displays text output by the Arduino environment including complete error messages and other information. The bottom righthand corner of the window displays the current board and serial port. The toolbar buttons allow you to verify and upload programs, create, open, and save sketches, and open the serial monitor: -

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    NB: Versions of the IDE prior to 1.0 saved sketches with the extension .pde. It is possible to open these files with version 1.0, you will be prompted to save the sketch with the .ino extension on save. -

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    Verify
    Checks your code for errors. -

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    Upload
    Compiles your code and uploads it to the Arduino I/O board. See uploading below for details. -

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    Note: If you are using an external programmer, you can hold down the "shift" key on your computer when using this icon. The text will change to "Upload using Programmer" -

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    New
    Creates a new sketch. -

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    Open
    Presents a menu of all the sketches in your sketchbook. Clicking one will open it within the current window. -

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    Note: due to a bug in Java, this menu doesn't scroll; if you need to open a sketch late in the list, use the File | Sketchbook menu instead. -

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    Save
    Saves your sketch. -

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    Serial Monitor
    Opens the serial monitor. -

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    Additional commands are found within the five menus: File, Edit, Sketch, Tools, Help. The menus are context sensitive which means only those items relevant to the work currently being carried out are available. -

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    Edit

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    • Copy for Forum
      Copies the code of your sketch to the clipboard in a form suitable for posting to the forum, complete with syntax coloring. -

    • Copy as HTML
      Copies the code of your sketch to the clipboard as HTML, suitable for embedding in web pages. -

    Sketch

    -
    • Verify/Compile
      Checks your sketch for errors. -

    • Show Sketch Folder
      Opens the current sketch folder. -

    • Add File...
      Adds a source file to the sketch (it will be copied from its current location). The new file appears in a new tab in the sketch window. Files can be removed from the sketch using the tab menu. -

    • Import Library
      Adds a library to your sketch by inserting #include statements at the code of your code. For more details, see libraries below. -

    Tools

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    • Auto Format
      This formats your code nicely: i.e. indents it so that opening and closing curly braces line up, and that the statements instead curly braces are indented more. -

    • Archive Sketch
      Archives a copy of the current sketch in .zip format. The archive is placed in the same directory as the sketch. -

    • Board
      Select the board that you're using. See below for descriptions of the various boards. -

    • Serial Port
      This menu contains all the serial devices (real or virtual) on your machine. It should automatically refresh every time you open the top-level tools menu. -

    • Programmer
      For selecting a harware programmer when programming a board or chip and not using the onboard USB-serial connection. Normally you won't need this, but if you're burning a bootloader to a new microcontroller, you will use this. -

    • Burn Bootloader
      The items in this menu allow you to burn a bootloader onto the microcontroller on an Arduino board. This is not required for normal use of an Arduino board but is useful if you purchase a new ATmega microcontroller (which normally come without a bootloader). Ensure that you've selected the correct board from the Boards menu before burning the bootloader. -

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    Sketchbook

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    The Arduino environment uses the concept of a sketchbook: a standard place to store your programs (or sketches). The sketches in your sketchbook can be opened from the File > Sketchbook menu or from the Open button on the toolbar. The first time you run the Arduino software, it will automatically create a directory for your sketchbook. You can view or change the location of the sketchbook location from with the Preferences dialog. -

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    '''Beginning with version 1.0, files are saved with a .ino file extension. Previous versions use the .pde extension. You may still open .pde named files in version 1.0 and later, the software will automatically rename the extension to .ino. -

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    Tabs, Multiple Files, and Compilation

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    Allows you to manage sketches with more than one file (each of which appears in its own tab). These can be normal Arduino code files (no extension), C files (.c extension), C++ files (.cpp), or header files (.h). -

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    Uploading

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    Before uploading your sketch, you need to select the correct items from the Tools > Board and Tools > Serial Port menus. The boards are described below. On the Mac, the serial port is probably something like /dev/tty.usbmodem241 (for an Uno or Mega2560 or Leonardo) or /dev/tty.usbserial-1B1 (for a Duemilanove or earlier USB board), or /dev/tty.USA19QW1b1P1.1 (for a serial board connected with a Keyspan USB-to-Serial adapter). On Windows, it's probably COM1 or COM2 (for a serial board) or COM4, COM5, COM7, or higher (for a USB board) - to find out, you look for USB serial device in the ports section of the Windows Device Manager. On Linux, it should be /dev/ttyUSB0, /dev/ttyUSB1 or similar. -

    -

    Once you've selected the correct serial port and board, press the upload button in the toolbar or select the Upload item from the File menu. Current Arduino boards will reset automatically and begin the upload. With older boards (pre-Diecimila) that lack auto-reset, you'll need to press the reset button on the board just before starting the upload. On most boards, you'll see the RX and TX LEDs blink as the sketch is uploaded. The Arduino environment will display a message when the upload is complete, or show an error. -

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    When you upload a sketch, you're using the Arduino bootloader, a small program that has been loaded on to the microcontroller on your board. It allows you to upload code without using any additional hardware. The bootloader is active for a few seconds when the board resets; then it starts whichever sketch was most recently uploaded to the microcontroller. The bootloader will blink the on-board (pin 13) LED when it starts (i.e. when the board resets). -

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    -

    Libraries

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    Libraries provide extra functionality for use in sketches, e.g. working with hardware or manipulating data. To use a library in a sketch, select it from the Sketch > Import Library menu. This will insert one or more #include statements at the top of the sketch and compile the library with your sketch. Because libraries are uploaded to the board with your sketch, they increase the amount of space it takes up. If a sketch no longer needs a library, simply delete its #include statements from the top of your code. -

    -

    There is a list of libraries in the reference. Some libraries are included with the Arduino software. Others can be downloaded from a variety of sources. To install these third-party libraries, create a directory called libraries within your sketchbook directory. Then unzip the library there. For example, to install the DateTime library, its files should be in the /libraries/DateTime sub-folder of your sketchbook folder. -

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    To write your own library, see this tutorial. -

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    Third-Party Hardware

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    Support for third-party hardware can be added to the hardware directory of your sketchbook directory. Platforms installed there may include board definitions (which appear in the board menu), core libraries, bootloaders, and programmer definitions. To install, create the hardware directory, then unzip the third-party platform into its own sub-directory. (Don't use "arduino" as the sub-directory name or you'll override the built-in Arduino platform.) To uninstall, simply delete its directory. -

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    For details on creating packages for third-party hardware, see the platforms page on the Arduino Google Code developers site. -

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    Serial Monitor

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    Displays serial data being sent from the Arduino board (USB or serial board). To send data to the board, enter text and click on the "send" button or press enter. Choose the baud rate from the drop-down that matches the rate passed to Serial.begin in your sketch. Note that on Mac or Linux, the Arduino board will reset (rerun your sketch from the beginning) when you connect with the serial monitor. -

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    You can also talk to the board from Processing, Flash, MaxMSP, etc (see the interfacing page for details). -

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    Preferences

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    Some preferences can be set in the preferences dialog (found under the Arduino menu on the Mac, or File on Windows and Linux). The rest can be found in the preferences file, whose location is shown in the preference dialog. -

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    Boards

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    The board selection has two effects: it sets the parameters (e.g. CPU speed and baud rate) used when compiling and uploading sketches; and sets and the file and fuse settings used by the burn bootloader command. Some of the board definitions differ only in the latter, so even if you've been uploading successfully with a particular selection you'll want to check it before burning the bootloader. -

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    • Arduino Uno
      An ATmega328 running at 16 MHz with auto-reset, using the optiboot bootloader (115200 baud, 0.5 KB). -

    • Arduino Duemilanove or Nano w/ ATmega328
      An ATmega328 running at 16 MHz with auto-reset. -

    • Arduino Diecimila, Duemilanove, or Nano w/ ATmega168
      An ATmega168 running at 16 MHz with auto-reset. Compilation and upload is equivalent to Arduino NG or older w/ ATmega168, but the bootloader burned has a faster timeout (and blinks the pin 13 LED only once on reset). -

    • Arduino Mega 2560
      An ATmega2560 running at 16 MHz with auto-reset, using an stk500v2 bootloader. -

    • Arduino Mega (ATmega1280)
      An ATmega1280 running at 16 MHz with auto-reset. -

    • Arduino Mini
      Equivalent to Arduino NG or older w/ ATmega168 (i.e. an ATmega168 running at 16 MHz without auto-reset). -

    • Arduino Ethernet
      Equivalent to Arduino UNO with an Ethernet shield. -

    • Arduino Fio
      An ATmega328 running at 8 MHz with auto-reset. Equivalent to Arduino Pro or Pro Mini (3.3V, 8 MHz) w/ ATmega328. -

    • Arduino BT w/ ATmega328
      ATmega328 running at 16 MHz. The bootloader burned (4 KB) includes codes to initialize the on-board bluetooth module. -

    • Arduino BT w/ ATmega168
      ATmega168 running at 16 MHz. The bootloader burned includes codes to initialize the on-board bluetooth module. -

    • LilyPad Arduino w/ ATmega328
      An ATmega328 running at 8 MHz (3.3V) with auto-reset. Equivalent to Arduino Pro or Pro Mini (3.3V, 8 MHz) w/ ATmega328. -

    • LilyPad Arduino w/ ATmega168
      An ATmega168 running at 8 MHz. Compilation and upload is equivalent to the Arduino Pro or Pro Mini (8 MHz) w/ ATmega168. The bootloader burned, however, has a slower timeout (and blinks the pin 13 LED three times on reset) because the original versions of the LilyPad didn't support auto-reset. They also didn't include an external clock, so the burn bootloader command configures the fuses of ATmega168 for an internal 8 MHz clock.

      If you have a recent version of the LilyPad, (w/ a 6-pin programming header), you'll want to select Arduino Pro or Pro Mini (8 MHz) w/ ATmega168 before burning the bootloader. -

    • Arduino Pro or Pro Mini (5V, 16 MHz) w/ ATmega328
      An ATmega328 running at 16 MHz with auto-reset. Equivalent to Arduino Duemilanove or Nano w/ ATmega328. -

    • Arduino Pro or Pro Mini (5V, 16 MHz) w/ ATmega168
      An ATmega168 running at 16 MHz with auto-reset. Equivalent to Arduino Diecimila, Duemilanove, or Nano w/ ATmega168. -

    • Arduino Diecimila, Duemilanove, or Nano w/ ATmega168
      An ATmega168 running at 16 MHz with auto-reset. Compilation and upload is equivalent to Arduino NG or older w/ ATmega168, but the bootloader burned has a faster timeout (and blinks the pin 13 LED only once on reset). Also used for the 16 MHz (5V) versions of the Arduino Pro and Pro Mini with an ATmega168. -

    • Arduino Pro or Pro Mini (3.3V, 8 MHz) w/ ATmega328
      An ATmega328 running at 8 MHz (3.3V) with auto-reset. Equivalent to LilyPad Arduino w/ ATmega328. -

    • Arduino Pro or Pro Mini (3.3V, 8 MHz) w/ ATmega168
      An ATmega168 running at 8 MHz (3.3V) with auto-reset. -

    • Arduino NG or older w/ ATmega168
      An ATmega168 running at 16 MHz without auto-reset. Compilation and upload is equivalent to Arduino Diecimila or Duemilanove w/ ATmega168, but the bootloader burned has a slower timeout (and blinks the pin 13 LED three times on reset). -

    • Arduino NG or older w/ ATmega8
      An ATmega8 running at 16 MHz without auto-reset. -

    For instructions on installing support for other boards, see third-party hardware above. -The text of the Arduino getting started guide is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the guide are released into the public domain. -

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    What is Arduino?

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    Arduino is a tool for making computers that can sense and control more of the physical world than your desktop computer. It's an open-source physical computing platform based on a simple microcontroller board, and a development environment for writing software for the board. -

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    Arduino can be used to develop interactive objects, taking inputs from a variety of switches or sensors, and controlling a variety of lights, motors, and other physical outputs. Arduino projects can be stand-alone, or they can be communicate with software running on your computer (e.g. Flash, Processing, MaxMSP.) The boards can be assembled by hand or purchased preassembled; the open-source IDE can be downloaded for free. -

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    The Arduino programming language is an implementation of Wiring, a similar physical computing platform, which is based on the Processing multimedia programming environment. -

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    Why Arduino?

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    There are many other microcontrollers and microcontroller platforms available for physical computing. Parallax Basic Stamp, Netmedia's BX-24, Phidgets, MIT's Handyboard, and many others offer similar functionality. All of these tools take the messy details of microcontroller programming and wrap it up in an easy-to-use package. Arduino also simplifies the process of working with microcontrollers, but it offers some advantage for teachers, students, and interested amateurs over other systems: -

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    • Inexpensive - Arduino boards are relatively inexpensive compared to other microcontroller platforms. The least expensive version of the Arduino module can be assembled by hand, and even the pre-assembled Arduino modules cost less than $50 -

    • Cross-platform - The Arduino software runs on Windows, Macintosh OSX, and Linux operating systems. Most microcontroller systems are limited to Windows. -

    • Simple, clear programming environment - The Arduino programming environment is easy-to-use for beginners, yet flexible enough for advanced users to take advantage of as well. For teachers, it's conveniently based on the Processing programming environment, so students learning to program in that environment will be familiar with the look and feel of Arduino -

    • Open source and extensible software- The Arduino software and is published as open source tools, available for extension by experienced programmers. The language can be expanded through C++ libraries, and people wanting to understand the technical details can make the leap from Arduino to the AVR C programming language on which it's based. SImilarly, you can add AVR-C code directly into your Arduino programs if you want to. -

    • Open source and extensible hardware - The Arduino is based on Atmel's ATMEGA8 and ATMEGA168 microcontrollers. The plans for the modules are published under a Creative Commons license, so experienced circuit designers can make their own version of the module, extending it and improving it. Even relatively inexperienced users can build the breadboard version of the module in order to understand how it works and save money. -

    How do I use Arduino?

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    See the getting started guide. -

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    The text of the Arduino getting started guide is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the guide are released into the public domain. -

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    Getting Started w/ Arduino on Mac OS X

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    This document explains how to connect your Arduino board to the computer and upload your first sketch. -

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    (:*toc :) -

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    1 | Get an Arduino board and USB cable

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    In this tutorial, we assume you're using an Arduino Uno, Arduino Duemilanove, Nano, or Diecimila. If you have another board, read the corresponding page in this getting started guide. -

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    You also need a standard USB cable (A plug to B plug): the kind you would connect to a USB printer, for example. (For the Arduino Nano, you'll need an A to Mini-B cable instead.) -

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    2 | Download the Arduino environment

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    Get the latest version from the download page. -

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    The disk image (.dmg) should mount automatically. If it doesn't, double-click it. It should look like the following image. -

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    3 | Install the Software

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    Copy the Arduino application into the Applications folder (or elsewhere on your computer). -If you're using an Arduino Uno or Mga 2560, you don't have any drivers to install. Skip ahead to the next step. -

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    If you're using an older board (Duemilanove, Diecimila, or any board with an FTDI driver chip that looks like this: -

    -

    -

    you will need to install the drivers for the FTDI chip on the board. Double-click the FTDIUSBSerialDriver_10_4_10_5_10_6.mpkg icon and follow the instructions in the installer. You'll need to restart your computer after installing the drivers. (The latest version of the drivers can be found on the FTDI website.) -

    -

    4 | Connect the board

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    The Arduino Uno, Mega, Duemilanove and Arduino Nano automatically draw power from either the USB connection to the computer or an external power supply. If you're using an Arduino Diecimila, you'll need to make sure that the board is configured to draw power from the USB connection. The power source is selected with a jumper, a small piece of plastic that fits onto two of the three pins between the USB and power jacks. Check that it's on the two pins closest to the USB port. -

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    Connect the Arduino board to your computer using the USB cable. The green power LED (labelled PWR) should go on. -

    -

    If you're using the Arduino Uno or Arduino Mega 2560, a dialog box will appear telling you that a new network interface has been detected. Click "Network Preferences...", and when it opens, simply click "Apply". The Uno or Mega 2560 will show up as "Not Configured", but it's working properly. Quit System Preferences. -

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    5 | Launch the Arduino application

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    Double-click the Arduino application. -

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    6 | Open the blink example

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    Open the LED blink example sketch: File > Examples > 1.Basics > Blink. -

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    7 | Select your board

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    You'll need to select the entry in the Tools > Board menu that corresponds to your Arduino. -

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    Selecting an Arduino Uno -

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    For Duemilanove Arduino boards with an ATmega328 (check the text on the chip on the board), select Arduino Duemilanove or Nano w/ ATmega328. Previously, Arduino boards came with an ATmega168; for those, select Arduino Diecimila, Duemilanove, or Nano w/ ATmega168. (Details of the board menu entries are available on the environment page.) -

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    8 | Select your serial port

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    Select the serial device of the Arduino board from the Tools > Serial Port menu. On the Mac, this should be something with /dev/tty.usbmodem (for the Uno or Mega 2560) or /dev/tty.usbserial (for older boards) in it. -

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    selecting an Uno, Mega2560, or newer board -

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    selecting an older FTDI-based board -

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    9 | Upload the program

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    Now, simply click the "Upload" button in the environment. Wait a few seconds - you should see the RX and TX leds on the board flashing. If the upload is successful, the message "Done uploading." will appear in the status bar. (Note: If you have an Arduino Mini, NG, or other board, you'll need to physically present the reset button on the board immediately before pressing the upload button.) -

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    A few seconds after the upload finishes, you should see the pin 13 (L) LED on the board start to blink (in orange). If it does, congratulations! You've gotten Arduino up-and-running. -

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    If you have problems, please see the troubleshooting suggestions. -

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    You might also want to look at: -

    • the examples for using various sensors and actuators -
    • the reference for the Arduino language -

    The text of the Arduino getting started guide is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the guide are released into the public domain. -

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    Arduino Troubleshooting

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    (:*toc:) -

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    Why I can't upload my programs to the Arduino board?

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    There are many pieces involved in getting a program onto your Arduino board, and if any of them aren't right, the upload can fail. They include: the drivers for the board, the board and serial port selections in the Arduino software, access to the serial port, the physical connection to the board, the firmware on the 8U2 (on the Uno and Mega 2560), the bootloader on the main microcontroller on the board, the microcontroller's fuse settings, and more. Here are some specific suggestions for troubleshooting each of the pieces. -

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    Arduino Software -

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    • Make sure you have the right item selected in the Tools > Board menu. If you have an Arduino Uno, you'll need to choose it. Also, newer Arduino Duemilanove boards come with an ATmega328, while older ones have an ATmega168. To check, read the text on the microcontroller (the larger chip) on your Arduino board. For more information on the board menu items, see the guide to the Arduino environment. -

    • Then, check that the proper port is selected in the "Tools > Serial Port" menu (if your port doesn't appear, restart the IDE with the board connected to the computer). If you don't seem to have a serial port for your Arduino board, see the following information about drivers. -

    Drivers -

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    Drivers provide a way for software on your computer (i.e. the Arduino software) to talk to hardware you connect to your computer (the Arduino board). In the case of Arduino, the drivers work by providing a virtual serial port (or virtual COM port). The Arduino Uno and Mega 2560 use standard drivers (USB CDC) provided by the operating system to communicate with the ATmega8U2 on the board. Other Arduino boards use FTDI drivers to communicate with the FTDI chip on the board (or in the USB-serial convertor). -

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    The easiest way to check if the drivers for your board are installed correctly is by opening the Tools > Serial Port menu in the Arduino software with the Arduino board connected to your computer. Additional menu items should appear relative to when you open the menu without the Arduino connected to your computer. Note that it shouldn't matter what name the Arduino board's serial port gets assigned as long as that's the one you pick from the menu. -

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    • On Windows 7 (particularly the 64-bit version), you might need to go into the Device Manager and update the drivers for the Uno or Mega 2560. Just right click on the device (the board should be connected to your computer), and point Windows at the appropriate .inf file again. The .inf is in the drivers/ directory of the Arduino software (not in the FTDI USB Drivers sub-directory of it). -

    • If you get this error when installing the Uno or Mega 2560 drivers on Windows XP: "The system cannot find the file specified", you might try this suggestion (about adding a "RunOnce" key to "HKEY_LOCAL_MACHINE\SOFTWARE\Microsoft\Windows\CurrentVersion"). -

    • On Linux, the Uno and Mega 2560 show up as devices of the form /dev/ttyACM0. These are not supported by the standard version of the RXTX library that the Arduino software uses for serial communication. The Arduino software download for Linux includes a version of the RXTX library patched to also search for these /dev/ttyACM* devices. There's also an Ubuntu package (for 11.04) which includes support for these devices. If, however, you're using the RXTX package from your distribution, you may need to symlink from /dev/ttyACM0 to /dev/ttyUSB0 (for example) so that the serial port appears in the Arduino software. -

    Access to the Serial Port -

    -

    • On Windows, if the software is slow to start or crashes on launch, or the Tools menu is slow to open, you may need to disable Bluetooth serial ports or other networked COM ports in the Device Manager. The Arduino software scans all the serial (COM) ports on your computer when it starts and when you open the Tools menu, and these networked ports can sometimes cause large delays or crashes. -

    • Check that you're not running any programs that scan all serial ports, like USB Cellular Wifi Dongle software (e.g. from Sprint or Verizon), PDA sync applications, Bluetooth-USB drivers (e.g. BlueSoleil), virtual daemon tools, etc. -

    • Make sure you don't have firewall software that blocks access to the serial port (e.g. ZoneAlarm). -

    • You may need to quit Processing, PD, vvvv, etc. if you're using them to read data over the USB or serial connection to the Arduino board. -

    • On Linux, you might try running the Arduino software as root, at least temporarily to see if fixes the upload. -

    Physical Connection -

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    • First make sure your board is on (the green LED is on) and connected to the computer. -

    • The Arduino Uno and Mega 2560 may have trouble connecting to a Mac through a USB hub. If nothing appears in your "Tools > Serial Port" menu, try plugging the board directly to your computer and restarting the Arduino IDE. -

    • Disconnect digital pins 0 and 1 while uploading as they are shared with serial communication with the computer (they can connected and used after the code has been uploaded). -

    • Try uploading with nothing connected to the board (apart from the USB cable, of course). -

    • Make sure the board isn't touching anything metallic or conductive. -

    • Try a different USB cable; sometimes they don't work. -

    Auto-Reset -

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    • If you have a board that doesn't support auto-reset, be sure that you are resetting the board a couple of seconds before uploading. (The Arduino Diecimila, Duemilanove, and Nano support auto-reset as do the LilyPad, Pro, and Pro Mini with 6-pin programming headers). -

    • However, note that some Diecimila were accidently burned with the wrong bootloader and may require you to physically press the reset button before uploading; see this question below. -

    • However, on some computers, you may need to press the reset button on the board after you hit the upload button in the Arduino environment. Try different intervals of time between the two, up to 10 seconds or more. -

    • If you get this error: [VP 1] Device is not responding correctly. try uploading again (i.e. reset the board and press the download button a second time). -

    Bootloader -

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    • Make sure there's a bootloader burned on your Arduino board. To check, reset the board. The built-in L LED (which is connected to pin 13) should blink. If it doesn't, there may not be a bootloader on your board. -


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    If it still doesn't work, you can ask for help in the forum. Please include the following information: -

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    • Your operating system. -

    • What kind of board you have. If it's a Mini, LilyPad or other board that requires extra wiring, include a photo of your circuit, if possible. -

    • Whether or not you were ever able to upload to the board. If so, what were you doing with the board before / when it stopped working, and what software have you recently added or removed from your computer? -

    • The messages displayed when you try to upload with verbose output enabled. To do this, hold down the shift key while clicking on the upload button in the toolbar. -

    Why do I get "Build folder disappeared or could not be written" (Mac OS X)?

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    Did you drag the Arduino.app out of the disk image (and into, say, your Applications folder)? If not, you won't be able to upload the examples. -

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    Why doesn't the Arduino software run after I updated the Java on my Mac?

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    The latest Java update from Apple attempts to use 64-bit version of native libraries, but the Arduino application comes with a 32 bit version of the RXTX library. If you launch Arduino, you'll get an error like: -

    -

    Uncaught exception in main method: java.lang.UnsatisfiedLinkError: /Applications/arduino-0016/Arduino 16.app/Contents/Resources/Java/librxtxSerial.jnilib: no suitable image found. Did find: /Applications/arduino-0016/Arduino 16.app/Contents/Resources/Java/librxtxSerial.jnilib: no matching architecture in universal wrapper -

    -

    To fix this, click on the Arduino application (e.g. Arduino 16.app) in the Finder, and select Get Info from the File menu. In the info panel, click the Open in 32 Bit Mode checkbox. You should then be able to launch Arduino normally. -

    -

    -

    Why do I get a java.lang.StackOverflowError when I try to compile my program?

    -

    The Arduino environment does some preliminary processing on your sketch by manipulating the code using regular expressions. This sometimes gets confused by certain strings of text. If you see an error like: -

    -

    -java.lang.StackOverflowError
-at java.util.Vector.addElement(Unknown Source)
-at java.util.Stack.push(Unknown Source)
-at com.oroinc.text.regex.Perl5Matcher._pushState(Perl5Matcher.java) 
-
    -

    or: -

    -

    -	at com.oroinc.text.regex.Perl5Matcher._match(Perl5Matcher.java)
-	at com.oroinc.text.regex.Perl5Matcher._match(Perl5Matcher.java)
-	at com.oroinc.text.regex.Perl5Matcher._match(Perl5Matcher.java)
-	at com.oroinc.text.regex.Perl5Matcher._match(Perl5Matcher.java)
-	at com.oroinc.text.regex.Perl5Matcher._match(Perl5Matcher.java)
-	at com.oroinc.text.regex.Perl5Matcher._match(Perl5Matcher.java)
-	at com.oroinc.text.regex.Perl5Matcher._match(Perl5Matcher.java) 
-
    -

    this is what's happening. Look for unusual sequences involving "double-quotes", "single-quotes", \backslashes, comments, etc. For example, missing quotes can cause problems and so can the sequence '\"' (use '"' instead). -

    -

    -

    Why doesn't my sketch start when I'm powering the board with an external power supply? (Arduino Diecimila or earlier)

    -

    Because the RX pin is unconnected, the bootloader on the board may be seeing garbage data coming in, meaning that it never times out and starts your sketch. Try tying the RX pin to ground with a 10K resistor (or connecting RX directly to the TX pin). -

    -

    Why does the Arduino software freeze when I try to upload a program? (on Windows)?

    -

    This might be caused by a conflict with the Logitech process 'LVPrcSrv.exe'. Open the Task Manager and see if this program is running, and if so, kill it before attempting the upload. more information -

    -

    -

    What if my board doesn't turn on (the green power LED doesn't light up)?

    -

    If you're using a Diecimila or older USB board (e.g. NG), make sure that the jumper (little plastic piece near the USB plug) is on the correct pins. If you're powering the board with an external power supply (plugged into the power plug), the jumper should be on the two pins closest to the power plug. If you're powering the board through the USB, the jumper should be on the two pins closest to the USB plug. This picture shows the arrangment for powering the board from the USB port. -

    -

    Attach:jumper.jpg Δ -

    -

    (thanks to mrbbp for report and picture) -

    -

    -

    Why does my Diecimila take such a long time (6-8 seconds) to start my sketch?

    -

    Some of the Arduino Diecimila boards were accidently burned with the Arduino NG bootloader. It should work fine, but has a longer delay when the board is reset (because the NG doesn't have an automatic reset, so you have to time the uploads manually). You can recognize the NG bootloader because the LED on pin 13 will blink three times when you reset the board (as compared to once with the Diecimila bootloader). If your Diecimila has the NG bootloader on it, you may need to physically press the reset button on the board before uploading your sketch. You can burn the correct bootloader onto your Diecimila, see the bootloader page for details. -

    -

    -

    What should I do if I get an error when launching arduino.exe on Windows?

    -

    If you get an error when double-clicking the arduino.exe executable on Windows, for example: -

    -

    Arduino has encountered a problem and needs to close. -

    -

    you'll need to launch Arduino using the run.bat file. Please be patient, the Arduino environment may take some time to open. -

    -

    Why won't Arduino run on old versions of Mac OS X?

    -

    If you get an error like this: -

    -

    Link (dyld) error: 
-
-dyld: /Applications/arduino-0004/Arduino 04.app/Contents/MacOS/Arduino Undefined symbols: 
-/Applications/arduino-0004/librxtxSerial.jnilib undefined reference to _printf$LDBL128 expected to be defined in /usr/lib/libSystem.B.dylib 
-
    -

    you probably need to upgrade to Max OS X 10.3.9 or later. Older versions have incompatible versions of some system libraries. -

    -

    Thanks to Gabe462 for the report. -

    -

    What do I do if I get an UnsatisfiedLinkError error (about native library librxtxSerial.jnilib) when launching Arduino?

    -

    If you get an error like this when launching Arduino: -

    -

    Uncaught exception in main method: java.lang.UnsatisfiedLinkError: Native Library /Users/anu/Desktop/arduino-0002/librxtxSerial.jnilib already loaded in another classloader -

    -

    you probably have an old version of the communications library lying around. Search for comm.jar or jcl.jar in /System/Library/Frameworks/JavaVM.framework/ or in directories in your CLASSPATH or PATH environment variables. (reported by Anurag Sehgal) -

    -

    What about the error "Could not find the main class."?

    -

    If you get this error when launching Arduino: -

    -

    Java Virtual Machine Launcher: Could not find the main class. Program will exit. -

    -

    make sure that you correctly extracted the contents of the Arduino .zip file - in particular that the lib directory is directly inside of the Arduino directory and contains the file pde.jar. -

    -

    What can I do about cygwin conflicts on Windows?

    -

    If you already have cygwin installed on your machine, you might get an error like this when you try to compile a sketch in Arduino: -

    -

    6 [main] ? (3512) C:\Dev\arduino-0006\tools\avr\bin\avr-gcc.exe: *** fatal error - C:\Dev\arduino-0006\tools\avr\bin\avr-gcc.exe: *** system shared memory version mismatch detected - 0x75BE0084/0x75BE009C. -

    -

    This problem is probably due to using incompatible versions of the cygwin DLL. -

    -

    Search for cygwin1.dll using the Windows Start->Find/Search facility and delete all but the most recent version. The most recent version *should* reside in x:\cygwin\bin, where 'x' is the drive on which you have installed the cygwin distribution. Rebooting is also suggested if you are unable to find another cygwin DLL. -

    -

    If so, first make sure that you don't have cygwin running when you use Arduino. If that doesn't help, you can try deleting cygwin1.dll from the Arduino directory and replacing it with the cygwin1.dll from your existing cygwin install (probably in c:\cygwin\bin). -

    -

    Thanks to karlcswanson for the suggestion. -

    -

    Why does do the Arduino software and the Tools menu take a long time to open (on Windows)?

    -

    If the Arduino software takes a long time to start up and appears to freeze when you try to open the Tools menu, there by a conflict with another device on your system. The Arduino software, on startup and when you open the Tools menu, tries to get a list of all the COM ports on your computer. It's possible that a COM port created by one of the devices on your computer slows down this process. Take a look in the Device Manager. Try disabling the devices that provide COM ports (e.g. Bluetooth devices). -

    -

    -

    Why doesn't my board show in the Tools | Serial Port menu ?

    -

    If you're using a USB Arduino board, make sure you installed the FTDI drivers (see the Howto for directions). If you're using a USB-to-Serial adapter with a serial board, make sure you installed its drivers. -

    -

    Make sure that the board is plugged in: the serial port menu refreshes whenever you open the Tools menu, so if you just unplugged the board, it won't be in the menu. -

    -

    Check that you're not running any programs that scan all serial ports, like PDA sync applications, Bluetooth-USB drivers (e.g. BlueSoleil), virtual daemon tools, etc. -

    -

    On Windows, the COM port assigned to the board may be too high. From zeveland: -

    -

    "One little note if you aren't able to export and your USB board is trying to use a high COM port number: try changing the FTDI chip's COM port assignment to a lower one. -

    -

    "I had a bunch of virtual COM ports set up for Bluetooth so the board was set to use COM17. The IDE wasn't able to find the board so I deleted the other virtual ports in Control Panel (on XP) and moved the FTDI's assignment down to COM2. Make sure to set Arduino to use the new port and good luck." -

    -

    On the Mac, if you have an old version of the FTDI drivers, you may need to remove them and reinstall the latest version. See this forum thread for directions (thanks to gck). -

    -

    What if I get a gnu.io.PortInUseException when uploading code or using the serial monitor (on the Mac)?

    -
    -Error inside Serial.<init>() 
-gnu.io.PortInUseException: Unknown Application 
-     at gnu.io.CommPortIdentifier.open(CommPortIdentifier.java:354) 
-     at processing.app.Serial.<init>(Serial.java:127) 
-     at processing.app.Serial.<init>(Serial.java:72) 
-
-
    -

    This probably means that the port is actually in use by another application. Please make sure that you're not running other programs that access serial or USB ports, like PDA sync application, bluetooth device managers, certain firewalls, etc. Also, note that some programs (e.g. Max/MSP) keep the serial port open even when not using it - you may to need to close any patches that use the serial port or quit the application entirely. -

    -

    If you get this error with Arduino 0004 or earlier, or with Processing, you'll need to run the macosx_setup.command, and then restart your computer. Arduino 0004 includes a modified version of this script that all users need to run (even those who ran the one that came with Arduino 0003). You may also need to delete the contents of the /var/spool/uucp directory. -

    -

    I'm having trouble with the FTDI USB drivers.

    -

    Try installing the latest drivers from FTDI or contacting their support at support1@ftdichip.com. -

    -

    -

    Why doesn't my sketch start when I power up or reset the Arduino board?

    -

    Most likely because you are sending serial data to the board when it firsts turns on. During the first few seconds, the bootloader (a program pre-burned onto the chip on the board) listens for the computer to send it a new sketch to be uploaded to the board. After a few seconds without communication, the bootloader will time out and start the sketch that's already on the board. If you continue to send data to the bootloader, it will never time out and your sketch will never start. You'll either need to find a way to stop serial data from arriving for the first few seconds when the board powers (e.g. by enabling the chip that sends the data from within your setup() function) or burn your sketch onto the board with an external programmer, replacing the bootloader. -

    -

    Why does my sketch appear to upload successfully but not do anything?

    -

    You have selected the wrong item from the Tools > Microcontroller menu. Make sure the selected microcontroller corresponds to the one on your board (either ATmega8 or ATmega168) - the name will be written on the largest chip on the board. -

    -

    Check for a noisy power supply. It's possible this could cause the chip to lose its sketch. -

    -

    Alternatively, the sketch may be too big for the board. When uploading your sketch, Arduino 0004 checks if it's too big for the ATmega8, but it bases its calculation on a 1 Kb bootloader. You may have a older bootloader that takes up 2 Kb of the 8 Kb of program space (flash) on the ATmega8 instead of the 1 Kb used by the current bootloader. If yours is bigger, only part of the sketch will be uploaded, but the software won't know, and your board will continually reset, pause, reset. -

    -

    If you have access to an AVR-ISP or parallel port programmer, you can burn the latest version of the bootloader to your board with the Tools | Burn Bootloader menu item. Otherwise, you can tell the Arduino environment the amount of space available for sketches by editing the upload.maximum_size variable in your preferences file (see: instructions on finding the file). Change 7168 to 6144, and the environment should correctly warn you when your sketch is too big. -

    -

    -

    How can I reduce the size of my sketch?

    -

    The ATmega168 chip on the Arduino board is cheap, but it has only 16 Kb of program code, which isn't very much (and 2 Kb is used by the bootloader). -

    -

    If you're using floating point, try to rewrite your code with integer math, which should save you about 2 Kb. Delete any #include statements at the top of your sketch for libraries that you're not using. -

    -

    Otherwise, see if you can make your program shorter. -

    -

    We're always working to reduce the size of the Arduino core to leave more room for your sketches. -

    -

    Why don't I get a PWM (an analog output) when I call analogWrite() on pins other than 3, 5, 6, 9, 10, or 11?

    -

    The microcontroller on the Arduino board (the ATmega168) only supports PWM/analogWrite() on certain pins. Calling analogWrite() on any other pins will give high (5 volts) for values greater than 128 and low (0 volts) for values less than 128. (Older Arduino boards with an ATmega8 only support PWM output on pins 9, 10, and 11.) -

    -

    Why do I get errors about undeclared functions or undeclared types?

    -

    The Arduino environment attempts to automatically generate prototypes for your functions, so that you can order them as you like in your sketch. This process, however, isn't perfect, and sometimes leads to obscure error messages. -

    -

    If you declare a custom type in your code and create a function that accepts or returns a value of that type, you'll get an error when you try to compile the sketch. This is because the automatically-generated prototype for that function will appear above the type definition. -

    -

    If you declare a function with a two-word return type (e.g. "unsigned int") the environment will not realize it's a function and will not create a prototype for it. That means you need to provide your own, or place the definition of the function above any calls to it. -

    -

    Why do I get errors about an invalid device signature when trying to upload a sketch?

    -

    If you get an error like: -

    -

    -avrdude: Yikes!  Invalid device signature.
-       Double check connections and try again, or use -F to override
-       this check.
-
-
    -

    it can mean one of two things. Either you have the wrong board selected from the Tools > Board menu or you're not using the right version of avrdude. Arduino uses a slightly modified version of avrdude to upload sketches to the Arduino board. The standard version queries for the board's device signature in a way not understood by the bootloader, resulting in this error. Make sure you're using the version of avrdude that comes with Arduino (source code). -

    -

    Guide Home -The text of the Arduino getting started guide is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the guide are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/Guide_Windows.html b/build/linux/work/reference/Guide_Windows.html deleted file mode 100644 index 2f9f89964..000000000 --- a/build/linux/work/reference/Guide_Windows.html +++ /dev/null @@ -1,161 +0,0 @@ - - - - Arduino Reference - Windows - - - - - - - -
    - - - - - - - - -
    - -
    -

    Getting Started w/ Arduino on Windows

    -

    This document explains how to connect your Arduino board to the computer and upload your first sketch. -

    -

    (:*toc :) -

    -

    1 | Get an Arduino board and USB cable

    -

    In this tutorial, we assume you're using an Arduino Uno, Arduino Duemilanove, Nano, or Diecimila. If you have another board, read the corresponding page in this getting started guide. -

    -

    You also need a standard USB cable (A plug to B plug): the kind you would connect to a USB printer, for example. (For the Arduino Nano, you'll need an A to Mini-B cable instead.) -

    -

    -

    2 | Download the Arduino environment

    -

    Get the latest version from the download page. -

    -

    When the download finishes, unzip the downloaded file. Make sure to preserve the folder structure. Double-click the folder to open it. There should be a few files and sub-folders inside. -

    -

    3 | Connect the board

    -

    The Arduino Uno, Mega, Duemilanove and Arduino Nano automatically draw power from either the USB connection to the computer or an external power supply. If you're using an Arduino Diecimila, you'll need to make sure that the board is configured to draw power from the USB connection. The power source is selected with a jumper, a small piece of plastic that fits onto two of the three pins between the USB and power jacks. Check that it's on the two pins closest to the USB port. -

    -

    Connect the Arduino board to your computer using the USB cable. The green power LED (labelled PWR) should go on. -

    -

    4 | Install the drivers

    -

    Installing drivers for the Arduino Uno with Windows7, Vista, or XP: -

    -

    • Plug in your board and wait for Windows to begin it's driver installation process.  After a few moments, the process will fail, despite its best efforts -
    • Click on the Start Menu, and open up the Control Panel. -
    • While in the Control Panel, navigate to System and Security. Next, click on System. Once the System window is up, open the Device Manager. -
    • Look under Ports (COM & LPT).  You should see an open port named "Arduino UNO (COMxx)" -
    • Right click on the "Arduino UNO (COmxx)" port and choose the "Update Driver Software" option. -
    • Next, choose the "Browse my computer for Driver software" option. -
    • Finally, navigate to and select the Uno's driver file, named "ArduinoUNO.inf", located in the "Drivers" folder of the Arduino Software download (not the "FTDI USB Drivers" sub-directory). -
    • Windows will finish up the driver installation from there. -

    See also: step-by-step screenshots for installing the Uno under Windows XP. -

    -

    Installing drivers for the Arduino Duemilanove, Nano, or Diecimila with Windows7, Vista, or XP: -

    -

    When you connect the board, Windows should initiate the driver installation process (if you haven't used the computer with an Arduino board before). -

    -

    On Windows Vista, the driver should be automatically downloaded and installed. (Really, it works!) -

    -

    On Windows XP, the Add New Hardware wizard will open: -

    • When asked Can Windows connect to Windows Update to search for software? select No, not this time. Click next. -
    • Select Install from a list or specified location (Advanced) and click next. -
    • Make sure that Search for the best driver in these locations is checked; uncheck Search removable media; check Include this location in the search and browse to the drivers/FTDI USB Drivers directory of the Arduino distribution. (The latest version of the drivers can be found on the FTDI website.) Click next. -
    • The wizard will search for the driver and then tell you that a "USB Serial Converter" was found. Click finish. -
    • The new hardware wizard will appear again. Go through the same steps and select the same options and location to search. This time, a "USB Serial Port" will be found. -

    You can check that the drivers have been installed by opening the Windows Device Mananger (in the Hardware tab of System control panel). Look for a "USB Serial Port" in the Ports section; that's the Arduino board. -

    -

    5 | Launch the Arduino application

    -

    Double-click the Arduino application. -

    -

    6 | Open the blink example

    -

    Open the LED blink example sketch: File > Examples > 1.Basics > Blink. -

    -

    -

    7 | Select your board

    -

    You'll need to select the entry in the Tools > Board menu that corresponds to your Arduino. -

    -

    -

    Selecting an Arduino Uno -

    -

    For Duemilanove Arduino boards with an ATmega328 (check the text on the chip on the board), select Arduino Duemilanove or Nano w/ ATmega328. Previously, Arduino boards came with an ATmega168; for those, select Arduino Diecimila, Duemilanove, or Nano w/ ATmega168. (Details of the board menu entries are available on the environment page.) -

    -

    8 | Select your serial port

    -

    Select the serial device of the Arduino board from the Tools | Serial Port menu. This is likely to be COM3 or higher (COM1 and COM2 are usually reserved for hardware serial ports). To find out, you can disconnect your Arduino board and re-open the menu; the entry that disappears should be the Arduino board. Reconnect the board and select that serial port. -

    -

    9 | Upload the program

    -

    Now, simply click the "Upload" button in the environment. Wait a few seconds - you should see the RX and TX leds on the board flashing. If the upload is successful, the message "Done uploading." will appear in the status bar. (Note: If you have an Arduino Mini, NG, or other board, you'll need to physically present the reset button on the board immediately before pressing the upload button.) -

    -

    -

    A few seconds after the upload finishes, you should see the pin 13 (L) LED on the board start to blink (in orange). If it does, congratulations! You've gotten Arduino up-and-running. -

    -

    If you have problems, please see the troubleshooting suggestions. -

    -

    You might also want to look at: -

    • the examples for using various sensors and actuators -
    • the reference for the Arduino language -

    The text of the Arduino getting started guide is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the guide are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/Guide_index.html b/build/linux/work/reference/Guide_index.html deleted file mode 100644 index a9783e532..000000000 --- a/build/linux/work/reference/Guide_index.html +++ /dev/null @@ -1,110 +0,0 @@ - - - - Arduino Reference - Getting Started - - - - - - - -
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    - -
    -

    Getting Started with Arduino

    -

    -

    Introduction: What Arduino is and why you'd want to use it. -

    -

    Installation: Step-by-step instructions for setting up the Arduino software and connecting it to an Arduino Uno, Mega2560, Duemilanove, Mega, or Diecimila. -

    -

    Environment: Description of the Arduino development environment. -

    -

    Troubleshooting: Advice on what to do if things don't work. -

    -

    		 -

    Instructions for other boards: -

    -

    -

    The text of the Arduino getting started guide is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the guide are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/HighByte.html b/build/linux/work/reference/HighByte.html deleted file mode 100644 index d3a25df02..000000000 --- a/build/linux/work/reference/HighByte.html +++ /dev/null @@ -1,106 +0,0 @@ - - - - Arduino Reference - HighByte - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    highByte()

    -

    Description

    -

    Extracts the high-order (leftmost) byte of a word (or the second lowest byte of a larger data type). -

    -

    Syntax

    -

    highByte(x) -

    -

    Parameters

    -

    x: a value of any type -

    -

    Returns

    -

    byte -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - - - - -
    - - diff --git a/build/linux/work/reference/If.html b/build/linux/work/reference/If.html deleted file mode 100644 index 657949d11..000000000 --- a/build/linux/work/reference/If.html +++ /dev/null @@ -1,133 +0,0 @@ - - - - Arduino Reference - If - - - - - - - -
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    - -
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    Reference   Language | Libraries | Comparison | Changes -

    -

    if (conditional) and ==, !=, <, > (comparison operators)

    -

    if, which is used in conjunction with a comparison operator, tests whether a certain condition has been reached, such as an input being above a certain number. The format for an if test is: -

    -

    if (someVariable > 50)
-{
-  // do something here
-}
-
    -

    The program tests to see if someVariable is greater than 50. If it is, the program takes a particular action. Put another way, if the statement in parentheses is true, the statements inside the brackets are run. If not, the program skips over the code. -

    -

    The brackets may be omitted after an if statement. If this is done, the next line (defined by the semicolon) becomes the only conditional statement. -

    -
-if (x > 120) digitalWrite(LEDpin, HIGH); 
-
-if (x > 120)
-digitalWrite(LEDpin, HIGH); 
-
-if (x > 120){ digitalWrite(LEDpin, HIGH); } 
-
-if (x > 120){ 
-  digitalWrite(LEDpin1, HIGH);
-  digitalWrite(LEDpin2, HIGH); 
-}                                 // all are correct
-
-
    -

    The statements being evaluated inside the parentheses require the use of one or more operators: -

    -

    Comparison Operators:

    -
     x == y (x is equal to y)
- x != y (x is not equal to y)
- x <  y (x is less than y)  
- x >  y (x is greater than y) 
- x <= y (x is less than or equal to y) 
- x >= y (x is greater than or equal to y)
-
    -

    Warning:

    -

    Beware of accidentally using the single equal sign (e.g. if (x = 10) ). The single equal sign is the assignment operator, and sets x to 10 (puts the value 10 into the variable x). Instead use the double equal sign (e.g. if (x == 10) ), which is the comparison operator, and tests whether x is equal to 10 or not. The latter statement is only true if x equals 10, but the former statement will always be true. -

    -

    This is because C evaluates the statement if (x=10) as follows: 10 is assigned to x (remember that the single equal sign is the assignment operator), so x now contains 10. Then the 'if' conditional evaluates 10, which always evaluates to TRUE, since any non-zero number evaluates to TRUE. Consequently, if (x = 10) will always evaluate to TRUE, which is not the desired result when using an 'if' statement. Additionally, the variable x will be set to 10, which is also not a desired action. -

    -

    if can also be part of a branching control structure using the if...else] construction. -

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - - - - -
    - - diff --git a/build/linux/work/reference/Include.html b/build/linux/work/reference/Include.html deleted file mode 100644 index e0b793cad..000000000 --- a/build/linux/work/reference/Include.html +++ /dev/null @@ -1,106 +0,0 @@ - - - - Arduino Reference - Include - - - - - - - -
    - - - - - - - - -
    - -
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    Reference   Language | Libraries | Comparison | Changes -

    -

    #include

    -

    #include is used to include outside libraries in your sketch. This gives the programmer access to a large group of standard C libraries (groups of pre-made functions), and also libraries written especially for Arduino. -

    -

    The main reference page for AVR C libraries (AVR is a reference to the Atmel chips on which the Arduino is based) is here. -

    -

    Note that #include, similar to #define, has no semicolon terminator, and the compiler will yield cryptic error messages if you add one. -

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    Example

    -

    This example includes a library that is used to put data into the program space flash instead of ram. This saves the ram space for dynamic memory needs and makes large lookup tables more practical. -

    -

    -#include <avr/pgmspace.h>
-
-prog_uint16_t myConstants[] PROGMEM = {0, 21140, 702  , 9128,  0, 25764, 8456,
-0,0,0,0,0,0,0,0,29810,8968,29762,29762,4500};
-
-

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - - - - -
    - - diff --git a/build/linux/work/reference/Increment.html b/build/linux/work/reference/Increment.html deleted file mode 100644 index 13a1fd975..000000000 --- a/build/linux/work/reference/Increment.html +++ /dev/null @@ -1,116 +0,0 @@ - - - - Arduino Reference - Increment - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    ++ (increment) / -- (decrement)

    -

    Description

    -

    Increment or decrement a variable -

    -

    Syntax

    -
    -x++;  // increment x by one and returns the old value of x
-++x;  // increment x by one and returns the new value of x
-
-x-- ;   // decrement x by one and returns the old value of x 
---x ;   // decrement x by one and returns the new value of x  
-
    -

    Parameters

    -

    x: an integer or long (possibly unsigned) -

    -

    Returns

    -

    The original or newly incremented / decremented value of the variable. -

    -

    Examples

    -
    x = 2;
-y = ++x;      // x now contains 3, y contains 3
-y = x--;      // x contains 2 again, y still contains 3 
-
    -

    See also

    -

    +=
    -= -

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - - - - - - - -
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    Reference   Language | Libraries | Comparison | Changes -

    -

    += , -= , *= , /=

    -

    Description

    -

    Perform a mathematical operation on a variable with another constant or variable. The += (et al) operators are just a convenient shorthand for the expanded syntax, listed below. -

    -

    Syntax

    -
    -x += y;   // equivalent to the expression x = x + y;
-x -= y;   // equivalent to the expression x = x - y; 
-x *= y;   // equivalent to the expression x = x * y; 
-x /= y;   // equivalent to the expression x = x / y; 
-
-
    -

    Parameters

    -

    x: any variable type -

    -

    y: any variable type or constant -

    -

    Examples

    -
    x = 2;
-x += 4;      // x now contains 6
-x -= 3;      // x now contains 3
-x *= 10;     // x now contains 30
-x /= 2;      // x now contains 15
-
-
    -

    Reference Home -

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    Corrections, suggestions, and new documentation should be posted to the Forum. -

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    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    int

    -

    Description

    -

    Integers are your primary datatype for number storage, and store a 2 byte value. This yields a range of -32,768 to 32,767 (minimum value of -2^15 and a maximum value of (2^15) - 1). -

    -

    Int's store negative numbers with a technique called 2's complement math. The highest bit, sometimes refered to as the "sign" bit, flags the number as a negative number. The rest of the bits are inverted and 1 is added. -

    -

    The Arduino takes care of dealing with negative numbers for you, so that arithmetic operations work transparently in the expected manner. There can be an unexpected complication in dealing with the bitshift right operator (>>) however. -

    -

    Example

    -
        int ledPin = 13;
-
    -

    Syntax

    -
        int var = val;
-
    -

    • var - your int variable name -
    • val - the value you assign to that variable -

    Coding Tip

    -

    When variables are made to exceed their maximum capacity they "roll over" back to their minimum capacitiy, note that this happens in both directions. -

    -

       int x
-   x = -32,768;
-   x = x - 1;       // x now contains 32,767 - rolls over in neg. direction
-
-   x = 32,767;
-   x = x + 1;       // x now contains -32,768 - rolls over
-
-
    -

    See Also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

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    - - - - - -
    - - diff --git a/build/linux/work/reference/IntCast.html b/build/linux/work/reference/IntCast.html deleted file mode 100644 index fd63f05d0..000000000 --- a/build/linux/work/reference/IntCast.html +++ /dev/null @@ -1,105 +0,0 @@ - - - - Arduino Reference - IntCast - - - - - - - -
    - - - - - - - - -
    - -
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    Reference   Language | Libraries | Comparison | Changes -

    -

    int()

    -

    Description

    -

    Converts a value to the int data type. -

    -

    Syntax

    -

    int(x) -

    -

    Parameters

    -

    x: a value of any type -

    -

    Returns

    -

    int -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - - - - -
    - - diff --git a/build/linux/work/reference/IntegerConstants.html b/build/linux/work/reference/IntegerConstants.html deleted file mode 100644 index 84f369a54..000000000 --- a/build/linux/work/reference/IntegerConstants.html +++ /dev/null @@ -1,156 +0,0 @@ - - - - Arduino Reference - IntegerConstants - - - - - - - -
    - - - - - - - - -
    - -
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    Reference   Language | Libraries | Comparison | Changes -

    -

    Integer Constants

    -

    Integer constants are numbers used directly in a sketch, like 123. By default, these numbers are treated as int's but you can change this with the U and L modifiers (see below). -

    -

    Normally, integer constants are treated as base 10 (decimal) integers, but special notation (formatters) may be used to enter numbers in other bases. -

    -

    -Base               Example    Formatter        Comment
-
-10 (decimal)           123    none
-
-2 (binary)        B1111011    leading 'B'      only works with 8 bit values (0 to 255)
-                                               characters 0-1 valid
-
-8 (octal)             0173    leading "0"      characters 0-7 valid       
-
-16 (hexadecimal)      0x7B    leading "0x"     characters 0-9, A-F, a-f valid    
-
-
    -

    Decimal is base 10. This is the common-sense math with which you are acquainted. Constants without other prefixes are assumed to be in decimal format. -

    -

    Example:
    -101     // same as 101 decimal   ((1 * 10^2) + (0 * 10^1) + 1)
-
    -


    -Binary is base two. Only characters 0 and 1 are valid. -

    -

    Example:
    -B101    // same as 5 decimal   ((1 * 2^2) + (0 * 2^1) + 1)
-
    -

    The binary formatter only works on bytes (8 bits) between 0 (B0) and 255 (B11111111). If it is convenient to input an int (16 bits) in binary form you can do it a two-step procedure such as: -

    -

    -myInt = (B11001100 * 256) + B10101010;    // B11001100 is the high byte
-
-
    -

    Octal is base eight. Only characters 0 through 7 are valid. Octal values are indicated by the prefix "0" -

    -

    Example: -

    -0101    // same as 65 decimal   ((1 * 8^2) + (0 * 8^1) + 1) 
-
    Warning -
    It is possible to generate a hard-to-find bug by (unintentionally) including a leading zero before a constant and having the compiler unintentionally interpret your constant as octal. -


    -Hexadecimal (or hex) is base sixteen. Valid characters are 0 through 9 and letters A through F; A has the value 10, B is 11, up to F, which is 15. Hex values are indicated by the prefix "0x". Note that A-F may be syted in upper or lower case (a-f). -

    -

    Example: -

    -0x101   // same as 257 decimal   ((1 * 16^2) + (0 * 16^1) + 1)
-
-
    -

    U & L formatters

    -

    By default, an integer constant is treated as an int with the attendant limitations in values. To specify an integer constant with another data type, follow it with: -

    -

    • a 'u' or 'U' to force the constant into an unsigned data format. Example: 33u -
    • a 'l' or 'L' to force the constant into a long data format. Example: 100000L -
    • a 'ul' or 'UL' to force the constant into an unsigned long constant. Example: 32767ul -


    -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - - - - -
    - - diff --git a/build/linux/work/reference/Interrupts.html b/build/linux/work/reference/Interrupts.html deleted file mode 100644 index 6267b2c43..000000000 --- a/build/linux/work/reference/Interrupts.html +++ /dev/null @@ -1,117 +0,0 @@ - - - - Arduino Reference - Interrupts - - - - - - - -
    - - - - - - - - -
    - -
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    Reference   Language | Libraries | Comparison | Changes -

    -

    interrupts()

    -

    Description

    -

    Re-enables interrupts (after they've been disabled by noInterrupts()). Interrupts allow certain important tasks to happen in the background and are enabled by default. Some functions will not work while interrupts are disabled, and incoming communication may be ignored. Interrupts can slightly disrupt the timing of code, however, and may be disabled for particularly critical sections of code. -

    -

    Parameters

    -

    None -

    -

    Returns

    -

    None -

    -

    Example

    -
    -void setup() {}
-
-void loop()
-{
-  noInterrupts();
-  // critical, time-sensitive code here
-  interrupts();
-  // other code here
-}
-
-
    -

    See Also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - diff --git a/build/linux/work/reference/Libraries.html b/build/linux/work/reference/Libraries.html deleted file mode 100644 index ad463ebd8..000000000 --- a/build/linux/work/reference/Libraries.html +++ /dev/null @@ -1,147 +0,0 @@ - - - - Arduino Reference - Libraries - - - - - - - -
    - - - - - - - - -
    - -
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    Reference   Language | Libraries | Comparison | Changes -

    -

    Libraries

    -

    Libraries provide extra functionality for use in sketches, e.g. working with hardware or manipulating data. To use a library in a sketch, select it from Sketch > Import Library. -

    -

    Standard Libraries

    -
    • EEPROM - reading and writing to "permanent" storage -
    • Ethernet - for connecting to the internet using the Arduino Ethernet Shield -
    • Firmata - for communicating with applications on the computer using a standard serial protocol. -
    • LiquidCrystal - for controlling liquid crystal displays (LCDs) -
    • SD - for reading and writing SD cards -
    • Servo - for controlling servo motors -
    • SPI - for communicating with devices using the Serial Peripheral Interface (SPI) Bus -
    • SoftwareSerial - for serial communication on any digital pins -
    • Stepper - for controlling stepper motors -
    • Wire - Two Wire Interface (TWI/I2C) for sending and receiving data over a net of devices or sensors. -

    The Matrix and Sprite libraries are no longer part of the core distribution. -

    -

    Contributed Libraries

    -

    If you're using one of these libraries, you need to install it first. To do so, download the library and unzip it. It should be in a folder of its own, and will typically contain at least two files, one with a .h suffix and one with a .cpp suffix. Open your Arduino sketchbook folder. If there is already a folder there called libraries, place the library folder in there. If not, create a folder called libraries in the sketchbook folder, and drop the library folder in there. Then re-start the Arduino programming environment, and you should see your new library in the Sketch > Import Library menu. -

    -

    For details, see the page on the Arduino environment. -

    -

    Communication (networking and protocols): -

    • Messenger - for processing text-based messages from the computer -
    • NewSoftSerial - an improved version of the SoftwareSerial library -
    • OneWire - control devices (from Dallas Semiconductor) that use the One Wire protocol. -
    • PS2Keyboard - read characters from a PS2 keyboard. -
    • Simple Message System - send messages between Arduino and the computer -
    • SSerial2Mobile - send text messages or emails using a cell phone (via AT commands over software serial) -
    • Webduino - extensible web server library (for use with the Arduino Ethernet Shield) -
    • X10 - Sending X10 signals over AC power lines -
    • XBee - for communicating with XBees in API mode -
    • SerialControl - Remote control other Arduinos over a serial connection -

    Sensing: -

    • Capacitive Sensing - turn two or more pins into capacitive sensors -
    • Debounce - for reading noisy digital inputs (e.g. from buttons) -

    Displays and LEDs: -

    • Improved LCD library fixes LCD initialization bugs in official Arduino LCD library -
    • GLCD - graphics routines for LCD based on the KS0108 or equivalent chipset. -
    • LedControl - for controlling LED matrices or seven-segment displays with a MAX7221 or MAX7219. -
    • LedControl - an alternative to the Matrix library for driving multiple LEDs with Maxim chips. -
    • LedDisplay - control of a HCMS-29xx scrolling LED display. -

    These libraries are compatible Wiring versions, and the links below point to the (excellent) Wiring documentation. -

    • Matrix - Basic LED Matrix display manipulation library -
    • Sprite - Basic image sprite manipulation library for use in animations with an LED matrix -

    Frequency Generation and Audio: -

    • Tone - generate audio frequency square waves in the background on any microcontroller pin -

    Motors and PWM: -

    • TLC5940 - 16 channel 12 bit PWM controller. -

    Timing: -

    • DateTime - a library for keeping track of the current date and time in software. -
    • Metro - help you time actions at regular intervals -
    • MsTimer2 - uses the timer 2 interrupt to trigger an action every N milliseconds. -

    Utilities: -

    • PString - a lightweight class for printing to buffers -
    • Streaming - a method to simplify print statements -

    For a guide to writing your own libraries, see this tutorial. -

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

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    - - diff --git a/build/linux/work/reference/LiquidCrystal.html b/build/linux/work/reference/LiquidCrystal.html deleted file mode 100644 index a843fe3ca..000000000 --- a/build/linux/work/reference/LiquidCrystal.html +++ /dev/null @@ -1,124 +0,0 @@ - - - - Arduino Reference - LiquidCrystal - - - - - - - -
    - - - - - - - - -
    - -
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    Reference   Language | Libraries | Comparison | Changes -

    -

    LiquidCrystal Library

    -

    This library allows an Arduino board to control LiquidCrystal displays (LCDs) based on the Hitachi HD44780 (or a compatible) chipset, which is found on most text-based LCDs. The library works with in either 4- or 8-bit mode (i.e. using 4 or 8 data lines in addition to the rs, enable, and, optionally, the rw control lines). -

    -

    Function

    -

    Examples -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

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    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    LiquidCrystal -

    -

    autoscroll()

    -

    Description

    -

    Turns on automatic scrolling of the LCD. This causes each character output to the display to push previous characters over by one space. If the current text direction is left-to-right (the default), the display scrolls to the left; if the current direction is right-to-left, the display scrolls to the right. This has the effect of outputting each new character to the same location on the LCD. -

    -

    Syntax

    -

    lcd.autoscroll() -

    -

    Parameters

    -

    lcd: a variable of type LiquidCrystal -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - diff --git a/build/linux/work/reference/LiquidCrystalBegin.html b/build/linux/work/reference/LiquidCrystalBegin.html deleted file mode 100644 index 8b14ec324..000000000 --- a/build/linux/work/reference/LiquidCrystalBegin.html +++ /dev/null @@ -1,105 +0,0 @@ - - - - Arduino Reference - LiquidCrystalBegin - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    LiquidCrystal -

    -

    begin()

    -

    Description

    -

    Specifies the dimensions (width and height) of the display. -

    -

    Syntax

    -

    lcd.begin(cols, rows) -

    -

    Parameters

    -

    lcd: a variable of type LiquidCrystal -

    -

    cols: the number of columns that the display has -

    -

    rows: the number of rows that the display has -Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

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    - - - - - - - - -
    - -
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    Reference   Language | Libraries | Comparison | Changes -

    -

    LiquidCrystal -

    -

    blink()

    -

    Description

    -

    Display the blinking LCD cursor. If used in combination with the cursor() function, the result will depend on the particular display. -

    -

    Syntax

    -

    lcd.blink() -

    -

    Parameters

    -

    lcd: a variable of type LiquidCrystal -

    -

    Example

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

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    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    LiquidCrystal -

    -

    clear()

    -

    Description

    -

    Clears the LCD screen and positions the cursor in the upper-left corner. -

    -

    Syntax

    -

    lcd.clear() -

    -

    Parameters

    -

    lcd: a variable of type LiquidCrystal -

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    LiquidCrystal -

    -

    LiquidCrystal()

    -

    Description

    -

    Creates a variable of type LiquidCrystal. The display can be controlled using 4 or 8 data lines. If the former, omit the pin numbers for d0 to d3 and leave those lines unconnected. The RW pin can be tied to ground instead of connected to a pin on the Arduino; if so, omit it from this function's parameters. -

    -

    Syntax

    -

    LiquidCrystal(rs, enable, d4, d5, d6, d7)
    LiquidCrystal(rs, rw, enable, d4, d5, d6, d7)
    LiquidCrystal(rs, enable, d0, d1, d2, d3, d4, d5, d6, d7)
    LiquidCrystal(rs, rw, enable, d0, d1, d2, d3, d4, d5, d6, d7) -

    -

    Parameters

    -

    rs: the number of the Arduino pin that is connected to the RS pin on the LCD -

    -

    rw: the number of the Arduino pin that is connected to the RW pin on the LCD (optional) -

    -

    enable: the number of the Arduino pin that is connected to the enable pin on the LCD -

    -

    d0, d1, d2, d3, d4, d5, d6, d7: the numbers of the Arduino pins that are connected to the corresponding data pins on the LCD. d0, d1, d2, and d3 are optional; if omitted, the LCD will be controlled using only the four data lines (d4, d5, d6, d7). -

    -

    Example

    -
    -#include <LiquidCrystal.h>
-
-LiquidCrystal lcd(12, 11, 10, 5, 4, 3, 2);
-
-void setup()
-{
-  lcd.print("hello, world!");
-}
-
-void loop() {}
-
-

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

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    - - - - - - - - -
    - -
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    Reference   Language | Libraries | Comparison | Changes -

    -

    LiquidCrystal -

    -

    createChar()

    -

    Description

    -

    Create a custom character (gylph) for use on the LCD. Up to eight characters of 5x8 pixels are supported (numbered 0 to 7). The appearance of each custom character is specified by an array of eight bytes, one for each row. The five least significant bits of each byte determine the pixels in that row. To display a custom character on the screen, write() its number. -

    -

    Syntax

    -

    lcd.createChar(num, data) -

    -

    Parameters

    -

    lcd: a variable of type LiquidCrystal -

    -

    num: which character to create (0 to 7) -

    -

    data: the character's pixel data -

    -

    Example

    -
    -
-#include <LiquidCrystal.h>
-
-LiquidCrystal lcd(12, 11, 5, 4, 3, 2);
-
-byte smiley[8] = {
-  B00000,
-  B10001,
-  B00000,
-  B00000,
-  B10001,
-  B01110,
-  B00000,
-};
-
-void setup() {
-  lcd.createChar(0, smiley);
-  lcd.begin(16, 2);  
-  lcd.write(0);
-}
-
-void loop() {}
-
-
-

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - - - - -
    - - diff --git a/build/linux/work/reference/LiquidCrystalCursor.html b/build/linux/work/reference/LiquidCrystalCursor.html deleted file mode 100644 index a09d35e3e..000000000 --- a/build/linux/work/reference/LiquidCrystalCursor.html +++ /dev/null @@ -1,106 +0,0 @@ - - - - Arduino Reference - LiquidCrystalCursor - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    LiquidCrystal -

    -

    cursor()

    -

    Description

    -

    Display the LCD cursor: an underscore (line) at the position to which the next character will be written. -

    -

    Syntax

    -

    lcd.cursor() -

    -

    Parameters

    -

    lcd: a variable of type LiquidCrystal -

    -

    Example

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - - - - -
    - - diff --git a/build/linux/work/reference/LiquidCrystalDisplay.html b/build/linux/work/reference/LiquidCrystalDisplay.html deleted file mode 100644 index c42a9a1c1..000000000 --- a/build/linux/work/reference/LiquidCrystalDisplay.html +++ /dev/null @@ -1,106 +0,0 @@ - - - - Arduino Reference - LiquidCrystalDisplay - - - - - - - -
    - - - - - - - - -
    - -
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    Reference   Language | Libraries | Comparison | Changes -

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    LiquidCrystal -

    -

    display()

    -

    Description

    -

    Turns on the LCD display, after it's been turned off with noDisplay(). This will restore the text (and cursor) that was on the display. -

    -

    Syntax

    -

    lcd.display() -

    -

    Parameters

    -

    lcd: a variable of type LiquidCrystal -

    -

    Example

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - diff --git a/build/linux/work/reference/LiquidCrystalHome.html b/build/linux/work/reference/LiquidCrystalHome.html deleted file mode 100644 index 3a3b64987..000000000 --- a/build/linux/work/reference/LiquidCrystalHome.html +++ /dev/null @@ -1,102 +0,0 @@ - - - - Arduino Reference - LiquidCrystalHome - - - - - - - -
    - - - - - - - - -
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    Reference   Language | Libraries | Comparison | Changes -

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    LiquidCrystal -

    -

    home()

    -

    Description

    -

    Positions the cursor in the upper-left of the LCD. That is, use that location in outputting subsequent text to the display. To also clear the display, use the clear() function instead. -

    -

    Syntax

    -

    lcd.home() -

    -

    Parameters

    -

    lcd: a variable of type LiquidCrystal -

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/LiquidCrystalLeftToRight.html b/build/linux/work/reference/LiquidCrystalLeftToRight.html deleted file mode 100644 index f7c47265b..000000000 --- a/build/linux/work/reference/LiquidCrystalLeftToRight.html +++ /dev/null @@ -1,104 +0,0 @@ - - - - Arduino Reference - LiquidCrystalLeftToRight - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

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    LiquidCrystal -

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    leftToRight()

    -

    Description

    -

    Set the direction for text written to the LCD to left-to-right, the default. This means that subsequent characters written to the display will go from left to right, but does not affect previously-output text. -

    -

    Syntax

    -

    lcd.leftToRight() -

    -

    Parameters

    -

    lcd: a variable of type LiquidCrystal -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/LiquidCrystalNoAutoscroll.html b/build/linux/work/reference/LiquidCrystalNoAutoscroll.html deleted file mode 100644 index 88736242c..000000000 --- a/build/linux/work/reference/LiquidCrystalNoAutoscroll.html +++ /dev/null @@ -1,104 +0,0 @@ - - - - Arduino Reference - LiquidCrystalNoAutoscroll - - - - - - - -
    - - - - - - - - -
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    Reference   Language | Libraries | Comparison | Changes -

    -

    LiquidCrystal -

    -

    noAutoscroll()

    -

    Description

    -

    Turns off automatic scrolling of the LCD. -

    -

    Syntax

    -

    lcd.noAutoscroll() -

    -

    Parameters

    -

    lcd: a variable of type LiquidCrystal -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/LiquidCrystalNoBlink.html b/build/linux/work/reference/LiquidCrystalNoBlink.html deleted file mode 100644 index 508e677eb..000000000 --- a/build/linux/work/reference/LiquidCrystalNoBlink.html +++ /dev/null @@ -1,106 +0,0 @@ - - - - Arduino Reference - LiquidCrystalNoBlink - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    LiquidCrystal -

    -

    noBlink()

    -

    Description

    -

    Turns off the blinking LCD cursor. -

    -

    Syntax

    -

    lcd.noBlink() -

    -

    Parameters

    -

    lcd: a variable of type LiquidCrystal -

    -

    Example

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/LiquidCrystalNoCursor.html b/build/linux/work/reference/LiquidCrystalNoCursor.html deleted file mode 100644 index 08c448b00..000000000 --- a/build/linux/work/reference/LiquidCrystalNoCursor.html +++ /dev/null @@ -1,106 +0,0 @@ - - - - Arduino Reference - LiquidCrystalNoCursor - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    LiquidCrystal -

    -

    noCursor()

    -

    Description

    -

    Hides the LCD cursor. -

    -

    Syntax

    -

    lcd.noCursor() -

    -

    Parameters

    -

    lcd: a variable of type LiquidCrystal -

    -

    Example

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/LiquidCrystalNoDisplay.html b/build/linux/work/reference/LiquidCrystalNoDisplay.html deleted file mode 100644 index 2dedfd0d4..000000000 --- a/build/linux/work/reference/LiquidCrystalNoDisplay.html +++ /dev/null @@ -1,106 +0,0 @@ - - - - Arduino Reference - LiquidCrystalNoDisplay - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    LiquidCrystal -

    -

    noDisplay()

    -

    Description

    -

    Turns off the LCD display, without losing the text currently shown on it. -

    -

    Syntax

    -

    lcd.noDisplay() -

    -

    Parameters

    -

    lcd: a variable of type LiquidCrystal -

    -

    Example

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/LiquidCrystalPrint.html b/build/linux/work/reference/LiquidCrystalPrint.html deleted file mode 100644 index 455cee48e..000000000 --- a/build/linux/work/reference/LiquidCrystalPrint.html +++ /dev/null @@ -1,178 +0,0 @@ - - - - Arduino Reference - LiquidCrystalPrint - - - - - - - -
    - - - - - - - - -
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    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    LiquidCrystal -

    -

    print()

    -

    Description

    -

    Prints text to the LCD. -

    -

    Syntax

    -

    lcd.print(data)
    lcd.print(data, BASE) -

    -

    Parameters

    -

    lcd: a variable of type LiquidCrystal -

    -

    data: the data to print (char, byte, int, long, or string) -

    -

    BASE (optional): the base in which to print numbers: BIN for binary (base 2), DEC for decimal (base 10), OCT for octal (base 8), HEX for hexadecimal (base 16). -

    -

    Returns

    -

    byte
    print() will return the number of bytes written, though reading that number is optional -

    -

    Example

    -

    -

    -
    #include <LiquidCrystal.h>
    -
    -LiquidCrystal lcd(12, 11, 10, 5, 4, 3, 2);
    -
    -void setup()
    -{
    -  lcd.print("hello, world!");
    -}
    -
    -void loop() {}
    -
    [Get Code]
    -
    - -Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/LiquidCrystalRightToLeft.html b/build/linux/work/reference/LiquidCrystalRightToLeft.html deleted file mode 100644 index 9700b5922..000000000 --- a/build/linux/work/reference/LiquidCrystalRightToLeft.html +++ /dev/null @@ -1,104 +0,0 @@ - - - - Arduino Reference - LiquidCrystalRightToLeft - - - - - - - -
    - - - - - - - - -
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    Reference   Language | Libraries | Comparison | Changes -

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    LiquidCrystal -

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    rightToLeft()

    -

    Description

    -

    Set the direction for text written to the LCD to right-to-left (the default is left-to-right). This means that subsequent characters written to the display will go from right to left, but does not affect previously-output text. -

    -

    Syntax

    -

    lcd.rightToLeft() -

    -

    Parameters

    -

    lcd: a variable of type LiquidCrystal -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/LiquidCrystalScrollDisplayLeft.html b/build/linux/work/reference/LiquidCrystalScrollDisplayLeft.html deleted file mode 100644 index 24fb4cf41..000000000 --- a/build/linux/work/reference/LiquidCrystalScrollDisplayLeft.html +++ /dev/null @@ -1,106 +0,0 @@ - - - - Arduino Reference - LiquidCrystalScrollDisplayLeft - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    LiquidCrystal -

    -

    scrollDisplayLeft()

    -

    Description

    -

    Scrolls the contents of the display (text and cursor) one space to the left. -

    -

    Syntax

    -

    lcd.scrollDisplayLeft() -

    -

    Parameters

    -

    lcd: a variable of type LiquidCrystal -

    -

    Example

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - diff --git a/build/linux/work/reference/LiquidCrystalScrollDisplayRight.html b/build/linux/work/reference/LiquidCrystalScrollDisplayRight.html deleted file mode 100644 index d77f51538..000000000 --- a/build/linux/work/reference/LiquidCrystalScrollDisplayRight.html +++ /dev/null @@ -1,106 +0,0 @@ - - - - Arduino Reference - LiquidCrystalScrollDisplayRight - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    LiquidCrystal -

    -

    scrollDisplayRight()

    -

    Description

    -

    Scrolls the contents of the display (text and cursor) one space to the right. -

    -

    Syntax

    -

    lcd.scrollDisplayRight() -

    -

    Parameters

    -

    lcd: a variable of type LiquidCrystal -

    -

    Example

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - - - - - - - -
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    LiquidCrystal -

    -

    setCursor()

    -

    Description

    -

    Position the LCD cursor; that is, set the location at which subsequent text written to the LCD will be displayed. -

    -

    Syntax

    -

    lcd.setCursor(col, row) -

    -

    Parameters

    -

    lcd: a variable of type LiquidCrystal -

    -

    col: the column at which to position the cursor (with 0 being the first column) -

    -

    row: the row at which to position the cursor (with 0 being the first row) -Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - - - - -
    - - diff --git a/build/linux/work/reference/LiquidCrystalWrite.html b/build/linux/work/reference/LiquidCrystalWrite.html deleted file mode 100644 index 6e3cee094..000000000 --- a/build/linux/work/reference/LiquidCrystalWrite.html +++ /dev/null @@ -1,181 +0,0 @@ - - - - Arduino Reference - LiquidCrystalWrite - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    LiquidCrystal -

    -

    write()

    -

    Description

    -

    Write a character to the LCD. -

    -

    Syntax

    -

    lcd.write(data) -

    -

    Parameters

    -

    lcd: a variable of type LiquidCrystal -

    -

    data: the character to write to the display -

    -

    Returns

    -

    byte
    write() will return the number of bytes written, though reading that number is optional -

    -

    Example

    -

    -

    -
    #include <LiquidCrystal.h>
    -
    -LiquidCrystal lcd(12, 11, 10, 5, 4, 3, 2);
    -
    -void setup()
    -{
    -  Serial.begin(9600);
    -}
    -
    -void loop()
    -{
    -  if (Serial.available()) {
    -    lcd.write(Serial.read());
    -  }
    -}
    -
    [Get Code]
    -
    - -Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/Long.html b/build/linux/work/reference/Long.html deleted file mode 100644 index 578b3a6dc..000000000 --- a/build/linux/work/reference/Long.html +++ /dev/null @@ -1,110 +0,0 @@ - - - - Arduino Reference - Long - - - - - - - -
    - - - - - - - - -
    - -
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    Reference   Language | Libraries | Comparison | Changes -

    -

    long

    -

    Description

    -

    Long variables are extended size variables for number storage, and store 32 bits (4 bytes), from -2,147,483,648 to 2,147,483,647. -

    -

    Example

    -

        long speedOfLight = 186000L;   // see Integer Constants for explanation of the 'L'
-
-
    -

    Syntax

    -
        long var = val;
-
    -

    • var - the long variable name -
    • val - the value assigned to the variable -

    See Also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - - - - -
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    - - - - - - - - -
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    Reference   Language | Libraries | Comparison | Changes -

    -

    long()

    -

    Description

    -

    Converts a value to the long data type. -

    -

    Syntax

    -

    long(x) -

    -

    Parameters

    -

    x: a value of any type -

    -

    Returns

    -

    long -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    Reference   Language | Libraries | Comparison | Changes -

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    loop()

    -

    After creating a setup() function, which initializes and sets the initial values, the loop() function does precisely what its name suggests, and loops consecutively, allowing your program to change and respond. Use it to actively control the Arduino board. -

    -

    Example

    -
     
-int buttonPin = 3;
-
-// setup initializes serial and the button pin
-void setup()
-{
-  beginSerial(9600);
-  pinMode(buttonPin, INPUT);
-}
-
-// loop checks the button pin each time,
-// and will send serial if it is pressed
-void loop()
-{
-  if (digitalRead(buttonPin) == HIGH)
-    serialWrite('H');
-  else
-    serialWrite('L');
-
-  delay(1000);
-}
-
-
    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

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    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    lowByte()

    -

    Description

    -

    Extracts the low-order (rightmost) byte of a variable (e.g. a word). -

    -

    Syntax

    -

    lowByte(x) -

    -

    Parameters

    -

    x: a value of any type -

    -

    Returns

    -

    byte -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - - - - -
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    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    map(value, fromLow, fromHigh, toLow, toHigh)

    -

    Description

    -

    Re-maps a number from one range to another. That is, a value of fromLow would get mapped to toLow, a value of fromHigh to toHigh, values in-between to values in-between, etc. -

    -

    Does not constrain values to within the range, because out-of-range values are sometimes intended and useful. The constrain() function may be used either before or after this function, if limits to the ranges are desired. -

    -

    Note that the "lower bounds" of either range may be larger or smaller than the "upper bounds" so the map() function may be used to reverse a range of numbers, for example -

    -

    y = map(x, 1, 50, 50, 1); -

    -

    The function also handles negative numbers well, so -that this example -

    -

    y = map(x, 1, 50, 50, -100); -

    -

    is also valid and works well. -

    -

    The map() function uses integer math so will not generate fractions, when the math might indicate that it should do so. Fractional remainders are truncated, and are not rounded or averaged. -

    -

    Parameters

    -

    value: the number to map -

    -

    fromLow: the lower bound of the value's current range -

    -

    fromHigh: the upper bound of the value's current range -

    -

    toLow: the lower bound of the value's target range -

    -

    toHigh: the upper bound of the value's target range -

    -

    Returns

    -

    The mapped value. -

    -

    Example

    -
    -/* Map an analog value to 8 bits (0 to 255) */
-void setup() {}
-
-void loop()
-{
-  int val = analogRead(0);
-  val = map(val, 0, 1023, 0, 255);
-  analogWrite(9, val);
-}
-
-
    -

    Appendix

    -

    For the mathematically inclined, here's the whole function -

    -

    -long map(long x, long in_min, long in_max, long out_min, long out_max)
-{
-  return (x - in_min) * (out_max - out_min) / (in_max - in_min) + out_min;
-}
-
-
    -

    See Also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/Max.html b/build/linux/work/reference/Max.html deleted file mode 100644 index 3504e2c8f..000000000 --- a/build/linux/work/reference/Max.html +++ /dev/null @@ -1,121 +0,0 @@ - - - - Arduino Reference - Max - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    max(x, y)

    -

    Description

    -

    Calculates the maximum of two numbers. -

    -

    Parameters

    -

    x: the first number, any data type -

    -

    y: the second number, any data type -

    -

    Returns

    -

    The larger of the two parameter values. -

    -

    Example

    -
    sensVal = max(senVal, 20); // assigns sensVal to the larger of sensVal or 20
-                           // (effectively ensuring that it is at least 20)
-

    Note

    -

    Perhaps counter-intuitively, max() is often used to constrain the lower end of a variable's range, while min() is used to constrain the upper end of the range. -

    -

    Warning

    -

    Because of the way the max() function is implemented, avoid using other functions inside the brackets, it may lead to incorrect results -

    -

    -max(a--, 0);   // avoid this - yields incorrect results
-
-a--;           // use this instead -
-max(a, 0);     // keep other math outside the function
-
-
    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/Micros.html b/build/linux/work/reference/Micros.html deleted file mode 100644 index d04f54f9e..000000000 --- a/build/linux/work/reference/Micros.html +++ /dev/null @@ -1,123 +0,0 @@ - - - - Arduino Reference - Micros - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    micros()

    -

    Description

    -

    Returns the number of microseconds since the Arduino board began running the current program. This number will overflow (go back to zero), after approximately 70 minutes. On 16 MHz Arduino boards (e.g. Duemilanove and Nano), this function has a resolution of four microseconds (i.e. the value returned is always a multiple of four). On 8 MHz Arduino boards (e.g. the LilyPad), this function has a resolution of eight microseconds. -

    -

    Note: there are 1,000 microseconds in a millisecond and 1,000,000 microseconds in a second. -

    -

    Parameters

    -

    None -

    -

    Returns

    -

    Number of microseconds since the program started (unsigned long) -

    -

    Example

    -
    -unsigned long time;
-
-void setup(){
-  Serial.begin(9600);
-}
-void loop(){
-  Serial.print("Time: ");
-  time = micros();
-  //prints time since program started
-  Serial.println(time);
-  // wait a second so as not to send massive amounts of data
-  delay(1000);
-}
-
-
    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/Millis.html b/build/linux/work/reference/Millis.html deleted file mode 100644 index f77a7493f..000000000 --- a/build/linux/work/reference/Millis.html +++ /dev/null @@ -1,125 +0,0 @@ - - - - Arduino Reference - Millis - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    millis()

    -

    Description

    -

    Returns the number of milliseconds since the Arduino board began running the current program. This number will overflow (go back to zero), after approximately 50 days. -

    -

    Parameters

    -

    None -

    -

    Returns

    -

    Number of milliseconds since the program started (unsigned long) -

    -

    Example

    -
    -unsigned long time;
-
-void setup(){
-  Serial.begin(9600);
-}
-void loop(){
-  Serial.print("Time: ");
-  time = millis();
-  //prints time since program started
-  Serial.println(time);
-  // wait a second so as not to send massive amounts of data
-  delay(1000);
-}
-
-
    -

    Tip:

    -

    Note that the parameter for millis is an unsigned long, errors may be generated if a programmer tries to do math with other datatypes such as ints. -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/Min.html b/build/linux/work/reference/Min.html deleted file mode 100644 index fda5d592f..000000000 --- a/build/linux/work/reference/Min.html +++ /dev/null @@ -1,121 +0,0 @@ - - - - Arduino Reference - Min - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    min(x, y)

    -

    Description

    -

    Calculates the minimum of two numbers. -

    -

    Parameters

    -

    x: the first number, any data type -

    -

    y: the second number, any data type -

    -

    Returns

    -

    The smaller of the two numbers. -

    -

    Examples

    -
    sensVal = min(sensVal, 100); // assigns sensVal to the smaller of sensVal or 100
-                             // ensuring that it never gets above 100.
-

    Note

    -

    Perhaps counter-intuitively, max() is often used to constrain the lower end of a variable's range, while min() is used to constrain the upper end of the range. -

    -

    Warning

    -

    Because of the way the min() function is implemented, avoid using other functions inside the brackets, it may lead to incorrect results -

    -

    -min(a++, 100);   // avoid this - yields incorrect results
-
-a++;
-min(a, 100);    // use this instead - keep other math outside the function
-
-
    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/Modulo.html b/build/linux/work/reference/Modulo.html deleted file mode 100644 index dc827def5..000000000 --- a/build/linux/work/reference/Modulo.html +++ /dev/null @@ -1,133 +0,0 @@ - - - - Arduino Reference - Modulo - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    % (modulo)

    -

    Description

    -

    Calculates the remainder when one integer is divided by another. It is useful for keeping a variable within a particular range (e.g. the size of an array). -

    -

    Syntax

    -

    result = dividend % divisor -

    -

    Parameters

    -

    dividend: the number to be divided -

    -

    divisor: the number to divide by -

    -

    Returns

    -

    the remainder -

    -

    Examples

    -
    x = 7 % 5;   // x now contains 2
-x = 9 % 5;   // x now contains 4
-x = 5 % 5;   // x now contains 0
-x = 4 % 5;   // x now contains 4
-
-
    -

    Example Code

    -
    -/* update one value in an array each time through a loop */
-
-int values[10];
-int i = 0;
-
-void setup() {}
-
-void loop()
-{
-  values[i] = analogRead(0);
-  i = (i + 1) % 10;   // modulo operator rolls over variable  
-}
-
-
    -

    Tip

    -

    The modulo operator does not work on floats. -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/NoInterrupts.html b/build/linux/work/reference/NoInterrupts.html deleted file mode 100644 index cecb884fb..000000000 --- a/build/linux/work/reference/NoInterrupts.html +++ /dev/null @@ -1,115 +0,0 @@ - - - - Arduino Reference - NoInterrupts - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    noInterrupts()

    -

    Description

    -

    Disables interrupts (you can re-enable them with interrupts()). Interrupts allow certain important tasks to happen in the background and are enabled by default. Some functions will not work while interrupts are disabled, and incoming communication may be ignored. Interrupts can slightly disrupt the timing of code, however, and may be disabled for particularly critical sections of code. -

    -

    Parameters

    -

    None. -

    -

    Returns

    -

    None. -

    -

    Example

    -
    -void setup() {}
-
-void loop()
-{
-  noInterrupts();
-  // critical, time-sensitive code here
-  interrupts();
-  // other code here
-}
-
-
    -

    See Also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/NoTone.html b/build/linux/work/reference/NoTone.html deleted file mode 100644 index 7f636e5ff..000000000 --- a/build/linux/work/reference/NoTone.html +++ /dev/null @@ -1,107 +0,0 @@ - - - - Arduino Reference - NoTone - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    noTone()

    -

    Description

    -

    Stops the generation of a square wave triggered by tone(). Has no effect if no tone is being generated. -

    -

    NOTE: if you want to play different pitches on multiple pins, you need to call noTone() on one pin before calling tone() on the next pin. -

    -

    Syntax

    -

    noTone(pin) -

    -

    Parameters

    -

    pin: the pin on which to stop generating the tone -

    -

    Returns

    -

    nothing -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/PinMode.html b/build/linux/work/reference/PinMode.html deleted file mode 100644 index 2815b8071..000000000 --- a/build/linux/work/reference/PinMode.html +++ /dev/null @@ -1,132 +0,0 @@ - - - - Arduino Reference - PinMode - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    pinMode()

    -

    Description

    -

    Configures the specified pin to behave either as an input or an output. See the description of digital pins for details. -

    -

    Syntax

    -

    pinMode(pin, mode) -

    -

    Parameters

    -

    pin: the number of the pin whose mode you wish to set -

    -

    mode: either INPUT or OUTPUT -

    -

    Returns

    -

    None -

    -

    Example

    -
    -
-int ledPin = 13;                 // LED connected to digital pin 13
-
-void setup()
-{
-  pinMode(ledPin, OUTPUT);      // sets the digital pin as output
-}
-
-void loop()
-{
-  digitalWrite(ledPin, HIGH);   // sets the LED on
-  delay(1000);                  // waits for a second
-  digitalWrite(ledPin, LOW);    // sets the LED off
-  delay(1000);                  // waits for a second
-}
-
-
    -

    Note

    -

    The analog input pins can be used as digital pins, referred to as A0, A1, etc. -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/Pointer.html b/build/linux/work/reference/Pointer.html deleted file mode 100644 index 8d4ad7fe3..000000000 --- a/build/linux/work/reference/Pointer.html +++ /dev/null @@ -1,94 +0,0 @@ - - - - Arduino Reference - Pointer - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    The pointer operators

    -

    & (reference) and * (dereference)

    -

    Pointers are one of the more complicated subjects for beginners in learning C, and it is possible to write the vast majority of Arduino sketches without ever encountering pointers. However for manipulating certain data structures, the use of pointers can simplify the code, and and knowledge of manipulating pointers is handy to have in one's toolkit. -

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/Pow.html b/build/linux/work/reference/Pow.html deleted file mode 100644 index 18bb7ac78..000000000 --- a/build/linux/work/reference/Pow.html +++ /dev/null @@ -1,109 +0,0 @@ - - - - Arduino Reference - Pow - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    pow(base, exponent)

    -

    Description

    -

    Calculates the value of a number raised to a power. Pow() can be used to raise a number to a fractional power. This is useful for generating exponential mapping of values or curves. -

    -

    Parameters

    -

    base: the number (float) -

    -

    exponent: the power to which the base is raised (float) -

    -

    Returns

    -

    The result of the exponentiation (double) -

    -

    Example

    -

    See the fscale function in the code library. -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/PulseIn.html b/build/linux/work/reference/PulseIn.html deleted file mode 100644 index c02c9bb91..000000000 --- a/build/linux/work/reference/PulseIn.html +++ /dev/null @@ -1,126 +0,0 @@ - - - - Arduino Reference - PulseIn - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    pulseIn()

    -

    Description

    -

    Reads a pulse (either HIGH or LOW) on a pin. For example, if value is HIGH, pulseIn() waits for the pin to go HIGH, starts timing, then waits for the pin to go LOW and stops timing. Returns the length of the pulse in microseconds. Gives up and returns 0 if no pulse starts within a specified time out. -

    -

    The timing of this function has been determined empirically and will probably show errors in longer pulses. Works on pulses from 10 microseconds to 3 minutes in length. -

    -

    Syntax

    -

    pulseIn(pin, value)
    pulseIn(pin, value, timeout) -

    -

    Parameters

    -

    pin: the number of the pin on which you want to read the pulse. (int) -

    -

    value: type of pulse to read: either HIGH or LOW. (int) -

    -

    timeout (optional): the number of microseconds to wait for the pulse to start; default is one second (unsigned long) -

    -

    Returns

    -

    the length of the pulse (in microseconds) or 0 if no pulse started before the timeout (unsigned long) -

    -

    Example

    -
     
-
-int pin = 7;
-unsigned long duration;
-
-void setup()
-{
-  pinMode(pin, INPUT);
-}
-
-void loop()
-{
-  duration = pulseIn(pin, HIGH);
-}
-
-
    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/Random.html b/build/linux/work/reference/Random.html deleted file mode 100644 index 1fdc41549..000000000 --- a/build/linux/work/reference/Random.html +++ /dev/null @@ -1,139 +0,0 @@ - - - - Arduino Reference - Random - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    random()

    -

    Description

    -

    The random function generates pseudo-random numbers. -

    -

    Syntax

    -

    random(max)
    random(min, max) -

    -

    Parameters

    -

    min - lower bound of the random value, inclusive (optional) -

    -

    max - upper bound of the random value, exclusive -

    -

    Returns

    -

    a random number between min and max-1 (long) -

    -

    Note:

    -

    If it is important for a sequence of values generated by random() to differ, on subsequent executions of a sketch, use randomSeed() to initialize the random number generator with a fairly random input, such as analogRead() on an unconnected pin. -

    -

    Conversely, it can occasionally be useful to use pseudo-random sequences that repeat exactly. This can be accomplished by calling randomSeed() with a fixed number, before starting the random sequence. -

    -

    Example

    -
    -long randNumber;
-
-void setup(){
-  Serial.begin(9600);
-
-  // if analog input pin 0 is unconnected, random analog
-  // noise will cause the call to randomSeed() to generate
-  // different seed numbers each time the sketch runs.
-  // randomSeed() will then shuffle the random function.
-  randomSeed(analogRead(0));
-}
-
-void loop() {
-  // print a random number from 0 to 299
-  randNumber = random(300);
-  Serial.println(randNumber);  
-
-  // print a random number from 10 to 19
-  randNumber = random(10, 20);
-  Serial.println(randNumber);
-
-  delay(50);
-}
-
-
    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/RandomSeed.html b/build/linux/work/reference/RandomSeed.html deleted file mode 100644 index 5ecccf06a..000000000 --- a/build/linux/work/reference/RandomSeed.html +++ /dev/null @@ -1,123 +0,0 @@ - - - - Arduino Reference - RandomSeed - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    randomSeed(seed)

    -

    Description

    -

    randomSeed() initializes the pseudo-random number generator, causing it to start at an arbitrary point in its random sequence. This sequence, while very long, and random, is always the same. -

    -

    If it is important for a sequence of values generated by random() to differ, on subsequent executions of a sketch, use randomSeed() to initialize the random number generator with a fairly random input, such as analogRead() on an unconnected pin. -

    -

    Conversely, it can occasionally be useful to use pseudo-random sequences that repeat exactly. This can be accomplished by calling randomSeed() with a fixed number, before starting the random sequence. -

    -

    Parameters

    -

    long, int - pass a number to generate the seed. -

    -

    Returns

    -

    no returns -

    -

    Example

    -
    -long randNumber;
-
-void setup(){
-  Serial.begin(9600);
-  randomSeed(analogRead(0));
-}
-
-void loop(){
-  randNumber = random(300);
-  Serial.println(randNumber);
-
-  delay(50);
-}
-
-
    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/Return.html b/build/linux/work/reference/Return.html deleted file mode 100644 index f38bd8bd4..000000000 --- a/build/linux/work/reference/Return.html +++ /dev/null @@ -1,126 +0,0 @@ - - - - Arduino Reference - Return - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    return

    -

    Terminate a function and return a value from a function to the calling function, if desired. -

    -

    Syntax:

    -

    return; -

    -

    return value; // both forms are valid -

    -

    Parameters

    -

    value: any variable or constant type -

    -

    Examples:

    -

    A function to compare a sensor input to a threshold -

     int checkSensor(){       
-    if (analogRead(0) > 400) {
-        return 1;
-    else{
-        return 0;
-    }
-}
-
    -

    The return keyword is handy to test a section of code without having to "comment out" large sections of possibly buggy code. -

    -

    void loop(){
-
-// brilliant code idea to test here
-
-return;
-
-// the rest of a dysfunctional sketch here
-// this code will never be executed
-}
-
    -

    See also

    -

    comments -

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/SD.html b/build/linux/work/reference/SD.html deleted file mode 100644 index 40f893f76..000000000 --- a/build/linux/work/reference/SD.html +++ /dev/null @@ -1,133 +0,0 @@ - - - - Arduino Reference - SD - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    SD Library

    -

    -

    The SD library allows for reading from and writing to SD cards, e.g. on the Arduino Ethernet Shield. It is built on sdfatlib by William Greiman. The library supports FAT16 and FAT32 file systems on standard SD cards and SDHC cards. It uses short 8.3 names for files. The file names passed to the SD library functions can include paths separated by forward-slashes, /, e.g. "directory/filename.txt". Because the working directory is always the root of the SD card, a name refers to the same file whether or not it includes a leading slash (e.g. "/file.txt" is equivalent to "file.txt"). As of version 1.0, the library supports opening multiple files. -

    -

    The communication between the microcontroller and the SD card uses SPI, which takes place on digital pins 11, 12, and 13 (on most Arduino boards) or 50, 51, and 52 (Arduino Mega). Additionally, another pin must be used to select the SD card. This can be the hardware SS pin - pin 10 (on most Arduino boards) or pin 53 (on the Mega) - or another pin specified in the call to SD.begin(). Note that even if you don't use the hardware SS pin, it must be left as an output or the SD library won't work. -

    -

    Notes on using the Library and various shields -

    -

    		 -

    		 -

    SD class

    -

    The SD class provides functions for accessing the SD card and manipulating its files and directories. -

    -

    File class

    -

    The File class allows for reading from and writing to individual files on the SD card. -

    -

    Examples

    -
    • Datalogger: Log data from three analog sensors to a SD card using the SD library -
    • DumpFile: Read a file from a SD card using the SD library and send it over the serial port -
    • Files: Create and destroy a file on a SD card -
    • ReadWrite: Read and write data to and from a file on a SD card -
    • CardInfo: Get information about a SD card -

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
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    - - diff --git a/build/linux/work/reference/SDCardNotes.html b/build/linux/work/reference/SDCardNotes.html deleted file mode 100644 index 66f386584..000000000 --- a/build/linux/work/reference/SDCardNotes.html +++ /dev/null @@ -1,140 +0,0 @@ - - - - Arduino Reference - SDCardNotes - - - - - - - -
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    Some things to keep in mind when using the SD Library

    -

    Overview

    -

    The communication between the microcontroller and the SD card uses SPI, which takes place on digital pins 11, 12, and 13 (on most Arduino boards) or 50, 51, and 52 (Arduino Mega). Additionally, another pin must be used to select the SD card. This can be the hardware SS pin - pin 10 (on most Arduino boards) or pin 53 (on the Mega) - or another pin specified in the call to SD.begin(). Note that even if you don't use the hardware SS pin, it must be left as an output or the SD library won't work. Different boards use different pins for this functionality, so be sure you’ve selected the correct pin in SD.begin(). -

    -

    Not all the functions are listed on the main SD library page, because they are part of the library's utility functions. -

    -

    Formatting/Preparing the card

    -

    (NB : whenever referring to the SD card, it means SD and microSD sizes, as well as SD and SDHD formats) -

    -

    You’ll need a SD reader and computer to format your card properly. The library supports the FAT16 and FAT32 filesystems, but use FAT16 when possible. The process to format is fairly straightforward. -

    -

    Windows : right click on your card’s directory and choose “Format” from the drop down. Make sure you choose FAT as the filesystem. -

    -

    OSX : Open Disk Utility (located in Applications>Utilities). Choose the Card, click on the erase tab, select MS-DOS(FAT) as the Format, and click Erase. -NB: OSX places a number of “hidden” files on the device when it formats a drive. To format a SD car without the extra files on OSX, follow these notes on Ladyada’s site. -

    -

    Linux: With a SD card inserted, open a terminal window. At the prompt, type df, and press enter. The windows will report the device name of your SD card, it should look something like /dev/sdb1. Unmount the SD card, but leave it in the computer. Type sudo mkdosfs -F 16 /dev/sdb1, replacing the device name with yours. Remove the SD card and replace it to verify it works. -

    -

    File Naming

    -

    FAT file systems have a limitation when it comes to naming conventions. You must use the 8.3 format, so that file names look like “NAME001.EXT”, where “NAME001” is an 8 character or fewer string, and “EXT” is a 3 character extension. People commonly use the extensions .TXT and .LOG. It is possible to have a shorter file name (for example, mydata.txt, or time.log), but you cannot use longer file names. Read more on the 8.3 convention. -

    -

    Opening/Closing files

    -

    When you use file.write(), it doesn't write to the card until you flush() or close(). Whenever you open a file, be sure to close it to save your data. -

    -

    As of version 1.0, it is possible to have multiple files open. -

    -

    Different Shields/boards

    -

    There are a number of different shields that support SD cards. This list is not exclusive, but are commonly used. -

    -

    Arduino Ethernet Shield -

    -

    The Ethernet Shield comes with an SD card slot onboard. The shield fits on top of your Arduino. Because the Ethernet module uses pin 10, the CS pin for the SD card has been moved to pin 4. Make sure you use SD.begin(4) to use the SD card functionality. -

    -

    Adafruit Micro-SD breakout Board -

    -

    This board supports Micro-SD cards, ans you’ll need to wire it up before you can use it. On the board, connect GND to ground, 5v to 5v, CLK to Pin 13 on your Arduino, DO to pin 12, DI to pin 11, and CS to pin 10. If you are already using pin 10, you can use a different pin, as long as you remember to change the pin in SD.begin(). -

    -

    Sparkfun SD Shield -

    -

    The Sparkfun shield fits on your Arduino and uses pin 8 for CS. You will need use SD.begin(8) to use the card. -NB: the Sparkfun shield was recently updated. Older versions look similar, but were lacking a connection to the 3.3V bus and did not have the onboard hex inverter. -

    -

    See Also:

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

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    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - diff --git a/build/linux/work/reference/SDbegin.html b/build/linux/work/reference/SDbegin.html deleted file mode 100644 index a99c3bd68..000000000 --- a/build/linux/work/reference/SDbegin.html +++ /dev/null @@ -1,105 +0,0 @@ - - - - Arduino Reference - SDbegin - - - - - - - -
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    SD -

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    begin()

    -

    Description

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    Initializes the SD library and card. This begins use of the SPI bus (digital pins 11, 12, and 13 on most Arduino boards; 50, 51, and 52 on the Mega) and the chip select pin, which defaults to the hardware SS pin (pin 10 on most Arduino boards, 53 on the Mega). Note that even if you use a different chip select pin, the hardware SS pin must be kept as an output or the SD library functions will not work. -

    -

    Syntax

    -

    SD.begin()
    SD.begin(cspin) -

    -

    Parameters

    -

    cspin (optional): the pin connected to the chip select line of the SD card; defaults to the hardware SS line of the SPI bus -

    -

    Returns

    -

    true on success; false on failure -

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

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    SD -

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    exists()

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    Description

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    Tests whether a file or directory exists on the SD card. -

    -

    Syntax

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    SD.exists(filename) -

    -

    Parameters

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    filename: the name of the file to test for existence, which can include directories (delimited by forward-slashes, /) -

    -

    Returns

    -

    true if the file or directory exists, false if not -

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

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    - - diff --git a/build/linux/work/reference/SDmkdir.html b/build/linux/work/reference/SDmkdir.html deleted file mode 100644 index 1b82af036..000000000 --- a/build/linux/work/reference/SDmkdir.html +++ /dev/null @@ -1,107 +0,0 @@ - - - - Arduino Reference - SDmkdir - - - - - - - -
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    SD -

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    mkdir()

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    Description

    -

    Create a directory on the SD card. This will also create any intermediate directories that don't already exists; e.g. SD.mkdir("a/b/c") will create a, b, and c. -

    -

    Syntax

    -

    SD.mkdir(filename) -

    -

    Parameters

    -

    filename: the name of the directory to create, with sub-directories separated by forward-slashes, / -

    -

    Returns

    -

    true if the creation of the directory succeeded, false if not -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - diff --git a/build/linux/work/reference/SDopen.html b/build/linux/work/reference/SDopen.html deleted file mode 100644 index 587721371..000000000 --- a/build/linux/work/reference/SDopen.html +++ /dev/null @@ -1,111 +0,0 @@ - - - - Arduino Reference - SDopen - - - - - - - -
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    SD -

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    open()

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    Description

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    Opens a file on the SD card. If the file is opened for writing, it will be created if it doesn't already exist (but the directory containing it must already exist). -

    -

    Syntax

    -

    SD.open(filepath)
    SD.open(filepath, mode) -

    -

    Parameters

    -

    filename: the name the file to open, which can include directories (delimited by forward slashes, /) - char * -

    -

    mode (optional): the mode in which to open the file, defaults to FILE_READ - byte. one of: -

    -

    • FILE_READ: open the file for reading, starting at the beginning of the file. -
    • FILE_WRITE: open the file for reading and writing, starting at the end of the file. -

    Returns

    -

    a File object referring to the opened file; if the file couldn't be opened, this object will evaluate to false in a boolean context, i.e. you can test the return value with "if (f)". -

    -

    See also

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    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

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    remove()

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    Description

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    Remove a file from the SD card. -

    -

    Syntax

    -

    SD.remove(filename) -

    -

    Parameters

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    filename: the name of the file to remove, which can include directories (delimited by forward-slashes, /) -

    -

    Returns

    -

    true if the removal of the file succeeded, false if not. (if the file didn't exist, the return value is unspecified) -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - diff --git a/build/linux/work/reference/SDrmdir.html b/build/linux/work/reference/SDrmdir.html deleted file mode 100644 index 46e4e4808..000000000 --- a/build/linux/work/reference/SDrmdir.html +++ /dev/null @@ -1,107 +0,0 @@ - - - - Arduino Reference - SDrmdir - - - - - - - -
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    rmdir()

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    Description

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    Remove a directory from the SD card. The directory must be empty. -

    -

    Syntax

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    SD.rmdir(filename) -

    -

    Parameters

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    filename: the name of the directory to remove, with sub-directories separated by forward-slashes, / -

    -

    Returns

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    true if the removal of the directory succeeded, false if not. (if the directory didn't exist, the return value is unspecified) -

    -

    See also

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    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - diff --git a/build/linux/work/reference/SPI.html b/build/linux/work/reference/SPI.html deleted file mode 100644 index 8440c6d1e..000000000 --- a/build/linux/work/reference/SPI.html +++ /dev/null @@ -1,141 +0,0 @@ - - - - Arduino Reference - SPI - - - - - - - -
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    SPI library

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    -

    This library allows you to communicate with SPI devices, with the Arduino as the master device. -

    -

    A Brief Introduction to the Serial Peripheral Interface (SPI)

    -

    Serial Peripheral Interface (SPI) is a synchronous serial data protocol used by microcontrollers for communicating with one or more peripheral devices quickly over short distances. It can also be used for communication between two microcontrollers. -

    -

    With an SPI connection there is always one master device (usually a microcontroller) which controls the peripheral devices. Typically there are three lines common to all the devices, -

    • Master In Slave Out (MISO) - The Slave line for sending data to the master, -
    • Master Out Slave In (MOSI) - The Master line for sending data to the peripherals, -
    • Serial Clock (SCK) - The clock pulses which synchronize data transmission generated by the master, and -
    • Slave Select pin - the pin on each device that the master can use to enable and disable specific devices. When a device's Slave Select pin is low, it communicates with the master. When it's high, it ignores the master. This allows you to have multiple SPI devices sharing the same MISO, MOSI, and CLK lines. -

    To write code for a new SPI device you need to note a few things: -

    • Is data shifted in Most Significant Bit (MSB) or Least Significant Bit (LSB) first? This is controlled by the SPI.setBitOrder() function. -
    • Is the data clock idle when high or low? -
    • Are samples on the rising or falling edge of clock pulses? This and the clock idling are controlled by the SPI.setDataMode() function -
    • What speed is the SPI running at? This is controlled by the SPI.setClockDivider() function. -

    The SPI standard is loose and each device implements it a little differently. This means you have to pay special attention to the device's datasheet when writing your code. Generally speaking, there are three modes of transmission. These modes control whether data is shifted in and out on the rising or falling edge of the data clock signal (called the clock phase, and whether the clock is idle when high or low (called the clock polarity). The three modes combine polarity and phase. The SPI.setDataMode() function lets you set the mode to control clock polarity and phase according to this table: -

    -

    - - - - - -
    ModeClock Polarity (CPOL)Clock Phase (CPHA)
    000
    101
    210
    311
    -

    Once you have your SPI parameters set correctly you just need to figure which registers in your device control which functions, and you're good to go. This will be explained in the data sheet for your device. -

    -

    For more on SPI, see Wikipedia's page on SPI. -

    -

    Connections

    -

    On the Arduino Duemilanove and other ATmega168 / 328-based boards, the SPI bus uses pins 10 (SS), 11 (MOSI), 12 (MISO), and 13 (SCK). On the Arduino Mega, this is 50 (MISO), 51 (MOSI), 52 (SCK), and 53 (SS). Note that even if you're not using the SS pin, it must remain set as an output; otherwise, the SPI interface can be put into slave mode, rendering the library inoperative. -

    -

    It is possible to use a pin other than pin 10 as the slave select (SS) pin. For example, the Arduino Ethernet shield uses pin 4 to control the SPI connection to the on-board SD card, and pin 10 to control the connection to the Ethernet controller. -

    -

    		 -

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    Functions

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    Examples

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    See also

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    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    begin()

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    Description

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    Initializes the SPI bus, setting SCK, MOSI, and SS to outputs, pulling SCK and MOSI low and SS high. -

    -

    Syntax

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    SPI.begin() -

    -

    Parameters

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    None -

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    Returns

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    None -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    end()

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    Description

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    Disables the SPI bus (leaving pin modes unchanged). -

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    Syntax

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    SPI.end() -

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    Parameters

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    None -

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    Returns

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    None -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    setBitOrder()

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    Description

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    Sets the order of the bits shifted out of and into the SPI bus, either LSBFIRST (least-significant bit first) or MSBFIRST (most-significant bit first). -

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    Syntax

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    SPI.setBitOrder(order) -

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    Parameters

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    order: either LSBFIRST or MSBFIRST -

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    Returns

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    None -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    Description

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    Sets the SPI clock divider relative to the system clock. The dividers available are 2, 4, 8, 16, 32, 64, or 128. The default setting is SPI_CLOCK_DIV4, which sets the SPI clock to one-quarter the frequency of the system clock. -

    -

    Syntax

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    SPI.setClockDivider(divider) -

    -

    Parameters

    -

    divider: -

    • SPI_CLOCK_DIV2 -
    • SPI_CLOCK_DIV4 -
    • SPI_CLOCK_DIV8 -
    • SPI_CLOCK_DIV16 -
    • SPI_CLOCK_DIV32 -
    • SPI_CLOCK_DIV64 or -
    • SPI_CLOCK_DIV128 -

    Returns

    -

    None -

    -

    Example

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

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    setDataMode()

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    Description

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    Sets the SPI data mode: that is, clock polarity and phase. See the Wikipedia article on SPI for details. -

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    Syntax

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    SPI.setDataMode(mode) -

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    Parameters

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    mode: SPI_MODE0, SPI_MODE1, SPI_MODE2, or SPI_MODE3 -

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    Returns

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    None -

    -

    Example

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    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

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    transfer()

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    Description

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    Transfers one byte over the SPI bus, both sending and receiving. -

    -

    Syntax

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    SPI.transfer(val) -

    -

    Parameters

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    val: the byte to send out over the bus -

    -

    Returns

    -

    the byte read from the bus -

    -

    Example

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

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    Variable Scope

    -

    Variables in the C programming language, which Arduino uses, have a property called scope. This is in contrast to languages such as BASIC where every variable is a global variable. -

    -

    A global variable is one that can be seen by every function in a program. Local variables are only visible to the function in which they are declared. In the Arduino environment, any variable declared outside of a function (e.g. setup(), loop(), etc. ), is a global variable. -

    -

    When programs start to get larger and more complex, local variables are a useful way to insure that only one function has access to its own variables. This prevents programming errors when one function inadvertently modifies variables used by another function. -

    -

    It is also sometimes handy to declare and initialize a variable inside a for loop. This creates a variable that can only be accessed from inside the for-loop brackets. -

    -

    Example:

    -
    int gPWMval;  // any function will see this variable
-
-void setup()
-{
-  // ...
-}
-
-void loop()
-{
-  int i;    // "i" is only "visible" inside of "loop"
-  float f;  // "f" is only "visible" inside of "loop"
-  // ...
-
-  for (int j = 0; j <100; j++){
-  // variable j can only be accessed inside the for-loop brackets
-  }
-
-}
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    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/SemiColon.html b/build/linux/work/reference/SemiColon.html deleted file mode 100644 index 8b3b42a07..000000000 --- a/build/linux/work/reference/SemiColon.html +++ /dev/null @@ -1,100 +0,0 @@ - - - - Arduino Reference - SemiColon - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    ; semicolon

    -

    Used to end a statement. -

    -

    Example

    -
    -int a = 13;
-
-

    Tip

    -

    Forgetting to end a line in a semicolon will result in a compiler error. The error text may be obvious, and refer to a missing semicolon, or it may not. If an impenetrable or seemingly illogical compiler error comes up, one of the first things to check is a missing semicolon, in the immediate vicinity, preceding the line at which the compiler complained. -

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/Serial.html b/build/linux/work/reference/Serial.html deleted file mode 100644 index a8d29a21c..000000000 --- a/build/linux/work/reference/Serial.html +++ /dev/null @@ -1,119 +0,0 @@ - - - - Arduino Reference - Serial - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    Serial

    -

    -

    Used for communication between the Arduino board and a computer or other devices. All Arduino boards have at least one serial port (also known as a UART or USART): Serial. It communicates on digital pins 0 (RX) and 1 (TX) as well as with the computer via USB. Thus, if you use these functions, you cannot also use pins 0 and 1 for digital input or output. -

    -

    You can use the Arduino environment's built-in serial monitor to communicate with an Arduino board. Click the serial monitor button in the toolbar and select the same baud rate used in the call to begin(). -

    -

    The Arduino Mega has three additional serial ports: Serial1 on pins 19 (RX) and 18 (TX), Serial2 on pins 17 (RX) and 16 (TX), Serial3 on pins 15 (RX) and 14 (TX). To use these pins to communicate with your personal computer, you will need an additional USB-to-serial adaptor, as they are not connected to the Mega's USB-to-serial adaptor. To use them to communicate with an external TTL serial device, connect the TX pin to your device's RX pin, the RX to your device's TX pin, and the ground of your Mega to your device's ground. (Don't connect these pins directly to an RS232 serial port; they operate at +/- 12V and can damage your Arduino board.) -

    -

    		 -

    		 -

    Functions

    -

    Examples

    -

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/Serial_Available.html b/build/linux/work/reference/Serial_Available.html deleted file mode 100644 index 9768bad42..000000000 --- a/build/linux/work/reference/Serial_Available.html +++ /dev/null @@ -1,206 +0,0 @@ - - - - Arduino Reference - Available - - - - - - - -
    - - - - - - - - -
    - -
    -

    Serial -

    -

    available()

    -

    Description

    -

    Get the number of bytes (characters) available for reading from the serial port. This is data that's already arrived and stored in the serial receive buffer (which holds 128 bytes). available() inherits from the Stream utility class. -

    -

    Syntax

    -

    Serial.available() -

    -

    Arduino Mega only:
    Serial1.available()
    Serial2.available()
    Serial3.available() -

    -

    Parameters

    -

    none -

    -

    Returns

    -

    the number of bytes available to read -

    -

    Example

    -

    -

    -
    int incomingByte = 0;   // for incoming serial data
    -
    -void setup() {
    -        Serial.begin(9600);     // opens serial port, sets data rate to 9600 bps
    -}
    -
    -void loop() {
    -
    -        // send data only when you receive data:
    -        if (Serial.available() > 0) {
    -                // read the incoming byte:
    -                incomingByte = Serial.read();
    -
    -                // say what you got:
    -                Serial.print("I received: ");
    -                Serial.println(incomingByte, DEC);
    -        }
    -}
    -@]
    -
    -'''Arduino Mega example:'''
    -
    -[@
    -void setup() {
    -  Serial.begin(9600);
    -  Serial1.begin(9600);
    -
    -}
    -
    -void loop() {
    -  // read from port 0, send to port 1:
    -  if (Serial.available()) {
    -    int inByte = Serial.read();
    -    Serial1.print(inByte, BYTE);
    -
    -  }
    -  // read from port 1, send to port 0:
    -  if (Serial1.available()) {
    -    int inByte = Serial1.read();
    -    Serial.print(inByte, BYTE);
    -  }
    -}
    -
    [Get Code]
    -
    - -

    -

    See also

    -

    Reference Home -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/Serial_Begin.html b/build/linux/work/reference/Serial_Begin.html deleted file mode 100644 index 577e5f8c5..000000000 --- a/build/linux/work/reference/Serial_Begin.html +++ /dev/null @@ -1,135 +0,0 @@ - - - - Arduino Reference - Begin - - - - - - - -
    - - - - - - - - -
    - -
    -

    Serial -

    -

    begin()

    -

    Description

    -

    Sets the data rate in bits per second (baud) for serial data transmission. For communicating with the computer, use one of these rates: 300, 1200, 2400, 4800, 9600, 14400, 19200, 28800, 38400, 57600, or 115200. You can, however, specify other rates - for example, to communicate over pins 0 and 1 with a component that requires a particular baud rate. -

    -

    Syntax

    -

    Serial.begin(speed) -

    -

    Arduino Mega only:
    Serial1.begin(speed)
    Serial2.begin(speed)
    Serial3.begin(speed) -

    -

    Parameters

    -

    speed: in bits per second (baud) - long -

    -

    Returns

    -

    nothing -

    -

    Example:

    -
    -void setup() {
-	Serial.begin(9600);	// opens serial port, sets data rate to 9600 bps
-}
-
-void loop() {}
-
-
    -

    Arduino Mega example: -

    -

    -// Arduino Mega using all four of its Serial ports 
-// (Serial, Serial1, Serial2, Serial3), 
-// with different baud rates:
-
-void setup(){
-  Serial.begin(9600);
-  Serial1.begin(38400);
-  Serial2.begin(19200);
-  Serial3.begin(4800);
-
-  Serial.println("Hello Computer");
-  Serial1.println("Hello Serial 1");
-  Serial2.println("Hello Serial 2");
-  Serial3.println("Hello Serial 3");
-}
-
-void loop() {}
-
-
    -

    Thanks to Jeff Gray for the mega example -

    -

    See also

    -

    Reference Home -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/Serial_End.html b/build/linux/work/reference/Serial_End.html deleted file mode 100644 index 22ba03dc4..000000000 --- a/build/linux/work/reference/Serial_End.html +++ /dev/null @@ -1,102 +0,0 @@ - - - - Arduino Reference - End - - - - - - - -
    - - - - - - - - -
    - -
    -

    Serial -

    -

    end()

    -

    Description

    -

    Disables serial communication, allowing the RX and TX pins to be used for general input and output. To re-enable serial communication, call Serial.begin(). -

    -

    Syntax

    -

    Serial.end() -

    -

    Arduino Mega only:
    Serial1.end()
    Serial2.end()
    Serial3.end() -

    -

    Parameters

    -

    none -

    -

    Returns

    -

    nothing -

    -

    See also

    -

    Reference Home -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/Serial_Flush.html b/build/linux/work/reference/Serial_Flush.html deleted file mode 100644 index 856610bfa..000000000 --- a/build/linux/work/reference/Serial_Flush.html +++ /dev/null @@ -1,108 +0,0 @@ - - - - Arduino Reference - Flush - - - - - - - -
    - - - - - - - - -
    - -
    -

    Serial -

    -

    flush()

    -

    Description

    -

    Flushes the buffer of incoming serial data. Any call to Serial.read() or Serial.available() will return only data received after all the most recent call to Serial.flush(). -

    -

    Serial.flush() waits for outgoing data to transmit before clearing the buffer contents. -

    -

    flush() inherits from the Stream utility class. -

    -

    Syntax

    -

    Serial.flush() -

    -

    Arduino Mega only:
    Serial1.flush()
    Serial2.flush()
    Serial3.flush() -

    -

    Parameters

    -

    none -

    -

    Returns

    -

    nothing -

    -

    See also

    -

    Reference Home -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/Serial_Peek.html b/build/linux/work/reference/Serial_Peek.html deleted file mode 100644 index 07cda55a6..000000000 --- a/build/linux/work/reference/Serial_Peek.html +++ /dev/null @@ -1,105 +0,0 @@ - - - - Arduino Reference - Peek - - - - - - - -
    - - - - - - - - -
    - -
    -

    Serial -

    -

    peek()

    -

    Description

    -

    Returns the next byte (character) of incoming serial data without removing it from the internal serial buffer. That is, successive calls to peek() will return the same character, as will the next call to read(). peek() inherits from the Stream utility class. -

    -

    Syntax

    -

    Serial.peek() -

    -

    Arduino Mega only:
    Serial1.peek()
    Serial2.peek()
    Serial3.peek() -

    -

    Parameters

    -

    None -

    -

    Returns

    -

    the first byte of incoming serial data available (or -1 if no data is available) - int -

    -

    See also

    -

    Reference Home -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/Serial_Print.html b/build/linux/work/reference/Serial_Print.html deleted file mode 100644 index 0d464a82b..000000000 --- a/build/linux/work/reference/Serial_Print.html +++ /dev/null @@ -1,229 +0,0 @@ - - - - Arduino Reference - Print - - - - - - - -
    - - - - - - - - -
    - -
    -

    Serial -

    -

    print()

    -

    Description

    -

    Prints data to the serial port as human-readable ASCII text. This command can take many forms. Numbers are printed using an ASCII character for each digit. Floats are similarly printed as ASCII digits, defaulting to two decimal places. Bytes are sent as a single character. Characters and strings are sent as is. For example: -

    • Serial.print(78) gives "78" -
    • Serial.print(1.23456) gives "1.23" -
    • Serial.print('N') gives "N" -
    • Serial.print("Hello world.") gives "Hello world." -

    An optional second parameter specifies the base (format) to use; permitted values are BIN (binary, or base 2), OCT (octal, or base 8), DEC (decimal, or base 10), HEX (hexadecimal, or base 16). For floating point numbers, this parameter specifies the number of decimal places to use. For example: -

    • Serial.print(78, BIN) gives "1001110" -
    • Serial.print(78, OCT) gives "116" -
    • Serial.print(78, DEC) gives "78" -
    • Serial.print(78, HEX) gives "4E" -
    • Serial.println(1.23456, 0) gives "1" -
    • Serial.println(1.23456, 2) gives "1.23" -
    • Serial.println(1.23456, 4) gives "1.2346" -

    You can pass flash-memory based strings to Serial.print() by wrapping them with F(). For example : -

    • Serial.print(F(“Hello World”)) -

    To send a single byte, use Serial.write(). -

    -

    Syntax

    -

    Serial.print(val)
    Serial.print(val, format) -

    -

    Parameters

    -

    val: the value to print - any data type -

    -

    format: specifies the number base (for integral data types) or number of decimal places (for floating point types) -

    -

    Returns

    -

    byte
    print() will return the number of bytes written, though reading that number is optional -

    -

    Example:

    -

    -

    -
    /*
    -Uses a FOR loop for data and prints a number in various formats.
    -*/
    -int x = 0;    // variable
    -
    -void setup() {
    -  Serial.begin(9600);      // open the serial port at 9600 bps:    
    -}
    -
    -void loop() {  
    -  // print labels
    -  Serial.print("NO FORMAT");       // prints a label
    -  Serial.print("\t");              // prints a tab
    -
    -  Serial.print("DEC");  
    -  Serial.print("\t");      
    -
    -  Serial.print("HEX");
    -  Serial.print("\t");  
    -
    -  Serial.print("OCT");
    -  Serial.print("\t");
    -
    -  Serial.print("BIN");
    -  Serial.print("\t");
    -
    -  for(x=0; x< 64; x++){    // only part of the ASCII chart, change to suit
    -
    -    // print it out in many formats:
    -    Serial.print(x);       // print as an ASCII-encoded decimal - same as "DEC"
    -    Serial.print("\t");    // prints a tab
    -
    -    Serial.print(x, DEC);  // print as an ASCII-encoded decimal
    -    Serial.print("\t");    // prints a tab
    -
    -    Serial.print(x, HEX);  // print as an ASCII-encoded hexadecimal
    -    Serial.print("\t");    // prints a tab
    -
    -    Serial.print(x, OCT);  // print as an ASCII-encoded octal
    -    Serial.print("\t");    // prints a tab
    -
    -    Serial.println(x, BIN);  // print as an ASCII-encoded binary
    -    //                             then adds the carriage return with "println"
    -    delay(200);            // delay 200 milliseconds
    -  }
    -  Serial.println("");      // prints another carriage return
    -}
    -
    [Get Code]
    -
    - -

    -

    Programming Tips

    -

    As of version 1.0, serial transmission is asynchronous; Serial.print() will return before any characters are transmitted. -

    -

    See also

    -

    Reference Home -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/Serial_Println.html b/build/linux/work/reference/Serial_Println.html deleted file mode 100644 index 70a446c6d..000000000 --- a/build/linux/work/reference/Serial_Println.html +++ /dev/null @@ -1,193 +0,0 @@ - - - - Arduino Reference - Println - - - - - - - -
    - - - - - - - - -
    - -
    -

    Serial -

    -

    println()

    -

    Description

    -

    Prints data to the serial port as human-readable ASCII text followed by a carriage return character (ASCII 13, or '\r') and a newline character (ASCII 10, or '\n'). This command takes the same forms as Serial.print(). -

    -

    Syntax

    -

    Serial.println(val)
    Serial.println(val, format) -

    -

    Parameters

    -

    val: the value to print - any data type -

    -

    format: specifies the number base (for integral data types) or number of decimal places (for floating point types) -

    -

    Returns

    -

    byte
    println() will return the number of bytes written, though reading that number is optional -

    -

    Example:

    -

    -

    -

    -/*
    -  Analog input
    -
    - reads an analog input on analog in 0, prints the value out.
    -
    - created 24 March 2006
    - by Tom Igoe
    - */
    -
    -int analogValue = 0;    // variable to hold the analog value
    -
    -void setup() {
    -  // open the serial port at 9600 bps:
    -  Serial.begin(9600);
    -}
    -
    -void loop() {
    -  // read the analog input on pin 0:
    -  analogValue = analogRead(0);
    -
    -  // print it out in many formats:
    -  Serial.println(analogValue);       // print as an ASCII-encoded decimal
    -  Serial.println(analogValue, DEC);  // print as an ASCII-encoded decimal
    -  Serial.println(analogValue, HEX);  // print as an ASCII-encoded hexadecimal
    -  Serial.println(analogValue, OCT);  // print as an ASCII-encoded octal
    -  Serial.println(analogValue, BIN);  // print as an ASCII-encoded binary
    -
    -  // delay 10 milliseconds before the next reading:
    -  delay(10);
    -}
    -
    [Get Code]
    -
    - -

    -

    See also

    -

    Reference Home -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/Serial_Read.html b/build/linux/work/reference/Serial_Read.html deleted file mode 100644 index 282628961..000000000 --- a/build/linux/work/reference/Serial_Read.html +++ /dev/null @@ -1,128 +0,0 @@ - - - - Arduino Reference - Read - - - - - - - -
    - - - - - - - - -
    - -
    -

    Serial -

    -

    read()

    -

    Description

    -

    Reads incoming serial data. read() inherits from the Stream utility class. -

    -

    Syntax

    -

    Serial.read() -

    -

    Arduino Mega only:
    Serial1.read()
    Serial2.read()
    Serial3.read() -

    -

    Parameters

    -

    None -

    -

    Returns

    -

    the first byte of incoming serial data available (or -1 if no data is available) - int -

    -

    Example

    -
    -int incomingByte = 0;	// for incoming serial data
-
-void setup() {
-	Serial.begin(9600);	// opens serial port, sets data rate to 9600 bps
-}
-
-void loop() {
-
-	// send data only when you receive data:
-	if (Serial.available() > 0) {
-		// read the incoming byte:
-		incomingByte = Serial.read();
-
-		// say what you got:
-		Serial.print("I received: ");
-		Serial.println(incomingByte, DEC);
-	}
-}
-
-
-
    -

    See also

    -

    Reference Home -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/Serial_Write.html b/build/linux/work/reference/Serial_Write.html deleted file mode 100644 index 11de21df2..000000000 --- a/build/linux/work/reference/Serial_Write.html +++ /dev/null @@ -1,178 +0,0 @@ - - - - Arduino Reference - Write - - - - - - - -
    - - - - - - - - -
    - -
    -

    Serial -

    -

    write()

    -

    Description

    -

    Writes binary data to the serial port. This data is sent as a byte or series of bytes; to send the characters representing the digits of a number use the print() function instead. -

    -

    Syntax

    -

    Serial.write(val)
    Serial.write(str)
    Serial.write(buf, len) -

    -

    Arduino Mega also supports: Serial1, Serial2, Serial3 (in place of Serial) -

    -

    Parameters

    -

    val: a value to send as a single byte -

    -

    str: a string to send as a series of bytes -

    -

    buf: an array to send as a series of bytes -

    -

    len: the length of the buffer -

    -

    Returns

    -

    byte
    write() will return the number of bytes written, though reading that number is optional -

    -

    Example

    -

    -

    -
    void setup(){
    -  Serial.begin(9600);
    -}
    -
    -void loop(){
    -  Serial.write(45); // send a byte with the value 45
    -
    -   int bytesSent = Serial.write(“hello”); //send the string “hello” and return the length of the string.
    -}
    -
    [Get Code]
    -
    - -

    -

    See also

    - -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/ServerAvailable.html b/build/linux/work/reference/ServerAvailable.html deleted file mode 100644 index 8ecb85cc6..000000000 --- a/build/linux/work/reference/ServerAvailable.html +++ /dev/null @@ -1,204 +0,0 @@ - - - - Arduino Reference - ServerAvailable - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    Ethernet : Server class -

    -

    available()

    -

    Description

    -

    Gets a client that is connected to the server and has data available for reading. The connection persists when the returned client object goes out of scope; you can close it by calling client.stop(). -

    -

    available() inherits from the Stream utility class. -

    -

    Syntax

    -

    server.available() -

    -

    Parameters

    -

    None -

    -

    Returns

    -

    a Client object; if no Client has data available for reading, this object will evaluate to false in an if-statement (see the example below) -

    -

    Example

    -

    -

    -
    #include <Ethernet.h>
    -#include <SPI.h>
    -
    -// the media access control (ethernet hardware) address for the shield:
    -byte mac[] = { 0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED };  
    -//the IP address for the shield:
    -byte ip[] = { 10, 0, 0, 177 };    
    -// the router's gateway address:
    -byte gateway[] = { 10, 0, 0, 1 };
    -// the subnet:
    -byte subnet[] = { 255, 255, 0, 0 };
    -
    -
    -// telnet defaults to port 23
    -EthernetServer server = EthernetServer(23);
    -
    -void setup()
    -{
    -  // initialize the ethernet device
    -  Ethernet.begin(mac, ip, gateway, subnet);
    -
    -  // start listening for clients
    -  server.begin();
    -}
    -
    -void loop()
    -{
    -  // if an incoming client connects, there will be bytes available to read:
    -  EthernetClient client = server.available();
    -  if (client == true) {
    -    // read bytes from the incoming client and write them back
    -    // to any clients connected to the server:
    -    server.write(client.read());
    -  }
    -}
    -
    [Get Code]
    -
    - -

    -

    See Also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/ServerBegin.html b/build/linux/work/reference/ServerBegin.html deleted file mode 100644 index 7546549a2..000000000 --- a/build/linux/work/reference/ServerBegin.html +++ /dev/null @@ -1,198 +0,0 @@ - - - - Arduino Reference - ServerBegin - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    Ethernet : Server class -

    -

    begin()

    -

    Description

    -

    Tells the server to begin listening for incoming connections. -

    -

    Syntax

    -

    server.begin() -

    -

    Parameters

    -

    None -

    -

    Returns

    -

    None -

    -

    Example

    -

    -

    -
    #include <SPI.h>
    -#include <Ethernet.h>
    -
    -// the media access control (ethernet hardware) address for the shield:
    -byte mac[] = { 0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED };  
    -//the IP address for the shield:
    -byte ip[] = { 10, 0, 0, 177 };    
    -// the router's gateway address:
    -byte gateway[] = { 10, 0, 0, 1 };
    -// the subnet:
    -byte subnet[] = { 255, 255, 0, 0 };
    -
    -// telnet defaults to port 23
    -EthernetServer server = EthernetServer(23);
    -
    -void setup()
    -{
    -  // initialize the ethernet device
    -  Ethernet.begin(mac, ip, gateway, subnet);
    -
    -  // start listening for clients
    -  server.begin();
    -}
    -
    -void loop()
    -{
    -  // if an incoming client connects, there will be bytes available to read:
    -  EthernetClient client = server.available();
    -  if (client == true) {
    -    // read bytes from the incoming client and write them back
    -    // to any clients connected to the server:
    -    server.write(client.read());
    -  }
    -}
    -
    [Get Code]
    -
    - -Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

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    - - diff --git a/build/linux/work/reference/ServerConstructor.html b/build/linux/work/reference/ServerConstructor.html deleted file mode 100644 index b9ba4a4aa..000000000 --- a/build/linux/work/reference/ServerConstructor.html +++ /dev/null @@ -1,101 +0,0 @@ - - - - Arduino Reference - ServerConstructor - - - - - - - -
    - - - - - - - - -
    - -
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    Reference   Language | Libraries | Comparison | Changes -

    -

    Ethernet : Server class -

    -

    Server

    -

    Description

    -

    Server is the base class for all Ethernet server based calls. It is not called directly, but invoked whenever you use a function that relies on it. -

    -

    Functions

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - diff --git a/build/linux/work/reference/ServerPrint.html b/build/linux/work/reference/ServerPrint.html deleted file mode 100644 index 08d2dd121..000000000 --- a/build/linux/work/reference/ServerPrint.html +++ /dev/null @@ -1,106 +0,0 @@ - - - - Arduino Reference - ServerPrint - - - - - - - -
    - - - - - - - - -
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    Reference   Language | Libraries | Comparison | Changes -

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    Ethernet : Server class -

    -

    print()

    -

    Description

    -

    Print data to all the clients connected to a server. Prints numbers as a sequence of digits, each an ASCII character (e.g. the number 123 is sent as the three characters '1', '2', '3'). -

    -

    Syntax

    -

    server.print(data)
    server.print(data, BASE) -

    -

    Parameters

    -

    data: the data to print (char, byte, int, long, or string) -

    -

    BASE (optional): the base in which to print numbers: BIN for binary (base 2), DEC for decimal (base 10), OCT for octal (base 8), HEX for hexadecimal (base 16). -

    -

    Returns

    -

    byte
    print() will return the number of bytes written, though reading that number is optional -Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

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    - - diff --git a/build/linux/work/reference/ServerPrintln.html b/build/linux/work/reference/ServerPrintln.html deleted file mode 100644 index a933fd39a..000000000 --- a/build/linux/work/reference/ServerPrintln.html +++ /dev/null @@ -1,106 +0,0 @@ - - - - Arduino Reference - ServerPrintln - - - - - - - -
    - - - - - - - - -
    - -
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    Reference   Language | Libraries | Comparison | Changes -

    -

    Ethernet : Server class -

    -

    println()

    -

    Description

    -

    Print data, followed by a newline, to all the clients connected to a server. Prints numbers as a sequence of digits, each an ASCII character (e.g. the number 123 is sent as the three characters '1', '2', '3'). -

    -

    Syntax

    -

    server.println()
    server.println(data)
    server.println(data, BASE) -

    -

    Parameters

    -

    data (optional): the data to print (char, byte, int, long, or string) -

    -

    BASE (optional): the base in which to print numbers: BIN for binary (base 2), DEC for decimal (base 10), OCT for octal (base 8), HEX for hexadecimal (base 16). -

    -

    Returns

    -

    byte
    println() will return the number of bytes written, though reading that number is optional -Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

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    - - diff --git a/build/linux/work/reference/ServerWrite.html b/build/linux/work/reference/ServerWrite.html deleted file mode 100644 index ea414153e..000000000 --- a/build/linux/work/reference/ServerWrite.html +++ /dev/null @@ -1,200 +0,0 @@ - - - - Arduino Reference - ServerWrite - - - - - - - -
    - - - - - - - - -
    - -
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    Reference   Language | Libraries | Comparison | Changes -

    -

    Ethernet : Server class -

    -

    write()

    -

    Description

    -

    Write data to all the clients connected to a server. -

    -

    Syntax

    -

    server.write(data) -

    -

    Parameters

    -

    data: the value to write (byte or char) -

    -

    Returns

    -

    byte
    write() returns the number of bytes written. It is not necessary to read this. -

    -

    Example

    -

    -

    -
    #include <SPI.h>
    -#include <Ethernet.h>
    -
    -// network configuration.  gateway and subnet are optional.
    -
    - // the media access control (ethernet hardware) address for the shield:
    -byte mac[] = { 0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED };  
    -//the IP address for the shield:
    -byte ip[] = { 10, 0, 0, 177 };    
    -// the router's gateway address:
    -byte gateway[] = { 10, 0, 0, 1 };
    -// the subnet:
    -byte subnet[] = { 255, 255, 0, 0 };
    -
    -// telnet defaults to port 23
    -EthernetServer server = EthernetServer(23);
    -
    -void setup()
    -{
    -  // initialize the ethernet device
    -  Ethernet.begin(mac, ip, gateway, subnet);
    -
    -  // start listening for clients
    -  server.begin();
    -}
    -
    -void loop()
    -{
    -  // if an incoming client connects, there will be bytes available to read:
    -  EthernetClient client = server.available();
    -  if (client == true) {
    -    // read bytes from the incoming client and write them back
    -    // to any clients connected to the server:
    -    server.write(client.read());
    -  }
    -}
    -
    [Get Code]
    -
    - -Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

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    - - diff --git a/build/linux/work/reference/Servo.html b/build/linux/work/reference/Servo.html deleted file mode 100644 index fb1cd1049..000000000 --- a/build/linux/work/reference/Servo.html +++ /dev/null @@ -1,111 +0,0 @@ - - - - Arduino Reference - Servo - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    Servo library

    -

    -

    This library allows an Arduino board to control RC (hobby) servo motors. Servos have integrated gears and a shaft that can be precisely controlled. Standard servos allow the shaft to be positioned at various angles, usually between 0 and 180 degrees. Continuous rotation servos allow the rotation of the shaft to be set to various speeds. -

    -

    The Servo library supports up to 12 motors on most Arduino boards and 48 on the Arduino Mega. On boards other than the Mega, use of the library disables analogWrite() (PWM) functionality on pins 9 and 10, whether or not there is a Servo on those pins. On the Mega, up to 12 servos can be used without interfering with PWM functionality; use of 12 to 23 motors will disable PWM on pins 11 and 12. -

    -

    Circuit

    -

    Servo motors have three wires: power, ground, and signal. The power wire is typically red, and should be connected to the 5V pin on the Arduino board. The ground wire is typically black or brown and should be connected to a ground pin on the Arduino board. The signal pin is typically yellow, orange or white and should be connected to a digital pin on the Arduino board. Note servos draw considerable power, so if you need to drive more than one or two, you'll probably need to power them from a separate supply (i.e. not the +5V pin on your Arduino). Be sure to connect the grounds of the Arduino and external power supply together. -

    -

    		 -

    		 -

    Functions

    -

    Examples

    -

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

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    - - - - - -
    - - diff --git a/build/linux/work/reference/ServoAttach.html b/build/linux/work/reference/ServoAttach.html deleted file mode 100644 index 54c415105..000000000 --- a/build/linux/work/reference/ServoAttach.html +++ /dev/null @@ -1,125 +0,0 @@ - - - - Arduino Reference - ServoAttach - - - - - - - -
    - - - - - - - - -
    - -
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    Reference   Language | Libraries | Comparison | Changes -

    -

    Servo -

    -

    attach()

    -

    Description

    -

    Attach the Servo variable to a pin. Note that in Arduino 0016 and earlier, the Servo library supports only servos on only two pins: 9 and 10. -

    -

    Syntax

    -

    servo.attach(pin)
    servo.attach(pin, min, max) -

    -

    Parameters

    -

    servo: a variable of type Servo -

    -

    pin: the number of the pin that the servo is attached to -

    -

    min (optional): the pulse width, in microseconds, corresponding to the minimum (0-degree) angle on the servo (defaults to 544) -

    -

    max (optional): the pulse width, in microseconds, corresponding to the maximum (180-degree) angle on the servo (defaults to 2400) -

    -

    Example

    -
    -#include <Servo.h> 
-
-Servo myservo;
-
-void setup() 
-{ 
-  myservo.attach(9);
-} 
-
-void loop() {} 
-
-
    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - - - - -
    - - diff --git a/build/linux/work/reference/ServoAttached.html b/build/linux/work/reference/ServoAttached.html deleted file mode 100644 index fbfd714fe..000000000 --- a/build/linux/work/reference/ServoAttached.html +++ /dev/null @@ -1,108 +0,0 @@ - - - - Arduino Reference - ServoAttached - - - - - - - -
    - - - - - - - - -
    - -
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    Reference   Language | Libraries | Comparison | Changes -

    -

    Servo -

    -

    attached()

    -

    Description

    -

    Check whether the Servo variable is attached to a pin. -

    -

    Syntax

    -

    servo.attached() -

    -

    Parameters

    -

    servo: a variable of type Servo -

    -

    Returns

    -

    true if the servo is attached to pin; false otherwise. -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - - - - -
    - - diff --git a/build/linux/work/reference/ServoDetach.html b/build/linux/work/reference/ServoDetach.html deleted file mode 100644 index f898db10f..000000000 --- a/build/linux/work/reference/ServoDetach.html +++ /dev/null @@ -1,105 +0,0 @@ - - - - Arduino Reference - ServoDetach - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    Servo -

    -

    detach()

    -

    Description

    -

    Detach the Servo variable from its pin. If all Servo variables are detached, then pins 9 and 10 can be used for PWM output with analogWrite(). -

    -

    Syntax

    -

    servo.detach() -

    -

    Parameters

    -

    servo: a variable of type Servo -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - - - - -
    - - diff --git a/build/linux/work/reference/ServoRead.html b/build/linux/work/reference/ServoRead.html deleted file mode 100644 index 4477beebd..000000000 --- a/build/linux/work/reference/ServoRead.html +++ /dev/null @@ -1,107 +0,0 @@ - - - - Arduino Reference - ServoRead - - - - - - - -
    - - - - - - - - -
    - -
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    Reference   Language | Libraries | Comparison | Changes -

    -

    Servo -

    -

    read()

    -

    Description

    -

    Read the current angle of the servo (the value passed to the last call to write()). -

    -

    Syntax

    -

    servo.read() -

    -

    Parameters

    -

    servo: a variable of type Servo -

    -

    Returns

    -

    The angle of the servo, from 0 to 180 degrees. -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
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    - - - - - -
    - - diff --git a/build/linux/work/reference/ServoWrite.html b/build/linux/work/reference/ServoWrite.html deleted file mode 100644 index 44576fefc..000000000 --- a/build/linux/work/reference/ServoWrite.html +++ /dev/null @@ -1,122 +0,0 @@ - - - - Arduino Reference - ServoWrite - - - - - - - -
    - - - - - - - - -
    - -
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    Reference   Language | Libraries | Comparison | Changes -

    -

    Servo -

    -

    write()

    -

    Description

    -

    Writes a value to the servo, controlling the shaft accordingly. On a standard servo, this will set the angle of the shaft (in degrees), moving the shaft to that orientation. On a continuous rotation servo, this will set the speed of the servo (with 0 being full-speed in one direction, 180 being full speed in the other, and a value near 90 being no movement). -

    -

    Syntax

    -

    servo.write(angle) -

    -

    Parameters

    -

    servo: a variable of type Servo -

    -

    angle: the value to write to the servo, from 0 to 180 -

    -

    Example

    -
    -#include <Servo.h> 
-
-Servo myservo;
-
-void setup() 
-{ 
-  myservo.attach(9);
-  myservo.write(90);  // set servo to mid-point
-} 
-
-void loop() {} 
-
-
    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - - - - -
    - - diff --git a/build/linux/work/reference/ServoWriteMicroseconds.html b/build/linux/work/reference/ServoWriteMicroseconds.html deleted file mode 100644 index 5f9a52041..000000000 --- a/build/linux/work/reference/ServoWriteMicroseconds.html +++ /dev/null @@ -1,126 +0,0 @@ - - - - Arduino Reference - ServoWriteMicroseconds - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    Servo -

    -

    writeMicroseconds()

    -

    Description

    -

    Writes a value in microseconds (uS) to the servo, controlling the shaft accordingly. On a standard servo, this will set the angle of the shaft. On standard servos a parameter value of 1000 is fully counter-clockwise, 2000 is fully clockwise, and 1500 is in the middle. -

    -

    Note that some manufactures do not follow this standard very closely so that servos often respond to values between 700 and 2300. Feel free to increase these endpoints until the servo no longer continues to increase its range. Note however that attempting to drive a servo past its endpoints (often indicated by a growling sound) is a high-current state, and should be avoided. -

    -

    Continuous-rotation servos will respond to the writeMicrosecond function in an analogous manner to the write function. -

    -

    Syntax

    -

    servo.writeMicroseconds(uS) -

    -

    Parameters

    -

    servo: a variable of type Servo -

    -

    uS: the value of the parameter in microseconds (int) -

    -

    Example

    -
    -#include <Servo.h> 
-
-Servo myservo;
-
-void setup() 
-{ 
-  myservo.attach(9);
-  myservo.writeMicroseconds(1500);  // set servo to mid-point
-} 
-
-void loop() {} 
-
-
    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - - - - -
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    - - - - - - - - -
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    Reference   Language | Libraries | Comparison | Changes -

    -

    setup()

    -

    The setup() function is called when a sketch starts. Use it to initialize variables, pin modes, start using libraries, etc. The setup function will only run once, after each powerup or reset of the Arduino board. -

    -

    Example

    -
     
-int buttonPin = 3;
-
-void setup()
-{
-  Serial.begin(9600);
-  pinMode(buttonPin, INPUT);
-}
-
-void loop()
-{
-  // ...
-}
-
-
    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

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    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - - - - - - - -
    - -
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    Reference   Language | Libraries | Comparison | Changes -

    -

    shiftIn()

    -

    Description

    -

    Shifts in a byte of data one bit at a time. Starts from either the most (i.e. the leftmost) or least (rightmost) significant bit. For each bit, the clock pin is pulled high, the next bit is read from the data line, and then the clock pin is taken low. -

    -

    Note: this is a software implementation; Arduino also provides an SPI library that uses the hardware implementation, which is faster but only works on specific pins. -

    -

    Syntax

    -

    shiftIn(dataPin, clockPin, bitOrder) -

    -

    Parameters

    -

    dataPin: the pin on which to output each bit (int) -

    -

    clockPin: the pin to toggle once the dataPin has been set to the correct value (int) -

    -

    bitOrder: which order to shift out the bits; either MSBFIRST or LSBFIRST.
    (Most Significant Bit First, or, Least Significant Bit First) -

    -

    Returns

    -

    the value read (byte) -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - - - - -
    - - diff --git a/build/linux/work/reference/ShiftOut.html b/build/linux/work/reference/ShiftOut.html deleted file mode 100644 index 6baf4448b..000000000 --- a/build/linux/work/reference/ShiftOut.html +++ /dev/null @@ -1,239 +0,0 @@ - - - - Arduino Reference - ShiftOut - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    shiftOut()

    -

    Description

    -

    Shifts out a byte of data one bit at a time. Starts from either the most (i.e. the leftmost) or least (rightmost) significant bit. Each bit is written in turn to a data pin, after which a clock pin is pulsed (taken high, then low) to indicate that the bit is available. -

    -

    Note: if you're interfacing with a device that's clocked by rising edges, you'll need to make sure that the clock pin is low before the call to shiftOut(), e.g. with a call to digitalWrite(clockPin, LOW). -

    -

    This is a software implementation; see also the SPI library, which provides a hardware implementation that is faster but works only on specific pins. -

    -

    Syntax

    -

    shiftOut(dataPin, clockPin, bitOrder, value) -

    -

    Parameters

    -

    dataPin: the pin on which to output each bit (int) -

    -

    clockPin: the pin to toggle once the dataPin has been set to the correct value (int) -

    -

    bitOrder: which order to shift out the bits; either MSBFIRST or LSBFIRST.
    (Most Significant Bit First, or, Least Significant Bit First) -

    -

    value: the data to shift out. (byte) -

    -

    Returns

    -

    None -

    -

    Note

    -

    The dataPin and clockPin must already be configured as outputs by a call to pinMode(). -

    -

    shiftOut is currently written to output 1 byte (8 bits) so it requires a two step operation to output values larger than 255. - -

    -

    -// Do this for MSBFIRST serial
    -int data = 500;
    -// shift out highbyte
    -shiftOut(dataPin, clock, MSBFIRST, (data >> 8));  
    -// shift out lowbyte
    -shiftOut(data, clock, MSBFIRST, data);
    -
    -// Or do this for LSBFIRST serial
    -data = 500;
    -// shift out lowbyte
    -shiftOut(dataPin, clock, LSBFIRST, data);  
    -// shift out highbyte
    -shiftOut(dataPin, clock, LSBFIRST, (data >> 8));
    - 
    -
    [Get Code]
    -
    - -

    -

    Example

    -

    For accompanying circuit, see the tutorial on controlling a 74HC595 shift register. -

    -

    -

    -
    //**************************************************************//
    -//  Name    : shiftOutCode, Hello World                         //
    -//  Author  : Carlyn Maw,Tom Igoe                               //
    -//  Date    : 25 Oct, 2006                                      //
    -//  Version : 1.0                                               //
    -//  Notes   : Code for using a 74HC595 Shift Register           //
    -//          : to count from 0 to 255                            //
    -//****************************************************************
    -
    -//Pin connected to ST_CP of 74HC595
    -int latchPin = 8;
    -//Pin connected to SH_CP of 74HC595
    -int clockPin = 12;
    -////Pin connected to DS of 74HC595
    -int dataPin = 11;
    -
    -void setup() {
    -  //set pins to output because they are addressed in the main loop
    -  pinMode(latchPin, OUTPUT);
    -  pinMode(clockPin, OUTPUT);
    -  pinMode(dataPin, OUTPUT);
    -}
    -
    -void loop() {
    -  //count up routine
    -  for (int j = 0; j < 256; j++) {
    -    //ground latchPin and hold low for as long as you are transmitting
    -    digitalWrite(latchPin, LOW);
    -    shiftOut(dataPin, clockPin, LSBFIRST, j);  
    -    //return the latch pin high to signal chip that it
    -    //no longer needs to listen for information
    -    digitalWrite(latchPin, HIGH);
    -    delay(1000);
    -  }
    -}
    - 
    -
    [Get Code]
    -
    - -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/Sin.html b/build/linux/work/reference/Sin.html deleted file mode 100644 index 01d9ab67c..000000000 --- a/build/linux/work/reference/Sin.html +++ /dev/null @@ -1,105 +0,0 @@ - - - - Arduino Reference - Sin - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    sin(rad)

    -

    Description

    -

    Calculates the sine of an angle (in radians). The result will be between -1 and 1. -

    -

    Parameters

    -

    rad: the angle in radians (float) -

    -

    Returns

    -

    the sine of the angle (double) -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/Sizeof.html b/build/linux/work/reference/Sizeof.html deleted file mode 100644 index 739e9fa94..000000000 --- a/build/linux/work/reference/Sizeof.html +++ /dev/null @@ -1,130 +0,0 @@ - - - - Arduino Reference - Sizeof - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    sizeof

    -

    Description

    -

    The sizeof operator returns the number of bytes in a variable type, or the number of bytes occupied by an array. -

    -

    Syntax

    -

    sizeof(variable) -

    -

    Parameters

    -

    variable: any variable type or array (e.g. int, float, byte) -

    -

    Example code

    -

    The sizeof operator is useful for dealing with arrays (such as strings) where it is convenient to be able to change the size of the array without breaking other parts of the program. -

    -

    This program prints out a text string one character at a time. Try changing the text phrase. -

    -

    -char myStr[] = "this is a test";
-int i;
-
-void setup(){
-  Serial.begin(9600);
-}
-
-void loop() { 
-  for (i = 0; i < sizeof(myStr) - 1; i++){
-    Serial.print(i, DEC);
-    Serial.print(" = ");
-    Serial.println(myStr[i], BYTE);
-  }
-}
-
-
-

    Note that sizeof returns the total number of bytes. So for larger variable types such as ints, the for loop would look something like this. -

    -

    -for (i = 0; i < (sizeof(myInts)/sizeof(int)) - 1; i++) {
-  // do something with myInts[i]
-}
-
-
    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/SoftwareSerial.html b/build/linux/work/reference/SoftwareSerial.html deleted file mode 100644 index 3ea7703bc..000000000 --- a/build/linux/work/reference/SoftwareSerial.html +++ /dev/null @@ -1,196 +0,0 @@ - - - - Arduino Reference - SoftwareSerial - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    SoftwareSerial Library

    -

    The Arduino hardware has built-in support for serial communication on pins 0 and 1 (which also goes to the computer via the USB connection). The native serial support happens via a piece of hardware (built into the chip) called a UART. This hardware allows the Atmega chip to receive serial communication even while working on other tasks, as long as there room in the 64 byte serial buffer. -

    -

    The SoftwareSerial library has been developed to allow serial communication on other digital pins of the Arduino, using software to replicate the functionality (hence the name "SoftwareSerial"). It is possible to have multiple software serial ports with speeds up to 115200 bps. A parameter enables inverted signaling for devices which require that protocol. -

    -

    The version of SoftwareSerial included in 1.0 and later is based on the NewSoftSerial library by Mikal Hart. -

    -

    Limitations

    -

    The library has the following known limitations: -

    -

    • If using multiple software serial ports, only one can receive data at a time. -
    • Not all pins on the Mega and Mega 2560 support change interrupts, so only the following can be used for RX: 10, 11, 12, 13, 50, 51, 52, 53, 62, 63, 64, 65, 66, 67, 68, 69 -

    Example

    -
    -

    -

    -
    #include <SoftwareSerial.h>
    -
    -SoftwareSerial mySerial(2, 3);
    -
    -void setup()  
    -{
    -  Serial.begin(57600);
    -  Serial.println("Goodnight moon!");
    -
    -  // set the data rate for the SoftwareSerial port
    -  mySerial.begin(4800);
    -  mySerial.println("Hello, world?");
    -}
    -
    -void loop() // run over and over
    -{
    -  if (mySerial.available())
    -    Serial.write(mySerial.read());
    -  if (Serial.available())
    -    mySerial.write(Serial.read());
    -}
    -
    [Get Code]
    -
    - -

    -

    -

    Functions

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/SoftwareSerialAvailable.html b/build/linux/work/reference/SoftwareSerialAvailable.html deleted file mode 100644 index 30d671bab..000000000 --- a/build/linux/work/reference/SoftwareSerialAvailable.html +++ /dev/null @@ -1,133 +0,0 @@ - - - - Arduino Reference - SoftwareSerialAvailable - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    SoftwareSerial: available()

    -

    Description

    -

    Get the number of bytes (characters) available for reading from a software serial port. This is data that's already arrived and stored in the serial receive buffer. -

    -

    Syntax

    -

    mySerial.available() -

    -

    Parameters

    -

    none -

    -

    Returns

    -

    the number of bytes available to read -

    -

    Example

    -
    // include the SoftwareSerial library so you can use its functions:
-#include <SoftwareSerial.h>
-
-#define rxPin 2
-#define txPin 3
-
-// set up a new serial port
-SoftwareSerial mySerial =  SoftwareSerial(rxPin, txPin);
-
-void setup()  {
-  // define pin modes for tx, rx:
-  pinMode(rxPin, INPUT);
-  pinMode(txPin, OUTPUT);
-  // set the data rate for the SoftwareSerial port
-  mySerial.begin(9600);
-}
-
-void loop() {
-  if (mySerial.available()>0){
-  mySerial.read();
- }
-}
-
-
    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/SoftwareSerialBegin.html b/build/linux/work/reference/SoftwareSerialBegin.html deleted file mode 100644 index 8a81f0c2c..000000000 --- a/build/linux/work/reference/SoftwareSerialBegin.html +++ /dev/null @@ -1,128 +0,0 @@ - - - - Arduino Reference - SoftwareSerialBegin - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    SoftwareSerial: begin(speed)

    -

    Description

    -

    Sets the speed (baud rate) for the serial communication. Using speeds higher than 9600 baud will result in faulty communication. -

    -

    Parameters

    -

    speed: the baud rate (long) -

    -

    Returns

    -

    none -

    -

    Example

    -
    // include the SoftwareSerial library so you can use its functions:
-#include <SoftwareSerial.h>
-
-#define rxPin 2
-#define txPin 3
-
-// set up a new serial port
-SoftwareSerial mySerial =  SoftwareSerial(rxPin, txPin);
-
-void setup()  {
-  // define pin modes for tx, rx:
-  pinMode(rxPin, INPUT);
-  pinMode(txPin, OUTPUT);
-  // set the data rate for the SoftwareSerial port
-  mySerial.begin(9600);
-}
-
-void loop() {
-  // ...
-}
-
-
    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/SoftwareSerialConstructor.html b/build/linux/work/reference/SoftwareSerialConstructor.html deleted file mode 100644 index 420c6628b..000000000 --- a/build/linux/work/reference/SoftwareSerialConstructor.html +++ /dev/null @@ -1,171 +0,0 @@ - - - - Arduino Reference - SoftwareSerialConstructor - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    SoftwareSerial(rxPin, txPin)

    -

    Description

    -

    A call to SoftwareSerial(rxPin, txPin) creates a new SoftwareSerial object, whose name you need to provide as in the example below. -

    -

    You need to call SoftwareSerial.begin() to enable communication. -

    -

    Parameters

    -

    rxPin: the pin on which to receive serial data -

    -

    txPin: the pin on which to transmit serial data -

    -

    Example

    -

    -

    -
    #define rxPin 2
    -#define txPin 3
    -
    -// set up a new serial port
    -SoftwareSerial mySerial =  SoftwareSerial(rxPin, txPin);
    -
    [Get Code]
    -
    - -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/SoftwareSerialIsListening.html b/build/linux/work/reference/SoftwareSerialIsListening.html deleted file mode 100644 index d16236710..000000000 --- a/build/linux/work/reference/SoftwareSerialIsListening.html +++ /dev/null @@ -1,187 +0,0 @@ - - - - Arduino Reference - SoftwareSerialIsListening - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    SoftwareSerial: isListening()

    -

    Description

    -

    Tests to see if requested software serial port is actively listening. -

    -

    Syntax

    -

    mySerial.isListening() -

    -

    Parameters

    -

    none -

    -

    Returns

    -

    boolean -

    -

    Example

    -

    -

    -
    #include <SoftwareSerial.h>
    -
    -// software serial : TX = digital pin 2, RX = digital pin 3
    -SoftwareSerial portOne(2, 3);
    -
    -void setup()
    -{
    -  // Start the hardware serial port
    -  Serial.begin(9600);
    -
    -  // Start software serial port
    -  portOne.begin(9600);
    -}
    -
    -void loop()
    -{
    -  if (portOne.isListening()) {
    -   Serial.println("Port One is listening!");
    -}
    -
    [Get Code]
    -
    - -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/SoftwareSerialListen.html b/build/linux/work/reference/SoftwareSerialListen.html deleted file mode 100644 index d8dc11cef..000000000 --- a/build/linux/work/reference/SoftwareSerialListen.html +++ /dev/null @@ -1,205 +0,0 @@ - - - - Arduino Reference - SoftwareSerialListen - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    SoftwareSerial: listen()

    -

    Description

    -

    Enables the selected software serial port to listen. Only one software port can listen at a time. -

    -

    Syntax

    -

    mySerial.listen() -

    -

    Parameters

    -

    mySerial:the name of the instance to listen -

    -

    Returns

    -

    None -

    -

    Example

    -

    -

    -
    #include <SoftwareSerial.h>
    -
    -// software serial : TX = digital pin 2, RX = digital pin 3
    -SoftwareSerial portOne(2, 3);
    -
    -// software serial : TX = digital pin 4, RX = digital pin 5
    -SoftwareSerial portTwo(4, 5);
    -
    -void setup()
    -{
    -  // Start the hardware serial port
    -  Serial.begin(9600);
    -
    -  // Start both software serial ports
    -  portOne.begin(9600);
    -  portTwo.begin(9600);
    -
    -}
    -
    -void loop()
    -{
    -  portOne.listen();
    -
    -  if (portOne.isListening()) {
    -   Serial.println("Port One is listening!");
    -}else{
    -   Serial.println("Port One is not listening!");
    -}
    -
    -  if (portTwo.isListening()) {
    -   Serial.println("Port Two is listening!");
    -}else{
    -   Serial.println("Port Two is not listening!");
    -}
    -
    -}
    - 
    -
    [Get Code]
    -
    - -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/SoftwareSerialOverflow.html b/build/linux/work/reference/SoftwareSerialOverflow.html deleted file mode 100644 index abdb8bde1..000000000 --- a/build/linux/work/reference/SoftwareSerialOverflow.html +++ /dev/null @@ -1,187 +0,0 @@ - - - - Arduino Reference - SoftwareSerialOverflow - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    SoftwareSerial: overflow()

    -

    Description

    -

    Tests to see if a software serial buffer overflow has occurred. A software serial buffer can hold 64 bytes. -

    -

    Syntax

    -

    mySerial.overflow() -

    -

    Parameters

    -

    none -

    -

    Returns

    -

    boolean -

    -

    Example

    -

    -

    -
    #include <SoftwareSerial.h>
    -
    -// software serial : TX = digital pin 2, RX = digital pin 3
    -SoftwareSerial portOne(2, 3);
    -
    -void setup()
    -{
    -  // Start the hardware serial port
    -  Serial.begin(9600);
    -
    -  // Start software serial port
    -  portOne.begin(9600);
    -}
    -
    -void loop()
    -{
    -  if (portOne.overflow()) {
    -   Serial.println("SoftwareSerial overflow!");
    -}
    -
    [Get Code]
    -
    - -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/SoftwareSerialPrint.html b/build/linux/work/reference/SoftwareSerialPrint.html deleted file mode 100644 index d7c78d3ef..000000000 --- a/build/linux/work/reference/SoftwareSerialPrint.html +++ /dev/null @@ -1,199 +0,0 @@ - - - - Arduino Reference - SoftwareSerialPrint - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    SoftwareSerial: print(data)

    -

    Description

    -

    Prints data to the transmit pin of the software serial port. Works the same as the Serial.print() function. -

    -

    Parameters

    -

    vary, see Serial.print() for details -

    -

    Returns

    -

    byte
    print() will return the number of bytes written, though reading that number is optional -

    -

    Example

    -

    -

    -
    SoftwareSerial serial(6, 7);
    -int analogValue;
    -
    -void setup()
    -{
    -  serial.begin(9600);
    -}
    -
    -void loop()
    -{
    -  // read the analog input on pin 0:
    -  analogValue = analogRead(0);
    -
    -  // print it out in many formats:
    -  serial.print(analogValue);         // print as an ASCII-encoded decimal
    -  serial.print("\t");                // print a tab character
    -  serial.print(analogValue, DEC);    // print as an ASCII-encoded decimal
    -  serial.print("\t");                // print a tab character
    -  serial.print(analogValue, HEX);    // print as an ASCII-encoded hexadecimal
    -  serial.print("\t");                // print a tab character
    -  serial.print(analogValue, OCT);    // print as an ASCII-encoded octal
    -  serial.print("\t");                // print a tab character
    -  serial.print(analogValue, BIN);    // print as an ASCII-encoded binary
    -  serial.print("\t");                // print a tab character
    -  serial.print(analogValue/4, BYTE); // print as a raw byte value (divide the
    -                                     // value by 4 because analogRead() returns numbers
    -                                     // from 0 to 1023, but a byte can only hold values
    -                                     // up to 255)
    -  serial.print("\t");                // print a tab character    
    -  serial.println();                  // print a linefeed character
    -
    -  // delay 10 milliseconds before the next reading:
    -  delay(10);
    -}
    -
    [Get Code]
    -
    - -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/SoftwareSerialPrintln.html b/build/linux/work/reference/SoftwareSerialPrintln.html deleted file mode 100644 index 3d892b3e7..000000000 --- a/build/linux/work/reference/SoftwareSerialPrintln.html +++ /dev/null @@ -1,199 +0,0 @@ - - - - Arduino Reference - SoftwareSerialPrintln - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    SoftwareSerial: println(data)

    -

    Description

    -

    Prints data to the transmit pin of the software serial port, followed by a carriage return and line feed. Works the same as the Serial.println() function. -

    -

    Parameters

    -

    vary, see Serial.println() for details -

    -

    Returns

    -

    byte
    println() will return the number of bytes written, though reading that number is optional -

    -

    Example

    -

    -

    -
    SoftwareSerial serial(6, 7);
    -int analogValue;
    -
    -void setup()
    -{
    -  serial.begin(9600);
    -}
    -
    -void loop()
    -{
    -  // read the analog input on pin 0:
    -  analogValue = analogRead(0);
    -
    -  // print it out in many formats:
    -  serial.print(analogValue);         // print as an ASCII-encoded decimal
    -  serial.print("\t");                // print a tab character
    -  serial.print(analogValue, DEC);    // print as an ASCII-encoded decimal
    -  serial.print("\t");                // print a tab character
    -  serial.print(analogValue, HEX);    // print as an ASCII-encoded hexadecimal
    -  serial.print("\t");                // print a tab character
    -  serial.print(analogValue, OCT);    // print as an ASCII-encoded octal
    -  serial.print("\t");                // print a tab character
    -  serial.print(analogValue, BIN);    // print as an ASCII-encoded binary
    -  serial.print("\t");                // print a tab character
    -  serial.print(analogValue/4, BYTE); // print as a raw byte value (divide the
    -                                     // value by 4 because analogRead() returns numbers
    -                                     // from 0 to 1023, but a byte can only hold values
    -                                     // up to 255)
    -  serial.print("\t");                // print a tab character    
    -  serial.println();                  // print a linefeed character
    -
    -  // delay 10 milliseconds before the next reading:
    -  delay(10);
    -}
    -
    [Get Code]
    -
    - -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/SoftwareSerialRead.html b/build/linux/work/reference/SoftwareSerialRead.html deleted file mode 100644 index 53e2f1f0c..000000000 --- a/build/linux/work/reference/SoftwareSerialRead.html +++ /dev/null @@ -1,118 +0,0 @@ - - - - Arduino Reference - SoftwareSerialRead - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    SoftwareSerial: int read()

    -

    Description

    -

    Reads a character from the receive pin of the software serial port. This function waits for a character to arrive, reads it, and returns the character read. Data that arrives at other times is lost. -

    -

    Parameters

    -

    none -

    -

    Returns

    -

    the character read -

    -

    Example

    -
    SoftwareSerial serial(6, 7);
-
-void setup()
-{
-  serial.begin(9600);
-}
-
-void loop()
-{
-  char c = serial.read();
-} 
-
    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/reference/SoftwareSerialWrite.html b/build/linux/work/reference/SoftwareSerialWrite.html deleted file mode 100644 index a58b18362..000000000 --- a/build/linux/work/reference/SoftwareSerialWrite.html +++ /dev/null @@ -1,178 +0,0 @@ - - - - Arduino Reference - SoftwareSerialWrite - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    SoftwareSerial: write(data)

    -

    Description

    -

    Prints data to the transmit pin of the software serial port as raw bytes. Works the same as the Serial.write() function. -

    -

    Parameters

    -

    Serial.write() for details -

    -

    Returns

    -

    byte
    write() will return the number of bytes written, though reading that number is optional -

    -

    Example

    -

    -

    -
    SoftwareSerial mySerial(6, 7);
    -
    -void setup()
    -{
    -  mySerial.begin(9600);
    -}
    -
    -void loop()
    -{
    -  mySerial.write(45); // send a byte with the value 45
    -
    -   int bytesSent = mySerial.write(“hello”); //send the string “hello” and return the length of the string.
    -}
    -
    [Get Code]
    -
    - -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
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    sqrt(x)

    -

    Description

    -

    Calculates the square root of a number. -

    -

    Parameters

    -

    x: the number, any data type -

    -

    Returns

    -

    double, the number's square root. -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

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    Static

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    The static keyword is used to create variables that are visible to only one function. However unlike local variables that get created and destroyed every time a function is called, static variables persist beyond the function call, preserving their data between function calls. -

    -

    Variables declared as static will only be created and initialized the first time a function is called. -

    -

    Example

    -
    -
-
-/* RandomWalk
-* Paul Badger 2007
-* RandomWalk wanders up and down randomly between two
-* endpoints. The maximum move in one loop is governed by
-* the parameter "stepsize".
-* A static variable is moved up and down a random amount.
-* This technique is also known as "pink noise" and "drunken walk".
-*/
-
-#define randomWalkLowRange -20
-#define randomWalkHighRange 20
-int stepsize;
-
-int thisTime;
-int total;
-
-void setup()
-{
-  Serial.begin(9600);
-}
-
-void loop()
-{        //  tetst randomWalk function
-  stepsize = 5;
-  thisTime = randomWalk(stepsize);
-  Serial.println(thisTime);
-   delay(10);
-}
-
-int randomWalk(int moveSize){
-  static int  place;     // variable to store value in random walk - declared static so that it stores
-                         // values in between function calls, but no other functions can change its value
-
-  place = place + (random(-moveSize, moveSize + 1));
-
-  if (place < randomWalkLowRange){                    // check lower and upper limits
-    place = place + (randomWalkLowRange - place);     // reflect number back in positive direction
-  }
-  else if(place > randomWalkHighRange){
-    place = place - (place - randomWalkHighRange);     // reflect number back in negative direction
-  }
-
-  return place;
-}
-
-
-
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    Reference   Language | Libraries | Comparison | Changes -

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    Stepper Library

    -

    This library allows you to control unipolar or bipolar stepper motors. To use it you will need a stepper motor, and the appropriate hardware to control it. For more on that, see Tom Igoe's notes on steppers. -

    -

    Circuits

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    Functions

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    Circuit for Bipolar Stepper Motor

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    Two Pins

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    Four Pins

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    Stepper(steps, pin1, pin2)

    -

    Stepper(steps, pin1, pin2, pin3, pin4)

    -

    Description

    -

    This function creates a new instance of the Stepper class that represents a particular stepper motor attached to your Arduino board. Use it at the top of your sketch, above setup() and loop(). The number of parameters depends on how you've wired your motor - either using two or four pins of the Arduino board. -

    -

    Parameters

    -

    steps: the number of steps in one revolution of your motor. If your motor gives the number of degrees per step, divide that number into 360 to get the number of steps (e.g. 360 / 3.6 gives 100 steps). (int) -

    -

    pin1, pin2: two pins that are attached to the motor (int) -

    -

    pin3, pin4: optional the last two pins attached to the motor, if it's connected to four pins (int) -

    -

    Returns

    -

    A new instance of the Stepper motor class. -

    -

    Example

    -

    Stepper myStepper = Stepper(100, 5, 6); -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    Stepper: setSpeed(rpms)

    -

    Description

    -

    Sets the motor speed in rotations per minute (RPMs). This function doesn't make the motor turn, just sets the speed at which it will when you call step(). -

    -

    Parameters

    -

    rpms: the speed at which the motor should turn in rotations per minute - a positive number (long) -

    -

    Returns

    -

    None -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

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    - - - - - - - - -
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    Reference   Language | Libraries | Comparison | Changes -

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    Stepper: step(steps)

    -

    Description

    -

    Turns the motor a specific number of steps, at a speed determined by the most recent call to setSpeed(). This function is blocking; that is, it will wait until the motor has finished moving to pass control to the next line in your sketch. For example, if you set the speed to, say, 1 RPM and called step(100) on a 100-step motor, this function would take a full minute to run. For better control, keep the speed high and only go a few steps with each call to step(). -

    -

    Parameters

    -

    steps: the number of steps to turn the motor - positive to turn one direction, negative to turn the other (int) -

    -

    Returns

    -

    None -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - diff --git a/build/linux/work/reference/StepperUnipolarCircuit.html b/build/linux/work/reference/StepperUnipolarCircuit.html deleted file mode 100644 index a2344e7dd..000000000 --- a/build/linux/work/reference/StepperUnipolarCircuit.html +++ /dev/null @@ -1,96 +0,0 @@ - - - - Arduino Reference - StepperUnipolarCircuit - - - - - - - -
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    Circuits for Unipolar Stepper Motors

    -

    Two Pins

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-
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    Four Pins

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    - - - - - - - - -
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    Reference   Language | Libraries | Comparison | Changes -

    -

    string

    -

    Description

    -

    Text strings can be represented in two ways. you can use the String data type, which is part of the core as of version 0019, or you can make a string out of an array of type char and null-terminate it. This page described the latter method. For more details on the String object, which gives you more functionality at the cost of more memory, see the String object page. -

    -

    Examples

    -

    All of the following are valid declarations for strings. -

    -  char Str1[15];
-  char Str2[8] = {'a', 'r', 'd', 'u', 'i', 'n', 'o'};
-  char Str3[8] = {'a', 'r', 'd', 'u', 'i', 'n', 'o', '\0'};
-  char Str4[ ] = "arduino";
-  char Str5[8] = "arduino";
-  char Str6[15] = "arduino";
-
-
    -

    Possibilities for declaring strings -

    -

    • Declare an array of chars without initializing it as in Str1 -
    • Declare an array of chars (with one extra char) and the compiler will add the required null character, as in Str2 -
    • Explicitly add the null character, Str3 -
    • Initialize with a string constant in quotation marks; the compiler will size the array to fit the string constant and a terminating null character, Str4 -
    • Initialize the array with an explicit size and string constant, Str5 -
    • Initialize the array, leaving extra space for a larger string, Str6 -

    Null termination -

    -

    Generally, strings are terminated with a null character (ASCII code 0). This allows functions (like Serial.print()) to tell where the end of a string is. Otherwise, they would continue reading subsequent bytes of memory that aren't actually part of the string. -

    -

    This means that your string needs to have space for one more character than the text you want it to contain. That is why Str2 and Str5 need to be eight characters, even though "arduino" is only seven - the last position is automatically filled with a null character. Str4 will be automatically sized to eight characters, one for the extra null. In Str3, we've explicitly included the null character (written '\0') ourselves. -

    -

    Note that it's possible to have a string without a final null character (e.g. if you had specified the length of Str2 as seven instead of eight). This will break most functions that use strings, so you shouldn't do it intentionally. If you notice something behaving strangely (operating on characters not in the string), however, this could be the problem. -

    -

    Single quotes or double quotes? -

    -

    Strings are always defined inside double quotes ("Abc") and characters are always defined inside single quotes('A'). -

    -

    Wrapping long strings -

    -

    You can wrap long strings like this: -

    -char myString[] = "This is the first line"
-" this is the second line"
-" etcetera";
-
-
    -

    Arrays of strings -

    -

    It is often convenient, when working with large amounts of text, such as a project with an LCD display, to setup an array of strings. Because strings themselves are arrays, this is in actually an example of a two-dimensional array. -

    -

    In the code below, the asterisk after the datatype char "char*" indicates that this is an array of "pointers". All array names are actually pointers, so this is required to make an array of arrays. Pointers are one of the more esoteric parts of C for beginners to understand, but it isn't necessary to understand pointers in detail to use them effectively here. -

    -

    Example

    -
    -
-char* myStrings[]={"This is string 1", "This is string 2", "This is string 3",
-"This is string 4", "This is string 5","This is string 6"};
-
-void setup(){
-Serial.begin(9600);
-}
-
-void loop(){
-for (int i = 0; i < 6; i++){
-   Serial.println(myStrings[i]);
-   delay(500);
-   }
-}
-
    -

    See Also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

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    String

    -

    Description

    -

    The String class, part of the core as of version 0019, allows you to use and manipulate strings of text in more complex ways than character arrays do. You can concatenate Strings, append to them, search for and replace substrings, and more. It takes more memory than a simple character array, but it is also more useful. -

    -

    For reference, character arrays are referred to as strings with a small s, and instances of the String class are referred to as Strings with a capital S. Note that constant strings, specified in "double quotes" are treated as char arrays, not instances of the String class. -

    -

    Functions

    -

    Operators

    -

    Examples

    -

    See Also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

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    - - - - - -
    - - diff --git a/build/linux/work/reference/SwitchCase.html b/build/linux/work/reference/SwitchCase.html deleted file mode 100644 index 39d33ce8d..000000000 --- a/build/linux/work/reference/SwitchCase.html +++ /dev/null @@ -1,131 +0,0 @@ - - - - Arduino Reference - SwitchCase - - - - - - - -
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    -

    switch / case statements

    -

    Like if statements, switch...case controls the flow of programs by allowing programmers to specify different code that should be executed in various conditions. In particular, a switch statement compares the value of a variable to the values specified in case statements. When a case statement is found whose value matches that of the variable, the code in that case statement is run. -

    -

    The break keyword exits the switch statement, and is typically used at the end of each case. Without a break statement, the switch statement will continue executing the following expressions ("falling-through") until a break, or the end of the switch statement is reached. -

    -

    Example

    -
    -  switch (var) {
-    case 1:
-      //do something when var equals 1
-      break;
-    case 2:
-      //do something when var equals 2
-      break;
-    default: 
-      // if nothing else matches, do the default
-      // default is optional
-  }
-
-
    -

    Syntax

    -
    -switch (var) {
-  case label:
-    // statements
-    break;
-  case label:
-    // statements
-    break;
-  default: 
-    // statements
-}
-
-
    -

    Parameters

    -

    var: the variable whose value to compare to the various cases -

    -

    label: a value to compare the variable to -

    -

    See also:

    -

    if...else -Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

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    tan(rad)

    -

    Description

    -

    Calculates the tangent of an angle (in radians). The result will be between negative infinity and infinity. -

    -

    Parameters

    -

    rad: the angle in radians (float) -

    -

    Returns

    -

    The tangent of the angle (double) -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

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    Reference   Language | Libraries | Comparison | Changes -

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    tone()

    -

    Description

    -

    Generates a square wave of the specified frequency (and 50% duty cycle) on a pin. A duration can be specified, otherwise the wave continues until a call to noTone(). The pin can be connected to a piezo buzzer or other speaker to play tones. -

    -

    Only one tone can be generated at a time. If a tone is already playing on a different pin, the call to tone() will have no effect. If the tone is playing on the same pin, the call will set its frequency. -

    -

    Use of the tone() function will interfere with PWM output on pins 3 and 11 (on boards other than the Mega). -

    -

    NOTE: if you want to play different pitches on multiple pins, you need to call noTone() on one pin before calling tone() on the next pin. -

    -

    Syntax

    -

    tone(pin, frequency)
    tone(pin, frequency, duration) -

    -

    Parameters

    -

    pin: the pin on which to generate the tone -

    -

    frequency: the frequency of the tone in hertz - unsigned int -

    -

    duration: the duration of the tone in milliseconds (optional) - unsigned long -

    -

    Returns

    -

    nothing -

    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

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    - - - - - - - - -
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    Reference   Language | Libraries | Comparison | Changes -

    -

    unsigned char

    -

    Description

    -

    An unsigned data type that occupies 1 byte of memory. Same as the byte datatype. -

    -

    The unsigned char datatype encodes numbers from 0 to 255. -

    -

    For consistency of Arduino programming style, the byte data type is to be preferred. -

    -

    Example

    -
        unsigned char myChar = 240;
-
    -

    See also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

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    unsigned int

    -

    Description

    -

    Unsigned ints (unsigned integers) are the same as ints in -that they store a 2 byte value. Instead of storing negative numbers however they only store positive values, yielding a useful range of 0 to 65,535 (2^16) - 1). -

    -

    The difference between unsigned ints and (signed) ints, lies in the way the highest bit, sometimes refered to as the "sign" bit, is interpreted. In the Arduino int type (which is signed), if the high bit is a "1", the number is interpreted as a negative number, and the other 15 bits are interpreted with 2's complement math. -

    -

    Example

    -
        unsigned int ledPin = 13;
-
    -

    Syntax

    -
         unsigned int var = val;
-
    -

    • var - your unsigned int variable name -
    • val - the value you assign to that variable -

    Coding Tip

    -

    When variables are made to exceed their maximum capacity they "roll over" back to their minimum capacitiy, note that this happens in both directions -

    -

       unsigned int x
-   x = 0;
-   x = x - 1;       // x now contains 65535 - rolls over in neg direction
-   x = x + 1;       // x now contains 0 - rolls over
-
-
    -

    See Also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

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    - - - - - - - - -
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    unsigned long

    -

    Description

    -

    Unsigned long variables are extended size variables for number storage, and store 32 bits (4 bytes). Unlike standard longs unsigned longs won't store negative numbers, making their range from 0 to 4,294,967,295 (2^32 - 1). -

    -

    Example

    -
    -unsigned long time;
-
-void setup()
-{
-  Serial.begin(9600);
-}
-
-void loop()
-{
-  Serial.print("Time: ");
-  time = millis();
-  //prints time since program started
-  Serial.println(time);
-  // wait a second so as not to send massive amounts of data
-  delay(1000);
-}
-
-

    Syntax

    -
        unsigned long var = val;
-
    -

    • var - your long variable name -
    • val - the value you assign to that variable -

    See Also

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

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    Example:

    -
    -// actions are performed in the functions "setup" and "loop"
-// but  no information is reported to the larger program
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-void setup()
-{
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    -

    Example

    -
    -// toggles LED when interrupt pin changes state
-
-int pin = 13;
-volatile int state = LOW;
-
-void setup()
-{
-  pinMode(pin, OUTPUT);
-  attachInterrupt(0, blink, CHANGE);
-}
-
-void loop()
-{
-  digitalWrite(pin, state);
-}
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-void blink()
-{
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-}
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    Syntax

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    while(expression){
-  // statement(s)
-}
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    Parameters

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    expression - a (boolean) C statement that evaluates to true or false -

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-while(var < 200){
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    Wire Library

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    This library allows you to communicate with I2C / TWI devices. On most Arduino boards, SDA (data line) is on analog input pin 4, and SCL (clock line) is on analog input pin 5. On the Arduino Mega, SDA is digital pin 20 and SCL is 21. -

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    Functions

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    Note

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    Returns the number of bytes available for retrieval with receive(). This should be called on a master device after a call to requestFrom() or on a slave inside the onReceive() handler. -

    -

    available() inherits from the Stream utility class. -

    -

    Parameters

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    The number of bytes available for reading. -

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    Wire.begin()

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    Wire.begin(address)

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    Description

    -

    Initiate the Wire library and join the I2C bus as a master or slave. This should normally be called only once. -

    -

    Parameters

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    address: the 7-bit slave address (optional); if not specified, join the bus as a master. -

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    Reference Home -

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    Begin a transmission to the I2C slave device with the given address. Subsequently, queue bytes for transmission with the send() function and transmit them by calling endTransmission(). -

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    address: the 7-bit address of the device to transmit to -

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    Description

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    Ends a transmission to a slave device that was begun by beginTransmission() and actually transmits the bytes that were queued by send(). -

    -

    Parameters

    -

    None -

    -

    Returns

    -

    byte, which indicates the status of the transmission: -

    0
    success -
    1
    data too long to fit in transmit buffer -
    2
    received NACK on transmit of address -
    3
    received NACK on transmit of data -
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    other error -

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    Wire.onReceive(handler)

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    Description

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    Registers a function to be called when a slave device receives a transmission from a master. -

    -

    Parameters

    -

    handler: the function to be called when the slave receives data; this should take a single int parameter (the number of bytes received from the master) and return nothing, e.g.: void myHandler(int numBytes) -

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    Description

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    Register a function to be called when a master requests data from this slave device. -

    -

    Parameters

    -

    handler: the function to be called, takes no parameters and returns nothing, e.g.: void myHandler() -

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    Description

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    Reads a byte that was transmitted from a slave device to a master after a call to requestFrom() or was transmitted from a master to a slave. read() inherits from the Stream utility class. -

    -

    Syntax

    -

    Wire.read()
    -

    Parameters

    -

    none -

    -

    Returns

    -

    The next byte received -

    -

    Example

    -

    -

    -
    #include <Wire.h>
    -
    -void setup()
    -{
    -  Wire.begin();        // join i2c bus (address optional for master)
    -  Serial.begin(9600);  // start serial for output
    -}
    -
    -void loop()
    -{
    -  Wire.requestFrom(2, 6);    // request 6 bytes from slave device #2
    -
    -  while(Wire.available())    // slave may send less than requested
    -  {
    -    char c = Wire.read();    // receive a byte as character
    -    Serial.print(c);         // print the character
    -  }
    -
    -  delay(500);
    -}
    -
    [Get Code]
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    Wire.requestFrom(address, quantity)

    -

    Description

    -

    Used by the master to request bytes from a slave device. The bytes may then be retrieved with the available() and receive() functions. -

    -

    Parameters

    -

    address: the 7-bit address of the device to request bytes from -

    -

    quantity: the number of bytes to request -

    -

    Returns

    -

    None -

    -

    See Also

    -

    Reference Home -

    -

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    Wire -

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    write()

    -

    Description

    -

    Writes data from a slave device in response to a request from a master, or queues bytes for transmission from a master to slave device (in-between calls to beginTransmission() and endTransmission()). -

    -

    Syntax

    -

    Wire.write(value)
    Wire.write(string)
    Wire.write(data, length) -

    -

    Parameters

    -

    value: a value to send as a single byte -

    -

    string: a string to send as a series of bytes -

    -

    data: an array of data to send as bytes -

    -

    length: the number of bytes to transmit -

    -

    Returns

    -

    byte
    write() will return the number of bytes written, though reading that number is optional -

    -

    Example

    -

    -

    -
    #include <Wire.h>
    -
    -byte val = 0;
    -
    -void setup()
    -{
    -  Wire.begin(); // join i2c bus
    -}
    -
    -void loop()
    -{
    -  Wire.beginTransmission(44); // transmit to device #44 (0x2c)
    -                              // device address is specified in datasheet
    -  Wire.write(val);             // sends value byte  
    -  Wire.endTransmission();     // stop transmitting
    -
    -  val++;        // increment value
    -  if(val == 64) // if reached 64th position (max)
    -  {
    -    val = 0;    // start over from lowest value
    -  }
    -  delay(500);
    -}
    -
    [Get Code]
    -
    - -

    -

    See also

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    word

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    Description

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    A word stores a 16-bit unsigned number, from 0 to 65535. Same as an unsigned int. -

    -

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    -
        word w = 10000; 
-
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    word()

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    Description

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    Convert a value to the word data type or create a word from two bytes. -

    -

    Syntax

    -

    word(x)
    word(h, l) -

    -

    Parameters

    -

    x: a value of any type -

    -

    h: the high-order (leftmost) byte of the word -

    -

    l: the low-order (rightmost) byte of the word -

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    See also

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6f52489ef..000000000 --- a/build/linux/work/reference/environment.html +++ /dev/null @@ -1,3 +0,0 @@ - - - Redirect \ No newline at end of file diff --git a/build/linux/work/reference/img/logo.png b/build/linux/work/reference/img/logo.png deleted file mode 100644 index a9d58f500..000000000 Binary files a/build/linux/work/reference/img/logo.png and /dev/null differ diff --git a/build/linux/work/reference/index.html b/build/linux/work/reference/index.html deleted file mode 100644 index 006ea5e90..000000000 --- a/build/linux/work/reference/index.html +++ /dev/null @@ -1,250 +0,0 @@ - - - - Arduino Reference - Reference - - - - - - - -
    - - - - - - - - -
    - -
    -

    Reference   Language | Libraries | Comparison | Changes -

    -

    Language Reference

    -

    Arduino programs can be divided in three main parts: structure, values (variables and constants), and functions. -

    -

    -
    -

    Structure

    -

    Control Structures

    -

    Further Syntax

    -

    Arithmetic Operators

    -
    • = (assignment operator) -
    • +  (addition) -
    • - (subtraction) -
    • * (multiplication) -
    • / (division) -
    • % (modulo) -

    Comparison Operators

    -
    • == (equal to) -
    • != (not equal to) -
    • < (less than) -
    • > (greater than) -
    • <= (less than or equal to) -
    • >= (greater than or equal to) -

    Boolean Operators

    -
    • && (and) -
    • || (or) -
    • ! (not) -

    Pointer Access Operators

    -

    Bitwise Operators

    -
    • & (bitwise and) -
    • | (bitwise or) -
    • ^ (bitwise xor) -
    • ~ (bitwise not) -
    • << (bitshift left) -
    • >> (bitshift right) -

    Compound Operators

    -
    • ++ (increment) -
    • -- (decrement) -
    • += (compound addition) -
    • -= (compound subtraction) -
    • *= (compound multiplication) -
    • /= (compound division) -

    • &= (compound bitwise and) -
    • |= (compound bitwise or) -

    		 -

    Variables

    -

    Constants

    -

    Data Types

    -

    Conversion

    -

    Variable Scope & Qualifiers

    -

    Utilities

    -

    		 -

    Functions

    -

    Digital I/O -

    Analog I/O -

    Advanced I/O -

    Time -

    Math -

    Trigonometry -

    Random Numbers -

    -

    Bits and Bytes -

    External Interrupts -

    -

    Interrupts -

    -

    Communication -

    -

    Looking for something else? See the libraries page for interfacing with particular types of hardware. Try the list of community-contributed code. The Arduino language is based on C/C++. It links against AVR Libc and allows the use of any of its functions; see its user manual for details. -

    -

    -

    Reference Home -

    -

    Corrections, suggestions, and new documentation should be posted to the Forum. -

    -

    The text of the Arduino reference is licensed under a -Creative Commons Attribution-ShareAlike 3.0 License. Code samples in the reference are released into the public domain. -

    -
    - - -
    - - - - - -
    - - diff --git a/build/linux/work/revisions.txt b/build/linux/work/revisions.txt deleted file mode 100644 index 7590cac52..000000000 --- a/build/linux/work/revisions.txt +++ /dev/null @@ -1,651 +0,0 @@ -ARDUINO 1.0 - 2011.11.30 - -[environment] - -* The file extension for sketches has changed from .pde to .ino, to avoid - conflicts with the Processing software ("ino" are the last three letters - in "Arduino"). - -* There are a new set of toolbar icons, including a checkmark icon to - verify (compile) a sketch and an arrow for upload. The serial monitor - icon has moved to the right of the toolbar. Also, shift-clicking the - upload icon now uploads using a programmer (selected in the Tools menu). - You can still enable verbose output in the preferences dialog. (Icons - were designed by Nicholas Zambetti.) - -* There’s a new color scheme and about image for the IDE (by ToDo.to.it). - -* The name of the currently selected board and serial port are now shown - at the bottom of the editor. (Code from Wiring.) - -* A progress bar is displayed during compilation and upload. (from Wiring.) - -[core / libraries] - -* Serial transmission is now asynchronous - that is, calls to - Serial.print(), etc. add data to an outgoing buffer which is transmitted - in the background. Also, the Serial.flush() command has been repurposed - to wait for outgoing data to be transmitted, rather than dropping - received incoming data. - -* The behavior of Serial.print() on a byte has been changed to align it - with the other numeric data types. In particular, it will now print - the digits of its argument as separate ASCII digits (e.g. '1', '2', '3') - rather than a single byte. The BYTE keyword has been removed. To send a - single byte of data, use Serial.write() (which is present in Arduino 0022 - as well). - -* The Serial class (as well as other classes inheriting from Stream, like - EthernetClient, SoftwareSerial, Wire and more) now contains functions - for parsing incoming data, based on the TextFinder library by Michael - Margolis. They include find() and findUntil() to search for data, - parseInt() and parseFloat() for converting incoming characters into - numeric values, and readBytes() and readBytesUntil() for reading - multiple bytes into a buffer. They use a timeout that can be set with the - new setTimeout(). - -* The SoftwareSerial class has been reimplemented, using the code originally - written for the NewSoftSerial library by Mikal Hart. This allows for - multiple simultaneous instances, although only one can receive at a time. - -* Support has been added for printing strings stored in flash (program - memory) rather than RAM. Wrap double-quoted strings in F() to indicate - that they should be stored in flash, e.g. Serial.print(F("hello world")). - -* The String class has been reimplemented as well, by Paul Stoffregen. This - new version is more memory-efficient and robust. Some functions which - previously returned new string instances (e.g. trim() and toUpperCase()) - have been changed to instead modify strings in place. - -* Support for DHCP and DNS has been added to the Ethernet library, thanks - to integration by Adrian McEwen. Most classes in the Ethernet library - have been renamed to add a "Ethernet" prefix and avoid conflicts with - other networking libraries. In particular, "Client" is now - "EthernetClient", "Server" is "EthernetServer", and "UDP" is - "EthernetUDP". A new IPAddress class makes it easier to manipulate - those values. - -* The UDP API has been changed to be more similar to other libraries. - Outgoing packets are now constructed using calls to the standard write(), - print(), and println() functions – bracketed by beginPacket() and - endPacket(). The parsePacket() function checks for and parses an - incoming packet, which can then be read using available(), read(), and - peek(). The remoteIP() and remotePort() functions provide information - about the packet’s origin. (Again, thanks to Adrian McEwen for the - implementation.) - -* The Wire library has also been modified to use the standard read() and - write() functions instead of send() and receive(). You can also use - print() and println() for outgoing data. - -* The SD library now supports multiple simultaneous open files. It also - provides the isDirectory(), openNextFile(), and rewindDirectory() - functions for iterating through all the files in a directory. (Thanks - to Limor Fried.) - -[boards / firmwares] - -* Added the Arduino Mini w/ ATmega328. - -* Added Windows drivers (.inf files) and 16U2 firmware (.hex files) for - the rev. 3 boards (Uno, Mega, and Mega ADK). - -[internals] - -* The WProgram.h file, which provides declarations for the Arduino API, - has been renamed to Arduino.h. To create a library that will work in - both Arduino 0022 and Arduino 1.0, you can use an #ifdef that checks - for the ARDUINO constant, which was 22 and is now 100. For example: - - #if defined(ARDUINO) && ARDUINO >= 100 - #include "Arduino.h" - #else - #include "WProgram.h" - #endif - -* The write(), print(), and println() functions in Stream now return a - size_t (instead of void). This indicates the number of bytes actually - written by the function. Any classes that inherit from Stream will need - to change accordingly. Additionally the write(str) function has been - given a concrete implementation – it calls write(buf, len) - so - sub-classes don't need to (and shouldn't) implement it. - -* There are new abstract base-classes for Client, Server, and UDP to - provide portability across networking libraries. - -* The pin definitions for the Arduino boards (i.e. the mappings from pin - numbers to port register / bit pairs) is now stored in a sub-folder of - a new variants/ folder in the hardware folder. The variant to use for - a given board is specified by the BOARD.build.variant preference in the - boards.txt file. - -* The new, variant-specific pins_arduino.h files now provides additional - macros with information about the characteristics of the board (e.g. - the locations of the SPI and TWI pins, and the number of digital and - analog pins). - -* The avrdude included with the Mac and Windows versions of the Arduino - software has been upgraded to avrdude 5.11 (from an Arduino-specific - version of avrdude 5.4). The software now uses the "arduino" programmer - type in place of "stk500v1" for uploading to most Arduino boards. - -ARDUINO 0023 - 2011.11.09 - -* Added .inf files for R3 boards. -* Updated to optiboot 4.4. -* Included combined firmwares for ATmega16U2. - -ARDUINO 0022 - 2010.12.24 - -[core / libraries] - -* Adding an SD card library based on sdfatlib by Bill Greiman and the - MemoryCard library by Philip Lindsay (follower) for SparkFun. - http://arduino.cc/en/Reference/SD - -* Added character manipulation macros (from Wiring): isAlphaNumeric(), - isAlpha(), isAscii(), isWhitespace(), isControl(), isDigit(), isGraph(), - isLowerCase(), isPrintable(), isPunct(), isSpace(), isUpperCase(), - isHexadecimalDigit(), toAscii(), toLowerCase(), toLowerCase(). - http://code.google.com/p/arduino/issues/detail?id=418 - -* Added String.toInt() function. - -* Refactoring core to use register-based, not CPU-based, #ifdefs. - Patch by Mark Sproul. - http://code.google.com/p/arduino/issues/detail?id=307 - http://code.google.com/p/arduino/issues/detail?id=315 - http://code.google.com/p/arduino/issues/detail?id=316 - http://code.google.com/p/arduino/issues/detail?id=323 - http://code.google.com/p/arduino/issues/detail?id=324 - http://code.google.com/p/arduino/issues/detail?id=340 - -* Modification of serial baud rate calculation to match bootloader and 8U2 - firmware at 57600 baud. - http://code.google.com/p/arduino/issues/detail?id=394 - -* Fixed bug in tone() function. - http://code.google.com/p/arduino/issues/detail?id=361 - -* Fixed SPI.setClockDivider() function. - http://code.google.com/p/arduino/issues/detail?id=365 - -* Fixed EEPROM library on Mega 2560. - http://code.google.com/p/arduino/issues/detail?id=381 - -* Hardware serial receive interrupt optimization. - http://code.google.com/p/arduino/issues/detail?id=391 - -* Applying the timeout parameter of pulseIn() during measurement of the - pulse, not just while waiting for it. - -[environment] - -* Fixed problem with copy as html and angle brackets. - http://code.google.com/p/arduino/issues/detail?id=29 - -* Showing serial port selection dialog if serial port not found on upload. - -* Remembering serial monitor window size and line ending selection. - http://code.google.com/p/arduino/issues/detail?id=96 - http://code.google.com/p/arduino/issues/detail?id=330 - -* Replaced oro.jar regular expressions with java.regex ones (patch by - Eberhard Fahle and Christian Maglie). - http://code.google.com/p/arduino/issues/detail?id=171 - -* Building the user sketch before the core or libraries, so errors appear - faster. Patch by William Westfield and Paul Stoffregen. - http://code.google.com/p/arduino/issues/detail?id=393 - -* Setting application icon under Windows. - -ARDUINO 0021 - 2010.10.02 - -* Modifying VID / PID combination in 8U2 firmwares. -* Fixing analogWrite() bug on pins 9 and 10 (Arduino Uno). -* Patched RXTX to include /dev/ttyACM* on Linux. - -ARDUINO 0020 - 2010.09.27 - -* Added support for the Arduino Uno and Arduino Mega 2560. -* Including ATmega8U2 firmware used by Uno and Mega 2560. -* Including source code to optiboot bootloader used by the Uno. -* Including source code to the stk500v2 bootloader used by Mega 2560. -* New application icon (by ToDo). - -ARDUINO 0019 - 2010.09.03 - -[core / libraries] - -* Revised Ethernet library (by Christian Maglie). This depends on the - new SPI library, so existing sketches will need: #include - added to the top of their code. - -* Added an SPI library (by Christian Maglie). - http://code.google.com/p/arduino/issues/detail?id=240 - -* Added aliases for the analog input pins: A0, A1, etc. - http://code.google.com/p/arduino/issues/detail?id=244 - -* Added a String class. - -* Added a shiftIn() function (from Wiring). - http://code.google.com/p/arduino/issues/detail?id=280 - -* Updated version of Firmata supports Mega and capability querying. - -* More accurate delay() function from BenF. - http://code.google.com/p/arduino/issues/detail?id=237 - -* Re-enabling PWM after tone() ends. - http://code.google.com/p/arduino/issues/detail?id=228 - -* Added Serial.peek() method. - http://code.google.com/p/arduino/issues/detail?id=270 - -* Added Stream base class to Serial object (w/ available(), read() and - the write(), print(), and println() functions from the Print class). - http://code.google.com/p/arduino/issues/detail?id=60 - -* Disabling interrupts while digitalWrite() and pinMode() write to pins. - http://code.google.com/p/arduino/issues/detail?id=146 - -* Replacing INTERNAL analog reference with INTERNAL1V1 AND INTERNAL2V56 on - the Arduino Mega. http://code.google.com/p/arduino/issues/detail?id=194 - -[environment] - -* Added Arduino Fio to the boards menu. - -* Added Arduino Pro and Pro Mini (5V / 16 MHz) to the boards menu. - http://code.google.com/p/arduino/issues/detail?id=81 - -* Synchronized with the Processing 1.1 code base, bringing various changes. - -* Modified the parsing of avr-gcc / avr-g++ output and error messages. - -* Toggling RTS on upload for auto-reset with FTDI cables on Linux. - http://code.google.com/p/arduino/issues/detail?id=309 - -* Adding control over scrolling in serial monitor. - http://code.google.com/p/arduino/issues/detail?id=97 - -* Added drop-down for selecting line endings to the serial monitor. - http://code.google.com/p/arduino/issues/detail?id=119 - -* Fixed problem with tabs of the same name but different extensions. - http://code.google.com/p/arduino/issues/detail?id=191 - -* Allowing third-party hardware platforms to reference programmers defined - in other platforms. http://code.google.com/p/arduino/issues/detail?id=283 - -[examples] - -* Re-organized and numbered for easier access and better progression. - -ARDUINO 0018 - 2010.01.29 - -[core / libraries] - -* Added tone() and noTone() functions for frequency generation. -* Added Serial.end() command. -* Added precision parameter for printing of floats / doubles. -* Incorporated latest version of Firmata. -* Fixed bug w/ disabling use of the RW pin in the LiquidCrystal library. -* No longer disabling interrupts in delayMicroseconds(). -* Fixed bug w/ micros() returning incorrect values from within an interrupt. -* Fixed bug that broke use of analog inputs 8-15 on the Mega. - -[environment] - -* Synchronized with the Processing 1.0.9 code base, bringing various fixes, - including to a bug causing saving to fail when closing the last sketch. - -* Added support for third-party hardware in the SKETCHBOOK/hardware folder, - mirroring the current structure of the hardware folder in Arduino. - -* Added Ctrl-Shift-M / Command-Shift-M shortcut for serial monitor. - -* Hold down shift when pressing the Verify / Compile or Upload toolbar - buttons to generate verbose output (including command lines). - -* Moving build (on upload) from the applet/ sub-folder of the sketch - to a temporary directory (fixing problems with uploading examples from - within the Mac OS X disk image or a Linux application directory). - -* Fixed bug the prevented the inclusion of .cpp and .h (or .c and .h) files - of the same name in a sketch. - -* Improved the Mac OS X disk image (.dmg): added a shortcut to the - Applications folder, a background image with arrow, and new FTDI drivers. - -ARDUINO 0017 - 2009.07.25 - -[documentation / examples] -* Many new and revised examples from Tom Igoe. - -[core / libraries] -* Updated LiquidCrystal library by Limor Fried. See reference for details. -* Updated Firmata library to version 2.1 (rev. 25). -* Replaced the Servo library with one (MegaServo) by Michael Margolis. - Supports up to 12 servos on most Arduino boards and 48 on the Mega. -* Improving the accuracy of the baud rate calculations for serial - communication (fixing double-speed problems on 8 MHz Arduino boards). - Thanks to gabebear. - -[environment] -* Synchronized with the Processing 1.0.3 code base (rev. 5503), bringing - many improvements (listed below). -* New icons and about image by Thomas Glaser (envis precisely). -* Support for multiple sketch windows. -* The serial monitor now has its own window. -* Comment / Uncomment menu item (in Edit) and keyboard shortcut. -* Increase and Decrease Indent menu items (in Edit) and keyboard shortcuts. -* Support for third-party libraries in the SKETCHBOOK/libraries folder. -* Libraries are now compiled with the sketch, eliminating the delay when - switching boards and the need to delete .o files when changing library - source code. -* Arduino now comes as an app file (in a dmg) on the Mac. -* Adding the Arduino Nano w/ ATmega328 to the Tools > Board menu. - -ARDUINO 0016 - 2009.05.30 - -[documentation / examples] -* New communication examples (w/ corresponding Processing and Max/MSP code) by - Tom Igoe. - -[core / libraries] -* Adding support for the Arduino Pro and Pro Mini 3.3V / 8 MHz w/ ATmega328. -* Adding support for the LilyPad Arduino w/ ATmega328. -* Adding write(str) and write(buf, size) methods to Print, Serial, and the - Ethernet library Client and Server classes. This allows for more efficient - (fewer packet) Ethernet communication. (Thanks to mikalhart.) -* Improvements to the way the Ethernet library Client class connects and - disconnects. Should reduce or eliminate failed connections and long - timeouts. (Thanks to Bruce Luckcuck.) -* Optimizing the timer0 overflow interrupt handler (used for millis() and - micros()). Thanks to westfw and mikalhart. -* Fixing bug that limited the bit() macro to 15 bits. Thanks to Paul Badger. -* Adding ARDUINO version constant (thanks to prodding from mikalhart). - -[environment] -* Ordering the items in the Tools > Board menu. -* Adding "Copy as HTML" command to the Tools menu. -* Eliminating (maybe) the occasional "Couldn't determine program size" errors. - Thanks to the Clever Monkey. -* Moving selection of Linux look-and-feel into the arduino script so it can - be changed by users. Thanks to Eberhard Fahle. - -[tools] -* Adding automatic dependency generation to the Makefile. (Lars Immisch) - -ARDUINO 0015 - 2009.03.26 - -[core / libraries] -* Adding support for the Arduino Mega (ATmega1280). - -[environment] -* Reinstating use of core.a library in the build process, slightly shrinking - compiled sketch sizes. (Thanks to William Westfield.) -* Fixing bug in copy for forum (thanks to eried). - -ARDUINO 0014 - 2009.03.07 - -[core / libraries] -* Fixing bug that prevented multiple outgoing Client connections with the - ethernet library. - -[environment] -* Clarifying ATmega168 vs. ATmega328 in the Tools > Boards menu. - -[tools] -* Updating the Mac OS X AVR tools to AVR MacPack 20081213. This includes - avr-gcc 4.3.2, which should fix problems with functions called from - within interrupts. - -ARDUINO 0013 - 2009.02.06 - -[documentation / examples] -* Adding examples for Parallax Ping Sensor and Memsic 2125 accelerometer. - -[core / libraries] -* Adding support for the ATmega328. The upload speed is 57600 baud, so you - may need to edit boards.txt or reburn your bootloader if you bought an - ATmega328 w/ bootloader from adafruit or other supplier. -* Adding support for printing floats to Print class (meaning that it works - in the Serial, Ethernet, and LiquidCrystal classes too). Includes two - decimal places. -* Added word, word(), bitRead(), bitWrite(), bitSet(), bitClear(), bit(), - lowByte(), and highByte(); see reference for details. -* Working around problem that caused PWM output on pins 5 and 6 to never go - to 0 (causing, for example, an LED to continue to glow faintly). -* Removing cast macros, since function-style casts are a feature of C++. This - should fix contributed libraries that broke in Arduino 0012. -* Modifying pulseIn() to wait for a transition to start timing (i.e. ignoring - any pulse that had already started when the function was called). -* Fixing bug in random() that limited the ranges of values generated. Thanks - to Mikal Hart. -* Modifying delay() to pause for at least the given number of milliseconds. -* Fixing bug in Ethernet library that interfered with use of pins 8 and 9. -* Originating each outgoing network connection from a different port (in the - Client class of the Ethernet library). Thanks to Paul and joquer. -* Updating ATmega168 bootloader to work with standard distributions of avrdude - (responding to signature requests made with the universal SPI command) and - correctly store EEPROM data. Thanks to ladyada. - -[environment] -* Omitting unused functions from compiled sketches, reducing their size. -* Changing compilation process to allow for use of EEMEM directive (although - not yet uploading EEPROM data). - -ARDUINO 0012 - 2008.09.18 - -* Added Arduino Nano to the boards menu. -* Arduino Pro or Pro Mini (8 MHz) to the boards menu. -* Added Firmata library by Hans Steiner and others. This provides a standard - protocol for communicating with software on the computer. -* Added an Ethernet library for use with the Arduino Ethernet Shield. -* Added a Servo library based on the work of Jim Studt. -* Added a LiquidCrystal library based on the work in the playground. It - supports both 4- and 8-bit modes. -* Improved millis(): it now overflows after 49 days instead of 9 hours, but - now uses slightly more processing power. -* Fixed reversing direction bug in Stepper library. (Thanks to Wayne Holder.) -* Moved insertion of #include to after any comments and #include - statements in the main sketch file. This means that an #include - now works. -* Upgraded to newer versions of avr-gcc (4.3.0) and avr-libc (1.6). This - provides support for newer Atmel chips, but may increase the size - of sketches. -* Allowing per-board specification of the upload.using preference, allowing - upload via bootloader to some boards and via a programmer to others. -* Added return values to some functions in the Wire library to allow for - better error handling. -* Fixed random() to work with long values. -* Creation of an abstract Print base-class to allow Serial, SoftwareSerial, - and LiquidCrystal to share code for print() and println(). -* Incorporated ladyada's watchdog timer mods to the bootloader source, but - only compiling them in for the Pro and Pro Mini (because they are included - in the bootloader being burned on the boards by SparkFun). - -ARDUINO 0011 - 2008.03.28 - -* Fixed Find in Reference. -* Added map() function for mapping values from one range to another. -* Added analogReference() function. -* Added interrupts() and noInterrupts() functions. -* Added degrees() and radians() functions. -* Added timeout parameter (in microseconds) to pulseIn(); default is 1 second. -* Support for uploading sketch using a programmer. -* Improved detection of functions that need prototyping. -* Placing function prototypes after #include's and #define's. -* No longer moving #include statements to the top of the sketch. -* Can now drag .pde files onto the Arduino dock icon on Mac OS X. - Thanks to Peter Sgouros. -* New script for downloading the reference from Tom Pollard. Thanks Tom! -* Miscellaneous Mac OS X and other patches from Wim Lewis. Thanks Wim! -* Updated Mac OS X FTDI drivers. - -ARDUINO 0010 - 2007.10.11 - -* Support for the LilyPad Arduino. -* Vista support. -* Mac OS X universal distribution. -* Printing! -* Copy for discourse. -* New Board menu replaces the Microcontroller menu. -* New Burn Bootloader menu offers a choice of programmers. -* New and improved keyboard shortcuts. -* Fixed some find/replace bugs. -* Better auto-format. -* Improved error messages when uploading. -* Support for COM10 and higher on Windows. -* Fixed automatic refresh of the Serial Port menu under Windows. -* Quaqua look-and-feel on Mac OS X. -* Reorganization of the Arduino application directory. - -ARDUINO 0009 - 2007.08.06 - -* Added support for the Arduino Diecimila. -* Switched to using avrdude (instead of uisp) for uploading sketches. -* Added the ability to burn NG and Diecimila bootlaoders (with an AVRISPmkII). -* Fixed a bug in SoftwareSerial (a hardware serial function was being called - instead of the software serial equivalent). Thanks to brianbr for the - report and fix. - -ARDUINO 0008 - 2007.06.09 - -* Updated examples (in distribution and on the website). -* Added an EEPROM library (see reference for details). -* Added a Stepper motor library (see reference). -* Patched to reduce binary sketch sizes by building the Arduino core as - a library (.a) file - now only the needed parts of the core are linked into - a sketch. Originally written by Nicolas Roland, revised by Don Cross. -* Fixed bug in Serial.available(). Report and fix by Don Cross. -* Now recompiling libraries when switching microcontrollers. Report by - Julian Bleecker; fix by Nicholas Zambetti. -* Cleaned up core functions: moved pin definitions into program space to save - RAM, and other minor improvements. Contributed by Jim Studt. -* Lots of reference additions and fixes from Paul Badger. -* Changed default microcontroller to ATmega168 from ATmega8. -* Removed the delay from analogRead(). -* Activating TWI/I2C pullup resistors on the ATmega168 (in addition to the - ATmega8). - -ARDUINO 0007 - 2006.12.25 - -* Smaller core (about 3.5 KB instead of 4.5 KB). -* Added a SoftwareSerial library (thanks to Antonio, Heather Dewey-Hagborg, and - bigengineer for their help). -* Implemented a Serial.flush() routine; see reference for details. -* Digital pins 0 and 1 can be used for i/o until a call to Serial.begin(). -* Replaced avr-lib's uart routines with custom code for handling serial - communication and modified C++ serial commands to call the C serial commands; - the code may behave slightly differently in border cases (e.g. non-standard - speeds, or on overflow). -* Added attachInterrupt() and detachInterrupt() functions for handling of - external interrupts on pins 2 and 3. -* Implemented shiftOut() routine; see reference for details. -* Defining binary constants: e.g. B1010 is 6. -* Mac versions no longer require running of the macosx_setup.command script. -* Windows version comes with the FTDI USB drivers already unzipped. -* New Linux binary distribution (still requires some programs to be - pre-installed). - -ARDUINO 0006 - 2006.10.21 - -* Mac version no longer requires Java 1.5, meaning it should run on 10.3.9. -* Added support for analog inputs 6 and 7 and pwm on pins 5 and 6 on the - on the ATmega168 used in the Arduino Mini (extra analog inputs not available - in DIP ATmega168s). -* You now select the baud rate for the serial monitor from within the editor - status bar when the serial monitor is running instead of from the Tools menu. -* Pressing enter within the serial monitor edit box no longer appends a newline - to the message sent to the board. -* Included the Wire (TWI) library from Wiring. -* Updated the reference. - -ARDUINO 0005 - 2006.09.26 - -* Applied patch from Hans Steiner to improve Linux support by searching for avr - tools in the user's path instead of expecting them at a fixed location. -* Added an upload.verbose preference for help in debugging. -* ATmega168 support! -* New Wiring-compatible randomSeed(), random(max) and random(min, max) functions - (except operating on longs instead of floats). -* Fixed bug that sometimes caused uploading of old versions of a sketch. -* Serial monitor nows include an interface to send messages to the Arduino - board. Pressing return appends a newline, pushing the send button doesn't. -* Now displaying "burning bootloader..." and "compiling..." status messages. - -ARDUINO 0004 - 2006.04.26 - -* Main sketch is now compiled as C++ (instead of C). -* Updated avr toolchain. -* printInteger(), printHex(), etc. now handle longs. -* millis() fixed (now overflows after days, not minutes) -* Fixed path to java in Windows run.bat. -* Added Matrix and Sprite libraries (written with Nicholas Zambetti). -* PWM now working on pin 11 (in addition to pins 9 and 10). -* Slowed PWM frequency (on all three PWM pins) to 1KHz. -* Now give an error if compiled sketch is too big. -* Fixed abs(), min(), max(), and constrain() macros. -* Added menu items to the IDE to burn bootloader. -* Now display binary sketch size on upload, and give error if too big. -* Added C++ serial library. -* Resynced with Processing/Wiring IDE code (improved auto-format, faster logging - to serial monitor console, other bug fixes) -* New library system. -* Updated to latest version of the RXTX serial library; Mac users will need to - rerun macosx_setup.command. - -ARDUINO 0003 - 2006.01.16 - -API Changes -* Reversed the analog input pins to correspond to newer boards. This means - a call, for example, to analogRead(0) must be changed to analogRead(5) in - order to read the same physical pin. -* Added a printNewline() function (which sends '\n' = ASCII 10). - -New Stuff -* Reference is included (features native to C not yet documented). -* Serial monitor added (click the toolbar button to turn it on or off). Baud - rate is controlled by the Serial Monitor Baud Rate Menu, defaults to 9600. - Icon and implementation from Wiring. -* Serial port menu now automatically refreshes when opened. -* New blue color scheme and icons courtesy of Noah Shibley (colors are hardcoded - into the source to ensure consistency with image files). -* Keyspan and FTDI USB drivers included with Mac and Windows distributions. - -Bug Fixes -* millis() now updates every millisecond instead of every second. -* Bootloader included with Windows distribution (it was already in the Mac - dist). -* Updated icon of the Windows executable. -* Now flushing the serial port before uploading (should fix some errors). -* Improved accuracy of the delayMicroseconds() function. - -Other -* Upload rate no longer selectable from a menu within the IDE. Instead, edit - the serial.download_rate item in the preferences.txt file. -* Created Xcode project for building Arduino on the Mac (doesn't yet regenerate - the grammar files or package the distribution); active target should be "App". -* Removed unused or unimplemented items from menus. - -ARDUINO 0002 - 2005.10.05 - -* New build process no longer uses makefiles; now controlled by preferences.txt. -* core/ replaced with targets/; can now link against Wiring libraries. -* Replaced print() with printString, printInteger, printHex, printByte, etc. -* Added menu for selecting serial port speed. -* Updated icon. -* Bootloader shrunk to less than 1 KB; fuses updated accordingly. -* Added serialRead(), serialAvailable(), and delayMicroseconds(). - -ARDUINO 0001 - 2005.08.25 - -* This is the first released of the unified IDE + language library - it's a terrible hack... but it works. at the moment it's in alpha stage - but it can be used to work. -* The processing preprocessor is included but not used. diff --git a/build/linux/work/tools/Mangler/make.sh b/build/linux/work/tools/Mangler/make.sh deleted file mode 100644 index e1c1ce37b..000000000 --- a/build/linux/work/tools/Mangler/make.sh +++ /dev/null @@ -1,11 +0,0 @@ -#!/bin/sh - -# The pde.jar file may be buried inside the .app file on Mac OS X. -PDE=`find ../.. -name pde.jar` - -javac -target 1.5 \ - -cp "../../lib/core.jar:$PDE" \ - -d bin \ - src/Mangler.java - -cd bin && zip -r ../tool/mangler.jar * && cd .. diff --git a/build/linux/work/tools/Mangler/src/Mangler.java b/build/linux/work/tools/Mangler/src/Mangler.java deleted file mode 100644 index cfd527954..000000000 --- a/build/linux/work/tools/Mangler/src/Mangler.java +++ /dev/null @@ -1,94 +0,0 @@ -/* -*- mode: java; c-basic-offset: 2; indent-tabs-mode: nil -*- */ - -/* - Part of the Processing project - http://processing.org - - Copyright (c) 2008 Ben Fry and Casey Reas - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software Foundation, - Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -*/ - -package com.transformers.supermangletron; - - -import java.text.SimpleDateFormat; -import java.util.Date; - -import javax.swing.JOptionPane; - -import processing.app.Editor; -import processing.app.tools.Tool; - - -/** - * Example Tools menu entry. - */ -public class Mangler implements Tool { - Editor editor; - - - public void init(Editor editor) { - this.editor = editor; - } - - - public String getMenuTitle() { - return "Mangle Selection"; - } - - - public void run() { - String sketchName = editor.getSketch().getName(); - - Object[] options = { "Yes, please", "No, thanks" }; - int result = JOptionPane.showOptionDialog(editor, - "Is " + sketchName + - " ready for destruction?", - "Super Mangle Tron", - JOptionPane.YES_NO_OPTION, - JOptionPane.QUESTION_MESSAGE, - null, - options, - options[1]); - if (result == JOptionPane.YES_OPTION) { - mangleSelection(); - } - } - - - protected void mangleSelection() { - if (editor.isSelectionActive()) { - String selection = editor.getSelectedText(); - char[] stuff = selection.toCharArray(); - // Randomly swap a bunch of characters in the text - for (int i = 0; i < stuff.length / 10; i++) { - int a = (int) (Math.random() * stuff.length); - int b = (int) (Math.random() * stuff.length); - if (stuff[a] == '\n' || stuff[b] == '\n') { - continue; // skip newline characters - } - stuff[a] = selection.charAt(b); - stuff[b] = selection.charAt(a); - } - editor.startCompoundEdit(); - editor.setSelectedText(new String(stuff)); - editor.stopCompoundEdit(); - editor.statusNotice("Now that feels better, doesn't it?"); - - } else { - editor.statusError("No selection, no dice."); - } - } -} diff --git a/build/linux/work/tools/howto.txt b/build/linux/work/tools/howto.txt deleted file mode 100644 index 77df31c91..000000000 --- a/build/linux/work/tools/howto.txt +++ /dev/null @@ -1,143 +0,0 @@ -TOOLS IN PROCESSING - -With initial help from code contributed by fjen, Processing release 0147 and -later have a dynamically loading tools menu, which can be used to expand the -environment in fun and fantastic ways. - -A Tool is a chunk of code that runs from the Tools menu. Tools are a means -of building onto the Processing Development Environment without needing to -rebuild the beast from source. - -The interface (at least for now) is extremely simple: - - -package processing.app.tools.Tool; - -public interface Tool extends Runnable { - - public void init(Editor editor); - - public void run(); - - public String getMenuTitle(); -} - - -The init() method is called when an Editor window first opens. This means -you won't have access to a sketch object, or a GUI, and should only do minimal -setup. (However it'd be a good idea to stash the "Editor" object for later.) - -The run() method will be called by the main application when the tool is -selected from the menu. This is called using invokeLater(), so that the tool -can safely use Swing and any other GUI yackety yack. If you're using a Frame, -you'll need to detect whether the Frame is already open (and bring it to the -front) or whether to create a new window. - -Faceless tools also use the run() method. You should avail yourselves of the -statusNotice() and statusError() methods in Editor, to let the user know what's -happened. (As per p. 107 of the Processing Development Environment Tools -Reference User Interface Guide.) - -The getMenuTitle() method just returns the title for what should appear in the -Tools menu. Not doing shortcuts for now, because resolving them between tools -(and the rest of the interface) is fugly. We would also need additional -modifiers for shift and alt. It just gets messy quick. Ordering in the Tools -menu is alphabetical. - - -////////////////////////////////////////////////////////////// - - -Where to put Tools - -Core tools live inside the "tools" subfolder of the Processing distribution, -however users should install "contributed" tools in their sketchbook folder, -inside a subfolder named "tools". - -If a tool works only with a particular release of Processing, then it may make -sense for the user to put things into the Processing tools folder, however we'd -like to keep users out of there as much as possible. In fact, it may not be -visible in future releases of Processing (for instance, on Mac OS X, the tools -folder is hidden inside the .app bundle). - -Tools should be laid out similar to libraries, though the structure is a little -more flexible. The tool folder should be the name of the main class (without -its package name but using the same capitalization), and have a subfolder named -"tool" that contains the .jar and .zip files it uses. I'll use the included -"Mangler" tool as an example. - -(This Tool is not built by default, due to a lack of non-dubious arguments -regarding the usefulness of including (by default) a Tool that mangles code.) - -The folder should be called Mangler (note the capitalization), and contain: - -sketchbook/Mangler -> tool folder -sketchbook/Mangler/tool -> location for code -sketchbook/Mangler/tool/mangle.jar -> jar with one or more classes - -The naming of jar and zip files in the tool/* directory doesn't matter. - -When Processing loads, the jar and zip files will be searched for -Mangler.class. Even though this tool is found in package poos.shoe, -it will be sussed out. Package names are required. - -Loose .class files are not supported, use only jar and zip files. - - -////////////////////////////////////////////////////////////// - - -What You Can and Cannot Do - -The only API methods that are officially scrubbed and sanctioned by the -Commissioner on Fair API and Proper Manners for use by the Tools classes -are found in: - -processing.app.Base -processing.app.Editor -processing.app.Preferences -processing.app.Sketch -processing.app.SketchCode - -In fact, most of the API you should be talking to is inside Editor. -Full API documentation can be found on dev.processing.org: -http://dev.processing.org/reference/everything/ -(Keep in mind that this is not always perfectly up to date, but we'll try.) - -Of course, you're welcome to go spelunking through the rest of the API -(that's where all the fun stuff is anyway), but don't be upset when something -changes and breaks your tool and makes your users sad. - -Currently, native code is not supported with tools. This might be possible, -but it's another potentially messy thing to dynamically add native library -paths to running code. (See "Future Releases" below.) - - -////////////////////////////////////////////////////////////// - - -Future Releases - -In future releases, we are considering the following features: - -1. How shortcut keys are handled. - http://dev.processing.org/bugs/show_bug.cgi?id=140 - -2. Whether to allow tools to dock into the Preferences panel. - http://dev.processing.org/bugs/show_bug.cgi?id=883 - -3. A means to run native code from the Tools menu. - http://dev.processing.org/bugs/show_bug.cgi?id=884 - -4. Methods for reorganizing the Tools menu, or placing contributed - Tools inside other menus (such as Edit or Sketch). - http://dev.processing.org/bugs/show_bug.cgi?id=885 - -This is the first round of documentation for the Tools menu, we reserve the -right to update, clarify, and change our mind in future releases. - - -////////////////////////////////////////////////////////////// - - -Ben Fry, last updated 19 August 2008