mirror of
https://github.com/arduino/Arduino.git
synced 2025-01-18 07:52:14 +01:00
Implemented serial transmit buffering.
Now Serial.write() places characters in the transmit buffer, and the data register empty interrupt reads and transmit them. Based loosely on the implementation here: ftp://wookey.org.uk/arduino. http://code.google.com/p/arduino/issues/detail?id=262
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@ -34,46 +34,50 @@
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#include "HardwareSerial.h"
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#include "HardwareSerial.h"
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// Define constants and variables for buffering incoming serial data. We're
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// Define constants and variables for buffering incoming serial data. We're
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// using a ring buffer (I think), in which rx_buffer_head is the index of the
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// using a ring buffer (I think), in which head is the index of the location
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// location to which to write the next incoming character and rx_buffer_tail
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// to which to write the next incoming character and tail is the index of the
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// is the index of the location from which to read.
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// location from which to read.
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#if (RAMEND < 1000)
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#if (RAMEND < 1000)
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#define RX_BUFFER_SIZE 32
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#define SERIAL_BUFFER_SIZE 16
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#else
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#else
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#define RX_BUFFER_SIZE 128
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#define SERIAL_BUFFER_SIZE 64
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#endif
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#endif
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struct ring_buffer
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struct ring_buffer
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{
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{
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unsigned char buffer[RX_BUFFER_SIZE];
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unsigned char buffer[SERIAL_BUFFER_SIZE];
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int head;
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volatile int head;
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int tail;
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volatile int tail;
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};
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};
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#if defined(UBRRH) || defined(UBRR0H)
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#if defined(UBRRH) || defined(UBRR0H)
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ring_buffer rx_buffer = { { 0 }, 0, 0 };
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ring_buffer rx_buffer = { { 0 }, 0, 0 };
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ring_buffer tx_buffer = { { 0 }, 0, 0 };
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#endif
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#endif
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#if defined(UBRR1H)
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#if defined(UBRR1H)
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ring_buffer rx_buffer1 = { { 0 }, 0, 0 };
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ring_buffer rx_buffer1 = { { 0 }, 0, 0 };
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ring_buffer tx_buffer1 = { { 0 }, 0, 0 };
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#endif
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#endif
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#if defined(UBRR2H)
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#if defined(UBRR2H)
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ring_buffer rx_buffer2 = { { 0 }, 0, 0 };
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ring_buffer rx_buffer2 = { { 0 }, 0, 0 };
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ring_buffer tx_buffer2 = { { 0 }, 0, 0 };
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#endif
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#endif
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#if defined(UBRR3H)
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#if defined(UBRR3H)
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ring_buffer rx_buffer3 = { { 0 }, 0, 0 };
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ring_buffer rx_buffer3 = { { 0 }, 0, 0 };
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ring_buffer tx_buffer3 = { { 0 }, 0, 0 };
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#endif
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#endif
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inline void store_char(unsigned char c, ring_buffer *rx_buffer)
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inline void store_char(unsigned char c, ring_buffer *buffer)
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{
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{
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int i = (unsigned int)(rx_buffer->head + 1) % RX_BUFFER_SIZE;
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int i = (unsigned int)(buffer->head + 1) % SERIAL_BUFFER_SIZE;
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// if we should be storing the received character into the location
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// if we should be storing the received character into the location
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// just before the tail (meaning that the head would advance to the
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// just before the tail (meaning that the head would advance to the
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// current location of the tail), we're about to overflow the buffer
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// current location of the tail), we're about to overflow the buffer
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// and so we don't write the character or advance the head.
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// and so we don't write the character or advance the head.
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if (i != rx_buffer->tail) {
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if (i != buffer->tail) {
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rx_buffer->buffer[rx_buffer->head] = c;
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buffer->buffer[buffer->head] = c;
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rx_buffer->head = i;
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buffer->head = i;
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}
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}
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}
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}
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@ -167,16 +171,105 @@ inline void store_char(unsigned char c, ring_buffer *rx_buffer)
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#endif
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#endif
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#if !defined(UART0_UDRE_vect) && !defined(UART_UDRE_vect) && !defined(USART0_UDRE_vect) && !defined(USART_UDRE_vect)
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#error Don't know what the Data Register Empty vector is called for the first UART
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#else
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#if defined(UART0_UDRE_vect)
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ISR(UART0_UDRE_vect)
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#elif defined(UART_UDRE_vect)
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ISR(UART_UDRE_vect)
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#elif defined(USART0_UDRE_vect)
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ISR(USART0_UDRE_vect)
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#elif defined(USART_UDRE_vect)
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ISR(USART_UDRE_vect)
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#endif
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{
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if (tx_buffer.head == tx_buffer.tail) {
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// Buffer empty, so disable interrupts
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#if defined(UCSR0B)
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cbi(UCSR0B, UDRIE0);
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#else
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cbi(UCSRB, UDRIE);
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#endif
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}
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else {
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// There is more data in the output buffer. Send the next byte
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unsigned char c = tx_buffer.buffer[tx_buffer.tail];
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tx_buffer.tail = (tx_buffer.tail + 1) % SERIAL_BUFFER_SIZE;
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#if defined(UDR0)
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UDR0 = c;
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#elif defined(UDR)
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UDR = c;
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#else
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#error UDR not defined
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#endif
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}
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}
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#endif
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#ifdef USART1_UDRE_vect
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ISR(USART1_UDRE_vect)
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{
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if (tx_buffer1.head == tx_buffer1.tail) {
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// Buffer empty, so disable interrupts
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cbi(UCSR1B, UDRIE1);
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}
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else {
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// There is more data in the output buffer. Send the next byte
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unsigned char c = tx_buffer1.buffer[tx_buffer1.tail];
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tx_buffer1.tail = (tx_buffer1.tail + 1) % SERIAL_BUFFER_SIZE;
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UDR1 = c;
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}
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}
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#endif
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#ifdef USART2_UDRE_vect
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ISR(USART2_UDRE_vect)
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{
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if (tx_buffer2.head == tx_buffer2.tail) {
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// Buffer empty, so disable interrupts
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cbi(UCSR2B, UDRIE2);
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}
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else {
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// There is more data in the output buffer. Send the next byte
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unsigned char c = tx_buffer2.buffer[tx_buffer2.tail];
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tx_buffer2.tail = (tx_buffer2.tail + 1) % SERIAL_BUFFER_SIZE;
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UDR2 = c;
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}
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}
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#endif
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#ifdef USART3_UDRE_vect
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ISR(USART3_UDRE_vect)
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{
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if (tx_buffer3.head == tx_buffer3.tail) {
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// Buffer empty, so disable interrupts
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cbi(UCSR3B, UDRIE3);
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}
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else {
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// There is more data in the output buffer. Send the next byte
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unsigned char c = tx_buffer3.buffer[tx_buffer3.tail];
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tx_buffer3.tail = (tx_buffer3.tail + 1) % SERIAL_BUFFER_SIZE;
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UDR3 = c;
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}
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}
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#endif
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// Constructors ////////////////////////////////////////////////////////////////
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// Constructors ////////////////////////////////////////////////////////////////
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HardwareSerial::HardwareSerial(ring_buffer *rx_buffer,
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HardwareSerial::HardwareSerial(ring_buffer *rx_buffer, ring_buffer *tx_buffer,
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volatile uint8_t *ubrrh, volatile uint8_t *ubrrl,
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volatile uint8_t *ubrrh, volatile uint8_t *ubrrl,
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volatile uint8_t *ucsra, volatile uint8_t *ucsrb,
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volatile uint8_t *ucsra, volatile uint8_t *ucsrb,
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volatile uint8_t *udr,
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volatile uint8_t *udr,
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uint8_t rxen, uint8_t txen, uint8_t rxcie, uint8_t udre, uint8_t u2x)
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uint8_t rxen, uint8_t txen, uint8_t rxcie, uint8_t udrie, uint8_t u2x)
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{
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{
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_rx_buffer = rx_buffer;
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_rx_buffer = rx_buffer;
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_tx_buffer = tx_buffer;
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_ubrrh = ubrrh;
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_ubrrh = ubrrh;
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_ubrrl = ubrrl;
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_ubrrl = ubrrl;
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_ucsra = ucsra;
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_ucsra = ucsra;
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@ -185,7 +278,7 @@ HardwareSerial::HardwareSerial(ring_buffer *rx_buffer,
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_rxen = rxen;
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_rxen = rxen;
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_txen = txen;
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_txen = txen;
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_rxcie = rxcie;
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_rxcie = rxcie;
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_udre = udre;
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_udrie = udrie;
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_u2x = u2x;
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_u2x = u2x;
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}
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}
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@ -220,18 +313,21 @@ void HardwareSerial::begin(long baud)
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sbi(*_ucsrb, _rxen);
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sbi(*_ucsrb, _rxen);
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sbi(*_ucsrb, _txen);
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sbi(*_ucsrb, _txen);
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sbi(*_ucsrb, _rxcie);
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sbi(*_ucsrb, _rxcie);
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cbi(*_ucsrb, _udrie); // XXX: what if there's already data in the tx buffer?
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}
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}
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// XXX: should we empty the rx and tx buffers here?
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void HardwareSerial::end()
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void HardwareSerial::end()
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{
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{
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cbi(*_ucsrb, _rxen);
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cbi(*_ucsrb, _rxen);
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cbi(*_ucsrb, _txen);
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cbi(*_ucsrb, _txen);
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cbi(*_ucsrb, _rxcie);
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cbi(*_ucsrb, _rxcie);
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cbi(*_ucsrb, _udrie);
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}
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}
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int HardwareSerial::available(void)
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int HardwareSerial::available(void)
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{
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{
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return (unsigned int)(RX_BUFFER_SIZE + _rx_buffer->head - _rx_buffer->tail) % RX_BUFFER_SIZE;
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return (unsigned int)(SERIAL_BUFFER_SIZE + _rx_buffer->head - _rx_buffer->tail) % SERIAL_BUFFER_SIZE;
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}
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}
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int HardwareSerial::peek(void)
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int HardwareSerial::peek(void)
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@ -250,7 +346,7 @@ int HardwareSerial::read(void)
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return -1;
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return -1;
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} else {
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} else {
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unsigned char c = _rx_buffer->buffer[_rx_buffer->tail];
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unsigned char c = _rx_buffer->buffer[_rx_buffer->tail];
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_rx_buffer->tail = (unsigned int)(_rx_buffer->tail + 1) % RX_BUFFER_SIZE;
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_rx_buffer->tail = (unsigned int)(_rx_buffer->tail + 1) % SERIAL_BUFFER_SIZE;
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return c;
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return c;
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}
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}
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}
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}
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@ -271,18 +367,30 @@ void HardwareSerial::flush()
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void HardwareSerial::write(uint8_t c)
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void HardwareSerial::write(uint8_t c)
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{
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{
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while (!((*_ucsra) & (1 << _udre)))
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bool empty = (_tx_buffer->head == _tx_buffer->tail);
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int i = (_tx_buffer->head + 1) % SERIAL_BUFFER_SIZE;
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// If the output buffer is full, there's nothing for it other than to
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// wait for the interrupt handler to empty it a bit
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while (i == _tx_buffer->tail)
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;
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;
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*_udr = c;
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_tx_buffer->buffer[_tx_buffer->head] = c;
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_tx_buffer->head = i;
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if (empty) {
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// The buffer was empty, so enable interrupt on
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// USART Data Register empty. The interrupt handler will take it from there
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sbi(*_ucsrb, _udrie);
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}
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}
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}
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// Preinstantiate Objects //////////////////////////////////////////////////////
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// Preinstantiate Objects //////////////////////////////////////////////////////
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#if defined(UBRRH) && defined(UBRRL)
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#if defined(UBRRH) && defined(UBRRL)
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HardwareSerial Serial(&rx_buffer, &UBRRH, &UBRRL, &UCSRA, &UCSRB, &UDR, RXEN, TXEN, RXCIE, UDRE, U2X);
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HardwareSerial Serial(&rx_buffer, &tx_buffer, &UBRRH, &UBRRL, &UCSRA, &UCSRB, &UDR, RXEN, TXEN, RXCIE, UDRIE, U2X);
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#elif defined(UBRR0H) && defined(UBRR0L)
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#elif defined(UBRR0H) && defined(UBRR0L)
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HardwareSerial Serial(&rx_buffer, &UBRR0H, &UBRR0L, &UCSR0A, &UCSR0B, &UDR0, RXEN0, TXEN0, RXCIE0, UDRE0, U2X0);
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HardwareSerial Serial(&rx_buffer, &tx_buffer, &UBRR0H, &UBRR0L, &UCSR0A, &UCSR0B, &UDR0, RXEN0, TXEN0, RXCIE0, UDRIE0, U2X0);
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#elif defined(USBCON)
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#elif defined(USBCON)
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#warning no serial port defined (port 0)
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#warning no serial port defined (port 0)
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#else
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#else
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@ -290,13 +398,13 @@ void HardwareSerial::write(uint8_t c)
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#endif
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#endif
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#if defined(UBRR1H)
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#if defined(UBRR1H)
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HardwareSerial Serial1(&rx_buffer1, &UBRR1H, &UBRR1L, &UCSR1A, &UCSR1B, &UDR1, RXEN1, TXEN1, RXCIE1, UDRE1, U2X1);
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HardwareSerial Serial1(&rx_buffer1, &tx_buffer1, &UBRR1H, &UBRR1L, &UCSR1A, &UCSR1B, &UDR1, RXEN1, TXEN1, RXCIE1, UDRIE1, U2X1);
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#endif
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#endif
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#if defined(UBRR2H)
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#if defined(UBRR2H)
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HardwareSerial Serial2(&rx_buffer2, &UBRR2H, &UBRR2L, &UCSR2A, &UCSR2B, &UDR2, RXEN2, TXEN2, RXCIE2, UDRE2, U2X2);
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HardwareSerial Serial2(&rx_buffer2, &tx_buffer2, &UBRR2H, &UBRR2L, &UCSR2A, &UCSR2B, &UDR2, RXEN2, TXEN2, RXCIE2, UDRIE2, U2X2);
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#endif
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#endif
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#if defined(UBRR3H)
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#if defined(UBRR3H)
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HardwareSerial Serial3(&rx_buffer3, &UBRR3H, &UBRR3L, &UCSR3A, &UCSR3B, &UDR3, RXEN3, TXEN3, RXCIE3, UDRE3, U2X3);
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HardwareSerial Serial3(&rx_buffer3, &tx_buffer3, &UBRR3H, &UBRR3L, &UCSR3A, &UCSR3B, &UDR3, RXEN3, TXEN3, RXCIE3, UDRIE3, U2X3);
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#endif
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#endif
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#endif // whole file
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#endif // whole file
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@ -32,6 +32,7 @@ class HardwareSerial : public Stream
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{
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{
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private:
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private:
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ring_buffer *_rx_buffer;
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ring_buffer *_rx_buffer;
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ring_buffer *_tx_buffer;
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volatile uint8_t *_ubrrh;
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volatile uint8_t *_ubrrh;
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volatile uint8_t *_ubrrl;
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volatile uint8_t *_ubrrl;
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volatile uint8_t *_ucsra;
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volatile uint8_t *_ucsra;
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@ -40,14 +41,14 @@ class HardwareSerial : public Stream
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uint8_t _rxen;
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uint8_t _rxen;
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uint8_t _txen;
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uint8_t _txen;
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uint8_t _rxcie;
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uint8_t _rxcie;
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uint8_t _udre;
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uint8_t _udrie;
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uint8_t _u2x;
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uint8_t _u2x;
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public:
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public:
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HardwareSerial(ring_buffer *rx_buffer,
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HardwareSerial(ring_buffer *rx_buffer, ring_buffer *tx_buffer,
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volatile uint8_t *ubrrh, volatile uint8_t *ubrrl,
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volatile uint8_t *ubrrh, volatile uint8_t *ubrrl,
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volatile uint8_t *ucsra, volatile uint8_t *ucsrb,
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volatile uint8_t *ucsra, volatile uint8_t *ucsrb,
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volatile uint8_t *udr,
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volatile uint8_t *udr,
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uint8_t rxen, uint8_t txen, uint8_t rxcie, uint8_t udre, uint8_t u2x);
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uint8_t rxen, uint8_t txen, uint8_t rxcie, uint8_t udrie, uint8_t u2x);
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void begin(long);
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void begin(long);
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void end();
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void end();
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virtual int available(void);
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virtual int available(void);
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