This document describes the changes between the different CMSIS versions.
Version: 2.00 - December 2010
Information in this file, the accompany manuals, and software is
Copyright © ARM Ltd.
All rights reserved.
Following toolchains have been used for test / verification:.
The CMSIS DSP Software Library is a suite of common signal processing functions targeted to Cortex-M processor based microcontrollers. Even though the code has been specifically optimized towards using the extended DSP instruction set of the Cortex-M4 processor, the library can be compiled for any Cortex-M processor.
For more information see CMSIS DSP Library documentation.
The CMSIS System View Description answers the challenges of accurate, detailed and timely device aware peripheral debugging support for Cortex Microcontroller based devices by the software development tools vendor community.
Silicon vendors shall create and maintain a formalized description of the debug view for all the peripherals contained in their Cortex Microcontroller based devices. Tool vendors use such descriptions to establish device specific debug support in their debugging tools.
A standardized System View Description shall provide a common approach to capturing peripheral debug related information in a machine readable files.
For more information see CMSIS System View Description.
Additional folder CM4, containing the Cortex-M4 core support files, has been added.
The new Core Support Files are:
CMSIS Middleware is removed and no longer focus of CMSIS.
The variable name SystemCoreClock is more precise than SystemFrequency because the variable holds the clock value at which the core is running.
The old startup concept (calling SystemInit_ExtMemCtl from startup file and calling SystemInit from main) has the weakness that it does not work for controllers which need a already configuerd clock system to configure the external memory controller.
ITM communication channel is only capable for OUT direction. To allow also communication for IN direction a simple concept is provided.
For detailed explanation see file CMSIS debug support.htm.
Files core_cm3.h and core_cm0.h contain now bit definitions for Core Registers. The name for the defines correspond with the Cortex-M Technical Reference Manual.
e.g. SysTick structure with bit definitions
/** @addtogroup CMSIS_CM3_SysTick CMSIS CM3 SysTick
memory mapped structure for SysTick
@{
*/
typedef struct
{
__IO uint32_t CTRL; /*!< Offset: 0x00 SysTick Control and Status Register */
__IO uint32_t LOAD; /*!< Offset: 0x04 SysTick Reload Value Register */
__IO uint32_t VAL; /*!< Offset: 0x08 SysTick Current Value Register */
__I uint32_t CALIB; /*!< Offset: 0x0C SysTick Calibration Register */
} SysTick_Type;
/* SysTick Control / Status Register Definitions */
#define SysTick_CTRL_COUNTFLAG_Pos 16 /*!< SysTick CTRL: COUNTFLAG Position */
#define SysTick_CTRL_COUNTFLAG_Msk (1ul << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
#define SysTick_CTRL_CLKSOURCE_Pos 2 /*!< SysTick CTRL: CLKSOURCE Position */
#define SysTick_CTRL_CLKSOURCE_Msk (1ul << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
#define SysTick_CTRL_TICKINT_Pos 1 /*!< SysTick CTRL: TICKINT Position */
#define SysTick_CTRL_TICKINT_Msk (1ul << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
#define SysTick_CTRL_ENABLE_Pos 0 /*!< SysTick CTRL: ENABLE Position */
#define SysTick_CTRL_ENABLE_Msk (1ul << SysTick_CTRL_ENABLE_Pos) /*!< SysTick CTRL: ENABLE Mask */
/* SysTick Reload Register Definitions */
#define SysTick_LOAD_RELOAD_Pos 0 /*!< SysTick LOAD: RELOAD Position */
#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFul << SysTick_LOAD_RELOAD_Pos) /*!< SysTick LOAD: RELOAD Mask */
/* SysTick Current Register Definitions */
#define SysTick_VAL_CURRENT_Pos 0 /*!< SysTick VAL: CURRENT Position */
#define SysTick_VAL_CURRENT_Msk (0xFFFFFFul << SysTick_VAL_CURRENT_Pos) /*!< SysTick VAL: CURRENT Mask */
/* SysTick Calibration Register Definitions */
#define SysTick_CALIB_NOREF_Pos 31 /*!< SysTick CALIB: NOREF Position */
#define SysTick_CALIB_NOREF_Msk (1ul << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
#define SysTick_CALIB_SKEW_Pos 30 /*!< SysTick CALIB: SKEW Position */
#define SysTick_CALIB_SKEW_Msk (1ul << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
#define SysTick_CALIB_TENMS_Pos 0 /*!< SysTick CALIB: TENMS Position */
#define SysTick_CALIB_TENMS_Msk (0xFFFFFFul << SysTick_VAL_CURRENT_Pos) /*!< SysTick CALIB: TENMS Mask */
/*@}*/ /* end of group CMSIS_CM3_SysTick */
DoxyGen tags in files core_cm3.[c,h] and core_cm0.[c,h] are reworked to create proper documentation using DoxyGen.
The folder structure is changed to differentiate the single support packages.
Following points need to be clarified and solved:
Equivalent C and Assembler startup files.
Is there a need for having C startup files although assembler startup files are very efficient and do not need to be changed?
Placing of HEAP in external RAM.
It must be possible to place HEAP in external RAM if the device supports an external memory controller.
Placing of STACK /HEAP.
STACK should always be placed at the end of internal RAM.
If HEAP is placed in internal RAM than it should be placed after RW ZI section.
Removing core_cm3.c and core_cm0.c.
On a long term the functions in core_cm3.c and core_cm0.c must be replaced with appropriate compiler intrinsics.
The following limitations are not covered with the current CMSIS version: