mirror of
https://github.com/arduino/Arduino.git
synced 2024-11-30 11:24:12 +01:00
de4d73511d
(cherry picked from commit c56a1293d7
)
605 lines
19 KiB
Plaintext
605 lines
19 KiB
Plaintext
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optiboot_atmega8.elf: file format elf32-avr
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Sections:
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Idx Name Size VMA LMA File off Algn
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0 .text 000001e0 00001e00 00001e00 00000054 2**1
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CONTENTS, ALLOC, LOAD, READONLY, CODE
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1 .version 00000002 00001ffe 00001ffe 00000234 2**0
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CONTENTS, READONLY
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2 .debug_aranges 00000028 00000000 00000000 00000236 2**0
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CONTENTS, READONLY, DEBUGGING
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3 .debug_pubnames 0000005f 00000000 00000000 0000025e 2**0
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CONTENTS, READONLY, DEBUGGING
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4 .debug_info 000002a6 00000000 00000000 000002bd 2**0
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CONTENTS, READONLY, DEBUGGING
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5 .debug_abbrev 00000169 00000000 00000000 00000563 2**0
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CONTENTS, READONLY, DEBUGGING
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6 .debug_line 00000498 00000000 00000000 000006cc 2**0
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CONTENTS, READONLY, DEBUGGING
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7 .debug_frame 00000080 00000000 00000000 00000b64 2**2
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CONTENTS, READONLY, DEBUGGING
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8 .debug_str 0000014f 00000000 00000000 00000be4 2**0
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CONTENTS, READONLY, DEBUGGING
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9 .debug_loc 000002ba 00000000 00000000 00000d33 2**0
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CONTENTS, READONLY, DEBUGGING
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10 .debug_ranges 00000078 00000000 00000000 00000fed 2**0
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CONTENTS, READONLY, DEBUGGING
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Disassembly of section .text:
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00001e00 <main>:
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#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4))
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#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6))
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#endif
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/* main program starts here */
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int main(void) {
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1e00: 11 24 eor r1, r1
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//
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// If not, uncomment the following instructions:
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// cli();
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asm volatile ("clr __zero_reg__");
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#ifdef __AVR_ATmega8__
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SP=RAMEND; // This is done by hardware reset
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1e02: 8f e5 ldi r24, 0x5F ; 95
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1e04: 94 e0 ldi r25, 0x04 ; 4
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1e06: 9e bf out 0x3e, r25 ; 62
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1e08: 8d bf out 0x3d, r24 ; 61
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#endif
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// Adaboot no-wait mod
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ch = MCUSR;
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1e0a: 84 b7 in r24, 0x34 ; 52
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MCUSR = 0;
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1e0c: 14 be out 0x34, r1 ; 52
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if (!(ch & _BV(EXTRF))) appStart();
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1e0e: 81 ff sbrs r24, 1
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1e10: e2 d0 rcall .+452 ; 0x1fd6 <appStart>
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#if LED_START_FLASHES > 0
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// Set up Timer 1 for timeout counter
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TCCR1B = _BV(CS12) | _BV(CS10); // div 1024
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1e12: 85 e0 ldi r24, 0x05 ; 5
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1e14: 8e bd out 0x2e, r24 ; 46
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#endif
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#ifndef SOFT_UART
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#ifdef __AVR_ATmega8__
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UCSRA = _BV(U2X); //Double speed mode USART
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1e16: 82 e0 ldi r24, 0x02 ; 2
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1e18: 8b b9 out 0x0b, r24 ; 11
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UCSRB = _BV(RXEN) | _BV(TXEN); // enable Rx & Tx
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1e1a: 88 e1 ldi r24, 0x18 ; 24
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1e1c: 8a b9 out 0x0a, r24 ; 10
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UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); // config USART; 8N1
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1e1e: 86 e8 ldi r24, 0x86 ; 134
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1e20: 80 bd out 0x20, r24 ; 32
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UBRRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 );
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1e22: 80 e1 ldi r24, 0x10 ; 16
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1e24: 89 b9 out 0x09, r24 ; 9
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UBRR0L = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 );
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#endif
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#endif
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// Set up watchdog to trigger after 500ms
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watchdogConfig(WATCHDOG_1S);
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1e26: 8e e0 ldi r24, 0x0E ; 14
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1e28: c2 d0 rcall .+388 ; 0x1fae <watchdogConfig>
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/* Set LED pin as output */
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LED_DDR |= _BV(LED);
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1e2a: bd 9a sbi 0x17, 5 ; 23
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1e2c: 96 e0 ldi r25, 0x06 ; 6
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}
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#if LED_START_FLASHES > 0
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void flash_led(uint8_t count) {
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do {
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TCNT1 = -(F_CPU/(1024*16));
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1e2e: 20 e3 ldi r18, 0x30 ; 48
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1e30: 3c ef ldi r19, 0xFC ; 252
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TIFR1 = _BV(TOV1);
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1e32: 54 e0 ldi r21, 0x04 ; 4
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while(!(TIFR1 & _BV(TOV1)));
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#ifdef __AVR_ATmega8__
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LED_PORT ^= _BV(LED);
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1e34: 40 e2 ldi r20, 0x20 ; 32
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}
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#if LED_START_FLASHES > 0
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void flash_led(uint8_t count) {
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do {
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TCNT1 = -(F_CPU/(1024*16));
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1e36: 3d bd out 0x2d, r19 ; 45
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1e38: 2c bd out 0x2c, r18 ; 44
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TIFR1 = _BV(TOV1);
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1e3a: 58 bf out 0x38, r21 ; 56
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while(!(TIFR1 & _BV(TOV1)));
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1e3c: 08 b6 in r0, 0x38 ; 56
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1e3e: 02 fe sbrs r0, 2
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1e40: fd cf rjmp .-6 ; 0x1e3c <main+0x3c>
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#ifdef __AVR_ATmega8__
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LED_PORT ^= _BV(LED);
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1e42: 88 b3 in r24, 0x18 ; 24
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1e44: 84 27 eor r24, r20
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1e46: 88 bb out 0x18, r24 ; 24
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}
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#endif
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// Watchdog functions. These are only safe with interrupts turned off.
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void watchdogReset() {
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__asm__ __volatile__ (
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1e48: a8 95 wdr
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LED_PORT ^= _BV(LED);
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#else
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LED_PIN |= _BV(LED);
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#endif
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watchdogReset();
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} while (--count);
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1e4a: 91 50 subi r25, 0x01 ; 1
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1e4c: a1 f7 brne .-24 ; 0x1e36 <main+0x36>
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1e4e: cc 24 eor r12, r12
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1e50: dd 24 eor r13, r13
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ch = SPM_PAGESIZE / 2;
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do {
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uint16_t a;
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a = *bufPtr++;
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a |= (*bufPtr++) << 8;
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__boot_page_fill_short((uint16_t)(void*)addrPtr,a);
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1e52: 88 24 eor r8, r8
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1e54: 83 94 inc r8
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addrPtr += 2;
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} while (--ch);
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// Write from programming buffer
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__boot_page_write_short((uint16_t)(void*)address);
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1e56: b5 e0 ldi r27, 0x05 ; 5
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1e58: ab 2e mov r10, r27
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boot_spm_busy_wait();
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#if defined(RWWSRE)
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// Reenable read access to flash
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boot_rww_enable();
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1e5a: a1 e1 ldi r26, 0x11 ; 17
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1e5c: 9a 2e mov r9, r26
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do *bufPtr++ = getch();
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while (--length);
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// If we are in NRWW section, page erase has to be delayed until now.
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// Todo: Take RAMPZ into account
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if (address >= NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address);
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1e5e: f3 e0 ldi r31, 0x03 ; 3
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1e60: bf 2e mov r11, r31
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#endif
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/* Forever loop */
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for (;;) {
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/* get character from UART */
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ch = getch();
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1e62: 9e d0 rcall .+316 ; 0x1fa0 <getch>
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if(ch == STK_GET_PARAMETER) {
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1e64: 81 34 cpi r24, 0x41 ; 65
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1e66: 61 f4 brne .+24 ; 0x1e80 <main+0x80>
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unsigned char which = getch();
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1e68: 9b d0 rcall .+310 ; 0x1fa0 <getch>
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1e6a: 08 2f mov r16, r24
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verifySpace();
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1e6c: a4 d0 rcall .+328 ; 0x1fb6 <verifySpace>
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if (which == 0x82) {
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1e6e: 02 38 cpi r16, 0x82 ; 130
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1e70: 11 f0 breq .+4 ; 0x1e76 <main+0x76>
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/*
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* Send optiboot version as "minor SW version"
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*/
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putch(OPTIBOOT_MINVER);
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} else if (which == 0x81) {
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1e72: 01 38 cpi r16, 0x81 ; 129
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1e74: 11 f4 brne .+4 ; 0x1e7a <main+0x7a>
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putch(OPTIBOOT_MAJVER);
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1e76: 84 e0 ldi r24, 0x04 ; 4
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1e78: 01 c0 rjmp .+2 ; 0x1e7c <main+0x7c>
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} else {
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/*
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* GET PARAMETER returns a generic 0x03 reply for
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* other parameters - enough to keep Avrdude happy
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*/
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putch(0x03);
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1e7a: 83 e0 ldi r24, 0x03 ; 3
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1e7c: 8d d0 rcall .+282 ; 0x1f98 <putch>
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1e7e: 89 c0 rjmp .+274 ; 0x1f92 <main+0x192>
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}
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}
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else if(ch == STK_SET_DEVICE) {
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1e80: 82 34 cpi r24, 0x42 ; 66
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1e82: 11 f4 brne .+4 ; 0x1e88 <main+0x88>
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// SET DEVICE is ignored
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getNch(20);
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1e84: 84 e1 ldi r24, 0x14 ; 20
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1e86: 03 c0 rjmp .+6 ; 0x1e8e <main+0x8e>
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}
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else if(ch == STK_SET_DEVICE_EXT) {
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1e88: 85 34 cpi r24, 0x45 ; 69
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1e8a: 19 f4 brne .+6 ; 0x1e92 <main+0x92>
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// SET DEVICE EXT is ignored
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getNch(5);
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1e8c: 85 e0 ldi r24, 0x05 ; 5
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1e8e: 9b d0 rcall .+310 ; 0x1fc6 <getNch>
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1e90: 80 c0 rjmp .+256 ; 0x1f92 <main+0x192>
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}
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else if(ch == STK_LOAD_ADDRESS) {
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1e92: 85 35 cpi r24, 0x55 ; 85
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1e94: 79 f4 brne .+30 ; 0x1eb4 <main+0xb4>
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// LOAD ADDRESS
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uint16_t newAddress;
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newAddress = getch();
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1e96: 84 d0 rcall .+264 ; 0x1fa0 <getch>
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newAddress = (newAddress & 0xff) | (getch() << 8);
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1e98: e8 2e mov r14, r24
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1e9a: ff 24 eor r15, r15
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1e9c: 81 d0 rcall .+258 ; 0x1fa0 <getch>
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1e9e: 08 2f mov r16, r24
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1ea0: 10 e0 ldi r17, 0x00 ; 0
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1ea2: 10 2f mov r17, r16
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1ea4: 00 27 eor r16, r16
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1ea6: 0e 29 or r16, r14
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1ea8: 1f 29 or r17, r15
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#ifdef RAMPZ
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// Transfer top bit to RAMPZ
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RAMPZ = (newAddress & 0x8000) ? 1 : 0;
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#endif
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newAddress += newAddress; // Convert from word address to byte address
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1eaa: 00 0f add r16, r16
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1eac: 11 1f adc r17, r17
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address = newAddress;
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verifySpace();
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1eae: 83 d0 rcall .+262 ; 0x1fb6 <verifySpace>
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1eb0: 68 01 movw r12, r16
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1eb2: 6f c0 rjmp .+222 ; 0x1f92 <main+0x192>
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}
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else if(ch == STK_UNIVERSAL) {
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1eb4: 86 35 cpi r24, 0x56 ; 86
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1eb6: 21 f4 brne .+8 ; 0x1ec0 <main+0xc0>
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// UNIVERSAL command is ignored
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getNch(4);
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1eb8: 84 e0 ldi r24, 0x04 ; 4
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1eba: 85 d0 rcall .+266 ; 0x1fc6 <getNch>
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putch(0x00);
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1ebc: 80 e0 ldi r24, 0x00 ; 0
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1ebe: de cf rjmp .-68 ; 0x1e7c <main+0x7c>
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}
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/* Write memory, length is big endian and is in bytes */
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else if(ch == STK_PROG_PAGE) {
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1ec0: 84 36 cpi r24, 0x64 ; 100
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1ec2: 09 f0 breq .+2 ; 0x1ec6 <main+0xc6>
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1ec4: 40 c0 rjmp .+128 ; 0x1f46 <main+0x146>
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// PROGRAM PAGE - we support flash programming only, not EEPROM
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uint8_t *bufPtr;
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uint16_t addrPtr;
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getch(); /* getlen() */
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1ec6: 6c d0 rcall .+216 ; 0x1fa0 <getch>
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length = getch();
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1ec8: 6b d0 rcall .+214 ; 0x1fa0 <getch>
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1eca: 08 2f mov r16, r24
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getch();
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1ecc: 69 d0 rcall .+210 ; 0x1fa0 <getch>
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// If we are in RWW section, immediately start page erase
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if (address < NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address);
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1ece: 80 e0 ldi r24, 0x00 ; 0
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1ed0: c8 16 cp r12, r24
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1ed2: 88 e1 ldi r24, 0x18 ; 24
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1ed4: d8 06 cpc r13, r24
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1ed6: 18 f4 brcc .+6 ; 0x1ede <main+0xde>
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1ed8: f6 01 movw r30, r12
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1eda: b7 be out 0x37, r11 ; 55
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1edc: e8 95 spm
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1ede: c0 e0 ldi r28, 0x00 ; 0
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1ee0: d1 e0 ldi r29, 0x01 ; 1
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// While that is going on, read in page contents
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bufPtr = buff;
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do *bufPtr++ = getch();
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1ee2: 5e d0 rcall .+188 ; 0x1fa0 <getch>
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1ee4: 89 93 st Y+, r24
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while (--length);
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1ee6: 0c 17 cp r16, r28
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1ee8: e1 f7 brne .-8 ; 0x1ee2 <main+0xe2>
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// If we are in NRWW section, page erase has to be delayed until now.
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// Todo: Take RAMPZ into account
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if (address >= NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address);
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1eea: f0 e0 ldi r31, 0x00 ; 0
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1eec: cf 16 cp r12, r31
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1eee: f8 e1 ldi r31, 0x18 ; 24
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1ef0: df 06 cpc r13, r31
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1ef2: 18 f0 brcs .+6 ; 0x1efa <main+0xfa>
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1ef4: f6 01 movw r30, r12
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1ef6: b7 be out 0x37, r11 ; 55
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1ef8: e8 95 spm
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// Read command terminator, start reply
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verifySpace();
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1efa: 5d d0 rcall .+186 ; 0x1fb6 <verifySpace>
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// If only a partial page is to be programmed, the erase might not be complete.
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// So check that here
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boot_spm_busy_wait();
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1efc: 07 b6 in r0, 0x37 ; 55
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1efe: 00 fc sbrc r0, 0
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1f00: fd cf rjmp .-6 ; 0x1efc <main+0xfc>
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1f02: a6 01 movw r20, r12
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1f04: a0 e0 ldi r26, 0x00 ; 0
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1f06: b1 e0 ldi r27, 0x01 ; 1
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bufPtr = buff;
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addrPtr = (uint16_t)(void*)address;
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ch = SPM_PAGESIZE / 2;
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do {
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uint16_t a;
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a = *bufPtr++;
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1f08: 2c 91 ld r18, X
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1f0a: 30 e0 ldi r19, 0x00 ; 0
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a |= (*bufPtr++) << 8;
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1f0c: 11 96 adiw r26, 0x01 ; 1
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1f0e: 8c 91 ld r24, X
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1f10: 11 97 sbiw r26, 0x01 ; 1
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1f12: 90 e0 ldi r25, 0x00 ; 0
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1f14: 98 2f mov r25, r24
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1f16: 88 27 eor r24, r24
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1f18: 82 2b or r24, r18
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1f1a: 93 2b or r25, r19
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#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4))
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#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6))
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#endif
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/* main program starts here */
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int main(void) {
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1f1c: 12 96 adiw r26, 0x02 ; 2
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ch = SPM_PAGESIZE / 2;
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do {
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uint16_t a;
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a = *bufPtr++;
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a |= (*bufPtr++) << 8;
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__boot_page_fill_short((uint16_t)(void*)addrPtr,a);
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1f1e: fa 01 movw r30, r20
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1f20: 0c 01 movw r0, r24
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1f22: 87 be out 0x37, r8 ; 55
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1f24: e8 95 spm
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1f26: 11 24 eor r1, r1
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addrPtr += 2;
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1f28: 4e 5f subi r20, 0xFE ; 254
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1f2a: 5f 4f sbci r21, 0xFF ; 255
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} while (--ch);
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1f2c: f1 e0 ldi r31, 0x01 ; 1
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1f2e: a0 34 cpi r26, 0x40 ; 64
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1f30: bf 07 cpc r27, r31
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1f32: 51 f7 brne .-44 ; 0x1f08 <main+0x108>
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// Write from programming buffer
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__boot_page_write_short((uint16_t)(void*)address);
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1f34: f6 01 movw r30, r12
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1f36: a7 be out 0x37, r10 ; 55
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1f38: e8 95 spm
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boot_spm_busy_wait();
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1f3a: 07 b6 in r0, 0x37 ; 55
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1f3c: 00 fc sbrc r0, 0
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1f3e: fd cf rjmp .-6 ; 0x1f3a <main+0x13a>
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#if defined(RWWSRE)
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// Reenable read access to flash
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boot_rww_enable();
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1f40: 97 be out 0x37, r9 ; 55
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1f42: e8 95 spm
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1f44: 26 c0 rjmp .+76 ; 0x1f92 <main+0x192>
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#endif
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}
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/* Read memory block mode, length is big endian. */
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else if(ch == STK_READ_PAGE) {
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1f46: 84 37 cpi r24, 0x74 ; 116
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1f48: b1 f4 brne .+44 ; 0x1f76 <main+0x176>
|
|
// READ PAGE - we only read flash
|
|
getch(); /* getlen() */
|
|
1f4a: 2a d0 rcall .+84 ; 0x1fa0 <getch>
|
|
length = getch();
|
|
1f4c: 29 d0 rcall .+82 ; 0x1fa0 <getch>
|
|
1f4e: f8 2e mov r15, r24
|
|
getch();
|
|
1f50: 27 d0 rcall .+78 ; 0x1fa0 <getch>
|
|
|
|
verifySpace();
|
|
1f52: 31 d0 rcall .+98 ; 0x1fb6 <verifySpace>
|
|
1f54: f6 01 movw r30, r12
|
|
1f56: ef 2c mov r14, r15
|
|
putch(result);
|
|
address++;
|
|
}
|
|
while (--length);
|
|
#else
|
|
do putch(pgm_read_byte_near(address++));
|
|
1f58: 8f 01 movw r16, r30
|
|
1f5a: 0f 5f subi r16, 0xFF ; 255
|
|
1f5c: 1f 4f sbci r17, 0xFF ; 255
|
|
1f5e: 84 91 lpm r24, Z+
|
|
1f60: 1b d0 rcall .+54 ; 0x1f98 <putch>
|
|
while (--length);
|
|
1f62: ea 94 dec r14
|
|
1f64: f8 01 movw r30, r16
|
|
1f66: c1 f7 brne .-16 ; 0x1f58 <main+0x158>
|
|
#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4))
|
|
#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6))
|
|
#endif
|
|
|
|
/* main program starts here */
|
|
int main(void) {
|
|
1f68: 08 94 sec
|
|
1f6a: c1 1c adc r12, r1
|
|
1f6c: d1 1c adc r13, r1
|
|
1f6e: fa 94 dec r15
|
|
1f70: cf 0c add r12, r15
|
|
1f72: d1 1c adc r13, r1
|
|
1f74: 0e c0 rjmp .+28 ; 0x1f92 <main+0x192>
|
|
#endif
|
|
#endif
|
|
}
|
|
|
|
/* Get device signature bytes */
|
|
else if(ch == STK_READ_SIGN) {
|
|
1f76: 85 37 cpi r24, 0x75 ; 117
|
|
1f78: 39 f4 brne .+14 ; 0x1f88 <main+0x188>
|
|
// READ SIGN - return what Avrdude wants to hear
|
|
verifySpace();
|
|
1f7a: 1d d0 rcall .+58 ; 0x1fb6 <verifySpace>
|
|
putch(SIGNATURE_0);
|
|
1f7c: 8e e1 ldi r24, 0x1E ; 30
|
|
1f7e: 0c d0 rcall .+24 ; 0x1f98 <putch>
|
|
putch(SIGNATURE_1);
|
|
1f80: 83 e9 ldi r24, 0x93 ; 147
|
|
1f82: 0a d0 rcall .+20 ; 0x1f98 <putch>
|
|
putch(SIGNATURE_2);
|
|
1f84: 87 e0 ldi r24, 0x07 ; 7
|
|
1f86: 7a cf rjmp .-268 ; 0x1e7c <main+0x7c>
|
|
}
|
|
else if (ch == 'Q') {
|
|
1f88: 81 35 cpi r24, 0x51 ; 81
|
|
1f8a: 11 f4 brne .+4 ; 0x1f90 <main+0x190>
|
|
// Adaboot no-wait mod
|
|
watchdogConfig(WATCHDOG_16MS);
|
|
1f8c: 88 e0 ldi r24, 0x08 ; 8
|
|
1f8e: 0f d0 rcall .+30 ; 0x1fae <watchdogConfig>
|
|
verifySpace();
|
|
}
|
|
else {
|
|
// This covers the response to commands like STK_ENTER_PROGMODE
|
|
verifySpace();
|
|
1f90: 12 d0 rcall .+36 ; 0x1fb6 <verifySpace>
|
|
}
|
|
putch(STK_OK);
|
|
1f92: 80 e1 ldi r24, 0x10 ; 16
|
|
1f94: 01 d0 rcall .+2 ; 0x1f98 <putch>
|
|
1f96: 65 cf rjmp .-310 ; 0x1e62 <main+0x62>
|
|
|
|
00001f98 <putch>:
|
|
}
|
|
}
|
|
|
|
void putch(char ch) {
|
|
#ifndef SOFT_UART
|
|
while (!(UCSR0A & _BV(UDRE0)));
|
|
1f98: 5d 9b sbis 0x0b, 5 ; 11
|
|
1f9a: fe cf rjmp .-4 ; 0x1f98 <putch>
|
|
UDR0 = ch;
|
|
1f9c: 8c b9 out 0x0c, r24 ; 12
|
|
[uartBit] "I" (UART_TX_BIT)
|
|
:
|
|
"r25"
|
|
);
|
|
#endif
|
|
}
|
|
1f9e: 08 95 ret
|
|
|
|
00001fa0 <getch>:
|
|
[uartBit] "I" (UART_RX_BIT)
|
|
:
|
|
"r25"
|
|
);
|
|
#else
|
|
while(!(UCSR0A & _BV(RXC0)))
|
|
1fa0: 5f 9b sbis 0x0b, 7 ; 11
|
|
1fa2: fe cf rjmp .-4 ; 0x1fa0 <getch>
|
|
;
|
|
if (!(UCSR0A & _BV(FE0))) {
|
|
1fa4: 5c 99 sbic 0x0b, 4 ; 11
|
|
1fa6: 01 c0 rjmp .+2 ; 0x1faa <getch+0xa>
|
|
}
|
|
#endif
|
|
|
|
// Watchdog functions. These are only safe with interrupts turned off.
|
|
void watchdogReset() {
|
|
__asm__ __volatile__ (
|
|
1fa8: a8 95 wdr
|
|
* don't care that an invalid char is returned...)
|
|
*/
|
|
watchdogReset();
|
|
}
|
|
|
|
ch = UDR0;
|
|
1faa: 8c b1 in r24, 0x0c ; 12
|
|
LED_PIN |= _BV(LED);
|
|
#endif
|
|
#endif
|
|
|
|
return ch;
|
|
}
|
|
1fac: 08 95 ret
|
|
|
|
00001fae <watchdogConfig>:
|
|
"wdr\n"
|
|
);
|
|
}
|
|
|
|
void watchdogConfig(uint8_t x) {
|
|
WDTCSR = _BV(WDCE) | _BV(WDE);
|
|
1fae: 98 e1 ldi r25, 0x18 ; 24
|
|
1fb0: 91 bd out 0x21, r25 ; 33
|
|
WDTCSR = x;
|
|
1fb2: 81 bd out 0x21, r24 ; 33
|
|
}
|
|
1fb4: 08 95 ret
|
|
|
|
00001fb6 <verifySpace>:
|
|
do getch(); while (--count);
|
|
verifySpace();
|
|
}
|
|
|
|
void verifySpace() {
|
|
if (getch() != CRC_EOP) {
|
|
1fb6: f4 df rcall .-24 ; 0x1fa0 <getch>
|
|
1fb8: 80 32 cpi r24, 0x20 ; 32
|
|
1fba: 19 f0 breq .+6 ; 0x1fc2 <verifySpace+0xc>
|
|
watchdogConfig(WATCHDOG_16MS); // shorten WD timeout
|
|
1fbc: 88 e0 ldi r24, 0x08 ; 8
|
|
1fbe: f7 df rcall .-18 ; 0x1fae <watchdogConfig>
|
|
1fc0: ff cf rjmp .-2 ; 0x1fc0 <verifySpace+0xa>
|
|
while (1) // and busy-loop so that WD causes
|
|
; // a reset and app start.
|
|
}
|
|
putch(STK_INSYNC);
|
|
1fc2: 84 e1 ldi r24, 0x14 ; 20
|
|
}
|
|
1fc4: e9 cf rjmp .-46 ; 0x1f98 <putch>
|
|
|
|
00001fc6 <getNch>:
|
|
::[count] "M" (UART_B_VALUE)
|
|
);
|
|
}
|
|
#endif
|
|
|
|
void getNch(uint8_t count) {
|
|
1fc6: 1f 93 push r17
|
|
1fc8: 18 2f mov r17, r24
|
|
do getch(); while (--count);
|
|
1fca: ea df rcall .-44 ; 0x1fa0 <getch>
|
|
1fcc: 11 50 subi r17, 0x01 ; 1
|
|
1fce: e9 f7 brne .-6 ; 0x1fca <getNch+0x4>
|
|
verifySpace();
|
|
1fd0: f2 df rcall .-28 ; 0x1fb6 <verifySpace>
|
|
}
|
|
1fd2: 1f 91 pop r17
|
|
1fd4: 08 95 ret
|
|
|
|
00001fd6 <appStart>:
|
|
WDTCSR = _BV(WDCE) | _BV(WDE);
|
|
WDTCSR = x;
|
|
}
|
|
|
|
void appStart() {
|
|
watchdogConfig(WATCHDOG_OFF);
|
|
1fd6: 80 e0 ldi r24, 0x00 ; 0
|
|
1fd8: ea df rcall .-44 ; 0x1fae <watchdogConfig>
|
|
__asm__ __volatile__ (
|
|
1fda: ee 27 eor r30, r30
|
|
1fdc: ff 27 eor r31, r31
|
|
1fde: 09 94 ijmp
|