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473 lines
17 KiB
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<html>
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<head>
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<title>CMSIS Version History</title>
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</head>
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<body>
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<h1>CMSIS Version History</h1>
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<p align="center">This document describes the changes between the different CMSIS versions.</p>
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<p align="center">Version: 2.10 - July 2011</p>
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<p class="TinyT">Information in this file, the accompany manuals, and software is<br>
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Copyright <20> ARM Ltd.<br>All rights reserved.
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</p>
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<hr>
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<h2>Contents</h2>
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<ol>
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<li class="LI2"><a href="#Toolchain">Used Toolchains</a></li>
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<li class="LI2"><a href="#6">Changes to version V2.00</a></li>
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<li class="LI2"><a href="#5">Changes to version V1.30</a></li>
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<li class="LI2"><a href="#4">Changes to version V1.20</a></li>
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<li class="LI2"><a href="#2">Open Points</a></li>
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<li class="LI2"><a href="#1">Limitations</a></li>
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</ol>
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<h2><a name="Toolchain"></a>Used Toolchains</h2>
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<p>
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Following toolchains have been used for test / verification:</i>.
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</p>
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<ul>
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<li>ARM: MDK-ARM Version 4.21</li>
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<li>GNU: Sourcery G++ Lite Edition for ARM 2010.09-51</li>
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<li>IAR: IAR Embedded Workbench Kickstart Edition V6.10</li>
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</ul>
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<h2><a name="6"></a>Changes to version V2.00</h2>
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<h3>Added CMSIS DSP Software Library support for Cortex-M0 based MCUs</h3>
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<p>
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The <strong>CMSIS DSP Software Library</strong> provides now also libraries and examples for Cortex-M0.
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</p>
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<p>
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For more information refer to <i>CMSIS DSP Library documentation</i>.
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</p>
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<h3>Added big endian support for DSP library</h3>
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<p>
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The <strong>CMSIS DSP Software Library</strong> provides now also pre-build libraries
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and projects for big endian devices.
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</p>
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<p>
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For more information refer to <i>CMSIS DSP Library documentation</i>.
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</p>
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<h3>Simplified folder structure for CMSIS include files</h3>
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<p>
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All CMSIS core include files as well as the DSP-Library header files are located in
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a single folder <strong>./CMSIS/Include</strong>.
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</p>
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<h3>Changed folder structure for Device Support packages</h3>
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<p>
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Device Support packages are expected to be in folder <strong>./Device</strong> located at the
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same level as <strong>./CMSIS</strong>.
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</p>
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<p>The new Device folder contains the following subfolders:</p>
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<ul>
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<li><b>Device</b></li>
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<ul>
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<li><<b>Vendor</b>>
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<ul>
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<li><<b>Device</b>> | <<b>Device Series</b>>
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<ul>
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<li><b>Include</b><br>
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<device>.h<br>
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system_<device>.h<br>
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</li>
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<li><b>Source</b>
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<ul>
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<li><b>Templates</b><br>
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system_<device>.c<br>
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<ul>
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<li><<b>Toolchain</b>><br>
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startup_<device>.s<br>
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</li>
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<li><<b>Toolchain</b>></li>
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<li>...</li>
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</ul>
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</li>
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</ul>
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</li>
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</ul>
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<li><<b>Device</b>> | <<b>Device Series</b>></li>
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<li>...</li>
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</ul>
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</li>
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<li><<b>Vendor</b>></li>
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<li>...</li>
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</ul>
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</li>
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</ul>
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<p>Template files are application specific files and are required to be copied to the project prior to use!</p>
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<h3>Removed CMSIS core source files</h3>
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<p>
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The CMSIS core source files <strong>core_cm0.c, core_cm3.c, core_cm4.c</strong>
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containing helper functions for older ARM compiler versions got removed.
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</p>
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<p>
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For the <b>ARM Compiler Toolchain </b>version <b>V4.0.677</b> or later is
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required!</p>
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<h2><a name="5"></a>Changes to version V1.30</h2>
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<h3>Added CMSIS DSP Software Library</h3>
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<p>
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The <strong>CMSIS DSP Software Library</strong> is a suite of common signal processing functions targeted
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to Cortex-M processor based microcontrollers. Even though the code has been specifically
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optimized towards using the extended DSP instruction set of the Cortex-M4 processor,
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the library can be compiled for any Cortex-M processor.
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</p>
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<p>
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For more information see <i>CMSIS DSP Library documentation</i>.
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</p>
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<h3>Added CMSIS System View Description</h3>
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<p>
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The <strong>CMSIS System View Description</strong> answers the challenges of accurate, detailed and
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timely device aware peripheral debugging support for Cortex Microcontroller based
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devices by the software development tools vendor community.
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</p>
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<p>
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Silicon vendors shall create and maintain a formalized description of the debug view
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for all the peripherals contained in their Cortex Microcontroller based devices.
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Tool vendors use such descriptions to establish device specific debug support in
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their debugging tools.
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</p>
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<p>
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A standardized System View Description shall provide a common approach to
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capturing peripheral debug related information in a machine readable files.
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</p>
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<p>
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For more information see <i>CMSIS System View Description</i>.
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</p>
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<h3>Added Cortex-M4 Core Support</h3>
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<p>
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Additional folder <strong>CM4</strong>, containing the Cortex-M4 core support files, has been added.
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</p>
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<ul>
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<li>CM0</li>
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<li>CM3</li>
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<li>CM4
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<ul>
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<li>CoreSupport</li>
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<li>DeviceSupport</li>
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</ul>
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</li>
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</ul>
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<h3>New naming for Core Support Files</h3>
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<p>
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The new Core Support Files are:
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</p>
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<ul>
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<li>core_cm#.h (# = 0, 3, 4)</li>
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<li>core_cmFunc.h (Cortex-M Core Register access functions)</li>
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<li>core_cmInstr.h (Cortex-M Core instructions)</li>
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<li>core_cm4_simd.h (Cortex-M4 SIMD instructions)</li>
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</ul>
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<h2><a name="4"></a>Changes to version V1.20</h2>
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<h3>Removed CMSIS Middelware packages</h3>
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<p>
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CMSIS Middleware is removed and no longer focus of CMSIS.
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</p>
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<h3>SystemFrequency renamed to SystemCoreClock</h3>
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<p>
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The variable name <strong>SystemCoreClock</strong> is more precise than <strong>SystemFrequency</strong>
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because the variable holds the clock value at which the core is running.
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</p>
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<h3>Changed startup concept</h3>
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<p>
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The old startup concept (calling SystemInit_ExtMemCtl from startup file and calling SystemInit
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from main) has the weakness that it does not work for controllers which need a already
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configuerd clock system to configure the external memory controller.
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</p>
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<h5>Changed startup concept</h5>
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<ul>
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<li>
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SystemInit() is called from startup file before <strong>premain</strong>.
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</li>
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<li>
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<strong>SystemInit()</strong> configures the clock system and also configures
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an existing external memory controller.
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</li>
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<li>
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<strong>SystemInit()</strong> must not use global variables.
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</li>
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<li>
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<strong>SystemCoreClock</strong> is initialized with a correct predefined value.
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</li>
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<li>
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Additional function <strong>void SystemCoreClockUpdate (void)</strong> is provided.<br>
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<strong>SystemCoreClockUpdate()</strong> updates the variable <strong>SystemCoreClock</strong>
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and must be called whenever the core clock is changed.<br>
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<strong>SystemCoreClockUpdate()</strong> evaluates the clock register settings and calculates
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the current core clock.
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</li>
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</ul>
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<h3>Advanced Debug Functions</h3>
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<p>
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ITM communication channel is only capable for OUT direction. To allow also communication for
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IN direction a simple concept is provided.
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</p>
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<ul>
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<li>
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Global variable <strong>volatile int ITM_RxBuffer</strong> used for IN data.
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</li>
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<li>
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Function <strong>int ITM_CheckChar (void)</strong> checks if a new character is available.
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</li>
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<li>
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Function <strong>int ITM_ReceiveChar (void)</strong> retrieves the new character.
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</li>
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</ul>
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<p>
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For detailed explanation see file <strong>CMSIS debug support.htm</strong>.
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</p>
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<h3>Core Register Bit Definitions</h3>
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<p>
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Files core_cm3.h and core_cm0.h contain now bit definitions for Core Registers. The name for the
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defines correspond with the Cortex-M Technical Reference Manual.
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</p>
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<p>
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e.g. SysTick structure with bit definitions
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</p>
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<pre>
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/** \brief Structure type to access the System Timer (SysTick).
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*/
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typedef struct
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{
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__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
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__IO uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
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__IO uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
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__I uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
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} SysTick_Type;
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/* SysTick Control / Status Register Definitions */
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#define SysTick_CTRL_COUNTFLAG_Pos 16 /*!< SysTick CTRL: COUNTFLAG Position */
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#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
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#define SysTick_CTRL_CLKSOURCE_Pos 2 /*!< SysTick CTRL: CLKSOURCE Position */
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#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
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#define SysTick_CTRL_TICKINT_Pos 1 /*!< SysTick CTRL: TICKINT Position */
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#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
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#define SysTick_CTRL_ENABLE_Pos 0 /*!< SysTick CTRL: ENABLE Position */
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#define SysTick_CTRL_ENABLE_Msk (1UL << SysTick_CTRL_ENABLE_Pos) /*!< SysTick CTRL: ENABLE Mask */
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/* SysTick Reload Register Definitions */
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#define SysTick_LOAD_RELOAD_Pos 0 /*!< SysTick LOAD: RELOAD Position */
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#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL << SysTick_LOAD_RELOAD_Pos) /*!< SysTick LOAD: RELOAD Mask */
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/* SysTick Current Register Definitions */
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#define SysTick_VAL_CURRENT_Pos 0 /*!< SysTick VAL: CURRENT Position */
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#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos) /*!< SysTick VAL: CURRENT Mask */
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/* SysTick Calibration Register Definitions */
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#define SysTick_CALIB_NOREF_Pos 31 /*!< SysTick CALIB: NOREF Position */
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#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
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#define SysTick_CALIB_SKEW_Pos 30 /*!< SysTick CALIB: SKEW Position */
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#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
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#define SysTick_CALIB_TENMS_Pos 0 /*!< SysTick CALIB: TENMS Position */
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#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos) /*!< SysTick CALIB: TENMS Mask */
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/*@} end of group CMSIS_SysTick */</pre>
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<h3>DoxyGen Tags</h3>
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<p>
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DoxyGen tags in files core_cm3.[c,h] and core_cm0.[c,h] are reworked to create proper documentation
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using DoxyGen.
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</p>
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<h3>Folder Structure</h3>
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<p>
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The folder structure is changed to differentiate the single support packages.
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</p>
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<ul>
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<li>CM0</li>
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<li>CM3
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<ul>
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<li>CoreSupport</li>
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<li>DeviceSupport</li>
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<ul>
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<li>Vendor
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<ul>
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<li>Device
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<ul>
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<li>Startup
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<ul>
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<li>Toolchain</li>
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<li>Toolchain</li>
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<li>...</li>
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</ul>
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</li>
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</ul>
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</li>
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<li>Device</li>
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<li>...</li>
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</ul>
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</li>
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<li>Vendor</li>
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<li>...</li>
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</ul>
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</li>
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<li>Example <i>(optional)</i>
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<ul>
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<li>Toolchain
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<ul>
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<li>Device</li>
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<li>Device</li>
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<li>...</li>
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</ul>
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</li>
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<li>Toolchain</li>
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<li>...</li>
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</ul>
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</li>
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</ul>
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</li>
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<li>Documentation</li>
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</ul>
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<h2><a name="2"></a>Open Points</h2>
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<p>
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Following points need to be clarified and solved:
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</p>
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<ul>
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<li>
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<p>
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Equivalent C and Assembler startup files.
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</p>
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<p>
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Is there a need for having C startup files although assembler startup files are
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very efficient and do not need to be changed?
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<p/>
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</li>
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<li>
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<p>
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Placing of HEAP in external RAM.
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</p>
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<p>
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It must be possible to place HEAP in external RAM if the device supports an
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external memory controller.
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</p>
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</li>
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<li>
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<p>
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Placing of STACK /HEAP.
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</p>
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<p>
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STACK should always be placed at the end of internal RAM.
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</p>
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<p>
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If HEAP is placed in internal RAM than it should be placed after RW ZI section.
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</p>
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</li>
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</ul>
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<h2><a name="1"></a>Limitations</h2>
|
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<p>
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The following limitations are not covered with the current CMSIS version:
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</p>
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<ul>
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<li>
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No <strong>C startup files</strong> are available.
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</li>
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</ul>
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