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30 lines
1.8 KiB
C
30 lines
1.8 KiB
C
/* $asf_license$ */
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#ifndef _SAM3S8_ACC_INSTANCE_
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#define _SAM3S8_ACC_INSTANCE_
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/* ========== Register definition for ACC peripheral ========== */
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#ifdef __ASSEMBLY__
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#define REG_ACC_CR (0x40040000U) /**< \brief (ACC) Control Register */
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#define REG_ACC_MR (0x40040004U) /**< \brief (ACC) Mode Register */
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#define REG_ACC_IER (0x40040024U) /**< \brief (ACC) Interrupt Enable Register */
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#define REG_ACC_IDR (0x40040028U) /**< \brief (ACC) Interrupt Disable Register */
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#define REG_ACC_IMR (0x4004002CU) /**< \brief (ACC) Interrupt Mask Register */
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#define REG_ACC_ISR (0x40040030U) /**< \brief (ACC) Interrupt Status Register */
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#define REG_ACC_ACR (0x40040094U) /**< \brief (ACC) Analog Control Register */
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#define REG_ACC_WPMR (0x400400E4U) /**< \brief (ACC) Write Protect Mode Register */
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#define REG_ACC_WPSR (0x400400E8U) /**< \brief (ACC) Write Protect Status Register */
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#else
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#define REG_ACC_CR (*(WoReg*)0x40040000U) /**< \brief (ACC) Control Register */
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#define REG_ACC_MR (*(RwReg*)0x40040004U) /**< \brief (ACC) Mode Register */
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#define REG_ACC_IER (*(WoReg*)0x40040024U) /**< \brief (ACC) Interrupt Enable Register */
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#define REG_ACC_IDR (*(WoReg*)0x40040028U) /**< \brief (ACC) Interrupt Disable Register */
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#define REG_ACC_IMR (*(RoReg*)0x4004002CU) /**< \brief (ACC) Interrupt Mask Register */
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#define REG_ACC_ISR (*(RoReg*)0x40040030U) /**< \brief (ACC) Interrupt Status Register */
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#define REG_ACC_ACR (*(RwReg*)0x40040094U) /**< \brief (ACC) Analog Control Register */
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#define REG_ACC_WPMR (*(RwReg*)0x400400E4U) /**< \brief (ACC) Write Protect Mode Register */
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#define REG_ACC_WPSR (*(RoReg*)0x400400E8U) /**< \brief (ACC) Write Protect Status Register */
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#endif /* __ASSEMBLY__ */
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#endif /* _SAM3S8_ACC_INSTANCE_ */
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