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168 lines
8.0 KiB
C
Executable File
168 lines
8.0 KiB
C
Executable File
/*! \file encoderconf.h \brief Quadrature Encoder driver configuration. */
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//*****************************************************************************
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//
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// File Name : 'encoderconf.h'
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// Title : Quadrature Encoder driver configuration
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// Author : Pascal Stang - Copyright (C) 2003-2004
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// Created : 2003.01.26
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// Revised : 2004.06.25
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// Version : 0.2
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// Target MCU : Atmel AVR Series
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// Editor Tabs : 4
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//
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// The default number of encoders supported is 2 because most AVR processors
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// have two external interrupts. To use more or fewer encoders, you must do
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// four things:
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//
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// 1. Use a processor with at least as many external interrutps as number of
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// encoders you want to have.
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// 2. Set NUM_ENCODERS to the number of encoders you will use.
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// 3. Comment/Uncomment the proper ENCx_SIGNAL defines for your encoders
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// (the encoders must be used sequentially, 0 then 1 then 2 then 3)
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// 4. Configure the various defines so that they match your processor and
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// specific hardware. The notes below may help.
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//
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//
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// -------------------- NOTES --------------------
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// The external interrupt pins are mapped as follows on most AVR processors:
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// (90s8515, mega161, mega163, mega323, mega16, mega32, etc)
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//
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// INT0 -> PD2 (PORTD, pin 2)
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// INT1 -> PD3 (PORTD, pin 3)
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//
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// The external interrupt pins on the processors mega128 and mega64 are:
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//
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// INT0 -> PD0 (PORTD, pin 0)
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// INT1 -> PD1 (PORTD, pin 1)
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// INT2 -> PD2 (PORTD, pin 2)
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// INT3 -> PD3 (PORTD, pin 3)
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// INT4 -> PE4 (PORTE, pin 4)
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// INT5 -> PE5 (PORTE, pin 5)
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// INT6 -> PE6 (PORTE, pin 6)
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// INT7 -> PE7 (PORTE, pin 7)
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//
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// This code is distributed under the GNU Public License
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// which can be found at http://www.gnu.org/licenses/gpl.txt
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//
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//*****************************************************************************
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#ifndef ENCODERCONF_H
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#define ENCODERCONF_H
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// constants/macros/typdefs
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// defines for processor compatibility
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// quick compatiblity for mega128, mega64
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//#ifndef MCUCR
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// #define MCUCR EICRA
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//#endif
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// Set the total number of encoders you wish to support
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#define NUM_ENCODERS 2
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// -------------------- Encoder 0 connections --------------------
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// Phase A quadrature encoder output should connect to this interrupt line:
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// *** NOTE: the choice of interrupt PORT, DDR, and PIN must match the external
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// interrupt you are using on your processor. Consult the External Interrupts
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// section of your processor's datasheet for more information.
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// Interrupt Configuration
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#define ENC0_SIGNAL SIG_INTERRUPT0 // Interrupt signal name
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#define ENC0_INT INT0 // matching INTx bit in GIMSK/EIMSK
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#define ENC0_ICR MCUCR // matching Int. Config Register (MCUCR,EICRA/B)
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#define ENC0_ISCX0 ISC00 // matching Interrupt Sense Config bit0
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#define ENC0_ISCX1 ISC01 // matching Interrupt Sense Config bit1
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// PhaseA Port/Pin Configuration
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// *** PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" ***
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#define ENC0_PHASEA_PORT PORTD // PhaseA port register
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#define ENC0_PHASEA_DDR DDRD // PhaseA port direction register
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#define ENC0_PHASEA_PORTIN PIND // PhaseA port input register
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#define ENC0_PHASEA_PIN PD2 // PhaseA port pin
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// Phase B quadrature encoder output should connect to this direction line:
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// *** PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" ***
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#define ENC0_PHASEB_PORT PORTC // PhaseB port register
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#define ENC0_PHASEB_DDR DDRC // PhaseB port direction register
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#define ENC0_PHASEB_PORTIN PINC // PhaseB port input register
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#define ENC0_PHASEB_PIN PC0 // PhaseB port pin
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// -------------------- Encoder 1 connections --------------------
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// Phase A quadrature encoder output should connect to this interrupt line:
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// *** NOTE: the choice of interrupt pin and port must match the external
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// interrupt you are using on your processor. Consult the External Interrupts
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// section of your processor's datasheet for more information.
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// Interrupt Configuration
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#define ENC1_SIGNAL SIG_INTERRUPT1 // Interrupt signal name
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#define ENC1_INT INT1 // matching INTx bit in GIMSK/EIMSK
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#define ENC1_ICR MCUCR // matching Int. Config Register (MCUCR,EICRA/B)
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#define ENC1_ISCX0 ISC10 // matching Interrupt Sense Config bit0
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#define ENC1_ISCX1 ISC11 // matching Interrupt Sense Config bit1
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// PhaseA Port/Pin Configuration
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// *** PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" ***
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#define ENC1_PHASEA_PORT PORTD // PhaseA port register
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#define ENC1_PHASEA_PORTIN PIND // PhaseA port input register
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#define ENC1_PHASEA_DDR DDRD // PhaseA port direction register
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#define ENC1_PHASEA_PIN PD3 // PhaseA port pin
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// Phase B quadrature encoder output should connect to this direction line:
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// *** PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" ***
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#define ENC1_PHASEB_PORT PORTC // PhaseB port register
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#define ENC1_PHASEB_DDR DDRC // PhaseB port direction register
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#define ENC1_PHASEB_PORTIN PINC // PhaseB port input register
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#define ENC1_PHASEB_PIN PC1 // PhaseB port pin
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// -------------------- Encoder 2 connections --------------------
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// Phase A quadrature encoder output should connect to this interrupt line:
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// *** NOTE: the choice of interrupt pin and port must match the external
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// interrupt you are using on your processor. Consult the External Interrupts
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// section of your processor's datasheet for more information.
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// Interrupt Configuration
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//#define ENC2_SIGNAL SIG_INTERRUPT6 // Interrupt signal name
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#define ENC2_INT INT6 // matching INTx bit in GIMSK/EIMSK
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#define ENC2_ICR EICRB // matching Int. Config Register (MCUCR,EICRA/B)
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#define ENC2_ISCX0 ISC60 // matching Interrupt Sense Config bit0
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#define ENC2_ISCX1 ISC61 // matching Interrupt Sense Config bit1
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// PhaseA Port/Pin Configuration
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// *** PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" ***
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#define ENC2_PHASEA_PORT PORTE // PhaseA port register
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#define ENC2_PHASEA_PORTIN PINE // PhaseA port input register
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#define ENC2_PHASEA_DDR DDRE // PhaseA port direction register
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#define ENC2_PHASEA_PIN PE6 // PhaseA port pin
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// Phase B quadrature encoder output should connect to this direction line:
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// *** PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" ***
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#define ENC2_PHASEB_PORT PORTC // PhaseB port register
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#define ENC2_PHASEB_DDR DDRC // PhaseB port direction register
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#define ENC2_PHASEB_PORTIN PINC // PhaseB port input register
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#define ENC2_PHASEB_PIN PC2 // PhaseB port pin
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// -------------------- Encoder 3 connections --------------------
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// Phase A quadrature encoder output should connect to this interrupt line:
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// *** NOTE: the choice of interrupt pin and port must match the external
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// interrupt you are using on your processor. Consult the External Interrupts
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// section of your processor's datasheet for more information.
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// Interrupt Configuration
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//#define ENC3_SIGNAL SIG_INTERRUPT7 // Interrupt signal name
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#define ENC3_INT INT7 // matching INTx bit in GIMSK/EIMSK
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#define ENC3_ICR EICRB // matching Int. Config Register (MCUCR,EICRA/B)
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#define ENC3_ISCX0 ISC70 // matching Interrupt Sense Config bit0
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#define ENC3_ISCX1 ISC71 // matching Interrupt Sense Config bit1
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// PhaseA Port/Pin Configuration
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// *** PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" ***
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#define ENC3_PHASEA_PORT PORTE // PhaseA port register
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#define ENC3_PHASEA_PORTIN PINE // PhaseA port input register
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#define ENC3_PHASEA_DDR DDRE // PhaseA port direction register
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#define ENC3_PHASEA_PIN PE7 // PhaseA port pin
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// Phase B quadrature encoder output should connect to this direction line:
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// *** PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" ***
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#define ENC3_PHASEB_PORT PORTC // PhaseB port register
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#define ENC3_PHASEB_DDR DDRC // PhaseB port direction register
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#define ENC3_PHASEB_PORTIN PINC // PhaseB port input register
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#define ENC3_PHASEB_PIN PC3 // PhaseB port pin
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#endif
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