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115 lines
3.3 KiB
C
Executable File
115 lines
3.3 KiB
C
Executable File
/*! \file sramsw.c \brief Software-driven SRAM memory bus access functions. */
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//*****************************************************************************
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//
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// File Name : 'sramsw.c'
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// Title : Software-driven SRAM memory bus access functions
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// Author : Pascal Stang - Copyright (C) 2002
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// Created : 11/11/2002
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// Revised : 11/13/2002
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// Version : 1.0
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// Target MCU : Atmel AVR series
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// Editor Tabs : 4
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//
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// This code is distributed under the GNU Public License
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// which can be found at http://www.gnu.org/licenses/gpl.txt
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//
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//*****************************************************************************
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#include <avr/io.h>
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#include <avr/signal.h>
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#include <avr/interrupt.h>
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#include "global.h"
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#include "sramsw.h"
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// global variables
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// functions
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void sramswInit(void)
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{
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// initialize port state
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outb(SRAM_ADL, 0xFF); // addr/data port set to 0xFF (pull-ups enabled)
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outb(SRAM_AH, 0x00); // high addr port set to 0x00
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// initialize port directions
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outb(SRAM_ADL_DDR, 0x00); // addr/data port set to input
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outb(SRAM_AH_DDR, 0xFF); // high addr port set to output
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// initialize control line states
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sbi(SRAM_CTRL, SRAM_WR); // de-assert write (active low)
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sbi(SRAM_CTRL, SRAM_RD); // de-assert read (active low)
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cbi(SRAM_CTRL, SRAM_ALE); // de-assert ALE (active high)
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// set control line direction
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sbi(SRAM_CTRL_DDR, SRAM_WR);
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sbi(SRAM_CTRL_DDR, SRAM_RD);
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sbi(SRAM_CTRL_DDR, SRAM_ALE);
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// set page lines direction
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outb(SRAM_PAGE_DDR, inb(SRAM_PAGE_DDR) | SRAM_PAGE_MASK );
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// initialize page
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sramswSetPage(0);
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}
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void sramswOff(void)
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{
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}
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void sramswWrite(u32 addr, u08 data)
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{
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// set page
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sramswSetPage( (addr & 0x00FF0000)>>16 );
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// set high-order address
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outb(SRAM_AH, (addr & 0x0000FF00)>>8 );
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// set low-order address
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outb(SRAM_ADL, addr & 0x000000FF);
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// apply low-order address to latch
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outb(SRAM_ADL_DDR, 0xFF);
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// clock latch to save low-order address
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sbi(SRAM_CTRL, SRAM_ALE); // assert ALE (active high)
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asm volatile ("nop");
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cbi(SRAM_CTRL, SRAM_ALE); // de-assert ALE (active high)
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// apply data to memory
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outb(SRAM_ADL, data);
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// clock write line to store data
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cbi(SRAM_CTRL, SRAM_WR); // assert write (active low)
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asm volatile ("nop");
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sbi(SRAM_CTRL, SRAM_WR); // de-assert write (active low)
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}
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u08 sramswRead(u32 addr)
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{
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u08 data;
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// set page
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sramswSetPage( (addr & 0x00FF0000)>>16 );
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// set high-order address
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outb(SRAM_AH, (addr & 0x0000FF00)>>8 );
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// set low-order address
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outb(SRAM_ADL, addr & 0x000000FF);
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// apply low-order address to latch
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outb(SRAM_ADL_DDR, 0xFF);
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// clock latch to save low-order address
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sbi(SRAM_CTRL, SRAM_ALE); // assert ALE (active high)
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asm volatile ("nop");
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cbi(SRAM_CTRL, SRAM_ALE); // de-assert ALE (active high)
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// switch data bus to input
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outb(SRAM_ADL_DDR, 0x00);
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// clear pullups
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outb(SRAM_ADL, 0x00);
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// request data from memory
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cbi(SRAM_CTRL, SRAM_RD); // assert read (active low)
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// retrieve data
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asm volatile ("nop");
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data = inb(SRAM_ADL_IN);
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// release read line
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sbi(SRAM_CTRL, SRAM_RD); // de-assert read (active low)
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// switch data bus to output
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outb(SRAM_ADL_DDR, 0xFF);
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return data;
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}
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void sramswSetPage(u08 page)
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{
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outb(SRAM_PAGE, (page & SRAM_PAGE_MASK));
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}
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