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34 lines
2.2 KiB
C
34 lines
2.2 KiB
C
/* $asf_license$ */
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#ifndef _SAM3N_TWI1_INSTANCE_
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#define _SAM3N_TWI1_INSTANCE_
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/* ========== Register definition for TWI1 peripheral ========== */
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#ifdef __ASSEMBLY__
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#define REG_TWI1_CR (0x4001C000U) /**< \brief (TWI1) Control Register */
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#define REG_TWI1_MMR (0x4001C004U) /**< \brief (TWI1) Master Mode Register */
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#define REG_TWI1_SMR (0x4001C008U) /**< \brief (TWI1) Slave Mode Register */
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#define REG_TWI1_IADR (0x4001C00CU) /**< \brief (TWI1) Internal Address Register */
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#define REG_TWI1_CWGR (0x4001C010U) /**< \brief (TWI1) Clock Waveform Generator Register */
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#define REG_TWI1_SR (0x4001C020U) /**< \brief (TWI1) Status Register */
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#define REG_TWI1_IER (0x4001C024U) /**< \brief (TWI1) Interrupt Enable Register */
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#define REG_TWI1_IDR (0x4001C028U) /**< \brief (TWI1) Interrupt Disable Register */
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#define REG_TWI1_IMR (0x4001C02CU) /**< \brief (TWI1) Interrupt Mask Register */
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#define REG_TWI1_RHR (0x4001C030U) /**< \brief (TWI1) Receive Holding Register */
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#define REG_TWI1_THR (0x4001C034U) /**< \brief (TWI1) Transmit Holding Register */
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#else
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#define REG_TWI1_CR (*(WoReg*)0x4001C000U) /**< \brief (TWI1) Control Register */
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#define REG_TWI1_MMR (*(RwReg*)0x4001C004U) /**< \brief (TWI1) Master Mode Register */
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#define REG_TWI1_SMR (*(RwReg*)0x4001C008U) /**< \brief (TWI1) Slave Mode Register */
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#define REG_TWI1_IADR (*(RwReg*)0x4001C00CU) /**< \brief (TWI1) Internal Address Register */
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#define REG_TWI1_CWGR (*(RwReg*)0x4001C010U) /**< \brief (TWI1) Clock Waveform Generator Register */
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#define REG_TWI1_SR (*(RoReg*)0x4001C020U) /**< \brief (TWI1) Status Register */
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#define REG_TWI1_IER (*(WoReg*)0x4001C024U) /**< \brief (TWI1) Interrupt Enable Register */
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#define REG_TWI1_IDR (*(WoReg*)0x4001C028U) /**< \brief (TWI1) Interrupt Disable Register */
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#define REG_TWI1_IMR (*(RoReg*)0x4001C02CU) /**< \brief (TWI1) Interrupt Mask Register */
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#define REG_TWI1_RHR (*(RoReg*)0x4001C030U) /**< \brief (TWI1) Receive Holding Register */
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#define REG_TWI1_THR (*(WoReg*)0x4001C034U) /**< \brief (TWI1) Transmit Holding Register */
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#endif /* __ASSEMBLY__ */
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#endif /* _SAM3N_TWI1_INSTANCE_ */
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