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end() already waited for the buffer to be empty, but then there could still be two bytes in the hardware registers that still need to be transmitted (which were dropped or kept in the buffer, depending on the exact timing). This changes the wait loop to a call to the flush() function, which already takes care of really waiting for all bytes to be transmitted, meaning it is safe to turn off the transmitter.
251 lines
7.6 KiB
C++
251 lines
7.6 KiB
C++
/*
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HardwareSerial.cpp - Hardware serial library for Wiring
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Copyright (c) 2006 Nicholas Zambetti. All right reserved.
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This library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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This library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with this library; if not, write to the Free Software
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Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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Modified 23 November 2006 by David A. Mellis
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Modified 28 September 2010 by Mark Sproul
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Modified 14 August 2012 by Alarus
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Modified 3 December 2013 by Matthijs Kooijman
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*/
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#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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#include <inttypes.h>
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#include "Arduino.h"
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#include "HardwareSerial.h"
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#include "HardwareSerial_private.h"
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// this next line disables the entire HardwareSerial.cpp,
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// this is so I can support Attiny series and any other chip without a uart
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#if defined(HAVE_HWSERIAL0) || defined(HAVE_HWSERIAL1) || defined(HAVE_HWSERIAL2) || defined(HAVE_HWSERIAL3)
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// SerialEvent functions are weak, so when the user doesn't define them,
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// the linker just sets their address to 0 (which is checked below).
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// The Serialx_available is just a wrapper around Serialx.available(),
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// but we can refer to it weakly so we don't pull in the entire
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// HardwareSerial instance if the user doesn't also refer to it.
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#if defined(HAVE_HWSERIAL0)
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void serialEvent() __attribute__((weak));
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bool Serial0_available() __attribute__((weak));
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#endif
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#if defined(HAVE_HWSERIAL1)
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void serialEvent1() __attribute__((weak));
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bool Serial1_available() __attribute__((weak));
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#endif
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#if defined(HAVE_HWSERIAL2)
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void serialEvent2() __attribute__((weak));
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bool Serial2_available() __attribute__((weak));
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#endif
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#if defined(HAVE_HWSERIAL3)
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void serialEvent3() __attribute__((weak));
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bool Serial3_available() __attribute__((weak));
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#endif
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void serialEventRun(void)
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{
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#if defined(HAVE_HWSERIAL0)
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if (Serial0_available && serialEvent && Serial0_available()) serialEvent();
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#endif
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#if defined(HAVE_HWSERIAL1)
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if (Serial1_available && serialEvent1 && Serial1_available()) serialEvent1();
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#endif
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#if defined(HAVE_HWSERIAL2)
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if (Serial2_available && serialEvent2 && Serial2_available()) serialEvent2();
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#endif
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#if defined(HAVE_HWSERIAL3)
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if (Serial3_available && serialEvent3 && Serial3_available()) serialEvent3();
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#endif
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}
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// Actual interrupt handlers //////////////////////////////////////////////////////////////
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void HardwareSerial::_tx_udr_empty_irq(void)
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{
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// If interrupts are enabled, there must be more data in the output
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// buffer. Send the next byte
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unsigned char c = _tx_buffer[_tx_buffer_tail];
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_tx_buffer_tail = (_tx_buffer_tail + 1) % SERIAL_TX_BUFFER_SIZE;
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*_udr = c;
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// clear the TXC bit -- "can be cleared by writing a one to its bit
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// location". This makes sure flush() won't return until the bytes
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// actually got written
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sbi(*_ucsra, TXC0);
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if (_tx_buffer_head == _tx_buffer_tail) {
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// Buffer empty, so disable interrupts
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cbi(*_ucsrb, UDRIE0);
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}
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}
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// Public Methods //////////////////////////////////////////////////////////////
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void HardwareSerial::begin(unsigned long baud, byte config)
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{
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// Try u2x mode first
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uint16_t baud_setting = (F_CPU / 4 / baud - 1) / 2;
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*_ucsra = 1 << U2X0;
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// hardcoded exception for 57600 for compatibility with the bootloader
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// shipped with the Duemilanove and previous boards and the firmware
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// on the 8U2 on the Uno and Mega 2560. Also, The baud_setting cannot
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// be > 4095, so switch back to non-u2x mode if the baud rate is too
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// low.
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if (((F_CPU == 16000000UL) && (baud == 57600)) || (baud_setting >4095))
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{
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*_ucsra = 0;
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baud_setting = (F_CPU / 8 / baud - 1) / 2;
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}
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// assign the baud_setting, a.k.a. ubrr (USART Baud Rate Register)
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*_ubrrh = baud_setting >> 8;
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*_ubrrl = baud_setting;
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_written = false;
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//set the data bits, parity, and stop bits
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#if defined(__AVR_ATmega8__)
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config |= 0x80; // select UCSRC register (shared with UBRRH)
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#endif
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*_ucsrc = config;
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sbi(*_ucsrb, RXEN0);
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sbi(*_ucsrb, TXEN0);
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sbi(*_ucsrb, RXCIE0);
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cbi(*_ucsrb, UDRIE0);
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}
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void HardwareSerial::end()
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{
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// wait for transmission of outgoing data
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flush();
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cbi(*_ucsrb, RXEN0);
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cbi(*_ucsrb, TXEN0);
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cbi(*_ucsrb, RXCIE0);
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cbi(*_ucsrb, UDRIE0);
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// clear any received data
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_rx_buffer_head = _rx_buffer_tail;
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}
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int HardwareSerial::available(void)
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{
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return ((unsigned int)(SERIAL_RX_BUFFER_SIZE + _rx_buffer_head - _rx_buffer_tail)) % SERIAL_RX_BUFFER_SIZE;
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}
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int HardwareSerial::peek(void)
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{
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if (_rx_buffer_head == _rx_buffer_tail) {
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return -1;
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} else {
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return _rx_buffer[_rx_buffer_tail];
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}
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}
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int HardwareSerial::read(void)
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{
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// if the head isn't ahead of the tail, we don't have any characters
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if (_rx_buffer_head == _rx_buffer_tail) {
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return -1;
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} else {
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unsigned char c = _rx_buffer[_rx_buffer_tail];
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_rx_buffer_tail = (rx_buffer_index_t)(_rx_buffer_tail + 1) % SERIAL_RX_BUFFER_SIZE;
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return c;
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}
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}
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int HardwareSerial::availableForWrite(void)
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{
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#if (SERIAL_TX_BUFFER_SIZE>256)
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uint8_t oldSREG = SREG;
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cli();
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#endif
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tx_buffer_index_t head = _tx_buffer_head;
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tx_buffer_index_t tail = _tx_buffer_tail;
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#if (SERIAL_TX_BUFFER_SIZE>256)
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SREG = oldSREG;
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#endif
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if (head >= tail) return SERIAL_TX_BUFFER_SIZE - 1 - head + tail;
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return tail - head - 1;
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}
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void HardwareSerial::flush()
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{
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// If we have never written a byte, no need to flush. This special
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// case is needed since there is no way to force the TXC (transmit
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// complete) bit to 1 during initialization
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if (!_written)
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return;
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while (bit_is_set(*_ucsrb, UDRIE0) || bit_is_clear(*_ucsra, TXC0)) {
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if (bit_is_clear(SREG, SREG_I) && bit_is_set(*_ucsrb, UDRIE0))
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// Interrupts are globally disabled, but the DR empty
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// interrupt should be enabled, so poll the DR empty flag to
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// prevent deadlock
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if (bit_is_set(*_ucsra, UDRE0))
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_tx_udr_empty_irq();
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}
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// If we get here, nothing is queued anymore (DRIE is disabled) and
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// the hardware finished tranmission (TXC is set).
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}
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size_t HardwareSerial::write(uint8_t c)
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{
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_written = true;
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// If the buffer and the data register is empty, just write the byte
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// to the data register and be done. This shortcut helps
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// significantly improve the effective datarate at high (>
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// 500kbit/s) bitrates, where interrupt overhead becomes a slowdown.
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if (_tx_buffer_head == _tx_buffer_tail && bit_is_set(*_ucsra, UDRE0)) {
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*_udr = c;
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sbi(*_ucsra, TXC0);
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return 1;
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}
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tx_buffer_index_t i = (_tx_buffer_head + 1) % SERIAL_TX_BUFFER_SIZE;
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// If the output buffer is full, there's nothing for it other than to
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// wait for the interrupt handler to empty it a bit
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while (i == _tx_buffer_tail) {
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if (bit_is_clear(SREG, SREG_I)) {
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// Interrupts are disabled, so we'll have to poll the data
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// register empty flag ourselves. If it is set, pretend an
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// interrupt has happened and call the handler to free up
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// space for us.
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if(bit_is_set(*_ucsra, UDRE0))
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_tx_udr_empty_irq();
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} else {
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// nop, the interrupt handler will free up space for us
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}
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}
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_tx_buffer[_tx_buffer_head] = c;
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_tx_buffer_head = i;
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sbi(*_ucsrb, UDRIE0);
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return 1;
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}
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#endif // whole file
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