Sandeep Mistry 48ff3a10ad release TWI bus right after stop or repeated start is condition ... this resolves timing issues seen in #1477		2015-10-22 16:29:43 +02:00
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twi.c	release TWI bus right after stop or repeated start is condition	2015-10-22 16:29:43 +02:00
twi.h	implement Wire.end() for AVR core	2015-08-25 10:24:24 -04:00