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400 lines
9.9 KiB
C
400 lines
9.9 KiB
C
/* ----------------------------------------------------------------------------
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* SAM Software Package License
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* ----------------------------------------------------------------------------
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* Copyright (c) 2011-2012, Atmel Corporation
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following condition is met:
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*
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* - Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the disclaimer below.
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*
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* Atmel's name may not be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* ----------------------------------------------------------------------------
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*/
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#include "../chip.h"
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/// @cond 0
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/**INDENT-OFF**/
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**INDENT-ON**/
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/// @endcond
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/**
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* \defgroup sam_drivers_adc_group Analog-to-digital Converter (ADC)
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*
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* Driver for the Analog-to-digital Converter. This driver provides access to the main
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* features of the ADC controller.
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*
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* @{
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*/
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#if SAM3U_SERIES
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/**
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* \brief Initialize the given ADC with the specified ADC clock and startup time.
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*
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* \param p_adc Pointer to an ADC instance.
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* \param ul_mck Main clock of the device (in Hz).
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* \param ul_adc_clock Analog-to-Digital conversion clock (in Hz).
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* \param ul_startuptime ADC startup time value (value in us).
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* Please refer to the product datasheet for more details.
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* \param ul_offmode_startuptime ADC off mode startup time value (value in us).
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* Please refer to the product datasheet for more details.
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*
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* \return 0 on success.
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*/
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uint32_t adc12b_init(Adc12b *p_adc, const uint32_t ul_mck, const uint32_t ul_adc_clock,
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const uint32_t ul_startuptime, const uint32_t ul_offmode_startuptime)
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{
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uint32_t ul_prescal, ul_startup, ul_offmode;
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p_adc->ADC12B_CR = ADC12B_CR_SWRST;
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/* Reset Mode Register */
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p_adc->ADC12B_MR = 0;
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/* Reset PDC transfer */
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p_adc->ADC12B_PTCR = (ADC12B_PTCR_RXTDIS | ADC12B_PTCR_TXTDIS);
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p_adc->ADC12B_RCR = 0;
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p_adc->ADC12B_RNCR = 0;
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ul_prescal = ul_mck / (2 * ul_adc_clock) - 1;
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ul_startup = ((ul_adc_clock / 1000000) * ul_startuptime / 8) - 1;
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ul_offmode = ((ul_adc_clock / 1000000) * ul_offmode_startuptime / 8) -
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1;
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p_adc->ADC12B_MR |=
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ADC12B_MR_PRESCAL(ul_prescal) | ((ul_startup <<
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ADC12B_MR_STARTUP_Pos) &
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ADC12B_MR_STARTUP_Msk);
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p_adc->ADC12B_EMR |= (ul_offmode << 16) & (0xffu << 16);
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return 0;
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}
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/**
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* \brief Configure conversion resolution.
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*
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* \param p_adc Pointer to an ADC instance.
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* \param resolution ADC resolution.
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*/
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void adc12b_set_resolution(Adc12b *p_adc, const enum adc_resolution_t resolution)
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{
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p_adc->ADC12B_MR |= (resolution << 4) & ADC12B_MR_LOWRES;
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}
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/**
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* \brief Configure conversion trigger and free run mode.
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*
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* \param p_adc Pointer to an ADC instance.
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* \param trigger Conversion trigger.
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*/
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void adc12b_configure_trigger(Adc12b *p_adc, const enum adc_trigger_t trigger)
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{
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p_adc->ADC12B_MR |= trigger;
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}
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/**
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* \brief Configure ADC power saving mode.
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*
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* \param p_adc Pointer to an ADC instance.
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* \param uc_sleep ADC_MR_SLEEP_NORMAL keeps the ADC Core and reference
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* voltage circuitry ON between conversions.
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* ADC_MR_SLEEP_SLEEP keeps the ADC Core and reference voltage circuitry
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* OFF between conversions.
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* \param uc_offmode 0 Standby Mode (if Sleep Bit = 1), 1 Off Mode.
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*/
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void adc12b_configure_power_save(Adc12b *p_adc, const uint8_t uc_sleep,
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uint8_t uc_offmode)
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{
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p_adc->ADC12B_MR |= ((uc_sleep << 5) & ADC12B_MR_SLEEP);
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p_adc->ADC12B_EMR |= uc_offmode;
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}
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/**
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* \brief Configure ADC timing.
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*
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* \param p_adc Pointer to an ADC instance.
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* \param ul_sh ADC sample and hold time = uc_sh / ADC clock.
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*/
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void adc12b_configure_timing(Adc12b *p_adc, const uint32_t ul_sh)
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{
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p_adc->ADC12B_MR |= ADC12B_MR_SHTIM(ul_sh);
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}
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/**
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* \brief Start ADC conversion.
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*
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* \note If one of the hardware event is selected as ADC trigger,
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* this function can NOT start ADC conversion.
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*
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* \param p_adc Pointer to an ADC instance.
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*/
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void adc12b_start(Adc12b *p_adc)
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{
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p_adc->ADC12B_CR = ADC12B_CR_START;
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}
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/**
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* \brief Stop ADC conversion.
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* \param p_adc Pointer to an ADC instance.
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*/
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void adc12b_stop(Adc12b *p_adc)
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{
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p_adc->ADC12B_CR = ADC12B_CR_SWRST;
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}
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/**
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* \brief Enable the specified ADC channel.
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*
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* \param p_adc Pointer to an ADC instance.
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* \param adc_ch ADC channel number.
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*/
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void adc12b_enable_channel(Adc12b *p_adc, const enum adc_channel_num_t adc_ch)
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{
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p_adc->ADC12B_CHER = 1 << adc_ch;
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}
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/**
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* \brief Enable all ADC channels.
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*
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* \param p_adc Pointer to an ADC instance.
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*/
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void adc12b_enable_all_channel(Adc12b *p_adc)
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{
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p_adc->ADC12B_CHER = 0xFF;
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}
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/**
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* \brief Disable the specified ADC channel.
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*
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* \param p_adc Pointer to an ADC instance.
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* \param adc_ch ADC channel number.
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*/
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void adc12b_disable_channel(Adc12b *p_adc, const enum adc_channel_num_t adc_ch)
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{
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p_adc->ADC12B_CHDR = 1 << adc_ch;
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}
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/**
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* \brief Disable all ADC channel.
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*
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* \param p_adc Pointer to an ADC instance.
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*/
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void adc12b_disable_all_channel(Adc12b *p_adc)
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{
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p_adc->ADC12B_CHDR = 0xFF;
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}
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/**
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* \brief Read the ADC channel status.
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*
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* \param p_adc Pointer to an ADC instance.
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* \param adc_ch ADC channel number.
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*
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* \retval 1 if channel is enabled.
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* \retval 0 if channel is disabled.
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*/
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uint32_t adc12b_get_channel_status(const Adc12b *p_adc, const enum adc_channel_num_t adc_ch)
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{
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return p_adc->ADC12B_CHSR & (1 << adc_ch);
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}
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/**
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* \brief Read the ADC result data of the specified channel.
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*
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* \param p_adc Pointer to an ADC instance.
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* \param adc_ch ADC channel number.
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*
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* \return ADC value of the specified channel.
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*/
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uint32_t adc12b_get_channel_value(const Adc12b *p_adc,const enum adc_channel_num_t adc_ch)
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{
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uint32_t dwData = 0;
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if (15 >= adc_ch) {
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dwData = *(p_adc->ADC12B_CDR + adc_ch);
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}
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return dwData;
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}
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/**
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* \brief Read the last ADC result data.
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*
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* \param p_adc Pointer to an ADC instance.
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*
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* \return ADC latest value.
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*/
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uint32_t adc12b_get_latest_value(const Adc12b *p_adc)
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{
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return p_adc->ADC12B_LCDR;
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}
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/**
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* \brief Enable differential input for all channels.
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*
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* \param p_adc Pointer to an ADC instance.
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*/
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void adc12b_enable_differential_input(Adc12b *p_adc)
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{
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p_adc->ADC12B_ACR |= (0x01u << 16);
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}
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/**
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* \brief Disable differential input for the specified channel.
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*
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* \param p_adc Pointer to an ADC instance.
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*/
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void adc12b_disable_differential_input(Adc12b *p_adc)
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{
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p_adc->ADC12B_ACR &= (0x01u << 16);
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}
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/**
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* \brief Enable analog signal offset for the specified channel.
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*
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* \param p_adc Pointer to an ADC instance.
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*/
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void adc12b_enable_input_offset(Adc12b *p_adc)
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{
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p_adc->ADC12B_ACR |= (0x01u << 17);
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}
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/**
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* \brief Disable analog signal offset for the specified channel.
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*
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* \param p_adc Pointer to an ADC instance.
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*/
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void adc12b_disable_input_offset(Adc12b *p_adc)
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{
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p_adc->ADC12B_ACR &= (0x01u << 17);
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}
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/**
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* \brief Configure input gain for the specified channel.
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*
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* \param p_adc Pointer to an ADC instance.
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* \param gain Gain value for the input.
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*/
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void adc12b_set_input_gain(Adc12b *p_adc, const enum adc_gainvalue_t gain)
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{
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p_adc->ADC12B_ACR |= (0x03u & gain);
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}
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/**
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* \brief Return the actual ADC clock.
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*
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* \param p_adc Pointer to an ADC instance.
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* \param ul_mck Main clock of the device (in Hz).
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*
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* \retval 0 The actual ADC clock (in Hz).
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*/
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uint32_t adc12b_get_actual_adc_clock(const Adc12b *p_adc, const uint32_t ul_mck)
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{
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uint32_t ul_adcfreq;
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uint32_t ul_prescal;
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/* ADCClock = MCK / ( (PRESCAL+1) * 2 ) */
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ul_prescal = ((p_adc->ADC12B_MR & ADC12B_MR_PRESCAL_Msk) >>
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ADC12B_MR_PRESCAL_Pos);
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ul_adcfreq = ul_mck / ((ul_prescal + 1) * 2);
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return ul_adcfreq;
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}
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/**
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* \brief Enable ADC interrupts.
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*
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* \param p_adc Pointer to an ADC instance.
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* \param ul_source Interrupts to be enabled.
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*/
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void adc12b_enable_interrupt(Adc12b *p_adc, const uint32_t ul_source)
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{
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p_adc->ADC12B_IER = ul_source;
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}
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/**
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* \brief Disable ADC interrupts.
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*
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* \param p_adc Pointer to an ADC instance.
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* \param ul_source Interrupts to be disabled.
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*/
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void adc12b_disable_interrupt(Adc12b *p_adc, const uint32_t ul_source)
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{
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p_adc->ADC12B_IDR = ul_source;
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}
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/** \brief Read ADC interrupt mask.
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*
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* \param p_adc Pointer to an ADC instance.
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*
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* \return The interrupt mask value.
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*/
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uint32_t adc12b_get_interrupt_mask(const Adc12b *p_adc)
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{
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return p_adc->ADC12B_IMR;
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}
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/**
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* \brief Read ADC interrupt status.
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*
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* \param p_adc Pointer to an ADC instance.
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*
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* \retval ADC interrupt status.
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*/
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uint32_t adc12b_get_status(const Adc12b *p_adc)
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{
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return p_adc->ADC12B_SR;
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}
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/**
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* \brief Adapt performance versus power consumption.
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*
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* \note Please refer to ADC Characteristics in the product datasheet
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* for more details.
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*
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* \param p_adc Pointer to an ADC instance.
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* \param uc_ibctl ADC Bias current control.
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*/
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void adc12b_set_bias_current(Adc12b *p_adc, const uint8_t uc_ibctl)
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{
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p_adc->ADC12B_ACR |= ADC12B_ACR_IBCTL(uc_ibctl);
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}
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/**
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* \brief Get PDC registers base address.
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*
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* \param p_adc Pointer to an ADC instance.
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*
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* \return ADC PDC register base address.
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*/
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Pdc *adc12b_get_pdc_base(const Adc12b *p_adc)
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{
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return PDC_ADC12B;
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}
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#endif // SAM3U_SERIES
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//@}
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/// @cond 0
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/**INDENT-OFF**/
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#ifdef __cplusplus
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}
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#endif
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/**INDENT-ON**/
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/// @endcond
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