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274 lines
7.8 KiB
C
274 lines
7.8 KiB
C
/* Copyright 2009-2011 Oleg Mazurov, Circuits At Home, http://www.circuitsathome.com */
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/* MAX3421E register/bit names and bitmasks */
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#ifndef _MAX3421Econstants_h_
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#define _MAX3421Econstants_h_
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/* SPI pins for diffrent Arduinos */
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#define MEGA256_IS_ADK // Undefine this if you're using a non-ADK Mega256
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// TODO: Check if the 2560 check should use `defined` too.
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#if defined(__AVR_ATmega1280__) || (__AVR_ATmega2560__)
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#define SCK_PIN 52
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#define MISO_PIN 50
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#define MOSI_PIN 51
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#if defined(__AVR_ATmega2560__) && defined(MEGA256_IS_ADK)
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#define TARGET_MEGA_ADK
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#define SS_PIN 53 // TODO: Handle this as an internal pin.
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#else
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// TODO: Test with Mega + shield combination
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#define SS_PIN 53
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#endif
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#elif defined(__AVR_ATmega168__) || defined(__AVR_ATmega328P__)
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#define SCK_PIN 13
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#define MISO_PIN 12
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#define MOSI_PIN 11
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#define SS_PIN 10
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#else
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#error The currently selected board needs to have its SPI pin definitions added to this file.
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#endif
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#if !defined(TARGET_MEGA_ADK)
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#define MAX_SS SS_PIN
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#define MAX_INT 9
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#define MAX_GPX 8
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#define MAX_RESET 7
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#else
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// Because the Arduino Mega ADK board uses "internal" pins (i.e. ones that
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// are not broken out to headers, are not in `pins_arduino.h` and can't
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// be used with functions like `pinMode()` & `digitalWrite()`) they need
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// to be defined by the low-level AVR approach.
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// These definitions and the code to use them comes from an older version
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// of the `Max3421e.cpp` file.
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// TODO: Add these internal pins to `pins_arduino.h` for the Mega ADK so
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// we can usual the standard Arduino functions & not special-case this?
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#define INT PE6
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#define INT_PORT PORTE
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#define INT_DDR DDRE
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#define INT_PIN PINE
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#define RST PJ2
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#define RST_PORT PORTJ
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#define RST_DDR DDRJ
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#define RST_PIN PINJ
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#define GPX PJ3
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#define GPX_PORT PORTJ
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#define GPX_DDR DDRJ
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#define GPX_PIN PINJ
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#define MAX_SS SS_PIN // TODO: Handle this as an internal pin.
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#endif
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/* "Breakpoint" pins for debugging */
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//#define BPNT_0 3
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//#define BPNT_1 2
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//#define Select_MAX3421E digitalWrite(MAX_SS,LOW)
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//#define Deselect_MAX3421E digitalWrite(MAX_SS,HIGH)
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/* */
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#define ON true
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#define OFF false
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/* VBUS states */
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#define SE0 0
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#define SE1 1
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#define FSHOST 2
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#define LSHOST 3
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/* MAX3421E command byte format: rrrrr0wa where 'r' is register number */
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//
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// MAX3421E Registers in HOST mode.
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//
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#define rRCVFIFO 0x08 //1<<3
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#define rSNDFIFO 0x10 //2<<3
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#define rSUDFIFO 0x20 //4<<3
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#define rRCVBC 0x30 //6<<3
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#define rSNDBC 0x38 //7<<3
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#define rUSBIRQ 0x68 //13<<3
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/* USBIRQ Bits */
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#define bmVBUSIRQ 0x40 //b6
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#define bmNOVBUSIRQ 0x20 //b5
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#define bmOSCOKIRQ 0x01 //b0
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#define rUSBIEN 0x70 //14<<3
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/* USBIEN Bits */
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#define bmVBUSIE 0x40 //b6
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#define bmNOVBUSIE 0x20 //b5
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#define bmOSCOKIE 0x01 //b0
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#define rUSBCTL 0x78 //15<<3
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/* USBCTL Bits */
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#define bmCHIPRES 0x20 //b5
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#define bmPWRDOWN 0x10 //b4
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#define rCPUCTL 0x80 //16<<3
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/* CPUCTL Bits */
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#define bmPUSLEWID1 0x80 //b7
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#define bmPULSEWID0 0x40 //b6
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#define bmIE 0x01 //b0
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#define rPINCTL 0x88 //17<<3
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/* PINCTL Bits */
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#define bmFDUPSPI 0x10 //b4
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#define bmINTLEVEL 0x08 //b3
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#define bmPOSINT 0x04 //b2
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#define bmGPXB 0x02 //b1
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#define bmGPXA 0x01 //b0
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// GPX pin selections
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#define GPX_OPERATE 0x00
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#define GPX_VBDET 0x01
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#define GPX_BUSACT 0x02
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#define GPX_SOF 0x03
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#define rREVISION 0x90 //18<<3
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#define rIOPINS1 0xa0 //20<<3
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/* IOPINS1 Bits */
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#define bmGPOUT0 0x01
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#define bmGPOUT1 0x02
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#define bmGPOUT2 0x04
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#define bmGPOUT3 0x08
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#define bmGPIN0 0x10
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#define bmGPIN1 0x20
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#define bmGPIN2 0x40
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#define bmGPIN3 0x80
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#define rIOPINS2 0xa8 //21<<3
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/* IOPINS2 Bits */
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#define bmGPOUT4 0x01
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#define bmGPOUT5 0x02
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#define bmGPOUT6 0x04
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#define bmGPOUT7 0x08
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#define bmGPIN4 0x10
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#define bmGPIN5 0x20
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#define bmGPIN6 0x40
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#define bmGPIN7 0x80
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#define rGPINIRQ 0xb0 //22<<3
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/* GPINIRQ Bits */
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#define bmGPINIRQ0 0x01
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#define bmGPINIRQ1 0x02
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#define bmGPINIRQ2 0x04
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#define bmGPINIRQ3 0x08
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#define bmGPINIRQ4 0x10
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#define bmGPINIRQ5 0x20
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#define bmGPINIRQ6 0x40
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#define bmGPINIRQ7 0x80
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#define rGPINIEN 0xb8 //23<<3
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/* GPINIEN Bits */
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#define bmGPINIEN0 0x01
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#define bmGPINIEN1 0x02
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#define bmGPINIEN2 0x04
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#define bmGPINIEN3 0x08
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#define bmGPINIEN4 0x10
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#define bmGPINIEN5 0x20
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#define bmGPINIEN6 0x40
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#define bmGPINIEN7 0x80
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#define rGPINPOL 0xc0 //24<<3
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/* GPINPOL Bits */
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#define bmGPINPOL0 0x01
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#define bmGPINPOL1 0x02
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#define bmGPINPOL2 0x04
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#define bmGPINPOL3 0x08
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#define bmGPINPOL4 0x10
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#define bmGPINPOL5 0x20
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#define bmGPINPOL6 0x40
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#define bmGPINPOL7 0x80
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#define rHIRQ 0xc8 //25<<3
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/* HIRQ Bits */
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#define bmBUSEVENTIRQ 0x01 // indicates BUS Reset Done or BUS Resume
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#define bmRWUIRQ 0x02
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#define bmRCVDAVIRQ 0x04
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#define bmSNDBAVIRQ 0x08
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#define bmSUSDNIRQ 0x10
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#define bmCONDETIRQ 0x20
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#define bmFRAMEIRQ 0x40
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#define bmHXFRDNIRQ 0x80
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#define rHIEN 0xd0 //26<<3
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/* HIEN Bits */
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#define bmBUSEVENTIE 0x01
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#define bmRWUIE 0x02
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#define bmRCVDAVIE 0x04
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#define bmSNDBAVIE 0x08
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#define bmSUSDNIE 0x10
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#define bmCONDETIE 0x20
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#define bmFRAMEIE 0x40
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#define bmHXFRDNIE 0x80
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#define rMODE 0xd8 //27<<3
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/* MODE Bits */
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#define bmHOST 0x01
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#define bmLOWSPEED 0x02
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#define bmHUBPRE 0x04
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#define bmSOFKAENAB 0x08
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#define bmSEPIRQ 0x10
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#define bmDELAYISO 0x20
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#define bmDMPULLDN 0x40
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#define bmDPPULLDN 0x80
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#define rPERADDR 0xe0 //28<<3
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#define rHCTL 0xe8 //29<<3
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/* HCTL Bits */
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#define bmBUSRST 0x01
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#define bmFRMRST 0x02
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#define bmSAMPLEBUS 0x04
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#define bmSIGRSM 0x08
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#define bmRCVTOG0 0x10
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#define bmRCVTOG1 0x20
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#define bmSNDTOG0 0x40
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#define bmSNDTOG1 0x80
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#define rHXFR 0xf0 //30<<3
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/* Host transfer token values for writing the HXFR register (R30) */
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/* OR this bit field with the endpoint number in bits 3:0 */
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#define tokSETUP 0x10 // HS=0, ISO=0, OUTNIN=0, SETUP=1
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#define tokIN 0x00 // HS=0, ISO=0, OUTNIN=0, SETUP=0
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#define tokOUT 0x20 // HS=0, ISO=0, OUTNIN=1, SETUP=0
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#define tokINHS 0x80 // HS=1, ISO=0, OUTNIN=0, SETUP=0
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#define tokOUTHS 0xA0 // HS=1, ISO=0, OUTNIN=1, SETUP=0
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#define tokISOIN 0x40 // HS=0, ISO=1, OUTNIN=0, SETUP=0
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#define tokISOOUT 0x60 // HS=0, ISO=1, OUTNIN=1, SETUP=0
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#define rHRSL 0xf8 //31<<3
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/* HRSL Bits */
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#define bmRCVTOGRD 0x10
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#define bmSNDTOGRD 0x20
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#define bmKSTATUS 0x40
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#define bmJSTATUS 0x80
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#define bmSE0 0x00 //SE0 - disconnect state
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#define bmSE1 0xc0 //SE1 - illegal state
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/* Host error result codes, the 4 LSB's in the HRSL register */
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#define hrSUCCESS 0x00
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#define hrBUSY 0x01
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#define hrBADREQ 0x02
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#define hrUNDEF 0x03
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#define hrNAK 0x04
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#define hrSTALL 0x05
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#define hrTOGERR 0x06
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#define hrWRONGPID 0x07
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#define hrBADBC 0x08
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#define hrPIDERR 0x09
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#define hrPKTERR 0x0A
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#define hrCRCERR 0x0B
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#define hrKERR 0x0C
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#define hrJERR 0x0D
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#define hrTIMEOUT 0x0E
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#define hrBABBLE 0x0F
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#define MODE_FS_HOST (bmDPPULLDN|bmDMPULLDN|bmHOST|bmSOFKAENAB)
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#define MODE_LS_HOST (bmDPPULLDN|bmDMPULLDN|bmHOST|bmLOWSPEED|bmSOFKAENAB)
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#endif //_MAX3421Econstants_h_
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