mirror of
https://github.com/arduino/Arduino.git
synced 2025-01-30 19:52:13 +01:00
a57d315e4b
Optiboot does not support ArduinoasISP programmer. When avrdude runs and talks to an arduino running ArduinoISP, it needs the optiboot (entered due to auto-reset) to abort and start the ArduinoISP "application" when it sees communications at the wrong serial speed. Unfortunately, optiboot treats all unrecognized command characters as "no-ops" and responds/loops for more commands, leading to a nice loop that never gets to the sketch. This patch causes characters received with Framing errors (the most likely error for speed mis-matches) to NOT reset the watchdog timer (normally done in getch()), which will cause the application to start if it continues for "a while." (tested. Works! Running ArduinoISP at speeds as high as 57600 still causes the bootloader to start the sketch (although it fails later on for other reasons.)) (cherry picked from commit e81c1123b624b6cac7da018c9c786700f3152bc9)
572 lines
18 KiB
Plaintext
572 lines
18 KiB
Plaintext
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optiboot_pro_20mhz.elf: file format elf32-avr
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Sections:
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Idx Name Size VMA LMA File off Algn
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0 .text 000001e2 00003e00 00003e00 00000054 2**1
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CONTENTS, ALLOC, LOAD, READONLY, CODE
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1 .version 00000002 00003ffe 00003ffe 00000236 2**0
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CONTENTS, READONLY
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2 .debug_aranges 00000028 00000000 00000000 00000238 2**0
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CONTENTS, READONLY, DEBUGGING
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3 .debug_pubnames 0000005f 00000000 00000000 00000260 2**0
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CONTENTS, READONLY, DEBUGGING
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4 .debug_info 0000028e 00000000 00000000 000002bf 2**0
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CONTENTS, READONLY, DEBUGGING
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5 .debug_abbrev 00000171 00000000 00000000 0000054d 2**0
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CONTENTS, READONLY, DEBUGGING
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6 .debug_line 0000045e 00000000 00000000 000006be 2**0
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CONTENTS, READONLY, DEBUGGING
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7 .debug_frame 00000080 00000000 00000000 00000b1c 2**2
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CONTENTS, READONLY, DEBUGGING
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8 .debug_str 00000149 00000000 00000000 00000b9c 2**0
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CONTENTS, READONLY, DEBUGGING
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9 .debug_loc 0000027e 00000000 00000000 00000ce5 2**0
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CONTENTS, READONLY, DEBUGGING
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10 .debug_ranges 00000060 00000000 00000000 00000f63 2**0
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CONTENTS, READONLY, DEBUGGING
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Disassembly of section .text:
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00003e00 <main>:
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#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4))
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#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6))
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#endif
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/* main program starts here */
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int main(void) {
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3e00: 11 24 eor r1, r1
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#ifdef __AVR_ATmega8__
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SP=RAMEND; // This is done by hardware reset
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#endif
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// Adaboot no-wait mod
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ch = MCUSR;
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3e02: 84 b7 in r24, 0x34 ; 52
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MCUSR = 0;
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3e04: 14 be out 0x34, r1 ; 52
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if (!(ch & _BV(EXTRF))) appStart();
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3e06: 81 ff sbrs r24, 1
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3e08: e7 d0 rcall .+462 ; 0x3fd8 <appStart>
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#if LED_START_FLASHES > 0
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// Set up Timer 1 for timeout counter
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TCCR1B = _BV(CS12) | _BV(CS10); // div 1024
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3e0a: 85 e0 ldi r24, 0x05 ; 5
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3e0c: 80 93 81 00 sts 0x0081, r24
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UCSRA = _BV(U2X); //Double speed mode USART
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UCSRB = _BV(RXEN) | _BV(TXEN); // enable Rx & Tx
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UCSRC = _BV(URSEL) | _BV(UCSZ1) | _BV(UCSZ0); // config USART; 8N1
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UBRRL = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 );
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#else
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UCSR0A = _BV(U2X0); //Double speed mode USART0
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3e10: 82 e0 ldi r24, 0x02 ; 2
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3e12: 80 93 c0 00 sts 0x00C0, r24
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UCSR0B = _BV(RXEN0) | _BV(TXEN0);
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3e16: 88 e1 ldi r24, 0x18 ; 24
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3e18: 80 93 c1 00 sts 0x00C1, r24
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UCSR0C = _BV(UCSZ00) | _BV(UCSZ01);
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3e1c: 86 e0 ldi r24, 0x06 ; 6
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3e1e: 80 93 c2 00 sts 0x00C2, r24
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UBRR0L = (uint8_t)( (F_CPU + BAUD_RATE * 4L) / (BAUD_RATE * 8L) - 1 );
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3e22: 85 e1 ldi r24, 0x15 ; 21
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3e24: 80 93 c4 00 sts 0x00C4, r24
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#endif
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#endif
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// Set up watchdog to trigger after 500ms
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watchdogConfig(WATCHDOG_1S);
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3e28: 8e e0 ldi r24, 0x0E ; 14
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3e2a: c0 d0 rcall .+384 ; 0x3fac <watchdogConfig>
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/* Set LED pin as output */
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LED_DDR |= _BV(LED);
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3e2c: 25 9a sbi 0x04, 5 ; 4
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3e2e: 86 e0 ldi r24, 0x06 ; 6
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}
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#if LED_START_FLASHES > 0
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void flash_led(uint8_t count) {
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do {
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TCNT1 = -(F_CPU/(1024*16));
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3e30: 2c e3 ldi r18, 0x3C ; 60
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3e32: 3b ef ldi r19, 0xFB ; 251
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TIFR1 = _BV(TOV1);
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3e34: 91 e0 ldi r25, 0x01 ; 1
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}
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#if LED_START_FLASHES > 0
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void flash_led(uint8_t count) {
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do {
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TCNT1 = -(F_CPU/(1024*16));
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3e36: 30 93 85 00 sts 0x0085, r19
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3e3a: 20 93 84 00 sts 0x0084, r18
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TIFR1 = _BV(TOV1);
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3e3e: 96 bb out 0x16, r25 ; 22
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while(!(TIFR1 & _BV(TOV1)));
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3e40: b0 9b sbis 0x16, 0 ; 22
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3e42: fe cf rjmp .-4 ; 0x3e40 <main+0x40>
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#ifdef __AVR_ATmega8__
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LED_PORT ^= _BV(LED);
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#else
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LED_PIN |= _BV(LED);
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3e44: 1d 9a sbi 0x03, 5 ; 3
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}
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#endif
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// Watchdog functions. These are only safe with interrupts turned off.
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void watchdogReset() {
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__asm__ __volatile__ (
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3e46: a8 95 wdr
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LED_PORT ^= _BV(LED);
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#else
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LED_PIN |= _BV(LED);
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#endif
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watchdogReset();
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} while (--count);
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3e48: 81 50 subi r24, 0x01 ; 1
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3e4a: a9 f7 brne .-22 ; 0x3e36 <main+0x36>
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/* get character from UART */
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ch = getch();
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if(ch == STK_GET_PARAMETER) {
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// GET PARAMETER returns a generic 0x03 reply - enough to keep Avrdude happy
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getNch(1);
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3e4c: 99 24 eor r9, r9
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3e4e: 93 94 inc r9
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__boot_page_fill_short((uint16_t)(void*)addrPtr,a);
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addrPtr += 2;
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} while (--ch);
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// Write from programming buffer
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__boot_page_write_short((uint16_t)(void*)address);
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3e50: a5 e0 ldi r26, 0x05 ; 5
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3e52: aa 2e mov r10, r26
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boot_spm_busy_wait();
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#if defined(RWWSRE)
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// Reenable read access to flash
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boot_rww_enable();
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3e54: f1 e1 ldi r31, 0x11 ; 17
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3e56: bf 2e mov r11, r31
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#endif
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/* Forever loop */
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for (;;) {
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/* get character from UART */
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ch = getch();
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3e58: 9d d0 rcall .+314 ; 0x3f94 <getch>
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if(ch == STK_GET_PARAMETER) {
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3e5a: 81 34 cpi r24, 0x41 ; 65
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3e5c: 21 f4 brne .+8 ; 0x3e66 <main+0x66>
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// GET PARAMETER returns a generic 0x03 reply - enough to keep Avrdude happy
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getNch(1);
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3e5e: 81 e0 ldi r24, 0x01 ; 1
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3e60: b3 d0 rcall .+358 ; 0x3fc8 <getNch>
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putch(0x03);
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3e62: 83 e0 ldi r24, 0x03 ; 3
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3e64: 1f c0 rjmp .+62 ; 0x3ea4 <main+0xa4>
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}
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else if(ch == STK_SET_DEVICE) {
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3e66: 82 34 cpi r24, 0x42 ; 66
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3e68: 11 f4 brne .+4 ; 0x3e6e <main+0x6e>
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// SET DEVICE is ignored
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getNch(20);
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3e6a: 84 e1 ldi r24, 0x14 ; 20
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3e6c: 03 c0 rjmp .+6 ; 0x3e74 <main+0x74>
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}
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else if(ch == STK_SET_DEVICE_EXT) {
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3e6e: 85 34 cpi r24, 0x45 ; 69
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3e70: 19 f4 brne .+6 ; 0x3e78 <main+0x78>
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// SET DEVICE EXT is ignored
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getNch(5);
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3e72: 85 e0 ldi r24, 0x05 ; 5
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3e74: a9 d0 rcall .+338 ; 0x3fc8 <getNch>
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3e76: 83 c0 rjmp .+262 ; 0x3f7e <main+0x17e>
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}
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else if(ch == STK_LOAD_ADDRESS) {
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3e78: 85 35 cpi r24, 0x55 ; 85
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3e7a: 79 f4 brne .+30 ; 0x3e9a <main+0x9a>
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// LOAD ADDRESS
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uint16_t newAddress;
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newAddress = getch();
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3e7c: 8b d0 rcall .+278 ; 0x3f94 <getch>
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newAddress = (newAddress & 0xff) | (getch() << 8);
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3e7e: e8 2e mov r14, r24
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3e80: ff 24 eor r15, r15
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3e82: 88 d0 rcall .+272 ; 0x3f94 <getch>
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3e84: 08 2f mov r16, r24
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3e86: 10 e0 ldi r17, 0x00 ; 0
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3e88: 10 2f mov r17, r16
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3e8a: 00 27 eor r16, r16
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3e8c: 0e 29 or r16, r14
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3e8e: 1f 29 or r17, r15
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#ifdef RAMPZ
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// Transfer top bit to RAMPZ
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RAMPZ = (newAddress & 0x8000) ? 1 : 0;
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#endif
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newAddress += newAddress; // Convert from word address to byte address
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3e90: 00 0f add r16, r16
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3e92: 11 1f adc r17, r17
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address = newAddress;
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verifySpace();
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3e94: 91 d0 rcall .+290 ; 0x3fb8 <verifySpace>
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3e96: 68 01 movw r12, r16
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3e98: 72 c0 rjmp .+228 ; 0x3f7e <main+0x17e>
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}
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else if(ch == STK_UNIVERSAL) {
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3e9a: 86 35 cpi r24, 0x56 ; 86
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3e9c: 29 f4 brne .+10 ; 0x3ea8 <main+0xa8>
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// UNIVERSAL command is ignored
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getNch(4);
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3e9e: 84 e0 ldi r24, 0x04 ; 4
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3ea0: 93 d0 rcall .+294 ; 0x3fc8 <getNch>
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putch(0x00);
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3ea2: 80 e0 ldi r24, 0x00 ; 0
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3ea4: 6f d0 rcall .+222 ; 0x3f84 <putch>
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3ea6: 6b c0 rjmp .+214 ; 0x3f7e <main+0x17e>
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}
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/* Write memory, length is big endian and is in bytes */
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else if(ch == STK_PROG_PAGE) {
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3ea8: 84 36 cpi r24, 0x64 ; 100
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3eaa: 09 f0 breq .+2 ; 0x3eae <main+0xae>
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3eac: 42 c0 rjmp .+132 ; 0x3f32 <main+0x132>
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// PROGRAM PAGE - we support flash programming only, not EEPROM
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uint8_t *bufPtr;
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uint16_t addrPtr;
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getch(); /* getlen() */
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3eae: 72 d0 rcall .+228 ; 0x3f94 <getch>
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length = getch();
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3eb0: 71 d0 rcall .+226 ; 0x3f94 <getch>
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3eb2: 08 2f mov r16, r24
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getch();
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3eb4: 6f d0 rcall .+222 ; 0x3f94 <getch>
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// If we are in RWW section, immediately start page erase
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if (address < NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address);
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3eb6: 80 e0 ldi r24, 0x00 ; 0
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3eb8: c8 16 cp r12, r24
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3eba: 88 e3 ldi r24, 0x38 ; 56
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3ebc: d8 06 cpc r13, r24
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3ebe: 20 f4 brcc .+8 ; 0x3ec8 <main+0xc8>
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3ec0: 83 e0 ldi r24, 0x03 ; 3
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3ec2: f6 01 movw r30, r12
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3ec4: 87 bf out 0x37, r24 ; 55
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3ec6: e8 95 spm
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3ec8: c0 e0 ldi r28, 0x00 ; 0
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3eca: d1 e0 ldi r29, 0x01 ; 1
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// While that is going on, read in page contents
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bufPtr = buff;
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do *bufPtr++ = getch();
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3ecc: 63 d0 rcall .+198 ; 0x3f94 <getch>
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3ece: 89 93 st Y+, r24
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while (--length);
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3ed0: 0c 17 cp r16, r28
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3ed2: e1 f7 brne .-8 ; 0x3ecc <main+0xcc>
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// If we are in NRWW section, page erase has to be delayed until now.
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// Todo: Take RAMPZ into account
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if (address >= NRWWSTART) __boot_page_erase_short((uint16_t)(void*)address);
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3ed4: f0 e0 ldi r31, 0x00 ; 0
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3ed6: cf 16 cp r12, r31
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3ed8: f8 e3 ldi r31, 0x38 ; 56
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3eda: df 06 cpc r13, r31
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3edc: 20 f0 brcs .+8 ; 0x3ee6 <main+0xe6>
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3ede: 83 e0 ldi r24, 0x03 ; 3
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3ee0: f6 01 movw r30, r12
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3ee2: 87 bf out 0x37, r24 ; 55
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3ee4: e8 95 spm
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// Read command terminator, start reply
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verifySpace();
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3ee6: 68 d0 rcall .+208 ; 0x3fb8 <verifySpace>
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// If only a partial page is to be programmed, the erase might not be complete.
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// So check that here
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boot_spm_busy_wait();
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3ee8: 07 b6 in r0, 0x37 ; 55
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3eea: 00 fc sbrc r0, 0
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3eec: fd cf rjmp .-6 ; 0x3ee8 <main+0xe8>
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3eee: a6 01 movw r20, r12
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3ef0: a0 e0 ldi r26, 0x00 ; 0
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3ef2: b1 e0 ldi r27, 0x01 ; 1
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bufPtr = buff;
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addrPtr = (uint16_t)(void*)address;
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ch = SPM_PAGESIZE / 2;
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do {
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uint16_t a;
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a = *bufPtr++;
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3ef4: 2c 91 ld r18, X
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3ef6: 30 e0 ldi r19, 0x00 ; 0
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a |= (*bufPtr++) << 8;
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3ef8: 11 96 adiw r26, 0x01 ; 1
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3efa: 8c 91 ld r24, X
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3efc: 11 97 sbiw r26, 0x01 ; 1
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3efe: 90 e0 ldi r25, 0x00 ; 0
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3f00: 98 2f mov r25, r24
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3f02: 88 27 eor r24, r24
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3f04: 82 2b or r24, r18
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3f06: 93 2b or r25, r19
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#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4))
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#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6))
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#endif
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/* main program starts here */
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int main(void) {
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3f08: 12 96 adiw r26, 0x02 ; 2
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ch = SPM_PAGESIZE / 2;
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do {
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uint16_t a;
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a = *bufPtr++;
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a |= (*bufPtr++) << 8;
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__boot_page_fill_short((uint16_t)(void*)addrPtr,a);
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3f0a: fa 01 movw r30, r20
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3f0c: 0c 01 movw r0, r24
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3f0e: 97 be out 0x37, r9 ; 55
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3f10: e8 95 spm
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3f12: 11 24 eor r1, r1
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addrPtr += 2;
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3f14: 4e 5f subi r20, 0xFE ; 254
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3f16: 5f 4f sbci r21, 0xFF ; 255
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} while (--ch);
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3f18: f1 e0 ldi r31, 0x01 ; 1
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3f1a: a0 38 cpi r26, 0x80 ; 128
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3f1c: bf 07 cpc r27, r31
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3f1e: 51 f7 brne .-44 ; 0x3ef4 <main+0xf4>
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// Write from programming buffer
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__boot_page_write_short((uint16_t)(void*)address);
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3f20: f6 01 movw r30, r12
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3f22: a7 be out 0x37, r10 ; 55
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3f24: e8 95 spm
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boot_spm_busy_wait();
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3f26: 07 b6 in r0, 0x37 ; 55
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3f28: 00 fc sbrc r0, 0
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3f2a: fd cf rjmp .-6 ; 0x3f26 <main+0x126>
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#if defined(RWWSRE)
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// Reenable read access to flash
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boot_rww_enable();
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3f2c: b7 be out 0x37, r11 ; 55
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3f2e: e8 95 spm
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3f30: 26 c0 rjmp .+76 ; 0x3f7e <main+0x17e>
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#endif
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}
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/* Read memory block mode, length is big endian. */
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else if(ch == STK_READ_PAGE) {
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3f32: 84 37 cpi r24, 0x74 ; 116
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3f34: b1 f4 brne .+44 ; 0x3f62 <main+0x162>
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// READ PAGE - we only read flash
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getch(); /* getlen() */
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3f36: 2e d0 rcall .+92 ; 0x3f94 <getch>
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length = getch();
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3f38: 2d d0 rcall .+90 ; 0x3f94 <getch>
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3f3a: f8 2e mov r15, r24
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getch();
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3f3c: 2b d0 rcall .+86 ; 0x3f94 <getch>
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verifySpace();
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3f3e: 3c d0 rcall .+120 ; 0x3fb8 <verifySpace>
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3f40: f6 01 movw r30, r12
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3f42: ef 2c mov r14, r15
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putch(result);
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address++;
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}
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while (--length);
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#else
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do putch(pgm_read_byte_near(address++));
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3f44: 8f 01 movw r16, r30
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3f46: 0f 5f subi r16, 0xFF ; 255
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3f48: 1f 4f sbci r17, 0xFF ; 255
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3f4a: 84 91 lpm r24, Z+
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3f4c: 1b d0 rcall .+54 ; 0x3f84 <putch>
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while (--length);
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3f4e: ea 94 dec r14
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3f50: f8 01 movw r30, r16
|
|
3f52: c1 f7 brne .-16 ; 0x3f44 <main+0x144>
|
|
#define rstVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+4))
|
|
#define wdtVect (*(uint16_t*)(RAMSTART+SPM_PAGESIZE*2+6))
|
|
#endif
|
|
|
|
/* main program starts here */
|
|
int main(void) {
|
|
3f54: 08 94 sec
|
|
3f56: c1 1c adc r12, r1
|
|
3f58: d1 1c adc r13, r1
|
|
3f5a: fa 94 dec r15
|
|
3f5c: cf 0c add r12, r15
|
|
3f5e: d1 1c adc r13, r1
|
|
3f60: 0e c0 rjmp .+28 ; 0x3f7e <main+0x17e>
|
|
#endif
|
|
#endif
|
|
}
|
|
|
|
/* Get device signature bytes */
|
|
else if(ch == STK_READ_SIGN) {
|
|
3f62: 85 37 cpi r24, 0x75 ; 117
|
|
3f64: 39 f4 brne .+14 ; 0x3f74 <main+0x174>
|
|
// READ SIGN - return what Avrdude wants to hear
|
|
verifySpace();
|
|
3f66: 28 d0 rcall .+80 ; 0x3fb8 <verifySpace>
|
|
putch(SIGNATURE_0);
|
|
3f68: 8e e1 ldi r24, 0x1E ; 30
|
|
3f6a: 0c d0 rcall .+24 ; 0x3f84 <putch>
|
|
putch(SIGNATURE_1);
|
|
3f6c: 84 e9 ldi r24, 0x94 ; 148
|
|
3f6e: 0a d0 rcall .+20 ; 0x3f84 <putch>
|
|
putch(SIGNATURE_2);
|
|
3f70: 86 e0 ldi r24, 0x06 ; 6
|
|
3f72: 98 cf rjmp .-208 ; 0x3ea4 <main+0xa4>
|
|
}
|
|
else if (ch == 'Q') {
|
|
3f74: 81 35 cpi r24, 0x51 ; 81
|
|
3f76: 11 f4 brne .+4 ; 0x3f7c <main+0x17c>
|
|
// Adaboot no-wait mod
|
|
watchdogConfig(WATCHDOG_16MS);
|
|
3f78: 88 e0 ldi r24, 0x08 ; 8
|
|
3f7a: 18 d0 rcall .+48 ; 0x3fac <watchdogConfig>
|
|
verifySpace();
|
|
}
|
|
else {
|
|
// This covers the response to commands like STK_ENTER_PROGMODE
|
|
verifySpace();
|
|
3f7c: 1d d0 rcall .+58 ; 0x3fb8 <verifySpace>
|
|
}
|
|
putch(STK_OK);
|
|
3f7e: 80 e1 ldi r24, 0x10 ; 16
|
|
3f80: 01 d0 rcall .+2 ; 0x3f84 <putch>
|
|
3f82: 6a cf rjmp .-300 ; 0x3e58 <main+0x58>
|
|
|
|
00003f84 <putch>:
|
|
}
|
|
}
|
|
|
|
void putch(char ch) {
|
|
3f84: 98 2f mov r25, r24
|
|
#ifndef SOFT_UART
|
|
while (!(UCSR0A & _BV(UDRE0)));
|
|
3f86: 80 91 c0 00 lds r24, 0x00C0
|
|
3f8a: 85 ff sbrs r24, 5
|
|
3f8c: fc cf rjmp .-8 ; 0x3f86 <putch+0x2>
|
|
UDR0 = ch;
|
|
3f8e: 90 93 c6 00 sts 0x00C6, r25
|
|
[uartBit] "I" (UART_TX_BIT)
|
|
:
|
|
"r25"
|
|
);
|
|
#endif
|
|
}
|
|
3f92: 08 95 ret
|
|
|
|
00003f94 <getch>:
|
|
[uartBit] "I" (UART_RX_BIT)
|
|
:
|
|
"r25"
|
|
);
|
|
#else
|
|
while(!(UCSR0A & _BV(RXC0)))
|
|
3f94: 80 91 c0 00 lds r24, 0x00C0
|
|
3f98: 87 ff sbrs r24, 7
|
|
3f9a: fc cf rjmp .-8 ; 0x3f94 <getch>
|
|
;
|
|
if (!(UCSR0A & _BV(FE0))) {
|
|
3f9c: 80 91 c0 00 lds r24, 0x00C0
|
|
3fa0: 84 fd sbrc r24, 4
|
|
3fa2: 01 c0 rjmp .+2 ; 0x3fa6 <getch+0x12>
|
|
}
|
|
#endif
|
|
|
|
// Watchdog functions. These are only safe with interrupts turned off.
|
|
void watchdogReset() {
|
|
__asm__ __volatile__ (
|
|
3fa4: a8 95 wdr
|
|
* don't care that an invalid char is returned...)
|
|
*/
|
|
watchdogReset();
|
|
}
|
|
|
|
ch = UDR0;
|
|
3fa6: 80 91 c6 00 lds r24, 0x00C6
|
|
LED_PIN |= _BV(LED);
|
|
#endif
|
|
#endif
|
|
|
|
return ch;
|
|
}
|
|
3faa: 08 95 ret
|
|
|
|
00003fac <watchdogConfig>:
|
|
"wdr\n"
|
|
);
|
|
}
|
|
|
|
void watchdogConfig(uint8_t x) {
|
|
WDTCSR = _BV(WDCE) | _BV(WDE);
|
|
3fac: e0 e6 ldi r30, 0x60 ; 96
|
|
3fae: f0 e0 ldi r31, 0x00 ; 0
|
|
3fb0: 98 e1 ldi r25, 0x18 ; 24
|
|
3fb2: 90 83 st Z, r25
|
|
WDTCSR = x;
|
|
3fb4: 80 83 st Z, r24
|
|
}
|
|
3fb6: 08 95 ret
|
|
|
|
00003fb8 <verifySpace>:
|
|
do getch(); while (--count);
|
|
verifySpace();
|
|
}
|
|
|
|
void verifySpace() {
|
|
if (getch() != CRC_EOP) {
|
|
3fb8: ed df rcall .-38 ; 0x3f94 <getch>
|
|
3fba: 80 32 cpi r24, 0x20 ; 32
|
|
3fbc: 19 f0 breq .+6 ; 0x3fc4 <verifySpace+0xc>
|
|
watchdogConfig(WATCHDOG_16MS); // shorten WD timeout
|
|
3fbe: 88 e0 ldi r24, 0x08 ; 8
|
|
3fc0: f5 df rcall .-22 ; 0x3fac <watchdogConfig>
|
|
3fc2: ff cf rjmp .-2 ; 0x3fc2 <verifySpace+0xa>
|
|
while (1) // and busy-loop so that WD causes
|
|
; // a reset and app start.
|
|
}
|
|
putch(STK_INSYNC);
|
|
3fc4: 84 e1 ldi r24, 0x14 ; 20
|
|
}
|
|
3fc6: de cf rjmp .-68 ; 0x3f84 <putch>
|
|
|
|
00003fc8 <getNch>:
|
|
::[count] "M" (UART_B_VALUE)
|
|
);
|
|
}
|
|
#endif
|
|
|
|
void getNch(uint8_t count) {
|
|
3fc8: 1f 93 push r17
|
|
3fca: 18 2f mov r17, r24
|
|
do getch(); while (--count);
|
|
3fcc: e3 df rcall .-58 ; 0x3f94 <getch>
|
|
3fce: 11 50 subi r17, 0x01 ; 1
|
|
3fd0: e9 f7 brne .-6 ; 0x3fcc <getNch+0x4>
|
|
verifySpace();
|
|
3fd2: f2 df rcall .-28 ; 0x3fb8 <verifySpace>
|
|
}
|
|
3fd4: 1f 91 pop r17
|
|
3fd6: 08 95 ret
|
|
|
|
00003fd8 <appStart>:
|
|
WDTCSR = _BV(WDCE) | _BV(WDE);
|
|
WDTCSR = x;
|
|
}
|
|
|
|
void appStart() {
|
|
watchdogConfig(WATCHDOG_OFF);
|
|
3fd8: 80 e0 ldi r24, 0x00 ; 0
|
|
3fda: e8 df rcall .-48 ; 0x3fac <watchdogConfig>
|
|
__asm__ __volatile__ (
|
|
3fdc: ee 27 eor r30, r30
|
|
3fde: ff 27 eor r31, r31
|
|
3fe0: 09 94 ijmp
|