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42 lines
3.3 KiB
C
42 lines
3.3 KiB
C
/* $asf_license$ */
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#ifndef _SAM3XA_MATRIX_INSTANCE_
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#define _SAM3XA_MATRIX_INSTANCE_
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/* ========== Register definition for MATRIX peripheral ========== */
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#ifdef __ASSEMBLY__
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#define REG_MATRIX_MCFG (0x400E0400U) /**< \brief (MATRIX) Master Configuration Register */
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#define REG_MATRIX_SCFG (0x400E0440U) /**< \brief (MATRIX) Slave Configuration Register */
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#define REG_MATRIX_PRAS0 (0x400E0480U) /**< \brief (MATRIX) Priority Register A for Slave 0 */
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#define REG_MATRIX_PRAS1 (0x400E0488U) /**< \brief (MATRIX) Priority Register A for Slave 1 */
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#define REG_MATRIX_PRAS2 (0x400E0490U) /**< \brief (MATRIX) Priority Register A for Slave 2 */
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#define REG_MATRIX_PRAS3 (0x400E0498U) /**< \brief (MATRIX) Priority Register A for Slave 3 */
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#define REG_MATRIX_PRAS4 (0x400E04A0U) /**< \brief (MATRIX) Priority Register A for Slave 4 */
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#define REG_MATRIX_PRAS5 (0x400E04A8U) /**< \brief (MATRIX) Priority Register A for Slave 5 */
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#define REG_MATRIX_PRAS6 (0x400E04B0U) /**< \brief (MATRIX) Priority Register A for Slave 6 */
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#define REG_MATRIX_PRAS7 (0x400E04B8U) /**< \brief (MATRIX) Priority Register A for Slave 7 */
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#define REG_MATRIX_PRAS8 (0x400E04C0U) /**< \brief (MATRIX) Priority Register A for Slave 8 */
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#define REG_MATRIX_MRCR (0x400E0500U) /**< \brief (MATRIX) Master Remap Control Register */
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#define REG_CCFG_SYSIO (0x400E0514U) /**< \brief (MATRIX) System I/O Configuration register */
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#define REG_MATRIX_WPMR (0x400E05E4U) /**< \brief (MATRIX) Write Protect Mode Register */
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#define REG_MATRIX_WPSR (0x400E05E8U) /**< \brief (MATRIX) Write Protect Status Register */
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#else
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#define REG_MATRIX_MCFG (*(RwReg*)0x400E0400U) /**< \brief (MATRIX) Master Configuration Register */
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#define REG_MATRIX_SCFG (*(RwReg*)0x400E0440U) /**< \brief (MATRIX) Slave Configuration Register */
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#define REG_MATRIX_PRAS0 (*(RwReg*)0x400E0480U) /**< \brief (MATRIX) Priority Register A for Slave 0 */
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#define REG_MATRIX_PRAS1 (*(RwReg*)0x400E0488U) /**< \brief (MATRIX) Priority Register A for Slave 1 */
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#define REG_MATRIX_PRAS2 (*(RwReg*)0x400E0490U) /**< \brief (MATRIX) Priority Register A for Slave 2 */
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#define REG_MATRIX_PRAS3 (*(RwReg*)0x400E0498U) /**< \brief (MATRIX) Priority Register A for Slave 3 */
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#define REG_MATRIX_PRAS4 (*(RwReg*)0x400E04A0U) /**< \brief (MATRIX) Priority Register A for Slave 4 */
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#define REG_MATRIX_PRAS5 (*(RwReg*)0x400E04A8U) /**< \brief (MATRIX) Priority Register A for Slave 5 */
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#define REG_MATRIX_PRAS6 (*(RwReg*)0x400E04B0U) /**< \brief (MATRIX) Priority Register A for Slave 6 */
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#define REG_MATRIX_PRAS7 (*(RwReg*)0x400E04B8U) /**< \brief (MATRIX) Priority Register A for Slave 7 */
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#define REG_MATRIX_PRAS8 (*(RwReg*)0x400E04C0U) /**< \brief (MATRIX) Priority Register A for Slave 8 */
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#define REG_MATRIX_MRCR (*(RwReg*)0x400E0500U) /**< \brief (MATRIX) Master Remap Control Register */
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#define REG_CCFG_SYSIO (*(RwReg*)0x400E0514U) /**< \brief (MATRIX) System I/O Configuration register */
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#define REG_MATRIX_WPMR (*(RwReg*)0x400E05E4U) /**< \brief (MATRIX) Write Protect Mode Register */
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#define REG_MATRIX_WPSR (*(RoReg*)0x400E05E8U) /**< \brief (MATRIX) Write Protect Status Register */
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#endif /* __ASSEMBLY__ */
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#endif /* _SAM3XA_MATRIX_INSTANCE_ */
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