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https://github.com/arduino/Arduino.git
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50 lines
3.7 KiB
C
50 lines
3.7 KiB
C
/* $asf_license$ */
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#ifndef _SAM3XA_UART_INSTANCE_
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#define _SAM3XA_UART_INSTANCE_
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/* ========== Register definition for UART peripheral ========== */
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#ifdef __ASSEMBLY__
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#define REG_UART_CR (0x400E0800U) /**< \brief (UART) Control Register */
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#define REG_UART_MR (0x400E0804U) /**< \brief (UART) Mode Register */
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#define REG_UART_IER (0x400E0808U) /**< \brief (UART) Interrupt Enable Register */
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#define REG_UART_IDR (0x400E080CU) /**< \brief (UART) Interrupt Disable Register */
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#define REG_UART_IMR (0x400E0810U) /**< \brief (UART) Interrupt Mask Register */
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#define REG_UART_SR (0x400E0814U) /**< \brief (UART) Status Register */
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#define REG_UART_RHR (0x400E0818U) /**< \brief (UART) Receive Holding Register */
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#define REG_UART_THR (0x400E081CU) /**< \brief (UART) Transmit Holding Register */
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#define REG_UART_BRGR (0x400E0820U) /**< \brief (UART) Baud Rate Generator Register */
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#define REG_UART_RPR (0x400E0900U) /**< \brief (UART) Receive Pointer Register */
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#define REG_UART_RCR (0x400E0904U) /**< \brief (UART) Receive Counter Register */
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#define REG_UART_TPR (0x400E0908U) /**< \brief (UART) Transmit Pointer Register */
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#define REG_UART_TCR (0x400E090CU) /**< \brief (UART) Transmit Counter Register */
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#define REG_UART_RNPR (0x400E0910U) /**< \brief (UART) Receive Next Pointer Register */
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#define REG_UART_RNCR (0x400E0914U) /**< \brief (UART) Receive Next Counter Register */
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#define REG_UART_TNPR (0x400E0918U) /**< \brief (UART) Transmit Next Pointer Register */
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#define REG_UART_TNCR (0x400E091CU) /**< \brief (UART) Transmit Next Counter Register */
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#define REG_UART_PTCR (0x400E0920U) /**< \brief (UART) Transfer Control Register */
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#define REG_UART_PTSR (0x400E0924U) /**< \brief (UART) Transfer Status Register */
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#else
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#define REG_UART_CR (*(WoReg*)0x400E0800U) /**< \brief (UART) Control Register */
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#define REG_UART_MR (*(RwReg*)0x400E0804U) /**< \brief (UART) Mode Register */
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#define REG_UART_IER (*(WoReg*)0x400E0808U) /**< \brief (UART) Interrupt Enable Register */
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#define REG_UART_IDR (*(WoReg*)0x400E080CU) /**< \brief (UART) Interrupt Disable Register */
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#define REG_UART_IMR (*(RoReg*)0x400E0810U) /**< \brief (UART) Interrupt Mask Register */
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#define REG_UART_SR (*(RoReg*)0x400E0814U) /**< \brief (UART) Status Register */
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#define REG_UART_RHR (*(RoReg*)0x400E0818U) /**< \brief (UART) Receive Holding Register */
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#define REG_UART_THR (*(WoReg*)0x400E081CU) /**< \brief (UART) Transmit Holding Register */
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#define REG_UART_BRGR (*(RwReg*)0x400E0820U) /**< \brief (UART) Baud Rate Generator Register */
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#define REG_UART_RPR (*(RwReg*)0x400E0900U) /**< \brief (UART) Receive Pointer Register */
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#define REG_UART_RCR (*(RwReg*)0x400E0904U) /**< \brief (UART) Receive Counter Register */
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#define REG_UART_TPR (*(RwReg*)0x400E0908U) /**< \brief (UART) Transmit Pointer Register */
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#define REG_UART_TCR (*(RwReg*)0x400E090CU) /**< \brief (UART) Transmit Counter Register */
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#define REG_UART_RNPR (*(RwReg*)0x400E0910U) /**< \brief (UART) Receive Next Pointer Register */
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#define REG_UART_RNCR (*(RwReg*)0x400E0914U) /**< \brief (UART) Receive Next Counter Register */
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#define REG_UART_TNPR (*(RwReg*)0x400E0918U) /**< \brief (UART) Transmit Next Pointer Register */
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#define REG_UART_TNCR (*(RwReg*)0x400E091CU) /**< \brief (UART) Transmit Next Counter Register */
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#define REG_UART_PTCR (*(WoReg*)0x400E0920U) /**< \brief (UART) Transfer Control Register */
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#define REG_UART_PTSR (*(RoReg*)0x400E0924U) /**< \brief (UART) Transfer Status Register */
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#endif /* __ASSEMBLY__ */
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#endif /* _SAM3XA_UART_INSTANCE_ */
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