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114 lines
5.7 KiB
C
Executable File
114 lines
5.7 KiB
C
Executable File
/*! \file lis3l02.h \brief ST LIS3L02 3-axis I2C Accelerometer Library. */
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//*****************************************************************************
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//
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// File Name : 'lis3l02.h'
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// Title : ST LIS3L02 3-axis I2C Accelerometer Library
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// Author : Pascal Stang - Copyright (C) 2004
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// Created : 2004.10.23
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// Revised : 2004.12.14
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// Version : 0.1
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// Target MCU : Atmel AVR Series
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// Editor Tabs : 4
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//
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// NOTE: This code is currently below version 1.0, and therefore is considered
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// to be lacking in some functionality or documentation, or may not be fully
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// tested. Nonetheless, you can expect most functions to work.
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//
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// This code is distributed under the GNU Public License
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// which can be found at http://www.gnu.org/licenses/gpl.txt
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//
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//*****************************************************************************
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#ifndef LIS3L02_H
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#define LIS3L02_H
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#include "global.h"
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// constants/macros/typdefs
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#define LIS3L02_I2C_ADDR 0x3A //< Base I2C address of LIS3L02 device
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// LIS3L02 register address defines
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#define LIS3L02_REG_OFFSETX 0x16 //< LIS3L02 X-axis digital offset trim
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#define LIS3L02_REG_OFFSETY 0x17 //< LIS3L02 Y-axis digital offset trim
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#define LIS3L02_REG_OFFSETZ 0x18 //< LIS3L02 Z-axis digital offset trim
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#define LIS3L02_REG_GAINX 0x19 //< LIS3L02 X-axis digital gain trim
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#define LIS3L02_REG_GAINY 0x1A //< LIS3L02 Y-axis digital gain trim
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#define LIS3L02_REG_GAINZ 0x1B //< LIS3L02 Z-axis digital gain trim
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#define LIS3L02_REG_CTRLREG1 0x20 //< LIS3L02 interface/operation control
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#define LIS3L02_REG_CTRLREG2 0x21 //< LIS3L02 interface/operation control
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#define LIS3L02_REG_WAKEUPCFG 0x23 //< LIS3L02 interrupt/wakeup config
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#define LIS3L02_REG_WAKEUPSRC 0x24 //< LIS3L02 interrupt/wakeup source indicator
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#define LIS3L02_REG_WAKEUPACK 0x25 //< LIS3L02 wakeup source clear
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#define LIS3L02_REG_STATUS 0x27 //< LIS3L02 Accelerometer Status
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#define LIS3L02_REG_OUTXL 0x28 //< LIS3L02 Accelerometer X Output Low-byte
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#define LIS3L02_REG_OUTXH 0x29 //< LIS3L02 Accelerometer X Output High-byte
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#define LIS3L02_REG_OUTYL 0x2A //< LIS3L02 Accelerometer Y Output Low-byte
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#define LIS3L02_REG_OUTYH 0x2B //< LIS3L02 Accelerometer Y Output High-byte
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#define LIS3L02_REG_OUTZL 0x2C //< LIS3L02 Accelerometer Z Output Low-byte
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#define LIS3L02_REG_OUTZH 0x2D //< LIS3L02 Accelerometer Z Output High-byte
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#define LIS3L02_REG_THSL 0x2E //< LIS3L02 Accelerometer Threshold Low-byte
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#define LIS3L02_REG_THSH 0x2F //< LIS3L02 Accelerometer Threshold High-byte
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#define LIS3L02_REG_MULTIREAD 0x80 //< LIS3L02 Mutliple Read Bit
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// LIS3L02 control register 1 bit defines
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#define LIS3L02_CTRLREG1_XEN 0x01 //< LIS3L02 CtrlReg1 X-axis Enable
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#define LIS3L02_CTRLREG1_YEN 0x02 //< LIS3L02 CtrlReg1 Y-axis Enable
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#define LIS3L02_CTRLREG1_ZEN 0x04 //< LIS3L02 CtrlReg1 Z-axis Enable
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#define LIS3L02_CTRLREG1_ST 0x08 //< LIS3L02 CtrlReg1 Self-Test Enable
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#define LIS3L02_CTRLREG1_DF0 0x10 //< LIS3L02 CtrlReg1 Decimation Factor 0
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#define LIS3L02_CTRLREG1_DF1 0x20 //< LIS3L02 CtrlReg1 Decimation Factor 0
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#define LIS3L02_CTRLREG1_PD0 0x40 //< LIS3L02 CtrlReg1 Power-down Control 0
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#define LIS3L02_CTRLREG1_PD1 0x80 //< LIS3L02 CtrlReg1 Power-down Control 1
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// LIS3L02 control register 2 bit defines
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#define LIS3L02_CTRLREG2_DAS 0x01 //< LIS3L02 CtrlReg2 Data Alignment Selection
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#define LIS3L02_CTRLREG2_SIM 0x02 //< LIS3L02 CtrlReg2 SPI Mode Select
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#define LIS3L02_CTRLREG2_DRDY 0x04 //< LIS3L02 CtrlReg2 Enable Data-Ready generation
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#define LIS3L02_CTRLREG2_IEN 0x08 //< LIS3L02 CtrlReg2 Interrupt Enable
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#define LIS3L02_CTRLREG2_BOOT 0x10 //< LIS3L02 CtrlReg2 Reboot from memory
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#define LIS3L02_CTRLREG2_FS 0x80 //< LIS3L02 CtrlReg2 Full-scale Select (0=2g, 1=6g)
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// LIS3L02 WAKEUPCFG register bit defines
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#define LIS3L02_WAKEUPCFG_MXL 0x01 //< LIS3L02 WAKEUPCFG Mask X Low Interrupt
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#define LIS3L02_WAKEUPCFG_MXH 0x02 //< LIS3L02 WAKEUPCFG Mask X High Interrupt
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#define LIS3L02_WAKEUPCFG_MYL 0x04 //< LIS3L02 WAKEUPCFG Mask Y Low Interrupt
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#define LIS3L02_WAKEUPCFG_MYH 0x08 //< LIS3L02 WAKEUPCFG Mask Y High Interrupt
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#define LIS3L02_WAKEUPCFG_MZL 0x10 //< LIS3L02 WAKEUPCFG Mask Z Low Interrupt
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#define LIS3L02_WAKEUPCFG_MZH 0x20 //< LIS3L02 WAKEUPCFG Mask Z High Interrupt
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#define LIS3L02_WAKEUPCFG_LIR 0x40 //< LIS3L02 WAKEUPCFG Latch Intr Request
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// LIS3L02 WAKEUPSRC register bit defines
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#define LIS3L02_WAKEUPSRC_XL 0x01 //< LIS3L02 WAKEUPSRC X Low Interrupt
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#define LIS3L02_WAKEUPSRC_XH 0x02 //< LIS3L02 WAKEUPSRC X High Interrupt
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#define LIS3L02_WAKEUPSRC_YL 0x04 //< LIS3L02 WAKEUPSRC Y Low Interrupt
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#define LIS3L02_WAKEUPSRC_YH 0x08 //< LIS3L02 WAKEUPSRC Y High Interrupt
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#define LIS3L02_WAKEUPSRC_ZL 0x10 //< LIS3L02 WAKEUPSRC Z Low Interrupt
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#define LIS3L02_WAKEUPSRC_ZH 0x20 //< LIS3L02 WAKEUPSRC Z High Interrupt
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#define LIS3L02_WAKEUPSRC_IA 0x40 //< LIS3L02 WAKEUPSRC Interrupt Active
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// LIS3L02 WAKEUPSRC register bit defines
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#define LIS3L02_STATUS_XDA 0x01 //< LIS3L02 STATUS X New Data Available
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#define LIS3L02_STATUS_YDA 0x02 //< LIS3L02 STATUS Y New Data Available
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#define LIS3L02_STATUS_ZDA 0x04 //< LIS3L02 STATUS Z New Data Available
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#define LIS3L02_STATUS_ZYXDA 0x08 //< LIS3L02 STATUS XYZ New Data Available
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#define LIS3L02_STATUS_XOR 0x10 //< LIS3L02 STATUS X-axis Data Overrun
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#define LIS3L02_STATUS_YOR 0x20 //< LIS3L02 STATUS Y-axis Data Overrun
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#define LIS3L02_STATUS_ZOR 0x40 //< LIS3L02 STATUS Z-axis Data Overrun
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#define LIS3L02_STATUS_ZYXOR 0x80 //< LIS3L02 STATUS XYZ-axis Data Overrun
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// functions
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//! Initialize the LIS3L02 chip
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// returns:
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// 0 if successful
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// non-zero if unsuccessful (chip not present)
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u08 lis3l02Init(void);
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u08 lis3l02Reset(void);
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u08 lis3l02ReadReg(u08 reg);
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u08 lis3l02WriteReg(u08 reg, u08 data);
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s16 lis3l02GetAccel(u08 chxyz);
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#endif
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