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133 lines
4.0 KiB
C
133 lines
4.0 KiB
C
/* ----------------------------------------------------------------------------
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* ATMEL Microcontroller Software Support
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* ----------------------------------------------------------------------------
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* Copyright (c) 2009, Atmel Corporation
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* - Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the disclaimer below.
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*
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* Atmel's name may not be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* ----------------------------------------------------------------------------
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*/
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/**
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* \file
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*
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* Implementation of Watchdog Timer (WDT) controller.
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*
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*/
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/** \addtogroup wdt_module Working with WDT
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* The WDT driver provides the interface to configure and use the WDT
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* peripheral.
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*
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* The WDT can be used to prevent system lock-up if the software becomes
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* trapped in a deadlock. It can generate a general reset or a processor
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* reset only. It is clocked by slow clock divided by 128.
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*
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* The WDT is running at reset with 16 seconds watchdog period (slow clock at 32.768 kHz)
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* and external reset generation enabled. The user must either disable it or
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* reprogram it to meet the application requires.
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*
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* To use the WDT, the user could follow these few steps:
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* <ul>
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* <li>Enable watchdog with given mode using \ref WDT_Enable().
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* <li>Restart the watchdog using \ref WDT_Restart() within the watchdog period.
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* </ul>
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*
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* For more accurate information, please look at the WDT section of the
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* Datasheet.
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*
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* \note
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* The Watchdog Mode Register (WDT_MR) can be written only once.\n
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*
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* Related files :\n
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* \ref wdt.c\n
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* \ref wdt.h.\n
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*/
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/*@{*/
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/*@}*/
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/*---------------------------------------------------------------------------
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* Headers
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*---------------------------------------------------------------------------*/
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#include "chip.h"
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#include <stdint.h>
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/*----------------------------------------------------------------------------
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* Exported functions
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*----------------------------------------------------------------------------*/
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/**
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* \brief Enable watchdog with given mode.
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*
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* \note The Watchdog Mode Register (WDT_MR) can be written only once.
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* Only a processor reset resets it.
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*
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* \param dwMode WDT mode to be set
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*/
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extern void WDT_Enable( Wdt* pWDT, uint32_t dwMode )
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{
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pWDT->WDT_MR = dwMode ;
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}
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/**
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* \brief Disable watchdog.
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*
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* \note The Watchdog Mode Register (WDT_MR) can be written only once.
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* Only a processor reset resets it.
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*/
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extern void WDT_Disable( Wdt* pWDT )
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{
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pWDT->WDT_MR = WDT_MR_WDDIS;
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}
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/**
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* \brief Watchdog restart.
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*/
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extern void WDT_Restart( Wdt* pWDT )
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{
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pWDT->WDT_CR = 0xA5000001;
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}
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/**
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* \brief Watchdog get status.
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*/
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extern uint32_t WDT_GetStatus( Wdt* pWDT )
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{
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return (pWDT->WDT_SR & 0x3) ;
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}
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/**
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* \brief Watchdog get period.
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*
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* \param dwMs desired watchdog period in millisecond.
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*/
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extern uint32_t WDT_GetPeriod( uint32_t dwMs )
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{
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if ( (dwMs < 4) || (dwMs > 16000) )
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{
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return 0 ;
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}
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return ((dwMs << 8) / 1000) ;
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}
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