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24 lines
1.9 KiB
C
24 lines
1.9 KiB
C
/* %ATMEL_LICENCE% */
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#ifndef _SAM3U_MATRIX_INSTANCE_
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#define _SAM3U_MATRIX_INSTANCE_
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/* ========== Register definition for MATRIX peripheral ========== */
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#define REG_MATRIX_MCFG REG_ACCESS(RwReg, 0x400E0200U) /**< \brief (MATRIX) Master Configuration Register */
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#define REG_MATRIX_SCFG REG_ACCESS(RwReg, 0x400E0240U) /**< \brief (MATRIX) Slave Configuration Register */
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#define REG_MATRIX_PRAS0 REG_ACCESS(RwReg, 0x400E0280U) /**< \brief (MATRIX) Priority Register A for Slave 0 */
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#define REG_MATRIX_PRAS1 REG_ACCESS(RwReg, 0x400E0288U) /**< \brief (MATRIX) Priority Register A for Slave 1 */
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#define REG_MATRIX_PRAS2 REG_ACCESS(RwReg, 0x400E0290U) /**< \brief (MATRIX) Priority Register A for Slave 2 */
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#define REG_MATRIX_PRAS3 REG_ACCESS(RwReg, 0x400E0298U) /**< \brief (MATRIX) Priority Register A for Slave 3 */
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#define REG_MATRIX_PRAS4 REG_ACCESS(RwReg, 0x400E02A0U) /**< \brief (MATRIX) Priority Register A for Slave 4 */
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#define REG_MATRIX_PRAS5 REG_ACCESS(RwReg, 0x400E02A8U) /**< \brief (MATRIX) Priority Register A for Slave 5 */
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#define REG_MATRIX_PRAS6 REG_ACCESS(RwReg, 0x400E02B0U) /**< \brief (MATRIX) Priority Register A for Slave 6 */
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#define REG_MATRIX_PRAS7 REG_ACCESS(RwReg, 0x400E02B8U) /**< \brief (MATRIX) Priority Register A for Slave 7 */
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#define REG_MATRIX_PRAS8 REG_ACCESS(RwReg, 0x400E02C0U) /**< \brief (MATRIX) Priority Register A for Slave 8 */
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#define REG_MATRIX_PRAS9 REG_ACCESS(RwReg, 0x400E02C8U) /**< \brief (MATRIX) Priority Register A for Slave 9 */
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#define REG_MATRIX_MRCR REG_ACCESS(RwReg, 0x400E0300U) /**< \brief (MATRIX) Master Remap Control Register */
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#define REG_MATRIX_WPMR REG_ACCESS(RwReg, 0x400E03E4U) /**< \brief (MATRIX) Write Protect Mode Register */
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#define REG_MATRIX_WPSR REG_ACCESS(RoReg, 0x400E03E8U) /**< \brief (MATRIX) Write Protect Status Register */
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#endif /* _SAM3U_MATRIX_INSTANCE_ */
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