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296 lines
7.7 KiB
Plaintext
296 lines
7.7 KiB
Plaintext
/*
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%atmel_license%
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*/
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/** \addtogroup adc_module Working with ADC
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* The ADC driver provides the interface to configure and use the ADC peripheral.
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* \n
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*
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* It converts the analog input to digital format. The converted result could be
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* 12bit or 10bit. The ADC supports up to 16 analog lines.
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*
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* To Enable a ADC conversion,the user has to follow these few steps:
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* <ul>
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* <li> Select an appropriate reference voltage on ADVREF </li>
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* <li> Configure the ADC according to its requirements and special needs,which
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* could be broken down into several parts:
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* -# Select the resolution by setting or clearing ADC_MR_LOWRES bit in
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* ADC_MR (Mode Register)
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* -# Set ADC clock by setting ADC_MR_PRESCAL bits in ADC_MR, the clock is
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* calculated with ADCClock = MCK / ( (PRESCAL+1) * 2 )
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* -# Set Startup Time,Tracking Clock cycles and Transfer Clock respectively
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* in ADC_MR.
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</li>
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* <li> Start conversion by setting ADC_CR_START in ADC_CR. </li>
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* </ul>
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*
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* For more accurate information, please look at the ADC section of the
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* Datasheet.
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*
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* Related files :\n
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* \ref adc.c\n
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* \ref adc.h\n
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*/
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/*@{*/
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/*@}*/
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/**
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* \file
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*
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* Implementation of Analog-to-Digital Converter (ADC).
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*
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*/
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/*----------------------------------------------------------------------------
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* Headers
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*----------------------------------------------------------------------------*/
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#include "chip.h"
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/*----------------------------------------------------------------------------
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* Exported functions
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*----------------------------------------------------------------------------*/
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/**
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* \brief Initialize the ADC controller
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*
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* \param pAdc Pointer to an Adc instance.
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* \param idAdc ADC Index
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* \param trgEn trigger mode, software or Hardware
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* \param trgSel hardware trigger selection
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* \param sleepMode sleep mode selection
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* \param resolution resolution selection 10 bits or 12 bits
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* \param mckClock value of MCK in Hz
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* \param adcClock value of the ADC clock in Hz
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* \param startup value of the start up time (in ADCClock) (see datasheet)
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* \param tracking Tracking Time (in ADCClock cycle)
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*/
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extern void ADC_Initialize( Adc* pAdc, uint32_t idAdc )
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{
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/* Enable peripheral clock*/
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PMC_EnablePeripheral( idAdc ) ;
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/* Reset the controller */
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pAdc->ADC_CR = ADC_CR_SWRST;
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/* Reset Mode Register set to default */
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/* TrackTime set to 0 */
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/* Transfer set to 1 */
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/* settling set to 3 */
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pAdc->ADC_MR = ADC_MR_TRANSFER(1) | ADC_MR_TRACKTIM(0) | ADC_MR_SETTLING_AST17 ;
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}
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/**
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* \brief Initialize the ADC Timing
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*/
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extern void ADC_CfgTiming( Adc* pAdc, uint32_t tracking, uint32_t settling, uint32_t transfer )
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{
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pAdc->ADC_MR = ADC_MR_TRANSFER( transfer )
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| settling
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| ADC_MR_TRACKTIM( tracking ) ;
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}
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/**
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* \brief Initialize the ADC Timing
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*/
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extern void ADC_cfgFrequency( Adc* pAdc, uint32_t startup, uint32_t prescal )
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{
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pAdc->ADC_MR |= ADC_MR_PRESCAL( prescal )
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| ( (startup<<ADC_MR_STARTUP_Pos) & ADC_MR_STARTUP_Msk);
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}
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/**
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* \brief Initialize the ADC Trigering
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*/
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extern void ADC_CfgTrigering( Adc* pAdc, uint32_t trgEn, uint32_t trgSel, uint32_t freeRun )
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{
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pAdc->ADC_MR |= ((trgEn<<0) & ADC_MR_TRGEN)
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| ((trgSel<<ADC_MR_TRGSEL_Pos) & ADC_MR_TRGSEL_Msk)
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| ((freeRun<<7) & ADC_MR_FREERUN) ;
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}
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/**
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* \brief Initialize the ADC Low Res
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*/
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extern void ADC_CfgLowRes( Adc* pAdc, uint32_t resolution )
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{
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pAdc->ADC_MR |= (resolution<<4) & ADC_MR_LOWRES;
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}
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/**
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* \brief Initialize the ADC PowerSave
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*/
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extern void ADC_CfgPowerSave( Adc* pAdc, uint32_t sleep, uint32_t fwup )
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{
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pAdc->ADC_MR |= ( ((sleep<<5) & ADC_MR_SLEEP)
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| ((fwup<<6) & ADC_MR_FWUP) );
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}
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/**
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* \brief Initialize the ADC Channel Mode
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*/
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extern void ADC_CfgChannelMode( Adc* pAdc, uint32_t useq, uint32_t anach )
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{
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pAdc->ADC_MR |= ( ((anach<<23) & ADC_MR_ANACH)
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| ((useq <<31) & (uint32_t)ADC_MR_USEQ) );
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}
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/**
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* \brief calcul_startup
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*/
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static uint32_t calcul_startup( uint32_t dwStartup )
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{
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static uint32_t adwValue[16]={ 0, 8, 16, 24, 64, 80, 96, 112, 512, 576, 640, 704, 768, 832, 896, 960 } ;
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assert( dwStartup < sizeof( adwValue )/sizeof( adwValue[0] ) ) ;
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return adwValue[dwStartup] ;
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}
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/**
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* Return the Channel Converted Data
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*
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* \param pAdc Pointer to an Adc instance.
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* \param channel channel to get converted value
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*/
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extern uint32_t ADC_GetConvertedData( Adc* pAdc, uint32_t dwChannel )
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{
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uint32_t dwData = 0;
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assert( dwChannel < 16 ) ;
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if ( 15 >= dwChannel )
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{
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dwData=*(pAdc->ADC_CDR+dwChannel) ;
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}
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return dwData ;
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}
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/**
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* Set compare channel
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*
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* \param pAdc Pointer to an Adc instance.
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* \param channel channel number to be set,16 for all channels
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*/
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extern void ADC_SetCompareChannel( Adc* pAdc, uint32_t dwChannel )
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{
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assert( dwChannel <= 16 ) ;
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if ( dwChannel < 16 )
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{
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pAdc->ADC_EMR &= (uint32_t)~(ADC_EMR_CMPALL);
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pAdc->ADC_EMR &= (uint32_t)~(ADC_EMR_CMPSEL_Msk);
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pAdc->ADC_EMR |= (dwChannel << ADC_EMR_CMPSEL_Pos);
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}
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else
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{
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pAdc->ADC_EMR |= ADC_EMR_CMPALL;
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}
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}
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/**
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* Set compare mode
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*
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* \param pAdc Pointer to an Adc instance.
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* \param mode compare mode
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*/
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extern void ADC_SetCompareMode( Adc* pAdc, uint32_t dwMode )
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{
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pAdc->ADC_EMR &= (uint32_t)~(ADC_EMR_CMPMODE_Msk);
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pAdc->ADC_EMR |= (dwMode & ADC_EMR_CMPMODE_Msk) ;
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}
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/**
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* Set comparison window, one threshold each time
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*
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* \param pAdc Pointer to an Adc instance.
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* \param hi_lo Comparison Window
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*/
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extern void ADC_SetComparisonWindow( Adc* pAdc, uint32_t dwHi_Lo )
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{
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pAdc->ADC_CWR = dwHi_Lo ;
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}
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/**----------------------------------------------------------------------------
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* Test if ADC Interrupt is Masked
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*
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* \param pAdc Pointer to an Adc instance.
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* \param flag flag to be tested
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*
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* \return 1 if interrupt is masked, otherwise 0
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*/
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uint32_t ADC_IsInterruptMasked( Adc* pAdc, uint32_t dwFlag )
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{
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return (ADC_GetInterruptMaskStatus( pAdc ) & dwFlag) ;
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}
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/**----------------------------------------------------------------------------
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* Test if ADC Status is Set
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*
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* \param pAdc Pointer to an Adc instance.
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* \param flag flag to be tested
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*
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* \return 1 if the staus is set; 0 otherwise
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*/
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extern uint32_t ADC_IsStatusSet( Adc* pAdc, uint32_t dwFlag )
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{
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return (ADC_GetStatus( pAdc ) & dwFlag) ;
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}
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/**----------------------------------------------------------------------------
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* Test if ADC channel interrupt Status is Set
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*
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* \param adc_sr Value of SR register
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* \param channel Channel to be tested
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*
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* \return 1 if interrupt status is set, otherwise 0
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*/
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extern uint32_t ADC_IsChannelInterruptStatusSet( uint32_t dwAdc_sr, uint32_t dwChannel )
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{
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uint32_t dwStatus ;
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if ( (dwAdc_sr & ((uint32_t)1 << dwChannel)) == ((uint32_t)1 << dwChannel) )
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{
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dwStatus = 1 ;
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}
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else
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{
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dwStatus = 0 ;
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}
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return dwStatus ;
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}
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/**
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* \brief Read converted data through PDC channel
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*
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* \param pADC the pointer of adc peripheral
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* \param pBuffer the destination buffer
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* \param dwSize the size of the buffer
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*/
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extern uint32_t ADC_ReadBuffer( Adc* pADC, int16_t *pwBuffer, uint32_t dwSize )
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{
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/* Check if the first PDC bank is free*/
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if ( (pADC->ADC_RCR == 0) && (pADC->ADC_RNCR == 0) )
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{
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pADC->ADC_RPR = (uint32_t)pwBuffer ;
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pADC->ADC_RCR = dwSize ;
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pADC->ADC_PTCR = ADC_PTCR_RXTEN;
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return 1;
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}
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/* Check if the second PDC bank is free*/
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else
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{
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if ( pADC->ADC_RNCR == 0 )
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{
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pADC->ADC_RNPR = (uint32_t)pwBuffer ;
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pADC->ADC_RNCR = dwSize ;
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return 1 ;
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}
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else
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{
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return 0 ;
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}
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}
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}
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