2017-05-22 15:40:46 +02:00
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/**
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******************************************************************************
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* @addtogroup PIOS PIOS Core hardware abstraction layer
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* @{
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* @addtogroup PIOS_ADC ADC Functions
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* @brief STM32F30x ADC PIOS interface
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* @{
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*
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* @file pios_adc.c
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* @author The LibrePilot Project, http://www.librepilot.org Copyright (C) 2017.
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2017-05-30 16:31:39 +02:00
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* @brief Analog to Digital conversion routines
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2017-05-22 15:40:46 +02:00
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* @see The GNU Public License (GPL) Version 3
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*****************************************************************************/
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "pios.h"
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#ifdef PIOS_INCLUDE_ADC
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#include <pios_adc_priv.h>
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#include <pios_adc.h>
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#if !defined(PIOS_ADC_MAX_SAMPLES)
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#define PIOS_ADC_MAX_SAMPLES 0
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#endif
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#if !defined(PIOS_ADC_MAX_OVERSAMPLING)
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#define PIOS_ADC_MAX_OVERSAMPLING 0
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#endif
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#if !defined(PIOS_ADC_USE_ADC2)
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#define PIOS_ADC_USE_ADC2 0
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#endif
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#if !defined(PIOS_ADC_NUM_CHANNELS)
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#define PIOS_ADC_NUM_CHANNELS 0
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#endif
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struct pios_adc_pin_config {
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GPIO_TypeDef *port;
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uint32_t pin;
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uint32_t channel;
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bool initialize;
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};
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static const struct pios_adc_pin_config config[] = PIOS_DMA_PIN_CONFIG;
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2017-05-22 16:53:12 +02:00
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#define PIOS_ADC_NUM_PINS (sizeof(config) / sizeof(config[0]))
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2017-05-22 15:40:46 +02:00
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#define PIOS_ADC_DMA_BUFFER_SIZE (PIOS_ADC_MAX_SAMPLES * PIOS_ADC_NUM_PINS)
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// Private types
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enum pios_adc_dev_magic {
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PIOS_ADC_DEV_MAGIC = 0x58375124,
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};
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struct adc_accumulator {
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uint32_t accumulator;
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uint32_t count;
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};
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struct pios_adc_dev {
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const struct pios_adc_cfg *cfg;
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2017-05-22 16:53:12 +02:00
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ADCCallback callback_function;
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2017-05-22 15:40:46 +02:00
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#if defined(PIOS_INCLUDE_FREERTOS)
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2017-05-22 16:53:12 +02:00
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xQueueHandle data_queue;
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2017-05-22 15:40:46 +02:00
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#endif
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enum pios_adc_dev_magic magic;
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volatile uint16_t raw_data_buffer[PIOS_ADC_DMA_BUFFER_SIZE] __attribute__((aligned(4))); // Double buffer that DMA just used
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2017-05-22 16:53:12 +02:00
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struct adc_accumulator accumulator[PIOS_ADC_NUM_PINS];
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2017-05-22 15:40:46 +02:00
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};
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struct pios_adc_dev *pios_adc_dev;
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// Private functions
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void PIOS_ADC_downsample_data();
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static struct pios_adc_dev *PIOS_ADC_Allocate();
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static bool PIOS_ADC_validate(struct pios_adc_dev *);
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static void init_pins(struct pios_adc_dev *adc_dev);
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static void init_dma(struct pios_adc_dev *adc_dev);
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static void init_adc(struct pios_adc_dev *adc_dev);
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static void init_pins(__attribute__((unused)) struct pios_adc_dev *adc_dev)
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{
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for (uint32_t i = 0; i < PIOS_ADC_NUM_PINS; ++i) {
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if (!config[i].initialize) {
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continue;
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}
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PIOS_ADC_PinSetup(i);
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}
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}
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static void init_dma(struct pios_adc_dev *adc_dev)
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{
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/* Disable interrupts */
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DMA_ITConfig(pios_adc_dev->cfg->dma.rx.channel, pios_adc_dev->cfg->dma.irq.flags, DISABLE);
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2017-05-22 16:53:12 +02:00
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/* Configure DMA channel */
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DMA_DeInit(adc_dev->cfg->dma.rx.channel);
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DMA_InitTypeDef DMAInit = adc_dev->cfg->dma.rx.init;
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DMAInit.DMA_PeripheralBaseAddr = (uint32_t)&adc_dev->cfg->adc_dev->DR;
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2017-05-22 15:40:46 +02:00
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2017-05-22 16:53:12 +02:00
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DMAInit.DMA_MemoryBaseAddr = (uint32_t)&pios_adc_dev->raw_data_buffer[0];
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DMAInit.DMA_BufferSize = PIOS_ADC_DMA_BUFFER_SIZE;
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DMAInit.DMA_DIR = DMA_DIR_PeripheralSRC;
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DMAInit.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
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DMAInit.DMA_MemoryInc = DMA_MemoryInc_Enable;
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2017-05-22 15:40:46 +02:00
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DMAInit.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
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2017-05-22 16:53:12 +02:00
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DMAInit.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
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DMAInit.DMA_Mode = DMA_Mode_Circular;
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DMAInit.DMA_M2M = DMA_M2M_Disable;
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2017-05-22 15:40:46 +02:00
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2017-05-22 16:53:12 +02:00
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DMA_Init(adc_dev->cfg->dma.rx.channel, &DMAInit); /* channel is actually stream ... */
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2017-05-22 15:40:46 +02:00
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2017-05-22 16:53:12 +02:00
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/* enable DMA */
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DMA_Cmd(adc_dev->cfg->dma.rx.channel, ENABLE);
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2017-05-22 15:40:46 +02:00
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2017-05-22 16:53:12 +02:00
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/* Trigger interrupt when for half conversions too to indicate double buffer */
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DMA_ITConfig(adc_dev->cfg->dma.rx.channel, DMA_IT_TC, ENABLE);
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DMA_ITConfig(adc_dev->cfg->dma.rx.channel, DMA_IT_HT, ENABLE);
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2017-05-22 15:40:46 +02:00
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2017-05-22 16:53:12 +02:00
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/* Configure DMA interrupt */
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NVIC_InitTypeDef NVICInit = adc_dev->cfg->dma.irq.init;
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NVIC_Init(&NVICInit);
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2017-05-22 15:40:46 +02:00
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}
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static void init_adc(struct pios_adc_dev *adc_dev)
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{
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2017-05-22 16:53:12 +02:00
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ADC_DeInit(adc_dev->cfg->adc_dev);
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2017-05-22 15:40:46 +02:00
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2017-05-22 16:53:12 +02:00
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if (adc_dev->cfg->adc_dev == ADC1 || adc_dev->cfg->adc_dev == ADC2) {
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RCC_ADCCLKConfig(RCC_ADC12PLLCLK_Div32);
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} else {
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RCC_ADCCLKConfig(RCC_ADC34PLLCLK_Div32);
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}
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2017-05-22 15:40:46 +02:00
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2017-05-22 16:53:12 +02:00
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ADC_VoltageRegulatorCmd(adc_dev->cfg->adc_dev, ENABLE);
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PIOS_DELAY_WaituS(10);
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ADC_SelectCalibrationMode(adc_dev->cfg->adc_dev, ADC_CalibrationMode_Single);
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ADC_StartCalibration(adc_dev->cfg->adc_dev);
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while (ADC_GetCalibrationStatus(adc_dev->cfg->adc_dev) != RESET) {
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;
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}
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2017-05-22 15:40:46 +02:00
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2017-05-22 16:53:12 +02:00
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/* Do common ADC init */
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ADC_CommonInitTypeDef ADC_CommonInitStructure;
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ADC_CommonStructInit(&ADC_CommonInitStructure);
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2017-05-22 15:40:46 +02:00
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2017-05-22 16:53:12 +02:00
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ADC_CommonInitStructure.ADC_Mode = ADC_Mode_Independent;
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2017-05-22 15:40:46 +02:00
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ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled;
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2017-05-22 16:53:12 +02:00
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ADC_CommonInitStructure.ADC_Clock = ADC_Clock_AsynClkMode;
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ADC_CommonInitStructure.ADC_DMAMode = ADC_DMAMode_Circular;
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ADC_CommonInitStructure.ADC_TwoSamplingDelay = 0;
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ADC_DMAConfig(adc_dev->cfg->adc_dev, ADC_DMAMode_Circular);
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ADC_CommonInit(adc_dev->cfg->adc_dev, &ADC_CommonInitStructure);
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2017-05-22 15:40:46 +02:00
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2017-05-22 16:53:12 +02:00
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ADC_InitTypeDef ADC_InitStructure;
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ADC_StructInit(&ADC_InitStructure);
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ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b;
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ADC_InitStructure.ADC_ContinuousConvMode = ADC_ContinuousConvMode_Enable;
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ADC_InitStructure.ADC_ExternalTrigConvEvent = ADC_ExternalTrigConvEvent_0;
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ADC_InitStructure.ADC_ExternalTrigEventEdge = ADC_ExternalTrigEventEdge_None;
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ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
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2017-05-22 15:40:46 +02:00
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2017-05-22 16:53:12 +02:00
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ADC_InitStructure.ADC_NbrOfRegChannel = ((PIOS_ADC_NUM_PINS) /* >> 1*/);
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2017-05-22 15:40:46 +02:00
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2017-05-22 16:53:12 +02:00
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ADC_Init(adc_dev->cfg->adc_dev, &ADC_InitStructure);
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2017-05-22 15:40:46 +02:00
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2017-05-22 16:53:12 +02:00
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/* Enable DMA request */
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ADC_DMACmd(adc_dev->cfg->adc_dev, ENABLE);
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2017-05-22 15:40:46 +02:00
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2017-05-22 16:53:12 +02:00
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/* Configure input scan */
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2017-05-22 15:40:46 +02:00
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for (uint32_t i = 0; i < PIOS_ADC_NUM_PINS; i++) {
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ADC_RegularChannelConfig(adc_dev->cfg->adc_dev,
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config[i].channel,
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i + 1,
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ADC_SampleTime_61Cycles5); /* XXX this is totally arbitrary... */
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}
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2017-05-22 16:53:12 +02:00
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ADC_Cmd(adc_dev->cfg->adc_dev, ENABLE);
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2017-05-22 15:40:46 +02:00
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2017-05-22 16:53:12 +02:00
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while (!ADC_GetFlagStatus(adc_dev->cfg->adc_dev, ADC_FLAG_RDY)) {
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;
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}
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2017-05-22 15:40:46 +02:00
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2017-05-22 16:53:12 +02:00
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ADC_StartConversion(adc_dev->cfg->adc_dev);
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2017-05-22 15:40:46 +02:00
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}
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static bool PIOS_ADC_validate(struct pios_adc_dev *dev)
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{
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if (dev == NULL) {
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return false;
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}
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return dev->magic == PIOS_ADC_DEV_MAGIC;
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}
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#if defined(PIOS_INCLUDE_FREERTOS)
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static struct pios_adc_dev *PIOS_ADC_Allocate()
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{
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struct pios_adc_dev *adc_dev;
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adc_dev = (struct pios_adc_dev *)pios_malloc(sizeof(*adc_dev));
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if (!adc_dev) {
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return NULL;
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}
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memset(adc_dev, 0, sizeof(*adc_dev));
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adc_dev->magic = PIOS_ADC_DEV_MAGIC;
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return adc_dev;
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}
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#else
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#error Not implemented
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static struct pios_adc_dev *PIOS_ADC_Allocate()
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{
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return (struct pios_adc_dev *)NULL;
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}
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#endif
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/**
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* @brief Init the ADC.
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*/
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int32_t PIOS_ADC_Init(const struct pios_adc_cfg *cfg)
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{
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PIOS_Assert(cfg);
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2017-05-22 16:53:12 +02:00
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2017-05-22 15:40:46 +02:00
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pios_adc_dev = PIOS_ADC_Allocate();
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if (pios_adc_dev == NULL) {
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return -1;
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}
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pios_adc_dev->cfg = cfg;
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pios_adc_dev->callback_function = NULL;
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#if defined(PIOS_INCLUDE_FREERTOS)
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pios_adc_dev->data_queue = NULL;
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#endif
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init_pins(pios_adc_dev);
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init_dma(pios_adc_dev);
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init_adc(pios_adc_dev);
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return 0;
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}
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/**
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* @brief Configure the ADC to run at a fixed oversampling
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* @param[in] oversampling the amount of oversampling to run at
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*/
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void PIOS_ADC_Config(__attribute__((unused)) uint32_t oversampling)
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{
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/* we ignore this */
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}
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/**
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* Returns value of an ADC Pin
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* @param[in] pin number
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* @return ADC pin value averaged over the set of samples since the last reading.
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* @return -1 if pin doesn't exist
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* @return -2 if no data acquired since last read
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*/
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int32_t last_conv_value;
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int32_t PIOS_ADC_PinGet(uint32_t pin)
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{
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int32_t result;
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/* Check if pin exists */
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if (pin >= PIOS_ADC_NUM_PINS) {
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return -1;
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}
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if (pios_adc_dev->accumulator[pin].accumulator <= 0) {
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return -2;
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}
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/* return accumulated result and clear accumulator */
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result = pios_adc_dev->accumulator[pin].accumulator / (pios_adc_dev->accumulator[pin].count ? : 1);
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pios_adc_dev->accumulator[pin].accumulator = result;
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pios_adc_dev->accumulator[pin].count = 1;
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return result;
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}
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float PIOS_ADC_PinGetVolt(uint32_t pin)
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{
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return ((float)PIOS_ADC_PinGet(pin)) * PIOS_ADC_VOLTAGE_SCALE;
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}
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/**
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* @brief Set a callback function that is executed whenever
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* the ADC double buffer swaps
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* @note Not currently supported.
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*/
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void PIOS_ADC_SetCallback(ADCCallback new_function)
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{
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pios_adc_dev->callback_function = new_function;
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}
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#if defined(PIOS_INCLUDE_FREERTOS)
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/**
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* @brief Register a queue to add data to when downsampled
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* @note Not currently supported.
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*/
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void PIOS_ADC_SetQueue(xQueueHandle data_queue)
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{
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pios_adc_dev->data_queue = data_queue;
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}
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#endif
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/**
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* @brief Return the address of the downsampled data buffer
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* @note Not currently supported.
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*/
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float *PIOS_ADC_GetBuffer(void)
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{
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return NULL;
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}
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/**
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* @brief Return the address of the raw data data buffer
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* @note Not currently supported.
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*/
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int16_t *PIOS_ADC_GetRawBuffer(void)
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{
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return NULL;
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}
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/**
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* @brief Return the amount of over sampling
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* @note Not currently supported (always returns 1)
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*/
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uint8_t PIOS_ADC_GetOverSampling(void)
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{
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return 1;
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}
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/**
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* @brief Set the fir coefficients. Takes as many samples as the
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* current filter order plus one (normalization)
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*
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* @param new_filter Array of adc_oversampling floats plus one for the
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* filter coefficients
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* @note Not currently supported.
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*/
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void PIOS_ADC_SetFIRCoefficients(__attribute__((unused)) float *new_filter)
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{
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// not implemented
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}
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/**
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* @brief accumulate the data for each of the channels.
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*/
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void accumulate(struct pios_adc_dev *dev, volatile uint16_t *buffer)
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{
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volatile uint16_t *sp = buffer;
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/*
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* Accumulate sampled values.
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*/
|
2017-05-22 16:53:12 +02:00
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2017-05-22 15:40:46 +02:00
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int count = (PIOS_ADC_MAX_SAMPLES / 2);
|
2017-05-22 16:53:12 +02:00
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|
2017-05-22 15:40:46 +02:00
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while (count--) {
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for (uint32_t i = 0; i < PIOS_ADC_NUM_PINS; ++i) {
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dev->accumulator[i].accumulator += *sp++;
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dev->accumulator[i].count++;
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|
/*
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* If the accumulator reaches half-full, rescale in order to
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* make more space.
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*/
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if (dev->accumulator[i].accumulator >= (((uint32_t)1) << 31)) {
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dev->accumulator[i].accumulator /= 2;
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dev->accumulator[i].count /= 2;
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}
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}
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}
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#if defined(PIOS_INCLUDE_FREERTOS)
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|
// XXX should do something with this
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if (pios_adc_dev->data_queue) {
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|
|
static portBASE_TYPE xHigherPriorityTaskWoken;
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|
|
// xQueueSendFromISR(pios_adc_dev->data_queue, pios_adc_dev->downsampled_buffer, &xHigherPriorityTaskWoken);
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|
|
portEND_SWITCHING_ISR(xHigherPriorityTaskWoken);
|
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|
|
}
|
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|
|
#endif
|
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|
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|
|
// if(pios_adc_dev->callback_function)
|
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|
|
// pios_adc_dev->callback_function(pios_adc_dev->downsampled_buffer);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Interrupt on buffer flip.
|
|
|
|
*
|
|
|
|
* The hardware is done with the 'other' buffer, so we can pass it to the accumulator.
|
|
|
|
*/
|
|
|
|
void PIOS_ADC_DMA_Handler(void)
|
|
|
|
{
|
|
|
|
if (!PIOS_ADC_validate(pios_adc_dev)) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (DMA_GetFlagStatus(pios_adc_dev->cfg->full_flag)) { // whole double buffer filled
|
|
|
|
DMA_ClearFlag(pios_adc_dev->cfg->full_flag);
|
2017-05-22 16:53:12 +02:00
|
|
|
accumulate(pios_adc_dev, &pios_adc_dev->raw_data_buffer[PIOS_ADC_DMA_BUFFER_SIZE / 2]);
|
2017-05-22 15:40:46 +02:00
|
|
|
} else if (DMA_GetFlagStatus(pios_adc_dev->cfg->half_flag)) {
|
|
|
|
DMA_ClearFlag(pios_adc_dev->cfg->half_flag);
|
|
|
|
accumulate(pios_adc_dev, &pios_adc_dev->raw_data_buffer[0]);
|
|
|
|
} else {
|
|
|
|
// This should not happen, probably due to transfer errors
|
|
|
|
DMA_ClearFlag(pios_adc_dev->cfg->dma.irq.flags);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void PIOS_ADC_PinSetup(uint32_t pin)
|
|
|
|
{
|
|
|
|
if (config[pin].port != NULL && pin < PIOS_ADC_NUM_PINS) {
|
|
|
|
/* Setup analog pin */
|
|
|
|
GPIO_InitTypeDef GPIO_InitStructure;
|
|
|
|
|
|
|
|
GPIO_StructInit(&GPIO_InitStructure);
|
|
|
|
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
|
|
|
|
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AN;
|
|
|
|
GPIO_InitStructure.GPIO_Pin = config[pin].pin;
|
|
|
|
GPIO_Init(config[pin].port, &GPIO_InitStructure);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif /* PIOS_INCLUDE_ADC */
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @}
|
|
|
|
* @}
|
|
|
|
*/
|