mirror of
https://bitbucket.org/librepilot/librepilot.git
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62 lines
1.5 KiB
INI
62 lines
1.5 KiB
INI
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# -*- Tcl -*-
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# script for stm32
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME stm32
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}
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if { [info exists ENDIAN] } {
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set _ENDIAN $ENDIAN
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} else {
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set _ENDIAN little
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}
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# Work-area is a space in RAM used for flash programming
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# By default use 16kB
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if { [info exists WORKAREASIZE] } {
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set _WORKAREASIZE $WORKAREASIZE
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} else {
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set _WORKAREASIZE 0x4000
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}
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# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
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jtag_khz 1000
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# use this when breaking in while the device is in reset
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#jtag_khz 100
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jtag_nsrst_delay 100
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jtag_ntrst_delay 100
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#jtag scan chain
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if { [info exists CPUTAPID ] } {
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set _CPUTAPID $CPUTAPID
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} else {
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# CortexM3 r2p0
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set _CPUTAPID 0x4ba00477
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}
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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if { [info exists BSTAPID ] } {
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set _BSTAPID $BSTAPID
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} else {
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set _BSTAPID 0x06411041
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}
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jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME
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$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
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# if srst is not fitted use SYSRESETREQ to
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# perform a soft reset
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# cortex_m3 reset_config sysresetreq
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME stm32f2xxx 0 0 0 0 $_TARGETNAME
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# For more information about the configuration files, take a look at:
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# openocd.texi
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