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OP-269 PIOS/ADC: First part of conversion to driver structures

git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@2444 ebee16cc-31ac-478f-84a7-5cbb03baadba
This commit is contained in:
peabody124 2011-01-16 02:45:39 +00:00 committed by peabody124
parent ab75e8117f
commit 0259b6d1f1
12 changed files with 447 additions and 462 deletions

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@ -486,7 +486,8 @@ int main()
/* IAP System Setup */ /* IAP System Setup */
PIOS_IAP_Init(); PIOS_IAP_Init();
/* ADC system */ /* ADC system */
PIOS_ADC_Init(adc_oversampling); PIOS_ADC_Init();
PIOS_ADC_Config(adc_oversampling);
PIOS_ADC_SetCallback(adc_callback); PIOS_ADC_SetCallback(adc_callback);
/* ADC buffer */ /* ADC buffer */
@ -1038,7 +1039,7 @@ void settings_callback(AhrsObjHandle obj)
if(settings.Downsampling != adc_oversampling) { if(settings.Downsampling != adc_oversampling) {
adc_oversampling = settings.Downsampling; adc_oversampling = settings.Downsampling;
PIOS_ADC_Init(adc_oversampling); PIOS_ADC_Config(adc_oversampling);
} }
} }

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@ -156,6 +156,59 @@ void PIOS_SPI_op_irq_handler(void)
#endif /* PIOS_INCLUDE_SPI */ #endif /* PIOS_INCLUDE_SPI */
/*
* ADC system
*/
#include "pios_adc_priv.h"
extern void PIOS_ADC_handler(void);
void DMA1_Channel1_IRQHandler() __attribute__ ((alias("PIOS_ADC_handler")));
// Remap the ADC DMA handler to this one
const struct pios_adc_cfg pios_adc_cfg = {
.dma = {
.ahb_clk = RCC_AHBPeriph_DMA1,
.irq = {
.handler = PIOS_ADC_DMA_Handler,
.flags = (DMA1_FLAG_TC1 | DMA1_FLAG_TE1 | DMA1_FLAG_HT1 | DMA1_FLAG_GL1),
.init = {
.NVIC_IRQChannel = DMA1_Channel1_IRQn,
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGH,
.NVIC_IRQChannelSubPriority = 0,
.NVIC_IRQChannelCmd = ENABLE,
},
},
.rx = {
.channel = DMA1_Channel1,
.init = {
.DMA_PeripheralBaseAddr = (uint32_t) & ADC1->DR,
.DMA_DIR = DMA_DIR_PeripheralSRC,
.DMA_PeripheralInc = DMA_PeripheralInc_Disable,
.DMA_MemoryInc = DMA_MemoryInc_Enable,
.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word,
.DMA_MemoryDataSize = DMA_MemoryDataSize_Word,
.DMA_Mode = DMA_Mode_Circular,
.DMA_Priority = DMA_Priority_High,
.DMA_M2M = DMA_M2M_Disable,
},
}
},
.half_flag = DMA1_IT_HT1,
.full_flag = DMA1_IT_TC1,
};
struct pios_adc_dev pios_adc_devs[] = {
{
.cfg = &pios_adc_cfg,
.callback_function = NULL,
},
};
uint8_t pios_adc_num_devices = NELEMENTS(pios_adc_devs);
void PIOS_ADC_handler() {
PIOS_ADC_DMA_Handler();
}
#if defined(PIOS_INCLUDE_USART) #if defined(PIOS_INCLUDE_USART)
#include <pios_usart_priv.h> #include <pios_usart_priv.h>

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@ -66,7 +66,7 @@ void PIOS_Board_Init(void) {
/* Initialize the PiOS library */ /* Initialize the PiOS library */
PIOS_COM_Init(); PIOS_COM_Init();
//PIOS_Servo_Init(); //PIOS_Servo_Init();
PIOS_ADC_Init(1); PIOS_ADC_Init();
PIOS_GPIO_Init(); PIOS_GPIO_Init();
#if defined(PIOS_INCLUDE_PWM) #if defined(PIOS_INCLUDE_PWM)
@ -199,6 +199,59 @@ void PIOS_SPI_ahrs_irq_handler(void)
// PIOS_SPI_IRQ_Handler(PIOS_OPAHRS_SPI); // PIOS_SPI_IRQ_Handler(PIOS_OPAHRS_SPI);
} }
/*
* ADC system
*/
#include "pios_adc_priv.h"
extern void PIOS_ADC_handler(void);
void DMA1_Channel1_IRQHandler() __attribute__ ((alias("PIOS_ADC_handler")));
// Remap the ADC DMA handler to this one
const struct pios_adc_cfg pios_adc_cfg = {
.dma = {
.ahb_clk = RCC_AHBPeriph_DMA1,
.irq = {
.handler = PIOS_ADC_DMA_Handler,
.flags = (DMA1_FLAG_TC1 | DMA1_FLAG_TE1 | DMA1_FLAG_HT1 | DMA1_FLAG_GL1),
.init = {
.NVIC_IRQChannel = DMA1_Channel1_IRQn,
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGH,
.NVIC_IRQChannelSubPriority = 0,
.NVIC_IRQChannelCmd = ENABLE,
},
},
.rx = {
.channel = DMA1_Channel1,
.init = {
.DMA_PeripheralBaseAddr = (uint32_t) & ADC1->DR,
.DMA_DIR = DMA_DIR_PeripheralSRC,
.DMA_PeripheralInc = DMA_PeripheralInc_Disable,
.DMA_MemoryInc = DMA_MemoryInc_Enable,
.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word,
.DMA_MemoryDataSize = DMA_MemoryDataSize_Word,
.DMA_Mode = DMA_Mode_Circular,
.DMA_Priority = DMA_Priority_High,
.DMA_M2M = DMA_M2M_Disable,
},
}
},
.half_flag = DMA1_IT_HT1,
.full_flag = DMA1_IT_TC1,
};
struct pios_adc_dev pios_adc_devs[] = {
{
.cfg = &pios_adc_cfg,
.callback_function = NULL,
},
};
uint8_t pios_adc_num_devices = NELEMENTS(pios_adc_devs);
void PIOS_ADC_handler() {
PIOS_ADC_DMA_Handler();
}
/* /*
* Telemetry USART * Telemetry USART
*/ */

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@ -69,7 +69,7 @@ void PIOS_Board_Init(void) {
/* Initialize the PiOS library */ /* Initialize the PiOS library */
PIOS_COM_Init(); PIOS_COM_Init();
PIOS_Servo_Init(); PIOS_Servo_Init();
PIOS_ADC_Init(1); PIOS_ADC_Init();
PIOS_GPIO_Init(); PIOS_GPIO_Init();
#if defined(PIOS_INCLUDE_PWM) #if defined(PIOS_INCLUDE_PWM)
@ -309,6 +309,59 @@ void PIOS_SPI_ahrs_irq_handler(void)
PIOS_SPI_IRQ_Handler(PIOS_OPAHRS_SPI); PIOS_SPI_IRQ_Handler(PIOS_OPAHRS_SPI);
} }
/*
* ADC system
*/
#include "pios_adc_priv.h"
extern void PIOS_ADC_handler(void);
void DMA1_Channel1_IRQHandler() __attribute__ ((alias("PIOS_ADC_handler")));
// Remap the ADC DMA handler to this one
const struct pios_adc_cfg pios_adc_cfg = {
.dma = {
.ahb_clk = RCC_AHBPeriph_DMA1,
.irq = {
.handler = PIOS_ADC_DMA_Handler,
.flags = (DMA1_FLAG_TC1 | DMA1_FLAG_TE1 | DMA1_FLAG_HT1 | DMA1_FLAG_GL1),
.init = {
.NVIC_IRQChannel = DMA1_Channel1_IRQn,
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGH,
.NVIC_IRQChannelSubPriority = 0,
.NVIC_IRQChannelCmd = ENABLE,
},
},
.rx = {
.channel = DMA1_Channel1,
.init = {
.DMA_PeripheralBaseAddr = (uint32_t) & ADC1->DR,
.DMA_DIR = DMA_DIR_PeripheralSRC,
.DMA_PeripheralInc = DMA_PeripheralInc_Disable,
.DMA_MemoryInc = DMA_MemoryInc_Enable,
.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word,
.DMA_MemoryDataSize = DMA_MemoryDataSize_Word,
.DMA_Mode = DMA_Mode_Circular,
.DMA_Priority = DMA_Priority_High,
.DMA_M2M = DMA_M2M_Disable,
},
}
},
.half_flag = DMA1_IT_HT1,
.full_flag = DMA1_IT_TC1,
};
struct pios_adc_dev pios_adc_devs[] = {
{
.cfg = &pios_adc_cfg,
.callback_function = NULL,
},
};
uint8_t pios_adc_num_devices = NELEMENTS(pios_adc_devs);
void PIOS_ADC_handler() {
PIOS_ADC_DMA_Handler();
}
/* /*
* Telemetry USART * Telemetry USART
*/ */

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@ -0,0 +1,54 @@
MEMORY
{
FLASH (rx) : ORIGIN = 0x08004000, LENGTH = 112K
SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00005000
}
_estack = 0x20004FF0;
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@ -0,0 +1,54 @@
MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 0x00020000
SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00005000
}
_estack = 0x20004FF0;
/* Section Definitions */
SECTIONS
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}

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@ -29,30 +29,11 @@
*/ */
#include "pios.h" #include "pios.h"
#include <pios_adc_priv.h>
// Remap the ADC DMA handler to this one
void PIOS_ADC_DMA_Handler();
void DMA1_Channel1_IRQHandler() __attribute__ ((alias("PIOS_ADC_DMA_Handler")));
// Private functions // Private functions
void PIOS_ADC_downsample_data(); void PIOS_ADC_downsample_data();
//! Where the raw data is stored
volatile int16_t raw_data_buffer[PIOS_ADC_MAX_SAMPLES]; // Double buffer that DMA just used
//! Various configuration settings
struct {
volatile int16_t *valid_data_buffer;
volatile uint8_t adc_oversample;
int16_t fir_coeffs[PIOS_ADC_MAX_SAMPLES];
} adc_config;
//! Filter coefficients used in decimation. Limited order so filter can't run between samples
float downsampled_buffer[PIOS_ADC_NUM_PINS];
static ADCCallback callback_function = (ADCCallback) NULL;
/* Local Variables */ /* Local Variables */
static GPIO_TypeDef *ADC_GPIO_PORT[PIOS_ADC_NUM_PINS] = PIOS_ADC_PORTS; static GPIO_TypeDef *ADC_GPIO_PORT[PIOS_ADC_NUM_PINS] = PIOS_ADC_PORTS;
static const uint32_t ADC_GPIO_PIN[PIOS_ADC_NUM_PINS] = PIOS_ADC_PINS; static const uint32_t ADC_GPIO_PIN[PIOS_ADC_NUM_PINS] = PIOS_ADC_PINS;
@ -70,12 +51,9 @@ static const uint32_t ADC_CHANNEL_MAPPING[PIOS_ADC_NUM_PINS] = PIOS_ADC_CHANNEL_
* Currently ignores rates and uses hardcoded values. Need a little logic to * Currently ignores rates and uses hardcoded values. Need a little logic to
* map from sampling rates and such to ADC constants. * map from sampling rates and such to ADC constants.
*/ */
void PIOS_ADC_Init(uint8_t adc_oversample) void PIOS_ADC_Init()
{ {
pios_adc_devs[0].callback_function = NULL;
int32_t i;
adc_config.adc_oversample = adc_oversample;
ADC_DeInit(ADC1); ADC_DeInit(ADC1);
ADC_DeInit(ADC2); ADC_DeInit(ADC2);
@ -87,7 +65,7 @@ void PIOS_ADC_Init(uint8_t adc_oversample)
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AIN; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AIN;
/* Enable each ADC pin in the array */ /* Enable each ADC pin in the array */
for (i = 0; i < PIOS_ADC_NUM_PINS; i++) { for (int32_t i = 0; i < PIOS_ADC_NUM_PINS; i++) {
GPIO_InitStructure.GPIO_Pin = ADC_GPIO_PIN[i]; GPIO_InitStructure.GPIO_Pin = ADC_GPIO_PIN[i];
GPIO_Init(ADC_GPIO_PORT[i], &GPIO_InitStructure); GPIO_Init(ADC_GPIO_PORT[i], &GPIO_InitStructure);
} }
@ -96,7 +74,7 @@ void PIOS_ADC_Init(uint8_t adc_oversample)
PIOS_ADC_CLOCK_FUNCTION; PIOS_ADC_CLOCK_FUNCTION;
/* Map channels to conversion slots depending on the channel selection mask */ /* Map channels to conversion slots depending on the channel selection mask */
for (i = 0; i < PIOS_ADC_NUM_PINS; i++) { for (int32_t i = 0; i < PIOS_ADC_NUM_PINS; i++) {
ADC_RegularChannelConfig(ADC_MAPPING[i], ADC_CHANNEL[i], ADC_RegularChannelConfig(ADC_MAPPING[i], ADC_CHANNEL[i],
ADC_CHANNEL_MAPPING[i], ADC_CHANNEL_MAPPING[i],
PIOS_ADC_SAMPLE_TIME); PIOS_ADC_SAMPLE_TIME);
@ -151,52 +129,41 @@ void PIOS_ADC_Init(uint8_t adc_oversample)
while (ADC_GetCalibrationStatus(ADC2)) ; while (ADC_GetCalibrationStatus(ADC2)) ;
#endif #endif
/* Enable DMA1 clock */ PIOS_ADC_Config(1);
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
/* Configure DMA1 channel 1 to fetch data from ADC result register */ /* Enable DMA1 clock */
DMA_InitTypeDef DMA_InitStructure; RCC_AHBPeriphClockCmd(pios_adc_devs[0].cfg->dma.ahb_clk, ENABLE);
DMA_StructInit(&DMA_InitStructure);
DMA_DeInit(DMA1_Channel1); }
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t) & ADC1->DR;
DMA_InitStructure.DMA_MemoryBaseAddr = void PIOS_ADC_Config(uint32_t oversampling)
(uint32_t) & raw_data_buffer[0]; {
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC; pios_adc_devs[0].adc_oversample = oversampling;
/* We are double buffering half words from the ADC. Make buffer appropriately sized */
DMA_InitStructure.DMA_BufferSize = /* Disable interrupts */
(PIOS_ADC_NUM_CHANNELS * adc_oversample * 2) >> 1; DMA_ITConfig(pios_adc_devs[0].cfg->dma.rx.channel, pios_adc_devs[0].cfg->dma.irq.flags, DISABLE);
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; /* Configure DMA channel */
/* Note: We read ADC1 and ADC2 in parallel making a word read, also hence the half buffer size */ DMA_InitTypeDef dma_init = pios_adc_devs[0].cfg->dma.rx.init;
DMA_InitStructure.DMA_PeripheralDataSize = dma_init.DMA_MemoryBaseAddr = (uint32_t) &pios_adc_devs[0].raw_data_buffer[0];
DMA_PeripheralDataSize_Word; dma_init.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word; dma_init.DMA_BufferSize = (PIOS_ADC_NUM_CHANNELS * pios_adc_devs[0].adc_oversample * 2) >> 1;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; DMA_Init(pios_adc_devs[0].cfg->dma.rx.channel, &dma_init);
DMA_InitStructure.DMA_Priority = DMA_Priority_High; DMA_Cmd(pios_adc_devs[0].cfg->dma.rx.channel, ENABLE);
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
DMA_Init(DMA1_Channel1, &DMA_InitStructure);
DMA_Cmd(DMA1_Channel1, ENABLE);
/* Trigger interrupt when for half conversions too to indicate double buffer */ /* Trigger interrupt when for half conversions too to indicate double buffer */
DMA_ITConfig(DMA1_Channel1, DMA_IT_TC, ENABLE); DMA_ITConfig(pios_adc_devs[0].cfg->dma.rx.channel, pios_adc_devs[0].cfg->dma.irq.flags, ENABLE);
DMA_ITConfig(DMA1_Channel1, DMA_IT_HT, ENABLE);
/* Configure and enable DMA interrupt */ /* Configure DMA interrupt */
NVIC_InitTypeDef NVIC_InitStructure; NVIC_Init(&pios_adc_devs[0].cfg->dma.irq.init);
NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel1_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority =
PIOS_ADC_IRQ_PRIO;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
/* Finally start initial conversion */ /* Finally start initial conversion */
ADC_SoftwareStartConvCmd(ADC1, ENABLE); ADC_SoftwareStartConvCmd(ADC1, ENABLE);
/* Use simple averaging filter for now */ /* Use simple averaging filter for now */
for (int i = 0; i < adc_oversample; i++) for (int32_t i = 0; i < pios_adc_devs[0].adc_oversample; i++)
adc_config.fir_coeffs[i] = 1; pios_adc_devs[0].fir_coeffs[i] = 1;
adc_config.fir_coeffs[adc_oversample] = adc_oversample; pios_adc_devs[0].fir_coeffs[pios_adc_devs[0].adc_oversample] = pios_adc_devs[0].adc_oversample;
} }
/** /**
@ -213,7 +180,7 @@ int32_t PIOS_ADC_PinGet(uint32_t pin)
} }
/* Return last conversion result */ /* Return last conversion result */
return downsampled_buffer[pin]; return pios_adc_devs[0].downsampled_buffer[pin];
} }
/** /**
@ -222,7 +189,7 @@ int32_t PIOS_ADC_PinGet(uint32_t pin)
*/ */
void PIOS_ADC_SetCallback(ADCCallback new_function) void PIOS_ADC_SetCallback(ADCCallback new_function)
{ {
callback_function = new_function; pios_adc_devs[0].callback_function = new_function;
} }
/** /**
@ -230,7 +197,7 @@ void PIOS_ADC_SetCallback(ADCCallback new_function)
*/ */
float * PIOS_ADC_GetBuffer(void) float * PIOS_ADC_GetBuffer(void)
{ {
return downsampled_buffer; return pios_adc_devs[0].downsampled_buffer;
} }
/** /**
@ -238,7 +205,7 @@ float * PIOS_ADC_GetBuffer(void)
*/ */
int16_t * PIOS_ADC_GetRawBuffer(void) int16_t * PIOS_ADC_GetRawBuffer(void)
{ {
return (int16_t *) adc_config.valid_data_buffer; return (int16_t *) pios_adc_devs[0].valid_data_buffer;
} }
/** /**
@ -246,7 +213,7 @@ int16_t * PIOS_ADC_GetRawBuffer(void)
*/ */
uint8_t PIOS_ADC_GetOverSampling(void) uint8_t PIOS_ADC_GetOverSampling(void)
{ {
return adc_config.adc_oversample; return pios_adc_devs[0].adc_oversample;
} }
/** /**
@ -259,8 +226,8 @@ uint8_t PIOS_ADC_GetOverSampling(void)
void PIOS_ADC_SetFIRCoefficients(float * new_filter) void PIOS_ADC_SetFIRCoefficients(float * new_filter)
{ {
// Less than or equal to get normalization constant // Less than or equal to get normalization constant
for(int i = 0; i <= adc_config.adc_oversample; i++) for(int i = 0; i <= pios_adc_devs[0].adc_oversample; i++)
adc_config.fir_coeffs[i] = new_filter[i]; pios_adc_devs[0].fir_coeffs[i] = new_filter[i];
} }
/** /**
@ -271,17 +238,18 @@ void PIOS_ADC_downsample_data()
{ {
uint16_t chan; uint16_t chan;
uint16_t sample; uint16_t sample;
float * downsampled_buffer = &pios_adc_devs[0].downsampled_buffer[0];
for (chan = 0; chan < PIOS_ADC_NUM_CHANNELS; chan++) { for (chan = 0; chan < PIOS_ADC_NUM_CHANNELS; chan++) {
downsampled_buffer[chan] = 0; int32_t sum = 0;
for (sample = 0; sample < adc_config.adc_oversample; sample++) { for (sample = 0; sample < pios_adc_devs[0].adc_oversample; sample++) {
downsampled_buffer[chan] += adc_config.valid_data_buffer[chan + sample * PIOS_ADC_NUM_CHANNELS] * adc_config.fir_coeffs[sample]; sum += pios_adc_devs[0].valid_data_buffer[chan + sample * PIOS_ADC_NUM_CHANNELS] * pios_adc_devs[0].fir_coeffs[sample];
} }
downsampled_buffer[chan] /= (float) adc_config.fir_coeffs[adc_config.adc_oversample]; downsampled_buffer[chan] = (float) sum / pios_adc_devs[0].fir_coeffs[pios_adc_devs[0].adc_oversample];
} }
if(callback_function != NULL) if(pios_adc_devs[0].callback_function)
callback_function(downsampled_buffer); pios_adc_devs[0].callback_function(pios_adc_devs[0].downsampled_buffer);
} }
/** /**
@ -295,23 +263,19 @@ void PIOS_ADC_downsample_data()
*/ */
void PIOS_ADC_DMA_Handler(void) void PIOS_ADC_DMA_Handler(void)
{ {
if (DMA_GetFlagStatus(DMA1_IT_TC1)) { // whole double buffer filled if (DMA_GetFlagStatus(pios_adc_devs[0].cfg->full_flag /*DMA1_IT_TC1*/)) { // whole double buffer filled
adc_config.valid_data_buffer = pios_adc_devs[0].valid_data_buffer = &pios_adc_devs[0].raw_data_buffer[1 * PIOS_ADC_NUM_CHANNELS * pios_adc_devs[0].adc_oversample];
&raw_data_buffer[1 * PIOS_ADC_NUM_CHANNELS * DMA_ClearFlag(pios_adc_devs[0].cfg->full_flag);
adc_config.adc_oversample];
DMA_ClearFlag(DMA1_IT_TC1);
PIOS_ADC_downsample_data(); PIOS_ADC_downsample_data();
} }
else if (DMA_GetFlagStatus(DMA1_IT_HT1)) { else if (DMA_GetFlagStatus(pios_adc_devs[0].cfg->half_flag /*DMA1_IT_HT1*/)) {
adc_config.valid_data_buffer = pios_adc_devs[0].valid_data_buffer = &pios_adc_devs[0].raw_data_buffer[0 * PIOS_ADC_NUM_CHANNELS * pios_adc_devs[0].adc_oversample];
&raw_data_buffer[0 * PIOS_ADC_NUM_CHANNELS * DMA_ClearFlag(pios_adc_devs[0].cfg->half_flag);
adc_config.adc_oversample];
DMA_ClearFlag(DMA1_IT_HT1);
PIOS_ADC_downsample_data(); PIOS_ADC_downsample_data();
} }
else { else {
// This should not happen, probably due to transfer errors // This should not happen, probably due to transfer errors
DMA_ClearFlag(DMA1_FLAG_GL1); DMA_ClearFlag(pios_adc_devs[0].cfg->dma.irq.flags /*DMA1_FLAG_GL1*/);
} }
} }

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@ -38,10 +38,12 @@
typedef void (*ADCCallback) (float * data); typedef void (*ADCCallback) (float * data);
/* Public Functions */ /* Public Functions */
void PIOS_ADC_Init(uint8_t adc_oversample); void PIOS_ADC_Init();
void PIOS_ADC_Config(uint32_t oversampling);
int32_t PIOS_ADC_PinGet(uint32_t pin); int32_t PIOS_ADC_PinGet(uint32_t pin);
int16_t * PIOS_ADC_GetRawBuffer(void); int16_t * PIOS_ADC_GetRawBuffer(void);
void PIOS_ADC_SetCallback(ADCCallback new_function); void PIOS_ADC_SetCallback(ADCCallback new_function);
extern void PIOS_ADC_DMA_Handler(void);
#endif /* PIOS_ADC_H */ #endif /* PIOS_ADC_H */

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@ -0,0 +1,64 @@
/**
******************************************************************************
* @addtogroup PIOS PIOS Core hardware abstraction layer
* @{
* @addtogroup PIOS_ADC ADC Functions
* @brief PIOS interface for USART port
* @{
*
* @file pios_adc_priv.h
* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2010.
* @brief ADC private definitions.
* @see The GNU Public License (GPL) Version 3
*
*****************************************************************************/
/*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef PIOS_ADC_PRIV_H
#define PIOS_ADC_PRIV_H
#include <pios.h>
#include <pios_stm32.h>
#include <pios_adc.h>
#include <fifo_buffer.h>
struct pios_adc_cfg {
struct stm32_dma dma;
uint32_t half_flag;
uint32_t full_flag;
};
struct pios_adc_dev {
const struct pios_adc_cfg *const cfg;
ADCCallback callback_function;
volatile int16_t *valid_data_buffer;
volatile uint8_t adc_oversample;
int16_t fir_coeffs[PIOS_ADC_MAX_SAMPLES+1] __attribute__ ((aligned(4)));
volatile int16_t raw_data_buffer[PIOS_ADC_MAX_SAMPLES] __attribute__ ((aligned(4))); // Double buffer that DMA just used
float downsampled_buffer[PIOS_ADC_NUM_CHANNELS] __attribute__ ((aligned(4)));
};
extern struct pios_adc_dev pios_adc_devs[];
extern uint8_t pios_adc_num_devices;
#endif /* PIOS_ADC_PRIV_H */
/**
* @}
* @}
*/

View File

@ -594,7 +594,7 @@ int main()
PIOS_COM_Init(); PIOS_COM_Init();
// ADC system // ADC system
PIOS_ADC_Init(1); PIOS_ADC_Init();
// SPI link to master // SPI link to master
PIOS_SPI_Init(); PIOS_SPI_Init();

View File

@ -193,6 +193,59 @@ void PIOS_SPI_port_irq_handler(void)
#endif /* PIOS_INCLUDE_SPI */ #endif /* PIOS_INCLUDE_SPI */
/*
* ADC system
*/
#include "pios_adc_priv.h"
extern void PIOS_ADC_handler(void);
void DMA1_Channel1_IRQHandler() __attribute__ ((alias("PIOS_ADC_handler")));
// Remap the ADC DMA handler to this one
const struct pios_adc_cfg pios_adc_cfg = {
.dma = {
.ahb_clk = RCC_AHBPeriph_DMA1,
.irq = {
.handler = PIOS_ADC_DMA_Handler,
.flags = (DMA1_FLAG_TC1 | DMA1_FLAG_TE1 | DMA1_FLAG_HT1 | DMA1_FLAG_GL1),
.init = {
.NVIC_IRQChannel = DMA1_Channel1_IRQn,
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGH,
.NVIC_IRQChannelSubPriority = 0,
.NVIC_IRQChannelCmd = ENABLE,
},
},
.rx = {
.channel = DMA1_Channel1,
.init = {
.DMA_PeripheralBaseAddr = (uint32_t) & ADC1->DR,
.DMA_DIR = DMA_DIR_PeripheralSRC,
.DMA_PeripheralInc = DMA_PeripheralInc_Disable,
.DMA_MemoryInc = DMA_MemoryInc_Enable,
.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word,
.DMA_MemoryDataSize = DMA_MemoryDataSize_Word,
.DMA_Mode = DMA_Mode_Circular,
.DMA_Priority = DMA_Priority_High,
.DMA_M2M = DMA_M2M_Disable,
},
}
},
.half_flag = DMA1_IT_HT1,
.full_flag = DMA1_IT_TC1,
};
struct pios_adc_dev pios_adc_devs[] = {
{
.cfg = &pios_adc_cfg,
.callback_function = NULL,
},
};
uint8_t pios_adc_num_devices = NELEMENTS(pios_adc_devs);
void PIOS_ADC_handler() {
PIOS_ADC_DMA_Handler();
}
// *********************************************************************************** // ***********************************************************************************
// USART // USART

View File

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65E6E00212E0313F00058553 /* PipXtreme.map */,
65E6E00312E0313F00058553 /* PipXtreme.sym */,
65E6E00412E0313F00058553 /* printf-stdarg.lst */,
65E6E00512E0313F00058553 /* printf-stdarg.o */,
65E6E00612E0313F00058553 /* rfm22b.lst */,
65E6E00712E0313F00058553 /* rfm22b.o */,
65E6E00812E0313F00058553 /* saved_settings.lst */,
65E6E00912E0313F00058553 /* saved_settings.o */,
65E6E00A12E0313F00058553 /* startup_stm32f10x_MD.lst */,
65E6E00B12E0313F00058553 /* startup_stm32f10x_MD.o */,
65E6E00C12E0313F00058553 /* stm32f10x_adc.lst */,
65E6E00D12E0313F00058553 /* stm32f10x_adc.o */,
65E6E00E12E0313F00058553 /* stm32f10x_bkp.lst */,
65E6E00F12E0313F00058553 /* stm32f10x_bkp.o */,
65E6E01012E0313F00058553 /* stm32f10x_crc.lst */,
65E6E01112E0313F00058553 /* stm32f10x_crc.o */,
65E6E01212E0313F00058553 /* stm32f10x_dac.lst */,
65E6E01312E0313F00058553 /* stm32f10x_dac.o */,
65E6E01412E0313F00058553 /* stm32f10x_dbgmcu.lst */,
65E6E01512E0313F00058553 /* stm32f10x_dbgmcu.o */,
65E6E01612E0313F00058553 /* stm32f10x_dma.lst */,
65E6E01712E0313F00058553 /* stm32f10x_dma.o */,
65E6E01812E0313F00058553 /* stm32f10x_exti.lst */,
65E6E01912E0313F00058553 /* stm32f10x_exti.o */,
65E6E01A12E0313F00058553 /* stm32f10x_flash.lst */,
65E6E01B12E0313F00058553 /* stm32f10x_flash.o */,
65E6E01C12E0313F00058553 /* stm32f10x_gpio.lst */,
65E6E01D12E0313F00058553 /* stm32f10x_gpio.o */,
65E6E01E12E0313F00058553 /* stm32f10x_i2c.lst */,
65E6E01F12E0313F00058553 /* stm32f10x_i2c.o */,
65E6E02012E0313F00058553 /* stm32f10x_iwdg.lst */,
65E6E02112E0313F00058553 /* stm32f10x_iwdg.o */,
65E6E02212E0313F00058553 /* stm32f10x_pwr.lst */,
65E6E02312E0313F00058553 /* stm32f10x_pwr.o */,
65E6E02412E0313F00058553 /* stm32f10x_rcc.lst */,
65E6E02512E0313F00058553 /* stm32f10x_rcc.o */,
65E6E02612E0313F00058553 /* stm32f10x_rtc.lst */,
65E6E02712E0313F00058553 /* stm32f10x_rtc.o */,
65E6E02812E0313F00058553 /* stm32f10x_spi.lst */,
65E6E02912E0313F00058553 /* stm32f10x_spi.o */,
65E6E02A12E0313F00058553 /* stm32f10x_tim.lst */,
65E6E02B12E0313F00058553 /* stm32f10x_tim.o */,
65E6E02C12E0313F00058553 /* stm32f10x_usart.lst */,
65E6E02D12E0313F00058553 /* stm32f10x_usart.o */,
65E6E02E12E0313F00058553 /* stopwatch.lst */,
65E6E02F12E0313F00058553 /* stopwatch.o */,
65E6E03012E0313F00058553 /* system_stm32f10x.lst */,
65E6E03112E0313F00058553 /* system_stm32f10x.o */,
65E6E03212E0313F00058553 /* transparent_comms.lst */,
65E6E03312E0313F00058553 /* transparent_comms.o */,
65E6E03412E0313F00058553 /* uavtalk_comms.lst */,
65E6E03512E0313F00058553 /* uavtalk_comms.o */,
65E6E03612E0313F00058553 /* usb_core.lst */,
65E6E03712E0313F00058553 /* usb_core.o */,
65E6E03812E0313F00058553 /* usb_init.lst */,
65E6E03912E0313F00058553 /* usb_init.o */,
65E6E03A12E0313F00058553 /* usb_int.lst */,
65E6E03B12E0313F00058553 /* usb_int.o */,
65E6E03C12E0313F00058553 /* usb_mem.lst */,
65E6E03D12E0313F00058553 /* usb_mem.o */,
65E6E03E12E0313F00058553 /* usb_regs.lst */,
65E6E03F12E0313F00058553 /* usb_regs.o */,
65E6E04012E0313F00058553 /* usb_sil.lst */,
65E6E04112E0313F00058553 /* usb_sil.o */,
65E6E04212E0313F00058553 /* watchdog.lst */,
65E6E04312E0313F00058553 /* watchdog.o */,
);
path = Build;
sourceTree = "<group>";
};
65E6DF9B12E0313E00058553 /* dep */ = {
isa = PBXGroup;
children = (
65E6DF9C12E0313E00058553 /* aes.o.d */,
65E6DF9D12E0313E00058553 /* buffer.o.d */,
65E6DF9E12E0313E00058553 /* core_cm3.o.d */,
65E6DF9F12E0313E00058553 /* crc.o.d */,
65E6DFA012E0313E00058553 /* fifo_buffer.o.d */,
65E6DFA112E0313E00058553 /* gpio_in.o.d */,
65E6DFA212E0313E00058553 /* main.o.d */,
65E6DFA312E0313E00058553 /* misc.o.d */,
65E6DFA412E0313E00058553 /* packet_handler.o.d */,
65E6DFA512E0313E00058553 /* pios_adc.o.d */,
65E6DFA612E0313E00058553 /* pios_board.o.d */,
65E6DFA712E0313E00058553 /* pios_com.o.d */,
65E6DFA812E0313E00058553 /* pios_delay.o.d */,
65E6DFA912E0313E00058553 /* pios_gpio.o.d */,
65E6DFAA12E0313E00058553 /* pios_irq.o.d */,
65E6DFAB12E0313E00058553 /* pios_led.o.d */,
65E6DFAC12E0313E00058553 /* pios_spi.o.d */,
65E6DFAD12E0313E00058553 /* pios_sys.o.d */,
65E6DFAE12E0313E00058553 /* pios_usart.o.d */,
65E6DFAF12E0313E00058553 /* pios_usb_hid.o.d */,
65E6DFB012E0313E00058553 /* pios_usb_hid_desc.o.d */,
65E6DFB112E0313E00058553 /* pios_usb_hid_istr.o.d */,
65E6DFB212E0313E00058553 /* pios_usb_hid_prop.o.d */,
65E6DFB312E0313E00058553 /* pios_usb_hid_pwr.o.d */,
65E6DFB412E0313E00058553 /* pios_wdg.o.d */,
65E6DFB512E0313E00058553 /* printf-stdarg.o.d */,
65E6DFB612E0313E00058553 /* rfm22b.o.d */,
65E6DFB712E0313E00058553 /* saved_settings.o.d */,
65E6DFB812E0313E00058553 /* stm32f10x_adc.o.d */,
65E6DFB912E0313E00058553 /* stm32f10x_bkp.o.d */,
65E6DFBA12E0313E00058553 /* stm32f10x_crc.o.d */,
65E6DFBB12E0313E00058553 /* stm32f10x_dac.o.d */,
65E6DFBC12E0313E00058553 /* stm32f10x_dbgmcu.o.d */,
65E6DFBD12E0313E00058553 /* stm32f10x_dma.o.d */,
65E6DFBE12E0313E00058553 /* stm32f10x_exti.o.d */,
65E6DFBF12E0313E00058553 /* stm32f10x_flash.o.d */,
65E6DFC012E0313E00058553 /* stm32f10x_gpio.o.d */,
65E6DFC112E0313E00058553 /* stm32f10x_i2c.o.d */,
65E6DFC212E0313E00058553 /* stm32f10x_iwdg.o.d */,
65E6DFC312E0313E00058553 /* stm32f10x_pwr.o.d */,
65E6DFC412E0313E00058553 /* stm32f10x_rcc.o.d */,
65E6DFC512E0313E00058553 /* stm32f10x_rtc.o.d */,
65E6DFC612E0313E00058553 /* stm32f10x_spi.o.d */,
65E6DFC712E0313E00058553 /* stm32f10x_tim.o.d */,
65E6DFC812E0313E00058553 /* stm32f10x_usart.o.d */,
65E6DFC912E0313E00058553 /* stopwatch.o.d */,
65E6DFCA12E0313E00058553 /* system_stm32f10x.o.d */,
65E6DFCB12E0313E00058553 /* transparent_comms.o.d */,
65E6DFCC12E0313E00058553 /* uavtalk_comms.o.d */,
65E6DFCD12E0313E00058553 /* usb_core.o.d */,
65E6DFCE12E0313E00058553 /* usb_init.o.d */,
65E6DFCF12E0313E00058553 /* usb_int.o.d */,
65E6DFD012E0313E00058553 /* usb_mem.o.d */,
65E6DFD112E0313E00058553 /* usb_regs.o.d */,
65E6DFD212E0313E00058553 /* usb_sil.o.d */,
65E6DFD312E0313E00058553 /* watchdog.o.d */,
);
path = dep;
sourceTree = "<group>";
};
65E6E04612E0313F00058553 /* inc */ = { 65E6E04612E0313F00058553 /* inc */ = {
isa = PBXGroup; isa = PBXGroup;
children = ( children = (
@ -7854,6 +7487,7 @@
651CF9F2120B700D00EEFD70 /* pios_usb_hid_pwr.h */, 651CF9F2120B700D00EEFD70 /* pios_usb_hid_pwr.h */,
651CF9F3120B700D00EEFD70 /* usb_conf.h */, 651CF9F3120B700D00EEFD70 /* usb_conf.h */,
65E8F03A11EFF25C00BBF654 /* pios_adc.h */, 65E8F03A11EFF25C00BBF654 /* pios_adc.h */,
65E6E09912E037C800058553 /* pios_adc_priv.h */,
65E8F03B11EFF25C00BBF654 /* pios_bmp085.h */, 65E8F03B11EFF25C00BBF654 /* pios_bmp085.h */,
65E8F03C11EFF25C00BBF654 /* pios_com.h */, 65E8F03C11EFF25C00BBF654 /* pios_com.h */,
65E8F03D11EFF25C00BBF654 /* pios_com_priv.h */, 65E8F03D11EFF25C00BBF654 /* pios_com_priv.h */,