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Code Issues Releases Activity

LP-480 Move PIOS_COM_SetHalfDuplex() functionality to IOCTL. Remove RX/TX mode and change parameter order for PIOS_COM_ChangeConfig() and com driver set_config to match the databits/parity/stopbits scheme (like for example 8N1).

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This commit is contained in:
Vladimir Zidar 2017-04-17 00:50:08 +02:00
parent 86022e2def
commit 05ee4b8dac
17 changed files with 200 additions and 224 deletions
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3
flight/modules/UAVOHottBridge/uavohottbridge.c
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@ -123,7 +123,8 @@ static int32_t uavoHoTTBridgeInitialize(void)
// HoTT telemetry baudrate is fixed to 19200
PIOS_COM_ChangeBaud(PIOS_COM_HOTT, 19200);
PIOS_COM_SetHalfDuplex(PIOS_COM_HOTT, true);
bool param = true;
PIOS_COM_Ioctl(PIOS_COM_HOTT, PIOS_IOCTL_USART_SET_HALFDUPLEX, &param);
HoTTBridgeSettingsInitialize();
HoTTBridgeStatusInitialize();

2
flight/pios/common/pios_board_sensors.c
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@ -186,7 +186,7 @@ void PIOS_BOARD_Sensors_Configure()
#ifdef PIOS_INCLUDE_ADC
const struct pios_adc_cfg *adc_cfg = PIOS_BOARD_HW_DEFS_GetAdcCfg(pios_board_info_blob.board_rev);
if(adc_cfg) {
if (adc_cfg) {
PIOS_ADC_Init(adc_cfg);
# ifndef PIOS_EXCLUDE_ADVANCED_FEATURES
uint8_t adc_config[HWSETTINGS_ADCROUTING_NUMELEM];

28
flight/pios/common/pios_com.c
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@ -296,31 +296,7 @@ int32_t PIOS_COM_ChangeBaud(uint32_t com_id, uint32_t baud)
return 0;
}
/**
* Change the port type to halfduplex (shared rx/tx medium)
* \param[in] port COM port
* \param[in] halfduplex enabled
* \return -1 if port not available
* \return 0 on success
*/
int32_t PIOS_COM_SetHalfDuplex(uint32_t com_id, bool halfduplex)
{
struct pios_com_dev *com_dev = (struct pios_com_dev *)com_id;
if (!PIOS_COM_validate(com_dev)) {
/* Undefined COM port for this board (see pios_board.c) */
return -1;
}
/* Invoke the driver function if it exists */
if (com_dev->driver->set_halfduplex) {
com_dev->driver->set_halfduplex(com_dev->lower_id, halfduplex);
}
return 0;
}
int32_t PIOS_COM_ChangeConfig(uint32_t com_id, enum PIOS_COM_Word_Length word_len, enum PIOS_COM_StopBits stop_bits, enum PIOS_COM_Parity parity, uint32_t baud_rate, enum PIOS_COM_Mode mode)
int32_t PIOS_COM_ChangeConfig(uint32_t com_id, enum PIOS_COM_Word_Length word_len, enum PIOS_COM_Parity parity, enum PIOS_COM_StopBits stop_bits, uint32_t baud_rate)
{
struct pios_com_dev *com_dev = (struct pios_com_dev *)com_id;
@ -331,7 +307,7 @@ int32_t PIOS_COM_ChangeConfig(uint32_t com_id, enum PIOS_COM_Word_Length word_le
/* Invoke the driver function if it exists */
if (com_dev->driver->set_config) {
com_dev->driver->set_config(com_dev->lower_id, word_len, stop_bits, parity, baud_rate, mode);
com_dev->driver->set_config(com_dev->lower_id, word_len, parity, stop_bits, baud_rate);
}
return 0;

2
flight/pios/common/pios_dsm.c
View File

@ -332,7 +332,7 @@ int32_t PIOS_DSM_Init(uint32_t *dsm_id,
/* Set comm driver parameters */
PIOS_DEBUG_Assert(driver->set_config);
driver->set_config(lower_id, PIOS_COM_Word_length_8b, PIOS_COM_StopBits_1, PIOS_COM_Parity_No, 115200, PIOS_COM_Mode_Rx);
driver->set_config(lower_id, PIOS_COM_Word_length_8b, PIOS_COM_Parity_No, PIOS_COM_StopBits_1, 115200);
/* Set irq priority */
if (driver->ioctl) {

2
flight/pios/common/pios_exbus.c
View File

@ -309,7 +309,7 @@ int32_t PIOS_EXBUS_Init(uint32_t *exbus_id,
/* Set comm driver parameters */
PIOS_DEBUG_Assert(driver->set_config);
driver->set_config(lower_id, PIOS_COM_Word_length_8b, PIOS_COM_StopBits_1, PIOS_COM_Parity_No, 125000, PIOS_COM_Mode_Rx);
driver->set_config(lower_id, PIOS_COM_Word_length_8b, PIOS_COM_Parity_No, PIOS_COM_StopBits_1, 125000);
/* Set irq priority */
if (driver->ioctl) {

2
flight/pios/common/pios_hott.c
View File

@ -327,7 +327,7 @@ int32_t PIOS_HOTT_Init(uint32_t *hott_id,
/* Set comm driver parameters */
PIOS_DEBUG_Assert(driver->set_config);
driver->set_config(lower_id, PIOS_COM_Word_length_8b, PIOS_COM_StopBits_1, PIOS_COM_Parity_No, 115200, PIOS_COM_Mode_Rx);
driver->set_config(lower_id, PIOS_COM_Word_length_8b, PIOS_COM_Parity_No, PIOS_COM_StopBits_1, 115200);
/* Set irq priority */
if (driver->ioctl) {

2
flight/pios/common/pios_ibus.c
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@ -176,7 +176,7 @@ int32_t PIOS_IBUS_Init(uint32_t *ibus_id, const struct pios_com_driver *driver,
/* Set comm driver parameters */
PIOS_DEBUG_Assert(driver->set_config);
driver->set_config(lower_id, PIOS_COM_Word_length_8b, PIOS_COM_StopBits_1, PIOS_COM_Parity_No, 115200, PIOS_COM_Mode_Rx);
driver->set_config(lower_id, PIOS_COM_Word_length_8b, PIOS_COM_Parity_No, PIOS_COM_StopBits_1, 115200);
/* Set irq priority */
if (driver->ioctl) {

2
flight/pios/common/pios_sbus.c
View File

@ -168,7 +168,7 @@ int32_t PIOS_SBus_Init(uint32_t *sbus_id,
/* Set rest of the parameters */
if (driver->set_config) {
driver->set_config(lower_id, PIOS_COM_Word_length_8b, PIOS_COM_StopBits_2, PIOS_COM_Parity_Even, 100000, PIOS_COM_Mode_Rx);
driver->set_config(lower_id, PIOS_COM_Word_length_8b, PIOS_COM_Parity_Even, PIOS_COM_StopBits_2, 100000);
}
/* Set inverted UART and IRQ priority */

2
flight/pios/common/pios_srxl.c
View File

@ -158,7 +158,7 @@ int32_t PIOS_SRXL_Init(uint32_t *srxl_id,
/* Set comm driver parameters */
PIOS_DEBUG_Assert(driver->set_config);
driver->set_config(lower_id, PIOS_COM_Word_length_8b, PIOS_COM_StopBits_1, PIOS_COM_Parity_No, 115200, PIOS_COM_Mode_Rx);
driver->set_config(lower_id, PIOS_COM_Word_length_8b, PIOS_COM_Parity_No, PIOS_COM_StopBits_1, 115200);
/* Set irq priority */
if (driver->ioctl) {

4
flight/pios/inc/pios_board_io.h
View File

@ -231,8 +231,8 @@ typedef enum {
} PIOS_BOARD_IO_USB_VCP_Function;
void PIOS_BOARD_IO_Configure_USB_Function(PIOS_BOARD_IO_USB_HID_Function hid_function, PIOS_BOARD_IO_USB_VCP_Function vcp_function);
# endif
#endif
# endif // ifndef BOOTLOADER
#endif // ifdef PIOS_INCLUDE_USB
#ifdef PIOS_INCLUDE_PWM
void PIOS_BOARD_IO_Configure_PWM(const struct pios_pwm_cfg *pwm_cfg);
#endif

6
flight/pios/inc/pios_com.h
View File

@ -71,8 +71,7 @@ enum PIOS_COM_Mode {
struct pios_com_driver {
void (*set_baud)(uint32_t id, uint32_t baud);
void (*set_halfduplex)(uint32_t id, bool halfduplex);
void (*set_config)(uint32_t usart_id, enum PIOS_COM_Word_Length word_len, enum PIOS_COM_StopBits stop_bits, enum PIOS_COM_Parity parity, uint32_t baud_rate, enum PIOS_COM_Mode mode);
void (*set_config)(uint32_t usart_id, enum PIOS_COM_Word_Length word_len, enum PIOS_COM_Parity parity, enum PIOS_COM_StopBits stop_bits, uint32_t baud_rate);
void (*set_ctrl_line)(uint32_t id, uint32_t mask, uint32_t state);
void (*tx_start)(uint32_t id, uint16_t tx_bytes_avail);
void (*rx_start)(uint32_t id, uint16_t rx_bytes_avail);
@ -92,8 +91,7 @@ struct pios_com_driver {
/* Public Functions */
extern int32_t PIOS_COM_Init(uint32_t *com_id, const struct pios_com_driver *driver, uint32_t lower_id, uint8_t *rx_buffer, uint16_t rx_buffer_len, uint8_t *tx_buffer, uint16_t tx_buffer_len);
extern int32_t PIOS_COM_ChangeBaud(uint32_t com_id, uint32_t baud);
extern int32_t PIOS_COM_SetHalfDuplex(uint32_t com_id, bool halfduplex);
extern int32_t PIOS_COM_ChangeConfig(uint32_t com_id, enum PIOS_COM_Word_Length word_len, enum PIOS_COM_StopBits stop_bits, enum PIOS_COM_Parity parity, uint32_t baud_rate, enum PIOS_COM_Mode mode);
extern int32_t PIOS_COM_ChangeConfig(uint32_t com_id, enum PIOS_COM_Word_Length word_len, enum PIOS_COM_Parity parity, enum PIOS_COM_StopBits stop_bits, uint32_t baud_rate);
extern int32_t PIOS_COM_SetCtrlLine(uint32_t com_id, uint32_t mask, uint32_t state);
extern int32_t PIOS_COM_RegisterCtrlLineCallback(uint32_t usart_id, pios_com_callback_ctrl_line ctrl_line_cb, uint32_t context);
extern int32_t PIOS_COM_RegisterBaudRateCallback(uint32_t usart_id, pios_com_callback_baud_rate baud_rate_cb, uint32_t context);

2
flight/pios/inc/pios_usart.h
View File

@ -45,7 +45,7 @@ enum PIOS_USART_Inverted {
#define PIOS_IOCTL_USART_SET_INVERTED COM_IOCTL(COM_IOCTL_TYPE_USART, 1, enum PIOS_USART_Inverted)
#define PIOS_IOCTL_USART_SET_SWAPPIN COM_IOCTL(COM_IOCTL_TYPE_USART, 2, bool)
#define PIOS_IOCTL_USART_SET_ONEWIRE COM_IOCTL(COM_IOCTL_TYPE_USART, 3, bool)
#define PIOS_IOCTL_USART_SET_HALFDUPLEX COM_IOCTL(COM_IOCTL_TYPE_USART, 3, bool)
#define PIOS_IOCTL_USART_GET_RXGPIO COM_IOCTL(COM_IOCTL_TYPE_USART, 4, struct stm32_gpio)
#define PIOS_IOCTL_USART_GET_TXGPIO COM_IOCTL(COM_IOCTL_TYPE_USART, 5, struct stm32_gpio)

99
flight/pios/stm32f0x/pios_usart.c
View File

@ -39,7 +39,7 @@
/* Provide a COM driver */
static void PIOS_USART_ChangeBaud(uint32_t usart_id, uint32_t baud);
#ifndef BOOTLOADER
static void PIOS_USART_ChangeConfig(uint32_t usart_id, enum PIOS_COM_Word_Length word_len, enum PIOS_COM_StopBits stop_bits, enum PIOS_COM_Parity parity, uint32_t baud_rate, enum PIOS_COM_Mode mode);
static void PIOS_USART_ChangeConfig(uint32_t usart_id, enum PIOS_COM_Word_Length word_len, enum PIOS_COM_Parity parity, enum PIOS_COM_StopBits stop_bits, uint32_t baud_rate);
#endif
static void PIOS_USART_RegisterRxCallback(uint32_t usart_id, pios_com_callback rx_in_cb, uint32_t context);
static void PIOS_USART_RegisterTxCallback(uint32_t usart_id, pios_com_callback tx_out_cb, uint32_t context);
@ -186,15 +186,8 @@ int32_t PIOS_USART_Init(uint32_t *usart_id, const struct pios_usart_cfg *cfg)
/* Initialize the comm parameter structure */
USART_StructInit(&usart_dev->init); // 9600 8n1
/* Enable the USART Pins Software Remapping */
if (usart_dev->cfg->remap) {
GPIO_PinAFConfig(cfg->rx.gpio, __builtin_ctz(cfg->rx.init.GPIO_Pin), cfg->remap);
GPIO_PinAFConfig(cfg->tx.gpio, __builtin_ctz(cfg->tx.init.GPIO_Pin), cfg->remap);
}
/* Initialize the USART Rx and Tx pins */
GPIO_Init(cfg->rx.gpio, (GPIO_InitTypeDef *)&cfg->rx.init);
GPIO_Init(cfg->tx.gpio, (GPIO_InitTypeDef *)&cfg->tx.init);
/* We will set modes later, depending on installed callbacks */
usart_dev->init.USART_Mode = 0;
/* Enable USART clock */
switch ((uint32_t)cfg->regs) {
@ -217,21 +210,51 @@ int32_t PIOS_USART_Init(uint32_t *usart_id, const struct pios_usart_cfg *cfg)
#endif
}
/* Configure the USART */
USART_Init(cfg->regs, (USART_InitTypeDef *)&usart_dev->init);
*usart_id = (uint32_t)usart_dev;
PIOS_USART_SetIrqPrio(usart_dev, PIOS_IRQ_PRIO_MID);
USART_ITConfig(cfg->regs, USART_IT_RXNE, ENABLE);
USART_ITConfig(cfg->regs, USART_IT_TXE, ENABLE);
USART_ITConfig(cfg->regs, USART_IT_ORE, DISABLE);
USART_ITConfig(cfg->regs, USART_IT_TC, DISABLE);
/* Enable USART */
USART_Cmd(cfg->regs, ENABLE);
/* Disable overrun detection */
USART_OverrunDetectionConfig(usart_dev->cfg->regs, USART_OVRDetection_Disable);
return 0;
}
static void PIOS_USART_Setup(struct pios_usart_dev *usart_dev)
{
/* Configure RX GPIO */
if ((usart_dev->init.USART_Mode & USART_Mode_Rx) && (usart_dev->cfg->rx.gpio)) {
if (usart_dev->cfg->remap) {
GPIO_PinAFConfig(usart_dev->cfg->rx.gpio,
__builtin_ctz(usart_dev->cfg->rx.init.GPIO_Pin),
usart_dev->cfg->remap);
}
GPIO_Init(usart_dev->cfg->rx.gpio, (GPIO_InitTypeDef *)&usart_dev->cfg->rx.init);
USART_ITConfig(usart_dev->cfg->regs, USART_IT_RXNE, ENABLE);
}
/* Configure TX GPIO */
if ((usart_dev->init.USART_Mode & USART_Mode_Tx) && usart_dev->cfg->tx.gpio) {
if (usart_dev->cfg->remap) {
GPIO_PinAFConfig(usart_dev->cfg->tx.gpio,
__builtin_ctz(usart_dev->cfg->tx.init.GPIO_Pin),
usart_dev->cfg->remap);
}
GPIO_Init(usart_dev->cfg->tx.gpio, (GPIO_InitTypeDef *)&usart_dev->cfg->tx.init);
}
/* Write new configuration */
USART_Init(usart_dev->cfg->regs, &usart_dev->init);
/*
* Re enable USART.
*/
USART_Cmd(usart_dev->cfg->regs, ENABLE);
}
static void PIOS_USART_RxStart(uint32_t usart_id, __attribute__((unused)) uint16_t rx_bytes_avail)
{
const struct pios_usart_dev *usart_dev = PIOS_USART_validate(usart_id);
@ -257,10 +280,7 @@ static void PIOS_USART_ChangeBaud(uint32_t usart_id, uint32_t baud)
/* Use our working copy of the usart init structure */
usart_dev->init.USART_BaudRate = baud;
/* Write back the modified configuration */
USART_Init(usart_dev->cfg->regs, &usart_dev->init);
USART_Cmd(usart_dev->cfg->regs, ENABLE);
PIOS_USART_Setup(usart_dev);
}
#ifndef BOOTLOADER
/**
@ -275,10 +295,9 @@ static void PIOS_USART_ChangeBaud(uint32_t usart_id, uint32_t baud)
*/
static void PIOS_USART_ChangeConfig(uint32_t usart_id,
enum PIOS_COM_Word_Length word_len,
enum PIOS_COM_StopBits stop_bits,
enum PIOS_COM_Parity parity,
uint32_t baud_rate,
enum PIOS_COM_Mode mode)
enum PIOS_COM_StopBits stop_bits,
uint32_t baud_rate)
{
struct pios_usart_dev *usart_dev = PIOS_USART_validate(usart_id);
@ -325,27 +344,7 @@ static void PIOS_USART_ChangeConfig(uint32_t usart_id,
usart_dev->init.USART_BaudRate = baud_rate;
}
switch (mode) {
case PIOS_COM_Mode_Rx:
usart_dev->init.USART_Mode = USART_Mode_Rx;
break;
case PIOS_COM_Mode_Tx:
usart_dev->init.USART_Mode = USART_Mode_Tx;
break;
case PIOS_COM_Mode_RxTx:
usart_dev->init.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
break;
default:
break;
}
/* Write back the modified configuration */
USART_Init(usart_dev->cfg->regs, &usart_dev->init);
/*
* Re enable USART.
*/
USART_Cmd(usart_dev->cfg->regs, ENABLE);
PIOS_USART_Setup(usart_dev);
}
#endif /* BOOTLOADER */
@ -359,6 +358,10 @@ static void PIOS_USART_RegisterRxCallback(uint32_t usart_id, pios_com_callback r
*/
usart_dev->rx_in_context = context;
usart_dev->rx_in_cb = rx_in_cb;
usart_dev->init.USART_Mode |= USART_Mode_Rx;
PIOS_USART_Setup(usart_dev);
}
static void PIOS_USART_RegisterTxCallback(uint32_t usart_id, pios_com_callback tx_out_cb, uint32_t context)
@ -371,6 +374,10 @@ static void PIOS_USART_RegisterTxCallback(uint32_t usart_id, pios_com_callback t
*/
usart_dev->tx_out_context = context;
usart_dev->tx_out_cb = tx_out_cb;
usart_dev->init.USART_Mode |= USART_Mode_Tx;
PIOS_USART_Setup(usart_dev);
}
static void PIOS_USART_generic_irq_handler(uint32_t usart_id)

94
flight/pios/stm32f10x/pios_usart.c
View File

@ -37,7 +37,7 @@
#include <pios_usart.h>
/* Provide a COM driver */
static void PIOS_USART_ChangeConfig(uint32_t usart_id, enum PIOS_COM_Word_Length word_len, enum PIOS_COM_StopBits stop_bits, enum PIOS_COM_Parity parity, uint32_t baud_rate, enum PIOS_COM_Mode mode);
static void PIOS_USART_ChangeConfig(uint32_t usart_id, enum PIOS_COM_Word_Length word_len, enum PIOS_COM_Parity parity, enum PIOS_COM_StopBits stop_bits, uint32_t baud_rate);
static void PIOS_USART_ChangeBaud(uint32_t usart_id, uint32_t baud);
static void PIOS_USART_RegisterRxCallback(uint32_t usart_id, pios_com_callback rx_in_cb, uint32_t context);
static void PIOS_USART_RegisterTxCallback(uint32_t usart_id, pios_com_callback tx_out_cb, uint32_t context);
@ -185,17 +185,10 @@ int32_t PIOS_USART_Init(uint32_t *usart_id, const struct pios_usart_cfg *cfg)
/* Initialize the comm parameter structure */
USART_StructInit(&usart_dev->init); // 9600 8n1
/* Enable the USART Pins Software Remapping */
if (usart_dev->cfg->remap) {
GPIO_PinRemapConfig(usart_dev->cfg->remap, ENABLE);
}
/* We will set modes later, depending on installed callbacks */
usart_dev->init.USART_Mode = 0;
/* Initialize the USART Rx and Tx pins */
GPIO_Init(usart_dev->cfg->rx.gpio, &usart_dev->cfg->rx.init);
GPIO_Init(usart_dev->cfg->tx.gpio, &usart_dev->cfg->tx.init);
/* Configure the USART */
USART_Init(usart_dev->cfg->regs, &usart_dev->init);
/* DTR handling? */
*usart_id = (uint32_t)usart_dev;
@ -217,18 +210,44 @@ int32_t PIOS_USART_Init(uint32_t *usart_id, const struct pios_usart_cfg *cfg)
PIOS_USART_SetIrqPrio(usart_dev, PIOS_IRQ_PRIO_MID);
USART_ITConfig(usart_dev->cfg->regs, USART_IT_RXNE, ENABLE);
USART_ITConfig(usart_dev->cfg->regs, USART_IT_TXE, ENABLE);
/* Enable USART */
USART_Cmd(usart_dev->cfg->regs, ENABLE);
return 0;
out_fail:
return -1;
}
static void PIOS_USART_Setup(struct pios_usart_dev *usart_dev)
{
/* Configure RX GPIO */
if ((usart_dev->init.USART_Mode & USART_Mode_Rx) && (usart_dev->cfg->rx.gpio)) {
if (usart_dev->cfg->remap) {
GPIO_PinRemapConfig(usart_dev->cfg->remap, ENABLE);
}
GPIO_Init(usart_dev->cfg->rx.gpio, (GPIO_InitTypeDef *)&usart_dev->cfg->rx.init);
USART_ITConfig(usart_dev->cfg->regs, USART_IT_RXNE, ENABLE);
}
/* Configure TX GPIO */
if ((usart_dev->init.USART_Mode & USART_Mode_Tx) && usart_dev->cfg->tx.gpio) {
if (usart_dev->cfg->remap) {
GPIO_PinRemapConfig(usart_dev->cfg->remap, ENABLE);
}
GPIO_Init(usart_dev->cfg->tx.gpio, (GPIO_InitTypeDef *)&usart_dev->cfg->tx.init);
}
/* Write new configuration */
USART_Init(usart_dev->cfg->regs, &usart_dev->init);
/*
* Re enable USART.
*/
USART_Cmd(usart_dev->cfg->regs, ENABLE);
}
static void PIOS_USART_RxStart(uint32_t usart_id, __attribute__((unused)) uint16_t rx_bytes_avail)
{
struct pios_usart_dev *usart_dev = (struct pios_usart_dev *)usart_id;
@ -266,8 +285,7 @@ static void PIOS_USART_ChangeBaud(uint32_t usart_id, uint32_t baud)
/* Use our working copy of the usart init structure */
usart_dev->init.USART_BaudRate = baud;
/* Write back the modified configuration */
USART_Init(usart_dev->cfg->regs, &usart_dev->init);
PIOS_USART_Setup(usart_dev);
}
/**
@ -282,10 +300,9 @@ static void PIOS_USART_ChangeBaud(uint32_t usart_id, uint32_t baud)
*/
static void PIOS_USART_ChangeConfig(uint32_t usart_id,
enum PIOS_COM_Word_Length word_len,
enum PIOS_COM_StopBits stop_bits,
enum PIOS_COM_Parity parity,
uint32_t baud_rate,
enum PIOS_COM_Mode mode)
enum PIOS_COM_StopBits stop_bits,
uint32_t baud_rate)
{
struct pios_usart_dev *usart_dev = (struct pios_usart_dev *)usart_id;
@ -339,27 +356,7 @@ static void PIOS_USART_ChangeConfig(uint32_t usart_id,
usart_dev->init.USART_BaudRate = baud_rate;
}
switch (mode) {
case PIOS_COM_Mode_Rx:
usart_dev->init.USART_Mode = USART_Mode_Rx;
break;
case PIOS_COM_Mode_Tx:
usart_dev->init.USART_Mode = USART_Mode_Tx;
break;
case PIOS_COM_Mode_RxTx:
usart_dev->init.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
break;
default:
break;
}
/* Write back the modified configuration */
USART_Init(usart_dev->cfg->regs, &usart_dev->init);
/*
* Re enable USART.
*/
USART_Cmd(usart_dev->cfg->regs, ENABLE);
PIOS_USART_Setup(usart_dev);
}
static void PIOS_USART_RegisterRxCallback(uint32_t usart_id, pios_com_callback rx_in_cb, uint32_t context)
@ -376,6 +373,10 @@ static void PIOS_USART_RegisterRxCallback(uint32_t usart_id, pios_com_callback r
*/
usart_dev->rx_in_context = context;
usart_dev->rx_in_cb = rx_in_cb;
usart_dev->init.USART_Mode |= USART_Mode_Rx;
PIOS_USART_Setup(usart_dev);
}
static void PIOS_USART_RegisterTxCallback(uint32_t usart_id, pios_com_callback tx_out_cb, uint32_t context)
@ -392,6 +393,10 @@ static void PIOS_USART_RegisterTxCallback(uint32_t usart_id, pios_com_callback t
*/
usart_dev->tx_out_context = context;
usart_dev->tx_out_cb = tx_out_cb;
usart_dev->init.USART_Mode |= USART_Mode_Tx;
PIOS_USART_Setup(usart_dev);
}
static void PIOS_USART_generic_irq_handler(uint32_t usart_id)
@ -467,6 +472,9 @@ static int32_t PIOS_USART_Ioctl(uint32_t usart_id, uint32_t ctl, void *param)
case PIOS_IOCTL_USART_GET_TXGPIO:
*(struct stm32_gpio *)param = usart_dev->cfg->tx;
break;
case PIOS_IOCTL_USART_SET_HALFDUPLEX:
USART_HalfDuplexCmd(usart_dev->cfg->regs, *(bool *)param ? ENABLE : DISABLE);
break;
default:
if (usart_dev->cfg->ioctl) {
return usart_dev->cfg->ioctl(usart_id, ctl, param);

122
flight/pios/stm32f4xx/pios_usart.c
View File

@ -41,8 +41,7 @@
/* Provide a COM driver */
static void PIOS_USART_ChangeBaud(uint32_t usart_id, uint32_t baud);
static void PIOS_USART_SetHalfDuplex(uint32_t usart_id, bool halfduplex);
static void PIOS_USART_ChangeConfig(uint32_t usart_id, enum PIOS_COM_Word_Length word_len, enum PIOS_COM_StopBits stop_bits, enum PIOS_COM_Parity parity, uint32_t baud_rate, enum PIOS_COM_Mode mode);
static void PIOS_USART_ChangeConfig(uint32_t usart_id, enum PIOS_COM_Word_Length word_len, enum PIOS_COM_Parity parity, enum PIOS_COM_StopBits stop_bits, uint32_t baud_rate);
static void PIOS_USART_SetCtrlLine(uint32_t usart_id, uint32_t mask, uint32_t state);
static void PIOS_USART_RegisterRxCallback(uint32_t usart_id, pios_com_callback rx_in_cb, uint32_t context);
static void PIOS_USART_RegisterTxCallback(uint32_t usart_id, pios_com_callback tx_out_cb, uint32_t context);
@ -52,7 +51,6 @@ static int32_t PIOS_USART_Ioctl(uint32_t usart_id, uint32_t ctl, void *param);
const struct pios_com_driver pios_usart_com_driver = {
.set_baud = PIOS_USART_ChangeBaud,
.set_halfduplex = PIOS_USART_SetHalfDuplex,
.set_config = PIOS_USART_ChangeConfig,
.set_ctrl_line = PIOS_USART_SetCtrlLine,
.tx_start = PIOS_USART_TxStart,
@ -211,20 +209,9 @@ int32_t PIOS_USART_Init(uint32_t *usart_id, const struct pios_usart_cfg *cfg)
/* Initialize the comm parameter structure */
USART_StructInit(&usart_dev->init); // 9600 8n1
/* Map pins to USART function */
/* note __builtin_ctz() due to the difference between GPIO_PinX and GPIO_PinSourceX */
if (usart_dev->cfg->remap) {
GPIO_PinAFConfig(usart_dev->cfg->rx.gpio,
__builtin_ctz(usart_dev->cfg->rx.init.GPIO_Pin),
usart_dev->cfg->remap);
GPIO_PinAFConfig(usart_dev->cfg->tx.gpio,
__builtin_ctz(usart_dev->cfg->tx.init.GPIO_Pin),
usart_dev->cfg->remap);
}
/* We will set modes later, depending on installed callbacks */
usart_dev->init.USART_Mode = 0;
/* Initialize the USART Rx and Tx pins */
GPIO_Init(usart_dev->cfg->rx.gpio, (GPIO_InitTypeDef *)&usart_dev->cfg->rx.init);
GPIO_Init(usart_dev->cfg->tx.gpio, (GPIO_InitTypeDef *)&usart_dev->cfg->tx.init);
/* If a DTR line is specified, initialize it */
if (usart_dev->cfg->dtr.gpio) {
@ -232,9 +219,6 @@ int32_t PIOS_USART_Init(uint32_t *usart_id, const struct pios_usart_cfg *cfg)
PIOS_USART_SetCtrlLine((uint32_t)usart_dev, COM_CTRL_LINE_DTR_MASK, 0);
}
/* Configure the USART */
USART_Init(usart_dev->cfg->regs, (USART_InitTypeDef *)&usart_dev->init);
*usart_id = (uint32_t)usart_dev;
/* Configure USART Interrupts */
@ -267,13 +251,6 @@ int32_t PIOS_USART_Init(uint32_t *usart_id, const struct pios_usart_cfg *cfg)
break;
}
PIOS_USART_SetIrqPrio(usart_dev, PIOS_IRQ_PRIO_MID);
USART_ITConfig(usart_dev->cfg->regs, USART_IT_RXNE, ENABLE);
USART_ITConfig(usart_dev->cfg->regs, USART_IT_TXE, ENABLE);
// FIXME XXX Clear / reset uart here - sends NUL char else
/* Enable USART */
USART_Cmd(usart_dev->cfg->regs, ENABLE);
return 0;
@ -281,6 +258,42 @@ out_fail:
return -1;
}
static void PIOS_USART_Setup(struct pios_usart_dev *usart_dev)
{
/* Configure RX GPIO */
if ((usart_dev->init.USART_Mode & USART_Mode_Rx) && (usart_dev->cfg->rx.gpio)) {
if (usart_dev->cfg->remap) {
GPIO_PinAFConfig(usart_dev->cfg->rx.gpio,
__builtin_ctz(usart_dev->cfg->rx.init.GPIO_Pin),
usart_dev->cfg->remap);
}
GPIO_Init(usart_dev->cfg->rx.gpio, (GPIO_InitTypeDef *)&usart_dev->cfg->rx.init);
/* just enable RX right away, cause rcvr modules do not call rx_start method */
USART_ITConfig(usart_dev->cfg->regs, USART_IT_RXNE, ENABLE);
}
/* Configure TX GPIO */
if ((usart_dev->init.USART_Mode & USART_Mode_Tx) && usart_dev->cfg->tx.gpio) {
if (usart_dev->cfg->remap) {
GPIO_PinAFConfig(usart_dev->cfg->tx.gpio,
__builtin_ctz(usart_dev->cfg->tx.init.GPIO_Pin),
usart_dev->cfg->remap);
}
GPIO_Init(usart_dev->cfg->tx.gpio, (GPIO_InitTypeDef *)&usart_dev->cfg->tx.init);
}
/* Write new configuration */
USART_Init(usart_dev->cfg->regs, &usart_dev->init);
/*
* Re enable USART.
*/
USART_Cmd(usart_dev->cfg->regs, ENABLE);
}
static void PIOS_USART_RxStart(uint32_t usart_id, __attribute__((unused)) uint16_t rx_bytes_avail)
{
struct pios_usart_dev *usart_dev = (struct pios_usart_dev *)usart_id;
@ -319,24 +332,7 @@ static void PIOS_USART_ChangeBaud(uint32_t usart_id, uint32_t baud)
/* Use our working copy of the usart init structure */
usart_dev->init.USART_BaudRate = baud;
/* Write back the modified configuration */
USART_Init(usart_dev->cfg->regs, &usart_dev->init);
}
/**
* Sets the USART peripheral into half duplex mode
* \param[in] usart_id USART name (GPS, TELEM, AUX)
* \param[in] bool wether to set half duplex or not
*/
static void PIOS_USART_SetHalfDuplex(uint32_t usart_id, bool halfduplex)
{
struct pios_usart_dev *usart_dev = (struct pios_usart_dev *)usart_id;
bool valid = PIOS_USART_validate(usart_dev);
PIOS_Assert(valid);
USART_HalfDuplexCmd(usart_dev->cfg->regs, halfduplex ? ENABLE : DISABLE);
PIOS_USART_Setup(usart_dev);
}
/**
@ -351,10 +347,9 @@ static void PIOS_USART_SetHalfDuplex(uint32_t usart_id, bool halfduplex)
*/
static void PIOS_USART_ChangeConfig(uint32_t usart_id,
enum PIOS_COM_Word_Length word_len,
enum PIOS_COM_StopBits stop_bits,
enum PIOS_COM_Parity parity,
uint32_t baud_rate,
enum PIOS_COM_Mode mode)
enum PIOS_COM_StopBits stop_bits,
uint32_t baud_rate)
{
struct pios_usart_dev *usart_dev = (struct pios_usart_dev *)usart_id;
@ -408,27 +403,7 @@ static void PIOS_USART_ChangeConfig(uint32_t usart_id,
usart_dev->init.USART_BaudRate = baud_rate;
}
switch (mode) {
case PIOS_COM_Mode_Rx:
usart_dev->init.USART_Mode = USART_Mode_Rx;
break;
case PIOS_COM_Mode_Tx:
usart_dev->init.USART_Mode = USART_Mode_Tx;
break;
case PIOS_COM_Mode_RxTx:
usart_dev->init.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
break;
default:
break;
}
/* Write back the modified configuration */
USART_Init(usart_dev->cfg->regs, &usart_dev->init);
/*
* Re enable USART.
*/
USART_Cmd(usart_dev->cfg->regs, ENABLE);
PIOS_USART_Setup(usart_dev);
}
static void PIOS_USART_SetCtrlLine(uint32_t usart_id, uint32_t mask, uint32_t state)
@ -461,6 +436,10 @@ static void PIOS_USART_RegisterRxCallback(uint32_t usart_id, pios_com_callback r
*/
usart_dev->rx_in_context = context;
usart_dev->rx_in_cb = rx_in_cb;
usart_dev->init.USART_Mode |= USART_Mode_Rx;
PIOS_USART_Setup(usart_dev);
}
static void PIOS_USART_RegisterTxCallback(uint32_t usart_id, pios_com_callback tx_out_cb, uint32_t context)
@ -477,6 +456,10 @@ static void PIOS_USART_RegisterTxCallback(uint32_t usart_id, pios_com_callback t
*/
usart_dev->tx_out_context = context;
usart_dev->tx_out_cb = tx_out_cb;
usart_dev->init.USART_Mode |= USART_Mode_Tx;
PIOS_USART_Setup(usart_dev);
}
static void PIOS_USART_generic_irq_handler(uint32_t usart_id)
@ -547,6 +530,9 @@ static int32_t PIOS_USART_Ioctl(uint32_t usart_id, uint32_t ctl, void *param)
case PIOS_IOCTL_USART_GET_TXGPIO:
*(struct stm32_gpio *)param = usart_dev->cfg->tx;
break;
case PIOS_IOCTL_USART_SET_HALFDUPLEX:
USART_HalfDuplexCmd(usart_dev->cfg->regs, *(bool *)param ? ENABLE : DISABLE);
break;
default:
if (usart_dev->cfg->ioctl) {
return usart_dev->cfg->ioctl(usart_id, ctl, param);

6
flight/targets/boards/simposix/firmware/inc/pios_config.h
View File

@ -52,7 +52,7 @@
#define PIOS_INCLUDE_SPI
#define PIOS_INCLUDE_SYS
#define PIOS_INCLUDE_TASK_MONITOR
//#define PIOS_INCLUDE_USART
// #define PIOS_INCLUDE_USART
// #define PIOS_INCLUDE_USB
#define PIOS_INCLUDE_USB_HID
// #define PIOS_INCLUDE_GPIO
@ -87,8 +87,8 @@
#define PIOS_INCLUDE_RCVR
#define PIOS_INCLUDE_DSM
// #define PIOS_INCLUDE_SBUS
//#define PIOS_INCLUDE_PPM
//#define PIOS_INCLUDE_PWM
// #define PIOS_INCLUDE_PPM
// #define PIOS_INCLUDE_PWM
/* #define PIOS_INCLUDE_GCSRCVR */
/* #define PIOS_INCLUDE_OPLINKRCVR */
#define PIOS_INCLUDE_IAP