mirror of
https://bitbucket.org/librepilot/librepilot.git
synced 2024-11-29 07:24:13 +01:00
Merge remote-tracking branch 'origin/next' into thread/OP-1119_Flight_Side_Logs_Plugin
This commit is contained in:
commit
06924d335a
19
WHATSNEW.txt
19
WHATSNEW.txt
@ -1,3 +1,22 @@
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--- RELEASE-13.06.04 ---
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This maintenance release includes the following fixes missing in (previously not released to public) RELEASE-13.06.03.
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- Fixed issues with Google Maps;
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- Includes new signed version of CDC drivers for Windows platforms;
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JIRA issues addressed in this maintenance release:
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OP-1044, OP-1070, OP-1072
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Use the following link for a comprehensive list of issues addressed by this release
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http://progress.openpilot.org/browse/OP-1070
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--- RELEASE-13.06.03 ---
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This maintenance release addresses the following issues:
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- Fixed CC3D attitude estimation failure after multiple settings changes and reboots.
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- Fixed OPLink crashes when erasing settings
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JIRA issues addressed in this maintenance release:
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OP-1049, OP-1050
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--- RELEASE-13.06.02 ---
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Refactoring of OPLink radio driver. Auto-configuration was removed, and a
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@ -3,7 +3,9 @@ Signature = "$Windows NT$"
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Class = Ports
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ClassGuid = {4D36E978-E325-11CE-BFC1-08002BE10318}
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Provider = %ProviderName%
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DriverVer = 10/15/2009,1.0.0.0
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DriverVer=02/22/2013,2.0.0.0
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CatalogFile.NTx86 = OpenPilot-CDC_x86.cat
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CatalogFile.NTamd64 = OpenPilot-CDC_amd64.cat
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[MANUFACTURER]
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%ProviderName% = DeviceList, NTx86, NTamd64
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BIN
flight/Project/Windows USB/openpilot-cdc_amd64.cat
Normal file
BIN
flight/Project/Windows USB/openpilot-cdc_amd64.cat
Normal file
Binary file not shown.
BIN
flight/Project/Windows USB/openpilot-cdc_x86.cat
Normal file
BIN
flight/Project/Windows USB/openpilot-cdc_x86.cat
Normal file
Binary file not shown.
@ -118,6 +118,9 @@ static void systemTask(__attribute__((unused)) void *parameters)
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/* create all modules thread */
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MODULE_TASKCREATE_ALL;
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/* start the delayed callback scheduler */
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CallbackSchedulerStart();
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if (mallocFailed) {
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/* We failed to malloc during task creation,
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* system behaviour is undefined. Reset and let
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@ -64,7 +64,13 @@ static void PIOS_MPU6000_Config(struct pios_mpu6000_cfg const *cfg);
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static int32_t PIOS_MPU6000_SetReg(uint8_t address, uint8_t buffer);
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static int32_t PIOS_MPU6000_GetReg(uint8_t address);
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#define GRAV 9.81f
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#define GRAV 9.81f
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#ifdef PIOS_MPU6000_ACCEL
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#define PIOS_MPU6000_SAMPLES_BYTES 14
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#else
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#define PIOS_MPU6000_SAMPLES_BYTES 8
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#endif
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/**
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* @brief Allocate a new device
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@ -489,6 +495,62 @@ int32_t PIOS_MPU6000_Test(void)
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return 0;
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}
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/**
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* @brief Reads the contents of the MPU6000 Interrupt Status register from an ISR
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* @return The register value or -1 on failure to claim the bus
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*/
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static int32_t PIOS_MPU6000_GetInterruptStatusRegISR(bool *woken)
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{
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/* Interrupt Status register can be read at high SPI clock speed */
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uint8_t data;
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if (PIOS_MPU6000_ClaimBusISR(woken) != 0) {
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return -1;
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}
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PIOS_SPI_TransferByte(dev->spi_id, (0x80 | PIOS_MPU6000_INT_STATUS_REG));
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data = PIOS_SPI_TransferByte(dev->spi_id, 0);
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PIOS_MPU6000_ReleaseBusISR(woken);
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return data;
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}
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/**
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* @brief Resets the MPU6000 FIFO from an ISR
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* @param woken[in,out] If non-NULL, will be set to true if woken was false and a higher priority
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* task has is now eligible to run, else unchanged
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* @return 0 if operation was successful
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* @return -1 if unable to claim SPI bus
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* @return -2 if write to the device failed
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*/
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static int32_t PIOS_MPU6000_ResetFifoISR(bool *woken)
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{
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int32_t result = 0;
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/* Register writes must be at < 1MHz SPI clock.
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* Speed can only be changed when SPI bus semaphore is held, but
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* device chip select must not be enabled, so we use the direct
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* SPI bus claim call here */
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if (PIOS_SPI_ClaimBusISR(dev->spi_id, woken) != 0) {
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return -1;
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}
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/* Reduce SPI clock speed. */
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PIOS_SPI_SetClockSpeed(dev->spi_id, PIOS_SPI_PRESCALER_256);
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/* Enable chip select */
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PIOS_SPI_RC_PinSet(dev->spi_id, dev->slave_num, 0);
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/* Reset FIFO. */
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if (PIOS_SPI_TransferByte(dev->spi_id, 0x7f & PIOS_MPU6000_USER_CTRL_REG) != 0) {
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result = -2;
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} else if (PIOS_SPI_TransferByte(dev->spi_id, (dev->cfg->User_ctl | PIOS_MPU6000_USERCTL_FIFO_RST)) != 0) {
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result = -2;
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}
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/* Disable chip select. */
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PIOS_SPI_RC_PinSet(dev->spi_id, dev->slave_num, 1);
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/* Increase SPI clock speed. */
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PIOS_SPI_SetClockSpeed(dev->spi_id, PIOS_SPI_PRESCALER_16);
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/* Release the SPI bus semaphore. */
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PIOS_SPI_ReleaseBusISR(dev->spi_id, woken);
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return result;
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}
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/**
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* @brief Obtains the number of bytes in the FIFO. Call from ISR only.
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* @return the number of bytes in the FIFO
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@ -542,8 +604,29 @@ bool PIOS_MPU6000_IRQHandler(void)
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return false;
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}
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/* Temporary fix for OP-1049. Expected to be superceded for next major release
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* by code changes for OP-1039.
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* Read interrupt status register to check for FIFO overflow. Must be the
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* first read after interrupt, in case the device is configured so that
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* any read clears in the status register (PIOS_MPU6000_INT_CLR_ANYRD set in
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* interrupt config register) */
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int32_t result;
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if ((result = PIOS_MPU6000_GetInterruptStatusRegISR(&woken)) < 0) {
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return woken;
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}
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if (result & PIOS_MPU6000_INT_STATUS_FIFO_OVERFLOW) {
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/* The FIFO has overflowed, so reset it,
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* to enable sample sync to be recovered.
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* If the reset fails, we are in trouble, but
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* we keep trying on subsequent interrupts. */
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PIOS_MPU6000_ResetFifoISR(&woken);
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/* Return and wait for the next new sample. */
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return woken;
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}
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/* Usual case - FIFO has not overflowed. */
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mpu6000_count = PIOS_MPU6000_FifoDepthISR(&woken);
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if (mpu6000_count < (int32_t)sizeof(struct pios_mpu6000_data)) {
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if (mpu6000_count < PIOS_MPU6000_SAMPLES_BYTES) {
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return woken;
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}
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@ -551,8 +634,8 @@ bool PIOS_MPU6000_IRQHandler(void)
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return woken;
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}
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static uint8_t mpu6000_send_buf[1 + sizeof(struct pios_mpu6000_data)] = { PIOS_MPU6000_FIFO_REG | 0x80, 0, 0, 0, 0, 0, 0, 0, 0 };
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static uint8_t mpu6000_rec_buf[1 + sizeof(struct pios_mpu6000_data)];
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static uint8_t mpu6000_send_buf[1 + PIOS_MPU6000_SAMPLES_BYTES] = { PIOS_MPU6000_FIFO_REG | 0x80 };
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static uint8_t mpu6000_rec_buf[1 + PIOS_MPU6000_SAMPLES_BYTES];
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if (PIOS_SPI_TransferBlock(dev->spi_id, &mpu6000_send_buf[0], &mpu6000_rec_buf[0], sizeof(mpu6000_send_buf), NULL) < 0) {
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PIOS_MPU6000_ReleaseBusISR(&woken);
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@ -565,7 +648,7 @@ bool PIOS_MPU6000_IRQHandler(void)
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static struct pios_mpu6000_data data;
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// In the case where extras samples backed up grabbed an extra
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if (mpu6000_count >= (int32_t)(sizeof(data) * 2)) {
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if (mpu6000_count >= PIOS_MPU6000_SAMPLES_BYTES * 2) {
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mpu6000_fifo_backup++;
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if (PIOS_MPU6000_ClaimBusISR(&woken) != 0) {
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return woken;
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@ -33,71 +33,72 @@
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#define PIOS_MPU6000_H
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/* MPU6000 Addresses */
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#define PIOS_MPU6000_SMPLRT_DIV_REG 0X19
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#define PIOS_MPU6000_DLPF_CFG_REG 0X1A
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#define PIOS_MPU6000_GYRO_CFG_REG 0X1B
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#define PIOS_MPU6000_ACCEL_CFG_REG 0X1C
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#define PIOS_MPU6000_FIFO_EN_REG 0x23
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#define PIOS_MPU6000_INT_CFG_REG 0x37
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#define PIOS_MPU6000_INT_EN_REG 0x38
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#define PIOS_MPU6000_INT_STATUS_REG 0x3A
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#define PIOS_MPU6000_ACCEL_X_OUT_MSB 0x3B
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#define PIOS_MPU6000_ACCEL_X_OUT_LSB 0x3C
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#define PIOS_MPU6000_ACCEL_Y_OUT_MSB 0x3D
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#define PIOS_MPU6000_ACCEL_Y_OUT_LSB 0x3E
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#define PIOS_MPU6000_ACCEL_Z_OUT_MSB 0x3F
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#define PIOS_MPU6000_ACCEL_Z_OUT_LSB 0x40
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#define PIOS_MPU6000_TEMP_OUT_MSB 0x41
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#define PIOS_MPU6000_TEMP_OUT_LSB 0x42
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#define PIOS_MPU6000_GYRO_X_OUT_MSB 0x43
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#define PIOS_MPU6000_GYRO_X_OUT_LSB 0x44
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#define PIOS_MPU6000_GYRO_Y_OUT_MSB 0x45
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#define PIOS_MPU6000_GYRO_Y_OUT_LSB 0x46
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#define PIOS_MPU6000_GYRO_Z_OUT_MSB 0x47
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#define PIOS_MPU6000_GYRO_Z_OUT_LSB 0x48
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#define PIOS_MPU6000_USER_CTRL_REG 0x6A
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#define PIOS_MPU6000_PWR_MGMT_REG 0x6B
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#define PIOS_MPU6000_FIFO_CNT_MSB 0x72
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#define PIOS_MPU6000_FIFO_CNT_LSB 0x73
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#define PIOS_MPU6000_FIFO_REG 0x74
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#define PIOS_MPU6000_WHOAMI 0x75
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#define PIOS_MPU6000_SMPLRT_DIV_REG 0X19
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#define PIOS_MPU6000_DLPF_CFG_REG 0X1A
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#define PIOS_MPU6000_GYRO_CFG_REG 0X1B
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#define PIOS_MPU6000_ACCEL_CFG_REG 0X1C
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#define PIOS_MPU6000_FIFO_EN_REG 0x23
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#define PIOS_MPU6000_INT_CFG_REG 0x37
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#define PIOS_MPU6000_INT_EN_REG 0x38
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#define PIOS_MPU6000_INT_STATUS_REG 0x3A
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#define PIOS_MPU6000_ACCEL_X_OUT_MSB 0x3B
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#define PIOS_MPU6000_ACCEL_X_OUT_LSB 0x3C
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#define PIOS_MPU6000_ACCEL_Y_OUT_MSB 0x3D
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#define PIOS_MPU6000_ACCEL_Y_OUT_LSB 0x3E
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#define PIOS_MPU6000_ACCEL_Z_OUT_MSB 0x3F
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#define PIOS_MPU6000_ACCEL_Z_OUT_LSB 0x40
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#define PIOS_MPU6000_TEMP_OUT_MSB 0x41
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#define PIOS_MPU6000_TEMP_OUT_LSB 0x42
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#define PIOS_MPU6000_GYRO_X_OUT_MSB 0x43
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#define PIOS_MPU6000_GYRO_X_OUT_LSB 0x44
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#define PIOS_MPU6000_GYRO_Y_OUT_MSB 0x45
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#define PIOS_MPU6000_GYRO_Y_OUT_LSB 0x46
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#define PIOS_MPU6000_GYRO_Z_OUT_MSB 0x47
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#define PIOS_MPU6000_GYRO_Z_OUT_LSB 0x48
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#define PIOS_MPU6000_USER_CTRL_REG 0x6A
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#define PIOS_MPU6000_PWR_MGMT_REG 0x6B
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#define PIOS_MPU6000_FIFO_CNT_MSB 0x72
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#define PIOS_MPU6000_FIFO_CNT_LSB 0x73
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#define PIOS_MPU6000_FIFO_REG 0x74
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#define PIOS_MPU6000_WHOAMI 0x75
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|
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/* FIFO enable for storing different values */
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#define PIOS_MPU6000_FIFO_TEMP_OUT 0x80
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#define PIOS_MPU6000_FIFO_GYRO_X_OUT 0x40
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#define PIOS_MPU6000_FIFO_GYRO_Y_OUT 0x20
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#define PIOS_MPU6000_FIFO_GYRO_Z_OUT 0x10
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#define PIOS_MPU6000_ACCEL_OUT 0x08
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#define PIOS_MPU6000_FIFO_TEMP_OUT 0x80
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#define PIOS_MPU6000_FIFO_GYRO_X_OUT 0x40
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#define PIOS_MPU6000_FIFO_GYRO_Y_OUT 0x20
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#define PIOS_MPU6000_FIFO_GYRO_Z_OUT 0x10
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#define PIOS_MPU6000_ACCEL_OUT 0x08
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|
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/* Interrupt Configuration */
|
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#define PIOS_MPU6000_INT_ACTL 0x80
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#define PIOS_MPU6000_INT_OPEN 0x40
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#define PIOS_MPU6000_INT_LATCH_EN 0x20
|
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#define PIOS_MPU6000_INT_CLR_ANYRD 0x10
|
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#define PIOS_MPU6000_INT_ACTL 0x80
|
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#define PIOS_MPU6000_INT_OPEN 0x40
|
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#define PIOS_MPU6000_INT_LATCH_EN 0x20
|
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#define PIOS_MPU6000_INT_CLR_ANYRD 0x10
|
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|
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#define PIOS_MPU6000_INTEN_OVERFLOW 0x10
|
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#define PIOS_MPU6000_INTEN_DATA_RDY 0x01
|
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#define PIOS_MPU6000_INTEN_OVERFLOW 0x10
|
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#define PIOS_MPU6000_INTEN_DATA_RDY 0x01
|
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|
||||
/* Interrupt status */
|
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#define PIOS_MPU6000_INT_STATUS_FIFO_FULL 0x80
|
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#define PIOS_MPU6000_INT_STATUS_IMU_RDY 0X04
|
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#define PIOS_MPU6000_INT_STATUS_DATA_RDY 0X01
|
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#define PIOS_MPU6000_INT_STATUS_FIFO_FULL 0x80
|
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#define PIOS_MPU6000_INT_STATUS_FIFO_OVERFLOW 0x10
|
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#define PIOS_MPU6000_INT_STATUS_IMU_RDY 0X04
|
||||
#define PIOS_MPU6000_INT_STATUS_DATA_RDY 0X01
|
||||
|
||||
/* User control functionality */
|
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#define PIOS_MPU6000_USERCTL_FIFO_EN 0X40
|
||||
#define PIOS_MPU6000_USERCTL_I2C_MST_EN 0x20
|
||||
#define PIOS_MPU6000_USERCTL_DIS_I2C 0X10
|
||||
#define PIOS_MPU6000_USERCTL_FIFO_RST 0X04
|
||||
#define PIOS_MPU6000_USERCTL_SIG_COND 0X02
|
||||
#define PIOS_MPU6000_USERCTL_GYRO_RST 0X01
|
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#define PIOS_MPU6000_USERCTL_FIFO_EN 0X40
|
||||
#define PIOS_MPU6000_USERCTL_I2C_MST_EN 0x20
|
||||
#define PIOS_MPU6000_USERCTL_DIS_I2C 0X10
|
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#define PIOS_MPU6000_USERCTL_FIFO_RST 0X04
|
||||
#define PIOS_MPU6000_USERCTL_SIG_COND 0X02
|
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#define PIOS_MPU6000_USERCTL_GYRO_RST 0X01
|
||||
|
||||
/* Power management and clock selection */
|
||||
#define PIOS_MPU6000_PWRMGMT_IMU_RST 0X80
|
||||
#define PIOS_MPU6000_PWRMGMT_INTERN_CLK 0X00
|
||||
#define PIOS_MPU6000_PWRMGMT_PLL_X_CLK 0X01
|
||||
#define PIOS_MPU6000_PWRMGMT_PLL_Y_CLK 0X02
|
||||
#define PIOS_MPU6000_PWRMGMT_PLL_Z_CLK 0X03
|
||||
#define PIOS_MPU6000_PWRMGMT_STOP_CLK 0X07
|
||||
#define PIOS_MPU6000_PWRMGMT_IMU_RST 0X80
|
||||
#define PIOS_MPU6000_PWRMGMT_INTERN_CLK 0X00
|
||||
#define PIOS_MPU6000_PWRMGMT_PLL_X_CLK 0X01
|
||||
#define PIOS_MPU6000_PWRMGMT_PLL_Y_CLK 0X02
|
||||
#define PIOS_MPU6000_PWRMGMT_PLL_Z_CLK 0X03
|
||||
#define PIOS_MPU6000_PWRMGMT_STOP_CLK 0X07
|
||||
|
||||
enum pios_mpu6000_range {
|
||||
PIOS_MPU6000_SCALE_250_DEG = 0x00,
|
||||
|
@ -127,6 +127,10 @@ void PIOS_Board_Init(void)
|
||||
PIOS_RTC_Init(&pios_rtc_main_cfg);
|
||||
#endif /* PIOS_INCLUDE_RTC */
|
||||
|
||||
#if defined(PIOS_INCLUDE_LED)
|
||||
PIOS_LED_Init(&pios_led_cfg);
|
||||
#endif /* PIOS_INCLUDE_LED */
|
||||
|
||||
/* IAP System Setup */
|
||||
PIOS_IAP_Init();
|
||||
// check for safe mode commands from gcs
|
||||
@ -144,9 +148,6 @@ void PIOS_Board_Init(void)
|
||||
OPLinkStatusInitialize();
|
||||
#endif /* PIOS_INCLUDE_RFM22B */
|
||||
|
||||
#if defined(PIOS_INCLUDE_LED)
|
||||
PIOS_LED_Init(&pios_led_cfg);
|
||||
#endif /* PIOS_INCLUDE_LED */
|
||||
|
||||
#if defined(PIOS_INCLUDE_TIM)
|
||||
/* Set up pulse timers */
|
||||
|
@ -27,7 +27,7 @@ OpenPilot.
|
||||
------------------
|
||||
Fortunately, it requires only few small text files since all others components
|
||||
should already be installed on your system as parts of msysGit, QtSDK and
|
||||
CodeSourcery G++ packages required to build the OpenPilot.
|
||||
Arm compiler packages required to build the OpenPilot.
|
||||
|
||||
It is expected that you have the following tools installed into the listed
|
||||
locations (but any other locations are fine as well):
|
||||
@ -39,8 +39,8 @@ locations (but any other locations are fine as well):
|
||||
- Unicode NSIS in %ProgramFiles%\NSIS\Unicode
|
||||
- OpenOCD in C:\OpenOCD\0.4.0\bin (optional)
|
||||
|
||||
The SDL library and headers should be installed into Qt directories to build
|
||||
the GCS. Check the wiki or ground/openpilotgcs/copydata.pro for details.
|
||||
The SDL and SSL libraries and headers should be installed into Qt directories to
|
||||
build the GCS. Check the wiki or ground/openpilotgcs/copydata.pro for details.
|
||||
|
||||
Also it is assumed that you have the C:\Program Files\Git\cmd\ directory in
|
||||
the PATH. Usually this is the case for msysGit installation if you have chosen
|
||||
|
@ -238,7 +238,7 @@ SectionEnd
|
||||
; Copy driver files
|
||||
Section "-Drivers" InSecDrivers
|
||||
SetOutPath "$INSTDIR\drivers"
|
||||
File "${PROJECT_ROOT}\flight\Project\Windows USB\OpenPilot-CDC.inf"
|
||||
File /r "${PROJECT_ROOT}\flight\Project\Windows USB\*"
|
||||
SectionEnd
|
||||
|
||||
; Preinstall OpenPilot CDC driver
|
||||
|
Loading…
Reference in New Issue
Block a user