mirror of
https://bitbucket.org/librepilot/librepilot.git
synced 2024-11-29 07:24:13 +01:00
Merge remote-tracking branch 'origin/next' into thread/OP-1119_Flight_Side_Logs_Plugin
This commit is contained in:
commit
06924d335a
19
WHATSNEW.txt
19
WHATSNEW.txt
@ -1,3 +1,22 @@
|
||||
--- RELEASE-13.06.04 ---
|
||||
This maintenance release includes the following fixes missing in (previously not released to public) RELEASE-13.06.03.
|
||||
- Fixed issues with Google Maps;
|
||||
- Includes new signed version of CDC drivers for Windows platforms;
|
||||
|
||||
JIRA issues addressed in this maintenance release:
|
||||
OP-1044, OP-1070, OP-1072
|
||||
Use the following link for a comprehensive list of issues addressed by this release
|
||||
http://progress.openpilot.org/browse/OP-1070
|
||||
|
||||
--- RELEASE-13.06.03 ---
|
||||
|
||||
This maintenance release addresses the following issues:
|
||||
- Fixed CC3D attitude estimation failure after multiple settings changes and reboots.
|
||||
- Fixed OPLink crashes when erasing settings
|
||||
|
||||
JIRA issues addressed in this maintenance release:
|
||||
OP-1049, OP-1050
|
||||
|
||||
--- RELEASE-13.06.02 ---
|
||||
|
||||
Refactoring of OPLink radio driver. Auto-configuration was removed, and a
|
||||
|
@ -3,7 +3,9 @@ Signature = "$Windows NT$"
|
||||
Class = Ports
|
||||
ClassGuid = {4D36E978-E325-11CE-BFC1-08002BE10318}
|
||||
Provider = %ProviderName%
|
||||
DriverVer = 10/15/2009,1.0.0.0
|
||||
DriverVer=02/22/2013,2.0.0.0
|
||||
CatalogFile.NTx86 = OpenPilot-CDC_x86.cat
|
||||
CatalogFile.NTamd64 = OpenPilot-CDC_amd64.cat
|
||||
|
||||
[MANUFACTURER]
|
||||
%ProviderName% = DeviceList, NTx86, NTamd64
|
||||
|
BIN
flight/Project/Windows USB/openpilot-cdc_amd64.cat
Normal file
BIN
flight/Project/Windows USB/openpilot-cdc_amd64.cat
Normal file
Binary file not shown.
BIN
flight/Project/Windows USB/openpilot-cdc_x86.cat
Normal file
BIN
flight/Project/Windows USB/openpilot-cdc_x86.cat
Normal file
Binary file not shown.
@ -118,6 +118,9 @@ static void systemTask(__attribute__((unused)) void *parameters)
|
||||
/* create all modules thread */
|
||||
MODULE_TASKCREATE_ALL;
|
||||
|
||||
/* start the delayed callback scheduler */
|
||||
CallbackSchedulerStart();
|
||||
|
||||
if (mallocFailed) {
|
||||
/* We failed to malloc during task creation,
|
||||
* system behaviour is undefined. Reset and let
|
||||
|
@ -66,6 +66,12 @@ static int32_t PIOS_MPU6000_GetReg(uint8_t address);
|
||||
|
||||
#define GRAV 9.81f
|
||||
|
||||
#ifdef PIOS_MPU6000_ACCEL
|
||||
#define PIOS_MPU6000_SAMPLES_BYTES 14
|
||||
#else
|
||||
#define PIOS_MPU6000_SAMPLES_BYTES 8
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Allocate a new device
|
||||
*/
|
||||
@ -489,6 +495,62 @@ int32_t PIOS_MPU6000_Test(void)
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reads the contents of the MPU6000 Interrupt Status register from an ISR
|
||||
* @return The register value or -1 on failure to claim the bus
|
||||
*/
|
||||
static int32_t PIOS_MPU6000_GetInterruptStatusRegISR(bool *woken)
|
||||
{
|
||||
/* Interrupt Status register can be read at high SPI clock speed */
|
||||
uint8_t data;
|
||||
|
||||
if (PIOS_MPU6000_ClaimBusISR(woken) != 0) {
|
||||
return -1;
|
||||
}
|
||||
PIOS_SPI_TransferByte(dev->spi_id, (0x80 | PIOS_MPU6000_INT_STATUS_REG));
|
||||
data = PIOS_SPI_TransferByte(dev->spi_id, 0);
|
||||
PIOS_MPU6000_ReleaseBusISR(woken);
|
||||
return data;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Resets the MPU6000 FIFO from an ISR
|
||||
* @param woken[in,out] If non-NULL, will be set to true if woken was false and a higher priority
|
||||
* task has is now eligible to run, else unchanged
|
||||
* @return 0 if operation was successful
|
||||
* @return -1 if unable to claim SPI bus
|
||||
* @return -2 if write to the device failed
|
||||
*/
|
||||
static int32_t PIOS_MPU6000_ResetFifoISR(bool *woken)
|
||||
{
|
||||
int32_t result = 0;
|
||||
|
||||
/* Register writes must be at < 1MHz SPI clock.
|
||||
* Speed can only be changed when SPI bus semaphore is held, but
|
||||
* device chip select must not be enabled, so we use the direct
|
||||
* SPI bus claim call here */
|
||||
if (PIOS_SPI_ClaimBusISR(dev->spi_id, woken) != 0) {
|
||||
return -1;
|
||||
}
|
||||
/* Reduce SPI clock speed. */
|
||||
PIOS_SPI_SetClockSpeed(dev->spi_id, PIOS_SPI_PRESCALER_256);
|
||||
/* Enable chip select */
|
||||
PIOS_SPI_RC_PinSet(dev->spi_id, dev->slave_num, 0);
|
||||
/* Reset FIFO. */
|
||||
if (PIOS_SPI_TransferByte(dev->spi_id, 0x7f & PIOS_MPU6000_USER_CTRL_REG) != 0) {
|
||||
result = -2;
|
||||
} else if (PIOS_SPI_TransferByte(dev->spi_id, (dev->cfg->User_ctl | PIOS_MPU6000_USERCTL_FIFO_RST)) != 0) {
|
||||
result = -2;
|
||||
}
|
||||
/* Disable chip select. */
|
||||
PIOS_SPI_RC_PinSet(dev->spi_id, dev->slave_num, 1);
|
||||
/* Increase SPI clock speed. */
|
||||
PIOS_SPI_SetClockSpeed(dev->spi_id, PIOS_SPI_PRESCALER_16);
|
||||
/* Release the SPI bus semaphore. */
|
||||
PIOS_SPI_ReleaseBusISR(dev->spi_id, woken);
|
||||
return result;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Obtains the number of bytes in the FIFO. Call from ISR only.
|
||||
* @return the number of bytes in the FIFO
|
||||
@ -542,8 +604,29 @@ bool PIOS_MPU6000_IRQHandler(void)
|
||||
return false;
|
||||
}
|
||||
|
||||
/* Temporary fix for OP-1049. Expected to be superceded for next major release
|
||||
* by code changes for OP-1039.
|
||||
* Read interrupt status register to check for FIFO overflow. Must be the
|
||||
* first read after interrupt, in case the device is configured so that
|
||||
* any read clears in the status register (PIOS_MPU6000_INT_CLR_ANYRD set in
|
||||
* interrupt config register) */
|
||||
int32_t result;
|
||||
if ((result = PIOS_MPU6000_GetInterruptStatusRegISR(&woken)) < 0) {
|
||||
return woken;
|
||||
}
|
||||
if (result & PIOS_MPU6000_INT_STATUS_FIFO_OVERFLOW) {
|
||||
/* The FIFO has overflowed, so reset it,
|
||||
* to enable sample sync to be recovered.
|
||||
* If the reset fails, we are in trouble, but
|
||||
* we keep trying on subsequent interrupts. */
|
||||
PIOS_MPU6000_ResetFifoISR(&woken);
|
||||
/* Return and wait for the next new sample. */
|
||||
return woken;
|
||||
}
|
||||
|
||||
/* Usual case - FIFO has not overflowed. */
|
||||
mpu6000_count = PIOS_MPU6000_FifoDepthISR(&woken);
|
||||
if (mpu6000_count < (int32_t)sizeof(struct pios_mpu6000_data)) {
|
||||
if (mpu6000_count < PIOS_MPU6000_SAMPLES_BYTES) {
|
||||
return woken;
|
||||
}
|
||||
|
||||
@ -551,8 +634,8 @@ bool PIOS_MPU6000_IRQHandler(void)
|
||||
return woken;
|
||||
}
|
||||
|
||||
static uint8_t mpu6000_send_buf[1 + sizeof(struct pios_mpu6000_data)] = { PIOS_MPU6000_FIFO_REG | 0x80, 0, 0, 0, 0, 0, 0, 0, 0 };
|
||||
static uint8_t mpu6000_rec_buf[1 + sizeof(struct pios_mpu6000_data)];
|
||||
static uint8_t mpu6000_send_buf[1 + PIOS_MPU6000_SAMPLES_BYTES] = { PIOS_MPU6000_FIFO_REG | 0x80 };
|
||||
static uint8_t mpu6000_rec_buf[1 + PIOS_MPU6000_SAMPLES_BYTES];
|
||||
|
||||
if (PIOS_SPI_TransferBlock(dev->spi_id, &mpu6000_send_buf[0], &mpu6000_rec_buf[0], sizeof(mpu6000_send_buf), NULL) < 0) {
|
||||
PIOS_MPU6000_ReleaseBusISR(&woken);
|
||||
@ -565,7 +648,7 @@ bool PIOS_MPU6000_IRQHandler(void)
|
||||
static struct pios_mpu6000_data data;
|
||||
|
||||
// In the case where extras samples backed up grabbed an extra
|
||||
if (mpu6000_count >= (int32_t)(sizeof(data) * 2)) {
|
||||
if (mpu6000_count >= PIOS_MPU6000_SAMPLES_BYTES * 2) {
|
||||
mpu6000_fifo_backup++;
|
||||
if (PIOS_MPU6000_ClaimBusISR(&woken) != 0) {
|
||||
return woken;
|
||||
|
@ -80,6 +80,7 @@
|
||||
|
||||
/* Interrupt status */
|
||||
#define PIOS_MPU6000_INT_STATUS_FIFO_FULL 0x80
|
||||
#define PIOS_MPU6000_INT_STATUS_FIFO_OVERFLOW 0x10
|
||||
#define PIOS_MPU6000_INT_STATUS_IMU_RDY 0X04
|
||||
#define PIOS_MPU6000_INT_STATUS_DATA_RDY 0X01
|
||||
|
||||
|
@ -127,6 +127,10 @@ void PIOS_Board_Init(void)
|
||||
PIOS_RTC_Init(&pios_rtc_main_cfg);
|
||||
#endif /* PIOS_INCLUDE_RTC */
|
||||
|
||||
#if defined(PIOS_INCLUDE_LED)
|
||||
PIOS_LED_Init(&pios_led_cfg);
|
||||
#endif /* PIOS_INCLUDE_LED */
|
||||
|
||||
/* IAP System Setup */
|
||||
PIOS_IAP_Init();
|
||||
// check for safe mode commands from gcs
|
||||
@ -144,9 +148,6 @@ void PIOS_Board_Init(void)
|
||||
OPLinkStatusInitialize();
|
||||
#endif /* PIOS_INCLUDE_RFM22B */
|
||||
|
||||
#if defined(PIOS_INCLUDE_LED)
|
||||
PIOS_LED_Init(&pios_led_cfg);
|
||||
#endif /* PIOS_INCLUDE_LED */
|
||||
|
||||
#if defined(PIOS_INCLUDE_TIM)
|
||||
/* Set up pulse timers */
|
||||
|
@ -27,7 +27,7 @@ OpenPilot.
|
||||
------------------
|
||||
Fortunately, it requires only few small text files since all others components
|
||||
should already be installed on your system as parts of msysGit, QtSDK and
|
||||
CodeSourcery G++ packages required to build the OpenPilot.
|
||||
Arm compiler packages required to build the OpenPilot.
|
||||
|
||||
It is expected that you have the following tools installed into the listed
|
||||
locations (but any other locations are fine as well):
|
||||
@ -39,8 +39,8 @@ locations (but any other locations are fine as well):
|
||||
- Unicode NSIS in %ProgramFiles%\NSIS\Unicode
|
||||
- OpenOCD in C:\OpenOCD\0.4.0\bin (optional)
|
||||
|
||||
The SDL library and headers should be installed into Qt directories to build
|
||||
the GCS. Check the wiki or ground/openpilotgcs/copydata.pro for details.
|
||||
The SDL and SSL libraries and headers should be installed into Qt directories to
|
||||
build the GCS. Check the wiki or ground/openpilotgcs/copydata.pro for details.
|
||||
|
||||
Also it is assumed that you have the C:\Program Files\Git\cmd\ directory in
|
||||
the PATH. Usually this is the case for msysGit installation if you have chosen
|
||||
|
@ -238,7 +238,7 @@ SectionEnd
|
||||
; Copy driver files
|
||||
Section "-Drivers" InSecDrivers
|
||||
SetOutPath "$INSTDIR\drivers"
|
||||
File "${PROJECT_ROOT}\flight\Project\Windows USB\OpenPilot-CDC.inf"
|
||||
File /r "${PROJECT_ROOT}\flight\Project\Windows USB\*"
|
||||
SectionEnd
|
||||
|
||||
; Preinstall OpenPilot CDC driver
|
||||
|
Loading…
Reference in New Issue
Block a user