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Revert "RFM22b: More block claims for rfm22_txStart"
This reverts commit fa4ca426abf5671fc7d0b7206f85f14bcbf92c3d.
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dce4f36328
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@ -1175,16 +1175,17 @@ uint8_t rfm22_txStart()
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}
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exec_using_spi = true;
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rfm22_claimBus();
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// Initialize the supervisor timer.
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rfm22b_dev_g->supv_timer = PIOS_RFM22B_SUPERVISOR_TIMEOUT;
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// disable interrupts
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rfm22_write_noclaim(RFM22_interrupt_enable1, 0x00);
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rfm22_write_noclaim(RFM22_interrupt_enable2, 0x00);
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rfm22_write(RFM22_interrupt_enable1, 0x00);
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rfm22_write(RFM22_interrupt_enable2, 0x00);
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// TUNE mode
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rfm22_write_noclaim(RFM22_op_and_func_ctrl1, RFM22_opfc1_pllon);
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rfm22_write(RFM22_op_and_func_ctrl1, RFM22_opfc1_pllon);
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// Queue the data up for sending
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memcpy(tx_buffer, tx_pre_buffer, tx_pre_buffer_size);
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tx_data_rd = 0;
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@ -1195,35 +1196,41 @@ uint8_t rfm22_txStart()
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// Set the destination address in the transmit header.
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// The destination address is the first 4 bytes of the message.
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// TODO: Block transfer
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rfm22_write_noclaim(RFM22_transmit_header0, tx_buffer[0]);
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rfm22_write_noclaim(RFM22_transmit_header1, tx_buffer[1]);
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rfm22_write_noclaim(RFM22_transmit_header2, tx_buffer[2]);
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rfm22_write_noclaim(RFM22_transmit_header3, tx_buffer[3]);
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rfm22_write(RFM22_transmit_header0, tx_buffer[0]);
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rfm22_write(RFM22_transmit_header1, tx_buffer[1]);
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rfm22_write(RFM22_transmit_header2, tx_buffer[2]);
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rfm22_write(RFM22_transmit_header3, tx_buffer[3]);
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// FIFO mode, GFSK modulation
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uint8_t fd_bit = rfm22_read_noclaim(RFM22_modulation_mode_control2) & RFM22_mmc2_fd;
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rfm22_write_noclaim(RFM22_modulation_mode_control2, fd_bit | RFM22_mmc2_dtmod_fifo |
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uint8_t fd_bit = rfm22_read(RFM22_modulation_mode_control2) & RFM22_mmc2_fd;
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rfm22_write(RFM22_modulation_mode_control2, fd_bit | RFM22_mmc2_dtmod_fifo |
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RFM22_mmc2_modtyp_gfsk);
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// Set the tx power
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// TODO: Only set the power when it changes and remove this
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rfm22_write_noclaim(RFM22_tx_power, RFM22_tx_pwr_papeaken | RFM22_tx_pwr_papeaklvl_1 |
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// set the tx power
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rfm22_write(RFM22_tx_power, RFM22_tx_pwr_papeaken | RFM22_tx_pwr_papeaklvl_1 |
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RFM22_tx_pwr_papeaklvl_0 | RFM22_tx_pwr_lna_sw | tx_power);
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// clear FIFOs
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rfm22_write_noclaim(RFM22_op_and_func_ctrl2, RFM22_opfc2_ffclrrx | RFM22_opfc2_ffclrtx);
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rfm22_write_noclaim(RFM22_op_and_func_ctrl2, 0x00);
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rfm22_write(RFM22_op_and_func_ctrl2, RFM22_opfc2_ffclrrx | RFM22_opfc2_ffclrtx);
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rfm22_write(RFM22_op_and_func_ctrl2, 0x00);
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// *******************
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// add some data to the chips TX FIFO before enabling the transmitter
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// set the total number of data bytes we are going to transmit
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rfm22_write(RFM22_transmit_packet_length, tx_data_wr);
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// add some data
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rfm22_claimBus();
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PIOS_SPI_TransferByte(PIOS_RFM22_SPI_PORT, RFM22_fifo_access | 0x80);
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int bytes_to_write = (tx_data_wr - tx_data_rd);
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bytes_to_write = (bytes_to_write > FIFO_SIZE) ? FIFO_SIZE: bytes_to_write;
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rfm22_write_noclaim(RFM22_transmit_packet_length, bytes_to_write);
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PIOS_SPI_RC_PinSet(PIOS_RFM22_SPI_PORT, 0, 0);
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PIOS_SPI_TransferByte(PIOS_RFM22_SPI_PORT, RFM22_fifo_access | 0x80);
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tx_data_rd +=PIOS_SPI_TransferBlock(PIOS_RFM22_SPI_PORT, &tx_buffer[tx_data_rd], NULL, bytes_to_write, NULL);
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PIOS_SPI_RC_PinSet(PIOS_RFM22_SPI_PORT, 0, 1);
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PIOS_SPI_TransferBlock(PIOS_RFM22_SPI_PORT, &tx_buffer[tx_data_rd], NULL, bytes_to_write, NULL);
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tx_data_rd += bytes_to_write;
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rfm22_releaseBus();
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// *******************
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// reset the timer
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rfm22_int_timer = 0;
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@ -1231,15 +1238,14 @@ uint8_t rfm22_txStart()
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rf_mode = TX_DATA_MODE;
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// enable TX interrupts
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rfm22_write_noclaim(RFM22_interrupt_enable1, RFM22_ie1_enpksent | RFM22_ie1_entxffaem);
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rfm22_write(RFM22_interrupt_enable1, RFM22_ie1_enpksent | RFM22_ie1_entxffaem);
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// enable the transmitter
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rfm22_write_noclaim(RFM22_op_and_func_ctrl1, RFM22_opfc1_pllon | RFM22_opfc1_txon);
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rfm22_write(RFM22_op_and_func_ctrl1, RFM22_opfc1_pllon | RFM22_opfc1_txon);
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TX_LED_ON;
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rfm22_releaseBus();
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exec_using_spi = false;
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return 1;
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}
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@ -1333,7 +1339,6 @@ static void rfm22_setTxMode(uint8_t mode)
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rfm22_write_noclaim(RFM22_op_and_func_ctrl1, RFM22_opfc1_pllon | RFM22_opfc1_txon);
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rfm22_releaseBus();
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TX_LED_ON;
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}
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