From 0efb24a54bd120104e12db77928a7fa4fcb5295e Mon Sep 17 00:00:00 2001 From: Michael Hope Date: Fri, 22 Jun 2012 20:22:43 +1200 Subject: [PATCH] The destination register of an exclusive store must be different from both the value and address register. Fix building with recent binutils by marking the result as early clobber. --- flight/PiOS/STM32F10x/Libraries/CMSIS/Core/CM3/core_cm3.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/flight/PiOS/STM32F10x/Libraries/CMSIS/Core/CM3/core_cm3.c b/flight/PiOS/STM32F10x/Libraries/CMSIS/Core/CM3/core_cm3.c index 56fddc52b..0e8c3c43c 100755 --- a/flight/PiOS/STM32F10x/Libraries/CMSIS/Core/CM3/core_cm3.c +++ b/flight/PiOS/STM32F10x/Libraries/CMSIS/Core/CM3/core_cm3.c @@ -733,7 +733,7 @@ uint32_t __STREXB(uint8_t value, uint8_t *addr) { uint32_t result=0; - __ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); + __ASM volatile ("strexb %0, %2, [%1]" : "=&r" (result) : "r" (addr), "r" (value) ); return(result); } @@ -750,7 +750,7 @@ uint32_t __STREXH(uint16_t value, uint16_t *addr) { uint32_t result=0; - __ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); + __ASM volatile ("strexh %0, %2, [%1]" : "=&r" (result) : "r" (addr), "r" (value) ); return(result); }