From 11471ff68b07402e6e01e906fc86a847ef952217 Mon Sep 17 00:00:00 2001 From: James Cotton Date: Mon, 23 Jan 2012 23:29:17 -0600 Subject: [PATCH] Update drivers for CC to the new EXTI system and SPI calls --- flight/CopterControl/Makefile | 2 +- flight/CopterControl/System/pios_board.c | 235 ++++++++++++----------- flight/Modules/Attitude/attitude.c | 4 - flight/PiOS/Common/pios_adxl345.c | 231 ++++++++++++++++++---- flight/PiOS/Common/pios_l3gd20.c | 30 +-- flight/PiOS/inc/pios_adxl345.h | 10 +- flight/Revolution/System/pios_board.c | 1 + 7 files changed, 324 insertions(+), 189 deletions(-) diff --git a/flight/CopterControl/Makefile b/flight/CopterControl/Makefile index 24bc566c9..ece021e1d 100644 --- a/flight/CopterControl/Makefile +++ b/flight/CopterControl/Makefile @@ -225,7 +225,7 @@ SRC += $(PIOSCOMMON)/pios_crc.c SRC += $(PIOSCOMMON)/pios_flashfs_objlist.c SRC += $(PIOSCOMMON)/pios_flash_w25x.c SRC += $(PIOSCOMMON)/pios_adxl345.c -SRC += $(PIOSSTM32F10X)/pios_l3gd20.c +SRC += $(PIOSCOMMON)/pios_l3gd20.c SRC += $(PIOSCOMMON)/pios_com.c SRC += $(PIOSCOMMON)/pios_i2c_esc.c SRC += $(PIOSCOMMON)/pios_bmp085.c diff --git a/flight/CopterControl/System/pios_board.c b/flight/CopterControl/System/pios_board.c index c7aa99bba..3ecfb53d4 100644 --- a/flight/CopterControl/System/pios_board.c +++ b/flight/CopterControl/System/pios_board.c @@ -97,14 +97,6 @@ static const struct pios_spi_cfg pios_spi_gyro_cfg = { }, }, }, - .ssel = { - .gpio = GPIOA, - .init = { - .GPIO_Pin = GPIO_Pin_4, - .GPIO_Speed = GPIO_Speed_50MHz, - .GPIO_Mode = GPIO_Mode_Out_PP, - }, - }, .sclk = { .gpio = GPIOA, .init = { @@ -129,6 +121,14 @@ static const struct pios_spi_cfg pios_spi_gyro_cfg = { .GPIO_Mode = GPIO_Mode_AF_PP, }, }, + .ssel = {{ + .gpio = GPIOA, + .init = { + .GPIO_Pin = GPIO_Pin_4, + .GPIO_Speed = GPIO_Speed_50MHz, + .GPIO_Mode = GPIO_Mode_Out_PP, + }, + }}, }; static uint32_t pios_spi_gyro_id; @@ -148,93 +148,99 @@ void PIOS_SPI_flash_accel_irq_handler(void); void DMA1_Channel4_IRQHandler() __attribute__ ((alias ("PIOS_SPI_flash_accel_irq_handler"))); void DMA1_Channel5_IRQHandler() __attribute__ ((alias ("PIOS_SPI_flash_accel_irq_handler"))); static const struct pios_spi_cfg pios_spi_flash_accel_cfg = { - .regs = SPI2, - .init = { - .SPI_Mode = SPI_Mode_Master, - .SPI_Direction = SPI_Direction_2Lines_FullDuplex, - .SPI_DataSize = SPI_DataSize_8b, - .SPI_NSS = SPI_NSS_Soft, - .SPI_FirstBit = SPI_FirstBit_MSB, - .SPI_CRCPolynomial = 7, - .SPI_CPOL = SPI_CPOL_High, - .SPI_CPHA = SPI_CPHA_2Edge, - .SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2, - }, - .use_crc = FALSE, - .dma = { - .ahb_clk = RCC_AHBPeriph_DMA1, - - .irq = { - .flags = (DMA1_FLAG_TC4 | DMA1_FLAG_TE4 | DMA1_FLAG_HT4 | DMA1_FLAG_GL4), - .init = { - .NVIC_IRQChannel = DMA1_Channel4_IRQn, - .NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGH, - .NVIC_IRQChannelSubPriority = 0, - .NVIC_IRQChannelCmd = ENABLE, - }, - }, - - .rx = { - .channel = DMA1_Channel4, - .init = { - .DMA_PeripheralBaseAddr = (uint32_t)&(SPI2->DR), - .DMA_DIR = DMA_DIR_PeripheralSRC, - .DMA_PeripheralInc = DMA_PeripheralInc_Disable, - .DMA_MemoryInc = DMA_MemoryInc_Enable, - .DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte, - .DMA_MemoryDataSize = DMA_MemoryDataSize_Byte, - .DMA_Mode = DMA_Mode_Normal, - .DMA_Priority = DMA_Priority_High, - .DMA_M2M = DMA_M2M_Disable, - }, - }, - .tx = { - .channel = DMA1_Channel5, - .init = { - .DMA_PeripheralBaseAddr = (uint32_t)&(SPI2->DR), - .DMA_DIR = DMA_DIR_PeripheralDST, - .DMA_PeripheralInc = DMA_PeripheralInc_Disable, - .DMA_MemoryInc = DMA_MemoryInc_Enable, - .DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte, - .DMA_MemoryDataSize = DMA_MemoryDataSize_Byte, - .DMA_Mode = DMA_Mode_Normal, - .DMA_Priority = DMA_Priority_High, - .DMA_M2M = DMA_M2M_Disable, - }, - }, - }, - .ssel = { - .gpio = GPIOB, - .init = { - .GPIO_Pin = GPIO_Pin_12, - .GPIO_Speed = GPIO_Speed_10MHz, - .GPIO_Mode = GPIO_Mode_Out_PP, - }, - }, - .sclk = { - .gpio = GPIOB, - .init = { - .GPIO_Pin = GPIO_Pin_13, - .GPIO_Speed = GPIO_Speed_10MHz, - .GPIO_Mode = GPIO_Mode_AF_PP, - }, - }, - .miso = { - .gpio = GPIOB, - .init = { - .GPIO_Pin = GPIO_Pin_14, - .GPIO_Speed = GPIO_Speed_10MHz, - .GPIO_Mode = GPIO_Mode_IN_FLOATING, - }, - }, - .mosi = { - .gpio = GPIOB, - .init = { - .GPIO_Pin = GPIO_Pin_15, - .GPIO_Speed = GPIO_Speed_10MHz, - .GPIO_Mode = GPIO_Mode_AF_PP, - }, - }, + .regs = SPI2, + .init = { + .SPI_Mode = SPI_Mode_Master, + .SPI_Direction = SPI_Direction_2Lines_FullDuplex, + .SPI_DataSize = SPI_DataSize_8b, + .SPI_NSS = SPI_NSS_Soft, + .SPI_FirstBit = SPI_FirstBit_MSB, + .SPI_CRCPolynomial = 7, + .SPI_CPOL = SPI_CPOL_High, + .SPI_CPHA = SPI_CPHA_2Edge, + .SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2, + }, + .use_crc = FALSE, + .dma = { + .ahb_clk = RCC_AHBPeriph_DMA1, + + .irq = { + .flags = (DMA1_FLAG_TC4 | DMA1_FLAG_TE4 | DMA1_FLAG_HT4 | DMA1_FLAG_GL4), + .init = { + .NVIC_IRQChannel = DMA1_Channel4_IRQn, + .NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGH, + .NVIC_IRQChannelSubPriority = 0, + .NVIC_IRQChannelCmd = ENABLE, + }, + }, + + .rx = { + .channel = DMA1_Channel4, + .init = { + .DMA_PeripheralBaseAddr = (uint32_t)&(SPI2->DR), + .DMA_DIR = DMA_DIR_PeripheralSRC, + .DMA_PeripheralInc = DMA_PeripheralInc_Disable, + .DMA_MemoryInc = DMA_MemoryInc_Enable, + .DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte, + .DMA_MemoryDataSize = DMA_MemoryDataSize_Byte, + .DMA_Mode = DMA_Mode_Normal, + .DMA_Priority = DMA_Priority_High, + .DMA_M2M = DMA_M2M_Disable, + }, + }, + .tx = { + .channel = DMA1_Channel5, + .init = { + .DMA_PeripheralBaseAddr = (uint32_t)&(SPI2->DR), + .DMA_DIR = DMA_DIR_PeripheralDST, + .DMA_PeripheralInc = DMA_PeripheralInc_Disable, + .DMA_MemoryInc = DMA_MemoryInc_Enable, + .DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte, + .DMA_MemoryDataSize = DMA_MemoryDataSize_Byte, + .DMA_Mode = DMA_Mode_Normal, + .DMA_Priority = DMA_Priority_High, + .DMA_M2M = DMA_M2M_Disable, + }, + }, + }, + .sclk = { + .gpio = GPIOB, + .init = { + .GPIO_Pin = GPIO_Pin_13, + .GPIO_Speed = GPIO_Speed_10MHz, + .GPIO_Mode = GPIO_Mode_AF_PP, + }, + }, + .miso = { + .gpio = GPIOB, + .init = { + .GPIO_Pin = GPIO_Pin_14, + .GPIO_Speed = GPIO_Speed_10MHz, + .GPIO_Mode = GPIO_Mode_IN_FLOATING, + }, + }, + .mosi = { + .gpio = GPIOB, + .init = { + .GPIO_Pin = GPIO_Pin_15, + .GPIO_Speed = GPIO_Speed_10MHz, + .GPIO_Mode = GPIO_Mode_AF_PP, + }, + }, + .ssel = {{ + .gpio = GPIOA, + .init = { + .GPIO_Pin = GPIO_Pin_4, + .GPIO_Speed = GPIO_Speed_50MHz, + .GPIO_Mode = GPIO_Mode_Out_PP, + }},{ + .gpio = GPIOA, + .init = { + .GPIO_Pin = GPIO_Pin_7, + .GPIO_Speed = GPIO_Speed_50MHz, + .GPIO_Mode = GPIO_Mode_Out_PP, + }, + }}, }; static uint32_t pios_spi_flash_accel_id; @@ -1135,9 +1141,15 @@ uint32_t pios_com_vcp_id; uint32_t pios_com_gps_id; uint32_t pios_com_bridge_id; +/** + * Configuration for L3GD20 chip + */ +#if defined(PIOS_INCLUDE_L3GD20) #include "pios_l3gd20.h" -static const struct pios_l3gd20_cfg pios_l3gd20_cfg = { - .drdy = { +static const struct pios_exti_cfg pios_exti_l3gd20_cfg __exti_config = { + .vector = PIOS_L3GD20_IRQHandler, + .line = EXTI_Line3, + .pin = { .gpio = GPIOA, .init = { .GPIO_Pin = GPIO_Pin_3, @@ -1145,17 +1157,7 @@ static const struct pios_l3gd20_cfg pios_l3gd20_cfg = { .GPIO_Mode = GPIO_Mode_IPU, }, }, - .eoc_exti = { - .pin_source = GPIO_PinSource3, - .port_source = GPIO_PortSourceGPIOA, - .init = { - .EXTI_Line = EXTI_Line3, // matches above GPIO pin - .EXTI_Mode = EXTI_Mode_Interrupt, - .EXTI_Trigger = EXTI_Trigger_Rising, - .EXTI_LineCmd = ENABLE, - }, - }, - .eoc_irq = { + .irq = { .init = { .NVIC_IRQChannel = EXTI3_IRQn, .NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGH, @@ -1163,8 +1165,21 @@ static const struct pios_l3gd20_cfg pios_l3gd20_cfg = { .NVIC_IRQChannelCmd = ENABLE, }, }, + .exti = { + .init = { + .EXTI_Line = EXTI_Line3, // matches above GPIO pin + .EXTI_Mode = EXTI_Mode_Interrupt, + .EXTI_Trigger = EXTI_Trigger_Rising, + .EXTI_LineCmd = ENABLE, + }, + }, +}; + +static const struct pios_l3gd20_cfg pios_l3gd20_cfg = { + .exti_cfg = &pios_exti_l3gd20_cfg, .gyro_range = PIOS_L3GD20_SCALE_500_DEG, }; +#endif /* PIOS_INCLUDE_L3GD20 */ #include @@ -1183,8 +1198,8 @@ void PIOS_Board_Init(void) { PIOS_Assert(0); } - PIOS_Flash_W25X_Init(pios_spi_flash_accel_id); - PIOS_ADXL345_Attach(pios_spi_flash_accel_id); + PIOS_Flash_W25X_Init(pios_spi_flash_accel_id, 1); + PIOS_ADXL345_Init(pios_spi_flash_accel_id, 0); PIOS_FLASHFS_Init(); diff --git a/flight/Modules/Attitude/attitude.c b/flight/Modules/Attitude/attitude.c index e349f5301..ab61cc9f1 100644 --- a/flight/Modules/Attitude/attitude.c +++ b/flight/Modules/Attitude/attitude.c @@ -178,10 +178,6 @@ static void AttitudeTask(void *parameters) PIOS_ADC_Config((PIOS_ADC_RATE / 1000.0f) * UPDATE_RATE); - // Keep flash CS pin high while talking accel - PIOS_FLASH_DISABLE; - PIOS_ADXL345_Init(); - // Set critical error and wait until the accel is producing data while(PIOS_ADXL345_FifoElements() == 0) { AlarmsSet(SYSTEMALARMS_ALARM_ATTITUDE, SYSTEMALARMS_ALARM_CRITICAL); diff --git a/flight/PiOS/Common/pios_adxl345.c b/flight/PiOS/Common/pios_adxl345.c index 91fb3f91f..17a34377c 100644 --- a/flight/PiOS/Common/pios_adxl345.c +++ b/flight/PiOS/Common/pios_adxl345.c @@ -1,32 +1,116 @@ +/** + ****************************************************************************** + * @addtogroup PIOS PIOS Core hardware abstraction layer + * @{ + * @addtogroup PIOS_ADXL345 ADXL345 Functions + * @brief Deals with the hardware interface to the BMA180 3-axis accelerometer + * @{ + * + * @file pios_adxl345.h + * @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2012. + * @brief PiOS ADXL345 digital accelerometer driver. + * @see The GNU Public License (GPL) Version 3 + * + *****************************************************************************/ /* - * pios_adxl345.c - * OpenPilotOSX + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 3 of the License, or + * (at your option) any later version. * - * Created by James Cotton on 1/16/11. - * Copyright 2011 OpenPilot. All rights reserved. + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #include "pios.h" -static uint32_t PIOS_SPI_ACCEL; +enum pios_adxl345_dev_magic { + PIOS_ADXL345_DEV_MAGIC = 0xcb55aa55, +}; + +struct adxl345_dev { + uint32_t spi_id; + uint32_t slave_num; + enum pios_adxl345_dev_magic magic; +}; + +//! Global structure for this device device +static struct adxl345_dev * dev; + +//! Private functions +static struct adxl345_dev * PIOS_ADXL345_alloc(void); +static int32_t PIOS_ADXL345_Validate(struct adxl345_dev * dev); +static int32_t PIOS_ADXL345_ClaimBus(); +static int32_t PIOS_ADXL345_ReleaseBus(); +static int32_t PIOS_ADXL345_FifoDepth(uint8_t depth); + +/** + * @brief Allocate a new device + */ +static struct adxl345_dev * PIOS_ADXL345_alloc(void) +{ + struct adxl345_dev * adxl345_dev; + + adxl345_dev = (struct adxl345_dev *)pvPortMalloc(sizeof(*adxl345_dev)); + if (!adxl345_dev) return (NULL); + + adxl345_dev->magic = PIOS_ADXL345_DEV_MAGIC; + return(adxl345_dev); +} + +/** + * @brief Validate the handle to the spi device + * @returns 0 for valid device or -1 otherwise + */ +static int32_t PIOS_ADXL345_Validate(struct adxl345_dev * dev) +{ + if (dev == NULL) + return -1; + if (dev->magic != PIOS_ADXL345_DEV_MAGIC) + return -2; + if (dev->spi_id == 0) + return -3; + return 0; +} /** * @brief Claim the SPI bus for the accel communications and select this chip + * @return 0 for succesful claiming of bus or -1 otherwise */ -void PIOS_ADXL345_ClaimBus() +static int32_t PIOS_ADXL345_ClaimBus() { - PIOS_SPI_ClaimBus(PIOS_SPI_ACCEL); - PIOS_ADXL_ENABLE; + if(PIOS_ADXL345_Validate(dev) != 0) + return -1; + + if(PIOS_SPI_ClaimBus(dev->spi_id) != 0) + return -2; + + PIOS_SPI_RC_PinSet(dev->spi_id, dev->slave_num, 0); + + return 0; } /** * @brief Release the SPI bus for the accel communications and end the transaction + * @return 0 if success or <0 for failure */ -void PIOS_ADXL345_ReleaseBus() +static int32_t PIOS_ADXL345_ReleaseBus() { - PIOS_ADXL_DISABLE; - PIOS_SPI_ReleaseBus(PIOS_SPI_ACCEL); + if(PIOS_ADXL345_Validate(dev) != 0) + return -1; + + PIOS_SPI_RC_PinSet(dev->spi_id, dev->slave_num, 1); + + if(PIOS_SPI_ReleaseBus(dev->spi_id) != 0) + return -2; + + return 0; } /** @@ -34,80 +118,134 @@ void PIOS_ADXL345_ReleaseBus() * * This also puts it into high power mode */ -void PIOS_ADXL345_SelectRate(uint8_t rate) +int32_t PIOS_ADXL345_SelectRate(uint8_t rate) { + if(PIOS_ADXL345_Validate(dev) != 0) + return -1; + + if(PIOS_ADXL345_ClaimBus() != 0) + return -2; + uint8_t out[2] = {ADXL_RATE_ADDR, rate & 0x0F}; - PIOS_ADXL345_ClaimBus(); - PIOS_SPI_TransferBlock(PIOS_SPI_ACCEL,out,NULL,sizeof(out),NULL); - PIOS_ADXL345_ReleaseBus(); + if(PIOS_SPI_TransferBlock(dev->spi_id,out,NULL,sizeof(out),NULL) < 0) { + PIOS_ADXL345_ReleaseBus(); + return -3; + } + + PIOS_ADXL345_ReleaseBus(); + + return 0; } /** * @brief Set the range of the accelerometer and set the data to be right justified * with sign extension. Also keep device in 4 wire mode. */ -void PIOS_ADXL345_SetRange(uint8_t range) +int32_t PIOS_ADXL345_SetRange(uint8_t range) { + if(PIOS_ADXL345_Validate(dev) != 0) + return -1; + + if(PIOS_ADXL345_ClaimBus() != 0) + return -2; + uint8_t out[2] = {ADXL_FORMAT_ADDR, (range & 0x03) | ADXL_FULL_RES | ADXL_4WIRE}; - PIOS_ADXL345_ClaimBus(); - PIOS_SPI_TransferBlock(PIOS_SPI_ACCEL,out,NULL,sizeof(out),NULL); - PIOS_ADXL345_ReleaseBus(); + if(PIOS_SPI_TransferBlock(dev->spi_id,out,NULL,sizeof(out),NULL) < 0) { + PIOS_ADXL345_ReleaseBus(); + return -3; + } + + PIOS_ADXL345_ReleaseBus(); + + return 0; } /** * @brief Set the fifo depth that triggers an interrupt. This will be matched to the oversampling */ -void PIOS_ADXL345_FifoDepth(uint8_t depth) +static int32_t PIOS_ADXL345_FifoDepth(uint8_t depth) { + if(PIOS_ADXL345_Validate(dev) != 0) + return -1; + + if(PIOS_ADXL345_ClaimBus() != 0) + return -2; + uint8_t out[2] = {ADXL_FIFO_ADDR, (depth & 0x1f) | ADXL_FIFO_STREAM}; - PIOS_ADXL345_ClaimBus(); - PIOS_SPI_TransferBlock(PIOS_SPI_ACCEL,out,NULL,sizeof(out),NULL); - PIOS_ADXL345_ReleaseBus(); + if(PIOS_SPI_TransferBlock(dev->spi_id,out,NULL,sizeof(out),NULL) < 0) { + PIOS_ADXL345_ReleaseBus(); + return -3; + } + + PIOS_ADXL345_ReleaseBus(); + + return 0; } /** * @brief Enable measuring. This also disables the activity sensors (tap or free fall) */ -void PIOS_ADXL345_SetMeasure(uint8_t enable) +static int32_t PIOS_ADXL345_SetMeasure(uint8_t enable) { + if(PIOS_ADXL345_Validate(dev) != 0) + return -1; + + if(PIOS_ADXL345_ClaimBus() != 0) + return -2; + uint8_t out[2] = {ADXL_POWER_ADDR, ADXL_MEAURE}; - PIOS_ADXL345_ClaimBus(); - PIOS_SPI_TransferBlock(PIOS_SPI_ACCEL,out,NULL,sizeof(out),NULL); - PIOS_ADXL345_ReleaseBus(); -} + if(PIOS_SPI_TransferBlock(dev->spi_id,out,NULL,sizeof(out),NULL) < 0) { + PIOS_ADXL345_ReleaseBus(); + return -3; + } -/** - * @brief Connect to the correct SPI bus - */ -void PIOS_ADXL345_Attach(uint32_t spi_id) -{ - PIOS_SPI_ACCEL = spi_id; + PIOS_ADXL345_ReleaseBus(); + + return 0; } /** * @brief Initialize with good default settings */ -void PIOS_ADXL345_Init() +int32_t PIOS_ADXL345_Init(uint32_t spi_id, uint32_t slave_num) { + dev = PIOS_ADXL345_alloc(); + if(dev == NULL) + return -1; + + dev->spi_id = spi_id; + dev->slave_num = slave_num; + PIOS_ADXL345_ReleaseBus(); PIOS_ADXL345_SelectRate(ADXL_RATE_3200); PIOS_ADXL345_SetRange(ADXL_RANGE_8G); PIOS_ADXL345_FifoDepth(16); - PIOS_ADXL345_SetMeasure(1); + PIOS_ADXL345_SetMeasure(1); + + return 0; } /** * @brief Return number of entries in the fifo */ -uint8_t PIOS_ADXL345_FifoElements() +int32_t PIOS_ADXL345_FifoElements() { + if(PIOS_ADXL345_Validate(dev) != 0) + return -1; + + if(PIOS_ADXL345_ClaimBus() != 0) + return -2; + uint8_t buf[2] = {0,0}; uint8_t rec[2] = {0,0}; buf[0] = ADXL_FIFOSTATUS_ADDR | ADXL_READ_BIT ; // Read fifo status - PIOS_ADXL345_ClaimBus(); - PIOS_SPI_TransferBlock(PIOS_SPI_ACCEL,&buf[0],&rec[0],sizeof(buf),NULL); - PIOS_ADXL345_ReleaseBus(); + if(PIOS_SPI_TransferBlock(dev->spi_id,&buf[0],&rec[0],sizeof(buf),NULL) < 0) { + PIOS_ADXL345_ReleaseBus(); + return -3; + } + + PIOS_ADXL345_ReleaseBus(); return rec[1] & 0x3f; } @@ -118,14 +256,23 @@ uint8_t PIOS_ADXL345_FifoElements() */ uint8_t PIOS_ADXL345_Read(struct pios_adxl345_data * data) { + if(PIOS_ADXL345_Validate(dev) != 0) + return -1; + + if(PIOS_ADXL345_ClaimBus() != 0) + return -2; + // To save memory use same buffer for in and out but offset by // a byte uint8_t buf[9] = {0,0,0,0,0,0,0,0}; uint8_t rec[9] = {0,0,0,0,0,0,0,0}; buf[0] = ADXL_X0_ADDR | ADXL_MULTI_BIT | ADXL_READ_BIT ; // Multibyte read starting at X0 - PIOS_ADXL345_ClaimBus(); - PIOS_SPI_TransferBlock(PIOS_SPI_ACCEL,&buf[0],&rec[0],9,NULL); + if(PIOS_SPI_TransferBlock(dev->spi_id,&buf[0],&rec[0],9,NULL) < 0) { + PIOS_ADXL345_ReleaseBus(); + return -3; + } + PIOS_ADXL345_ReleaseBus(); data->x = rec[1] + (rec[2] << 8); diff --git a/flight/PiOS/Common/pios_l3gd20.c b/flight/PiOS/Common/pios_l3gd20.c index daf3607cf..7dc62c905 100644 --- a/flight/PiOS/Common/pios_l3gd20.c +++ b/flight/PiOS/Common/pios_l3gd20.c @@ -34,6 +34,8 @@ #if defined(PIOS_INCLUDE_L3GD20) +#include "fifo_buffer.h" + /* Global Variables */ uint32_t pios_spi_gyro; @@ -64,9 +66,9 @@ void PIOS_L3GD20_Init(const struct pios_l3gd20_cfg * new_cfg) fifoBuf_init(&pios_l3gd20_fifo, (uint8_t *) pios_l3gd20_buffer, sizeof(pios_l3gd20_buffer)); /* Configure the MPU6050 Sensor */ - PIOS_SPI_SetPrescalar(pios_spi_gyro, SPI_BaudRatePrescaler_256); + PIOS_SPI_SetClockSpeed(pios_spi_gyro, SPI_BaudRatePrescaler_256); PIOS_L3GD20_Config(cfg); - PIOS_SPI_SetPrescalar(pios_spi_gyro, SPI_BaudRatePrescaler_16); + PIOS_SPI_SetClockSpeed(pios_spi_gyro, SPI_BaudRatePrescaler_16); /* Set up EXTI */ PIOS_EXTI_Init(new_cfg->exti_cfg); @@ -279,30 +281,6 @@ uint8_t PIOS_L3GD20_Test(void) return -2; } -/** - * @brief Run self-test operation. - * \return 0 if test succeeded - * \return non-zero value if test succeeded - */ -static int32_t PIOS_L3GD20_FifoDepth(void) -{ -/* uint8_t l3gd20_send_buf[3] = {PIOS_L3GD20_FIFO_CNT_MSB | 0x80, 0, 0}; - uint8_t l3gd20_rec_buf[3]; - - if(PIOS_L3GD20_ClaimBus() != 0) - return -1; - - if(PIOS_SPI_TransferBlock(pios_spi_gyro, &l3gd20_send_buf[0], &l3gd20_rec_buf[0], sizeof(l3gd20_send_buf), NULL) < 0) { - PIOS_L3GD20_ReleaseBus(); - return -1; - } - - PIOS_L3GD20_ReleaseBus(); - - return (l3gd20_rec_buf[1] << 8) | l3gd20_rec_buf[2];*/ - return 0; -} - /** * @brief IRQ Handler. Read all the data from onboard buffer */ diff --git a/flight/PiOS/inc/pios_adxl345.h b/flight/PiOS/inc/pios_adxl345.h index 19baf4be6..a618083b2 100644 --- a/flight/PiOS/inc/pios_adxl345.h +++ b/flight/PiOS/inc/pios_adxl345.h @@ -66,13 +66,11 @@ struct pios_adxl345_data { int16_t z; }; -void PIOS_ADXL345_SelectRate(uint8_t rate); -void PIOS_ADXL345_SetRange(uint8_t range); -void PIOS_ADXL345_FifoDepth(uint8_t depth); -void PIOS_ADXL345_Attach(uint32_t spi_id); -void PIOS_ADXL345_Init(); +int32_t PIOS_ADXL345_SelectRate(uint8_t rate); +int32_t PIOS_ADXL345_SetRange(uint8_t range); +int32_t PIOS_ADXL345_Init(uint32_t spi_id, uint32_t slave_num); uint8_t PIOS_ADXL345_Read(struct pios_adxl345_data * data); -uint8_t PIOS_ADXL345_FifoElements(); +int32_t PIOS_ADXL345_FifoElements(); #endif diff --git a/flight/Revolution/System/pios_board.c b/flight/Revolution/System/pios_board.c index d49b92296..32a17e938 100644 --- a/flight/Revolution/System/pios_board.c +++ b/flight/Revolution/System/pios_board.c @@ -1536,6 +1536,7 @@ static const struct pios_mpu6000_cfg pios_mpu6000_cfg = { .filter = PIOS_MPU6000_LOWPASS_256_HZ }; #endif /* PIOS_INCLUDE_MPU6000 */ + /** * Configuration for L3GD20 chip */