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mirror of https://bitbucket.org/librepilot/librepilot.git synced 2025-01-18 03:52:11 +01:00

OP-1312 fix copy/paste-naming issue

This commit is contained in:
Alessio Morale 2014-05-03 11:45:30 +02:00
parent 3897106f4d
commit 19caa57dc6
3 changed files with 13 additions and 12 deletions

View File

@ -46,11 +46,11 @@
#define PIOS_WS2811_DMA_CH1_CONFIG(channel) \
{ \
.DMA_BufferSize = 4, \
.DMA_BufferSize = PIOS_WS2811_BUFFER_SIZE, \
.DMA_Channel = channel, \
.DMA_DIR = DMA_DIR_MemoryToPeripheral, \
.DMA_FIFOMode = DMA_FIFOMode_Enable, \
.DMA_FIFOThreshold = DMA_FIFOThreshold_Full, \
.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull, \
.DMA_Memory0BaseAddr = 0, \
.DMA_MemoryBurst = DMA_MemoryBurst_INC4, \
.DMA_MemoryDataSize = PIOS_WS2811_MEMORYDATASIZE, \
@ -78,15 +78,15 @@
.DMA_PeripheralBurst = DMA_PeripheralBurst_Single, \
.DMA_PeripheralDataSize = PIOS_WS2811_PERIPHERALDATASIZE, \
.DMA_PeripheralInc = DMA_PeripheralInc_Disable, \
.DMA_Priority = DMA_Priority_High }
.DMA_Priority = DMA_Priority_VeryHigh, }
#define PIOS_WS2811_DMA_UPDATE_CONFIG(channel) \
{ \
.DMA_BufferSize = PIOS_WS2811_BUFFER_SIZE, \
.DMA_BufferSize = 4, \
.DMA_Channel = channel, \
.DMA_DIR = DMA_DIR_MemoryToPeripheral, \
.DMA_FIFOMode = DMA_FIFOMode_Enable, \
.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull, \
.DMA_FIFOThreshold = DMA_FIFOThreshold_Full, \
.DMA_Memory0BaseAddr = 0, \
.DMA_MemoryBurst = DMA_MemoryBurst_INC4, \
.DMA_MemoryDataSize = PIOS_WS2811_MEMORYDATASIZE, \
@ -96,7 +96,8 @@
.DMA_PeripheralBurst = DMA_PeripheralBurst_Single, \
.DMA_PeripheralDataSize = PIOS_WS2811_PERIPHERALDATASIZE, \
.DMA_PeripheralInc = DMA_PeripheralInc_Disable, \
.DMA_Priority = DMA_Priority_VeryHigh, }
.DMA_Priority = DMA_Priority_High }
typedef uint16_t ledbuf_t;

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@ -1845,17 +1845,17 @@ const struct pios_ws2811_cfg pios_ws2811_cfg = {
// DMA streamCh1, triggered by timerCh1 pwm signal.
// if FrameBuffer indicates, reset output value early to indicate "0" bit to ws2812
.dmaInitCh1 = PIOS_WS2811_DMA_UPDATE_CONFIG(DMA_Channel_6),
.dmaInitCh1 = PIOS_WS2811_DMA_CH1_CONFIG(DMA_Channel_6),
.dmaItCh1 = DMA_IT_TEIF1 | DMA_IT_TCIF1,
// DMA streamCh2, triggered by timerCh2 pwm signal.
// Reset output value late to indicate "1" bit to ws2812.
.dmaInitCh2 = PIOS_WS2811_DMA_CH1_CONFIG(DMA_Channel_6),
.dmaInitCh2 = PIOS_WS2811_DMA_CH2_CONFIG(DMA_Channel_6),
.dmaItCh2 = DMA_IT_TEIF6 | DMA_IT_TCIF6,
// DMA streamUpdate Triggered by timer update event
// Outputs a high logic level at beginning of a cycle
.dmaInitUpdate = PIOS_WS2811_DMA_CH2_CONFIG(DMA_Channel_6),
.dmaInitUpdate = PIOS_WS2811_DMA_UPDATE_CONFIG(DMA_Channel_6),
.dmaItUpdate = DMA_IT_TEIF5 | DMA_IT_TCIF5,
.dmaSource = TIM_DMA_CC1 | TIM_DMA_CC3 | TIM_DMA_Update,

View File

@ -2066,17 +2066,17 @@ const struct pios_ws2811_cfg pios_ws2811_cfg = {
// DMA streamCh1, triggered by timerCh1 pwm signal.
// if FrameBuffer indicates, reset output value early to indicate "0" bit to ws2812
.dmaInitCh1 = PIOS_WS2811_DMA_UPDATE_CONFIG(DMA_Channel_6),
.dmaInitCh1 = PIOS_WS2811_DMA_CH1_CONFIG(DMA_Channel_6),
.dmaItCh1 = DMA_IT_TEIF1 | DMA_IT_TCIF1,
// DMA streamCh2, triggered by timerCh2 pwm signal.
// Reset output value late to indicate "1" bit to ws2812.
.dmaInitCh2 = PIOS_WS2811_DMA_CH1_CONFIG(DMA_Channel_6),
.dmaInitCh2 = PIOS_WS2811_DMA_CH2_CONFIG(DMA_Channel_6),
.dmaItCh2 = DMA_IT_TEIF6 | DMA_IT_TCIF6,
// DMA streamUpdate Triggered by timer update event
// Outputs a high logic level at beginning of a cycle
.dmaInitUpdate = PIOS_WS2811_DMA_CH2_CONFIG(DMA_Channel_6),
.dmaInitUpdate = PIOS_WS2811_DMA_UPDATE_CONFIG(DMA_Channel_6),
.dmaItUpdate = DMA_IT_TEIF5 | DMA_IT_TCIF5,
.dmaSource = TIM_DMA_CC1 | TIM_DMA_CC3 | TIM_DMA_Update,