rooty/LibrePilot
1
0
Fork 0
mirror of https://bitbucket.org/librepilot/librepilot.git synced 2025-02-06 21:54:15 +01:00
Code Issues Releases Activity

LP-72 Fixes PPM input on receiver port. Added extra interrupt channel init for TIM1 & TIM8. Removed TIM8_UP_IRQHandler, as there is no such irq in stm32f4 line.

Browse Source
This commit is contained in:
Vladimir Zidar 2016-05-24 02:05:26 +02:00 committed by Laurent Lalanne
parent b6fbfba2af
commit 1d3d784f8b
1 changed files with 17 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

23
flight/pios/stm32f4xx/pios_tim.c
View File

@ -129,6 +129,23 @@ int32_t PIOS_TIM_InitClock(const struct pios_tim_clock_cfg *cfg)
/* Enable Interrupts */ /* Enable Interrupts */
NVIC_Init(&cfg->irq.init); NVIC_Init(&cfg->irq.init);
// Advanced timers TIM1 & TIM8 need special handling:
// There are up to 4 separate interrupts handlers for each advanced timer, but
// pios_tim_clock_cfg has provision for only one irq init, so we take care here
// to enable additional irq channels that we intend to use.
if (cfg->timer == TIM1) {
NVIC_InitTypeDef init = cfg->irq.init;
init.NVIC_IRQChannel = TIM1_UP_TIM10_IRQn;
NVIC_Init(&init);
} else if (cfg->timer == TIM8) {
NVIC_InitTypeDef init = cfg->irq.init;
init.NVIC_IRQChannel = TIM8_UP_TIM13_IRQn;
NVIC_Init(&init);
}
return 0; return 0;
} }
@ -376,12 +393,6 @@ static void PIOS_TIM_7_irq_handler(void)
PIOS_TIM_generic_irq_handler(TIM7); PIOS_TIM_generic_irq_handler(TIM7);
} }
void TIM8_UP_IRQHandler(void) __attribute__((alias("PIOS_TIM_8_UP_irq_handler")));
static void PIOS_TIM_8_UP_irq_handler(void)
{
PIOS_TIM_generic_irq_handler(TIM8);
}
void TIM8_CC_IRQHandler(void) __attribute__((alias("PIOS_TIM_8_CC_irq_handler"))); void TIM8_CC_IRQHandler(void) __attribute__((alias("PIOS_TIM_8_CC_irq_handler")));
static void PIOS_TIM_8_CC_irq_handler(void) static void PIOS_TIM_8_CC_irq_handler(void)
{ {