OP-423 also add changes to OP. (I can not test it because I don't have a board so only compile test)

flight/OpenPilot/System/inc/FreeRTOSConfig.h

@@ -80,6 +80,9 @@ NVIC value of 255. */
 #define portGET_RUN_TIME_COUNTER_VALUE()  PIOS_RTC_Counter()
 #endif
 
+#if !defined(ARCH_POSIX) && !defined(ARCH_WIN32)
+#define CHECK_IRQ_STACK
+#endif
 
 /**
   * @}

flight/OpenPilot/System/inc/pios_config.h

@@ -84,6 +84,8 @@
 /* Alarm Thresholds */
 #define HEAP_LIMIT_WARNING		4000
 #define HEAP_LIMIT_CRITICAL		1000
+#define IRQSTACK_LIMIT_WARNING		150
+#define IRQSTACK_LIMIT_CRITICAL		80
 #define CPULOAD_LIMIT_WARNING		80
 #define CPULOAD_LIMIT_CRITICAL		95
 

flight/PiOS/STM32F10x/Libraries/FreeRTOS/Source/portable/MemMang/heap_2.c

@@ -81,7 +81,7 @@ static union xRTOS_HEAP
 		volatile unsigned long ulDummy;
 	#endif
 	unsigned char ucHeap[ configTOTAL_HEAP_SIZE ];
-} xHeap;
+} xHeap __attribute__ ((section (".heap")));
 
 /* Define the linked list structure.  This is used to link free blocks in order
 of their size. */

flight/PiOS/STM32F10x/link_STM3210E_OP_sections.ld

@@ -261,6 +261,16 @@ SECTIONS
          _ebss = . ;
     } >RAM
     
+    .heap (NOLOAD) :
+    {
+        _sheap = . ;
+        *(.heap)
+        . = ALIGN(4);
+        _eheap = . ;
+        _init_stack_top = . - 4 ;
+         . = ALIGN(4);
+    } > RAM
+    
     PROVIDE ( end = _ebss );
     PROVIDE ( _end = _ebss );
 

flight/PiOS/STM32F10x/startup_stm32f10x_HD_OP.S

@@ -71,6 +71,30 @@ Reset_Handler:
 /* restore original stack pointer */  
   LDR r0, =_irq_stack_top
   MSR msp, r0
+
+  LDR r0, =_init_stack_top
+  MSR psp, r0
+/* DO
+ * - stay in thread process mode
+ * - stay in privilege level
+ * - use process stack
+ */
+  add r0, #2
+  MSR control, r0
+  ISB
+/* Fill IRQ stack for watermark monitoring */
+  ldr  r2, =_irq_stack_end
+  b  LoopFillIRQStack
+
+FillIRQStack:
+  movw  r3, #0xA5A5
+  str  r3, [r2], #4
+
+LoopFillIRQStack:
+  ldr  r3, = _irq_stack_top
+  cmp  r2, r3
+  bcc  FillIRQStack
+
 /* Copy the data segment initializers from flash to SRAM */  
   movs  r1, #0
   b  LoopCopyDataInit