From 29237f97ae1d857b48daa3920662d940fa7a9093 Mon Sep 17 00:00:00 2001 From: James Cotton Date: Thu, 2 Feb 2012 09:19:36 -0600 Subject: [PATCH] For SPI slave devices we need to handle the interrupt differently since transactions should already be completed. Also reset the callback so in the case of noise on the IRQ line it will not keep firing interrupts. I suspect we should probably disable interrupts in this handler to prevent refiring. --- flight/PiOS/STM32F4xx/pios_spi.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/flight/PiOS/STM32F4xx/pios_spi.c b/flight/PiOS/STM32F4xx/pios_spi.c index f81db9f05..1057fd7b3 100644 --- a/flight/PiOS/STM32F4xx/pios_spi.c +++ b/flight/PiOS/STM32F4xx/pios_spi.c @@ -613,22 +613,23 @@ void PIOS_SPI_SetPrescalar(uint32_t spi_id, uint32_t prescaler) spi_dev->cfg->regs->CR1 = (spi_dev->cfg->regs->CR1 & ~0x0038) | prescaler; } - void PIOS_SPI_IRQ_Handler(uint32_t spi_id) { struct pios_spi_dev * spi_dev = (struct pios_spi_dev *)spi_id; bool valid = PIOS_SPI_validate(spi_dev); PIOS_Assert(valid) - + // FIXME XXX Only RX channel or better clear flags for both channels? DMA_ClearFlag(spi_dev->cfg->dma.rx.channel, spi_dev->cfg->dma.irq.flags); + + if(spi_dev->cfg->init.SPI_Mode == SPI_Mode_Master) { + /* Wait for the final bytes of the transfer to complete, including CRC byte(s). */ + while (!(SPI_I2S_GetFlagStatus(spi_dev->cfg->regs, SPI_I2S_FLAG_TXE))) ; - /* Wait for the final bytes of the transfer to complete, including CRC byte(s). */ - while (!(SPI_I2S_GetFlagStatus(spi_dev->cfg->regs, SPI_I2S_FLAG_TXE))) ; - - /* Wait for the final bytes of the transfer to complete, including CRC byte(s). */ - while (SPI_I2S_GetFlagStatus(spi_dev->cfg->regs, SPI_I2S_FLAG_BSY)) ; + /* Wait for the final bytes of the transfer to complete, including CRC byte(s). */ + while (SPI_I2S_GetFlagStatus(spi_dev->cfg->regs, SPI_I2S_FLAG_BSY)) ; + } if (spi_dev->callback != NULL) { bool crc_ok = true;