diff --git a/flight/PiOS/STM32F10x/link_STM32103CB_AHRS_sections.ld b/flight/PiOS/STM32F10x/link_STM32103CB_AHRS_sections.ld
index 13290908a..dd814f561 100644
--- a/flight/PiOS/STM32F10x/link_STM32103CB_AHRS_sections.ld
+++ b/flight/PiOS/STM32F10x/link_STM32103CB_AHRS_sections.ld
@@ -1,14 +1,10 @@
+PROVIDE(pios_board_info_blob = ORIGIN(BD_INFO));
+
 _estack = 0x20004FF0;
 
 /* Section Definitions */
 SECTIONS
 {
-    .boardinfo :
-    {
-	. = ALIGN(4);
-	PROVIDE(pios_board_info_blob = .);
-    } > BD_INFO
-
     .text :
     {
         PROVIDE (pios_isr_vector_table_base = .);
diff --git a/flight/PiOS/STM32F10x/link_STM32103CB_CC_Rev1_sections.ld b/flight/PiOS/STM32F10x/link_STM32103CB_CC_Rev1_sections.ld
index 2df4dd6c8..e1cb0bd0f 100644
--- a/flight/PiOS/STM32F10x/link_STM32103CB_CC_Rev1_sections.ld
+++ b/flight/PiOS/STM32F10x/link_STM32103CB_CC_Rev1_sections.ld
@@ -3,17 +3,13 @@ PROVIDE (   vPortSVCHandler = 0 ) ;
 PROVIDE (   xPortPendSVHandler = 0 ) ;
 PROVIDE (   xPortSysTickHandler = 0 ) ;
 
+PROVIDE(pios_board_info_blob = ORIGIN(BD_INFO));
+
 _estack = 0x20004FF0;
 
 /* Section Definitions */
 SECTIONS
 {
-    .boardinfo :
-    {
-	. = ALIGN(4);
-	PROVIDE(pios_board_info_blob = .);
-    } > BD_INFO
-
     .text :
     {
         PROVIDE (pios_isr_vector_table_base = .);
diff --git a/flight/PiOS/STM32F10x/link_STM32103CB_PIPXTREME_sections.ld b/flight/PiOS/STM32F10x/link_STM32103CB_PIPXTREME_sections.ld
index fc51c7c43..badf5f986 100644
--- a/flight/PiOS/STM32F10x/link_STM32103CB_PIPXTREME_sections.ld
+++ b/flight/PiOS/STM32F10x/link_STM32103CB_PIPXTREME_sections.ld
@@ -3,17 +3,13 @@ PROVIDE (   vPortSVCHandler = 0 ) ;
 PROVIDE (   xPortPendSVHandler = 0 ) ;
 PROVIDE (   xPortSysTickHandler = 0 ) ;
 
+PROVIDE(pios_board_info_blob = ORIGIN(BD_INFO));
+
 _estack = 0x20004FF0;
 
 /* Section Definitions */
 SECTIONS
 {
-    .boardinfo :
-    {
-	. = ALIGN(4);
-	PROVIDE(pios_board_info_blob = .);
-    } > BD_INFO
-
     .text :
     {
         PROVIDE (pios_isr_vector_table_base = .);
diff --git a/flight/PiOS/STM32F10x/link_STM3210E_INS_sections.ld b/flight/PiOS/STM32F10x/link_STM3210E_INS_sections.ld
index 2635737a8..31e35b305 100644
--- a/flight/PiOS/STM32F10x/link_STM3210E_INS_sections.ld
+++ b/flight/PiOS/STM32F10x/link_STM3210E_INS_sections.ld
@@ -184,17 +184,12 @@ PROVIDE ( SysTick         = (SCS_BASE + 0x0010) ) ;
 PROVIDE ( NVIC            = (SCS_BASE + 0x0100) ) ;
 PROVIDE ( SCB             = (SCS_BASE + 0x0D00) ) ;
 
+PROVIDE(pios_board_info_blob = ORIGIN(BD_INFO));
 
 /* Sections Definitions */
 
 SECTIONS
 {
-    .boardinfo :
-    {
-	. = ALIGN(4);
-	PROVIDE(pios_board_info_blob = .);
-    } > BD_INFO
-
     /* for Cortex devices, the beginning of the startup code is stored in the .isr_vector section, which goes to FLASH */
     .isr_vector :
     {
diff --git a/flight/PiOS/STM32F10x/link_STM3210E_OP_sections.ld b/flight/PiOS/STM32F10x/link_STM3210E_OP_sections.ld
index cdee04df3..94aafbd78 100644
--- a/flight/PiOS/STM32F10x/link_STM3210E_OP_sections.ld
+++ b/flight/PiOS/STM32F10x/link_STM3210E_OP_sections.ld
@@ -158,17 +158,12 @@ PROVIDE ( SysTick         = (SCS_BASE + 0x0010) ) ;
 PROVIDE ( NVIC            = (SCS_BASE + 0x0100) ) ;
 PROVIDE ( SCB             = (SCS_BASE + 0x0D00) ) ;
 
+PROVIDE(pios_board_info_blob = ORIGIN(BD_INFO));
 
 /* Sections Definitions */
 
 SECTIONS
 {
-    .boardinfo :
-    {
-	. = ALIGN(4);
-	PROVIDE(pios_board_info_blob = .);
-    } > BD_INFO
-
     /* for Cortex devices, the beginning of the startup code is stored in the .isr_vector section, which goes to FLASH */
     .isr_vector :
     {