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OP-917 included a "compatibility" linker script used by the bootloader updater to ensure its compatibility with previous bootloader versions
+review OPReview-456
This commit is contained in:
Alessio Morale
parent
d79887d223
commit
37a0d2c99e
@ -10,6 +10,9 @@ LINKER_SCRIPTS_APP = $(PIOS_DEVLIB)link_stm32f4xx_fw_memory.ld \
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$(PIOS_DEVLIB)link_stm32f4xx_sections.ld
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LINKER_SCRIPTS_BL = $(PIOS_DEVLIB)link_stm32f4xx_bl_memory.ld \
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$(PIOS_DEVLIB)link_stm32f4xx_sections.ld
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# _compat linker script are aimed at bootloader updater to guarantee to be compatible with earlier bootloaders.
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LINKER_SCRIPTS_COMPAT = $(PIOS_DEVLIB)link_stm32f4xx_fw_memory.ld \
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$(PIOS_DEVLIB)link_stm32f4xx_sections_compat.ld
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# Compiler options implied by the F4xx
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CDEFS += -DSTM32F4XX
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176
flight/pios/stm32f4xx/link_stm32f4xx_sections_compat.ld
Normal file
176
flight/pios/stm32f4xx/link_stm32f4xx_sections_compat.ld
Normal file
@ -0,0 +1,176 @@
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/* Section Definitions */
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SECTIONS
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{
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/*
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* Vectors, code and constant data.
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*/
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.text :
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{
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PROVIDE (pios_isr_vector_table_base = .);
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KEEP(*(.cpu_vectors)) /* CPU exception vectors */
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KEEP(*(.io_vectors)) /* I/O interrupt vectors */
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*(.text .text.* .gnu.linkonce.t.*)
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*(.glue_7t) *(.glue_7)
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*(.rodata .rodata* .gnu.linkonce.r.*)
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} > FLASH
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/*
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* Init section for UAVObjects.
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*/
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.initcalluavobj.init :
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{
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. = ALIGN(4);
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__uavobj_initcall_start = .;
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KEEP(*(.initcalluavobj.init))
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. = ALIGN(4);
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__uavobj_initcall_end = .;
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} >FLASH
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/*
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* Module init section section
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*/
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.initcallmodule.init :
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{
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. = ALIGN(4);
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__module_initcall_start = .;
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KEEP(*(.initcallmodule.init))
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. = ALIGN(4);
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__module_initcall_end = .;
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} >FLASH
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/*
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* C++ exception handling.
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*/
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.ARM.extab :
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{
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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} > FLASH
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.ARM.exidx :
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{
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__exidx_start = .;
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*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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__exidx_end = .;
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} > FLASH
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/*
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* Markers for the end of the 'text' section and the in-flash start of
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* non-constant data
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*/
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. = ALIGN(4);
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_etext = .;
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_sidata = .;
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/*
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* Board info structure, normally only generated by the bootloader but can
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* be read by the application.
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*/
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PROVIDE(pios_board_info_blob = ORIGIN(BD_INFO));
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.boardinfo :
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{
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. = ALIGN(4);
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KEEP(*(.boardinfo))
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. = ALIGN(ORIGIN(BD_INFO)+LENGTH(BD_INFO));
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} > BD_INFO
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/*
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* Place the IRQ/bootstrap stack at the bottom of SRAM so that an overflow
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* results in a hard fault.
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*/
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.istack (NOLOAD) :
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{
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. = ALIGN(4);
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_irq_stack_end = . ;
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*(.irqstack)
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_irq_stack_top = . ;
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} > SRAM
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/*
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* Non-const initialised data.
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*/
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.data : AT (_sidata)
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{
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. = ALIGN(4);
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_sdata = .;
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*(.data .data.*)
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. = ALIGN(4);
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_edata = . ;
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} > SRAM
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/*
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* Uninitialised data (BSS + commons).
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*/
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.bss (NOLOAD) :
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{
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_sbss = . ;
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*(.bss .bss.*)
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*(COMMON)
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_ebss = . ;
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PROVIDE ( _end = _ebss ) ;
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} > SRAM
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/*
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* The heap consumes the remainder of the SRAM.
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*/
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.heap (NOLOAD) :
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{
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. = ALIGN(4);
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_sheap = . ;
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/*
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* This allows us to declare an object or objects up to the minimum acceptable
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* heap size and receive a linker error if the space available for the heap is
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* not sufficient.
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*/
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*(.heap)
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/* extend the heap up to the top of SRAM */
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. = ORIGIN(SRAM) + LENGTH(SRAM) - ABSOLUTE(_sheap);
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_eheap = .;
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} > SRAM
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/*
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* 'Fast' memory goes in the CCM SRAM
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*/
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.fast (NOLOAD) :
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{
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_sfast = . ;
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*(.fast)
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_efast = . ;
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} > CCSRAM
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/* Stabs debugging sections. */
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.stab 0 : { *(.stab) }
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.stabstr 0 : { *(.stabstr) }
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.stab.excl 0 : { *(.stab.excl) }
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.stab.exclstr 0 : { *(.stab.exclstr) }
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.stab.index 0 : { *(.stab.index) }
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.stab.indexstr 0 : { *(.stab.indexstr) }
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.comment 0 : { *(.comment) }
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/* DWARF debug sections.
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Symbols in the DWARF debugging sections are relative to the beginning
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of the section so we begin them at 0. */
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/* DWARF 1 */
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.debug 0 : { *(.debug) }
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.line 0 : { *(.line) }
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/* GNU DWARF 1 extensions */
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.debug_srcinfo 0 : { *(.debug_srcinfo) }
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.debug_sfnames 0 : { *(.debug_sfnames) }
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/* DWARF 1.1 and DWARF 2 */
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.debug_aranges 0 : { *(.debug_aranges) }
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.debug_pubnames 0 : { *(.debug_pubnames) }
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/* DWARF 2 */
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.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
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.debug_abbrev 0 : { *(.debug_abbrev) }
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.debug_line 0 : { *(.debug_line) }
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.debug_frame 0 : { *(.debug_frame) }
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.debug_str 0 : { *(.debug_str) }
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.debug_loc 0 : { *(.debug_loc) }
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.debug_macinfo 0 : { *(.debug_macinfo) }
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/* SGI/MIPS DWARF 2 extensions */
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.debug_weaknames 0 : { *(.debug_weaknames) }
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.debug_funcnames 0 : { *(.debug_funcnames) }
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.debug_typenames 0 : { *(.debug_typenames) }
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.debug_varnames 0 : { *(.debug_varnames) }
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}
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@ -51,7 +51,9 @@ else ifeq ($(MCU),cortex-m4)
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# Set linker-script name depending on selected submodel name
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LDFLAGS += -T$(PIOS_DEVLIB)/link_stm32f4xx_fw_memory.ld
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LDFLAGS += -T$(PIOS_DEVLIB)/link_stm32f4xx_sections.ld
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# Using the _compat ld script ensure that the bootloader updated is compiled with irqstack in sram
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# This allow to be used with bootloader earlier than rel5
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LDFLAGS += -T$(PIOS_DEVLIB)/link_stm32f4xx_sections_compat.ld
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SRC += $(HWDEFSINC)/firmware/cm3_fault_handlers.c
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SRC += $(HWDEFSINC)/firmware/dcc_stdio.c
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else
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