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CC3D and CC use different CS lines for the flash chip. Add a second cfg
structure for each SPI interface.
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parent
587ec5a615
commit
3880b0ddc3
@ -177,9 +177,22 @@ void PIOS_Board_Init(void) {
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#if defined(PIOS_INCLUDE_SPI)
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/* Set up the SPI interface to the serial flash */
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if (PIOS_SPI_Init(&pios_spi_flash_accel_id, &pios_spi_flash_accel_cfg)) {
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PIOS_Assert(0);
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switch(bdinfo->board_rev) {
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case 0x01: // Revision 1
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if (PIOS_SPI_Init(&pios_spi_flash_accel_id, &pios_spi_flash_accel_cfg_cc)) {
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PIOS_Assert(0);
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}
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break;
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case 0x02: // Revision 2
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if (PIOS_SPI_Init(&pios_spi_flash_accel_id, &pios_spi_flash_accel_cfg_cc3d)) {
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PIOS_Assert(0);
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}
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break;
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default:
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PIOS_Assert(0);
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}
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#endif
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PIOS_Flash_W25X_Init(pios_spi_flash_accel_id, 1);
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@ -184,7 +184,104 @@ void PIOS_SPI_gyro_irq_handler(void)
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void PIOS_SPI_flash_accel_irq_handler(void);
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void DMA1_Channel4_IRQHandler() __attribute__ ((alias ("PIOS_SPI_flash_accel_irq_handler")));
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void DMA1_Channel5_IRQHandler() __attribute__ ((alias ("PIOS_SPI_flash_accel_irq_handler")));
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static const struct pios_spi_cfg pios_spi_flash_accel_cfg = {
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static const struct pios_spi_cfg pios_spi_flash_accel_cfg_cc3d = {
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.regs = SPI2,
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.init = {
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.SPI_Mode = SPI_Mode_Master,
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.SPI_Direction = SPI_Direction_2Lines_FullDuplex,
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.SPI_DataSize = SPI_DataSize_8b,
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.SPI_NSS = SPI_NSS_Soft,
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.SPI_FirstBit = SPI_FirstBit_MSB,
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.SPI_CRCPolynomial = 7,
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.SPI_CPOL = SPI_CPOL_High,
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.SPI_CPHA = SPI_CPHA_2Edge,
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.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_8,
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},
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.use_crc = false,
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.dma = {
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.ahb_clk = RCC_AHBPeriph_DMA1,
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.irq = {
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.flags = (DMA1_FLAG_TC4 | DMA1_FLAG_TE4 | DMA1_FLAG_HT4 | DMA1_FLAG_GL4),
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.init = {
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.NVIC_IRQChannel = DMA1_Channel4_IRQn,
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.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGH,
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.NVIC_IRQChannelSubPriority = 0,
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.NVIC_IRQChannelCmd = ENABLE,
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},
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},
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.rx = {
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.channel = DMA1_Channel4,
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.init = {
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.DMA_PeripheralBaseAddr = (uint32_t)&(SPI2->DR),
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.DMA_DIR = DMA_DIR_PeripheralSRC,
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.DMA_PeripheralInc = DMA_PeripheralInc_Disable,
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.DMA_MemoryInc = DMA_MemoryInc_Enable,
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.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
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.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
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.DMA_Mode = DMA_Mode_Normal,
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.DMA_Priority = DMA_Priority_High,
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.DMA_M2M = DMA_M2M_Disable,
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},
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},
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.tx = {
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.channel = DMA1_Channel5,
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.init = {
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.DMA_PeripheralBaseAddr = (uint32_t)&(SPI2->DR),
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.DMA_DIR = DMA_DIR_PeripheralDST,
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.DMA_PeripheralInc = DMA_PeripheralInc_Disable,
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.DMA_MemoryInc = DMA_MemoryInc_Enable,
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.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
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.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
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.DMA_Mode = DMA_Mode_Normal,
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.DMA_Priority = DMA_Priority_High,
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.DMA_M2M = DMA_M2M_Disable,
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},
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},
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},
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.sclk = {
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.gpio = GPIOB,
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.init = {
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.GPIO_Pin = GPIO_Pin_13,
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.GPIO_Speed = GPIO_Speed_10MHz,
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.GPIO_Mode = GPIO_Mode_AF_PP,
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},
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},
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.miso = {
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.gpio = GPIOB,
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.init = {
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.GPIO_Pin = GPIO_Pin_14,
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.GPIO_Speed = GPIO_Speed_10MHz,
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.GPIO_Mode = GPIO_Mode_IN_FLOATING,
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},
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},
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.mosi = {
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.gpio = GPIOB,
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.init = {
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.GPIO_Pin = GPIO_Pin_15,
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.GPIO_Speed = GPIO_Speed_10MHz,
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.GPIO_Mode = GPIO_Mode_AF_PP,
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},
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},
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.slave_count = 2,
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.ssel = {{
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.gpio = GPIOB,
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.init = {
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.GPIO_Pin = GPIO_Pin_12,
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.GPIO_Speed = GPIO_Speed_50MHz,
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.GPIO_Mode = GPIO_Mode_Out_PP,
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}},{
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.gpio = GPIOC,
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.init = {
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.GPIO_Pin = GPIO_Pin_15,
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.GPIO_Speed = GPIO_Speed_50MHz,
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.GPIO_Mode = GPIO_Mode_Out_PP,
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},
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}},
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};
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static const struct pios_spi_cfg pios_spi_flash_accel_cfg_cc = {
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.regs = SPI2,
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.init = {
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.SPI_Mode = SPI_Mode_Master,
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