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mirror of https://bitbucket.org/librepilot/librepilot.git synced 2025-02-21 11:54:15 +01:00

OP-901 Update CMSIS to r3p2-00rel1

This commit is contained in:
Alessio Morale 2013-05-18 20:29:06 +02:00
parent aba64689a6
commit 3ec9447fdc
2194 changed files with 123033 additions and 131664 deletions

View File

@ -3,24 +3,37 @@
; * @brief CMSIS Core Device Startup File for ; * @brief CMSIS Core Device Startup File for
; * ARMCM0 Device Series ; * ARMCM0 Device Series
; * @version V1.08 ; * @version V1.08
; * @date 03. February 2012 ; * @date 23. November 2012
; * ; *
; * @note ; * @note
; * Copyright (C) 2012 ARM Limited. All rights reserved.
; *
; * @par
; * ARM Limited (ARM) is supplying this software for use with Cortex-M
; * processor based microcontrollers. This file can be freely distributed
; * within development tools that are supporting such ARM based processors.
; *
; * @par
; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
; * ; *
; ******************************************************************************/ ; ******************************************************************************/
;/* Copyright (c) 2011 - 2012 ARM LIMITED
;
; All rights reserved.
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
; - Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; - Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
; - Neither the name of ARM nor the names of its contributors may be used
; to endorse or promote products derived from this software without
; specific prior written permission.
; *
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
; ---------------------------------------------------------------------------*/
;/* ;/*
;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
;*/ ;*/
@ -214,13 +227,13 @@ SPI_IRQHandler
; User Initial Stack & Heap ; User Initial Stack & Heap
IF :DEF:__MICROLIB IF :DEF:__MICROLIB
EXPORT __initial_sp EXPORT __initial_sp
EXPORT __heap_base EXPORT __heap_base
EXPORT __heap_limit EXPORT __heap_limit
ELSE ELSE
IMPORT __use_two_region_memory IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap EXPORT __user_initial_stackheap

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@ -3,24 +3,37 @@
; * @brief CMSIS Core Device Startup File for ; * @brief CMSIS Core Device Startup File for
; * ARMCM3 Device Series ; * ARMCM3 Device Series
; * @version V1.08 ; * @version V1.08
; * @date 03. February 2012 ; * @date 23. November 2012
; * ; *
; * @note ; * @note
; * Copyright (C) 2012 ARM Limited. All rights reserved.
; *
; * @par
; * ARM Limited (ARM) is supplying this software for use with Cortex-M
; * processor based microcontrollers. This file can be freely distributed
; * within development tools that are supporting such ARM based processors.
; *
; * @par
; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
; * ; *
; ******************************************************************************/ ; ******************************************************************************/
;/* Copyright (c) 2011 - 2012 ARM LIMITED
;
; All rights reserved.
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
; - Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; - Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
; - Neither the name of ARM nor the names of its contributors may be used
; to endorse or promote products derived from this software without
; specific prior written permission.
; *
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
; ---------------------------------------------------------------------------*/
;/* ;/*
;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
;*/ ;*/
@ -234,13 +247,13 @@ SPI_IRQHandler
; User Initial Stack & Heap ; User Initial Stack & Heap
IF :DEF:__MICROLIB IF :DEF:__MICROLIB
EXPORT __initial_sp EXPORT __initial_sp
EXPORT __heap_base EXPORT __heap_base
EXPORT __heap_limit EXPORT __heap_limit
ELSE ELSE
IMPORT __use_two_region_memory IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap EXPORT __user_initial_stackheap

View File

@ -3,24 +3,37 @@
; * @brief CMSIS Core Device Startup File for ; * @brief CMSIS Core Device Startup File for
; * ARMCM4 Device Series ; * ARMCM4 Device Series
; * @version V1.08 ; * @version V1.08
; * @date 03. February 2012 ; * @date 23. November 2012
; * ; *
; * @note ; * @note
; * Copyright (C) 2012 ARM Limited. All rights reserved.
; *
; * @par
; * ARM Limited (ARM) is supplying this software for use with Cortex-M
; * processor based microcontrollers. This file can be freely distributed
; * within development tools that are supporting such ARM based processors.
; *
; * @par
; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
; * ; *
; ******************************************************************************/ ; ******************************************************************************/
;/* Copyright (c) 2011 - 2012 ARM LIMITED
;
; All rights reserved.
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
; - Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; - Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
; - Neither the name of ARM nor the names of its contributors may be used
; to endorse or promote products derived from this software without
; specific prior written permission.
; *
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
; ---------------------------------------------------------------------------*/
;/* ;/*
;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
;*/ ;*/
@ -234,13 +247,13 @@ SPI_IRQHandler
; User Initial Stack & Heap ; User Initial Stack & Heap
IF :DEF:__MICROLIB IF :DEF:__MICROLIB
EXPORT __initial_sp EXPORT __initial_sp
EXPORT __heap_base EXPORT __heap_base
EXPORT __heap_limit EXPORT __heap_limit
ELSE ELSE
IMPORT __use_two_region_memory IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap EXPORT __user_initial_stackheap

View File

@ -2,25 +2,38 @@
* @file startup_ARMCM0.s * @file startup_ARMCM0.s
* @brief CMSIS Core Device Startup File for * @brief CMSIS Core Device Startup File for
* ARMCM0 Device Series * ARMCM0 Device Series
* @version V1.07 * @version V1.08
* @date 30. January 2012 * @date 23. November 2012
* *
* @note Version CodeSourcery Sourcery G++ Lite (with CS3) * @note Version CodeSourcery Sourcery G++ Lite (with CS3)
* Copyright (C) 2012 ARM Limited. All rights reserved.
*
* @par
* ARM Limited (ARM) is supplying this software for use with Cortex-M
* processor based microcontrollers. This file can be freely distributed
* within development tools that are supporting such ARM based processors.
*
* @par
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
* *
******************************************************************************/ ******************************************************************************/
/* Copyright (c) 2011 - 2012 ARM LIMITED
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
- Neither the name of ARM nor the names of its contributors may be used
to endorse or promote products derived from this software without
specific prior written permission.
*
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
---------------------------------------------------------------------------*/
/* /*
//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ //-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
*/ */
@ -52,7 +65,6 @@ __cs3_stack_mem:
*/ */
.equ Heap_Size, 0x00000C00 .equ Heap_Size, 0x00000C00
.section ".heap", "w" .section ".heap", "w"
.align 3 .align 3
.globl __cs3_heap_start .globl __cs3_heap_start

View File

@ -2,25 +2,38 @@
* @file startup_ARMCM3.s * @file startup_ARMCM3.s
* @brief CMSIS Core Device Startup File for * @brief CMSIS Core Device Startup File for
* ARMCM3 Device Series * ARMCM3 Device Series
* @version V1.07 * @version V1.08
* @date 30. January 2012 * @date 23. November 2012
* *
* @note Version CodeSourcery Sourcery G++ Lite (with CS3) * @note Version CodeSourcery Sourcery G++ Lite (with CS3)
* Copyright (C) 2012 ARM Limited. All rights reserved.
*
* @par
* ARM Limited (ARM) is supplying this software for use with Cortex-M
* processor based microcontrollers. This file can be freely distributed
* within development tools that are supporting such ARM based processors.
*
* @par
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
* *
******************************************************************************/ ******************************************************************************/
/* Copyright (c) 2011 - 2012 ARM LIMITED
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
- Neither the name of ARM nor the names of its contributors may be used
to endorse or promote products derived from this software without
specific prior written permission.
*
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
---------------------------------------------------------------------------*/
/* /*
//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ //-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
*/ */
@ -52,7 +65,6 @@ __cs3_stack_mem:
*/ */
.equ Heap_Size, 0x00000C00 .equ Heap_Size, 0x00000C00
.section ".heap", "w" .section ".heap", "w"
.align 3 .align 3
.globl __cs3_heap_start .globl __cs3_heap_start

View File

@ -2,25 +2,38 @@
* @file startup_ARMCM4.s * @file startup_ARMCM4.s
* @brief CMSIS Core Device Startup File for * @brief CMSIS Core Device Startup File for
* ARMCM4 Device Series * ARMCM4 Device Series
* @version V1.07 * @version V1.08
* @date 30. January 2012 * @date 23. November 2012
* *
* @note Version CodeSourcery Sourcery G++ Lite (with CS3) * @note Version CodeSourcery Sourcery G++ Lite (with CS3)
* Copyright (C) 2012 ARM Limited. All rights reserved.
*
* @par
* ARM Limited (ARM) is supplying this software for use with Cortex-M
* processor based microcontrollers. This file can be freely distributed
* within development tools that are supporting such ARM based processors.
*
* @par
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
* *
******************************************************************************/ ******************************************************************************/
/* Copyright (c) 2011 - 2012 ARM LIMITED
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
- Neither the name of ARM nor the names of its contributors may be used
to endorse or promote products derived from this software without
specific prior written permission.
*
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
---------------------------------------------------------------------------*/
/* /*
//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ //-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
*/ */
@ -52,7 +65,6 @@ __cs3_stack_mem:
*/ */
.equ Heap_Size, 0x00000C00 .equ Heap_Size, 0x00000C00
.section ".heap", "w" .section ".heap", "w"
.align 3 .align 3
.globl __cs3_heap_start .globl __cs3_heap_start

View File

@ -12,7 +12,7 @@ GROUP(libgcc.a libc.a libm.a libnosys.a)
* with other linker script that defines memory regions FLASH and RAM. * with other linker script that defines memory regions FLASH and RAM.
* It references following symbols, which must be defined in code: * It references following symbols, which must be defined in code:
* Reset_Handler : Entry of reset handler * Reset_Handler : Entry of reset handler
* *
* It defines following symbols, which code can use without definition: * It defines following symbols, which code can use without definition:
* __exidx_start * __exidx_start
* __exidx_end * __exidx_end
@ -65,7 +65,7 @@ SECTIONS
KEEP(*(.eh_frame*)) KEEP(*(.eh_frame*))
} > FLASH } > FLASH
.ARM.extab : .ARM.extab :
{ {
*(.ARM.extab* .gnu.linkonce.armextab.*) *(.ARM.extab* .gnu.linkonce.armextab.*)
} > FLASH } > FLASH
@ -78,7 +78,7 @@ SECTIONS
__exidx_end = .; __exidx_end = .;
__etext = .; __etext = .;
.data : AT (__etext) .data : AT (__etext)
{ {
__data_start__ = .; __data_start__ = .;
@ -106,6 +106,7 @@ SECTIONS
KEEP(*(.fini_array)) KEEP(*(.fini_array))
PROVIDE_HIDDEN (__fini_array_end = .); PROVIDE_HIDDEN (__fini_array_end = .);
KEEP(*(.jcr*))
. = ALIGN(4); . = ALIGN(4);
/* All data end */ /* All data end */
__data_end__ = .; __data_end__ = .;
@ -114,13 +115,15 @@ SECTIONS
.bss : .bss :
{ {
. = ALIGN(4);
__bss_start__ = .; __bss_start__ = .;
*(.bss*) *(.bss*)
*(COMMON) *(COMMON)
. = ALIGN(4);
__bss_end__ = .; __bss_end__ = .;
} > RAM } > RAM
.heap : .heap (COPY):
{ {
__end__ = .; __end__ = .;
end = __end__; end = __end__;
@ -131,9 +134,9 @@ SECTIONS
/* .stack_dummy section doesn't contains any symbols. It is only /* .stack_dummy section doesn't contains any symbols. It is only
* used for linker to calculate size of stack sections, and assign * used for linker to calculate size of stack sections, and assign
* values to stack symbols later */ * values to stack symbols later */
.stack_dummy : .stack_dummy (COPY):
{ {
*(.stack) *(.stack*)
} > RAM } > RAM
/* Set stack top to end of RAM, and stack limit move down by /* Set stack top to end of RAM, and stack limit move down by
@ -141,7 +144,7 @@ SECTIONS
__StackTop = ORIGIN(RAM) + LENGTH(RAM); __StackTop = ORIGIN(RAM) + LENGTH(RAM);
__StackLimit = __StackTop - SIZEOF(.stack_dummy); __StackLimit = __StackTop - SIZEOF(.stack_dummy);
PROVIDE(__stack = __StackTop); PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */ /* Check if data + heap + stack exceeds RAM limit */
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
} }

View File

@ -1,34 +1,38 @@
/* File: startup_ARMCM0.S /* File: startup_ARMCM0.S
* Purpose: startup file for Cortex-M0 devices. Should use with * Purpose: startup file for Cortex-M0 devices. Should use with
* GCC for ARM Embedded Processors * GCC for ARM Embedded Processors
* Version: V1.3 * Version: V1.4
* Date: 08 Feb 2012 * Date: 20 Dezember 2012
* *
* Copyright (c) 2012, ARM Limited
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
* Neither the name of the ARM Limited nor the
names of its contributors may be used to endorse or promote products
derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL ARM LIMITED BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/ */
/* Copyright (c) 2011 - 2012 ARM LIMITED
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
- Neither the name of ARM nor the names of its contributors may be used
to endorse or promote products derived from this software without
specific prior written permission.
*
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
---------------------------------------------------------------------------*/
.syntax unified .syntax unified
.arch armv6-m .arch armv6-m
@ -37,7 +41,7 @@
#ifdef __STACK_SIZE #ifdef __STACK_SIZE
.equ Stack_Size, __STACK_SIZE .equ Stack_Size, __STACK_SIZE
#else #else
.equ Stack_Size, 0x400 .equ Stack_Size, 0x00000400
#endif #endif
.globl __StackTop .globl __StackTop
.globl __StackLimit .globl __StackLimit
@ -52,7 +56,7 @@ __StackTop:
#ifdef __HEAP_SIZE #ifdef __HEAP_SIZE
.equ Heap_Size, __HEAP_SIZE .equ Heap_Size, __HEAP_SIZE
#else #else
.equ Heap_Size, 0xC00 .equ Heap_Size, 0x00000C00
#endif #endif
.globl __HeapBase .globl __HeapBase
.globl __HeapLimit .globl __HeapLimit
@ -124,7 +128,7 @@ __isr_vector:
.text .text
.thumb .thumb
.thumb_func .thumb_func
.align 2 .align 1
.globl Reset_Handler .globl Reset_Handler
.type Reset_Handler, %function .type Reset_Handler, %function
Reset_Handler: Reset_Handler:
@ -140,24 +144,47 @@ Reset_Handler:
ldr r3, =__data_end__ ldr r3, =__data_end__
subs r3, r2 subs r3, r2
ble .flash_to_ram_loop_end ble .LC0
movs r4, 0 .LC1:
.flash_to_ram_loop: subs r3, 4
ldr r0, [r1,r4] ldr r0, [r1,r3]
str r0, [r2,r4] str r0, [r2,r3]
adds r4, 4 bgt .LC1
cmp r4, r3 .LC0:
blt .flash_to_ram_loop
.flash_to_ram_loop_end:
#ifndef __NO_SYSTEM_INIT #ifdef __STARTUP_CLEAR_BSS
ldr r0, =SystemInit /* This part of work usually is done in C library startup code. Otherwise,
blx r0 * define this macro to enable it in this startup.
*
* Loop to zero out BSS section, which uses following symbols
* in linker script:
* __bss_start__: start of BSS section. Must align to 4
* __bss_end__: end of BSS section. Must align to 4
*/
ldr r1, =__bss_start__
ldr r2, =__bss_end__
subs r2, r1
ble .LC3
movs r0, 0
.LC2:
str r0, [r1, r2]
subs r2, 4
bge .LC2
.LC3:
#endif #endif
ldr r0, =_start #ifndef __NO_SYSTEM_INIT
bx r0 bl SystemInit
#endif
#ifndef __START
#define __START _start
#endif
bl __START
.pool .pool
.size Reset_Handler, . - Reset_Handler .size Reset_Handler, . - Reset_Handler

View File

@ -1,34 +1,38 @@
/* File: startup_ARMCM3.S /* File: startup_ARMCM3.S
* Purpose: startup file for Cortex-M3 devices. Should use with * Purpose: startup file for Cortex-M3 devices. Should use with
* GCC for ARM Embedded Processors * GCC for ARM Embedded Processors
* Version: V1.3 * Version: V1.4
* Date: 08 Feb 2012 * Date: 20 Dezember 2012
* *
* Copyright (c) 2012, ARM Limited
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
* Neither the name of the ARM Limited nor the
names of its contributors may be used to endorse or promote products
derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL ARM LIMITED BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/ */
/* Copyright (c) 2011 - 2012 ARM LIMITED
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
- Neither the name of ARM nor the names of its contributors may be used
to endorse or promote products derived from this software without
specific prior written permission.
*
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
---------------------------------------------------------------------------*/
.syntax unified .syntax unified
.arch armv7-m .arch armv7-m
@ -37,7 +41,7 @@
#ifdef __STACK_SIZE #ifdef __STACK_SIZE
.equ Stack_Size, __STACK_SIZE .equ Stack_Size, __STACK_SIZE
#else #else
.equ Stack_Size, 0x400 .equ Stack_Size, 0x00000400
#endif #endif
.globl __StackTop .globl __StackTop
.globl __StackLimit .globl __StackLimit
@ -52,7 +56,7 @@ __StackTop:
#ifdef __HEAP_SIZE #ifdef __HEAP_SIZE
.equ Heap_Size, __HEAP_SIZE .equ Heap_Size, __HEAP_SIZE
#else #else
.equ Heap_Size, 0xC00 .equ Heap_Size, 0x00000C00
#endif #endif
.globl __HeapBase .globl __HeapBase
.globl __HeapLimit .globl __HeapLimit
@ -143,30 +147,51 @@ Reset_Handler:
/* Here are two copies of loop implemenations. First one favors code size /* Here are two copies of loop implemenations. First one favors code size
* and the second one favors performance. Default uses the first one. * and the second one favors performance. Default uses the first one.
* Change to "#if 0" to use the second one */ * Change to "#if 0" to use the second one */
.flash_to_ram_loop: .LC0:
cmp r2, r3 cmp r2, r3
ittt lt ittt lt
ldrlt r0, [r1], #4 ldrlt r0, [r1], #4
strlt r0, [r2], #4 strlt r0, [r2], #4
blt .flash_to_ram_loop blt .LC0
#else #else
subs r3, r2 subs r3, r2
ble .flash_to_ram_loop_end ble .LC1
.flash_to_ram_loop: .LC0:
subs r3, #4 subs r3, #4
ldr r0, [r1, r3] ldr r0, [r1, r3]
str r0, [r2, r3] str r0, [r2, r3]
bgt .flash_to_ram_loop bgt .LC0
.flash_to_ram_loop_end: .LC1:
#endif #endif
#ifdef __STARTUP_CLEAR_BSS
/* This part of work usually is done in C library startup code. Otherwise,
* define this macro to enable it in this startup.
*
* Loop to zero out BSS section, which uses following symbols
* in linker script:
* __bss_start__: start of BSS section. Must align to 4
* __bss_end__: end of BSS section. Must align to 4
*/
ldr r1, =__bss_start__
ldr r2, =__bss_end__
movs r0, 0
.LC2:
cmp r1, r2
itt lt
strlt r0, [r1], #4
blt .LC2
#endif /* __STARTUP_CLEAR_BSS */
#ifndef __NO_SYSTEM_INIT #ifndef __NO_SYSTEM_INIT
ldr r0, =SystemInit bl SystemInit
blx r0
#endif #endif
ldr r0, =_start #ifndef __START
bx r0 #define __START _start
#endif
bl __START
.pool .pool
.size Reset_Handler, . - Reset_Handler .size Reset_Handler, . - Reset_Handler

View File

@ -1,34 +1,38 @@
/* File: startup_ARMCM4.S /* File: startup_ARMCM4.S
* Purpose: startup file for Cortex-M4 devices. Should use with * Purpose: startup file for Cortex-M4 devices. Should use with
* GCC for ARM Embedded Processors * GCC for ARM Embedded Processors
* Version: V1.3 * Version: V1.4
* Date: 08 Feb 2012 * Date: 20 Dezember 2012
* *
* Copyright (c) 2012, ARM Limited
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
* Neither the name of the ARM Limited nor the
names of its contributors may be used to endorse or promote products
derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL ARM LIMITED BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/ */
/* Copyright (c) 2011 - 2012 ARM LIMITED
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
- Neither the name of ARM nor the names of its contributors may be used
to endorse or promote products derived from this software without
specific prior written permission.
*
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
---------------------------------------------------------------------------*/
.syntax unified .syntax unified
.arch armv7-m .arch armv7-m
@ -37,7 +41,7 @@
#ifdef __STACK_SIZE #ifdef __STACK_SIZE
.equ Stack_Size, __STACK_SIZE .equ Stack_Size, __STACK_SIZE
#else #else
.equ Stack_Size, 0x400 .equ Stack_Size, 0x00000400
#endif #endif
.globl __StackTop .globl __StackTop
.globl __StackLimit .globl __StackLimit
@ -52,7 +56,7 @@ __StackTop:
#ifdef __HEAP_SIZE #ifdef __HEAP_SIZE
.equ Heap_Size, __HEAP_SIZE .equ Heap_Size, __HEAP_SIZE
#else #else
.equ Heap_Size, 0xC00 .equ Heap_Size, 0x00000C00
#endif #endif
.globl __HeapBase .globl __HeapBase
.globl __HeapLimit .globl __HeapLimit
@ -143,30 +147,51 @@ Reset_Handler:
/* Here are two copies of loop implemenations. First one favors code size /* Here are two copies of loop implemenations. First one favors code size
* and the second one favors performance. Default uses the first one. * and the second one favors performance. Default uses the first one.
* Change to "#if 0" to use the second one */ * Change to "#if 0" to use the second one */
.flash_to_ram_loop: .LC0:
cmp r2, r3 cmp r2, r3
ittt lt ittt lt
ldrlt r0, [r1], #4 ldrlt r0, [r1], #4
strlt r0, [r2], #4 strlt r0, [r2], #4
blt .flash_to_ram_loop blt .LC0
#else #else
subs r3, r2 subs r3, r2
ble .flash_to_ram_loop_end ble .LC1
.flash_to_ram_loop: .LC0:
subs r3, #4 subs r3, #4
ldr r0, [r1, r3] ldr r0, [r1, r3]
str r0, [r2, r3] str r0, [r2, r3]
bgt .flash_to_ram_loop bgt .LC0
.flash_to_ram_loop_end: .LC1:
#endif #endif
#ifdef __STARTUP_CLEAR_BSS
/* This part of work usually is done in C library startup code. Otherwise,
* define this macro to enable it in this startup.
*
* Loop to zero out BSS section, which uses following symbols
* in linker script:
* __bss_start__: start of BSS section. Must align to 4
* __bss_end__: end of BSS section. Must align to 4
*/
ldr r1, =__bss_start__
ldr r2, =__bss_end__
movs r0, 0
.LC2:
cmp r1, r2
itt lt
strlt r0, [r1], #4
blt .LC2
#endif /* __STARTUP_CLEAR_BSS */
#ifndef __NO_SYSTEM_INIT #ifndef __NO_SYSTEM_INIT
ldr r0, =SystemInit bl SystemInit
blx r0
#endif #endif
ldr r0, =_start #ifndef __START
bx r0 #define __START _start
#endif
bl __START
.pool .pool
.size Reset_Handler, . - Reset_Handler .size Reset_Handler, . - Reset_Handler

View File

@ -1,32 +1,42 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved. * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
* *
* $Date: 29. November 2010 * $Date: 17. January 2013
* $Revision: V1.0.3 * $Revision: V1.4.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* *
* Title: math_helper.h * Title: math_helper.h
* *
*
* Description: Prototypes of all helper functions required. * Description: Prototypes of all helper functions required.
* *
* Target Processor: Cortex-M4/Cortex-M3 * Target Processor: Cortex-M4/Cortex-M3
* *
* Version 1.0.3 2010/11/29 * Redistribution and use in source and binary forms, with or without
* Re-organized the CMSIS folders and updated documentation. * modification, are permitted provided that the following conditions
* * are met:
* Version 1.0.2 2010/11/11 * - Redistributions of source code must retain the above copyright
* Documentation updated. * notice, this list of conditions and the following disclaimer.
* * - Redistributions in binary form must reproduce the above copyright
* Version 1.0.1 2010/10/05 * notice, this list of conditions and the following disclaimer in
* Production release and review comments incorporated. * the documentation and/or other materials provided with the
* * distribution.
* Version 1.0.0 2010/09/20 * - Neither the name of ARM LIMITED nor the names of its contributors
* Production release and review comments incorporated. * may be used to endorse or promote products derived from this
* * software without specific prior written permission.
* Version 0.0.7 2010/06/10 *
* Misra-C changes done * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* -------------------------------------------------------------------- */ * -------------------------------------------------------------------- */

View File

@ -1,8 +1,8 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved. * Copyright (C) 2010-2012 ARM Limited. All rights reserved.
* *
* $Date: 29. November 2010 * $Date: 17. January 2013
* $Revision: V1.0.3 * $Revision: V1.4.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* *
@ -12,20 +12,31 @@
* *
* Target Processor: Cortex-M4/Cortex-M3 * Target Processor: Cortex-M4/Cortex-M3
* *
* Version 1.0.3 2010/11/29 * Redistribution and use in source and binary forms, with or without
* Re-organized the CMSIS folders and updated documentation. * modification, are permitted provided that the following conditions
* * are met:
* Version 1.0.2 2010/11/11 * - Redistributions of source code must retain the above copyright
* Documentation updated. * notice, this list of conditions and the following disclaimer.
* * - Redistributions in binary form must reproduce the above copyright
* Version 1.0.1 2010/10/05 * notice, this list of conditions and the following disclaimer in
* Production release and review comments incorporated. * the documentation and/or other materials provided with the
* * distribution.
* Version 1.0.0 2010/09/20 * - Neither the name of ARM LIMITED nor the names of its contributors
* Production release and review comments incorporated. * may be used to endorse or promote products derived from this
* * software without specific prior written permission.
* Version 0.0.7 2010/06/10 *
* Misra-C changes done * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* -------------------------------------------------------------------- */ * -------------------------------------------------------------------- */
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------

View File

@ -2,25 +2,39 @@
* @file system_ARMCM0.c * @file system_ARMCM0.c
* @brief CMSIS Device System Source File for * @brief CMSIS Device System Source File for
* ARMCM0 Device Series * ARMCM0 Device Series
* @version V1.07 * @version V1.08
* @date 30. January 2012 * @date 23. November 2012
* *
* @note * @note
* Copyright (C) 2012 ARM Limited. All rights reserved.
*
* @par
* ARM Limited (ARM) is supplying this software for use with Cortex-M
* processor based microcontrollers. This file can be freely distributed
* within development tools that are supporting such ARM based processors.
*
* @par
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
* *
******************************************************************************/ ******************************************************************************/
/* Copyright (c) 2011 - 2012 ARM LIMITED
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
- Neither the name of ARM nor the names of its contributors may be used
to endorse or promote products derived from this software without
specific prior written permission.
*
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
---------------------------------------------------------------------------*/
#include "ARMCM0.h" #include "ARMCM0.h"

View File

@ -2,25 +2,39 @@
* @file system_ARMCM3.c * @file system_ARMCM3.c
* @brief CMSIS Device System Source File for * @brief CMSIS Device System Source File for
* ARMCM3 Device Series * ARMCM3 Device Series
* @version V1.07 * @version V1.08
* @date 30. January 2012 * @date 23. November 2012
* *
* @note * @note
* Copyright (C) 2012 ARM Limited. All rights reserved.
*
* @par
* ARM Limited (ARM) is supplying this software for use with Cortex-M
* processor based microcontrollers. This file can be freely distributed
* within development tools that are supporting such ARM based processors.
*
* @par
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
* *
******************************************************************************/ ******************************************************************************/
/* Copyright (c) 2011 - 2012 ARM LIMITED
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
- Neither the name of ARM nor the names of its contributors may be used
to endorse or promote products derived from this software without
specific prior written permission.
*
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
---------------------------------------------------------------------------*/
#include "ARMCM3.h" #include "ARMCM3.h"
@ -61,6 +75,10 @@ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */
void SystemInit (void) void SystemInit (void)
{ {
#ifdef UNALIGNED_SUPPORT_DISABLE
SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
#endif
SystemCoreClock = __SYSTEM_CLOCK; SystemCoreClock = __SYSTEM_CLOCK;
} }

View File

@ -2,25 +2,39 @@
* @file system_ARMCM4.c * @file system_ARMCM4.c
* @brief CMSIS Device System Source File for * @brief CMSIS Device System Source File for
* ARMCM4 Device Series * ARMCM4 Device Series
* @version V1.07 * @version V1.08
* @date 30. January 2012 * @date 23. November 2012
* *
* @note * @note
* Copyright (C) 2012 ARM Limited. All rights reserved.
*
* @par
* ARM Limited (ARM) is supplying this software for use with Cortex-M
* processor based microcontrollers. This file can be freely distributed
* within development tools that are supporting such ARM based processors.
*
* @par
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
* *
******************************************************************************/ ******************************************************************************/
/* Copyright (c) 2011 - 2012 ARM LIMITED
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
- Neither the name of ARM nor the names of its contributors may be used
to endorse or promote products derived from this software without
specific prior written permission.
*
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
---------------------------------------------------------------------------*/
#include "ARMCM4.h" #include "ARMCM4.h"
@ -65,6 +79,10 @@ void SystemInit (void)
(3UL << 11*2) ); /* set CP11 Full Access */ (3UL << 11*2) ); /* set CP11 Full Access */
#endif #endif
#ifdef UNALIGNED_SUPPORT_DISABLE
SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
#endif
SystemCoreClock = __SYSTEM_CLOCK; SystemCoreClock = __SYSTEM_CLOCK;
} }

View File

@ -75,7 +75,7 @@
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget> <IsCurrentTarget>1</IsCurrentTarget>
</OPTFL> </OPTFL>
<CpuCode>0</CpuCode> <CpuCode>255</CpuCode>
<DllOpt> <DllOpt>
<SimDllName>SARMCM3.DLL</SimDllName> <SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments></SimDllArguments> <SimDllArguments></SimDllArguments>
@ -103,6 +103,7 @@
<tRmem>1</tRmem> <tRmem>1</tRmem>
<tRfunc>0</tRfunc> <tRfunc>0</tRfunc>
<tRbox>1</tRbox> <tRbox>1</tRbox>
<tRtrace>0</tRtrace>
<sRunDeb>0</sRunDeb> <sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime> <sLrtime>0</sLrtime>
<nTsel>-1</nTsel> <nTsel>-1</nTsel>
@ -134,17 +135,18 @@
<Bp> <Bp>
<Number>0</Number> <Number>0</Number>
<Type>0</Type> <Type>0</Type>
<LineNumber>193</LineNumber> <LineNumber>210</LineNumber>
<EnabledFlag>1</EnabledFlag> <EnabledFlag>1</EnabledFlag>
<Address>464</Address> <Address>0</Address>
<ByteObject>0</ByteObject> <ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects> <ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject> <SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess> <BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount> <BreakIfRCount>0</BreakIfRCount>
<Filename></Filename> <Filename>C:\CMSIS\CMSIS_Setup\CMSIS\DSP_Lib\Examples\arm_class_marks_example\arm_class_marks_example_f32.c</Filename>
<ExecCommand></ExecCommand> <ExecCommand></ExecCommand>
<Expression>\\arm_cortexM0l_class_marks_example\../arm_class_marks_example_f32.c\193</Expression> <Expression></Expression>
</Bp> </Bp>
</Breakpoint> </Breakpoint>
<DebugFlag> <DebugFlag>
@ -173,6 +175,9 @@
<newCpu>0</newCpu> <newCpu>0</newCpu>
<uProt>0</uProt> <uProt>0</uProt>
</DebugFlag> </DebugFlag>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<LintExecutable></LintExecutable> <LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile> <LintConfigFile></LintConfigFile>
</TargetOption> </TargetOption>
@ -183,6 +188,7 @@
<tvExp>1</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File> <File>
<GroupNumber>1</GroupNumber> <GroupNumber>1</GroupNumber>
<FileNumber>1</FileNumber> <FileNumber>1</FileNumber>
@ -191,11 +197,13 @@
<Focus>0</Focus> <Focus>0</Focus>
<ColumnNumber>0</ColumnNumber> <ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<TopLine>1</TopLine> <TopLine>152</TopLine>
<CurrentLine>1</CurrentLine> <CurrentLine>210</CurrentLine>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\arm_class_marks_example_f32.c</PathWithFileName> <PathWithFileName>..\arm_class_marks_example_f32.c</PathWithFileName>
<FilenameWithoutPath>arm_class_marks_example_f32.c</FilenameWithoutPath> <FilenameWithoutPath>arm_class_marks_example_f32.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
</Group> </Group>
@ -204,6 +212,7 @@
<tvExp>1</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File> <File>
<GroupNumber>2</GroupNumber> <GroupNumber>2</GroupNumber>
<FileNumber>2</FileNumber> <FileNumber>2</FileNumber>
@ -212,11 +221,13 @@
<Focus>0</Focus> <Focus>0</Focus>
<ColumnNumber>0</ColumnNumber> <ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
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View File

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View File

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View File

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View File

@ -103,6 +103,7 @@
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View File

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View File

@ -75,7 +75,7 @@
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<BreakByAccess>0</BreakByAccess> <BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount> <BreakIfRCount>0</BreakIfRCount>
<Filename></Filename> <Filename>C:\CMSIS\CMSIS_Setup\CMSIS\DSP_Lib\Examples\arm_class_marks_example\arm_class_marks_example_f32.c</Filename>
<ExecCommand></ExecCommand> <ExecCommand></ExecCommand>
<Expression>\\arm_cortexM3l_class_marks_example\../arm_class_marks_example_f32.c\193</Expression> <Expression></Expression>
</Bp> </Bp>
</Breakpoint> </Breakpoint>
<DebugFlag> <DebugFlag>
@ -173,6 +175,9 @@
<newCpu>0</newCpu> <newCpu>0</newCpu>
<uProt>0</uProt> <uProt>0</uProt>
</DebugFlag> </DebugFlag>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<LintExecutable></LintExecutable> <LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile> <LintConfigFile></LintConfigFile>
</TargetOption> </TargetOption>
@ -183,6 +188,7 @@
<tvExp>1</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File> <File>
<GroupNumber>1</GroupNumber> <GroupNumber>1</GroupNumber>
<FileNumber>1</FileNumber> <FileNumber>1</FileNumber>
@ -191,11 +197,13 @@
<Focus>0</Focus> <Focus>0</Focus>
<ColumnNumber>0</ColumnNumber> <ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<TopLine>180</TopLine> <TopLine>152</TopLine>
<CurrentLine>193</CurrentLine> <CurrentLine>210</CurrentLine>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>../arm_class_marks_example_f32.c</PathWithFileName> <PathWithFileName>../arm_class_marks_example_f32.c</PathWithFileName>
<FilenameWithoutPath>arm_class_marks_example_f32.c</FilenameWithoutPath> <FilenameWithoutPath>arm_class_marks_example_f32.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
</Group> </Group>
@ -204,6 +212,7 @@
<tvExp>1</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File> <File>
<GroupNumber>2</GroupNumber> <GroupNumber>2</GroupNumber>
<FileNumber>2</FileNumber> <FileNumber>2</FileNumber>
@ -217,6 +226,8 @@
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>../../Common/system_ARMCM3.c</PathWithFileName> <PathWithFileName>../../Common/system_ARMCM3.c</PathWithFileName>
<FilenameWithoutPath>system_ARMCM3.c</FilenameWithoutPath> <FilenameWithoutPath>system_ARMCM3.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
<File> <File>
<GroupNumber>2</GroupNumber> <GroupNumber>2</GroupNumber>
@ -226,11 +237,13 @@
<Focus>0</Focus> <Focus>0</Focus>
<ColumnNumber>0</ColumnNumber> <ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<TopLine>138</TopLine> <TopLine>126</TopLine>
<CurrentLine>138</CurrentLine> <CurrentLine>142</CurrentLine>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>../../Common/GCC/startup_ARMCM3.S</PathWithFileName> <PathWithFileName>../../Common/GCC/startup_ARMCM3.S</PathWithFileName>
<FilenameWithoutPath>startup_ARMCM3.S</FilenameWithoutPath> <FilenameWithoutPath>startup_ARMCM3.S</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
</Group> </Group>
@ -239,6 +252,7 @@
<tvExp>0</tvExp> <tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg>
</Group> </Group>
</ProjectOpt> </ProjectOpt>

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@ -61,6 +61,8 @@
<UserProg2Name></UserProg2Name> <UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode> <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode> <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile> </BeforeCompile>
<BeforeMake> <BeforeMake>
<RunUserProg1>0</RunUserProg1> <RunUserProg1>0</RunUserProg1>
@ -134,6 +136,7 @@
<RestoreMemoryDisplay>1</RestoreMemoryDisplay> <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
<RestoreFunctions>0</RestoreFunctions> <RestoreFunctions>0</RestoreFunctions>
<RestoreToolbox>1</RestoreToolbox> <RestoreToolbox>1</RestoreToolbox>
<RestoreTracepoints>0</RestoreTracepoints>
</Target> </Target>
<RunDebugAfterBuild>0</RunDebugAfterBuild> <RunDebugAfterBuild>0</RunDebugAfterBuild>
<TargetSelection>-1</TargetSelection> <TargetSelection>-1</TargetSelection>

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@ -103,6 +103,7 @@
<tRmem>1</tRmem> <tRmem>1</tRmem>
<tRfunc>0</tRfunc> <tRfunc>0</tRfunc>
<tRbox>1</tRbox> <tRbox>1</tRbox>
<tRtrace>0</tRtrace>
<sRunDeb>0</sRunDeb> <sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime> <sLrtime>0</sLrtime>
<nTsel>-1</nTsel> <nTsel>-1</nTsel>
@ -130,24 +131,7 @@
<Name>-T0</Name> <Name>-T0</Name>
</SetRegEntry> </SetRegEntry>
</TargetDriverDllRegistry> </TargetDriverDllRegistry>
<Breakpoint> <Breakpoint/>
<Bp>
<Number>0</Number>
<Type>0</Type>
<LineNumber>193</LineNumber>
<EnabledFlag>1</EnabledFlag>
<Address>640</Address>
<ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount>
<Filename>C:\CMSIS\CMSIS_Setup\CMSIS\DSP_Lib\Examples\arm_class_marks_example\GCC\..\arm_class_marks_example_f32.c</Filename>
<ExecCommand></ExecCommand>
<Expression>\\arm_cortexM4lf_class_marks_example\../arm_class_marks_example_f32.c\193</Expression>
</Bp>
</Breakpoint>
<DebugFlag> <DebugFlag>
<trace>0</trace> <trace>0</trace>
<periodic>0</periodic> <periodic>0</periodic>
@ -174,6 +158,9 @@
<newCpu>0</newCpu> <newCpu>0</newCpu>
<uProt>0</uProt> <uProt>0</uProt>
</DebugFlag> </DebugFlag>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<LintExecutable></LintExecutable> <LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile> <LintConfigFile></LintConfigFile>
</TargetOption> </TargetOption>
@ -184,6 +171,7 @@
<tvExp>1</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File> <File>
<GroupNumber>1</GroupNumber> <GroupNumber>1</GroupNumber>
<FileNumber>1</FileNumber> <FileNumber>1</FileNumber>
@ -192,11 +180,13 @@
<Focus>0</Focus> <Focus>0</Focus>
<ColumnNumber>0</ColumnNumber> <ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<TopLine>135</TopLine> <TopLine>152</TopLine>
<CurrentLine>193</CurrentLine> <CurrentLine>210</CurrentLine>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>../arm_class_marks_example_f32.c</PathWithFileName> <PathWithFileName>../arm_class_marks_example_f32.c</PathWithFileName>
<FilenameWithoutPath>arm_class_marks_example_f32.c</FilenameWithoutPath> <FilenameWithoutPath>arm_class_marks_example_f32.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
</Group> </Group>
@ -205,6 +195,7 @@
<tvExp>1</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File> <File>
<GroupNumber>2</GroupNumber> <GroupNumber>2</GroupNumber>
<FileNumber>2</FileNumber> <FileNumber>2</FileNumber>
@ -218,6 +209,8 @@
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>../../Common/system_ARMCM4.c</PathWithFileName> <PathWithFileName>../../Common/system_ARMCM4.c</PathWithFileName>
<FilenameWithoutPath>system_ARMCM4.c</FilenameWithoutPath> <FilenameWithoutPath>system_ARMCM4.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
<File> <File>
<GroupNumber>2</GroupNumber> <GroupNumber>2</GroupNumber>
@ -227,11 +220,13 @@
<Focus>0</Focus> <Focus>0</Focus>
<ColumnNumber>0</ColumnNumber> <ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<TopLine>122</TopLine> <TopLine>126</TopLine>
<CurrentLine>138</CurrentLine> <CurrentLine>142</CurrentLine>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>../../Common/GCC/startup_ARMCM4.S</PathWithFileName> <PathWithFileName>../../Common/GCC/startup_ARMCM4.S</PathWithFileName>
<FilenameWithoutPath>startup_ARMCM4.S</FilenameWithoutPath> <FilenameWithoutPath>startup_ARMCM4.S</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
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@ -240,6 +235,7 @@
<tvExp>0</tvExp> <tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg>
</Group> </Group>
</ProjectOpt> </ProjectOpt>

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@ -61,6 +61,8 @@
<UserProg2Name></UserProg2Name> <UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode> <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode> <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile> </BeforeCompile>
<BeforeMake> <BeforeMake>
<RunUserProg1>0</RunUserProg1> <RunUserProg1>0</RunUserProg1>
@ -134,6 +136,7 @@
<RestoreMemoryDisplay>1</RestoreMemoryDisplay> <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
<RestoreFunctions>0</RestoreFunctions> <RestoreFunctions>0</RestoreFunctions>
<RestoreToolbox>1</RestoreToolbox> <RestoreToolbox>1</RestoreToolbox>
<RestoreTracepoints>0</RestoreTracepoints>
</Target> </Target>
<RunDebugAfterBuild>0</RunDebugAfterBuild> <RunDebugAfterBuild>0</RunDebugAfterBuild>
<TargetSelection>-1</TargetSelection> <TargetSelection>-1</TargetSelection>
@ -260,7 +263,7 @@
<wLevel>2</wLevel> <wLevel>2</wLevel>
<uThumb>1</uThumb> <uThumb>1</uThumb>
<VariousControls> <VariousControls>
<MiscControls>-mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -fno-strict-aliasing -ffunction-sections</MiscControls> <MiscControls>-mfpu=fpv4-sp-d16 -mfloat-abi=hard -fno-strict-aliasing -ffunction-sections</MiscControls>
<Define>ARM_MATH_CM4, __FPU_PRESENT = 1</Define> <Define>ARM_MATH_CM4, __FPU_PRESENT = 1</Define>
<Undefine></Undefine> <Undefine></Undefine>
<IncludePath>..\..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include</IncludePath> <IncludePath>..\..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include</IncludePath>
@ -287,7 +290,7 @@
<BSSAddressRange></BSSAddressRange> <BSSAddressRange></BSSAddressRange>
<IncludeLibs>arm_cortexM4lf_math</IncludeLibs> <IncludeLibs>arm_cortexM4lf_math</IncludeLibs>
<IncludeDir>..\..\..\..\Lib\GCC</IncludeDir> <IncludeDir>..\..\..\..\Lib\GCC</IncludeDir>
<Misc>-mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -Wl,--gc-sections</Misc> <Misc>-mfpu=fpv4-sp-d16 -mfloat-abi=hard -Wl,--gc-sections</Misc>
<ScatterFile>..\..\Common\GCC\ARMCMx.ld</ScatterFile> <ScatterFile>..\..\Common\GCC\ARMCMx.ld</ScatterFile>
</LDarm> </LDarm>
</TargetArm> </TargetArm>

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@ -1,49 +1,66 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved. * Copyright (C) 2010-2012 ARM Limited. All rights reserved.
* *
* $Date: 29. November 2010 * $Date: 17. January 2013
* $Revision: V1.0.3 * $Revision: V1.4.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_class_marks_example_f32.c * Title: arm_class_marks_example_f32.c
* *
* Description: Example code to calculate Minimum, Maximum * Description: Example code to calculate Minimum, Maximum
* Mean, std and variance of marks obtained in a class * Mean, std and variance of marks obtained in a class
* *
* Target Processor: Cortex-M4/Cortex-M3 * Target Processor: Cortex-M4/Cortex-M3
* *
* Version 1.0.3 2010/11/29 * Redistribution and use in source and binary forms, with or without
* Re-organized the CMSIS folders and updated documentation. * modification, are permitted provided that the following conditions
* * are met:
* Version 1.0.1 2010/10/05 KK * - Redistributions of source code must retain the above copyright
* Production release and review comments incorporated. * notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* - Neither the name of ARM LIMITED nor the names of its contributors
* may be used to endorse or promote products derived from this
* software without specific prior written permission.
* *
* Version 1.0.0 2010/09/20 KK * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* Production release and review comments incorporated. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* ------------------------------------------------------------------- */ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
/** * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* @ingroup groupExamples * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
*/ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
/** * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* @defgroup ClassMarks Class Marks Example * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* -------------------------------------------------------------------- */
/**
* @ingroup groupExamples
*/
/**
* @defgroup ClassMarks Class Marks Example
* *
* \par Description: * \par Description:
* \par * \par
* Demonstrates the use the Maximum, Minimum, Mean, Standard Deviation, Variance * Demonstrates the use the Maximum, Minimum, Mean, Standard Deviation, Variance
* and Matrix functions to calculate statistical values of marks obtained in a class. * and Matrix functions to calculate statistical values of marks obtained in a class.
* *
* \note This example also demonstrates the usage of static initialization. * \note This example also demonstrates the usage of static initialization.
* *
* \par Variables Description: * \par Variables Description:
* \par * \par
* \li \c testMarks_f32 points to the marks scored by 20 students in 4 subjects * \li \c testMarks_f32 points to the marks scored by 20 students in 4 subjects
* \li \c max_marks Maximum of all marks * \li \c max_marks Maximum of all marks
* \li \c min_marks Minimum of all marks * \li \c min_marks Minimum of all marks
* \li \c mean Mean of all marks * \li \c mean Mean of all marks
* \li \c var Variance of the marks * \li \c var Variance of the marks
* \li \c std Standard deviation of the marks * \li \c std Standard deviation of the marks
* \li \c numStudents Total number of students in the class * \li \c numStudents Total number of students in the class
* *
* \par CMSIS DSP Software Library Functions Used: * \par CMSIS DSP Software Library Functions Used:
@ -55,140 +72,140 @@
* - arm_mean_f32() * - arm_mean_f32()
* - arm_std_f32() * - arm_std_f32()
* - arm_var_f32() * - arm_var_f32()
* *
* <b> Refer </b> * <b> Refer </b>
* \link arm_class_marks_example_f32.c \endlink * \link arm_class_marks_example_f32.c \endlink
* *
*/ */
/** \example arm_class_marks_example_f32.c /** \example arm_class_marks_example_f32.c
*/ */
#include "arm_math.h" #include "arm_math.h"
#define USE_STATIC_INIT #define USE_STATIC_INIT
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
** Global defines ** Global defines
** ------------------------------------------------------------------- */ ** ------------------------------------------------------------------- */
#define TEST_LENGTH_SAMPLES (20*4) #define TEST_LENGTH_SAMPLES (20*4)
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
** List of Marks scored by 20 students for 4 subjects ** List of Marks scored by 20 students for 4 subjects
** ------------------------------------------------------------------- */ ** ------------------------------------------------------------------- */
const float32_t testMarks_f32[TEST_LENGTH_SAMPLES] = const float32_t testMarks_f32[TEST_LENGTH_SAMPLES] =
{ {
42.000000, 37.000000, 81.000000, 28.000000, 42.000000, 37.000000, 81.000000, 28.000000,
83.000000, 72.000000, 36.000000, 38.000000, 83.000000, 72.000000, 36.000000, 38.000000,
32.000000, 51.000000, 63.000000, 64.000000, 32.000000, 51.000000, 63.000000, 64.000000,
97.000000, 82.000000, 95.000000, 90.000000, 97.000000, 82.000000, 95.000000, 90.000000,
66.000000, 51.000000, 54.000000, 42.000000, 66.000000, 51.000000, 54.000000, 42.000000,
67.000000, 56.000000, 45.000000, 57.000000, 67.000000, 56.000000, 45.000000, 57.000000,
67.000000, 69.000000, 35.000000, 52.000000, 67.000000, 69.000000, 35.000000, 52.000000,
29.000000, 81.000000, 58.000000, 47.000000, 29.000000, 81.000000, 58.000000, 47.000000,
38.000000, 76.000000, 100.000000, 29.000000, 38.000000, 76.000000, 100.000000, 29.000000,
33.000000, 47.000000, 29.000000, 50.000000, 33.000000, 47.000000, 29.000000, 50.000000,
34.000000, 41.000000, 61.000000, 46.000000, 34.000000, 41.000000, 61.000000, 46.000000,
52.000000, 50.000000, 48.000000, 36.000000, 52.000000, 50.000000, 48.000000, 36.000000,
47.000000, 55.000000, 44.000000, 40.000000, 47.000000, 55.000000, 44.000000, 40.000000,
100.000000, 94.000000, 84.000000, 37.000000, 100.000000, 94.000000, 84.000000, 37.000000,
32.000000, 71.000000, 47.000000, 77.000000, 32.000000, 71.000000, 47.000000, 77.000000,
31.000000, 50.000000, 49.000000, 35.000000, 31.000000, 50.000000, 49.000000, 35.000000,
63.000000, 67.000000, 40.000000, 31.000000, 63.000000, 67.000000, 40.000000, 31.000000,
29.000000, 68.000000, 61.000000, 38.000000, 29.000000, 68.000000, 61.000000, 38.000000,
31.000000, 28.000000, 28.000000, 76.000000, 31.000000, 28.000000, 28.000000, 76.000000,
55.000000, 33.000000, 29.000000, 39.000000 55.000000, 33.000000, 29.000000, 39.000000
}; };
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Number of subjects X 1 * Number of subjects X 1
* ------------------------------------------------------------------- */ * ------------------------------------------------------------------- */
const float32_t testUnity_f32[4] = const float32_t testUnity_f32[4] =
{ {
1.000, 1.000, 1.000, 1.000 1.000, 1.000, 1.000, 1.000
}; };
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
** f32 Output buffer ** f32 Output buffer
** ------------------------------------------------------------------- */ ** ------------------------------------------------------------------- */
static float32_t testOutput[TEST_LENGTH_SAMPLES]; static float32_t testOutput[TEST_LENGTH_SAMPLES];
/* ------------------------------------------------------------------ /* ------------------------------------------------------------------
* Global defines * Global defines
*------------------------------------------------------------------- */ *------------------------------------------------------------------- */
#define NUMSTUDENTS 20 #define NUMSTUDENTS 20
#define NUMSUBJECTS 4 #define NUMSUBJECTS 4
/* ------------------------------------------------------------------ /* ------------------------------------------------------------------
* Global variables * Global variables
*------------------------------------------------------------------- */ *------------------------------------------------------------------- */
uint32_t numStudents = 20; uint32_t numStudents = 20;
uint32_t numSubjects = 4; uint32_t numSubjects = 4;
float32_t max_marks, min_marks, mean, std, var; float32_t max_marks, min_marks, mean, std, var;
uint32_t student_num; uint32_t student_num;
/* ---------------------------------------------------------------------------------- /* ----------------------------------------------------------------------------------
* Main f32 test function. It returns maximum marks secured and student number * Main f32 test function. It returns maximum marks secured and student number
* ------------------------------------------------------------------------------- */ * ------------------------------------------------------------------------------- */
int32_t main() int32_t main()
{ {
#ifndef USE_STATIC_INIT #ifndef USE_STATIC_INIT
arm_matrix_instance_f32 srcA; arm_matrix_instance_f32 srcA;
arm_matrix_instance_f32 srcB; arm_matrix_instance_f32 srcB;
arm_matrix_instance_f32 dstC; arm_matrix_instance_f32 dstC;
/* Input and output matrices initializations */ /* Input and output matrices initializations */
arm_mat_init_f32(&srcA, numStudents, numSubjects, (float32_t *)testMarks_f32); arm_mat_init_f32(&srcA, numStudents, numSubjects, (float32_t *)testMarks_f32);
arm_mat_init_f32(&srcB, numSubjects, 1, (float32_t *)testUnity_f32); arm_mat_init_f32(&srcB, numSubjects, 1, (float32_t *)testUnity_f32);
arm_mat_init_f32(&dstC, numStudents, 1, testOutput); arm_mat_init_f32(&dstC, numStudents, 1, testOutput);
#else #else
/* Static Initializations of Input and output matrix sizes and array */ /* Static Initializations of Input and output matrix sizes and array */
arm_matrix_instance_f32 srcA = {NUMSTUDENTS, NUMSUBJECTS, (float32_t *)testMarks_f32}; arm_matrix_instance_f32 srcA = {NUMSTUDENTS, NUMSUBJECTS, (float32_t *)testMarks_f32};
arm_matrix_instance_f32 srcB = {NUMSUBJECTS, 1, (float32_t *)testUnity_f32}; arm_matrix_instance_f32 srcB = {NUMSUBJECTS, 1, (float32_t *)testUnity_f32};
arm_matrix_instance_f32 dstC = {NUMSTUDENTS, 1, testOutput}; arm_matrix_instance_f32 dstC = {NUMSTUDENTS, 1, testOutput};
#endif #endif
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
*Call the Matrix multiplication process function *Call the Matrix multiplication process function
* ------------------------------------------------------------------- */ * ------------------------------------------------------------------- */
arm_mat_mult_f32(&srcA, &srcB, &dstC); arm_mat_mult_f32(&srcA, &srcB, &dstC);
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
** Call the Max function to calculate max marks among numStudents ** Call the Max function to calculate max marks among numStudents
** ------------------------------------------------------------------- */ ** ------------------------------------------------------------------- */
arm_max_f32(testOutput, numStudents, &max_marks, &student_num); arm_max_f32(testOutput, numStudents, &max_marks, &student_num);
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
** Call the Min function to calculate min marks among numStudents ** Call the Min function to calculate min marks among numStudents
** ------------------------------------------------------------------- */ ** ------------------------------------------------------------------- */
arm_min_f32(testOutput, numStudents, &min_marks, &student_num); arm_min_f32(testOutput, numStudents, &min_marks, &student_num);
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
** Call the Mean function to calculate mean ** Call the Mean function to calculate mean
** ------------------------------------------------------------------- */ ** ------------------------------------------------------------------- */
arm_mean_f32(testOutput, numStudents, &mean); arm_mean_f32(testOutput, numStudents, &mean);
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
** Call the std function to calculate standard deviation ** Call the std function to calculate standard deviation
** ------------------------------------------------------------------- */ ** ------------------------------------------------------------------- */
arm_std_f32(testOutput, numStudents, &std); arm_std_f32(testOutput, numStudents, &std);
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
** Call the var function to calculate variance ** Call the var function to calculate variance
** ------------------------------------------------------------------- */ ** ------------------------------------------------------------------- */
arm_var_f32(testOutput, numStudents, &var); arm_var_f32(testOutput, numStudents, &var);
while(1); /* main function does not return */ while(1); /* main function does not return */
} }

View File

@ -75,7 +75,7 @@
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget> <IsCurrentTarget>1</IsCurrentTarget>
</OPTFL> </OPTFL>
<CpuCode>0</CpuCode> <CpuCode>255</CpuCode>
<DllOpt> <DllOpt>
<SimDllName>SARMCM3.DLL</SimDllName> <SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments></SimDllArguments> <SimDllArguments></SimDllArguments>
@ -103,6 +103,7 @@
<tRmem>1</tRmem> <tRmem>1</tRmem>
<tRfunc>0</tRfunc> <tRfunc>0</tRfunc>
<tRbox>1</tRbox> <tRbox>1</tRbox>
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<sLrtime>0</sLrtime> <sLrtime>0</sLrtime>
<nTsel>-1</nTsel> <nTsel>-1</nTsel>
@ -134,32 +135,34 @@
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<Number>0</Number> <Number>0</Number>
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<BreakIfRCount>1</BreakIfRCount> <BreakIfRCount>0</BreakIfRCount>
<Filename></Filename> <Filename>C:\CMSIS\CMSIS_Setup\CMSIS\DSP_Lib\Examples\arm_convolution_example\arm_convolution_example_f32.c</Filename>
<ExecCommand></ExecCommand> <ExecCommand></ExecCommand>
<Expression>\\arm_cortexM0l_convolution_example\../arm_convolution_example_f32.c\228</Expression> <Expression></Expression>
</Bp> </Bp>
<Bp> <Bp>
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<BreakIfRCount>1</BreakIfRCount> <BreakIfRCount>0</BreakIfRCount>
<Filename></Filename> <Filename>C:\CMSIS\CMSIS_Setup\CMSIS\DSP_Lib\Examples\arm_convolution_example\arm_convolution_example_f32.c</Filename>
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@ -188,6 +191,9 @@
<newCpu>0</newCpu> <newCpu>0</newCpu>
<uProt>0</uProt> <uProt>0</uProt>
</DebugFlag> </DebugFlag>
<Tracepoint>
<THDelay>0</THDelay>
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<LintExecutable></LintExecutable> <LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile> <LintConfigFile></LintConfigFile>
</TargetOption> </TargetOption>
@ -198,6 +204,7 @@
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@ -206,11 +213,13 @@
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<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
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<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\arm_convolution_example_f32.c</PathWithFileName> <PathWithFileName>..\arm_convolution_example_f32.c</PathWithFileName>
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<File> <File>
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@ -225,6 +234,8 @@
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\..\Common\Source\math_helper.c</PathWithFileName> <PathWithFileName>..\..\Common\Source\math_helper.c</PathWithFileName>
<FilenameWithoutPath>math_helper.c</FilenameWithoutPath> <FilenameWithoutPath>math_helper.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
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@ -233,6 +244,7 @@
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@ -241,11 +253,13 @@
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<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\..\Common\ARM\startup_ARMCM0.s</PathWithFileName> <PathWithFileName>..\..\Common\ARM\startup_ARMCM0.s</PathWithFileName>
<FilenameWithoutPath>startup_ARMCM0.s</FilenameWithoutPath> <FilenameWithoutPath>startup_ARMCM0.s</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
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<File> <File>
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@ -260,6 +274,8 @@
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\..\Common\system_ARMCM0.c</PathWithFileName> <PathWithFileName>..\..\Common\system_ARMCM0.c</PathWithFileName>
<FilenameWithoutPath>system_ARMCM0.c</FilenameWithoutPath> <FilenameWithoutPath>system_ARMCM0.c</FilenameWithoutPath>
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@ -268,6 +284,7 @@
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@ -281,6 +298,8 @@
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View File

@ -61,6 +61,8 @@
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<UserProg1Dos16Mode>0</UserProg1Dos16Mode> <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode> <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile> </BeforeCompile>
<BeforeMake> <BeforeMake>
<RunUserProg1>0</RunUserProg1> <RunUserProg1>0</RunUserProg1>
@ -134,6 +136,7 @@
<RestoreMemoryDisplay>1</RestoreMemoryDisplay> <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
<RestoreFunctions>0</RestoreFunctions> <RestoreFunctions>0</RestoreFunctions>
<RestoreToolbox>1</RestoreToolbox> <RestoreToolbox>1</RestoreToolbox>
<RestoreTracepoints>0</RestoreTracepoints>
</Target> </Target>
<RunDebugAfterBuild>0</RunDebugAfterBuild> <RunDebugAfterBuild>0</RunDebugAfterBuild>
<TargetSelection>-1</TargetSelection> <TargetSelection>-1</TargetSelection>
@ -342,6 +345,7 @@
<Rwpi>0</Rwpi> <Rwpi>0</Rwpi>
<wLevel>0</wLevel> <wLevel>0</wLevel>
<uThumb>0</uThumb> <uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<VariousControls> <VariousControls>
<MiscControls></MiscControls> <MiscControls></MiscControls>
<Define>ARM_MATH_CM0</Define> <Define>ARM_MATH_CM0</Define>
@ -357,6 +361,7 @@
<SplitLS>0</SplitLS> <SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk> <SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn> <NoWarn>0</NoWarn>
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<VariousControls> <VariousControls>
<MiscControls></MiscControls> <MiscControls></MiscControls>
<Define></Define> <Define></Define>

View File

@ -103,6 +103,7 @@
<tRmem>1</tRmem> <tRmem>1</tRmem>
<tRfunc>0</tRfunc> <tRfunc>0</tRfunc>
<tRbox>1</tRbox> <tRbox>1</tRbox>
<tRtrace>0</tRtrace>
<sRunDeb>0</sRunDeb> <sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime> <sLrtime>0</sLrtime>
<nTsel>-1</nTsel> <nTsel>-1</nTsel>
@ -134,32 +135,34 @@
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<BreakByAccess>0</BreakByAccess> <BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount> <BreakIfRCount>0</BreakIfRCount>
<Filename></Filename> <Filename>C:\CMSIS\CMSIS_Setup\CMSIS\DSP_Lib\Examples\arm_convolution_example\arm_convolution_example_f32.c</Filename>
<ExecCommand></ExecCommand> <ExecCommand></ExecCommand>
<Expression>\\arm_cortexM3l_convolution_example\../arm_convolution_example_f32.c\225</Expression> <Expression></Expression>
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<Bp> <Bp>
<Number>1</Number> <Number>1</Number>
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<ManyObjects>0</ManyObjects> <ManyObjects>0</ManyObjects>
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<BreakByAccess>0</BreakByAccess> <BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount> <BreakIfRCount>0</BreakIfRCount>
<Filename></Filename> <Filename>C:\CMSIS\CMSIS_Setup\CMSIS\DSP_Lib\Examples\arm_convolution_example\arm_convolution_example_f32.c</Filename>
<ExecCommand></ExecCommand> <ExecCommand></ExecCommand>
<Expression>\\arm_cortexM3l_convolution_example\../arm_convolution_example_f32.c\228</Expression> <Expression></Expression>
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</Breakpoint> </Breakpoint>
<DebugFlag> <DebugFlag>
@ -188,6 +191,9 @@
<newCpu>0</newCpu> <newCpu>0</newCpu>
<uProt>0</uProt> <uProt>0</uProt>
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<Tracepoint>
<THDelay>0</THDelay>
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@ -198,6 +204,7 @@
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@ -206,11 +213,13 @@
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View File

@ -61,6 +61,8 @@
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@ -134,6 +136,7 @@
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@ -357,6 +361,7 @@
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View File

@ -103,6 +103,7 @@
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@ -188,6 +191,9 @@
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View File

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View File

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View File

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<tRbox>1</tRbox> <tRbox>1</tRbox>
<tRtrace>0</tRtrace>
<sRunDeb>0</sRunDeb> <sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime> <sLrtime>0</sLrtime>
<nTsel>-1</nTsel> <nTsel>-1</nTsel>
@ -134,34 +135,34 @@
<Bp> <Bp>
<Number>0</Number> <Number>0</Number>
<Type>0</Type> <Type>0</Type>
<LineNumber>225</LineNumber> <LineNumber>241</LineNumber>
<EnabledFlag>1</EnabledFlag> <EnabledFlag>1</EnabledFlag>
<Address>748</Address> <Address>0</Address>
<ByteObject>0</ByteObject> <ByteObject>0</ByteObject>
<HtxType>0</HtxType> <HtxType>0</HtxType>
<ManyObjects>0</ManyObjects> <ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject> <SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess> <BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount> <BreakIfRCount>0</BreakIfRCount>
<Filename>C:\CMSIS\CMSIS_Setup\CMSIS\DSP_Lib\Examples\arm_convolution_example\GCC\..\arm_convolution_example_f32.c</Filename> <Filename>C:\CMSIS\CMSIS_Setup\CMSIS\DSP_Lib\Examples\arm_convolution_example\arm_convolution_example_f32.c</Filename>
<ExecCommand></ExecCommand> <ExecCommand></ExecCommand>
<Expression>\\arm_cortexM4lf_convolution_example\../arm_convolution_example_f32.c\225</Expression> <Expression></Expression>
</Bp> </Bp>
<Bp> <Bp>
<Number>1</Number> <Number>1</Number>
<Type>0</Type> <Type>0</Type>
<LineNumber>228</LineNumber> <LineNumber>244</LineNumber>
<EnabledFlag>1</EnabledFlag> <EnabledFlag>1</EnabledFlag>
<Address>750</Address> <Address>0</Address>
<ByteObject>0</ByteObject> <ByteObject>0</ByteObject>
<HtxType>0</HtxType> <HtxType>0</HtxType>
<ManyObjects>0</ManyObjects> <ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject> <SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess> <BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount> <BreakIfRCount>0</BreakIfRCount>
<Filename>C:\CMSIS\CMSIS_Setup\CMSIS\DSP_Lib\Examples\arm_convolution_example\GCC\..\arm_convolution_example_f32.c</Filename> <Filename>C:\CMSIS\CMSIS_Setup\CMSIS\DSP_Lib\Examples\arm_convolution_example\arm_convolution_example_f32.c</Filename>
<ExecCommand></ExecCommand> <ExecCommand></ExecCommand>
<Expression>\\arm_cortexM4lf_convolution_example\../arm_convolution_example_f32.c\228</Expression> <Expression></Expression>
</Bp> </Bp>
</Breakpoint> </Breakpoint>
<DebugFlag> <DebugFlag>
@ -190,6 +191,9 @@
<newCpu>0</newCpu> <newCpu>0</newCpu>
<uProt>0</uProt> <uProt>0</uProt>
</DebugFlag> </DebugFlag>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<LintExecutable></LintExecutable> <LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile> <LintConfigFile></LintConfigFile>
</TargetOption> </TargetOption>
@ -200,6 +204,7 @@
<tvExp>1</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File> <File>
<GroupNumber>1</GroupNumber> <GroupNumber>1</GroupNumber>
<FileNumber>1</FileNumber> <FileNumber>1</FileNumber>
@ -208,11 +213,13 @@
<Focus>0</Focus> <Focus>0</Focus>
<ColumnNumber>0</ColumnNumber> <ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<TopLine>173</TopLine> <TopLine>188</TopLine>
<CurrentLine>228</CurrentLine> <CurrentLine>244</CurrentLine>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>../arm_convolution_example_f32.c</PathWithFileName> <PathWithFileName>../arm_convolution_example_f32.c</PathWithFileName>
<FilenameWithoutPath>arm_convolution_example_f32.c</FilenameWithoutPath> <FilenameWithoutPath>arm_convolution_example_f32.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
<File> <File>
<GroupNumber>1</GroupNumber> <GroupNumber>1</GroupNumber>
@ -227,6 +234,8 @@
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>../../Common/Source/math_helper.c</PathWithFileName> <PathWithFileName>../../Common/Source/math_helper.c</PathWithFileName>
<FilenameWithoutPath>math_helper.c</FilenameWithoutPath> <FilenameWithoutPath>math_helper.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
</Group> </Group>
@ -235,6 +244,7 @@
<tvExp>1</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File> <File>
<GroupNumber>2</GroupNumber> <GroupNumber>2</GroupNumber>
<FileNumber>3</FileNumber> <FileNumber>3</FileNumber>
@ -243,11 +253,13 @@
<Focus>0</Focus> <Focus>0</Focus>
<ColumnNumber>0</ColumnNumber> <ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<TopLine>122</TopLine> <TopLine>126</TopLine>
<CurrentLine>138</CurrentLine> <CurrentLine>142</CurrentLine>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>../../Common/GCC/startup_ARMCM4.S</PathWithFileName> <PathWithFileName>../../Common/GCC/startup_ARMCM4.S</PathWithFileName>
<FilenameWithoutPath>startup_ARMCM4.S</FilenameWithoutPath> <FilenameWithoutPath>startup_ARMCM4.S</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
<File> <File>
<GroupNumber>2</GroupNumber> <GroupNumber>2</GroupNumber>
@ -262,6 +274,8 @@
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>../../Common/system_ARMCM4.c</PathWithFileName> <PathWithFileName>../../Common/system_ARMCM4.c</PathWithFileName>
<FilenameWithoutPath>system_ARMCM4.c</FilenameWithoutPath> <FilenameWithoutPath>system_ARMCM4.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
</Group> </Group>
@ -270,6 +284,7 @@
<tvExp>0</tvExp> <tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg>
</Group> </Group>
</ProjectOpt> </ProjectOpt>

View File

@ -61,6 +61,8 @@
<UserProg2Name></UserProg2Name> <UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode> <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode> <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile> </BeforeCompile>
<BeforeMake> <BeforeMake>
<RunUserProg1>0</RunUserProg1> <RunUserProg1>0</RunUserProg1>
@ -134,6 +136,7 @@
<RestoreMemoryDisplay>1</RestoreMemoryDisplay> <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
<RestoreFunctions>0</RestoreFunctions> <RestoreFunctions>0</RestoreFunctions>
<RestoreToolbox>1</RestoreToolbox> <RestoreToolbox>1</RestoreToolbox>
<RestoreTracepoints>0</RestoreTracepoints>
</Target> </Target>
<RunDebugAfterBuild>0</RunDebugAfterBuild> <RunDebugAfterBuild>0</RunDebugAfterBuild>
<TargetSelection>-1</TargetSelection> <TargetSelection>-1</TargetSelection>
@ -260,7 +263,7 @@
<wLevel>2</wLevel> <wLevel>2</wLevel>
<uThumb>1</uThumb> <uThumb>1</uThumb>
<VariousControls> <VariousControls>
<MiscControls>-mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -fno-strict-aliasing -ffunction-sections</MiscControls> <MiscControls>-mfpu=fpv4-sp-d16 -mfloat-abi=hard -fno-strict-aliasing -ffunction-sections</MiscControls>
<Define>ARM_MATH_CM4, __FPU_PRESENT = 1</Define> <Define>ARM_MATH_CM4, __FPU_PRESENT = 1</Define>
<Undefine></Undefine> <Undefine></Undefine>
<IncludePath>..\..\Common\Include;..\..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include</IncludePath> <IncludePath>..\..\Common\Include;..\..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include</IncludePath>
@ -287,7 +290,7 @@
<BSSAddressRange></BSSAddressRange> <BSSAddressRange></BSSAddressRange>
<IncludeLibs>arm_cortexM4lf_math</IncludeLibs> <IncludeLibs>arm_cortexM4lf_math</IncludeLibs>
<IncludeDir>..\..\..\..\Lib\GCC</IncludeDir> <IncludeDir>..\..\..\..\Lib\GCC</IncludeDir>
<Misc>-mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -Wl,--gc-sections</Misc> <Misc>-mfpu=fpv4-sp-d16 -mfloat-abi=hard -Wl,--gc-sections</Misc>
<ScatterFile>..\..\Common\GCC\ARMCMx.ld</ScatterFile> <ScatterFile>..\..\Common\GCC\ARMCMx.ld</ScatterFile>
</LDarm> </LDarm>
</TargetArm> </TargetArm>

View File

@ -1,64 +1,80 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved. * Copyright (C) 2010-2012 ARM Limited. All rights reserved.
*
* $Date: 29. November 2010
* $Revision: V1.0.3
*
* Project: CMSIS DSP Library
* Title: arm_convolution_example_f32.c
*
* Description: Example code demonstrating Convolution of two input signals using fft.
*
* Target Processor: Cortex-M4/Cortex-M3
* *
* $Date: 17. January 2013
* $Revision: V1.4.0
* *
* Version 1.0.3 2010/11/29 * Project: CMSIS DSP Library
* Re-organized the CMSIS folders and updated documentation. * Title: arm_convolution_example_f32.c
*
* Version 1.0.1 2010/10/05 KK
* Production release and review comments incorporated.
* *
* Version 1.0.0 2010/09/20 KK * Description: Example code demonstrating Convolution of two input signals using fft.
* Production release and review comments incorporated. *
* ------------------------------------------------------------------- */ * Target Processor: Cortex-M4/Cortex-M3
*
/** * Redistribution and use in source and binary forms, with or without
* @ingroup groupExamples * modification, are permitted provided that the following conditions
*/ * are met:
* - Redistributions of source code must retain the above copyright
/** * notice, this list of conditions and the following disclaimer.
* @defgroup ConvolutionExample Convolution Example * - Redistributions in binary form must reproduce the above copyright
* * notice, this list of conditions and the following disclaimer in
* \par Description: * the documentation and/or other materials provided with the
* distribution.
* - Neither the name of ARM LIMITED nor the names of its contributors
* may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* -------------------------------------------------------------------- */
/**
* @ingroup groupExamples
*/
/**
* @defgroup ConvolutionExample Convolution Example
*
* \par Description:
* \par * \par
* Demonstrates the convolution theorem with the use of the Complex FFT, Complex-by-Complex * Demonstrates the convolution theorem with the use of the Complex FFT, Complex-by-Complex
* Multiplication, and Support Functions. * Multiplication, and Support Functions.
* *
* \par Algorithm: * \par Algorithm:
* \par * \par
* The convolution theorem states that convolution in the time domain corresponds to * The convolution theorem states that convolution in the time domain corresponds to
* multiplication in the frequency domain. Therefore, the Fourier transform of the convoution of * multiplication in the frequency domain. Therefore, the Fourier transform of the convoution of
* two signals is equal to the product of their individual Fourier transforms. * two signals is equal to the product of their individual Fourier transforms.
* The Fourier transform of a signal can be evaluated efficiently using the Fast Fourier Transform (FFT). * The Fourier transform of a signal can be evaluated efficiently using the Fast Fourier Transform (FFT).
* \par * \par
* Two input signals, <code>a[n]</code> and <code>b[n]</code>, with lengths \c n1 and \c n2 respectively, * Two input signals, <code>a[n]</code> and <code>b[n]</code>, with lengths \c n1 and \c n2 respectively,
* are zero padded so that their lengths become \c N, which is greater than or equal to <code>(n1+n2-1)</code> * are zero padded so that their lengths become \c N, which is greater than or equal to <code>(n1+n2-1)</code>
* and is a power of 4 as FFT implementation is radix-4. * and is a power of 4 as FFT implementation is radix-4.
* The convolution of <code>a[n]</code> and <code>b[n]</code> is obtained by taking the FFT of the input * The convolution of <code>a[n]</code> and <code>b[n]</code> is obtained by taking the FFT of the input
* signals, multiplying the Fourier transforms of the two signals, and taking the inverse FFT of * signals, multiplying the Fourier transforms of the two signals, and taking the inverse FFT of
* the multiplied result. * the multiplied result.
* \par * \par
* This is denoted by the following equations: * This is denoted by the following equations:
* <pre> A[k] = FFT(a[n],N) * <pre> A[k] = FFT(a[n],N)
* B[k] = FFT(b[n],N) * B[k] = FFT(b[n],N)
* conv(a[n], b[n]) = IFFT(A[k] * B[k], N)</pre> * conv(a[n], b[n]) = IFFT(A[k] * B[k], N)</pre>
* where <code>A[k]</code> and <code>B[k]</code> are the N-point FFTs of the signals <code>a[n]</code> * where <code>A[k]</code> and <code>B[k]</code> are the N-point FFTs of the signals <code>a[n]</code>
* and <code>b[n]</code> respectively. * and <code>b[n]</code> respectively.
* The length of the convolved signal is <code>(n1+n2-1)</code>. * The length of the convolved signal is <code>(n1+n2-1)</code>.
* *
* \par Block Diagram: * \par Block Diagram:
* \par * \par
* \image html Convolution.gif * \image html Convolution.gif
* *
* \par Variables Description: * \par Variables Description:
* \par * \par
@ -68,165 +84,164 @@
* \li \c srcBLen length of the second input sequence * \li \c srcBLen length of the second input sequence
* \li \c outLen length of convolution output sequence, <code>(srcALen + srcBLen - 1)</code> * \li \c outLen length of convolution output sequence, <code>(srcALen + srcBLen - 1)</code>
* \li \c AxB points to the output array where the product of individual FFTs of inputs is stored. * \li \c AxB points to the output array where the product of individual FFTs of inputs is stored.
* *
* \par CMSIS DSP Software Library Functions Used: * \par CMSIS DSP Software Library Functions Used:
* \par * \par
* - arm_fill_f32() * - arm_fill_f32()
* - arm_copy_f32() * - arm_copy_f32()
* - arm_cfft_radix4_init_f32() * - arm_cfft_radix4_init_f32()
* - arm_cfft_radix4_f32() * - arm_cfft_radix4_f32()
* - arm_cmplx_mult_cmplx_f32() * - arm_cmplx_mult_cmplx_f32()
* *
* <b> Refer </b> * <b> Refer </b>
* \link arm_convolution_example_f32.c \endlink * \link arm_convolution_example_f32.c \endlink
* *
*/ */
/** \example arm_convolution_example_f32.c
*/
#include "arm_math.h"
#include "math_helper.h"
/* ----------------------------------------------------------------------
* Defines each of the tests performed
* ------------------------------------------------------------------- */
#define MAX_BLOCKSIZE 128
#define DELTA (0.000001f)
#define SNR_THRESHOLD 90
/* ----------------------------------------------------------------------
* Declare I/O buffers
* ------------------------------------------------------------------- */
float32_t Ak[MAX_BLOCKSIZE]; /* Input A */
float32_t Bk[MAX_BLOCKSIZE]; /* Input B */
float32_t AxB[MAX_BLOCKSIZE * 2]; /* Output */
/* ----------------------------------------------------------------------
* Test input data for Floating point Convolution example for 32-blockSize
* Generated by the MATLAB randn() function
* ------------------------------------------------------------------- */
float32_t testInputA_f32[64] =
{
-0.808920, 1.357369, 1.180861, -0.504544, 1.762637, -0.703285,
1.696966, 0.620571, -0.151093, -0.100235, -0.872382, -0.403579,
-0.860749, -0.382648, -1.052338, 0.128113, -0.646269, 1.093377,
-2.209198, 0.471706, 0.408901, 1.266242, 0.598252, 1.176827,
-0.203421, 0.213596, -0.851964, -0.466958, 0.021841, -0.698938,
-0.604107, 0.461778, -0.318219, 0.942520, 0.577585, 0.417619,
0.614665, 0.563679, -1.295073, -0.764437, 0.952194, -0.859222,
-0.618554, -2.268542, -1.210592, 1.655853, -2.627219, -0.994249,
-1.374704, 0.343799, 0.025619, 1.227481, -0.708031, 0.069355,
-1.845228, -1.570886, 1.010668, -1.802084, 1.630088, 1.286090,
-0.161050, -0.940794, 0.367961, 0.291907
};
float32_t testInputB_f32[64] =
{
0.933724, 0.046881, 1.316470, 0.438345, 0.332682, 2.094885,
0.512081, 0.035546, 0.050894, -2.320371, 0.168711, -1.830493,
-0.444834, -1.003242, -0.531494, -1.365600, -0.155420, -0.757692,
-0.431880, -0.380021, 0.096243, -0.695835, 0.558850, -1.648962,
0.020369, -0.363630, 0.887146, 0.845503, -0.252864, -0.330397,
1.269131, -1.109295, -1.027876, 0.135940, 0.116721, -0.293399,
-1.349799, 0.166078, -0.802201, 0.369367, -0.964568, -2.266011,
0.465178, 0.651222, -0.325426, 0.320245, -0.784178, -0.579456,
0.093374, 0.604778, -0.048225, 0.376297, -0.394412, 0.578182,
-1.218141, -1.387326, 0.692462, -0.631297, 0.153137, -0.638952,
0.635474, -0.970468, 1.334057, -0.111370
};
const float testRefOutput_f32[126] =
{
-0.818943, 1.229484, -0.533664, 1.016604, 0.341875, -1.963656,
5.171476, 3.478033, 7.616361, 6.648384, 0.479069, 1.792012,
-1.295591, -7.447818, 0.315830, -10.657445, -2.483469, -6.524236,
-7.380591, -3.739005, -8.388957, 0.184147, -1.554888, 3.786508,
-1.684421, 5.400610, -1.578126, 7.403361, 8.315999, 2.080267,
11.077776, 2.749673, 7.138962, 2.748762, 0.660363, 0.981552,
1.442275, 0.552721, -2.576892, 4.703989, 0.989156, 8.759344,
-0.564825, -3.994680, 0.954710, -5.014144, 6.592329, 1.599488,
-13.979146, -0.391891, -4.453369, -2.311242, -2.948764, 1.761415,
-0.138322, 10.433007, -2.309103, 4.297153, 8.535523, 3.209462,
8.695819, 5.569919, 2.514304, 5.582029, 2.060199, 0.642280,
7.024616, 1.686615, -6.481756, 1.343084, -3.526451, 1.099073,
-2.965764, -0.173723, -4.111484, 6.528384, -6.965658, 1.726291,
1.535172, 11.023435, 2.338401, -4.690188, 1.298210, 3.943885,
8.407885, 5.168365, 0.684131, 1.559181, 1.859998, 2.852417,
8.574070, -6.369078, 6.023458, 11.837963, -6.027632, 4.469678,
-6.799093, -2.674048, 6.250367, -6.809971, -3.459360, 9.112410,
-2.711621, -1.336678, 1.564249, -1.564297, -1.296760, 8.904013,
-3.230109, 6.878013, -7.819823, 3.369909, -1.657410, -2.007358,
-4.112825, 1.370685, -3.420525, -6.276605, 3.244873, -3.352638,
1.545372, 0.902211, 0.197489, -1.408732, 0.523390, 0.348440
};
/* ----------------------------------------------------------------------
* Declare Global variables
* ------------------------------------------------------------------- */
uint32_t srcALen = 64; /* Length of Input A */
uint32_t srcBLen = 64; /* Length of Input B */
uint32_t outLen; /* Length of convolution output */
float32_t snr; /* output SNR */
int32_t main(void)
{
arm_status status; /* Status of the example */
arm_cfft_radix4_instance_f32 cfft_instance; /* CFFT Structure instance */
/* CFFT Structure instance pointer */
arm_cfft_radix4_instance_f32 *cfft_instance_ptr =
(arm_cfft_radix4_instance_f32*) &cfft_instance;
/* output length of convolution */
outLen = srcALen + srcBLen - 1;
/* Initialise the fft input buffers with all zeros */
arm_fill_f32(0.0, Ak, MAX_BLOCKSIZE);
arm_fill_f32(0.0, Bk, MAX_BLOCKSIZE);
/* Copy the input values to the fft input buffers */
arm_copy_f32(testInputA_f32, Ak, MAX_BLOCKSIZE/2);
arm_copy_f32(testInputB_f32, Bk, MAX_BLOCKSIZE/2);
/* Initialize the CFFT function to compute 64 point fft */
status = arm_cfft_radix4_init_f32(cfft_instance_ptr, 64, 0, 1);
/* Transform input a[n] from time domain to frequency domain A[k] */
arm_cfft_radix4_f32(cfft_instance_ptr, Ak);
/* Transform input b[n] from time domain to frequency domain B[k] */
arm_cfft_radix4_f32(cfft_instance_ptr, Bk);
/* Complex Multiplication of the two input buffers in frequency domain */
arm_cmplx_mult_cmplx_f32(Ak, Bk, AxB, MAX_BLOCKSIZE/2);
/* Initialize the CIFFT function to compute 64 point ifft */
status = arm_cfft_radix4_init_f32(cfft_instance_ptr, 64, 1, 1);
/* Transform the multiplication output from frequency domain to time domain,
that gives the convolved output */
arm_cfft_radix4_f32(cfft_instance_ptr, AxB);
/* SNR Calculation */
snr = arm_snr_f32((float32_t *)testRefOutput_f32, AxB, srcALen + srcBLen - 1);
/* Compare the SNR with threshold to test whether the
computed output is matched with the reference output values. */
if( snr > SNR_THRESHOLD)
{
status = ARM_MATH_SUCCESS;
}
if( status != ARM_MATH_SUCCESS)
{
while(1);
}
while(1); /* main function does not return */
} /** \example arm_convolution_example_f32.c
*/
/** \endlink */
#include "arm_math.h"
#include "math_helper.h"
/* ----------------------------------------------------------------------
* Defines each of the tests performed
* ------------------------------------------------------------------- */
#define MAX_BLOCKSIZE 128
#define DELTA (0.000001f)
#define SNR_THRESHOLD 90
/* ----------------------------------------------------------------------
* Declare I/O buffers
* ------------------------------------------------------------------- */
float32_t Ak[MAX_BLOCKSIZE]; /* Input A */
float32_t Bk[MAX_BLOCKSIZE]; /* Input B */
float32_t AxB[MAX_BLOCKSIZE * 2]; /* Output */
/* ----------------------------------------------------------------------
* Test input data for Floating point Convolution example for 32-blockSize
* Generated by the MATLAB randn() function
* ------------------------------------------------------------------- */
float32_t testInputA_f32[64] =
{
-0.808920, 1.357369, 1.180861, -0.504544, 1.762637, -0.703285,
1.696966, 0.620571, -0.151093, -0.100235, -0.872382, -0.403579,
-0.860749, -0.382648, -1.052338, 0.128113, -0.646269, 1.093377,
-2.209198, 0.471706, 0.408901, 1.266242, 0.598252, 1.176827,
-0.203421, 0.213596, -0.851964, -0.466958, 0.021841, -0.698938,
-0.604107, 0.461778, -0.318219, 0.942520, 0.577585, 0.417619,
0.614665, 0.563679, -1.295073, -0.764437, 0.952194, -0.859222,
-0.618554, -2.268542, -1.210592, 1.655853, -2.627219, -0.994249,
-1.374704, 0.343799, 0.025619, 1.227481, -0.708031, 0.069355,
-1.845228, -1.570886, 1.010668, -1.802084, 1.630088, 1.286090,
-0.161050, -0.940794, 0.367961, 0.291907
};
float32_t testInputB_f32[64] =
{
0.933724, 0.046881, 1.316470, 0.438345, 0.332682, 2.094885,
0.512081, 0.035546, 0.050894, -2.320371, 0.168711, -1.830493,
-0.444834, -1.003242, -0.531494, -1.365600, -0.155420, -0.757692,
-0.431880, -0.380021, 0.096243, -0.695835, 0.558850, -1.648962,
0.020369, -0.363630, 0.887146, 0.845503, -0.252864, -0.330397,
1.269131, -1.109295, -1.027876, 0.135940, 0.116721, -0.293399,
-1.349799, 0.166078, -0.802201, 0.369367, -0.964568, -2.266011,
0.465178, 0.651222, -0.325426, 0.320245, -0.784178, -0.579456,
0.093374, 0.604778, -0.048225, 0.376297, -0.394412, 0.578182,
-1.218141, -1.387326, 0.692462, -0.631297, 0.153137, -0.638952,
0.635474, -0.970468, 1.334057, -0.111370
};
const float testRefOutput_f32[126] =
{
-0.818943, 1.229484, -0.533664, 1.016604, 0.341875, -1.963656,
5.171476, 3.478033, 7.616361, 6.648384, 0.479069, 1.792012,
-1.295591, -7.447818, 0.315830, -10.657445, -2.483469, -6.524236,
-7.380591, -3.739005, -8.388957, 0.184147, -1.554888, 3.786508,
-1.684421, 5.400610, -1.578126, 7.403361, 8.315999, 2.080267,
11.077776, 2.749673, 7.138962, 2.748762, 0.660363, 0.981552,
1.442275, 0.552721, -2.576892, 4.703989, 0.989156, 8.759344,
-0.564825, -3.994680, 0.954710, -5.014144, 6.592329, 1.599488,
-13.979146, -0.391891, -4.453369, -2.311242, -2.948764, 1.761415,
-0.138322, 10.433007, -2.309103, 4.297153, 8.535523, 3.209462,
8.695819, 5.569919, 2.514304, 5.582029, 2.060199, 0.642280,
7.024616, 1.686615, -6.481756, 1.343084, -3.526451, 1.099073,
-2.965764, -0.173723, -4.111484, 6.528384, -6.965658, 1.726291,
1.535172, 11.023435, 2.338401, -4.690188, 1.298210, 3.943885,
8.407885, 5.168365, 0.684131, 1.559181, 1.859998, 2.852417,
8.574070, -6.369078, 6.023458, 11.837963, -6.027632, 4.469678,
-6.799093, -2.674048, 6.250367, -6.809971, -3.459360, 9.112410,
-2.711621, -1.336678, 1.564249, -1.564297, -1.296760, 8.904013,
-3.230109, 6.878013, -7.819823, 3.369909, -1.657410, -2.007358,
-4.112825, 1.370685, -3.420525, -6.276605, 3.244873, -3.352638,
1.545372, 0.902211, 0.197489, -1.408732, 0.523390, 0.348440
};
/* ----------------------------------------------------------------------
* Declare Global variables
* ------------------------------------------------------------------- */
uint32_t srcALen = 64; /* Length of Input A */
uint32_t srcBLen = 64; /* Length of Input B */
uint32_t outLen; /* Length of convolution output */
float32_t snr; /* output SNR */
int32_t main(void)
{
arm_status status; /* Status of the example */
arm_cfft_radix4_instance_f32 cfft_instance; /* CFFT Structure instance */
/* CFFT Structure instance pointer */
arm_cfft_radix4_instance_f32 *cfft_instance_ptr =
(arm_cfft_radix4_instance_f32*) &cfft_instance;
/* output length of convolution */
outLen = srcALen + srcBLen - 1;
/* Initialise the fft input buffers with all zeros */
arm_fill_f32(0.0, Ak, MAX_BLOCKSIZE);
arm_fill_f32(0.0, Bk, MAX_BLOCKSIZE);
/* Copy the input values to the fft input buffers */
arm_copy_f32(testInputA_f32, Ak, MAX_BLOCKSIZE/2);
arm_copy_f32(testInputB_f32, Bk, MAX_BLOCKSIZE/2);
/* Initialize the CFFT function to compute 64 point fft */
status = arm_cfft_radix4_init_f32(cfft_instance_ptr, 64, 0, 1);
/* Transform input a[n] from time domain to frequency domain A[k] */
arm_cfft_radix4_f32(cfft_instance_ptr, Ak);
/* Transform input b[n] from time domain to frequency domain B[k] */
arm_cfft_radix4_f32(cfft_instance_ptr, Bk);
/* Complex Multiplication of the two input buffers in frequency domain */
arm_cmplx_mult_cmplx_f32(Ak, Bk, AxB, MAX_BLOCKSIZE/2);
/* Initialize the CIFFT function to compute 64 point ifft */
status = arm_cfft_radix4_init_f32(cfft_instance_ptr, 64, 1, 1);
/* Transform the multiplication output from frequency domain to time domain,
that gives the convolved output */
arm_cfft_radix4_f32(cfft_instance_ptr, AxB);
/* SNR Calculation */
snr = arm_snr_f32((float32_t *)testRefOutput_f32, AxB, srcALen + srcBLen - 1);
/* Compare the SNR with threshold to test whether the
computed output is matched with the reference output values. */
if( snr > SNR_THRESHOLD)
{
status = ARM_MATH_SUCCESS;
}
if( status != ARM_MATH_SUCCESS)
{
while(1);
}
while(1); /* main function does not return */
}
/** \endlink */

View File

@ -75,7 +75,7 @@
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<IsCurrentTarget>1</IsCurrentTarget> <IsCurrentTarget>1</IsCurrentTarget>
</OPTFL> </OPTFL>
<CpuCode>0</CpuCode> <CpuCode>255</CpuCode>
<DllOpt> <DllOpt>
<SimDllName>SARMCM3.DLL</SimDllName> <SimDllName>SARMCM3.DLL</SimDllName>
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View File

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View File

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View File

@ -103,6 +103,7 @@
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@ -188,6 +191,9 @@
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View File

@ -61,6 +61,8 @@
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View File

@ -75,7 +75,7 @@
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View File

@ -61,6 +61,8 @@
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View File

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View File

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View File

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View File

@ -61,6 +61,8 @@
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View File

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View File

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<bShared>0</bShared>
</File> </File>
</Group> </Group>
@ -219,6 +228,7 @@
<tvExp>1</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File> <File>
<GroupNumber>2</GroupNumber> <GroupNumber>2</GroupNumber>
<FileNumber>2</FileNumber> <FileNumber>2</FileNumber>
@ -227,11 +237,13 @@
<Focus>0</Focus> <Focus>0</Focus>
<ColumnNumber>0</ColumnNumber> <ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<TopLine>136</TopLine> <TopLine>126</TopLine>
<CurrentLine>136</CurrentLine> <CurrentLine>142</CurrentLine>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>../../Common/GCC/startup_ARMCM3.S</PathWithFileName> <PathWithFileName>../../Common/GCC/startup_ARMCM3.S</PathWithFileName>
<FilenameWithoutPath>startup_ARMCM3.S</FilenameWithoutPath> <FilenameWithoutPath>startup_ARMCM3.S</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
<File> <File>
<GroupNumber>2</GroupNumber> <GroupNumber>2</GroupNumber>
@ -246,6 +258,8 @@
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>../../Common/system_ARMCM3.c</PathWithFileName> <PathWithFileName>../../Common/system_ARMCM3.c</PathWithFileName>
<FilenameWithoutPath>system_ARMCM3.c</FilenameWithoutPath> <FilenameWithoutPath>system_ARMCM3.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
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@ -254,6 +268,7 @@
<tvExp>0</tvExp> <tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg>
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@ -61,6 +61,8 @@
<UserProg2Name></UserProg2Name> <UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode> <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode> <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile> </BeforeCompile>
<BeforeMake> <BeforeMake>
<RunUserProg1>0</RunUserProg1> <RunUserProg1>0</RunUserProg1>
@ -134,6 +136,7 @@
<RestoreMemoryDisplay>1</RestoreMemoryDisplay> <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
<RestoreFunctions>0</RestoreFunctions> <RestoreFunctions>0</RestoreFunctions>
<RestoreToolbox>1</RestoreToolbox> <RestoreToolbox>1</RestoreToolbox>
<RestoreTracepoints>0</RestoreTracepoints>
</Target> </Target>
<RunDebugAfterBuild>0</RunDebugAfterBuild> <RunDebugAfterBuild>0</RunDebugAfterBuild>
<TargetSelection>-1</TargetSelection> <TargetSelection>-1</TargetSelection>

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@ -103,6 +103,7 @@
<tRmem>1</tRmem> <tRmem>1</tRmem>
<tRfunc>0</tRfunc> <tRfunc>0</tRfunc>
<tRbox>1</tRbox> <tRbox>1</tRbox>
<tRtrace>0</tRtrace>
<sRunDeb>0</sRunDeb> <sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime> <sLrtime>0</sLrtime>
<nTsel>-1</nTsel> <nTsel>-1</nTsel>
@ -134,34 +135,34 @@
<Bp> <Bp>
<Number>0</Number> <Number>0</Number>
<Type>0</Type> <Type>0</Type>
<LineNumber>156</LineNumber> <LineNumber>172</LineNumber>
<EnabledFlag>1</EnabledFlag> <EnabledFlag>1</EnabledFlag>
<Address>578</Address> <Address>0</Address>
<ByteObject>0</ByteObject> <ByteObject>0</ByteObject>
<HtxType>0</HtxType> <HtxType>0</HtxType>
<ManyObjects>0</ManyObjects> <ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject> <SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess> <BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount> <BreakIfRCount>0</BreakIfRCount>
<Filename>C:\CMSIS\CMSIS_Setup\CMSIS\DSP_Lib\Examples\arm_dotproduct_example\GCC\..\arm_dotproduct_example_f32.c</Filename> <Filename>C:\CMSIS\CMSIS_Setup\CMSIS\DSP_Lib\Examples\arm_dotproduct_example\arm_dotproduct_example_f32.c</Filename>
<ExecCommand></ExecCommand> <ExecCommand></ExecCommand>
<Expression>\\arm_cortexM4lf_dotProduct_example\../arm_dotproduct_example_f32.c\156</Expression> <Expression></Expression>
</Bp> </Bp>
<Bp> <Bp>
<Number>1</Number> <Number>1</Number>
<Type>0</Type> <Type>0</Type>
<LineNumber>159</LineNumber> <LineNumber>175</LineNumber>
<EnabledFlag>1</EnabledFlag> <EnabledFlag>1</EnabledFlag>
<Address>580</Address> <Address>0</Address>
<ByteObject>0</ByteObject> <ByteObject>0</ByteObject>
<HtxType>0</HtxType> <HtxType>0</HtxType>
<ManyObjects>0</ManyObjects> <ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject> <SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess> <BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount> <BreakIfRCount>0</BreakIfRCount>
<Filename>C:\CMSIS\CMSIS_Setup\CMSIS\DSP_Lib\Examples\arm_dotproduct_example\GCC\..\arm_dotproduct_example_f32.c</Filename> <Filename>C:\CMSIS\CMSIS_Setup\CMSIS\DSP_Lib\Examples\arm_dotproduct_example\arm_dotproduct_example_f32.c</Filename>
<ExecCommand></ExecCommand> <ExecCommand></ExecCommand>
<Expression>\\arm_cortexM4lf_dotProduct_example\../arm_dotproduct_example_f32.c\159</Expression> <Expression></Expression>
</Bp> </Bp>
</Breakpoint> </Breakpoint>
<DebugFlag> <DebugFlag>
@ -190,6 +191,9 @@
<newCpu>0</newCpu> <newCpu>0</newCpu>
<uProt>0</uProt> <uProt>0</uProt>
</DebugFlag> </DebugFlag>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<LintExecutable></LintExecutable> <LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile> <LintConfigFile></LintConfigFile>
</TargetOption> </TargetOption>
@ -200,6 +204,7 @@
<tvExp>1</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File> <File>
<GroupNumber>1</GroupNumber> <GroupNumber>1</GroupNumber>
<FileNumber>1</FileNumber> <FileNumber>1</FileNumber>
@ -208,11 +213,13 @@
<Focus>0</Focus> <Focus>0</Focus>
<ColumnNumber>0</ColumnNumber> <ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<TopLine>104</TopLine> <TopLine>119</TopLine>
<CurrentLine>159</CurrentLine> <CurrentLine>175</CurrentLine>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>../arm_dotproduct_example_f32.c</PathWithFileName> <PathWithFileName>../arm_dotproduct_example_f32.c</PathWithFileName>
<FilenameWithoutPath>arm_dotproduct_example_f32.c</FilenameWithoutPath> <FilenameWithoutPath>arm_dotproduct_example_f32.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
</Group> </Group>
@ -221,6 +228,7 @@
<tvExp>1</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File> <File>
<GroupNumber>2</GroupNumber> <GroupNumber>2</GroupNumber>
<FileNumber>2</FileNumber> <FileNumber>2</FileNumber>
@ -229,11 +237,13 @@
<Focus>0</Focus> <Focus>0</Focus>
<ColumnNumber>0</ColumnNumber> <ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<TopLine>122</TopLine> <TopLine>126</TopLine>
<CurrentLine>138</CurrentLine> <CurrentLine>142</CurrentLine>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>../../Common/GCC/startup_ARMCM4.S</PathWithFileName> <PathWithFileName>../../Common/GCC/startup_ARMCM4.S</PathWithFileName>
<FilenameWithoutPath>startup_ARMCM4.S</FilenameWithoutPath> <FilenameWithoutPath>startup_ARMCM4.S</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
<File> <File>
<GroupNumber>2</GroupNumber> <GroupNumber>2</GroupNumber>
@ -248,6 +258,8 @@
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>../../Common/system_ARMCM4.c</PathWithFileName> <PathWithFileName>../../Common/system_ARMCM4.c</PathWithFileName>
<FilenameWithoutPath>system_ARMCM4.c</FilenameWithoutPath> <FilenameWithoutPath>system_ARMCM4.c</FilenameWithoutPath>
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@ -256,6 +268,7 @@
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@ -61,6 +61,8 @@
<UserProg2Name></UserProg2Name> <UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode> <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode> <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile> </BeforeCompile>
<BeforeMake> <BeforeMake>
<RunUserProg1>0</RunUserProg1> <RunUserProg1>0</RunUserProg1>
@ -134,6 +136,7 @@
<RestoreMemoryDisplay>1</RestoreMemoryDisplay> <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
<RestoreFunctions>0</RestoreFunctions> <RestoreFunctions>0</RestoreFunctions>
<RestoreToolbox>1</RestoreToolbox> <RestoreToolbox>1</RestoreToolbox>
<RestoreTracepoints>0</RestoreTracepoints>
</Target> </Target>
<RunDebugAfterBuild>0</RunDebugAfterBuild> <RunDebugAfterBuild>0</RunDebugAfterBuild>
<TargetSelection>-1</TargetSelection> <TargetSelection>-1</TargetSelection>
@ -260,7 +263,7 @@
<wLevel>2</wLevel> <wLevel>2</wLevel>
<uThumb>1</uThumb> <uThumb>1</uThumb>
<VariousControls> <VariousControls>
<MiscControls>-mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -fno-strict-aliasing -ffunction-sections</MiscControls> <MiscControls>-mfpu=fpv4-sp-d16 -mfloat-abi=hard -fno-strict-aliasing -ffunction-sections</MiscControls>
<Define>ARM_MATH_CM4, __FPU_PRESENT = 1</Define> <Define>ARM_MATH_CM4, __FPU_PRESENT = 1</Define>
<Undefine></Undefine> <Undefine></Undefine>
<IncludePath>..\..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include</IncludePath> <IncludePath>..\..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include</IncludePath>
@ -287,7 +290,7 @@
<BSSAddressRange></BSSAddressRange> <BSSAddressRange></BSSAddressRange>
<IncludeLibs>arm_cortexM4lf_math</IncludeLibs> <IncludeLibs>arm_cortexM4lf_math</IncludeLibs>
<IncludeDir>..\..\..\..\Lib\GCC</IncludeDir> <IncludeDir>..\..\..\..\Lib\GCC</IncludeDir>
<Misc>-mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -Wl,--gc-sections</Misc> <Misc>-mfpu=fpv4-sp-d16 -mfloat-abi=hard -Wl,--gc-sections</Misc>
<ScatterFile>..\..\Common\GCC\ARMCMx.ld</ScatterFile> <ScatterFile>..\..\Common\GCC\ARMCMx.ld</ScatterFile>
</LDarm> </LDarm>
</TargetArm> </TargetArm>

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@ -1,35 +1,51 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved. * Copyright (C) 2010-2012 ARM Limited. All rights reserved.
*
* $Date: 29. November 2010
* $Revision: V1.0.3
*
* Project: CMSIS DSP Library
* Title: arm_dotproduct_example_f32.c
*
* Description: Example code computing dot product of two vectors.
*
* Target Processor: Cortex-M4/Cortex-M3
* *
* $Date: 17. January 2013
* $Revision: V1.4.0
* *
* Version 1.0.3 2010/11/29 * Project: CMSIS DSP Library
* Re-organized the CMSIS folders and updated documentation. * Title: arm_dotproduct_example_f32.c
*
* Version 1.0.1 2010/10/05 KK
* Production release and review comments incorporated.
* *
* Version 1.0.0 2010/09/20 KK * Description: Example code computing dot product of two vectors.
* Production release and review comments incorporated. *
* ------------------------------------------------------------------- */ * Target Processor: Cortex-M4/Cortex-M3
*
/** * Redistribution and use in source and binary forms, with or without
* @ingroup groupExamples * modification, are permitted provided that the following conditions
*/ * are met:
* - Redistributions of source code must retain the above copyright
/** * notice, this list of conditions and the following disclaimer.
* @defgroup DotproductExample Dot Product Example * - Redistributions in binary form must reproduce the above copyright
* * notice, this list of conditions and the following disclaimer in
* \par Description: * the documentation and/or other materials provided with the
* distribution.
* - Neither the name of ARM LIMITED nor the names of its contributors
* may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* -------------------------------------------------------------------- */
/**
* @ingroup groupExamples
*/
/**
* @defgroup DotproductExample Dot Product Example
*
* \par Description:
* \par * \par
* Demonstrates the use of the Multiply and Add functions to perform the dot product. * Demonstrates the use of the Multiply and Add functions to perform the dot product.
* The dot product of two vectors is obtained by multiplying corresponding elements * The dot product of two vectors is obtained by multiplying corresponding elements
@ -41,123 +57,122 @@
* and then added to obtain dot product. * and then added to obtain dot product.
* \par * \par
* This is denoted by the following equation: * This is denoted by the following equation:
* <pre> dotProduct = A[0] * B[0] + A[1] * B[1] + ... + A[n-1] * B[n-1]</pre> * <pre> dotProduct = A[0] * B[0] + A[1] * B[1] + ... + A[n-1] * B[n-1]</pre>
* *
* \par Block Diagram: * \par Block Diagram:
* \par * \par
* \image html dotProduct.gif * \image html dotProduct.gif
* *
* \par Variables Description: * \par Variables Description:
* \par * \par
* \li \c srcA_buf_f32 points to first input vector * \li \c srcA_buf_f32 points to first input vector
* \li \c srcB_buf_f32 points to second input vector * \li \c srcB_buf_f32 points to second input vector
* \li \c testOutput stores dot product of the two input vectors. * \li \c testOutput stores dot product of the two input vectors.
* *
* \par CMSIS DSP Software Library Functions Used: * \par CMSIS DSP Software Library Functions Used:
* \par * \par
* - arm_mult_f32() * - arm_mult_f32()
* - arm_add_f32() * - arm_add_f32()
* *
* <b> Refer </b> * <b> Refer </b>
* \link arm_dotproduct_example_f32.c \endlink * \link arm_dotproduct_example_f32.c \endlink
* *
*/ */
/** \example arm_dotproduct_example_f32.c
*/
#include <math.h>
#include "arm_math.h"
/* ----------------------------------------------------------------------
* Defines each of the tests performed
* ------------------------------------------------------------------- */
#define MAX_BLOCKSIZE 32
#define DELTA (0.000001f)
/* ----------------------------------------------------------------------
* Test input data for Floating point Dot Product example for 32-blockSize
* Generated by the MATLAB randn() function
* ------------------------------------------------------------------- */
/* ----------------------------------------------------------------------
** Test input data of srcA for blockSize 32
** ------------------------------------------------------------------- */
float32_t srcA_buf_f32[MAX_BLOCKSIZE] =
{
-0.4325648115282207, -1.6655843782380970, 0.1253323064748307,
0.2876764203585489, -1.1464713506814637, 1.1909154656429988,
1.1891642016521031, -0.0376332765933176, 0.3272923614086541,
0.1746391428209245, -0.1867085776814394, 0.7257905482933027,
-0.5883165430141887, 2.1831858181971011, -0.1363958830865957,
0.1139313135208096, 1.0667682113591888, 0.0592814605236053,
-0.0956484054836690, -0.8323494636500225, 0.2944108163926404,
-1.3361818579378040, 0.7143245518189522, 1.6235620644462707,
-0.6917757017022868, 0.8579966728282626, 1.2540014216025324,
-1.5937295764474768, -1.4409644319010200, 0.5711476236581780,
-0.3998855777153632, 0.6899973754643451
};
/* ----------------------------------------------------------------------
** Test input data of srcB for blockSize 32
** ------------------------------------------------------------------- */
float32_t srcB_buf_f32[MAX_BLOCKSIZE] =
{
1.7491401329284098, 0.1325982188803279, 0.3252281811989881,
-0.7938091410349637, 0.3149236145048914, -0.5272704888029532,
0.9322666565031119, 1.1646643544607362, -2.0456694357357357,
-0.6443728590041911, 1.7410657940825480, 0.4867684246821860,
1.0488288293660140, 1.4885752747099299, 1.2705014969484090,
-1.8561241921210170, 2.1343209047321410, 1.4358467535865909,
-0.9173023332875400, -1.1060770780029008, 0.8105708062681296,
0.6985430696369063, -0.4015827425012831, 1.2687512030669628,
-0.7836083053674872, 0.2132664971465569, 0.7878984786088954,
0.8966819356782295, -0.1869172943544062, 1.0131816724341454,
0.2484350696132857, 0.0596083377937976
};
/* Reference dot product output */
float32_t refDotProdOut = 5.9273644806352142;
/* ----------------------------------------------------------------------
* Declare Global variables
* ------------------------------------------------------------------- */
float32_t multOutput[MAX_BLOCKSIZE]; /* Intermediate output */
float32_t testOutput; /* Final ouput */
arm_status status; /* Status of the example */
int32_t main(void) /** \example arm_dotproduct_example_f32.c
{ */
uint32_t i; /* Loop counter */
float32_t diff; /* Difference between reference and test outputs */
/* Multiplication of two input buffers */
arm_mult_f32(srcA_buf_f32, srcB_buf_f32, multOutput, MAX_BLOCKSIZE);
/* Accumulate the multiplication output values to
get the dot product of the two inputs */
for(i=0; i< MAX_BLOCKSIZE; i++)
{
arm_add_f32(&testOutput, &multOutput[i], &testOutput, 1);
}
/* absolute value of difference between ref and test */
diff = fabsf(refDotProdOut - testOutput);
/* Comparison of dot product value with reference */
if(diff > DELTA)
{
status = ARM_MATH_TEST_FAILURE;
}
if( status == ARM_MATH_TEST_FAILURE)
{
while(1);
}
while(1); /* main function does not return */ #include <math.h>
} #include "arm_math.h"
/** \endlink */ /* ----------------------------------------------------------------------
* Defines each of the tests performed
* ------------------------------------------------------------------- */
#define MAX_BLOCKSIZE 32
#define DELTA (0.000001f)
/* ----------------------------------------------------------------------
* Test input data for Floating point Dot Product example for 32-blockSize
* Generated by the MATLAB randn() function
* ------------------------------------------------------------------- */
/* ----------------------------------------------------------------------
** Test input data of srcA for blockSize 32
** ------------------------------------------------------------------- */
float32_t srcA_buf_f32[MAX_BLOCKSIZE] =
{
-0.4325648115282207, -1.6655843782380970, 0.1253323064748307,
0.2876764203585489, -1.1464713506814637, 1.1909154656429988,
1.1891642016521031, -0.0376332765933176, 0.3272923614086541,
0.1746391428209245, -0.1867085776814394, 0.7257905482933027,
-0.5883165430141887, 2.1831858181971011, -0.1363958830865957,
0.1139313135208096, 1.0667682113591888, 0.0592814605236053,
-0.0956484054836690, -0.8323494636500225, 0.2944108163926404,
-1.3361818579378040, 0.7143245518189522, 1.6235620644462707,
-0.6917757017022868, 0.8579966728282626, 1.2540014216025324,
-1.5937295764474768, -1.4409644319010200, 0.5711476236581780,
-0.3998855777153632, 0.6899973754643451
};
/* ----------------------------------------------------------------------
** Test input data of srcB for blockSize 32
** ------------------------------------------------------------------- */
float32_t srcB_buf_f32[MAX_BLOCKSIZE] =
{
1.7491401329284098, 0.1325982188803279, 0.3252281811989881,
-0.7938091410349637, 0.3149236145048914, -0.5272704888029532,
0.9322666565031119, 1.1646643544607362, -2.0456694357357357,
-0.6443728590041911, 1.7410657940825480, 0.4867684246821860,
1.0488288293660140, 1.4885752747099299, 1.2705014969484090,
-1.8561241921210170, 2.1343209047321410, 1.4358467535865909,
-0.9173023332875400, -1.1060770780029008, 0.8105708062681296,
0.6985430696369063, -0.4015827425012831, 1.2687512030669628,
-0.7836083053674872, 0.2132664971465569, 0.7878984786088954,
0.8966819356782295, -0.1869172943544062, 1.0131816724341454,
0.2484350696132857, 0.0596083377937976
};
/* Reference dot product output */
float32_t refDotProdOut = 5.9273644806352142;
/* ----------------------------------------------------------------------
* Declare Global variables
* ------------------------------------------------------------------- */
float32_t multOutput[MAX_BLOCKSIZE]; /* Intermediate output */
float32_t testOutput; /* Final ouput */
arm_status status; /* Status of the example */
int32_t main(void)
{
uint32_t i; /* Loop counter */
float32_t diff; /* Difference between reference and test outputs */
/* Multiplication of two input buffers */
arm_mult_f32(srcA_buf_f32, srcB_buf_f32, multOutput, MAX_BLOCKSIZE);
/* Accumulate the multiplication output values to
get the dot product of the two inputs */
for(i=0; i< MAX_BLOCKSIZE; i++)
{
arm_add_f32(&testOutput, &multOutput[i], &testOutput, 1);
}
/* absolute value of difference between ref and test */
diff = fabsf(refDotProdOut - testOutput);
/* Comparison of dot product value with reference */
if(diff > DELTA)
{
status = ARM_MATH_TEST_FAILURE;
}
if( status == ARM_MATH_TEST_FAILURE)
{
while(1);
}
while(1); /* main function does not return */
}
/** \endlink */

View File

@ -75,7 +75,7 @@
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget> <IsCurrentTarget>1</IsCurrentTarget>
</OPTFL> </OPTFL>
<CpuCode>0</CpuCode> <CpuCode>255</CpuCode>
<DllOpt> <DllOpt>
<SimDllName>SARMCM3.DLL</SimDllName> <SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments></SimDllArguments> <SimDllArguments></SimDllArguments>
@ -103,6 +103,7 @@
<tRmem>1</tRmem> <tRmem>1</tRmem>
<tRfunc>0</tRfunc> <tRfunc>0</tRfunc>
<tRbox>1</tRbox> <tRbox>1</tRbox>
<tRtrace>0</tRtrace>
<sRunDeb>0</sRunDeb> <sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime> <sLrtime>0</sLrtime>
<nTsel>-1</nTsel> <nTsel>-1</nTsel>
@ -134,32 +135,34 @@
<Bp> <Bp>
<Number>0</Number> <Number>0</Number>
<Type>0</Type> <Type>0</Type>
<LineNumber>143</LineNumber> <LineNumber>151</LineNumber>
<EnabledFlag>1</EnabledFlag> <EnabledFlag>1</EnabledFlag>
<Address>416</Address> <Address>0</Address>
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<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects> <ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject> <SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess> <BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount> <BreakIfRCount>0</BreakIfRCount>
<Filename></Filename> <Filename>C:\CMSIS\CMSIS_Setup\CMSIS\DSP_Lib\Examples\arm_fft_bin_example\arm_fft_bin_example_f32.c</Filename>
<ExecCommand></ExecCommand> <ExecCommand></ExecCommand>
<Expression>\\arm_cortexM0l_fft_bin_example\../arm_fft_bin_example_f32.c\143</Expression> <Expression></Expression>
</Bp> </Bp>
<Bp> <Bp>
<Number>1</Number> <Number>1</Number>
<Type>0</Type> <Type>0</Type>
<LineNumber>146</LineNumber> <LineNumber>154</LineNumber>
<EnabledFlag>1</EnabledFlag> <EnabledFlag>1</EnabledFlag>
<Address>420</Address> <Address>0</Address>
<ByteObject>0</ByteObject> <ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects> <ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject> <SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess> <BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount> <BreakIfRCount>0</BreakIfRCount>
<Filename></Filename> <Filename>C:\CMSIS\CMSIS_Setup\CMSIS\DSP_Lib\Examples\arm_fft_bin_example\arm_fft_bin_example_f32.c</Filename>
<ExecCommand></ExecCommand> <ExecCommand></ExecCommand>
<Expression>\\arm_cortexM0l_fft_bin_example\../arm_fft_bin_example_f32.c\146</Expression> <Expression></Expression>
</Bp> </Bp>
</Breakpoint> </Breakpoint>
<DebugFlag> <DebugFlag>
@ -188,6 +191,9 @@
<newCpu>0</newCpu> <newCpu>0</newCpu>
<uProt>0</uProt> <uProt>0</uProt>
</DebugFlag> </DebugFlag>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<LintExecutable></LintExecutable> <LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile> <LintConfigFile></LintConfigFile>
</TargetOption> </TargetOption>
@ -198,6 +204,7 @@
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<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File> <File>
<GroupNumber>1</GroupNumber> <GroupNumber>1</GroupNumber>
<FileNumber>1</FileNumber> <FileNumber>1</FileNumber>
@ -206,11 +213,13 @@
<Focus>0</Focus> <Focus>0</Focus>
<ColumnNumber>0</ColumnNumber> <ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<TopLine>133</TopLine> <TopLine>98</TopLine>
<CurrentLine>146</CurrentLine> <CurrentLine>154</CurrentLine>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\arm_fft_bin_example_f32.c</PathWithFileName> <PathWithFileName>..\arm_fft_bin_example_f32.c</PathWithFileName>
<FilenameWithoutPath>arm_fft_bin_example_f32.c</FilenameWithoutPath> <FilenameWithoutPath>arm_fft_bin_example_f32.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
<File> <File>
<GroupNumber>1</GroupNumber> <GroupNumber>1</GroupNumber>
@ -218,13 +227,15 @@
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<tvExp>0</tvExp> <tvExp>0</tvExp>
<Focus>0</Focus> <Focus>0</Focus>
<ColumnNumber>0</ColumnNumber> <ColumnNumber>3</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine> <TopLine>0</TopLine>
<CurrentLine>0</CurrentLine> <CurrentLine>0</CurrentLine>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\arm_fft_bin_data.c</PathWithFileName> <PathWithFileName>..\arm_fft_bin_data.c</PathWithFileName>
<FilenameWithoutPath>arm_fft_bin_data.c</FilenameWithoutPath> <FilenameWithoutPath>arm_fft_bin_data.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
</Group> </Group>
@ -233,6 +244,7 @@
<tvExp>1</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File> <File>
<GroupNumber>2</GroupNumber> <GroupNumber>2</GroupNumber>
<FileNumber>3</FileNumber> <FileNumber>3</FileNumber>
@ -241,11 +253,13 @@
<Focus>0</Focus> <Focus>0</Focus>
<ColumnNumber>0</ColumnNumber> <ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<TopLine>126</TopLine> <TopLine>124</TopLine>
<CurrentLine>126</CurrentLine> <CurrentLine>139</CurrentLine>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\..\Common\ARM\startup_ARMCM0.s</PathWithFileName> <PathWithFileName>..\..\Common\ARM\startup_ARMCM0.s</PathWithFileName>
<FilenameWithoutPath>startup_ARMCM0.s</FilenameWithoutPath> <FilenameWithoutPath>startup_ARMCM0.s</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
<File> <File>
<GroupNumber>2</GroupNumber> <GroupNumber>2</GroupNumber>
@ -260,6 +274,8 @@
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\..\Common\system_ARMCM0.c</PathWithFileName> <PathWithFileName>..\..\Common\system_ARMCM0.c</PathWithFileName>
<FilenameWithoutPath>system_ARMCM0.c</FilenameWithoutPath> <FilenameWithoutPath>system_ARMCM0.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
</Group> </Group>
@ -268,6 +284,7 @@
<tvExp>1</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File> <File>
<GroupNumber>3</GroupNumber> <GroupNumber>3</GroupNumber>
<FileNumber>5</FileNumber> <FileNumber>5</FileNumber>
@ -281,6 +298,8 @@
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\Lib\ARM\arm_cortexM0l_math.lib</PathWithFileName> <PathWithFileName>..\..\..\..\Lib\ARM\arm_cortexM0l_math.lib</PathWithFileName>
<FilenameWithoutPath>arm_cortexM0l_math.lib</FilenameWithoutPath> <FilenameWithoutPath>arm_cortexM0l_math.lib</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
</Group> </Group>

View File

@ -61,6 +61,8 @@
<UserProg2Name></UserProg2Name> <UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode> <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode> <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile> </BeforeCompile>
<BeforeMake> <BeforeMake>
<RunUserProg1>0</RunUserProg1> <RunUserProg1>0</RunUserProg1>
@ -134,6 +136,7 @@
<RestoreMemoryDisplay>1</RestoreMemoryDisplay> <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
<RestoreFunctions>0</RestoreFunctions> <RestoreFunctions>0</RestoreFunctions>
<RestoreToolbox>1</RestoreToolbox> <RestoreToolbox>1</RestoreToolbox>
<RestoreTracepoints>0</RestoreTracepoints>
</Target> </Target>
<RunDebugAfterBuild>0</RunDebugAfterBuild> <RunDebugAfterBuild>0</RunDebugAfterBuild>
<TargetSelection>-1</TargetSelection> <TargetSelection>-1</TargetSelection>
@ -342,6 +345,7 @@
<Rwpi>0</Rwpi> <Rwpi>0</Rwpi>
<wLevel>0</wLevel> <wLevel>0</wLevel>
<uThumb>0</uThumb> <uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<VariousControls> <VariousControls>
<MiscControls></MiscControls> <MiscControls></MiscControls>
<Define>ARM_MATH_CM0</Define> <Define>ARM_MATH_CM0</Define>
@ -357,6 +361,7 @@
<SplitLS>0</SplitLS> <SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk> <SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn> <NoWarn>0</NoWarn>
<uSurpInc>0</uSurpInc>
<VariousControls> <VariousControls>
<MiscControls></MiscControls> <MiscControls></MiscControls>
<Define></Define> <Define></Define>

View File

@ -103,6 +103,7 @@
<tRmem>1</tRmem> <tRmem>1</tRmem>
<tRfunc>0</tRfunc> <tRfunc>0</tRfunc>
<tRbox>1</tRbox> <tRbox>1</tRbox>
<tRtrace>0</tRtrace>
<sRunDeb>0</sRunDeb> <sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime> <sLrtime>0</sLrtime>
<nTsel>-1</nTsel> <nTsel>-1</nTsel>
@ -134,32 +135,34 @@
<Bp> <Bp>
<Number>0</Number> <Number>0</Number>
<Type>0</Type> <Type>0</Type>
<LineNumber>143</LineNumber> <LineNumber>151</LineNumber>
<EnabledFlag>1</EnabledFlag> <EnabledFlag>1</EnabledFlag>
<Address>498</Address> <Address>0</Address>
<ByteObject>0</ByteObject> <ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects> <ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject> <SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess> <BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount> <BreakIfRCount>0</BreakIfRCount>
<Filename></Filename> <Filename>C:\CMSIS\CMSIS_Setup\CMSIS\DSP_Lib\Examples\arm_fft_bin_example\arm_fft_bin_example_f32.c</Filename>
<ExecCommand></ExecCommand> <ExecCommand></ExecCommand>
<Expression>\\arm_cortexM3l_fft_bin_example\../arm_fft_bin_example_f32.c\143</Expression> <Expression></Expression>
</Bp> </Bp>
<Bp> <Bp>
<Number>1</Number> <Number>1</Number>
<Type>0</Type> <Type>0</Type>
<LineNumber>146</LineNumber> <LineNumber>154</LineNumber>
<EnabledFlag>1</EnabledFlag> <EnabledFlag>1</EnabledFlag>
<Address>502</Address> <Address>0</Address>
<ByteObject>0</ByteObject> <ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects> <ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject> <SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess> <BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount> <BreakIfRCount>0</BreakIfRCount>
<Filename></Filename> <Filename>C:\CMSIS\CMSIS_Setup\CMSIS\DSP_Lib\Examples\arm_fft_bin_example\arm_fft_bin_example_f32.c</Filename>
<ExecCommand></ExecCommand> <ExecCommand></ExecCommand>
<Expression>\\arm_cortexM3l_fft_bin_example\../arm_fft_bin_example_f32.c\146</Expression> <Expression></Expression>
</Bp> </Bp>
</Breakpoint> </Breakpoint>
<DebugFlag> <DebugFlag>
@ -188,6 +191,9 @@
<newCpu>0</newCpu> <newCpu>0</newCpu>
<uProt>0</uProt> <uProt>0</uProt>
</DebugFlag> </DebugFlag>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<LintExecutable></LintExecutable> <LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile> <LintConfigFile></LintConfigFile>
</TargetOption> </TargetOption>
@ -198,6 +204,7 @@
<tvExp>1</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File> <File>
<GroupNumber>1</GroupNumber> <GroupNumber>1</GroupNumber>
<FileNumber>1</FileNumber> <FileNumber>1</FileNumber>
@ -211,6 +218,8 @@
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\arm_fft_bin_data.c</PathWithFileName> <PathWithFileName>..\arm_fft_bin_data.c</PathWithFileName>
<FilenameWithoutPath>arm_fft_bin_data.c</FilenameWithoutPath> <FilenameWithoutPath>arm_fft_bin_data.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
<File> <File>
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@ -220,11 +229,13 @@
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<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\arm_fft_bin_example_f32.c</PathWithFileName> <PathWithFileName>..\arm_fft_bin_example_f32.c</PathWithFileName>
<FilenameWithoutPath>arm_fft_bin_example_f32.c</FilenameWithoutPath> <FilenameWithoutPath>arm_fft_bin_example_f32.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
</Group> </Group>
@ -233,6 +244,7 @@
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<File> <File>
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@ -241,11 +253,13 @@
<Focus>0</Focus> <Focus>0</Focus>
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<CurrentLine>126</CurrentLine> <CurrentLine>139</CurrentLine>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\..\Common\ARM\startup_ARMCM3.s</PathWithFileName> <PathWithFileName>..\..\Common\ARM\startup_ARMCM3.s</PathWithFileName>
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<File> <File>
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@ -260,6 +274,8 @@
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\..\Common\system_ARMCM3.c</PathWithFileName> <PathWithFileName>..\..\Common\system_ARMCM3.c</PathWithFileName>
<FilenameWithoutPath>system_ARMCM3.c</FilenameWithoutPath> <FilenameWithoutPath>system_ARMCM3.c</FilenameWithoutPath>
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@ -268,6 +284,7 @@
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View File

@ -61,6 +61,8 @@
<UserProg2Name></UserProg2Name> <UserProg2Name></UserProg2Name>
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<BeforeMake> <BeforeMake>
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@ -134,6 +136,7 @@
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@ -342,6 +345,7 @@
<Rwpi>0</Rwpi> <Rwpi>0</Rwpi>
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<VariousControls> <VariousControls>
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<Define>ARM_MATH_CM3</Define> <Define>ARM_MATH_CM3</Define>
@ -357,6 +361,7 @@
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View File

@ -103,6 +103,7 @@
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@ -134,32 +135,34 @@
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<Filename></Filename> <Filename>C:\CMSIS\CMSIS_Setup\CMSIS\DSP_Lib\Examples\arm_fft_bin_example\arm_fft_bin_example_f32.c</Filename>
<ExecCommand></ExecCommand> <ExecCommand></ExecCommand>
<Expression>\\arm_cortexM4lf_fft_bin_example\../arm_fft_bin_example_f32.c\143</Expression> <Expression></Expression>
</Bp> </Bp>
<Bp> <Bp>
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<LineNumber>146</LineNumber> <LineNumber>154</LineNumber>
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<BreakByAccess>0</BreakByAccess> <BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount> <BreakIfRCount>0</BreakIfRCount>
<Filename></Filename> <Filename>C:\CMSIS\CMSIS_Setup\CMSIS\DSP_Lib\Examples\arm_fft_bin_example\arm_fft_bin_example_f32.c</Filename>
<ExecCommand></ExecCommand> <ExecCommand></ExecCommand>
<Expression>\\arm_cortexM4lf_fft_bin_example\../arm_fft_bin_example_f32.c\146</Expression> <Expression></Expression>
</Bp> </Bp>
</Breakpoint> </Breakpoint>
<DebugFlag> <DebugFlag>
@ -188,6 +191,9 @@
<newCpu>0</newCpu> <newCpu>0</newCpu>
<uProt>0</uProt> <uProt>0</uProt>
</DebugFlag> </DebugFlag>
<Tracepoint>
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</Tracepoint>
<LintExecutable></LintExecutable> <LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile> <LintConfigFile></LintConfigFile>
</TargetOption> </TargetOption>
@ -198,6 +204,7 @@
<tvExp>1</tvExp> <tvExp>1</tvExp>
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<FileNumber>1</FileNumber> <FileNumber>1</FileNumber>
@ -211,6 +218,8 @@
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\arm_fft_bin_data.c</PathWithFileName> <PathWithFileName>..\arm_fft_bin_data.c</PathWithFileName>
<FilenameWithoutPath>arm_fft_bin_data.c</FilenameWithoutPath> <FilenameWithoutPath>arm_fft_bin_data.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
<File> <File>
<GroupNumber>1</GroupNumber> <GroupNumber>1</GroupNumber>
@ -220,11 +229,13 @@
<Focus>0</Focus> <Focus>0</Focus>
<ColumnNumber>0</ColumnNumber> <ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<TopLine>133</TopLine> <TopLine>98</TopLine>
<CurrentLine>146</CurrentLine> <CurrentLine>154</CurrentLine>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\arm_fft_bin_example_f32.c</PathWithFileName> <PathWithFileName>..\arm_fft_bin_example_f32.c</PathWithFileName>
<FilenameWithoutPath>arm_fft_bin_example_f32.c</FilenameWithoutPath> <FilenameWithoutPath>arm_fft_bin_example_f32.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
</Group> </Group>
@ -233,6 +244,7 @@
<tvExp>1</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File> <File>
<GroupNumber>2</GroupNumber> <GroupNumber>2</GroupNumber>
<FileNumber>3</FileNumber> <FileNumber>3</FileNumber>
@ -241,11 +253,13 @@
<Focus>0</Focus> <Focus>0</Focus>
<ColumnNumber>0</ColumnNumber> <ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<TopLine>126</TopLine> <TopLine>124</TopLine>
<CurrentLine>126</CurrentLine> <CurrentLine>139</CurrentLine>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\..\Common\ARM\startup_ARMCM4.s</PathWithFileName> <PathWithFileName>..\..\Common\ARM\startup_ARMCM4.s</PathWithFileName>
<FilenameWithoutPath>startup_ARMCM4.s</FilenameWithoutPath> <FilenameWithoutPath>startup_ARMCM4.s</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
<File> <File>
<GroupNumber>2</GroupNumber> <GroupNumber>2</GroupNumber>
@ -260,6 +274,8 @@
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\..\Common\system_ARMCM4.c</PathWithFileName> <PathWithFileName>..\..\Common\system_ARMCM4.c</PathWithFileName>
<FilenameWithoutPath>system_ARMCM4.c</FilenameWithoutPath> <FilenameWithoutPath>system_ARMCM4.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
</Group> </Group>
@ -268,6 +284,7 @@
<tvExp>1</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File> <File>
<GroupNumber>3</GroupNumber> <GroupNumber>3</GroupNumber>
<FileNumber>5</FileNumber> <FileNumber>5</FileNumber>
@ -281,6 +298,8 @@
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\Lib\ARM\arm_cortexM4lf_math.lib</PathWithFileName> <PathWithFileName>..\..\..\..\Lib\ARM\arm_cortexM4lf_math.lib</PathWithFileName>
<FilenameWithoutPath>arm_cortexM4lf_math.lib</FilenameWithoutPath> <FilenameWithoutPath>arm_cortexM4lf_math.lib</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
</Group> </Group>

View File

@ -61,6 +61,8 @@
<UserProg2Name></UserProg2Name> <UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode> <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode> <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile> </BeforeCompile>
<BeforeMake> <BeforeMake>
<RunUserProg1>0</RunUserProg1> <RunUserProg1>0</RunUserProg1>
@ -134,6 +136,7 @@
<RestoreMemoryDisplay>1</RestoreMemoryDisplay> <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
<RestoreFunctions>0</RestoreFunctions> <RestoreFunctions>0</RestoreFunctions>
<RestoreToolbox>1</RestoreToolbox> <RestoreToolbox>1</RestoreToolbox>
<RestoreTracepoints>0</RestoreTracepoints>
</Target> </Target>
<RunDebugAfterBuild>0</RunDebugAfterBuild> <RunDebugAfterBuild>0</RunDebugAfterBuild>
<TargetSelection>-1</TargetSelection> <TargetSelection>-1</TargetSelection>
@ -342,6 +345,7 @@
<Rwpi>0</Rwpi> <Rwpi>0</Rwpi>
<wLevel>2</wLevel> <wLevel>2</wLevel>
<uThumb>0</uThumb> <uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<VariousControls> <VariousControls>
<MiscControls></MiscControls> <MiscControls></MiscControls>
<Define>ARM_MATH_CM4, __FPU_PRESENT = 1</Define> <Define>ARM_MATH_CM4, __FPU_PRESENT = 1</Define>
@ -357,6 +361,7 @@
<SplitLS>0</SplitLS> <SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk> <SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn> <NoWarn>0</NoWarn>
<uSurpInc>0</uSurpInc>
<VariousControls> <VariousControls>
<MiscControls></MiscControls> <MiscControls></MiscControls>
<Define></Define> <Define></Define>

View File

@ -1,3 +1,43 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2012 ARM Limited. All rights reserved.
*
* $Date: 17. January 2013
* $Revision: V1.4.0
*
* Project: CMSIS DSP Library
* Title: arm_fft_bin_data.c
*
* Description: Data file used for example code
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* - Neither the name of ARM LIMITED nor the names of its contributors
* may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* -------------------------------------------------------------------- */
#include "arm_math.h" #include "arm_math.h"
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------

View File

@ -1,27 +1,42 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved. * Copyright (C) 2010-2012 ARM Limited. All rights reserved.
* *
* $Date: 29. November 2010 * $Date: 17. January 2013
* $Revision: V1.0.3 * $Revision: V1.4.0
*
* Project: CMSIS DSP Library
* *
* Project: CMSIS DSP Library * Description: Example code demonstrating calculation of Max energy bin of
* Title: arm_fft_bin_example_f32.c * frequency domain of input signal.
*
* Description: Example code demonstrating calculation of Max energy bin of
* frequency domain of input signal.
* *
* Target Processor: Cortex-M4/Cortex-M3 * Target Processor: Cortex-M4/Cortex-M3
* *
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* - Neither the name of ARM LIMITED nor the names of its contributors
* may be used to endorse or promote products derived from this
* software without specific prior written permission.
* *
* Version 1.0.3 2010/11/29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* Re-organized the CMSIS folders and updated documentation. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* Version 1.0.1 2010/10/05 KK * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* Production release and review comments incorporated. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* Version 1.0.0 2010/09/20 KK * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* Production release and review comments incorporated. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* ------------------------------------------------------------------- */ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* -------------------------------------------------------------------- */
/** /**
* @ingroup groupExamples * @ingroup groupExamples
@ -64,8 +79,7 @@
* *
* \par CMSIS DSP Software Library Functions Used: * \par CMSIS DSP Software Library Functions Used:
* \par * \par
* - arm_cfft_radix4_init_f32() * - arm_cfft_f32()
* - arm_cfft_radix4_f32()
* - arm_cmplx_mag_f32() * - arm_cmplx_mag_f32()
* - arm_max_f32() * - arm_max_f32()
* *
@ -80,6 +94,7 @@
#include "arm_math.h" #include "arm_math.h"
#include "arm_const_structs.h"
#define TEST_LENGTH_SAMPLES 2048 #define TEST_LENGTH_SAMPLES 2048
@ -106,47 +121,37 @@ uint32_t refIndex = 213, testIndex = 0;
int32_t main(void) int32_t main(void)
{ {
arm_status status; arm_status status;
arm_cfft_radix4_instance_f32 S; float32_t maxValue;
float32_t maxValue;
status = ARM_MATH_SUCCESS;
status = ARM_MATH_SUCCESS;
/* Process the data through the CFFT/CIFFT module */
/* Initialize the CFFT/CIFFT module */ arm_cfft_f32(&arm_cfft_sR_f32_len1024, testInput_f32_10khz, ifftFlag, doBitReverse);
status = arm_cfft_radix4_init_f32(&S, fftSize,
ifftFlag, doBitReverse); /* Process the data through the Complex Magnitude Module for
calculating the magnitude at each bin */
/* Process the data through the CFFT/CIFFT module */ arm_cmplx_mag_f32(testInput_f32_10khz, testOutput, fftSize);
arm_cfft_radix4_f32(&S, testInput_f32_10khz);
/* Calculates maxValue and returns corresponding BIN value */
arm_max_f32(testOutput, fftSize, &maxValue, &testIndex);
/* Process the data through the Complex Magnitude Module for
calculating the magnitude at each bin */ if(testIndex != refIndex)
arm_cmplx_mag_f32(testInput_f32_10khz, testOutput, {
fftSize); status = ARM_MATH_TEST_FAILURE;
}
/* Calculates maxValue and returns corresponding BIN value */
arm_max_f32(testOutput, fftSize, &maxValue, &testIndex); /* ----------------------------------------------------------------------
** Loop here if the signals fail the PASS check.
if(testIndex != refIndex) ** This denotes a test failure
{ ** ------------------------------------------------------------------- */
status = ARM_MATH_TEST_FAILURE;
} if( status != ARM_MATH_SUCCESS)
{
/* ---------------------------------------------------------------------- while(1);
** Loop here if the signals fail the PASS check. }
** This denotes a test failure
** ------------------------------------------------------------------- */
if( status != ARM_MATH_SUCCESS)
{
while(1);
}
while(1); /* main function does not return */ while(1); /* main function does not return */
} }
/** \endlink */ /** \endlink */

View File

@ -75,7 +75,7 @@
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget> <IsCurrentTarget>1</IsCurrentTarget>
</OPTFL> </OPTFL>
<CpuCode>0</CpuCode> <CpuCode>255</CpuCode>
<DllOpt> <DllOpt>
<SimDllName>SARMCM3.DLL</SimDllName> <SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments></SimDllArguments> <SimDllArguments></SimDllArguments>
@ -103,6 +103,7 @@
<tRmem>1</tRmem> <tRmem>1</tRmem>
<tRfunc>0</tRfunc> <tRfunc>0</tRfunc>
<tRbox>1</tRbox> <tRbox>1</tRbox>
<tRtrace>0</tRtrace>
<sRunDeb>0</sRunDeb> <sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime> <sLrtime>0</sLrtime>
<nTsel>-1</nTsel> <nTsel>-1</nTsel>
@ -134,32 +135,34 @@
<Bp> <Bp>
<Number>0</Number> <Number>0</Number>
<Type>0</Type> <Type>0</Type>
<LineNumber>211</LineNumber> <LineNumber>227</LineNumber>
<EnabledFlag>1</EnabledFlag> <EnabledFlag>1</EnabledFlag>
<Address>440</Address> <Address>0</Address>
<ByteObject>0</ByteObject> <ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects> <ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject> <SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess> <BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount> <BreakIfRCount>0</BreakIfRCount>
<Filename></Filename> <Filename>C:\CMSIS\CMSIS_Setup\CMSIS\DSP_Lib\Examples\arm_fir_example\arm_fir_example_f32.c</Filename>
<ExecCommand></ExecCommand> <ExecCommand></ExecCommand>
<Expression>\\arm_cortexM0l_fir_example\../arm_fir_example_f32.c\211</Expression> <Expression></Expression>
</Bp> </Bp>
<Bp> <Bp>
<Number>1</Number> <Number>1</Number>
<Type>0</Type> <Type>0</Type>
<LineNumber>214</LineNumber> <LineNumber>230</LineNumber>
<EnabledFlag>1</EnabledFlag> <EnabledFlag>1</EnabledFlag>
<Address>444</Address> <Address>0</Address>
<ByteObject>0</ByteObject> <ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects> <ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject> <SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess> <BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount> <BreakIfRCount>0</BreakIfRCount>
<Filename></Filename> <Filename>C:\CMSIS\CMSIS_Setup\CMSIS\DSP_Lib\Examples\arm_fir_example\arm_fir_example_f32.c</Filename>
<ExecCommand></ExecCommand> <ExecCommand></ExecCommand>
<Expression>\\arm_cortexM0l_fir_example\../arm_fir_example_f32.c\214</Expression> <Expression></Expression>
</Bp> </Bp>
</Breakpoint> </Breakpoint>
<DebugFlag> <DebugFlag>
@ -188,6 +191,9 @@
<newCpu>0</newCpu> <newCpu>0</newCpu>
<uProt>0</uProt> <uProt>0</uProt>
</DebugFlag> </DebugFlag>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<LintExecutable></LintExecutable> <LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile> <LintConfigFile></LintConfigFile>
</TargetOption> </TargetOption>
@ -198,6 +204,7 @@
<tvExp>1</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File> <File>
<GroupNumber>1</GroupNumber> <GroupNumber>1</GroupNumber>
<FileNumber>1</FileNumber> <FileNumber>1</FileNumber>
@ -211,6 +218,8 @@
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\arm_fir_data.c</PathWithFileName> <PathWithFileName>..\arm_fir_data.c</PathWithFileName>
<FilenameWithoutPath>arm_fir_data.c</FilenameWithoutPath> <FilenameWithoutPath>arm_fir_data.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
<File> <File>
<GroupNumber>1</GroupNumber> <GroupNumber>1</GroupNumber>
@ -220,11 +229,13 @@
<Focus>0</Focus> <Focus>0</Focus>
<ColumnNumber>0</ColumnNumber> <ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<TopLine>201</TopLine> <TopLine>174</TopLine>
<CurrentLine>214</CurrentLine> <CurrentLine>230</CurrentLine>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\arm_fir_example_f32.c</PathWithFileName> <PathWithFileName>..\arm_fir_example_f32.c</PathWithFileName>
<FilenameWithoutPath>arm_fir_example_f32.c</FilenameWithoutPath> <FilenameWithoutPath>arm_fir_example_f32.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
<File> <File>
<GroupNumber>1</GroupNumber> <GroupNumber>1</GroupNumber>
@ -239,6 +250,8 @@
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\..\Common\Source\math_helper.c</PathWithFileName> <PathWithFileName>..\..\Common\Source\math_helper.c</PathWithFileName>
<FilenameWithoutPath>math_helper.c</FilenameWithoutPath> <FilenameWithoutPath>math_helper.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
</Group> </Group>
@ -247,6 +260,7 @@
<tvExp>1</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File> <File>
<GroupNumber>2</GroupNumber> <GroupNumber>2</GroupNumber>
<FileNumber>4</FileNumber> <FileNumber>4</FileNumber>
@ -255,11 +269,13 @@
<Focus>0</Focus> <Focus>0</Focus>
<ColumnNumber>0</ColumnNumber> <ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<TopLine>126</TopLine> <TopLine>124</TopLine>
<CurrentLine>126</CurrentLine> <CurrentLine>139</CurrentLine>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\..\Common\ARM\startup_ARMCM0.s</PathWithFileName> <PathWithFileName>..\..\Common\ARM\startup_ARMCM0.s</PathWithFileName>
<FilenameWithoutPath>startup_ARMCM0.s</FilenameWithoutPath> <FilenameWithoutPath>startup_ARMCM0.s</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
<File> <File>
<GroupNumber>2</GroupNumber> <GroupNumber>2</GroupNumber>
@ -274,6 +290,8 @@
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\..\Common\system_ARMCM0.c</PathWithFileName> <PathWithFileName>..\..\Common\system_ARMCM0.c</PathWithFileName>
<FilenameWithoutPath>system_ARMCM0.c</FilenameWithoutPath> <FilenameWithoutPath>system_ARMCM0.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
</Group> </Group>
@ -282,6 +300,7 @@
<tvExp>1</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File> <File>
<GroupNumber>3</GroupNumber> <GroupNumber>3</GroupNumber>
<FileNumber>6</FileNumber> <FileNumber>6</FileNumber>
@ -295,6 +314,8 @@
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\Lib\ARM\arm_cortexM0l_math.lib</PathWithFileName> <PathWithFileName>..\..\..\..\Lib\ARM\arm_cortexM0l_math.lib</PathWithFileName>
<FilenameWithoutPath>arm_cortexM0l_math.lib</FilenameWithoutPath> <FilenameWithoutPath>arm_cortexM0l_math.lib</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
</Group> </Group>

View File

@ -61,6 +61,8 @@
<UserProg2Name></UserProg2Name> <UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode> <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode> <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile> </BeforeCompile>
<BeforeMake> <BeforeMake>
<RunUserProg1>0</RunUserProg1> <RunUserProg1>0</RunUserProg1>
@ -134,6 +136,7 @@
<RestoreMemoryDisplay>1</RestoreMemoryDisplay> <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
<RestoreFunctions>0</RestoreFunctions> <RestoreFunctions>0</RestoreFunctions>
<RestoreToolbox>1</RestoreToolbox> <RestoreToolbox>1</RestoreToolbox>
<RestoreTracepoints>0</RestoreTracepoints>
</Target> </Target>
<RunDebugAfterBuild>0</RunDebugAfterBuild> <RunDebugAfterBuild>0</RunDebugAfterBuild>
<TargetSelection>-1</TargetSelection> <TargetSelection>-1</TargetSelection>
@ -342,6 +345,7 @@
<Rwpi>0</Rwpi> <Rwpi>0</Rwpi>
<wLevel>0</wLevel> <wLevel>0</wLevel>
<uThumb>0</uThumb> <uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<VariousControls> <VariousControls>
<MiscControls></MiscControls> <MiscControls></MiscControls>
<Define>ARM_MATH_CM0</Define> <Define>ARM_MATH_CM0</Define>
@ -357,6 +361,7 @@
<SplitLS>0</SplitLS> <SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk> <SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn> <NoWarn>0</NoWarn>
<uSurpInc>0</uSurpInc>
<VariousControls> <VariousControls>
<MiscControls></MiscControls> <MiscControls></MiscControls>
<Define></Define> <Define></Define>

View File

@ -103,6 +103,7 @@
<tRmem>1</tRmem> <tRmem>1</tRmem>
<tRfunc>0</tRfunc> <tRfunc>0</tRfunc>
<tRbox>1</tRbox> <tRbox>1</tRbox>
<tRtrace>0</tRtrace>
<sRunDeb>0</sRunDeb> <sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime> <sLrtime>0</sLrtime>
<nTsel>-1</nTsel> <nTsel>-1</nTsel>
@ -134,32 +135,34 @@
<Bp> <Bp>
<Number>0</Number> <Number>0</Number>
<Type>0</Type> <Type>0</Type>
<LineNumber>211</LineNumber> <LineNumber>227</LineNumber>
<EnabledFlag>1</EnabledFlag> <EnabledFlag>1</EnabledFlag>
<Address>530</Address> <Address>0</Address>
<ByteObject>0</ByteObject> <ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects> <ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject> <SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess> <BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount> <BreakIfRCount>0</BreakIfRCount>
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@ -188,6 +191,9 @@
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View File

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View File

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View File

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View File

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/* ----------------------------------------------------------------------
* Copyright (C) 2010-2012 ARM Limited. All rights reserved.
*
* $Date: 17. January 2013
* $Revision: V1.4.0
*
* Project: CMSIS DSP Library
* Title: arm_fir_data.c
*
* Description: Data file used for example code
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* - Neither the name of ARM LIMITED nor the names of its contributors
* may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* -------------------------------------------------------------------- */
#include "arm_math.h" #include "arm_math.h"
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------

View File

@ -1,49 +1,65 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved. * Copyright (C) 2010-2012 ARM Limited. All rights reserved.
* *
* $Date: 29. November 2010 * $Date: 17. January 2013
* $Revision: V1.0.3 * $Revision: V1.4.0
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_fir_example_f32.c * Title: arm_fir_example_f32.c
* *
* Description: Example code demonstrating how an FIR filter can be used * Description: Example code demonstrating how an FIR filter can be used
* as a low pass filter. * as a low pass filter.
*
* Target Processor: Cortex-M4/Cortex-M3
* *
* Target Processor: Cortex-M4/Cortex-M3
* *
* Version 1.0.3 2010/11/29 * Redistribution and use in source and binary forms, with or without
* Re-organized the CMSIS folders and updated documentation. * modification, are permitted provided that the following conditions
* * are met:
* Version 1.0.1 2010/10/05 KK * - Redistributions of source code must retain the above copyright
* Production release and review comments incorporated. * notice, this list of conditions and the following disclaimer.
* * - Redistributions in binary form must reproduce the above copyright
* Version 1.0.0 2010/09/20 KK * notice, this list of conditions and the following disclaimer in
* Production release and review comments incorporated. * the documentation and/or other materials provided with the
* ------------------------------------------------------------------- */ * distribution.
* - Neither the name of ARM LIMITED nor the names of its contributors
/** * may be used to endorse or promote products derived from this
* @ingroup groupExamples * software without specific prior written permission.
*/ *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
/** * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* -------------------------------------------------------------------- */
/**
* @ingroup groupExamples
*/
/**
* @defgroup FIRLPF FIR Lowpass Filter Example * @defgroup FIRLPF FIR Lowpass Filter Example
* *
* \par Description: * \par Description:
* \par * \par
* Removes high frequency signal components from the input using an FIR lowpass filter. * Removes high frequency signal components from the input using an FIR lowpass filter.
* The example demonstrates how to configure an FIR filter and then pass data through * The example demonstrates how to configure an FIR filter and then pass data through
* it in a block-by-block fashion. * it in a block-by-block fashion.
* \image html FIRLPF_signalflow.gif * \image html FIRLPF_signalflow.gif
* *
* \par Algorithm: * \par Algorithm:
* \par * \par
* The input signal is a sum of two sine waves: 1 kHz and 15 kHz. * The input signal is a sum of two sine waves: 1 kHz and 15 kHz.
* This is processed by an FIR lowpass filter with cutoff frequency 6 kHz. * This is processed by an FIR lowpass filter with cutoff frequency 6 kHz.
* The lowpass filter eliminates the 15 kHz signal leaving only the 1 kHz sine wave at the output. * The lowpass filter eliminates the 15 kHz signal leaving only the 1 kHz sine wave at the output.
* \par * \par
* The lowpass filter was designed using MATLAB with a sample rate of 48 kHz and * The lowpass filter was designed using MATLAB with a sample rate of 48 kHz and
* a length of 29 points. * a length of 29 points.
* The MATLAB code to generate the filter coefficients is shown below: * The MATLAB code to generate the filter coefficients is shown below:
* <pre> * <pre>
@ -56,27 +72,27 @@
* <pre> * <pre>
* fliplr(h) * fliplr(h)
* </pre> * </pre>
* The resulting filter coefficients and are shown below. * The resulting filter coefficients and are shown below.
* Note that the filter is symmetric (a property of linear phase FIR filters) * Note that the filter is symmetric (a property of linear phase FIR filters)
* and the point of symmetry is sample 14. Thus the filter will have a delay of * and the point of symmetry is sample 14. Thus the filter will have a delay of
* 14 samples for all frequencies. * 14 samples for all frequencies.
* \par * \par
* \image html FIRLPF_coeffs.gif * \image html FIRLPF_coeffs.gif
* \par * \par
* The frequency response of the filter is shown next. * The frequency response of the filter is shown next.
* The passband gain of the filter is 1.0 and it reaches 0.5 at the cutoff frequency 6 kHz. * The passband gain of the filter is 1.0 and it reaches 0.5 at the cutoff frequency 6 kHz.
* \par * \par
* \image html FIRLPF_response.gif * \image html FIRLPF_response.gif
* \par * \par
* The input signal is shown below. * The input signal is shown below.
* The left hand side shows the signal in the time domain while the right hand side is a frequency domain representation. * The left hand side shows the signal in the time domain while the right hand side is a frequency domain representation.
* The two sine wave components can be clearly seen. * The two sine wave components can be clearly seen.
* \par * \par
* \image html FIRLPF_input.gif * \image html FIRLPF_input.gif
* \par * \par
* The output of the filter is shown below. The 15 kHz component has been eliminated. * The output of the filter is shown below. The 15 kHz component has been eliminated.
* \par * \par
* \image html FIRLPF_output.gif * \image html FIRLPF_output.gif
* *
* \par Variables Description: * \par Variables Description:
* \par * \par
@ -86,135 +102,132 @@
* \li \c firStateF32 points to state buffer * \li \c firStateF32 points to state buffer
* \li \c firCoeffs32 points to coefficient buffer * \li \c firCoeffs32 points to coefficient buffer
* \li \c blockSize number of samples processed at a time * \li \c blockSize number of samples processed at a time
* \li \c numBlocks number of frames * \li \c numBlocks number of frames
* *
* \par CMSIS DSP Software Library Functions Used: * \par CMSIS DSP Software Library Functions Used:
* \par * \par
* - arm_fir_init_f32() * - arm_fir_init_f32()
* - arm_fir_f32() * - arm_fir_f32()
* *
* <b> Refer </b> * <b> Refer </b>
* \link arm_fir_example_f32.c \endlink * \link arm_fir_example_f32.c \endlink
* *
*/ */
/** \example arm_fir_example_f32.c
*/
/* ----------------------------------------------------------------------
** Include Files
** ------------------------------------------------------------------- */
#include "arm_math.h"
#include "math_helper.h"
/* ----------------------------------------------------------------------
** Macro Defines
** ------------------------------------------------------------------- */
#define TEST_LENGTH_SAMPLES 320 /** \example arm_fir_example_f32.c
#define SNR_THRESHOLD_F32 140.0f */
#define BLOCK_SIZE 32
#define NUM_TAPS 29 /* ----------------------------------------------------------------------
** Include Files
/* ------------------------------------------------------------------- ** ------------------------------------------------------------------- */
#include "arm_math.h"
#include "math_helper.h"
/* ----------------------------------------------------------------------
** Macro Defines
** ------------------------------------------------------------------- */
#define TEST_LENGTH_SAMPLES 320
#define SNR_THRESHOLD_F32 140.0f
#define BLOCK_SIZE 32
#define NUM_TAPS 29
/* -------------------------------------------------------------------
* The input signal and reference output (computed with MATLAB) * The input signal and reference output (computed with MATLAB)
* are defined externally in arm_fir_lpf_data.c. * are defined externally in arm_fir_lpf_data.c.
* ------------------------------------------------------------------- */ * ------------------------------------------------------------------- */
extern float32_t testInput_f32_1kHz_15kHz[TEST_LENGTH_SAMPLES]; extern float32_t testInput_f32_1kHz_15kHz[TEST_LENGTH_SAMPLES];
extern float32_t refOutput[TEST_LENGTH_SAMPLES]; extern float32_t refOutput[TEST_LENGTH_SAMPLES];
/* -------------------------------------------------------------------
* Declare Test output buffer
* ------------------------------------------------------------------- */
static float32_t testOutput[TEST_LENGTH_SAMPLES]; /* -------------------------------------------------------------------
* Declare Test output buffer
/* ------------------------------------------------------------------- * ------------------------------------------------------------------- */
* Declare State buffer of size (numTaps + blockSize - 1)
* ------------------------------------------------------------------- */
static float32_t firStateF32[BLOCK_SIZE + NUM_TAPS - 1]; static float32_t testOutput[TEST_LENGTH_SAMPLES];
/* ---------------------------------------------------------------------- /* -------------------------------------------------------------------
** FIR Coefficients buffer generated using fir1() MATLAB function. * Declare State buffer of size (numTaps + blockSize - 1)
* ------------------------------------------------------------------- */
static float32_t firStateF32[BLOCK_SIZE + NUM_TAPS - 1];
/* ----------------------------------------------------------------------
** FIR Coefficients buffer generated using fir1() MATLAB function.
** fir1(28, 6/24) ** fir1(28, 6/24)
** ------------------------------------------------------------------- */ ** ------------------------------------------------------------------- */
const float32_t firCoeffs32[NUM_TAPS] = {
-0.0018225230f, -0.0015879294f, +0.0000000000f, +0.0036977508f, +0.0080754303f, +0.0085302217f, -0.0000000000f, -0.0173976984f,
-0.0341458607f, -0.0333591565f, +0.0000000000f, +0.0676308395f, +0.1522061835f, +0.2229246956f, +0.2504960933f, +0.2229246956f,
+0.1522061835f, +0.0676308395f, +0.0000000000f, -0.0333591565f, -0.0341458607f, -0.0173976984f, -0.0000000000f, +0.0085302217f,
+0.0080754303f, +0.0036977508f, +0.0000000000f, -0.0015879294f, -0.0018225230f
};
/* ------------------------------------------------------------------
* Global variables for FIR LPF Example
* ------------------------------------------------------------------- */
uint32_t blockSize = BLOCK_SIZE; const float32_t firCoeffs32[NUM_TAPS] = {
uint32_t numBlocks = TEST_LENGTH_SAMPLES/BLOCK_SIZE; -0.0018225230f, -0.0015879294f, +0.0000000000f, +0.0036977508f, +0.0080754303f, +0.0085302217f, -0.0000000000f, -0.0173976984f,
-0.0341458607f, -0.0333591565f, +0.0000000000f, +0.0676308395f, +0.1522061835f, +0.2229246956f, +0.2504960933f, +0.2229246956f,
float32_t snr; +0.1522061835f, +0.0676308395f, +0.0000000000f, -0.0333591565f, -0.0341458607f, -0.0173976984f, -0.0000000000f, +0.0085302217f,
+0.0080754303f, +0.0036977508f, +0.0000000000f, -0.0015879294f, -0.0018225230f
/* ---------------------------------------------------------------------- };
* FIR LPF Example
* ------------------------------------------------------------------- */ /* ------------------------------------------------------------------
* Global variables for FIR LPF Example
int32_t main(void) * ------------------------------------------------------------------- */
{
uint32_t i; uint32_t blockSize = BLOCK_SIZE;
arm_fir_instance_f32 S; uint32_t numBlocks = TEST_LENGTH_SAMPLES/BLOCK_SIZE;
arm_status status;
float32_t *inputF32, *outputF32; float32_t snr;
/* Initialize input and output buffer pointers */ /* ----------------------------------------------------------------------
inputF32 = &testInput_f32_1kHz_15kHz[0]; * FIR LPF Example
outputF32 = &testOutput[0]; * ------------------------------------------------------------------- */
int32_t main(void)
{
uint32_t i;
arm_fir_instance_f32 S;
arm_status status;
float32_t *inputF32, *outputF32;
/* Initialize input and output buffer pointers */
inputF32 = &testInput_f32_1kHz_15kHz[0];
outputF32 = &testOutput[0];
/* Call FIR init function to initialize the instance structure. */ /* Call FIR init function to initialize the instance structure. */
arm_fir_init_f32(&S, NUM_TAPS, (float32_t *)&firCoeffs32[0], &firStateF32[0], blockSize); arm_fir_init_f32(&S, NUM_TAPS, (float32_t *)&firCoeffs32[0], &firStateF32[0], blockSize);
/* ----------------------------------------------------------------------
** Call the FIR process function for every blockSize samples
** ------------------------------------------------------------------- */
for(i=0; i < numBlocks; i++) /* ----------------------------------------------------------------------
{ ** Call the FIR process function for every blockSize samples
arm_fir_f32(&S, inputF32 + (i * blockSize), outputF32 + (i * blockSize), blockSize); ** ------------------------------------------------------------------- */
}
for(i=0; i < numBlocks; i++)
/* ---------------------------------------------------------------------- {
arm_fir_f32(&S, inputF32 + (i * blockSize), outputF32 + (i * blockSize), blockSize);
}
/* ----------------------------------------------------------------------
** Compare the generated output against the reference output computed ** Compare the generated output against the reference output computed
** in MATLAB. ** in MATLAB.
** ------------------------------------------------------------------- */ ** ------------------------------------------------------------------- */
snr = arm_snr_f32(&refOutput[0], &testOutput[0], TEST_LENGTH_SAMPLES); snr = arm_snr_f32(&refOutput[0], &testOutput[0], TEST_LENGTH_SAMPLES);
if (snr < SNR_THRESHOLD_F32) if (snr < SNR_THRESHOLD_F32)
{ {
status = ARM_MATH_TEST_FAILURE; status = ARM_MATH_TEST_FAILURE;
} }
else else
{ {
status = ARM_MATH_SUCCESS; status = ARM_MATH_SUCCESS;
} }
/* ----------------------------------------------------------------------
** Loop here if the signal does not match the reference output.
** ------------------------------------------------------------------- */
if( status != ARM_MATH_SUCCESS)
{
while(1);
}
while(1); /* main function does not return */ /* ----------------------------------------------------------------------
} ** Loop here if the signal does not match the reference output.
** ------------------------------------------------------------------- */
/** \endlink */
if( status != ARM_MATH_SUCCESS)
{
while(1);
}
while(1); /* main function does not return */
}
/** \endlink */

View File

@ -75,7 +75,7 @@
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@ -188,6 +191,9 @@
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<PathWithFileName>..\arm_graphic_equalizer_example_q31.c</PathWithFileName> <PathWithFileName>..\arm_graphic_equalizer_example_q31.c</PathWithFileName>
<FilenameWithoutPath>arm_graphic_equalizer_example_q31.c</FilenameWithoutPath> <FilenameWithoutPath>arm_graphic_equalizer_example_q31.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
<File> <File>
<GroupNumber>1</GroupNumber> <GroupNumber>1</GroupNumber>
@ -239,6 +250,8 @@
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\..\Common\Source\math_helper.c</PathWithFileName> <PathWithFileName>..\..\Common\Source\math_helper.c</PathWithFileName>
<FilenameWithoutPath>math_helper.c</FilenameWithoutPath> <FilenameWithoutPath>math_helper.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
</Group> </Group>
@ -247,6 +260,7 @@
<tvExp>1</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File> <File>
<GroupNumber>2</GroupNumber> <GroupNumber>2</GroupNumber>
<FileNumber>4</FileNumber> <FileNumber>4</FileNumber>
@ -255,11 +269,13 @@
<Focus>0</Focus> <Focus>0</Focus>
<ColumnNumber>0</ColumnNumber> <ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<TopLine>126</TopLine> <TopLine>124</TopLine>
<CurrentLine>126</CurrentLine> <CurrentLine>139</CurrentLine>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\..\Common\ARM\startup_ARMCM3.s</PathWithFileName> <PathWithFileName>..\..\Common\ARM\startup_ARMCM3.s</PathWithFileName>
<FilenameWithoutPath>startup_ARMCM3.s</FilenameWithoutPath> <FilenameWithoutPath>startup_ARMCM3.s</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
<File> <File>
<GroupNumber>2</GroupNumber> <GroupNumber>2</GroupNumber>
@ -274,6 +290,8 @@
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\..\Common\system_ARMCM3.c</PathWithFileName> <PathWithFileName>..\..\Common\system_ARMCM3.c</PathWithFileName>
<FilenameWithoutPath>system_ARMCM3.c</FilenameWithoutPath> <FilenameWithoutPath>system_ARMCM3.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
</Group> </Group>
@ -282,6 +300,7 @@
<tvExp>1</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File> <File>
<GroupNumber>3</GroupNumber> <GroupNumber>3</GroupNumber>
<FileNumber>6</FileNumber> <FileNumber>6</FileNumber>
@ -295,6 +314,8 @@
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\Lib\ARM\arm_cortexM3l_math.lib</PathWithFileName> <PathWithFileName>..\..\..\..\Lib\ARM\arm_cortexM3l_math.lib</PathWithFileName>
<FilenameWithoutPath>arm_cortexM3l_math.lib</FilenameWithoutPath> <FilenameWithoutPath>arm_cortexM3l_math.lib</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
</Group> </Group>

View File

@ -61,6 +61,8 @@
<UserProg2Name></UserProg2Name> <UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode> <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode> <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile> </BeforeCompile>
<BeforeMake> <BeforeMake>
<RunUserProg1>0</RunUserProg1> <RunUserProg1>0</RunUserProg1>
@ -134,6 +136,7 @@
<RestoreMemoryDisplay>1</RestoreMemoryDisplay> <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
<RestoreFunctions>0</RestoreFunctions> <RestoreFunctions>0</RestoreFunctions>
<RestoreToolbox>1</RestoreToolbox> <RestoreToolbox>1</RestoreToolbox>
<RestoreTracepoints>0</RestoreTracepoints>
</Target> </Target>
<RunDebugAfterBuild>0</RunDebugAfterBuild> <RunDebugAfterBuild>0</RunDebugAfterBuild>
<TargetSelection>-1</TargetSelection> <TargetSelection>-1</TargetSelection>
@ -342,6 +345,7 @@
<Rwpi>0</Rwpi> <Rwpi>0</Rwpi>
<wLevel>2</wLevel> <wLevel>2</wLevel>
<uThumb>0</uThumb> <uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<VariousControls> <VariousControls>
<MiscControls></MiscControls> <MiscControls></MiscControls>
<Define>ARM_MATH_CM3</Define> <Define>ARM_MATH_CM3</Define>
@ -357,6 +361,7 @@
<SplitLS>0</SplitLS> <SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk> <SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn> <NoWarn>0</NoWarn>
<uSurpInc>0</uSurpInc>
<VariousControls> <VariousControls>
<MiscControls></MiscControls> <MiscControls></MiscControls>
<Define></Define> <Define></Define>

View File

@ -103,6 +103,7 @@
<tRmem>1</tRmem> <tRmem>1</tRmem>
<tRfunc>0</tRfunc> <tRfunc>0</tRfunc>
<tRbox>1</tRbox> <tRbox>1</tRbox>
<tRtrace>0</tRtrace>
<sRunDeb>0</sRunDeb> <sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime> <sLrtime>0</sLrtime>
<nTsel>-1</nTsel> <nTsel>-1</nTsel>
@ -134,32 +135,34 @@
<Bp> <Bp>
<Number>0</Number> <Number>0</Number>
<Type>0</Type> <Type>0</Type>
<LineNumber>386</LineNumber> <LineNumber>402</LineNumber>
<EnabledFlag>1</EnabledFlag> <EnabledFlag>1</EnabledFlag>
<Address>708</Address> <Address>0</Address>
<ByteObject>0</ByteObject> <ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects> <ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject> <SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess> <BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount> <BreakIfRCount>0</BreakIfRCount>
<Filename></Filename> <Filename>C:\CMSIS\CMSIS_Setup\CMSIS\DSP_Lib\Examples\arm_graphic_equalizer_example\arm_graphic_equalizer_example_q31.c</Filename>
<ExecCommand></ExecCommand> <ExecCommand></ExecCommand>
<Expression>\\arm_cortexM4lf_graphic_equalizer_example\../arm_graphic_equalizer_example_q31.c\386</Expression> <Expression></Expression>
</Bp> </Bp>
<Bp> <Bp>
<Number>1</Number> <Number>1</Number>
<Type>0</Type> <Type>0</Type>
<LineNumber>389</LineNumber> <LineNumber>405</LineNumber>
<EnabledFlag>1</EnabledFlag> <EnabledFlag>1</EnabledFlag>
<Address>712</Address> <Address>0</Address>
<ByteObject>0</ByteObject> <ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects> <ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject> <SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess> <BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount> <BreakIfRCount>0</BreakIfRCount>
<Filename></Filename> <Filename>C:\CMSIS\CMSIS_Setup\CMSIS\DSP_Lib\Examples\arm_graphic_equalizer_example\arm_graphic_equalizer_example_q31.c</Filename>
<ExecCommand></ExecCommand> <ExecCommand></ExecCommand>
<Expression>\\arm_cortexM4lf_graphic_equalizer_example\../arm_graphic_equalizer_example_q31.c\389</Expression> <Expression></Expression>
</Bp> </Bp>
</Breakpoint> </Breakpoint>
<DebugFlag> <DebugFlag>
@ -188,6 +191,9 @@
<newCpu>0</newCpu> <newCpu>0</newCpu>
<uProt>0</uProt> <uProt>0</uProt>
</DebugFlag> </DebugFlag>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<LintExecutable></LintExecutable> <LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile> <LintConfigFile></LintConfigFile>
</TargetOption> </TargetOption>
@ -198,6 +204,7 @@
<tvExp>1</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File> <File>
<GroupNumber>1</GroupNumber> <GroupNumber>1</GroupNumber>
<FileNumber>1</FileNumber> <FileNumber>1</FileNumber>
@ -211,6 +218,8 @@
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\arm_graphic_equalizer_data.c</PathWithFileName> <PathWithFileName>..\arm_graphic_equalizer_data.c</PathWithFileName>
<FilenameWithoutPath>arm_graphic_equalizer_data.c</FilenameWithoutPath> <FilenameWithoutPath>arm_graphic_equalizer_data.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
<File> <File>
<GroupNumber>1</GroupNumber> <GroupNumber>1</GroupNumber>
@ -220,11 +229,13 @@
<Focus>0</Focus> <Focus>0</Focus>
<ColumnNumber>0</ColumnNumber> <ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<TopLine>376</TopLine> <TopLine>352</TopLine>
<CurrentLine>389</CurrentLine> <CurrentLine>405</CurrentLine>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\arm_graphic_equalizer_example_q31.c</PathWithFileName> <PathWithFileName>..\arm_graphic_equalizer_example_q31.c</PathWithFileName>
<FilenameWithoutPath>arm_graphic_equalizer_example_q31.c</FilenameWithoutPath> <FilenameWithoutPath>arm_graphic_equalizer_example_q31.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
<File> <File>
<GroupNumber>1</GroupNumber> <GroupNumber>1</GroupNumber>
@ -239,6 +250,8 @@
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\..\Common\Source\math_helper.c</PathWithFileName> <PathWithFileName>..\..\Common\Source\math_helper.c</PathWithFileName>
<FilenameWithoutPath>math_helper.c</FilenameWithoutPath> <FilenameWithoutPath>math_helper.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
</Group> </Group>
@ -247,6 +260,7 @@
<tvExp>1</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File> <File>
<GroupNumber>2</GroupNumber> <GroupNumber>2</GroupNumber>
<FileNumber>4</FileNumber> <FileNumber>4</FileNumber>
@ -255,11 +269,13 @@
<Focus>0</Focus> <Focus>0</Focus>
<ColumnNumber>0</ColumnNumber> <ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<TopLine>126</TopLine> <TopLine>124</TopLine>
<CurrentLine>126</CurrentLine> <CurrentLine>139</CurrentLine>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\..\Common\ARM\startup_ARMCM4.s</PathWithFileName> <PathWithFileName>..\..\Common\ARM\startup_ARMCM4.s</PathWithFileName>
<FilenameWithoutPath>startup_ARMCM4.s</FilenameWithoutPath> <FilenameWithoutPath>startup_ARMCM4.s</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
<File> <File>
<GroupNumber>2</GroupNumber> <GroupNumber>2</GroupNumber>
@ -274,6 +290,8 @@
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\..\Common\system_ARMCM4.c</PathWithFileName> <PathWithFileName>..\..\Common\system_ARMCM4.c</PathWithFileName>
<FilenameWithoutPath>system_ARMCM4.c</FilenameWithoutPath> <FilenameWithoutPath>system_ARMCM4.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
</Group> </Group>
@ -282,6 +300,7 @@
<tvExp>1</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File> <File>
<GroupNumber>3</GroupNumber> <GroupNumber>3</GroupNumber>
<FileNumber>6</FileNumber> <FileNumber>6</FileNumber>
@ -295,6 +314,8 @@
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\Lib\ARM\arm_cortexM4lf_math.lib</PathWithFileName> <PathWithFileName>..\..\..\..\Lib\ARM\arm_cortexM4lf_math.lib</PathWithFileName>
<FilenameWithoutPath>arm_cortexM4lf_math.lib</FilenameWithoutPath> <FilenameWithoutPath>arm_cortexM4lf_math.lib</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
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View File

@ -61,6 +61,8 @@
<UserProg2Name></UserProg2Name> <UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode> <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode> <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile> </BeforeCompile>
<BeforeMake> <BeforeMake>
<RunUserProg1>0</RunUserProg1> <RunUserProg1>0</RunUserProg1>
@ -134,6 +136,7 @@
<RestoreMemoryDisplay>1</RestoreMemoryDisplay> <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
<RestoreFunctions>0</RestoreFunctions> <RestoreFunctions>0</RestoreFunctions>
<RestoreToolbox>1</RestoreToolbox> <RestoreToolbox>1</RestoreToolbox>
<RestoreTracepoints>0</RestoreTracepoints>
</Target> </Target>
<RunDebugAfterBuild>0</RunDebugAfterBuild> <RunDebugAfterBuild>0</RunDebugAfterBuild>
<TargetSelection>-1</TargetSelection> <TargetSelection>-1</TargetSelection>
@ -342,6 +345,7 @@
<Rwpi>0</Rwpi> <Rwpi>0</Rwpi>
<wLevel>2</wLevel> <wLevel>2</wLevel>
<uThumb>0</uThumb> <uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<VariousControls> <VariousControls>
<MiscControls></MiscControls> <MiscControls></MiscControls>
<Define>ARM_MATH_CM4, __FPU_PRESENT = 1</Define> <Define>ARM_MATH_CM4, __FPU_PRESENT = 1</Define>
@ -357,6 +361,7 @@
<SplitLS>0</SplitLS> <SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk> <SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn> <NoWarn>0</NoWarn>
<uSurpInc>0</uSurpInc>
<VariousControls> <VariousControls>
<MiscControls></MiscControls> <MiscControls></MiscControls>
<Define></Define> <Define></Define>

View File

@ -1,3 +1,43 @@
/* ----------------------------------------------------------------------
* Copyright (C) 2010-2012 ARM Limited. All rights reserved.
*
* $Date: 17. January 2013
* $Revision: V1.4.0
*
* Project: CMSIS DSP Library
* Title: arm_graphic_equalizer_data.c
*
* Description: Data file used for example code
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* - Neither the name of ARM LIMITED nor the names of its contributors
* may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* -------------------------------------------------------------------- */
#include "arm_math.h" #include "arm_math.h"
float32_t testRefOutput_f32[320] = { float32_t testRefOutput_f32[320] = {

View File

@ -1,46 +1,62 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010 ARM Limited. All rights reserved. * Copyright (C) 2010-2012 ARM Limited. All rights reserved.
*
* $Date: 29. November 2010
* $Revision: V1.0.3
*
* Project: CMSIS DSP Library
* Title: arm_graphic_equalizer_example_q31.c
*
* Description: Example showing an audio graphic equalizer constructed
* out of Biquad filters.
*
* Target Processor: Cortex-M4/Cortex-M3
* *
* $Date: 17. January 2013
* $Revision: V1.4.0
* *
* Version 1.0.3 2010/11/29 * Project: CMSIS DSP Library
* Re-organized the CMSIS folders and updated documentation. * Title: arm_graphic_equalizer_example_q31.c
*
* Version 1.0.1 2010/10/05 KK
* Production release and review comments incorporated.
* *
* Version 1.0.0 2010/09/20 KK * Description: Example showing an audio graphic equalizer constructed
* Production release and review comments incorporated. * out of Biquad filters.
* ------------------------------------------------------------------- */ *
* Target Processor: Cortex-M4/Cortex-M3
/** *
* @ingroup groupExamples * Redistribution and use in source and binary forms, with or without
*/ * modification, are permitted provided that the following conditions
* are met:
/** * - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* - Neither the name of ARM LIMITED nor the names of its contributors
* may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* -------------------------------------------------------------------- */
/**
* @ingroup groupExamples
*/
/**
* @defgroup GEQ5Band Graphic Audio Equalizer Example * @defgroup GEQ5Band Graphic Audio Equalizer Example
* *
* \par Description: * \par Description:
* \par * \par
* This example demonstrates how a 5-band graphic equalizer can be constructed * This example demonstrates how a 5-band graphic equalizer can be constructed
* using the Biquad cascade functions. * using the Biquad cascade functions.
* A graphic equalizer is used in audio applications to vary the tonal quality * A graphic equalizer is used in audio applications to vary the tonal quality
* of the audio. * of the audio.
* *
* \par Block Diagram: * \par Block Diagram:
* \par * \par
* The design is based on a cascade of 5 filter sections. * The design is based on a cascade of 5 filter sections.
* \image html GEQ_signalflow.gif * \image html GEQ_signalflow.gif
* Each filter section is 4th order and consists of a cascade of two Biquads. * Each filter section is 4th order and consists of a cascade of two Biquads.
* Each filter has a nominal gain of 0 dB (1.0 in linear units) and * Each filter has a nominal gain of 0 dB (1.0 in linear units) and
* boosts or cuts signals within a specific frequency range. * boosts or cuts signals within a specific frequency range.
@ -48,20 +64,20 @@
* Each band has an adjustable boost or cut in the range of +/- 9 dB. * Each band has an adjustable boost or cut in the range of +/- 9 dB.
* For example, the band that extends from 500 to 2000 Hz has the response shown below: * For example, the band that extends from 500 to 2000 Hz has the response shown below:
* \par * \par
* \image html GEQ_bandresponse.gif * \image html GEQ_bandresponse.gif
* \par * \par
* With 1 dB steps, each filter has a total of 19 different settings. * With 1 dB steps, each filter has a total of 19 different settings.
* The filter coefficients for all possible 19 settings were precomputed * The filter coefficients for all possible 19 settings were precomputed
* in MATLAB and stored in a table. With 5 different tables, there are * in MATLAB and stored in a table. With 5 different tables, there are
* a total of 5 x 19 = 95 different 4th order filters. * a total of 5 x 19 = 95 different 4th order filters.
* All 95 responses are shown below: * All 95 responses are shown below:
* \par * \par
* \image html GEQ_allbandresponse.gif * \image html GEQ_allbandresponse.gif
* \par * \par
* Each 4th order filter has 10 coefficents for a grand total of 950 different filter * Each 4th order filter has 10 coefficents for a grand total of 950 different filter
* coefficients that must be tabulated. The input and output data is in Q31 format. * coefficients that must be tabulated. The input and output data is in Q31 format.
* For better noise performance, the two low frequency bands are implemented using the high * For better noise performance, the two low frequency bands are implemented using the high
* precision 32x64-bit Biquad filters. The remaining 3 high frequency bands use standard * precision 32x64-bit Biquad filters. The remaining 3 high frequency bands use standard
* 32x32-bit Biquad filters. The input signal used in the example is a logarithmic chirp. * 32x32-bit Biquad filters. The input signal used in the example is a logarithmic chirp.
* \par * \par
* \image html GEQ_inputchirp.gif * \image html GEQ_inputchirp.gif
@ -80,7 +96,7 @@
* \li \c testRefOutput_f32 points to the reference output data * \li \c testRefOutput_f32 points to the reference output data
* \li \c testOutput points to the test output data * \li \c testOutput points to the test output data
* \li \c inputQ31 temporary input buffer * \li \c inputQ31 temporary input buffer
* \li \c outputQ31 temporary output buffer * \li \c outputQ31 temporary output buffer
* \li \c biquadStateBand1Q31 points to state buffer for band1 * \li \c biquadStateBand1Q31 points to state buffer for band1
* \li \c biquadStateBand2Q31 points to state buffer for band2 * \li \c biquadStateBand2Q31 points to state buffer for band2
* \li \c biquadStateBand3Q31 points to state buffer for band3 * \li \c biquadStateBand3Q31 points to state buffer for band3
@ -100,20 +116,20 @@
* - arm_float_to_q31() * - arm_float_to_q31()
* - arm_q31_to_float() * - arm_q31_to_float()
* *
* <b> Refer </b> * <b> Refer </b>
* \link arm_graphic_equalizer_example_q31.c \endlink * \link arm_graphic_equalizer_example_q31.c \endlink
* *
*/ */
/** \example arm_graphic_equalizer_example_q31.c /** \example arm_graphic_equalizer_example_q31.c
*/ */
#include "arm_math.h" #include "arm_math.h"
#include "math_helper.h" #include "math_helper.h"
/* Length of the overall data in the test */ /* Length of the overall data in the test */
#define TESTLENGTH 320 #define TESTLENGTH 320
/* Block size for the underlying processing */ /* Block size for the underlying processing */
@ -126,33 +142,33 @@
#define NUMSTAGES 2 #define NUMSTAGES 2
#define SNR_THRESHOLD_F32 98 #define SNR_THRESHOLD_F32 98
/* ------------------------------------------------------------------- /* -------------------------------------------------------------------
* External Declarations for Input and Output buffers * External Declarations for Input and Output buffers
* ------------------------------------------------------------------- */ * ------------------------------------------------------------------- */
extern float32_t testInput_f32[TESTLENGTH]; extern float32_t testInput_f32[TESTLENGTH];
static float32_t testOutput[TESTLENGTH]; static float32_t testOutput[TESTLENGTH];
extern float32_t testRefOutput_f32[TESTLENGTH]; extern float32_t testRefOutput_f32[TESTLENGTH];
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
** Q31 state buffers for Band1, Band2, Band3, Band4, Band5 ** Q31 state buffers for Band1, Band2, Band3, Band4, Band5
** ------------------------------------------------------------------- */ ** ------------------------------------------------------------------- */
static q63_t biquadStateBand1Q31[4 * 2]; static q63_t biquadStateBand1Q31[4 * 2];
static q63_t biquadStateBand2Q31[4 * 2]; static q63_t biquadStateBand2Q31[4 * 2];
static q31_t biquadStateBand3Q31[4 * 2]; static q31_t biquadStateBand3Q31[4 * 2];
static q31_t biquadStateBand4Q31[4 * 2]; static q31_t biquadStateBand4Q31[4 * 2];
static q31_t biquadStateBand5Q31[4 * 2]; static q31_t biquadStateBand5Q31[4 * 2];
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
** Q31 input and output buffers ** Q31 input and output buffers
** ------------------------------------------------------------------- */ ** ------------------------------------------------------------------- */
q31_t inputQ31[BLOCKSIZE];
q31_t outputQ31[BLOCKSIZE];
q31_t inputQ31[BLOCKSIZE];
q31_t outputQ31[BLOCKSIZE];
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
** Entire coefficient table. There are 10 coefficients per 4th order Biquad ** Entire coefficient table. There are 10 coefficients per 4th order Biquad
** cascade filter. The first 10 coefficients correspond to the -9 dB gain ** cascade filter. The first 10 coefficients correspond to the -9 dB gain
@ -166,106 +182,106 @@ q31_t outputQ31[BLOCKSIZE];
const q31_t coeffTable[950] = { const q31_t coeffTable[950] = {
/* Band 1, -9 dB gain */ /* Band 1, -9 dB gain */
535576962, -1071153923, 535576962, 1073741824, -536870912, 535576962, -1063501998, 527979313, 1060865294, -524146981, 535576962, -1071153923, 535576962, 1073741824, -536870912, 535576962, -1063501998, 527979313, 1060865294, -524146981,
/* Band 1, -8 dB gain */ /* Band 1, -8 dB gain */
535723226, -1071446451, 535723226, 1073741824, -536870912, 535723226, -1063568947, 527903217, 1061230578, -524503778, 535723226, -1071446451, 535723226, 1073741824, -536870912, 535723226, -1063568947, 527903217, 1061230578, -524503778,
535868593, -1071737186, 535868593, 1073741824, -536870912, 535868593, -1063627467, 527819780, 1061585502, -524850686, 535868593, -1071737186, 535868593, 1073741824, -536870912, 535868593, -1063627467, 527819780, 1061585502, -524850686,
536013181, -1072026363, 536013181, 1073741824, -536870912, 536013181, -1063677598, 527728935, 1061930361, -525187972, 536013181, -1072026363, 536013181, 1073741824, -536870912, 536013181, -1063677598, 527728935, 1061930361, -525187972,
536157109, -1072314217, 536157109, 1073741824, -536870912, 536157109, -1063719372, 527630607, 1062265438, -525515897, 536157109, -1072314217, 536157109, 1073741824, -536870912, 536157109, -1063719372, 527630607, 1062265438, -525515897,
536300492, -1072600983, 536300492, 1073741824, -536870912, 536300492, -1063752815, 527524720, 1062591011, -525834716, 536300492, -1072600983, 536300492, 1073741824, -536870912, 536300492, -1063752815, 527524720, 1062591011, -525834716,
536443447, -1072886894, 536443447, 1073741824, -536870912, 536443447, -1063777945, 527411186, 1062907350, -526144676, 536443447, -1072886894, 536443447, 1073741824, -536870912, 536443447, -1063777945, 527411186, 1062907350, -526144676,
536586091, -1073172183, 536586091, 1073741824, -536870912, 536586091, -1063794775, 527289917, 1063214717, -526446017, 536586091, -1073172183, 536586091, 1073741824, -536870912, 536586091, -1063794775, 527289917, 1063214717, -526446017,
536728541, -1073457082, 536728541, 1073741824, -536870912, 536728541, -1063803308, 527160815, 1063513366, -526738975, 536728541, -1073457082, 536728541, 1073741824, -536870912, 536728541, -1063803308, 527160815, 1063513366, -526738975,
536870912, -1073741824, 536870912, 1073741824, -536870912, 536870912, -1063803543, 527023777, 1063803543, -527023777, 536870912, -1073741824, 536870912, 1073741824, -536870912, 536870912, -1063803543, 527023777, 1063803543, -527023777,
537013321, -1074026642, 537013321, 1073741824, -536870912, 537013321, -1063795470, 526878696, 1064085490, -527300648, 537013321, -1074026642, 537013321, 1073741824, -536870912, 537013321, -1063795470, 526878696, 1064085490, -527300648,
537155884, -1074311768, 537155884, 1073741824, -536870912, 537155884, -1063779073, 526725455, 1064359439, -527569803, 537155884, -1074311768, 537155884, 1073741824, -536870912, 537155884, -1063779073, 526725455, 1064359439, -527569803,
537298718, -1074597435, 537298718, 1073741824, -536870912, 537298718, -1063754328, 526563934, 1064625617, -527831454, 537298718, -1074597435, 537298718, 1073741824, -536870912, 537298718, -1063754328, 526563934, 1064625617, -527831454,
537441939, -1074883878, 537441939, 1073741824, -536870912, 537441939, -1063721205, 526394005, 1064884245, -528085806, 537441939, -1074883878, 537441939, 1073741824, -536870912, 537441939, -1063721205, 526394005, 1064884245, -528085806,
537585666, -1075171331, 537585666, 1073741824, -536870912, 537585666, -1063679666, 526215534, 1065135536, -528333059, 537585666, -1075171331, 537585666, 1073741824, -536870912, 537585666, -1063679666, 526215534, 1065135536, -528333059,
537730015, -1075460030, 537730015, 1073741824, -536870912, 537730015, -1063629666, 526028380, 1065379699, -528573409, 537730015, -1075460030, 537730015, 1073741824, -536870912, 537730015, -1063629666, 526028380, 1065379699, -528573409,
537875106, -1075750212, 537875106, 1073741824, -536870912, 537875106, -1063571152, 525832396, 1065616936, -528807045, 537875106, -1075750212, 537875106, 1073741824, -536870912, 537875106, -1063571152, 525832396, 1065616936, -528807045,
538021057, -1076042114, 538021057, 1073741824, -536870912, 538021057, -1063504065, 525627429, 1065847444, -529034151, 538021057, -1076042114, 538021057, 1073741824, -536870912, 538021057, -1063504065, 525627429, 1065847444, -529034151,
538167989, -1076335977, 538167989, 1073741824, -536870912, 538167989, -1063428338, 525413317, 1066071412, -529254907, 538167989, -1076335977, 538167989, 1073741824, -536870912, 538167989, -1063428338, 525413317, 1066071412, -529254907,
/* Band 2, -9 dB gain */ /* Band 2, -9 dB gain */
531784976, -1055497692, 523873415, 1066213307, -529420241, 531784976, -1040357886, 509828014, 1028908252, -494627367, 531784976, -1055497692, 523873415, 1066213307, -529420241, 531784976, -1040357886, 509828014, 1028908252, -494627367,
/* Band 2, -8 dB gain */ /* Band 2, -8 dB gain */
532357636, -1056601982, 524400080, 1066115844, -529326645, 532357636, -1040623406, 509562600, 1030462237, -496062122, 532357636, -1056601982, 524400080, 1066115844, -529326645, 532357636, -1040623406, 509562600, 1030462237, -496062122,
532927392, -1057707729, 524931110, 1066024274, -529239070, 532927392, -1040848253, 509262081, 1031969246, -497457090, 532927392, -1057707729, 524931110, 1066024274, -529239070, 532927392, -1040848253, 509262081, 1031969246, -497457090,
533494678, -1058816094, 525467240, 1065939047, -529157961, 533494678, -1041032161, 508925950, 1033429976, -498812573, 533494678, -1058816094, 525467240, 1065939047, -529157961, 533494678, -1041032161, 508925950, 1033429976, -498812573,
534059929, -1059928204, 526009170, 1065860582, -529083734, 534059929, -1041174868, 508553717, 1034845124, -500128887, 534059929, -1059928204, 526009170, 1065860582, -529083734, 534059929, -1041174868, 508553717, 1034845124, -500128887,
534623580, -1061045148, 526557561, 1065789260, -529016764, 534623580, -1041276126, 508144920, 1036215393, -501406373, 534623580, -1061045148, 526557561, 1065789260, -529016764, 534623580, -1041276126, 508144920, 1036215393, -501406373,
535186068, -1062167969, 527113032, 1065725420, -528957385, 535186068, -1041335703, 507699125, 1037541500, -502645399, 535186068, -1062167969, 527113032, 1065725420, -528957385, 535186068, -1041335703, 507699125, 1037541500, -502645399,
535747827, -1063297666, 527676151, 1065669351, -528905879, 535747827, -1041353386, 507215934, 1038824183, -503846368, 535747827, -1063297666, 527676151, 1065669351, -528905879, 535747827, -1041353386, 507215934, 1038824183, -503846368,
536309295, -1064435183, 528247436, 1065621289, -528862476, 536309295, -1041328990, 506694984, 1040064203, -505009724, 536309295, -1064435183, 528247436, 1065621289, -528862476, 536309295, -1041328990, 506694984, 1040064203, -505009724,
536870912, -1065581413, 528827349, 1065581413, -528827349, 536870912, -1041262354, 506135953, 1041262354, -506135953, 536870912, -1065581413, 528827349, 1065581413, -528827349, 536870912, -1041262354, 506135953, 1041262354, -506135953,
537433117, -1066737194, 529416295, 1065549847, -528800610, 537433117, -1041153346, 505538564, 1042419457, -507225588, 537433117, -1066737194, 529416295, 1065549847, -528800610, 537433117, -1041153346, 505538564, 1042419457, -507225588,
537996352, -1067903307, 530014622, 1065526651, -528782316, 537996352, -1041001864, 504902578, 1043536370, -508279208, 537996352, -1067903307, 530014622, 1065526651, -528782316, 537996352, -1041001864, 504902578, 1043536370, -508279208,
538561061, -1069080480, 530622620, 1065511830, -528772462, 538561061, -1040807833, 504227800, 1044613981, -509297437, 538561061, -1069080480, 530622620, 1065511830, -528772462, 538561061, -1040807833, 504227800, 1044613981, -509297437,
539127690, -1070269387, 531240527, 1065505333, -528770987, 539127690, -1040571205, 503514074, 1045653211, -510280946, 539127690, -1070269387, 531240527, 1065505333, -528770987, 539127690, -1040571205, 503514074, 1045653211, -510280946,
539696690, -1071470656, 531868525, 1065507054, -528777778, 539696690, -1040291951, 502761277, 1046655011, -511230450, 539696690, -1071470656, 531868525, 1065507054, -528777778, 539696690, -1040291951, 502761277, 1046655011, -511230450,
540268512, -1072684867, 532506750, 1065516837, -528792672, 540268512, -1039970063, 501969320, 1047620358, -512146700, 540268512, -1072684867, 532506750, 1065516837, -528792672, 540268512, -1039970063, 501969320, 1047620358, -512146700,
540843613, -1073912567, 533155297, 1065534483, -528815459, 540843613, -1039605542, 501138139, 1048550251, -513030484, 540843613, -1073912567, 533155297, 1065534483, -528815459, 540843613, -1039605542, 501138139, 1048550251, -513030484,
541422451, -1075154268, 533814224, 1065559750, -528845892, 541422451, -1039198394, 500267687, 1049445708, -513882621, 541422451, -1075154268, 533814224, 1065559750, -528845892, 541422451, -1039198394, 500267687, 1049445708, -513882621,
542005489, -1076410460, 534483561, 1065592362, -528883686, 542005489, -1038748624, 499357932, 1050307760, -514703956, 542005489, -1076410460, 534483561, 1065592362, -528883686, 542005489, -1038748624, 499357932, 1050307760, -514703956,
518903861, -1001986830, 486725277, 1037235801, -502367695, 518903861, -945834422, 446371043, 902366163, -400700571, 518903861, -1001986830, 486725277, 1037235801, -502367695, 518903861, -945834422, 446371043, 902366163, -400700571,
520899989, -1005630916, 488289126, 1036926846, -502147311, 520899989, -946490935, 445581846, 907921945, -404936158, 520899989, -1005630916, 488289126, 1036926846, -502147311, 520899989, -946490935, 445581846, 907921945, -404936158,
522893209, -1009290002, 489869792, 1036650484, -501961419, 522893209, -947006359, 444685310, 913306106, -409075225, 522893209, -1009290002, 489869792, 1036650484, -501961419, 522893209, -947006359, 444685310, 913306106, -409075225,
524884763, -1012968199, 491470256, 1036407567, -501810737, 524884763, -947377809, 443679533, 918521018, -413116221, 524884763, -1012968199, 491470256, 1036407567, -501810737, 524884763, -947377809, 443679533, 918521018, -413116221,
526875910, -1016669649, 493093518, 1036198712, -501695739, 526875910, -947602324, 442562672, 923569247, -417057897, 526875910, -1016669649, 493093518, 1036198712, -501695739, 526875910, -947602324, 442562672, 923569247, -417057897,
528867927, -1020398503, 494742575, 1036024293, -501616651, 528867927, -947676875, 441332970, 928453558, -420899319, 528867927, -1020398503, 494742575, 1036024293, -501616651, 528867927, -947676875, 441332970, 928453558, -420899319,
530862111, -1024158905, 496420407, 1035884447, -501573457, 530862111, -947598385, 439988777, 933176909, -424639872, 530862111, -1024158905, 496420407, 1035884447, -501573457, 530862111, -947598385, 439988777, 933176909, -424639872,
532859778, -1027954970, 498129955, 1035779077, -501565907, 532859778, -947363742, 438528571, 937742446, -428279254, 532859778, -1027954970, 498129955, 1035779077, -501565907, 532859778, -947363742, 438528571, 937742446, -428279254,
534862260, -1031790763, 499874098, 1035707863, -501593525, 534862260, -946969823, 436950987, 942153486, -431817474, 534862260, -1031790763, 499874098, 1035707863, -501593525, 534862260, -946969823, 436950987, 942153486, -431817474,
536870912, -1035670279, 501655630, 1035670279, -501655630, 536870912, -946413508, 435254839, 946413508, -435254839, 536870912, -1035670279, 501655630, 1035670279, -501655630, 536870912, -946413508, 435254839, 946413508, -435254839,
538887107, -1039597419, 503477238, 1035665609, -501751354, 538887107, -945691703, 433439146, 950526127, -438591937, 538887107, -1039597419, 503477238, 1035665609, -501751354, 538887107, -945691703, 433439146, 950526127, -438591937,
540912240, -1043575967, 505341475, 1035692963, -501879659, 540912240, -944801359, 431503152, 954495080, -441829621, 540912240, -1043575967, 505341475, 1035692963, -501879659, 540912240, -944801359, 431503152, 954495080, -441829621,
542947726, -1047609569, 507250741, 1035751307, -502039364, 542947726, -943739490, 429446349, 958324201, -444968987, 542947726, -1047609569, 507250741, 1035751307, -502039364, 542947726, -943739490, 429446349, 958324201, -444968987,
544995000, -1051701717, 509207261, 1035839473, -502229165, 544995000, -942503190, 427268492, 962017400, -448011351, 544995000, -1051701717, 509207261, 1035839473, -502229165, 544995000, -942503190, 427268492, 962017400, -448011351,
547055523, -1055855728, 511213065, 1035956193, -502447657, 547055523, -941089647, 424969617, 965578640, -450958226, 547055523, -1055855728, 511213065, 1035956193, -502447657, 547055523, -941089647, 424969617, 965578640, -450958226,
549130774, -1060074734, 513269973, 1036100110, -502693359, 549130774, -939496155, 422550049, 969011913, -453811298, 549130774, -1060074734, 513269973, 1036100110, -502693359, 549130774, -939496155, 422550049, 969011913, -453811298,
551222259, -1064361672, 515379585, 1036269804, -502964731, 551222259, -937720119, 420010407, 972321228, -456572401, 551222259, -1064361672, 515379585, 1036269804, -502964731, 551222259, -937720119, 420010407, 972321228, -456572401,
553331507, -1068719280, 517543273, 1036463810, -503260192, 553331507, -935759057, 417351601, 975510582, -459243495, 553331507, -1068719280, 517543273, 1036463810, -503260192, 553331507, -935759057, 417351601, 975510582, -459243495,
555460072, -1073150100, 519762181, 1036680633, -503578144, 555460072, -933610600, 414574832, 978583948, -461826644, 555460072, -1073150100, 519762181, 1036680633, -503578144, 555460072, -933610600, 414574832, 978583948, -461826644,
494084017, -851422604, 404056273, 930151631, -423619864, 494084017, -673714108, 339502486, 561843007, -265801750, 494084017, -851422604, 404056273, 930151631, -423619864, 494084017, -673714108, 339502486, 561843007, -265801750,
498713542, -859177141, 406587077, 929211656, -423786402, 498713542, -673274906, 338185129, 573719128, -272222942, 498713542, -859177141, 406587077, 929211656, -423786402, 498713542, -673274906, 338185129, 573719128, -272222942,
503369016, -867012190, 409148384, 928362985, -424054784, 503369016, -672533059, 336693984, 585290277, -278599028, 503369016, -867012190, 409148384, 928362985, -424054784, 503369016, -672533059, 336693984, 585290277, -278599028,
508052536, -874935599, 411746438, 927604291, -424422151, 508052536, -671478538, 335026905, 596558312, -284920289, 508052536, -874935599, 411746438, 927604291, -424422151, 508052536, -671478538, 335026905, 596558312, -284920289,
512766286, -882955583, 414387826, 926933782, -424885216, 512766286, -670100998, 333182045, 607525792, -291177811, 512766286, -882955583, 414387826, 926933782, -424885216, 512766286, -670100998, 333182045, 607525792, -291177811,
517512534, -891080712, 417079474, 926349262, -425440318, 517512534, -668389789, 331157902, 618195914, -297363485, 517512534, -891080712, 417079474, 926349262, -425440318, 517512534, -668389789, 331157902, 618195914, -297363485,
522293635, -899319903, 419828635, 925848177, -426083491, 522293635, -666333963, 328953368, 628572440, -303470012, 522293635, -899319903, 419828635, 925848177, -426083491, 522293635, -666333963, 328953368, 628572440, -303470012,
527112032, -907682405, 422642886, 925427679, -426810526, 527112032, -663922286, 326567785, 638659631, -309490882, 527112032, -907682405, 422642886, 925427679, -426810526, 527112032, -663922286, 326567785, 638659631, -309490882,
531970251, -916177781, 425530105, 925084675, -427617023, 531970251, -661143261, 324000998, 648462180, -315420352, 531970251, -916177781, 425530105, 925084675, -427617023, 531970251, -661143261, 324000998, 648462180, -315420352,
536870912, -924815881, 428498454, 924815881, -428498454, 536870912, -657985147, 321253420, 657985147, -321253420, 536870912, -924815881, 428498454, 924815881, -428498454, 536870912, -657985147, 321253420, 657985147, -321253420,
541816719, -933606817, 431556352, 924617870, -429450209, 541816719, -654435997, 318326093, 667233900, -326985786, 541816719, -933606817, 431556352, 924617870, -429450209, 541816719, -654435997, 318326093, 667233900, -326985786,
546810467, -942560921, 434712438, 924487114, -430467639, 546810467, -650483688, 315220754, 676214053, -332613816, 546810467, -942560921, 434712438, 924487114, -430467639, 546810467, -650483688, 315220754, 676214053, -332613816,
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556953421, -961000826, 441354588, 924413001, -432680993, 556953421, -641320513, 308486839, 693391970, -343545389, 556953421, -961000826, 441354588, 924413001, -432680993, 556953421, -641320513, 308486839, 693391970, -343545389,
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583363084, -1010701292, 460304674, 925154455, -439046908, 583363084, -610497723, 288819761, 732056685, -368902865, 583363084, -1010701292, 460304674, 925154455, -439046908, 583363084, -610497723, 288819761, 732056685, -368902865,
387379495, -506912469, 196933274, 840112184, -347208270, 387379495, 506912469, 196933274, -840112184, -347208270, 387379495, -506912469, 196933274, 840112184, -347208270, 387379495, 506912469, 196933274, -840112184, -347208270,
401658082, -532275898, 207149427, 833765363, -343175316, 401658082, 532275898, 207149427, -833765363, -343175316, 401658082, -532275898, 207149427, 833765363, -343175316, 401658082, 532275898, 207149427, -833765363, -343175316,
416472483, -558722695, 217902617, 827270154, -339107319, 416472483, 558722695, 217902617, -827270154, -339107319, 416472483, -558722695, 217902617, 827270154, -339107319, 416472483, 558722695, 217902617, -827270154, -339107319,
431841949, -586290861, 229212798, 820624988, -335007540, 431841949, 586290861, 229212798, -820624988, -335007540, 431841949, -586290861, 229212798, 820624988, -335007540, 431841949, 586290861, 229212798, -820624988, -335007540,
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536870912, -777538408, 309962566, 777538408, -309962566, 536870912, 777538408, 309962566, -777538408, -309962566, 536870912, -777538408, 309962566, 777538408, -309962566, 536870912, 777538408, 309962566, -777538408, -309962566,
556717294, -814129313, 325780968, 769814766, -305757943, 556717294, 814129313, 325780968, -769814766, -305757943, 556717294, -814129313, 325780968, 769814766, -305757943, 556717294, 814129313, 325780968, -769814766, -305757943,
577295658, -852193284, 342338310, 761935777, -301559360, 577295658, 852193284, 342338310, -761935777, -301559360, 577295658, -852193284, 342338310, 761935777, -301559360, 577295658, 852193284, 342338310, -761935777, -301559360,
598631206, -891780698, 359660433, 753902014, -297373230, 598631206, 891780698, 359660433, -753902014, -297373230, 598631206, -891780698, 359660433, 753902014, -297373230, 598631206, 891780698, 359660433, -753902014, -297373230,
620749877, -932943463, 377773927, 745714425, -293206383, 620749877, 932943463, 377773927, -745714425, -293206383, 620749877, -932943463, 377773927, 745714425, -293206383, 620749877, 932943463, 377773927, -745714425, -293206383,
643678365, -975735041, 396706151, 737374355, -289066077, 643678365, 975735041, 396706151, -737374355, -289066077, 643678365, -975735041, 396706151, 737374355, -289066077, 643678365, 975735041, 396706151, -737374355, -289066077,
667444134, -1020210487, 416485252, 728883588, -284960004, 667444134, 1020210487, 416485252, -728883588, -284960004, 667444134, -1020210487, 416485252, 728883588, -284960004, 667444134, 1020210487, 416485252, -728883588, -284960004,
692075438, -1066426476, 437140179, 720244375, -280896294, 692075438, 1066426476, 437140179, -720244375, -280896294, 692075438, -1066426476, 437140179, 720244375, -280896294, 692075438, 1066426476, 437140179, -720244375, -280896294,
717601336, -1114441339, 458700704, 711459472, -276883515, 717601336, 1114441339, 458700704, -711459472, -276883515, 717601336, -1114441339, 458700704, 711459472, -276883515, 717601336, 1114441339, 458700704, -711459472, -276883515,
744051710, -1164315096, 481197437, 702532174, -272930673, 744051710, 1164315096, 481197437, -702532174, -272930673 744051710, -1164315096, 481197437, 702532174, -272930673, 744051710, 1164315096, 481197437, -702532174, -272930673
}; };
@ -278,118 +294,118 @@ int gainDB[5] = {0, -3, 6, 4, -6};
float32_t snr; float32_t snr;
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Graphic equalizer Example * Graphic equalizer Example
* ------------------------------------------------------------------- */ * ------------------------------------------------------------------- */
int32_t main(void) int32_t main(void)
{ {
float32_t *inputF32, *outputF32; float32_t *inputF32, *outputF32;
arm_biquad_cas_df1_32x64_ins_q31 S1; arm_biquad_cas_df1_32x64_ins_q31 S1;
arm_biquad_cas_df1_32x64_ins_q31 S2; arm_biquad_cas_df1_32x64_ins_q31 S2;
arm_biquad_casd_df1_inst_q31 S3; arm_biquad_casd_df1_inst_q31 S3;
arm_biquad_casd_df1_inst_q31 S4; arm_biquad_casd_df1_inst_q31 S4;
arm_biquad_casd_df1_inst_q31 S5; arm_biquad_casd_df1_inst_q31 S5;
int i; int i;
int32_t status; int32_t status;
inputF32 = &testInput_f32[0]; inputF32 = &testInput_f32[0];
outputF32 = &testOutput[0]; outputF32 = &testOutput[0];
/* Initialize the state and coefficient buffers for all Biquad sections */ /* Initialize the state and coefficient buffers for all Biquad sections */
arm_biquad_cas_df1_32x64_init_q31(&S1, NUMSTAGES, arm_biquad_cas_df1_32x64_init_q31(&S1, NUMSTAGES,
(q31_t *) &coeffTable[190*0 + 10*(gainDB[0] + 9)], (q31_t *) &coeffTable[190*0 + 10*(gainDB[0] + 9)],
&biquadStateBand1Q31[0], 2); &biquadStateBand1Q31[0], 2);
arm_biquad_cas_df1_32x64_init_q31(&S2, NUMSTAGES, arm_biquad_cas_df1_32x64_init_q31(&S2, NUMSTAGES,
(q31_t *) &coeffTable[190*1 + 10*(gainDB[1] + 9)], (q31_t *) &coeffTable[190*1 + 10*(gainDB[1] + 9)],
&biquadStateBand2Q31[0], 2); &biquadStateBand2Q31[0], 2);
arm_biquad_cascade_df1_init_q31(&S3, NUMSTAGES,
(q31_t *) &coeffTable[190*2 + 10*(gainDB[2] + 9)],
&biquadStateBand3Q31[0], 2);
arm_biquad_cascade_df1_init_q31(&S4, NUMSTAGES, arm_biquad_cascade_df1_init_q31(&S3, NUMSTAGES,
(q31_t *) &coeffTable[190*3 + 10*(gainDB[3] + 9)], (q31_t *) &coeffTable[190*2 + 10*(gainDB[2] + 9)],
&biquadStateBand4Q31[0], 2); &biquadStateBand3Q31[0], 2);
arm_biquad_cascade_df1_init_q31(&S5, NUMSTAGES,
(q31_t *) &coeffTable[190*4 + 10*(gainDB[4] + 9)],
&biquadStateBand5Q31[0], 2);
/* Call the process functions and needs to change filter coefficients
for varying the gain of each band */
for(i=0; i < NUMBLOCKS; i++)
{
/* ---------------------------------------------------------------------- arm_biquad_cascade_df1_init_q31(&S4, NUMSTAGES,
** Convert block of input data from float to Q31 (q31_t *) &coeffTable[190*3 + 10*(gainDB[3] + 9)],
** ------------------------------------------------------------------- */ &biquadStateBand4Q31[0], 2);
arm_float_to_q31(inputF32 + (i*BLOCKSIZE), inputQ31, BLOCKSIZE); arm_biquad_cascade_df1_init_q31(&S5, NUMSTAGES,
(q31_t *) &coeffTable[190*4 + 10*(gainDB[4] + 9)],
/* ---------------------------------------------------------------------- &biquadStateBand5Q31[0], 2);
** Scale down by 1/8. This provides additional headroom so that the
** graphic EQ can apply gain.
** ------------------------------------------------------------------- */
arm_scale_q31(inputQ31, 0x7FFFFFFF, -3, inputQ31, BLOCKSIZE);
/* ---------------------------------------------------------------------- /* Call the process functions and needs to change filter coefficients
** Call the Q31 Biquad Cascade DF1 32x64 process function for band1, band2 for varying the gain of each band */
** ------------------------------------------------------------------- */
arm_biquad_cas_df1_32x64_q31(&S1, inputQ31, outputQ31, BLOCKSIZE); for(i=0; i < NUMBLOCKS; i++)
arm_biquad_cas_df1_32x64_q31(&S2, outputQ31, outputQ31, BLOCKSIZE); {
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
** Call the Q31 Biquad Cascade DF1 process function for band3, band4, band5 ** Convert block of input data from float to Q31
** ------------------------------------------------------------------- */ ** ------------------------------------------------------------------- */
arm_biquad_cascade_df1_q31(&S3, outputQ31, outputQ31, BLOCKSIZE); arm_float_to_q31(inputF32 + (i*BLOCKSIZE), inputQ31, BLOCKSIZE);
arm_biquad_cascade_df1_q31(&S4, outputQ31, outputQ31, BLOCKSIZE);
arm_biquad_cascade_df1_q31(&S5, outputQ31, outputQ31, BLOCKSIZE);
/* ----------------------------------------------------------------------
** Convert Q31 result back to float
** ------------------------------------------------------------------- */
arm_q31_to_float(outputQ31, outputF32 + (i * BLOCKSIZE), BLOCKSIZE); /* ----------------------------------------------------------------------
** Scale down by 1/8. This provides additional headroom so that the
** graphic EQ can apply gain.
** ------------------------------------------------------------------- */
/* ---------------------------------------------------------------------- arm_scale_q31(inputQ31, 0x7FFFFFFF, -3, inputQ31, BLOCKSIZE);
** Scale back up
** ------------------------------------------------------------------- */
arm_scale_f32(outputF32 + (i * BLOCKSIZE), 8.0f, outputF32 + (i * BLOCKSIZE), BLOCKSIZE); /* ----------------------------------------------------------------------
}; ** Call the Q31 Biquad Cascade DF1 32x64 process function for band1, band2
** ------------------------------------------------------------------- */
snr = arm_snr_f32(testRefOutput_f32, testOutput, TESTLENGTH); arm_biquad_cas_df1_32x64_q31(&S1, inputQ31, outputQ31, BLOCKSIZE);
arm_biquad_cas_df1_32x64_q31(&S2, outputQ31, outputQ31, BLOCKSIZE);
if (snr < SNR_THRESHOLD_F32) /* ----------------------------------------------------------------------
{ ** Call the Q31 Biquad Cascade DF1 process function for band3, band4, band5
status = ARM_MATH_TEST_FAILURE; ** ------------------------------------------------------------------- */
}
else arm_biquad_cascade_df1_q31(&S3, outputQ31, outputQ31, BLOCKSIZE);
{ arm_biquad_cascade_df1_q31(&S4, outputQ31, outputQ31, BLOCKSIZE);
status = ARM_MATH_SUCCESS; arm_biquad_cascade_df1_q31(&S5, outputQ31, outputQ31, BLOCKSIZE);
}
/* ----------------------------------------------------------------------
/* ---------------------------------------------------------------------- ** Convert Q31 result back to float
** ------------------------------------------------------------------- */
arm_q31_to_float(outputQ31, outputF32 + (i * BLOCKSIZE), BLOCKSIZE);
/* ----------------------------------------------------------------------
** Scale back up
** ------------------------------------------------------------------- */
arm_scale_f32(outputF32 + (i * BLOCKSIZE), 8.0f, outputF32 + (i * BLOCKSIZE), BLOCKSIZE);
};
snr = arm_snr_f32(testRefOutput_f32, testOutput, TESTLENGTH);
if (snr < SNR_THRESHOLD_F32)
{
status = ARM_MATH_TEST_FAILURE;
}
else
{
status = ARM_MATH_SUCCESS;
}
/* ----------------------------------------------------------------------
** Loop here if the signal does not match the reference output. ** Loop here if the signal does not match the reference output.
** ------------------------------------------------------------------- */ ** ------------------------------------------------------------------- */
if( status != ARM_MATH_SUCCESS) if( status != ARM_MATH_SUCCESS)
{ {
while(1); while(1);
} }
while(1); /* main function does not return */
}
/** \endlink */
while(1); /* main function does not return */
}
/** \endlink */

View File

@ -75,7 +75,7 @@
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget> <IsCurrentTarget>1</IsCurrentTarget>
</OPTFL> </OPTFL>
<CpuCode>0</CpuCode> <CpuCode>255</CpuCode>
<DllOpt> <DllOpt>
<SimDllName>SARMCM3.DLL</SimDllName> <SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments></SimDllArguments> <SimDllArguments></SimDllArguments>
@ -103,6 +103,7 @@
<tRmem>1</tRmem> <tRmem>1</tRmem>
<tRfunc>0</tRfunc> <tRfunc>0</tRfunc>
<tRbox>1</tRbox> <tRbox>1</tRbox>
<tRtrace>0</tRtrace>
<sRunDeb>0</sRunDeb> <sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime> <sLrtime>0</sLrtime>
<nTsel>-1</nTsel> <nTsel>-1</nTsel>
@ -134,32 +135,34 @@
<Bp> <Bp>
<Number>0</Number> <Number>0</Number>
<Type>0</Type> <Type>0</Type>
<LineNumber>184</LineNumber> <LineNumber>198</LineNumber>
<EnabledFlag>1</EnabledFlag> <EnabledFlag>1</EnabledFlag>
<Address>664</Address> <Address>0</Address>
<ByteObject>0</ByteObject> <ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects> <ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject> <SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess> <BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount> <BreakIfRCount>0</BreakIfRCount>
<Filename></Filename> <Filename>C:\CMSIS\CMSIS_Setup\CMSIS\DSP_Lib\Examples\arm_linear_interp_example\arm_linear_interp_example_f32.c</Filename>
<ExecCommand></ExecCommand> <ExecCommand></ExecCommand>
<Expression>\\arm_cortexM0l_linear_interp_example\../arm_linear_interp_example_f32.c\184</Expression> <Expression></Expression>
</Bp> </Bp>
<Bp> <Bp>
<Number>1</Number> <Number>1</Number>
<Type>0</Type> <Type>0</Type>
<LineNumber>181</LineNumber> <LineNumber>201</LineNumber>
<EnabledFlag>1</EnabledFlag> <EnabledFlag>1</EnabledFlag>
<Address>660</Address> <Address>0</Address>
<ByteObject>0</ByteObject> <ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects> <ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject> <SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess> <BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount> <BreakIfRCount>0</BreakIfRCount>
<Filename></Filename> <Filename>C:\CMSIS\CMSIS_Setup\CMSIS\DSP_Lib\Examples\arm_linear_interp_example\arm_linear_interp_example_f32.c</Filename>
<ExecCommand></ExecCommand> <ExecCommand></ExecCommand>
<Expression>\\arm_cortexM0l_linear_interp_example\../arm_linear_interp_example_f32.c\181</Expression> <Expression></Expression>
</Bp> </Bp>
</Breakpoint> </Breakpoint>
<DebugFlag> <DebugFlag>
@ -188,6 +191,9 @@
<newCpu>0</newCpu> <newCpu>0</newCpu>
<uProt>0</uProt> <uProt>0</uProt>
</DebugFlag> </DebugFlag>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<LintExecutable></LintExecutable> <LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile> <LintConfigFile></LintConfigFile>
</TargetOption> </TargetOption>
@ -198,6 +204,7 @@
<tvExp>1</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File> <File>
<GroupNumber>1</GroupNumber> <GroupNumber>1</GroupNumber>
<FileNumber>1</FileNumber> <FileNumber>1</FileNumber>
@ -206,11 +213,13 @@
<Focus>0</Focus> <Focus>0</Focus>
<ColumnNumber>0</ColumnNumber> <ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<TopLine>171</TopLine> <TopLine>145</TopLine>
<CurrentLine>181</CurrentLine> <CurrentLine>201</CurrentLine>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\arm_linear_interp_example_f32.c</PathWithFileName> <PathWithFileName>..\arm_linear_interp_example_f32.c</PathWithFileName>
<FilenameWithoutPath>arm_linear_interp_example_f32.c</FilenameWithoutPath> <FilenameWithoutPath>arm_linear_interp_example_f32.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
<File> <File>
<GroupNumber>1</GroupNumber> <GroupNumber>1</GroupNumber>
@ -220,11 +229,13 @@
<Focus>0</Focus> <Focus>0</Focus>
<ColumnNumber>12</ColumnNumber> <ColumnNumber>12</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<TopLine>1</TopLine> <TopLine>0</TopLine>
<CurrentLine>9</CurrentLine> <CurrentLine>0</CurrentLine>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\arm_linear_interp_data.c</PathWithFileName> <PathWithFileName>..\arm_linear_interp_data.c</PathWithFileName>
<FilenameWithoutPath>arm_linear_interp_data.c</FilenameWithoutPath> <FilenameWithoutPath>arm_linear_interp_data.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
<File> <File>
<GroupNumber>1</GroupNumber> <GroupNumber>1</GroupNumber>
@ -239,6 +250,8 @@
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\..\Common\Source\math_helper.c</PathWithFileName> <PathWithFileName>..\..\Common\Source\math_helper.c</PathWithFileName>
<FilenameWithoutPath>math_helper.c</FilenameWithoutPath> <FilenameWithoutPath>math_helper.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
</Group> </Group>
@ -247,6 +260,7 @@
<tvExp>1</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File> <File>
<GroupNumber>2</GroupNumber> <GroupNumber>2</GroupNumber>
<FileNumber>4</FileNumber> <FileNumber>4</FileNumber>
@ -255,11 +269,13 @@
<Focus>0</Focus> <Focus>0</Focus>
<ColumnNumber>0</ColumnNumber> <ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<TopLine>126</TopLine> <TopLine>124</TopLine>
<CurrentLine>126</CurrentLine> <CurrentLine>139</CurrentLine>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\..\Common\ARM\startup_ARMCM0.s</PathWithFileName> <PathWithFileName>..\..\Common\ARM\startup_ARMCM0.s</PathWithFileName>
<FilenameWithoutPath>startup_ARMCM0.s</FilenameWithoutPath> <FilenameWithoutPath>startup_ARMCM0.s</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
<File> <File>
<GroupNumber>2</GroupNumber> <GroupNumber>2</GroupNumber>
@ -274,6 +290,8 @@
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\..\Common\system_ARMCM0.c</PathWithFileName> <PathWithFileName>..\..\Common\system_ARMCM0.c</PathWithFileName>
<FilenameWithoutPath>system_ARMCM0.c</FilenameWithoutPath> <FilenameWithoutPath>system_ARMCM0.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
</Group> </Group>
@ -282,6 +300,7 @@
<tvExp>1</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File> <File>
<GroupNumber>3</GroupNumber> <GroupNumber>3</GroupNumber>
<FileNumber>6</FileNumber> <FileNumber>6</FileNumber>
@ -295,6 +314,8 @@
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\Lib\ARM\arm_cortexM0l_math.lib</PathWithFileName> <PathWithFileName>..\..\..\..\Lib\ARM\arm_cortexM0l_math.lib</PathWithFileName>
<FilenameWithoutPath>arm_cortexM0l_math.lib</FilenameWithoutPath> <FilenameWithoutPath>arm_cortexM0l_math.lib</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
</Group> </Group>

View File

@ -61,6 +61,8 @@
<UserProg2Name></UserProg2Name> <UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode> <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode> <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile> </BeforeCompile>
<BeforeMake> <BeforeMake>
<RunUserProg1>0</RunUserProg1> <RunUserProg1>0</RunUserProg1>
@ -134,6 +136,7 @@
<RestoreMemoryDisplay>1</RestoreMemoryDisplay> <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
<RestoreFunctions>0</RestoreFunctions> <RestoreFunctions>0</RestoreFunctions>
<RestoreToolbox>1</RestoreToolbox> <RestoreToolbox>1</RestoreToolbox>
<RestoreTracepoints>0</RestoreTracepoints>
</Target> </Target>
<RunDebugAfterBuild>0</RunDebugAfterBuild> <RunDebugAfterBuild>0</RunDebugAfterBuild>
<TargetSelection>-1</TargetSelection> <TargetSelection>-1</TargetSelection>
@ -342,6 +345,7 @@
<Rwpi>0</Rwpi> <Rwpi>0</Rwpi>
<wLevel>0</wLevel> <wLevel>0</wLevel>
<uThumb>0</uThumb> <uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<VariousControls> <VariousControls>
<MiscControls></MiscControls> <MiscControls></MiscControls>
<Define>ARM_MATH_CM0</Define> <Define>ARM_MATH_CM0</Define>
@ -357,6 +361,7 @@
<SplitLS>0</SplitLS> <SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk> <SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn> <NoWarn>0</NoWarn>
<uSurpInc>0</uSurpInc>
<VariousControls> <VariousControls>
<MiscControls></MiscControls> <MiscControls></MiscControls>
<Define></Define> <Define></Define>

View File

@ -103,6 +103,7 @@
<tRmem>1</tRmem> <tRmem>1</tRmem>
<tRfunc>0</tRfunc> <tRfunc>0</tRfunc>
<tRbox>1</tRbox> <tRbox>1</tRbox>
<tRtrace>0</tRtrace>
<sRunDeb>0</sRunDeb> <sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime> <sLrtime>0</sLrtime>
<nTsel>-1</nTsel> <nTsel>-1</nTsel>
@ -134,32 +135,34 @@
<Bp> <Bp>
<Number>0</Number> <Number>0</Number>
<Type>0</Type> <Type>0</Type>
<LineNumber>184</LineNumber> <LineNumber>198</LineNumber>
<EnabledFlag>1</EnabledFlag> <EnabledFlag>1</EnabledFlag>
<Address>658</Address> <Address>0</Address>
<ByteObject>0</ByteObject> <ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects> <ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject> <SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess> <BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount> <BreakIfRCount>0</BreakIfRCount>
<Filename></Filename> <Filename>C:\CMSIS\CMSIS_Setup\CMSIS\DSP_Lib\Examples\arm_linear_interp_example\arm_linear_interp_example_f32.c</Filename>
<ExecCommand></ExecCommand> <ExecCommand></ExecCommand>
<Expression>\\arm_cortexM3l_linear_interp_example\../arm_linear_interp_example_f32.c\184</Expression> <Expression></Expression>
</Bp> </Bp>
<Bp> <Bp>
<Number>1</Number> <Number>1</Number>
<Type>0</Type> <Type>0</Type>
<LineNumber>181</LineNumber> <LineNumber>201</LineNumber>
<EnabledFlag>1</EnabledFlag> <EnabledFlag>1</EnabledFlag>
<Address>654</Address> <Address>0</Address>
<ByteObject>0</ByteObject> <ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects> <ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject> <SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess> <BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount> <BreakIfRCount>0</BreakIfRCount>
<Filename></Filename> <Filename>C:\CMSIS\CMSIS_Setup\CMSIS\DSP_Lib\Examples\arm_linear_interp_example\arm_linear_interp_example_f32.c</Filename>
<ExecCommand></ExecCommand> <ExecCommand></ExecCommand>
<Expression>\\arm_cortexM3l_linear_interp_example\../arm_linear_interp_example_f32.c\181</Expression> <Expression></Expression>
</Bp> </Bp>
</Breakpoint> </Breakpoint>
<DebugFlag> <DebugFlag>
@ -188,6 +191,9 @@
<newCpu>0</newCpu> <newCpu>0</newCpu>
<uProt>0</uProt> <uProt>0</uProt>
</DebugFlag> </DebugFlag>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<LintExecutable></LintExecutable> <LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile> <LintConfigFile></LintConfigFile>
</TargetOption> </TargetOption>
@ -198,6 +204,7 @@
<tvExp>1</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File> <File>
<GroupNumber>1</GroupNumber> <GroupNumber>1</GroupNumber>
<FileNumber>1</FileNumber> <FileNumber>1</FileNumber>
@ -206,11 +213,13 @@
<Focus>0</Focus> <Focus>0</Focus>
<ColumnNumber>0</ColumnNumber> <ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<TopLine>171</TopLine> <TopLine>145</TopLine>
<CurrentLine>181</CurrentLine> <CurrentLine>201</CurrentLine>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\arm_linear_interp_example_f32.c</PathWithFileName> <PathWithFileName>..\arm_linear_interp_example_f32.c</PathWithFileName>
<FilenameWithoutPath>arm_linear_interp_example_f32.c</FilenameWithoutPath> <FilenameWithoutPath>arm_linear_interp_example_f32.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
<File> <File>
<GroupNumber>1</GroupNumber> <GroupNumber>1</GroupNumber>
@ -225,6 +234,8 @@
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\arm_linear_interp_data.c</PathWithFileName> <PathWithFileName>..\arm_linear_interp_data.c</PathWithFileName>
<FilenameWithoutPath>arm_linear_interp_data.c</FilenameWithoutPath> <FilenameWithoutPath>arm_linear_interp_data.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
<File> <File>
<GroupNumber>1</GroupNumber> <GroupNumber>1</GroupNumber>
@ -239,6 +250,8 @@
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\..\Common\Source\math_helper.c</PathWithFileName> <PathWithFileName>..\..\Common\Source\math_helper.c</PathWithFileName>
<FilenameWithoutPath>math_helper.c</FilenameWithoutPath> <FilenameWithoutPath>math_helper.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
</Group> </Group>
@ -247,6 +260,7 @@
<tvExp>1</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File> <File>
<GroupNumber>2</GroupNumber> <GroupNumber>2</GroupNumber>
<FileNumber>4</FileNumber> <FileNumber>4</FileNumber>
@ -255,11 +269,13 @@
<Focus>0</Focus> <Focus>0</Focus>
<ColumnNumber>0</ColumnNumber> <ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<TopLine>126</TopLine> <TopLine>124</TopLine>
<CurrentLine>126</CurrentLine> <CurrentLine>139</CurrentLine>
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\..\Common\ARM\startup_ARMCM3.s</PathWithFileName> <PathWithFileName>..\..\Common\ARM\startup_ARMCM3.s</PathWithFileName>
<FilenameWithoutPath>startup_ARMCM3.s</FilenameWithoutPath> <FilenameWithoutPath>startup_ARMCM3.s</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
<File> <File>
<GroupNumber>2</GroupNumber> <GroupNumber>2</GroupNumber>
@ -274,6 +290,8 @@
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\..\Common\system_ARMCM3.c</PathWithFileName> <PathWithFileName>..\..\Common\system_ARMCM3.c</PathWithFileName>
<FilenameWithoutPath>system_ARMCM3.c</FilenameWithoutPath> <FilenameWithoutPath>system_ARMCM3.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
</Group> </Group>
@ -282,6 +300,7 @@
<tvExp>1</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
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<File> <File>
<GroupNumber>3</GroupNumber> <GroupNumber>3</GroupNumber>
<FileNumber>6</FileNumber> <FileNumber>6</FileNumber>
@ -295,6 +314,8 @@
<bDave2>0</bDave2> <bDave2>0</bDave2>
<PathWithFileName>..\..\..\..\Lib\ARM\arm_cortexM3l_math.lib</PathWithFileName> <PathWithFileName>..\..\..\..\Lib\ARM\arm_cortexM3l_math.lib</PathWithFileName>
<FilenameWithoutPath>arm_cortexM3l_math.lib</FilenameWithoutPath> <FilenameWithoutPath>arm_cortexM3l_math.lib</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File> </File>
</Group> </Group>

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