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Code Issues Releases Activity

OP-1477 - Firmware usart Working

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This commit is contained in:
Alessio Morale 2014-09-07 22:27:22 +02:00
parent 1970e0a870
commit 46424523b0
9 changed files with 165 additions and 185 deletions
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2
Makefile
View File

@ -207,7 +207,7 @@ osd_short := 'osd '
revoproto_short := 'revp'
simposix_short := 'posx'
discoveryf4bare_short := 'df4b'
gpsplatinum_short := 'osd '
gpsplatinum_short := 'gps9 '
# SimPosix only builds on Linux so drop it from the list for
# all other platforms.

79
flight/targets/boards/gpsplatinum/board_hw_defs.c
View File

@ -193,44 +193,13 @@ void PIOS_SPI_flash_irq_handler(void)
#endif /* PIOS_INCLUDE_SPI */
#if defined(PIOS_INCLUDE_FLASH)
#include "pios_flashfs_logfs_priv.h"
#include "pios_flash_jedec_priv.h"
static const struct flashfs_logfs_cfg flashfs_w25x_cfg = {
.fs_magic = 0x99abcdef,
.total_fs_size = 0x00080000, /* 512K bytes (128 sectors = entire chip) */
.arena_size = 0x00010000, /* 256 * slot size */
.slot_size = 0x00000100, /* 256 bytes */
.start_offset = 0, /* start at the beginning of the chip */
.sector_size = 0x00001000, /* 4K bytes */
.page_size = 0x00000100, /* 256 bytes */
};
static const struct flashfs_logfs_cfg flashfs_m25p_cfg = {
.fs_magic = 0x99abceef,
.total_fs_size = 0x00200000, /* 2M bytes (32 sectors = entire chip) */
.arena_size = 0x00010000, /* 256 * slot size */
.slot_size = 0x00000100, /* 256 bytes */
.start_offset = 0, /* start at the beginning of the chip */
.sector_size = 0x00010000, /* 64K bytes */
.page_size = 0x00000100, /* 256 bytes */
};
#include "pios_flash.h"
#endif /* PIOS_INCLUDE_FLASH */
#if defined(PIOS_INCLUDE_USART)
#include "pios_usart_priv.h"
static const struct pios_usart_cfg pios_usart_generic_main_cfg = {
.regs = USART1,
.remap = GPIO_AF_0,
.remap = GPIO_AF_1,
.init = {
.USART_BaudRate = 57600,
.USART_WordLength = USART_WordLength_8b,
@ -309,70 +278,66 @@ void PIOS_RTC_IRQ_Handler(void)
* I2C Adapters
*/
void PIOS_I2C_flexi_adapter_ev_irq_handler(void);
void PIOS_I2C_flexi_adapter_er_irq_handler(void);
void I2C2_EV_IRQHandler() __attribute__((alias("PIOS_I2C_flexi_adapter_ev_irq_handler")));
void I2C2_ER_IRQHandler() __attribute__((alias("PIOS_I2C_flexi_adapter_er_irq_handler")));
void PIOS_I2C_gps_irq_handler(void);
void I2C2_IRQHandler() __attribute__((alias("PIOS_I2C_gps_irq_handler")));
static const struct pios_i2c_adapter_cfg pios_i2c_flexi_adapter_cfg = {
static const struct pios_i2c_adapter_cfg pios_i2c_gps_cfg = {
.regs = I2C2,
.init = {
.I2C_Mode = I2C_Mode_I2C,
.I2C_OwnAddress1 = 0,
.I2C_Ack = I2C_Ack_Enable,
.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit,
.I2C_DutyCycle = I2C_DutyCycle_2,
.I2C_ClockSpeed = 400000, /* bits/s */
/* (3) Timing register value is computed with the AN4235 xls file,
fast Mode @400kHz with I2CCLK = 48MHz, rise time = 140ns,
fall time = 40ns */
.I2C_Timing = (uint32_t)0x00B01A4B,
},
.transfer_timeout_ms = 50,
.scl = {
.gpio = GPIOB,
.init = {
.GPIO_Speed = GPIO_Speed_2MHz,
.GPIO_OType = GPIO_OType_OD,
.GPIO_Mode = GPIO_Mode_AF,
.GPIO_Pin = GPIO_Pin_10,
.GPIO_Speed = GPIO_Speed_10MHz,
.GPIO_Mode = GPIO_Mode_AF_OD,
},
},
.sda = {
.gpio = GPIOB,
.init = {
.GPIO_Pin = GPIO_Pin_11,
.GPIO_Speed = GPIO_Speed_10MHz,
.GPIO_Mode = GPIO_Mode_AF_OD,
.GPIO_Speed = GPIO_Speed_2MHz,
.GPIO_OType = GPIO_OType_OD,
.GPIO_Mode = GPIO_Mode_AF,
},
},
.event = {
.flags = 0, /* FIXME: check this */
.init = {
.NVIC_IRQChannel = I2C2_EV_IRQn,
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGHEST,
.NVIC_IRQChannelSubPriority = 0,
.NVIC_IRQChannel = I2C2_IRQn,
.NVIC_IRQChannelPriority = PIOS_IRQ_PRIO_HIGHEST,
.NVIC_IRQChannelCmd = ENABLE,
},
},
.error = {
.flags = 0, /* FIXME: check this */
.init = {
.NVIC_IRQChannel = I2C2_ER_IRQn,
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGHEST,
.NVIC_IRQChannelSubPriority = 0,
.NVIC_IRQChannel = I2C2_IRQn,
.NVIC_IRQChannelPriority = PIOS_IRQ_PRIO_HIGHEST,
.NVIC_IRQChannelCmd = ENABLE,
},
},
};
uint32_t pios_i2c_flexi_adapter_id;
void PIOS_I2C_flexi_adapter_ev_irq_handler(void)
uint32_t pios_i2c_gps_id;
void PIOS_I2C_gps_irq_handler(void)
{
/* Call into the generic code to handle the IRQ for this specific device */
PIOS_I2C_EV_IRQ_Handler(pios_i2c_flexi_adapter_id);
PIOS_I2C_IRQ_Handler(pios_i2c_gps_id);
}
void PIOS_I2C_flexi_adapter_er_irq_handler(void)
{
/* Call into the generic code to handle the IRQ for this specific device */
PIOS_I2C_ER_IRQ_Handler(pios_i2c_flexi_adapter_id);
}
#endif /* PIOS_INCLUDE_I2C */

2
flight/targets/boards/gpsplatinum/bootloader/pios_board.c
View File

@ -38,7 +38,7 @@
uint32_t pios_com_telem_rf_id;
void setupCom();
static void setupCom();
/**
* PIOS_Board_Init()
* initializes all the core subsystems on this specific hardware

19
flight/targets/boards/gpsplatinum/firmware/Makefile
View File

@ -31,11 +31,11 @@ USE_DSP_LIB ?= NO
ERASE_FLASH ?= NO
# List of mandatory modules to include
MODULES += FirmwareIAP
#MODULES += FirmwareIAP
# Include all camera options
CDEFS += -DUSE_INPUT_LPF -DUSE_GIMBAL_LPF -DUSE_GIMBAL_FF
CDEFS += -DPIOS_APPS_MINIMAL
# Erase flash firmware should be buildable from command line
ifeq ($(ERASE_FLASH), YES)
@ -48,24 +48,19 @@ endif
SRC += $(CMSIS_DEVICEDIR)/system_stm32f0xx.c
## Application Core
SRC += $(OPMODULEDIR)/System/systemmod.c
SRC += $(OPSYSTEM)/gpsp.c
SRC += $(OPSYSTEM)/pios_board.c
SRC += $(FLIGHTLIB)/alarms.c
SRC += $(OPUAVTALK)/uavtalk.c
#SRC += $(FLIGHTLIB)/alarms.c
SRC += $(OPUAVOBJ)/uavobjectmanager.c
SRC += $(OPUAVOBJ)/eventdispatcher.c
## UAVObjects
SRC += $(OPUAVSYNTHDIR)/objectpersistence.c
SRC += $(OPUAVSYNTHDIR)/systemstats.c
SRC += $(OPUAVSYNTHDIR)/systemsettings.c
SRC += $(OPUAVSYNTHDIR)/i2cstats.c
SRC += $(OPUAVSYNTHDIR)/watchdogstatus.c
SRC += $(OPUAVSYNTHDIR)/firmwareiapobj.c
SRC += $(OPUAVSYNTHDIR)/taskinfo.c
SRC += $(OPUAVSYNTHDIR)/callbackinfo.c
SRC += $(OPUAVSYNTHDIR)/systemstats.c
PIOS_OMITS_USB = YES
PIOS_APPS_MINIMAL = YES
include $(ROOT_DIR)/make/apps-defs.mk
include $(ROOT_DIR)/make/common-defs.mk

15
flight/targets/boards/gpsplatinum/firmware/gpsp.c
View File

@ -67,16 +67,6 @@ int main()
* */
PIOS_Board_Init();
#ifdef ERASE_FLASH
PIOS_Flash_Jedec_EraseChip();
#if defined(PIOS_LED_HEARTBEAT)
PIOS_LED_Off(PIOS_LED_HEARTBEAT);
#endif /* PIOS_LED_HEARTBEAT */
while (1) {
;
}
#endif
/* Initialize modules */
MODULE_INITIALISE_ALL
/* swap the stack to use the IRQ stack */
@ -90,11 +80,6 @@ int main()
* the OpenPilot software actually starts at the vTaskStartScheduler() function,
* even though this is somewhat obscure.
*
* In addition, there are many main() functions in the OpenPilot firmware source tree
* This is because each main() refers to a separate hardware platform. Of course,
* C only allows one main(), so only the relevant main() function is compiled when
* making a specific firmware.
*
*/
vTaskStartScheduler();

157
flight/targets/boards/gpsplatinum/firmware/inc/FreeRTOSConfig.h
View File

@ -1,17 +1,83 @@
/*
FreeRTOS V8.0.0 - Copyright (C) 2014 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that has become a de facto standard. *
* *
* Help yourself get started quickly and support the FreeRTOS *
* project by purchasing a FreeRTOS tutorial book, reference *
* manual, or both from: http://www.FreeRTOS.org/Documentation *
* *
* Thank you! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
>>! NOTE: The modification to the GPL is included to allow you to distribute
>>! a combined work that includes FreeRTOS without being obliged to provide
>>! the source code for proprietary components outside of the FreeRTOS
>>! kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available from the following
link: http://www.freertos.org/a00114.html
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
*
* See http://www.freertos.org/a00110.html.
*----------------------------------------------------------*/
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
*
* See http://www.freertos.org/a00110.html.
*----------------------------------------------------------*/
/**
* @addtogroup PIOS PIOS
@ -24,25 +90,33 @@
#define configUSE_PREEMPTION 1
#define configUSE_IDLE_HOOK 1
#define configUSE_TICK_HOOK 0
#define configUSE_MALLOC_FAILED_HOOK 1
#define configCPU_CLOCK_HZ ((unsigned long)72000000)
#define configTICK_RATE_HZ ((portTickType)1000)
#define configMAX_PRIORITIES ((unsigned portBASE_TYPE)5)
#define configMINIMAL_STACK_SIZE ((unsigned short)48)
#define configTOTAL_HEAP_SIZE ((size_t)(53 * 256))
#define configMAX_TASK_NAME_LEN (16)
#define configCPU_CLOCK_HZ ( 48000000 )
#define configTICK_RATE_HZ ( ( TickType_t ) 1000 )
#define configMAX_PRIORITIES ( 5 )
#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 60 )
#define configTOTAL_HEAP_SIZE ((size_t)(2048))
#define configMAX_TASK_NAME_LEN ( 5 )
#define configUSE_TRACE_FACILITY 0
#define configUSE_16_BIT_TICKS 0
#define configIDLE_SHOULD_YIELD 0
#define configUSE_MUTEXES 1
#define configUSE_RECURSIVE_MUTEXES 1
#define configUSE_COUNTING_SEMAPHORES 0
#define configUSE_ALTERNATIVE_API 0
#define configQUEUE_REGISTRY_SIZE 10
#define configIDLE_SHOULD_YIELD 1
#define configUSE_MUTEXES 1
#define configQUEUE_REGISTRY_SIZE 4
#define configCHECK_FOR_STACK_OVERFLOW 2
#define configUSE_RECURSIVE_MUTEXES 1
#define configUSE_MALLOC_FAILED_HOOK 1
#define configUSE_APPLICATION_TASK_TAG 0
#define configUSE_COUNTING_SEMAPHORES 1
#define configGENERATE_RUN_TIME_STATS 0
/* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0
#define configMAX_CO_ROUTINE_PRIORITIES (2)
#define configUSE_CO_ROUTINES 0
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
/* Software timer definitions. */
#define configUSE_TIMERS 1
#define configTIMER_TASK_PRIORITY ( 2 )
#define configTIMER_QUEUE_LENGTH 5
#define configTIMER_TASK_STACK_DEPTH ( 80 )
/* Set the following definitions to 1 to include the API function, or zero
to exclude the API function. */
@ -61,7 +135,7 @@
/* This is the raw value as per the Cortex-M3 NVIC. Values can be 255
(lowest) to 1 (highest maskable) to 0 (highest non-maskable). */
#define configKERNEL_INTERRUPT_PRIORITY 15 << 4 /* equivalent to NVIC priority 15 */
#define configMAX_SYSCALL_INTERRUPT_PRIORITY 3 << 4 /* equivalent to NVIC priority 3 */
#define configMAX_SYSCALL_INTERRUPT_PRIORITY 3 << 4 /* equivalent to NVIC priority 3 */
/* This is the value being used as per the ST library which permits 16
priority values, 0 to 15. This must correspond to the
@ -69,30 +143,27 @@
NVIC value of 255. */
#define configLIBRARY_KERNEL_INTERRUPT_PRIORITY 15
#if !defined(ARCH_POSIX) && !defined(ARCH_WIN32)
#define CHECK_IRQ_STACK
#endif
/* Enable run time stats collection */
#define configGENERATE_RUN_TIME_STATS 1
#define INCLUDE_uxTaskGetRunTime 1
#define configGENERATE_RUN_TIME_STATS 0
#define INCLUDE_uxTaskGetRunTime 0
#define INCLUDE_xTaskGetIdleTaskHandle 1
#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() \
do { \
(*(unsigned long *)0xe000edfc) |= (1 << 24); /* DEMCR |= DEMCR_TRCENA */ \
(*(unsigned long *)0xe0001000) |= 1; /* DWT_CTRL |= DWT_CYCCNT_ENA */ \
} \
while (0)
#define portGET_RUN_TIME_COUNTER_VALUE() (*(unsigned long *)0xe0001004) /* DWT_CYCCNT */
#ifdef DIAG_TASKS
#define configCHECK_FOR_STACK_OVERFLOW 2
#else
#define configCHECK_FOR_STACK_OVERFLOW 1
#endif
/* Normal assert() semantics without relying on the provision of an assert.h
header file. */
#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
standard names - or at least those used in the unmodified vector table. */
#define vPortSVCHandler SVC_Handler
#define xPortPendSVHandler PendSV_Handler
#define xPortSysTickHandler SysTick_Handler
/**
* @}
*/
#endif /* FREERTOS_CONFIG_H */

7
flight/targets/boards/gpsplatinum/firmware/inc/pios_config.h
View File

@ -61,9 +61,9 @@
#define PIOS_INCLUDE_IRQ
#define PIOS_INCLUDE_RTC
//#define PIOS_INCLUDE_TIM
//#define PIOS_INCLUDE_USART
#define PIOS_INCLUDE_USART
//#define PIOS_INCLUDE_ADC
/* #define PIOS_INCLUDE_I2C */
//#define PIOS_INCLUDE_I2C
//#define PIOS_INCLUDE_SPI
#define PIOS_INCLUDE_GPIO
#define PIOS_INCLUDE_EXTI
@ -129,7 +129,8 @@
/* #define PIOS_INCLUDE_UDP */
/* PIOS abstract comms interface with options */
//#define PIOS_INCLUDE_COM
#define PIOS_INCLUDE_COM
#define PIOS_INCLUDE_DEBUG_CONSOLE
/* #define PIOS_INCLUDE_COM_MSG */
//#define PIOS_INCLUDE_TELEMETRY_RF
/* #define PIOS_INCLUDE_COM_TELEM */

59
flight/targets/boards/gpsplatinum/firmware/pios_board.c
View File

@ -43,14 +43,11 @@
*/
#include "../board_hw_defs.c"
#define PIOS_COM_MAIN_RX_BUF_LEN 32
#define PIOS_COM_MAIN_TX_BUF_LEN 12
#define PIOS_COM_MAIN_RX_BUF_LEN 16
#define PIOS_COM_MAIN_TX_BUF_LEN 64
uint32_t pios_com_main_id;
uintptr_t pios_uavo_settings_fs_id;
uintptr_t pios_user_fs_id = 0;
/**
* PIOS_Board_Init()
@ -99,72 +96,42 @@ void PIOS_Board_Init(void)
PIOS_DEBUG_Assert(0);
}
/* Initialize the task monitor */
if (PIOS_TASK_MONITOR_Initialize(TASKINFO_RUNNING_NUMELEM)) {
PIOS_Assert(0);
}
/* Initialize the delayed callback library */
PIOS_CALLBACKSCHEDULER_Initialize();
/* Initialize UAVObject libraries */
EventDispatcherInitialize();
UAVObjInitialize();
#endif
/* Initialize the task monitor */
if (PIOS_TASK_MONITOR_Initialize(3)) {
PIOS_Assert(0);
}
#if defined(PIOS_INCLUDE_RTC)
/* Initialize the real-time clock and its associated tick */
PIOS_RTC_Init(&pios_rtc_main_cfg);
#endif
PIOS_IAP_Init();
// check for safe mode commands from gcs
#ifdef PIOS_INCLUDE_FLASH_LOGFS_SETTINGS
if (PIOS_IAP_ReadBootCmd(0) == PIOS_IAP_CLEAR_FLASH_CMD_0 &&
PIOS_IAP_ReadBootCmd(1) == PIOS_IAP_CLEAR_FLASH_CMD_1 &&
PIOS_IAP_ReadBootCmd(2) == PIOS_IAP_CLEAR_FLASH_CMD_2) {
PIOS_FLASHFS_Format(pios_uavo_settings_fs_id);
PIOS_IAP_WriteBootCmd(0, 0);
PIOS_IAP_WriteBootCmd(1, 0);
PIOS_IAP_WriteBootCmd(2, 0);
}
#endif
HwSettingsInitialize();
#ifndef ERASE_FLASH
/* Initialize watchdog as early as possible to catch faults during init */
/* Initialize watchdog as early as possible to catch faults during init */
#ifdef PIOS_INCLUDE_WDG
PIOS_WDG_Init();
#endif
#endif
/* Initialize the alarms library */
AlarmsInitialize();
/* Check for repeated boot failures */
uint16_t boot_count = PIOS_IAP_ReadBootCount();
if (boot_count < 3) {
PIOS_IAP_WriteBootCount(++boot_count);
AlarmsClear(SYSTEMALARMS_ALARM_BOOTFAULT);
} else {
/* Too many failed boot attempts, force hwsettings to defaults */
HwSettingsSetDefaults(HwSettingsHandle(), 0);
AlarmsSet(SYSTEMALARMS_ALARM_BOOTFAULT, SYSTEMALARMS_ALARM_CRITICAL);
}
#if defined(PIOS_INCLUDE_COM)
{
uint32_t pios_usart_generic_id;
if (PIOS_USART_Init(&pios_usart_generic_id, &pios_usart_generic_main_cfg)) {
PIOS_Assert(0);
}
uint8_t *rx_buffer = (uint8_t *)pvPortMalloc(PIOS_COM_MAIN_RX_LEN);
uint8_t *rx_buffer = (uint8_t *)pvPortMalloc(PIOS_COM_MAIN_RX_BUF_LEN);
PIOS_Assert(rx_buffer);
uint8_t *tx_buffer = (uint8_t *)pvPortMalloc(PIOS_COM_MAIN_TX_LEN);
uint8_t *tx_buffer = (uint8_t *)pvPortMalloc(PIOS_COM_MAIN_TX_BUF_LEN);
PIOS_Assert(tx_buffer);
if (PIOS_COM_Init(&pios_com_main_id, &pios_usart_com_driver, pios_usart_generic_id,
rx_buffer, PIOS_COM_MAIN_RX_LEN,
tx_buffer, PIOS_COM_MAIN_TX_LEN)) {
rx_buffer, PIOS_COM_MAIN_RX_BUF_LEN,
tx_buffer, PIOS_COM_MAIN_TX_BUF_LEN)) {
PIOS_Assert(0);
}
}
@ -172,7 +139,7 @@ void PIOS_Board_Init(void)
#if defined(PIOS_INCLUDE_I2C)
{
if (PIOS_I2C_Init(&pios_i2c_flexi_adapter_id, &pios_i2c_flexi_adapter_cfg)) {
if (PIOS_I2C_Init(&pios_i2c_gps_id, &pios_i2c_gps_cfg)) {
PIOS_Assert(0);
}
}

10
flight/targets/boards/gpsplatinum/pios_board.h
View File

@ -119,14 +119,10 @@ extern uint32_t pios_i2c_gps_adapter_id;
// See also pios_board.c
// -------------------------
#define PIOS_COM_MAX_DEVS 1
extern uint32_t pios_com_telem_rf_id;
#define PIOS_COM_TELEM_RF (pios_com_telem_rf_id)
#define PIOS_COM_TELEM_USB (pios_com_telem_rf_id)
extern uint32_t pios_com_main_id;
#if defined(PIOS_INCLUDE_DEBUG_CONSOLE)
extern uint32_t pios_com_debug_id;
#define PIOS_COM_DEBUG (pios_com_debug_id)
#define PIOS_COM_DEBUG (pios_com_main_id)
#endif /* PIOS_INCLUDE_DEBUG_CONSOLE */
// -------------------------