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freertos: fix RTOS API calls from interrupt level

FreeRTOS has a strict requirement that even interrupt-safe API calls (ie.
those ending in "FromISR") can only be called from ISRs that are at lesser
or equal priorities to configMAX_SYSCALL_INTERRUPT_PRIORITY.  See the
"configKERNEL_INTERRUPT_PRIORITY and configMAX_SYSCALL_INTERRUPT_PRIORITY"
section at:
  http://www.freertos.org/a00110.html

The interrupt numbers used on the Cortex-M3 CPU has a somewhat backward
representation of the interrupt numbers so 255 = lowest priority and
0 = highest priority.

The calculation is further complicated by the STM32 implementation only using
the upper 4 bits of the priority value.  Only 0x00, 0x10, 0x20, ..., 0xE0, 0xF0
represent useful interrupt priorities.

FreeRTOS requires that MAX_SYSCALL and KERNEL interrupt priorities are expressed
as raw unshifted 8-bit values to be programmed directly into the BASEPRI register.

The priority values passed to the NVIC initialization, however, are expected
to be 4-bit values and are shifted up by 4 within NVIC_Init() for you.

The end result is that we need this arrangement:

[highest priority]
   NVIC_0 (Non-maskable-interrupt)
   NVIC_1
   NVIC_2
[Must NOT call FreeRTOS APIs above here]
   configMAX_SYSCALL_INTERRUPT_PRIORITY (now at 48 = 0x30 = NVIC_3)
   PIOS_IRQ_PRIO_HIGHEST (cur. NVIC_4)
   PIOS_IRQ_PRIO_HIGH    (cur. NVIC_5)
   PIOS_IRQ_PRIO_MID     (cur. NVIC_8)
   PIOS_IRQ_PRIO_LOW     (cur. NVIC_12)
   configKERNEL_INTERRUPT_PRIORITY (240 = 0xF0 = NVIC_15)
[lowest priority]

The previous config had configMAX_SYSCALL_INTERRUPT_PRIORITY set at
191 (0xBF) which is effectively NVIC_11.  This was allowing all of
the MID, HIGH and HIGHEST interrupt handlers to preempt the OS in
its critical sections.  Since some of these ISRs were calling
FreeRTOS APIs, this would result in corrupting internal data structures
within the OS.

It should be ok to move the configKERNEL_INTERRUPT_PRIORITY to a higher
priority as long as it is less than configMAX_SYSCALL_INTERRUPT_PRIORITY.

git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@637 ebee16cc-31ac-478f-84a7-5cbb03baadba
This commit is contained in:
stac 2010-05-18 04:50:38 +00:00 committed by stac
parent f6de7ff54f
commit 514d46f5b6
2 changed files with 5 additions and 5 deletions

View File

@ -91,8 +91,8 @@ TIM8 | Servo 5 | Servo 6 | Servo 7 | Servo 8
#define PIOS_I2C_IRQ_ER_HANDLER void I2C2_ER_IRQHandler(void)
#define PIOS_I2C_IRQ_EV_CHANNEL I2C2_EV_IRQn
#define PIOS_I2C_IRQ_ER_CHANNEL I2C2_EV_IRQn
#define PIOS_I2C_IRQ_EV_PRIORITY 2
#define PIOS_I2C_IRQ_ER_PRIORITY 2
#define PIOS_I2C_IRQ_EV_PRIORITY PIOS_IRQ_PRIO_HIGH
#define PIOS_I2C_IRQ_ER_PRIORITY PIOS_IRQ_PRIO_HIGH
//------------------------
// PIOS_BMP085

View File

@ -58,9 +58,9 @@ to exclude the API function. */
/* This is the raw value as per the Cortex-M3 NVIC. Values can be 255
(lowest) to 0 (1?) (highest). */
#define configKERNEL_INTERRUPT_PRIORITY 255
#define configMAX_SYSCALL_INTERRUPT_PRIORITY 191 /* equivalent to 0xb0, or priority 11. */
(lowest) to 1 (highest maskable) to 0 (highest non-maskable). */
#define configKERNEL_INTERRUPT_PRIORITY 15 << 4 /* equivalent to NVIC priority 15 */
#define configMAX_SYSCALL_INTERRUPT_PRIORITY 3 << 4 /* equivalent to NVIC priority 3 */
/* This is the value being used as per the ST library which permits 16