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LP-512 F3: implemented missing ioctls PIOS_IOCTL_USART_SET_IRQ_PRIO and PIOS_IOCTL_USART_GET_DSMBIND
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@ -207,11 +207,11 @@ int32_t PIOS_USART_Init(uint32_t *usart_id, const struct pios_usart_cfg *cfg)
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usart_dev->irq_channel = USART3_IRQn;
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break;
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case (uint32_t)UART4:
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PIOS_UART_4_id = (uint32_t)usart_dev;
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PIOS_UART_4_id = (uint32_t)usart_dev;
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usart_dev->irq_channel = UART4_IRQn;
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break;
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case (uint32_t)UART5:
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PIOS_UART_5_id = (uint32_t)usart_dev;
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PIOS_UART_5_id = (uint32_t)usart_dev;
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usart_dev->irq_channel = UART5_IRQn;
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break;
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}
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@ -476,6 +476,9 @@ static int32_t PIOS_USART_Ioctl(uint32_t usart_id, uint32_t ctl, void *param)
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uint32_t cr1_ue = usart_dev->cfg->regs->CR1 & USART_CR1_UE;
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switch (ctl) {
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case PIOS_IOCTL_USART_SET_IRQ_PRIO:
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return PIOS_USART_SetIrqPrio(usart_dev, *(uint8_t *)param);
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case PIOS_IOCTL_USART_SET_INVERTED:
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{
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enum PIOS_USART_Inverted inverted = *(enum PIOS_USART_Inverted *)param;
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@ -505,6 +508,7 @@ static int32_t PIOS_USART_Ioctl(uint32_t usart_id, uint32_t ctl, void *param)
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usart_dev->cfg->regs->CR1 &= ~((uint32_t)USART_CR1_UE);
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USART_HalfDuplexCmd(usart_dev->cfg->regs, *(bool *)param ? ENABLE : DISABLE);
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break;
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case PIOS_IOCTL_USART_GET_DSMBIND:
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case PIOS_IOCTL_USART_GET_RXGPIO:
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*(struct stm32_gpio *)param = usart_dev->cfg->rx;
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break;
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